| Document | Document Title |
|---|---|
| US09565240B2 |
Media file access
A server system stores media library associated with a user. The media library includes at least one media file. The server system determines whether the media file is stored on a second computing device that is able to send the media file to the first computing device across a local network connecting the first computing device and the second computing device. If the determination indicates that the media file is stored on a second computing device that is able to send the stored media file to the first computing device across a local network connecting the first computing device and the second computing device, the server system sends causes the second computing device to send the media file to the first computing device across the local network such that the first computing device is able to output the media file to the user. |
| US09565239B2 |
Selective access of multi-rate data from a server and/or peer
Aspects of the disclosed subject matter are directed to facilitating peer-to-peer data exchange in a common domain. In accordance with one embodiment, a method is provided for obtaining content from one or more peers that are connected to the domain. The method includes registering a peer with a super-peer when a connection to the domain is established. Then, the connecting peer obtains data that describes various network conditions and identifies chunks of content available from other peers. In downloading content from other peers, heuristics are applied to select between available chunks that are potentially encoded at different bitrates. The heuristics account for the network conditions between peers and balance the potential need to quickly access content with the desire to obtain high quality content. |
| US09565237B2 |
Information processing apparatus, information processing system, and non-transitory computer readable medium
An information processing apparatus includes the following elements. An estimated processing time information obtaining unit obtains estimated processing time information indicating an estimated processing time which will be taken to execute processing specified by a request received from a terminal. An excess information creating unit creates excess information including information concerning the estimated processing time concerning the request if the estimated processing time exceeds a predetermined time. An excess response sending unit sends an excess response including the excess information. A processing result obtaining unit obtains a processing result of the processing specified by the request. A result response sending unit sends a result response including the processing result in response to a request for the processing result. |
| US09565234B1 |
Content request identification via a computer network
Systems and methods of providing information via a computer network are provided. A data processing system can obtain, via the computer network, a query including an interest identifier provided to a content publisher computing device by an end user computing device during a communication session between the content publisher computing device and the end user computing device via the computer network. The data processing system can identify an affirmative request for content based on the interest identifier, and can select a content item responsive to the affirmative request for content, the content item having subject matter satisfying the query. The data processing system can provide, via the computer network, the content item for display by at least one of the end user computing device and a third party computing device. |
| US09565231B1 |
System and methods for providing multiple voice over IP service modes to a wireless device in a wireless network
Systems and methods are described for providing multiple voice service modes to a wireless device using data packet transmission through a wireless network. Application requirements including a signal level threshold for a wireless device may be determined. Signal level information for the wireless device may be received and transmitted among various network nodes. The received signal level may be compared with the signal level threshold for the wireless device. The wireless device and the access node may communicate wirelessly to provide voice services to the wireless device application. Data transmission may be converted between a first mode and a second mode depending upon a relative position of the received signal level with respect to the signal level threshold. The second mode of data transmission may be used where the first mode of data transmission cannot because the second mode may consume less network resources. |
| US09565229B2 |
Systems and methods for transmitting data
A server receives an update image for transmission to a client and encodes and compresses the update image data using a progressive encoding scheme. In one embodiment, the image data is encoded using progressive JPEG encoding and then into a base64 text string. When insufficient network bandwidth is available to transmit all of the image data for the update image, the server transmits only a first portion of the encoded image data, which is sufficient to fully reproduce the original update image but at a lower quality. When more network bandwidth becomes available, an additional portion of the encoded image data is transmitted to the client. The client is able to append the additional portion to the first portion to refine the image represented at the client. This mechanism may be implemented using unmodified web browsers and servers to remote a computer graphical user interface display. |
| US09565220B2 |
Systems and methods for preventing fraud in an internet protocol telephony system
Systems and methods for preventing fraud in an IP based telephony system include noting when an IP based telephony device sent to a new customer is not installed and registered with the system. If a new customer never attempts to register a device which was sent to the new customer, the system will assume that the new customer submitted false or erroneous address information. A new customer is prevented from taking any actions that would result in new charges until the new customer has registered an IP device sent to the new customer. Likewise, the system will act to prevent a phone verification service from reaching a new customer at his newly assigned telephone number until after the new customer has registered an IP based telephony device sent to the new customer. |
| US09565219B1 |
Methods and apparatus for automatically adding a media component to an established multimedia collaboration session
A multimedia collaboration system that facilitates more efficient, free-flowing collaboration sessions. In order to make addition of new participants, media components, and or network access device to a collaboration session more efficient, client devices associated with each participant can store endpoint address information that can be automatically obtained by the multimedia collaboration system. The endpoint address information can then be used to add the new participants, media components, and or network access device. |
| US09565215B2 |
Policy enforcement by end user review
Embodiments are disclosed that relate to enforcement of user policies in a multi-user interactive computing environment by end user review. For example, one disclosed embodiment provides, on a computing device, a method comprising receiving a notification of a current policy controversy, and sending information regarding the current policy controversy to each end user reviewer of a plurality of end user reviewers, each end user reviewer being a member of an enforcement federation of a plurality of enforcement federations. The method further comprises receiving enforcement decisions from one or more responding end user reviewers of the plurality of end user reviewers, and if the enforcement decisions received meet an enforcement threshold, then automatically enforcing a policy rule. |
| US09565214B2 |
Real-time module protection
Technologies for securing an electronic device include trapping an attempt to access a secured system resource of the electronic device, determining a module associated with the attempt, determining a subsection of the module associated with the attempt, the subsection including a memory location associated with the attempt, accessing a security rule to determine whether to allow the attempted access based on the determination of the module and the determination of the subsection, and handling the attempt based on the security rule. The module includes a plurality of distinct subsections. |
| US09565213B2 |
Methods and systems for protecting a secured network
Methods and systems for protecting a secured network are presented. For example, one or more packet security gateways may be associated with a security policy management server. At each packet security gateway, a dynamic security policy may be received from the security policy management server, packets associated with a network protected by the packet security gateway may be received, and at least one of multiple packet transformation functions specified by the dynamic security policy may be performed on the packets. |
| US09565210B2 |
Appliance for processing a session in network communications
A session of network communications is processed between a client terminal and a server by intercepting a request generated from a network transport unit of the client terminal, generating an intermediate session ID for the client terminal, asking the server to establish a session, receiving a response sent from the server using a server session ID after the session is established, associating the server session ID with the intermediate session ID and sending the response to the network transport unit using the intermediate session ID. |
| US09565209B1 |
Detecting electronic messaging threats by using metric trees and similarity hashes
Each node of a metric tree comprises a similarity hash of a member of a dataset of known message threats, calculated using a given similarity hashing algorithm. The nodes are organized into the tree, positioned such that the differences between the similarity hashes are represented as distances between the nodes. Messages are received and tested to determine whether they are malicious. When a message is received, a similarity hash of the message is calculated using the same similarity hashing algorithm that is used to calculate the hashes of the members of the dataset. The tree is searched for a hash of a known message threat that is within a threshold of distance to the hash of the received message. Searching the tree can take the form of traversal from the root node, to determine whether the tree contains a node within the similarity threshold. |
| US09565205B1 |
Detecting fraudulent activity from compromised devices
A technique for detecting fraudulent activity in a compromised device involves downloading a software application from a processor that controls access to a resource to an electronic device requesting access to the resource. The software application includes instructions that gather selected information from the electronic device such as mouse coordinates and active windows at a selected time and transmitting the information to the processor for analysis. The analysis includes determining whether more than a single input operation is occurring simultaneously. Simultaneous input operations are an improbable combination of processes for a single electronic device, and suggest a potential fraudulent activity. The technique may include sending a message to a security location for further analysis of the potential fraudulent activity, or the user may be contacted while the transaction attempt is delayed, or the attempted transaction operation may be terminated until enhanced security procedures are implemented. |
| US09565203B2 |
Systems and methods for detection of anomalous network behavior
There is provided a computer implemented method for detecting anomalous behavior in a network, comprising: receiving data representing at least one network activity, each network activity representing a certain data access event involving certain network entities; extracting from the data the certain network entities involved in the respective network activity; retrieving at least one relevant diversity value from a network behavior model based on the extracted certain network entities, wherein the network behavior model includes at least one diversity value, wherein each respective diversity value represents a certain relationship between at least one network entity and at least one network entity type; calculating an abnormality score for the received network activity based on the retrieved relevant diversity values; and classifying the network activity as anomalous or normal based on the calculated abnormality score. |
| US09565198B2 |
Tenant based signature validation
Methods and systems are provided for validating a signature in a multi-tenant environment. A server or other computing device that is part of a distributed network may request a certificate collection from an identified tenant store. The requested certificate collection may be loaded in a virtual store that is accessible by the server or other computing device. The sever or other computing device may then access one or more certificates from the virtual store to validate a signature. |
| US09565197B1 |
Secure verification of website claims
The disclosed embodiments provide a system that facilitates use of a website. During operation, the system enrolls a claim containing an assertion of a characteristic of the website with a central authority. To enroll the claim, the system obtains the claim from an issuer of the claim and includes a first secure attribute with the claim, wherein the first secure attribute is signed with a first private key of the central authority. Next, the system enables verification of the claim using the first secure attribute and a first public key of the central authority. |
| US09565196B1 |
Trust level modifier
A computer establishes normal activity levels of a factor associated with an application, system, network, or computing environment. The computer receives rules prescribing the trust levels assigned to users or devices during normal and abnormal activity levels exhibited by the factor. The computer monitors the activity level exhibited by the factor and determines whether the activity is normal or abnormal. If the computer determines that the factor is exhibiting abnormal activity, the computer modifies the trust level of associated users and devices according to the rules. The computer continues to monitor the activity of the factor until the computer determines that normal activity levels of the factor have returned, at which point the computer modifies the trust level of associated users or devices according to the rules. |
| US09565194B2 |
Utilizing a social graph for network access and admission control
Technologies for providing access control for a network are disclosed. The method may include receiving a request from a user to access a network, receiving a plurality of data associated with the user, the plurality of data comprising a plurality of social data associated with the user's relationship to a social circle, identifying an electronic security policy based at least on the plurality of social data, and authenticating the user to the network if the electronic security policy permits authentication based at least on the plurality of social data. |
| US09565190B1 |
Domain join and managed directory support for virtual computing environments
A virtual computing environment service may receive a request from a customer to provision a virtual computing environment and join the virtual computing environment to a managed directory. The virtual computing environment service may provision the virtual computing environment and uses a set of administrator credentials from the customer and a set of credentials corresponding to the environment to access the managed directory and request joining of the environment to the managed directory. In response, the managed directory may create a computer account corresponding to the environment and which enables the environment to be used to access the managed directory. The virtual computing environment service may then enable the customer to specify one or more users that may utilize the virtual computing environment to access the managed directory. |
| US09565188B2 |
System and method for digitally signing documents from a mobile device
A system and method for embedding a written signature into a secure electronic document is disclosed. In certain embodiments, a user views the electronic document on a first computing device and creates an electronic digital signature on a mobile computing device. The user is securely certified by a system created alphanumeric code and the identification of the mobile device. The signature is then embedded into the electronic document and stored securely on a central server. |
| US09565187B2 |
Systems and methods for mutual authentication of electronic devices
Embodiments are provided for mutually authenticating a pair of electronic devices. According to certain aspects, the electronic devices may connect to each other via an out-of-band communication channel. The electronic devices may each output audio signals and detect audio signals output by the other electronic devices. Based on timestamps associated with audio output and detection events, each of the electronic devices may calculate relevant time and distance parameters, and transmit the calculated parameters to the other electronic device via the out-of-band communication channel. The electronic devices may compare the calculated parameters to determine mutual authentication. |
| US09565185B2 |
Facilitation of seamless security data transfer for wireless network devices
Configuration and credential data associated with a wireless network can be stored by the wireless network or a by a gateway device associated with the wireless network. The configuration and credential data can be accessed via a user profile and pushed to unauthenticated wireless devices to authenticate the unauthenticated wireless devices for the wireless network. The configuration and credential data can be backed up via a manual, automatic, or semi-automatic back-up process. |
| US09565182B2 |
Managing access to an on-demand service
Provided are mechanisms and methods for managing a risk of access to an on-demand service as a condition of permitting access to the on-demand service. These mechanisms and methods for providing such management can enable embodiments to help prohibit an unauthorized user from accessing an account of an authorized user when the authorized user inadvertently loses login information. The ability of embodiments to provide such management may lead to an improved security feature for accessing on-demand services. |
| US09565176B2 |
Multiscreen secure content access
Methods and systems for securely accessing content irrespective of the security of the environment in which the content is being accessed are described herein. In some embodiments, a mobile computing device may determine whether secure enterprise content is being accessed on a mobile computing device. In response to determining that a private user device (e.g., virtual reality or augmented reality headwear/eyewear), is communicatively coupled to the mobile computing device, the mobile computing device may prevent the secure content from display on the mobile computing device and instead generate the secure enterprise content for presentation in an unencrypted form on the private user device. |
| US09565175B1 |
Sharing document information
The disclosure of the present document can be embodied in a non-transitory computer-readable medium storing instructions that cause one or more processors to perform various operations, including, receiving, from a first client device associated with a user account of a first user, a request for sharing a document. The document is associated with a credential of the first user, and the credential is associated with the user account of the first user. The operations include transmitting, in response to the request, a code associated with the document, and receiving, from a second client device, a request to access the document. The request to access the document includes the code associated with the document. The operations include determining, based on the request to access the document, that the second client device is authorized to access the document, and communicating, to the second client device, a message including information about the document. |
| US09565174B2 |
Information processing server system, control method, and program
An information processing server system in which agreement to terms of service by a user is confirmed using a second authentication session different from a first authentication session used when a client uses the web service is provided. |
| US09565167B2 |
Load balancing internet protocol security tunnels
A load balancer is provided that can direct Internet Protocol Security (IPsec) traffic received from a single IPsec tunnel initiator to one of a plurality of endpoints provided Virtual Private Network (VPN) gateways in a network. The load balancer uses IP (Internet Protocol) addresses and SPIs (Security Parameter Identifier) to identify an endpoint responsible for processing particular packets for the VPN. Messages received at the load balancer from the endpoints are utilized to map endpoints responsible for processing packets having a particular IP address and SPI for forwarding IPsec traffic to the correct endpoint. |
| US09565165B2 |
System and method for controlling virtual private network access
Provided are a system and method for controlling virtual private network (VPN) access. The system includes a first VPN gateway, a second VPN gateway, a wireless local area network (WLAN) access control server configured to detect a corporate intranet connection of a wireless communication terminal connecting to a corporate intranet via the first VPN gateway, and a VPN setting change server configured to receive a request to change a VPN setting of the wireless communication terminal from the WLAN access control server and control the wireless communication terminal to change the VPN gateway currently in connection with the wireless communication terminal to the second VPN gateway in accordance with the VPN setting change request. |
| US09565160B2 |
Advertisement of adjacency segment identifiers
Various techniques can be used to advertise adjacency segment identifiers (IDs) within a segment routing (SR) network. For example, a method, performed by a first node, can involve identifying an adjacency segment between a first node and a second node; assigning an identifier to the adjacency segment; and sending an Intermediate-System-to-Intermediate-System (IS-IS) hello (IIH) message to another node. The adjacency advertisement includes the identifier. If the adjacency segment is part of a LAN, the IIH message can be sent to a designated node that aggregates adjacency segment ID advertisements for the other nodes on the LAN. |
| US09565154B1 |
Message management method
A method for managing computer based messaging involves monitoring messages collectively making up a communication history; identifying related messages within the communication history; automatically analyzing the related messages, using natural language analytics, based upon: (i) subject, (ii) sentiment, (iii) context, and (iv) frequency of transmittals, wherein the analyzing comprises assigning at least: a first value based upon sentiment, a second value based upon content, and a third value based upon frequency; calculating a trend score as a function of the first value, second value and third value; comparing the trend score to a threshold value; and automatically generating and issuing at least one of: (i) a summary of the related messages, or (ii) a timing based notification message, when the trend score reflects a change over time corresponding to at least: an increasing or decreasing trend, an inflection point, a variation outside a tolerance amount, a sine or cosine pattern. |
| US09565152B2 |
Cable reader labeling
Various systems and methods are provided that allow reviewers to properly and timely label communications and easily view such communications. Certain systems and methods organize one or more communications in a tile layout so that reviewers can properly and timely label communications. A reviewer can hover over any of the communications to view more details regarding the communication and/or label the communication. For example, while the cursor is placed over the displayed communication, the reviewer can provide a command, such as a key command. Once the command is provided, the displayed communication is labeled with a label associated with the command. |
| US09565150B2 |
Method, system, and computer readable storage device for managing message delivery based on context of a recipient and message content
Message delivery is controlled based on the context of the recipient and the content of the message. A message is received from a sender device, the message containing dynamic content. Contextual requirement data is received from the sender device indicating a dynamic contextual requirement to be met for the message to be made available to a user of a recipient device. Context data is received, indicating a context of the user of the recipient device. The dynamic content and the dynamic contextual requirement are modifiable, depending on the context data. The context data is evaluated to determine whether the dynamic contextual requirement is met. Responsive to the dynamic contextual requirement being met, the message is made available to the user of the recipient device. |
| US09565149B2 |
Media messaging methods, systems, and devices
A wireless communications system that allows a mobile phone, tablet or personal computer user the ability to initiate the sending of a text message or email whereby the sender is able to include photographs, graphs, pie charts and the like within the flow of the actual word by word texting or email writing process, without depending on the traditional necessary step to “attach” the photograph. |
| US09565148B2 |
Method and apparatus for processing micro web log messages
Embodiments of the present invention disclose a method and an apparatus for processing micro web log messages in a micro web log system, where a unified rich media control is configured in each client side in the micro web log system, and the rich media control is obtained by encapsulating rich media information processing logics according to an operation type and a media type of rich media information. The method includes: receiving, by the client side in the micro web log system, an operation request for processing rich media information in a micro web log message; and invoking, by the client side in the micro web log system, a corresponding rich media control according to the operation type and the media type of the requested rich media information, and running the control to process the rich media information properly. |
| US09565147B2 |
System and methods for multiple email services having a common domain
Systems and methods provide an ability to split multiple email addresses having the same email domain across a plurality of email service providers. A first email server receives a forwarded email message from a second email server, the forwarded email message including an original domain and an intermediary domain, the intermediary domain added by the second email server. The first email server removes the intermediary domain from the recipient address and delivers the email message to a corresponding email account that is serviced by the first email server. |
| US09565142B2 |
Instant messaging system and method
Embodiments of the present disclosure provide an IM system and method. The method includes: receiving and storing a request message from a browser device, which comprises a browser device ID and a media information ID, configuring a request message ID for the request message, recording a first corresponding relationship between the browser device ID, the media information ID and the request message ID; receiving a request message request from a media information pushing device, finding the request message according to the media information ID in the request message request, sending the request message to the media information pushing device; receiving and storing a feedback message obtained by the media information pushing device according to the request message, recording a second corresponding relationship between a feedback message ID and the request message ID; receiving a feedback message request from the browser device, finding the feedback message according to the browser device ID and sending the feedback message to the browser device. |
| US09565140B2 |
HARQ memory space management for LTE carrier aggregation
A user equipment (UE) receives and decodes a first erroneous transport block (TB) from a base station in a mobile communication network. The UE allocates a first soft buffer having a first buffer size. The first soft buffer is associated with a first HARQ process for storing the first TB. The UE then receives and decodes a second erroneous TB from the base station. The UE allocates a second soft buffer having a second buffer size. The second soft buffer is associated with a second HARQ process for storing the second TB. The UE releases a portion of the first soft buffer to be allocated as part of the second soft buffer. The dynamic buffer allocation method reduces mismatch between rate matching and soft buffer storing when the total number of HARQ processes is small. In addition, more HARQ processes can be supported when the corresponding TB size is small. |
| US09565139B2 |
Remote latency adjustment
A method and system may allow for adjusting network latency experienced by a user. A first computing device may send a request to adjust the latency experienced by a terminal associated with a user. The request may be received at a second computing device which may identify a buffer size for the terminal associated with the user. A new buffer size may be determined and adjusted for the identified buffer based on the received request. |
| US09565137B2 |
Cut-through forwarding module and a method of receiving and transmitting data frames in a cut-through forwarding mode
The disclosure relates to cut-through forwarding module, an integrated circuit, a semiconductor device and a method of receiving and transmitting data frames in a cut-through forwarding mode. The cut-through forwarding module processes received data frames in data blocks. The module comprises a pre-loading unit for storing a first data block of a received data frame. The stored first data block may be pre-loaded by the pre-loading unit in a transmitter unit before a receiver unit receives a subsequent data frame. The processing unit controls the transfer of a first data block to the pre-loading unit and controls the use of a pre-loaded data block as a first data block of a data frame to be transmitted. |
| US09565136B2 |
Multicast replication engine of a network ASIC and methods thereof
A multicast replication engine includes a circuit implemented on a network chip to replicate packets, mirror packets and perform link switchovers. The multicast replication engine determines whether a switchover feature is enabled. If the switchover feature is not enabled, then the multicast replication engine mirrors the packet according to a mirror bit mask and to a mirror destination linked list. The mirror destination linked list corresponds to a mirroring rule. If the switchover feature is enabled, then the multicast replication engine replicates the packet according to a first live link of a failover linked list. The failover linked list corresponds to a switchover rule. The mirroring rule and the switchover rule are stored in the same table. Copies of the packet are forwarded according to a multicast rule that is represented by a hierarchical linked list with N tiers. |
| US09565135B2 |
System and method for service chaining with tunnel chains in software defined network
An embodiment method of service chaining in a software defined network (SDN) having SDN switches includes receiving a service chain requirement having a plurality of services. Respective tunnels are then defined for the plurality of services. The method then configures the SDN switches to establish the respective tunnels and form a tunnel chain. |
| US09565134B2 |
Long term evolution femtocell based content service system, and driving method thereof
Provided is a long term evolution (LTE) femtocell based content service system and a driving method thereof, which include user equipment (UE) connected to an evolved packet core (EPC) network that is a core network through routes, that is, a radio network subsystem (RNS) and a home eNode subsystem (HeNS) having a femtocell and a content service server connected to the EPC network and configured to receive system information including PCI, U_DL BW, Cell ID, TAC, HeNB Name and SNR, and query data from the user equipment (UE), retrieve corresponding content with reference to the received system information and query data, and provide the corresponding content to the user equipment (UE). |
| US09565128B2 |
Method for managing services in a generalized-multi-protocol label switching, GMPLS, controlled network
A Generalized-Multi-Protocol Label Switching controlled network is described, as is a method for managing services in the network under conditions of disrupted control plane connectivity. Nodes of the network use a Resource Reservation Protocol with Traffic Engineering extension, RSVP-TE, to allocate and provision resources of the network. Each of the nodes is adapted to evaluate local RSVP Path or Resv state data after having sent at least one signaling message to a receiving neighboring node without receipt of an acknowledgement message from said receiving node within a configurable time to determine an IP address of a node being located after the non-responsive receiving node along a service path of a service in a downstream or upstream direction. Each node is adapted to send the signaling message to the determined IP address of the next node located behind the non-responsive receiving node along the service path. |
| US09565127B2 |
Admission control in a network environment
An admission control resource tracks identities of multiple clients in a network environment that share use of a network resource to retrieve content at the same or different adaptive bit rates. The admission control resource further monitors status information indicating an ability of each of the multiple clients to retrieve content at the same or different adaptive bit rates over the shared network resource. Based at least in part on the status information, the admission control resource controls use of the shared network resource by new clients. In other words, as its name suggests, the admission control resource as discussed herein selectively limits how many subscribers are able to use a shared network resource depending on feedback from one or more clients that currently use the shared network resource to retrieve the content at the same or different adaptive bit rates. |
| US09565120B2 |
Method and system for performing distributed deep-packet inspection
A method for deep-packet inspection of packets flowing through an end unit in a point-to-multipoint network. The method comprises classifying packet flows through the end unit using their flow-identification (ID) to determine which of the packet flows should be deep-packet inspected, wherein the packet flows include incoming packets received from a central unit and outgoing packets sent to the central unit of the point-to-multipoint network; duplicating packets determined to be deep-packet inspected; saving all duplicated packets in a memory; upon collection of a predefined number of duplicated packets belonging to a certain flow-ID, performing deep-packet processing based on at least one deep-packet inspection application; and saving the deep-packet processing results in the memory. |
| US09565119B2 |
Packet analysis method, packet analysis device, and storage medium
A packet analysis method includes acquiring a first acknowledge packet and a second acknowledge packet transmitted from the first device; acquiring a plurality of packets transmitted from the second device during a period from reception of the first acknowledge packet to reception of the second acknowledge packet; identifying a number of packets corresponds to data transmitted from the second device, by calculating a difference between a first identification number corresponding to the first acknowledge packet and a second identification number corresponding to the second acknowledge packet; calculating a plurality of bandwidth values, a number of the plurality of bandwidth values is identical to the number of packets, based on acquisition timings of the plurality of packets and an interval between the acquisition timings of two adjacent packets; and determining a bandwidth value that is to be removed from the plurality of bandwidth values by comparing the plurality of bandwidth values. |
| US09565114B1 |
Weighted load balancing using scaled parallel hashing
A method for weighted data traffic routing can include receiving a data packet at data switch, where the data switch includes a plurality of egress ports. The method can also include, for each of the egress ports, generating an independent hash value based on one or more fields of the data packet and generating a weighted hash value by scaling the hash value using a scaling factor. The scaling factor can be based on at least two traffic routing weights of a plurality of respective traffic routing weights associated with the plurality of egress ports. The method can further include selecting an egress port of the plurality of egress ports based on the weighted hash value for each of the egress ports and transmitting the data packet using the selected egress port. |
| US09565113B2 |
Adaptive link aggregation and virtual link aggregation
One embodiment of the present invention provides a switch. The switch comprises a plurality of ports, a link management module, a forwarding module, and a link adaptation module. The link management module operates at least two ports of the plurality of ports of the switch to form a link aggregation. This link aggregation operates as a single logical channel. The forwarding module determines an egress port for a packet among the ports participating in the link aggregation based on a distribution policy. The link adaptation module detects an imbalance of the respective link utilizations among links of the link aggregation based on one or more imbalance criteria, and applies one or more corrective actions to the distribution policy. |
| US09565112B2 |
Load balancing in a link aggregation
A system for load balancing allocation of flows to egress links in a link aggregation is provided. The system includes an input port to receive a packet corresponding to a flow, a plurality of egress ports, a frame distributor coupled to the egress ports, a processor, and a memory coupled to the processor and configured to store bandwidth requirements of the flow. The system also includes a packet parsing unit configured to receive the packet from the input port, receive a first signal from the processor that programs an association of the flow the packet belongs to with an egress port based on bandwidth requirements of the flow stored in the memory, and send a second signal to the frame distributor to direct the packet to the egress port based on the association of the flow with the corresponding egress port. |
| US09565109B2 |
Method and system for triggering augmented data collection on a network based on traffic patterns
A method and system for increasing the collection of network traffic data in a network based on the occurrence of predetermined criteria. A network appliance manages network traffic in the network and passes data traffic on the network. Network traffic data is collected based on the data traffic passing through the network appliance at a normal level. It is determined whether the network traffic data indicates an abnormal condition. The collection of network traffic data is increased through the network traffic appliance when an abnormal condition is detected. The network traffic data from the increased collection is stored in a memory device. |
| US09565107B2 |
Packet relay system, packet relay method, and packet relay device
A packet relay system includes a first packet relay device and a second packet relay device. One of the first packet relay device and the second packet relay device relays a packet based on a first priority level of the first packet relay device and on a second priority level of the second packet relay device, the first priority level is higher than the second priority level, when the first packet relay device recovers from an error state, the first packet relay device transmits a first notification, the first notification notifies the second packet relay device of the first priority level, based on the first notification, the second packet relay device changes the second priority level to a third priority level that is higher than the first priority level, and the second packet relay device changes the third priority level to the second priority level after receiving path information. |
| US09565104B2 |
Switch controller
According to an example, a switch controller is connected to a computer hosting a virtual machine (VM) and a virtual switch to provide packet forwarding for the VM. The switch controller restricts packet forwarding actions on the ports according to the assigned primary VLAN, the assigned secondary VLAN, and the assigned VDS to the ports and the stored rules. |
| US09565102B2 |
Method and apparatus for determining energy efficient route
This application provide a method for determining an energy-efficient route, and relate to the communications field. The method includes: acquiring a topology structure, a starting node, a target node, and traffic data of a network, where the traffic data includes a record of traffic among all nodes on the network; and calculating, according to the topology structure and the traffic data of the network by using an integer linear programming algorithm, an energy-efficient route between the starting node and the target node and reserved bandwidth corresponding to the energy-efficient route. |
| US09565097B2 |
Application based packet forwarding
Methods, systems, and apparatus, including computer program products, featuring receiving at a network device a plurality of packets associated with a flow, one or more of the plurality of packets having associated header data and content. Based on the content of one or more first packets in the plurality of packets, the network device identifies an application associated with the flow, where none of the first packets is addressed to the network device. For one or more second packets associated with the flow, the network device determines a forwarding destination for the second packets based on the application associated with the flow and forwards the packet according to the determined forwarding destination. |
| US09565096B1 |
Traffic distribution over multiple paths in a network
System and methods for efficiently distributing data packets in a multi-path network having a plurality of equal cost paths each having the same number of hops are provided. In one aspect, a system and method includes reordering the entries in the routing table of one or more peer routing devices, such that succeeding equal cost next hop routing devices that are interconnected in a Clos formation to the peer routing devices received unbiased traffic from each of the peer routing devices, thus enabling the succeeding next hop routing devices to distribute data traffic evenly over additional equal cost multiple hops further into the network. |
| US09565095B2 |
Take-over of network frame handling in a computing environment
A first component of a computing environment receives, from a physical network adapter of the computing environment, a request that the first component take over processing of network frames directed to network frame address(es) associated with a second component of the computing environment. The first component register the network frame address(es) for processing of network frames directed to the network frame address(es). Based on the first component receiving from the physical network adapter a network frame directed to a network frame address of the network frame address(es) associated with the second component, the first component processes the received network frame, in which the network frame is provided to the second component via an inter-component link between the first component and the second component. |
| US09565094B2 |
I/O routing in a multidimensional torus network
A method, system and computer program product are disclosed for routing data packet in a computing system comprising a multidimensional torus compute node network including a multitude of compute nodes, and an I/O node network including a plurality of I/O nodes. In one embodiment, the method comprises assigning to each of the data packets a destination address identifying one of the compute nodes; providing each of the data packets with a toio value; routing the data packets through the compute node network to the destination addresses of the data packets; and when each of the data packets reaches the destination address assigned to said each data packet, routing said each data packet to one of the I/O nodes if the toio value of said each data packet is a specified value. In one embodiment, each of the data packets is also provided with an ioreturn value used to route the data packets through the compute node network. |
| US09565092B2 |
Enterprise service bus deployment at the level of individual services
A method and system for automatic ESB deployment at the level of individual services is described. In one method, a load balancer repeatedly monitors performance of individual services installed on ESB nodes. The performance is measured in view of utilization metrics of the individual services. The load balancer periodically determines whether the performance of one or more of the individual services falls below a performance threshold and deploys duplicate services for the one or more of the individual services that falls below the performance threshold at one or more additional ESB nodes without user intervention in response to the periodically determining. |
| US09565088B2 |
Managing bandwidth utilization in different modes by monitoring network metrics and adjusting a current network data rate
Systems and methods for bandwidth allocation and estimation are disclosed. A computer communicates via multiple active streams, each having a type. The computer determines whether to enable or disable bandwidth management. Upon determining to enable bandwidth management, the computer estimating a total available bandwidth, determines, for each stream, a requested bandwidth, and dynamically allocates a portion of the total available bandwidth among the active streams. Upon determining to disable bandwidth management, the computer foregoes dynamically allocating bandwidth among the streams. |
| US09565082B2 |
Continuous autonomous monitoring of systems along a path
In an embodiment, a method comprises initiating a monitoring session for a communication path including creating and storing monitoring session state data; sending, to a first responder computer of the communication path, a first request to initiate a first state servlet that is configured to monitor continuously during the monitoring session one or more characteristics of one or more processes that the first responder computer may perform; sending, to the first responder computer, monitoring instructions to monitor the one or more characteristics of the one or more processes; while the monitoring session is active and the first responder computer is in the communication path, receiving and collecting monitored information from the first responder computer; in response to determining that the first responder computer is not in the communication path or that the monitoring session has become inactive, automatically and autonomously ending the monitoring session. |
| US09565078B1 |
Recommended content traffic exchange
A traffic exchange service may be configured to allow online content providers to exchange traffic via content recommendations from the service. The traffic exchange service may recommend content from one content provider in conjunction with content from another provider. The traffic exchange service may also operate to balance the amount of traffic to and from each content provider. |
| US09565073B2 |
Methods, systems, and computer program products for distributed packet traffic performance analysis in a communication network
Network packet traffic in a Long Term Evolution (LTE) network is analyzed by associating a micro network access agent with a single network element in the LTE network and performing packet traffic analysis for packet traffic processed by the single network element using the micro network access agent. |
| US09565065B2 |
Methods for limiting number of routers in a mesh network
In some cases, it may be desirable to limit the number of routers in a mesh network. Various techniques to limit the number of routers, without affecting connectivity, are disclosed. In some embodiments, a node enables its router capability if there are less than a predetermined number of routers already in the network. In other embodiments, a node enables its routing capability only is it is necessary to resolve a connectivity issue or a biconnectivity issue. In some cases, a node, which previously enabled its router capability, may no longer be required to be a router. In some embodiments, this node, upon making this determination, disables its routing capability. |
| US09565062B2 |
Resource deployment management
A system and method for deploying resources to users. A system includes a computer that executes a resource deployment manager. The resource deployment manager provides an interface for selecting a remote user to whom a central resource is to be assigned, and for selecting a template upon which to base the assignment of the resource to the selected user. Further, the resource deployment manager assigns the central resources to the selected user based on the selected template. |
| US09565060B2 |
Managing a network connection for use by a plurality of application program processes
A method, system, and/or computer program product manages a network connection for use by a plurality of application program processes. A set of application program processes, which utilize a network connection, are categorized into a plurality of categories. An optimum network connection parameter value is identified for each category of application program processes. A network connection is established for use by the set of application program processes. A usage of the network connection is determined by each of the application program processes. A network connection parameter is set for the network connection dependent on a respective usage and optimum network connection parameters of the application program processes. |
| US09565056B2 |
Packet tunnel management systems and methods
An Ethernet packet switch configured to manage one or more packet tunnels includes one or more ports; forwarding circuitry communicatively coupled to the one or more ports; and processing circuitry communicatively coupled to the forwarding circuitry, wherein the one or more packet tunnels are configured over the one or more ports, wherein each of the one or more packet tunnels has an associated maintenance endpoint (MEP), and wherein the processing circuitry is configured to manage the one or more packet tunnels based on performance characteristics determined through one or more of the associated MEP, intermediate switches, and a Network Management System. |
| US09565055B2 |
Protection against the effect of equipment failure in a communication system
A data communications system has a plurality of nodes connected by a plurality of links. A subset of the links and nodes forms a worker path for carrying worker data through the communications system, and a further subset of links and nodes provides a protection path for carrying other data in the absence of a fault in the worker path and for providing an alternative path for the worker data in the event of a fault in the worker path. The alternative path is predetermined prior to the detection of a fault in the worker path. |
| US09565050B1 |
Fibre channel peer zoning
Techniques are provided for the creation of a peer zone definition for use in a Fiber Channel (FC) Fabric. The peer zone definition defines a peer zone in which two or more initiator host devices are each permitted to communicate with a target device, but the two or more initiator host devices are prevented from communicating with each other. In accordance with one example, a target device and of two or more initiator host devices connected to the FC Fabric are received. A peer zone definition is created, and the peer zone definition is transmitted to the switches composing the FC Fabric for enforcement. |
| US09565047B2 |
Filterbank-based multicarrier transmitter for transmitting a multicarrier signal
A filterbank-based multicarrier transmitter for transmitting a multicarrier signal is disclosed, the multicarrier signal comprising a synchronization part and a payload part, the synchronization part comprising K1 frequency sub-channels being arranged to form M subsequent multicarrier symbols, the payload part comprising K2 frequency sub-channels, the filterbank-based multicarrier transmitter comprising a processor being configured to assign subsequent pilot values of a pilot sequence to every Pth frequency sub-channel of the K1 frequency sub-channels to obtain a pilot symbol of the multicarrier signal, and to assign subsequent payload values of a payload sequence to subsequent frequency sub-channels of the K2 frequency sub-channels to obtain a payload symbol of the multicarrier signal, and wherein the processor is configured to assign subsequent groups of subsequent pilot values to every Qth symbol of the M multicarrier symbols. |
| US09565045B2 |
System and method for controlling combined radio signals
A method for controlling a combined waveform, representing a combination of at least two signals having orthogonal frequency multiplexed signal components, comprising: receiving information defining the at least two signals; transforming the information defining each signal to a representation having orthogonal frequency multiplexed signal components, such that at least one signal has at least two alternate representations of the same information, and combining the transformed information using the at least two alternate representations, in at least two different ways, to define respectively different combinations; analyzing the respectively different combinations with respect to at least one criterion; and outputting a respective combined waveform or information defining the waveform, representing a selected combination of the transformed information from each of the at least two signals selected based on the analysis. |
| US09565044B2 |
Transmitting apparatus, receiving apparatus, and control methods thereof
A transmitting apparatus, a receiving apparatus and methods of controlling these apparatuses are provided. The transmitting apparatus includes: an input processor configured to process a plurality of input streams to generate a plurality of base band frames; a bit interleaved and coded modulation (BICM) processor configured to perform forward error correction (FEC) coding, constellation mapping, and interleaving on the plurality of baseband frames; a symbol generator configured to add signaling data to the plurality of baseband frames output from the BICM processor to generate an orthogonal frequency division multiplexing (OFDM) symbol; and a transmitter configured to select at least one of a plurality of pilot patterns based on a fast Fourier transform (FFT) size and a guard interval fraction, insert a pilot in the OFDM symbol according to the selected pilot pattern, and transmit a stream including the pilot-inserted OFDM symbol. |
| US09565043B1 |
Hybrid I-Q polar transmitter with quadrature local oscillator (LO) phase correction
A hybrid polar I-Q transmitter comprises an I-Q quantization circuit configured to receive an in-phase signal and a quadrature signal forming a first I-Q data pair, and generate a quantized in-phase signal and a quantized quadrature signal forming a second I-Q data pair, respectively, based on a resolution information of a digital-to-analog converter (DAC). Each of the first and second I-Q data pairs corresponds to a point in an I-Q constellation diagram comprising an I axis and a Q axis that are orthogonal to one another. The transmitter further comprises a quantization reduction circuit configured to determine a first rotation angle and a second rotation angle of the I-axis and Q-axis, respectively, based on the first I-Q data pair and the second I-Q data pair, and use the determined first rotation angle and the second rotation angle for generating an RF output signal. |
| US09565041B2 |
Adaptive equalization using correlation of edge samples with data patterns
An integrated receiver supports adaptive receive equalization. An incoming bit stream is sampled using edge and data clock signals derived from a reference clock signal. A phase detector determines whether the edge and data clock signals are in phase with the incoming data, while some clock recovery circuitry adjusts the edge and data clock signals as required to match their phases to the incoming data. The receiver employs the edge and data samples used to recover the edge and data clock signals to note the locations of zero crossings for one or more selected data patterns. The pattern or patterns may be selected from among those apt to produce the greatest timing error. Equalization settings may then be adjusted to align the zero crossings of the selected data patterns with the recovered edge clock signal. |
| US09565038B2 |
Non-coherent multi-symbol-delay differential detector
An electronic receiver may generate a differential detection sequence based on a received symbol sequence and based on a m-symbol delayed version of the received symbol sequence, where m is an integer greater than 1. The particular differential detection sequence may be a result of an element-by-element multiplication of the particular received symbol sequence and the conjugate of an m-symbol delayed version of the particular received symbol sequence. The receiver may calculate differential decision metrics based on the differential detection sequence and based on a set of differential symbol sequences generated from the set of possible transmitted symbol sequences. The receiver may generate a decision as to which of a set of possible transmitted symbol sequences resulted in the received symbol sequence, where the decision is based on the differential decision metrics and the set of possible transmitted symbols sequences. |
| US09565037B1 |
Adaptive serdes receiver
One embodiment provides an apparatus. The apparatus includes a feedforward equalizer (FFE), an FFE data slicer and an FFE least mean square (LMS) module. The FFE data slicer is to threshold detect a sample of a received analog training signal, a result of the threshold detecting corresponding to an input signal digital decision. The FFE LMS module is to determine a plurality of FFE coefficients based, at least in part, on an output of the FFE data slicer and based, at least in part, on a mean square error corresponding to a difference between an equalized sample and a reference. |
| US09565036B2 |
Techniques for adjusting clock signals to compensate for noise
A first integrated circuit (IC) has an adjustable delay circuit and a first interface circuit. A first clock signal is provided to the adjustable delay circuit to produce a delayed clock signal provided to the first interface circuit. A second IC has a supply voltage sense circuit and a second interface circuit that transfers data with the first IC. The supply voltage sense circuit provides a noise signal to the first IC that is indicative of noise in a supply voltage of the second IC. The adjustable delay circuit adjusts a delay of the delayed clock signal based on the noise signal. In other embodiments, edge-colored clock signals reduce the effects of high frequency jitter in the transmission of data between integrated circuits (ICs) by making the high frequency jitter common between the ICs. In other embodiments, a supply voltage is used to generate clocks signals on multiple ICs. |
| US09565034B2 |
System and method for scalable inter-domain overlay networking
An example method is provided in one example embodiment and includes receiving first values associated with a host located in a first overlay domain; translating the first values to second values, the second values being local values in a second overlay domain; storing the second values and corresponding first values in a mapping table for the second overlay domain; and advertising the second values for the host in the second overlay domain. |
| US09565026B2 |
System and method for providing location based services using collaborative networks
A system and method is provided for providing location based services. The system includes at least one module configured to publish location information of a mobile user using a publish subscribe format based on a user preference mode of notification. |
| US09565021B1 |
Shape actuation encapsulant of a cryptographic module
To provide for a physical security mechanism that forms a complete envelope of protection around the cryptographic module to detect and respond to an unauthorized attempt at physical access, a tamper sensing encapsulant generally encapsulates the cryptographic module. The tamper sensing encapsulant includes a first shape actuation layer associated with an electrically conductive first trace element and a second shape actuation layer associated with an electrically conductive second trace element. The first shape actuation layer is positioned against the second shape actuation layer such that the first trace element and the second trace element do not physically touch at an operating temperature of the cryptographic module and do physically touch when the first shape actuation layer and the second shape actuation layer are thermally loaded. Upon first trace element and the second trace element touching, a circuit is formed that disables the cryptographic module. |
| US09565017B2 |
Method for efficiently protecting elliptic curve cryptography against simple power analysis attacks
A method and device for protecting elliptic curve cryptography against simple power attacks is disclosed. The method is based on a processor such as a computer equipped to encrypt and decrypt communications and selecting and entering a point P on an elliptic curve in the computer. The processor provides k copies of the point P (kP). The processor is used to divide a string of Ks into two equal length partitions that are scanned from right to left and performing point doubling operation and delay the point addition operation by storing the some doubled points in a buffer for later performing of addition operation. |
| US09565016B2 |
Protection of the execution of an algorithm against side-channel attacks
A protection mechanism for the execution of an encryption algorithm is disclosed. In the mechanism the encryption algorithm has its execution preceded by an update of a counter stored in a reprogrammable non-volatile memory. Storing the value of the counter into the memory corresponds with the execution of the algorithm. |
| US09565014B2 |
Initializing a descrambler
Embodiments herein describe techniques for synchronizing LFSRs located on two compute devices. To synchronize the LFSRs, a first one of the compute devices may transmit a first training block that includes a predefined bit sequence. The training block is scrambled by a transmitting (TX) LFSR on the first compute device and then transmitted to the second compute device. The second compute device performs an XOR operation to recover the outputs of the TX LFSR that were used to scramble the data. The second compute device can use the outputs of the TX LFSR to determine future outputs of the TX LFSR. These future outputs are then used to initialize a receiving (RX) LFSR on the second compute device. Now, when subsequent training blocks are received, the second compute device can use the initialized RX LFSR to descramble the scrambled training blocks. |
| US09565013B2 |
Controlling the state of duplexing of coupling facility structures
A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the duplexing of structures of the coupling facilities. Duplexing is performed on a structure basis, and thus, a coupling facility may include duplexed structures, as well as non-duplexed or simplexed structures. |
| US09565012B2 |
Systems and methods for selecting digital content channels using low noise block converters including digital channelizer switches
Systems and methods are provided for selecting data from intermediate frequency signals, corresponding to received signals (e.g., satellite signals) carrying modulated data, using digital channelizer switches. An example digital channelizer switch may comprise a plurality of high speed analog-to-digital converters configured to digitize the intermediate frequency signals; a plurality of digital channelizers configured to digitally tune data from the digitized intermediate frequency signals; a multiplexer configured to select one or more digitized intermediate frequency signal generated by the plurality of high speed analog-to-digital converters as inputs to the plurality of digital channelizers; and a high speed digital-to-analog converter configured to generate an analog output signal using digitally tuned data by the digital channelizer, from at least one digitized intermediate frequency signal. |
| US09565008B2 |
Method and device for efficient feedback in wireless communication system supporting multiple antennas
The present invention relates to a method for transmitting channel status information comprising: transmitting a rank indicator (RI) and a precoding type indicator (PTI) based on a first reporting period, transmitting during the first reporting period a broadband first precoding matrix indicator (PMI) based on a second reporting period, and transmitting at least once during the second reporting period a broadband second PMI and a broadband CQI, when the PTI has a first value; transmitting the RI and the PTI based on the first reporting period, transmitting during the first reporting period the broadband second PMI and the broadband CQI based on a third reporting period; and transmitting at least once during the third period a subband second PMI and a subband CQI, when the PTI has a second value; wherein the subband CQI on an entire cycle of a set bandwidth portion can be transmitted at least once. |
| US09565007B2 |
Method of receiving a point-to-multipoint service in a wireless communication system
The present invention relates to a wireless communication system and user equipment providing wireless communication services, and a method of transmitting and receiving data between a terminal and a base station in an evolved Universal Mobile Telecommunications System (UMTS) that has evolved from a Universal Mobile Telecommunications System (UMTS) or a Long Term Evolution (LTE) system, and more particularly, to a method of receiving a point-to-multipoint service data, and it may be an object of the present invention is to provide an improved method of receiving the point-to-multipoint service data in a wireless communication system in order to minimize a data loss by a reception entity. |
| US09565006B2 |
Method and apparatus for transmitting reception confirmation in wireless communication system
Provided are a method and an apparatus for transmitting acknowledgement/not-acknowledgement (ACK/NACK) in a wireless communication system. The method comprises: receiving at least two downlink subframes among a plurality of downlink subframes; and transmitting, from an uplink subframe, the ACK/NACKs of the at least two downlink subframes, wherein at least two semi-persistent scheduling (SPS) data channels can be assigned to the plurality of the downlink subframes. |
| US09565005B2 |
Method and apparatus for transmitting control information in radio communication system
A method for transmitting control information using PUCCH format 3 in a radio communication system includes detecting one or more Physical Downlink Control Channels (PDCCHs), receiving one or more Physical Downlink Shared Channel (PDSCH) signals corresponding to the one or more PDCCHs, and determining a PUCCH resource value nPUCCH(3,p) corresponding to a value of a transmit power control (TPC) field of a PDCCH for a PDSCH signal on a secondary cell (SCell) among a plurality of PUCCH resource values configured by a higher layer for the PUCCH format 3. If a single antenna port transmission mode is configured, the PUCCH resource value nPUCCH(3,p) indicated by the TPC field is mapped to one PUCCH resource for a single antenna port, and, if a multi-antenna port transmission mode is configured, the PUCCH resource value nPUCCH(3,p) indicated by the TPC field is mapped to a plurality of PUCCH resources for multiple antenna ports. |
| US09565001B2 |
Guard subcarrier placement in an OFDM symbol used for synchronization
Embodiments of the present disclosure provide a transmitter, a receiver and methods of operating a transmitter and a receiver. In one embodiment, the transmitter is for use with a base station in a cellular communication system and includes a partitioning unit configured to provide first and second groups of guard subcarriers that partition a synchronization portion from data portions in a downlink synchronization signal. The transmitter also includes a transmit unit configured to transmit the downlink synchronization signal. Additionally, the receiver is for use with user equipment in a cellular communication system and includes a receive unit configured to receive a downlink synchronization signal. The receiver also includes a processing unit configured to provide a synchronization portion based on employing first and second groups of guard subcarriers that partition the synchronization portion from data portions of the downlink synchronization signal. |
| US09565000B2 |
Method and apparatus for transmitting and receiving control information to randomize inter-cell interference in a mobile communication system
Methods and apparatuses are provided for transmitting and receiving information. A User Equipment (UE) identifies first information for a cyclic shift value, transmitted from a Node B. The UE identifies second information for the cyclic shift value, transmitted from the Node B. The UE obtains a sequence based on a Zadoff-Chu sequence and the cyclic shift value defined based on the first information and the second information. The UE transmits the sequence in a Single Carrier-Frequency Division Multiple Access (SC-FDMA) symbol to the Node B. The SC-FDMA symbol is predefined among a plurality of SC-FDMA symbols in a slot of a subframe. |
| US09564999B2 |
Space division multiple access for wireless LAN, and channel estimation for the same
Provided are space division multiple access for wireless local area network (WLAN), and channel estimation for the same. A frequency division multiple access technique and a space division multiple access technique based on competition are used together for channel access. The channel access method includes: a competition period for estimating channel characteristics for a plurality of stations and transmitting, to the plurality of stations, downlink schedule information or uplink schedule information based on the estimated channel characteristics; and a data transmission period for performing downlink transmission or uplink transmission with all or some of the plurality of stations in accordance with the downlink schedule information or the uplink schedule information. |
| US09564998B2 |
Terminal device, and buffer partitioning method
Provided is a terminal device with which deterioration in hybrid automatic repeat request (HARQ) retransmission performance can be inhibited by continuing a downlink (DL) HARQ process for DL data before and after changing the uplink link-DL configuration. In this device, a decoder (210) stores, in a retransmission buffer, DL data transmitted from a base station, and decodes the DL data, and a wireless transmitter (222) transmits a response signal generated using a DL-data-error detection result. A soft buffer is partitioned into a plurality of regions for each retransmission process on the basis of the highest values among retransmission process numbers respectively stated in a plurality of configuration patterns which can be set in the terminal (200). |
| US09564993B2 |
Method and apparatus for soft demapping in rotated quadrature amplitude modulation (QAM) based communication system
A method and apparatus to perform a soft demapping in a rotated quadrature amplitude modulation (QAM) based communication system is described. The method and the apparatus include pre-processing a symbol based on a priori information and performing a one-dimensional (1D) soft demapping on the pre-processed symbol, continuously. |
| US09564986B2 |
Latency reduction and range extension system for radio networks
A radio access network system is described that determines a signal metric associated with a user equipment or device. The user equipment device can implement an altered transmission policy. The altered transmission policy can alter a strength of transmissions by increasing power consumption per transmission, increasing a length of timer per transmission, and altering other parameters of transmissions. The altered transmission policy can also alter an error correction policy. The error correction policy can indicate that error correction transmissions are to be decreased. The altered transmission policy can be implemented until the signal metric changes to a more desirable level. |
| US09564984B1 |
Portable electronic device
A portable electronic device including a battery, a metal element, a control circuit and a plurality of impedance elements is provided. The battery is disposed in a carrier. The metal element receives a feeding signal through a feeding point to generate at least one radio-frequency signal. An orthogonal projection of the metal element on the carrier is overlapped with an orthogonal projection of the battery on the carrier. The control circuit is configured to control the battery so that a plurality of operation signals are transmitted between the battery and the control circuit. The plurality of impedance elements are electrically connected between the battery and the control circuit, and the plurality of impedance elements transmit the plurality of operation signals and block the at least one radio-frequency signal. |
| US09564975B2 |
Optical transmission device, method of optical transmission, and non-transitory computer-readable medium
An optical transmission device includes: a drive signal generate unit that generates a drive signal; a modulation unit that modulates an optical signal in accordance with the drive signal; a detect unit that detects a fluctuation of a signal component of the drive signal with respect to an optical signal output by the modulation unit; and a correct unit that corrects a parameter of the drive signal generate unit in accordance with a detect result of the detect unit so that a non-linear characteristic of the modulation unit gets closer to a linear characteristic. |
| US09564974B2 |
Optical transmission device
An optical transmission device for transmitting and receiving a multilevel-modulated optical signal includes a plurality of transmission frame processors for generating transmission frame signals accommodating a plurality of client signals that are each subjected to error correction processing and scrambling/descrambling processing, and a digital modulator/demodulator for mapping the transmission frame signals that are input to and output from the plurality of transmission frame processors to a multilevel signal. The digital modulator/demodulator performs digital modulation/demodulation, in which the plurality of transmission frame processors each have a function of shifting a phase of a pattern between a plurality of transmission frames to be mapped to a multilevel signal and to be digitally modulated/demodulated. |
| US09564971B2 |
Devices and methods for modular optical cabling systems
A modular optical cabling system converts and transmits digital electronic signals from a source such as a computer to any suitable target device such as a display or a projector through an optical backbone. A modular transmitting unit connects the source to a modular optical cable and converts the digital electrical signals to optical signals. A modular receiving unit receiver connects the modular optical cable to the target device and converts the optical signals to digital electrical signals. A directional modular optical cable connects between the transmitter unit and the receiver unit. |
| US09564968B2 |
Multiple-input method and apparatus of free-space optical communication
The present application is directed an optical gyroscope. The optical gyroscope includes a substrate including a first and a second waveguide disposed thereon. One or both of the waveguides may be doped with a rare-earth material. A crossing element is disposed between the first and the second waveguides to form a substantially orthogonal connection therebetween. The application is also directed to a system including an optical gyroscope. The application is further directed to a method of observing characteristics of the optical gyroscope. |
| US09564965B2 |
Signal monitoring apparatus, signal transmitting/receiving apparatus, and communication apparatus
A signal monitoring device, a signal transmission/reception device and a communication device, which realize easy acquisition of a diagnosis result and a signal value, and further realize fast acquisition of the diagnosis result. A signal monitoring device includes: a difference value calculator that time-sequentially calculates, for a signal to be monitored, a difference value between a signal value thereof and a previously set threshold; and a storage that updates and stores the time-sequentially calculated difference value in accordance with a previously set rule. |
| US09564964B2 |
Optical signal processing device, optical signal processing method and recording medium
An optimization unit in an optical receiver divides a symbol region out of a plurality of symbol regions into which signal points that specifies symbol information included in an optical signal are classified, into a plurality of division regions from the symbol center coordinate of the symbol region. Moreover, the optimization unit accumulates the signal points of the symbol information for every division region in the symbol region. Furthermore, based on the accumulated number of signal points for every division region, the optimization unit controls the average length of a phase estimation unit when the phase noise of the optical signal is calculated. |
| US09564962B2 |
Method and system for sending user information to a car
A telematics server manages meeting request messages sent from, and to, a vehicle-coupled device. The server performs authentication services when a subscriber logs in to the server from the vehicle-coupled device, or with a device associated with the subscriber's telematics services account. Upon login, the server may append a session identifier to the request message. After the message passes through the server, an application running on a device remote from the vehicle receives the request message and accepts user input that permits the remote device to transmit its current location to the vehicle-coupled device in a confirmation message according to the session identifier. The telematics server can use the session identifier to determine the destination address of the vehicle-coupled device to forward the confirmation message to. The vehicle-coupled device displays the remote user device location on a map. The request and confirmation messages may include a media content file. |
| US09564960B2 |
Decentralized caching system
In a satellite communication system comprising at least a hub and a plurality of terminals, at least one terminal may include a cache for storing data objects. The cache may be based on a detachable memory device that may be inserted to or removed from the terminal at any given time, including after the terminal is deployed. Aspects are directed to preventing a prefetching of objects already stored in a cache of a remote terminal. In some embodiments, an efficient multicasting of content to terminals over an adaptive link may occur in a manner which may benefit terminals comprising a cache while not affecting or minimally affecting the performance of terminals that may not include a cache. |
| US09564957B2 |
User equipment and method for assisted three dimensional beamforming
An embodiment for a method for user equipment assisted three-dimensional beamforming is disclosed. The method may include the user equipment receiving a reference signal from an eNodeB comprising an antenna. The user equipment may then calculate an optimum antenna tilt for the antenna and transmit feedback to the base station. The feedback may include an indication of the optimum antenna tilt for the antenna. Additional signals may be received from the base station after a transmit angle of the antenna has been adjusted in response to the optimum antenna tilt. |
| US09564954B2 |
Method for mapping and demapping resource in a wireless communication system and an apparatus thereof
A method and apparatus for mapping/demapping a resource efficiently in a wireless communication system are provided. A resource mapping method of a transmitter in a wireless communication system includes precoding pairs of symbols, arranging the pairs of precoded symbols adjacently in a resource block, and transmitting the pairs of precoded symbols in the resource block. |
| US09564948B2 |
3-level bridge driver with single supply and low common mode EMI emission
In one embodiment, a circuit, having a single supply, is provided to transmit a wireless signal with low common mode electromagnetic interference (EMI) emission. The circuit can achieve common mode attenuations of 40 dB or greater as a result of the symmetric built circuit. Also included is a system that includes a transmission circuit and a receiver circuit, and a method of using such a system. |
| US09564940B2 |
Method and apparatus for displaying information about wireless charging pad in electronic device
A method and apparatus for providing information about a plurality of wireless charging pads to an electronic device such that the electronic device performs wireless charging efficiently is provided. The method includes receiving information about the plurality of wireless charging pads and displaying the information about the plurality of wireless charging pads on a screen of the electronic device. |
| US09564939B2 |
Power efficient communications
A method, system, and device provide power-efficient communications within the context of available power. Transmission and receipt data rates are scalable in accordance with output power available from a power source. Data is transmitted at a data rate determined, at least in part, by the available output power. |
| US09564937B2 |
Devices and methods related to packaging of radio-frequency devices on ceramic substrates
Devices and methods related to packaging of radio-frequency (RF) devices on ceramic substrates. In some embodiments, a packaged electronic device can include a ceramic substrate configured to receive one or more components. The ceramic substrate can include a conductive layer in electrical contact with a ground plane. The packaged electronic device can further include a die having an integrated circuit and mounted on a surface of the ceramic substrate. The packaged electronic device can further include a conformal conductive coating implemented over the die to provide shielding functionality. The packaged electronic device can further include an electrical connection between the conformal conductive coating and the conductive layer. |
| US09564929B2 |
Parallel bit interleaver
A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each imade up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section. |
| US09564926B2 |
Time varying data permutation apparatus and methods
Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations. |
| US09564922B1 |
Error correction code decoder with stochastic floor mitigation
A method and apparatus as described herein provide a novel modification to any iterative FEC decoder method that can improve FER performance in the error floor region. Many iterative FEC methods, such as commonly used LDPC decoders, have error floors where the performance of the decoder does not improve below a certain threshold. Error Floors are caused by trapping sets from which traditional methods cannot escape. With Stochastic Floor Mitigation, according to embodiments of the present disclosure, noise is strategically added to the operations occurring during decoding resulting in significantly improved error floor performance. |
| US09564921B1 |
Method and system for forward error correction decoding based on a revised error channel estimate
An FEC codeword comprises channel information indicating the reliability of the information contained by the FEC codeword. The channel information can be used to generate an initial error channel estimate. Based on the initial error channel estimate, an FEC decoder can decode the FEC codeword to increase the reliability of the information contained by the FEC codeword. According to the present disclosure, a method and system of decoding comprises: comparing a current codeword to a previous codeword in order to identify bits corrected between the previous and current codewords; revising an error channel estimate based on the identified corrected bits, the revised estimate representing a change in the error channel over time; and decoding the codeword based on the revised error channel estimate. |
| US09564919B2 |
Managing data records
Data records may be managed in a relational database by monitoring, a record length for a first data record in a page of memory, an amount of free space in the page, and a page length. In response to receiving an operator command to replace the first data record with a second data record, a database management system may determine whether an estimated record length of a compressed second data record is outside of the amount of free space in the page. In response to determining the estimated record length of a compressed second data record is outside of the amount of free space in the page, the database management system may determine whether an estimated length of a compressed page is outside of the page length. In response to determining the estimated length of a compressed page is within the page length, the page may be compressed. |
| US09564917B1 |
Instruction and logic for accelerated compressed data decoding
A processor includes an execution unit to decode compressed data. The execution unit includes a code information array, a matching logic unit, a code value generator, and a decoder. The code information array includes a pre-computed code length counter and a pre-computed last code. The matching logic unit includes logic using the code information array to match a segment of a payload of the compressed data with a matching code length and a matching code index. The code value generator includes logic to translate the matching code index into a code value. The decoder includes logic to generate decompressed data from the code value and the matching code length. |
| US09564916B2 |
Suppressing signal transfer function peaking in a feedforward delta sigma converter
A modified topology for a CTDSM (referred herein as “SCFF”) can effectively deal with signal transfer function (STF) peaking, an inherent property of continuous time feedforward delta sigma converters. The SCFF approach involves providing an additional digital-to-analog (DAC) feedback path to the input of the second integrator (incurring an additional DAC in the circuitry, converting the output of the quantizer into an analog signal and feeding the analog signal to the input of the second integrator). Furthermore, the SCFF approach involves providing two feed-ins: a first feed-in to the input of the second integrator and a second feed-in to the input of the third integrator. The first feed-in can be negative. Advantageously, the modified continuous time delta sigma modulator implementing this approach alleviates some of the peaking issues in the signal transfer function while still enjoy low power consumption. |
| US09564912B2 |
Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator
Methods and apparatuses featuring an injection-locked oscillator (ILO) are described. In some embodiments, an ILO can have multiple injection points and a free-running frequency that is capable of being adjusted based on a control signal. In some embodiments, each injection point of an ILO can correspond to a phase tuning range. In some embodiments, a circuit can include circuitry to detect a phase boundary between two adjacent phase tuning ranges. In some embodiments, a circuit can use the detected phase boundary to switch between the two adjacent phase tuning ranges. |
| US09564911B2 |
Integrated circuit having a multiplying injection-locked oscillator
Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator. |
| US09564906B2 |
Capacitance phase interpolation circuit and method thereof, and multi-phase generator applying the same
A capacitance phase interpolation circuit including a first capacitance phase interpolation unit and a second capacitance phase interpolation unit is disclosed. The first capacitance phase interpolation unit includes a first capacitance group, wherein a plurality of capacitors in the first capacitance group are in a ring coupling, and the first capacitance phase interpolation unit receives a plurality of reference clock signals. The second capacitance phase interpolation unit is coupled to the first capacitance phase interpolation unit and includes a second capacitance group, wherein a plurality of capacitors in the second capacitance group are in a ring coupling, and each of the output clock signals is obtained via the first capacitance phase interpolation unit and the second capacitance phase interpolation unit by performing phase interpolation on all the reference clock signals. |
| US09564904B2 |
Asynchronous high-speed programmable divider
A method of dividing a clock signal by an input signal of N bits with M most significant bits is described herein. The method includes dividing the clock signal by the most significant bits of the input signal 2N-M−1 times out of 2N-M divisions of the clock signal, using a divider. The clock signal is divided by a sum of the most significant bits and the least significant bits one time out of 2N-M divisions of the clock signal, using the divider. The clock signal is also divided by 2N-M, 2N-M times, using the divider. |
| US09564902B2 |
Dynamically configurable and re-configurable data path
An apparatus includes a configuration memory coupled to one or more structural arithmetic elements, the configuration memory to store values that cause the structural arithmetic elements to perform various functions. The apparatus also includes a system controller to dynamically load the configuration memory with values, and to prompt the structural arithmetic elements to perform functions according to the values stored by the configuration memory. |
| US09564901B1 |
Self-timed dynamic level shifter with falling edge generator
A clock circuit configured to generate a falling edge independently of an input clock signal is disclosed. In one embodiment, a clock circuit includes an input circuit coupled to receive an input clock signal. A corresponding first clock signal is provided on a first clock node, while a second clock signal that is a delayed version of the first is provided on a second clock signal. The clock circuit may generate an output clock signal based on the first and second clock signals and a feedback signal received from a functional circuit coupled to receive the output clock signal. The rising edge of the output clock signal is generated dependent upon when the rising edge of the input clock signal is received. The falling edge of the output clock signal is generated by the clock circuit independently of when the falling edge of the input clock signal is received. |
| US09564899B2 |
Signal input circuit and operating method thereof
An input circuit includes: an input buffering unit suitable for receiving one or more input data, wherein each toggling time is defined according to a value of each input data; and a data transformation unit suitable for transforming the input data into an output data according to a mapping table and the toggling time of the input data during a data input duration. |
| US09564898B2 |
Power switch ramp rate control using selectable daisy-chained connection of enable to power switches or daisy-chained flops providing enables
In an embodiment, an integrated circuit may include one or more power gated blocks and a power manager circuit. The power manager circuit may be configured to generate a block enable for each power gated block and a block enable clock. The power gated block may generate local block enables to various power switch segments in the power gated block. In particular, the power gated block may include a set of series-connected flops that receive the block enable from the power manager circuit. The power gated block may include a set of multiplexors (muxes) that provide the local block enables for each power switch segment. One input of the muxes is coupled to the block enable, and the other input is coupled to another enable propagated through one of the other power switch segments. Accordingly, the muxes may be controlled to select the propagated enables or the input block enable. |
| US09564897B1 |
Apparatus for low power high speed integrated clock gating cell
An apparatus for an integrated clock gating cell is provided. The apparatus includes a logic gate that receives an unbuffered enable signal (E), a scan test enable signal (SE), and outputs an inverted enable signal (EN); a first transmission gate that receives E, SE, and EN; a second transmission gate that is connected to the first transmission gate and receives a clock signal (CK) and an enabled and inverted clock signal (ECKN); a first transistor having terminals connected to a power supply voltage (VDD), an output of the logic gate, and the first transmission gate respectively; a second transistor including terminals connected to the first transmission gate and VDD respectively; and a latch including terminals connected to the second transmission gate and the second transistor respectively. |
| US09564896B2 |
Post-silicon tuning in voltage control of semiconductor integrated circuits
A circuit is disclosed that includes a plurality of voltage control circuits and a control module. Each of the voltage control circuits is controlled by a control signal. The control module is configured to generate the control signal and to determine a voltage level or a pulse width of the control signal in accordance with a current process corner condition of the voltage control circuits and at least one of first predetermined data and second predetermined data. |
| US09564888B2 |
Voltage generation apparatus
A voltage generation apparatus may include an external voltage sensing circuit configured to generate a first start signal and a second start signal by sensing the magnitude of a first external voltage and the magnitude of a second external voltage. The voltage generation apparatus may include an internal voltage sensing circuit configured to generate a voltage generation signal by comparing an internal voltage with a target voltage. The voltage generation apparatus may include a voltage pumping circuit configured to be activated in response to the first start signal, configured to perform a pumping operation based on the voltage generation signal, and configured to generate the internal voltage. The voltage generation apparatus may include a voltage regulating circuit configured to be activated in response to the first and second start signals, and configured to generate the internal voltage based on the voltage generation signal. |
| US09564887B2 |
High frequency absorptive switch architecture
An absorptive switch architecture suitable for use in high frequency RF applications. A switching circuit includes a common terminal and one or more ports, any of which may be selectively coupled to the common terminal by closing an associated path switch; non-selected, unused ports are isolated from the common terminal by opening an associated path switch. Between each path switch and a port are associated shunt switches for selectively coupling an associated signal path to circuit ground. Between each path switch and a port is an associated absorptive switch module. Each absorptive switch module includes a resistor coupled in parallel with a switch. The combination of the resistor and the switch of the absorptive switch module is placed in series with a corresponding signal path from each port to the common terminal, rather than in a shunt configuration. |
| US09564886B2 |
Circuit and method for controlling operation voltage, and storage device
A circuit and a method for controlling operation voltage, and a storage device are provided. The circuit includes: a voltage boost unit adapted for: if receiving a first signal, performing a voltage boost process; and if receiving a second signal, stopping the voltage boost process; a voltage division unit including a plurality of different voltage division coefficients, adapted for performing a voltage division process; a comparison unit adapted for: comparing the divided voltage with a reference voltage; if the divided voltage is low, outputting the first signal; and if not, outputting the second signal; a control unit adapted for performing a descending switching operation on the voltage division coefficients; and an output unit. The establishing speed of the operation voltage is effectively controlled, and an effect on device power consumption and performance caused by the threshold voltage and variations of the threshold voltage in the working process is eliminated. |
| US09564882B2 |
Fast voltage level shifter circuit
A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth. The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate. |
| US09564881B2 |
Area-efficient metal-programmable pulse latch design
A pulse generator includes a latch module for storing first/second states, a pulse clock module for generating a clock pulse, and a delay module for delaying the clock pulse at a second latch-module input. The latch module has a first latch-module input coupled to a clock, the second latch-module input, and a latch-module output. The pulse clock module has a first pulse-clock-module input coupled to the clock, a second pulse-clock-module input coupled to the latch-module output, and a pulse-clock-module output. The delay module is coupled between the latch-module output and second pulse-clock-module input or between the pulse-clock-module output and second latch-module input. The delay module provides functionally I1IA at a delay module output, where I1 is a function of I and IA is a function of IN0 and B0, and where I is a delay module input, B0 is a first input bit, and IN0 is a first net input. |
| US09564877B2 |
Reset scheme for scan chains with asynchronous reset signals
A first apparatus includes at least one scan chain. Each of the at least one scan chain includes scan cells coupled together. Each scan cell in the at least one scan chain includes a first type of scan cell when a reset state of the scan cell is a first state, and a second type of scan cell when the reset state of the scan cell is a second state. One or more scan chains of the at least one scan chain includes at least one of the first type of scan cell and at least one of the second type of scan cell. A second apparatus includes first and second sets of scan chains including flip-flops without both set and reset functionality. Each of the flip-flops in the first and second sets of scan chains has a reset state of a first state and a second state, respectively. |
| US09564876B2 |
Digital compensation for a non-linear analog receiver
Aspects and embodiments are directed to non-linear systems including a digital compensator structure, a method of digital compensation, and methods for designing digital compensator structures for analog receivers. A digital compensator is configured to substantially reduce the one or more nonlinear distortion components in the sampled digital output signal from the analog receiver to provide an output signal achieving a receiver linearity requirement for the combination of the analog receiver and a digital compensator. |
| US09564875B2 |
Circuit device, electronic apparatus, and moving object
In order to achieve a circuit device capable of stably supplying an antenna with electric power in a broad power range to output a transmission signal, the circuit device includes a current source adapted to supply a first current in a first operation mode, and supply a second current higher than the first current in a second operation mode, and a drive section supplied with the electric power from the current source, and adapted to perform drive for outputting a transmission signal to an antenna via a matching circuit. |
| US09564872B2 |
Splitter circuit and front-end circuit
A splitter circuit includes a first branch circuit and a second branch circuit. Each branch circuit includes a capacitor, an inductor and a resistor. A first end of the capacitor is configured to receive RF signals. A first end of the inductor is coupled to a second end of the capacitor. The second end of the inductor is coupled to ground. The resistor is coupled to the second end of the capacitor to output RF signals. The resistor in the first branch circuit and the resistor of the second branch circuit respectively output RF signals to different devices. |
| US09564870B2 |
Structural body and wiring board
A second conductor plane (102) is formed in a layer different from a layer in which a first conductor plane (101) is formed, and faces the first conductor plane (101). A first transmission line (104) is formed in a layer different from the layers in which the first conductor plane (101) and the second conductor plane (102) are formed, and faces the second conductor plane (102), and one end thereof is an open end. A conductor via (106) connects the other end of the first transmission line (104) and the first conductor plane (101). An insular conductor (112) is connected to a portion of the first transmission line (104) other than a portion thereof at which the transmission line (104) is attached to the conductor via (106), is located in a layer different from the layer in which the second conductor plane (102) is located, and faces the second conductor plane (102). |
| US09564868B2 |
Balun
There is disclosed a balun for dividing an input electrical signal to produce first and second output electrical signals which are substantially out of phase, the balun including: an input port for receiving the input electrical signal; an input line for coupling the input electrical signal to a slotline; and an output line for coupling the first and second output electrical signals to, respectively a first output port and a second output port, the output line having a junction with the slotline; wherein the slotline couples the input electrical signal to the junction, and the junction acts as a divider to produce the first and second electrical signals; in which at least one of the input line, slotline and output line has a width and a length wherein the width varies over the length. |
| US09564867B1 |
Loudness matching
An example method may involve a device determining a first loudness representation for a playback device based on a first equalization setting applied to a representation of average music. The device may also determine a second loudness representation for the playback device, based on a second equalization setting applied to the representation of average music. The device may also determine a loudness adjustment factor based on the first and second loudness representations, and then causing the playback device to play back media based on the second equalization setting and the determined loudness adjustment factor. |
| US09564866B2 |
Method and device for prioritizing audio delivery in an application
A client device with one or more processors and memory identifies an action mode of a user of the client device in an application while executing the application. The client device detects an event in the action mode. The client device adjusts an audio mixing mode of sound effects in the application (e.g., adjusting a volume of audio associated with the event and a volume of background music for the application) based on the detected event. |
| US09564864B2 |
Enhanced doherty amplifier
The disclosure relates to an enhanced Doherty amplifier that provides significant performance improvements over conventional Doherty amplifiers. The enhanced Doherty amplifier includes a power splitter, combining node, a carrier path, and a peaking path. The power splitter is configured to receive an input signal and split the input signal into a carrier signal provided at a carrier splitter output and a peaking signal provided at a peaking splitter output. The carrier path includes carrier power amplifier circuitry, a carrier input network coupled between the carrier splitter output and the carrier power amplifier circuitry, and a carrier output network coupled between the carrier power amplifier circuitry and the Doherty combining node. The peaking path includes peaking power amplifier circuitry, a peaking input network coupled between the peaking splitter output and the peaking power amplifier circuitry, and a carrier output network coupled between the power amplifier circuitry and the Doherty combining node. |
| US09564855B2 |
Apparatus and system for rail-to-rail amplifier
Adaptive biasing circuits for input differential pairs of a buffer or an amplifier adapt to autozero currents for discrete pair selection or continuous pair selection. The adaptive biasing circuits include a multistage device including current source and follower devices with a plurality of switches for a two-phase operation: autozero and amplifying phases. During an autozero phase, input differential pairs are isolated from subsequent stages and biasing currents are determined for autozeroing of input offset voltages. During an amplifying phase, both input differential pairs can be coupled to subsequent stages for continuous selection or a selected input differential pair can be coupled to subsequent stages for discrete selection. |
| US09564850B2 |
Door opening/closing control device
A door opening/closing control device includes: a controller controlling driving of an actuator opening or closing a door; a position detector detecting an opening/closing position of the door; a speed calculator calculating an opening/closing speed of the door based on a temporal change in the opening/closing position detected by the position detector; and a target assisting force calculator calculating target assisting force based on the opening/closing position and the opening/closing speed of the door. The controller controls the driving of the actuator to assist an operation of opening or closing the door based on the target assisting force calculated by the target assisting force calculator. Further, the controller controls the driving of the actuator such that the door is fully closed upon judgment that the opening/closing position of the door is in the vicinity of the fully closed position based on the opening/closing position detected by the position detector. |
| US09564849B2 |
Scale for weighing flowing granular materials
Weighing system (FIG. 3, FIG. 6) to weigh items, parcels and the like while they are moving, for example, on a conveyor. A servo amplifier (14) and servo controller (20) are arranged to drive a servo motor in a feedback (15) configuration, and acquire torque sensing signals (17) responsive to commanded acceleration of the conveyor while the item(s) are on board. Preferably, constant acceleration of the item(s) is realized during one or more measurement intervals, and mass is derived by a processor (30) based on the measurement data (FIG. 5). Other embodiments are described for weighing granular and slurry materials (FIG. 7) and for weighing multiple, potentially overlapping, parcels in motion (FIG. 8). |
| US09564848B2 |
Power converter
Reduced is occurrence of hunting in which a power factor corrector continuously turns on and off alternately for a short period of time. A power factor correction controller turns on a power factor corrector if a parameter value for an input current into the power factor corrector is greater than or equal to a first threshold, and turns off the power factor corrector if the parameter value is smaller than or equal to a second threshold below the first threshold. Through a predetermined time period from a moment when the power factor corrector is switched either from on to off or from off to on, the power factor correction controller maintains a state of the switched power factor corrector, regardless of the parameter value. |
| US09564841B2 |
Power conversion device and method for diagnosing failure thereof
Provided is a power conversion device, including a fault determination unit (11) for determining, based on phase voltages of a polyphase dynamo-electric machine (4) detected by phase voltage detection units (10), a power, earth, or open fault of armature windings of the polyphase dynamo-electric machine (4). The fault determination unit (11) determines, in a state that all power semiconductor switching elements (2) are in an off state and no induction voltage is generated in the armature windings of the polyphase dynamo-electric machine (4), the power fault when all the phase voltages are substantially equal to an anode potential of a DC power supply (3), the earth fault when all the phase voltages are substantially equal to a cathode potential of the DC power supply (3), and the open fault when all the phase voltages are not substantially the same potential. |
| US09564835B2 |
Inverter communications using output signal
Technologies for communicating information from an inverter configured for the conversion of direct current (DC) power generated from an alternative source to alternating current (AC) power are disclosed. The technologies include determining information to be transmitted from the inverter over a power line cable connected to the inverter and controlling the operation of an output converter of the inverter as a function of the information to be transmitted to cause the output converter to generate an output waveform having the information modulated thereon. |
| US09564832B2 |
Circuit for synchronously switching series connected electronic switches
A circuit includes first and second electronic switches, first and second excitation circuits, and first and second inductors. The first and second electronic switches are electrically coupled in series. The first and second excitation circuits are used for respectively controlling the first and second electronic switches to be turned on and turned off and are configured to synchronously switch the first and second electronic switches. The first inductor is electrically coupled between the first excitation circuit and the first electronic switch, for transmitting the switch control signal of the first excitation circuit to the first electronic switch. The second inductor is electrically coupled between the second excitation circuit and the second electronic switch, for transmitting the switch control signal of the second excitation circuit to the second electronic switch. |
| US09564831B2 |
Method and control unit for the pulse-width-modulated control of switching elements of a pulse-controlled inverter
A method is described for the pulse-width-modulated control of switching elements of a pulse-controlled inverter, the impulses of successive signal periods of the control signal, in a first control mode, respectively having a uniform start or end time within the signal period, or being situated uniformly centered in the middle of the signal period, and the impulses of successive signal periods of the control signal, in a second control mode, being situated alternately at the beginning of the signal period and at the end of the signal period. |
| US09564830B2 |
Control method of inverting apparatus for achieving MPPT and inverting apparatus thereof
An inverting apparatus and a control method thereof are provided. The inverting apparatus includes an inverting circuit, a detection circuit, and a control circuit. The control circuit is coupled to the inverting circuit and the detection circuit and configured to provide a control signal to control the inverting circuit so as to adjust a voltage value of an input voltage into a command voltage represented by the control signal. The control circuit calculates a voltage difference between the detected input voltage and the command voltage so as to determine whether the voltage difference is greater than a preset value. When determining that the voltage difference is greater than the preset value, the control circuit sets the voltage value of the command voltage as the voltage value of the current input voltage. |
| US09564827B2 |
Power conversion device
A power conversion device includes: a DC current calculation unit for calculating a circulating current component for each phase which circulates between the phases through first arms and/or second arms not via an AC power supply and a DC power supply; and a circulating current control unit for controlling the circulating current component for each phase so as to follow a predetermined circulating current command value, thereby reliably suppressing variation in voltages of DC capacitors of unit cells among the phases even in such a case where an impedance is additionally inserted in a DC circuit. |
| US09564823B2 |
DC-DC power conversion circuit with magnetic and capacitive isolation
A power transfer system includes DC-DC power conversion circuitry that has a first switch and a second switch on either side of a transformer with a first capacitor and a second capacitor cross-connected across the transformer. A direction of power transfer is determined, and primary and secondary sides of the DC-DC power conversion circuitry are aligned based on the direction of power transfer. A quantity of power transfer through the DC-DC power conversion circuitry is determined based on power and voltage characteristics of electrical components. A duty cycle and a switching frequency for the first switch or second switch is determined based on the quantity of power to be transferred. The primary and secondary switches are controlled using switching. |
| US09564822B2 |
DC power supply device and power conversion method for converting an AC power supply into a DC power supply
A DC power supply device including a DC/DC converter having FETs each driven by a drive transformer. A voltage from a single drive power supply disposed in common for the FETs is divided into positive and negative biases to be applied to the FETs, and an operational state of the FETs is detected based on voltage signals. A sequence circuit turns on an input from a three-phase AC power supply by driving a relay circuit at a time point when it is confirmed that the FETs have normally started stable ON/OFF operation, and drives a power factor improvement circuit, which converts AC voltage from the three-phase AC power supply into a DC voltage by simultaneously performing full-wave rectification and power factor improvement. |
| US09564818B2 |
DC/DC converter capable of preventing overvoltage and overcurrent, operation method thereof and electronic apparatus
A DC/DC converter includes: a transformer; a main MOS transistor connected in series between a primary side inductance of the transformer and a ground potential; a synchronous rectification MOS transistor connected in series between a secondary side inductance of the transformer and the ground potential; a refluxing MOS transistor connected between a secondary side output of the transformer and the ground potential; and a controller. If an operation is stopped, the controller stops the main MOS transistor and stops the synchronous rectification MOS transistor and the refluxing MOS transistor after a lapse of a predetermined period of time. |
| US09564816B2 |
Converting leakage current to DC output
A power source capable of supplying power to operate electronics of a system is disclosed. In one example, the power source takes advantage of an electrical potential difference between primary and secondary grounds. The power source can reduce system cost and power consumption. |
| US09564807B2 |
Switched mode power supply compensation loop
An apparatus (200) for tuning a feedback loop that is arranged to regulate an output voltage (Vout) of a switched mode power supply, SMPS (100), in accordance with a control law defined by control law parameters. The apparatus includes a natural frequency estimator (210) arranged to determine a respective estimate of a natural frequency of each of two zeros in a transfer function that corresponds to a model of the feedback loop. The natural frequency estimator (210) comprises: an output voltage deviation determining module (212) arranged to determine, for each of a plurality of points in a search space, wherein the coordinates of each of the points correspond to candidate values of the natural frequencies of the zeros, a deviation of the output voltage of the SMPS that occurs in response to a variation in a load current of the SMPS; and a goal function evaluation module (214) arranged to evaluate a goal function using the determined deviation of the output voltage of the SMPS at each of the plurality of points to obtain a measure of at least one of a size and a recovery time of the respective output voltage deviation. The natural frequency estimator (210) is arranged to estimate a location of a minimum of the goal function in the search space based on the evaluated values of the goal function, the location of the minimum corresponding to the natural frequencies of the zeros. The apparatus further comprises a control law parameter calculator (220) arranged to calculate, based on the determined estimates of the natural frequencies of the zeros, the control law parameters for tuning the feedback loop, and a feedback loop tuner (230) to tune the feedback loop in accordance with the calculated control law parameters. |
| US09564803B1 |
Control circuit and switching power supply unit
A control circuit controls a switching element in a switching power supply unit. The control circuit includes: a controller connected to the switching element; a signal generating circuit connected to the input part of the controller; a reference voltage source connected to the signal generating circuit; and a comparator having a first input terminal to which an output voltage is input from the switching power supply unit, a second input terminal to which a comparison signal is input from the signal generating circuit, and an output terminal connected to the signal generating circuit and to the input part of the controller. |
| US09564798B2 |
Display apparatus, power supply apparatus and power supply method thereof
Disclosed is a display apparatus including an image processor configured to process an image signal, a display configured to display an image based on the image signal, a controller configured to control the display of the image, and a power supply configured to supply actuating power to the controller, the power supply including a power circuit configured to receive alternating current (AC) power and output the actuating power by a switching mode, a noise reducer configured to reduce high-frequency noise due to the switching mode, and a discharging circuit configured to supply a residual voltage of the noise reducer to the power circuit when the AC power is input, and discharge the residual voltage of the noise reducer when the AC power is shut off. Thus, it is possible to decrease power consumption caused when the residual voltage of the noise reducer is discharged. |
| US09564789B2 |
Assembly having a substrate, an SMD component, and a lead frame part
An assembly, having a substrate made of an electrically insulating material, an SMD component, which has lateral contact surfaces, and a lead frame part made of metal, which is fastened to the substrate and is used to establish electrical connections between the lateral contact surfaces of the SMD component and further functional elements of the assembly, wherein the lead frame part has contact tongues, which resiliently lie against the lateral contact surfaces and are connected to the lateral contact surfaces in a bonded manner. |
| US09564786B2 |
Wind turbine generator with fluid film bearing units
A generator for a wind turbine is disclosed. The generator comprises a rotor configured to rotate about a rotational axis, and at least one stator arranged next to the rotor. Each stator comprises at least one flux-generating module facing the rotor but spaced therefrom, thereby forming an air gap between the rotor and each flux-generating module. Each stator also comprises at least one bearing unit, each bearing unit comprising a body defining a cavity with an open end facing the rotor. The generator further comprises a source of pressurized fluid communicating with each bearing unit, and the body of each bearing unit directs the fluid towards the rotor to help maintain the air gap between the rotor and each flux-generating module. Thereby the air gap between the rotor and the flux-generating modules is controlled by means of the fluid bearing units. The invention further provides a wind turbine comprising such a generator. |
| US09564785B2 |
Combined end cap and electromechanical device equipped with the combined end cap
The present invention relates to a combined end cap and an electromechanical device equipped with the combined end cap. The combined end cap includes: an end cap body, which includes a fitting portion provided with a first mating portion; and an end cap flange, which is configured to have at least two segments adapted to be combined and mounted to the fitting portion, and at least one of the segments is provided with a second mating portion adapted to corporate with the first mating portion to prevent the segments having been combined and mounted to the fitting portion from rotating relative to the fitting portion. The application of this invention can not only significantly improve the versatility and convenience of the existing end caps, but also help to reduce the manufacturing cost. |
| US09564775B2 |
Uninterruptible power supply and DC-DC converter
An uninterruptable power supply (UPS) and a direct current-direct current (DC-DC) converter. An input end of the DC-DC converter is connected to a BUS+, a BUS−, and an N wire, and a load in the DC-DC converter is connected to a switch tube through an inductor rather than being directly connected to the switch tube. |
| US09564769B2 |
Wireless communication controlled battery charging station
An electronic device sends a wireless signal to a charging station indicating that charging of a battery of the electronics device is to commence. The electronic device generates a profile representing characteristics of the battery during charging. The electronic device sends a wireless signal to the charging station indicating the first type of charging is to be applied to the battery. The electronic device responds to a determination that charging of the battery is to continue by determining a second type of charging to be applied to the battery. The electronic device determines whether charging of the battery is to continue. In response to a determination that charging of the battery is not to continue, the electronic device sends a wireless signal to the charging station indicating that charging of the battery is to cease. |
| US09564766B2 |
Controllable energy transfer between portable devices
An energy transfer apparatus includes a cable having first end with a first connector operably coupled thereto and a second end with a second connector operably coupled thereto. The energy transfer apparatus also includes a control unit coupled to the cable. The control unit includes a device interface module configured to determine a first energy parameter of a first portable device connected to the cable via the first connector and to determine a second energy parameter of a second portable device connected to the cable via the second connector. The control unit also includes an energy transfer module configured to facilitate energy transfer between the first and second portable devices based on the first and second energy parameters. |
| US09564764B2 |
Apparatus and method for battery management with malfunction prevention algorithm
Disclosed is an apparatus and method for battery management. The present disclosure may significantly reduce the likelihood that a fuse of a battery pack will be melted based on a voltage value of a battery cell to which an error has occurred. Accordingly, the present disclosure may avoid an economic loss and a time loss that may occur when the fuse is incorrectly melted and the battery pack becomes unusable. |
| US09564763B2 |
High-efficiency battery equalization for charging and discharging
A non-contiguous group of cells in a battery of cells is selected for charging or discharging the battery. |
| US09564761B2 |
Conformable wearable battery with removable command module
A battery assembly has a command module with a power connection interface and a battery matrix interface. A battery matrix has a plurality of battery cells, an electrically erasable programmable read only memory (EEPROM) and a command module interface. The battery matrix interface may be removably interconnected with the command module interface, enabling power delivery from the battery matrix through the command module to the power connection interface and review of the EEPROM for capacity feedback with respect to remaining electrical power of the battery matrix. |
| US09564755B2 |
Method and apparatus for managing power of smart appliance
A method and apparatus for managing power of a smart appliance is provided. The method includes acquiring, from the smart appliance, by an Energy Management System (EMS) for managing power of the smart appliance at home over a home network, terminal information including function information and power consumption information; monitoring power of the smart appliance and transmitting results of the results to an energy service provider; and controlling, upon receiving a power reduction command from the energy service provider, the power of the smart appliance based on the acquired terminal information. |
| US09564752B2 |
Electronic apparatus and image forming apparatus
An electronic apparatus comprises: a displacement unit provided to an electronic apparatus main body; a first power source provided to the main body and supplying power to a load provided to the displacement unit; a first connecting unit that opens and closes a first supply path supplying an electric current from the first power source to the load in response to displacement of the displacement unit; a limiting unit provided on the first supply path and limiting an electric current flowing through the first supply path for a predetermined time from when an electric current is supplied from a second power source; and a second connecting unit that opens and closes a second supply path supplying an electric current from the second power source to the limiting unit in response to the displacement, wherein the first connecting unit opens and closes the second supply path in response to the displacement. |
| US09564749B2 |
Electrical feedthrough for housing of active implantable medical device
A housing of an active medical device includes a metal wall having at least one feedthrough for an electrical connection through the wall. In the area of the feedthrough, the housing wall includes a contour groove extending through the thickness of wall, defining a metal islet electrically and physically isolated from the rest of the wall. The housing wall further includes an electrically insulating outer layer on the outer side of the wall extending over a region in alignment with the groove and beyond either side of the groove. The insulating outer layer includes a recess formed in alignment with the islet. The wall further includes an electrically conductive outer layer formed outside of the insulating layer and extending over the region in alignment with the groove and beyond either side of the groove. The islet is mechanically supported by the insulating and conductive outer layers. |
| US09564741B1 |
One axis shutter with a pin-based bus system for miniature circuit breaker load centers
Apparatus for substantially eliminating exposure to live parts in a load center includes a bus assembly with male-terminal stabs which are capped with nonconductive material. A nonconductive structure covers the bus assembly and allows only the stabs to pass into the interior of circuit breaker compartments. A shutter assembly in each circuit breaker compartment has a nonconductive shutter plate that moves only in the Z axis to provide access to the stabs when a circuit breaker is inserted with a Z axis motion. Inserting the circuit breaker in the load center causes a shutter plate latch to open and depress the shutter. When the circuit breaker is removed from the load center, the shutter plate is biased upward and latched in a position over the stabs. No live touch points are available in the load center. |
| US09564739B2 |
Semiconductor laser device
A semiconductor laser device capable of high output is provided. A semiconductor laser diode includes: a substrate; and a semiconductor stacked structure, which is formed on the substrate through crystal growth. The semiconductor stacked structure includes: an n-type (Alx1Ga(1-x1))0.51In0.49P cladding layer and a p-type (Alx1Ga(1-x1))0.51In0.49P cladding layer; an n-side Alx2Ga(1-x2)As guiding layer and a p-side Alx2Ga(1-x2)As guiding layer, which are sandwiched between the cladding layers; and an active layer, which is sandwiched between the guiding layers. The active layer is formed of a quantum well layer including an AlyGa(1-y)As(1-x3)Px3 layer and a barrier layer including an Alx4Ga(1-x4)As layer that are alternatively repetitively stacked for a plurality of periods. |
| US09564738B2 |
Semiconductor laser device and manufacturing method thereof
A semiconductor laser device includes an n-type clad layer, a first p-type clad layer and a ridge stripe. The device also includes an active layer interposed between the n-type clad layer and the first p-type clad layer, and a current-blocking layer formed on side surfaces of the ridge stripe. The ridge stripe of the device includes a second p-type clad layer formed into a ridge stripe shape on the opposite surface of the first p-type clad layer from the n-type clad layer. The ridge stripe is formed such that a first ridge width as the width of a surface of the second p-type clad layer exists on the same side as the first p-type clad layer and a second ridge width as the width of a surface of the second p-type clad layer exists on the opposite side from the first p-type clad layer. |
| US09564735B2 |
Method for controlling wavelength tunable laser
A method for controlling a wavelength tunable laser is disclosed. The method comprises the steps of: calculating a lasing wavelength from two or more kinds of parameters, the parameters designating the target lasing wavelength; acquiring a driving condition from a memory, the wavelength tunable laser being operable to generate a laser beam of a first wavelength in the driving condition; and calculating another driving condition from the driving condition thus acquired and a wavelength difference between the first wavelength and a second wavelength, the second wavelength corresponding to the lasing wavelength, the wavelength tunable laser being operable to generate a laser beam of the second wavelength in the another driving condition, the wavelength tunable laser being driven in the another driving condition. |
| US09564734B2 |
Method of fabricating and operating an optical modulator
A method of making an optical modulator by determining the material composition of the quantum well region in the waveguide portion of the modulator so that the modulator is transparent at a gain peak wavelength that is greater than the predetermined wavelength by a predetermined amount, and fabricating the modulator with the determined material composition. |
| US09564732B2 |
Optical resonator system
It has been very difficult to accumulate strong laser in the conventional optical resonator, because firstly it has been very difficult to control a resonator length less than 1 Å in resonation position which is required for the laser amplification more than 1,000 times and secondly, the conventional method has utilized laser strength of amplified laser in the optical resonator as the resonance control signal.The present invention provides an optical resonator system to accumulate strong laser. In the system, unamplified modulation wave or harmonic which are derived from oscillation laser are selectively used to tune a resonator length of the optical resonator. |
| US09564731B2 |
Method for illuminating a sample with supercontinuum pulses
A method of providing supercontinuum illumination in applications involving the excitation of fluorescence, comprising generating, at an optical pump laser, optical pump pulses at a pump pulse repetition rate; selectively controlling with an optical modulator the launch of pump pulses into a nonlinear optical element comprising an optical fiber at a variable, lower repetition rate to thereby selectively control the repetition rate of supercontinuum pulses generated within the optical fiber; and illuminating a sample with supercontinuum pulses to excite fluorescence. The supercontinuum pulses can be wavelength filtered such that the fluorescence is excited with wave length filtered supercontinuum pulses. |
| US09564726B2 |
Electrical distribution system
An electrical distribution system comprising at least one busway section comprising an elongate trunking, a plurality busbars being disposed within the trunking, a respective elongate opening formed in a mounting face of the busway section permitting a respective male busbar engaging contact to engage the respective busbar, the system further comprising at least one tap off unit comprising a housing arranged to be mounted on the busway section, abutting the mounting face thereof, at any desired location along the length of the busway section, the at least one tap off unit having a plurality of conductive busbar engaging male contacts, the contacts being moveable between a retracted position, wherein the contacts are located within the housing, and an extended position, wherein the contacts extend out of the housing to engage a respective busbar via the elongate openings. |
| US09564723B2 |
Power connector
An apparatus may include a conductive wire and a plug. The plug may be electrically and mechanically coupled to the conductive wire. The plug may include a non-conductive overmold, an electrically conductive barrel, and a lip. The non-conductive overmold may surround the conductive wire. The electrically conductive barrel may extend from the overmold, and may have a width that is smaller than a width of the overmold. The lip may extend from the barrel in a direction substantially perpendicular to a direction in which the barrel extends from the overmold. A distance from an outer portion of the lip to an opposite outer portion of the lip may be at least twice a length that the barrel extends from the overmold. |
| US09564719B1 |
Elevated temperature detection and interrupter circuit for power cable
A circuit is disclosed for disconnecting electrical power upon the detection of an elevated temperature comprising an electrical plug and an electrical receptacle interconnected by a power cable. An interruption circuit having a disconnect switch is interposed in the power cable. A plug heat sensitive device and a receptacle heat sensitive device monitor the temperature of the electrical plug and the electrical receptacle. An elevated temperature detection circuit opens the disconnect switch upon the detection of an elevated temperature in one of the electrical plug and the electrical receptacle to prevent an overheated condition. |
| US09564715B1 |
Electrical connector
An electrical connector includes a dielectric body, a plurality of terminals integrally molded to the dielectric body, an insulating housing, two shielding elements, and a shielding shell surrounding the dielectric body, the insulating housing and the shielding elements. The insulating housing has a top wall, a bottom wall, two side walls and a rear wall. A top surface of the top wall and a bottom surface of the bottom wall of the insulating housing are recessed inward to form two fastening cavities. The dielectric body together with the terminals is assembled to the insulating housing. The two shielding elements are fastened to the two fastening cavities, respectively. |
| US09564712B1 |
Connecting assembly for securing two expansion cards
A connecting assembly for mounting a first expansion card and a second expansion card in a motherboard. The connecting assembly includes at least one fixing member, a first locking member and a second locking member. Each fixing member includes a first clamping portion and a second clamping portion, the fixing member is detachably assembled on the motherboard. The motherboard is held between the first clamping portion and the second clamping portion, the fixing member fixes the first expansion card and the second expansion card with the motherboard through the first locking member and the second locking member. |
| US09564711B2 |
Connector having an operation member and a locking member
A connector reduced in dimension in a front-rear direction by reducing the distance between an operating portion of an operation member and hooking portions of a locking member. The locking member maintains a state of a housing fitted to a mating housing, and includes a body, hooking portions provided at respective free end-side portions of the body, for being hooked to the mating housing to thereby maintain the fitted state, and a transmission portion for transmitting a force to move the operation member toward the rear of the housing, to the body, to thereby displace the hooking portions away from the mating housing. The operation member includes an operating portion for applying the force to the transmission portion. These portions are each formed with a flat surface inclined in a manner approaching the housing as it extends toward the rear of the housing. |
| US09564706B2 |
Connection unit
The present invention provides a connection unit capable of accommodating nuts and showing sealing ability in a state installed on a housing.A connection unit S includes: a terminal block 100 having holes h3 at one side of for accommodating nuts n; a terminal-connecting portions 200 at least partially exposed when viewed from the other side and fixed to the terminal block 100 with the circumferences of the terminal-connecting portions 200 in tight contact with the terminal block 100; and a nut cover 300 for covering the nuts accommodated in the holes h3 for preventing the nuts n from coming off. The connection unit S further includes: guide grooves and guide ribs for restricting movement of the nut cover 300 relative to the terminal block 100; and locking hooks 116 and locking holes h5 for restricting movement of the nut cover 300 relative to the terminal block 100. |
| US09564703B2 |
Screw block installation structure for a junction box
A screw block installation structure for a junction box in which a screw block is installed to a screw block attaching portion having a screw block housing space in a component attachment block in a junction box, the component attachment block is housed together with the screw block inside a frame, and a connecting member is screw-connected to a screw member of the screw block, the screw member having a vertical axis of the screw block, wherein a lateral side opening is disposed in the screw block attaching portion, and the screw block is laterally installed to the screw block housing space through the side opening is provided. |
| US09564702B2 |
Electric apparatus with safety connector for preventing electric shock
An electric apparatus with safety connector for preventing electric shock, having an electric circuit comprising at least a pair of terminals electrically separated from each other, and a cover which covers the electric circuit so as to prevent access to it when it is disposed in the assembly configuration to cover the electric circuit. The cover is mechanically fixed in position by a plurality of attachment mechanisms. A safety connector associated with the cover and provided with an electric conductor element, wherein the security connector passes through the cover so as to short-circuit the terminals and a projection supports the electric conductor element and is movable from a closed configuration in which it short-circuits the terminals to an open position in which it does not short circuit the terminals. A cover element which, in closed configuration, at least partially overlaps at least one of attachment mechanisms. |
| US09564699B1 |
Electronic device with support member
An electronic device includes at least one cover, a shell removably coupled to the cover, a circuit board, a support member, and a plurality of connectors. The circuit board is received between the cover and the shell, and a plurality of groups signal terminals are mounted on the circuit board. The support member is mounted on the circuit board and coupled to the cover, and the support member defines a slanted portion. The plurality of connectors are located on the slanted portion and include a plurality of first type connectors and a plurality of second type connectors coupled to the corresponding plurality of the groups of signal terminals through the support member and positioned in a proper order. When the cover is detached from the shell, the plurality of first type connectors and second type connectors slide down along the slanted portion, fall off the slanted portion and become mixed up. An unauthorized user might not be able to replace them in the proper order and therefor tampering may be prevented. |
| US09564695B2 |
Torque sleeve for use with coaxial cable connector
A torque sleeve for use on a coaxial cable connector that facilitates rotation of the coaxial connector onto an interface port is disclosed. The inner bore of the torque sleeve is dimensioned to allow the torque sleeve to fit over the back end cap of the coaxial connector and yet engage with the nut on the front of the coaxial connector. The torque sleeve may also have features to ensure that it stays in place over the coaxial connector and/or to promote continuity of grounding connection between the coaxial connector and interface port. The torque sleeve may be used for jumper cables, which possess a length of wire and two coaxial connectors. |
| US09564692B2 |
Conductive member
A conductive member is formed using a pipe member made of a conductive metal. The conductive member has a conductive body portion that extends in the lengthwise direction and that forms an electrical conduction path, and an insulating layer formed on the outer circumferential surface. Also, a terminal portion that enables connection with a partner member is integrally formed in each of the two end portions of the conductive body portion. The terminal portions are formed so as to be flat and are provided with a connection hole so as to enable connection with an electrode of an auxiliary battery or a terminal of a DC/DC converter. |
| US09564691B2 |
Method for manufacturing crimp terminal, crimp terminal, and wire harness
A method for manufacturing a crimp terminal having a crimp portion that allows crimp connection to a conductor part of a coated wire includes forming a tubular body by bringing together side edges of a plate material made of metal composed of a copper alloy having a copper content ratio of greater than or equal to 70%, irradiating a periphery of the sides edges, which are brought together, with laser light from a laser irradiation unit to weld the side edges which are brought together, and setting a power density of the laser light and a sweep rate of the laser light in such a manner that a weld bead formed at the side edge portion after the welding has a width of 80 μm to 390 μm. |
| US09564690B2 |
Terminal structure for covered electric wire
A terminal structure includes: a terminal portion including a tip of a covered electric wire; a connection terminal having a crimp portion crimped to the terminal portion; and a mold resin of a hygroscopic reactive type covering the terminal portion and the crimp portion. The crimp portion includes a conductive crimp portion crimped to the tip. The mold resin includes a first portion covering the conductive crimp portion and the tip; a second portion covering a part of the connection terminal which is further toward a tip than the tip, the part having a thickness smaller than the conductive crimp portion; and a first step formed between the first portion and the second portion such that the height of the mold resin decreases from the first portion to the second portion. A first recess formed on the second portion. |
| US09564689B2 |
MIMO antenna system
A multiple input, multiple output (“MIMO”) antenna system is provided for operation on a radio frequency (“RF”) module that may be used in a wireless access device. The MIMO antenna system includes a plurality of multi-band antenna elements connected to a radio in a MIMO configuration. The multi-band antenna elements and the radio are configured to operate on a RF module. A reflector is formed on the RF module to contain the plurality of multi-band antenna elements and to concentrate signal communication in a sector, the plurality of multi-band antenna elements oriented to provide a sector coverage pattern formed by beam patterns generated by each of the multi-band antenna elements. |
| US09564687B2 |
Directive antenna apparatus mounted on a board
There is provided an antenna apparatus including a first wire connecting a first metal part to a fourth metal part, a second wire connecting a second metal part to a feeder, and a third wire connecting a third metal part to a fourth metal part, wherein the first, second, and third wires are arranged in parallel to one edge of a semiconductor chip, and the second wire is disposed between the first wire and the third wire. |
| US09564686B2 |
Near field communication antenna device of mobile terminal
A near field communication antenna device of a mobile terminal is provided. The near field communication antenna device includes a window including a display region for transmitting an image displayed by a display and a black mark region formed around the display region, a multi-layer Flexible Printed Circuit Board (FPCB) on which a plurality of layers are laminated on the lower side of the black mark region of the window, and a spiral loop-shaped antenna pattern in which conductive lines are formed on respective layers of the multi-layer FPCB and are connected to each other. Accordingly, a near field communication antenna is not disposed in a separated installation space, an antenna pattern width can be reduced, and performance of the near field communication antenna may be prevented from being degraded when a battery cover is made of metal or has a curved shape. |
| US09564685B2 |
Antenna and communication apparatus
The present invention provides an antenna in which first and second conductors each having a first width are spirally arranged on first and second planes, respectively, such that a conductor-to-conductor distance is equal to a second width, and an inter ends of spirals of the first and second conductors are connected with a conductor. In this antenna, the direction in which the spiral of the first conductor runs from its outer end to its inter end and the direction in which the spiral of the second conductor runs from its inter end to its outer end correspond to each other, the first width is greater than or equal to the second width, and the first and second conductors are alternately arranged in at least a portion thereof as viewed in a radius direction from an axis of the spiral. |
| US09564677B2 |
Mobile terminal
A mobile terminal and an antenna thereof are provided. The mobile terminal includes a housing, a main board arranged within said housing, and an antenna arranged on the outer surface of said housing such that the antenna is connected with said main board. The height of the mobile phone antenna can be effectively increased and, thus the performance of the antenna is improved. |
| US09564676B2 |
System and methods for adaptive antenna optimization
A method (600) and devices for enhancing the performance of one or more antennas (440) is provided. A control circuit (104) assesses performance of an antenna (101) in a plurality of bands, such as a receive band and a transmit band. The control circuit (104) can then adjust an adjustable impedance matching circuit (103) coupled to the antenna (101) to improve the efficiency of the antenna (101) in the selected band and can adjust a resonance of the antenna (101) to further improve an efficiency of the antenna (101) in the selected band. Operating parameters for the antenna (101) can be selected from one or more multi-dimensional lookup tables (120) where the parameters are indexed both to a first operating band (702) and a second operating band (703). |
| US09564675B2 |
Display device having antenna
A display device includes a display panel which displays an image, a driving circuit substrate disposed on a rear surface of the display panel and controlling the display panel to display the image, and a chip antenna connected to an end portion of the driving circuit substrate in a longitudinal direction of the driving circuit substrate. |
| US09564671B2 |
Direct chip to waveguide transition including ring shaped antennas disposed in a thinned periphery of the chip
An apparatus providing a direct chip to waveguide transition, comprising: one or more waveguides, a chip partially embedding each of the waveguides at a transition area positioned at a narrow side of each waveguide, and a transmitting element disposed at each of the transition areas, thereby providing one or more simultaneous, direct transitions between the chip and the waveguides. |
| US09564669B2 |
Merged battery cell with interleaved electrodes
A battery having the electrodes of multiple battery cell types are interleaved to prevent thermal runaway by cooling a shorted region between electrodes. The electrodes of each of the battery cell types with a first polarity share a pair of the common electrodes having a second polarity. The electrodes of the multiple battery cell types and the multiple common electrodes are interleaved such that if the electrodes of the multiple battery cell types and the adjacent common electrodes of one or more battery cell types short together, the current within the shorted battery cells is sufficiently small to prevent thermal runaway and the electrodes of the adjacent cells of the other battery cell types of the first polarity and the common electrodes of the second polarity not having short circuits provide heat sinking for the heat generated by the short circuit to prevent thermal runaway. |
| US09564663B2 |
Battery module and battery assembly comprising the same
A battery module including a unit cell assembly including two or more battery cells or unit modules; a left case coupled to a left side of the assembly, the left case provided at a left outer side thereof with a first fastening groove extending parallel to a longitudinal direction of the battery module such that a sensing assembly is fastened into the first groove, the left case being provided at opposite ends thereof with second fastening grooves formed parallel to a height direction of the battery; and a right case coupled to a right side of the assembly, an external input and output terminal oriented to a front of the battery, the right case provided at a right inner side thereof with a plurality of fixing grooves formed parallel to a longitudinal direction of the assembly such that the assembly is fastened and fixed into the fixing grooves is provided. |
| US09564658B2 |
Lithium-ion secondary battery and electrolyte thereof
The present disclosure provides a lithium-ion secondary battery and an electrolyte thereof. The electrolyte comprises a lithium salt; a non-aqueous solvent and an additive comprising a first additive and a second additive, the first additive comprises at least one of vinylene carbonate and vinyl ethylene carbonate, the second additive is 4-methylene-1,3-dioxolan-2-one and its derivatives with a structural formula 1 and/or 4,5-dimethylene-1,3-dioxolan-2-one and its derivatives with a structural formula 2; in the structural formula 1 and the structural formula 2, R1, R2, R3 and R4 each are hydrogen, halogen, C1˜C3 alkyl or halogenated alkyl; a weight percentage of the first additive in the electrolyte is 0.2%˜2.0%, a weight percentage of the second additive in the electrolyte is 0.3%˜4.0%. The lithium-ion secondary battery comprises the aforementioned electrolyte. The lithium-ion secondary battery has better cycle performance, better low temperature discharging performance, and higher first coulombic efficiency. |
| US09564653B2 |
Method for producing fuel cell including nanofibers of metal oxide
A production method for producing a fuel cell, includes spinning a precursor consisting of a salt of at least one metal chosen from Sc, Y, La, Ce, Pr, Nd, Sm, Gd, Dy, Ho, Yb, Sr, Ba, Mn, Co, Mg, and Ga, a solvent, and a macromolecular polymer to produce nanofibers of the precursor containing the salt of the metal. The method further includes calcining the nanofibers of the precursor at a temperature ranging from 550° C. to 650° C. for 2 to 4 hours, and making a solid electrolyte material composed of the nanofibers obtained from the calcining. The resulting solid electrolyte material constitutes a part of a fuel cell. |
| US09564644B2 |
Hydrating a fuel cell
An example method of controlling fluid distribution within a fuel cell includes adjusting a flow of a reactant moving within a fuel cell to increase water within a portion of the fuel cell. Another example method of controlling fluid distribution within a fuel cell includes adjusting a flow of fuel entering a fuel cell, a velocity of air entering the fuel cell, or both, so that a first amount of water exiting the fuel cell in a fuel stream is about the same as a second amount of water exiting the fuel cell in an airstream. |
| US09564641B2 |
Active material, electrode, lithium ion secondary battery, and method for manufacturing active material
An active material that can achieve sufficient discharge capacity at high discharging rate, an electrode including the active material, and a lithium ion secondary battery including the electrode, and a method for manufacturing the active material are provided. The active material includes a LiVOPO4 powder, a first carbon powder, and a second carbon powder. A relational expression of 0.05≦A1/A2≦0.5 is satisfied, where A1 represents the ratio of the G band peak height observed around 1580 cm−1 in Raman spectrum of the first carbon powder to the 2D band peak height observed around 2700 cm−1 in the Raman spectrum of the first carbon powder, and A2 represents the ratio of the G band peak height observed around 1580 cm−1 in Raman spectrum of the second carbon powder to the 2D band peak height observed around 2700 cm−1 in the Raman spectrum of the second carbon powder. |
| US09564638B2 |
Battery electrode or separator surface protective agent composition, battery electrode or separator protected by the composition, and battery having the battery electrode or separator
A battery electrode or separator surface protective agent composition having fluidity and being capable of being solidified by hot melt, and comprising at least two types of organic particles comprising organic materials, wherein the organic particles of types different from each other are substantially incompatible with each other, wherein when the composition is solidified by hot melt, the organic particles of the same type thermally fuse with one another to form a continuous phase. |
| US09564634B2 |
Positive electrode active substance particles and process for producing the same, and non-aqueous electrolyte secondary battery
The present invention relates to positive electrode active substance particles comprising a compound having at least a crystal system belonging to a space group of R-3m and a crystal system belonging to a space group of C2/m, the positive electrode active substance particles having a specific intensity ratio; a content of Mn in the positive electrode active substance particles being controlled such that a molar ratio of Mn/(Ni+Co+Mn) therein is not less than 0.55; and the positive electrode active substance particles comprising an element A (that is at least one element selected from the group consisting of Si, Zr and Y) in an amount of 0.03 to 5% by weight and having a tap density of 0.8 to 2.4 g/cc and a compressed density of 2.0 to 3.1 g/cc. The positive electrode active substance particles can be produced by calcining a mixture of precursor particles comprising the element A, Mn, Ni and/or Co, and a lithium compound. |
| US09564633B2 |
Hybrid silicon and carbon clathrates
A composition comprising a Type 1 clathrate of silicon having a Si46 framework cage structure wherein the silicon atoms on said framework are at least partially substituted by carbon atoms, said composition represented by the formula CySi46-y with 1≦y≦45. The composition of may include one or more guest atoms A within the cage structure represented by the formula AxCySi46-y wherein A=H, Li, Na, K, Rb, Cs, Fr, Be, Mg, Ca. Sr, Ba, Ra, Eu, Cl, Br, or I or any metal or metalloid element and x is the number of said guest atoms within said cage structure. |
| US09564632B2 |
Layered titanium disilicide, method of preparation and applications thereof
The invention generally relates to new materials based on C49 titanium disilicide (TiSi2) as a new, layered anode material, within which lithium ions can react with the Si-only layers. Stabilization by a coating a thin layer of oxide on the surface of TiSi2 significantly improves the charge and discharge performance. |
| US09564629B2 |
Hybrid nano-filament anode compositions for lithium ion batteries
This invention provides a hybrid nano-filament composition for use as an electrochemical cell electrode. The composition comprises: (a) an aggregate of nanometer-scaled, electrically conductive filaments that are substantially interconnected, intersected, or percolated to form a porous, electrically conductive filament network comprising substantially interconnected pores, wherein the filaments have an elongate dimension and a first transverse dimension with the first transverse dimension being less than 500 nm (preferably less than 100 nm) and an aspect ratio of the elongate dimension to the first transverse dimension greater than 10; and (b) micron- or nanometer-scaled coating that is deposited on a surface of the filaments, wherein the coating comprises an anode active material capable of absorbing and desorbing lithium ions and the coating has a thickness less than 20 μm (preferably less than 1 μm). Also provided is a lithium ion battery comprising such an electrode as an anode. The battery exhibits an exceptionally high specific capacity, an excellent reversible capacity, and a long cycle life. |
| US09564626B2 |
Rechargeable battery
A rechargeable battery includes a case having an inner space, a first electrode assembly inside the case, a second electrode assembly inside the case, a current collecting member including a first current collecting piece electrically connected to an electrode of the first electrode assembly and a second current collecting piece electrically connected to an electrode of the second electrode assembly, the electrode of the second electrode assembly having a same polarity as the electrode of the first electrode assembly, a first terminal electrically connected to the first current collecting member and protruding outside the case, wherein the first current collecting piece and the second current collecting piece have different lengths. |
| US09564614B2 |
Secondary battery
A secondary battery including: an electrode assembly; a case receiving the electrode assembly and including a plurality of stepped sections at an inner side of the case in contact with the electrode assembly; and at least one electrode tab electrically connected with the electrode assembly and withdrawn toward an outside of the case. In the secondary battery, a friction force between the inner side of the case and the electrode assembly is increased due to the plurality of stepped sections, thereby minimizing or reducing movement of the electrode assembly within the case. |
| US09564611B2 |
Organic light emitting display device
An organic light emitting display device includes a first substrate, a light emitting structure, a light transmitting member, and a second substrate. The first substrate includes a pixel region and a transparent region. The light emitting structure is positioned in the pixel region of the first substrate. The light transmitting member is positioned in the transparent region. The second substrate is disposed on the light emitting structure and the light transmitting member. The light is not refracted in interfaces between the light transmitting member and the first substrate and between the light transmitting member and the second substrate. |
| US09564610B2 |
Electronic device and method for manufacturing same
An object of the present invention is to provide an electronic device in which permeation of water content and oxygen from a bonding part is decreased, and which is excellent in stability, and a method for manufacturing the electronic device. The present invention relates to an electronic device including a substrate, an electronic element main body on the substrate, an electrode that is connected to the electronic element main body, a silicon-containing film that coats at least the electrode, and a sealing substrate that is bonded to the substrate via a bonding part that has the silicon-containing film and is disposed on the surrounding of the electronic element main body, to seal the electronic element main body, in which at least one of the substrate and the sealing substrate is a gas barrier film, and the silicon-containing film has a composition represented by the following chemical formula (1): in which x, y and z are respectively atomic ratios of oxygen, nitrogen and carbon to silicon, and satisfy 0≦y<0.3, 3<2x+5y≦5 and 0.01 |
| US09564608B2 |
Display device
A display device includes a pixel part provided with a plurality of pixels, and a light emitting device provided in the pixel, wherein the light emitting device includes a light emitting layer including a quantum dot, a first electrode provided on one surface of the light emitting layer, an insulation layer provided between the light emitting layer and the first electrode, and a second electrode provided between the light emitting layer and the insulation layer, and at least one end part of the second electrode layer is provided over the first electrode. |
| US09564603B2 |
Heterocyclic compound and organic light-emitting device including the same
A heterocyclic compound and an organic light-emitting diode including the same, the heterocyclic compound being represented by Formula 1, below: |
| US09564600B2 |
Compound having an indolocarbazole ring structure and organic electroluminescent device
A compound having an indolocarbazole ring structure is represented by the following general formula (1), and is used as a material for forming a highly efficient and highly durable organic electroluminescent device. The compound features excellent hole injection/transport capability, has electron blocking power and is highly stable in the form of a thin film. wherein, A is a divalent aromatic hydrocarbon group or aromatic heterocyclic group, Ar1 to Ar4 are monovalent aromatic hydrocarbon groups or aromatic heterocyclic groups, and R1 to R9 are hydrogen atoms, deuterium atoms, fluorine atoms, chlorine atoms, cyano groups, nitro groups, alkyl groups, cycloalkyl groups, alkenyl groups, alkyloxy groups, cycloalkyloxy groups, aromatic hydrocarbon groups, aromatic heterocyclic groups or aryloxy groups. |
| US09564596B2 |
Heterocyclic compound and organic light-emitting device comprising same
A compound represented by Formula 1 or 2, and an organic light-emitting device including the same are disclosed. Formulae 1 and 2 are defined as in the specification. |
| US09564595B2 |
Bis-carbazole derivative and organic electroluminescent element using same
A biscarbazole derivative represented by formula (1): wherein A1, A2, L1, L2, R1 to R4, and a to d are as defined in the specification, is useful as a material for forming organic EL devices and the organic EL devices including the derivative is capable of driving at a low voltage and has a long lifetime. |
| US09564584B2 |
Electronic device and method for fabricating the same
An electronic device includes a semiconductor device that includes: a substrate including a switching element having a buried gate electrode; a buried decoupling capacitor having a line width same as a line width of the buried gate electrode; and a variable resistance element, electrically coupled to the switching element, formed over the substrate. |
| US09564576B2 |
Multi-bit ferroelectric memory device and methods of forming the same
Multi-bit ferroelectric memory devices and methods of forming the same are provided. One example method of forming a multi-bit ferroelectric memory device can include forming a first ferroelectric material on a first side of a via, removing a material to expose a second side of the via, and forming second ferroelectric material on the second side of the via at a different thickness compared to the first side of the via. |
| US09564573B1 |
Trilayer josephson junction structure with small air bridge and no interlevel dielectric for superconducting qubits
A technique relates to a trilayer Josephson junction structure. A dielectric layer is on a base electrode layer that is on a substrate. A counter electrode layer is on the dielectric layer. First and second counter electrodes are formed from the counter electrode layer. First and second dielectric layers are formed from the dielectric layer. First and second base electrodes are formed from base electrode layer. The first counter electrode, first dielectric layer, and first base electrode form a first stack. The second counter electrode, second dielectric layer, and second base electrode form a second stack. A shunting capacitor is between first and second base electrodes. An ILD layer is deposited on the substrate, the first and second counter electrodes, and the first and second base electrodes. A contact bridge connects the first and second counter electrodes. An air gap is formed underneath the contact bridge by removing ILD. |
| US09564570B2 |
Thermoelectric module with thermal expansion compensation, method for producing a thermoelectric module and thermoelectric generator
A thermoelectric module extends in a longitudinal direction and includes an outer tube, an inner tube disposed within the outer tube and an interspace between the tubes. At least one first strip-shaped structure and one second strip-shaped structure are provided. The first strip-shaped structure extends from a first connection on the inner tube and the second strip-shaped structure extends from a second connection on the outer tube in opposite directions in at least one circumferential direction or in the longitudinal direction and at least partly form an overlap at least in the circumferential direction or in the longitudinal direction. At least one pair of semiconductor elements is disposed in the region of the overlap. A method for producing a thermoelectric module and a thermoelectric generator are also provided. |
| US09564569B1 |
Hermetic solution for thermal and optical sensor-in-package
A sensor-in-package device, a process for fabricating a hermetically-sealed sensor-in-package device, and a process for fabricating a hermetically-sealed sensor-in-package device with a pre-assembled hat that employ example techniques in accordance with the present disclosure are described herein. In an implementation, the sensor-in-package device includes a substrate; at least one thermopile, at least one photodetector, at least one light-emitting diode, an ultraviolet light sensor, and a pre-assembled hat disposed on the first side of the substrate, where the pre-assembled hat includes a body; a first lid; and a second lid; where the body, the substrate, and the first lid define a thermopile cavity that houses the at least one thermopile, and where the body, the substrate, and the second lid define an optical cavity that houses at least one of the at least one photodetector, the at least one light-emitting diode, or the ultraviolet light sensor. |
| US09564567B2 |
Light emitting device package and method of fabricating the same
A light emitting device package and a method of manufacturing the light emitting device package are provided. A base is first provided and a hole is formed on the base. After a light emitting portion is formed on the base, a mold die is placed on the light emitting portion and a molding material is injected through the hole. The mold die is removed to complete the package. |
| US09564566B2 |
Optoelectronic component and method for the production thereof
An optoelectronic component includes a housing having an electrically conductive first contact section, and an optoelectronic semiconductor chip arranged on the first contact section, wherein the optoelectronic semiconductor chip and the first contact section are at least partly covered by a first layer including a silicone, a second layer including SiO2 is arranged at a surface of the first layer, the second layer has a thickness of 10 nm to 1 μm, and a third layer is arranged above the second layer. |
| US09564565B2 |
Light emitting device, light emitting module, and method for manufacturing light emitting device
A light emitting device includes a light emitting element, a first terminal, a second terminal, and a light reflecting member. The first terminal and the second terminal each have a substantially spherical shape and are electrically connected to the light emitting element. The light reflecting member holds the light emitting element, the first terminal, and the second terminal. The light reflecting member includes a bottom surface, an upper surface, a first side surface, a second side surface, a front surface, a back surface, a first terminal exposure surface, and a second terminal exposure surface. The light emitting device is to be placed via the bottom surface. The first terminal is exposed from the first terminal exposure surface to provide a first exposed portion. The second terminal is exposed from the second terminal exposure surface to provide a second exposed portion. |
| US09564563B2 |
Improving display contrast
There is herein described electronic components with improved display contrast and a method of manufacturing such electronic components. More particularly, there is described electronic components having improved display contrast by using a non-transparent or substantially non-transparent material (520) to block light from an emitter source (512, 514, 516) to surrounding components such as emitters, sensors or components of this nature. |
| US09564562B2 |
Silicone composition for sealing semiconductor
The silicone composition for sealing a semiconductor, comprises: (A) 100 parts of a polyorganosiloxane having one or more alkenyl groups, obtained by reacting (a1) 60 to 99 parts of an organosiloxane containing at least a trifunctional siloxane unit not taking part in a hydrosilylation reaction, with (a2) 40 to 1 parts of an organosiloxane containing a bifunctional siloxane unit having an alkenyl group and/or a monofunctional siloxane unit having an alkenyl group; (B) an amount of a polyorganohydrogensiloxane having two or more hydrogen atoms having a viscosity at 25° C. of 1 to 1000 mPa·s so that an amount of the hydrogen atoms is 0.5 to 3.0 mol per mol of the alkenyl groups; and (C) a platinum-based catalysts, wherein a decrease in storage modulus of a cured product thereof from 25° C. to 50° C. is 40% or more.Specifically the polyorganosiloxane (A) is prepared by block or graft polymerization and equilibration reaction of three specific, different, organosiloxanes including a branched siloxane, a linear siloxane and a cyclic siloxane. |
| US09564559B2 |
White emitting light source and luminescent material
The invention relates to a white emitting light source with an improved luminescent material of the formula (AEN2/3)*b(MN)*c(SiN4/3)*d1CeO3/2*d2EuO*xSiO2*yAlO3/2 wherein AE is an alkaline earth metal chosen of the group of Ca, Mg, Sr and Ba or mixtures thereof and M is a trivalent element chosen of the group of Al, B, Ga, Sc with d1>10*d2. In combination with a UV to blue light generating device this material leads to an improved light quality and stability, especially an improved temperature stability for a wide range of applications. |
| US09564558B2 |
Fluoride fluorescent material and light emitting device using the same
The present invention provides a fluoride fluorescent material comprising a chemical composition represented by the following formula (I): K2[M1-aMn4+aF6] (I) wherein M is at least one element selected from the group consisting of elements belonging to Groups 4 and 14 of the Periodic Table, and a is a value that satisfies the relationship: 0 |
| US09564557B2 |
LED based device with wide color gamut
The invention provides a lighting unit comprising a source of blue light, a source of green light, a first source of red light comprising a first red luminescent material, configured to provide red light with a broad band spectral light distribution, and a second source of red light comprising a second red luminescent material, configured to provide red light with a spectral light distribution comprising one or more red emission lines. Especially, the first red luminescent material comprises (Mg,Ca,Sr)AlSiN3:Eu and/or (Ba,Sr,Ca)2Si5-xAlxOxN8-x:Eu, and the second red luminescent material comprises K2SiF6:Mn. |
| US09564553B2 |
Power light emitting diode and method with uniform current density operation
A light emitting diode device has a bulk gallium and nitrogen containing substrate with an active region. The device has a lateral dimension and a thick vertical dimension such that the geometric aspect ratio forms a volumetric diode that delivers a nearly uniform current density across the range of the lateral dimension. |
| US09564552B2 |
Method for producing group III nitride semiconductor light-emitting device
The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. In a MQW structure light-emitting layer in which a plurality of layer units is repeatedly deposited, each layer unit comprising an InGaN well layer, a GaN protective layer, and an AlGaN barrier layer sequentially deposited, the protective layer is formed as follows. The protective layer is grown at the same temperature as employed for the well layer. The growth rate of the protective layer is larger than 0.5 times and not larger than 1.1 times the growth rate of the well layer. The protective layer is formed so as to have a thickness of 5 Å to 8 Å at the start of growth of the barrier layer being formed thereafter. |
| US09564550B2 |
Optoelectronic component, a method for manufacturing an optoelectronic component, and a method for processing a carrier
According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon. |
| US09564549B2 |
Germainium pin photodiode for integration into a CMOS or BICMOS technology
A diode comprising a light-sensitive germanium region which is totally embedded in silicon and forms with the silicon a lower interface and lateral interfaces, wherein the lateral interfaces do not extend perpendicularly, but obliquely to the lower interface and therefore produce a faceted form. |
| US09564545B2 |
Photovoltaic sheathing element with one or more tabs
The present invention is premised upon an assembly that includes at least a photovoltaic sheathing element capable of being affixed on a building structure. The shingle including at least a photovoltaic cell assembly, a body portion attached to one or more portions of the photovoltaic cell assembly. Wherein the body portion includes one or more top peripheral tabs each capable of fitting under one or more vertically adjoining devices. |
| US09564542B2 |
Selective transformation in functional films, and solar cell applications thereof
A solar cell formation method, and resulting structure, having a first film and a barrier film over a surface of a doped semiconductor, wherein the optical and/or electrical properties of the first film are transformed in-situ such that a resulting transformed film is better suited to the efficient functioning of the solar cell; wherein portions of the barrier film partially cover the first film and substantially prevent transformation of first film areas beneath the portions of the barrier film. |
| US09564536B2 |
Self-aligned metal oxide thin-film transistor component and manufacturing method thereof
The present invention is applicable to the field of electronic component technologies and provides a manufacturing method of a self-aligned metal oxide TFT component, including: selecting a substrate and preparing a gate on the substrate; successively disposing an insulation layer, a transparent electrode layer, and a photoresist on the gate; using the gate as a mask to perform exposure from a back side of the substrate, so as to form a source and a drain that are aligned with the gate; depositing a metal oxide semiconductor layer on the transparent electrode layer; performing etching on the semiconductor layer, the source, and the drain, so that outer ends of the source and the drain are exposed out of the metal oxide semiconductor layer; and depositing a passivation layer and leading out the source and the drain. In the present invention, a transparent conductor is used as the electrode layer, and a bottom gate is used as a mask to perform back exposure, so as to perform etching on the source and the drain, thereby implementing a self-alignment between the source or the drain and the gate, effectively reducing parasitic capacitance, and improving component performance. The component is of a bottom-gate bottom-contact structure, and there is no need to manufacture an etch-stop layer, thereby simplifying a process, reducing use of a photolithographic mask, improving production efficiency, and improving an electrical property of the component. |
| US09564535B2 |
Semiconductor device, display device including the semiconductor device, display module including the display device, and electronic appliance including the semiconductor device, the display device, and the display module
A change in electrical characteristics is inhibited and reliability is improved in a semiconductor device using a transistor including an oxide semiconductor. One embodiment of a semiconductor device including a transistor includes a gate electrode, first and second insulating films over the gate electrode, an oxide semiconductor film over the second insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. A third insulating film is provided over the transistor and a fourth insulating film is provided over the third insulating film. The third insulating film includes oxygen. The fourth insulating film includes nitrogen. The amount of oxygen released from the third insulating film is 1×1019/cm3 or more by thermal desorption spectroscopy, which is estimated as oxygen molecules. The amount of oxygen molecules released from the fourth insulating film is less than 1×1019/cm3. |
| US09564534B2 |
Transistor and display device using the same
The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V. |
| US09564526B2 |
Group III nitride integration with CMOS technology
A method of forming a structure that can be used to integrate Si-based devices, i.e., nFETs and pFETs, with Group III nitride-based devices is provided. The method includes providing a substrate containing an nFET device region, a pFET device region and a Group III nitride device region, wherein the substrate includes a topmost silicon layer and a <111> silicon layer located beneath the topmost silicon layer. Next, a trench is formed within the Group III nitride device region to expose a sub-surface of the <111> silicon layer. The trench is then partially filled with a Group III nitride base material, wherein the Group III nitride material base material has a topmost surface that is coplanar with, or below, a topmost surface of the topmost silicon layer. |
| US09564523B1 |
Non-linear spin-orbit interaction devices and methods for current-to-spin conversion and amplification of spin-polarizations
The present invention is notably directed to a spin-orbit coupled device. This device comprises a confinement part. It further includes a circuitry, having an input device, energizable to inject spin-polarizations to charge carriers in an input region of the confinement part. The circuitry further comprises an output device, usable to detect spin-polarizations of charge carriers in an output region of the confinement part. The confinement part may be is configured to subject charge carriers drifting therein to a non-linear spin-orbit interaction, which causes to rotate a spin polarization of the drifting charge carriers by an angle that depends non-linearly on momenta of such charge carriers. The circuitry may be configured to allow momenta of charge carriers drifting in the confinement part to be varied, while injecting spin-polarizations in the input region. Varying momenta allows spin-polarizations of drifting charge carriers to be rotated, owing to said non-linear spin-orbit interaction. |
| US09564521B2 |
Semiconductor device comprising ferroelectric elements and fast high-K metal gate transistors
A semiconductor device comprises a first and second circuit element. The first circuit element comprises a first electrode structure including a first high-k dielectric layer, the first high-k dielectric layer having a first thickness and comprising hafnium. The second circuit element comprises a second electrode structure that includes a second high-k dielectric layer having a ferroelectric behavior, wherein the second high-k dielectric layer has a second thickness and comprises hafnium, and wherein the second thickness is greater than the first thickness. |
| US09564519B2 |
Non-volatile memory devices and manufacturing methods thereof
There is provided a method of manufacturing a non-volatile memory device including: alternatively stacking a plurality of insulating layers and a plurality of conductive layers on a top surface of a substrate; forming an opening that exposes the top surface of the substrate and lateral surfaces of the insulating layers and the conductive layers; forming an anti-oxidation layer on at least the exposed lateral surfaces of the conductive layers; forming a gate dielectric layer on the anti-oxidation layer, the gate dielectric layer including a blocking layer, an electric charge storage layer, and a tunneling layer that are sequentially formed on the anti-oxidation layer; and forming a channel region on the tunneling layer. |
| US09564518B2 |
Method and apparatus for source-drain junction formation in a FinFET with in-situ doping
A portion of a bulk silicon (Si) is formed into a fin, having a fin base and, on the fin base, an in-process fin. The fin base is doped Si and the in-process fin is silicon germanium (SiGe). The in-process SiGe fin has a source region and a drain region. Boron is in-situ doped into the drain region and into the source region. Optionally, boron is in-situ doped by forming an epi-layer, having boron, on the drain region and on the source region, and drive-in annealing to diffuse boron in the source region and the drain region. |
| US09564517B2 |
Method for manufacturing semiconductor device
To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used. |
| US09564515B2 |
Semiconductor device having super junction structure and method for manufacturing the same
A semiconductor device having a super junction structure includes a substrate, an epitaxial layer of a first conductivity type, a first trench, a first doped region of a second conductivity type opposite to the first conductivity type, a second trench and a second doped region of the first conductivity type. The epitaxial layer of the first conductivity type is over the substrate. The first trench is in the epitaxial layer. The first doped region of the second conductivity type is in the epitaxial layer and surrounds the first trench. The second trench is in the epitaxial layer and separated from the first trench. The second doped region of the first conductivity type is in the epitaxial layer and surrounds the second trench. The second doped region has a dopant concentration greater than a dopant concentration of the epitaxial layer. A method for manufacturing the semiconductor device is also provided. |
| US09564512B2 |
Fin field-effect transistor and fabrication method thereof
A method for fabricating a FinFET structure comprises providing a semiconductor substrate; forming a hard mask layer on the semiconductor substrate; forming a dummy gate structure having a dummy gate, a first sidewall spacer and a second sidewall spacer; removing the dummy gate to form a first trench; forming first sub-fins in the semiconductor substrate under the hard mask layer in the first trench; forming a first metal gate structure in the first trench; removing the first sidewall spacer to form a second trench; forming second sub-fins in the semiconductor substrate under the hard mask layer in the second trench; forming a second metal gate structure in the second trench; removing the second sidewall spacer to form a third trench; forming third sub-fins in the semiconductor substrate under the hard mask layer in the third trench; and forming a third metal gate structure in the third trench. |
| US09564510B2 |
Method of fabricating a MOSFET with an undoped channel
A method of fabricating a MOSFET with an undoped channel is disclosed. The method comprises fabricating on a substrate a semiconductor structure having a dummy poly gate, dummy interlayer (IL) oxide, and a doped channel. The method further comprises removing the dummy poly gate and the dummy IL oxide to expose the doped channel, removing the doped channel from an area on the substrate, forming an undoped channel for the semiconductor structure at the area on the substrate, and forming a metal gate for the semiconductor structure. Removing the dummy poly gate may comprise dry and wet etch operations. Removing the dummy IL oxide may comprise dry etch operations. Removing the doped channel may comprise anisotropic etch operations on the substrate. Forming an undoped channel may comprise applying an epitaxial process to grow the undoped channel. The method may further comprise growing IL oxide above the undoped channel. |
| US09564508B2 |
Device isolation with improved thermal conductivity
A method of making a semiconductor structure includes forming a trench through a shallow trench isolation (STI) structure and into a substrate, and forming a liner including an electrical insulator material on sidewalls of the trench. The method also includes forming a core including a high thermal conductivity material in the trench and on the liner, and forming a cap in the trench and on the core. |
| US09564507B2 |
Interlayer dielectric layer with two tensile dielectric layers
A semiconductor device is disclosed. The semiconductor device includes: a substrate; a first tensile dielectric layer on the substrate; a metal gate in the first tensile dielectric layer; a second tensile dielectric layer on the first tensile dielectric layer; and a contact plug in the first tensile dielectric layer and the second tensile dielectric layer. Preferably, the top surface of the contact plug is even with the top surface of the second tensile dielectric layer, and a carbon content of the second tensile dielectric layer is greater than the carbon content of the first tensile dielectric layer. |
| US09564506B2 |
Low end parasitic capacitance FinFET
Embodiments of the present invention provide methods for fabricating a semiconductor device. One method may include providing a semiconductor substrate with fins etched into the semiconductor substrate; forming a gate structure and depositing an insulating material around the gate structure; selectively etching an active device area; forming a set of spacers on the sides of the gate structure; growing a doped source and drain region; depositing an insulator over an upper surface of a deposited etch stop layer; and depositing a metal into a contact opening to form one or more contacts. |
| US09564505B2 |
Changing effective work function using ion implantation during dual work function metal gate integration
Ion implantation to change an effective work function for dual work function metal gate integration is presented. One method may include forming a high dielectric constant (high-k) layer over a first-type field effect transistor (FET) region and a second-type FET region; forming a metal layer having a first effective work function compatible for a first-type FET over the first-type FET region and the second-type FET region; and changing the first effective work function to a second, different effective work function over the second-type FET region by implanting a species into the metal layer over the second-type FET region. |
| US09564504B2 |
Semiconductor device and method of manufacturing semiconductor device
A manufacturing method according to an embodiment of this invention is a method of manufacturing a semiconductor device, which has: a first step of forming a first electrode 22 containing Ti or Ta on a top face of a nitride semiconductor layer 18; a second step of forming a second electrode 24 containing Al on a top face of the first electrode 22; a third step of forming a coating metal layer 26 covering at least one of an edge of a top face of the second electrode 24 and a side face of the second electrode 24, having a window 26a exposing the top face of the second electrode 24 in a region separated from the foregoing edge, and containing at least one of Ta, Mo, Pd, Ni, and Ti; and a step of performing a thermal treatment, after the third step. |
| US09564503B2 |
Semiconductor device and method of manufacturing semiconductor device
A manufacturing method according to an embodiment of this invention is a method of manufacturing a semiconductor device, which has: a first step of forming a first electrode 22 containing Ti or Ta on a top face of a nitride semiconductor layer 18; a second step of forming a second electrode 24 containing Al on a top face of the first electrode 22; a third step of forming a coating metal layer 26 covering at least one of an edge of a top face of the second electrode 24 and a side face of the second electrode 24, having a window 26a exposing the top face of the second electrode 24 in a region separated from the foregoing edge, and containing at least one of Ta, Mo, Pd, Ni, and Ti; and a step of performing a thermal treatment, after the third step. |
| US09564501B2 |
Reduced trench profile for a gate
The present disclosure is directed to a gate structure for a transistor. The gate structure is formed on a substrate and includes a trench. There are sidewalls that line the trench. The sidewalls have a first dimension at a lower end of the trench and a second dimension at an upper end of the trench. The first dimension being larger than the second dimension, such that the sidewalls are tapered from a lower region to an upper region. A high k dielectric liner is formed on the sidewalls and a conductive liner is formed on the high k dielectric liner. A conductive material is in the trench and is adjacent to the conductive liner. The conductive material has a first dimension at the lower end of the trench that is smaller than a second dimension at the upper end of the trench. |
| US09564498B2 |
Transistor with elevated drain termination
According to an exemplary implementation, a transistor includes drain finger electrodes interdigitated with source finger electrodes. The transistor also includes a current conduction path in a semiconductor substrate between the drain finger electrodes and the source finger electrodes. At least one of the drain finger electrodes has a drain finger electrode end and a drain finger electrode main body, where the drain finger electrode main body is non-coplaner with at least a portion of the drain finger electrode end. The transistor may also include a dielectric material situated between at least a portion of the drain finger electrode end and the semiconductor substrate. The dielectric material can be an increasing thickness dielectric material. The dielectric material can thus elevate the drain finger electrode end over the semiconductor substrate. Further, the drain finger electrode end can have an increased radius of curvature. |
| US09564497B2 |
High voltage field effect transitor finger terminations
A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation. |
| US09564488B2 |
Strained isolation regions
A method of forming an isolation trench having localized stressors is provided. In accordance with embodiments of the present invention, a trench is formed in a substrate and partially filled with a dielectric material. In an embodiment, the trench is filled with a dielectric layer and a planarization step is performed to planarize the surface with the surface of the substrate. The dielectric material is then recessed below the surface of the substrate. In the recessed portion of the trench, the dielectric material may remain along the sidewalls or the dielectric material may be removed along the sidewalls. A stress film, either tensile or compressive, may then be formed over the dielectric material within the recessed portion. The stress film may also extend over a transistor or other semiconductor structure. |
| US09564486B2 |
Self-aligned dual-height isolation for bulk FinFET
A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region. |
| US09564485B2 |
Switch driving circuit, inverter apparatus and power steering apparatus
A switch driving circuit electrically opens and closes a switch circuit including two N-channel type semiconductor switching elements series connected in a reverse direction, thereby electrically opening and closing a path between a DC power supply and an inverter circuit. The switch driving circuit has a reference potential point in common with the inverter circuit and supplies an opening/closing control signal to the switch circuit. The switch driving circuit includes a half bridge circuit including two semiconductor switching elements series connected between a driving power supply and the reference potential point. Two protection diodes are connected in parallel to the semiconductor switching elements respectively. At least one current blocking diode is configured to block current from flowing from the reference potential point through the diode to the switch circuit side when the DC power supply is connected to the inverter circuit in reverse polarity. |
| US09564484B2 |
Metal-insulator-metal back end of line capacitor structures
Embodiments of the present invention provide improved metal-insulator-metal (MIM) capacitors. In embodiments, series resistance is reduced by forming a via underneath the bottom plate of a MIM capacitor, leading to a metallization layer or intermediate metal sublayer. In embodiments, the MIM capacitor is formed with a corrugated shape to increase the plate surface area, allowing a thicker dielectric to be used, thereby mitigating leakage issues. |
| US09564483B2 |
Display device and manufacturing method thereof
A display device comprises a base substrate, a first metal layer formed over the base substrate, an interlayer insulating layer formed over the first metal layer and comprising a contact hole, a second metal layer formed over the interlayer insulating layer and connected with the first metal layer through the contact hole, an anisotropic conductive film formed over the second metal layer and covering the contact hole, and a flexible circuit board attached to the anisotropic conductive film and configured to transmit a driving signal for the array of pixels. The first metal layer comprises a molten portion formed in the non-display area. |
| US09564481B2 |
Fully-printed carbon nanotube thin film transistor circuits for organic light emitting diode
The subject technology relates to a method including steps for disposing a first electrically conductive material on a substrate to form a first layer of electrodes on the substrate, wherein the first layer includes a source electrode and a drain electrode, and printing a film including carbon nanotubes between the source electrode and the drain electrode, thereby defining at least a first interface between the carbon nanotube film and the source electrode and a second interface between the carbon nanotube film and drain electrode. In certain aspects, the method can further include steps for disposing a second electrically conductive material over the first interface between the carbon nanotube film and the source electrode and the second interface between the carbon nanotube film and the drain electrode. In certain aspects, a transistor device is also provided. |
| US09564477B2 |
Flexible display device and method of fabricating the same
A flexible display device includes a substrate, a plurality of first pixels, and a plurality of second pixels. The substrate includes a foldable bending region and a non-foldable non-bending region. Each first pixel is disposed on the bending region. Each first pixel is spaced apart from an adjacent first pixel by a first distance. Each second pixel is disposed on the non-bending region. Each second pixel is spaced apart from an adjacent second pixel by a second distance. The first distance is greater than the second distance. |
| US09564476B2 |
Organic light emitting diode display
An organic light emitting display device comprises a common voltage line formed over a peripheral region of a substrate; a passivation layer formed over a pixel region of the substrate and the peripheral region; pixel electrodes formed over the pixel region; and a pixel defining layer formed over the pixel region and the peripheral region. The pixel defining layer defines pixel openings overlapping the pixel electrodes, respectively. The device further comprises organic light emitting layers formed over the pixel region, and disposed in the pixel openings and over the pixel electrodes, respectively; and a common electrode formed over the pixel and peripheral regions. The common electrode is disposed over the pixel defining layer and the organic light emitting layers. The common electrode contacts the common voltage line. The passivation layer comprises a portion overlapping the common voltage line but not overlapping the pixel defining layer. |
| US09564462B2 |
Image-sensor structures
An image-sensor structure is provided. The image-sensor structure includes a substrate, a plurality of photoelectric conversion units formed in the substrate, and a plurality of color filter patterns including a red filter pattern having a first refractive index, a green filter pattern having a second refractive index and a blue filter pattern having a third refractive index formed above the substrate and the photoelectric conversion units, wherein at least one color filter pattern contains a component having a specific refractive index such that the second refractive index of the green filter pattern is higher than the first refractive index of the red filter pattern and the third refractive index of the blue filter pattern. |
| US09564458B2 |
TFT substrates and the manufacturing method thereof
A TFT substrate and the manufacturing method thereof are disclosed. The method includes: providing a substrate; forming a gate electrode on the substrate; forming a first insulation layer and an active layer on the gate electrode in turn; forming a first black matrix on the active layer; forming a source electrode and a drain electrode on the first black matrix; forming a second insulation layer on the source electrode and the drain electrode; and forming a pixel electrode on the second insulation layer. The pixel electrode is electrically connected to the source electrode or the drain electrode via the second insulation layer. In this way, the masking effect of the display panel assembled by the TFT substrate can be ensured. In addition, the coupling capacitance between the data line and the scanning line may be reduced. |
| US09564455B2 |
Display panel
A display panel is provided. The display panel includes has an active area and a border area surrounding the active area. The display panel includes a plurality of pixels, a plurality of multiplexer portion, a gate driver portion and a source routing portion. The pixels are located in the active area. The multiplexer portion is located in the border area. The gate driver portion is located in the border area. The source routing portion is located in the border area. In part of the border area, at least part of the multiplexer portion, at least part of the gate driver portion and at least part of the source routing portion are located and sequentially arranged from an internal edge of the border area to an external edge of the border area. |
| US09564451B1 |
Semiconductor device and manufacturing method thereof
A semiconductor device may include a substrate, conductive patterns stacked to be spaced apart from each other on the substrate, contact plugs coming in contact with the respective conductive patterns, and first and second slit insulating layers of a first group penetrating the conductive patterns. The substrate may include a cell area and a contact area extending along a first direction from the cell area. The conductive patterns may be form a step structure. The first slit insulating layers of the first group may be opposite to each other in a second direction with any one of the contact plugs, interposed therebetween. The second slit insulating layers of the first group, which extend along the first direction in the contact area, may be opposite to each other in the second direction with the first slit insulating layers of the first group and the contact plugs, interposed therebetween. |
| US09564450B2 |
Nonvolatile semiconductor memory device and method of manufacturing the same
According to one embodiment, a memory device includes first and second fin type stacked structures each includes first to i-th memory strings (i is a natural number except 1) that are stacked in a first direction, the first and second fin type stacked structures which extend in a second direction and which are adjacent in a third direction, a first portion connected to one end in the second direction of the first fin type stacked structure, a width in the third direction of the first portion being greater than a width in the third direction of the first fin type stacked structure, and a second portion connected to one end in the second direction of the second fin type stacked structure, a width in the third direction of the second portion being greater than a width in the third direction of the second fin type stacked structure. |
| US09564448B2 |
Flash memory structure
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a control gate formed over the substrate. The semiconductor device structure further includes a memory gate formed over the substrate and a first spacer formed on a sidewall of the memory gate. The semiconductor device structure further includes a contact formed over the memory gate, wherein a portion of the contact extends into the first spacer. |
| US09564444B2 |
Method of forming integrated fin and strap structure for an access transistor of a trench capacitor
At least one dielectric pad layer is formed on a semiconductor-on-insulator (SOI) substrate. A deep trench is formed in the SOI substrate, and a combination of an outer electrode, a node dielectric, and an inner electrode are formed such that the top surface of the inner electrode is recessed below the top surface of a buried insulator layer of the SOI substrate. Selective epitaxy is performed to fill a cavity overlying the inner electrode with an epitaxial semiconductor material portion. A top semiconductor material layer and the epitaxial semiconductor material portion are patterned to form a fin structure including a portion of the top semiconductor material layer and a portion of the epitaxial semiconductor material portion. The epitaxial semiconductor material portion functions as a conductive strap structure between the inner electrode and a semiconductor device to be formed on the fin structure. |
| US09564441B2 |
Two-transistor SRAM semiconductor structure and methods of fabrication
A two-transistor memory cell based upon a thyristor for an SRAM integrated circuit is described together with a process for fabricating it. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM. |
| US09564439B2 |
Structure and method for advanced bulk fin isolation
A non-planar semiconductor structure containing semiconductor fins that are isolated from an underlying bulk silicon substrate by an epitaxial semiconductor stack is provided. The epitaxial semiconductor material stack that provides the isolation includes, from bottom to top, a semiconductor punch through stop containing at least one dopant of a conductivity type which differs from the conductivity type of the particular device region that the semiconductor fin is formed in, and a semiconductor diffusion barrier layer containing no n- or p-type dopant. |
| US09564435B2 |
Semiconductor device including FinFETs having different gate structures and method of manufacturing the semiconductor device
A semiconductor device includes a substrate having a logic device region including logic devices thereon, and an input/output (I/O) device region including I/O devices thereon adjacent the logic device region. A first fin field-effect transistor (FinFET) on the logic device region includes a first semiconductor fin protruding from the substrate, and a triple-gate structure having a first gate dielectric layer and a first gate electrode thereon. A second FinFET on the I/O device region includes a second semiconductor fin protruding from the substrate, and a double-gate structure having a second gate dielectric layer and a second gate electrode thereon. The first and second gate dielectric layers have different thicknesses. Related devices and fabrication methods are also discussed. |
| US09564431B2 |
Semiconductor structures and methods for multi-level work function
A semiconductor structure is provided comprising a vertical channel structure extending from a substrate and formed as a channel between a source region and a drain region. The semiconductor structure further comprises a metal gate that surrounds a portion of the vertical channel structure. The metal gate has a gate length. The metal gate has a first gate section with a first workfunction and a first thickness. The metal gate also has a second gate section with a second workfunction and a second thickness. The first thickness level is different from the second thickness level and the sum of the first thickness level and the second thickness level is equal to the gate length. The ratio of the first thickness level to the second thickness level for the gate length was chosen to achieve a threshold voltage level for the semiconductor device. |
| US09564424B2 |
ESD device and structure therefor
In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is configured to enable a transistor or a transistor of an SCR responsively to an input voltage having a value that is no less than the trigger value of the ESD device. |
| US09564422B2 |
Light emitting device and light emitting device package
A light emitting device according to the embodiment includes a support substrate; a first light emitting structure disposed on the support substrate and including a first conductive type first semiconductor layer, a first active layer, and a second conductive type second semiconductor layer; a first reflective electrode under the first light emitting structure; a first metal layer around the first reflective electrode; a second light emitting structure disposed on the support substrate and including a first conductive type third semiconductor layer, a second active layer, and a second conductive type fourth semiconductor layer; a second reflective electrode under the second light emitting structure; a second metal layer around the second reflective electrode; and a contact part making contact with an inner portion of the first conductive type first semiconductor layer of the first light emitting structure and electrically connected to the second reflective electrode. |
| US09564421B2 |
Semiconductor device
A semiconductor device includes a first substrate, a second substrate stacked over the first substrate, and a pillar member extending obliquely between the first and second substrates. The first substrate includes a mounting surface on which a semiconductor chip is mounted, with a resin interposed between the semiconductor chip and the mounting surface and extending beyond the periphery of the semiconductor chip on the mounting surface. The first substrate further includes a first pad forming part of the mounting surface and disposed outside the resin. The second substrate includes a second pad forming part of its surface facing toward the mounting surface. The second pad at least overlaps the resin when viewed in a direction in which the second substrate is stacked over the first substrate. The pillar member has first and second ends joined to the first and second pads, respectively, to electrically connect the first and second substrates. |
| US09564420B2 |
Functional block stacked 3DIC and method of making same
An embodiment device package includes a fan-out redistribution layer (RDL), a device over and bonded to the fan-out RDL, and a molding compound over the fan-out RDL and extending along sidewalls of the device. The device includes a first functional tier having a first metallization layer and a second functional tier having a second metallization layer. The second functional tier is bonded to the first functional tier. The device further includes an interconnect structure electrically connecting the first metallization layer to the second metallization layer. The interconnect structure includes an inter-tier via (ITV) at least partially disposed in both the first functional tier and the second functional tier, and the ITV contacts the first metallization layer. |
| US09564417B2 |
Multi-stacked structures of semiconductor packages
A multi-stacked structure of semiconductor packages includes a plurality of substrates stacked in a vertical direction, semiconductor packages mounted on each substrate of the plurality of the substrates, a heat release column extending commonly through the plurality of the substrates and overlapping at least one semiconductor package serving as a heat generation source among the semiconductor packages in the vertical direction, and a heat dissipation part thermally connected to one end of the heat release column. |
| US09564416B2 |
Package structures and methods of forming the same
Packages structure and methods of forming them are discussed. A structure includes a first die, a first encapsulant at least laterally encapsulating the first die, and a redistribution structure on the first die and the first encapsulant. The second die is attached by an external electrical connector to the redistribution structure. The second die is on an opposite side of the redistribution structure from the first die. A second encapsulant is on the redistribution structure and at least laterally encapsulates the second die. The second encapsulant has a surface distal from the redistribution structure. A conductive feature extends from the redistribution structure through the second encapsulant to the surface of the second encapsulant. A conductive pillar is on the conductive feature, and the conductive pillar protrudes from the surface of the second encapsulant. |
| US09564415B2 |
Semiconductor package device having passive energy components
A semiconductor package device is disclosed that includes a passive energy component integrated therein. In an implementation, the semiconductor package device includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes one or more integrated circuits formed proximal to the first surface. The semiconductor package device also includes a passive energy component positioned over the second surface. The passive energy component is electrically connected to one or more integrated circuits. The semiconductor package device also includes an encapsulation structure disposed over the second surface and at least substantially encapsulates the passive energy component. |
| US09564414B2 |
Three dimensional device integration method and integrated device
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures. |
| US09564411B2 |
Semiconductor package and method of manufacturing the same
Disclosed herein is a semiconductor package having a fan-out structure in which a semiconductor chip is buried by an encapsulation member and an external connection member is disposed below the buried semiconductor chip. The semiconductor package includes an embedded rewiring pattern layer, an upper semiconductor chip disposed above the embedded rewiring pattern layer, an upper encapsulation member encapsulating the upper semiconductor chip, a lower semiconductor chip disposed below the embedded rewiring pattern layer, and a lower encapsulation member encapsulating the lower semiconductor chip to prevent exposure thereof. |
| US09564407B2 |
Crosstalk polarity reversal and cancellation through substrate material
Transmission lines with a first dielectric material separating signal traces and a second dielectric material separating the signal traces from a ground plane. In embodiments, mutual capacitance is tuned relative to self-capacitance to reverse polarity of far end crosstalk between a victim and aggressor channel relative to that induced by other interconnect portions along the length of the channels, such as inductively coupled portions. In embodiments, a transmission line for a single-ended channel includes a material of a higher dielectric constant within the same routing plane as a microstrip or stripline conductor, and a material of a lower dielectric constant between the conductor and the ground plane(s). In embodiments, a transmission line for a differential pair includes a material of a lower dielectric constant within the same routing plane as a microstrip or stripline conductors, and a material of a higher dielectric constant between the conductors and the ground plane(s). |
| US09564404B2 |
System, method and apparatus to relieve stresses in a semiconductor wafer caused by uneven internal metallization layers
Systems and methods for forming semiconductor wafers with wafer support structures includes: multiple semiconductor devices formed in multiple semiconductor dies. An electrical interconnect structure is formed over the semiconductor devices and providing electrical connections to the semiconductor devices. The electrical interconnect structure includes multiple metallization layers. At least one portion of at least one metallization layer includes variations in density of conductive lines or conducting devices as compared to the other portions of the metallization layers. At least one wafer support structure is formed substantially across a width of the semiconductor wafer. The semiconductor wafer being thinned to between about 40 um and about 200 um after the semiconductor devices formed thereon. The at least one wafer support structure having a thickness and a width to offset physical stresses caused by the variations in density of conductive lines or conducting devices in the respective portions of the metallization layers. |
| US09564400B2 |
Methods of forming stacked microelectronic dice embedded in a microelectronic substrate
Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material. |
| US09564398B2 |
Chemical direct pattern plating interconnect metallization and metal structure produced by the same
A semiconductor structure with an improved metal structure is described. The semiconductor structure can include a substrate having an upper surface, an interconnect layer over the upper surface, and an additional structure deposited over the interconnect layer. The interconnect layer can include a patterned seed layer over the substrate, at least two metal lines over the seed layer, and a dielectric material between adjacent metal lines. A barrier layer can be deposited over the at least two metal lines. Methods of making the semiconductor structures are also described. |
| US09564397B2 |
Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a low-k (LK) dielectric layer over a substrate; a first conductive feature and a second conductive feature in the LK dielectric layer; a first spacer along a first sidewall of the first conductive feature; a second spacer along a second sidewall of the second conductive feature, wherein the second sidewall of the second conductive feature faces the first sidewall of the first conductive feature; an air gap between the first spacer and the second spacer; and a third conductive feature over the first conductive feature, wherein the third conductive feature is connected to the first conductive feature. |
| US09564392B2 |
Printed wiring board and semiconductor package
A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the conductor layer has a first surface exposed on a first surface side of the insulating layer, and a conductor post formed on a second surface of the conductor layer on the opposite side with respect to the first surface such that the conductor post has a side surface covered by the insulating layer. The conductor post has an end surface on the opposite with respect to the conductor layer such that the end surface of the conductor post is exposed on a second surface side of the insulating layer, and the conductor post has an end portion on a wiring conductor layer side such that the side surface in the end portion is a curved side surface which is bending outward increasingly toward from the conductor layer. |
| US09564390B2 |
Package structure and fabrication method thereof
A package structure is provided, which includes: a dielectric layer having opposite first and second surfaces; a first circuit layer embedded in the dielectric layer and having a surface exposed from the first surface of the dielectric layer; a plurality of conductive posts embedded in the dielectric layer and electrically connected to the first circuit layer and having one ends exposed from the second surface of the dielectric layer; a second circuit layer formed on the second surface of the dielectric layer and electrically connected the ends of the conductive posts exposed from the second surface of the dielectric layer; and a plurality of protruding elements formed on the surface of the first circuit layer exposed from the first surface of the dielectric layer, thereby providing a large contact area so as to strengthen bonding between a semiconductor chip and the first circuit layer of the package structure. |
| US09564385B2 |
Package for a semiconductor device
A package for a semiconductor device or circuit comprises a semiconductor switch module having a metallic base on an exterior side and metallic pads. A sealed metallic enclosure holds the semiconductor switch module. The metallic enclosure has a set of dielectric regions with embedded or pass-through electrical terminals that are electrically insulated or isolated from the sealed metallic enclosure. The electrical terminals are electrically connected to the metallic pads. A housing is adapted for housing the semiconductor switch module within the metallic enclosure. The housing comprises chamber for holding or circulating a coolant overlying the metallic base. |
| US09564380B2 |
Marker pattern for enhanced failure analysis resolution
A marker pattern for enhancing resolution of a defect location along an axis in semiconductor defect analysis, and in particular, a marker pattern providing greater resolution in locating bit line defects using thermal laser stimulation methods such as OBIRCH. In an example, the marker pattern may consist of large markers, each having a set of associated small markers. Each of the small markers may be offset along an axis from each other. By identifying the small marker and its associated large marker which align with the defect, the bit line containing the defect may be more easily identified. |
| US09564379B2 |
Via chains for defect localization
Via chain and serpentine/comb test structures are in kerf areas of a wafer. The via chain test structures comprise a first via chain and a second via chain in a first kerf area. The via chain test structures are formed such that geometrically shaped portions of the first via chain and geometrically shaped portions of the second via chain alternate along the length of the first kerf area. |
| US09564376B2 |
Semiconductor process
The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units. |
| US09564373B2 |
Forming a CMOS with dual strained channels
The present invention relates generally to a semiconductor device, and more particularly, to a structure and method of forming a compressive strained layer and a tensile strained layer on the same wafer. A lower epitaxial layer may be formed adjacent to a tensile strained layer. An upper epitaxial layer may be formed over a portion of the lower epitaxial layer. Thermal oxidation may convert the upper epitaxial layer to an upper oxide layer, and thermal condensation may causes a portion of the lower epitaxial layer to become a compressive strained layer. The upper oxide layer and a remaining portion of the lower epitaxial layer may be removed, leaving the tensile strained layer and the compressive strained layer. |
| US09564372B2 |
Dual liner silicide
A method for fabricating a dual silicide device includes growing source and drain (S/D) regions for an N-type device, forming a protection layer over a gate structure and the S/D regions of the N-type device and growing S/D regions for a P-type device. A first dielectric layer is conformally deposited and portions removed to expose the S/D regions. Exposed S/D regions for the P-type device are silicided to form a liner. A second dielectric layer is conformally deposited. A dielectric fill is formed over the second dielectric layer. Contact holes are opened through the second dielectric layer to expose the liner for the P-type device and expose the protection layer for the N-type device. The S/D regions for the N-type device are exposed by opening the protection layer. Exposed S/D regions adjacent to the gate structure are silicided to form a liner for the N-type device. Contacts are formed. |
| US09564371B2 |
Method for forming semiconductor device
A manufacturing method for forming a semiconductor device includes: first, a substrate is provided, a fin structure is formed on the substrate, and a plurality of gate structures are formed on the fin structure, next, a hard mask layer and a first photoresist layer are formed on the fin structure, an first etching process is then performed on the first photoresist layer, afterwards, a plurality of patterned photoresist layers are formed on the remaining first photoresist layer and the remaining hard mask layer, where each patterned photoresist layer is disposed right above each gate structure, and the width of each patterned photoresist is larger than the width of each gate structure, and the patterned photoresist layer is used as a hard mask to perform an second etching process to form a plurality of second trenches. |
| US09564370B1 |
Effective device formation for advanced technology nodes with aggressive fin-pitch scaling
After forming a gate stack straddling a portion of each semiconductor fin of a plurality of semiconductor fins located over a substrate, a gate liner is formed on sidewalls of a lower portion of the gate stack that contacts the plurality of semiconductor fins and a gate spacer having a width greater than a width of the gate liner is formed on sidewalls of an upper portion of the gate stack that is located above the plurality of semiconductor fins. The width of the gate spacer thus is not limited by the fin pitch, and can be optimized to improve the device performance. |
| US09564366B2 |
Method and apparatus for plasma dicing a semi-conductor wafer
The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma. |
| US09564365B2 |
Method of singulating semiconductor wafer having back layer
In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. |
| US09564362B2 |
Interconnects based on subtractive etching of silver
A method for forming at least one Ag or Ag based alloy feature in an integrated circuit, including providing a blanket layer of Ag or Ag based alloy in a multi-layer structure on a substrate. The method further includes providing a hard mask layer over the blanket layer of Ag or Ag based alloy. The method further includes performing an etch of the blanket layer of Ag or Ag based alloy, wherein a portion of the blanket layer of Ag or Ag based alloy that remains after the etch forms one or more conductive lines. The method further includes forming a liner that surrounds the one or more conductive lines. The method further includes depositing a dielectric layer on the multi-layer structure. |
| US09564360B2 |
Substrate processing method and method of manufacturing semiconductor device
An object of the present invention is to provide a method which enable a material to be fully embedded into a recess portion with a deposition film left in the recess portion. A method in one embodiment comprises: a first irradiation step of irradiating a deposition film formed on an opening portion of a recess portion in a substrate with a particle beam in a direction at a first angle with respect to a substrate in-plane direction, to remove part of the deposition film in a thickness direction; and a second irradiation step of, after the first irradiation step, irradiating the deposition film with the particle beam in a direction at a second angle which is closer to perpendicular to the substrate in-plane direction than the first angle is, to remove part of the remaining deposition film in the thickness direction. |
| US09564358B1 |
Forming reliable contacts on tight semiconductor pitch
A method of forming a semiconductor device includes forming a trench in a passivating layer between neighboring fins. A barrier is formed in the trench. Conductive contacts are formed in the passivating layer to provide electrical connectivity to the fins. The conductive contacts are in direct contact with sidewalls of the barrier. A semiconductor device includes a passivating layer over a pair of fins. A barrier extends through the passivating layer and between the pair of fins and that electrically isolates the fins. Electrical contacts are formed through the passivating layer to the fins. The electrical contacts directly contact sidewalls of the barrier. |
| US09564353B2 |
FinFETs with reduced parasitic capacitance and methods of forming the same
An integrated circuit structure includes a semiconductor substrate, a semiconductor strip over a portion of the semiconductor substrate, and a Shallow Trench Isolation (STI) region on a side of the semiconductor strip. The STI region includes a dielectric layer, which includes a sidewall portion on a sidewall of the semiconductor strip and a bottom portion. The dielectric layer has a first etching rate when etched using a diluted HF solution. The STI region further includes a dielectric region over the bottom portion of the dielectric layer. The dielectric region has an edge contacting an edge of the sidewall portion of the dielectric layer. The dielectric region has a second etching rate when etched using the diluted HF solution, wherein the second etching rate is smaller than the first etching rate. |
| US09564351B2 |
Positioning frame structure
A positioning frame structure for the centering and positioning of an IC is disclosed, in which the positioning frame structure comprises an IC carrier having a first chamber defined therein and an IC positioning magnet disposed in the first chamber of the IC carrier. The positioning frame structure further comprises an IC holder disposed over the IC positioning magnet, and the IC is held on the IC holder, so as to provide centering and positioning of the IC relative to the IC positioning magnet. The present invention can be used to control the centering and positioning of the IC and the positioning magnet on the carrier. The positioning magnet can be made to be larger than the IC. In addition, a large air gap can be obtained so as to facilitate the subsequent operation of the IC. Furthermore, without the operation using adhesive, the technical solution of the present invention saves the cost of operation. |
| US09564348B2 |
Shutter blade and robot blade with CTE compensation
Processing chamber shutter blade and robot blade assemblies are constructed to eliminate thermal effects on the placement of elements in processing chambers. Such blade assemblies may contain at least two parts, which may include a positioning member including a low CTE material and a thermal compensating member including a high CTE material. The positioning member includes a coupling point and a reference point on a reference axis separated by a first distance. The thermal compensating member includes a connection point and a controlled point separated by another distance that is less than the first distance. A distance ratio of the first distance to the other distance is substantially equal to a CTE ratio of the high CTE material to the low CTE material, and the positioning member is joined to the thermal compensating member through the coupling point and the connection point. |
| US09564336B2 |
NOR flash device manufacturing method
An embodiment of a NOR Flash device manufacturing method includes: providing a substrate having a first polycrystalline silicon layer disposed thereon; forming a first hard mask layer on the first polycrystalline silicon layer; etching the first hard mask layer to form a first opening, and cleaning a gas pipeline connected to an etching cavity before etching the first hard mask layer; forming a second hard mask layer on the first hard mask layer, and the second hard mask layer covers the bottom and side wall of the first opening; etching the second hard mask layer to form a second opening, the width of the second opening is smaller than the width of the first opening; etching the first polycrystalline silicon, forming a floating gate. The NOR Flash device manufacturing method improves the yield of the NOR Flash device. |
| US09564327B2 |
Method for forming line end space structure using trimmed photo resist
One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of the first patterned second HM region or the first HM region. Photo resist (PR) is patterned above the second sacrificial HM region, and a spacer region is deposited above the patterned PR and second sacrificial HM region. In some embodiments, at least some of at least one of the spacer region, the PR, or the respective sacrificial HMs is removed. In this way, a line end space structure associated with an end-to-end space is formed. |
| US09564321B2 |
Cyclic epitaxial deposition and etch processes
A cyclic deposition and etch method is provided. The method includes depositing an epitaxial layer over a substrate at a first temperature and etching a portion of the deposited epitaxial layer at a variable temperature higher than the first temperature. The step of etching is performed while varying the temperature. |
| US09564320B2 |
Large area nitride crystal and method for making it
Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors. |
| US09564319B2 |
Method of fabricating transient semiconductor based on single-wall nanotube
A method of fabricating a transient semiconductor based on a single-wall nanotube includes stacking a thermal oxide layer on a silicon substrate and depositing a nickel thin layer on the thermal oxide layer, depositing an oxide layer on the nickel thin layer, depositing a metallic layer on the oxide layer, and patterning the metallic layer to form a gate electrode, depositing a gate insulating layer on the gate electrode, changing a surface of the gate insulating layer into a hydrophilic surface, and washing and drying the gate insulting layer, coating a single-wall nanotube on the hydrophilic surface of the gate insulating layer, forming source and drain electrodes by forming a contact opening with respect to the gate insulating layer, attaching a thermal release tape after removing a surrounding single-wall nanotube, performing a transfer onto a polyvinyl alcohol thin layer after etching the nickel thin layer, and releasing the thermal release. |
| US09564318B2 |
Method of manufacturing nanowire array using induced growth
Provided is a method of manufacturing a nanowire array using induced growth, in which a nitride inorganic nanowire is grown from a nitride seed by forming the nitride seed on a sapphire or silicon substrate, forming an organic nanowire pattern and a dielectric nanotunnel using the nanowire pattern as a template on the nitride seed, and using the nanotunnel as an induced growth mask. |
| US09564311B2 |
Method of depositing thin film
A method of depositing a thin film includes: repeating a first gas supply cycle a first plurality of times, the first gas supply cycle including supplying a source gas to a reaction space; supplying first plasma while supplying a reactant gas to the reaction space; repeating a second gas supply cycle a second plurality of times, the second gas supply cycle including supplying the source gas to the reaction space; and supplying second plasma while supplying the reactant gas to the reaction space, wherein the supplying of the first plasma includes supplying remote plasma, and the supplying of the second plasma includes supplying direct plasma. |
| US09564309B2 |
Si precursors for deposition of SiN at low temperatures
Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). |
| US09564301B2 |
Setting ion detector gain using ion area
A control system and method of determining a signal to noise (S/N) ratio of an ion detector system, including an ion detector, electron multiplier or photomultiplier, operates by determining an area of a noise peak, determining an area of a signal peak and determining a ratio of the area of the signal peak to the area of the noise peak. Based thereon, the signal to noise ratio can be optimized. The system has particular applicability for use in mass spectrometry. |
| US09564299B2 |
Methods of manufacturing large-area sputtering targets using interlocking joints
In various embodiments, joined sputtering targets are formed at least in part by spray deposition of the sputtering material and/or welding. |
| US09564297B2 |
Electron beam plasma source with remote radical source
In a plasma reactor for processing a workpiece, an electron beam is employed as the plasma source, and a remote radical source is incorporated with the process chamber. |
| US09564296B2 |
Radial waveguide systems and methods for post-match control of microwaves
A system provides post-match control of microwaves in a radial waveguide. The system includes the radial waveguide, and a signal generator that provides first and second microwave signals that have a common frequency. The signal generator adjusts a phase offset between the first and second signals in response to a correction signal. The system also includes first and second electronics sets, each of which amplifies a respective one of the first and second microwave signals. The system transmits the amplified, first and second microwave signals into the radial waveguide, and matches an impedance of the amplified microwave signals to an impedance presented by the waveguide. The system also includes at least two monitoring antennas disposed within the waveguide. A signal controller receives analog signals from the monitoring antennas, determines the digital correction signal based at least on the analog signals, and transmits the correction signal to the signal generator. |
| US09564293B2 |
Charged particle beam writing apparatus, and buffer memory data storage method
A charged particle beam writing apparatus includes a buffer memory including a memory region capable of contemporarily storing writing data for data processing regions, wherein writing data including data files is temporarily stored for each of the data processing regions, a dividing unit to divide the memory region of the buffer memory into a first region being large and a second region being small, a specifying unit to specify the memory region such that a data file being large is preferentially stored in the first region and a data file being small is stored at least in the second region, concerning the data files for each of the data processing regions included in the writing data, and a data processing unit to read data files corresponding to each of the data processing regions from the buffer memory, and to perform data processing using the read data files. |
| US09564292B2 |
Ion beam measuring device and method of measuring ion beam
An ion beam measuring device includes: a mask that is used for shaping an original ion beam into a measuring ion beam including a y beam part elongated in a y direction that is perpendicular to a traveling direction of the ion beam and an x beam part elongated in an x direction that is perpendicular to the traveling direction and the y direction; a detection unit that is configured to detect an x-direction position of the y beam part and a y-direction position of the x beam part; and a beam angle calculating unit that is configured to calculate an x-direction beam angle using the x-direction position and a y-direction beam angle using the y-direction position. |
| US09564289B2 |
Ion implanter and method of controlling the same
An ion implanter includes a high-voltage power supply, a control unit that generates a command signal controlling an output voltage of the high-voltage power supply, an electrode unit to which the output voltage is applied, and a measurement unit that measures an actual voltage applied to the electrode unit. The control unit includes a first generation section that generates a first command signal for allowing the high-voltage power supply to output a target voltage, a second generation section that generates a second command signal for complementing the first command signal so that the actual voltage measured by the measurement unit becomes or close to the target voltage, and a command section that brings to the high-voltage power supply a synthetics command signal which is produced by synthesizing the first command signal and the second command signal. |
| US09564283B2 |
Limiting migration of target material
In an electron irradiation system, a gas-tight housing encloses a cathode region and an irradiation region, which communicate through at least an aperture. In the cathode region, there is arranged a high-voltage cathode for emitting an electron beam. In the irradiation region, there is an irradiation site arranged to accommodate a stationary or moving object to be irradiated. The migration of cathode-degrading debris is limited by means of an electric field designed to prevent positively charged particles from entering the cathode region via the aperture. The invention can be embodied with an axial electric field, which realizes an energy threshold, or a transversal field which deflects charged particles away from trajectories leading into the cathode region. |
| US09564277B2 |
Systems and devices for reducing phantom load
Systems and devices are described herein for reducing a phantom load. The system may include a device for connection to a power source and a transformer or machine, wherein the device is configured to disconnect the transformer or machine from the power source under a predetermined load condition. The device may include a contactor, a current detector, a timer, and a controller. Portions of the current detector, timer, or controller may be implemented in a microcontroller. |
| US09564274B2 |
Metal complex dye, photoelectric conversion element, dye-sensitized solar cell, dye solution, and compound
A photoelectric conversion element, having: an electrically-conductive support; a photoconductor layer having a semiconductor fine-particle layer adsorbed a dye; a charge transfer layer containing an electrolyte; and a counter electrode; which are provided on one side of the support in this order, in which the dye has at least one terdentate ligand having at least one acidic group; at least one ligand coordinating to a metal atom M has an sp2 carbon atom; a cyclic group binds to the sp2 carbon atom; a specific substituent R is substituted at an atom of α- or β-position to the atom of the cyclic group directly binding to the sp2 carbon atom; and with the metal atom M, an atom G1 of the α- or β-position, and an atom G2 of the substituent R, an angle θ (∠MG1G2) is 150° or less. |
| US09564270B2 |
Thin film capacitor
A thin film capacitor is provided with a lower electrode layer, a dielectric layer arranged on the lower electrode layer, and an upper electrode layer formed on the dielectric layer. An insulator patch material, circular when projected from above, is formed at a boundary of the dielectric layer and the upper electrode layer of the thin film capacitor of this invention. The circular insulator patch improves a withstand voltage, by reducing accumulation of charges. |
| US09564264B2 |
High frequency integrated point-of-load power converter with embedded inductor substrate
A low profile power converter structure is provide wherein volume is reduced and power density is increased to approach 1 KW/in3 by at least one of forming an inductor as a body of magnetic material embedded in a substrate formed by a plurality of printed circuit board (PCB) lamina and forming inductor windings of PCB cladding and vias which may be of any desired number of turns and may include inversely coupled windings and which provide a lateral flux path, forming the body of magnetic material from high aspect ratio flakes of magnetic material which are aligned with the inductor magnetic field in an insulating organic binder and hot-pressed and providing a four-layer architecture comprising two layers of PCB lamina including the embedded body of magnetic material, a shield layer and an additional layer of PCB lamina, including cladding for supporting and connecting a switching circuit, a capacitor and the inductor. |
| US09564262B2 |
Superconducting magnetic field generating device, superconducting magnetic field generating method, and nuclear magnetic resonance apparatus
A superconducting magnetic field generating device includes: a superconductor including an outer superconductor formed with a high temperature superconducting material in a cylindrical shape and generating a trapped magnetic field, and an inner superconductor formed with a high temperature superconducting material in a cylindrical shape and coaxially disposed with the outer superconductor on the inner circumferential side; and a cooling device cooling the outer and inner superconductors to a temperature equal to or lower than the superconducting transition temperature, wherein the inner superconductor is formed so that a ratio (Jcθ1/Jcz1) of a critical current density (Jcθ1) of the inner superconductor in the circumferential direction to a critical current density (Jcz1) of the inner superconductor in the axial direction is closer to 1 than a ratio (Jcθ2/Jcz2) of the critical current density (Jcθ2) in the circumferential direction to a critical current density (Jcz2) of the outer superconductor of the outer superconductor in the axial direction. |
| US09564259B2 |
Superconducting wire and superconducting coil
A superconductor wire includes: a superconducting laminate that includes: a substrate and an intermediate layer; a superconductor layer, and a metal stabilization layer which are laminated on the substrate; and an insulation coating layer that covers an outer surface of the superconducting laminate and is formed by baking a resin material. Further, a maximum height Rz of at least a part of the outer surface of the superconducting laminate covered with the insulation coating layer is 890 nm or less. |
| US09564254B2 |
Aluminum alloy wire, and aluminum alloy twisted wire, covered electrical wire and wire harness using the same
An aluminum (Al) alloy wire, which is an extra fine wire having a wire diameter of 0.5 mm or less, contains, in mass %, Mg at 0.03% to 1.5%, Si at 0.02% to 2.0%, at least one element selected from Cu, Fe, Cr, Mn and Zr at a total of 0.1% to 1.0% and the balance being Al and impurities, and has an electrical conductivity of 40% IACS or more, a tensile strength of 150 MPa or more, and an elongation of 5% or more. By producing the extra fine wire from an Al alloy of a specific composition containing Zr, Mn and other specific elements, though the extra fine wire is extra fine, it has a fine structure with a maximum grain size of 50 μm or less and is superior in elongation. |
| US09564248B2 |
Inductive plasma source and plasma containment
A system and apparatus for controlled fusion in a field reversed configuration (FRC) magnetic topology and conversion of fusion product energies directly to electric power. Preferably, plasma ions are magnetically confined in the FRC while plasma electrons are electrostatically confined in a deep energy well, created by tuning an externally applied magnetic field. In this configuration, ions and electrons may have adequate density and temperature so that upon collisions they are fused together by the nuclear force, thus forming fusion products that emerge in the form of an annular beam. Energy is removed from the fusion product ions as they spiral past electrodes of an inverse cyclotron converter. Advantageously, the fusion fuel plasmas that can be used with the present confinement and energy conversion system include advanced (aneutronic) fuels. |
| US09564245B2 |
Integrated circuit defect detection and repair
In accordance with the present description, a device includes an internal defect detection and repair circuit which includes a self-test logic circuit built in within the device and a self-repair logic circuit also built in within the device. In one embodiment, the built in self-test logic circuit may be configured to automatically identify defective memory cells in a memory. Upon identifying one or more defective memory cells, the built in self-repair logic circuit may be configured to automatically repair the defective memory cells by replacing defective cells with spare cells within the memory. |
| US09564243B2 |
Equivalent fuse circuit for a one-time programmable read-only memory array
Technologies are provided for measuring a programming current (PC) for a memory cell (MC) of a one-time programmable read-only memory array. The MC includes a fuse equivalent circuit (FEC) that includes a first current path (CP) having a first node, a second CP having a fuse of the memory cell and a second node, and a third CP. The PC is split into a first current, a second current and a third current that flow over the first CP, the second CP, and the third CP, respectively. A first voltage applied along the first path is divided to generate a second voltage at the first node, and an output voltage generated by an operational amplifier controls the second current to maintain a third voltage at the second node at substantially the same value as the second voltage so that the second current has a sufficiently low value and does not burn the fuse. |
| US09564239B2 |
Memory controller and operating method thereof
A method for operating a memory controller includes: performing a hard decision read operation to read hard decision data from a memory device; if a hard decoding for the hard decision data fails, assigning log likelihood ratio (LLR) values to cells falling in a plurality of voltage regions corresponding to a plurality of read reference voltages; performing a soft decision read operation based on the LLR values and a soft decoding for the soft decision data to generate an error free data; performing a read operation to read data from the memory device using each of the plurality of read reference voltages to generate raw data for each of the plurality of read reference voltages; and determining an optimal read reference voltage among the plurality of the read reference voltages based on the raw data and the error free data. |
| US09564237B2 |
Nonvolatile memory device and read method thereof
A nonvolatile memory device has improved reliability by compensating a threshold voltage of a flash memory cell. A nonvolatile memory device includes a memory cell array and a voltage generator for supplying a select read voltage to a select word line and an unselect read voltage to unselected word lines when a read operation is performed, and supplying a verify voltage to a select word line and the unselect read voltage to unselected word lines when a program operation is performed. The voltage generator supplies a first unselect read voltage to at least one between an upper word line and a lower word line adjacent to the select word line when the program operation is performed, and supplies a second unselected read voltage to at least one between the upper word line and the lower word line adjacent to the select word line when the read operation is performed. |
| US09564236B2 |
NAND flash memory and reading method thereof
The disclosure provides a NAND flash memory and a reading method thereof, which may read a negative threshold value of a memory cell without using a negative-voltage-generating circuit. The disclosed NAND flash memory includes a sense amplifier, a bit line selecting circuit and an array having a plurality of NAND string units. The disclosed NAND flash memory includes a ΔV supplying portion element that applies a positive voltage to a source line, a P well formed with a selected memory cell, and a non-selected bit line which is adjacent to a selected bit line, within a predetermined time period, after the selected bit line is pre-charged and during a reading process. |
| US09564234B2 |
Sequentially accessing memory cells in a memory device
Systems and methods of sequentially accessing memory cells in a nonvolatile memory device (NVM) are provided. The NVM has a plurality of strings and a common signal line coupled to the plurality of strings. Each string includes a plurality of memory cells and a selection transistor coupled between the plurality of memory cells and the common signal line. A command that accesses multiple memory cells is received, a voltage is applied to a first selection transistor of a first string to electrically connect the common signal line to the first string, a pulse is applied for a predetermined time period to selection transistors of other strings, and memory cells of the first string are accessed. Advantages such as removal of boosting charges from unselected strings prior to sequentially accessing memory cells from selected strings can improve performance and reliability of NVM-based systems. |
| US09564232B1 |
Semiconductor memory device
Provided herein is a semiconductor memory device including a memory cell array including a drain select transistor and a plurality of memory cells, a voltage generator configured to apply a program voltage, first and second pass voltages, and a drain control voltage to the memory cell array, a control logic configured to control the voltage generator so that during a program operation, after the program voltage is applied to a selected one of the plurality of memory cells, the program voltage applied to the selected memory cell is discharged while the first pass voltage or the second pass voltage is applied to memory cells adjacent to the selected memory cell. |
| US09564226B1 |
Smart verify for programming non-volatile memory
Techniques are provided for reducing current consumption while programming non-volatile storage. A smart verify is performed using a subset of memory cells. By applying the smart verify to just a subset of the memory cells current is saved. The smart verify may be used to characterize programming speed. Results of the smart verify may be used to determine a magnitude of a dummy program pulse to be applied later in the programming process. The dummy program pulse is not followed by a program verify, which reduces current. If the dummy program pulse pushes threshold voltages high enough, then those memory cells will not conduct a current when verifying later in programming. Thus, current is saved during the program verify. Also, bit lines of memory cells that received the dummy pulses do not need to be pre-charged prior to a program pulse, which can save more current. |
| US09564222B2 |
Command signal management in integrated circuit devices
Methods of operating integrated circuit devices include logically combining an output signal indicating whether an operation is being performed with the logic level of a command signal line to generate a command signal to control circuitry of the integrated circuit device having the logic level of the command signal line when the output signal indicates that the operation is not being performed, and having a particular logic level when the output signal indicates that the operation is being performed. Integrated circuit devices include a command signal management circuit to provide a logic level of a particular command signal to control circuitry of the integrated circuit device when control signals indicate a desire to allow the particular command signal, and to provide a particular logic level to the control circuitry when the control signals indicate a desire to block the particular command signal. |
| US09564217B1 |
Semiconductor memory device having integrated DOSRAM and NOSRAM
A semiconductor memory device includes a semiconductor substrate having a main surface, at least a first dielectric layer on the main surface of the semiconductor substrate, a first OS FET device and a second OS FET device disposed on the first dielectric layer, at least a second dielectric layer covering the first dielectric layer, the first OS FET device, and the second OS FET device, a first MIM capacitor on the second dielectric layer and electrically coupled to the first OS FET device, and a second MIM capacitor on the second dielectric layer and electrically coupled to the second OS FET device. |
| US09564215B2 |
Independent sense amplifier addressing and quota sharing in non-volatile memory
Independent sense amplifier addressing provides separate column addresses to individual sense amplifier groups within a single bay during one column address cycle. A memory system determines whether the individual memory cells or bits of a column at a bay can be skipped. For each sense amplifier group having at least one memory cell (or bit) that needs to be programmed, the system determines for the first column address whether the memory cell can be skipped. If a bit or memory cell having a first column address from the sense amplifier group can be skipped, the system determines a next bit having a column address from the group that needs to be programmed. The system groups the next column address for programming during the first column address cycle. The system can program a different column address for different sense amplifier groups within the bay during a single column address cycle. |
| US09564214B2 |
Memory device
According to one embodiment, a memory device includes a controller; a first electrode and a second electrode connected to the controller; and a variable resistance layer provided between the first electrode and the second electrode. The variable resistance layer has a first structure, and a second structure. The controller configured to be able to perform a first operation of applying a first voltage between the first electrode and the second electrode, a second operation of applying a second voltage between the first electrode and the second electrode and determining whether or not the variable resistance layer has the second structure, and a third operation of applying a third voltage between the first electrode and the second electrode having the interposed variable resistance layer determined to not have the second structure in the second operation. |
| US09564213B2 |
Program verify for non-volatile storage
A non-volatile storage system includes a plurality of non-volatile storage elements arranged in two dimensional or three dimensional structures. The system applies programming to the non-volatile storage elements and performs verification of the programming. The verification includes performing a multi-strobe sensing operation to test for multiple data states while applying a common word line voltage. |
| US09564212B2 |
Solid-state memory corruption mitigation
Systems and methods are disclosed for programming data in a non-volatile memory array are disclosed. Certain embodiments provide a non-volatile solid-state memory array and a controller configured to receive write data from a host device, program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode, and perform a data consolidation operation on the first block, wherein said performing garbage collection comprises programming at least a portion of the write data to a second block not in LPO programming mode. |
| US09564203B2 |
Semiconductor device, adjustment method thereof and data processing system
A method includes resetting an output timing adjustment circuit in each of a plurality of DRAM devices to a default output timing data value, measuring a default delay from read command to read data for each of the plurality of DRAM devices, identifying a slowest DRAM device having a maximum default delay from read command to read data among the plurality of DRAM devices, writing an output timing data value to the output timing adjustment circuit in each of the plurality of DRAM devices to set the delay from read command to read data for each respective DRAM device to an amount substantially equal to the maximum default delay, and reading data from any one of the plurality of DRAM devices with a delay from read command to read data substantially equal to the maximum default delay. |
| US09564200B2 |
Pillar-type field effect transistor having low leakage current
A pillar-type field effect transistor having low leakage current is provided. The pillar-type field effect transistor includes: a semiconductor body, source and drain formed in a semiconductor pillar; a gate insulating layer formed on a surface of the semiconductor body; a gate electrode formed on a surface of the gate insulating layer. The gate electrode includes a first gate electrode and a second gate electrode being electrically connected with the first gate electrode. The first gate electrode has a work function higher than that of the second gate electrode. Accordingly, the gate induced drain leakage (GIDL) can be reduced, so that an off-state leakage current can be greatly reduced. |
| US09564197B2 |
Ferromagnetic device providing high domain wall velocities
The invention is directed to a method of manufacturing a ferromagnetic device (10), having an elongated structure extending along a longitudinal direction (11), comprising a ferromagnetic material, wherein a transverse cross section (20) of the ferromagnetic material, perpendicular to said longitudinal direction, is designed to provide a domain wall velocity above the Walker breakdown limit of the ferromagnetic material. In particular, at least a portion (21-23) of a peripheral contour of the ferromagnetic material forms, in the transverse cross-section (20), a non-orthogonal convex set. For example, the whole peripheral contour may realize a (non-orthogonal) convex polygon. |
| US09564194B1 |
Input apparatus and semiconductor memory apparatus having the input apparatus
An input apparatus of a semiconductor memory may be provided. The input apparatus may include a first storage circuit configured to receive at least a portion of an input signal provided based on a pin reduction command which is enabled before an operation command through a pin and store the at least a portion of the input signal. The input apparatus may include a second storage circuit configured to receive a remaining portion of the input signal provided based on the operation command through the pin and store the remaining portion of the input signal. The input apparatus may include an arrangement circuit configured to control an output timing of the input signal stored in the first storage circuit and the second storage circuit. |
| US09564192B2 |
Memory controller for strobe-based memory systems
An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal. |
| US09564191B1 |
Signal compensation circuit and semiconductor apparatus using the same
A signal compensation circuit includes a first path configured to cause a source signal to pass therethrough and be outputted as a first signal; a delay block configured to output a second signal by delaying the source signal by a predetermined time; a second path configured to cause the second signal to pass therethrough and be outputted as a third signal; and a signal combination block configured to generate a compensated signal by combining the first signal and the third signal. |
| US09564189B2 |
Memory system including semiconductor memory device and program method thereof
A method of programming a memory system includes: reading a target page included in a selected memory block in response to a program request when at least one of the pages included in the selected memory block contains data; and performing a program for the target page when, among the data bits included in the data read from the target page, the number of data bits having a first logic value is equal to or less than a preset value. |
| US09564187B2 |
Predicting saturation in a shift operation
Apparatus for data processing and a method of data processing are provided. Shift circuitry performs a shift operation in response to a shift instruction, shifting bits of an input data value in a direction specified by the shift instruction. Bit location indicator generation circuitry and comparison circuitry operate in parallel with the shift circuitry. The bit location indicator indicates at least one bit location in the input data value which must not have a bit set if the shifted data value is not to saturate. Comparison circuitry compares the bit location indicator with the input data value and indicates a saturation condition if any bits are indicated by the bit position indicator for bit locations which hold set bits in the input data value. A faster indication of the saturation condition thus results. |
| US09564180B1 |
Deep-sleep wake up for a memory device
A memory device comprises memory banks, power gates, and bank wake-up circuits. Each of the memory banks has a core voltage supply. The power gates are coupled to the memory banks for charging the core voltage supplies and have a plurality of powering modes. The bank wake-up circuits are coupled to the power gates for selecting one of the plurality of power modes for charging the memory banks during a wake-up mode. The bank wake-up circuits sense the core voltage supplies during the wake-up mode. The bank wake-up circuits serially charge the memory banks as a function of the sensed core voltage supplies of the memory banks. |
| US09564178B2 |
Apparatus and method for supporting storage devices during manufacture
There is disclosed an apparatus and method for supporting storage devices during manufacture. The apparatus includes structural members and plural slot carriers received in bays in the apparatus. Each slot carrier carries at least one slot arranged to receive a storage device, wherein the slot carriers are insertable and/or removable from the bays through apertures at the front of the apparatus. Clamp assemblies are arranged to releasably clamp the slot carrier to one or more structural members at the sides of the slot carrier. |
| US09564172B2 |
Video replay systems and methods
A video replay system which allows for the payback of video files from a buffer in random access memory and from disk to minimize the delay between capturing and replaying a desired video portion. In one embodiment, a portion of RAM is allocated to provide a buffer for holding video files in memory before the riles are written to a hard drive or other non-volatile storage. An index of key frames is also stored in the buffer. The computer system executes software that is responsive to an operator's commands to read the video fifes and index and playback desired video portions in a variety of modes and speeds, including slow motion, reverse, fast-forward, and slow or fast reverse. |
| US09564170B2 |
Flex over suspension fault detection under a write gate for magnetic disk drives
A system and method for Flex Over or On Suspension (FOS) fault detection under a write gate for magnetic disk drives may employ a flex over suspension fault comparator that compares a predetermined reference threshold to a positive delta of a disk drive write head data stream and outputs a positive or negative FOS fault indication. A max/min buffer detects polarity of a disk drive read/write head and applies a positive buffered delta to the fault comparator. A transition-free window detector triggers the fault comparator to output the fault indication when a transition-free window of zero-value data bits of a predetermined length is detected from the disk drive head, and the transition-free window detector provides a fault validation signal to validate output of the fault comparator when the transition-free window of zero-value data bits of the predetermined length is detected from the disk drive head. |
| US09564166B2 |
Magnetic-disk glass substrate and magnetic disk
A magnetic-disk glass substrate of the present invention has an average value of squares of inclinations of 0.0025 or less and a frequency at which squares of inclinations are 0.004 or more of 15% or less, in a case where samples of inclinations on a main surface are obtained at intervals of 10 nm. |
| US09564164B2 |
Exchange decoupled data storage medium
A magnetic data storage medium capable of storing data bits may be configured at least with a magnetic underlayer structure and a recording structure. The recording structure can have at least a first magnetic layer and a second magnetic layer with the first magnetic layer decoupled by being constructed of an alloy of cobalt, platinum, and a platinum group metal element. |
| US09564160B1 |
Servo compensation control in a vibration environment
Methods, systems, and computer program product embodiments for improving track-follow control in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, using an accelerometer to dynamically detect device vibration for determining whether to implement a vibration compensation control mechanism. |
| US09564159B2 |
Preventing damage to storage devices within a storage system due to movement of the storage system
A method implemented in a storage system that has moveable storage devices includes a motion controller receiving movement related data of a storage device from at least one sensor associated with the storage device. In response to the received movement related data indicating at least one pre-identified condition, a park command is issued that triggers the reading head of the storage device to enter a parked state in which the storage device is protected from damage that can occur due to motion of the reading head while the pre-identified condition exists. |
| US09564157B1 |
System and method for detecting reader-writer offset in a heat-assisted magnetic recording head
An apparatus comprises a heat-assisted magnetic recording head configured to write to and read from a magnetic recording medium. The head comprises a reader and a writer including a near-field transducer (NFT). The reader comprises a center which is laterally offset relative to a center of the writer to define a reader-writer offset (RWO) therebetween. A magnetic recording medium comprises a plurality of tracks. The plurality of tracks comprises at least one track used as a region to test for a shift in the RWO. A processor is coupled to the recording head and configured to detect the RWO shift. |
| US09564152B2 |
Magnetoresistance effect element and magnetic memory
Provided are a magneto resistive effect element with a stable magnetization direction perpendicular to a film plane and with a controlled magnetoresistance ratio, and a magnetic memory using the magneto resistive effect element. Ferromagnetic layers 106 and 107 of the magneto resistive effect element are formed from a ferromagnetic material containing at least one type of 3d transition metal such that the magnetoresistance ratio is controlled, and the film thickness of the ferromagnetic layers is controlled on an atomic layer level such that the magnetization direction is changed from a direction in the film plane to a direction perpendicular to the film plane. |
| US09564143B2 |
Audio coding device, audio coding method, audio coding program, audio decoding device, audio decoding method, and audio decoding program
An audio signal transmission device for encoding an audio signal includes an audio encoding unit that encodes an audio signal and a side information encoding unit that calculates and encodes side information from a look-ahead signal. An audio signal receiving device for decoding an audio code and outputting an audio signal includes: an audio code buffer that detects packet loss based on a received state of an audio packet, an audio parameter decoding unit that decodes an audio code when an audio packet is correctly received, a side information decoding unit that decodes a side information code when an audio packet is correctly received, a side information accumulation unit that accumulates side information obtained by decoding a side information code, an audio parameter missing processing unit that outputs an audio parameter upon detection of audio packet loss, and an audio synthesis unit that synthesizes decoded audio from the audio parameter. |
| US09564139B2 |
Audio data hiding based on perceptual masking and detection based on code multiplexing
A spread spectrum data hiding for audio signals is described. A set of pseudo-random noise sequences is added to an audio signal according to a data to be embedded. A masking curve is used to shape the added noise. A transient detection step can be used to control whether a shaped noise sequence is to be added or not. Embedded information is detected by first performing a whitening step and then performing a phase-only correlation with a same set of pseudo-random noise sequences. A detection method that is based on correlation of multiplexed noise sequences with a noise sequence embedded in the audio is also described. |
| US09564137B2 |
Frame erasure concealment for a multi-rate speech and audio codec
An audio coding terminal and method is provided. The terminal includes a coding mode setting unit to set an operation mode, from plural operation modes, for input audio coding by a codec, configured to code the input audio based on the set operation mode such that when the set operation mode is a high frame erasure rate (FER) mode the codec codes a current frame of the input audio according to a select frame erasure concealment (FEC) mode of one or more FEC modes. Upon the setting of the operation mode to be the High FER mode, the one FEC mode is selected, from the one or more FEC modes predetermined for the High FER mode, to control the codec by incorporating of redundancy within a coding of the input audio or as separate redundancy information separate from the coded input audio according to the selected one FEC mode. |
| US09564134B2 |
Method and apparatus for speaker-calibrated speaker detection
The present invention relates to a method and apparatus for speaker-calibrated speaker detection. One embodiment of a method for generating a speaker model for use in detecting a speaker of interest includes identifying one or more speech features that best distinguish the speaker of interest from a plurality of impostor speakers and then incorporating the speech features in the speaker model. |
| US09564133B2 |
Mobile devices, methods, and computer program products for enhancing social interactions with relevant social networking information
Devices, methods, and computer program products for facilitating enhanced social interactions using a mobile device are disclosed. A method for facilitating an enhanced social interaction using a mobile device includes receiving an audio input at the mobile device, determining a salient portion of the audio input, receiving relevant information associated with the salient portion, and presenting the relevant information via the mobile device. |
| US09564131B2 |
Low power integrated circuit to analyze a digitized audio stream
Examples disclose a low power integrated circuit to receive and digitize an audio stream. Further, the examples provide the low power integrated circuit to compare the digitized audio stream to a keyword and store the digitized audio stream in a memory. Additionally, the examples also disclose upon recognition of the keyword in the digitized audio stream, the low power integrated circuit transmits a signal to a processor to increase power and analyze the digitized audio stream. |
| US09564128B2 |
Controlling a speech recognition process of a computing device
Methods, systems and devices are provided for controlling a speech recognition process on a computing device. A computing device may receive audio signals from a microphone and muscle movement signals from a muscle movement detector, such as an electromyography sensor. The computing device may determine whether the audio signals satisfy an audio characteristic criterion indicative of speech and whether the head muscle activity signals satisfy a muscle movement criterion indicative of the user speaking. The computing device may perform voice recognition processing on the audio signals through a voice recognition algorithm in response to determining that both the audio signals and the head muscle activity signals satisfy their respective criterion indicative of the user speaking, and not perform voice recognition processing of audio signals while either audio signals or head muscle activity signals do not satisfy their respective criterion indicative of the user speaking. |
| US09564125B2 |
Methods and systems for adapting a speech system based on user characteristics
Methods and systems are provided for adapting a speech system. In one example a method includes: logging speech data from the speech system; detecting a user characteristic from the speech data; and selectively updating a language model based on the user characteristic. |
| US09564123B1 |
Method and system for building an integrated user profile
A system and method are provided for adding user characterization information to a user profile by analyzing user's speech. User properties such as age, gender, accent, and English proficiency may be inferred by extracting and deriving features from user speech, without the user having to configure such information manually. A feature extraction module that receives audio signals as input extracts acoustic, phonetic, textual, linguistic, and semantic features. The module may be a system component independent of any particular vertical application or may be embedded in an application that accepts voice input and performs natural language understanding. A profile generation module receives the features extracted by the feature extraction module and uses classifiers to determine user property values based on the extracted and derived features and store these values in a user profile. The resulting profile variables may be globally available to other applications. |
| US09564117B2 |
Limiting peak audio power in mobile devices
Systems and methods of limiting peak audio power in mobile devices may include a high pass filter and a burst module to detect a burst load condition in a mobile device. The burst module can also apply the high pass filter to an audio signal of the mobile device in response to the burst load condition to obtain a filtered signal, and transmit the filtered audio signal to a speaker of the mobile device. |
| US09564109B2 |
Bass guitar to enhance the musical performance of a user
An electric stringed instrument for enhancing the musical or artistic performance of a user is provided. The instrument includes a body with a cutout such that a center portion of the body is open, a neck affixed to an outer edge of the body, and a plurality of strings having first ends operably connected to the neck and second ends operably connected to the body, the plurality of strings being oriented such that the strings extend over the cutout of the body. The user may maneuver the instrument and strum the plurality of strings on any portion of the strings located within the cutout of the body, thereby enhancing the sound of the instrument and the performance of the user. |
| US09564108B2 |
Video frame processing on a mobile operating system
A method for rendering video frames by a computing device having a software stack with an application layer and a kernel layer comprises various steps. First, a system reference time is initialized. A triggering of an interrupt signal in the kernel layer is waited for. Next, it is determined whether to update the system reference time as a function of a render function from the application layer. A next video frame in the kernel layer is rendered by the computing device as a function of the determined system reference time and the next video frame. The steps after the initializing step and starting at the waiting step are recursively performed. |
| US09564107B2 |
Electronic device and method for adjusting character of page
A method for adjusting characters of a page includes determines a selected page on a display device of an electronic device. Sizes of characters on the selected page are acquired. An adjustment ratio of the characters on the selected page is computed according to a predetermined calculation method. A size of each of the characters on the selected page is adjusted according to the acquired sizes of the characters on the selected page and the computed adjustment ratio of the characters on the selected page. Each of the characters on the selected page on the displaying device is displayed with the adjusted size of each of the characters on the selected page. |
| US09564101B2 |
Display device, method of display, and program
In a digital signage device, a control unit extracts a face region and a torso region from an image of the object to be displayed, compares the extracted face region and torso region to a face region and torso region extracted from a screen image on an image display unit in use, and then calculates, on the basis of these comparison results, a first adjustment factor for adjusting the size of the face region and a second adjustment factor for adjusting the size of the torso region in the image of the object to be displayed, the respective sizes of the face region and torso region in the image of the object to be displayed being separately adjusted on the basis of the calculated first adjustment factor and second adjustment factor in order to display an adjusted image on the image display unit. |
| US09564099B2 |
Bistable display systems and methods
A bistable display system includes a plurality of pixels arranged in pixel rows and pixel columns. Each pixel has a bistable material between first and second transparent and conductive substrates. A bistable display method includes driving the plurality of pixels having at least one target pixel and at least one non-target pixel and applying a voltage difference across at least one target column and at least one target row to switch the at least one target pixel between transparent and opaque states. |
| US09564098B2 |
Display panel, gate driver and control method
A display panel, a gate driver and a control method are disclosed herein. The gate driver includes series-coupled driving stages. One of the driving stages includes an input unit and a shift register circuit. The input unit outputs a shift signal to a control node according to a gate driving signal from the previous driving stage and the gate driving signal from the next driving stage. The shift register circuit is electrically coupled to the control node, and outputs the gate driving signal. During the enabling period of the gate driving signal from the previous driving stage and the enabling period of the gate driving signal from the current driving stage, the shift register circuit keeps the voltage level of the control node being at a first voltage. |
| US09564097B2 |
Shift register, stage-shift gate driving circuit and display panel
A shift register, a stage-shift gate driving circuit and a display panel are provided. The shift register includes a down-delivering module, an output module, a first pull-down maintaining module, a second pull-down maintaining module, a first pull-down module and a second pull-down module. The down-delivering module is for receiving a stage-shift signal(s) from a preceding-stage shift register. The output module is for outputting stage-shift signals and a scan signal. The first pull-down maintaining module, the second pull-down maintaining module, the first pull-down module and the second pull-down module are for keeping the output signal of the output module to be a low voltage level after the output module outputs the scan signal. By the above solution, the invention can reduce the size of transistor, prevent the deterioration of transistor and increase the circuit output capability. |
| US09564093B2 |
Liquid crystal display panel and black picture insertion method for the panel displayed in 3D mode
An LCD panel includes multiple data lines, multiple scanning lines, multiple pixels, and multiple control transistors. Each pixel connected with a corresponding one of the data lines and one of the scanning lines. Gate electrodes of the control transistors are connected with a same scanning line. A source electrode of each control transistor is connected with a corresponding one of the data lines. Drain electrodes of the control transistors are connected with each other. A black picture insertion method for the LCD panel displayed in a 3D mode is also disclosed. Accordingly, a refresh frequency of the driving circuit is one half of the prior art. The power consumption and cost are reduced. Besides, a black picture is inserted into one frame during a blank time domain of the one frame such that the brightness is increased and the charge time of the liquid crystal capacitor is increased. |
| US09564087B2 |
Electrophoretic display device, electronic timepiece, and operating method of an electrophoretic display device
An electrophoretic display device includes a display unit including two substrates and an electrophoretic element containing electrophoretic particles disposed between the two substrates, and able to display at least a first color and a second color; a processor unit having a first mode and a second mode of lower power consumption than the first mode; a time information generating unit that generates time information; and a drawing unit that displays an image on the display unit. The time information generating unit includes a timer that counts time, and sends a counting completed signal to the processor unit when the timer counts a specific image; and the processor unit goes from the first mode to the second mode after starting counting by the timer in the first mode, and when the counting completed signal is then received, goes from the second mode to the first mode. |
| US09564086B2 |
Method and system for improving RGBW image saturation degree
A method and a system for improving saturation degree of a RGBW image are provided. The method comprises: a step A of dividing a screen into a plurality of screen sub-regions according to a region range in which backlight is independently and dynamically adjustable; a step B of dividing the RGBW image to be displayed into sub-areas on the basis of the screen sub-regions, the sub-areas of the RGBW image to be displayed corresponding to the screen sub-regions; a step C of determining the sub-areas having saturation degree to be adjusted in each sub-area of the RGBW image to be displayed; and a step D of reducing backlight brightness of the sub-areas having saturation degree to be adjusted by a predetermined proportion when the RGBW image to be displayed is displayed. By means of the method and the system, saturation degree of the RGBW image may be adjusted finely. |
| US09564085B2 |
Selective dimming to reduce power of a light emitting display device
Selective dimming in a light emitting display device to reduce power consumption. The display device includes a display panel that includes a plurality of light emitting pixels. An image processor is configured to divide an image frame into a plurality of regions and to reduce pixel intensity levels in at least one region of the plurality of regions to generate an adjusted image frame. The at least one region corresponds to a background of the image frame. A display driver converts data for the adjusted image frame into control signals for controlling brightness of the light emitting pixels. The display device may be, for example, an organic light emitting diode (OLED) display device or other type of display device that includes light emitting pixels. |
| US09564083B2 |
Organic light emitting display device having a wiring connecting a first pixel with a second pixel
An organic light emitting display device includes: a scan driver configured to sequentially supply a scan signal to scan lines, and supply an emission control signal to emission control lines; a data driver configured to supply a data signal to data lines; a pixel unit (pixel region) including pixels connected with the scan lines, the emission control lines, and the data lines and receiving a first power source which is a high potential pixel power source, a second power source which is a low potential pixel power source, and a third power source which is an initialization power source; and a wiring connecting an anode electrode of an organic light emitting diode of a first pixel in a first horizontal line and a first electrode of a transistor connected with the third power source of a second pixel in a second horizontal line while being adjacent to the first pixel. |
| US09564082B2 |
Array substrate, display device and driving method thereof
The present disclosure provides an array substrate, comprising a plurality of pixel circuits arranged in a matrix form. Each pixel circuit comprises a controlling sub-circuit, a compensating sub-circuit, a driving transistor and a light-emitting element. The controlling sub-circuit is configured to, under the control of a scanning voltage signal and a charging signal, charge the compensating sub-circuit, and under the control of a light-emitting controlling signal, control the driving transistor so as to drive the light-emitting element to emit light, and the compensating sub-circuit is configured to, under the control of the controlling sob-circuit, set a constant potential for a gate electrode of the driving transistor, and pre-store a threshold voltage of the driving transistor, so as to compensate for the threshold voltage of the driving transistor when the driving transistor drives the light-emitting element to emit light. |
| US09564078B2 |
Quantum dots for display panels
Techniques for rendering images directly with light conversion materials are described. In some embodiments, image data for one or more image frames is received. A light source may be controlled to emit first light to irradiate a light conversion material disposed with an image rendering surface. Second light that renders the one or more image frames may be emitted from the light conversion material. The second light emitted from the light conversion material may be excited by the first light. A display system under techniques herein may be free of a light valve layer on which light transmittance is modulated on a pixel-by-pixel basis. |
| US09564073B2 |
Display analysis using scanned images
A method for analyzing displays is described. A processing device receives a first scanned image of a first display and determines a first characteristic of the first display by analyzing the first scanned image. The processing device also receives a second scanned image of a second display and determines a second characteristic of the second display by analyzing the second scanned image. The processing device compares the first characteristic and the second characteristic to determine a third characteristic of the second display. |
| US09564071B1 |
Portable marker device
A support device for a hollow traffic marker utilizing a base having a foot positioned at the ground surface. A boss extends from the base. A flexible sleeve positions over the outer surface of the boss, the hollow traffic marker lies within the flexible sleeve. A gap within the flexible sleeve separates the first and second spacers. |
| US09564068B2 |
Device for surgical training
A device for surgical training comprising: an external first layer (11, 45) which simulates the subcutaneous fat; a second layer (12, 44) internal to said first layer (11, 45), which simulates the muscle; a fourth layer (16, 17, 42), internal to said second layer (12, 44), which simulates the perirenal fat; a kidney (14, 15, 41), internal to said fourth layer (16, 17, 42); said first, second and fourth layer having a sound propagation velocity between 1500 and 1550 m/s, an acoustic impedance between 1.5 and 1.7 106 Kg/sm2, an elastic modulus between 0.4 and 4.2 kPa, and being able to be perforated manually by surgical instruments. |
| US09564067B2 |
Inflatable exhibit of a human heart and method
An inflatable exhibit of a heart includes an inflatable infrastructure inflatable to a three-dimensional partial representation of the heart at a scale greater than at least, 10:1, but more preferably greater than 20:1, and most preferably, greater than 25:1. The infrastructure includes a cross-sectional plane thereacross. The exhibit further includes a walk-through passageway defined, at least, in part by the inflated infrastructure, and extending through the inflated infrastructure. The cross-sectional plane defines a plane of the passageway. |
| US09564066B1 |
Denture construction teaching tool
The denture construction teaching tool is an educational tool for instructing students on the molding process used to construct removable dental prosthodontics. The denture construction teaching tool includes a base having opposed upper and lower surfaces, and a spacer block releasably secured to the upper surface of the base. A set of tooth molds are releasably secured to the upper surface of the base about the spacer block. Each of the tooth molds has an injection port and a venting port formed therethrough. Each tooth mold further has a lower molding portion and an open upper portion. A removable lid releasably covers the open upper portions of the set of tooth molds, such that a molding material may be injected through the injection ports of the set of tooth molds with excess molding material exiting through the respective venting ports. |
| US09564062B2 |
Body position sensing for equipment
A device that includes a receiving surface for positioning at least one human body part, multiple capacitive sensor elements disposed within multiple positioning areas on the receiving surface, a sense circuit configured to compare the capacitance measurements of the sensor elements with threshold capacitance values and generate a signal when the capacitance measurements indicate proximity of a human body part on a positioning area, and an indicator configured to generate a notification when the position of the human body part corresponds with at least one location on the receiving surface. |
| US09564058B2 |
Vision and cognition testing and/or training under stress conditions
The visual and cognitive skills of a subject may be tested and/or trained by providing a visual stimulus to a subject. More particularly, a subject may be tested and/or trained when under a stress condition to determine the effect of a stress condition, such as a physical stress or a cognitive stress, on the subject's visual and sensory skills. A response may be received from a subject via an input device, the appropriateness of which may depend upon the stimulus provided to the subject. Behavioral information and other data regarding the performance of a subject and the possible effect of the stress condition may be recorded. Scoring may be based upon the speed, accuracy, and other aspects of the performance of a subject. |
| US09564057B2 |
Inquiry skills tutoring system
An assessment engine includes a definition of inquiry skills being assessed. Assessment models are used to infer skill demonstration as one or more students engage in inquiry within computerized simulations and/or microworlds. A pedagogical agent and/or help system provides real-time feedback to one or more students based on the assessment model outputs, and/or based on additional models that track one or more students developing proficiency across inquiry tasks over time. A pedagogical agent and/or help system for science inquiry tutoring responds in real-time on the basis of knowledge-engineered and data-mined assessment and/or tracking models. |
| US09564056B1 |
Flight path optimization using nonlinear programming
A method, medium, and system to receive a mathematical model representation of performance characteristics for an aircraft and an engine combination; perform a projection based model order reduction on the mathematical model representation; eliminate, based on the projected model, fast dynamics components of the mathematical model representation; determine a reduced order model, as a differential algebraic equation, wherein algebraic equations replace the fast dynamics; set a flight path angle and a throttle level angle as a control to minimize fuel consumption for the modeled aircraft and engine combination; discretize equations of motion for the modeled aircraft and engine combination and formulate optimization equations as a nonlinear programming problem; and determine an optimal open loop control that minimizes fuel consumption for the modeled aircraft and engine combination to climb to a prescribed cruise altitude and airspeed. |
| US09564051B2 |
Method for operating a motor vehicle, in which a user is warned of hazardous situations based on data obtained from outside and inside the vehicle, and motor vehicle operated accordingly
In a method for operating a motor vehicle, data obtained from outside the motor vehicle, which indicate the existence of a hazardous situation, are transmitted to a receiving device. A warning concerning the hazardous situation is communicated to the user of the motor vehicle. In addition to the external vehicle data, data obtained from inside the vehicle, which indicate the existence of a hazardous situation, are evaluated. The warning is communicated to the user of the vehicle subject to the evaluation of the data obtained from outside the vehicle and the data obtained from inside the vehicle. |
| US09564050B2 |
Methods and systems for determining information relating to the operation of traffic control signals
Data indicative of the durations of multiple instances of different phases of a traffic control signal in a given time period is determined. The data is used to obtain data indicative of a distribution of the durations of each phase. The distribution data is used to obtain data indicative of a probability of the traffic control signal having a given phase at one or more future time. The probability data may be used to provide an expected waiting time when arriving at the signal at a future time and/or a speed recommendation for a vehicle approaching the signal. |
| US09564048B2 |
Origin destination estimation based on vehicle trajectory data
A framework for origin-destination (OD) analysis of vehicle trajectory data is described herein. In accordance with one aspect, a vehicle trajectory dataset is provided to an OD analyzer. The vehicle trajectory dataset includes vehicle trajectory data collected from a sensor network having a plurality of sensor stations for detecting vehicles. The sensor stations of the sensor network are distributed in a geographical area of interest, where the vehicle trajectory data include trajectories of vehicles captured by the sensor network. The vehicle trajectory dataset may be analyzed by the OD analyzer to determine an origin and a destination of trips for trajectories of the vehicles in the vehicle trajectory dataset. The analysis includes calculating a probability distribution of travel time between sensor pairs of the sensor network of a number of (dropped-out) intermediate stations, and determining a stop probability between a station pair in the trajectories of the vehicles, where a stop is a destination of a previous trip and an origin of a next trip in the trajectories. |
| US09564045B2 |
Alarm system testing device
An alarm system testing device facilitates simulation of a trouble condition and testing circuit continuity of an alarm system within a structure. The device includes an alarm system comprising an electrical circuit, an alarm, a resistor, and at least one trigger. The alarm is activated by the trigger shorting a positive rail of the electrical circuit to a negative rail. A testing switch has a ground position wherein the positive rail of the electrical circuit is grounded when the testing switch is in the ground position. The resistor is electrically coupled to the testing switch such that positioning the testing switch in a resistor bypass position removes the resistor from the electrical circuit. |
| US09564044B2 |
Optimizing speed and reach of mass notification alert delivery
A system and a method are disclosed for predicting potential reach of an alert to a targeted audience, targeted personal delivery devices and targeted non-personal notification delivery devices in an emergency mass notification system. The method includes receiving recipients and alert delivery devices data which define a targeted audience and devices of an emergency alert. The method further comprises evaluating contact and configuration data targeting quality rating, tracking data targeting quality rating and real-time data targeting quality rating based on the received recipients and devices data and a data sources repository. Responsive to the targeting quality ratings and prediction weighting data (e.g., numeric weights and descriptive thresholds), the method generating one or more predictions of the potential reach of the alert based on the targeting quality ratings. |
| US09564039B2 |
Systems for monitoring hand sanitization
The present invention provides a hand sanitizer system that includes a proximity detector, a dispensing system and an alarm feature, and is operative to provide an indication corresponding to a person in proximity of the system failing to dispense antiseptic or other solution from the dispenser within a predetermined period of time after moving within a predetermined range of the detector. |
| US09564030B2 |
Portable security system
A portable alarm system designed for unoccupied unsecured locations, such as construction sites, machinery, campsites and the like. The alarm system defines a continuous monitoring line about the perimeter of the unsecured location using a plurality of wireless sensors attached to a flexible non-stretchable tape suspended between to vertical poles. The system has motion-sensing/detecting capabilities such that any movement of a housing where the microprocessor of the system is located generates audible/visual alarm. Each of the wireless sensors has a magnet and a transmitter positionable within a predetermined distance from the magnet. If the intruder tampers with the tape and increases the distance between the magnet the transmitter, the alarm is activated as well. |
| US09564028B2 |
Fire-fighting system and nozzle system including locator beacon
A fire-fighting system includes a base component, a nozzle located remote from the base component, and a locator component mounted to the nozzle. The locator component is communicatively coupleable to the base component, and includes a transceiver configured to wirelessly receive signals from the base component, and a locator beacon including a visually-perceptible output device. The locator component is configured to activate the locator beacon in response to an activation signal received from the base component. |
| US09564024B2 |
Banking system controlled responsive to data bearing records
An apparatus that operates to cause financial transfers responsive to data read from data bearing records includes at least one processor that is in operative connection with a card reader, a check acceptor, a cash dispenser and a touch screen display. The processor causes the machine to operate to read card data from a user card, and to cause a determination to be made that the read card data corresponds to an authorized financial account. The at least one processor is operative to cause data to be read from a check and/or cash to be dispensed, and a financial transfer to or from the account corresponding to the value thereof. Data corresponding to a user input alphanumeric characters is resolved by the processor responsive to contact with an input surface of the touch screen display. The area of contact may not include any visible output indicia that corresponds to the possible input characters prior to contact. |
| US09564022B2 |
Variable-speed wagering game instance initiation
A method of conducting a wagering game includes player-controlled, dynamically determined wagering rates, with each wager initiating a separate instance of the wagering game and further displays concurrently executing instances together on one or more display devices. |
| US09564019B2 |
Computerized bingo-type game using bingo symbols drawn from symbol groups
A system for allowing players to play a bingo-type game with a user computing device is described herein. The system includes a database including a plurality of bingo symbols and a system controller coupled to the database. The system controller is configured to receive a request from a player to play the bingo-type game and responsively display the bingo-type game on the at least one user computing device. The system controller is configured to determine a plurality of symbol groups included in the bingo-type game, randomly select a set of bingo symbols, and displays the selected set of bingo symbols with respect to the symbol grid. Each symbol group includes a predefined set of bingo symbols. The set of bingo symbols including a bingo symbol selected from each one of the symbol groups. Each bingo symbol in the set of bingo symbols is displayed simultaneously. |
| US09564018B2 |
Temporary grant of real-time bonus feature
In one embodiment, a system, apparatus, and method for distributing a portion of game information may include a gaming machine configured to play a game of chance and produce game information. A social gaming server can be configured to communicate with the gaming machine, may establish a remote gaming session between the gaming machine and a user device, and may distribute the portion of the game information to the user device. A social gaming server may also establish a temporal bonus game feature between the gaming machine user and at least one available remote user. |
| US09564009B2 |
Dynamically providing rewards to users in a game space
A system and method for providing rewards in a game space based on errors disrupting user interactions with the game space is disclosed. For providing such rewards, error information indicating the errors may be obtained and the errors may be extracted from the obtained error information. In some examples, levels of disruption caused by the errors may be determined. In some examples, support resources for addressing the errors may be determined. Rewards may be determined to be awarded to the users based on the determined levels of disruption and/or the determined support resources. In some examples, the determined rewards may be distributed to the users responsive to the users performing one or more actions addressing the errors on the client computing platforms associated with the users. |
| US09564007B2 |
Wagering game content based on locations of player check-in
A computer-implemented method comprises replacing, by one or more processors, original wagering game content with modified wagering game content based on a wagering game player's check-ins at one or more physical locations. The method also includes presenting, on an electronic display device, a wagering game with the modified wagering game content in place of the original wagering game content. |
| US09564006B2 |
Slot machine with secondary game featuring replacement symbols
Examples disclosed herein relate to systems and methods, which may receive wagers on one or more paylines. The systems and methods may utilize one or more symbol positions which may provide additional gaming functionality. The systems and methods may determine one or more payouts based on the additional gaming functionality. The systems and methods may display one or more presentations based on the additional gaming functionality. |
| US09563988B2 |
Vehicle tuner and display module and docking station
A data acquisition, data display, vehicle computer interface and programming tool in the form of a module. The module of the present invention can be set into a dock, which is connected to the vehicle's control modules. The vehicle can be reprogrammed to accept vehicle manufacture's updates and/or performance updates. Once the reprogramming is finished the module is removed from the dock and is be placed into/onto the vehicle's dashboard or other location readily viewable by the vehicle operator to report one or more of the vehicle's operating parameters. The present invention is readily connectable to a vehicle's data link for bi-directional communication with the various control modules on the vehicle. |
| US09563986B2 |
Systems and methods for multi-signal fault analysis
Systems and methods for multi-signal fault analysis are described. The system receives signal message information, over a network, from a collection device comprised of a plurality of mobile devices including a first mobile device and a second mobile device that are associated with a first user. The first signal message information includes a first maintenance message including characterization information that was received by the first mobile device from a component that includes a sensor that operates to sense a first part that is assembled into a vehicle. The second signal message information includes signal information that was received by the second mobile device including an audio signal that a microphone in the second mobile device sensed. The system analyzes the multi-signal information to diagnose a problem and communicate a message to the first user with a diagnosis of the problem. |
| US09563982B2 |
Image generating device, image generating method, program, and computer-readable information storage medium
An image generating device includes a background image acquirer that acquires an image of a background on which an image of an object is to be superimposed, a color extractor that extracts a color about one or a plurality of places in the image of the background, and a light source decider that decides the color of light output by a light source that illuminates the object based on the color extracted about the one or plurality of places. The image generating device further includes a drawing section that draws the image of the object based on the decided color of the light of the light source and an output image generator that generates an output image obtained by superimposing the image of the object on the image of the background. |
| US09563978B2 |
Image generation apparatus, method, and medium with image generation program recorded thereon
When generating a pseudo three-dimensional image by performing volume rendering on a three-dimensional image using an opacity curve that defines the relationship between pixel value and opacity, identifying a whole region representing a predetermined target object from the three-dimensional image, setting a base opacity curve to the identified whole region, obtaining, with respect to each of at least some pixels in the identified whole region, a representative value in an adjacent region of a pixel concerned, and setting an opacity curve obtained by modifying the base opacity curve using the obtained representative value as the opacity curve to be applied to the pixel concerned in the volume rendering. |
| US09563976B2 |
Pre-fetching map tile data along a route
A path made up of several points including an origin, a destination, and intermediate points, is determined. Map data is fetched from an external map database to a local memory of a client device prior to detecting a need to use the map data for rendering maps at the client device. To this end, respective priorities of the points are determined, amounts of map data to be fetched are determined based on the determined priorities, and map data is fetched in accordance with the determined priorities, so that a first amount of map data is fetched for a point with a first priority and a second amount of map data for a point with a second priority, where the first amount is greater from the second amount. Respective digital maps of the one the geographic areas are generated using the pre-fetched map data stored in the local memory. |
| US09563971B2 |
Composition system thread
Composition system thread techniques are described. In one or more implementations, a composition system may be configured to compose visual elements received from applications on a thread that is executed separately than a user interface thread of the applications. As such, the composition system may execute asynchronously from a user interface thread of the application. Additionally, the composition system may be configured to expose one or more application programming interfaces (APIs) that are accessible to the applications. The APIs may be used for constructing a tree of objects representing the operations that are to be performed to compose one or more bitmaps. Further, these operations may be controlled by several API visual properties to allow applications to animate content within their windows and use disparate technologies to rasterize such content. |
| US09563969B2 |
Method of generating implicit terrain data by performing lossless compression and lossy compression and electronic apparatus for performing the method
The present invention relates to a method of generating implicit terrain data and an electronic apparatus for performing the method, and more particularly to a method of generating implicit terrain data and an electronic apparatus which are capable of minimizing a size of data while maintaining geographical quality of original terrain data. |
| US09563967B2 |
Photographic subject tracking device and camera
A photographic subject tracking device includes: a first degree-of-similarity calculation unit that calculates degree of similarity between a template image for tracking and an image in search area; a photographic subject position identification unit that identifies a tracked photographic subject position in the input image based on calculated degree of similarity; a second degree-of-similarity calculation unit that calculates a degree of similarity between each of multiple template images for resizing determination, which are generated based on template image for tracking, and image in search area; a matching position identification unit that identifies matching positions of the multiple template images for resizing determination, respectively, in the input image based on calculated degrees of similarity; and a size changing unit that changes an image size of template image for tracking and template images for resizing determination based on a density of the plurality of matching positions identified. |
| US09563960B2 |
Method for detecting foreground
A method and apparatus for foreground detection by designating one of two non-occlusion areas as the foreground area according to results of position matching using two given motion vectors. The detection is performed by matching the position of the current occlusion area in the current frame with one or more positions of a previous occlusion area in a previous frame. The matching operation is based on motion vectors determined for the neighboring areas adjacent to the current occlusion area. The determination of the motion vectors are based on two neighboring frames temporally located before and after the current frame. If the position of the current occlusion area is matched with the previous occlusion area by using one of the motion vectors, the neighboring area corresponding to the motion vector is designated as a foreground area. |
| US09563958B1 |
2D/3D image scanning and compositing
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a method for processing images. A structure provides a light sources configured to illuminate a target area. Illumination is controlled in a sequence over a first time period. At a given point in time, light sources are powered to enable illumination of the target area. An image of a target object is captured from a single reference location. The captured image is evaluated including processing the evaluated images on a pixel by pixel basis to produce a single composite image having respective pixel values derived from the evaluated captured images. The target object is 3D scanned to determine height information for a surface of a target on the target area. The height information is used to flatten respective pixels of the composite image. The composite image is provided after the flattening of the respective pixels. |
| US09563956B2 |
Efficient free-space finger recognition
Systems and techniques for efficient free-space finger recognition are herein described. A surface in a depth image may be identified. One or more blobs in the depth image may be identified. The identified blobs may be analyzed to determine if a blob intersects with an edge of the depth image and classified as a potential hand if the blob does intersect with the edge or classified as an object otherwise. |
| US09563955B1 |
Object tracking techniques
Techniques for efficiently identifying objects of interest in an environment and, thereafter, tracking the location and/or orientation of those objects. As described below, a system may analyze images captured by a camera to identify objects that may be represented by the images. These objects may be identified in the images based on their size, color, and/or other physical attributes. After identifying these potential objects, the system may define a region around each object for further inspection. Thereafter, portions of a depth map of the environment corresponding to these regions may be analyzed to determine whether any of the objects identified from the images are “objects of interest”—or objects that the system has previously been instructed to track. These objects of interest may include portable projection surfaces, a user's hand, or any other physical object. The techniques identify these objects with reference to the respective depth signatures of these objects. |
| US09563952B2 |
Determination of a measurement error
For swift and secure determination of a measurement error a first digital image is obtained using an image sensor, wherein a line of sight of an optical arrangement is oriented in a first face direction. A characteristic image area in the first digital image on an image sensor is determined. A second digital image is then taken with a line of sight of the image sensor oriented in a second face and the characteristic image area defined in the first image is searched in the second digital image, the first or the second digital image is rotated in the image plane by 180° . Then in the second digital image the position of the characteristic image area is determined. And offset between the characteristic image area in the first digital image and the characteristic image area in the second digital image is determined. |
| US09563951B2 |
Vehicle vision system with targetless camera calibration
A camera calibration system of a vehicle includes a camera disposed at a vehicle and having a field of view exterior of the vehicle. The camera is operable to capture image data. An image processor operable to process image data captured by the camera. The camera calibration system is operable to generate camera calibration parameters utilizing a bundle adjustment algorithm. Responsive to image processing of captured image data during movement of the vehicle along an arbitrary path, and responsive to the bundle adjustment algorithm, the camera calibration system is operable to calibrate the camera. The bundle adjustment algorithm may iteratively refine calibration parameters starting from a known initial estimation. |
| US09563949B2 |
Method and apparatus for medical image registration
A method of medical image registration includes obtaining a first medical image generated before a medical surgery; obtaining a second medical image generated in real time during the medical surgery; extracting landmark points of at least two adjacent anatomical objects recognizable in the second medical image among a plurality of anatomical objects near an organ of interest of a patient from the first medical image and the second medical image; and registering the first medical image and the second medical image based on a geometrical correlation among the adjacent anatomical objects indicated by the landmark points of the first medical image and a geometrical correlation among the adjacent anatomical objects indicated by the landmark points of the second medical image. |
| US09563941B2 |
Image processing apparatus, image pickup apparatus, image processing method, and non-transitory computer-readable storage medium
An image processor includes a correction signal generator configured to generate a correction signal by calculating a difference between an image and an image obtained by applying an unsharp mask generated based on a PSF corresponding to an image-pickup conditions of an image-pickup optical system to the image, and a correction signal applier configured to sharpen the image by multiplying the correction signal generated by the generator by a constant and by adding a multiplied correction signal to the image. |
| US09563931B2 |
Control method and information processing device
A control method executed by an information processing device including a first processor and a second processor includes specifying a plurality of processes which issued orders for causing the first processor to execute a drawing process for drawing a frame, the plurality of processes being executed by the second processor, first determining whether the drawing process is completed, based on a comparison between the specified plurality of processes and specific processes, and controlling, based on a result of the first determining, a state regarding a power consumption of the first processor until the first processor starts another drawing process for drawing another frame. |
| US09563930B2 |
Techniques for clearing a shared surface
Various embodiments are generally directed to an apparatus, method and other techniques to determine that a shared surface is shared between a first application and a second application, determine that a fast clear operation has been performed on the shared surface, the fast clear operation comprising clearing one or more locations of one or more buffers. Further, various embodiments may include writing pixel value information to the one or more locations of the one or more buffers and performing a resolve operation on the shared surface. |
| US09563924B2 |
Managing time-substitutable electricity usage using dynamic controls
A predictive-control approach allows an electricity provider to monitor and proactively manage peak and off-peak residential intra-day electricity usage in an emerging smart energy grid using time-dependent dynamic pricing incentives. The daily load is modeled as time-shifted, but cost-differentiated and substitutable, copies of the continuously-consumed electricity resource, and a consumer-choice prediction model is constructed to forecast the corresponding intra-day shares of total daily load according to this model. This is embedded within an optimization framework for managing the daily electricity usage. A series of transformations are employed, including the reformulation-linearization technique (RLT) to obtain a Mixed-Integer Programming (MIP) model representation of the resulting nonlinear optimization problem. In addition, various regulatory and pricing constraints are incorporated in conjunction with the specified profit and capacity utilization objectives. |
| US09563919B2 |
Safety evaluation and feedback system and method
Systems and methods are discussed for providing a sensor enhanced employee safety evaluation system. Sensors that monitor employee behavior are placed at the workplace of an insured entity. Data from the sensors are processed to obtain a safety evaluation. Based on the safety evaluation, the insurance provider can adjust the terms of the insurance policy to accurately reflect the risks associated with the insured entity. Feedback based on the safety evaluation is also provided to the insured entity and the employees of the insured entity to promote improvements in safe behavior. |
| US09563917B2 |
Computer-implemented method and apparatus for adjusting the cost basis of a security
A computer-implemented method and apparatus for determining a cost basis associated with a plurality of shares of a security. In response to information identifying an issuer, the purchase date and the sale date, a list of capital events that occurred in connection with the security between the purchase date and the sale date is retrieved from a database. One or more shares held adjustment ratios are then retrieved from a database. Each of the shares held adjustment ratios corresponds to one of the capital events that occurred in connection with the security between the purchase date and the sale date. A current cost basis associated with the security may then be determined in accordance with the one or more cost adjustment ratios and the purchase price per share of the security. |
| US09563910B2 |
Showcase system having transparent display panel and operating method thereof
To achieve the objective of the present invention, a method for operating a showcase system having a transparent display panel according to one embodiment of the present invention comprises the steps of: receiving a touch input for a predetermined area of a transparent display panel; displaying an image keyboard; receiving product information; and connecting information on the predetermined area and the product information to store the connected information, or the invention comprises the steps of: recognizing a predetermined product; receiving a touch input for a predetermined area of a transparent display panel; and connecting information on the predetermined area and information on the predetermined product to store the connected information. |
| US09563908B2 |
Transaction processing circuit
According to one exemplary embodiment, a system for processing transactions is provided that comprises a transaction processing circuit configured to receive transaction data relating to one or more transactions for the purchase of software applications from a digital application store. The transaction processing circuit is further configured to apply one or more business rules to the transaction data and to generate one or more transaction summary files. The transaction summary files are transmitted to a payment system configured to perform, based on the transaction summary files, at least one of recording revenue related to the transactions and causing payment to be distributed to developers of the software applications. At least a portion of the transaction processing circuit is implemented using a shared, scalable computing system. A level of resources of the shared, scalable computing system requested for implementation of the transaction processing circuit is varied based on a volume of transactions processed by the transaction processing system. |
| US09563905B2 |
Advertisement snapshot recorder
According to various embodiments, techniques and mechanisms described herein facilitate the storage of an image of a rendered webpage on a storage medium. A first message including a request for a webpage may be transmitted to a web server via a communications interface. The webpage request may generate an advertising opportunity bid request for bids to place an advertisement on the requested webpage. A second message to place a bid on the generated advertising opportunity bid request may be transmitted. Information for rendering the webpage is received in response to the webpage request, and an image of the rendered webpage may be stored on a storage medium. |
| US09563899B2 |
Media distribution architecture for television viewing
A system distributes digital media content to a plurality of user devices, where a given user is associated with multiple user devices. First content is provided by a controller to a first user device and, in response, the controller determines interaction by the user with the first content. Thereafter, the controller provides second content to a second user device based on the prior provision of the first user content to the first user device and the first interaction information. More extensive user interaction history as well as device types may also be employed by the controller when determining the second content. |
| US09563887B2 |
Helmet cleaning apparatus
Disclosed is a helmet cleaning apparatus. The apparatus includes a rectangular housing having a cleaning compartment with a transparent lid pivotally connected thereto. The compartment includes a helmet mount having a spheroidal shape and on which a helmet can be positioned for cleaning. The helmet mount further includes apertures thereon that are connected to a vacuum cleaning device and a steam cleaning device contained within the housing. In operation, a helmet is positioned on the helmet mount, and some of the apertures thereon disperse steam in order to clean the helmet. Other apertures draw debris and other materials into the vacuum cleaning device in order to remove the same from the helmet. In this way, a user can easily and conveniently sanitize and clean a helmet without having to manually cleaning the helmet. |
| US09563886B1 |
Systems and methods for an improved self-checkout with speed tender transaction options
A checkout apparatus including a self-checkout unit having a product identification device, a payment identification device, a microprocessor and a point-of-sale system configured to allow a touchless speed tender transaction. The invention also includes an apparatus and method for offering a mode-driven and/or customer-driven checkout transaction. |
| US09563884B2 |
Automated transaction machine
An automated retail terminal in which a plurality of goods and/or services are provided in an integrated system. The integrated system generally avoids duplicating hardware or functions in the course of delivering the goods or services offered, so for example in a combination ATM and Internet kiosk the same credit card or smart card reader is used for both the ATM and the Internet kiosk functions, the same control screen activates the ATM functions and the Internet functions, and etc. |
| US09563877B2 |
Customizable controls provided by a messaging application for performing selected actions
Technologies are described herein for providing users of a messaging application with controls that perform one or more selected actions with a message. Any number of default custom action controls may be displayed in a gallery. The selection of a custom action control performs various actions to an active message. New custom action controls may be created and existing controls modified to provide any number of desired actions. Dialogs provide user-friendly interfaces that allow a user to assign the desired functionality to a custom action control. The custom action controls may be organized into groups and shared between messaging applications and computers. |
| US09563876B2 |
Control options for instant message display and notification
An instant messaging program is configured by receiving a chat selection input signal from the input device indicating the selection of a chat session; displaying selectable chat configuration parameters on the display; receiving a configuration input signal from the selection device indicating the selection of a chat configuration parameter; and linking the selected chat configuration parameter to the selected chat session so that the selected chat configuration parameter controls the subsequent display of the selected chat session. |
| US09563875B2 |
Automatically providing notifications regarding interesting content from shared sources based on important persons and important sources for a user
A system for automatically providing notifications to a user regarding interesting content, which automatically collects information regarding persons that are important to the user, as well as indications of important content sources. The important content sources are then monitored for actions performed by one of the important persons for the user, and notifications are generated to the user in the event that the important person performs an action on a document or other information item stored in the important content source. Important persons for a user may be determined through a communication application used by the user, such as an electronic mail program, instant messaging program, or the like, in response to indications of persons that the user has either sent messages to and/or received messages from. The notifications may be provided through the user's communication application, by electronic mail messages, instant messages, or the like. The notification may include a name, identifier, or other indication of the important person that performed the action on the important content source. Notifications may be provided to the user in response to any specific kind of action by the important persons on an important content source, such as create operations, modify operations, and/or delete operations. |
| US09563871B2 |
Systems and methods for storing computer infrastructure inventory data
A computer for storing computer infrastructure inventory data includes a processor and a memory device coupled to the processor. The computer also includes a database system stored on the memory device. The database system includes computer-executable instructions allowing the computer to manage stored records. The computer is configured to receive an inventory file associated with a scan of a host device. The computer is also configured to receive a mapping schema associated with the inventory file. The mapping schema comprises a structured relationship description between the inventory file and an inventory record. The computer is further configured to translate the inventory file to the inventory record using the mapping schema and to update the database system with the inventory record. |
| US09563868B2 |
Arrangement for minimizing communication and integration complexity between software applications
A computer system arrangement for minimizing communication and integration complexity between a plurality of software applications having each an individual data model defining an individual set of application parameters, includes a bus arrangement having connections to each one of said plurality of applications, the bus being arranged to interpret between each application and to orchestrate incoming and outgoing requests from each application, the bus arrangement including, a generic information model defining a set of generic parameters in relation to the application parameters of each application, an adaptor together with said generic information model, in connection with an incoming request, arranged to map parameters of that individual data model to said generic parameters, a device arranged to transfer the mapped generic information model together with the request to a process execution engine, which includes a device arranged to handle the request to identify a corresponding adaptor to which the request was directed, and using the corresponding adaptor together with the generic information model to remap the request to the individual data model of the application to which it is was directed. |
| US09563866B2 |
Estimating a computing job complexity
In a method for estimating a complexity of a computing job, selected data objects relevant to a data repository are retrieved. In addition, points are assigned to multiple elements of the selected data objects according to a predefined schedule and scores for the selected data objects are calculated by applying a mathematical function to the multiple elements and complexities of the data objects are estimated based upon the calculated scores and the predefined schedule. In addition, a complexity of the computing job is estimated based upon the estimated complexities of the data objects and the estimated complexity of the computing job is stored. |
| US09563865B2 |
Multiple-level treatment for optimizing one or more fluid separation units
The invention relates to the optimized management of one or more fluid production units, especially those involving fluid separation treatment, comprising: a) a data collection step, the data being on one or more values of current parameters defining a current operating point of the production unit, on a future production demand and on at least one optimization criterion; and b) a computation step for computing one or more parameters defining a new operating point of the unit, at least in accordance with this demand. The computation step b) comprises at least: 1) an estimation of at least one optimum solution for defining the new operating point; and 2) a validity test carried out on this optimum solution, at least in accordance with an analysis of the transition of the production unit from the current operating point to the new operating point. |
| US09563864B2 |
Detecting patterns that increase the risk of late delivery of a software project
Historic and current development data associated with the project may be gathered. A catalog of patterns, each pattern associated with a data measure and an analysis routine capable of detecting the pattern according to the data measure in a given data set may be obtained. A pattern describes a particular indication in the historical and development data, which arises one or more of, at a discrete point in time or over a period of time. The analysis routine may be applied to the historic and current development data. A notification may be issued responsive to identifying the pattern in the historic and current development data. The applying and the issuing may be performed for each pattern in the catalog of patterns. |
| US09563863B2 |
Marking apparatus equipped with ticket processing software for facilitating marking operations, and associated methods
Marking apparatus and methods, in which first ticket information relating to a locate request ticket is received, and second ticket information derived from the first ticket information is displayed on a display device of the marking apparatus. A field technician may provide some input to generate an electronic record or log of technician activity during a marking operation. In one example, a checklist may be generated (e.g., based at least in part on the first ticket information) and displayed locally to the technician as a guide to perform and verify various aspects of the operation. In another example, a set of instructions or “workflow” may be generated to guide the technician through a sequence of steps to perform the marking operation. Performance via a process guide (e.g., checklist or workflow) may be interactive in that the technician may provide input, or automated/semi-automated by analyzing various information collected by the marking apparatus with respect to the ticket information and/or other available information germane to the operation. |
| US09563860B2 |
System and method for providing inter-jurisdictional permits
Permit applications for construction or property improvement projects can be processed for multiple jurisdictions at the same time through a networked system. A kiosk can be provided as a central point of interaction for the user. A property address is received from the user and compared with multiple jurisdictions to determine one or more jurisdictions in which the property address is located. Permit requirement information for each of the jurisdictions is output for the user. Permit application information is then received from the user. The permit application information includes electronic fee payment information. A permit application can then be transmitted to at least one of the jurisdictions. If the permit is approved, one or more permits are received from the jurisdictions. The kiosk or other device can print paper copies of the permits for the user or provide them in electronic format. |
| US09563854B2 |
Distributed model training
In one embodiment, a device determines that a machine learning model is to be trained by a plurality of devices in a network. A set of training devices are identified from among the plurality of devices to train the model, with each of the training devices having a local set of training data. An instruction is then sent to each of the training devices that is configured to cause a training device to receive model parameters from a first training device in the set, use the parameters with at least a portion of the local set of training data to generate new model parameters, and forward the new model parameters to a second training device in the set. Model parameters from the training devices are also received that have been trained using a global set of training data that includes the local sets of training data on the training devices. |
| US09563853B2 |
Efficient information reconciliation method using turbo codes over the quantum channel
Provided is an information reconciliation method in a quantum key distribution system between a transmitter and a receiver, which includes receiving a parity bit from the transmitter through a quantum channel, correcting an error of a receiver quantum key by using the received parity bit, and removing a residual error of the receiver quantum key through an open channel by using a cascade protocol to harmonize the receiver quantum key with a transmitter quantum key, wherein the parity bit is generated at the transmitter by using turbo codes. This method may enhance quantum key generation efficiency. |
| US09563847B2 |
Apparatus and method for building and using inference engines based on representations of data that preserve relationships between objects
This disclosure describes, among other things, an apparatus for generating an inference engine about a document. The apparatus includes at least one processor and a memory with instructions. The memory including instructions that, when executed by the at least one processor, cause the at least one processor to perform a number of processes. The processor accesses a set of documents. Each document has a corresponding inference. The processor also generates a vector representation for each document in the set of documents. First, the processor parses text of the document into groups of words, and generates a vector representation for each group. |
| US09563846B2 |
Predicting and enhancing document ingestion time
A mechanism is provided in a data processing system for predicting and enhancing ingestion time for a set of input documents. The mechanism receives a set of documents to be added to a corpus of the data processing system. The mechanism records document features of each document within the set of documents using an annotation engine within the data processing system. The mechanism predicts an ingestion time for each document within the set of documents based on the document characteristics and a machine learning model. The mechanism assigns the set of documents to data processing system resources to be processed based on the predicted ingestion time for each document. |
| US09563845B1 |
Rule evaluation based on precomputed results
Techniques are described for employing precomputed results of applying rules to content items, the rules applicable to determine whether content items may be electronically published. On receiving a request for a content item, rules applicable to the content item may be identified. A datastore of precomputed results of rule application may be accessed to determine whether the datastore includes a result of applying a current or previous version of each rule. If the datastore includes a current result, the current result may be employed in determine whether the content item may be presented. If the datastore includes a previous result, the previous result may be so employed. If the datastore includes a previous result or no appropriate result, a job may be queued to calculate the current result asynchronously relative to the request for the content item. |
| US09563843B2 |
Systems and methods for a computer understanding of multi modal data streams
Systems and methods for understanding (imputing meaning to) multi modal data streams may be used in intelligent surveillance and allow a) real-time integration of streaming data from video, audio, infrared and other sensors; b) processing of the results of such integration to obtain understanding of the situation as it unfolds; c) assessing the level of threat inherent in the situation; and d) generating of warning advisories delivered to appropriate recipients as necessary for mitigating the threat. The system generates understanding of the system by creating and manipulating models of the situation as it unfolds. The creation and manipulation involve “neuronal packets” formed in mutually constraining associative networks of four basic types. The process is thermodynamically driven, striving to produce a minimal number of maximally stable models. Obtaining such models is experienced as grasping, or understanding the input stream (objects, their relations and the flow of changes). |
| US09563838B2 |
Loop antenna and radio frequency tag
A loop antenna includes first and second conductors configured to have conductivity, the first conductor including first and second patterns, the first pattern being provided along a first surface and including a first feed point, and the second pattern being coupled to the first pattern at a first end of the first surface and being provided to oppose the first pattern; and a second conductor configured to have conductivity, the second conductor including third and fourth patterns, the third pattern being provided on the first surface with a gap generating a capacitance between the first pattern and including a second feed point, the fourth pattern being electrically coupled to the third pattern at a second end opposing the first end on the first surface, the fourth pattern overlapping the second pattern so as to cause capacitive coupling or being connected to the second pattern. |
| US09563836B2 |
Stretchable multi-layer wearable tag capable of wireless communications
A wearable tag capable of wireless communications includes a first elastic layer, a second elastic layer over the first elastic layer, wherein the second elastic layer is embedded with a first conductive circuit. The wearable tag includes a dielectric layer on the second elastic layer, a third elastic layer on the dielectric layer, wherein the third elastic layer is embedded with a second conductive circuit, wherein the dielectric layer comprises via holes that contain electric connections between the semiconductor chip and the first conductive circuit. A semiconductor chip is in connection with the first conductive circuit and the second conductive circuit, wherein the semiconductor chip, the first conductive circuit, and the second conductive circuit are configured to wirelessly communicate with external devices. The wearable tag also includes a fourth elastic layer on the semiconductor chip. |
| US09563832B2 |
Excess radio-frequency (RF) power storage and power sharing RF identification (RFID) tags, and related connection systems and methods
Excess radio-frequency (RF) power storage and power sharing RF Identification (RFID) tags, and related RFID tag connection systems and methods are disclosed. The excess RF power storage and power sharing RFID tags and related RFID tag connection systems and methods in embodiments disclosed herein allow connected RFID tags to store excess energy derived from excess received RF power in a shared energy storage device. In this manner, an individual RFID tag or a group of connected RFID tags in the RFID tag connection system can continue operation during temporary times when sufficient RF power is not being received from a RFID reader. Sharing stored energy derived from excess received RF power in a shared energy storage device among connected RFID tags in a RFID tag connection system can significantly mitigate problems of RF power interruption. |
| US09563831B2 |
Method of, and system and label for, authenticating objects in situ
A method of, and a system and a label for, authenticating an object in situ create an authentication pattern signature for the object to be authenticated, associate a random distribution of multiple, three-dimensional elements with the object, aim a portable, handheld, image capture device at the object to capture return light from the elements as a single image, verify from the single image that the elements are three-dimensional, process the single image to generate an image pattern of the elements, compare the image pattern with the authentication pattern signature, and indicate that the object is authentic when the image pattern matches the authentication pattern signature. |
| US09563829B2 |
Image forming apparatus
A jam detection section detects a sheet jam on a conveyance path based on results of detection by a sheet detection sensor. A printing stop section stops an image formation operation upon the sheet jam detection by the sheet jam detection section. Upon detection of completion of an operation of resolving the sheet jam by a user by a resolving operation detection section, a sheet breakage confirmation section judges, for the sheet taken out from the conveyance path by the user in the operation of resolving the sheet jam and then loaded on a document stand, whether or not there is any sheet lacking portion, based on image data generated by an image reading section. The stopping release section, upon judgment by the sheet breakage confirmation section that there is no sheet lacking portion, permits execution of image formation. |
| US09563825B2 |
Convolutional neural network using a binarized convolution layer
A convolutional neural network is trained to analyze input data in various different manners. The convolutional neural network includes multiple layers, one of which is a convolution layer that performs a convolution, for each of one or more filters in the convolution layer, of the filter over the input data. The convolution includes generation of an inner product based on the filter and the input data. Both the filter of the convolution layer and the input data are binarized, allowing the inner product to be computed using particular operations that are typically faster than multiplication of floating point values. The possible results for the convolution layer can optionally be pre-computed and stored in a look-up table. Thus, during operation of the convolutional neural network, rather than performing the convolution on the input data, the pre-computed result can be obtained from the look-up table. |
| US09563821B2 |
Method, apparatus and computer readable recording medium for detecting a location of a face feature point using an Adaboost learning algorithm
The present disclosure relates to detecting the location of a face feature point using an Adaboost learning algorithm. According to some embodiments, a method for detecting a location of a face feature point comprises: (a) a step of classifying a sub-window image into a first recommended feature point candidate image and a first non-recommended feature point candidate image using first feature patterns selected by an Adaboost learning algorithm, and generating first feature point candidate location information on the first recommended feature point candidate image; and (b) a step of re-classifying said sub-window image classified into said first non-recommended feature point candidate image, into a second recommended feature point candidate image and a second non-recommended feature point candidate image using second feature patterns selected by the Adaboost learning algorithm, and generating second feature point candidate location information on the second recommended feature point recommended candidate image. |
| US09563819B2 |
Visual comparisons using personal objects
Embodiments of the present invention provide automated systems and methods for visualizing a product using standard and personal objects. An image can be retrieved from the shopping history or shopping cart of a user, and the dimensions of the image can be automatically adjusted to make an accurate relative size comparison to a product for purchase. |
| US09563818B2 |
System for associating tag information with images supporting image feature search
A system derives and associates tag information with an image supporting image feature search. The system receives arrangement search information used for searching for one or more images including a target object associated with a specific arrangement of tag information. The system analyzes the tag information of the images, and searches for an image having the arrangement information which satisfies the arrangement search information. |
| US09563815B2 |
Method and system for processing an image received from a remote source
In a first exemplary embodiment of the present invention, an automated, computerized method is provided for processing an image. According to a feature of the present invention, the method comprises the steps of, at a computer system, receiving an image recorded at and transmitted from a remote source, at the computer system, processing the transmitted image, for segregation of the transmitted image into a corresponding intrinsic image and, at the computer system, processing the corresponding intrinsic image to perform a preselected task, for a result. As a further feature of the first exemplary embodiment of the present invention, the remote source comprises a cell phone or remote computer system. |
| US09563814B1 |
Method and apparatus for recovering a vehicle identification number from an image
Some aspects of the invention relate to a mobile apparatus including an image sensor configured to convert an optical image into an electrical signal. The optical image includes an image of a vehicle license plate. The mobile apparatus includes a license plate detector configured to process the electrical signal to recover information from the vehicle license plate image. The mobile apparatus includes an interface configured to transmit the vehicle license plate information to a remote apparatus and receive a vehicle identification number corresponding to the vehicle license plate image in response to the transmission. |
| US09563812B2 |
Image processing apparatus, image processing method and computer-readable storage medium
According to one embodiment, an image processing apparatus includes a calculation unit and a recognition unit. The calculation unit is configured to calculate a first similarity degree group which is composed of similarity degrees between respective characters constituting a first character string appearing on a first image and respective candidate characters in a candidate character group, and to calculate a second similarity degree group which is composed of similarity degrees between respective characters constituting a second character string appearing on a second image and the respective candidate characters in the candidate character group. |
| US09563811B2 |
Character recognition method, character recognition apparatus and financial apparatus
A character recognition method for recognizing a character of a medium is provided. A character image of an individual character from a medium is acquired and the character image is read out step by step to determine the character according to a hierarchical structure in which a set of predetermined characters are hierarchically classified into a plurality of groups configured of main groups and sub groups. |
| US09563810B2 |
Apparatus and method for verifying the identity of an author and a person receiving information
Apparatus for identifying a requesting individual who wishes to receive a computer file, or to input or alter computer information, where identifying information for each of a plurality of registered individuals allowed such access is stored in a database, calls for capturing images of such requesting individual, and determining whether this individual is the same as a registered individual. The stored identifying information includes both an alphanumeric identifier and images of a unique, identifier of each registered individual. The specificity of the identification is enhanced by providing and storing, by apparatus situated at the information source, a code which is converted to a code-image and displayed in proximity to the requesting individual; by obtaining composite images of both the biologic identifier and the code-image; by comparing the obtained image information with stored image information; and by providing computer access only if the obtained image information matches stored image information. |
| US09563804B2 |
Display device and method for controlling the same
A display device and a method for controlling the same are disclosed. The method for controlling a display device comprises a display unit configured to display visual information, including a private region and a public region; a control input sensing unit configured to detect a control input and to deliver the detected control input to a processor; and the processor configured to control the display unit and the control input sensing unit. In this case, the processor may display a control object in the private region, detect a first control input, move the control object from the private region to a first position of the public region based on the detected first control input and display a control indicator corresponding to the control object in a second position of the private region. In this case, the second position may be set based on the first position of the control object. |
| US09563803B2 |
Tagging visual media on a mobile device
This document describes techniques enabling tagging of visual media on a mobile device. In some cases the techniques determine, based on meeting a threshold of manual tagging of a person or object, to “bulk” tag visual media stored on the mobile device. Thus, the techniques can present, in rapid succession, photos and videos with the recognized person or object to enable the user to quickly and easily confirm or reject the recognition. Also, the techniques can present numerous faces for recognized persons or sub-images for recognized objects on a display at one time, thereby enabling quick and easy confirmation or rejection of the recognitions. |
| US09563802B2 |
Fingerprint identification chip with enhanced ESD protection
A fingerprint identification chip with enhanced ESD protection includes receiving pads disposed on a surface of a chip and arranged in a matrix format. The receiving pad has a central region and a peripheral region which surrounds at least an edge of the central region. The peripheral region of the receiving pad is higher than the central region. |
| US09563800B2 |
Intelligent entrance guard unlocking system and unlocking method thereof
An intelligent entrance guard unlocking method includes: transmitting electric energy of a power unit of a intelligent entrance guard in a wireless electromagnetic radiation via a transmit coil; receiving the electric energy via a receiver coil of a powerless smart key; capturing a fingerprint image of an user and storing the fingerprint image in a second storage unit of the powerless smart key; controlling a wireless transmit unit of the powerless smart key to transmit a wireless signal containing the fingerprint image to the intelligent entrance guard; obtaining a predefined fingerprint image from a first storage unit of the intelligent entrance guard and comparing the fingerprint image with the predefined fingerprint image; unlocking the intelligent entrance guard when the fingerprint image matches with the predefined fingerprint image and not unlocking the intelligent entrance guard when the fingerprint image does not match with the predefined fingerprint image. |
| US09563798B1 |
Reading invisible barcodes and other invisible insignia using physically unmodified smartphone
A method and system for enabling a conventional smartphone to read and authenticate an invisible barcode or other invisible insignia printed using an invisible printing ink containing a phosphorescent luminophore, and a software application, without a hardware alteration to the smartphone. |
| US09563790B2 |
Information recording medium, columnar body having information recording medium affixed thereto, information reading device therefor, pharmaceutical injection device using this information reading device, information reading method, and non-transitory computer readable medium
It is an object to provide an information recording medium with which information symbols can be suitably read. This information recording medium comprises a sheet-form member (33), a plurality of information symbols (18) that are displayed on the surface of the sheet-form member (33) and each have the same information, and an edge line (34) that is provided at one end and/or the other end of the sheet-form member (33) and allows an information reading device which reads the information symbols (18) to recognize the end of the sheet-form member (33). |
| US09563789B1 |
Separate cryptographic keys for protecting different operations on data
The disclosed embodiments provide a system that processes data. During operation, the system uses a first key to protect a write operation on the data. Next, the system uses a second key to protect a read operation on the data. |
| US09563784B2 |
Event driven permissive sharing of information
Event driven permissive sharing of information is disclosed. In an aspect, user equipment can include information sharing profiles that can facilitate sharing information with other devices or users, such as sharing location information. The information sharing profiles can include trigger values, such that when a target value transitions the trigger value, a permission value is updated to restrict or allow access to sharable information. As such, event driven permissive sharing of information allows for designation of temporary friend information sharing with user-defined triggers. |
| US09563781B2 |
Directional optimization for policy evaluation
Embodiments of the present invention provide a method, system and computer program product for directional optimization of policy statements for a Web service. In an embodiment of the invention, a method for directional optimization of policy statements in a policy document can be provided. The method can include loading a policy document referenced for a Web service, extracting a policy from the policy document, and determining whether the extracted policy is bi-directional or direction agnostic. A single run time presentation for the extracted policy can be created when the extracted policy is direction agnostic. Otherwise, separate run time presentations can be created for each direction of the extracted policy when the extracted policy is bi-directional. |
| US09563780B2 |
Managing cross perimeter access
In some implementations, a method of managing access to resources in a single device including receiving, from a first resource assigned to a first perimeter, a request to access a second resource assigned to a second perimeter different from the first perimeter. The single device includes the first perimeter and the second perimeter. Whether access to the second resource is prohibited is determined based on a management policy for the first perimeter. The management policy defining one or more rules for accessing resources assigned to the second perimeter including the second resource. |
| US09563774B1 |
Apparatus and method for securely logging boot-tampering actions
The disclosed apparatus may include a storage device and a secure counter. The apparatus may also include a tamper-logging component that (1) detects an action that is associated with booting untrusted images from the storage device and, in response to detecting the action, (2) securely logs the action by incrementing the secure counter. Various other apparatuses, systems, and methods are also disclosed. |
| US09563770B2 |
Spammer group extraction apparatus and method
The present invention relates to a spammer group extraction apparatus and method, which extract spammer groups that interfere with fair trade and unbiased decision making by sending messages aimed at intentionally slandering other companies (other persons, other products, etc.) on social network services. The spammer group extraction apparatus includes a data collection unit for collecting pieces of data corresponding to social network services. A natural language processing unit preprocesses the pieces of data using a natural language processing algorithm based on big data. An abnormal behavior detection unit detects abnormal behavior based on user identifications (IDs) respectively corresponding to pieces of data, preprocessing of which has been completed. A spammer extraction unit extracts a spammer group using a user ID causing the abnormal behavior and an ID of a user group including the user ID. |
| US09563767B2 |
System and methods for weak authentication data reinforcement
Systems and methods for weak authentication data reinforcement are described. In some embodiments, authentication data is received in a request to authenticate a user. In response to detecting weak authentication data, the systems and methods determine whether the user was previously authenticated as a human user. An example embodiment may include initiating an authentication process based on determining that the user was previously authenticated as a human user. |
| US09563766B2 |
Device and accessory pairing
A device authenticates accessories by detecting that an accessory is attached to the device, determining a unique identification (ID) for the accessory, determining, based on the unique ID, if the accessory has been paired to the device, and in response to determining that the accessory has been paired to the device, enable use of the accessory by the device. In response to determining the accessory has not been paired to the device, the devices performs a secondary authentication process on the accessory. |
| US09563765B2 |
Baseband secure boot with remote storage
In order to simplify and reduce the cost of an electronic device, the size of a first non-volatile memory associated with an integrated circuit is significantly reduced. Instead of using the first non-volatile memory, a second non-volatile memory associated with a processor in the electronic device is used to store an embedded operating system of the integrated circuit, as well as associated data and a configuration of the integrated circuit. To reduce the security risks associated with using this remote second non-volatile memory, the first non-volatile memory may store authorization information and anti-replay information. During a secure boot of the integrated circuit, the authorization information is used to verify that the embedded operating system, the data and the configuration are authorized. In addition, the anti-replay information is used to determine that the embedded operating system, the data and the configuration are different than previously received versions of these items. |
| US09563764B2 |
Method and apparatus for performing authentication between applications
A method performed by a first application in a client apparatus to authenticate a second application in the client apparatus is provided. The method includes, when the first application receives an execution request from the second application, requesting authentication information of the second application from an authentication server, obtaining the authentication information of the second application from the authentication server, and authenticating the second application using the authentication information, wherein the authentication information of the second application is signed with a private key of the authentication server. |
| US09563754B2 |
Method of generating a structure and corresponding structure
Disclosed is a method of generating a structure comprising at least one virtual machine, the method comprising: obfuscating a first virtual machine source code, thereby yielding a first obfuscated virtual machine (OVM) source code; associating a processor identifier with the first OVM source code, thereby yielding a processor-specific first OVM source code; compiling the processor-specific first OVM source code, thereby yielding a processor-specific first OVM. Furthermore, a structure generated by said method is disclosed. |
| US09563751B1 |
License utilization management system service suite
The different advantageous embodiments provide a system for managing license utilization comprising a client system, a number of message transport servers, and a number of license management servers. The client system is configured to generate a number of messages having information about usage associated with a project code or a business unit. The number of message transport servers replicates the number of messages. The number of messages is transmitted to a message transport server in the number of message transport servers. The message transport server receiving the number of messages replicates the number of messages to each message transport server. The number of license management servers has a number of license management services configured to listen for updates from the number of message transport servers. The updates are the number of messages replicated across the number of message transport servers. |
| US09563747B2 |
Method for providing DRM service and electronic device thereof
Provided is an electronic device. The electronic device includes at least one processor for executing a plurality of operating systems; and a mobile high-definition link (MHL) module. The operating systems include a normal operating system for controlling a content service and a secure operating system for receiving information for controlling digital rights management (DRM) content from the MHL module and controlling a DRM service. |
| US09563743B2 |
Analyte testing method and system with high and low blood glucose trends notification
Described herein are systems and methods to utilize factual information based on stored blood glucose data to allow greater insight into the management of diabetes of a user. |
| US09563734B2 |
Characterizing cell using input waveform generation considering different circuit topologies
In some embodiments, in a method performed by at least one processor, a cell is characterized, by the at least one processor, with respect to an input transition characteristic considering different circuit topologies of a pre-driver driving the cell resulting in the same input transition characteristic. |
| US09563733B2 |
Cell circuit and layout with linear finfet structures
A cell circuit and corresponding layout is disclosed to include linear-shaped diffusion fins defined to extend over a substrate in a first direction so as to extend parallel to each other. Each of the linear-shaped diffusion fins is defined to project upward from the substrate along their extent in the first direction. A number of gate level structures are defined to extend in a conformal manner over some of the number of linear-shaped diffusion fins. Portions of each gate level structure that extend over any of the linear-shaped diffusion fins extend in a second direction that is substantially perpendicular to the first direction. Portions of each gate level structure that extend over any of the linear-shaped diffusion fins form gate electrodes of a corresponding transistor. The diffusion fins and gate level structures can be placed in accordance with a diffusion fin virtual grate and a gate level virtual grate, respectively. |
| US09563732B1 |
In-plane copper imbalance for warpage prediction
A method of predicting warpage of a laminate is disclosed in which in-plane copper imbalance is calculated. A method of designing an organic build-up laminate is provided in which in-plane copper imbalance is calculated and imbalances are corrected. |
| US09563730B2 |
Improving the accuracy of an exponential current digital-to-analog converter (IDAC) using a binary-weighted MSB
An apparatus of an exponential current digital-to-analog converter (IDAC) using a binary-weighted MSB to efficiently drive current controlled light emitting diode (LED) devices. The apparatus comprises of an exponential current digital-to-analog converter (IDAC) current source, a voltage buffer to create an active cascode at the output stage, and an error amplifier that by means of a DC-DC converter voltage loop imposes an appropriate voltage at the output of the IDAC, depending on the current load set to drive the LEDs. The definition of the apparatus involves defining an exponential LSB and exponential MSB current mirrors according to a defined methodology. |
| US09563729B2 |
Signal transition analysis of a circuit
A first signal and a second signal associated with a circuit may be identified. A first count of a number of times that the second signal is associated with a transition when the first signal is at a first value may be determined. Furthermore, a second count of a number of times that the second signal is associated with a transition when the first signal is at a second value may be determined. A value corresponding to the dependence between the second signal and the first signal may be calculated based on the first count and the second count. |
| US09563726B2 |
Motor selection device
A motor selection device includes a computer including a storage device and a calculation device. The storage device stores data of acceleration time, constant speed time, deceleration time, stop time, maximum output torque for each motor, dynamic friction torque, and constant load torque. To select selectable motors and to suggest an optimal operation pattern among motor operation patterns, the calculation device includes a central processing unit (CPU) and performs effective torque calculation by calculating torque in the acceleration time, in the constant speed time, in the deceleration time, and in the stop time based on data stored in the storing unit, and calculating the effective torque by giving a first torque, a second torque, a third torque, a fourth torque, the acceleration time, the constant speed time, the deceleration time, and the stop time to a predetermined formula. |
| US09563723B1 |
Generation of an observer view in a virtual environment
Generation of an observer view in a virtual environment in response to real-time input during a simulation is disclosed. In one embodiment, a device initiates a simulation of a virtual environment. Core view data that identifies a core view in the virtual environment is maintained. The core view is associated with an object in the virtual environment. Core view imagery that depicts a portion of the virtual environment based on the core view data is generated. During the simulation, real-time input that includes first observer view data that identifies a first observer view in the virtual environment is received. The first observer view is unassociated with any object in the virtual environment. First observer view imagery that depicts a portion of the virtual environment based on the first observer view data is generated. |
| US09563719B2 |
Self-monitoring object-oriented applications
A computer-implemented method for monitoring an object-oriented application is disclosed. A transaction-representative-digraph is built based upon a real-time running of the application, and the digraph contains nodes of a plurality of replaceable classes. A key node is selected based upon invocation relationships between the nodes. A monitor program is instrumented at the selected key node. |