最新美国发明专利第2016-09-06期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09438110B2	Systems and methods for feed-forward control of load current in DC to DC buck converters A system for controlling load current in a voltage converter includes a current normalization module that receives a first measurement corresponding to the load current, receives a second measurement corresponding to an inductor current, and matches a first gain of the first measurement corresponding to the load current to a second gain of the second measurement corresponding to the inductor current to generate a normalized load current. A feed-forward generation module receives the normalized load current from the current normalization module and generates a load current feed-forward (LCFF) signal based on the normalized load current. A duty cycle generation module generates a duty cycle used to control the voltage converter based on a commanded output voltage of the voltage converter and the LCFF signal.
US09438106B2	Hysteretic current mode controller for a bidirectional converter with lossless inductor current sensing A system and circuit for achieving bidirectional hysteretic current mode control of a converter. The system comprises a summer that provides a constant hysteresis and has added switching noise immunity, a comparator, a lossless inductor current sense means and a converter. A circuit using the inductors internal resistance for sensing the current through an inductor in a lossless manner is described. The circuit preserves both DC and dynamic current information while incorporating the RC time constant, difference amplifier and signal amplification, all using only one amplifier. This circuit provides excellent common mode and differential noise immunity, while still having a high bandwidth and small group delay of the current signal. A method to accomplish stability of a current mode controlled converter when closing the loop to control the output voltage with very high accuracy and gain is described.
US09438105B2	Silicon-on-insulator-based voltage generation circuit A silicon-on-insulator (SOI) based positive/negative voltage generation circuit includes: an inverter including an NMOS transistor and a PMOS transistor, a first transfer capacitor coupled to the PMOS transistor, a first output capacitor, a second transfer capacitor coupled to the NMOS transistor, a second output capacitor, a first diode disposed between the first transfer capacitor and the first output capacitor, a second diode disposed between the second transfer capacitor and the second output capacitor, one end of the first output capacitor is coupled to the ground, one end of the second output capacitor is coupled to the ground; wherein an output voltage of the inverter is controlled by a single-phase clock to flip periodically, charge the first transfer capacitor through a parasitic diode of the PMOS transistor, and charge the second transfer capacitor through a parasitic diode of the NMOS transistor.
US09438097B2	Method for controlling the current intensity of the electric current flowing through an inductive consumer and a corresponding circuit configuration A method is provided for controlling the current intensity of the electric current flowing through an inductive consumer, the consumer being connected in series to a switching device and a current measuring unit, and in parallel to a free-wheeling element, and the switching device being activated for adjusting the current intensity during a pulse width modulation period. It is provided that a mean load voltage to be set during the pulse width modulation period is determined from an input current intensity with the aid of a first controller, the mean load voltage being set in the pulse width modulation period with the aid of the switching device at the consumer, the mean load voltage or a setpoint load voltage determined with the aid of a second controller from a predefined setpoint current intensity being fed to a model adapted to the consumer, and the input current intensity being ascertained from the difference between the predefined setpoint current intensity and a difference variable between an actual current intensity through the consumer and a model current intensity determined with the aid of the model. A circuit configuration for implementing the method is also provided.
US09438093B2	Voice coil motor A voice coil motor (VCM) is disclosed, the VCM including: a rotor including a bobbin accommodated by a lens, and a coil block arranged at a periphery of the bobbin, a base formed with an opening for exposing a lens and a first foreign object penetration prevention unit formed along an upper edge, a stator including magnets wrapping the coil block and a housing formed with an opening for fixing the magnets and formed at a bottom surface with lateral surfaces formed with a second foreign object penetration prevention unit coupled to the first foreign object prevention unit, and an elastic member coupled to the bobbin to elastically support the bobbin.
US09438088B2	Rotating electrical machine unit with a power inverter having a ring-shaped casing A rotating electrical machine unit includes a rotating electrical machine including a ring-shaped stator and a rotator provided inside of the stator, and a power inverter including a ring-shaped first casing and a power module accommodated in the first casing and integrated with the rotating electrical machine by being stacked in such a manner that a lower surface of the first casing is in contact with an upper surface of the stator. The power inverter has a first coolant path formed to have a ring shape in the first casing. The power module has a heat radiation unit arranged in the first coolant path and exchanging heat with a cooling medium flowing in the first coolant path.
US09438085B2	Electromechanical converter system for an electric vehicle with enhanced cooling The invention relates to a converter system (1, 1′, 1″) for an electric vehicle and in particular a lightweight electric vehicle. The converter system (1, 1′, 1″) has a supporting housing (10, 10′, 10″) for connecting to the vehicle, has an electromechanical energy converter arranged at least partially in the supporting housing (10, 10′, 10″), said electromechanical energy converter having at least one stator (21, 21′) and a rotor (22, 22′) which is rotatable relative to the stator (21, 21′) about a drive axis (7, 40), and has a power transmitting device which connects the rotor (22, 22′) to a connection element. To permit a particularly cheap design which is easy to maintain and to reduce thermal problems, the supporting housing (10, 10′, 10″) has at least one first (14) and one second axial portion (15). wherein (the first portion (14) has a greater diameter than the second portion (15) in a direction transversely with respect lo the drive axis (7, 40). Here, the second portion (15) of the supporting housing (10, 10′, 10″) is formed for mourning the rotor (22, 22′) and/or the connection element. The rotor (22, 22′) and stator (21, 21′) of the energy converter are arranged at least partially in the first portion (14) of the supporting housing (10, 10′, 10″).
US09438080B2	Seal arrangement for a motor pump assembly and a motor for a pump including a seal arrangement An electric machine includes an end frame having a shaft bore extending therethrough. The end frame includes a first side and a second side. A shaft extends through the shaft bore. A bearing is supported by the end frame and is coupled to the shaft to support the shaft for rotation about a longitudinal axis. A first seal is fixedly attached to the end frame and includes an internal bore that is sized to cooperate with the shaft to form a seal point therebetween. The first seal is disposed on the first side of the end frame. A second seal is fixedly attached to the second side of the end frame. The second seal includes a movable portion in direct contact with the shaft to define a second seal point. The first seal point is on a first side of the bearing and the second seal point is on a second side of the bearing.
US09438076B2	Stator lamination stack indexing and retention An electrical device including a housing having an inner surface, a lamination assembly and at least one pin extending from an inner surface of the housing. The lamination assembly has at least one slot therein. The lamination assembly is clocked to a position so that the at least one pin coacts with the at least one slot to rotationally orient the lamination assembly. The at least one pin additionally acts to constrain the lamination assembly from axial removal from the housing thereby rotationally and axially limiting movement of the lamination assembly to a predetermined range of movement within the housing.
US09438073B2	Power supply switching circuit, real time clock device, electronic apparatus, mobile unit, and method of controlling power supply switching circuit A power supply switching circuit includes a switching circuit that electrically connects a VCC terminal and a VBK terminal in a connected state, a switch control circuit, and a power supply monitoring circuit that monitors a voltage of the VCC terminal, and outputs a voltage of the VBK terminal. The switch control circuit switches a mode from a normal mode in which the switching circuit is intermittently connected to a standby mode in which the switching circuit is opened according to an output signal of the power supply monitoring circuit.
US09438072B2	Server A server includes a power module, a detection circuit, a switching circuit, at least one first electric component and at least one second electric component. The power module supplies a standby voltage under a standby mode and supplies a working voltage under a working mode. The detection circuit receives a working mode signal of the server to output a control signal. The working mode signal specifies that the server is under the standby mode or the working mode. The switching circuit is supplied with the working voltage, the standby voltage and a converted control signal generated by converting the control signal, to transfer either the working voltage or the standby voltage. The first electric component works under the working mode only. The second electric component works under the standby mode and the working mode.
US09438069B2	Vehicle-mounted charger A vehicle-mounted charger which performs wireless charging includes a control unit which controls energization of a primary coil, a position detection unit which detects a positional relationship between the primary coil and a secondary coil of an apparatus to be charged such as a mobile phone, and a notification unit which performs notification to the user. In a state where the energization of the primary coil is not performed, the control unit acquires the positional relationship between the primary coil and the secondary coil which is detected by the position detection unit, and controls the notification unit to notify of the positional relationship.
US09438068B2	Wireless power feeder and wireless power feeding method A non-contact power feeder includes a plurality of power transmission coils disposed along a disposition surface, wherein a power receiving device that houses a power reception coil is disposed on the disposition surface, and a controller that determines a first traveling wave power, from among a plurality of traveling wave powers, that feeds the power transmission coil corresponding to the power receiving device based on a state of change of at least one of: actual transmitted power, from the plurality of traveling wave powers, transmitted from the plurality of power transmission coils to the power reception coil when power transmitted to the plurality of power transmission coils is changed, and reactive power, from the plurality of traveling wave powers, not transmitted from the power transmission coil to the power reception coil when the power transmitted to the plurality of power transmission coils is changed.
US09438066B2	Contactless rechargeable secondary battery and contactless battery charger A contactless rechargeable alkaline secondary battery includes an alkaline secondary battery; a power receiver circuit having receiver coils and a resonance capacitor and adapted to receive AC power via magnetic field resonance, the resonance capacitor connected with the receiver coils L1 to L4; a rectifier circuit adapted to rectify the AC power; a current limiter circuit adapted to limit a charging current flowing from the rectifier circuit to the alkaline secondary battery; and an outer casing configured to be cylindrical in shape, adapted to house the alkaline secondary battery, and provided with a positive terminal and a negative terminal, the positive terminal being connected with a positive pole of the alkaline secondary battery and the negative terminal being connected with a negative pole of the alkaline secondary battery, wherein the power receiver coils are shaped like a sheet of an electric wire wound along a plane.
US09438065B2	Portable electronic device, wireless charging device for the same, and wireless charging system A wireless charging device may include: a transmitting unit configured to receive a high-frequency AC current and generate magnetic energy; and a first fixing unit disposed on a rear surface of the transmitting unit and configured to generate a designated magnitude or more of attractive force.
US09438062B2	Wireless electric power receiver for wirelessly regulating electric power using switch A wireless electric power receiver for receiving wireless electric power from a wireless electric transmitter is provided. The wireless electric power receiver includes an electric power receiving unit that receives wireless electric power from the wireless electric power transmitter; a rectifying unit that rectifies wireless electric power in the form of alternating current output from the wireless electric power receiving unit and outputs rectified electric power; and an electric power regulation unit that receives an input of the rectified electric power, outputs first electric power which has a lower value of a first voltage than that of the rectified electric power for a first period, and does not output electric power for a second period, so as to output electric power with a predetermined voltage value.
US09438061B2	Controlling charging current supplied to plurality of cell modules connected in parallel Even when current values of a current that flows to a plurality of cell modules connected in parallel are different, efficient charging is performed. A charge control device that controls a charging current to be supplied to a plurality of cell modules connected in parallel compares a maximum current value, selected from current values detected by a current sensor provided in each of a plurality of the cell modules, with a reference current value predetermined as a maximum current value of the current to be supplied to secondary batteries, and controls the charging current to be supplied to a plurality of the cell modules based on a comparison result.
US09438060B2	Power recovery controller The inventive subject matter provides a circuit and a method for efficiently charging a battery. In one aspect of the invention, the circuit includes a constant current circuit configured to provide a direct current through the battery. The circuit also includes a pulsing current circuit that works with the constant current circuit and configured to simultaneously provide a series of pulsed current to the battery. In some embodiments, the series of current pulses includes constructive resonant ringing that is constructive with respect to the charging of the battery.
US09438054B2	Battery charger integrated circuit chip An on-chip digital communication interface circuit is to be directly coupled to a counterpart interface circuit of a separate battery-side gas gauge circuit. An on-chip battery charging control circuit controls battery charging voltage and current that is supplied from a separate power source interface circuit to a battery cell terminal, according to charging voltage and current limits. The charging limits are read from the gas gauge circuit and in effect carry out a selected one of several different battery charging profiles. Other embodiments are also described and claimed.
US09438050B2	Overcharge detecting circuit and integrated circuit In a battery pack, an overcharge detecting circuit compares a voltage between a positive electrode and a negative electrode of a secondary battery with a threshold voltage to detect an overcharge of the secondary battery, and turns off a switching element. A series circuit including a thermistor and a resistor is arranged near the secondary battery and connected in parallel to the secondary battery. A comparator compares a voltage at a junction point of the thermistor and the resistor with a reference voltage corresponding to a predetermined temperature. In response to an output signal of the comparator, a changing unit changes the threshold voltage to a first value when a temperature of the secondary battery is below the predetermined temperature, and changes the threshold voltage to a second smaller value when the temperature of the secondary battery is above the predetermined temperature.
US09438047B2	Method for monitoring the state of charge, or remaining capacity, of a disposable or rechargeable battery A method for monitoring charge level or remaining capacity of a battery pack, a disposable battery or a rechargeable battery, which is used to supply energy for an automation technology, field device having a data storage unit associated with the battery pack, disposable battery or rechargeable battery. Specific information about the battery pack, disposable battery or rechargeable battery is stored in the data storage unit and process-specific and operation-specific information about energy consumption is written to the data storage unit. In the case of the battery pack, disposable battery or rechargeable battery being used in a second automation technology field device, remaining service life of the battery pack, the disposable battery or the rechargeable battery is calculated and output on the basis of the process- and operation-specific information.
US09438041B2	System and method for energy distribution A Dispatch Planner (DP) is a component in an Energy System Controller that controls the operation of energy resources interconnected into one energy system to provide optimal energy management for a customer. In one embodiment, the energy storage system includes an electric load, dispatchable sources of energy such as an electrical grid, diesel generators, combined heat and power generators; renewable sources of energy such as photo-voltaic cells and wind turbines; and stored energy resources such as electrochemical batteries or pumped hydro reserves.
US09438039B2	Demand response determination apparatus and method for determining a power threshold using an over-consumption false positive rate and unloading electric power equipment when the power threshold is exceeded A demand response determination apparatus and a demand response determination method thereof are provided. The demand response determination apparatus connects to an electric power system via a network. The demand response determination apparatus receives power consumption information from the electric power system and decides a power consumption mode of the electric power system according to the power consumption information. The demand response determination apparatus calculates demanded power according to the power consumption mode and determines whether the demanded power exceeds a power consumption threshold. The demand response determination apparatus informs the electric power system to unload electric power equipment when the demanded power exceeds the power consumption threshold.
US09438038B1	Power supply fast turn-on and increased hold-up time within an electrical device This disclosure is directed to techniques for providing supply power to components of an electronics system, such as components of a networking device. According to these techniques, a power supply system charges a bulk capacitance of a power supply unit when the power supply unit is selectively disabled (e.g., disconnected). In this manner, when the power supply unit is again enabled, the power supply unit may provide supply power to components of the networking device faster in comparison to other techniques. In addition the power supply does not use any input power and therefore does not produce any heat loss while it is disconnected, thus saving otherwise wasted energy.
US09438037B2	Systems for optimized solar power inversion Different systems to achieve solar power conversion are provided in at least three different general aspects, with circuitry that can be used to harvest maximum power from a solar source or strings of panels for DC or AC use, perhaps for transfer to a power grid three aspects can exist perhaps independently and relate to: 1) electrical power conversion in a multimodal manner, 2) alternating between differing processes such as by an alternative mode photovoltaic power converter functionality control, and 3) systems that can achieve efficiencies in conversion that are extraordinarily high compared to traditional through substantially power isomorphic photovoltaic DC-DC power conversion capability that can achieve 99.2% efficiency or even only wire transmission losses. Switchmode impedance conversion circuits may have pairs of photovoltaic power series switch elements and pairs of photovoltaic power shunt switch elements.
US09438034B2	Transient voltage suppressor The invention provides a voltage regulator including a transient voltage suppressor. The transient voltage suppressor includes N first transistors and N semiconductor units. The N first transistors are coupled between a reference ground and N pads respectively, and the N transistors are controlled by a voltage on a reference power line. The N semiconductor units are coupled between the reference ground and the N pads respectively, or coupled between the reference power line and the N pads respectively. N is a positive integer.
US09438029B2	Circuit for transferring power between a direct current line and an alternating-current line A system, method, and apparatus is disclosed for interfacing and transferring power unidirectionally or bidirectionally between a direct current (DC) line and a single or multiphase alternating-current (AC) line for only half of any given phase and only a single phase at a time when polarity is matched between the DC and the AC system. A circuit with simplified, robust, and reduced-cost components perform the power conditioning and the synchronization as a system that simulates a half-wave rectifier/inverter.
US09438028B2	Motor relay with integrated arc-flash detection Disclosed herein are various embodiments of devices and related methods for detecting an electrical arc event using a motor management relay and for suppressing the electrical arc event. The motor management relay may incorporate an optical arc-flash sensor configured to detect an optical event. Control logic may analyze the optical event and determine whether the optical event corresponds to an electrical arc event. When an electrical arc event is detected an instruction may be issued via a control port in communication with the control logic to implement a protective action. According to various embodiments, a plurality of sensors for monitoring electrical characteristics of a motor may also be in communication with the control logic. Input from the sensors may be analyzed in order to determine whether the optical event corresponds to an electrical arc event.
US09438025B1	Radiation hardened chip level integrated recovery apparatus, methods, and integrated circuits Methods, apparatus, and integrated circuits that provide radiation hardening through chip level integrated recovery are provided. The apparatus may include first and second circuits within a partition of an integrated circuit and a state machine configured to monitor current leakage of the first circuit while the first circuit is powered on and to power on the second circuit and power off the first circuit when the monitored first circuit current leakage exceeds a first current leakage threshold. The method may include powering a first circuit of a partition within an integrated circuit, monitoring current leakage of the first circuit while the first circuit is powered on and the second circuit is powered off, and powering off the first circuit and powering on the second circuit when the monitored first circuit current leakage exceeds a first current leakage threshold.
US09438024B2	Isolator protection device An isolator protection device can include a housing having at least one wall and a first coupling feature, where the at least one all forms a cavity, where the first coupling feature is configured to couple to an arrester, and where the at least one wall is configured to house an isolator body of an isolator within the cavity. The isolator protection device can also include a securing device disposed within the cavity, where the securing device is configured to secure a stud of the isolator to the isolator body during normal operating conditions.
US09438021B2	Organizing device for cable and wire An organizing device includes a cylindrical retainer member made of a resilient material and having one or more longitudinal grooves and spaced from each other for forming one or more partitions between the grooves of the cylindrical retainer member, and having one or more slots formed in an outer peripheral portion and communicative with the grooves for engaging a cable through the slot and into the grooves of the cylindrical retainer member. The grooves of the cylindrical retainer member include different shapes for receiving and engaging with cables of different shapes, and include a height different from each other.
US09438012B2	Systems and methods for coupling AC power to a rack-level power infrastructure In accordance with the present disclosure, a detachable power cable interface box (PCIB) for coupling AC power to a rack-level power infrastructure is described. The detachable PCIB includes a body section and a terminal disposed within the body section. The terminal may be coupled to an AC power source. A wiring block may also be disposed within the body, and the modular wiring block may be coupled to the terminal. The wiring block may arrange power input from the AC power source into a pre-determined output configuration corresponding to a detachable interface. The system may also include the detachable interface, and the detachable interface may be configured to couple with an integrated connector of the rack-level power infrastructure. The detachable interface may be common to all types of AC power sources.
US09438011B2	Single-mode, distributed feedback interband cascade lasers Single-mode, distributed feedback interband cascade lasers (ICLs) using distributed-feedback gratings (e.g., lateral Bragg gratings) and methods of fabricating such ICLs are provided. The ICLs incorporate distributed-feedback gratings that are formed above the laser active region and adjacent the ridge waveguide (RWG) of the ICL. The ICLs may incorporate a double-ridge system comprising an optical confinement structure (e.g., a RWG) disposed above the laser active region that comprises the first ridge of the double ridge system, a DFB grating (e.g., lateral Bragg grating) disposed above the laser active region and adjacent the optical confinement structure, and an electric confinement structure that passes at least partially through the laser active region and that defines the boundary of the second ridge comprises and the termination of the DFB grating.
US09438003B2	Solid-state laser A solid-state laser arrangement includes a plate-like solid body including a laser-active medium, a heat sink, a layer of adhesive between a carrier face of the heat sink and the plate-like solid body, and a reflective coating on a side of the plate-like solid body facing the adhesive layer, in which the adhesive layer is completely shielded from radiation from the plate-like solid body by a radiation-impermeable region between the side of the plate-like solid body facing the adhesive layer and the carrier face of the heat sink.
US09438001B2	Laser device and method for producing same A method for producing a laser device having a laser configured in order to emit a laser beam, a lens (31) which is positionally adjusted with respect to the laser, and a lens holder having at least two parts (2a, b, c) then following one another in a propagation direction (3) of the laser beam, of which at least two lens holder parts (2a, b, c) each have an end side oriented obliquely with respect to the propagation direction (3) and can be brought into a multiplicity of relative positions with respect to one another, respectively, with their end sides oriented obliquely with respect to the propagation direction (3) bearing on one another, wherein the length of the lens holder (1) in the propagation direction (3) is adjusted by selecting one of the relative positions.
US09438000B2	Shield connector for a shield cable A shell of a female connector includes two members including a shell body integrated with a female housing and a braided wire fixing member to which a braided wire of a shield cable is crimped and fixed. The braided wire fixing member to which the braided wire is crimped and fixed is mated with a cylindrical portion of the shell body integrated with the female housing.
US09437999B2	Method for manufacturing oxygen sensor The invention provides a method for manufacturing an oxygen sensor that is excellent in responsiveness and can be preferably used for diagnosis of catalyst deterioration. An oxygen sensor 1 equipped with an oxygen sensor element 11 comprising a solid electrolyte 21 and Pt coatings, as a pair of electrodes, on both surfaces of the solid electrolyte 21 is manufactured. The method comprises at least steps of: providing a Pt coating 23 on at least one of the solid electrolyte 21 surfaces exposed to the gas to be tested so as to form closed pores 23a inside the Pt coating 23; and heating either the Pt coating 23 or 24 exposed to gas to be tested in a gas atmosphere with higher oxygen concentration than that of the atmospheric gas.
US09437998B2	Method of preparing silver-based electrical contact materials with directionally arranged reinforcing particles A method of preparing silver-based electrical contact materials with directionally arranged reinforcing particles includes steps of: (1) preparing composite powders with Ag coating on the reinforcing phase by chemical plating coating; (2) granulating; (3) placing the granulated powders and the matrix silver powders into the powder mixer for mixing; (4) cold-isostatically pressing; (5) sintering; (6) hot-presssing; (7) hot-extruding, thereby obtaining the reinforcing silver-based electrical contact materials with directionally arranged particles. Regardless of the size of reinforcing particles, the present invention can obtain particle-reinforced silver-based materials with excellent electrical performance. The process is simple and easy to operate, and places no special requirements on the equipment. Furthermore, the resistance to welding and arc erosion, and the conductivity of the material prepared by the present invention can be greatly improved. Moreover, the processing performance is excellent.
US09437993B2	Device for imparting electrical energy to one or more plugs A device for imparting electrical energy to one or more male plugs, the device including at least three female receiving ports for receiving the blades from one or more male plugs wherein the at least three female receiving ports are positioned within the device side by side such that the first female receiving port is capable of receiving a hot blade from the male plug, the second female receiving port is capable of receiving a neutral blade from the male plug and the third female receiving port is capable of receiving a hot blade from the male plug.
US09437987B1	Connecting structure for earphone A connecting structure for an earphone contains: a male connector and a female connector. The male connector includes a plug terminal and an insulation holder, the plug terminal has a locking portion adjacent to a bottom of the plug terminal, and the plug terminal has at least one protrusion extending outwardly from a peripheral side of the locking portion. The plug terminal is mounted in the insulation holder, and between the insulation holder and the plug terminal is defined an inserting groove. The female connector includes an insertion seat and a body. The body has a fixing portion inserted into the inserting groove, and the fixing portion has at least one alignment orifice corresponding to the at least one protrusion. The insertion seat is fixed in the body to electrically connect with the plug terminal.
US09437986B2	Shockless plug and socket assembly for safe interconnection of live circuits Technologies are generally described for a socket, plug, and jumper system. In an example, a receptacle socket includes a first prong receptacle for a ground circuit, a second prong receptacle for a neutral circuit, and a third prong receptacle for an active voltage circuit. A plug housing includes a first prong contact corresponding to the first prong receptacle for the ground circuit, a second prong contact corresponding to the second prong receptacle for the neutral circuit, and a fourth prong receptacle for the active voltage circuit. A jumper component includes a third prong contact corresponding to the third prong receptacle for the active voltage circuit, and a fourth prong contact corresponding to the fourth prong receptacle for the active voltage circuit, wherein the fourth prong contact is completely recessed within the jumper component.
US09437984B2	Dual orientation electronic connector A dual orientation connector having a connector tab with first and second major opposing sides and a plurality of electrical contacts carried by the connector tab. The plurality of contacts includes a first set of external contacts formed at the first major side and a second set of external contacts formed at the second major side. Each individual contact in the first plurality of contacts is electrically connected within the tab or body to a corresponding contact in the second plurality of contacts. In some embodiments contacts in the first and second pluralities of contacts that are directly opposite each other are coupled together. In some other embodiments, contacts in the first and second pluralities of contacts that are in a cater cornered relationship with each other are coupled together. The first plurality of contacts are symmetrically spaced with the second plurality of contacts and the connector tab is shaped to have 180 degree symmetry so that it can be inserted and operatively coupled to a corresponding receptacle connector in either of two insertion orientations.
US09437976B2	Electrical connector An electrical connector (100) includes: an insulative housing (10) defining a number of receiving spaces (120); a number of contacts (20) mounted to the insulative housing for transmitting high speed signal, each of the contacts including a mating portion (21), a mounting portion (22) received in one of the receiving spaces, and a connecting portion (23) connecting the mating portion and the mounting portion, a gap formed between each mounting portion and corresponding one of the receiving spaces; and a number of insulative members (52) inserted into the receiving spaces respectively to fill the gaps to adjust the impedance of the contacts.
US09437975B2	Crosstalk-proof receptacle connector A crosstalk-proof receptacle connector has multiple insulative boards, multiple sets of terminals, multiple sets of shielding plates and an outer casing. The insulative boards are arranged abreast. The sets of the terminals are mounted respectively in the insulative boards. The terminals of each set are classified into signal terminals and grounding terminals. Each set of the shielding plates is mounted on one of two opposite sides of a corresponding insulative board. The shielding plates of each set are spaced apart without contacting one another. Each shielding plate has multiple folding sections capable of interrupting signal noise. The outer casing covers the insulative boards to combine the insulative boards. The sets of the shielding plates decrease signal interference of the receptacle connector and improve signal transmission efficiency and stability.
US09437972B2	Electric connector An electric connector includes a male connector and a female connector, the male connector including a cylindrical main portion, and a male contact terminal formed at the main portion. The female connector includes a hole into which the main portion is fit, and a female contact terminal formed at the hole for making electrical contact with the male contact terminal when the main portion is fit into the hole. One of the male connector and the female connector includes a guide shaft axially extending in a direction in which the male connector is fit into the female connector, and the other of the male connector and the female connector includes a guide hole for allowing the guide shaft to be inserted thereinto to guide the guide shaft in the direction.
US09437969B2	Connection mechanism A connection mechanism between two components may use one or more metallic pins that are magnetically extended when the components are engaged, the pins extending into one or more slots. The components are attached in place by the pins extended into the slots during attachment. The connection mechanism may include one or more magnets mounted on either or both components. The magnets may be arranged to attract the components when the components are in the locking orientation and to repel the components when the components are in an unlocked position. The connection mechanism may include electrical connections between the components.
US09437967B2	Electromagnetic connector for an industrial control system An electromagnetic connector is disclosed that is configured to form a first magnetic circuit portion comprising multiple coils disposed about a first core member. The electromagnetic connector is configured to mate with a second electromagnetic connector that is configured to form a second magnetic circuit portion comprising a coil disposed about a second core member. When the electromagnetic connector is mated with the second electromagnetic connector, the first core member and the second core member are configured to couple the multiple coils of the electromagnetic connector to the coil of the second electromagnetic connector with a magnetic circuit formed from the first magnetic circuit portion and the second magnetic circuit portion. The magnetic circuit is configured to induce a signal in a first coil of the multiple coils and the coil of the second electromagnetic connector when a second coil of the multiple coils is energized.
US09437966B2	Electrical cord plug eject mechanism A plug housing includes an ejector mechanism and a controller electrically coupled to the ejector mechanism for detaching electrical conductive blades of the plug from a mated connection with a female connector. In response to a switch signal from the controller, a solenoid is activated to release a latch in the mechanism, thereby permitting the force of a compressed spring to impel a structure outwardly from the plug. The controller may be located remotely from the plug and superimpose control signals to the plug over the power lines within the cord.
US09437963B1	Strain reliever having two different portions encircling two different portions of a connector of a cable A strain reliever that relieves strain on a cable (particularly a Lightning® cable) having a connector with a first portion and a second portion that are coaxially disposed and of different widths so as to form a first shoulder therebetween. The width of the cable is different from the width of the second portion of the connector of the cable so as to form a second shoulder therebetween. The strain reliever includes a first portion and a second portion. The first portion encircles the first portion of the connector of the cable. The second portion extends from the first portion, and encircles the second portion of the connector of the cable.
US09437961B1	Two mating electrical power connector assemblies having identical configurations An electrical power connector assembly includes a body having a housing portion and a connection portion; a coupling ring rotatably disposed on the body; and a power connector disposed within the housing portion of the body. The power connector is configured to form a mating engagement with another power connector having the same configuration. The coupling ring is configured to engage a connection portion of another electrical power connector assembly having the same configuration and the connection portion of the body is configured to be engaged by a coupling ring of the other electrical power connector assembly. The coupling ring and the connection portion of the body are configured to engage the connection portion and the coupling ring of the other electrical power connector assembly, respectively, to bring the power connectors together to complete the mating engagement between the power connectors.
US09437957B2	Waterproof connector having internally concealed grounding pin The present invention is to provide a waterproof connector having internally concealed grounding pin, which includes an outer housing having an isolation layer covered on a metal frame thereof by injection molding to form at least one grounding part exposed to a first accommodating space therein and at least one outer grounding pin exposed out of the isolation layer; an inner casing made of metal material and having at least one inner grounding pin abutted against the grounding part when the inner casing is mounted inside the outer housing; a terminal block formed by plastic integrally, having a plurality of connection terminals passing therethrough, and mounted inside the inner casing; and a waterproof glue layer watertightly filled in the rear ends of the outer housing and inner casing. Since the inner grounding pin is fully concealed inside the outer housing, the moisture can no more pass through the connector accordingly.
US09437956B2	Waterproof connector and manufacturing method thereof A waterproof connector has: at least one conductive contact; a metal shell interior of which the contact is disposed; and a housing made of an insulating resin material such that the housing fixes the contact and the shell to form an integral structure, the shell has an insertion port into which a counterpart connector is inserted on one side, and the housing is formed such that the shell is exposed at the outer circumference of and at the vicinity of the insertion port over a predetermined width in the length direction of the shell to form an outer circumferential exposure portion, and the outer circumferential exposure portion of the shell is disposed with a waterproof portion made of an elastic material.
US09437955B2	Sealed connector and method of sealing a connector A connector for electrical supply of a unit of the hydraulics which can be arranged or is arranged at a casing of such unit. Thereby at least one current path penetrates a connector bottom of the connector and the connector bottom is sealed with a silicone-containing compound against penetrating moisture in an area of this passage. The compound is an adhesive having high adhesive forces. A casing of a unit of the hydraulics can include such connector. A method of sealing a connector bottom of a connector penetrated by a current path is disclosed via which connector a unit of the hydraulics is adapted to be electrically supplied, the method includes a step of sealing a passage of the current path through the connector bottom with silicone-containing adhesive.
US09437952B2	Connector assembly having self-adjusting male and female connector elements A connector assembly includes a male connector element that is manually expandable to control tightness of fit in a and a female connector element. The male connector element is having a first and a second portion configured by longitudinally bi-furcating the male connector element and includes a chamfered portion, a radially adjusting mechanism and a screw. The chamfered portion is axially configured on male connector element and receives the radially adjusting mechanism that moves the first and second portions relative to each other. The screw axially passes through male connector element and radially moves the radially adjusting mechanism to adjust the gap between the first and second portions to adjust external dimension of male connector element. The female connector element is having a tubular configuration that receives male connector element and is having a plurality of longitudinal slits configured thereon, walls of the female connector element are urged radially inwards towards the male connector element to maintain contact there-between by a spring element.
US09437949B2	Electrical cable assembly configured to be mounted onto an array of electrical contacts Cable assembly including a carrier board having a terminating side and a mounting side that face in opposite directions. The terminating side includes a contact array of electrical contacts. The mounting side includes a mating array of electrical contacts. The contact array and the mating array are interconnected to each other through conductive pathways of the carrier board. The contact array along the terminating side overlaps with the mating array along the mounting side. The carrier board is configured to be mounted onto an electrical component having a two-dimensional array. The cable assembly also includes a plurality of cables having cable end portions that are coupled to the carrier board. The cable assembly includes a shield assembly that extends over the terminating side and covers the cable end portions and the contact array.
US09437948B2	Electrical connector An electrical connector includes a body having multiple receiving slots, and multiple terminals disposed in the receiving slots. Each terminal includes a base, a material connection portion extending vertically from a side of the base, a fixing portion extending vertically from another side of the base and fixable to the receiving slot, a first elastic arm bending upward and extending from the base, a first contact portion disposed at the top of the first elastic arm for contacting a chip module, at least one first bending portion formed by the first elastic arm, a second elastic arm bending downward and extending from the base, a second contact portion disposed at the bottom of the second elastic arm for contacting a circuit board, and multiple second bending portions formed by the second elastic arm. The number of the second bending portions is greater than that of the first bending portion.
US09437946B2	Printed circuit board assembly having improved terminals A printed circuit board includes a surface and having first and second adjacent apertures. First and second electrical terminals include respective ends disposed in the first and second apertures of the printed circuit board, respective shoulders adjacent to the ends of the first and second electrical terminals and engaged with the surface of the printed circuit board, and respective insertion tabs adjacent to the shoulders of the first and second electrical terminals and located respective first and second distances away from the surface of the printed circuit board. The first and second distances are different such that the first and second insertion tabs do not touch one another.
US09437945B2	Electrical connector with improved terminal An electrical connector and terminal for use therewith are disclosed. The terminal includes a securing portion extending along the vertical direction and provided with a plurality of bumps for fixing the terminal; a soldering portion bending and extending from the upper end of the securing portion to a first side of the securing portion. The terminal includes an arc bending portion, the arc bending portion extends from the lower end of the securing portion to the first side, and then extends through a bend to a second side opposite to the first side, the arc bending portion being hook shaped. The terminal includes a contact portion that extends obliquely and upwards from the arc bending portion toward the second side.
US09437940B1	Terminal block connector A terminal block connector, having a front shell, a rear shell, a metal contact assembly, wire insertion openings, and pullable caps. The metal contact assembly is formed by front flexible metal strips and rear metal strips. The front flexible metal strips are tilted upwardly. Top portions of the rear metal strips have protruding strips. The tilted portions of the front flexible metal strips are positioned below the protruding strips and are in contact therewith. Bulges are provided on the top portion of the front shell each having two troughs on its two sides. One end of a pullable cap is a pulling grip, another end of which contains two symmetrical press strips. The symmetrical press strips are inserted into corresponding troughs. A press tip is formed at a bottom part of each press strip. Recesses corresponding to the press tips are provided on the front flexible metal strips.
US09437939B2	Flow drill screw attached grounding block A grounding block is provided. The grounding block includes a means for fastening and a formed metallic block. The formed metallic block further comprises two or more flanges, where each flange is configured to accept the means for fastening. The formed metal block further comprises a uniform clearance formed into the underside of the grounding block between the flanges and a hole formed through the grounding block configured to accept a bolt. Various embodiments include angled surfaces to optimize assembly ergonomics and variable depth to optimize the mass of the blocks.
US09437933B2	Sensor device with helical antenna and related system and method An apparatus includes a sensor that receives a first electrical signal and provides a second electrical signal in response to the first electrical signal. The second electrical signal is based on at least one parameter monitored by the sensor. The apparatus also includes an antenna that converts first wireless signals into the first electrical signal and that converts the second electrical signal into second wireless signals. The antenna includes a substrate, conductive traces, and conductive interconnects. The conductive traces are formed on first and second surfaces of the substrate. The conductive interconnects couple the conductive traces, and the conductive interconnects and the conductive traces form at least one helical arm of the antenna. The conductive traces could be formed in various ways, such as by etching or direct printing. The conductive interconnects could also be formed in various ways, such as by filling vias in the substrate or direct printing.
US09437931B2	Mobile device and antenna structure using ionic polymer metal composite therein A mobile device includes an antenna structure, a signal source, and an IPMC (Ionic Polymer Metal Composite). The signal source is configured to excite the antenna structure. The IPMC is configured as a flexible actuator to adjust a resonant length of the antenna structure in such a manner that the antenna structure is capable of operating in multiple bands.
US09437928B2	Feeding matching apparatus of multiband antenna, multiband antenna, and radio communication device The present disclosure relates to the field of antenna technologies and discloses a feeding matching apparatus of a multiband antenna, a multiband antenna, and a radio communication device to improve a bandwidth and efficiency of a lower frequency band. The feeding matching apparatus of a multiband antenna includes: a grounding portion; a feeding portion connected to a signal source, where a signal of the signal source is input into the feeding portion; and two or more ground cable branches with different lengths, where one end of each ground cable branch is electrically connected to the feeding portion, the other end is electrically connected to the grounding portion, at least one ground cable branch is connected in series to a signal filtering component, and the signal filtering component is capable of preventing a signal lower than a frequency point corresponding to the signal filtering component from passing through it.
US09437926B2	Antenna having asymmetric T shape coupled feed A broadband antenna for interfacing an electronic device with a plurality of radio access technologies is provided. The antenna includes an excitation element and a parasitic element. The excitation element includes a feed line with a first distal end and a second distal end with first and second arms extending from the second distal end, wherein one of the first or second arms is shorter than the other such that the excitation element forms an asymmetrical T shape. The length of the first and second arms determines at least two modes of operation of the antenna. The parasitic element wraps around the asymmetrical T shape and includes a length configured to provide another mode of operation of the antenna.
US09437924B2	Antenna structure and wireless communication device using same An antenna structure includes a first radiating body and a second radiating body. The first radiating body includes a feed portion, a first ground portion, a first extending portion, a second extending portion, and a third extending portion. The feed portion is electronically connected to the first ground portion. The first extending portion is electronically connected to the feed portion. The second extending portion is perpendicularly connected between the first extending portion and the third extending portion. The second radiating body includes a second ground portion and a combining portion electronically connected to the second ground portion. The combining portion is spaced from the third extending portion.
US09437923B2	Simultaneous imaging and precision alignment of two millimeter wave antennas based on polarization-selective machine vision A system and method for imaging and aligning antennas that includes an overlay imaging aligner composed of two or more antennas in association with a polarization gate, a polarization beam splitter, a non-polarizing beam splitter, a beam dump, one or more imaging lens and a common detector array. The overlay imaging aligner aligns the antennas by overlaying simultaneous digital images associated with the antennas on the common detector array. The antennas can be, for example, mm Wave antennas, waveguides, etc. The detector array generates real-time digital images the antennas. Such an approach of simultaneous imaging leverages the spatial resolution of digital optical imaging to aligning antenna components.
US09437921B2	Optically reconfigurable RF fabric A system to configure a planar microwave circuit, a method of forming a configurable planar microwave circuit, and a microwave circuit are described. The system includes a ground plane and a substrate disposed on the ground plane. The system also includes a photosensitive layer disposed on the substrate. A light source controllably changes a pattern of illumination on the photosensitive layer to controllably configure a transmission line in the photosensitive layer.
US09437919B2	Information equipment with a plurality of radio communication antennas Information equipment according to an embodiment includes a display housing with a display unit, a first radio communication antenna disposed at an end part of the display housing, a second radio communication antenna using a frequency band adjacent to or overlapped with that of the first radio communication antenna, and a third radio communication antenna disposed at an end part between the first and the second radio communication antennas, and uses a frequency band not adjacent to nor overlapped with those of the first and the second radio communication antennas.
US09437918B1	Antenna mounting bracket with adjustable azimuth settings An antenna mounting bracket with adjustable azimuth settings and a method and medium for using the antenna mounting bracket are provided. The antenna mounting bracket includes a fixed bracket assembly coupled to a support structure, and a movable bracket assembly to which an antenna is mounted. The movable bracket assembly is rotatably coupled to the fixed bracket assembly by a pivot rod. Locking pins associated with the fixed bracket assembly can be used to reversibly secure the movable bracket assembly at a certain azimuth. A gearbox assembly associated with the movable bracket assembly can be actuated to angularly rotate the movable bracket assembly a predetermined number of degrees relative to the pivot rod when the movable bracket assembly is not secured to the fixed bracket assembly by the locking pins. Rotation of the movable bracket assembly causes the mounted antenna to angularly rotate to a new azimuth.
US09437916B2	Filter A multi-mode cavity filter having a dielectric resonator body incorporating a piece of dielectric material, the piece of dielectric material having a shape such that it can support at least two substantially degenerate resonant modes; and a coupling structure comprising a plurality of independent coupling elements for coupling signals to the piece of dielectric material.
US09437915B2	Line bridging element for two microstrip lines and method A line bridging element for two microstrip lines, each of which are configured to conduct electromagnetic waves having a wavelength in the millimeter wavelength range, including a dielectric resonator, including a first coupling point, which is configured to couple the line-conducted electromagnetic wave, which is carried in the first microstrip line, into the dielectric resonator, including a second coupling point, which is configured to decouple the electromagnetic wave coupled into the dielectric resonator into the first microstrip line. The invention also provides a method for manufacturing a line bridging element.
US09437914B2	Power processing circuit and multiplex amplification circuit A power processing circuit includes a first portion, a second portion, a third portion, a resistor, a first coupling portion, and a second coupling portion. The first portion, the second portion, and the third portion are connected to respective external components. The resistor is used for isolating signals between the second portion and the third portion. The first coupling portion and the second coupling portion are substantially U-shaped coupling structures and are positioned at different sides of the resistor. The first coupling portion is connected to the first portion, the second portion, and ground. The second coupling portion is connected to the first portion, the third portion, and ground.
US09437913B2	Dielectric waveguide comprised of a dielectric block and a dielectric plate sandwiching an input/output feeder line Provided is an input/output structure for a dielectric waveguide, comprising a rectangular-parallelepiped-shaped dielectric block, a plate-shaped dielectric plate, and a feeder line comprising a line-shaped electrically conductive foil sandwiched between the dielectric block and the dielectric plate.
US09437911B1	Compliant high speed interconnects Systems (100) and methods (900) for providing a compliant micro-coaxial interconnect with an integrated circuit or other electronic device. The methods comprise: forming a well (108) in a first substrate (102) having a first Coefficient of Thermal Expansion (“CTE”); forming at least one three-dimensional micro-coaxial interconnect (100) on the first substrate so as to have a cantilevered end portion (110) disposed over the well; and using a first coupler (606) to electrically couple the cantilevered end portion to a second substrate (604) having a second CTE different from the first CTE. The cantilevered end portion has an angled joint (302) so that at least one of a pushing force and a pulling force applied thereby to the first coupler is minimized when mismatching movements of the first and second substrates occur.
US09437910B2	Multi-mode filter A dielectric resonator body for a multi-mode cavity filter, the resonator body including: a piece of first dielectric material, with at least one substantially flat face for mounting on a substrate, the piece of first dielectric material having a shape such that it can support at least a first resonant mode and at least one spurious response; and a layer of conductive material at least partially coating the resonator body; wherein the piece of first dielectric material includes at least one region having a different dielectric constant to the first dielectric material, whereby the presence of the region of different dielectric constant alters the frequency separation of the resonant mode and the spurious response.
US09437904B2	Lithium ion secondary battery A lithium ion secondary battery has a battery can, an electrode assembly in the battery can formed by rolling up a positive electrode, a separator, and a negative electrode, an organic electrolyte solution in the battery can, a positive electrode lead in the battery can connected to the positive electrode, a negative electrode lead in the battery can connected to the negative electrode, an overcharge preventer, a cap body sealing the battery can, a positive electrode terminal fixed to the cap body and connected to the positive electrode lead, and a negative electrode terminal fixed to the cap body and connected to the negative electrode lead.
US09437902B2	Method of manufacturing nonaqueous electrolyte secondary battery The manufacturing method of the invention includes the steps of: providing a positive electrode and a negative electrode (S10), a sodium ingredient being included in either the positive electrode or the negative electrode; producing an electrode assembly from the provided positive electrode and negative electrode (S20); producing a battery assembly in which the electrode assembly is housed in a battery case (S30); injecting a nonaqueous electrolyte solution into the battery case (S40), the nonaqueous electrolyte solution including at least lithium bis(oxalato)borate, a fluorophosphate compound, a carbonate solvent and an ether solvent, and the amount of ether solvent included in the nonaqueous electrolyte solution being less than 10 vol % when the amount of nonaqueous solvent included in the nonaqueous electrolyte solution is set to 100 vol %; and charging and discharging the battery assembly (S50).
US09437895B2	H2—Cl2 proton exchange membrane fuel cells, fuel cell assemblies including the same and systems for cogeneration of electricity and HCL Fuel cells and, more particularly, the H2—Cl2 proton exchange membrane fuels cells are described. In some embodiments the fuel cells include a flow through electrolyte assembly that is configured to allow the introduction of a first (relatively dilute) electrolyte into the cell, and the remove of a second (relatively concentrated) electrolyte from the cell. Fuel cell stacks and systems for cogenerating electricity and hydrochloric acid using such fuel cells are also described.
US09437894B2	Method of making a fuel cell device An electrode layer is provided by forming first and second sublayers containing input passages and exhaust passages, respectively. Electrode material is positioned around a first portion of first and second pluralities of spaced-apart removable physical structures to at least partially surround the structures thereby forming an active cell portion in each sublayer. Ceramic material is positioned around second portions to form a passive support structure in each sublayer. Another passive support structure is formed opposite the first, with the active cell portion therebetween. The sublayers are laminated, the physical structures are pulled out, and the laminated sublayers are sintered to reveal spaced-apart input passages from one end of the layer through the active cell portion, and spaced-apart exhaust passages from the active cell portion to a side of the layer adjacent the other end, the input and exhaust passages embedded in and supported by the sintered electrode and ceramic materials.
US09437893B2	In-membrane micro fuel cell An in-membrane micro fuel cell comprises an electrically-insulating membrane that is permissive to the flow of cations, such as protons, and a pair of electrodes deposited on channels formed in the membrane. The channels are arranged as conduits for fluids, and define a membrane ridge between the channels. The electrodes are porous and include catalysts for promoting the liberation of a proton and an electron from a chemical species and/or or the recombination of a proton and an electron with a chemical specie. The fuel cell may be provided a biosensor, an electrochemical sensor, a microfluidic device, or other microscale devices fabricated in the fuel cell membrane.
US09437892B2	System and method for converting chemical energy into electrical energy using nano-engineered porous network materials An energy conversion device for conversion of chemical energy into electricity. The energy conversion device has a first and second electrode. A substrate is present that has a porous semiconductor or dielectric layer placed thereover. The porous semiconductor or dielectric layer can be a nano-engineered structure. A porous catalyst material is placed on at least a portion of the porous semiconductor or dielectric layer such that at least some of the porous catalyst material enters the nano-engineered structure of the porous semiconductor or dielectric layer, thereby forming an intertwining region.
US09437886B2	Fuel cell system and method for stopping power generation in fuel cell system An oxygen-containing gas supply device of a fuel cell system is equipped with an oxygen-containing gas supply flow passage that communicates with an oxygen-containing gas inlet of a fuel cell. An oxygen-containing gas discharge flow passage communicates with an oxygen-containing gas outlet of the fuel cell. A compressor is disposed in the oxygen-containing gas supply flow passage and a supply flow passage sealing valve is disposed downstream from the compressor in the oxygen-containing gas supply flow passage. A discharge flow passage sealing valve is disposed in the oxygen-containing gas discharge flow passage, and a discharge fluid circulation flow passage that communicates with the oxygen-containing gas discharge flow passage is disposed at a location upstream from the discharge flow passage sealing valve, while also communicating with the oxygen-containing gas supply flow passage at a location upstream from the compressor.
US09437885B2	Fuel cell stack A fuel cell stack is provided that includes unit cells that include a manifold, an open end plate that is disposed at one side of the unit cells and that has a reaction gas inlet and outlet that are connected to the manifold, and a closed end plate that is disposed at the other side of the unit cells and that closes the manifold. In particular, the open end plate includes a first slanted surface that adjusts a flow of a reaction gas at a reaction gas inlet and a manifold interface. A first alignment protrusion forms the first slanted surface and that aligns the unit cells, and the closed end plate includes a second slanted surface that adjusts flow of a reaction gas at the manifold interface. Additionally, a second alignment protrusion forms the second slanted surface and aligns the unit cells accordingly.
US09437875B2	Highly elastic physically cross-linked binder induced by reversible acid-base interaction for high performance silicon anode Provided is a highly elastic physically cross-linked binder induced by reversible acid-base interaction for high performance silicon anode, and more particularly to a highly elastic physically cross-linked binder induced by reversible acid-base interaction for high performance silicon anode, in which the binder has excellent stiffness and elasticity. To this end, the polymer binder that is physically crosslinked with a crosslinking agent by acid-base interaction may include a crosslinking agent that is physically bound with the binder for silicon anode by reversible acid-base interaction with the binder for silicon anode.
US09437872B2	Negative electrode for rechargeable lithium battery, method of preparing the same and rechargeable lithium battery including the same A negative electrode for a rechargeable lithium battery is disclosed. The negative electrode includes a current collector and a negative active material layer positioned on the current collector and including a negative active material and a binder, wherein the negative active material includes a silicon-based material, a tin-based material, or a combination thereof, and the binder includes an organic acid including a carboxyl group-containing polymer and an organic base having a cyclic structure. A method of preparing the same, and a rechargeable lithium battery including the same are also disclosed.
US09437871B2	Sulfur based active material for a positive electrode A sulfur based active material has a core-shell structure including a hollow core and a porous carbon shell surrounding the hollow core. Sulfur is present in a portion of the hollow core. A polymer shell coating is formed on the porous carbon shell. The polymer shell coating includes nitrogen atoms that bond to carbon atoms of the porous carbon shell so that the porous carbon shell is a nitrogen-confused porous carbon shell.
US09437868B2	Iron (III) orthophosphate-carbon composite A method for producing an iron(III)orthophosphate-carbon composite which contains iron(III)orthophosphate of the general formula FePO4×nH2O (n≦2.5), a carbon source being dispersed in a phosphoric aqueous Fe2+ ion-containing solution and orthophosphate-carbon composite being precipitated and removed from the aqueous solution when an oxidant is added to the dispersion.
US09437863B2	Surface coating method and a method for reducing irreversible capacity loss of a lithium rich transitional oxide electrode A surface coating method and a method for reducing irreversible capacity loss of a lithium rich transitional oxide electrode are disclosed herein. In an example of the surface coating method, a dispersion of a lithium rich transitional oxide powder and an oxide precursor or a phosphate precursor in a liquid is formed. The liquid is evaporated. The forming and evaporating steps are carried out in the absence of air to prevent precipitation of the oxide precursor or the phosphate precursor. Hydrolyzation of the oxide precursor or the phosphate precursor is controlled under predetermined conditions, and an intermediate product is formed. The intermediate product is annealed to form an oxide coated lithium rich transitional oxide powder or the phosphate coated lithium rich transitional oxide powder.
US09437859B2	Battery cell interconnect and voltage sensing assembly and a battery module A battery cell interconnect and voltage sensing assembly is provided. The assembly includes a plastic frame member having a first side and a second side, and first, second, third and fourth elongated apertures extending therethrough. The assembly further includes an elongated interconnect member coupled to the plastic frame member and extends past both the first and third apertures. The elongated interconnect member is coupled to both a first electrical terminal of a first battery cell extending through the first elongated aperture, and a first electrical terminal of a second battery cell extending through the third elongated aperture. The elongated interconnect member has a spade lug coupled to a wire harness assembly.
US09437856B2	Secondary battery porous membrane, slurry for secondary battery porous membrane, and secondary battery To provide a secondary battery porous membrane that has superior heat resistance and flexibility and contributes to improvements in battery cycle characteristics. Also provided is a secondary battery having high cycle characteristics that uses this porous membrane. [Solution] This secondary battery porous membrane contains nonconductive particles and a binder. The binder is characterized by being formed from a polymer containing a nitrile group, a novel group, and a C4+ straight-chain alkylene structural unit in the same molecule and the nitrile group content in the polymer constituting the binder being 1-25% by mass, with the iodine value of the polymer being 0 mg/100 mg-30 mg/100 mg.
US09437854B2	Battery pack A battery pack 200 including a plurality of cells 100, in which the plurality of cells 100 are arranged so as to be oriented in the same direction, the cells 100 each have a first safety valve and a second safety valve whose operating pressure is higher than an operating pressure of the first safety valve, the first safety valve of each cell 100 is connected to a first exhaust passage 50, the second safety valve of each cell 100 is connected to a second exhaust passage 60, and the first exhaust passage 50 is spatially separated from the second exhaust passage 60.
US09437853B2	Apparatus for preventing deformation of plastic battery pack case for a vehicle Disclosed is an apparatus and method for preventing deformation of a plastic battery pack case for a vehicle, in which the side of the battery pack case is subjected to reverse deformation to absorb the deformation occurring after compression molding and to ensure the dimensions of a mounting portion of various components including battery packs, thereby ensuring an internal space of the battery pack case. To this end, the present invention provides an apparatus for preventing deformation of a plastic battery pack case for a vehicle, the apparatus including: a base having a case insertion space; a fixing portion for fixing a battery pack case inserted into the case insertion space; and a deformation producing portion inserted into the battery pack case and preventing the case from being deformed by pressing the inside of the case to be reversely deformed in the lateral direction.
US09437848B2	Latch mechanism for battery retention A latch mechanism for retaining a battery within a batter compartment.
US09437846B2	Secondary battery Provided is a secondary battery including: an electrode assembly; a case housing the electrode assembly and having a case opening; a cap plate substantially sealing the case opening; a first terminal plate on the cap plate; a first collector terminal coupling the electrode assembly to the first terminal plate; and a seal gasket between the first collector terminal and the cap plate, wherein the first collector terminal includes: a lower terminal adjacent the electrode assembly, and an upper terminal adjacent the first terminal plate, the upper terminal including a first metal different from a second metal of the lower terminal, and contacting the lower terminal at an interface between the first metal and the second metal, and wherein the seal gasket covers at least a portion of a side surface of the interface between the first metal and the second metal.
US09437838B2	Organic light emitting diode display device An organic light emitting diode display device is provided, which comprises: a first substrate; a second substrate opposite to the first substrate; an organic light emitting layer disposed between the first substrate and the second substrate; and a glass-forming sealant disposed between the first substrate and the second substrate and around the organic light emitting layer. Herein the glass-forming sealant comprises: a first portion adjacent to the first substrate, and a second portion adjacent to the second substrate. A first angle is included between the first portion and the first substrate, which is smaller than 90°; a second angle is included between the second portion and the second substrate, which is smaller than 90°; and the first angle is different from the second angle.
US09437833B2	Organic electroluminescence element An organic electroluminescent element includes a light-emitting layer between an anode and a cathode. The light-emitting layer contains a phosphorescent light-emitting organic metal complex and at least one host compound. The difference in relative dielectric constant between the host compound and the phosphorescent light-emitting organic metal complex is 0 to −0.5, and the difference in dipole moment between the host compound and the phosphorescent light-emitting organic metal complex is 0 to −5.5 debye.
US09437825B2	Hole-transporting material for inorganic/organic hybrid perovskite solar cells Provided is a hole-transporting compound having a novel structure, and more particularly, a hole-transporting compound for an inorganic/organic hybrid perovskite solar cell. An inorganic/organic hybrid perovskite-based solar cell using the hole-transporting compound according to the present invention has significantly high power generation efficiency.
US09437822B2	Display module manufacturing method and display module The present invention provides a manufacturing method of a display module, including a step of disposing a substrate on a transparent carrier plate, wherein the substrate has a bottom surface and a supporting surface opposite to the bottom surface; the bottom surface is attached to the transparent carrier plate and includes a first area and a second area. A step of performing a display elements manufacturing process on the supporting surface. A step of etching the first area by a first energy having a first energy density passing through the transparent carrier plate to separate the first area from the transparent carrier plate. A step of etching the second area by a second energy having a second energy density passing through the transparent carrier plate to separate the second area from the transparent carrier plate, wherein the second energy density is greater than the first energy density. A step of separating the substrate from the transparent carrier plate.
US09437820B2	Substrate laminating lower film and substrate laminated structure and method of manufacturing organic light emitting display apparatus using the same A substrate laminating low film, a substrate laminated structure and a method of manufacturing an organic light emitting display are disclosed. One inventive aspect includes a base member, a first adhesion layer formed on the base member, and a second adhesion layer formed on the first adhesion layer. The second adhesion layer has a second adhesion strength less than the first adhesion strength of the first adhesion layer.
US09437815B1	Resistive switching memory device architecture for reduced cell damage during processing In one embodiment, a resistive switching memory device can include: (i) a plurality of resistive memory cells arranged in a plurality of array blocks, where each resistive memory cell is configured to be programmed to a low resistance state by application of a program voltage in a forward bias direction, and to be erased to a high resistance state by application of an erase voltage in a reverse bias direction; (ii) a plurality of anode plates corresponding to the plurality of array blocks, where each resistive memory cell can include a resistive storage element having an anode coupled to one of the anode plates; (iii) an inactive ring surrounding the plurality of anode plates, where the inactive ring can include a same material as each of the plurality of anode plates; and (iv) a plurality of boundary cells located under the inactive ring.
US09437811B2	Method for making a magnetic random access memory element with small dimension and high quality This invention is about a method to make an MRAM element with small dimension, by building an MTJ as close as possible to an associated via connecting an associated circuitry in a semiconductor wafer. The invention provides a process scheme to flatten the interface of bottom electrode during film deposition, which ensures a good deposition of atomically smooth MTJ multilayer as close as possible to an associated via which otherwise might be atomically rough. The flattening scheme is first to deposit a thin amorphous conducting layer in the middle of BE deposition and immediately to bombard the amorphous layer by low energy ions to provide kinetic energy for surface atom diffusion to move from high point to low kinks. With such surface flattening scheme, not only the MRAM element can be made extremely small, but its device performance and magnetic stability can also be greatly improved.
US09437810B2	Magnetoresistive element and magnetic memory According to one embodiment, a magnetoresistive element includes a first magnetic layer having a variable magnetization direction; a second magnetic layer having an invariable magnetization direction; and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer and including an MgFeO film, wherein the MgFeO film contains at least one element selected from a group consisting of Ti, V, Mn, and Cu.
US09437808B2	Electric field enhanced spin transfer torque memory (STTM) device Spin transfer torque memory (STTM) devices incorporating a field plate for application of an electric field to reduce a critical current required for transfer torque induced magnetization switching. Embodiments utilize not only current-induced magnetic filed or spin transfer torque, but also electric field induced manipulation of magnetic dipole orientation to set states in a magnetic device element (e.g., to write to a memory element). An electric field generated by a voltage differential between an MTJ electrode and the field plate applies an electric field to a free magnetic layer of a magnetic tunneling junction (MTJ) to modulate one or more magnetic properties over at least a portion of the free magnetic layer.
US09437798B2	Combo bio and temperature disposable sensor on flexible foil A bio-fluid sensor is formed by depositing polyimide on a glass substrate. Gold and platinum are deposited on the polyimide and patterned to form fluid sensing electrodes, signal traces, and a temperature sensor. The fluid sensor is then fixed to a flexible tape and peeled off of the glass substrate.
US09437792B2	Optoelectronic semiconductor component An optoelectronic semiconductor component includes: at least one optoelectronic semiconductor chip, a leadframe having one a plurality of leadframe parts, at least two electrical connection means via which the semiconductor chip is electrically contact-connected to the leadframe, and a potting body, which is fitted to the leadframe and mechanically supports the latter, wherein the one or at least one of the leadframe parts is provided with a reflective coating at a top side, the semiconductor chip is fitted on the reflective coating at the top side, the leadframe includes at least two contact locations, onto which the connection means are directly fitted, and the contact locations are formed from a material that is different from the reflective coating.
US09437789B2	Light generating device and method of manufacturing the same A light generating device and a method of manufacturing the light generating device are disclosed. The light generating device includes a p-type semiconductor layer, an n-type semiconductor layer, an active layer, a p-type electrode and an n-type electrode. The active layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer. The p-type electrode provides the p-type semiconductor layer with holes. The n-type electrode provides the n-type semiconductor layer with electrons. At least one of the p-type electrode and n-type electrode has a protrusion protruding toward p-type semiconductor layer and the n-type semiconductor layer, respectively. Therefore, light efficiency is enhanced.
US09437786B2	Light emitting device for illuminating plants A spectrally adapted light emitting device for illuminating plants includes at least one semiconductor light-emitting diode (LED), at least one light conversion element for down-converting a portion of light emitted at the first wavelength to at least a second wavelength between 600 nm-680 nm, and at least one scattering device to diffuse light within the light emitting device. The at least one LED is configured to emit at least a first wavelength between 400 nm and 480 nm. The spectral light output from the spectrally adapted light emitting device is bi-modal with wavelengths in a range of 400 nm and 800 nm including a first local maximum between 400 nm and 480 nm and a second local maximum between 600 nm-680 nm with a local minimum between the first local maximum and the second local maximum.
US09437783B2	Light emitting diode (LED) contact structures and process for fabricating the same A light emitting device includes an active layer configured to provide light emission due to carrier recombination therein, a surface on the active layer, and an electrically conductive contact structure on the surface. The contact structure includes at least one plated contact layer. The contact structure may include a sublayer that conforms to the surface roughness of the underlying surface, and the plated contact layer may be substantially free of the surface roughness of the underlying surface. The surface of the plated contact layer may be substantially planar and/or otherwise configured to reflect the light emission from the active layer. Related fabrication methods are also discussed.
US09437780B2	Optoelectronic semiconductor device An optoelectronic semiconductor device in accordance with an embodiment of present invention includes a conversion unit having a first side; an electrical connector; a contact layer having an outer perimeter; and at least three successive discontinuous-regions formed along the outer perimeter and having at least one different factor; wherein the electrical connector, the contact layer, and the discontinuous-regions are formed on the first side of the conversion unit.
US09437779B2	Semiconductor light emitting device and method for manufacturing the same According to one embodiment, a semiconductor light emitting device includes a structure, a first electrode layer, and a second electrode layer. The structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode layer is provided on the first semiconductor layer side of the structure. The first electrode layer is made of metal and contains a portion contacting the first semiconductor layer. The second electrode layer is provided on the second semiconductor layer side of the structure. The second electrode layer has a metal portion with a thickness of not less than 10 nanometers and not more than 50 nanometers, and a plurality of openings piercing the metal portion, each of the openings having an equivalent circle diameter of not less than 10 nanometers and not more than 5 micrometers.
US09437778B2	Semiconductor light-emitting element and method for producing the same The semiconductor light-emitting element includes: a substrate; a semiconductor layer that is provided over the substrate; a first electrode that is provided in contact with part of an upper surface of the semiconductor layer and includes a current supply part; a second electrode that is provided in part of a region vertically below a region where the current supply part is not provided, that is in contact with part of the semiconductor layer; and a first current blocking layer that is provided in a region including a region vertically below the current supply part and that is in contact with part of the semiconductor layer, wherein a contact resistance at an interface between the first current blocking layer and the semiconductor layer is higher than that at an interface between the second electrode and the semiconductor layer.
US09437763B2	Trench process and structure for backside contact solar cells with polysilicon doped regions A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
US09437755B2	Front contact solar cell with formed electrically conducting layers on the front side and backside A bipolar solar cell includes a backside junction formed by a silicon substrate and a first doped layer of a first dopant type on the backside of the solar cell. A second doped layer of a second dopant type makes an electrical connection to the substrate from the front side of the solar cell. A first metal contact of a first electrical polarity electrically connects to the first doped layer on the backside of the solar cell, and a second metal contact of a second electrical polarity electrically connects to the second doped layer on the front side of the solar cell. An external electrical circuit may be electrically connected to the first and second metal contacts to be powered by the solar cell.
US09437753B2	Device comprising electrical contacts and its production process A device includes a conductive surface (12) and electrical contacts (14) by which an electric current is able to be passed. The electrical contacts (14) include conductive seeds (16) deposited on the conductive surface (12), an electrically insulating layer (18), which covers discontinuously the conductive seeds (16) in order to form openings leaving access to the conductive seeds (16), and a plating layer (22) recovering the discontinuous insulating layer (18) and deposited on conductive seeds (16) which are accessible through the openings and form points from which the deposit of the plating layer (22) can start. The rest of the conductive surface (12), which doesn't include any electrical contacts (14), is continuously covered by the electrically insulating layer (18).
US09437751B2	Non-volatile memory device including charge trapping layer and method for fabricating the same A non-volatile memory device includes a charge trapping layer for trapping charges. The charge trapping layer includes a linker layer formed over a substrate and including linkers to be bonded to metal ions metallic nanoparticles formed out of the metal ions over the linker layer and a nitride filling gaps between the metallic nanoparticles.
US09437750B1	Thin film transistor and method of making same A method for forming a TFT includes providing a substrate, and forming a gate electrode, an electrically insulating layer, a semiconductor layer, an etch stop layer and a photoresist layer successively on the substrate. A photolithographic process is performed to the photoresist layer by using a half-tone mask to thereby configure the photoresist layer to have two recesses in a top thereof. Two lateral ends of the etch stop layer are etched away to form an etch stop pattern. The photoresist layer is heated to flow downwardly. Two lateral ends of the semiconductor channel are etched away to become a channel layer. An ashing is performed to the photoresist layer to have the recesses thereof communicate atmosphere with the etch stop pattern. The etch stop pattern is etched to define first and second through holes. Source and drain electrodes are formed to electrically connect with the channel layer.
US09437747B2	Thin film transistor with multiple oxide semiconductor layers A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is employed. Specifically, an oxide semiconductor layer having high conductivity is provided between two oxide semiconductor layers. Further, an impurity element is added to the oxide semiconductor layer in a self-aligned manner so that the resistance of a region in contact with an electrode layer is reduced. Further, the oxide semiconductor layer in contact with the gate insulating layer has a larger thickness than the oxide semiconductor layer having high conductivity.
US09437746B2	Thin film transistor substrate having metal oxide semiconductor and method for manufacturing the same The present disclosure relates to a thin film transistor substrate with a metal oxide semiconductor layer that has enhanced characteristics and stability. The present disclosure also relates to a method for manufacturing a thin film transistor substrate in which a thermal treatment is conducted for the metal oxide semiconductor layer and the damages to the substrate by the thermal treatment are minimized.
US09437743B2	Thin film element, semiconductor device, and method for manufacturing the same An object is to provide a method for manufacturing a semiconductor device without exposing a specific layer to moisture or the like at all. A thin film element is manufactured in such a manner that a first film, a second film, and a third film are stacked in this order; a resist mask is formed over the third film; a mask layer is formed by etching the third film with the use of the resist mask; the resist mask is removed; a second layer and a first layer are formed by performing dry etching on the second film and the first film with the use of the mask layer; a fourth film is formed to cover at least the second layer and the first layer; and sidewall layers are formed to cover at least the entire side surfaces of the first layer by performing etch back on the fourth film.
US09437742B2	Thin film transistor, manufacturing method thereof and array substrate A thin film transistor, a manufacturing method thereof and an array substrate are provided. The thin film transistor includes: a gate electrode (102) formed on a substrate (101), a gate insulating layer (103) formed on the gate electrode (102) and covering at least a part of the substrate (101), and a semiconductor layer (105′), a source electrode (107a) and a drain electrode (107b) which are formed on the gate insulating layer (103). The material of the semiconductor layer (105′) is an oxide semiconductor; and the material of the source electrode (107a) and drain electrode (107b) is the oxide semiconductor which is doped. The source electrode (107a), the drain electrode (107b) and the semiconductor layer (105′) are disposed in the same layer.
US09437740B2	Epitaxially forming a set of fins in a semiconductor device Approaches for enabling epitaxial growth of silicon fins in a device (e.g., a fin field effect transistor device (FinFET)) are provided. Specifically, approaches are provided for forming a set of silicon fins for a FinFET device, the FinFET device comprising: a set of gate structures formed over a substrate, each of the set of gate structures including a capping layer and a set of spacers; an oxide fill formed over the set of gate structures; a set of openings formed in the device by removing the capping layer and the set of spacers from one or more of the set of gate structures; a silicon material epitaxially grown within the set of openings in the device and then planarized; and wherein the oxide fill is etched to expose the silicon material and form the set of fins.
US09437739B2	Finfet seal ring A semiconductor device includes a first front-end-of-line (FEOL) seal ring on a substrate, the seal ring comprising ring-shaped fin-like structures, integrated circuitry formed on the substrate, the integrated circuitry being circumscribed by the first seal ring, an isolation zone between the seal ring and the integrated circuitry, the isolation zone comprising a set of fin structures, each fin structure facing a same direction.
US09437737B2	Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device A semiconductor device has: a silicon (semiconductor) substrate; a gate insulating film and a gate electrode, which are formed on the silicon substrate in this order; and source/drain material layers formed in recesses (holes) in the silicon substrate, the recesses being located beside the gate electrode. Here, each of side surfaces of the recesses, which are closer to the gate electrode, is constituted of at least one crystal plane of the silicon substrate.
US09437736B2	Non-volatile semiconductor memory device In a non-volatile semiconductor memory device, it is only necessary that, at the time of data writing, a voltage drop is caused in a high resistance region. Therefore, the value of voltage applied to a gate electrode can be reduced as compared with a conventional device. In correspondence with the reduction in the value of applied voltage, it is possible to reduce the film thickness of a gate insulating film of memory transistors, and further the film thickness of the gate insulating film of a peripheral transistor for controlling the memory transistors. As a result, the circuit configuration of the non-volatile semiconductor memory device can be reduced in size as compared with the conventional device.
US09437732B2	Semiconductor device A semiconductor device includes a fin-shaped semiconductor layer on a semiconductor substrate and extends in a first direction with a first insulating film around the fin-shaped semiconductor layer. A pillar-shaped semiconductor layer resides on the fin-shaped semiconductor layer. A width of the bottom of the pillar-shaped semiconductor layer, perpendicular to the first direction is equal to a width of the top of the fin-shaped semiconductor layer perpendicular to the first direction. A gate insulating film is around the pillar-shaped semiconductor layer and a metal gate electrode is around the gate insulating film. A metal gate line extends in a second direction perpendicular to the first direction of the fin-shaped semiconductor layer and is connected to the metal gate electrode.
US09437728B2	Semiconductor device A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
US09437723B2	Manufacturing method of semiconductor device including indium A semiconductor device includes an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the upper surface layer; and first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed. The electron supply layer is formed of a nitride semiconductor including In. The upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
US09437716B2	Semiconductor device comprising a graphene wire According to one embodiment, a semiconductor device includes a catalyst underlying layer formed on a substrate including semiconductor elements formed thereon and processed in a wiring pattern, a catalyst metal layer that is formed on the catalyst underlying layer and whose width is narrower than that of the catalyst underlying layer, and a graphene layer growing with a sidewall of the catalyst metal layer set as a growth origin and formed to surround the catalyst metal layer.
US09437713B2	Devices and methods of forming higher tunability FinFET varactor Devices and methods for forming semiconductor devices with wider FinFETs for higher tunability of the varactor are provided. One method includes, for instance: obtaining an intermediate semiconductor device; applying a spacer layer over the semiconductor device; etching the semiconductor device to remove at least a portion of the spacer layer to expose the plurality of mandrels; removing the mandrels; etching the semiconductor device to remove a portion of the dielectric layer; forming at least one fin; and removing the spacer layer and the dielectric layer. One intermediate semiconductor device includes, for instance: a substrate; a dielectric layer over the substrate; a plurality of mandrels formed on the dielectric layer, the mandrels including a first set of mandrels and a second set of mandrels, wherein the first set of mandrels have a width twice as large as the second set of mandrels; and a spacer layer applied over the mandrels.
US09437706B2	Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes A microelectronic device may be formed with at least one transistor having a source region and a drain region, wherein an interlayer dielectric layer may be formed adjacent the transistor. A trench may be formed through the first interlayer dielectric layer to at least one of the source region and the drain region and a conductive contact may be formed in the trench, wherein the conductive contact comprises a conformal conductive layer separated from the at least one of the source region and the drain region by a conformal insulating layer.
US09437703B2	Non-volatile memory device including nano floating gate with nanoparticle and method for fabricating the same A non-volatile memory device includes a floating gate for charging and discharging of charges over a substrate. The floating gate comprises a linker layer formed over the substrate and including linkers to be bonded to metal ions and metallic nanoparticles formed out of the metal ions over the linker layer.
US09437697B2	Semiconductor device having buried gate structure and method of fabricating the same A semiconductor device includes a device isolation region defining an active region in a substrate, and gate structures buried in the active region of the substrate. At least one of the gate structures includes a gate trench, a gate insulating layer conformally formed on an inner wall of the gate trench, a gate barrier pattern conformally formed on the gate insulating layer disposed on a lower portion of the gate trench, a gate electrode pattern formed on the gate barrier pattern and filling the lower portion of the gate trench, an electrode protection layer conformally formed on the gate insulating layer disposed on an upper portion of the gate trench to be in contact with the gate barrier pattern and the gate electrode pattern, a buffer oxide layer conformally formed on the electrode protection layer, and a gate capping insulating layer formed on the buffer oxide layer to fill the upper portion of the gate trench.
US09437692B2	Production and distribution of dilute species in semiconducting materials Technologies are described effective to implement systems and methods of producing a material. The methods comprise receiving a tertiary semiconductor sample with a dilute species. The sample has two ends. The first end of the sample includes a first concentration of the dilute species lower than a second concentration of the dilute species in the second end of the sample. The method further comprises heating the sample in a chamber. The chamber has a first zone and a second zone. The first zone having a first temperature higher than a second temperature in the second zone. The sample is orientated such that the first end is in the first zone and the second end is in the second zone.
US09437688B2	High-quality GaN high-voltage HFETs on silicon A GaN HFET includes a silicon substrate with an Al2O3 layer above the silicon substrate. The Al2O3 layer has voids formed therein. A plurality of alternating GaN and AlN layers are above the Al2O3 layer. The GaN and AlN layers are under continuous compressive stress.
US09437687B2	III-nitride based semiconductor structure The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.
US09437686B2	Gallium nitride devices with discontinuously graded transition layer The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.
US09437683B2	Method and structure for FinFET device The present disclosure describes a fin-like field-effect transistor (FinFET). The device includes one or more fin structures over a substrate, each with source/drain (S/D) features and a high-k/metal gate (HK/MG). A first HK/MG in a first gate region wraps over an upper portion of a first fin structure, the first fin structure including an epitaxial silicon (Si) layer as its upper portion and an epitaxial growth silicon germanium (SiGe), with a silicon germanium oxide (SiGeO) feature at its outer layer, as its middle portion, and the substrate as its bottom portion. A second HK/MG in a second gate region, wraps over an upper portion of a second fin structure, the second fin structure including an epitaxial SiGe layer as its upper portion, an epitaxial Si layer as it upper middle portion, an epitaxial SiGe layer as its lower middle portion, and the substrate as its bottom portion.
US09437682B2	Semiconductor device and semiconductor device manufacturing method The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method. A semiconductor device includes: a silicon carbide substrate; a first-conductive-type first silicon carbide layer provided on a first principal surface of the silicon carbide substrate; a second-conductive-type first silicon carbide region formed at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region formed at a surface of the first silicon carbide region; a second-conductive-type third silicon carbide region formed below the second silicon carbide region; a trench piercing through the second silicon carbide region to reach the third silicon carbide region; a gate insulating film; a gate electrode; an interlayer insulating film with which the gate electrode is covered; a first electrode that is formed on the second silicon carbide region and the interlayer insulating film in a side surface of the trench while containing a metallic element selected from a group consisting of Ni, Ti, Ta, Mo, and W; a second electrode that is formed on the third silicon carbide region in a bottom portion of the trench and the first electrode while containing Al; a first main electrode formed on the second electrode; and a second main electrode formed on a second principal surface of the silicon carbide substrate.
US09437672B2	Semiconductor device A semiconductor device includes: a first semiconductor layer of a nitride semiconductor formed on a substrate; a second semiconductor layer of a nitride semiconductor formed on the first semiconductor layer; and a gate electrode, a source electrode, a drain electrode, and a hole extraction electrode, each of which is formed on the second semiconductor layer, wherein between the source electrode and the hole extraction electrode or in a region right under the source electrode, the first semiconductor layer and the second semiconductor layer form a vertical interface approximately perpendicular to a surface of the substrate, and a surface of the first semiconductor layer configured to form the vertical interface is an N-polar surface.
US09437670B2	Light activated test connections A test circuit including a light activated test connection in a semiconductor device is provided. The light activated test connection is electrically conductive during a test of the semiconductor device and is electrically non-conductive after the test.
US09437667B2	Display device A display device is disclosed. In one aspect, the device includes a substrate including a display area displaying an image via a plurality of pixels and a non-display area adjacent to the display area. The device also includes a first line and a second line in the display area. The display device also includes a first connection line and a second connection line in the non-display area, wherein the first and second connection lines are respectively connected to the first and second lines and extend in different directions to cross each other. The display device also includes an insulating layer formed over the substrate and including a first portion and a second portion, the first portion corresponding to the display area and the second portion corresponds to a crossing area where the first and second connection lines cross each other, the thickness of the first and second portions are different.
US09437661B2	Thin film transistor substrate, display device having the same and method of manufacturing the same A thin film transistor substrate includes a semiconductor pattern on a base substrate, a first insulation member disposed on the semiconductor pattern, a second insulation pattern disposed on the first insulation member, and a gate electrode disposed on the first insulation member and the second insulation pattern. The second insulation pattern overlaps a first end portion of the semiconductor pattern, and exposes a second end portion of the semiconductor pattern opposite to the first end portion. The gate electrode overlaps both the first insulation member and the second insulation pattern.
US09437660B2	Organic light-emitting diode display panel Disclosed is an organic light-emitting diode (OLED) display panel. An OLED display panel includes a plurality of signal lines and a thin film transistor formed on a substrate, an interlayer insulating layer, a first electrode, a bank, an organic light-emitting layer, a second electrode, a first passivation layer, an organic layer, a second passivation layer and a barrier film, wherein the bank is formed to completely cover the interlayer insulating layer, and an inclination formed by side surfaces of the bank and the interlayer insulating layer is made to be gradual.
US09437659B2	Organic electroluminescent display device An organic electroluminescent display device includes: a substrate; plural anodes that are formed in respective pixels; pixel separation films that cover at least an edge of the respective anodes between the respective pixels; an organic layer that covers a display area over the plurality of anodes, and the pixel separation films, and includes at least a light emitting layer; a cathode that is formed on the organic layer; and a counter substrate that is arranged on the cathode so as to face the substrate, in which the anodes each include: a contact area that comes in contact with the organic layer, and faces a corresponding pixel of the counter substrate, and a peripheral area that is formed around the contact area, and faces pixels around the corresponding pixels of the counter substrate. The organic electroluminescent display device can realize higher definition, higher luminance, and prevention of color mixture.
US09437656B2	Semiconductor memory device A semiconductor memory device according to one embodiment of the present invention includes a dielectric film configured to store information depending on presence or absence of a conductive path therein, and a plurality of electrodes provided to contact a first surface of the dielectric film. The conductive path can be formed between two electrodes arbitrarily selected form the plurality of electrodes. The conductive path has a rectifying property of allowing a current to flow more easily in a first direction connecting arbitrary two electrodes than in a second direction opposite to the first direction. The largest possible number of the conductive paths that may be formed is larger than the number of the plurality of electrodes.
US09437654B2	Magnetic memory devices Magnetic memory devices may include a substrate, a circuit device on the substrate, a plurality of lower electrodes electrically connected to the circuit device, a magnetic tunnel junction (MTJ) structure commonly provided on the plurality of the lower electrodes, and a plurality of upper electrodes on the MTJ structure. The MTJ structure may include a plurality of magnetic material patterns and a plurality of insulation material patterns separating the magnetic material patterns from each other.
US09437652B2	CMOS compatible thermopile with low impedance contact An integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming active areas which provide transistor active areas for an NMOS transistor and a PMOS transistor of the CMOS transistors and provide n-type thermoelectric elements and p-type thermoelectric elements of the embedded thermoelectric device. Stretch contacts with lateral aspect ratios greater than 4:1 are formed over the n-type thermoelectric elements and p-type thermoelectric elements to provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device. The stretch contacts are formed by forming contact trenches in a dielectric layer, filling the contact trenches with contact metal and subsequently removing the contact metal from over the dielectric layer. The stretch contacts are formed concurrently with contacts to the NMOS and PMOS transistors.
US09437651B2	Method of manufacturing imaging device One portion of a first insulator film, which is positioned on a second semiconductor region, and another portion of the first insulator film, which is positioned on a third semiconductor region, are removed, while a first portion of the first insulator film, which is positioned on a first semiconductor region is remained, one portion of a second insulator film, which is positioned on the first semiconductor region, and another portion of the second insulator film, which is positioned on the second semiconductor region, are removed, while a second portion of the second insulator film, which is positioned on the third semiconductor region is remained, and a metal film that covers the first portion, the second semiconductor region, and the second portion, and the second semiconductor region are caused to react with each other and a metal compound layer is formed.
US09437647B2	Solid-state image capturing apparatus, method of manufacturing the same, and camera A solid-state image capturing apparatus, comprising a semiconductor substrate including a first region of a first conductivity type, charge accumulation regions of a second conductivity type, transistors each outputting a signal based on charges accumulated in the charge accumulation region, a second region of the first conductivity type formed in a position deeper than the charge accumulation regions and shallower than the first region so as to be electrically conducted to the first region, whose impurity concentration is higher than that of the first region, and a third region of the second conductivity type formed between the second region and the first region, wherein the second region is formed across a region including two or more transistors in a planar view and supplies a current to each of the two or more transistors.
US09437643B2	Semiconductor integrated circuit device Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.
US09437641B2	Solid-state imaging device A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.
US09437640B2	Engineering induced tunable electrostatic effect Backside illuminated sensors and methods of manufacture are described. Specifically, a backside illuminated sensor with a dipole modulating layer near the photodiode is described.
US09437638B2	Photodetector for imaging system There is disclosed a substrate including at least one photodetector, the photodetector having a first active area on a first surface of the substrate and a second active area on a second surface of the substrate, wherein the photodetector is provided with a conductive via electrically isolated from the substrate, said conductive via extending through the photodetector from the first surface of the substrate to the second surface of the substrate for connecting the first active area to the second surface of the substrate, the second surface providing electrical connections for the first and second active areas of the photodetector.
US09437629B1	Rectenna that converts infrared radiation to electrical energy Technologies pertaining to converting infrared (IR) radiation to DC energy are described herein. In a general embodiment, a rectenna comprises a conductive layer. A thin insulator layer is formed on the conductive layer, and a nanoantenna is formed on the thin insulator layer. The thin insulator layer acts as a tunnel junction of a tunnel diode.
US09437623B2	Semiconductor device and method for manufacturing the same It is an object to obtain a liquid crystal display device in which a contact defect is reduced, increase in contact resistance is suppressed, and an opening ratio is high. The present invention relates to a liquid crystal display device having a substrate; a thin film transistor provided over the substrate, which includes a gate wiring, a gate insulating film, an island-shaped semiconductor film, a source region, and a drain region; a source wiring which is provided over the substrate and is connected to the source region; a drain electrode which is provided over the substrate and is connected to the drain region; an auxiliary capacitor provided over the substrate; a pixel electrode connected to the drain electrode; and a protective film formed so as to cover the thin film transistor and the source wiring, where the protective film has an opening, and the auxiliary capacitor is formed in the area where the opening is formed.
US09437616B2	Display apparatus A liquid crystal display device includes: a TFT substrate that includes gate lines; and a driver circuit section that includes a gate driver that is connected to the gate lines. A frame region includes a wiring substrate that sandwiches the gate lines. The wiring substrate includes: a first wiring substrate that has first wiring lines that are connected to the gate lines; a second wiring substrate that has second wiring lines that are connected to the first wiring lines; and a third wiring substrate that is attached to the second wiring substrate and has third wiring lines that are connected to the second wiring lines and a gate driver.
US09437612B1	Three-dimensional memory A three-dimensional memory, which includes memory cell stacked structures. The memory cell stacked structures are stacked by a plurality of memory cell array structures and insulation layers alternatively, and each memory cell array structure includes word lines, active layers, composite layers and sources/drains. The word lines, the active layers and the composite layers extend along a Y direction. The active layers are disposed between the adjacent word lines. The composite layers are disposed between the adjacent word lines and the adjacent active layers, and each composite layer includes a first dielectric layer, a charge storage layer and a second dielectric layer in sequence from the active layers. The sources/drains are disposed in the active layers at equal intervals. A memory cell includes two adjacent sources/drains, the active layer between the two adjacent sources/drains, the first dielectric layer, the charge storage layer and the second dielectric layer on the active layer, and the word lines.
US09437610B2	Three dimensional stacked nonvolatile semiconductor memory A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side in a first direction, and a driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction. A source diffusion layer, which is common to the first and second blocks, is disposed in a semiconductor substrate, and a contact plug, which has a lower end connected to the source diffusion layer and an upper end connected to a source line disposed above at least three conductive layers, is interposed between the first and second blocks.
US09437607B2	Semiconductor device and method of manufacturing the same A semiconductor device has a vertical channel and includes a first tunnel insulating layer adjacent to a blocking insulating layer, a third tunnel insulating layer adjacent to a channel pillar, and a second tunnel insulating layer between the first and third tunnel insulating layers. The energy band gap of the third tunnel insulating layer is smaller than that of the first tunnel insulating layer and is larger than that of the second tunnel insulating layer.
US09437605B2	3D NAND array architecture Roughly described, a memory device has a multilevel stack of conductive layers which are divided laterally into word lines. Vertically oriented pillars each include series-connected memory cells at cross-points between the pillars and the layers. String select lines run above the conductive layers and define select gates of the pillars. Bit lines run above the SSLs. The pillars are arranged on a regular grid having a unit cell area α, and adjacent ones of the string select lines have respective widths in the bit line direction which are at least as large as (α/pBL). Ground select lines run below the conductive layers and define ground select gates of the pillars. The ground select lines, too, may have respective widths in the bit line direction which are at least as large as (α/pBL).
US09437603B2	Wing-type projection between neighboring access transistors in memory devices A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.
US09437598B2	Semiconductor device manufacturing method and semiconductor device A semiconductor device manufacturing method includes: forming a first well of the first conductivity type in a substrate; forming a second well of the first conductivity type in a first region of the substrate; forming a third well of the second conductivity type underneath the second well in the first region of the substrate in a position overlapping with the first well located underneath the second well in the first region of the substrate; forming a fourth well, that surrounds the second well and has the second conductivity type, in the first region of the substrate; forming a fifth well of the first conductivity type above the first well in the second region of the substrate; and forming a sixth well of the second conductivity type above the first well in the second region of the substrate.
US09437594B2	Semiconductor device A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided. Further, a semiconductor device which has favorable electrical characteristics by using a transistor including a silicon semiconductor and a transistor including an oxide semiconductor is provided. Two nitride insulating films having different functions are provided between the transistor including a silicon semiconductor and the transistor including an oxide semiconductor. Specifically, a first nitride insulating film which contains hydrogen is provided over the transistor including a silicon semiconductor, and a second nitride insulating film which has a lower hydrogen content than the first nitride insulating film and functions as a barrier film against hydrogen is provided between the first nitride insulating film and the transistor including an oxide semiconductor.
US09437593B2	Silicided semiconductor structure and method of forming the same A preferred embodiment includes a method of manufacturing a fuse element that includes forming a polysilicon layer over a semiconductor structure, doping the polysilicon layer with carbon or nitrogen, depositing a metal over the polysilicon layer; and annealing the metal and polysilicon layer to form a silicide in an upper portion of the polysilicon layer.
US09437588B1	Middle of-line architecture for dense library layout using M0 hand-shake A dense library architecture using an M0 hand-shake and the method of forming the layout are disclosed. Embodiments include forming first and second active areas on a substrate, at the top and bottom of a cell, separated from each other; forming first through third gate lines perpendicular to the active areas, where the first and third gate lines are dummy gates at the cell edges; forming trench silicide segments on each of the active areas, between the first, second, and third gate lines; forming first and second M1 metal lines between the first and second gate lines and the second and third gate lines, respectively; forming a M0 segment between the first and second active regions perpendicular to the M1 metal lines; forming a CB between the M0 segment and the second gate line; and forming a V0 from the first metal line to the M0 segment.
US09437582B2	Stacked microelectronic assemblies A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.
US09437581B2	LED module The LED module includes: a light diffusing substrate having light transmissive properties; an LED chip bonded to a first surface of the light diffusing substrate with a transparent first bond in between; a color converter facing the first surface to cover the LED chip; and a mounting substrate. The color converter is made of transparent material containing phosphor which, when excited by light emitted from the LED chip, emits light having a different color from the LED chip. The mounting substrate includes a diffuse reflection layer diffusely reflecting light emitted from the LED chip and light emitted from the phosphor. The diffuse reflection layer is placed facing a second surface of the light diffusing substrate.
US09437574B2	Electronic component package and method for forming same An electronic component package includes a substrate and dielectric structure. The dielectric structure includes a top surface having a protrusion portion and a lower portion. The protrusion portion is located at first height that is greater than a second height of the lower portion. A conductive bond pad is located over the dielectric structure. A ball bond electrically couples the bond pad and a bond wire. An intermetallic compound located between the ball bond and bond pad is formed of material of the ball bond and bond pad and electrically couples the bond pad to the ball bond. A portion of the bond pad is vertically located between a portion of the lower portion of the top surface of the dielectric structure and the intermetallic compound. No portion of the bond pad is vertically located between at least a portion of the protrusion portion and the intermetallic compound.
US09437573B2	Semiconductor device and method for manufacturing thereof A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.
US09437567B2	Semiconductor devices with ball strength improvement A semiconductor device includes a contact region over a substrate. The semiconductor device further includes a metal pad over the contact region. Additionally, the semiconductor device includes a post passivation interconnect (PPI) line over the metal pad, where the PPI line is in contact with the metal pad. Furthermore, the semiconductor device includes an under-bump-metallurgy (UBM) layer over the PPI line. Moreover, the semiconductor device includes a plurality of solder balls over the UBM layer, the plurality of solder balls being arranged at some, but not all, intersections of a number of columns and rows of a ball pattern.
US09437565B2	Semiconductor substrate and semiconductor package structure having the same The present disclosure relates to a semiconductor package structure including a semiconductor substrate, a semiconductor chip and a conductive material. The semiconductor substrate includes an insulating layer, a conductive circuit layer and a conductive bump. The conductive circuit layer is recessed from the top surface of the insulating layer, and includes at least one pad. The conductive bump is disposed on the at least one pad. A side surface of the conductive bump, a top surface of the at least one pad and a side surface of the insulating layer together define an accommodating space. The conductive material is electrically connected the conductive bump and the semiconductor chip, and a portion of the conductive material is disposed in the accommodating space.
US09437560B2	Semiconductor device including landing pad A semiconductor device includes conductive lines spaced from a substrate, and an insulating spacer structure between the conductive lines and defining a contact hole. The insulating spacer structure is adjacent a side wall of at least one of the conductive lines. The device also includes an insulating pattern on the conductive lines and insulating spacer structure, and another insulating pattern defining a landing pad hole connected to the contact hole. A contact plug is formed in the contact hole and connects to the active area. A landing pad is formed in the landing pad hole and connects to the contact plug. The landing pad vertically overlaps one of the pair of conductive line structures.
US09437558B2	High frequency integrated circuit and packaging for same An integrated circuit can include a group of bond pads alternating between bond pads configured to provide a return path and bond pads configured to provide a signal bond pad. For example, five bond pads can be arranged in a return-signal-return-signal-return arrangement. The integrated circuit can further be configured to receive or transmit high frequency signals.
US09437554B2	Semiconductor package having magnetic substance and related equipment Provided is a semiconductor device. A semiconductor chip is disposed on a substrate. A first magnetic substance, a second magnetic substance and a third magnetic substance which are spaced apart from one another are formed on the semiconductor chip. The first magnetic substance and the second magnetic substance can be adjacent an edge of the semiconductor chip. The third magnetic substance can be adjacent a center of the semiconductor chip. The third magnetic substance is between the first magnetic substance and the second magnetic substance.
US09437552B2	Semiconductor device and method of forming insulating layer around semiconductor die A plurality of semiconductor die is mounted to a temporary carrier. An encapsulant is deposited over the semiconductor die and carrier. A portion of the encapsulant is designated as a saw street between the die, and a portion of the encapsulant is designated as a substrate edge around a perimeter of the encapsulant. The carrier is removed. A first insulating layer is formed over the die, saw street, and substrate edge. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first conductive layer and first insulating layer. The encapsulant is singulated through the first insulating layer and saw street to separate the semiconductor die. A channel or net pattern can be formed in the first insulating layer on opposing sides of the saw street, or the first insulating layer covers the entire saw street and molding area around the semiconductor die.
US09437550B2	TSV without zero alignment marks Semiconductor device and method of forming a semiconductor device are disclosed. The method includes providing a substrate. A dielectric layer is formed on the substrate. The dielectric layer includes an upper and lower level. The upper level of the dielectric layer is patterned to form at least first and second trench openings and alignment mark openings. One of the first and second trench openings serve as a through via (TV) trench while another trench opening serves as an interconnect trench. A TV opening aligned to the TV trench is formed. The TV opening extends partially into the substrate. A conductive layer is formed over the substrate to fill the trenches and the openings.
US09437549B2	Method for manufacturing ceramic substrate A method for manufacturing a ceramic substrate is characterized in using a preformed trench, a patterned protective layer and a sand blasting process to manufacture a cavity in a ceramic substrate and control the cavity size and shape of the ceramic substrate. The ceramic substrate is collocated with a base substrate to form a package substrate for packaging a semiconductor chip. The manufacturing method set forth above can lower the manufacturing cost and raise the accuracy of the size and shape of the cavity of the ceramic substrate. The abovementioned method can reduce the fabrication cost and increase the precision of the shape and size of a ceramic substrate.
US09437545B2	Interconnects having sealing structures to enable selective metal capping layers Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.
US09437543B2	Composite contact via structure containing an upper portion which fills a cavity within a lower portion A contact via cavity can be filled with a lower structure and an upper structure. The lower structure can be a conductive structure that is formed by depositing a conformal conductive material, and subsequently removing an upper portion of the conformal conductive material. A disposable material portion can be formed at a bottom of the cavity to protect the bottom portion of the conformal conductive layer during removal of the upper portion. After removal of the disposable material, at least one conductive material can fill the remainder of the cavity to form the upper structure. The upper structure and the lower structure collectively constitute a contact via structure. Alternatively, the lower structure can be a dielectric spacer with an opening therethrough. The upper structure can be a conductive structure that extends through the dielectric spacer, and provides an electrically conductive vertical connection.
US09437536B1	Reversed build-up substrate for 2.5D A method of making an assembly can include forming a circuit structure defining front and rear surfaces, and forming a substrate onto the rear surface. The forming of the circuit structure can include forming a first dielectric layer coupled to the carrier. The first dielectric layer can include front contacts configured for joining with contacts of one or more microelectronic elements, and first traces. The forming of the circuit structure can include forming rear conductive elements at the rear surface coupled with the front contacts through the first traces. The forming of the substrate can include forming a dielectric element directly on the rear surface. The dielectric element can have first conductive elements facing the rear conductive elements and joined thereto. The dielectric element can include second traces coupled with the first conductive elements. The forming of the substrate can include forming terminals at a surface of the substrate.
US09437535B2	Wireless module and production method for wireless module Provided is a wireless module whose size can be made smaller. The wireless module includes: a first substrate on which an antenna is mounted; a second substrate which opposes the first substrate and on which an electronic component is mounted; and a plurality of electric conductors which connect the first substrate and the second substrate and which transmit a signal between the antenna and the electronic components, wherein the plurality of electric conductors are disposed between the first substrate and the second substrate in series in a substantially vertical direction with respect to mounting surfaces of the first substrate and the second substrate.
US09437530B2	Combined packaged power semiconductor device A combined packaged power semiconductor device includes flipped top source low-side MOSFET electrically connected to top surface of a die paddle, first metal interconnection plate connecting between bottom drain of a high-side MOSFET or top source of a flipped high-side MOSFET to bottom drain of the low-side MOSFET, and second metal interconnection plate stacked on top of the high-side MOSFET chip. The high-side, low-side MOSFET and the IC controller can be packaged three-dimensionally reducing the overall size of semiconductor devices and can maximize the chip's size within a package of the same size and improves the performance of the semiconductor devices. The top source of flipped low-side MOSFET is connected to the top surface of the die paddle and thus is grounded through the exposed bottom surface of die paddle, which simplifies the shape of exposed bottom surface of the die paddle and maximizes the area to facilitate heat dissipation.
US09437529B2	Chip package structure and manufacturing method thereof A chip package structure includes a lead frame having first and second patterned metal layers and an insulation layer, a chip, and an encapsulant covering the first patterned metal layer and the chip. The first patterned metal layer includes a chip pad with first recesses and bonding pads in the first recesses. A first groove exists between each bonding pad and the chip pad. The second patterned metal layer connecting the first patterned metal layer includes terminal pads and a heat dissipation block thermally coupled to the chip pad. The heat dissipation block includes second recesses where the terminal pads are located and electrically connected to the corresponding bonding pads. A second groove exists between each terminal pad and the heat dissipation block. The insulation layer is located between the bonding pads and the terminal pads. The chip on the chip pad is electrically connected to the bonding pads.
US09437528B1	Dual-side exposed semiconductor package with ultra-thin die and manufacturing method thereof A dual-side exposed semiconductor package with ultra-thin die and a manufacturing method are disclosed. A die having a source electrode and a gate electrode at top surface is flipped and attached to a die paddle of a lead frame and then is encapsulated with a first molding compound. The first molding compound and the die are ground to reduce the thickness. A mask is applied atop the lead frame with the back of the flipped die exposed and a metal layer is deposited on the exposed area at the back of the flipped die. A metal clip is attached to the back of the flipped die. A second molding compound is deposited on the lead frame with the top surface of the metal clip exposed from the top surface of the second molding compound and the bottom surface of the lead frame exposed from the bottom surface of the second plastic molding compound.
US09437523B2	Two-sided jet impingement assemblies and power electronics modules comprising the same Power electronics modules having jet impingement assemblies utilized to cool heat generating devices are disclosed. In one embodiment, a jet impingement assembly includes coupled manifold plates having a fluid inlet and outlet, a distribution surface, and a collection surface. The distribution surface of the first and second manifold plate is coupled to define a distribution manifold having a fluid distribution channel and one or more arrays of orifices extending through both manifold plates. Heat transfer plates are coupled to each manifold plate's collection surface forming impingement chambers. The heat transfer plates include one or more arrays of fins extending toward the collection surface of each manifold plate fluidly coupled to the fluid outlet. The first and second manifold plates and the first and second heat transfer plates are positioned in a horizontal stack such that the fluid inlets of both manifold plates are adjacent.
US09437517B2	Semiconductor apparatus including a heat dissipating member A semiconductor apparatus is provided. The semiconductor apparatus includes: a base having a main surface on which a terminal is disposed; a first semiconductor device retained on the main surface of the base and having a top surface on which an electrode is disposed and a bottom surface facing the main surface of the base; a connection member connecting the terminal and the electrode; an encapsulant disposed on the main surface of the base and covering the terminal, the first semiconductor device and the connection member; and a heat dissipating member disposed on the encapsulant and having a space that opens in a direction extending perpendicular to the main surface of the base. The encapsulant is disposed in the space and, in a side view of the base, a peak of the connection member is located inside the space.
US09437514B2	Semiconductor package with coated side walls and method of manufacture A semiconductor package including an integrated device, the package having a front side, a back side and side walls linking the front and back sides, wherein each side wall is coated, to at least 80% of its area, with a coating material different from the material(s) of the back and front sides. A method of manufacturing a semiconductor package by providing an assembly containing an array of the packages, the assembly having thickness d0 and being attached to a dicing tape of thickness dd, fabricating a set of first dicing streets with width w1 and depth d1<(d0+dd), filling the first dicing streets at least partially with a coating material, and fabricating, in the coating material in each first dicing street, a second dicing street with width w2≦w1 and depth d2≧d0 but <(d0+dd).
US09437507B2	Method of correcting film thickness measurement value, film thickness corrector and eddy current sensor The polishing process includes a first state where an eddy current sensor and a polishing target object do not face each other and a second state where the eddy current sensor and the polishing target object face each other. The method of correcting a film thickness measurement value includes obtaining a first measurement signal (Xout, Yout) output from the eddy current sensor in the first state (step S108), computing a correction value (ΔX, ΔY) on the basis of the obtained first measurement signal and a reference signal (Xsd, Ysd) set in advance, obtaining a second measurement signal (X, Y) output from the eddy current sensor in the second state (step S104), and correcting the obtained second measurement signal on the basis of the computed correction value while the polishing process is being performed (step S105).
US09437502B1	Method to form stacked germanium nanowires and stacked III-V nanowires A first sacrificial gate structure is formed over a first fin stack and a second sacrificial gate structure is formed over a second fin stack. The first and second fin stacks include alternating layers of a III-V compound semiconductor material portion and a germanium material portion. Source/drain structures are formed adjacent the first and second sacrificial gate structures. The first sacrificial structure is removed to provide a first gate cavity. Exposed III-V compound semiconductor portions in the first gate cavity are removed to suspend a portion of each germanium material portion. A first functional gate structure is formed in the first gate cavity. The second sacrificial structure is removed to provide a second gate cavity. Exposed germanium material portions are removed to suspend a portion of each III-V compound semiconductor material portion of the second fin stack. A second functional gate structure is formed in the second gate cavity.
US09437494B2	Semiconductor arrangement and formation thereof A semiconductor arrangement and method of formation are provided. A method of semiconductor formation includes using a single photoresist to mask off an area where low voltage devices are to be formed as well as gate structures of high voltage devices while performing high energy implants for the high voltage devices. Another method of semiconductor fabrication includes performing high energy implants for high voltage devices through a patterned photoresist where the photoresist is patterned prior to forming gate structures for high voltage devices and prior to forming gate structures for low voltage devices. After the high energy implants are performed, subsequent processing is performed to form high voltage devices and low voltage devices. High voltage device and low voltage devices are thus formed in a CMOS process without need for additional masks.
US09437489B2	Method of manufacturing a wiring substrate A method of manufacturing a wiring substrate including a step of forming a through hole that includes forming a first concave portion in a substrate that extends from a second surface to a first insulating layer without passing through the first insulating layer; forming a second insulating layer at least within the first concave portion; and forming a second concave portion through the second insulating layer and the first insulating layer to expose a surface of a pad electrode, wherein the second concave portion is formed within the first concave portion; and filling the first concave portion and the second concave portion with a conductive body or forming the conductive body to coat inner walls of the first concave portion and the second concave portion, and forming the through electrode such that it is connected to the pad electrode.
US09437484B2	Etch stop layer in integrated circuits An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.
US09437483B2	Methods for forming etch stop layers, semiconductor devices having the same, and methods for fabricating semiconductor devices A plurality of vertical channels of semiconductor material are formed to extend in a vertical direction through the plurality of insulation layers and the plurality of conductive patterns, a gate insulating layer between the conductive pattern and the vertical channels that insulates the conductive pattern from the vertical channels. Conductive contact regions of the at least two of the conductive patterns are in a stepped configuration. An etch stop layer is positioned on the conductive contact regions, wherein the etch stop layer has a first portion on a first one of the plurality of conductive patterns and has a second portion on a second one of the plurality of conductive patterns, wherein the first portion is of a thickness that is greater than a thickness of the second portion.
US09437475B2	Method for fabricating microelectronic devices with isolation trenches partially formed under active regions A method of producing a microelectronic device in a substrate including a first semiconductor layer, a first dielectric layer, and a second semiconductor layer, including: etching a trench through the first semiconductor layer, the first dielectric layer, and a part of the second semiconductor layer, defining one active region, and such that, at the level of the second semiconductor layer, a part of the trench extends under a part of the active region; deposition of one second dielectric layer in the trench; etching the second dielectric layer such that remaining portions of the second dielectric layer forms portions of dielectric material extending under a part of the active region; deposition of a third dielectric layer in the trench such that the trench is filled with the dielectric materials of the second and third dielectric layers and forms an isolation trench.
US09437474B2	Method for fabricating microelectronic devices with isolation trenches partially formed under active regions A method of producing a microelectronic device in a substrate comprising a first semiconductor layer, a dielectric layer and a second semiconductor layer, comprising the following steps: etching a trench through the first semiconductor layer, the dielectric layer and a part of the thickness of the second semiconductor layer, thus defining, in the first semiconductor layer, one active region of the microelectronic device, ionic implantation in one or more side walls of the trench, at the level of the second semiconductor layer, modifying the crystallographic properties and/or the chemical properties of the implanted semiconductor, etching of the implanted semiconductor such that at least a part of the trench extends under a part of the active region, —filling of the trench with a dielectric material, forming an isolation trench surrounding the active region and comprising portions extending under a part of the active region.
US09437473B2	Method for separating at least two substrates along a selected interface A process for separating at least two substrates comprising at least two separation interfaces along one of the interfaces includes, before inserting a blade between the substrate, damaging at least one portion of a peripheral region of a chosen one of the interfaces, then inserting the blade and partially parting the substrates, and applying a fluid in a space between the parted substrates while the blade remains inserted therebetween, and decreasing a rupture energy of the chosen interface by stress corrosion involving breaking of siloxane bonds present at the interface.
US09437472B2	Semiconductor line feature and manufacturing method thereof Some embodiments of the present disclosure provide a semiconductor structure with a reduced line feature. The semiconductor structure includes a substrate, a first active region in the substrate and having a first sidewall, a second active region in the substrate and having a second sidewall, an isolation region contacting the first sidewall and the second sidewall. The above-mentioned semiconductor structure possesses a width of a top surface of the isolation region less than 50 nm and a width of a bottom surface of the isolation region more than 20 nm. Some embodiments provide a method for controlling a semiconductor line feature in a wafer, including patterning a hard mask exposing a line feature with a line width narrower than 50 nm on a wafer, forming a trench on the wafer correlated to the line feature by performing a plasma dry etch over the wafer, and filling the trench with isolation materials.
US09437462B2	Underfill material and method for manufacturing semiconductor device by using the same A method for manufacturing a semiconductor device by using underfill material includes: a semiconductor chip mounting step configured to mount a semiconductor chip having a solder bump on a substrate via an underfill film including a film forming resin having a weight average molecular weight of not more than 30000 g/mol and a molecular weight distribution of not more than 2.0, an epoxy resin, and an epoxy curing agent; and a reflow step configured to solder-bond the semiconductor chip and the substrate by a reflow furnace. The film forming resin of the underfill material has a weight average molecular weight of not more than 30000 g/mol and a molecular weight distribution of not more than 2.0, and accordingly, the viscosity at the time of heat melting can be reduced, and a semiconductor chip can be mounted at a low pressure.
US09437454B2	Wiring board, semiconductor device, and manufacturing methods thereof It is an object to reduce defective conduction in a wiring board or a semiconductor device whose integration degree is increased. It is another object to manufacture a highly reliable wiring board or semiconductor device with high yield. In a wiring board or a semiconductor device having a multilayer wiring structure, a conductive layer having a curved surface is used in connection between conductive layers used for the wirings. The top of a conductive layer in a lower layer exposed by removal of an insulating layer therearound has a curved surface, so that coverage of the conductive layer in the lower layer with a conductive layer in an upper layer stacked thereover can be favorable. A conductive layer is etched using a resist mask having a curved surface, so that a conductive layer having a curved surface is formed.
US09437453B2	Control of wafer surface charge during CMP CMP selectivity, removal rate, and uniformity are controlled both locally and globally by altering electric charge at the wafer surface. Surface charge characterization is performed by an on-board metrology module. Based on a charge profile map, the wafer can be treated in an immersion bath to impart a more positive or negative charge overall, or to neutralize the entire wafer before the CMP operation is performed. If charge hot spots are detected on the wafer, a charge pencil can be used to neutralize localized areas. One type of charge pencil bears a tapered porous polymer tip that is placed in close proximity to the wafer surface. Films present on the wafer absorb ions from, or surrender ions to, the charge pencil tip, by electrostatic forces. The charge pencil can be incorporated into a CMP system to provide an in-situ treatment prior to the planarization step or the slurry removal step.
US09437446B2	Slurry for chemical mechanical polishing and chemical mechanical polishing method The present invention provides a slurry for chemical mechanical polishing, containing abrasive grain (a), compound (b) having an amino group having a pKa of more than 9, and not less than 3 hydroxyl groups, and water.
US09437445B1	Dual fin integration for electron and hole mobility enhancement A technique for forming a semiconductor device is provided. Sacrificial mandrels are formed over a hardmask layer on a semiconductor layer. Spacers are formed on sidewalls of the sacrificial mandrels. The sacrificial mandrels are removed to leave the spacers. A masking process leaves exposed a first set of spacers with a second set protected. In response to the masking process, a first fin etch process forms a first set of fins in the semiconductor layer via first set of spacers. The first set of fins has a vertical sidewall profile. Another masking process leaves exposed the second set of spacers with the first set of spacers and the first set of fins protected. In response to the other masking process, a second fin etch process forms a second set of fins in semiconductor layer using the second set of spacers. The second set of fins has a trapezoidal sidewall profile.
US09437443B2	Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides A SIT method includes the following steps. An SIT mandrel material is deposited onto a substrate and formed into a plurality of SIT mandrels. A spacer material is conformally deposited onto the substrate covering a top and sides of each of the SIT mandrels. Atomic Layer Deposition (ALD) is used to deposit the SIT spacer at low temperatures. The spacer material is selected from the group including a metal, a metal oxide, a metal nitride and combinations including at least one of the foregoing materials. The spacer material is removed from all but the sides of each of the SIT mandrels to form SIT sidewall spacers on the sides of each of the SIT mandrels. The SIT mandrels are removed selective to the SIT sidewall spacers revealing a pattern of the SIT sidewall spacers. The pattern of the SIT sidewall spacers is transferred to the underlying stack or substrate.
US09437442B2	Methods for polishing phase change materials A slurry for polishing a phase change material, such as Ge—Sb—Te, or germanium-antimony-tellurium (GST), includes abrasive particles of sizes that minimize at least one of damage to (e.g., scratching of) a polished surface of phase change material, an amount of force to be applied during polishing, and a static etch rate of the phase change material, while optionally providing selectivity for the phase change material over adjacent dielectric materials. A polishing method includes applying a slurry with one or more of the above-noted properties to a phase change material, as well as bringing the polishing pad into frictional contact with the phase change material. Polishing systems are disclosed that include a plurality of sources of solids (e.g., abrasive particles) and provide for selectivity in the solids that are applied to a substrate or polishing pad.
US09437439B2	Processing method for wafer having chamfered portion along the outer circumference thereof followed by thinning and separating A wafer processing method for reducing the thickness of a wafer to a predetermined thickness, the wafer having a chamfered portion along the outer circumference thereof. The wafer processing method includes a stacked wafer forming step of attaching a support substrate to the front side of the wafer to thereby form a stacked wafer, and a chamfered portion removing step of positioning a cutting blade having a rotation axis parallel to the stacking direction of the stacked wafer formed by the stacked wafer forming step so that the outer circumference of the cutting blade faces the chamfered portion of the wafer, and then making the cutting blade cut into the wafer from the outer circumference toward the center thereof to thereby partially remove the chamfered portion in the range corresponding to the predetermined thickness from the front side of the wafer.
US09437430B2	Thick pseudomorphic nitride epitaxial layers Semiconductor structures are fabricated to include strained epitaxial layers exceeding a predicted critical thickness thereof.
US09437426B2	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device including: a process of transferring a substrate into a processing chamber; a first gas supplying process of supplying a B atom-containing gas into the processing chamber; a first purging process of purging an inside of the processing chamber under an atmosphere of the B atom-containing gas supplied in the first gas supplying process; a second gas supplying process of supplying an Si atom-containing gas into the processing chamber to form a non-doped Si film on the substrate, after the first purging process; and a second purging process of purging the inside of the processing chamber under an atmosphere of the Si atom-containing gas.
US09437425B2	Methods for integrating lead and graphene growth and devices formed therefrom Methods for forming integrated graphite-based structures with interconnections between leads and graphene layers are provided. A substrate is patterned to form a plurality of elements on the substrate. A trench separates a first element from an adjacent element in the plurality of elements. A lead is deposited on a side wall of the first element, and a layer from the top of the first element is removed to expose a portion of the lead. Both the deposition of the lead and removal of a layer from the top of the first element are conducted before generation of graphene layers on the top of the first element and the bottom of the trench. Thus, an integrated graphite-based structure having spatially isolated but electrically connected graphene layers is formed.
US09437417B2	Low temperature polycrystalline silicon thin film and method of producing the same, array substrate and display apparatus A method for producing a low temperature polycrystalline silicon thin film, comprising steps of: providing a substrate; forming a thermal conduction and electrical insulation layer, a buffer layer and an amorphous silicon layer on the substrate in this order; and performing a high-temperature treatment and a laser annealing on the amorphous silicon layer to convert the amorphous silicon layer to a polycrystalline silicon thin film, wherein the thermal conduction and electrical insulation layer comprises regular patterns distributed on the substrate.
US09437414B2	Pattern forming device and semiconductor device manufacturing method A pattern forming device uses a template having a plurality of protrusions and recesses configured to imprint a reverse image thereof on a resin on a substrate. The pattern forming device has a holding part, a stage, a driving part, and a curing part. The holding part includes a contact portion having a friction reducing contact portion, which is configured to engage against the template to hold the template. The stage carries the substrate. The driving part is configured to move at least one of the holding part and the stage to have the pattern in contact with the resin. The curing part cures the resin. The contact portion has a main body portion configured to move forward/backward with respect to the template and a tip portion arranged on the main body portion.
US09437411B2	Multi-element isotopic measurement by direct coupling of a multi-cycle isotachophoresis technique and a mass spectrometry technique A method for separating electrically charged species contained in a solution by an isotachophoresis method applied in an electrophoresis device, the isotachophoresis method being coupled to isotopic measurement using a mass spectrometer. The method notably comprises a step of stopping the voltage applied to the terminal of the electrophoresis capillary and transient application of a counter-pressure making it possible to utilize the length of the capillary several times and extend the separation distance artificially.
US09437409B2	High voltage power supply filter for a mass spectrometer Systems, devices, circuits, and methods are provided for an improved mass spectrometry detection system that comprises at least one component that operates at a high voltage. A number of high voltage filters or circuits are provided for reducing noise from high voltage power supplies that produce positive and negative voltages. In some embodiments, the filters can comprise one or more diodes. In some embodiments, the filters can comprise one or more transistors. In some embodiments, the filters can comprise one or more transistor pairs. A variety of embodiments of systems, devices, circuits, and methods in conjunction with the disclosures are provided.
US09437406B2	Photomultiplier and sensor module A photomultiplier according to an embodiment of the present invention has a sealed container the interior of which is maintained in a vacuum state, and an electron multiplier unit housed in the sealed container, and the sealed container is partly constructed of ceramic side tubes, on the assumption that the photomultiplier is used under high-temperature, high-pressure environments. The photomultiplier further has a structure for fixing an installation position of the electron multiplier unit relative to the sealed container, for improvement in anti-vibration performance.
US09437404B2	Sputtering apparatus A sputtering apparatus is provided with an elongated target holder, a substrate holder having a substrate receiving surface, and a mask assembly having an opening configured between the target holder and the substrate holder. The mask assembly is comprised of a first and second masking part having facing edges that form the opening and are disposed parallel to the substrate receiving surface and independently movable in a direction perpendicular to the length of the target holder and parallel to the substrate receiving surface, or in a direction perpendicular to the substrate receiving surface.
US09437396B2	Multi charged particle beam writing apparatus, and multi charged particle beam writing method A multi charged particle beam writing apparatus includes a dose calculation unit to calculate a first dose resolving the resist of the target object, for a first beam of the multiple beams, corresponding to a pattern forming region, in which a pattern is arranged; and to calculate a second dose not resolving the resist, for a second beam of the multiple beams, corresponding to a no-pattern forming region, which surrounds the whole perimeter of the pattern and in which no pattern is arranged, and a deflection control unit to control a plural blankers so that a dose of the first beam is to be the first dose calculated and a dose of the second beam is to be the second dose calculated.
US09437393B2	Method for forming an electrical connection to an sample support in an electron microscope holder An electrical connector for use in electron microscopy sample holders. The electrical connector provides electrical contacts to the sample support devices which are positioned in the sample holders for electrical, temperature and/or electrochemical control.
US09437387B1	Tap box assembly with separated annunciator A tap box assembly with separated annunciator emits a visual signal from an annunciator separated from a tap box such that the visual signal can be viewed from a remote location. The tap box provides electrical power from a busway to one or more rack computer systems via a power cable. The visual signal indicates whether the tap box is in a normal or abnormal state. A tap box assembly with separated annunciator can be coupled to a busway that extends down an aisle at an elevated position. A tap box assembly with separated annunciator can couple to a busway that extends along an aisle in an underfloor space. Data center technicians can easily view the state of a plurality of tap boxes of an aisle from an end of the aisle based on the visual signals emitted from a plurality of annunciators coupled to a plurality of tap boxes and separated from the tap boxes by a separation distance.
US09437384B2	Circuit breaker and apparatus including slot-retained armature linkage and methods of fabricating the same A circuit breaker includes a frame, at least one conductor supported by the frame, and a breaker mechanism supported by the frame and including a trip bar assembly that actuates the breaker mechanism. The circuit breaker also includes a magnetic armature assembly including an armature plate configured to move responsive to a current in the at least one conductor and an elongate link member (e.g., a rod) coupling the armature plate to the trip bar and having at least one flanged portion retained in at least one keyed slot in at least one of the armature plate and the trip bar assembly. The elongate link member may have a narrowed portion sized to allow passage of the link member through a narrowed portion of the at least one keyed slot to facilitate engagement of the at least one flanged portion in the at least one keyed slot.
US09437380B2	Switching unit or switching gear An object is to provide a switching unit or switching gear which enhances heat radiation performance and eliminates the need for an increase in unit size. In order to solve this problem the switching unit includes a switch and insulating resin located in a way to cover the periphery of the switch, in which the switch includes a fixed electrode, a movable electrode facing the fixed electrode and moving in an axial direction to contact or leave the fixed electrode, a bus side conductor connected to one of the electrodes and connected to a bus, and a load side conductor connected to the other electrode and connected to the load. The insulating resin has fins formed in a circumferential direction on the outer surface of the insulating resin and the distance between the periphery of the switch and the bottoms of the fins is almost constant in the circumferential direction.
US09437374B2	Automated grounding device with visual indication A grounding device for switchgear includes a connector and a body. The body includes (1) a male interface portion including an electrically conductive bus with a first bore and a spade connector; (2) a conductive housing including a second bore that is axially aligned with the first bore, and a grounding terminal to receive a grounding wire; (3) a pin assembly including a non-conductive tip, and a conductive pin, wherein the pin assembly is configured to move axially within the first and second bores between a closed position that provides an electrical connection between the bus and the conductive housing and an open position that provides no electrical connection; (4) a communications receptacle to receive signals from a controller outside the device body; and (5) a motor configured to selectively drive the pin assembly between the open position and the closed position, based on a signal from the controller.
US09437372B1	Process for producing graphene foam supercapacitor electrode A process for producing a supercapacitor electrode, comprising: (a) preparing a graphene dispersion containing an optional blowing agent; (b) depositing the dispersion onto a supporting substrate to form a wet layer; (c) removing the liquid medium from the wet layer to form a dried layer of graphene material; (d) heat treating the dried layer at a temperature from 80° C. to 3,200° C. to induce volatile gas molecules from the non-carbon elements or to activate the blowing agent for producing a layer of solid graphene foam having a physical density from 0.01 to 1.7 g/cm3 and a specific surface area from 50 to 3,300 m2/g; and (e) impregnating the foam with an electrolyte to form a layer of pre-impregnated graphene foam, which is compressed to form the electrode. This process leads to a supercapacitor having a large electrode thickness, high active mass loading, high tap density, and exceptional energy density.
US09437368B2	Capacitor and method for manufacturing same A capacitor includes a sealing member that includes a valve installation part, the valve installation part being higher than a processed sealing part of an outer packaging case for housing a capacitor element; and a pressure valve that is installed in a through hole of the valve installation part and whose valve function part is set at a position, the position being higher than the processed sealing part.
US09437366B2	Method for laser adjustable thin film capacitors Disclosed are methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.
US09437365B2	Electronic component and manufacturing method therefor An electronic component including an electronic component element with an external electrode, a Ni plating film on the external electrode, and a Sn plating film covering the Ni plating film. The Sn plating film has Sn—Ni alloy flakes therein, the Sn—Ni alloy flakes are present in the range from a surface of the Sn plating film on the Ni plating film to 50% or less of the thickness of the Sn plating film, and when Sn is removed from the Sn plating film to leave only the Sn—Ni alloy flakes, an observed planar view of a region occupied by the Sn—Ni alloy flakes falls within the range from 15% to 60% of the observed planar region.
US09437362B2	Apparatus and method for wireless power reception An apparatus and a method for wireless power reception are provided. A wireless power receiver includes a receiving unit configured to wirelessly receive a power. The wireless power receiver further includes a power consuming unit configured to consume the power, until a voltage applied to a load reaches a predetermined value, so that an amount of a power transferred from the receiving unit to the load is less than or equal to an initial accommodation power amount of the load.
US09437355B2	Amorphous metal core, induction apparatus using same, and method for manufacturing same Provided are an amorphous metal core that can minimize a core loss in which amorphous thin plate laminates are mutually combined by coupling protrusions and coupling recesses of assembly plates, an induction device, and a method of making the amorphous metal core. The amorphous metal core includes: a number of amorphous metal unit cores that include an amorphous thin plate laminate and a pair of assembly plates that are respectively laminated on the front and rear surfaces of the amorphous thin plate laminate, and are configured to have an I shape, respectively. The induction device includes: an amorphous metal core including a number of amorphous metal unit cores that are formed of an “I” shape, respectively; and at least one coil that is wound on at least one of the amorphous metal unit cores forming the amorphous metal core.
US09437350B2	Electrical line for a motor vehicle An electrical line (5) for electrically conductively connecting two units arranged in a motor vehicle, where the units have insulated electrical conductors surrounded by a common electrically effective screen. Over the entire length of the line (5) the construction of the line includes at least one light conductor (10) which is connected in the operating position to an evaluating unit (12) coupled to a switching element (11), and is integrated in the screen (9) of the line (5), or is arranged directly underneath the screen (9) of the line (5) while being in contact with the line (5), so that damage to the line (5) leads with certainty at least to a deformation of the light conductor (10) which leads to a signal which can be recognized by the evaluating unit (12).
US09437348B2	Electrical insulation material Provided in at least one embodiment is a nonwoven paper layer directly fused on one or both sides with a nonwoven fabric layer wherein one or both of the nonwoven paper and nonwoven fabric are electrically insulating.
US09437339B2	Leaf assembly for a multi-leaf collimator and multi-leaf collimator The invention relates to a leaf assembly (102) for a multi-leaf collimator, comprising a leaf frame (104) and a plurality of leaves (106) for shielding beams (108) from a selected area, wherein the leaves (106) are arranged sideways and adjacently in the leaf frame (104) for shielding beams (108) being emitted from a radiation source (110) located above the assembly (102), wherein each leaf (106) is mounted in the leaf frame (104) displaceably in an adjusting direction (112) being oriented perpendicularly related to said beams (108), and wherein the leaf frame (104) provides a linear guidance (114) for each leaf (106) within the adjusting direction (112), being designed in a such a way that the leaf frame (104) is adapted to allow for lateral movement of the leaves (106) superposing said linear guidance (114), thus allowing mutual abutting of the leaves (106). Furthermore, the invention relates to a multi-leaf collimator comprising two leaf assemblies (102) according to the invention, wherein the assemblies (102) are arranged to face each other within the adjusting direction (112). The invention is based on the objective of designing a leaf assembly (102) for a multi-leaf collimator and a multi-leaf collimator in such a way that the occurrence of leak-age radiation may be diminished.
US09437334B2	Apparatus and method for automatically loading a fuel pellet for manufacturing a nuclear fuel rod An apparatus for automatically loading a fuel pellet for manufacturing a nuclear fuel rod is provided. The apparatus includes a tray transfer unit that horizontally transfers the tray, a fuel pellet alignment unit that aligns fuel pellets arranged in the tray, a measurement unit that measures an entire length of the fuel pellets arranged in a row on the tray, a controller that compares an accumulated measured length with a set length, a waiting table located adjacent to the tray transfer unit to store a redundancy fuel pellet, and a fuel pellet movement unit that is driven by the controller and moves the fuel pellets between the tray and the waiting table.
US09437330B2	Memory device and memory system include hard repair mode and soft repair mode A memory device includes: a non-volatile memory circuit suitable for storing hard repair data; a data bus suitable for transmitting the hard repair data during a boot-up operation, and transmitting soft repair data during a soft repair mode; a plurality of registers suitable for storing repair data transmitted through the data bus and activated when the transmitted repair data is stored; a control circuit suitable for selecting a register to store the transmitted repair data among the plurality of the registers, and during the soft repair mode, deactivating a register that stores the same data as the transmitted repair data; and a memory bank suitable for performing a repair operation based on the data stored in a register that is activated among the plurality of the registers.
US09437329B2	Semiconductor device with initialization operation and boot-up operation A semiconductor device includes: a first block, which is initialized during an initialization mode; and a second block, which is initialized while the first block latches first signals during a boot-up mode. Herein, the second block may latch second signals after being initialized during the boot-up mode.
US09437325B2	TFT array substrate, display panel and display device A TFT array substrate is disclosed. The TFT array substrate includes a plurality of gate lines, and a gate driving circuit connected to the gate lines. The gate driving circuit includes a plurality of stages of shift registers, where odd-numbered stages of shift registers are cascaded-connected to each other, even-numbered stages of shift registers are cascaded-connected to each other, and the odd-numbered stages of shift registers and the even-numbered stages of shift registers are disposed at opposite ends of the gate lines.
US09437324B2	Shift register unit, driving method thereof, shift register and display device Embodiments of the present invention provides a shift register unit, driving method thereof, a shift register and a display device. A switch-off module is provided to disconnect electrical connections between a pull-up node and a precharge module and between the pull-up node and a pull-down module at a pull-up stage. As a result, it is able to prevent excessive electric leakage of a GOA circuit, thereby to improve the reliability and power consumption of the GOA circuit with an Oxide TFT.
US09437322B2	Circuit and method for reducing write disturb in a non-volatile memory device An active precharge circuit for a non-volatile memory array which minimizes write disturb to non-selected memory cells during programming is disclosed. In a programming cycle, all bitlines are pre-charged to a program inhibit voltage level and held at the program inhibit voltage level with current or voltage sources coupled to each of the bitlines in a precharge operation and a following programming operation. In the programming operation, a bitline connected to a memory cell to be programmed is driven to a programming level, such as VSS, while the active precharge circuit is enabled to enable programming thereof. Because the other non-selected bitlines are held at the program inhibit voltage level, they will not be inadvertently programmed when the programming voltage is supplied by the word line.
US09437317B2	Nonvolatile memory device, memory system having the same, external power controlling method thereof An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.
US09437313B2	Non-volatile memory device and related read method using adjustable bit line connection signal A nonvolatile memory device comprises a memory cell array and a voltage generator. The memory cell array comprises a plurality of memory cells connected in series between a string selection transistor connected to a bit line and a ground selection transistor connected to a source line. The voltage generator provides read voltages to word lines of memory cells selected from among the plurality of memory cells during a read operation. The read voltages of the selected memory cells differ from each other according to their respective distances from the string selection transistor.
US09437311B1	Flash memory apparatus and initialization method for programming operation thereof A flash memory apparatus and an initialization method for programming operation thereof are provided. The initialization method includes: providing a plurality of increasing programming pulse voltages to operate a plurality of without program inhibit programming actions on memory cells of the flash memory, and operating a plurality of programming verification actions on the memory cells according to a programming verification voltage; obtaining a recorded programming voltage value according verified results of the programming verification actions; providing a plurality of increasing reading pulse voltages to operate a plurality of reading actions on the memory cells; obtaining a recorded reading voltage value according to read result of the reading actions; and obtaining an initial programming voltage and an incremental step programming pulse voltages according to the recorded programming voltage value, the recorded reading voltage value and a voltage value of the programming verification voltage.
US09437306B2	NAND array architecture for multiple simutaneous program and read This invention discloses a HiNAND array scheme with multiple-level of bit lines (BLs) including metal3 global bit lines (GBLs), divided metal2 Segment bit lines (SBLs), and divided metal1 block bit lines (BBLs) laid out in parallel to each other respectively for a plurality of NAND Strings. All other source lines or power lines connected to bottoms of corresponding String capacitances of GBLs, SBLs, and BBLs are associated with metal0 line laid out perpendicular to those BLs. Under the HiNAND array scheme, conventional one-WL Read and Program-Verify operations are replaced by multiple-WL and All-BL Read and Program-Verify operations executed with charge capacitance of SBLs being reduced to 1/10- 1/20 of capacitance of GBLs to achieve DRAM-like faster operation, less operation stress, and lower power consumption. A preferred set of program biased voltages on the selected WL and remaining non-selected WLs associated with a Multiplier and a DRAM-like charge-sharing Latch Sensing Amplifier is proposed.
US09437298B1	Self-storing and self-restoring non-volatile static random access memory An apparatus is provided which comprises: a Static Random Access Memory (SRAM) cell with at least two non-volatile (NV) resistive memory elements integrated within the SRAM cell; and first logic to self-store data stored in the SRAM cell to the at least two NV resistive memory elements. A method is provided which comprises performing a self-storing operation, when a voltage applied to a SRAM cell decreases to a threshold voltage, to store voltage states of the SRAM cell to at least two NV resistive memory elements, wherein the at least two NV resistive memory elements are integrated with the SRAM cell; and performing self-restoring operation, when the voltage applied to the SRAM cell increases to the threshold voltage, by copying data from the at least two NV resistive memory elements to storage nodes of the SRAM cell.
US09437297B2	Write and erase scheme for resistive memory device A method for programming a two terminal resistive memory device, the method includes applying a bias voltage to a first electrode of a resistive memory cell of the device; measuring a current flowing through the cell; and stopping the applying of the bias voltage if the measured current is equal to or greater than a predetermined value.
US09437295B2	Semiconductor system including semiconductor memory apparatus and temperature control method thereof A semiconductor memory apparatus and a temperature control method thereof are provided. The semiconductor memory apparatus includes a temperature adjustment unit suitable for adjusting a temperature of a memory cell, and a temperature control unit suitable for sensing a temperature of the temperature adjustment unit, comparing a sensed temperature with a reference temperature range, and controlling the temperature adjustment unit to adjust the temperature thereof within the reference temperature range based on a comparison result.
US09437293B1	Integrated setback read with reduced snapback disturb Embodiments of the present disclosure describe read and write operations in phase change memory to reduce snapback disturb. In an embodiment, an apparatus includes read circuitry to apply a read voltage to a phase change memory (PCM) cell, setback circuitry to apply a setback pulse to the PCM cell in response to the application of the read voltage, wherein the setback pulse is a shorter set pulse performed for a first period of time that is shorter than a second period of time for a regular set pulse that is configured to transition the PCM cell from an amorphous state to a crystalline state, sense circuitry to sense, concurrently with application of the setback pulse, whether the PCM cell is in the amorphous state or the crystalline state. Other embodiments may be described and/or claimed.
US09437288B2	Dual mode clock and data scheme for memory programming A Phase-Change Memory (PCM) includes a factory programming interface to receive data changing on both a positive transition and a negative transition of a dual edge clock. A transition detector generated internal clock provides a delayed edge to latch the program data. This dual-edge clock scheme provides a doubling in the data transfer rate.
US09437283B2	Semiconductor storage device The disclosed invention provides a semiconductor storage device that creates no trouble, independently of power-on sequence. A semiconductor storage device includes a first power supply for the memory cells, a second power supply which is turned on independently of the first power supply and provided for a peripheral circuit which is electrically coupled to the memory cells, and a word line level fixing circuit for fixing the level of the word lines, which operates in accordance with turn-on of the first power supply. The word line level fixing circuit includes multiple level fixing transistors which are provided to correspond respectively to the word lines and provided between one of the word lines and a fixed potential and a level fixing control circuit which controls the level fixing transistors in accordance with input of a signal responding to turn-on of the second power supply.
US09437282B1	High performance sense amplifier A sense amplifier device for sensing a differential signal produced by a memory cell includes a first n-type metal-oxide-semiconductor field-effect transistor (NMOS) stack having multiple NMOS devices sharing a gate connection connected to a complementary data line; and a second NMOS stack having multiple NMOS devices sharing a gate connection connected to a true data line. At least one of the devices in the first stack has higher gate-to-source and drain-to-source voltages than a gate-to-source and drain-to-source voltages of at least one device in the second stack when the voltage of the complementary data line is higher than the true data line. At least one of the devices in the second stack has a higher gate-to-source and drain-to-source voltages than the gate-to-source and drain-to-source voltages of at least one device in the first stack when the voltage of the true data line is higher than the complementary data line.
US09437281B2	Negative bitline boost scheme for SRAM write-assist A device includes a transistor switch coupled between a bit line voltage node and a ground node and a boost signal circuit coupled to a gate node of the transistor switch, where the boost signal circuit providing a boost signal responsive to a write enable signal. The device also includes a first delay element and a first capacitor in series with the first delay element. The first capacitor has a first end coupled to the bit line voltage node and a second end coupled to the gate node through the first delay element.
US09437278B2	Low latency synchronization scheme for mesochronous DDR system A method for data synchronization is provided according to certain embodiments. The method comprises receiving data, a data clock signal, and a clean clock signal, sampling the data using the data clock signal, synchronizing the sampled data with the clean clock signal, and outputting the synchronized sampled data. The method also comprises tracking a phase drift between the data clock signal and the clean clock signal, and pulling in the output of the synchronized sampled data by one clock cycle of the clean clock signal if the tracked phase drift reaches a first value in a first direction.
US09437272B1	Multi-bit spin torque transfer magnetoresistive random access memory with sub-arrays A device includes a first magnetic tunnel junction (MTJ) element having a first read margin and a second MTJ element having a second read margin. The first read margin is greater than twice the second read margin. The device also includes an access transistor coupled between the first MTJ element and the second MTJ element. A gate of the access transistor is coupled to a word line. The first MTJ element, the second MTJ element, and the access transistor form a multi-bit spin torque transfer magnetoresistive random access memory (STT-MRAM) memory cell.
US09437266B2	Unipolar programmable metallization cell A programmable metallization device comprises a first electrode and a second electrode, and a dielectric layer, a conductive ion-barrier layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the dielectric layer to represent a data value using bias voltages having the same polarity, enabling the use of diode access devices. To form a conductive bridge, a bias is applied that is high enough to cause ions to penetrate the conductive ion-barrier layer into the dielectric layer, which then form filaments or bridges. To destruct the conductive bridge, a bias of the same polarity is applied that causes current to flow through the structure, while ion flow is blocked by the conductive ion-barrier layer. As a result of Joule heating, any bridge in the dielectric layer disintegrates.
US09437264B2	Memory operation latency control An integrated circuit with memory can operate with reduced latency between consecutive operations such as read operations. At a first time, a first operation command is finished on a memory array on an integrated circuit. At a second time, a second operation command is begun on the memory array. A regulated output voltage from the charge pump is coupled to word lines in the memory array. From the first time to the second time, a regulated output voltage is maintained at about a word line operation voltage such as a read voltage.
US09437263B2	Apparatuses and methods for providing strobe signals to memories Apparatuses and methods for providing strobe signals to memories are described herein. An example apparatus may include a plurality of memories and a memory controller. The memory controller may be coupled to the plurality of memories and configured to receive an input clock signal. The memory controller may further be configured to provide a timing strobe signal having a delay relative to the input clock signal to a memory of the plurality of memories. The memory controller may further be configured to receive a return strobe signal from the plurality of memories. In some examples, the return strobe signal may be based at least in part on the timing strobe signal and the memory controller may be configured to adjust the delay based, at least in part, on a phase difference of the input clock signal and the return strobe signal.
US09437261B2	Memory controller and information processing device A memory controller has a first variable delay circuit that delays a data strobe signal received from a memory, and a second variable delay circuit that variably delays a data signal which is received from the memory and is synchronous with the data strobe signal, and that is set a second delay amount which is different from a first delay amount of the first variable delay circuit.
US09437258B2	Data readout circuit of a storage device for read-out operation for preventing erroneous writing into a data storage element and reading out of the data correctly Provided is a data readout circuit capable of, even when a high voltage is applied during data read-out operation, preventing erroneous writing of the data and reading out the data correctly. The data readout circuit includes: a non-volatile storage element; a latch circuit including: an input inverter; an output inverter; and a MOS transistor; a first MOS transistor connected between the non-volatile storage element and the latch circuit; a second MOS transistor connected between the latch circuit and the first power supply terminal; a first bias circuit configured to bias a gate of the first MOS transistor; and a second bias circuit configured to bias the MOS transistor in the latch circuit, each of the first bias circuit and the second bias circuit being configured to output a predetermined bias voltage when the data in the non-volatile storage element is read out.
US09437257B2	Sensing circuit, memory device and data detecting method A sensing circuit includes a sensing resistor, a reference resistor and a comparator. The comparator has a first input coupled to the sensing resistor, a second input coupled to the reference resistor, and an output. The first input is configured to be coupled to a data bit line associated with a memory cell to receive a sensing input voltage caused by a cell current of the memory cell flowing through the sensing resistor. The second input is configured to be coupled to a reference bit line associated with a reference cell to receive a sensing reference voltage caused by a reference current of the reference cell flowing through the reference resistor. The comparator is configured to generate, at the output, an output signal indicating a logic state of data stored in the memory cell based on a comparison between the sensing input voltage and the sensing reference voltage.
US09437251B1	Apparatus and method having TDMR reader to reader shunts A method of making a magnetic head is provided. The method includes forming a first read sensor and a first electrical contact formed with a first shunt region. The method further includes forming a first mid-shield layer on the first read sensor, the first mid-shield layer being electrically connected to the first electrical contact. Additionally the method also includes forming a second mid-shield layer over the first mid-shield layer. Further, the method also includes forming a second read sensor over the second mid-shield layer, the second read sensor having a second electrical contact formed with a second shunt region electrically connected to the first shunt region.
US09437250B2	Hard drive carrier that locks in a shipping position A hard drive carrier includes a frame to receive a hard drive. The frame includes a front and a side, and a handle connects to the front. The hard drive carrier engages with a hard drive bay to hold the hard drive carrier in the hard drive bay at a first insertion depth when the handle is in a closed position. The first insertion depth is selected to prevent a hard drive connector from engaging with an enclosure connector on a backplane of the hard drive bay. The hard drive carrier further engages with the hard drive bay to hold the hard drive carrier at a second insertion depth when the handle is in the closed position. The second insertion depth is selected to engage the hard drive connector with the enclosure connector.
US09437243B1	Method of generating highlights for live videos A method of generating highlights for live videos includes steps of setting a rule for inserting an out point, inserting an in point when a highlight picture appears, automatically finding out the rule whereby the out point is inserted, calculating a position where the out point is inserted to form a highlight segment record, loading the highlight segment record into a standby list, and searching the needed highlight segment record when the playback is in action to find the corresponding game video and a start position and an end position of a highlight segment. Therefore, steps for generating highlights can be reduced, and incorrect operations caused by human error can be effectively decreased.
US09437242B1	Data storage device employing different frequency preambles in adjacent data tracks A data storage device is disclosed comprising a disk comprising a plurality of data tracks each comprising a plurality of data sectors, and a head actuated over the disk. A first frequency preamble is written to a first data sector of a first data track and a second frequency preamble is written to a second data sector of a second data track, wherein the first frequency is different from the second frequency and the first data track is adjacent to the second data track.
US09437241B2	High performance cartridge format In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith, the program instructions readable/executable by a controller to cause the controller to: determine and/or receive, by the controller, a selection of which of at least two track width formats to use during writing of data on a magnetic recording tape, wherein the track width format is selected based on an environmental condition; and cause, by the controller, simultaneous writing of a plurality of data tracks to the magnetic recording tape using only one of the track width formats at a same time such that each of the data tracks written at the same time has a track width that is substantially the same.
US09437239B2	Electronic system for the protection and control of license transactions associated with the disablement of replicated read only media and its bound licensed content Distribution of content stored on read only media, and a system and method by which a consumer who purchased content stored on read only media implements a process in the field by which they alter the storage media and verifiably disable at least a portion of the stored content in support of a transaction. A system and tools are used by the consumer to identify, authenticate, disable, and confirm disablement in exchange for compensation, the acquisition of new usage rights to content, or the ability to restore access to or copy content to new media. The process may be conducted by the consumer in the field without assistance and or visual inspection, or be partially conducted in conjunction with an authorized intermediary. Furthermore, the process may restore access to content stored on new media without the need to transfer copies of content.
US09437238B2	System and method of processing seismic data on a co-processor device A system and method for processing seismic data on one or more co-processor devices that are operatively coupled to a host computing system via a communications channel. The compression of input data transmitted to the co-processor device and/or the size of the storage provided on the co-processor device may enhance the efficiency of the processing of the data on the peripheral device by obviating a bottleneck caused by the relatively slow transfer of data between the host computing system and the co-processor device or by the relatively slow transfer of data within the co-processor device between the co-processor information storage and the co-processor.
US09437227B1	Thermally assisted magnetic recording head slider, method of manufacturing the same, head gimbal assembly, and hard disk drive A thermally assisted magnetic recording head slider includes a light source unit having a light emitting element emitting laser light and a submount holding the light emitting element, and slider including a thin-film laminated part having a main magnetic pole layer, a near-field light generating element and an optical waveguide. A combination of the light emitting element and near-field light generating element is composed of a first pattern or second pattern. The light source unit is mounted on a light source placing surface so that a substrate surface of the light emitting element is orthogonal to a laminated surface of the thin-film laminated part. A plurality of electrode pads are formed on the outer end surface of the slider. The light source unit has a first element electrode and second element electrode. A first connecting wiring part and second connecting wiring part, which connected the first element electrode and second element electrode with a first electrode pad and second electrode pad, are formed on a light source placing surface.
US09437226B1	Method of testing thermally-assisted magnetic head A method of testing a TAMH includes providing a slider body having a waveguide embedded therein with an incidence end extending toward a back surface of the slider body; providing a light source unit including a light source and a unit substrate; coating a bonding material layer on the back surface, under the bottom, or both on the back surface and under the bottom of the unit substrate; coating a localization material layer on the back surface; aligning the light source unit to the slider body; causing a light emitted from the light source and allowed to be incident on the incidence end to anneal the localization material layer to generate an annealing mark; removing the light source unit or the light source from the slider body; and measuring a position offset between the annealing mark and the incidence end. The method can evaluate alignment accuracy of a slider body and a light source unit in two dimensional directions.
US09437219B1	Magnetoresistive reader for two-dimensional magnetic recording An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, a number of leads connected to the array of magnetoresistive read heads, and number of bias circuits connected to the array of read heads by the leads. The bias circuits can be configured to independently bias each of the array of read heads with the array of read heads connected in series or in parallel.
US09437218B2	Magnetic recording head and magnetic recording apparatus According to an embodiment, a magnetic recording head includes a main magnetic pole and a spin torque oscillator. The spin torque oscillator includes a first perpendicular free layer, a second perpendicular free layer, and a first spacer layer, each of the first perpendicular free layer and the second perpendicular free layer including a magnetic anisotropy axis in a direction perpendicular to a film plane of the spin torque oscillator. An effective perpendicular magnetic anisotropy magnetic field of the first perpendicular free layer is smaller than an effective perpendicular magnetic anisotropy magnetic field of the second perpendicular free layer, and a current is applied from the first perpendicular free layer side to the second perpendicular free layer side.
US09437216B2	Method of transmitting data in a communication system A method of receiving at a terminal a first signal transmitted via a communication network, said method comprising the steps of; receiving at the terminal the first signal comprising a plurality of data elements; analyzing characteristics of the first signal; receiving from a user of the terminal a second signal to be transmitted from the terminal; analyzing characteristics of the second signal to detect audio activity in the second signal; and applying a delay between receiving at the terminal and outputting from the terminal at least one of said plurality of data elements; and adjusting the delay based on the analyzed characteristics of the first signal and on the detection of audio activity in the second signal.
US09437211B1	Adaptive delay for enhanced speech processing Provided is a system, method, and computer program product for improving the quality of voice communications on a mobile handset device by dynamically and adaptively selecting adjusting the latency of a voice call to accommodate an optimal speech enhancement technique in accordance with the current ambient noise level. The system, method and computer program product improves the quality of a voice call transmitted over a wireless link to a communication device dynamically increasing the latency of the voice call when the ambient noise level is above a predetermined threshold in order to use a more robust high-latency voice enhancement technique and by dynamically decreasing the latency of the voice call when the ambient noise level is below a predetermined threshold to use the low-latency voice enhancement techniques. The latency periods are adjusted by adding or deleting voice samples during periods of unvoiced activity.
US09437210B2	Audio signal processing Disclosed is a device having an audio interface configured to generate from the audio signal an outgoing audio signal for supplying to a loudspeaker component. The audio interface is configured, in generating the outgoing audio signal, to apply dynamic range compression to the audio signal. Device software is configured to receive an incoming audio signal and generate an audio signal from the incoming audio signal. The audio signal generated by the software is supplied to the audio interface for outputting by the loudspeaker component and is also used as a reference in audio signal processing. Generating the audio signal comprises the software applying initial nonlinear amplitude processing to the incoming audio signal to modify its power envelope. The modified power envelope is sufficiently smooth to be substantially unaffected by the dynamic range compression when applied by the audio interface.
US09437209B2	Speech enhancement method and device for mobile phones The present invention discloses a speech enhancement method and device for mobile phones. By the method and device provided by the present invention, the mobile phone holding state of a user is detected when the user is talking on the phone, so that different denoising solutions will be employed according to the state of the user in holding the mobile phone. When the user holds the mobile phone normally, a solution integrating multi-microphone denoising and single-microphone denoising will be employed to effectively suppress both the steady noise and the non-steady noise; and when the user holds the mobile phone abnormally, a solution of single-microphone denoising will be employed only to suppress the steady noise. The distortion of speech by multi-microphone denoising is avoided, and the speech quality is ensured.
US09437206B2	Voice control of applications by associating user input with action-context identifier pairs A method is provided for enabling or enhancing a use of voice control in a voice controlled application (VCA) via a development framework. The method includes providing in the framework a plurality of action-context pairs usable in a memory of an application development device, which includes a processor. The action-context pairs serve to direct execution of the VCA, wherein the framework context defines a list of parameters related to the action and their respective value types. At least one of a voice recognition engine (VRE) and a natural language library is provided to match each action-context pair with a semantically related vocabulary. A registration mechanism is provided in the framework, which permits an association to be formed between an action-context pair and a handler in the voice controlled application. An associated development system for developing the VCA and user equipment that executes the VCA are provided as well.
US09437205B2	Method, application, and device for audio signal transmission The current invention discloses methods, applications, and devices for audio transmission from a mobile terminal. After receiving an audio signal transmission request from a user, the mobile terminal may initiate a recording session to record audio signals into audio frames. During the recording session, the terminal may adjust the audio codecs used for encoding the audio frames based on the workload and the performance of the terminal. By measuring and evaluating the encoding time, the terminal may change between using a floating-point AMR audio codec and a fixed-point AMR audio codec. The encoded audio frames are transmitted to a remote server. The current invention provides a flexible and efficient approach for audio signal encoding and transmission, balancing signal integrity and encoding speed at the same time.
US09437202B2	Bandwidth extension of harmonic audio signal Methods and arrangements in a codec for supporting bandwidth extension, BWE, of an harmonic audio signal. The method in the decoder part of the codec comprises receiving a plurality of gain values associated with a frequency band b and a number of adjacent frequency bands of band b. The method further comprises determining whether a reconstructed corresponding frequency band b′ comprises a spectral peak. When the band b′ comprises a spectral peak, a gain value associated with the band b′ is set to a first value based on the received plurality of gain values; and otherwise the gain value is set to a second value based on the received plurality of gain values. The suggested technology enables bringing gain values into agreement with peak positions in a bandwidth extended frequency region.
US09437200B2	Noise suppression A method and computing system for suppressing noise in an audio signal, comprising: receiving the audio signal at signal processing means; determining that another signal is input to the signal processing means, the input signal resulting from an activity which generates noise in the audio signal; and selectively suppressing noise in the audio signal in dependence on the determination that the input signal is input to the signal processing means to thereby suppress the generated noise in the audio signal.
US09437196B2	Working method of sound transmission-based dynamic token A working method of a sound transmission-based dynamic token comprises: a dynamic token waiting for disconnection of a key; and when the disconnection of the key is detected, judging the type of a pressed key, and performing a corresponding operation according to different types of keys.
US09437194B2	Electronic device and voice control method thereof A voice control method is applied in an electronic device. The electronic device includes a voice input unit, a play unit, and a storage unit storing a conversation database and an association table between different ranges of voice characteristics and styles of response voice. The method includes the following steps. Obtaining voice signals input via the voice input unit. Determining which content is input according to the obtained voice signals. Searching in the conversation database to find a response corresponding to the input content. Analyzing voice characteristics of the obtained voice signals. Comparing the voice characteristics of the obtained voice signals with the pre-stored ranges. Selecting the associated response voice. Finally, outputting the found response using the associated response voice via the play unit.
US09437190B2	Speech recognition apparatus for recognizing user's utterance In accordance with alphabet input method information for each user, a word formed of an alphabet string is registered in a word dictionary, in a state where “dotto” being added before each alphabet and one of a set of alphabets difficult to distinguish from each other like “M and N” and “B and P” is repeated twice. For example, a word “PAM” and a feature of time series corresponding to “dotto P P doddo A dotto M” are registered in association with each other. When a user performs a speech input of “PAM”, in accordance with the user's alphabet input method information, the user utters “dotto P P dotto A dotto M”. A speech recognition is performed on this sound data using the word dictionary corresponding to the user's alphabet input method information.
US09437182B2	Active noise reduction method using perceptual masking A method of active noise reduction is described which comprises receiving an audio signal (132) to be played, receiving a noise signal (105, 107, 116, 118, 126), indicative of ambient noise (111), from at least one microphone (104, 106), and generating a noise cancellation signal (114) depending on both, said audio signal (132) and said noise signal (105, 107, 116, 118, 126).
US09437181B2	Off-axis audio suppression in an automobile cabin The suppression of off-axis audio in an audio environment is provided. Off-axis audio may be considered audio that does not originate from a region of interest. The off-axis audio is suppressed by comparing a phase difference between signals from two microphones to a target slope of the phase difference between signals originating from the region of interest. The target slope can be adapted to allow the region of interest to move with the location of a human speaker such as a driver.
US09437178B2	Updating music content or program to usable state in cooperation with external electronic audio apparatus A storage section stores therein one or more sets of music content and/or function executing programs, at least a part of the sets of music content and/or function executing programs being set in a non-usable state at least in an initial state. An audio signal containing additional information is received from an external electronic audio apparatus, and a determination is made as to whether the additional information satisfies a predetermined condition. If the additional information satisfies the predetermined condition, any of the sets of music content and/or function executing programs, stored in the storage section, that is currently set in the non-usable state is updated to a usable state. A model of the external electronic audio apparatus is identified, and any of the sets of music content and/or function executing programs that corresponds to the identified model is updated to the usable state.
US09437176B2	Top-tuning system for hand percussion instrument Disclosed is a tuning system for tuning a hand percussion instrument having a head and a shell. The tuning system comprises a rim, the rim secured to the head of the instrument, the rim comprising at least one receptacle, the receptacle positioned at outer periphery of the rim such that the receptacle body is below the plane of the rim, a side plate assembly, the side plate assembly secured to the shell of the instrument, a tuning rod, the tuning rod having a first end secured to the receptacle for varying the tension on the head, and the tuning rod having a second end secured to the side plate assembly.
US09437172B2	High-speed low-power access to register files Embodiments of a unified shading controller are disclosed. The embodiments may provide a first functional unit configured to send a write request to a second functional unit. The write request may include data and the data may include one or more control bits. Upon receiving the write request, the second functional unit may check the one or more control bits, and hold the data in a given queue dependent upon the control bits.
US09437169B2	Touch panel control circuit and semiconductor integrated circuit using the same A touch panel control circuit includes a drive circuit that drives Y electrodes of a touch panel, and a detection circuit that is connected to X electrodes and detects a capacitance value of an intersection capacitor. The drive circuit applies a plurality of pulses to the Y electrodes in a predetermined period. The detection circuit includes a switched capacitor circuit capable of operating with respect to an input signal from the X electrodes in synchronization with the plurality of pulses, and an integration circuit that is connected to an output of the switched capacitor circuit and operates in synchronization with the pulses. The switched capacitor circuit is allowed to operate as a filter, and the switched capacitor circuit is set to have characteristics which have a maximum gain at a direct current and a frequency of a corresponding pulse and in which the gain is suppressed at a frequency therebetween.
US09437168B2	Gate driving circuit and display device including the same A gate driving circuit and display device including the same are disclosed. In one aspect, the gate driving circuit includes a plurality of stages, each stage including a first input portion configured to apply an input signal to a first node based on a first clock signal, a first output portion configured to output a second clock signal as a gate output signal based on a first node signal applied to the first node, a second input portion configured to apply the first clock signal to a second node based on the first node signal, a second output portion configured to output a first voltage as the gate output signal based on a second node signal applied to the second node, and an output control portion configured to activate the first output portion based on an output control signal.
US09437167B2	Organic light-emitting display device having a high aperture raatio and driving method thereof Disclosed is an organic light-emitting display device and operating method thereof that may include an organic light-emitting diode, a first transistor controlled by a sensing signal and connected to a data line, a second transistor controlled by a scanning signal and connected to the data line, and a driving transistor having first to third nodes, wherein a reference voltage is applied to the first node through the first transistor, a data voltage is applied to the second node through the second transistor, and the third node is connected to a driving voltage line.
US09437164B2	Method and device for detecting a synchronization signal of a display, and display A method for detecting a synchronization signal of a display comprises: obtaining an actual V-sync frequency of the display, comparing the actual V-sync frequency with standard V-sync frequencies prestored in a standard synchronization signal table, and selecting a standard V-sync frequency as a candidate V-sync frequency so that difference between the candidate V-sync frequency and the actual V-sync frequency is within a first error range; obtaining an actual H-sync frequency of the display, comparing the actual H-sync frequency with standard H-sync frequencies in the standard horizontal synchronization signal sub-table which corresponds to the selected candidate V-sync frequency, and selecting a standard H-sync frequency as a correct H-sync frequency so that difference between the correct H-sync frequency and the actual H-sync frequency is within a second error range, thereby a resolution of the display is obtained.
US09437162B2	Image output apparatus, control method therefor, image display apparatus, control method therefor, and storage medium Disclosed is an image output apparatus that outputs a plurality of image data to one or a plurality of image display apparatuses capable of controlling amounts of light of backlights, the image output apparatus including: a determining unit configured to determine whether the plurality of image data satisfy a predetermined condition; and a controlling unit configured to control, when the determining unit determines that the plurality of image data satisfy the predetermined condition, the one or the plurality of image display apparatuses such that either or both of amounts of light and number of light emission control units of the backlights used for display of the plurality of image data are the same.
US09437159B2	Environmental interrupt in a head-mounted display and utilization of non field of view real estate A wearable computing device includes a head-mounted display (HMD) that generates a virtual reality environment. Through the generation and tracking of positional data, a the virtual environment may be interrupted or paused. Upon pausing the environment, a user may access a number of ancillary menus and controls not otherwise available during normal operation of the virtual environment.
US09437158B2	Electronic device for controlling multi-display and display control method thereof A display control method for an electronic device and an electronic device are provided, which can implement interactive program display or interactive picture display, and thus provide good user experience. The method includes: a display unit receives a first operation and generates a first instruction corresponding to the first operation; a process unit responses the first instruction to control the display region, so that the first display region and the second display region perform interactive program display or interactive picture display.
US09437156B2	Electronic apparatus and method for switching display mode An electronic apparatus and a method for switching a display mode are provided. The method includes: turning on the electronic apparatus to enter a full-screen display mode; switching the full-screen display mode to a block display mode when a mode-switching signal is triggered; and enabling a corresponding operation interface in the block display mode according to an execution state of an operation system of the electronic apparatus in the full-screen display mode and displaying the operation interface in the designated block of the display unit.
US09437154B2	Display device, and method for driving display device Provided for each data signal line drive circuit (6a, 6b, 6c) are: a voltage generation circuit (61a, 61b, 61c) that generates a drive voltage in accordance with an external voltage; and a voltage determination circuit (63a, 63b, 63c) which determines whether or not a voltage level of at least either the external voltage or the drive voltage falls within a range of allowable voltages, in a case where the voltage level does not fall within the range of allowable voltages, operation of the voltage generation circuits (61a, 61b, 61c) being stopped.
US09437151B2	Scan driving circuit and display panel The present invention provides a scan driving circuit and display panel. The scan driving circuit comprises a plurality of scan driving units, each of which comprises a fan-out line, a plurality of switch sets, a plurality of control lines and a plurality of scan lines. The control lines are connected to at least one of the switches of each of the switch sets individually and the fan-out line is connected to the scan lines through the switch sets, such that the scan lines are turned on separately under control of the fan-out line and the control lines. By the above mentioned solution, the present invention drives a plurality of scan lines by one fan-out line such that an amount of the gate driving chips in the fan-out block and the layout space of the fan-out line can be reduced.
US09437149B2	Array substrate and display An array substrate and a display are provided, and the array substrate includes: a substrate; a pixel region, provided on the substrate; a plurality of data lines, formed on the substrate; a plurality of gate signal lines, formed on the substrate and configured to apply a gate signal; a plurality of pixel units, located in the pixel region and defined by crossing of the plurality of data lines and the plurality of gate signal lines; and at least one leading wire, provided at the periphery of the pixel region and configured to transmit the gate signal, wherein two ends of each of the plurality of gate signal lines near the periphery of the pixel region are connected with one leading wire through a first thin film transistor and a second thin film transistor respectively.
US09437146B2	Shift register, gate driver and display device Disclosed are a shift register, a gate driver and a display device, which relate the field of display technology and may eliminate the voltage coupled noise generated by a clock signal at an output terminal of the shift register effectively. The shift register comprises: a first input unit, a clock control unit, a second input unit, an inverting unit, a pulling-down unit and a first level selecting unit, a second level selecting unit, a third level selecting unit; the first input unit is connected with a first input signal terminal, the first level selecting unit and the second input unit, respectively, wherein a node at which the first input unit is connected with the second input unit is a pulling-up node, the first input unit is used for controlling a potential at the pulling-up node. The embodiments of the present disclosure may be applied to various display devices.
US09437144B2	Liquid crystal display panel, image displaying method and image displaying system The present invention relates to an image displaying method including: providing a liquid crystal display panel with multiple three-pixel display units, each three-pixel display unit including a first red sub-pixel unit, a first green sub-pixel unit and a first blue sub-pixel unit; demarcating a display region of the liquid crystal display panel to form multiple four-pixel display units, each four-pixel display unit including four the three-pixel display units; and providing four-pixel data signals of image including a red pixel data signal, a green pixel data signal, a blue pixel data signal and a fourth pixel data signal inputted to the liquid crystal display panel and thereby displaying the image thereon. The present invention also provides an image displaying system for carrying out the image displaying method.
US09437140B2	Electro-optical device and electronic apparatus An electro-optical device including a substrate; an array region which is formed on the substrate and in which a plurality of light emitting pixels are arranged two-dimensionally; first drive lines that are arranged in a row direction and are connected to each of the light emitting pixels; second drive lines that are arranged in a column direction and are connected to each of the light emitting pixels; a drive circuit that supplies a drive signal to at least one of the first drive line and the second drive line; an inspection terminal that is electrically connected to the drive circuit or the second drive lines; and an electrostatic protection circuit that is connected to the inspection terminal, in which at least a part of the electrostatic protection circuit overlaps the inspection terminal in a plan view.
US09437139B2	Pixel driving current extracting apparatus and pixel driving current extracting method A pixel driving current extracting apparatus and a pixel driving current extracting method, the pixel driving current extracting apparatus comprises driving current extracting circuits corresponding to pixel driving circuits for respective colors respectively. Each of the driving current extracting circuits comprises a driving current amplifying and converting unit connected to the pixel driving circuit, for amplifying and converting a driving current of the pixel driving circuit into a voltage signal. A driving current computing unit connected to the driving current amplifying and converting unit is used for computing a pixel driving current according to the voltage signal. An amplification ratio of the driving current amplifying and converting unit in the driving current extracting circuits corresponding to the pixel driving circuits for respective colors is inversely proportional to a magnitude of the pixel driving current for respective colors. The pixel driving currents for respective colors are extracted uniformly and amplified properly without being distorted, thereby providing a well data support for the subsequent signal processing.
US09437134B2	Organic light emitting display and method of driving the same An organic light emitting display is capable of reducing power consumption. The organic light emitting display includes a scan driver for sequentially supplying scan signals to scan lines, a data driver for supplying data signals to data lines in synchronization with the scan signals, pixels located at crossing regions of the scan lines and the data lines, a timing controller for determining a normal driving mode for displaying a normal image and a standby driving mode displaying less information than the normal image, and a power source for supplying a first power and a second power to the pixels, wherein a voltage difference between the first power and the second power in the normal driving mode is a first voltage, and a voltage difference between the first power and the second power is a second voltage different from the first voltage.
US09437129B2	Display driving integrated circuit, display device, and method used to perform operation of display driving integrated circuit Provided are display driving integrated circuits, display devices, and/or methods of operating the display driving integrated circuit. The display driving integrated circuit including a timing controller processing input data and outputting output data; and a source driving unit including at least one source driver and converting into analog data the output data received through a transmission channel connected to the timing controller and outputting the analog data as display data may be provided. The timing controller may include a data selecting unit comparing a transition count of the input data with a transition count of encoded data obtained by encoding the input data, and outputting one of the input data and the encoded data as selection data according to the comparison, a data randomizing unit randomizing the selection data and generating random data, and a data transmitting unit converting the random data into the output data may be provided.
US09437127B2	Device and method for displaying image, device and method for supplying power, and method for adjusting brightness of contents A device and a method for displaying an image, a device and a method for supplying power, and a method for adjusting brightness of contents are provided. The device for displaying the image includes: a pixel value converter which, if a plurality of color pixel values of the image is received, converts the received color pixel values; a display panel which includes a plurality of color light-emitting devices and which drives each of the plurality of color light-emitting devices based on the converted color pixel values; a light-emission controller which provides the display panel with a control signal which variably controls respective driving times of each of the color light-emitting devices based on colors; and a global controller which controls the light-emission controller to variably adjust a duty ratio of the control signal based on colors and the converted color pixel values.
US09437125B2	Method and device for obtaining image signals The present invention provides a method and a device for obtaining image signals. The method comprising steps of: measuring a luminance signal of a grayscale switching screen of a to-be-sampled grayscale; and processing the luminance signal of the grayscale switching screen of the to-be-sampled grayscale by a two-dimensional nonlinear fitting operation which is executed based on a two-dimensional least squares method. The present invention further provides the device for obtaining image signals. The present invention introduces the two-dimensional nonlinear fitting operation to the luminance signal of the grayscale switching screen of the to-be-sampled grayscale, so as to efficiently obtain luminance signals of different grayscale switching screens.
US09437123B2	Sign assembly A sign assembly includes a panel and a base. The base is configured to be attached to the panel via a resilient member. The bottom surface of the base defines a pair of cavities. The cavities are positioned substantially adjacent to a forward edge of the bottom surface. A pair of wheel assemblies is secured within respective cavities on the bottom surface. Each wheel assembly includes a housing that houses an axle and wheel.
US09437121B2	Card holder A holder (100) for a folded card (102), the folded card (102) being of the type having a spine (108) and at least two sheets (110). The holder (100) having a holder support (104) for engagement with a surface for preventing the holder (100) being disturbed in an outdoor environment and a card supporting arrangement (106) mounted on the holder support (104). The card supporting arrangement (104) having an assembly for supporting the spine (108) of the folded card (102) and for engaging at least a portion of the sheets (110) of the folded card (102) on opposing sides of the spine (108) holding the folded card (102) open at a pre-determined angle.
US09437119B1	Method for fabricating simulated tissue structures by means of multi material 3D printing A synthetic eye model includes an enclosed lens capsule, a removable cortex material within the lens capsule, and an outer support for the lens capsule. A synthetic eye model assembly includes an eye segment comprising a lens capsule and an outer support and a base for detachably engaging the eye segment. The synthetic eye model and assembly can be made by 3D printing. A method of practicing eye surgery and a method of making a three-dimensional synthetic tissue model of an anatomical tissue structure are also disclosed.
US09437118B2	Flexible and rigid endoscopic training device (FRED) An anatomically realistic model for training in minimally invasive procedures. The model includes an outer shell resembling the appropriate animal or human being with openings for accessing the interior cavity of the shell. Modules within the interior cavity are operably connected to the openings to permit external access to the modules. The modules comprise different mechanical components configured to represent an organ or anatomical feature. Spacers within the interior cavity provide structure and maintain placement of the modules and sufficiently realistic tactile feedback during an endoscopic procedure.
US09437116B2	System for subglottal pressure measurement and display during speech A method and device is described for estimating the subglottal air pressure during speech or singing from the intraoral air pressure in essentially real-time by using a type of peak detection and extrapolation means that holds peaks in the low-pass filtered pressure signal for a period of time sufficient to allow their interpretation as real-time subglottal pressure. An electronic circuit suitable for implementing this function is described.
US09437115B2	Method and system for distance education based on asynchronous interaction The invention facilitates asynchronous interaction between a geographically separated facilitator and at least one user. The said invention provides asynchronous interaction between rural classrooms (teacher-student community) and expert teachers to increase the outreach of the expert teachers much beyond that is permitted with the teachings of the prior art.
US09437114B2	Departure sequencing systems and methods A departure sequencing system models airport operations and provides suggested gate pushback times for aircraft. In various embodiments, a departure sequencing system includes an airport state analyzer, a taxi-out predictor, and a pushback optimizer. The departure sequencing system may utilize stochastic models, and resolve aircraft conflicts using a business rules engine. Via use of the departure sequencing system, taxi times may be reduced, taxi fuel burn may be reduced, and airport throughput may be increased.
US09437113B2	Method and apparatus for planning air refueling for aircraft A method, apparatus, and computer usable program code for planning refueling. In one advantageous embodiment, the apparatus includes an air refueling plug-in application capable of calculating air refueling routes for a formation of aircraft and a plurality of plug-in applications. A framework capable of providing framework services to the air refueling plug-in application and the plurality of plug-in applications is present. The apparatus also includes a first interface for the air refueling plug-in application and the plurality of plug-in applications to receive the framework services from the framework. The apparatus also has a second interface for the air refueling plug-in application and plurality of plug-in applications to provide services from one plug-in application to another plug-in application. The first interface and the second interface are independent of the air refueling plug-in application and plurality of plug-in applications.
US09437109B1	Emergency safety marker system An electronic lighted safety marker system used by emergency responders to warn motorists of the presence of an accident scene ahead on or beside the roadway is provided by the invention. Such safety marker can be deployed individually or in groups by the emergency responder along the perimeter of the accident scene and ideally ahead of it along the roadway to provide adequate warning to approaching motorists to avoid the accident scene. The safety marker contains a power source, a light panel, a protective shield for the light panel, and electronic circuitry for controlling the operation of the lights in a predetermined frequency or pattern, and may be automatically actuated and self-righting when it is dropped onto the ground or other hard surface. The safety marker can also contain an incursion warning system against incoming vehicles, an early warning radar transponder for sending a warning message to such incoming vehicles, a GPS location detector and transmitter for providing the location of the safety marker and its associated accident scene to a central dispatcher, and a gunshot sensor for detecting the occurrence of gunfire around the accident scene and its location to provide that information to the central dispatcher.
US09437098B2	Operation machine To accurately grasp a generation situation of a warning generated in an operation machine, the operation machine is provided with: warning generation means 55 adapted to determine whether or not there is abnormality, and in the case where there is abnormality, generate a warning; warning storage means 56 adapted to store warning information on the warning; display means adapted to display the warning information stored in the warning storage means 56; and warning erasing means adapted to erase the warning information, wherein the warning storage means 56 is configured to store warning information on a warning generated after the erasure by the warning erasing means 57.
US09437095B1	Safety system for vehicle ball hitch A safety system for a trailer hitch device having a hitch member and a hitch ball. The safety system includes a body configured to peripherally surround the hitch member and the hitch ball and a fastening device attached to the body and configured to secure the body to the hitch member.
US09437094B2	Non-radioactive ionizing smoke detectors and methods for use thereof A smoke detector according to various embodiments discussed herein can use a non-radioactive ionization technique to detect the presence of smoke and/or other particulate matter. A non-radioactive ionizing detector may use a LED such as an ultraviolet light emitting diod in combination with a pair of conductive plates, one of which is coated with a photocatalyst coating. When the light strikes the photocatalyst coating, ions can be generated that change a charge characteristic of the photocatalytic coated plate. The occurrence of an alarm can be detected based on a measured charge magnitude existing between the two plates.
US09437092B2	Smoke detection Various apparatus and methods for smoke detection are disclosed. In one embodiment, a method of training a classifier for a smoke detector comprises inputting sensor data from a plurality of tests into a processor. The sensor data is processed to generate derived signal data corresponding to the test data for respective tests. The derived signal data is assigned into categories comprising at least one fire group and at least one non-fire group. Linear discriminant analysis (LDA) training is performed by the processor. The derived signal data and the assigned categories for the derived signal data are inputs to the LDA training. The output of the LDA training is stored in a computer readable medium, such as in a smoke detector that uses LDA to determine, based on the training, whether present conditions indicate the existence of a fire.
US09437086B2	Systems and apparatus for the light-based communication of service orders and personal objects identification Light-based systems for communicating information associated with service orders and/or the identification of personal objects are disclosed. A personal mobile electronic communication device is used in conjunction with a communication network and a lighting controller to communicate service orders by lighting with one or more individually controllable luminaires in a lighting network. A personal mobile electronic communication device is, alternatively or additionally, used in conjunction with a communication network, and a lighting controller controlling an illumination proximate to the personal mobile electronic communication device such that the illumination proximate to the personal mobile electronic communication device visually indicates the service order.
US09437082B2	Gaming method and a gaming system The invention provides a method of gaming and a game controller and gaming system for implementing the method. The method includes selecting at least one symbol to form at least one player hand comprised of a plurality of symbols, selecting at least one symbol to form a jackpot hand comprised of a plurality of symbols, and making a jackpot award to the player if the player hand corresponds to the jackpot hand.
US09437080B2	Apparatus for generating alternative gaming device outputs An apparatus for outputting an alternative output through an electronic gaming device output device has been developed. The invention includes an electronic gaming device with game logic circuitry that commands a gaming device output device to generate an output. The electronic gaming device output is interrupted before it is output and the output device generates an alternative output.
US09437077B2	Gaming device method and apparatus employing modified payouts The invention includes a system and method for a gaming device to determine when to offer a player an opportunity to play using a “jackpot only” pay table. The player may choose to accept the gaming device's offer to switch from using a conventional pay table to using a pay table that only pays top payout amounts. Play with a jackpot only pay table may only require a small wager amount as compared to play with a conventional pay table. Play with a jackpot only pay table may be automated to generate outcomes quickly to allow a player to relatively inexpensively avoid spending time playing a gaming device perceived to be in a “cold period.”
US09437075B2	Method and apparatus for modifying gaming machines to provide supplemental or modified functionality A method, apparatus, and article of manufacture for transferring credits from one gaming device to another via the use of coded scrip is disclosed. The method comprises the steps of accepting a cash-out command in the gaming device, scanning a magnetically manifested code uniquely identifying a scrip stored in the gaming device, transmitting a cash-out message comprising the code to a remote processor having access to a database configured to store and retrieve codes from a plurality of gaming devices, receiving a scrip dispense message from the remote processor, and dispensing the scrip. The apparatus comprises a scrip storage unit, a scrip dispensing unit having a scrip transducer for reading and recording a magnetically manifested code on a scrip retrieved from the scrip storage unit, and a processor, communicatively coupled to the scrip transducer and a remote computer having access to a database for storing and retrieving code information from the plurality of gaming devices.
US09437074B2	Gaming device and method having purchasable enhanced paytables An apparatus and method for a game having a paytable selection feature which may be implemented with a primary or base game, a secondary or bonus game, or both. In one embodiment, the gaming device employs an initial paytable and enables a player pay a fee to purchase a different paytable for a plurality of plays of the game. If the player chooses to purchase a different paytable, the gaming device determines a game outcome for a plurality of plays of the game and provides any awards based on the different paytable. If the player does not choose to select a different paytable, the gaming device determines a game outcome for each of those plays and provides any awards based on the initial paytable. In one embodiment, the player has the opportunity to see the different paytable prior to paying the fee to purchase it.
US09437070B2	Solar lighting with pay-as-you go technology Disclosed are systems, devices and methods for providing solar lighting and power to a customer by using pay-as-you-go (PAYG) technology. The PAYG technology allows a customer to make incremental payments for a solar energy system that includes a lighting unit. The payments can be made through a smartphone. A cable is used to connect an audio jack of the smartphone and a PV power jack of the lighting unit. Analog AC signals including data about activation, payment, usage and status are transmitted over the cable between the service provider and lighting unit, through a smartphone. The power jack of the lighting unit is also used to connect to a solar panel of a charging unit and a battery of the lighting unit.
US09437069B1	Coin processing systems, methods and devices Systems, methods and devices for processing coins are presented herein. A coin processing system is disclosed which includes a housing with a coin input area for receiving a batch of coins, a controller with a communication interface operatively attached to the housing, and a coin processing unit for counting, discriminating, and/or valuing coins received from the coin input area. The coin processing system also includes a mobile coin receptacle removably disposed within the housing and configured to receive coins from the coin processing unit. The mobile coin receptacle is configured to wirelessly communicate information to the communication interface of the controller. The mobile coin receptacle can include one or more electrical contacts that mate with one or more electrical contacts on the housing to wirelessly communicate the information.
US09437068B2	Cash replenishment method for financial self-service equipment A cash replenishment method for financial self-service equipment. The method comprises: by using a general solution method for directly solving an integral solution of a linear equation with n unknowns, obtaining a general solution formula of the integral solution of the linear equation with n unknowns; then, in accordance with a principle that the cash replenishment amount of each denomination must be greater than zero and less than the number of remaining available banknotes of this denomination in self-service equipment, solving a limiting range of free factors in the general solution formula, so that all cash replenishment solutions are obtained; and lastly, in accordance with a cash replenishment principle of a self-service equipment system, obtaining an optimal cash replenishment solution. The cash replenishment method can find out all cash replenishment solutions without using an exhaustive attack method, and can achieve rapid and highly-efficient cash replenishment.
US09437067B2	Financial self-service equipment and banknote separation apparatus and separation method thereof Disclosed is a banknote separation apparatus, comprising a banknote support plate used for bearing banknotes to be separated, a reference plate used for laying and ordering banknotes, a banknote pressing plate used for supplying compression on banknotes to be separated, a banknote separating wheel formed with a high friction part and exposed at the outside of the banknote support plate and arranged facing the banknote pressing plate, a feeding wheel and a reverse wheel arranged facing the feeding wheel, wherein the banknote separating apparatus further comprises a pressure compensation apparatus used to provide a variable compression compensation force to the banknote separating wheel so as to make the total positive pressure to which the banknote separating wheel is subjected constant. That is to say, the provision of a pressure compensation apparatus makes the frictional force for separating banknotes of the banknote separation apparatus constant.
US09437065B2	Settlement system, settlement method, and cash settlement device A settlement system includes a register having a reception unit that receives a manual input of information corresponding to at least a part of deposited money from a customer and a transmission unit that transmits a sum amount of money corresponding to the purchased product and manually input information manually input through the reception unit to a cash settlement device and the cash settlement device that calculates an amount of inserted money by recognizing and counting the inserted money, calculates a total amount of the money deposited from the customer by using the amount of the inserted money and the manually input information received from the register, calculates an amount of change based on the total amount of money and the sum amount of money received from the register, and dispenses change money.
US09437064B1	Method for extending communication range of remote control system during walkaway locking control function A method for extending a communication range of a remote control system during a walkaway locking control function includes increasing a reception gain level of a portable controller of the remote control system to a high gain level. The high gain level provides an extended communication range in which the controller receives polling signals from a base station of the remote control system. The controller is unable to receive the polling signals while the controller is outside of the extended communication range. Upon the controller not receiving the polling signals, the controller transmits a command signal for receipt by the base station and decreases the reception gain level back to a normal gain level.
US09437058B2	Dynamically limiting vehicle operation for best effort economy Vehicle operation (e.g., speed, acceleration) may be limited based on various conditions such as a current charge condition of an electrical energy storage devices (e.g., batteries, super- or ultracapacitors), history of such, conditions related to the vehicle (e.g., mileage, weight, size, drag coefficient), a driver or operator of the vehicle (e.g., history with respect to speed, acceleration, mileage) and/or environmental conditions (e.g., ambient temperature, terrain). A controller may control operation of one or more power converters to limit current and/or voltage supplied to a traction electric motor, accordingly.
US09437053B2	Determining portions of a roadway model requiring updating A computer-implemented method for determining which portions of a roadway model used by self-driving road vehicles require updating uses discrepancy data derived from the sensors of a plurality of self-driving road vehicles. The discrepancy data may indicate discrepancies between the sensor data and the roadway model, or may indicate portions of the roadway where a self-driving road vehicle underperformed. The discrepancy data is aggregated, and the aggregated discrepancy data is used to identify, as the portions of the roadway model which require updating, those portions of the roadway model corresponding to portions of the roadway for which the aggregated discrepancy data exceeds a threshold.
US09437052B2	Vehicle after-sales service system A vehicle after-sales service system has a main controller and a cloud platform communicating with the main controller. The main controller is adapted to be equipped on a vehicle and to transmit vehicle information set by an original equipment manufacturer to the cloud platform. The vehicle information can include vehicle body information, chassis information, motive power information, entertainment information and error information. The cloud platform receives and stores the vehicle information from the main controller for providing after-sales service to provide innovative service and to meet the owner's need.
US09437044B2	Method and system for displaying and navigating building facades in a three-dimensional mapping system A method and system is provided for automatic generation and navigation of optimal views of facades of 3D building models in an interactive three-dimensional (3D) map system. The system and method allows for navigation and visualization of facades of building models in a 3D building model visualization system through optimal views of facades.
US09437043B2	Display and export of individual biplane images An ultrasound system which is capable of biplane imaging is able to display, store and export independent image frames of only the reference image (90) or only the variable orientation image, or the standard display of both images. The system is also able to sweep through a range of image plane orientations and to automatically acquire a sequence of images (92) comprising an image in each orientation over the range of plane orientations. The system is preferably operable in the biplane tilt mode, the biplane rotate mode, or the biplane elevation tilt mode.
US09437034B1	Multiview texturing for three-dimensional models Systems and methods for generating textures to be rendered in conjunction with a polygon mesh are provided. More particularly, a polygon mesh modeling a geographic area can be accessed. A plurality of source images depicting the geographic area can then be identified. The plurality of source images can be aligned to reduce projection misalignments between source images when the source images are projected to the polygon mesh. A texture can then be determined based at least in part on a weighted average of pixels in the plurality of source images corresponding to a point on the surface of the polygon mesh. Determining a texture can include removing at least one outlier pixel associated with a moving object from the weighted average.
US09437031B2	Virtual memory based noise textures A large non-patterned noise texture occupies a relatively small physical memory space. Each of a small set of physical pages in physical memory includes noise texels forming part of a noise texture. A large “virtual” noise texture is created by mapping each one of a large number of pages in virtual address space to one of the small set of physical pages; multiple virtual pages may be mapped to the same physical page. The physical page that each virtual page maps to is randomly or pseudo-randomly selected such that the resulting noise texture appears to be non-repeating. When a noise texel is requested by reference to a virtual address during rendering, the virtual address of the virtual page is translated to the corresponding physical address, and the noise texel is retrieved.
US09437030B2	Method and apparatus for displaying two-dimensional or three-dimensional image sequence while adjusting frame rate Provided are a method and apparatus for displaying a two-dimensional (2D)/three-dimensional (3D) image, and apparatus to execute the same, the method including determining whether an input image sequence having a first frame rate is a 2D image sequence or a 3D image sequence, wherein, if the input image sequence is a 2D image sequence, generating a 2D output image sequence having a second frame rate, the 2D output image sequence including the input image sequence and a 2D intermediate image generated from the input image sequence, and wherein, if the input image sequence is a 3D image sequence, generating a 3D output image sequence having a third frame rate, where a left-viewpoint intermediate image, a right-viewpoint intermediate image and the input image sequence are repeatedly included in the 3D output image sequence, the left-viewpoint intermediate image is determined from at least one left-viewpoint image in a left-viewpoint image sequence included in the input image sequence, and the right-viewpoint intermediate image is determined from at least one right-viewpoint image in a right-viewpoint image sequence included in the input image sequence.
US09437029B2	Mosaic oblique images and methods of making and using same A computer system running image processing software receives an identification of a desired geographical area to be imaged and collected into an oblique-mosaic image; creates a mathematical model of a virtual camera looking down at an oblique angle, the mathematical model having an oblique-mosaic pixel map of the desired area encompassing multiple source images; assigns surface locations to pixels included in the oblique-mosaic pixel map; creates a ground elevation model of the ground and vertical structures within the oblique-mosaic pixel map using overlapping source images of the desired geographical area, wherein the source oblique images were captured at an oblique angle and compass direction similar to that of the virtual camera; and reprojects, with the mathematical model, source oblique image pixels of the overlapping source images for pixels included in the oblique-mosaic pixel map using the ground elevation model to thereby create an oblique-mosaic image of the desired area.
US09437028B2	Method, apparatus, and terminal device for generating and processing gesture and position information Embodiments of the present invention relate to a method, an apparatus, and a terminal device for generating and processing information. The information generation method includes: generating gesture information according to an identified gesture path; detecting location information; and generating summary information according to the gesture information and the location information. The information processing method includes: receiving summary information, and extracting location information and gesture information in the summary information; and when detected current location information matches the location information obtaining a gesture path according to the gesture information in the summary information, and displaying on a viewing interface of the camera. By adopting the technical solutions provided by the present invention, a user can send gesture information when being at a certain location to a contact person, and the gesture information is displayed on a viewing interface of a camera of the contact person that arrives at the geographical location.
US09437026B2	Image creating device, image creating method and recording medium An image creating device includes: an acquiring unit, a component creation unit, an extraction unit, a specifying unit, and an image creation unit. The acquiring unit acquires an image. The component creation unit creates a face component image related to main components of a face included in the image acquired by the acquiring unit. The extraction unit extracts feature information from the face included in the image acquired by the acquiring unit. The specifying unit specifies a hair style image, which corresponds to the feature information extracted by the extraction unit, from hair style images which show outlines of hair and are associated with feature information of faces, the feature information being recorded in a recording section. The image creation unit creates a portrait image by using the hair style image specified by the specifying unit and the face component image created by the component creation unit.
US09437024B2	Transformation function insertion for dynamically displayed tracer data A visualization system for a tracer may include a processing pipeline that may generate tracing data, preprocess the data, and visualize the data. The preprocessing step may include a mechanism to process user-defined expressions or other executable code. The executable code may perform various functions including mathematical, statistical, aggregation with other data, and others. The preprocessor may perform malware analysis, test the functionality, then implement the executable code. A user may be presented with an editor or other text based user interface component to enter and edit the executable code. The executable code may be saved and later recalled as a selectable transformation for use with other data streams.
US09437022B2	Time-based visualization of the number of events having various values for a field Systems and methods are provided for visualizing the number of events having different values for a field of interest over a selected time range. The events may be derived from machine data obtained from one or more data sources. User input received via a graphical user interface may specify the field of interest, a time range, and a time granularity for displaying counts of the number of events having various values during different time slots within the selected time range. Events including the specified field during the user-selected time range are identified and values for the field are extracted from the identified events. A visualization indicating a relation between a number of the events occurring within each of a plurality of time slots over the selected time range and each of the unique extracted values of the field is provided to the user via the graphical user interface.
US09437019B2	Processing combining-character sequences Particular embodiments of a computing device receive an indication of a character encoding system and a combining-character sequence. The character encoding system may comprise one or more ranges of character elements. The combining-character sequence may comprise two or more character elements. The two or more character elements may comprise at least one base letter and one or more combining marks. A mapping code may be determined for the combining-character sequence. If no mapping code exists, a next-available mapping code may be determined, and the combining-character sequence may be stored in association with the next-available mapping code in a data store on the computing device. A corresponding glyph may be determined based on the mapping code—if no glyph exists, the glyph may be generated or retrieved from a server and stored in association with the mapping code in the data store. Information may be provided to display the glyph.
US09437014B2	Method for labeling segments of paths as interior or exterior A method for labeling a segment of a two-dimensional input path defined according to a nonzero winding rule as either interior or exterior is described. A winding number is initialized. A scan line that intersects the segment is identified. For each contour of the input path, winding values are accumulated into the winding number for any segments of the contour that cross the identified scan line, where the accumulation for coincident segments that cross the identified scan line at a same location as the segment is postponed. These coincident segments are marked and saved in a list. The labeling of the segment as either interior or exterior is determined from the list and the winding number.
US09437011B2	Method and apparatus for estimating a pose of a head for a person A method of estimating a pose of a head for a person, includes estimating the pose of the head for the person based on a content, and generating a three-dimensional (3D) model of a face for the person. The method further includes generating pictorial structures of the face based on the estimated pose and the 3D model, and determining a refined pose of the head by locating parts of the face in the pictorial structures.
US09437010B2	Method and device for generating a motion field for a video sequence A method for generating a motion field between a current frame and a reference frame belonging to a video sequence from an input set of elementary motion fields is disclosed. The method comprises performed for each pixel belonging to said current frame: determining a plurality of candidate motion vectors between the current frame and the reference frame wherein each candidate motion vector is the result of the sum of a first motion vector between the current frame and an intermediary frame belonging to the video sequence and of a second motion vector between the intermediary frame and the reference frame; and selecting a motion vector among candidate motion vectors. The method is remarkable in that elementary motion fields are obtained with different time intervals between pairs of frames and in that the first motion vector belongs to the input set of elementary motion fields and the second motion vector belongs to a set of previously selected motion vectors for other current frames of the video sequence.
US09437007B2	Image processing device A binarizing section generates binary image data representing a binary image from raster image data representing a raster image. A white-pixel ratio determining section determines, based on the binary image data, a white pixel ratio for each line of the binary image and a position of each of lines having a white pixel ratio equal to or greater than a predetermined first threshold among the lines of the binary image, and also determines a white pixel ratio for an entirety of the binary image. An image-type determining section determines that the raster image is a photographic image when the white pixel ratio of the entirety of the binary image is equal to or less than a predetermined second threshold, and that the raster image includes a text image when the lines having a white pixel ratio equal to or greater than the first threshold appear cyclically in the binary image.
US09437005B2	Information processing apparatus and information processing method An information processing apparatus configured to estimate a position and orientation of a measuring object using an imaging apparatus includes an approximate position and orientation input unit configured to input a relative approximate position and orientation between the imaging apparatus and the measuring object, a first position and orientation updating unit configured to update the approximate position and orientation by matching a three-dimensional shape model to a captured image, a position and orientation difference information input unit configured to calculate and acquire a position and orientation difference amount of the imaging apparatus relative to the measuring object having moved after the imaging apparatus has captured an image of the measuring object or after last position and orientation difference information has been acquired, and a second position and orientation updating unit configured to update the approximate position and orientation based on the position and orientation difference amount.
US09437002B2	Systems and methods for a dual modality sensor system The present disclosure provides systems and methods for using two imaging modalities for imaging an object at two different resolutions. For example, the system may utilize a first modality (e.g., ultrasound or electromagnetic radiation) to generate image data at a first resolution. The system may then utilize the other modality to generate image data of portions of interest at a second resolution that is higher than the first resolution. In another embodiment, one imaging modality may be used to resolve an ambiguity, such as ghost images, in image data generated using another imaging modality.
US09437001B2	Tracking objects in bowl-shaped imaging systems Technologies for determining a distance of an object from a vehicle include a computing device to identify an object captured in a fisheye image generated by a fisheye camera of the vehicle. The computing device projects a contour of the identified object on a selected virtual plane that is located outside the vehicle and selected from a predefined set of virtual planes based on a location of the identified object relative to the vehicle. The computing device identifies a bottom of the projected contour on the selected virtual plane and determines an intersection point of an imaginary line with a ground plane coincident with a plane on which the vehicle is positioned. The imaginary line passes through each of the identified bottom of the projected contour and the fisheye camera. The computing device determines a location of the identified object relative to the vehicle based on the determined intersection point and the identified bottom of the projected contour.
US09436999B2	Automatic image orientation and straightening through image analysis Systems, methods, and computer readable media for adjusting the orientation of an image frame and a scene depicted in the image frame are described. In general, techniques are disclosed for analyzing an image with one or more feature detectors to identify features in the image. An alignment or position associated with one or more features identified in the image may be used to determine a proper orientation for the image frame. The image can then be rotated to the proper orientation. It may also be determined if a scene depicted in the image is properly aligned in the rotated image orientation. If not, alignment information associated with the identified features may be utilized to straighten the depicted scene.
US09436997B2	Estimating rainfall precipitation amounts by applying computer vision in cameras A method and system are provided. The method includes storing a set of references images without rain and spanning a plurality of different light conditions. The method further includes capturing, using a camera, an image of a scene with rain. The method also includes selecting a reference image from the set of reference images based on the light condition of the captured image. The method additionally includes performing an arithmetic subtraction image processing operation between the captured image and the reference image to generate a subtraction image. The method further includes estimating an amount of rain in the subtraction image based on previously calibrated values.
US09436996B2	Recording medium storing image processing program and image processing apparatus A recording medium storing an image processing program according to one aspect of the present invention is a non-transitory computer-readable medium storing an image processing program to make a computer execute image processing on an image group on one timeline, the image processing program making the computer execute deriving a difference value that is based on a difference between pixel values of images that are adjacent in time series in the image group, and displaying a time-series difference image showing a time-series change in the difference value.
US09436994B2	Image processing apparatus for processing a tomogram of an eye to be examined, image processing method, and computer-readable storage medium An image processing apparatus comprising, boundary extraction means for detecting boundaries of retina layers from a tomogram of an eye to be examined, exudate extraction means for extracting an exudate region from a fundus image of the eye to be examined, registration means for performing registration between the tomogram and the fundus image, and calculating a spatial correspondence between the tomogram and the fundus image, specifying means for specifying a region where an exudate exists in the tomogram using the boundaries of the retina layers, the exudate region, and the spatial correspondence, likelihood calculation means for calculating likelihoods of existence of the exudate in association with the specified region, and tomogram exudate extraction means for extracting an exudate region in the tomogram from the specified region using the likelihoods.
US09436991B2	Method, device and system for obtaining a medical image data set In a method, device and system for obtaining a medical image data set, a raw data stream is produced by a data acquisition device, the raw data stream including at least digital data of a medical raw data image set. The raw data stream is provided to a data compression device, wherein it is compressed. The compressed raw data stream is transferred to a data decompression device, wherein it is decompressed. The decompressed raw data stream is transferred to an image calculation tool, which produces a medical image data set operating on the decompressed raw data stream.
US09436985B1	Method and system for enhancing image quality This invention relates to methods and systems for enhance the signal-to-noise ratio of an image scanned by a charged particle beam. In an embodiment, a sequence of grayscales of a pixel is recorded first, extreme values of the sequence of grayscales are then identified and removed, and the remained grayscales are used to determine a nominated grayscale of the pixel.
US09436984B2	Compensating for motion induced artifacts in a physiological signal extracted from a single video What is disclosed is a system and method for compensating for motion induce artifacts in a physiological signal obtained from a video. In one embodiment, a video of a first and second region of interest of a subject being monitored for a desired physiological function is captured by a video device. The first region is an area of exposed skin wherein a desired signal corresponding to the physiological function can be registered. The second region is an area where movement is likely to induce motion artifacts into that signal. The video is processed to isolate pixels in the image frames associated with these regions. Pixels of the first region are processed to obtain a time-series signal. A physiological signal is extracted from the time-series signal. Pixels of the second region are analyzed to identify motion. The physiological signal is processed to compensate for the identified motion.
US09436980B2	Reducing ghosting and other image artifacts in a wedge-based imaging system A computational image processing filter processes an image from a wedge-based imaging system so as to remove artifacts such as blurring and ghost images. By removing the artifacts computationally instead of optically, manufacturing costs and complexity are reduced over prior solutions. In one implementation, the computational image processing filter performs a two-dimensional transform to align a ghost image with a pixel grid defined by the wedge. The transformed image is then stretched using a nonlinear transform to make the ghost pitch versus position a constant. Next, an anti-ghost point spread filter is created and deconvolved. Finally, an inverse of the nonlinear mapping is applied. Artifacts introduced by other optical layers can be reduced by deconvolving the artifact from the image according to a point-spread function representing an effect of the optical layers on the image.
US09436972B2	System coherency in a distributed graphics processor hierarchy Methods and systems may provide for executing, by a physically distributed set of compute slices, a plurality of work items. Additionally, the coherency of one or more memory lines associated with the plurality of work items may be maintained, by a cache fabric, across a graphics processor, a system memory and one or more host processors. In one example, a plurality of crossbar nodes track the one or more memory lines, wherein the coherency of the one or more memory lines is maintained across a plurality of level one (L1) caches and a physically distributed cache structure. Each L1 cache may be dedicated to an execution block of a compute slice and each crossbar node may be dedicated to a compute slice.
US09436971B2	System, method, and computer program product for accessing multi-sample surfaces A system, method, and computer program product are provided for accessing multi-sample surfaces. A multi-sample store instruction that specifies data for a single sample of a multi-sample pixel and a sample mask is received and the data for the single sample is stored to each sample of the multi-sample pixel that is enabled according to the sample mask. A multi-sample load instruction that specifies a multi-sample pixel is received, and, in response to executing the multi-sample load instruction, data for one sample of the multi-sample pixel is received. A determination is made that the data for the one sample of the multi-sample pixel represents multi-sample pixel data for at least one additional sample of the multi-sample pixel.
US09436968B1	System and method for application license management in virtual environments A system and method for managing licensing of virtual environment applications. A licensing module of a first installed virtual environment application detects installation of affiliated applications and gives them a group licensing key for passing it to the licensing server. The licensing server derives licensing parameters of the affiliated applications from the group key and gives the licenses to the affiliated applications, in case of successful validation. The licensing system provides protection from un-authorized copying of the applications. If an affiliated virtual environment application is copied (or moved) to another hardware node without its virtual environment, the licensing server will not give the license activation key to this virtual environment application.
US09436965B2	Interactive map for grouped activities within a financial and social management system Embodiments of the invention comprise systems, computer program products, and methods for a financial and social management system that provides improved tracking and management related to how, where, when, and with whom a user enters into activities. The financial and social management system captures activity information and images from various sources of information, including but not limited to social networking accounts, e-receipts, location determination devices, and the like, and associates the activity information and images with the activities. The financial and social management system may display the activities, activity information, and images in an interactive map using markers. The markers in the interactive may be displayed as a function of the time of the activity, include images, or transaction data related to the activity. Positioning information related to the location of the user at the time of the activities may also be overlaid on the interactive map.
US09436964B2	Systems and methods for mandated services verification A method and system for verifying cardholder compliance or non-compliance with a mandated services requirement by a third party using a payment card payment card network coupled to a database are provided. The method includes receiving sets of predetermined parameters that each define a transaction for one or more mandated services, receiving, by the computer device, transaction data for a plurality of transactions, determining, by the computer device, transactions for one or more mandated services from the plurality of received transactions using the received sets of parameters, summarizing the transaction data from the determined transactions, and transmitting the summarized transaction data to the third party, the summarized transaction data demonstrating cardholder compliance or noncompliance with the mandated services requirement.
US09436957B2	System, method, and computer-readable storage device for providing a buy option in a social networking posting when user input is classified as having a sale intent Disclosed herein are methods for providing a buy option to social networking communications. The method includes communicating with a social networking site that posts images from posting entities to receiving entities. The image can have data that points to a product database. The data is processed to determine whether there is a sale-related intent such as a product in a product database. The data is used to access a database of products for sale from the merchant. When the sale-related intent applies, the system transmits the image through the social networking site with a buy button associated with the transmission such that a recipient can easily purchase a product.
US09436956B2	Mobile commerce framework A subscription-based system for providing commerce information for one or more mobile devices for one or more merchants. Some techniques employed feature a subscription-based method for presenting commercial resources to a mobile device. The method involves receiving mobile device user information relating to a geographic location to locate one or more merchants within a subscription-based shopping network, and receiving mobile device user information relating to a merchant type within the subscription-based shopping network. The method also involves receiving, from a database over a communication network, information for one or more merchants associated with the mobile device user information for the geographic location and the merchant type, and presenting the associated merchant information on the mobile device. The associated merchant information can include a merchant name and address, a merchant telephone number, a merchant advertisement, a merchant coupon, or a merchant product or service offering to subscribers of the shopping network.
US09436951B1	Facilitating presentation by mobile device of additional content for a word or phrase upon utterance thereof A method for presenting additional content for a word that is part of a message, and that is presented by a mobile communication device, includes the steps of: presenting the message, including emphasizing one or more words for which respective additional content is available for presenting by the mobile communication device; receiving an utterance that includes an emphasized word for which additional content is available for presenting by the mobile communication device; and presenting the additional content for the emphasized word included in the utterance received by the mobile communication device. These steps are performed by the mobile communication device.
US09436950B2	Integrating sponsored media with user-generated content A variety of computer based service that permit users to edit, compose, upload, or otherwise generate content also provide for the integration of sponsored media into presentations along with user-generated content. An exemplary service generates text based on user input, provides tags based on the text to a sponsored media repository, receives a sponsored media data structure in return, and formats sponsored media from the data structure for display to the user.
US09436946B2	Selecting content based on entities present in search results Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium for providing content to a user. A method includes: receiving a query; receiving query results based on the query; determining for each of a predetermined number of top results entities associated therewith; using the determined entities to either augment or filter the query producing an enhanced query; and using the enhanced query to identify one or more sponsored content items for presentation to a user along with the query results.
US09436936B2	Systems and methods for analysis and linkage between different transaction data providers using de-identified data Systems, methods, means, computer program code and computerized processes include receiving a first set of de-identified transaction data from a first transaction data source, receiving a second set of de-identified transaction data from a second transaction data source, filtering the first and second sets of de-identified transaction data to identify transactions associated with at least a first entity and to create first and second filtered data sets, removing data associated with an identifier field for each of the transactions in the first filtered data set to created a de-identified first data set, removing data associated with an identifier field for each of the transactions in the second filtered data set to create a de-identified second data set, and processing the first and second de-identified data sets using a probabilistic engine to establish a linkage between data in each data set.
US09436935B2	Computer system for making a payment using a tip button A system and method for transaction bitcoin is described. Bitcoin can be sent to an email address. No miner's fee is paid by a host computer system. Hot wallet functionality is provided that transfers values of some Bitcoin addresses to a vault for purposes of security. A private key of a Bitcoin address of the vault is split and distributed to keep the vault secure. Instant exchange allows for merchants and customers to lock in a local currency price. A vault has multiple email addresses to authorize a transfer of bitcoin out of the vault. User can opt to have private keys stored in locations that are under their control. A tip button rewards content creators for their efforts. A bitcoin exchange allows for users to set prices that they are willing to sell or buy bitcoin and execute such trades.
US09436933B2	Wireless time attendance system and method A system and method for tracking and communicating time and attendance data for workers at a remote worksite is disclosed. A portable time and attendance device is configured to receive and store worker time attendance data and transmit the data to a remote computer via a wireless network, such as a wireless cellular communications network. In order to conserve battery power, a main unit of the device periodically queries an electronic time and attendance clock of the device according to a pre-established schedule to determine if new worker time and attendance data has been received. If so, according to the pre-established schedule, the new worker time and attendance data is transmitted to the remote computer via the wireless network. Otherwise, certain functions and components of the device remain in a low battery usage sleep mode.
US09436932B2	Method and system for highlighting email recipients A method and system for highlighting email recipients according to a user's social network are provided. The method includes receiving an email message at a user's email client, the email message having multiple recipients, one of the recipients being the user. The method further includes obtaining a social network list for the user and comparing the social network list for the user with the email message recipients and highlighting recipients in the email message who are also in the social network list. The social network list for a user may be obtained by different methods including using the user's contact resources, or using an aggregating social network system including weighting relationships between contacts.
US09436924B2	Automated analyte sensor ordering methods and apparatus Methods, systems, and apparatus adapted to automate ordering of test strips for use in an analyte meter device are disclosed. The method, system and apparatus includes inputting information from an indicia on a package of test strips indicative of a quantity of test strips in the package; tracking a number of test strips used in the analyte meter device; and generating an automatic order for additional test strips based on a signal indicating that a reorder threshold has been reached. Numerous additional features and aspects are disclosed.
US09436923B1	Tracking unitization occurring in a supply chain Some embodiments include a system for tracking end-to-end provenance of labeled goods despite re-unitization, repackaging, or transformation of the goods. The system can mint cryptographic codes including a first cryptographic code and a second cryptographic code. Each cryptographic code can include a private key to serve as a label and a public key that serves to identify a cryptographic address in a distributed consensus network. The system can track a source item by publishing a first cryptographically verifiable record that associates an original SKU and an original quantity with a first cryptographic address associated with the first cryptographic code. The system can re-unitize the source item by publishing, to the distributed consensus network, a second cryptographically verifiable record that indicates the first cryptographically verifiable record as a source and associates a new SKU and a new quantity with a second cryptographic address associated with the second cryptographic code.
US09436922B2	System and method for integrated workflow scaling A system is provided. The system comprises a first computer located in a first plant, a first memory, and a first object based process management application stored in the first memory. The system further comprises a second computer located in a location separate from the first plant, a second memory, and a second object based process management application stored in the second memory. When executed on the first computer, the first application invokes scripts in response to events and the scripts launch tasks. When executed on the second computer, the second computer invokes scripts in response to events and the scripts launch tasks, one of the events acted on by the second application is a message received from the first application.
US09436921B2	Intelligent service management and process control using policy-based automation and predefined task templates Mechanisms are provided for dynamically determining one or more automation levels for tasks of a workflow. The mechanisms receive a workflow from a source component and receiving context and state information for an environment in which the workflow is to be performed. One or more tasks and associated task attributes are identified in the workflow and applying one or more automation rules to the context and state information and the task attributes to generate one or more automation level settings from the one or more tasks. The one or more tasks are performed in the environment in accordance with the one or more automation level settings. The automation level settings specify a degree of automation to be used when performing the one or more tasks.
US09436918B2	Smart selection of text spans A text span forming either a single word or a series of two or more words that a user intended to select is predicted. A document and a location pointer that indicates a particular location in the document are received and input to different candidate text span generation methods. A ranked list of one or more scored candidate text spans is received from each of the different candidate text span generation methods. A machine-learned ensemble model is used to re-score each of the scored candidate text spans that is received from each of the different candidate text span generation methods. The ensemble model is trained using a machine learning method and features from a dataset of true intended user text span selections. A ranked list of re-scored candidate text spans is received from the ensemble model.
US09436908B2	Apparatus and methods for rate-modulated plasticity in a neuron network Apparatus and methods for activity based plasticity in a spiking neuron network adapted to process sensory input. In one approach, the plasticity mechanism of a connection may comprise a causal potentiation portion and an anti-causal portion. The anti-causal portion, corresponding to the input into a neuron occurring after the neuron response, may be configured based on the prior activity of the neuron. When the neuron is in low activity state, the connection, when active, may be potentiated by a base amount. When the neuron activity increases due to another input, the efficacy of the connection, if active, may be reduced proportionally to the neuron activity. Such functionality may enable the network to maintain strong, albeit inactive, connections available for use for extended intervals.
US09436906B2	Discovering user-behavior from trajectory-as-polygon (TaP) Disclosed is a system for analyzing user-behavior using a TaP algorithm. For example, raw data are collected and segmented to become segmented data. In this example, the TaP algorithm in combination with a sliding time window is implemented to derive a convex hull polygon. A determination of geometric properties of the derived convex hull polygon facilitates the analysis of the user-behavior.
US09436903B2	Wearable device with magnets with a defined distance between adjacent magnets A wearable device is provided with a wearable device structure with first end and second ends. A plurality of magnets is positioned at the first and second ends that provide for coupling of the first end to the second end of the wearable device structure. At least a portion of adjacent magnets are separated a defined distance from each other. ID circuitry is at a surface or an interior of the wearable device structure.
US09436901B2	Method of incorporating an element in a data carrier A method of placing an element onto a data carrier, where there is a placement actuator arranged to be able to secure the element. A transport layer is advanced until the element is located between the placement actuator and the data carrier in a desired position. The actuator is moved towards the data carrier so that it secures the element. The transport layer is then retracted to detach the element from it and then the placement element is moved towards the data carrier to bring the element into contact with the data carrier at the desired position.
US09436898B2	Printer and printer control method A printer includes a printing unit, a plurality of paper feeding units, a storage unit and a control unit. The printing unit is configured and arranged to execute printing based on a printing job. The paper feeding units are configured and arranged to supply paper to the printing unit. The storage unit is configured and arranged to correlate and store the paper feeding units and attributes of the paper held in the paper supply units. The control unit is configured to compare the attributes of the paper correlated with the paper feeding units with attributes of the paper specified with a printing job, and when there is no paper feeding unit for which the attributes correlated therewith is consistent with the attributes specified with the printing job, to display on a screen one of the paper feeding units in which to place the paper specified with the printing job.
US09436894B2	Image alignment apparatus and image alignment method of using the same Provided are an image alignment apparatus and an image alignment method using the same. The image alignment apparatus includes a first conversion function estimation unit for estimating a first conversion function based on feature point information that is extracted from a first image, which is captured by using a first image sensor, and a second image, which is captured by using a second image; and a second conversion function estimation unit for estimating a second conversion function based on motion information that is extracted from the first image and the second image.
US09436893B2	Distributed similarity learning for high-dimensional image features A system and method for distributed similarity learning for high-dimensional image features are described. A set of data features is accessed. Subspaces from a space formed by the set of data features are determined using a set of projection matrices. Each subspace has a dimension lower than a dimension of the set of data features. Similarity functions are computed for the subspaces. Each similarity function is based on the dimension of the corresponding subspace. A linear combination of the similarity functions is performed to determine a similarity function for the set of data features.
US09436889B2	Image processing device, method, and program A region setting unit and a specific region extracting unit are included. The region setting unit sets, within an input image that is photographed at a reference time point out a first region estimated as highly probable to be a specific region and a second region estimated as highly probable to be a background region, which is a region other than the specific region. The specific region extracting unit extracts the specific region within the input image based on a first histogram which is a histogram of density values in the first region and a second histogram which is a histogram of density values in the second region. The specific region extracting unit extracts a specific region from the input image that is photographed at a time point different from the reference time point, based on the first histogram and the second histogram.
US09436881B2	Apparatus for predicting turns of a vehicle An apparatus predicts a turn of a vehicle based on a picked-up image of a forward view of the vehicle. The forward view is imaged by an on-vehicle sensor to repeatedly acquire images. The acquired images include position coordinate information of a light source and information indicating whether the light source is a light source of a preceding vehicle or a light source of an oncoming vehicle. Based on such information, it is determined whether or not the light source is a light source of an oncoming vehicle newly appeared in the images and the light source is in a predetermined area near the left end or in a predetermined area near the right end in the images. When the determination result is affirmative, it is determined that there is a curve in the traveling direction of the vehicle.
US09436879B2	Method for recognizing traffic signs For recognizing traffic signs that include a main sign and an associated additional sign, a method involves using a camera to record image data of an environment outside a vehicle, evaluating the image data to detect the presence and the class of the main sign and to detect the presence and partially classify the content of the additional sign by pattern recognition, performing text recognition to read and interpret text of the additional sign, and comparing the recognized text with actual current situational information to determine whether the main sign is currently applicable.
US09436873B2	Method and system for monitoring the skin color of a user This invention relates to a method and a system for monitoring skin color of a user. The system comprises a capturing unit, an obtaining unit, a deriving unit and a determining unit. The capturing unit captures at least one image of the user over a predetermined time period, and the obtaining unit obtains motion-related information of the user over the predetermined time period. The deriving unit derives visual information from the at least one image on the basis of the motion-related information, and the determining unit determines the skin color on the basis of the derived visual information. In this way, the skin color of the user can be effectively monitored without exposing the user to strong environmental light.
US09436872B2	System and method for detecting and tracking multiple parts of an object A system and method of detecting a posture of at least one predetermined part of an object comprising the steps of extracting a first object shape from a first image taken by a first image sensor, computing a characteristic dimension value of the predetermined part within a predetermined region of the first object shape, constructing a mask based on the characteristic dimension value, extracting a profile of the predetermined part from the first object shape by applying the mask on the first object shape, and identifying at least one predefined feature point in the profile of the predetermined part, thereby detecting the posture of the predetermined part is disclosed.
US09436865B2	Fingerprinting apparatus, system, and method An apparatus, system and method for biometric acquisition are disclosed. In one embodiment, a sensor is configured to detect a biometric signature of a subject. The sensor is configured to be mounted to a surface. Various sensors are disclosed as being operative with the biometric acquisition apparatus. A vehicle with a mounted biometric acquisition apparatus is disclosed. A method for identification of suspects is also disclosed.
US09436862B2	Electronic apparatus with segmented guiding function and small-width biometrics sensor, and guiding method thereof An electronic apparatus comprises a body, a human-machine interface device, a small-width biometrics sensor and a processing module. The human-machine interface device is disposed on the body. The small-width biometrics sensor is disposed on the body. The processing module, disposed on the body and electrically connected to the small-width biometrics sensor and the human-machine interface device, cooperates with the human-machine interface device and the small-width biometrics sensor to guide different physical portions of a finger of a user to directly contact or approach the small-width biometrics sensor according to indications of the human-machine interface device, so that the small-width biometrics sensor senses the finger to capture partial physical patterns of the finger. A guiding method of the electronic apparatus is also disclosed.
US09436861B2	Board connection structure and electronic device A board connection structure including a wiring board having a contact point section provided at one end portion and opposed to a switch button, and a holding member to which the wiring board is attached with flat surfaces of the contact point section and the connection section on the same surface intersecting with each other by the folding of the wiring board.
US09436860B2	Optical indicia reading apparatus with multiple image sensors Optical indicia reading apparatus can comprise a microprocessor, a memory, and a plurality of wafer level camera (WLC) modules. Each WLC module can comprise an image sensor and a focusing lens, and optionally, an optical band-pass filter (BPF) configured to pass light waves within a pre-defined wavelength range. Each WLC module can be configured to output a signal representative of the light incident on the image sensor. The optical axis of a first WLC module can be spatially disposed relatively to an optical axis of a second WLC module so that the fields of view (FOVs) of the WLC modules at least partially overlap. The depth of field (DOF) of a first WLC module can at least partially overlap with the DOF of a second WLC module. The optical indicia reading apparatus can be configured to generate an image frame by processing two or more signals of the plurality of signals outputted by the WLC modules. The optical indicia reading apparatus can be further configured to output an image frame comprising an image of decodable indicia and/or decoded message corresponding to the decodable indicia.
US09436858B2	Simple and precise radio frequency locating system and method Disclosed are a radio frequency locating system and method, which efficiently solve the problem of precise locating a moving target tag in a complex environment by using a method where location information is provided for a mobile tag by using low-cost fixed active RFID tags in place of a plurality of readers requiring network connection, and the location information of the mobile tag is directly transferred to a reader at the center of a locating area from a long distance by using a mobile or fixed location tag. The present invention uses a long-distance coordinator and clock information in a transmission instruction to coordinate and schedule communication time between the mobile tag and the location tag, thereby ensuring a super long battery life of the mobile tag and the location tag.
US09436857B2	Encoded information reading system including RFID reading device having multiple antennas An encoded information reading (EIR) system can comprise a microprocessor, a memory, and at least one RFID reading device, all communicatively coupled to a system bus. The EIR system can further comprise two or more external antennas electrically coupled to a multiplexing circuit. The multiplexing circuit can be configured to electrically couple each antenna to the RFID reading device by using a time division method or a frequency division method. The external antennas can be disposed according to a spatial pattern configured to provide a spatially continuous RFID signal reception within a pre-defined area or volume. The antennas can be configured to receive RFID signals from a plurality of RFID tags attached to a plurality of items and disposed within a radio frequency range of the antennas. The EIR system can be configured to store in its memory a plurality of responses received from the plurality of RFID tags.
US09436854B2	Connector module A connector module includes a housing and a conductive lead frame. The housing includes a cover and a base that define a cavity therebetween. The cavity receives a circuit card therein. The base has a top side and a bottom side. The top side faces the cover and defines part of the cavity. Multiple windows extend through the base between the top and bottom sides. The base includes a conductive layer at least partially covered by a non-conductive layer. The conductive lead frame is coupled to the bottom side of the base. The lead frame includes multiple contact beams that extend into the cavity through the windows of the base. The lead frame is electrically isolated from the conductive layer of the base by the non-conductive layer of the base. The lead frame further includes mounting contacts configured to be mounted to conductive components of a circuit board.
US09436853B1	Methods and apparatus for combining temperature data from separate segments of handling A system and method for improving supply chain visibility is provided. According to a preferred embodiment, an electronic manifest may be downloaded and linked or attached to an existing purchase order. This electronic manifest is preferably designed to accepted data from RFID devices and other sensors. Further, the electronic manifest is preferably configured to be easily accessed the carriers or others in the chain of custody. According to a further aspect of the present invention, sensor-enabled RFID tags may be employed to track a product through the supply chain, capture temperature data, and to calculate shelf life.
US09436852B2	Two-dimensional code authenticating device, two-dimensional code generating device, two-dimensional code authenticating method, and program A two-dimensional code authenticating device reads a self-authentication two-dimensional code to obtain an RS bit string, and detects a bit string c′ as an error using the RS bit string. Next, an exclusive OR between a bit string l included in the RS bit string and the bit string c′ detected as an error is calculated to obtain a bit string c′, and a bit string md is obtained by decrypting the bit string c′ through a scheme corresponding to the encryption. Subsequently, it is determined whether or not the decrypted bit string md matches the bit string m included in the RS bit string, thereby authenticating the self-authentication two-dimensional code.
US09436850B2	Mobile terminal and method of controlling a mode screen display therein A mobile terminal including a communication unit configured to communicate with at least one external terminal; a memory configured to store at least a first and second operating system including at least first and second modes, respectively; and a controller configured to execute the first operating system and to activate the first mode corresponding to the first operating system, to display a first information screen corresponding to the activated first mode on a display of the mobile terminal, to receive an event signal indicating an event related to the second mode has occurred on the mobile terminal, and to selectively display event information related to the event of the second mode on a display of the at least one external terminal.
US09436847B2	Cryptographic pointer address encoding A computing device includes technologies for securing indirect addresses (e.g., pointers) that are used by a processor to perform memory access (e.g., read/write/execute) operations. The computing device encodes the indirect address using metadata and a cryptographic algorithm. The metadata may be stored in an unused portion of the indirect address.
US09436843B2	Automatic folder access management Methods and systems are provided for decentralizing user data access rights control activities in networked organizations having diverse access control models and file server protocols. A folder management application enables end users of the file system to make requests for access to storage elements, either individually, or by becoming members of a user group having group access privileges. Responsibility for dealing with such requests is distributed to respective group owners and data owners, who may delegate responsibility to authorizers. The application may also consider automatically generated proposals for changes to access privileges. An automatic system continually monitors and analyzes access behavior by users who have been pre-classified into groups having common data access privileges. As the organizational structure changes, these groups are adaptively changed both in composition and in data access rights.
US09436842B2	Distributed fragments file system The present invention relates to a distributed storage scheme, wherein every file is optionally encrypted, optionally interleaved, fragmented, and the various fragments stored on different constituent storage systems commensurate with the storage mechanisms supported by those storage providers.
US09436835B1	Homomorphic encryption in computing systems and environments A transformation function that satisfies at least linearity and convolution can be used to encrypt data. The transformation function can, for example, be a DFT with one or more evaluation points that can be kept secret for encryption. The transformation function can effectively serve as a transform map and can be used to achieve fully homographic encryption in a system where encrypted data can be manipulated by applying one or more operations and the resulting encrypted data can be decrypted by applying the inverse of the transformation function and/or transformation map. A transformation function that satisfies at least linearity and convolution can be used for various applications, including, for example, private/public key decryption schemes, a signature schemes, database query and search schemes, as well as various applications of homomorphic operations.
US09436830B2	Securing access of removable media devices A securing apparatus includes a security adapter configured to be engaged with an electronic device. The security adapter includes an interface to couple to a host device. The securing apparatus further includes a securing structure that is lockable. When the security adapter is engaged with the electronic device, the securing structure is configurable to transition from an unlocked configuration to a locked configuration to constrain communication of one or more requests from the host device for read access or write access to the electronic device, such that the communication between the host device and the electronic device occurs via the security adapter.
US09436826B2	Discovering malicious input files and performing automatic and distributed remediation The subject disclosure is directed towards detecting malware or possible malware in an input file by allowing the input file to be opened, and by monitoring for one or more behaviors corresponding to the open file that likely indicate malware. Only certain executable files and/or file types opened thereby may be monitored, with various collected event data used for antimalware purposes when improper behavior is observed. Example behaviors include writing of a file to storage, generation of network traffic, injection of a process, running of script, and/or writing system registry data. Telemetry data and/or a sample of the file may be sent to an antimalware service, and malware remediation may be performed. Data (e.g., the collected events) may be distributed to other nodes for use in antimalware detection, e.g., to block execution of a similar file.
US09436824B1	System and method for performing antivirus scans of files Disclosed are system and method for performing antivirus scans of files. An exemplary method includes detecting, by an antivirus application executed by a hardware processor, opening of a file for writing of data to the file; performing, by the antivirus application, antivirus scan of at least a portion of the file; when the file is determined to be clean, obtaining a record of antivirus scans of the file; determining from the record a number of performed antivirus scans on the file by the antivirus application and a maximum number of required antivirus scans; when the number of performed antivirus scans is below the maximum number of required antivirus scans, continue antivirus scans of the file by the antivirus application; and when the number of performed antivirus scan is equal to the maximum number of required antivirus scans, discontinue antivirus scans of the file by the antivirus application.
US09436820B1	Controlling access to resources in a network A computerized device transmits an access request to a data communications device of a network in an attempt to access network resources within the network. The data communications device, in response and in real-time, transmits a challenge request to the computerized device that directs the computerized device to retrieve configuration, or posture, credentials associated with the computerized device. A policy server receives the challenge response and, based upon a real-time analysis of the posture credentials of the computerized device, determines a security state of the computerized device and either provides some level or denies the computerized device access to the network resources based upon the analysis of posture. The data communications device detects the real-time security state of the computerized device prior to providing the computerized device with controlled access to the network resources, thereby limiting vulnerable computerized devices from accessing the network resources and minimizing the risk that the network resources receive or transmit malware.
US09436819B2	Securely pairing computing devices In an embodiment, an apparatus comprises a secure storage to store an entry having an identifier of a device to be paired with the apparatus and a master key shared between the apparatus and the device, and a connection logic to enable the apparatus to be securely connected to the device according to a connection protocol in which the device is authenticated based on the identifier received from the device and the master key. Other embodiments are described and claimed.
US09436818B1	System and method for credential management and identity verification A system of credential management and identity verification includes a portable input device and an application that, when executed on the input device, authenticates a user of the input device and provides associated credentials to a computing device. The application detects a request for credentials presented by a proximate computing device. Then, the application alerts a user of the computing device to confirm his identity by submitting one of a biometric or non-biometric authenticating input to the input device. The authenticating input is received by the input device and used to verify the identity of the user. If the identity is verified, the application transmits the associated encrypted credentials and mask data to the computing device. The input device may be a pointing device connected wirelessly or via wired connection to the computer. User authentication data is provided to the input device at an initial or predetermined time.
US09436816B2	Supplementing biometric identification with device identification A computer may identify an individual according to one or more biometrics based on various physiological aspects of the individual, such as metrics of various features of the face, gait, fingerprint, or voice of the individual. However, biometrics are often computationally intensive to compute, inaccurate, and unable to scale to identify an individual among a large set of known individuals. Therefore, the biometric identification of an individual may be supplemented by identifying one or more devices associated with the individual (e.g., a mobile phone, a vehicle driven by the individual, or an implanted medical device). When an individual is registered for identification, various device identifiers of devices associated with the individual may be stored along with the biometrics of the individual. Individuals may then be identified using both biometrics and detected device identifiers, thereby improving the efficiency, speed, accuracy, and scalability of the identification.
US09436815B2	Block management unification system and method A block management unification system and method for communicating a data file that includes a source component, a first rearrangement criterion, a first block encryption key, a second rearrangement criterion, a second block encryption key, a compression module, and an encryption module. The source component accesses the data file that is divided into a plurality of blocks. The first rearrangement criterion organize the blocks according to the first rearrangement criterion. The first block encryption key is inserted into the blocks. The second rearrangement criterion organize the blocks according to the second rearrangement criterion. The second block encryption key is inserted into the blocks. A compression module compresses the rearranged blocks. An encryption module encrypts the rearranged blocks with the first block encryption key and the second block encryption key.
US09436813B2	Multi-tenancy support for a product that does not support multi-tenancy Enterprise software is computer software used to satisfy the needs of an organization and/or multiple individual users. Methods, systems and/or computer program product are described for providing, to a plurality of tenants, access to an enterprise software that is accessible by only a single tenant. At least one of the tenants accessing the enterprise software includes a plurality of users.
US09436812B2	Platform-hardened digital rights management key provisioning Embodiments of an invention for platform-hardened digital rights management key provisioning are disclosed. In one embodiment, a processor includes an execution unit to execute one or more instructions to create a secure enclave in which to run an application to receive digital rights management information from a provisioning server in response to authentication of the application by a verification server.
US09436807B2	Method and apparatus for providing digital rights management service in the cloud A computer implemented method and apparatus for providing digital rights management service in the cloud. The method comprises receiving, at a cloud-based server, a request for a digital rights license from a client device, wherein the digital rights license enables accessing of protected digital media content on the client device; determining, by the cloud-based server, an external license server to facilitate processing the request; routing the request to the external license server; receiving, at the cloud-based server, the requested digital rights license from the external license server; and routing, by the cloud-based server, the requested digital rights license to the client device.
US09436802B2	Prevention of use of a contaminated medical product This disclosure relates generally to contaminable medical products. In particular, this disclosure provides systems, apparatuses, and methods for preventing contaminated use of medical products that become contaminated upon being used for an intended purpose that requires the operation of a medical treatment apparatus, medical treatment system, or both. A medical product may have a unique identity and a permissive operation session, that is associated with the unique identity, may be created to allow a use of the medical device when uncontaminated, while preventing the use of the medical product after it has been presumably contaminated during the permissive operation session.
US09436799B2	Systems and methods for remote image reconstruction A system is provided including a processing unit including an input module, a processing module, and an output module. The processing unit is located at a first location that is remotely located from a scanning location at which a remote medical scanning system is located. The input module is configured to communicate with the remote medical scanning system to receive scanning data obtained during a scan performed by the remote medical scanning system, the scanning data corresponding to an object scanned by the remote medical scanning system. The processing module is configured to use the scanning data to reconstruct an image representing the object. The output module is configured to provide access to the image reconstructed by the processing module to at least one of the remote medical scanning system or a requester located remotely from the first location.
US09436796B2	Method and apparatus for determining common node logical connectivity A method, system, and computer-readable medium are described that enable efficient design processes for integrated circuits. In particular, tools are described which enable an integrated circuit designer to visualize an integrated circuit design without combinational logic and, from such visualization, identify locations in the design of common node logical connectivity. This information enables the designer to identify potential areas where the integrated circuit design can be improved.
US09436794B2	Sequential timing using level-sensitive clocked elements to optimize IC performance A method of optimizing timing performance of an IC design expressed as a graph that includes several nodes representing IC components is provided. The method identifies several paths in the graph. Each path starts from a timed source node and ends to a timed target node. Each path includes several clocked elements and several computational elements. The method optimizes the timing performance of the IC design by skewing clock signals to one or more clocked elements in a set of paths to satisfy timing constraints. The method identifies a path that includes a set of edge-triggered clocked elements and does not satisfy the set of timing constraints. The method replaces each edge-triggered clocked element in the identified path with a level-sensitive clocked element and optimizes the timing performance of the IC design by skewing clock signals one or more clocked element in the identified path.
US09436788B2	Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity The present disclosure provides one embodiment of an IC method that includes receiving an IC design layout including a plurality of main features; choosing isolation distances to the IC design layout; oversizing the main features according to each of the isolation distances; generating a space block layer for the each of the isolation distances by a Boolean operation according to oversized main features; choosing an optimized space block layer and an optimized block dummy density ratio of the IC design layout according to pattern density variation; generating dummy features in the optimized space block layer according to the optimized block dummy density ratio; and forming a tape-out data of the IC design layout including the main features and the dummy features, for IC fabrication.
US09436787B2	Method of fabricating an integrated circuit with optimized pattern density uniformity The present disclosure provides a method that includes receiving an IC design layout having main features and generating a plurality of space block layers to the IC design layout. The method also includes calculating main pattern density PD0 and dummy pattern density PDs of the IC design layout and calculating a least variation block dummy density ratio (LVBDDR) of the IC design layout for each of the space block layers according to the main pattern density and the dummy pattern density. The method further includes choosing an optimized space block layer and an optimized block dummy density ratio according to the LVBDDR and generating a modified IC design layout from the IC design layout according to the optimized space block layer and the optimized block dummy density ratio. Additionally, the method includes forming a tape-out data of the modified IC design layout for IC fabrication.
US09436786B1	Method and circuits for superclocking Methods and circuits for superclocked operation of a plurality of functionally-equivalent logic circuits are disclosed. One of the plurality of functionally-equivalent logic circuits is selected according to a selection algorithm. In response to selecting one of the plurality of functionally-equivalent logic circuits, superclocked operation of the selected one of the plurality of functionally-equivalent logic circuits is enabled. Superclocked operation of other ones of the plurality of functionally-equivalent logic circuits is disabled. The selected one of the plurality of functionally-equivalent logic circuits is used to process a portion of the input data set at the superclocked clock frequency.
US09436781B2	Method and system for autocompletion for languages having ideographs and phonetic characters A set of ordered predicted completion strings including strings of ideographs are presented to a user as the user enters text in a text entry box (e.g., a browser or a toolbar). The user entered text may include zero or more ideographs followed by one or more phonetic characters, or the entered text may be one or more. The predicted completion strings can be in the form of URLs or query strings. The ordering may be based on any number of factors (e.g., a query's frequency of submission from a community of users). URLs can be ranked based on an importance value of the URL. The sets of ordered predicted completion strings are obtained by matching a fingerprint value of the user's entry string to a fingerprint to table map which contains the set of ordered predicted completion strings. The generation of the ordered prediction strings takes into account multiple phonetic representations of certain strings of ideographs.
US09436777B2	Method and system for causing a browser to preload web page components Disclosed is a server computer that receives, over a network from a computing device, a request for a search suggestion related to a search query that is input into a search term entry area displayed by a web browser executing on the computing device. In response to receiving the request, the server computer transmits over the network to the computing device, instructions for the computing device to display a search suggestion related to the search query, the search suggestion corresponding to a search results web page. The instructions further cause the computing device to store, in a memory of the computing device, a web page component associated with the search results web page without causing the computing device to visibly display the web page component during display of the search suggestion.
US09436776B2	Web browsing system and method for rendering dynamic resource URIs using script A method of communicating with a web server for web browsing, and an apparatus and system to perform the method, is provided. The method includes extracting resource information from script included in web page information, transmitting the resource information to the web server to request a resource corresponding to the resource information, and storing the resource.
US09436774B2	Dynamic linking in sharepoint (TM) Provided is a data management system, computer-readable medium and method including extensions to SHAREPOINT™. The system includes a computer processor operatively associated with a computer memory and one or more I/O device, in which the processor and memory are configured to operate one or more SHAREPOINT™ process. The method includes using a sequencing mechanism to allow users to navigate items stored within SHAREPOINT™. The sequencing mechanism further includes the steps of allowing a user to select a specific content type to create a link to, and allowing the user to select a specific list and or folder in which to look for items.
US09436773B2	Method and computer program for discovering a dynamic network address A method for internet communication is presented. An identifier is embedded in an internet-accessible computer readable medium, and an internet address is embedded in the internet-accessible computer readable medium in a relation to the identifier. The identifier is located to provide an identifier location, and the internet address is located based on the identifier location.
US09436772B2	Appending a uniform resource identifier (URI) fragment identifier to a uniform resource locator (URL) A method, computer program product, and/or system dynamically appends a Uniform Resource Identifier (URI) fragment identifier to a Uniform Resource Locator (URL). A web browser on a client device displays a webpage, and accesses the HyperText Markup Language (HTML) coding for the webpage. HTML identification attributes are detected for the content that is being rendered within the web browser. A URI fragment identifier corresponding to the HTML identification attribute that is being rendered at the top of the web browser window is determined and is appended to the end of the URL of the webpage that is displayed in the URL box of the web browser. Detection of the content that is being rendered at the top of the web browser window occurs responsive to a command to scroll to a new section of the webpage.
US09436771B1	Informative systems and methods for perishable food storage An informative food storage system and method is presented herein. The system comprising a container with a scannable code and a client device configured to record the scannable code and to access or maintain a database comprising information associated with one or more scannable codes. The client device may be configured to create, edit, delete, and display information associated with each scannable code. The information may comprise a plurality of data on food stored in the container comprising the scannable code and on the container itself. The method may comprise storing food in a container comprising a scannable code. The scannable code may be recorded by an informative food storage system. Information associated with the scannable code may be displayed, edited, and maintained in a database with information on each scannable code stored in an account or refrigerator. Information from the database may be input, edited, and output by the system on a client device.
US09436770B2	Database systems and methods for consumer packaged goods A database device stores a plurality of data records comprising package parameters, each data record corresponding to a unique URL. Each unique URL corresponds to one of a plurality of different, unique, individual scannable codes printed on individual packages so that each data record corresponds to a scannable code which corresponds to an individual package. A parameter portal provides to the database device individual package parameters which correspond to an individual scannable code on each individual package. An access portal provides selective access to at least some of the individual package parameters stored in the database device based on the unique URL. Systems, methods, databases, and computer readable media storing computer executable instructions for individualized product packages are provided. An enabler processor provides the codes and a loader processor linked to the enabler processor populates a selectively accessible database with information corresponding to the code.
US09436766B1	Clustering of documents for providing content Systems and methods for providing relevant content may include applying a clustering algorithm to posts associated with a device identifier and labeled documents to cluster the unlabeled posts with the labeled documents to determine interests. Content related to the interests may be selected and provided to an electronic device associated with the device identifier.
US09436763B1	Infrastructure enabling intelligent execution and crawling of a web application In one embodiment, a method includes accessing a structured document of a network application, processing the structured document to generate a model representation of the structured document, tracking one or more interactions occurring during the processing of the structured document, the one or more interactions including one or more outgoing requests transmitted by the one or more computing systems or incoming responses received by the one or more computing systems, and generating a behavior model of the web application based on one or more of the interactions.
US09436758B1	Methods and systems for partitioning documents having customer feedback and support content Methods and systems for use in partitioning documents having customer feedback and support content are provided. One exemplary computer-implemented method including executing instructions stored on a computer-readable medium includes receiving a plurality of documents, at least a portion of the plurality of documents including customer feedback related to an issue and support content responsive to the customer feedback, filtering the plurality of documents to retain one of the customer feedback and the support content within a plurality of filtered documents, partitioning the plurality of filtered documents into multiple clusters, receiving a new document, and partitioning the new document based on at least one keyword included in one of the multiple clusters of filtered documents.
US09436755B1	Determining and scoring task indications Methods and apparatus related to determining and scoring task indications. For example, methods and apparatus may determine a plurality of interrogative sentences in a plurality of messages, determine starting n-grams of the interrogative sentences, determine task indications based on the starting n-grams, and determine task association scores for the task indications. Each task indication may be determined based on a set of one or more starting n-grams that share similarities. One or more individuals and/or applications may assign one or more task association measures to a task indication based on likelihood that the task indication is associated with a task request. The task association score for the task indication may be determined based on the task association measures that are assigned to the task indication.
US09436754B1	Unit group generation and relationship establishment This disclosure describes systems and methods for establishing a unit group dictionary based on user provided annotations. The unit group dictionary may be used to identify relationships between multiple items in a corpus. Those relationships may facilitate the display of object identifiers and/or other aspects used and/or provided by the object management service.
US09436753B2	Method and apparatus for managing update information in channel An update management method and apparatus therefor are provided, the update management method including the operations of storing one or more pieces of update information related to at least one channel from a plurality of channels in a storage unit of a user terminal; and displaying the one or more pieces of update information in the related at least one channel.
US09436747B1	Query generation using structural similarity between documents Methods, systems, and apparatus, including computer program products, for generating synthetic queries using seed queries and structural similarity between documents are described. In one aspect, a method includes identifying embedded coding fragments (e.g., HTML tag) from a structured document and a seed query; generating one or more query templates, each query template corresponding to at least one coding fragment, the query template including a generative rule to be used in generating candidate synthetic queries; generating the candidate synthetic queries by applying the query templates to other documents that are hosted on the same web site as the document; identifying terms that match structure of the query templates as candidate synthetic queries; measuring a performance for each of the candidate synthetic queries; and designating as synthetic queries the candidate synthetic queries that have performance measurements exceeding a performance threshold.
US09436746B2	Next generation architecture for database connectivity According to some embodiments, a method and an apparatus of importing data using a database management system (“DBMS”) with integrated Extract, Transform and Load (“ETL”) functionality. The method comprises receiving a command to access data. The command is associated with an ETL function. An executable file associated with the ETL function is called and the data associated with the command is received.
US09436740B2	Visualization of changing confidence intervals Incremental query results and confidence interval values associated with respective incremental query results may be obtained. Visualization shape objects indicating uncertainty values may be determined, based on mapping values of respective incremental query results and confidence interval values to points in the associated visualization shape objects, the uncertainty values visualized based on proportional shapes of the visualization shape objects. At least one visualization comparison object representing a comparison of a plurality of distributions associated with the obtained incremental query results and confidence interval values may be determined. Display of the plurality of visualization shape objects and the at least one visualization comparison object may be initiated.
US09436739B2	Dynamic priority-based query scheduling Techniques for scheduling query execution are provided. In one embodiment, a computer system can receive a query to be executed and can assign a priority to the query. The computer system can further divide the query into a plurality of sub-queries and can assign a sub-priority to each sub-query, where the sub-priority is based on a resource consumption metric of the query. The computer system can then select, from a plurality of sub-query pools, a sub-query pool that includes sub-queries of queries that have the same priority as the query, and can add the plurality of sub-queries to the selected sub-query pool.
US09436735B1	Access path optimization through system statistics In an approach for calculating one or more access paths during bind time, a computer receives a query. The computer identifies one or more access paths for processing the received query, wherein the one or more access paths include steps associated with retrieving data from a database based on the received query. The computer calculates resource costs associated with processing the received query on the one or more identified access paths based on one of more of: resources utilized to perform steps associated with processing the received query, and system statistics associated with the one or more identified access paths.
US09436731B2	Index-based optimization of convex hull and minimum bounding circle queries Systems, methods, and other embodiments associated with index-based optimization of geometric figured-related queries are described. In one embodiment, a method includes receiving two points selected from a corpus of spatial data. A hierarchical index on the data is accessed to choose candidate nodes. The index is a hierarchical arrangement of nodes arranged in paths from root node entries to leaf node entries such that each node is contained in all nodes in a path leading to the node. The method includes determining a spatial relationship between the two points and the candidate nodes in the index. The candidate nodes are a proper subset of the nodes in the index, such that the spatial relationship is not determined between the two points and some non-candidate nodes. A candidate node is selected based on the determined angles for processing related to construction of a geometric figure describing the spatial data.
US09436730B2	Methods and systems for validating input data Methods and systems for use in validating input data in a computing system. Input data associated with a destination software application, such as a database, is received at a computing system. The input data is forwarded to an intermediate software application, such as a web application. When the input includes one or more patterns, a query produced by the intermediate software application based on the input data is validated, such as by comparing the structure of the query to one or more expected query structures. If the validation succeeds, the query is forwarded to the destination software application. Otherwise, the query is discarded.
US09436729B2	Information retrieval system evaluation method, device and storage medium The present disclosure discloses an information retrieval system evaluation method, device and storage medium. A ratio between the sum of all the related object parameters of a keyword in keyword in an evaluation retrieval result set and the sum of all the related object parameters of the keyword in keyword in a retrieval result set is used to compute a recall rate of an information retrieval system. And the recall rate is introduced to evaluate the information retrieval system, thereby enhancing accuracy of quantitative evaluation of the information retrieval system, and improving the automation degree of evaluation.
US09436728B1	Methods and systems for developing an instant messaging network An instant messaging (IM) system has an IM server connected to a communication network, and logic operable on the IM server enabling a first user to browse contacts associated with a second user. In some cases the first user can add and list contacts accessed by browsing the contacts associated with the second user.
US09436723B2	Segment deduplication system with compression of segments A system for storing compressed data comprises a processor and a memory. The processor is configured to receive a compressed segment. The compressed segment is determined by breaking a data stream, a data block, or a data file into one or more segments and compressing each of the one or more segments. The processor is further configured to determine whether the compressed segment has been previously stored, and in the event that the compressed segment has not been previously stored, store the compressed segment. The memory is coupled to the processor and configured to provide the processor with instructions.
US09436721B2	Optimization of mixed database workload scheduling and concurrency control by mining data dependency relationships via lock tracking The present disclosure relates generally to the field of determining data access patterns associated with different workloads. In various examples, determining data access patterns associated with different workloads may be implemented in the form of systems, methods and/or algorithms. The present disclosure also relates generally to the field of scheduling workloads (and/or recommending scheduling for workloads) based upon the determined data access patterns associated with the different workloads. In various examples, scheduling workloads (and/or recommending scheduling for workloads) may be implemented in the form of systems, methods and/or algorithms.
US09436718B2	Systems and methods of generating and using a bitmap index Systems and methods of generating and using a bitmap index are disclosed. The bitmap index stores bit strings. In a particular implementation, each bit string in the bitmap index corresponds to an attribute of an audience. Each location in each bit string corresponds to the same audience member. The bitmap index supports parallelized and distributed execution of queries with respect to data indexed by the bitmap index. For example, the described bitmap index can be used to index advertising data, healthcare data, financial data, etc.
US09436712B2	Data migration framework User data is retrieved from an instance of a data system. A mapping between the data system and one or more staging tables is generated and a package that includes the data and the mapping is generated. The user data is saved to the one or more staging tables using the mapping.
US09436709B1	Content discovery in a topical community The disclosure includes a system and method for discovering content in a topical community. The system includes a processor and a memory storing instructions when executed cause the system to: receive data indicating a first engagement action associated with a content item, the first engagement action performed by a first user; determine a topic associated with the content item; determine a topical reputation score related to the topic for the first user based on one or more second engagement actions performed by one or more second users associated with the content item; determine that the topical reputation score satisfies a reputation threshold; unlock the topic for the first user responsive to the determination that the topical reputation score satisfies the reputation threshold and provide the first user an ability to curate other content items associated with the unlocked topic.
US09436704B2	System for normalizing, codifying and categorizing color-based product and data based on a universal digital color language A system for normalizing, codifying and categorizing divergent color systems into a universal color language. A server connected to a communications network receives, processes, codifies and categorizes divergent color data from a merchant system. A middleware engine of the server receives a data feed comprising a plurality of color swatches or images from the merchant system, and normalizes the data feed into a common format. A server processor extracts image data comprising a plurality of product images from the normalized data feed, identifies and converts at least one dominant product color in each product image to a digital value based on color component intensity values, and assigns a hexadecimal code of the universal color language to each product image that is closest to the digital value of each product image. A product categorization engine categorizes each product image into one of a plurality of product categories.
US09436702B2	Navigation system data base system A system for performing a similarity search in a navigation device data base uses a metric index structure. The index structure includes a plurality of nodes. When a query object is received, a node of the index structure which is associated with at least one object is accessed. A distance between the query object and the at least one object is determined in accordance with a distance metric. Based on the determined distance, another node of the index structure is selectively accessed.
US09436701B2	Methods and systems for regulating user engagement Methods and systems are provided for regulating interaction with respect to an object in a database. One exemplary method involves creating an engagement record associated with the object in the database and in response receiving a request for a database activity with respect to the object from a user, determining whether the user is authorized to initiate the database activity with respect to the object based on a protection status indicated by the engagement record for the object. When the first user is authorized, the database is updated the database to reflect the requested database activity associated with the object and the protection status of the engagement record is updated in response to the database activity. After updating the protection status of the engagement record, subsequent database activity with respect to the object initiated by a second user is regulated based on the updated protection status.
US09436699B2	Techniques for efficient file operations Various technologies described herein pertain to performing a file operation on an inputted file on a computer system. File data retained at a first location in a data store and a first file name retained at a second location in the data store can be provided. The inputted file can include the file data. Moreover, the first file name is a hard link to the file data. Further, a file operation command related to the file data can be received during installation or removal of the inputted file. Accordingly, a second file name retained at a third location in the data store can be created in response to the file operation command. The second file name is created while the file data is immutably maintained at the first location in the data store. Further, the second file name is a hard link to the file data.
US09436695B2	Dynamically expiring crowd-sourced content Example apparatus and methods concern dynamically expiring crowd-sourced content (CSC) in a crowd-sourced database. An example apparatus may include logic for acquiring the CSC, where the CSC is data produced by a mobile device concerning a point of interest. The example apparatus also includes logic for producing an evaluation of the CSC and logic for determining an expiration criteria based on the CSC, the evaluation, and the user. The CSC may be data about a point of interest. The evaluation may be based on the completeness, timeliness, or contents of the CSC. The expiration criteria may be established based on the evaluation of the CSC and a user profile. The expiration criteria or user profile may be manipulated based on confirmation or repudiation of the CSC by a different user or by curation of the CSC.
US09436694B2	Cooperative resource management Deleting content is disclosed. A delete request is received for a file that is distributed with a plurality of nodes. The file is replaced with a first delete token. A determination is made as to whether all nodes in the plurality of nodes have replaced their respective copies of the file with first delete tokens. The file is deleted.
US09436693B1	Dynamic network access of snapshotted versions of a clustered file system The various embodiments are directed towards enabling access to snapshotted versions of files in a distributed file system. The distributed file system may receive a file system operation request that includes at least an entry-ID and a snapshot-ID. File system operation requests may include operations such as reads, writes, moves, or the like. Directory entries that match the entry-ID and the snapshot-ID may be looked up and retrieved from the distributed file system. The retrieved directory entries may also be arranged to include a generation-ID. In the directory entry matching the snapshot-ID, if the generation-ID and the snapshot-ID are different, another directory entry may be looked up from the distributed file system using the entry-ID and the generation-ID. Then the initially requested file system operation may be performed on the retrieved directory entry.
US09436690B2	System and method for predicting a geographic origin of content and accuracy of geotags related to content obtained from social media and other content providers A system and method for managing geotag data associated with content within a geofeed is provided. The content may be tagged with metadata such as geotag data that may specify a location where the content was created. The generated content may be geotagged by one or more geotag sources including a GPS-enabled device, a user input, a content provider, a user profile, or other sources. The system may determine the geotag data for the content that is not already associated with geotag data. The system may determine a confidence level of the geotag data, whether already geotagged or not. The confidence level may be indicative of a likelihood that the geotag data accurately describes a location where the content was actually created.
US09436689B2	Distributed and tiered architecture for content search and content monitoring An efficient large scale search system for video and multi-media content using a distributed database and search, and tiered search servers is described. Selected content is stored at the distributed local database and tier1 search server(s). Content matching frequent queries, and frequent unidentified queries are cached at various levels in the search system. Content is classified using feature descriptors and geographical aspects, at feature level and in time segments. Queries not identified at clients and tier1 search server(s) are queried against tier2 or lower search server(s). Search servers use classification and geographical partitioning to reduce search cost. Methods for content tracking and local content searching are executed on clients. The client performs local search, monitoring and/or tracking of the query content with the reference content and local search with a database of reference fingerprints. This shifts the content search workload from central servers to the distributed monitoring clients.
US09436688B2	Durational referencing cue points for linking multimedia files In some example embodiments, a system and method are illustrated to link a plurality of scenes from at least one multimedia file. The system and method include loading a plurality of multimedia files including a first and second multimedia file. The first multimedia file includes a first scene, and the second multimedia file includes a second scene. The system and method include linking the first scene with the second scene. The linking includes connecting a first durational data for the first scene with a second durational data for the second scene. The first durational data identifies a first start location and a first end location for the first scene. The second durational data identifies a second start location and a second end location for the second scene. The system and method further include generating a linked durational data file as a result of the linking.
US09436682B2	Techniques for machine language translation of text from an image based on non-textual context information from the image A computer-implemented technique can include receiving, at a server from a mobile computing device, the server having one or more processors, an image including a text. The technique can include obtaining, at the server, optical character recognition (OCR) text corresponding to the text, the OCR text having been obtained by performing OCR on the image. The technique can include identifying, at the server, non-textual context information from the image, the non-textual context information (i) representing context information other than the text itself and (ii) being indicative of a context of the image. The technique can include based on the non-textual context information, obtaining, at the server, a translation of the OCR text to a target language to obtain a translated OCR text. The technique can include outputting, from the server to the mobile computing device, the translated OCR text.
US09436681B1	Natural language translation techniques Techniques are described for translating natural language input to a machine-readable form that accurately represents the semantic meaning of the input intended by the user.
US09436680B2	Manual creation for a program product Embodiments relate to supporting creation of a manual of a program product. An aspect includes recording into a recording medium that can be accessed by the computer a screen character string, a translated character string where the screen character string has been translated to another language, or an identifier associated with the screen character string or the translated character string, displayed on a display device by the program product. Another aspect includes recording into the recording medium attribute information of the screen character string or the translated character string. Yet another aspect includes maintaining consistency between the screen character string or the translated character string and a character string that is displayed on a display device by an application for creating the manual, using the screen character string, the translated character string or identifier recorded on the recording medium and the attribute information.
US09436678B2	Architecture for multi-domain natural language processing Features are disclosed for processing a user utterance with respect to multiple subject matters or domains, and for selecting a likely result from a particular domain with which to respond to the utterance or otherwise take action. A user utterance may be transcribed by an automatic speech recognition (“ASR”) module, and the results may be provided to a multi-domain natural language understanding (“NLU”) engine. The multi-domain NLU engine may process the transcription(s) in multiple individual domains rather than in a single domain. In some cases, the transcription(s) may be processed in multiple individual domains in parallel or substantially simultaneously. In addition, hints may be generated based on previous user interactions and other data. The ASR module, multi-domain NLU engine, and other components of a spoken language processing system may use the hints to more efficiently process input or more accurately generate output.
US09436676B1	Written word refinement system and method A method for processing an original user writing, implemented by a computer processor, to modify relationships between words, phrases, signs and symbols comprising the writing, where necessary, to generate a modified writing that more clearly conveys a semantic content intended by the user, or consistent with the core principles associated with its mechanisms, when compared to the original user writing. The method includes receiving an original writing from a user, processing to perform a linguistic analysis on the original user writing in accordance with a plurality of rules to identify semantic content and based on the processing, and the semantic content, altering the relationships between the words, phrases, signs and symbols within the writing, where necessary, to realize a modified writing reflecting the altered relations.
US09436670B2	Webpage based form entry aid Embodiments of the present invention disclose a method, computer program product, and system for providing an interface for data entry into a webform. In one embodiment, the method includes receiving a selection of an active data-entry field, determining an inline label associated with the active data-entry field, determining which data-entry fields are required data-entry fields, and determining a location of an active data-entry field within a webform. The method further includes calculating an estimated time to complete the webform based on historical data for the active data-entry field and mobile webform. The method further includes providing an interface for the webform that includes information corresponding to the active data-entry field, the determined inline label, an indication of whether or not the active data-entry field is required, the calculated estimated time to complete the webform, and an indication of the determined location of the active data-entry field within the webform.
US09436668B2	Form completion rate enhancement system and method A system and method for facilitating the entry by a user via a network, of information into a scaffold electronic document. A flag server modifies the scaffold electronic document to include user-entered information in a information entry field and displays a graphic flag at a next one of a succession of information entry fields.
US09436665B2	Synchronizing annotations between printed documents and electronic documents An image of a printed document portion is provided to a synchronizer. The synchronizer retrieves an electronic version of the printed document and identifies an electronic text portion that is textually similar to a printed text portion. The synchronizer detects an annotation in the printed document portion and inserts a corresponding digital annotation into the electronic document.
US09436663B2	Presenting documents to a user based on topics and collective opinions expressed in the documents A content platform for presenting documents to a user based on topics and collective opinions expressed in the documents is disclosed. The content platform mines a corpus of documents to identify a set of topics and analyzes each document in the corpus of documents to determine a set of opinions associated with the set of topics. The corpus of documents is presented to the user based on the set of topics and the set of opinions. Each document in the corpus of documents is visually modified to focus the user's attention on the set of opinions associated with the set of topics.
US09436657B2	Computing device and method for analyzing acquisition values In a method for analyzing acquisition values of an electronic device using a computing device, the computing device receives an acquisition value of the electronic device acquired by a data acquisition device. If the acquisition value is discrete data and the acquisition value is different from a previous acquisition value of the electronic device, the acquisition value is stored into a storage system. If the acquisition value is the continuous data and a first state corresponding to the acquisition value is different from a second state corresponding to a previous acquisition value of the electronic device, the acquisition value is stored into the storage system.
US09436656B2	Method for systematically treating errors A method for systematically handling errors, and an assemblage for carrying out the method, are presented. The method serves for systematically handing errors for a goniometer in the context of the transfer of position data with a position transducer, the position transducer possessing markings that are sensed with at least one sensor; a profile being deposited in a memory region in connection with said markings; the position transducer generating as a function of its position, by way of the markings, position signals that carry, as data, parameters that are deposited into a further memory region beginning with an address pointer value of 0; said address pointer being incremented with each position signal; and a synchronization between the position signals and the profile being created, and the values stored in the profile being used to modify the number of pulses outputted to the goniometer.
US09436652B2	Honeyport active network security A device comprises a processor. The processor is configured to generate a first signal using a first communication protocol. The first signal corresponds to data received by the processor. The processor is configured to generate a second signal using a second communication protocol. The second signal comprises fabricated data generated by the processor. Additionally, the processor is configured to transmit the first signal. The processor is also configured to transmit the second signal.
US09436651B2	Method and apparatus for managing application state in a network interface controller in a high performance computing system Methods related to communication between and within nodes in a high performance computing system are presented. Processing time for message exchange between a processing unit and a network controller interface in a node is reduced. Resources required to manage application state in the network interface controller are minimized. In the network interface controller, multiple contexts are multiplexed into one physical Direct Memory Access engine. Virtual to physical address translation in the network interface controller is accelerated by using a plurality of independent caches, with each level of the page table hierarchy cached in an independent cache. A memory management scheme for data structures distributed between the processing unit and the network controller interface is provided. The state required to implement end-to-end reliability is reduced by limiting the transmit sequence number space to the currently in-flight messages.
US09436649B2	System and method for updating an electronic calendar A computer implemented system and method are disclosed for updating an electronic calendar. The method includes receiving an electronic message in a natural language in which a change in role is expressed and, with a natural language processor implemented by a computer processor, automatically detecting the change in role within the email message, optionally storing the change in role in a contacts database, and proposing updates for entries in an electronic calendar based on the detected change in role.
US09436639B1	Full bandwidth packet handling with server systems including offload processors A distributed system server system for a packet processing without top of rack (TOR) units is disclosed. The system can include a plurality of servers, each having at least one host processor, and a plurality of offload processor modules, each offload processor module having an input-output (IO) port and multiple offload processors, wherein a first offload processor module is connected directly to a second offload processor module through respective IO ports, the first and second offload processors configured to provide bidirectional network packet flow between at least the first and second offload processor modules and at least one host processor without TOR units for an inter-server connection.
US09436634B2	Enhanced queue management A paired queue apparatus and method comprising request and response queues wherein queue head and tail pointer update values are communicated through an enhanced pointer word data format providing pointer indicator information and optional auxiliary information in a single transfer, wherein auxiliary information provides additional system communication without consuming additional bandwidth. Auxiliary information is optionally contained in a response data entry written to a response queue or in a request entry written to a request queue.
US09436627B2	Detection of abnormal operation caused by interrupt processing A controller for controlling interrupt processing in a multiple-interrupt system is provided. The controller includes multiple watchdog timers (WDTs), each provided for each of interrupt priorities. The controller includes interrupt priority selectors, each of which receives each interrupt request signal and outputs an activation signal to a corresponding WDT according to the priority of the interrupt request signal. The controller includes an interrupt processing circuit, which when a WDT has timed out, outputs, to a processor, an interrupt request signal having a priority one or more levels higher than the priority corresponding to the WDT. When multiple causes of interrupt are assigned to one of the interrupt priorities, the interrupt processing circuit gives priority to an interrupt request signal caused by the timeout of a WDT lower in priority level than the interrupt priority to detect that an abnormal operation has occurred in interrupt processing having the lower level priority.
US09436622B2	Broadcasting communications over an advertising channel Apparatuses, methods and storage media for communications between a peripheral device and host device in the absence of established connection between the devices are described. In one instance, an apparatus may include a host processor, a memory, and a controller coupled with the host processor and the memory and configured to detect for a communication broadcasted via an advertising channel by a peripheral device; determine whether a unique identifier previously communicated to the peripheral device is present in the detected communication; and provide a message corresponding to the communication to the host processor for processing, based on a result of the determination. The apparatus communicates with the peripheral device via a connection established over communication channels. The advertising channel and the communication channels are different. The connection between the devices is not established when the communication is broadcasted via the advertising channel. Other embodiments may be described and claimed.
US09436621B1	Layered device driver A layered device driver operating on a computer system is discussed. The device driver includes three components: an application component operating in user space, an interface component operating in kernel space, and a physical component operating in kernel space.
US09436620B2	Methodology for detecting problematic connections with peripheral devices Implementations of the present disclosure provide methods and systems for identifying peripheral devices with which problematic connections have been established. According to one embodiment, a method for detecting a model of peripheral device for which problematic connections with a computerized unit are common is disclosed. The method involves receiving values of each of one or more features of a particular connection between a computerized unit and a peripheral device, using the received values to determine a score for each of the features of the particular connection, calculating an overall connection score from the scores for each of the features, and generating a problematic peripheral device report including the model of the peripheral device if the overall connection score is indicative of a problematic connection.
US09436616B2	Multi-core page table sets of attribute fields A device includes a memory that stores a first page table that includes a first page table entry, wherein the first page table entry further includes a physical address, an alternative location associated with the page table entry, and a physical page of memory associated with the physical address. A first processing unit is configured to: read the first page table entry, and determine the physical address from the first page table entry. The second processing unit is configured to: read the physical address from the first page table entry, determine second page attribute data from the alternative location, wherein the second page attribute data define one or more accessibility attributes of the physical page of memory for the second processing unit, and access the physical page of memory associated with the physical address according to the one or more accessibility attributes.
US09436614B2	Application-directed memory de-duplication In a computing system including an application executing on top of a virtualization control layer, wherein the virtualization control layer maps portions of a virtual memory to portions of a physical memory, a method for managing memory including: identifying, by the application, a range of virtual memory whose probability of being replicated in the virtual memory exceeds a given threshold; obtaining, by the application, at least one memory address corresponding to the range of virtual memory; and passing, from the application to the virtualization control layer, an identifier for the range of virtual memory and the memory address corresponding to the range of virtual memory, wherein the identifier is useable by the virtualization control layer to identify similar ranges within the virtual memory.
US09436607B2	Locking a cache line for write operations on a bus Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
US09436595B1	Use of application data and garbage-collected data to improve write efficiency of a data storage device A data storage device includes a plurality of flash memory devices. A memory controller is configured to receive a request from a host computing device to write a first logical block of application data to the data storage device, write the first logical block to a data buffer, wherein a size of the data buffer is larger than the logical block and may store multiple logical blocks, write one or more logical blocks of garbage-collected data to the data buffer, and write the logical blocks in the data buffer to the data storage device when the data buffer becomes full. The data buffer written to the data storage device includes at least one logical block of application data and at least one logical block of garbage-collected data. In an alternative implementation, garbage-collected data may be written to the data buffer upon expiration of a timer.
US09436593B2	Information processing device An information processing device includes a first information processing unit; and a second information processing unit connected to the first information processing unit through a data communication line, the second information processing unit including a plurality of information processors. The first information processing unit includes a data storage unit that stores data; a first table that defines correspondence between each of first operation modes of the first information processing unit and memory area sizes that are to be reserved for the corresponding information processors, wherein each of the first operation modes is determined by corresponding one of second operation modes of the second information processing unit; and a memory area allocation unit that allocates memory areas having the memory area sizes corresponding to a current one of the first operation modes to the corresponding information processors.
US09436589B2	Increasing performance at runtime from trace data An analysis system may perform network analysis on data gathered from an executing application. The analysis system may identify relationships between code elements and use tracer data to quantify and classify various code elements. In some cases, the analysis system may operate with only data gathered while tracing an application, while other cases may combine static analysis data with tracing data. The network analysis may identify groups of related code elements through cluster analysis, as well as identify bottlenecks from one to many and many to one relationships. The analysis system may generate visualizations showing the interconnections or relationships within the executing code, along with highlighted elements that may be limiting performance.
US09436587B2	Test context generation A method to generate a human-friendly test context in a test proxy for a function under test may include generating an initial test context of the function under test. The method may also include enhancing a current test context with a new context enhancement. The method may also include adding a hint to the current test context. The current test context may include or be derived from the initial test context.
US09436584B2	SaaS platform for geo-location simulation A Software as a Service (SaaS) platform for geo-location simulation to test a location based application is provided. The SaaS platform comprises a simulator and a client connected to a server through a network. The simulator receives location data corresponding to one or more geo-locations, and a user motion data corresponding to a user motion associated with one or more geo-locations. The simulator acquires a geo-simulation data corresponding to the geo-locations. The simulator processes the geo-simulation data, and the user motion data to simulate the geo-location for the user motion. Furthermore, the simulated geo-location is provided for testing the location based application.
US09436583B1	Minimally disruptive debugging in a production environment For debugging an application in a production environment, a breakpoint is set in the application. Responsive to the setting, recording is begun of information about a processing of a request in the application. Reaching the breakpoint is detected in the application during the processing of the request. A replica of the application is created including the breakpoint, the application becoming a primary application and the replica becoming a secondary application in a production environment. In the secondary application, a debugging operation is performed during a processing of a copy of the request after the breakpoint in the secondary application.
US09436582B1	Calculating an immediate parent assertion statement for program verification Embodiments include dividing source code for an application into multiple program fragments by generating a control flow graph for the multiple program fragments. The control flow graph represents a graph structure with nodes representing the multiple program fragments and edges representing an execution order of the program fragments. Aspects include searching for a chosen assertion statement within a program fragment, wherein the chosen assertion statement must be satisfied for correct execution of the chosen program fragment. Aspects also include identifying an immediate parent program fragment for the chosen program fragment using the control flow graph and calculating an immediate parent assertion statement for the immediate parent program fragment using the chosen assertion logic statement. The immediate parent assertion statement is an over-approximate pre-condition of the chosen program fragment. The computation of the over-approximate pre-condition is performed by computing a precondition that satisfies the chosen assertion statement and the particular-precondition.
US09436581B2	Dynamic lazy type system A dynamic, lazy type system is provided for a dynamic, lazy programming language. Consequently, programs can benefit from runtime flexibility and lightweight notation in combination with benefits afforded by a substantial type system.
US09436579B2	Real-time, multi-tier load test results aggregation A method for real-time analysis of results from a load test performed on a target website includes periodically computing first-level aggregated test results within each of a plurality of load server instances that generate a load on the target website. The first-level aggregated test results are computed from data received by each of the load server instances from the target website every first time interval. The first-level aggregated test results are then periodically sent from each of the load server instances to an associated one of a plurality of analytic server instances every second time interval. The first-level aggregated test results are aggregated by each of the analytic server instances to produce second-level aggregated test results, which test results may then further aggregated to produce third-level aggregated test results at a data storage instance in real-time.
US09436576B2	Methods, systems and apparatus to capture error conditions in lightweight virtual machine managers Methods and apparatus are disclosed to capture error conditions in lightweight virtual machine managers. A disclosed example method includes defining a shared memory structure between the VMM and a virtual machine (VM), when the VM is spawned by the VMM, installing an abort handler on the VM associated with a vector value, in response to detecting an error, transferring VMM state information to the shared memory structure, and invoking the abort handler on the VM to transfer contents of the shared memory structure to a non-volatile memory.
US09436574B2	Method for operating interface with external device and electronic device implementing the same A method and an apparatus are provided for operating an interface with an external device in an electronic device. A connection of the external device to the electronic device is recognized. It is determined whether the external device is a SAW device. A request signal is transmitted to the SAW device when the external device is the SAW device. A response signal corresponding to the request signal is received from the SAW device. The response signal is processed. Data is output according to the processed response signal.
US09436570B2	User station of a bus system and method for transmitting data between user stations of a bus system A user station of a bus system includes: a counter for counting each message which is sent without error and/or each message which is received without error, the counter being incremented when a message is sent without error and/or a message is received without error, and a reset device for resetting the counter reading of the counter when the counter reading of the counter is read.
US09436569B2	Methods and systems for communicatively coupling vehicles and ground systems Methods and systems for communicating data between a vehicle and a ground system are described. The system includes an integrated power and communications connector that couples to the vehicle so that power is supplied to at least selected systems on-board the vehicle. In addition, data is communicated between the vehicle on-board systems and the ground system via the integrated connector.
US09436560B2	Increasing disaster resiliency by having a pod backed up to other peer pods in a site or beyond Increasing disaster resiliency in one aspect may comprise running an optimization algorithm that simultaneously solves for at least a first objective to increase a spread of a backup of virtual machines from a given site onto other sites in proportion to an amount of available space for backup at each site, a second objective to increase a number of backups at one or more of the other sites with low probability of system crash while reducing backups at one or more of the other sites with higher probability of system crash, and a third objective to minimize a violation of recovery time objectives of the virtual machines during recovery. One or more backup sites and one or more recovery sites in an event the given site crashes may be determined based on a solution of the optimization algorithm.
US09436558B1	System and method for fast backup and restoring using sorted hashes A method, system and computer program product for backup and restoration of data. Hash values for data blocks subject to backup are generated. After a number of hashes are accumulated, e.g., on a backup server, these hashes are sorted. Then, the hashes are compared against the hash values in the hash table corresponding to data blocks that have already been backed up. If a hash matches the hash from the hash table, a pointer to the block in the archive is written to the table of pointers to the redundant blocks. Then, this hash value is deleted from a set of the hash values. A check is made if a hash is the last in the group. If the hash is the last in the group, the remaining unique hash values are written into the hash table. Otherwise, the next hash is selected from the group. The redundant data blocks are discarded and only unique data is backed up.
US09436557B2	Method and computation node for processing application data The present invention provides a method and a computation node for processing application data. The method includes: starting, by an operating system, a service process; establishing, by the operating system, a socket connection between the service process and backup software, where the service process has a root operation right, and the service process and the backup software have the same user identifier; sending, by the backup software through the socket, a processing request for application data; receiving, by the service process through the socket, the processing request for application data, where the processing request is sent by the backup software, sending the processing request for application data to corresponding application software, receiving application data returned by the corresponding application software, and sending the returned application data to the backup software through the socket.
US09436556B2	Customizable storage system for virtual databases A database storage system provides replication capability that allows data from a source database and application specific data from a source application to be replicated respectively to a target database storage system and a target application, thereby creating a virtual database and a virtual application. The database storage system generates a plurality of snapshots of the virtual database at a corresponding plurality of time points and a plurality of snapshots of the virtual application at the corresponding plurality of time points. The database storage system associates the plurality of snapshots of the virtual database with the plurality of snapshots of the virtual application at the corresponding plurality of time points so as to generate a historical time-sequence of concurrent modifications to both the virtual database and the virtual application at the one or more development environments, thereby allowing concurrent read/write and rollback, of data and applications.
US09436555B2	Efficient live-mount of a backed up virtual machine in a storage management system Systems and methods enable a virtual machine, including any applications executing thereon, to quickly start executing and servicing users based on pre-staged data blocks supplied from a backup copy in secondary storage. An enhanced media agent may pre-stage certain backed up data blocks which may be needed to launch the virtual machine, based on predictive analysis pertaining to the virtual machine's operational profile. The enhanced media agent may also pre-stage backed up data blocks for a virtual-machine-file-relocation operation, based on the operation's relocation scheme. Servicing read requests to the virtual machine may take priority over ongoing pre-staging of backed up data. Read requests may be tracked so that the media agent may properly maintain the contents of an associated read cache. Some embodiments of the illustrative storage management system may lack, or may simply not require, the relocation operation, and may operate in a “live mount” configuration.
US09436552B2	Checkpoint triggering in a computer system According to an aspect, a method for triggering creation of a checkpoint in a computer system includes executing a task in a processing node of the computer system and determining whether it is time to read a monitor associated with a metric of the task. The monitor is read to determine a value of the metric based on determining that it is time to read the monitor. A threshold for triggering creation of the checkpoint is determined based on the value of the metric. Based on determining that the value of the metric has crossed the threshold, the checkpoint including state data of the task is created to enable restarting execution of the task upon a restart operation.
US09436550B2	Systems and methods for internal disk drive data compression The present invention is related to systems and methods for data storage compression. As an example, a system is discussed that includes a semiconductor device having a host interface, a compression circuit operable to compress a write data set received via the host interface, and a write channel circuit operable to apply an encoding algorithm to the compressed data set to yield an encoded data set.
US09436543B2	Electronic device and method for protecting an electronic device against unauthorized use An electronic device comprising a clock unit and a processing unit connected to the clock unit is described. The clock unit may deliver an output clock signal for operating the processing unit in accordance with the output clock signal. The clock unit may have: a normal mode in which the output clock signal has a low amount of jitter and a normal clock rate to enable normal use of the electronic device, and a failure analysis mode in which the output clock signal has a high amount of jitter or a reduced clock rate, or a high amount of jitter combined with a reduced clock rate, to impede the normal use. The clock unit may be protected against unauthorized re-activation of the normal mode. A method of protecting an electronic device against unauthorized use is also described.

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