最新美国发明专利第2016-06-14期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09368690B2	Semiconductor light-emitting device A semiconductor light-emitting device can include a wavelength converting layer including a surrounding portion, which covers at least one semiconductor light-emitting chip in order to emit various colored lights including white light. The semiconductor light-emitting device can include a substrate, a frame located on the substrate, the chip mounted on the substrate, a transparent material layer located on the wavelength converting layer so as to reduce from the wavelength converting layer toward a light-emitting surface thereof, and a reflective material layer disposed at least between the frame and both side surfaces of the wavelength converting layer and the transparent material layer. The semiconductor light-emitting device can be configured to improve light-emitting efficiency and a color variation by using the surrounding portion and an inclined side surface of transparent material layer, and therefore can emit various colored lights including white light having a high light-emitting efficiency from a small light-emitting surface.
US09368689B2	Light emitting element A light emitting element includes a semiconductor structure layer, a reflective electrode layer formed on a part of the semiconductor structure layer, a conductor layer formed on the semiconductor structure layer with the reflective electrode layer embedded therein, and a support substrate that is arranged on the conductor layer and joined to the conductor layer via a junction layer. A high resistance contact surface is provided at an interface between the semiconductor structure layer and the conductor layer. A high resistance portion is arranged in an area opposed via the conductor layer to an area where the high resistance contact surface is provided. The conductor layer is connected to the junction layer in a peripheral area of the conductor layer outside the high resistance portion.
US09368688B2	Light emitting device A light emitting device includes a light emitting structure having a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer. A first electrode is electrically connected to the first conductive semiconductor layer and is provided under the light emitting structure, and a second electrode is electrically connected to the second conductive semiconductor layer and is provided under the light emitting structure. A first contact portion is provided through the light emitting structure and includes a first region electrically connected to the first electrode. A second region contacts a top surface of the first conductive semiconductor layer, and an insulating ion implantation layer is provided around the first contact portion to insulate the first contact portion from the second conductive semiconductor layer.
US09368684B2	Light emitting device and method for manufacturing the same Provided are a light emitting device and a method for manufacturing the same. The light emitting device comprises a first conductive type semiconductor layer, an active layer, a second conductive type semiconductor layer, and a light extraction layer. The active layer is formed on the first conductive type semiconductor layer. The second conductive type semiconductor layer is formed on the active layer. The light extraction layer is formed on the second conductive type semiconductor layer. The light extraction layer has a refractive index smaller than or equal to a refractive index of the second conductive type semiconductor layer.
US09368681B2	Semiconductor light emitting device A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.
US09368680B2	Electro-optical device and electronic device An object of the present invention is to provide an EL display device having a high operation performance and reliability.The switching TFT 201 formed within a pixel has a multi-gate structure, which is a structure which imposes an importance on reduction of OFF current value. Further, the current control TFT 202 has a channel width wider than that of the switching TFT to make a structure appropriate for flowing electric current. Moreover, the LDD region 33 of the current control TFT 202 is formed so as to overlap a portion of the gate electrode 35 to make a structure which imposes importance on prevention of hot carrier injection and reduction of OFF current value.
US09368679B2	Semiconductor light emitting element A semiconductor light emitting element includes: a pit formation layer having a pyramidal pit caused by a threading dislocation generated in the first semiconductor layer; an active layer; and an electron blocking layer formed on the active layer to cover the recess portion. The active layer is formed on the pit formation layer and having an embedded portion formed so as to embed the pit and a recess portion formed on a surface of the embedded portion to correspond to the pit. The recess portion of the active layer has an apex formed at a position existing in a layered direction of the active layer within the active layer.
US09368674B2	Method and apparatus for creating a W-mesa street A method for fabricating an epitaxial structure includes providing a wafer comprising one or more epitaxial layers. The wafer is divided into dice where the area between the dice are called streets. Each street has a slot formed on either side of the street. The slots penetrate through the epitaxial layer but not the substrate leaving a portion of the epitaxial layer intact between the slots creating a “W” shaped cross section. A protective layer is then formed on the wafer. A laser may be used to singulate the wafer in to individual dice. The laser divides each street between the slots. The barrier walls of the epitaxial layers protect the individual dice from debris created by laser separation.
US09368672B2	Removal of 3D semiconductor structures by dry etching Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.
US09368671B2	Bifacial tandem solar cells A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material.
US09368668B2	Photoelectric conversion device manufacturing method, photoelectric conversion device, and imaging system A method comprises preparing a semiconductor substrate having a first portion, and a second portion including a first region and a second region; forming an active region in the first portion, and an isolating portion of an insulator defining the active region in the second portion; forming a first semiconductor region of a first conductivity type configuring a first photoelectric conversion element, a second semiconductor region of first conductivity type configuring a second photoelectric conversion element, a third semiconductor region of first conductivity type, a fourth semiconductor region of the conductivity type, a first gate electrode configuring a first transfer transistor, and a second gate electrode configuring a second transfer; exposing the first region of the semiconductor substrate, and performing ion implantation masked by a first photoresist pattern covering the second region of the semiconductor substrate, thus forming a fifth semiconductor region of a second conductivity type.
US09368664B2	Biaxially stretched polyester film for protecting back surface of solar cell, and method for producing polyester resin A biaxially stretched polyester film for protecting a back surface of a solar cell, containing a polyester resin that is polymerized with addition of a Ti catalyst, a Mg compound, a P compound and a nitrogen-containing heterocyclic compound, and having a volume resistivity at 285° C. is 10×107 Ω·cm or less, is improved in hydrolysis resistance and electrostatic adhesion property.
US09368663B2	Solar cell sealing film and solar cell using the sealing film The object of the present invention is to provide a solar cell sealing film obtained from a composition comprising chiefly ethylene-vinyl acetate copolymer and organic peroxides for giving crosslinked structure, which suppresses the occurrence of blisters without reduction of crosslink rate, even if the film contains silane-coupling agents for improving adhesive strength. The solar cell sealing film comprises ethylene-vinyl acetate copolymer, an organic peroxide, a silane-coupling agent, and a phosphite compound represented by formula (I): P(OR1)3 (I) wherein, R1 is a branched-chain aliphatic alkyl group having 8 to 14 carbon atoms, and three R1s are the same as or different from each other and further wherein the content of the vinyl acetate recurring unit of the ethylene-vinyl acetate copolymer is in the range of 20 to 35% by weight.
US09368662B2	Photovoltaic junction for a solar cell A photovoltaic junction for a solar cell is provided. The photovoltaic junction has an intrinsic region comprising a multiple quantum well stack formed from a series of quantum wells separated by barriers, in which the tensile stress in some of the quantum wells is partly or completely balanced by compressive stress in the others of the quantum wells. The overall elastostatic equilibrium of the multiple quantum well stack may be ensured by engineering the structural and optical properties of the quantum wells only, with the barriers having the same lattice constant as the materials used in the oppositely doped semiconductor regions of the junction, or equivalently as the actual lattice size of the junction or intrinsic region, or the bulk or effective lattice size of the substrate. Alternatively, the barriers may contribute to the stress balance.
US09368660B2	Capping layers for improved crystallization Techniques for fabrication of kesterite Cu—Zn—Sn—(Se,S) films and improved photovoltaic devices based on these films are provided. In one aspect, a method of fabricating a kesterite film having a formula Cu2−xZn1+ySn(S1−zSez)4+q, wherein 0≦x≦1; 0≦y≦1; 0≦z≦1; and −1≦q≦1 is provided. The method includes the following steps. A substrate is provided. A bulk precursor layer is formed on the substrate, the bulk precursor layer comprising Cu, Zn, Sn and at least one of S and Se. A capping layer is formed on the bulk precursor layer, the capping layer comprising at least one of Sn, S and Se. The bulk precursor layer and the capping layer are annealed under conditions sufficient to produce the kesterite film having values of x, y, z and q for any given part of the film that deviate from average values of x, y, z and q throughout the film by less than 20 percent.
US09368659B2	Back contact design for solar cell, and method of fabricating same A method includes depositing spacers at a plurality of locations directly on a back contact layer over a solar cell substrate. An absorber layer is formed over the back contact layer and the spacers. The absorber layer is partially in contact with the spacers and partially in direct contact with the back contact layer. The solar cell substrate is heated to form voids between the absorber layer and the back contact layer at the locations of the spacers.
US09368648B2	Active diode having no gate and no shallow trench isolation An active diode with fast turn-on time, low capacitance, and low turn-on resistance may be manufactured without a gate and without a shallow trench isolation region between doped regions of the diode. A short conduction path in the active diode allows a fast turn-on time, and a lack of gate oxide reduces susceptibility of the active diode to extreme voltages. The active diode may be implemented in integrated circuits to prevent and reduce damage from electrostatic discharge (ESD) events. Manufacturing the active diode is accomplished by depositing a salicide block between doped regions of the diode before salicidation. After the salicide layers are formed on the doped regions, the salicide block is removed.
US09368645B2	Nonvolatile memory device and method of fabricating the same This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode over a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled with the pipe channel layer and extended in a direction substantially perpendicular to the substrate, a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, and etch stop layers including metal silicide and formed over the pipe connection gate electrode.
US09368644B2	Gate formation memory by planarization Semiconductor devices and methods of producing the devices are disclosed. The devices are formed by forming a gate structure on a substrate. The gate structure includes a charge trapping dielectric formed between the substrate and a first poly layer. A top dielectric is formed over the poly layer and a sidewall dielectric is formed on a side of the poly layer. A second poly layer is formed over the gate structure such that a portion of the second poly layer includes a vertical portion that is in contact with the sidewall dielectric and a top portion that is in contact with the top dielectric. The top portion of the second poly layer can then be removed through, for instance, planarization.
US09368642B2	Semiconductor device and method of fabricating the same The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
US09368641B2	Transistor and display device It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
US09368640B2	Transistor with stacked oxide semiconductor films Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide a semiconductor device having a novel structure in which a novel semiconductor material is used. The present invention is a vertical transistor and a vertical diode each of which has a stacked body of an oxide semiconductor in which a first oxide semiconductor film having crystallinity and a second oxide semiconductor film having crystallinity are stacked. An impurity serving as an electron donor (donor) which is contained in the stacked body of an oxide semiconductor is removed in a step of crystal growth; therefore, the stacked body of an oxide semiconductor is highly purified and is an intrinsic semiconductor or a substantially intrinsic semiconductor whose carrier density is low. The stacked body of an oxide semiconductor has a wider band gap than a silicon semiconductor.
US09368637B2	Thin film transistor and manufacturing method thereof, array substrate and display device A thin film transistor (TFT) and manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor comprises a substrate; an active layer formed on the substrate; a first conductive contact layer and a second conductive contact layer formed on the active layer; an etch-stop layer formed over the first contact layer and the second contact layer; and a source connected with the first contact layer, a drain connected with the second contact layer and a gate arranged between the source and the drain formed over the etch-stop layer. The TFT has a simple structure and better performance.
US09368633B2	Oxide material and semiconductor device An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a semiconductor device including a transistor in which the condition of an electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film is favorable. Further, another object is to manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. A semiconductor device is formed using an oxide material which includes crystal with c-axis alignment, which has a triangular or hexagonal atomic arrangement when seen from the direction of a surface or an interface and rotates around the c-axis.
US09368630B2	Thin film transistor and method for manufacturing thin film transistor A thin film transistor is disclosed. The drain and source electrode layer of the thin film transistor is disposed on the substrate, in which the drain and source electrode layer is divided into a drain region and a source region. The semiconductor layer and the first insulating layer are disposed on the drain and source electrode layer, in which the first insulating layer has an upper limit of thickness. The second insulating layer is disposed on the semiconductor layer and the first insulating layer, in which the second insulating layer has a lower limit of thickness. The gate electrode layer is disposed on the second insulating layer. The passivation layer is disposed on the gate electrode layer, and the pixel electrode layer is disposed on the passivation layer.
US09368626B2	Semiconductor device with strained layer A semiconductor device and method of fabricating thereof is described that includes a substrate including at least one fin, at least one gate stack formed on a top surface of the at least one fin, a first inter-layer dielectric (ILD) layer formed on the top surface of the at least one fin, and a strained layer formed at least on a top surface of the at least one gate stack, wherein the strained layer is configured to provide a strain force to the at least one gate stack.
US09368617B2	Superjunction device and semiconductor structure comprising the same The present disclosure relates to a superjunction device and a semiconductor structure having the same. The superjunction device includes a body region of a second conduction type, a drain region of a first conduction type, a drift region located between said body region and said drain region. The drift region includes first regions of a first conduction type and second regions of a second conduction type arranged alternately along a direction being perpendicular to the direction from the body region to the drain region, and a plurality of trench gate structures, each of them comprising a trench extending into said drift region from an upper surface of said body region and a gate electrode in said trench surrounded by a first dielectric layer filling said trench, and a source region of a first conduction type embedded into said body region. There is no source region along at least 10% of the total interface length between the first dielectric layer and the body region.
US09368616B2	Semiconductor device The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.
US09368614B2	Flexibly scalable charge balanced vertical semiconductor power devices with a super-junction structure This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of deep trenches. The deep trenches are filled with an epitaxial layer thus forming a top epitaxial layer covering areas above a top surface of the deep trenches covering over the semiconductor substrate. The semiconductor power device further includes a plurality of transistor cells disposed in the top epitaxial layer whereby a device performance of the semiconductor power device is dependent on a depth of the deep trenches and not dependent on a thickness of the top epitaxial layer. Each of the plurality of transistor cells includes a trench DMOS transistor cell having a trench gate opened through the top epitaxial layer and filled with a gate dielectric material.
US09368613B2	Semiconductor device and method for manufacturing semiconductor device A protective diode has a basic structure including an n+ layer, an n− layer, a p+ layer, and an n− layer in this order. A p-type layer forming the protective diode is the p+ layer with high impurity concentration. Therefore, the spreading of a depletion layer is suppressed and it is possible to reduce the area of the protective diode. In addition, phosphorus ions with a large diffusion coefficient are implanted to form the n− layer with low impurity concentration in the polysilicon layer forming the protective diode. A heat treatment is performed at a temperature of 1000° C. or higher to diffuse the phosphorus ions implanted into the polysilicon layer. Therefore, the impurity profile of the n− layer in the depth direction can be uniformized in the depth direction.
US09368611B2	Integrated circuit comprising a MOS transistor having a sigmoid response and corresponding method of fabrication An integrated circuit may include at least one MOS transistor having a sigmoid response. The at least one MOS transistor may include a substrate, a source region, a drain region, a gate region, and insulating spacer regions on either side of the gate region. The substrate may include a first region situated under the gate region between the insulating spacer regions. At least one of the source and drain regions may be separated from the first region of the substrate by a second region of the substrate situated under an insulating spacer region, which may be of a same type of conductivity as the first region of the substrate.
US09368608B1	Heterojunction bipolar transistor with improved performance and breakdown voltage Fabrication methods for a device structure and device structures. A trench isolation region is formed that bounds an active device region of a semiconductor substrate. A first semiconductor layer is formed on the active device region and on the trench isolation region. A first airgap is formed between the first semiconductor layer and the active device region. A second airgap is formed between the first semiconductor layer and the trench isolation region. The first airgap extends into the active device region such that the height of the first airgap is greater than the height of the second airgap.
US09368604B1	Method of removing threading dislocation defect from a fin feature of III-V group semiconductor material The present disclosure provides a method of forming a fin-like field-effect transistor (FinFET) device. The method includes forming a first strain-relaxed buffer (SRB) stack over a substrate. The first SRB stack has a lattice mismatch with respect to the substrate that generates a threading dislocation defect feature in the first SRB stack. The method also includes forming a patterned dielectric layer over the first SRB stack. The patterned dielectric layer includes a trench extending therethrough. The method also includes forming a second SRB stack over the first SRB stack and within the trench. The second SRB stack has a lattice mismatch with respect to the substrate such that an upper portion of the second SRB stack is without threading dislocation defects.
US09368603B2	Contact for high-k metal gate device An integrated circuit having an improved gate contact and a method of making the circuit are provided. In an exemplary embodiment, the method includes receiving a substrate. The substrate includes a gate stack disposed on the substrate and an interlayer dielectric disposed on the gate stack. The interlayer dielectric is first etched to expose a portion of the gate electrode, and then the exposed portion of the gate electrode is etched to form a cavity. The cavity is shaped such that a portion of the gate electrode overhangs the electrode. A conductive material is deposited within the cavity and in electrical contact with the gate electrode. In some such embodiments, the etching of the gate electrode forms a curvilinear surface of the gate electrode that defines the cavity.
US09368597B2	Semiconductor devices and methods of manufacturing the same Semiconductor devices and methods of manufacturing the semiconductor devices are provided. The methods may include forming a sacrificial gate pattern on a substrate, forming a first spacer on a sidewall of the sacrificial gate pattern and forming a first interlayer dielectric (ILD) layer covering a sidewall of the first spacer and exposing a top surface of the first spacer. The first spacer may expose an upper portion of the sidewall of the sacrificial gate pattern. The methods may also include forming a capping insulating pattern covering top surfaces of the first spacer and the first ILD layer, replacing the sacrificial gate pattern with a gate electrode structure and patterning the capping insulating pattern to form a second spacer on the first spacer and between the gate electrode structure and the first ILD layer. The second spacer may be formed of a material having a dielectric constant higher than a dielectric constant of the first spacer.
US09368596B2	Structure and method for a field effect transistor Provided is one embodiment of a semiconductor structure that includes a STI feature, wherein the STI feature is a continuous feature and includes a first portion in a first region and a second portion in a second region, and the first portion is recessed relative to the second portion; an active region bordered by the STI feature; a gate stack disposed on the active region and extended in a first direction to the first region of the STI feature; source and drain features formed in the active region and interposed by the gate stack; and a channel formed in the active region and spanned between the source and drain features in a second direction being different from the first direction. The channel includes top portion having a width W in the first direction and two side portions each having a height H less than the width W.
US09368588B2	Integrated circuits with non-volatile memory and methods for manufacture Semiconductor devices and the manufacture of such semiconductor devices are described. According to various aspects of the disclosure, a semiconductor device can include a memory region, a first logic region, and a second logic region. A select gate can be formed in the memory region of the device and a first logic gate formed in the logic region. A charge trapping dielectric can then be disposed and removed from a second logic region. A gate conductor layer can then be disposed on the device and etched to define a memory gate on the sidewall of the select gate and a second logic gate in the second logic region.
US09368586B2	Transistor with recess gate and method for fabricating the same A transistor including a recessed gate structure having improved doping characteristics and a method for forming such a transistor. The transistor includes a recess in a semiconductor substrate, where the recess is filled with a recessed gate structure including an impurity doped layer and a layer doped with a capture species. The capture species accumulates the impurity and diffuses the impurity to other layers of the recessed gate structure.
US09368584B2	Gallium nitride power semiconductor device having a vertical structure A semiconductor device includes a substrate having first and second sides and a first active layer disposed over the first side of the substrate. A second active layer is disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. At least one trench extends through the first and second active layers and the two-dimensional electron gas layer and into the substrate. A conductive material lines the trench. A first electrode is disposed on the second active layer and a second electrode is disposed on the second side of the substrate.
US09368583B2	Field effect transistor with narrow bandgap source and drain regions and method of fabrication A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode.
US09368579B2	Selective area growth of germanium and silicon-germanium in silicon waveguides for on-chip optical interconnect applications A robust fabrication process for selective area growth of semiconductors in growth windows is provided. Sidewall growth is eliminated by the presence of a spacer layer which covers the sidewalls. Undesirable exposure of the top corners of the growth windows is prevented by undercutting the growth window prior to deposition of the dielectric spacer layer. The effectiveness of this process has been demonstrated by selective-area growth of Ge and Ge/SiGe quantum wells on a silicon substrate. Integration of active optoelectronic devices with waveguide layers via end-coupling through the dielectric spacer layer can be reliably accomplished in this manner.
US09368576B2	Methods of manufacturing trench semiconductor devices with edge termination structures Embodiments of semiconductor devices and methods of their formation include providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region, and forming a gate structure in a first trench in the active region of the semiconductor substrate. A termination structure is formed in a second trench in the edge region of the semiconductor substrate. The termination structure has an active region facing side and a device perimeter facing side. The method further includes forming first and second source regions of the first conductivity type are formed in the semiconductor substrate adjacent both sides of the gate structure. A third source region is formed in the semiconductor substrate adjacent the active region facing side of the termination structure. The semiconductor device may be a trench metal oxide semiconductor device, for example.
US09368574B1	Nanowire field effect transistor with inner and outer gates A semiconductor device comprising a suspended semiconductor nanowire inner gate and outer gate. A first epitaxial dielectric layer surrounds a nanowire inner gate. The first epitaxial dielectric layer is surrounded by an epitaxial semiconductor channel. The epitaxial semiconductor channel surrounds a second dielectric layer. A gate conductor surrounds the second dielectric layer. The gate conductor is patterned into a gate line and defines a channel region overlapping the gate line. The semiconductor device contains source and drain regions adjacent to the gate line.
US09368565B2	Metal film resistor structure and manufacturing method A method is provided for manufacturing a semiconductor device with a metal film resistor structure. The method includes providing an insulation layer on the semiconductor device. A lower copper interconnect is formed in the insulation layer. The method also includes forming a cap layer on the insulation layer and the lower copper interconnect and etching the cap layer based on a single photolithography mask to form a window exposing portion of the lower copper interconnect and portion of the insulation layer. Further, the method includes forming a metal film layer on the cap layer and inside the window such that exposed portion of the lower copper interconnect is connected with part of the metal film layer within the window. The method also includes performing a chemical mechanical polishing (CMP) process to form a metal film resistor based on the metal film layer. The metal film resistor is connected with the portion of the lower copper interconnect.
US09368561B2	Luminescent device having light-emitting element and transistor In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
US09368548B2	AC light emitting diode and method for fabricating the same The present invention relates to a light emitting device, including a plurality of light guide portions, a reflection prevention substance disposed on an inclined surface of each light guide portion of the plurality of light guide portions, and a plurality light emitting regions. Each light emitting region includes a first-type semiconductor layer, a second-type semiconductor layer, and an active layer disposed between the first-type semiconductor layer and the second-type semiconductor layer. Each light guide portion of the plurality of light guide portions is surrounded by light emitting regions of the plurality of light emitting regions.
US09368547B2	Lighting module for emitting mixed light A lighting module for emitting mixed light comprises at least one first semiconductor element which emits unconverted red light, at least one second semiconductor element which emits converted greenish white light having a first conversion percentage, at least one third semiconductor element which emits greenish white light having a second conversion percentage that is smaller than the first conversion percentage, and at least one resistor element having a temperature-dependent electric resistance, the second semiconductor element being connected in parallel to the third semiconductor element.
US09368540B2	CIS image sensors with epitaxy layers and methods for forming the same A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric.
US09368533B2	Image sensor with hybrid heterostructure An image sensor architecture provides an SNR in excess of 100 dB, without requiring the use of a mechanical shutter. The circuit components for an active pixel sensor array are separated and arranged vertically in at least two different layers in a hybrid chip structure. The top layer is preferably manufactured using a low-noise PMOS manufacturing process, and includes the photodiode and amplifier circuitry for each pixel. A bottom layer is preferably manufactured using a standard CMOS process, and includes the NMOS pixel circuit components and any digital circuitry required for signal processing. By forming the top layer in a PMOS process optimized for forming low-noise pixels, the pixel performance can be greatly improved, compared to using CMOS. In addition, since the digital circuitry is now separated from the imaging circuitry, it can be formed using a standard CMOS process, which has been optimized for circuit speed and manufacturing cost. By combining the two layers into a stacked structure, the top layer (and any intermediate layer(s)) acts to optically shield the lower layer, thereby allowing charge to be stored and shielded without the need for a mechanical shutter.
US09368531B2	Formation of buried color filters in a back side illuminated image sensor with an ono-like structure A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of light-blocking structures is disposed over the second side of the substrate. A passivation layer is coated on top surfaces and sidewalls of each of the light-blocking structures. A plurality of spacers is disposed on portions of the passivation layer coated on the sidewalls of the light-blocking structures.
US09368529B2	Optical shielding device for separating optical paths A sensor unit for detecting reference and measurement radiation for a distance measurement device has a sensor element and an optical shielding device. The sensor element has a first detection region for detecting measurement radiation and a second detection region for detecting reference radiation. The optical shielding device is positioned in relation to the sensor element and fastened, and the optical shielding device optically separates the first and second detection regions from each other. The optical shielding device further comprises a first recess and a second recess which are permeable to optical radiation of a first wavelength range.
US09368528B2	Light detection device having a semiconductor light detection element and a mounting substrate with quenching circuits A light detection device 1 has a semiconductor light detection element having a semiconductor substrate, and a mounting substrate arranged as opposed to the semiconductor light detection element. The semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrodes electrically connected to the respective avalanche photodiodes and arranged on a second principal surface side of the semiconductor substrate. The mounting substrate includes a plurality of electrodes arranged corresponding to the respective electrodes on a third principal surface side, and quenching resistors electrically connected to the respective electrodes and arranged on the third principal surface side. The electrodes and the electrodes are connected through bump electrodes.
US09368523B2	Semiconductor device, method for manufacturing semiconductor device, and display device This semiconductor device (1000A) includes a TFT (100A) with an oxide semiconductor layer 9, a storage capacitor line (12), and a first transparent electrode (15) electrically connected to the storage capacitor line (12). The first transparent electrode (15) includes a portion which overlaps with a first connecting layer (8x) when viewed along a normal to a substrate (1). The portion that overlaps with the first connecting layer (8x) has a point symmetric shape of which a point of symmetry is located inside a contact hole (CH2) when viewed along a normal to the substrate (1). The first transparent electrode (15) is not in direct contact with the first connecting layer (8x). A portion of the first transparent electrode (15) is in direct contact with a second connecting layer (8x). The first connecting layer (8x) is in direct contact with the second connecting layer (19a). And the first transparent electrode (15) is electrically connected to the storage capacitor line (12) via the first and second connecting layers (8x, 19a).
US09368522B2	Display device and manufacturing and testing methods thereof A display device is disclosed which includes: gate lines and data lines crossing each other to define unit pixel regions in a display area; a pixel electrode in each unit pixel region; a data shorting bar in a non-display area in substantially parallel with the gate lines; a gate shorting bar in the non-display area in substantially parallel with the data lines; gate link lines electrically connecting the gate lines to the gate shorting bar; data link lines electrically connecting the data lines to the data shorting bar; and shield electrodes on at least one of the gate link lines and the data link lines, the shield electrodes including a conductive material that has a higher melting temperature than that of the at least one of the gate link lines and the data link lines.
US09368514B2	Semiconductor device and manufacturing method thereof [Problem]A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high.[Solving Means]By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
US09368513B2	Highly conformal extension doping in advanced multi-gate devices A semiconductor device includes a semiconductor material positioned above a substrate and a gate structure positioned above a surface of the semiconductor material, the gate structure covering a non-planar surface portion of the surface. A sidewall spacer is positioned adjacent to the gate structure and includes first dopants having one of an N-type and a P-type conductivity, wherein the sidewall spacer covers an entire sidewall surface of the gate structure and partially covers the surface of the semiconductor material. Source/drain extension regions that include the first dopants are positioned within the non-planar surface portion and in alignment with the sidewall spacer, wherein a concentration of the first dopants within a portion of the sidewall spacer proximate the non-planar surface portion substantially corresponds to a concentration of the first dopants within the source/drain extension regions proximate the non-planar surface portion.
US09368511B2	Three-dimensional (3D) semiconductor device A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a sidewall of the channel layer to be disposed between the interlayer dielectrics, a barrier pattern formed along a surface of each of the line pattern regions and the sidewall of the channel layer, a reaction preventing pattern formed on the barrier pattern along a surface of a first region of each of the line pattern regions, the first region being adjacent to the channel layer, a protection pattern filled in the first region on the reaction preventing pattern, and a first metal layer filled in a second region of each of the line pattern regions.
US09368510B1	Method of forming memory cell with high-k charge trapping layer A non-volatile storage device with memory cells having a high-k charge storage region, as well as methods of fabrication, is disclosed. The charge storage region has three or more layers of dielectric materials. At least one layer is a high-k material. The high-k layer(s) has a higher trap density as compared to Si3N4. High-k dielectrics in the charge storage region enhance capacitive coupling with the memory cell channel, which can improve memory cell current, program speed, and erase speed. The charge storage region has a high-low-high conduction band offset, which may improve data retention. The charge storage region has a low-high-low valence band offset, which may improve erase.
US09368504B2	Semiconductor device and manufacturing method thereof Variations in the contact area between contact plugs are suppressed to suppress fluctuations in contact resistance. In three third interlayer insulating films, a contact hole is self-alignedly formed to extend through the portions thereof interposed between two wiring portions and the portions thereof interposed between two gate wiring portions and reach a first polysilicon plug. In the contact hole, a second polysilicon plug is formed to come in contact with the first polysilicon plug.
US09368503B2	Semiconductor SRAM structures Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.
US09368499B2	Method of forming different voltage devices with high-k metal gate A method and apparatus are described for integrating high voltage (HV) transistor devices and medium voltage or dual gate oxide (DGO) transistor devices with low voltage (LV) core transistor devices on a single substrate, where each high voltage transistor device (160) includes a metal gate (124), an upper high-k gate dielectric layer (120), a middle gate dielectric layer (114) formed with a relatively lower high-k dual gate oxide layer, and a lower high voltage gate dielectric stack (108, 110) formed with one or more low-k gate oxide layers (22), where each DGO transistor device (161) includes a metal gate (124), an upper high-k gate dielectric layer (120), and a middle gate dielectric layer (114) formed with a relatively lower high-k dual gate oxide layer, and where each core transistor device (162) includes a metal gate (124), an upper high-k gate dielectric layer (120), and a base oxide layer (118) formed with one or more low-k gate oxide layers.
US09368496B1	Method for uniform recess depth and fill in single diffusion break for fin-type process and resulting devices Methods for creating uniform source/drain cavities filled with uniform levels of materials in an IC device and resulting devices are disclosed. Embodiments include forming a hard mask on an upper surface of a Si substrate, the hard mask having an opening over a STI region formed in the Si substrate and extending over adjacent portions of the Si substrate; forming low-k dielectric spacers on a lower portion of sidewalls of the opening, the spacers being formed between the sidewalls and the STI region; filling the opening with an oxide; removing the hard mask; removing an upper portion of the oxide and a portion of the low-k dielectric spacers; revealing a Si fin in the Si substrate; forming equally spaced gate electrodes, each having sidewall spacers, over the Si fin and the oxide; and forming source/drain regions in the Si fin between each pair of adjacent gate electrodes.
US09368493B2	Method and structure to suppress FinFET heating Embodiments of the present invention provide structures and methods for heat suppression in finFET devices. Fins are formed in a semiconductor substrate. A graphene layer is formed on a lower portion of the sidewalls of the fins. A shallow trench isolation region is disposed on the structure and covers the graphene layer, while an upper portion of the fins protrudes from the shallow trench isolation region. The graphene layer may also be deposited on a top surface of the base semiconductor substrate. The graphene serves to conduct heat away from the fins more effectively than other dielectric materials.
US09368492B2	Forming fins of different materials on the same substrate A semiconductor substrate may be formed by providing an providing a semiconductor-on-insulator (SOI) substrate including a base semiconductor layer, a buried insulator layer above the base semiconductor layer, and a SOI layer comprising a first semiconductor material above the buried insulator layer; forming an isolation region in the SOI layer isolating a first portion of the SOI layer from a second portion of the SOI layer; removing the second portion of the SOI layer to expose a portion of the buried insulator layer; forming a hole in the exposed portion of the buried insulator layer to expose a portion of the base semiconductor layer; and forming a semiconductor layer made of a second semiconductor material on the exposed portion of the base semiconductor layer, so that the replacement semiconductor layer covers the exposed region of the buried insulator layer.
US09368491B2	Enhancement mode inverter with variable thickness dielectric stack An enhancement-mode inverter includes a load transistor and a drive transistor. The load transistor has a bottom gate architecture with a first source, a first drain, a load channel region, a first semiconductor layer, and a first gate electrode. A load gate dielectric is in the load channel region, and has a load dielectric thickness. The drive transistor has a bottom gate architecture with a second source, a second drain, a drive channel region, a second semiconductor layer, and a second gate electrode. A drive gate dielectric is in the drive channel region, and has a drive dielectric thickness less than the load dielectric thickness. The first source is electrically connected to the second drain and the first gate is electrically connected to the first drain. The load gate dielectric and the drive gate dielectric are part of a common shared dielectric stack.
US09368490B2	Enhancement-depletion mode inverter with two transistor architectures An enhancement-depletion-mode inverter includes a load transistor and a drive transistor. The load transistor has a top gate architecture with a first source, a first drain, a load channel region, a first semiconductor layer, and a first gate electrode. A load gate dielectric is in the load channel region, and has a load dielectric thickness. The load transistor is configured to operate in a depletion mode. The drive transistor has a bottom gate architecture with a second source, a second drain, a drive channel region, a second semiconductor layer, and a second gate electrode. A drive gate dielectric is in the drive channel region, and has a drive dielectric thickness that is different from the load dielectric thickness. The drive transistor is configured to operate in a normal mode or an enhancement mode. The first source is electrically connected to the second drain and the first gate.
US09368488B2	Efficient integration of CMOS with poly resistor Device and methods for forming a device are presented. The method includes providing a substrate. The substrate includes a resistor region defined by a resistor isolation region. A resistor gate is formed on the resistor isolation region. An implant mask with an opening exposing the resistor region is formed. Resistor well dopants are implanted to form a resistor well in the substrate. The resistor well is disposed in the substrate below the resistor isolation region. Resistor dopants are implanted into the resistor gate to define the sheet resistance of the resistor gate. Terminal dopants are implanted to form first and second resistor terminals at sides of the resistor gate. A central portion of the resistor gate sandwiched by the resistor terminals serves as a resistive portion.
US09368484B1	Fin type electrostatic discharge protection device A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.
US09368483B2	Illumination device capable of decreasing shadow of lighting effect A semiconductor light emitting element includes a transparent substrate and a plurality of light emitting diode (LED) chips. The transparent substrate has a support surface and a second main surface disposed opposite to each other. At least some of the LED structures are disposed on the support surface and form a first main surface where light emitted from with a part of the support surface without the LED structures. Each of the LED structures includes a first electrode and a second electrode. Light emitted from at least one of the LED structures passes through the transparent substrate and emerges from the second main surface. An illumination device includes the semiconductor light emitting element and a supporting base. The semiconductor light emitting element is disposed on the supporting base, and an angle is formed between the semiconductor light emitting element and the supporting base.
US09368480B2	Semiconductor device and method of manufacturing semiconductor device Provided is a semiconductor device, including: a first substrate that includes a first wiring; a second substrate that is disposed facing the first substrate and includes a second wiring, the second wiring being connected to the first wiring through a connection terminal, and the second substrate being smaller in area than the first substrate; a first resin layer that is filled in a gap between the first substrate and the second substrate and covers a region, on the first substrate, in an outer periphery of the second substrate; an organic film pattern that is provided on the first substrate and surrounds the first resin layer; and a second resin layer that covers the first substrate, the organic film pattern, the first resin layer, and the second substrate.
US09368479B2	Thermal vias disposed in a substrate proximate to a well thereof An apparatus relates generally to a three-dimensional stacked integrated circuit. In such an apparatus, the three-dimensional stacked integrated circuit has at least a first die and a second die interconnected to one another using die-to-die interconnects. A substrate of the first die has at least one thermal via structure extending from a lower surface of the substrate toward a well of the substrate without extending to the well and without extending through the substrate. A first end of the at least one thermal via structure is at least sufficiently proximate to the well of the substrate for conduction of heat away therefrom. The substrate has at least one through substrate via structure extending from the lower surface of the substrate to an upper surface of the substrate. A second end of the at least one thermal via structure is coupled to at least one through die via structure of the second die for thermal conductivity.
US09368472B2	Flip-chip assembly process for connecting two components to each other The invention relates to a flip-chip assembly process for connecting two microelectronic components (1, 2) to each other. According to the invention, it is possible either to proportion the spacers (24) so that they are smaller than the interconnect bumps (22) or to oversize the latter so that their deformation, after having been plastic during the insertion of connective inserts (12), returns to the elastic regime once assembly contact between components (1,2) has been reached. Thanks to the invention, it is possible to control with great precision the gap between the two components during their assembly, and this without adding any additional steps to their manufacturing or to the assembly process.
US09368468B2	Thin integrated circuit chip-on-board assembly An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board.
US09368464B2	Electronic component, mother substrate, and electronic component manufacturing method An electronic component includes a plurality of electrodes provided in a rectangular or substantially rectangular box-shaped area on an upper surface of a substrate, an electronic component element mounted on the substrate by flip-chip bonding, and an identification mark. The identification mark is provided between a first electrode, which is arranged along one side of the rectangular or substantially rectangular box-shaped area, and a second electrode, which is adjacent to the first electrode along the one side, of the plurality of electrodes provided on the upper surface of the substrate, and is located on or outside a line connecting the outer side edges of the first and second electrodes.
US09368461B2	Contact pads for integrated circuit packages Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.
US09368458B2	Die-on-interposer assembly with dam structure and method of manufacturing the same A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.
US09368457B2	High-frequency package A high-frequency package includes an MMIC including a signal source and a conductor pattern that is connected to the signal source, a substrate having a signal line and a GND formed thereon and the MMIC mounted thereon, a metal bump for signaling that is formed between the MMIC and the substrate, and connects the conductor pattern of the MMIC and the signal line of the substrate, and a plurality of metal bumps for shielding that are formed between the MMIC and the substrate so as to surround the signal source and the conductor pattern with the metal bump for signaling, where a space between a pair of adjacent metal bumps among the metal bump for signaling and the plurality of metal bumps for shielding is equal to or less than half of a wavelength of an electromagnetic wave generated from the signal source.
US09368446B2	Self aligned contact formation The present disclosure relates to methods of forming a self-aligned contact and related apparatus. In some embodiments, the method forms a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend in a first direction over an active area. One or more of the plurality of gate lines are into a plurality of gate line sections aligned in the first direction. One or more of the plurality of dielectric lines are cut into a plurality of dielectric lines sections aligned in the first direction. A dummy isolation material is deposited between adjacent dielectric sections in the first direction and between adjacent gate line sections in the first direction. One or more self-aligned metal contacts are then formed by replacing a part of one or more of the plurality of dielectric lines over the active area with a contact metal.
US09368445B2	E-fuse structure of semiconductor device Provided is an e-fuse structure of a semiconductor device. the e-fuse structure may include a fuse link formed of a first metal material to connect a cathode with an anode, a capping dielectric covering a top surface of the fuse link, and a dummy metal plug penetrating the capping dielectric and being in contact with a portion of the fuse link. The dummy metal plug may include a metal layer and a barrier metal layer interposed between the metal layer and the fuse link. The barrier metal layer may be formed of a second metal material different from the first metal material.
US09368433B2	Method and apparatus for mounting solder balls to an exposed pad or terminal of a semiconductor package Embodiments of the present disclosure provide a package comprising a die attach pad, a die disposed on the die attach pad and a leadframe. The leadframe includes an opening defined therein that exposes a bottom surface of the die attach pad. The leadframe comprises a plurality of bond pads that are exposed at a bottom surface of the leadframe and a plurality of traces that are exposed at the bottom surface of the leadframe. Each trace of the plurality of traces is coupled to a corresponding bond pad of the plurality of bond pads. At least some of the traces are coupled to the die at top surfaces of the at least some of the traces. The leadframe also comprises a plurality of first insulated barriers. Each first insulated barrier is located between (i) a corresponding trace and (ii) a corresponding bond pad coupled to the corresponding trace.
US09368432B2	Semiconductor device and manufacturing method of semiconductor device A technique capable of enhancing a reliability of a semiconductor device is provided. A semiconductor device has a die pad on which a semiconductor chip is mounted. The die pad is sealed with resin so that a lower surface located on an opposite side of an upper surface on which the semiconductor chip is mounted is exposed. Also, the die pad has a central part including a region in which the semiconductor chip is mounted and a peripheral edge part provided next to the central part in a planar view. In addition, a step surface formed so that a height of the peripheral edge part becomes higher than a height of the central part is provided at a boundary between the central part and the peripheral edge part.
US09368423B2	Semiconductor device and method of using substrate with conductive posts and protective layers to form embedded sensor die package A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. A semiconductor die is disposed on a surface of the base between the conductive posts. An interconnect structure is formed over the semiconductor die and conductive posts. An adhesive layer is disposed over the semiconductor die. A conductive layer is disposed over the adhesive layer. An encapsulant is deposited over the semiconductor die and around the conductive posts. One or more conductive posts are electrically isolated from the substrate. The conductive layer is a removable or sacrificial cap layer. The substrate includes a wafer-shape, panel, or singulated form. The semiconductor die is disposed below a height of the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts.
US09368422B2	Absorbing excess under-fill flow with a solder trench One embodiment sets forth an integrated circuit package that includes a substrate, one or more devices mounted on the substrate, a layer of under-fill configured to secure the one or more devices on the substrate, and a solder trench formed in the substrate, where the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication. One advantage of the disclosed integrated circuit package is that the solder trench is used in lieu of solder dam structures, thereby allowing a stencil to be lowered closer to the substrate surface during fabrication, which facilitates depositing solder paste during fabrication.
US09368416B2	Continuous voltage product binning A binning process uses curve fitting to create and assign one or more bins based on testing data of operating voltage versus leakage current for test integrated circuits. Each bin is created by assigning an initial operating voltage to the bin and fitting a curve to the testing data population. An equation is generated describing the fitted curve. Integrated circuits are binned by measuring the leakage current at a selected operating voltage and testing the integrated circuit at one or more operating voltages determined based on the fitted curves. The integrated circuits are assigned a maximum operating voltage that corresponds to the lowest tested operating voltage at which the integrated circuit passes the test.
US09368409B2	Semiconductor structure and fabrication method The present disclosure provides a method for fabricating semiconductor devices. The method includes providing a substrate with a gate electrode film on the substrate and a gate electrode pattern film on the gate electrode film; forming at least one pattern layer on the gate electrode pattern film; and using the at least one pattern layer as the etch mask to etch portions of the gate electrode pattern film to expose portions of the gate electrode film and form a gate electrode pattern layer on the gate electrode film, the gate electrode pattern layer including a hard mask layer and a silicon layer, and sidewalls of the silicon layer in a direction perpendicular to a first direction having a first poly line width roughness. The method also includes performing an etch-repairing treatment on the sidewalls of the silicon layer in the direction perpendicular to the first direction.
US09368408B2	Method of manufacturing a semiconductor device with buried channel/body zone and semiconductor device A semiconductor device includes a source zone of a first conductivity type formed in a first electrode fin that extends from a first surface into a semiconductor portion. A drain region of the first conductivity type is formed in a second electrode fin that extends from the first surface into the semiconductor portion. A channel/body zone is formed in a transistor fin that extends between the first and second electrode fins at a distance to the first surface. The first and second electrode fins extend along a first lateral direction. A width of first gate sections, which are arranged on opposing sides of the transistor fin, along a second lateral direction perpendicular to the first lateral direction is greater than a distance between the first and second electrode fins.
US09368405B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device that includes steps of: (1) adhering a support substrate to a first surface of a wafer using an adhesive, the wafer including first and second scribe lines extending along first and second directions, respectively, (2) thinning the wafer, (3) forming a groove in a first scribe line excluding a region located in an outer peripheral portion of the wafer, the groove piercing the wafer from the first surface to a second surface opposite to the first surface to expose the adhesive, the first scribe line and the second scribe line demarcating chip regions; and (4) removing the adhesive by immersing the wafer adhered to the support substrate in a solvent such that the solvent permeates into the groove.
US09368403B2	Method for manufacturing a semiconductor device The performances of semiconductor elements disposed in a multilayer wiring layer are improved. A semiconductor device includes: a first wire disposed in a first wiring layer; a second wire disposed in a second wiring layer stacked over the first wiring layer; a gate electrode arranged between the first wire and the second wire in the direction of stacking of the first wiring layer and the second wiring layer, and not coupled with the first wire and the second wire; a gate insulation film disposed over the side surface of the gate electrode; and a semiconductor layer disposed over the side surface of the gate electrode via the gate insulation film, and coupled with the first wire and the second wire.
US09368402B2	Conductive line system and process A system and method for providing a conductive line is provided. In an embodiment the conductive line is formed by forming two passivation layers, wherein each passivation layer is independently patterned. Once formed, a seed layer is deposited into the two passivation layers, and a conductive material is deposited to fill and overfill the patterns within the two passivation layers. A planarization process such as a chemical mechanical polish may then be utilized in order to remove excess conductive material and form the conductive lines within the two passivation layers.
US09368396B1	Gap fill treatment for via process A gap fill treatment for via process is provided. A substrate with a plurality of openings has formed therein is provided. The substrate includes a dense pattern region and an isolated pattern region. A positive resist layer is formed to fill in the openings on the substrate, wherein the thickness of the positive resist layer on the surface of the isolated pattern region is greater than that on the surface of the dense pattern region. The positive resist layer on the surface of the substrate is exposed only. The exposed positive resist layer is developed to form a gap-filling material layer, wherein the gap-filling material layer has the same thickness in the dense pattern region and in the isolated pattern region. A reagent is coated on the surface to form a reaction layer. The reaction layer is removed so that a cap layer remained on the gap-filling material layer.
US09368394B1	Dry etching gas and method of manufacturing semiconductor device The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a semiconductor substrate; forming a conductive region at least partially in the semiconductor substrate; forming a dielectric layer over the substrate; forming a hard mask over the dielectric layer, the hard mask having an opening over the conductive region; dry etching the dielectric layer by a first etching gas to form a recessed feature, wherein a surface of the conductive region is therefore exposed at a bottom of the recessed feature, and a byproduct film is formed at an inner surface of the recessed feature; and dry etching the dielectric layer by a second etching gas, wherein the second etching gas chemically reacts with the byproduct film and the conductive region, and a sacrificial layer is therefore built up around the bottom of the recessed feature.
US09368392B2	MIM capacitor structure The present disclosure relates to a MIM (metal-insulator-metal) capacitor, and an associated method of formation. In some embodiments, the MIM capacitor includes a first electrode having a capacitor bottom metal layer disposed over a dielectric buffer layer located over an under-metal layer. A capacitor dielectric layer is disposed onto and in direct contact with the capacitor bottom metal layer. A second electrode having a top capacitor metal layer is disposed onto and in direct contact with the capacitor dielectric layer. A capacitor inter-level dielectric (ILD) layer is disposed over the top capacitor metal layer, and a substantially planar etch stop layer disposed over the capacitor ILD layer. The capacitor's simple stack provides for a small step size that prevents topography related issues, while the dielectric buffer layer removes design restrictions on the lower metal layer.
US09368391B2	CMOS inverters and fabrication methods thereof A CMOS inverter is provided. The CMOS inverter includes a substrate. The CMOS inverter also includes an NMOS transistor having a first active region, a first isolation structure surrounding the first active region, a first connect structure, a plurality of the first metal interconnect structure and a first shunted gate structure to reduce a delay time and increase a saturation current. Further, the CMOS inverter includes a PMOS transistor having a second active region with a reduced area to reduce the delay time and increase the saturation current, a second isolation structure surrounding the second active region, a second connect structure, a plurality of metal interconnect structure and a second gate structure connecting with the first gate structure through the first connect structure and/or the second connect structure.
US09368385B2	Manufacturing method for semiconductor integrated circuit device A method for manufacturing a semiconductor integrated circuit device includes the step of forming an SOI device region and a bulk device region on an SOI type semiconductor wafer. The method includes: removing a BOX layer and an SOI layer in a bulk device region; and thereafter forming an STI region in both the SOI device region and the bulk device region. In the method, the STI region in the SOI device region is formed to extend through the BOX layer.
US09368383B2	Substrate treating apparatus with substrate reordering A treating section has substrate treatment lines arranged one over the other for treating substrates while transporting the substrates substantially horizontally. An IF section transports the substrates fed from each substrate treatment line to an exposing machine provided separately from this apparatus. The substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section. The throughput of this apparatus can be improved greatly, without increasing the footprint, since the substrate treatment lines are arranged one over the other. Each substrate can be controlled easily since the order of the substrates transported to the exposing machine is in agreement with the order of the substrates loaded into the treating section.
US09368381B2	Transfer robot, its substrate transfer method and substrate transfer relay device A transfer robot is equipped with a first hand and a second hand. The first and the second hands, each have two blades, for holding respective substrates. In addition, the transfer robot includes a rotation unit, a first extension and retraction unit, a second extension and retraction unit and an up-down unit, and by these four units, the first and the second hands can be moved to a substrate transfer relay device where substrates are placed, and to four process chambers.
US09368380B2	Substrate processing device with connection space Provided is a substrate processing apparatus. The substrate processing apparatus includes a chamber providing a stacking space in which a substrate is stacked and a process space in which a process with respect to the substrate is performed, a boat including at least one boat frame that vertically stands up, the boat being elevated to move into the stacking space and the process space, a plurality of susceptors disposed on the boat frame and spaced apart from each other along a longitudinal direction of the boat frame, wherein, as the boat moves into the process space, the substrate is successively loaded on a top surface of each of the plurality of susceptors, and at least holder including a vertical rod disposed parallel to the boat frame and a substrate support tip protruding from an inner surface of the vertical rod to support the substrate, wherein, when the boat moves into the process space, the vertical rod relatively moves along the longitudinal direction of the boat frame.
US09368379B2	Systems and methods of controlling semiconductor wafer fabrication processes A system and method of controlling a semiconductor wafer fabrication process. The method includes positioning a semiconductor wafer on a wafer support assembly in a wafer processing module. A signal is transmitted from a signal emitter positioned at a predetermined transmission angle relative to an axis normal to the wafer support assembly to check leveling of the wafer in the module, so that the signal is reflected from the wafer. The embodiment includes monitoring for the reflected signal at a predetermined reflectance angle relative to the axis normal to the wafer support assembly at a signal receiver. A warning indication is generated if the reflected signal is not received at the signal receiver.
US09368378B2	Semiconductor wafer cleaning system A semiconductor wafer cleaning apparatus comprising a first supporting unit, a movable unit having a first chamber, a second supporting unit having a second chamber, and a third supporting unit is provided. A micro processing chamber in which the semiconductor wafer is being processed is formed when the first chamber is brought in contact with the second chamber. Each of the supporting units is supported by a corresponding supporting plate, and each supporting plate is positioned and strengthened by a plurality of supporting bars on its peripheral. Such design will prevent the deformation of the supporting plates, reduce the particles generated by the friction of parts resulted from the opening or closure of the micro processing chamber, and allow the easy alignment of these units.
US09368377B2	Plasma processing apparatus The present invention provides a temperature control unit for an electrostatic adsorption electrode that is capable of controlling the wafer temperature rapidly over a wide temperature range without affecting in-plane uniformity while high heat input etching is conducted with high wafer bias power applied. A refrigerant flow path provided in the electrostatic adsorption electrode serves as an evaporator. The refrigerant flow path is connected to a compressor, a condenser, and a first expansion valve to form a direct expansion type refrigeration cycle. A second expansion valve is installed between the electrostatic adsorption electrode and the compressor to adjust the flow rate of a refrigerant. This makes it possible to compress the refrigerant in the refrigerant flow path of the electrostatic adsorption electrode and adjust the wafer temperature to a high level by raising the refrigerant evaporation temperature. Further, a thin-walled cylindrical refrigerant flow path is employed so that the thin-walled cylinder is deformed only slightly by the refrigerant pressure.
US09368376B2	Mechanical debonding method and system A mechanical debonding method and system are provided. A mechanical debonding method, used to debond temporary bonding wafers formed by bonding a device wafer and a carrier wafer by an adhesive, includes: obtaining the height position of the adhesive through a thickness measurement apparatus; moving a cutting apparatus to a position between the device wafer and the carrier wafer based on the height position of the adhesive, then removing the adhesive at the edge of the temporary bonding wafers by the cutting apparatus; removing the carrier wafer from the temporary bonding wafers; cleaning the adhesive left on the surface of the device wafer.
US09368372B1	Method for manufacturing semiconductor device It includes the step of pressing a correcting tool against the main surface of a semiconductor chip while a solder material coated over a die pad is in a molten state and letting the solder material harden and the step of releasing the correcting tool from the chip and mounting the chip over the die pad. The correcting tool includes a first part having a first surface as a surface along the support surface of a support member for supporting the die pad and a second part having a second surface intersecting with the first surface. In the chip inclination correction process, the solder material is hardened while the first surface of the correcting tool is pressed against the upper surface of the chip and the second part of the correcting tool is pressed against the lead frame.
US09368368B2	Method for increasing oxide etch selectivity Techniques herein include methods for etching an oxide layer with greater selectivity to underlying channel materials. Such an increase in etch selectivity reduces damage to channel materials thereby providing more reliable and better performing semiconductor devices. Techniques herein include using fluorocarbon gas to feed a plasma to create etchants, and also creating a flux of ballistic electrons to treat a given substrate during an etch process.
US09368366B2	Methods for providing spaced lithography features on a substrate by self-assembly of block copolymers A method of forming a plurality of regularly spaced lithography features, the method including providing a self-assemblable block copolymer having first and second blocks in a plurality of trenches on a substrate, each trench including opposing side-walls and a base, with the side-walls having a width therebetween, wherein a first trench has a greater width than a second trench; causing the self-assemblable block copolymer to self-assemble into an ordered layer in each trench, the layer having a first domain of the first block alternating with a second domain of the second block, wherein the first and second trenches have the same number of each respective domain; and selectively removing the first domain to form regularly spaced rows of lithography features having the second domain along each trench, wherein the pitch of the features in the first trench is greater than the pitch of the features in the second trench.
US09368365B1	Method for forming a semiconductor structure A manufacturing method for forming a semiconductor structure includes: first, a plurality of fin structures are formed on a substrate and arranged along a first direction, next, a first fin cut process is performed, so as to remove parts of the fin structures which are disposed within at least one first fin cut region, and a second fin cut process is then performed, so as to remove parts of the fin structures which are disposed within at least one second fin cut region, where the second fin cut region is disposed along at least one edge of the first fin cut region.
US09368363B2	Etching gas and etching method The present invention is a plasma etching gas comprising a fluorocarbon having 3 or 4 carbon atoms, the fluorocarbon including at least one unsaturated bond and/or ether linkage, and including a bromine atom, and a plasma etching method comprising subjecting a silicon oxide film on a substrate to plasma etching through a mask using a process gas, the process gas being the plasma etching gas. This plasma etching gas exhibits excellent etching selectivity, and has a short atmospheric lifetime and a low environmental impact. This plasma etching method makes it possible to selectively subject a silicon oxide film to plasma etching at a high etching rate without causing an increase in surface roughness.
US09368362B2	Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
US09368359B2	Method of manufacturing compound semiconductor device A compound semiconductor device includes: a compound semiconductor layer; a protective insulating film that covers a top of the compound semiconductor layer; and a gate electrode formed on the protective insulating film, wherein the protective insulating film has a first trench and a second trench which is formed side by side with the first trench and in which the protective insulating film remains with only a predetermined thickness on the compound semiconductor layer, and wherein the gate electrode fills the first trench, and one end of the gate electrode is away from the first trench and located at least in the second trench.
US09368357B2	Directional pre-clean in silicide and contact formation A method includes etching a dielectric layer to form an opening, with an underlying region underlying the dielectric layer exposed to the opening, and performing a bombardment to bombard a surface region of the underlying region through the opening. After the bombardment, the surface region is reacted with a process gas to form a reaction layer. An anneal is then performed to remove the reaction layer.
US09368353B2	Multiple-threshold voltage devices and method of forming same A method comprises growing a channel layer comprising a first channel region and a second channel region, depositing a first hard mask layer over the channel layer, patterning the first hard mask layer, applying a first delta doping process to the first channel region to form a first delta doping layer over the first channel region, depositing a first cap layer over the first delta doping layer, depositing a second hard mask layer over the channel layer, wherein the first cap layer is embedded in the second hard mask layer, patterning the second hard mask layer and the first hard mask layer to expose the second channel region, applying a second delta doping process to the second channel region to form a second delta doping layer over the second channel region and applying a first diffusion process to the first delta doping layer and the second delta doping layer.
US09368352B2	Methods for forming doped silicon oxide thin films The present disclosure relates to the deposition of dopant films, such as doped silicon oxide films, by atomic layer deposition processes. In some embodiments, a substrate in a reaction space is contacted with pulses of a silicon precursor and a dopant precursor, such that the silicon precursor and dopant precursor adsorb on the substrate surface. Oxygen plasma is used to convert the adsorbed silicon precursor and dopant precursor to doped silicon oxide.
US09368349B2	Cut last self-aligned litho-etch patterning The present disclosure relates to a method of performing a self-aligned litho-etch (SALE) process. In some embodiments, the method is performed by forming a spacer material over a substrate having a multi-layer hard mask with a first layer and an underlying second layer to provide a first cut layer, and forming a reverse material over the spacer material to form a second cut layer. A second plurality of openings, cut according to the second cut layer, are formed to expose the second layer at a positions corresponding to a second plurality of shapes of a SALE design layer. A first plurality of openings, cut according to the first cut layer, are formed to expose the second layer at a positions corresponding to a first plurality of shapes of the SALE design layer. The second layer is etched according to the first and second plurality of openings.
US09368347B2	Apparatus and method for irradiating A method irradiates a wafer and an apparatus provides for a wafer to be irradiated. A plurality of radiation emitters emit radiation. A mask permits a portion of the electromagnetic radiation from the plurality of radiation emitters to pass and blocks a further portion of said electromagnetic radiation from passing.
US09368345B2	Method of manufacturing silicon carbide semiconductor substrate and method of manufacturing silicon carbide semiconductor device A step of preparing a silicon carbide substrate, a step of forming a first silicon carbide semiconductor layer on the silicon carbide substrate using a first source material gas, and a step of forming a second silicon carbide semiconductor layer on the first silicon carbide semiconductor layer using a second source material gas are provided. In the step of forming a first silicon carbide semiconductor layer and the step of forming a second silicon carbide semiconductor layer, ammonia gas is used as a dopant gas, and the first source material gas has a C/Si ratio of not less than 1.6 and not more than 2.2, the C/Si ratio being the number of carbon atoms to the number of silicon atoms.
US09368344B2	Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain Methods of fabricating semiconductor devices or structures include forming structures of a semiconductor material overlying a layer of a compliant material, subsequently changing the viscosity of the compliant material to relax the semiconductor material structures, and utilizing the relaxed semiconductor material structures as a seed layer in forming a continuous layer of relaxed semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a continuous layer of semiconductor material having a relaxed lattice structure.
US09368343B1	Reduced external resistance finFET device The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of reducing external resistance within fin field effect transistor (finFET) devices. A first spacer and a second spacer may be formed adjacent to a gate which may reduce capacitance in a substantial portion of a epitaxial source-drain region while also permitting a portion of the epitaxial source-drain region to be located close to a channel. By reducing capacitance from the gate on the substantial portion of the epitaxial source-drain region, resistance in the epitaxial source-drain region may be reduced which may result in increased device performance.
US09368342B2	Defect-free relaxed covering layer on semiconductor substrate with lattice mismatch A defect-free, relaxed semiconductor covering layer (e.g., epitaxial SiGe) over a semiconductor substrate (e.g., Si) is provided having a strain relaxation degree above about 80% and a non-zero threading dislocation density of less than about 100/cm2. A lattice mismatch exists between the substrate and the covering layer. The covering layer also has a non-zero thickness that may be less than about 0.5 microns. The strain relaxation degree and threading dislocation are achieved by exposing defects at or near a surface of an initial semiconductor layer on the substrate (i.e., exposing defects via selective etch and filling-in any voids created), planarizing the filled-in surface, and creating the covering layer (e.g., growing epitaxy) on the planarized, filled-in surface, which is also planarized.
US09368341B2	Method of manufacturing a silicon oxide film A method of manufacturing a silicon oxide film by using a film deposition apparatus is provided. The apparatus includes a turntable including a substrate receiving part on its upper surface, a first gas supply part to supply a first gas to the turntable in a first process area, and a second gas supply part arranged in a second process area apart from the first process area to supply a second gas. In the method, a silicon-containing gas is supplied from the first gas supply part as the first gas. A hydrogen gas and an oxidation gas are supplied from the second gas supply part as the second gas. The first gas is caused to adsorb on the substrate in the first process area, and the second gas is caused to react with the first gas adsorbed on the substrate in the second process area while rotating the turntable.
US09368335B1	Mass spectrometer A mass spectrometer system can include a vacuum manifold and a high vacuum pump. The vacuum manifold can include a foreline chamber and a high vacuum chamber. The foreline chamber can have a source inlet, a foreline inlet, and a foreline outlet. The high vacuum pump can have a vacuum port coupled to high vacuum chamber, and a foreline port coupled to the foreline inlet.
US09368333B2	Ion mobility spectrometer and method of operating same In a drift tube partitioned into a plurality of cascaded drift tube segments each followed by an ion elimination region, a method of separating ions as a function of ion mobility includes repeatedly, and alternating between at least two different time durations, establishing electric drift fields in the drift tube segments and in some of the ion elimination regions while establishing electric repulsive fields in others of the ion elimination regions such that ions having a predefined mobility or range of mobilities are transmitted through the drift tube at one or more frequencies which include one or more overtones of a fundamental frequency at which ions having the predefined mobility or range of mobilities are transmitted through the drift tube with the electric drift fields and electric repulsive fields repeatedly established with uniform time durations.
US09368329B2	Methods and apparatus for synchronizing RF pulses in a plasma processing system A synchronized pulsing arrangement for providing at least two synchronized pulsing RF signals to a plasma processing chamber of a plasma processing system is provided. The arrangement includes a first RF generator for providing a first RF signal. The first RF signal is provided to the plasma processing chamber to energize a plasma therein, the first RF signal representing a pulsing RF signal. The arrangement also includes a second RF generator for providing a second RF signal to the plasma processing chamber. The second RF generator has a sensor subsystem for detecting values of at least one parameter associated with the plasma processing chamber that reflects whether the first RF signal is pulsed high or pulsed low and a pulse controlling subsystem for pulsing the second RF signal responsive to the detecting the values of at least one parameter.
US09368328B2	Apparatus for generating and maintaining plasma for plasma processing An apparatus for generating and maintaining plasma for plasma processing using inductively coupled RF power. The apparatus includes a resonant circuit having a resonant capacitance and a resonant inductance, an excitation circuit for exciting the resonant circuit, and a coupling element for coupling RF power from the inductance into a plasma chamber.
US09368322B2	Inspection apparatus An inspection apparatus includes beam generation means, a primary optical system, a secondary optical system and an image processing system. Irradiation energy of the beam is set in an energy region where mirror electrons are emitted from the inspection object as the secondary charged particles due to the beam irradiation. The secondary optical system includes a camera for detecting the secondary charged particles, a numerical aperture whose position is adjustable along an optical axis direction and a lens that forms an image of the secondary charged particles that have passed through the numerical aperture on an image surface of the camera. In the image processing system, the image is formed under an aperture imaging condition where the position of the numerical aperture is located on an object surface to acquire an image.
US09368319B2	Method for removing foreign substances in charged particle beam device, and charged particle beam device Foreign substances present in a sample chamber are attached to or drawn close to an objective lens and an electrode disposed close to the objective lens by applying a higher magnetic field than when normally used to the objective lens and applying a higher electric field than when normally used to the electrode disposed close to the objective lens. A stage is moved such that the center of an optical axis is located directly above a dedicated stand capable of applying voltage, the magnetic field of the objective lens is turned off, and then the potential difference between the electrode disposed close to the objective lens and an electrode disposed close to the sage is periodically maximized and minimized to thereby forcibly drop the foreign substances onto the dedicated stand capable of applying voltage.
US09368314B2	Inspection system by charged particle beam and method of manufacturing devices using the system An inspection apparatus by an electron beam comprises: an electron-optical device 70 having an electron-optical system for irradiating the object with a primary electron beam from an electron beam source, and a detector for detecting the secondary electron image projected by the electron-optical systems; a stage system 50 for holding and moving the object relative to the electron-optical system; a mini-environment chamber 20 for supplying a clean gas to the object to prevent dust from contacting the object; a working chamber 31 for accommodating the stage device, the working chamber being controllable so as to have a vacuum atmosphere; at least two loading chambers 41, 42 disposed between the mini-environment chamber and the working chamber, adapted to be independently controllable so as to have a vacuum atmosphere; and a loader 60 for transferring the object to the stage system through the loading chambers.
US09368311B2	Photocathode device that replenishes photoemissive coating A photocathode device may replenish its photoemissive coating to replace coating material that desorbs/evaporates during photoemission. A linear actuator system may regulate the release of a replenishment material vapor, such as an alkali metal, from a chamber inside the photocathode device to a porous cathode substrate. The replenishment material deposits on the inner surface of a porous membrane and effuses through the membrane to the outer surface, where it replenishes the photoemissive coating. The rate of replenishment of the photoemissive coating may be adjusted using the linear actuator system to regulate performance of the photocathode device during photoemission. Alternatively, the linear actuator system may adjust a plasma discharge gap between a cartridge containing replenishment material and a metal grid. A potential is applied between the cartridge and the grid, resulting in ejection of metal ions from the cartridge that similarly replenish the photoemissive coating.
US09368301B2	Vacuum interrupter with arc-resistant center shield The disclosed concept pertains to alloy compositions, methods and arc-resistant shields composed of the alloy compositions. The arc-resistant shields are positioned in vacuum interrupter chambers and demonstrate resistance to arc damage and ability to hold off high voltages after arcing, while providing a lower cost alternative to traditional alloy compositions used for producing arc-resistant shields. In certain embodiments, the alloy compositions include copper and/or an element chemically compatible to copper and another component, such as but not limited to, iron, stainless steel, niobium, molybdenum, vanadium, tungsten carbide, chromium carbide, vanadium carbide and chromium, and alloys and mixtures thereof.
US09368299B1	Thin keyboard having keycaps including integrated inner frames A thin keyboard depressing structure includes a circuit board and a frame. The circuit board includes a plurality of trigger portions each can be triggered to generate a keyboard signal. The frame is stacked over the circuit board and forms an outer frame, a plurality of inner frames and a plurality of keycaps in an integrated manner. The outer frame has a plurality of holding zones corresponding to the trigger portions. Each keycap is held in one holding zone corresponding to one trigger portion. The outer frame and the keycap are bridged by one inner frame. Each inner frame has at least two first connecting portions connected to the outer frame and at least two second connecting portions connected to the keycap. Each first connecting portion and each second connecting portion are bridged by a support portion.
US09368297B2	Illuminated, water- and dust-proof switching element An illuminated, waterproof and dust-proof switching element for converting a linear movement of a push button into an electrical switching signal, has a housing and a cap which is axially displaceable within the housing along a stroke path between two end bearings. The cap has a protective membrane for external sealing that is formed from a flexible plastic material by way of multicomponent injection molding. The switching element includes within the housing at least four contacts, a pressure compensation element, a circuit board on which at least one push button and at least two lighting elements are arranged, a silicone pad as a restoring element, a guide, an end stop, a cap with integrally molded protective membrane, and a frame. At least two pairs of the contacts have a like contour including a linear arrangement in the region of a plug and rectangular arrangement in the interior.
US09368294B2	Solenoid operated device A solenoid operated device includes: a fixed iron core formed of a horizontal iron core portion and vertical iron core portions; a movable iron core disposed in an axially displaceable manner with respect to the fixed iron core; a magnet coil disposed between the movable iron core and the vertical iron core portions of the fixed iron core; and a drive shaft installed at an axial center portion of the movable iron core and driving a switchgear to open and close a switch thereof. The solenoid operated device is provided with a stopper installed on the drive shaft in a shaft portion penetrating through the horizontal iron core portion of the fixed iron core and regulating an opening direction position of the movable iron core by abutting on the horizontal iron core portion of the fixed iron core during an opening operation of the switchgear.
US09368288B2	Photoelectric conversion element A photoelectric conversion element includes a photoanode that includes a solid semiconductor layer containing a dye molecule, a counter electrode, and an electrolyte medium disposed between the photoanode and the counter electrode. The dye molecule includes XD represented by chemical formula (1) and YA represented by chemical formula (2) in a molecule: R(XD/YA), which is a ratio of the number of XD to the number of YA in the dye molecule, is 2 or more.
US09368287B2	Dye-sensitized solar cell with metal oxide layer containing metal oxide nanoparticles produced by electrospinning and method for manufacturing same A dye-sensitized solar cell having improved photoelectric conversion characteristic includes a metal oxide layer having dye-adsorbed metal oxide nanoparticles, wherein the metal oxide nanoparticles are formed by electrospinning a mixed solution of a metal oxide precursor and a polymer into ultrafine composite fibers, and thermally compressing and sintering the ultrafine composite fibers.
US09368285B1	Power cell embedded in enclosure An embedded power cell is formed by placing a cathode, anode, and electrolyte within a recess in an enclosure. The enclosure thus acts as part of an overall device and also contains the embedded power cell, eliminating the need for dedicated packaging for the power cell. In one implementation, a low-profile lithium ion battery with a polymerized electrolyte may be sealed within the enclosure. Other devices such as a cell temperature sensor, battery controller, and so forth may also be embedded within the enclosure.
US09368277B2	Method for producing RFeB-based magnet Provided is a method for producing an RFeB-based magnet, the method including: disposing a nozzle so as to be opposed to an attachment surface of a base material that is a sintered magnet or hot-plastic worked magnet composed of an RFeB-based magnet containing a light rare earth element RL that is at least one element selected from the group consisting of Nd and Pr, Fe, and B; ejecting a mixture, from the nozzle, obtained by mixing an organic solvent and an RH-containing powder containing a heavy rare earth element RH that is at least one element selected from the group consisting of Dy, Tb and Ho so as to attach the mixture to the attachment surface; and heating the base material together with the mixture.
US09368275B2	Adjustable overhead conductor monitoring device An apparatus is provided for securing to and collecting power from an electrical conductor, including a current transformer comprising a core and an electrical winding that receives an induced current from magnetic flux generated according to alternating current present on the electrical conductor, and a clamping mechanism that attaches the apparatus to the electrical conductor. According to various aspects, apparatus may include a housing that encloses circuitry for monitoring conditions of the electrical conductor, where the circuitry includes one or more sensors, and wireless communications circuitry.
US09368273B2	Apparatus, system, and method for multicoil telemetry An apparatus, system, and method for multicoil telemetry are disclosed. In one embodiment, the apparatus includes an intermediate coil disposed between a driving coil and a receiving coil, where the intermediate coil is configured to act on magnetic fields between the driving coil and receiving coil in order to provide improved coupling efficiency. The improved coupling may assist in providing efficient power transfer and/or data transfer utilizing the magnetic fields. In some embodiments the receiving coil may be in direct communication with the intermediate coil, without any other intermediate coils. In some embodiments, the apparatus includes a second intermediate coil disposed between the driving coil and receiving coil to improve the transfer efficiency between the driving and receiving coils. The intermediate coils may have a high quality factor and be configured to decouple the resistance between the driving and receiving coils.
US09368270B2	Planar transformer assemblies for implantable cardioverter defibrillators A planar transformer assembly, for use in charging capacitors of an ICD, includes windings arranged to minimize voltage across intervening dielectric layers. Each secondary winding of a preferred plurality of secondary windings is arranged relative to a primary winding, in a hierarchical fashion, such that the DC voltage, with respect to ground, of a first secondary winding, of the plurality of secondary windings, is lower than that of a second secondary winding, with respect to ground, wherein the first secondary winding is in closest proximity to the primary winding. The primary winding and each secondary winding are preferably formed on a corresponding plurality of dielectric layers.
US09368269B2	Hybrid battery charger A hybrid battery charger is disclosed that includes a linear battery charging circuit for providing vehicle starting current and battery charging and a high frequency battery charging circuit that provides battery charging current. The linear battery charging circuit and the high frequency battery charging circuits are selectively enabled to provide vehicle starting current, maximum charging current and optimum efficiency.
US09368268B2	Underfloor transformer An underfloor transformer includes a layered transformer core and at least one electrical winding through which the transformer core extends along a limb axis. In each of two axial end regions of the transformer core, a securing device, which interacts with the transformer core mechanically, is provided. The securing devices are configured for such tensile force stressing. The underfloor transformer can be carried suspended therefrom.
US09368266B2	Electric solenoid structure having elastomeric biasing member An apparatus and method directed to the art of providing an electrically insulative electric solenoid for starting internal combustion engines are provided. The solenoid has a housing; a coil unit within the housing comprising a hollow can with an open end, and a bobbin, an armature, and a bridging contact assembly positioned in the can; a flux washer abutting the open end of the can; a mounting plate abutting the open end of the housing, and an electrically insulative biasing member positioned between the mounting plate and the flux washer and between the mounting plate and the bobbin.
US09368265B2	Apparatuses and methods for cancellation of inhomogeneous magnetic fields induced by non-biological materials within a patient's mouth during magnetic resonance imaging This disclosure includes magnetic field correction devices and methods for using the same. Some magnetic field correction devices include an arch-shaped body configured to be worn inside or outside of a user's mouth such that the arch-shaped body follows the contour of the user's teeth or face, where the arch-shaped body has one or more sidewalls and where the sidewalls are configured to receive a plurality of ferromagnetic or magnetic members. Some of the present methods include performing magnetic resonance imaging (MRI) on a user having one or more magnets coupled to an apparatus disposed inside or outside and adjacent to the user's mouth. Others of the present methods include coupling a plurality of magnets to an arch-shaped body configured to be worn by a user, where the magnets are configured to reduce artifacts caused by non-biological materials within the user's mouth during MRI.
US09368263B2	Magnet assembly A magnet assembly, having a disk-shaped magnet, which is made predominantly of metal material and has a through-hole and, by the through-hole, can be placed onto a region of a shaft made of plastic by a press fit. In the region of the magnet placed onto the shaft, the shaft has a diameter that is smaller than the diameter of the through-hole. The shaft has a plurality of radially protruding projections in the region of the magnet placed onto the shaft. The projections are distributed evenly on the circumference of the shaft and, with respect to the longitudinal axis of the shaft, having a radius, the double of which is oversized relative to the diameter of the through-hole before the magnet is placed onto the projections of the shaft.
US09368262B2	Actuation device An electromagnetic actuation device with an actuation element, which can be adjusted relative to a stator on the basis of a magnetic actuation force which can be generated by the stator, wherein the stator has a coil winding, the winding wire of which is guided to a contact element bent at a bending region and is fixedly and electrically conductively connected to the same, wherein the contact element (5) has a depression geometry (9) in a bending region (7), which shortens a bending path of the winding wire (4) and through which the winding wire (4) passes.
US09368260B2	Cable or cable portion with a stop layer An embodiment of a method for manufacturing a cable, comprises providing a cable core comprising at least one conductor therein, extruding a stopping layer about at least the cable core, extruding a jacketing layer about the stopping layer, and cabling at least one armor wire layer about the jacketing layer to form the cable, wherein the stopping layer comprises a polymer layer configured to mechanically and thermally protect the cable core.
US09368258B2	Forward twisted profiled insulation for LAN cables The present arrangement provides a twisted pair of conductors, each with a profiled insulation thereon, where in the twisted pair, the peak to peak contact of adjacent conductor insulation is ensured along the length of the pair. To this end, each of the profiled insulations on the conductors of the pair are forward twisted prior to twinning to ensure the maximum number of peak to peak contacts per unit length of the pair.
US09368253B2	ESD protection device and method for producing the same An ESD protection device having high insulation reliability and good discharge properties is provided. In producing an ESD protection device that includes a first discharge electrode and a second discharge electrode arranged to oppose each other, a discharge supporting electrode formed so as to span between the first and second discharge electrodes, and an insulator substrate that retains the first and second discharge electrodes and the discharge supporting electrode, a paste for forming a discharge supporting electrode is used and this paste contains, in addition to a powder of an alkali metal compound and/or an alkaline earth metal compound, a metal powder with a network-forming oxide adhered to particle surfaces, a metal powder and a semiconductor powder with a network-forming oxide adhered to particle surfaces, or a metal powder with a network-forming oxide adhered to particle surfaces and a semiconductor powder with a network-forming oxide adhered to particle surfaces.
US09368252B2	Method for forming vapor grown graphite fibers composition and mixture formed by the same and applications thereof A method for forming a vapor-grown graphite fibers (VGGF) composition and a VGGF composition formed by the method are provided. In this method, a transition metal compound catalyst and three organic co-catalysts are mixed with a hydrocarbon compound, and then are delivered into a tubular reactor and pyrolized and graphitized to produce the VGGF composition. The VGGF composition includes a carbon ingredient containing a carbon content of at least 99.9 wt %. The carbon ingredient has a graphitization degree of at least 75%, and the carbon ingredient includes non-fibrous carbon and fibrous VGGF, wherein an area ratio of the non-fibrous carbon to the fibrous VGGF is about equal to or smaller than 5%. The fibrous VGGF include graphite fibers having a 3-D linkage structure, wherein the content of the graphite fibers having the 3-D linkage structure in the fibrous VGGF is about between 5 area % and 50 area %.
US09368247B2	Thin film device and method for manufacturing thin film device In a thin film device including a thin film electrode which has a main electrode layer formed of tungsten, a thin film electrode having a low resistivity is realized. There is provided a thin film device including a thin film electrode that has an underlayer and a main electrode layer formed on the underlayer. The underlayer is formed of a titanium-tungsten alloy having a crystalline structure with a wavy-like surface morphology, and the main electrode layer is formed of tungsten having a crystalline structure with a wavy-like surface morphology.
US09368246B2	Control device The invention relates to a control device (10) comprising a radiation source (17) which is embodied, in particular, as an X-ray source for irradiating a pharmaceutical product (1) embodied, in particular as a capsule, a detector (18) for detecting radiation after irradiating the pharmaceutical product (1), a tube or shaft-shaped supply device (15) which is preferably arranged vertically at least in the region of the beam path (16) of the radiation source (17) for feeding the pharmaceutical product (1) into the beam path (16) of the radiation source (17), and means (25) for positioning and releasing the pharmaceutical product (1) in the region of the radiation beam (16) of the radiation source (17). According to the invention, the tube or shaft-shaped supply device (15) has a cross-section in the region of the beam path (16) which is greater than the cross-section of the pharmaceutical product (1), and that during irradiation, respectively only one pharmaceutical product (1) is arranged in the region of the beam path (16) of the radiation source (17).
US09368242B2	Apparatus and method for separating radioactive nuclides and recovering refined salt from LiCl waste salt or LiCl-KCI eutectic waste salt There are provided an apparatus and method for separating radioactive nuclides from a waste salt and recovering a refined salt, which are able to maximize process efficiency and operating efficiency of a process of regenerating a waste salt produced during a pyrochemical process of used nuclear fuel by converting the waste salt into a thermally stable form and distilling the waste salt under a reduced pressure using a single apparatus having two top covers which are mountable to replace radioactive nuclides included in the waste salt, and highly improve applicability and utility in a remote operation facility for disposal of a radioactive waste by further simplifying operation/handling compared with conventional processes.
US09368238B2	Nuclear reactor melt arrest and coolability device Example embodiments provide a Basemat-Internal Melt Arrest and Coolability device (BiMAC) that offers improved spatial and mechanical characteristics for use in damage prevention and risk mitigation in accident scenarios. Example embodiments may include a BiMAC having an inclination of less than 10-degrees from the basemat floor and/or coolant channels of less than 4 inches in diameter, while maintaining minimum safety margins required by the Nuclear Regulatory Commission.
US09368232B2	Magnetic automatic test equipment (ATE) memory tester device and method employing temperature control In a particular embodiment, a method includes controlling a temperature within a chamber while applying a magnetic field. A device including a memory array is located in the chamber. The method includes applying a magnetic field to the memory array and testing the memory array during application of the magnetic field to the memory array at a target temperature.
US09368231B2	Switched capacitor circuit and drive method thereof A switched capacitor circuit according to the present invention includes: a capacitor including a first terminal to which the input voltage is applied and a second terminal; a capacitor including a third terminal and a fourth terminal; an inverting amplifier including a second output terminal and a second input terminal which is connected to the fourth terminal; a capacitor including a fifth terminal and a sixth terminal; a capacitor including a seventh terminal and an eighth terminal and included in an electrical path between the second output terminal and the fifth terminal; and a capacitor including a ninth terminal and a tenth terminal connected to the second terminal and the sixth terminal, respectively. The third terminal is connected to the second terminal. The sixth terminal is connected to the output terminal.
US09368228B2	Semiconductor memory According to an embodiment, a semiconductor memory includes word lines, a plurality of sets of a pair of bit lines, memory cells, a writing/reading circuit, and a word line selection circuit. In a state where inverted data of program data has been written to the memory cells, a stress is applied and the program data is programmed to the memory cells. The writing/reading circuit writes the inverted data of the same program data to a unit memory cell group made of memory cells connected to a set of a pair of bit lines at a time of programming, and reads data from the unit memory cell group by detecting a signal level of the pair of bit lines at a time of reading. The word line selection circuit simultaneously selects and drives two or more word lines of the word lines connected to the unit memory cell group.
US09368227B2	Semiconductor device and test method A test voltage having a first voltage or a second voltage is applied to an output terminal of a complementary fuse that includes a first fuse to one end of which the first voltage is applied and the other end of which serves as the output terminal and a second fuse to one end of which the second voltage is applied and the other end of which is connected to the output terminal. The test voltage then stops being applied. In such a state, whether output data from the output terminal of the complementary fuse coincides with an expected value is determined. The result of determination is output as a test result.
US09368226B2	Data storage device and method for restricting access thereof A data storage device including a flash memory, a temperature sensor and a controller. The flash memory has a plurality of blocks, and each of the blocks has a plurality of pages. The temperature sensor detects surrounding ambient temperature and to produce a temperature parameter accordingly. The controller is arranged to perform a first maintenance procedure after a predetermined period since the data storage device is powered on. The controller reads the temperature sensor to obtain a first temperature parameter in the first maintenance procedure and determines a first time span according to a first predetermined condition for performing a second maintenance procedure, wherein the first predetermined condition includes the first temperature parameter, and the controller is further arranged to perform the second maintenance procedure after the first time span since the first maintenance procedure has finished.
US09368225B1	Determining read thresholds based upon read error direction statistics There is provided a method for setting read thresholds to be used for reading multiple bits per cell flash memory cells, the method may include reading, by a read circuit, the flash memory cells using a set of current read thresholds to provide current read results; finding, by an error evaluation circuit, current read errors direction statistics associated with the current read results; determining multiple read threshold changes based upon the current read error direction statistics, without determining a contribution of each current read threshold to the current read error direction statistics; and altering multiple current read thresholds, by the multiple read threshold updates, to provide a set of next read thresholds.
US09368223B2	Memory system and read reclaim method thereof A memory system includes a nonvolatile memory device including a first memory area formed of memory blocks which store n-bit data per cell and a second memory area formed of memory blocks which store m-bit data per cell, where n and m are different integers, and a memory controller configured to control the nonvolatile memory device. The memory controller is configured to execute a read operation, and to execute a read reclaim operation in which valid data of a target memory block of the second memory area is transferred to one or more memory blocks of the first memory area, the target memory block selected during the read operation. The read reclaim operation is processed as complete when all the valid data of the target memory block is transferred to the one or more memory blocks of the first memory area.
US09368221B2	Switch and semiconductor device including the switch A device for use with non-volatile memory, includes a first transistor of a first channel type coupled between first and second nodes, including a control gate supplied with a first control signal having a first phase, a second transistor of a second channel type different from the first channel type including a first terminal coupled to the first node, a second terminal coupled to a third node, a back gate coupled to the first terminal thereof, and a control gate supplied with a second control signal having a second phase substantially opposite to the first phase, a third transistor of the second channel type including a first terminal coupled to the second node, a second terminal coupled to the third node, a back gate coupled to the first terminal thereof, and a control gate supplied with the second control signal, and a protection circuit coupled between the first and second node.
US09368219B1	Nonvolatile memory device and operating method thereof A nonvolatile memory device includes a channel vertically extending from a substrate, a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel, and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel that adjoins the source region is formed as an undoped semiconductor layer or a semiconductor layer doped with P-type impurities.
US09368216B2	Interconnections for 3D memory Apparatuses and methods for interconnections for 3D memory are provided. One example apparatus can include a stack of materials including a plurality of pairs of materials, each pair of materials including a conductive line formed over an insulation material. The stack of materials has a stair step structure formed at one edge extending in a first direction. Each stair step includes one of the pairs of materials. A first interconnection is coupled to the conductive line of a stair step, the first interconnection extending in a second direction substantially perpendicular to a first surface of the stair step.
US09368206B1	Capacitor arrangements using a resistive switching memory cell structure In one embodiment, a capacitive circuit can include: (i) a resistive storage element having a solid electrolyte, a first electrode coupled to a first side of the solid electrolyte, and a second electrode coupled to a second side of the solid electrolyte; (ii) the resistive storage element being configured to be programmed to a low resistance state by application of a program voltage in a forward bias direction to form a conductive path between the first and second electrodes, and being configured to be erased to a high resistance state by application of an erase voltage in a reverse bias direction to substantially dissolve the conductive path; and (iii) a first capacitor having the first electrode coupled to a first side of a first oxide layer, and a third electrode coupled to a second side of the first oxide layer.
US09368205B2	Set and reset operation in phase change memory and associated techniques and configurations Embodiments of the present disclosure describe techniques and configurations for word-line path isolation in a phase change memory (PCM) device. In an embodiment, a method includes increasing a current through a memory cell of a phase change memory (PCM) device, wherein the memory cell is coupled with a capacitor and subsequent to said increasing the current, generating a transient current through the memory cell by discharge of the capacitor to reset the memory cell. In another embodiment, a method includes increasing a current through a memory cell of a phase change memory (PCM) device and controlling the current to be greater than a threshold current and lower than a hold current of the memory cell to set the memory cell. Other embodiments may be described and/or claimed.
US09368200B2	Low read current architecture for memory A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.
US09368196B2	Semiconductor memory device A semiconductor memory device according to an embodiment includes a memory cell array including memory cells, the memory cells each configured having a current rectifier element and a variable resistance element connected in series therein. Each of the memory cells has formed on a side surface thereof: a first insulating film provided on a side surface of the current rectifier element and the variable resistance element and having a composition ratio of a non-silicon element to silicon which is a first value; a silicon oxide film provided on a side surface of the first insulating film; and a second insulating film provided on a side surface of the silicon oxide film and having a composition ratio of a non-silicon element to silicon which is a second value. The first value is smaller than the second value.
US09368194B2	Semiconductor integrated circuit device and system with memory cell array A semiconductor integrated circuit which can respond to changes of the amount of retained data at the time of standby is provided. The semiconductor integrated circuit comprises a logic circuit (logic) and plural SRAM modules. The plural SRAM modules perform power control independently of the logic circuit, and an independent power control is performed among the plural SRAM modules. Specifically, one terminal and the other terminal of a potential control circuit of each SRAM module are coupled to a cell array and a local power line, respectively. The local power line of one SRAM module and the local power line of the other SRAM module share a shared local power line. A power switch of one SRAM module and a power switch of the other SRAM module are coupled in common to the shared local power line.
US09368192B2	Semiconductor device and method for driving the same A semiconductor device includes a voltage supply unit suitable for providing a first voltage as a source voltage during a standby mode, and a second voltage as the source voltage during an active mode, and a precharge unit suitable for precharging a pair of input/output lines with the source voltage during the standby mode and the active mode.
US09368187B2	Insertion-override counter to support multiple memory refresh rates A memory refresh method includes determining positions at which to insert refresh operations of weak rows of a memory block among regularly scheduled refresh operations of normal rows of the memory block. The refresh operations occur at a substantially constant refresh rate. The positions at which to insert are based on an actual weak page address. The method also includes performing inserted refresh operations at the determined positions to coordinate distribution of the inserted refresh operations among the regularly scheduled refresh operations.
US09368185B2	Semiconductor device A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data refresh operation on the memory cells, the access circuit to operate in a selected one of a first mode that is ready to perform and a second mode that is not ready to perform, and a judgment circuit configured to respond to first command information, to cause, when the access circuit is in the first mode, the access circuit to perform the data refresh operation, and to cause, when the access circuit is in the second mode, the access circuit to exit from the second mode and then to perform the refresh operation.
US09368181B2	Circuit and method for accessing a bit cell in a spin-torque MRAM Circuitry and a method for regulating voltages applied to magnetoresistive bit cells of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the ends of the selected bit cells are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The ends of the unselected bit cells are held at a precharge voltage while separately timed signals pull up or pull down the ends of the selected bit cells during read and write operations.
US09368178B2	Resistive memory device, memory system including the same and method of reading data from the same A resistive memory device may include first and second resistive memory cells, a reference current generator, and first and second bitline sense amplifiers. The reference current generator may be configured to apply the first and second reference currents to a first common node. A total reference current of the first reference current and the second reference current provided to the first common node may be divided into a first sensing current and a second sensing current by the first common node. The first and second sensing currents may be provided to the first and second bitline sense amplifiers by the first common node, respectively. The first and second bitline sense amplifiers may be configured to sense first data of the first resistive memory cell and second data of the second resistive memory cell based on the first and second sensing currents, respectively.
US09368152B1	Flexible virtual defect padding Technologies are described herein for performing flexible virtual defect padding of bad sectors on recording media of a storage device. A defective sector on a data track of a recording medium in the storage device is detected. The size and position of a physical defect within the defective sector are determined, and one or more sectors adjacent to the defective sector on the data track are mapped as virtual defects based on the size and position of the physical defect within the defective sector.
US09368144B2	Optical information recording medium and method for manufacturing same The object of the invention is to provide an optical information recording medium which excels in stability e.g., for preserving the properties during a long-term storage and which enables recording using a laser having a small peak power, and a method for manufacturing such an optical information recording medium. An optical information recording medium 10 includes a recording layer 14, and intermediate layers (adhesive agent layer 15A and recording layer support layer 15B) adjacent to the recording layer 14, and the recording layer 14 includes a recording material comprising a one-photon absorption dye bound to a polymer binder (polymer compound).
US09368142B2	Magnetic stack including TiN-X intermediate layer A magnetic stack includes a substrate, a magnetic recording layer, and a TiN—X layer disposed between the substrate and the magnetic recording layer. In the TiN—X layer, X is a dopant comprising at least one of MgO, TiO, TiO2, ZrN, ZrO, ZrO2, HfN, HfO, AlN, and Al2O3.
US09368141B2	Plastic critical tolerance fit component Accurately formed critical tolerance fit components are provided for fluid dynamic bearing motors, including disc drive memory systems. In an aspect, critical tolerance fit components are molded to a metal insert and include a portion of a hub, a disc seating surface, and a disc locating surface. The insert includes another portion of a hub, a sleeve, or a disc clamp retainer for a novel disc clamp. In an aspect, the plastic component is situated to cause the thermal expansion of the plastic to be restricted by the thermal expansion of a metal insert. Expensive machining of a stamped metal hub is minimized or eliminated by using the molded component portions. Strict component tolerances are provided as needed for perpendicularity relative to motor rotation for seating a disc with accurate flatness, a circumferential surface for centering the disc, and tight parallelism between a disc mounting surface and a center shaft.
US09368138B2	Disk drive suspension In a first terminal portion, a first conductor, a terminal element as a first protection, and a first gold-plating layer are provided. The first terminal element is thicker than a base nickel layer of a slider terminal portion. The first gold-plating layer is provided with a first roughening processed portion. An electrically conductive paste contacts the roughening processed portion. In a second terminal portion, a second conductor, a terminal element as a second protection, and a second gold-plating layer are provided. The second terminal element is thicker than the base nickel layer. The second gold-plating layer is provided with a second roughening processed portion. An electrically conductive paste contacts the second roughening processed portion.
US09368137B2	Self-cleaning recording heads based on actuator seek profile Cleaning a recording head slider in-drive during operation is accomplished by periodically performing a series of full stroke seek operations, whereby liquid contaminants that may have migrated to the head slider are flung from the slider and liquid from the disk surface may be adsorbed onto the slider for removal by way of flinging. Consequently, head-disk spacing may be stabilized and data write operations improved. Furthermore, the series of full stroke seek operations may be performed at predetermined intervals, and for a predetermined period of time. However, the series may be interrupted by a client request, and continued thereafter, so as not to affect the operational status of the recording system.
US09368136B2	Magnetoresistive sensor having synthetic antiferromagnetic layer in top and bottom shields In accordance with one implementation of the described technology, an apparatus comprises a sensor structure including a top shield which includes a top shield synthetic antiferromagnetic layer and a bottom shield including a bottom shield synthetic antiferromagnetic layer, wherein the bottom synthetic antiferromagnetic shield layer acts as a seed layer structure.
US09368129B1	Disk drive suspension having dual vibration damper A vibration damper for a suspension has two different viscoelastic layers and two different constraint layers. The two viscoelastic layers can be tailored to have different properties, including different viscosities and/or peak vibration frequency damping at different frequencies. The vibration damper exhibits improved vibration damping as compared to a single layer damper having the same overall thickness at critical frequencies.
US09368128B2	Enhancement of multichannel audio The invention relates to audio signal processing. More specifically, the invention relates to enhancing multichannel audio, such as television audio, by applying a gain to the audio that has been smoothed between portions of the audio. The invention relates to methods, apparatus for performing such methods, and to software stored on a computer-readable medium for causing a computer to perform such methods.
US09368121B2	Adaptations of analysis or synthesis weighting windows for transform coding or decoding A method and device are provided for coding or decoding a digital audio signal by transform using analysis or synthesis weighting windows applied to sample frames. The method includes an irregular sampling of an initial window provided for a transform of given initial size N, to apply a secondary transform of size M different from N.
US09368117B2	Device and system having smart directional conferencing Some implementations provide a method for identifying a speaker. The method determines position and orientation of a second device based on data from a first device that is for capturing the position and orientation of the second device. The second device includes several microphones for capturing sound. The second device has movable position and movable orientation. The method assigns an object as a representation of a known user. The object has a moveable position. The method receives a position of the object. The position of the object corresponds to a position of the known user. The method processes the captured sound to identify a sound originating from the direction of the object. The direction of the object is relative to the position and the orientation of the second device. The method identifies the sound originating from the direction of the object as belonging to the known user.
US09368116B2	Speaker separation in diarization The system and method of separating speakers in an audio file including obtaining an audio file. The audio file is transcribed into at least one text file by a transcription server. Homogenous speech segments are identified within the at least one text file. The audio file is segmented into homogenous audio segments that correspond to the identified homogenous speech segments. The homogenous audio segments of the audio file are separated into a first speaker audio file and second speaker audio file the first speaker audio file and the second speaker audio file are transcribed to produce a diarized transcript.
US09368114B2	Context-sensitive handling of interruptions A speech output to be provided to a user of a device is received. Thereafter, it is determined if the device is currently receiving speech input from a user. Upon determining that the device is not currently receiving speech input from the user, the speech output to the user is provided. On the other hand, upon determining that the device is receiving speech input from the user it is determined if provision of the speech output is urgent. When the speech output is urgent, the speech output is provided to the user. When the speech output is not urgent, provision of the speech output to the user is stayed.
US09368113B2	Voice activated features on multi-level voice menu Methods, apparatus, and computer-readable media are described herein related to a user interface (UI) that can be implemented on a head-mountable device (HMD). The UI can include a voice-navigable UI. The voice-navigable UI can include a voice navigable menu that includes one or more menu items comprising an original menu item and an added command menu item. The original menu item can be associated with one or more original commands, and the added menu item can be associated with one or more added commands, including a first added command. The interface can also present a first visible menu that includes at least a portion of the voice navigable menu. Responsive to a first utterance comprising the first added command, the interface can invoke the first added command. In some embodiments, the interface can display a second visible menu, wherein the first added command can be displayed above other menu items.
US09368111B2	System and method for targeted tuning of a speech recognition system A system and method of targeted tuning of a speech recognition system are disclosed. A particular method includes detecting that a frequency of occurrence of a particular type of utterance satisfies a threshold. The method further includes tuning a speech recognition system with respect to the particular type of utterance.
US09368110B1	Method for distinguishing components of an acoustic signal A method distinguishes components of an acoustic signal by processing the signal to estimate a set of analysis features, wherein each analysis feature defines an element of the signal and has feature values that represent parts of the signal, processing the signal to estimate input features of the signal, and processing the input features using a deep neural network to assign an associative descriptor to each element of the signal, wherein a degree of similarity between the associative descriptors of different elements is related to a degree to which the parts of the signal represented by the elements belong to a single component of the signal. The the similarities between associative descriptors are processed to estimate correspondences between the elements of the signal and the components in the signal. Then, the signal is processed using the correspondences to distinguish component parts of the signal.
US09368107B2	Permitting automated speech command discovery via manual event to command mapping An input from a manually initiated action within a computing system can be received. The system can be associated with a speech component. The input can be associated with a system function. The function can be an operation within the computing system and can be linked to a function identifier. The identifier can be translated to a command data. The command data can be associated with a command identifier, a command, and an alternative command. The command data can be a speech command registered within the speech component. The command data can be presented within a speech interface responsive to the translating. The speech interface can be associated with the speech component.
US09368105B1	Preventing false wake word detections with a voice-controlled device Natural language controlled devices may be configured to activate command recognition in response to one or more wake words. Techniques are provided to allow for multiple operating modes in which different recognition parameters are employed in recognizing wake words that activate the natural language control functionality of a computing device.
US09368102B2	Method and system for text-to-speech synthesis with personalized voice A method and system are provided for text-to-speech synthesis with personalized voice. The method includes receiving an incidental audio input (403) of speech in the form of an audio communication from an input speaker (401) and generating a voice dataset (404) for the input speaker (401). The method includes receiving a text input (411) at the same device as the audio input (403) and synthesizing (312) the text from the text input (411) to synthesized speech including using the voice dataset (404) to personalize the synthesized speech to sound like the input speaker (401). In addition, the method includes analyzing (316) the text for expression and adding the expression (315) to the synthesized speech. The audio communication may be part of a video communication (453) and the audio input (403) may have an associated visual input (455) of an image of the input speaker. The synthesis from text may include providing a synthesized image personalized to look like the image of the input speaker with expressions added from the visual input (455).
US09368098B2	Parametric emitter system with noise cancelation An ultrasonic noise cancelation system can include a communication module configured to receive a noise signal detected by a noise detection module, the noise signal representing a noise sound in a listener environment; a noise cancelation module configured to invert the received noise signal thereby creating an inverse noise signal representing an inverse of the noise sound; and a modulator configured to modulate the inverse noise signal onto an ultrasonic carrier to generate an ultrasonic signal.
US09368095B2	Method for outputting sound and apparatus for the same A method and an apparatus for outputting a sound corresponding to a musical instrument which is input by using a voice are provided. The method includes identifying a sound including an original sound, identifying an output sound object corresponding to an acoustic characteristic of the original sound, and outputting the output sound object, corresponding to musical characteristics of the original sound. Further, various aspects are provided which are related to the method and the apparatus which enable inputting sounds of a musical instrument using a voice.
US09368094B1	Stringed instrument neck support A system and method for safely supporting a stringed musical instrument at various positions of orientation while processing actions are being performed on the instrument. A support structure includes a plurality of reorientable surfaces that each present a depression, a majority of the depressions each having a slope relative to a longitudinal axis (all slopes may be different) to provide an adjustable work surface, such a supporting a musical instrument in various configurations and arrangements.
US09368091B2	Capo A capo for use with a stringed instrument, said capo comprising: an upper arm member including an upper handle having a dimension W2, an upper connection part, and a string press bar with an attached upper pad for engaging the strings of a stringed instrument, the string press bar having a dimension W4, W4 being greater than W2; a lower arm member including a lower handle at one end, a securing bar to engage a neck of a stringed instrument at a second end, and a lower connection part between the one end and the second end, the upper connection part connected to the lower connection part; and a spring disposed between said upper arm member and said lower arm member, said spring biasing the spring press bar and the securing bar toward each other.
US09368090B2	Liquid crystal display device and method for driving the same To increase the frequency of input of image signals in terms of design in a field-sequential liquid crystal display device. Image signals are concurrently supplied to pixels provided in a plurality of rows among pixels arranged in matrix in a pixel portion of the liquid crystal display device. Thus, the frequency of input of an image signal to each pixel can be increased without change in response speed of a transistor or the like included in the liquid crystal display device.
US09368086B2	Minimizing unwanted changes of color during image processing An image is processed in a device-independent color space by applying a modification function to one or more dimensions of that color space. The image is then converted into a target device-dependent color space. In order to minimize unwanted changes of color arising from the modification function taking image color values out of gamut when converted to the target device-dependent color space, the modification function is scaled to limit modified image values to within modification limits that are determined, for each image pixel or group of pixels, in dependence on the target device-dependent color space gamut boundary in the device-independent color space.
US09368085B2	Method and apparatus for driving active matrix display panel, and display A method and apparatus for driving an active matrix display panel includes a plurality of scanning lines, a plurality of data lies intersecting the scanning lines, and a plurality of pixel electrodes that are coupled to the scanning lines and the data lines. The method includes activating the scanning lines sequentially, and adjusting common voltages applied to a plurality of common electrodes that are disposed opposite to the pixel electrodes in response to differences in voltage changes generated among the pixel electrodes when the scanning lines changes from an on state to an off state. Therefore a voltage difference between each of the pixel electrodes and a common electrode arranged opposite to the pixel electrode is equal to a target voltage.
US09368077B2	Systems and methods for adjusting liquid crystal display white point using column inversion Systems, methods, and devices for adjusting a white point of a liquid crystal display (LCD) using column inversion are provided. In one example, a method includes measuring white points of an electronic display that occur when the display employs different column inversion schemes. The display may be programmed to perform the column inversion scheme that produces a white point closest to a desired white point.
US09368076B2	Liquid crystal display fixing flicker in 3D image display The present invention proposes an LCD capable of reducing flicker when showing 3D images. The LCD adds a plurality of switch units to every row of scan lines while no additional gate driver is added. The plurality of switch units separately control charging and charge sharing of pixel units, therefore pixel charging and charge sharing are separately controlled. Hence the present invention fixes flicker in 3D image display while no additional gate driver is added.
US09368074B2	Optically addressed gray scale electric charge-accumulating spatial light modulator A technique for modulating light by an optically addressed, electric charge accumulating spatial light modulator achieves substantially monotonic gray scale response. Embodiments digitally modulate the voltage across a photoreceptive material included in the spatial light modulator. The digital modulation scheme entails illuminating the photoreceptor with a series of light pulses propagating from an LCoS, in which the durations of the light pulses and their positions in time combine to produce binary-weighted equivalent rms voltages on the photoreceptor. The light pulses originate from a light-emitting diode or other switchable light source, and the timing of the light pulses is controlled such that they are emitted only when the associated LCoS is in a stable state. Emitting light pulses while the LCoS is in a stable state avoids non-monotonic behavior.
US09368073B2	LED backlight driving circuit and LCD The present invention proposes an LED backlight driving circuit comprises voltage booster circuits parallelly connected and a constant current driving IC module. The voltage booster circuits are used for conversing an input voltage into a needed output voltage to supply to an LED unit. The constant current driving IC module is used for controlling the voltage booster circuits, so that the voltage booster circuits converse the input voltage into the needed output voltage to supply to the LED unit, driving the LED unit in a constant current. The constant current driving IC module generates driving signals at different frequencies to control the voltage booster circuits respectively. The invention can set up multiple driving signals operating simultaneously at different frequencies respectively and disperse resulting harmonic wave, hence reduce EMI signals of the backlight driving circuit effectively. The present invention also proposes an LCD using the LED backlight driving circuit.
US09368072B2	Image display device and image display method of a multi-display type with local and global control Control sections of displays 11 each determine control information Pi used when area-active driving is performed individually and transmit the control information Pi to a multi-display control section 12. The multi-display control section 12 determines control information Ps for the entire device on the basis of the received pieces of control information Pi and transmits the control information Ps to the control sections of the displays 11. All the displays 11 perform area-active driving on the basis of the same control information Ps. In this way, occurrence of a luminance difference or chromaticity difference among display screens of the displays 11 is prevented and the quality of a displayed image is improved.
US09368066B2	Pixel circuit, organic electroluminescent display panel and display device A pixel circuit is disclosed. The pixel circuit includes first and second capacitors, and a driving transistor, which generates a driving current. The pixel circuit includes a first transistor, controlled by a first driving signal, and which transmits a data signal to the first capacitor. The pixel circuit includes a second transistor, controlled by a second driving signal, and which transmits the data signal to the driving transistor. The pixel circuit includes a third transistor, controlled by the first driving signal, and which transmits a reference signal to the driving transistor. The pixel circuit includes a fourth transistor, controlled by a third driving signal, and which transmits the driving current to the light emitting element. The first capacitor stores the data signal and stabilizes the voltage between the gate and the source of the driving transistor, and the second capacitor stabilizes a source voltage of the driving transistor.
US09368065B2	Display device and electronic apparatus A display panel including pixels disposed on a substrate, where each of the pixels includes a light emitting element, and a capacitor. The capacitor of a first one of the pixels is partially overlapped, in a vertical direction, by respective pixel areas of two of the pixels. The anode of the capacitor of the first one of the pixels may be disposed closer to the substrate than a cathode of the capacitor, thereby reducing a parasitic capacitance between the capacitor and an anode of the light emitting element of one of the two pixels overlapping the capacitor.
US09368064B2	Display panel, display apparatus, and electronic system A color display unit includes pixels arranged in matrix form. Display pixel units are formed from multiple pixels, one of each of the display colors, grouped together across multiple rows. Drive units are formed by multiple rows of display pixel units that are connected to a common power supply line. Common write scanning lines are provided, where the number of common write scanning lines per drive unit equals the number of rows of pixels that are included in a display pixel unit. Each common write scanning line is connected to every pixel of at least one given color in its respective drive unit. Within a single drive unit, every pixel of a given color has a transistor whose layout orientation is the same as the layout orientation of a corresponding transistor in every other pixel of that given color.
US09368063B2	Display systems with compensation for line propagation delay A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.
US09368056B2	Display device In a pixel memory portion of a display device, as corresponding to each pixel memory unit, there are provided a flip-flop, a voltage selection portion, which selects either white display voltage or black display voltage in accordance with an output signal from the flip-flop, and a liquid crystal capacitance, which reflects the voltage selected by the voltage selection portion in the display state of the pixel that corresponds to the flip-flop. Moreover, the flip-flops respectively included in the pixel memory units within the pixel memory portion are connected in series, forming a shift register.
US09368053B2	Display device Provided is to secure a data-writing period to a source line and reduce the number of the IC chips used. N image data (e.g., three image data, RGB) are sequentially input to one input terminal. Three switches, three first memory elements, three transfer switches, three second memory elements, and three buffers are connected in parallel to the input terminal. The three switches are turned on respectively. RGB image data are held in the three respective first memory elements. In a selection period of a gate line of an (m−1)-th row, image data of an m-th row are written to the first memory elements. When the three transfer switches are turned on in a selection period of a gate line of an m-th row, the image data are transferred to and held in the second memory elements. Then, the image data are output to each source line through each buffer.
US09368052B2	Holographic display Disclosed is a holographic display including a spatial light modulator with pixels, the SLM pixels being on a substrate, the SLM including circuitry which is on the same substrate as the SLM pixels, the circuitry operable to perform calculations which provide an encoding of the SLM.
US09368049B2	Lever lock for display structures A lever lock is used for attaching first and second support elements in a display structure. The lever lock includes a body that attaches to a side of the first support element. A shaft extends from the body and is oriented to pass through the slot. A foot is disposed at an end of the shaft that is remote from the body and is configured to operatively engage a side of the second support element so as to provide a clamping force on the second support element against the first support element. A lever is coupled to the body and configured to rotate between first and second positions. A linkage connecting the lever with the shaft converts the rotation of the lever into a movement of the shaft through a translation and axial rotation so as to move the foot between engaging and disengaging positions.
US09368048B2	Display device and method of manufacture The invention relates to a display device, to a backlighting element, and to a method of manufacturing a backlighting element and a display device, the display device comprising a display element, the display element being backlit using a light source, a backlighting element being provided to backlight the display element, the backlighting element comprising a light guide part providing the light guide functionality, the backlighting element comprising a reflective element part, the light guide part of the backlighting element and the reflective element part being functionally combined with one another, the reflective element part and the light guide part of the backlighting element being joined, during the manufacture of the backlighting element, to form a single component.
US09368045B2	System and device for welding training A system and device for welding training. In one example, a welding system includes a device configured to be used with the welding system. The device includes a first marker having a first shape and a first color. The welding device also includes a second marker having a second shape and a second color. The first and second colors are different or the first and second shapes are different. Further, the first and second markers are configured to be detected by a video game system, a computer accessory, or some combination thereof, to determine a position of the device, an orientation of the device, or some combination thereof.
US09368041B2	Indicating an online test taker status using a test taker icon An aspect of the present invention relates to an online test platform adapted to facilitate the development, delivery, and management of educational tests with interactive participation by students, teachers, proctors, and administrators even when some or all of them are remotely located. The platform may include administrator interfaces, test proctor interfaces, and test taker (e.g. student) interfaces to allow each participant to view, navigate, and interact with aspects of the online test platform that are intended to meet their needs.
US09368039B2	Embedded learning tool An educational tool which is embedded within the functions of common computing devices. In the preferred embodiment, the educational tool is used as a “gateway” to a selected function or functions in a primary computing device, such as a cell phone. An educational question is presented to the user of the primary computing device. The educational question must be correctly answered before use of the selected function is allowed. The user's performance is preferably transmitted to a control computing device which can be used to monitor the user's performance.
US09368033B2	Upgrade system for a motor vehicle, and method for assisting a driver in driving a motor vehicle The field of use of a portable communication appliance (2)—for example a mobile telephone—is intended to be extended for assisting a driver in driving a motor vehicle (1). An upgrade system (10) for a motor vehicle (1) is provided, having a portable communication appliance (2) for providing at least one functionality which assists a driver in driving the motor vehicle (1). The portable communication appliance (2) can use image data from a camera (9) to infer a state of movement of a windscreen wiper (16, 17) on the motor vehicle (1). The portable communication appliance (2) then factors in this state of movement when providing the at least one functionality for driver assistance. An appropriate method is also provided.
US09368032B1	System and method for locating a vehicle within a parking facility A vehicle parked within a parking facility is found by first tracing a path from the vehicle to an entrance of the facility, using a portable electronic device that records data describing the path from movements of the device. Then, the path is retraced to return to the vehicle, with the device displaying a map of the path and a symbol indicating the current location of the device. Alternately, a portable radio beacon device is left in the vehicle to be turned on remotely by the portable electronic device, which then displays an indication of a direction from which signal from the beacon device is being received.
US09368029B2	GPS generated traffic information Disclosed herein is a traveler information monitoring and dissemination system. The system disclosed herein provides real time information to a traveler, wherein the real time information may be pre-selected by the traveler. The system ensures consistent and quality data are produced and issued to the traveler.
US09368028B2	Determining threats based on information from road-based devices in a transportation-related context Techniques for ability enhancement are described. Some embodiments provide an ability enhancement facilitator system (“AEFS”) configured to enhance a user's ability to operate or function in a transportation-related context as a pedestrian or a vehicle operator. In one embodiment, the AEFS is configured to perform vehicular threat detection based on information received at a road-based device, such as a sensor or processor that is deployed at the side of a road. An example AEFS receives, at a road-based device, information about a first vehicle that is proximate to the road-based device. The AEFS analyzes the received information to determine threat information, such as that the vehicle may collide with the user. The AEFS then informs the user of the determined threat information, such as by transmitting a warning to a wearable device configured to present the warning to the user.
US09368024B2	Remote control configuration using a remote control profile Utilizing remote control profile information for configuration of a remote control device. A media processing device may store a remote control profile, locally or on a server accessible via a wide area network, which may include information for configuring a remote control device to utilize one or more wireless remote control commands for controlling the media processing device. The media processing device may also detect one or more wireless remote control commands for controlling one or more other electronic devices and update the remote control profile to include information for configuring a remote control device to utilize those commands. It may be determined to configure a remote control device according to the remote control profile based at least in part on proximity of the remote control device to the media processing device. The remote control device may then be configured according to the remote control profile.
US09368021B2	Variable notification alerts Approaches in accordance with various embodiments attempt to provide a user with less disruptive event notifications by being aware of a user's context. Before a notification is sent to multiple computing devices associated with the notifying account, contextual information for each device is determined. The contextual information can be determined by querying each device for information. The information can include how close each device is relative to other devices associated with the same user, if at least one of the devices is moving, whether the user's attention is focused on a particular device, whether the user is engaging multiple devices simultaneously, and the like. Once contextual information associated with each device is determined, an appropriate type of alert associated with the notification is determined for each device. Accordingly, upon determining the appropriate alert for the most probable context of each device, the notification is sent to each computing device with the determined appropriate type of alert.
US09368014B1	Patient activity signature analysis Tools, strategies, and techniques are provided for remote, early detection of patient health condition based on deviations from established patterns of patient movement or other activity. Once established, a patient activity signature can be compared to observed patient behavior to detect unacceptable or unexpected deviations from the activity signature. Deviation from a patient movement signature can be detected and can cause an alert or other notification to be generated or communicated to a physician, for example, or other appropriate health care providers.
US09368012B2	Detector with integrated sensor platform An integrated system platform includes a sensor containing an embedded microcontroller and associated circuitry for providing safety critical functionality. Signal conditioning circuitry is coupled to the sensor along with gas concentration determining circuitry, alarm status circuitry and fault status evaluation circuitry. Wherein the sensor is operational with a main control module and at least one alarm output device.
US09368009B2	Home automation system monitored by security system A system is provided, where the system includes at least one security system sensor, at least one home automation device and a security system processor that monitors the security system sensor and generates an alarm upon activation of the at least one security system sensor. The security system processor also monitors the at least one home automation device and generates an alarm upon detecting the manual activation of the at least one home automation device.
US09368001B2	Device for handling banknotes The invention relates to a device for handling banknotes. The device comprises a display unit having a display surface for displaying at least one graphical user interface. Moreover, the device comprises a drive unit for tilting the display unit about the axis of rotation. The display unit is connected to a gear segment formed along a circular arc, the axis of rotation extending through the center of curvature of the circular arc. A gear which is operatively connected to the drive unit engages with the teeth of the gear segment formed along the circular arc.
US09367997B2	Double draw poker casino card game A method for playing a double draw poker casino card game comprises providing a standard fifty-two card deck of playing cards and two joker cards shuffled together with the standard fifty-two card deck. Each of the two joker cards is valued as an ace, as a fill-in card for a straight, or as a fill-in card for a flush. Each player places an ante bet and a bonus bet and receives five dealt cards. Each player folds or makes a first optional draw card bet and discards and draws up to three draw cards. Each player folds or makes a second optional draw card bet and discards and draws up to one draw card, producing a final double draw five card poker hand that receives a payout against a first payout table, for the ante bet and draw bets, and against a second payout table for the bonus bet.
US09367993B2	Drawing with participant interaction A promotional game is conducted over participants' cell phones. During a play period, a participant advances on a virtual game board using cell phone commands. During the play period, participants' gaming wagering is used to generate drawing tickets. Each player may text COUNT to receive a text message containing his or her current board position and total tickets accumulated. Alternatively, or in addition, he or she may go to the casino, text the word STATUS and have the same information depicted with accompanying animation on a video display. At the end of the play period each player may text PEEK to receive a message indicating whether or not he or she has won any prizes. To learn the number of prizes and their worth, the player may go to the casino, text the word REVEAL and have the prize details depicted with accompanying animation on the video display.
US09367992B2	Method and apparatus for providing secure and anonymous cash-out and cash-in values in a gaming system A method, apparatus, article of manufacture, and a memory structure for providing a payout to a player is disclosed. An ATM or ATM-like device is used to cash out of and cash into gaming devices with the player's fingerprint used to securely transfer the cash-in or cash-out data between the gaming device and the ATM. An embodiment is disclosed in which the information is passed between the ATM and the gaming device via a token.
US09367989B1	Method, system, and device for managing player data A method, device, and system for managing player data includes a player device that communicates with a server. The player device is configured to receive an allocation of game resources stored at the server and/or player device to a game feature in a game conducted, at least in part, using a game device. The game device generates and transmits a stream of game data to the server and/or player device for resolution of the game feature.
US09367988B2	Method for managing a game session related to a plurality of gaming machine terminals A computerized gaming system operates a plurality of gaming machine terminals coupled to a gaming server. A game session is initiated by a player for one gaming machine terminal. The game player thereafter identifies a second gaming machine terminal to be coupled to the same game session.
US09367983B2	Systems and methods for dispensing soft goods A soft good dispensing device includes a loading zone configured to receive a soft good supply in multiple different orientations, a scale configured to measure a weight of the soft good supply in the loading zone, a controller configured to estimate an amount of a soft good remaining on the soft good supply using the measured weight, a user interface configured to display the estimated amount of the soft good remaining and to receive a user selection of a desired quantity of the soft good, and a dispensing mechanism configured to automatically dispense the desired quantity of the soft good from the soft good supply.
US09367982B2	Automatic mobile communicator depot system and methodology A mobile telephone device distribution system including a customer interface allowing a customer to select a mobile telephone device and a telephone number to be associated with the mobile telephone device and a computerized mobile telephone dispenser operative to dispense a preselected mobile telephone having a customer preselected telephone number to the customer who earlier selected the mobile telephone device and the telephone number and automatically activate the mobile telephone device.
US09367976B2	Methods, software, and systems for providing policy-based access Methods, software, apparatus, and systems for policy-based access control are provided. In one embodiment, a method for providing policy-based access to a policy-controlled resource for a user, comprising: detecting an electronically encoded signal from a computer-controlled electronic access control service at a user-controlled computer-controlled electronic communications device proximate to the user; receiving an electronically encoded compliance query from the computer-controlled electronic access control service at the computer-controlled electronic communications device; determining an electronically encoded response to the electronically encoded compliance query using an electronically encoded, computer-controlled process on the computer-controlled computation device; and returning the electronically encoded response to the computer-controlled electronic access control service using the computer-controlled computation device.
US09367974B1	Systems and methods for implementing network connectivity awareness, monitoring and notification in distributed access control A system and method are provided for monitoring and aggregating performance of a plurality of independently-controlled access points and connections to a plurality of independently-owned access databases for confirming access to one or more of an access-controlled space, one or more access-controlled pieces of equipment and/or one or more access-controlled devices. A scheme is provided by which disconnections between a central coordination facility, and one or more of the remote databases may be isolated. The central coordination facility is provided a capacity to identify an outage in its communication to a particular database and (1) to determine a cause for the outage through coordination with the entity overseeing the database, (2) to evaluate any need for technical interaction of the central coordination facility, and/or (3) to initiate a notification protocol for end-users attempting to gain/grant access to a particular space, piece of equipment or device.
US09367970B2	Wireless engine monitoring system A wireless engine monitoring system (WEMS) includes an engine monitoring module that is mounted directly on an aircraft engine and records, stores, encrypts and transmits full flight engine data. The system preferably interfaces to the Full Authority Digital Engine Controller/Engine Control Unit (FADEC/ECU) and can record hundreds of engine parameters with a preferred sampling frequency of about one second. The engine monitoring module is preferably formed as a miniaturized module directly mounted on the aircraft engine within its cowling and has a conformal antenna. The engine monitoring module can also upload data for onboard processing.
US09367966B2	Smartphone augmented video-based on-street parking management system A method and a system for automating parking payment includes receiving video data in a sequence of frames provided by a video capture device observing a parking area. The method includes detecting a vehicle in the parking area using the video data. The method further includes receiving information of a vehicle in the parking area provided by a user device. The method includes comparing the characteristics of the detected vehicle with the information from the user device. In response to the characteristics of the detected vehicle being a match to the information sent from the user device, the method includes tracking the detected vehicle across the sequence of frames. The method includes computing a duration that the detected vehicle remains stationary using the tracking. The method includes computing an amount for charging the associated user device based on the duration.
US09367959B2	Mapping application with 3D presentation A device that includes at least one processing unit and stores a multi-mode mapping program for execution by the at least one processing unit is described. The program includes a user interface (UI). The UI includes a display area for displaying a two-dimensional (2D) presentation of a map or a three-dimensional (3D) presentation of the map. The UI includes a selectable 3D control for directing the program to transition between the 2D and 3D presentations.
US09367958B2	Method and apparatus for correction of errors in surfaces Methods and systems are disclosed for correcting segmentation errors in pre-existing contours and surfaces. Techniques are disclosed for receiving one or more edit contours from a user, identifying pre-existing data points that should be eliminated, and generating a new corrected surface. Embodiments disclosed herein relate to using received edit contours to generate a set of points on a pre-existing surface, and applying a proximity test to eliminate pre-existing constraint points that are undesirable.
US09367953B2	Graphics processing systems When rendering a scene that includes a complex object made up of many individual primitives, rather than processing each primitive making up the object in turn, a bounding volume which surrounds the complex object is generated and the scene is then processed using the bounding volume in place of the actual primitives making up the complex object. If it is determined that the bounding volume representation of the object will be completely occluded in the scene (e.g. by a foreground object), then the individual primitives making up the complex object are not processed. This can save significantly on processing time and resources for the scene.
US09367948B2	Flexible filter logic for multi-mode filtering of graphical texture data Multi-mode texture filters suitable for performing both bilinear filtering based on a fractional texture address and generating a weighted average of a group of texel values based on predetermined texel weighting coefficients as dependent on a filter mode signal. In embodiments, the weighted average may be accumulated over a variety of filter footprints. In embodiments, multi-mode texture filter logic includes a plurality of flexible filter blocks. In further embodiments, a pair of flexible filter blocks staged with each performing one lerp phase in the bilinear filter mode while a pair of flexible filter blocks in the flexible filter mode generate a weighted average over a pair of texels of a texel quad. In embodiments, each flexible filter block has a same microarchitecture, enabling an efficient utilization in either bilinear filter or flexible filter mode.
US09367945B2	Object information acquisition apparatus, display method, and computer-readable medium storing program A display control unit included in an object information acquisition apparatus receives information about a depth range, subjected to display of a distribution related to acoustic characteristics, input by a user, and outputs, when the depth range is narrower than a predetermined range, image information for displaying an image of second distribution information subjected to adaptive signal processing in an area corresponding to the depth range or a combined image obtained by combining first distribution information subjected to addition processing with a predetermined weight and the second distribution information.
US09367944B2	Tree model and forest model generating method and apparatus Provided is a tree model generating method according to an embodiment of the present invention. The tree model generating method includes separating and extracting a skeleton of a tree from an image including the tree to generate a matte image, applying a graph representation scheme of a two-dimensional (2D) object to the matte image to generate an object skeleton graph, generating a depth information value in accordance with a predetermined rule and allocating the generated depth information value to each node on the object skeleton graph to generate a three-dimensional (3D) primary tree model, adding branches to the primary tree model based on a branch library constructed in advance and the predetermined rule to generate a secondary tree model, and performing self-growth representation with respect to the secondary tree model based on a distance between each node on the object skeleton graph to generate a tertiary tree model.
US09367942B2	Method, system and software program for shooting and editing a film comprising at least one image of a 3D computer-generated animation Method for shooting and editing a film comprising at least one image of a 3D computer-generated animation created by a cinematographic software according to mathematical model of elements that are part of the animation and according to a definition of situations and actions occurring for said elements as a function of time, said method being characterized by comprising the following: computing of alternative suggested viewpoints by the cinematographic software for an image of the 3D computer-generated animation corresponding to a particular time point according to said definition; and instructing for displaying on a display interface, all together, images corresponding to said computed alternative suggested viewpoints of the 3D computer-generated animation at that particular time point.
US09367938B2	Method and apparatus for automated real-time detection of overlapping painted markup elements Various methods are provided for automated real-time detection of overlapping painted html elements.
US09367937B2	Apparatus and method for effective graph clustering of probabilistic graphs A clustering apparatus of probabilistic graphs, includes a center selection unit configured to select one or more centers among the probabilistic graphs. The clustering apparatus further includes a center determination unit configured to calculate a minimum bound and a maximum bound of a distance with respect to each of the centers, for each of the probabilistic graphs, and determine a center, among the centers, to which the probabilistic graphs are to be allocated based on the minimum and maximum bounds. The clustering apparatus further includes a clustering unit configured to allocate the probabilistic graphs to the center to generate one or more clusters.
US09367933B2	Layering a line with multiple layers for rendering a soft brushstroke A method for drawing a line having a gradient opacity across a width of the line includes receiving a path for rendering the line in a user interface, and rendering, by a computing device, a plurality of composite lines on a user interface along the path to form the line. The composite lines of the plurality of composite lines have different widths have an opacity, and are multilayered along the path. The method further includes centering, by the computing device, longitudinal-centers of the plurality of composite lines with a center of the path. The opacity of the plurality of composite lines is additive across portions of the width of the line to form the gradient opacity.
US09367932B2	Method and device for reconstructing a self-similar textured region of an image The invention proposes a method for reconstructing a self-similar textured region of an image. Said method comprises determining pixels of a part of the self-similar textured region by copying sample pixels from a sample part of the self-similar textured region, the sample pixels being selected using a neighborhood matching, wherein a size of neighborhoods used for matching is selected based on an analysis of descriptors computed from coefficients of OCT transform of differently sized blocks of the sample part. The analysis of descriptors computed from coefficients of DCT transform of differently sized blocks of the sample part allows for determining the neighborhood size close to a feature size of the texture.
US09367927B2	Moving image region detection device The moving image region detection device includes an updated block detection means, a natural image updated block determination means, and a moving image block extraction means. The updated block detection means compares pixel values between a frame of an input video and the previous frame, and detects a block including a pixel in which a value having been changed, as an updated block. The natural image updated block determination means calculates an index value representing a degree of continuity of changes in pixel values in the updated block, compares the calculated index value with a threshold, and determines whether it is an updated block of a natural image. The moving image block extraction means extracts a block determined to be an updated block of a natural image a given number of times or more in most recent frames including the frame, as a moving image block of a natural image.
US09367926B2	Determining a four-dimensional CT image based on three-dimensional CT data and four-dimensional model data The invention relates to a data processing method of determining a change of an image of an anatomical body part of a patient's body, the method being executed by a computer and comprising the following steps: a) acquiring static medical image data comprising static medical image information describing anatomical body part in a first anatomical spatial state of an anatomical vital spatial change of the anatomical body part; b) acquiring patient model data comprising patient model information describing a model body part corresponding to the anatomical body part, wherein the patient model information describes the model body part in a plurality of model spatial states of a model vital spatial change corresponding to the anatomical vital spatial change; c) determining spatial state mapping data comprising spatial state mapping information describing at least one of a first mapping from the model body part in a first one of the plurality of model spatial states to the model body part in a second, different one of the plurality of model spatial states, the first model spatial state corresponding to the first anatomical spatial state, and a second mapping from the model body part in the first model spatial state to the anatomical body part in the first anatomical spatial state; d) determining, based on the static medical image data and the spatial state mapping data, transformed medical image data comprising transformed medical image information describing the anatomical body part in a second anatomical spatial state of the anatomical vital spatial change, the second anatomical spatial state corresponding to the second model spatial state.
US09367925B2	Image detection and processing for building control Occupancy detection for building environmental control is disclosed. One apparatus includes at least one image sensor and a controller, wherein the controller is operative to obtain a plurality of images from the image sensor, determine a color difference image of a color difference between consecutive images, determine areas of the color difference image wherein the color difference is greater than a threshold, calculate a total change area as an aggregate area of the determined areas, create a list of occupancy candidates based on filtering of the determined areas if the total change area is less than a light change threshold, wherein each occupancy candidate is represented by a connected component, track the one or more occupancy candidates over a period of time, and detect occupancy if one or more of the occupancy candidates is detected to have moved more than a movement threshold over the period of time.
US09367923B2	Image processing apparatus with improved compression of image data of character images and background images using respective different compressing methods An edge image generating unit detects edges in an original image and generates an edge image from the edges. A connection pixel extracting unit extracts connection pixel sets in the edge image. A binary image generating unit classifies colors of the connection pixel sets into a predetermined number of achromatic target colors and a predetermined number of chromatic target colors if a color mode is set as color, and classifies the colors of the connection pixel sets into a predetermined number of achromatic target colors if the color mode is set as monochrome, where the number of the achromatic target colors set in the color mode of monochrome is larger than the number of the achromatic target colors in the color mode of color.
US09367919B2	Method for estimating position of target by using images acquired from camera and device and computer-readable recording medium using the same A method for estimating a position of a target by using an image acquired from a camera is provided. The method includes the steps of: (a) setting multiple virtual estimated reference points by dividing a view-path; (b) comparing altitude values of the respective estimated reference points with those of respective points on terrain; (c) searching neighboring virtual estimated reference points among the multiple virtual estimated reference points to satisfy a requirement under which a difference between an altitude zk of one point among the neighboring estimated reference points and that of the terrain corresponding thereto and a difference between an altitude zk+1 of the other point among the neighboring estimated reference points and that of the terrain corresponding thereto have different signs; and (d) determining that the actual position of the target exists between the searched estimated reference points Pk.
US09367916B1	Method and system of run-time self-calibrating lens shading correction A system, article, and method of run-time self-calibrating lens shading correction.
US09367901B2	Image processing apparatus and image processing method to generate images based on adjusted gain coefficients An image processing apparatus includes a frequency component generation unit, a coefficient acquisition unit, a detection unit, a gain adjustment unit, and a processed image generation unit. The frequency component generation unit is configured to generate a plurality of frequency component images based on an original image. The coefficient acquisition unit is configured to acquire a gain coefficient for gain correction. The detection unit is configured to detect edge information based on the gain coefficient. The gain adjustment unit is configured to adjust a gain of at least one of the plurality of frequency component images based on the gain coefficient and the edge information. The processed image generation unit is configured to generate a processed image based on at least one of the plurality of frequency component images with the gain adjusted by the gain adjustment unit.
US09367899B1	Document image binarization method A method for binarization of document image using multi-threshold process to determine an optimum global binarization threshold for the image. The optimum binarization threshold is determined by binarizing the document multiple times using different threshold values, and calculating the statistics of the useful information and noise for each threshold value to select the optimum threshold value.
US09367896B2	System and method for single-frame based super resolution interpolation for digital cameras A digital camera system for super resolution image processing is provided. The digital camera system includes a resolution enhancement module configured to receive at least a portion of an image, to increase the resolution of the received image, and to output a resolution enhanced image and an edge extraction module configured to receive the resolution enhanced image, to extract at least one edge of the resolution enhanced image, and to output the extracted at least one edge of the resolution enhanced image, the at least one edge being a set of contiguous pixels where an abrupt change in pixel values occur. The digital camera system also includes an edge enhancement module configured to receive the resolution enhanced image and the extracted at least one edge, and to combine the extracted at least one edge or a derivation of the extracted at least one edge with the resolution enhanced image.
US09367895B2	Automated sliver removal in orthomosaic generation Techniques for automatically removing slivers from orthomosaics. First, slivers may be identified, which may be based upon user-configurable characteristics such as width and length. Second, slivers may be replaced with portions of another image, such as an older image. Third, boundary slivers may optionally be removed. Fourth, remaining boundary or interior slivers can be inflated by expanding the sliver until it is no longer a sliver, which may include replacing a portion of an adjacent image portion with older imagery.
US09367890B2	Image processing apparatus, upgrade apparatus, display system including the same, and control method thereof An image processing apparatus, upgrade apparatus, display system and control method are provided. The image processing apparatus includes a signal input unit; a first image processing unit which processes an input signal input by the signal input unit to output a first output signal; an upgrade apparatus connection unit connected to an upgrade apparatus which includes a second image processing unit; and a first controller which controls at least one of the input signal processed by the first image processing unit and the first output signal to be transmitted to the upgrade apparatus and processed by the second image processing unit if the upgrade apparatus is connected to the upgrade apparatus connection unit.
US09367885B2	Method and system for adding and detecting watermark A watermarking method and system are provided. The watermarking system includes a server and a client in communication with each other. At first, the client sends a login request to the server. The server authenticates an access right of the client to access specific multimedia data and generates an identification code uniquely associated with the client according to the login request if the client is authenticated to have the access right to access the multimedia data. An on-screen watermark is generated according to the identification code and added onto the multimedia data to be played. The watermark-generating and adding step may be performed by either the server or the client. The on-screen watermark can be detected by a watermark-detecting method and system to trace privacy source.
US09367884B2	Privacy management policy hub A system architecture is disclosed that includes a privacy management system. In particular, the privacy management system provides a policy hub for maintaining and managing customer privacy information. The privacy management system maintains a master data database for customer information and customer privacy preferences, and a rules database for privacy rules. The privacy management system captures, synchronizes, and stores customer privacy data. Privacy rules may be authored using a privacy management vocabulary, and can be customized for an enterprise's privacy policies.
US09367880B2	Search intent for queries on online social networks In one embodiment, a method includes accessing a social graph that includes a plurality of nodes and edges, receiving from a user a structured query comprising references to selected nodes and selected edges, generating search results corresponding to the structured query, determine a search intent based on the selected nodes or selected edges referenced in the structured query, and scoring the search results based on the search intent.
US09367879B2	Determining influence in a network An influence maximization process efficiently identifies an influential set of nodes with which to seed a diffusion process using the transposition of a graph representing the network. This approach offers an acceptable tradeoff between runtime complexity and accurate approximation. In addition, using an approximation condition, the influence maximization process may be further tuned to dramatically reduce the computational complexity even more in certain circumstances while allowing a fallback to the unturned influence maximization process if the approximation condition is not satisfied.
US09367873B2	Account and customer creation in an on-line banking model A system, method and article of manufacture are provided for account and customer creation in an online banking model. An application is received from a customer. The application includes information relating to the user and also documentation relating to the user. A first computer is utilized to create a profile for the customer based on the application received from the customer. The first computer is also utilized to create an account for the customer. Information relating to the created profile and account is transmitted from the first computer to a second computer where a notification is generated. The notification indicates that the account has been created. The notification is transmitted from the second computer to the customer utilizing a network.
US09367866B2	Method and system to automatically qualify a party to participate within a network-based commerce transaction A method and system to automatically qualify a party to participate within a network-based commerce transaction is described. The system receives information from a first party. The information relates to an item to be transacted via a network-based commerce system. The system is further to receive, from a second party, a request to be qualified to transact the item via the network-based commerce system. The system is further to transmit, to the first party, a communication comprising information relating to the second party. The system is to further receive, from the first party, a response corresponding to the automatically generated communication and, responsive to receipt of the response, to automatically perform an authorization process based on the response.
US09367850B2	Smart button The present invention provides for systems and methods that facilitate conveying user information between and among users effectively to thereby create a collaborative filtering environment with maintained user privacy. More specifically, the present invention allows user-profile building to occur coincident with user-browsing, for example. This can be accomplished in part by incorporating an input component on the user interface used for browsing and/or searching. A user who has opted-in to construct a personal profile makes declarations regarding his relationship with at least a portion of the information being currently viewed. The declarations are annotated to the user's profile. At the user's discretion, the user's profile can be disseminated to others in whole or in part such that other people can make use of the user's expertise, experience or opinions. In addition, the user profiles can be machine-readable and searchable.
US09367845B2	Messaging customer mobile device when electronic bank card used A bank customer's CE device is texted by a bank computer when the customer's electronic debit or credit card (“e-card”) is sought to be used so that the customer is alerted to possibly fraudulent “fishing” of the e-card data by a nearby thief device.
US09367842B2	Software pin entry A card reader configured to read a smart card can be detachably connected to a mobile computing device. When the card reader is attached to the mobile device, an application installed on the mobile computing device permits the mobile device to communicate with the card reader in order to process transactions.Security measures can be used on the mobile device to prevent theft of a PIN during software PIN entry of a payment transaction. The mobile device can prevent the keypad or other input interface from displaying feedback. The mobile device can also prevent passcodes from being stolen by displaying media encoded with digital rights management (DRM) and by managing the media and user inputs at a secure server.A mobile device can securely communicate with a card reader for a payment transaction using asymmetric or symmetric encryption.
US09367837B2	Cash and/or financial document handling system A controller comprising: a database; a control module associated with the database; and a network interface configured to connect, over a network, to a plurality of workstations and at least one machine for performing operations to handle cash and/or other physical financial documents. The network interface receives requests from at least some of the workstations over the network, each comprising a request to pre-order a respective one of the operations. The requests are stored in the database. The network further receives, over the network, a signal from or on behalf of a slave module of the machine for retrieving one of the requests from the database. The control module processes the signal and in response releases the respective operation, the release comprising issuing an instruction to the slave module over the network controlling the machine to perform the respective operation to handle the cash and/or other physical financial document.
US09367833B2	Data services outsourcing verification A method and system for verifying outsource data and providing a certification system includes but is not limited to a method including receiving one or more deposits of one or more data elements in connection with an outsourcing transaction from or on behalf of a third party, verifying an identification of the third party, maintaining a transaction log to provide a validation record acknowledging receipt of the one or more deposits, and performing a cryptographic action against one or more aspects of the outsourcing transaction to provide a certified version of the transaction log to confirm the outsourcing transaction.
US09367830B2	Fulfilling orders for serialized products Various embodiments are directed to a method for fulfilling orders from an inventory comprising serialized products. For example, a computer system may receive an order and derive from the order a plurality of products, a unit quantity for each of the plurality of products, and a serial identifier referencing a first product unit of at least one of the plurality of products. At least one of the plurality of products may be a non-reserved product. Also, the computer system may determine a first bin selected from a plurality of non-reserved product bins that is associated with product units of the non-reserved product and generate a pick instruction specifying the first bin and the unit quantity of the non-reserved product specified by the order. The computer system may also instruct a robot to retrieve the first product unit from one of the plurality of robot accessible bins. The robot may be programmed to load product units to the plurality of robot-accessible bins and retrieve product units from the plurality of robot-acccessible bins.
US09367827B1	Cross-dock management system, method and apparatus Disclosed herein is a cross-dock management system comprises: a plurality of movable platforms configured to hold one or more pallets or parcels; at least one barcode or RFID tag positioned on each of said movable platforms, pallets, or parcels, wherein the barcode readers are configured to read the barcodes and RFID readers are configured to read the RFID tags. The data scanned by the barcode readers and RFID readers is stored in a local warehouse database and is used to determine an optimized placement and load for each movable platform in the warehouse.
US09367818B2	Transductive Lasso for high-dimensional data regression problems Various embodiments select features from a feature space. In one embodiment, a set of training samples and a set of test samples are received. A first centered Gram matrix of a given dimension is determined for each of a set of feature vectors that include at least one of the set of training samples and at least one of the set of test samples. A second centered Gram matrix of the given dimension is determined for a target value vector that includes target values from the set of training samples. A set of columns and rows associated with the at least one of the test samples in the second centered Gram matrix is set to 0. A subset of features is selected from a set of features based on the first and second centered Gram matrices.
US09367817B2	Methods and systems for identifying patients with mild cognitive impairment at risk of converting to alzheimer's Methods and systems for selecting a cohort group or a patient at risk from a population of patients with mild cognitive impairment. The methods include using a computer configured to perform the steps: receiving normalized learning data from a portion of the population of patients; tuning a set of decision trees on the normalized learning data; receiving patient data from one or more patients of the population, wherein the patient data is independent from the learning data; classifying the patient data with the tuned set of decision trees to obtain patient threshold values; and displaying the patient threshold values.
US09367815B2	Monte-Carlo approach to computing value of information The subject disclosure is directed towards the use of Monte Carlo (MC) procedures for computing the value of information (VOI), including with long evidential sequences. An MC-VOI algorithm is used to output a decision as to balancing the value and costs of collecting information in advance of taking action by running prediction model-based simulations to determine execution paths through possible states, and processing the results of the simulations/paths taken into a final decision.
US09367813B2	Methods and systems for identifying frequently occurring intradomain episodes and interdomain episodes in multiple service portals using average user session length Methods and systems for scalable extraction of episode rules using incremental episode tree construction in a multi-application event space comprise compiling events from multiple, different domain logs into in a universal log file, rolling domain-dependent and domain-independent windows through the universal log file to identify distinct event-pattern episodes, adding episodes to an episode tree data structure, pruning less frequent episodes from the episode tree, analyzing the episode tree to identify frequent episode rules, and applying the frequent episode rules to future interactions with users.
US09367808B1	System and method for creating thematic listening experiences in a networked peer media recommendation environment Systems and methods for providing a thematic playback experience in a peer-to-peer media recommendation system are disclosed.
US09367806B1	Systems and methods of using an artificially intelligent database management system and interfaces for mobile, embedded, and other computing devices The current disclosure generally relates to database management systems (DBMSs) and may be generally directed to methods and systems of using artificial intelligence (i.e. machine learning and/or anticipation functionalities, etc.) to learn a user's use of a DBMS, store this “knowledge” in a knowledgebase, and anticipate the user's future operating intentions. The current disclosure may also be generally directed to associative methods and systems of constructing DBMS commands. The current disclosure may also be generally directed to methods and systems of using a simplified DBMS command language (SDCL) for associative DBMS command construction. The current disclosure may also be generally directed to artificially intelligent methods and systems for associative DBMS command construction. The current disclosure may also be generally directed to methods and systems for associative DBMS command construction through voice input. Other methods, systems, features, elements and/or their embodiments are also disclosed.
US09367799B2	Neural network based cluster visualization that computes pairwise distances between centroid locations, and determines a projected centroid location in a multidimensional space A computing device presents a cluster visualization based on a neural network computation. First centroid locations are computed for first clusters. Second centroid locations are computed for second clusters. Each centroid location includes a plurality of coordinate values where each coordinate value relates to a single variable of a plurality of variables. Distances are computed pairwise between each centroid location. An optimum pairing is selected based on a minimum distance of the computed pairwise distances where each pair is associated with a different cluster of a set of composite clusters. Noised centroid location data is created. A multi-layer neural network is trained with the noised centroid location data. A projected centroid location is determined in a multidimensional space for each centroid location as values of hidden units of a middle layer of the multi-layer neural network. A graph is presented for display that indicates the determined, projected centroid locations.
US09367798B2	Spiking neuron network adaptive control apparatus and methods Adaptive controller apparatus of a plant may be implemented. The controller may comprise an encoder block and a control block. The encoder may utilize basis function kernel expansion technique to encode an arbitrary combination of inputs into spike output. The controller may comprise spiking neuron network operable according to reinforcement learning process. The network may receive the encoder output via a plurality of plastic connections. The process may be configured to adaptively modify connection weights in order to maximize process performance, associated with a target outcome. The relevant features of the input may be identified and used for enabling the controlled plant to achieve the target outcome.
US09367797B2	Methods and apparatus for spiking neural computation Certain aspects of the present disclosure provide methods and apparatus for spiking neural computation of general linear systems. One example aspect is a neuron model that codes information in the relative timing between spikes. However, synaptic weights are unnecessary. In other words, a connection may either exist (significant synapse) or not (insignificant or non-existent synapse). Certain aspects of the present disclosure use binary-valued inputs and outputs and do not require post-synaptic filtering. However, certain aspects may involve modeling of connection delays (e.g., dendritic delays). A single neuron model may be used to compute any general linear transformation x=AX+BU to any arbitrary precision. This neuron model may also be capable of learning, such as learning input delays (e.g., corresponding to scaling values) to achieve a target output delay (or output value). Learning may also be used to determine a logical relation of causal inputs.
US09367796B2	Method for predicting the properties of crude oils by the application of neural networks A method for predicting the properties of crude oils by the application of neural networks articulated in phases and characterized by determining the T2 NMR relaxation curve of an unknown crude oil and converting it to a logarithmic relaxation curve; selecting the values of the logarithmic relaxation curve lying on a characterization grid; entering the selected values as input data for a multilayer neural network of the back propagation type, trained and optimized by means of genetic algorithms; predicting, by means of the trained and optimized neural network, the physico-chemical factors of the unknown crude oil.The method comprises a training and optimization process of the multilayer neural network of the back propagation type.The method thus defined allows the most representative physico-chemical factors of crude oils to be predicted rapidly and without onerous laboratory structures, or alternatively the distillation curve of crude oils with an acceptable approximation degree.
US09367795B2	Momentum-based balance controller for humanoid robots on non-level and non-stationary ground A momentum-based balance controller controls a humanoid robot to maintain balance. The balance controller derives desired rates of change of linear and angular momentum from desired motion of the robot. The balance controller then determines desired center of pressure (CoP) and desired ground reaction force (GRF) to achieve the desired rates of change of linear and angular momentum. The balance controller determines admissible CoP, GRF, and rates of change of linear and angular momentum that are optimally close to the desired value while still allowing the robot to maintain balance. The balance controller controls the robot to maintain balance based on a human motion model such that the robot's motions are human-like. Beneficially, the robot can maintain balance even when subjected to external perturbations, or when it encounters non-level and/or non-stationary ground.
US09367794B2	Accurate persistent nodes A calibrated gate biasing circuit according to one embodiment includes a switched capacitor precision resistor; and a voltage reference. An electronic circuit for initiating a change in state of a host device, according to another embodiment, includes a counter coupled to a host device, the counter counting at a fixed interval, wherein the counter is reset to zero upon receiving a command from a remote device, wherein the count is compared to a reference value, wherein the host device changes states if the count matches the reference value, wherein operation of the counter continues in spite of an interruption in power supply from a power source. Asymmetrical differential amplifiers are also disclosed, according to various embodiments.
US09367786B2	Radio with embedded RFID A radio (100) comprises a radio housing (102) having external radio features (104, 106, 108, 110, 112, 114, 116) located on a surface of the radio housing. At least one of the external radio features is removable and replaceable by another external radio feature having a radio frequency identification (RFID) tag (120) embedded therein for retrofitting the radio (100) with RFID capability.
US09367783B2	Magnetizing printer and method for re-magnetizing at least a portion of a previously magnetized magnet A magnetizing printer and a method are described herein for printing one or more magnetic sources (maxels) having a first polarity onto a side of a previously magnetized magnet having an opposite polarity.
US09367781B2	Method and system for encoding and decoding mobile phone based two-dimensional code A method and a system for encoding and decoding a mobile phone based two-dimensional code are provided, by means of obtaining the data information inputted by a user and transforming the data information into a two-dimensional code the encoding of the two-dimensional code is embodied. Furthermore, by means of performing binarization processing on the two-dimensional code image to obtain the binary data information, which is parsed into text information by using the preset decoding algorithm, to facilitate mobile phone users in information exchanging using a two-dimensional code.
US09367775B2	Toner limit processing mechanism A method is disclosed. The method includes analyzing a meta-data structure corresponding to each tile of a sheetside image to detect a blank state of the sheetside image, detecting a sensing display item in a data stream and scanning the sheetside image in response to detecting the sensing display item.
US09367774B2	Setting storage device storing setting information associated with an adjustment information A setting storage device, includes: a storage unit which stores setting information and adjustment information to be associated with each other; and a control unit which, in case that, i) first setting information associated with first adjustment information is introduced, ii) second adjustment information has been stored in the storage unit, iii) the second adjustment information has the same name as the first adjustment information associated with the first setting information and iv) the second adjustment information has the same content as the first adjustment information associated with the first setting information, stores the first setting information in the storage unit to be associated with the second adjustment information without storing the first adjustment information.
US09367773B2	Managing font metrics for a rendering device A system for printing a document that includes one or more target fonts that are emulated with at least one substitute font in a manner that preserves the original pagination and line breaks of the document. A table is provided that lists strategies/logic for enabling the printing device to emulate each of a plurality of predetermined target fonts with a substitute font. These emulation strategies may include but are not limited to, identifying at least one of a resident font for the printing device, stretchable font, local font, downloadable font, font data provided by a 3rd party, or font data that is embedded in a received document. Target font metrics may be employed as “hints” to refine emulation information for the target font data.
US09367769B2	Device, method for image analysis and computer-readable medium A device, method for image analysis and a computer-readable medium are provided. The method includes loading a first video stream having a first resolution, and selecting one first video frame of the first video stream. When an object exists in the selected first video frame, determine whether an image of the object in the selected first video frame matches a preset condition. If yes, the method performs image analysis to the image of the object in the selected first video frame. If not, the method loads a second video stream having a second resolution higher than the first resolution, selects one second video frame of the second video stream that the object exists in it, and performs the image analysis to an image of the object in the selected second video frame.
US09367767B2	Data processor and computer-readable non-volatile recording medium for storing program for data processing Provided is a data processor for generating three-dimensional image data from two-dimensional original image data, the three-dimensional image data including depth value, the apparatus comprising: a first clustering processor for dividing the two-dimensional original image data into a first plurality of clusters based on brightness; a three-dimensional data generating unit for setting a predetermined direction as a brighter-to-darker direction, and for generating information, as first depth information, such that depth value for a first cluster among the plurality of clusters is set to be larger than depth value for a second cluster which neighbors the first cluster and is located nearer to a starting point of the brighter-to-darker direction than the first cluster where the brightness of the first cluster is darker than the brightness of the second cluster.
US09367764B2	Image processing system, image processing device, image processing method, program, and information storage medium for providing an aid that makes it easy to grasp color of an image A color information obtaining unit obtains color information of an attention point or an attention area within a target image. A similarity information obtaining unit obtains similarity information related to a level of similarity between color information of an image that is stored in a storage in advance and the color information obtained by the color information obtaining unit. A notification unit causes an output unit to output a notification based on the similarity information.
US09367762B2	Image processing device and method, and computer readable medium An image processing device and a method performed by a computer, the image processing device comprising: a processing unit configured to operate as an image acquisition unit configured to acquire an image; a similarity map generator configured to calculate, with a region constructed with one or a plurality of pixels in the image as a constituent unit, a first similarity map based on a first algorithm, the first similarity map representing a degree of similarity between the region and a marginal region of the image, and calculate a second similarity map based on a second algorithm, the second similarity map representing a degree of similarity between the region and the marginal region of the image; and a saliency map generator configured to integrate the first similarity map and the second similarity map to generate a saliency map.
US09367761B2	Electronic device and object recognition method in electronic device An electronic device for fast object recognition is provided. The electronic device includes a first storage unit configured to store digital image data, and a processor configured to recognize an object in first image data, to receive a second object related to the first object in the first image data from a second storage unit, to store the first and second objects in the first storage unit, and to use one or more of the first and second objects stored in the first storage unit to recognize an object in second image data.
US09367760B2	Coarse document classification in an imaging device Systems and methods coarsely classify unknown documents in a group or not with reference document(s). Documents get scanned into digital images. Counts of contours are taken. The closer the counts of the contours of the unknown document reside to the reference document(s), the more likely the documents are all of a same type. Embodiments typify contour analysis, classification acceptance or not, application of algorithms, and imaging devices with scanners, to name a few.
US09367747B2	Image processing apparatus, image processing method, and program An image processing apparatus includes a detection unit which detects an object which is included in an image; and a determination unit which determines a positional relationship between a detected object and a protective barrier region in a depth direction of the image based on a feature amount relating to at least one of the detected object and the protective barrier region, when the detected object and the protective barrier region overlap with each other in the image.
US09367740B2	System and method for behavioral recognition and interpretration of attraction A mobile system for identifying behavior of being physical attracted towards an individual includes a portable computing device carried by a user having at least one camera. For this system, interested individuals are those that exhibit behavioral indications of physical attraction, referred to here as a “check out”. The software includes an individual detector technique, such as infrared, that detects the presence of individuals in the proximity of the device's camera. The software further includes a body position identifier that determines whether an individual detected by the individual detector is facing the portable device. The software further includes a behavior analyzer that analyzes the body and eye movements of an individual detected to determine if the individual has checked out at the user. The computer further includes a recorder that records and counts instances of individuals checking out the user.
US09367739B2	Method of operating an iris recognition portable device and iris recognition portable device A proximity of a second user is sensed while a first user who is a registered user views an iris recognition portable device. Whether the second user is registered is checked according to whether an iris of the second user is recognized. The displayed screen may be altered when the second user is determined to be a non-registered user.
US09367725B2	Method and apparatus for performing different decoding algorithms in different locations A method and apparatus for decoding codes applied to objects for use with an image sensor that includes a two dimensional field of view (FOV), the method comprising the steps of providing a processor programmed to perform the steps of obtaining an image of the FOV and applying different decode algorithms to code candidates in the obtained image to attempt to decode the code candidates wherein the decode algorithm applied to each candidate is a function of the location of the code candidate in the FOV.
US09367723B1	Arrangement for and method of compatibly docking a cordless electro-optical reader with different docking stations A cordless, electro-optical reader is compatibly docked with different docking stations having station contacts located at different locations. A rechargeable battery is mounted in a housing that extends along a longitudinal axis. Multiple housing contacts are located on the housing. Some housing contacts conduct electrical power to recharge the battery; other housing contacts conduct electrical signals to and from a controller. Each housing contact has one exposed contact portion facing in a first direction, e.g., axially along the longitudinal axis, to make electro-mechanical contact with station contacts located at one location of one docking station, and another exposed contact portion facing in a different second direction, e.g., transversely of the longitudinal axis, to make electro-mechanical contact with station contacts located at another location of another docking station.
US09367720B2	Barcode reader which obtains a RAM image from a remote server A host device is configured to (i) establish a point-to-point connection with a barcode reader via a point-to-point communication interface, (ii) determine that the barcode reader is in a state wherein executable instructions necessary for providing decoded data to the host device are not present within memory of the barcode reader, (iii) use the network interface to connect to a configuration server and to receive, from the configuration server, executable instructions required for the barcode reader to be capable of providing the decoded data to the host device, (iv) provide the executable instructions to the barcode reader via the point-to-point connection, and (v) receive from the barcode reader, via the point-to-point communication interface, the decoded data only after the executable instructions have been loaded to volatile memory of the barcode reader.
US09367709B2	Mobile terminal Disclosed is a mobile terminal. The mobile terminal according to the present inventive concept, comprises: a case; a printed circuit board (PCB), which is arranged inside of the case, and on the surface of which is a temper detect pattern comprising first and second contact-type conductive patterns that are arranged adjacent to each other and a non-contact-type conductive pattern that is arranged apart from the first and second contact-type conductive patterns are provided; a detection circuit, which is electrically connected to the tamper detect pattern, for detecting whether the tamper detection pattern is conductive; and a pattern conduction module for controlling so that the first and second contact-type conductive patterns are conductive when the case is assembled, and the conduction of the first and second contact-type conductive patterns is released when the case is disassembled.
US09367707B2	System and method for using file hashes to track data leakage and document propagation in a network The system and method described herein may use file hashes to track data leakage and document propagation in a network. For example, file systems associated with known reference systems and various user devices may be compared to classify the user devices into various groups based on differences between the respective file systems, identify files unique to the various groups, and detect potential data leakage or document propagation if user devices classified in certain groups include any files that are unique to other groups. Additionally, various algorithms may track locations, movements, changes, and other events that relate to normal or typical activity in the network, which may be used to generate statistics that can be compared to subsequent activities that occur in the network to detect potentially anomalous activity that may represent potential data leakage or document propagation.
US09367706B2	Computation to gain access to service Access to some aspect of a service may be limited until a user has invested in performing some amount of computation. Legitimate users typically have excess cycles on their machines, which can be used to perform computation at little or no cost to the user. By contrast, computation is expensive for for-profit internet abusers (e.g., spammers). These abusers typically use all of their computing resources to run “bots” that carry out their schemes, so computation increases the abuser's cost by forcing him or her to acquire new computing resources or to rent computer time. Thus, the providers of free services (e.g., web mail services, blogging sites, etc.), can allow newly registered users to use some limited form of the service upon registration. However, in order to make more extensive use of the service, the user can be asked to prove his legitimacy by investing in some amount of computation.
US09367704B2	Apparatus and methods for displaying information regarding objects Apparatus, and methods utilizing such apparatus, are described for displaying information regarding an object including a terminal for collecting, manipulating, and displaying information regarding the object, and a location processor for determining the location of the terminal with respect to the object. The apparatus further includes an access processor programmed to deny a user of the terminal access to the information when the distance between the terminal and the object exceeds a specified value. The apparatus and methods are particularly useful when implemented in a hospital setting in which the user is a medical provider, the object is a patient, and the terminal is a mobile terminal.
US09367703B2	Methods and systems for forcing an application to store data in a secure storage location The present application is directed to methods and systems for redirecting write requests issued by trusted applications to a secure storage. Upon redirecting the write requests, the data included in those requests can be stored in the secure storage area of a client computer. In some embodiments, the methods and systems can include determining whether an application issuing the request is a trusted application that requires data to be stored in a secure storage repository. Upon making this determination, a filter driver can identify a secure storage area on a client computer and can redirect the write request to this secure storage. In other embodiments, the filter driver may deny requests of trusted applications to write to unsecure storage areas.
US09367699B2	Automating the creation and maintenance of policy compliant environments Embodiments of the present invention provide for a method, system, and apparatus for creating a publishable computer file. The method includes selecting a first computer file encapsulating a source security policy for a computing device and creating a second computer file using the source security policy of the first computer file to create a local security policy and to encapsulate the created local security policy and also an operating system security policy. The method further includes calculating a hash value for the second computer file and storing the hash value in a header for the second computer file. The method yet further includes encrypting the second computer file, wherein the encrypted second computer file once loaded into memory of the computing device is processed by the computing device.
US09367697B1	Data security with a security module A security module securely manages keys. The security module is usable to implement a cryptography service that includes a request processing component. The request processing component responds to requests by causing the security module to perform cryptographic operations that the request processing component cannot perform due to a lack of access to appropriate keys. The security module may be a member of a group of security modules that securely manage keys. Techniques for passing secret information from one security module to the other prevent unauthorized access to secret information.
US09367692B2	System and method for validating components during a booting process A method and system for validating components during a booting process of a computing device are described herein. The method can include the steps of detecting a power up signal and in response to detecting the power up signal, progressively determining whether software components of the computing device are valid. If the software components are determined to be valid, the computing device may be permitted to move to an operational state. If, however, at least some of the software components are determined to be not valid, the computing device may be prevented from moving to the operational state. In one arrangement, if the computing device is prevented from moving to the operational state, corrective action can be taken in an effort to permit the computing device to move to the operational state.
US09367691B2	Modify executable bits of system management memory page table A computing device to create a system management memory page table in response to the computing device powering on. The system management memory page table includes pages with executable bits. The computing device modifies the executable bits of the pages before launching an option read only memory of the computing device.
US09367688B2	Providing geographic protection to a system In one embodiment, a method includes determining a location of a system responsive to location information received from at least one of a location sensor and a wireless device of the system, associating the location with a key present in the system to generate an authenticated location of the system, and determining whether the authenticated location is within a geofence boundary indicated in a location portion of a launch control policy (LCP) that provides a geographic-specific policy. Other embodiments are described and claimed.
US09367687B1	Method for malware detection using deep inspection and data discovery agents A method of detecting malware is provided. The method includes (a) from a database of historic network traffic, identifying a suspect file that traveled through a network as being suspected malware, (b) deriving a distinctive signature based on contents of the suspect file, and (c) scanning a computerized device of the network for the distinctive signature to detect whether the suspect file is present on the computerized device. Embodiments directed to analogous computer program products and apparatuses are also provided.
US09367685B2	Dynamically optimizing performance of a security appliance A device may identify a set of features associated with the unknown object. The device may determine, based on inputting the set of features into a threat prediction model associated with a set of security functions, a set of predicted threat scores. The device may determine, based on the set of predicted threat scores, a set of predicted utility values. The device may determine a set of costs corresponding to the set of security functions. The device may determine a set of predicted efficiencies, associated with the set of security functions, based on the set of predicted utility values and the set of costs. The device may identify, based on the set of predicted efficiencies, a particular security function, and may cause the particular security function to be executed on the unknown object. The device may determine whether another security function is to be executed on the unknown object.
US09367683B2	Cyber security Systems and methods that use probabilistic grammatical inference and statistical data analysis techniques to characterize the behavior of systems in terms of a low dimensional set of summary variables and, on the basis of these models, detect anomalous behaviors are disclosed. The disclosed information-theoretic system and method exploit the properties of information to deduce a structure for information flow and management. The properties of information can provide a fundamental basis for the decomposition of systems and hence a structure for the transmission and combination of observations at the desired levels of resolution (e.g., component, subsystem, system).
US09367681B1	Framework for efficient security coverage of mobile software applications using symbolic execution to reach regions of interest within an application A method is described that involves receiving an application and generating a representation of the application that describes states of the application and transitions between the states. The method further includes referring to one or more rules and/or information from an inference engine that is observing the application's run time behavior to identify a region of interest within the application and reaching the region of interest by performing the following: identifying a path from the application's present state to the region of interest; representing states of the application along the path as logic expressions; solving the expressions to generate solutions to the expressions; causing stimuli to be provided to the application, where the stimuli correspond to the solutions.
US09367679B2	Input information authentication device, server device, input information authentication system, and program of device At the time of input of authentication information, even when the hand and the input screen are seen from the third person, guess of authentication information is made difficult. A plurality of keys serving as input means are divided into a first region and a second region. Then, the first region and the second region are caused to transit between a first state and a second state distinguished from each other depending on the displayed contents. When a region where a key to be inputted for the input of authentication information is arranged is in the second state, input to the above-mentioned plurality of keys is recognized as dummy.
US09367675B2	Method for verifying and calibrating time A method for verifying and calibrating time is provided. The method includes: receiving a password and related information sent by a client, obtaining related information and generating a dynamic password and comparing the related information with the dynamic password, determining whether a preset condition according to the prestored preset time is satisfied, computing offset rate according to a benchmark time offset value if the preset condition according to the prestored preset time is satisfied and determining whether a calibrating condition is satisfied, calibrating time offset value if the calibrating condition is satisfied, and returning successful verification information, returning successful verification information directly if calibrating condition is not satisfied.
US09367674B2	Multi mode operation using user interface lock A system and a method are disclosed for a computer implemented method to unlock a mobile computing device and access applications (including services) on a mobile computing device through a launcher. The configuration includes mapping one or more applications with a guest access code. The configuration receives, through a display screen of a mobile computing device, an access code, and determines whether the received access code corresponds with the guest access code. The configuration identifies the mapped applications corresponding to the guest access code and provides for display, on a screen of the mobile computing device, the identified applications.
US09367671B1	Virtualization system with trusted root mode hypervisor and root mode VMM A first component of a Hypervisor is loaded into the memory upon start up. The first component is responsible for context switching and some interrupt handling. The first component of the Hypervisor runs on a root level. An OS is loaded into a highest non-root privilege level. A second component of the Hypervisor is loaded into OS space together with the OS, and running on the highest non-root privilege level. A Virtual Machine Monitor is running on the root level. The second component of the Hypervisor is responsible for (a) servicing the VMM, and (b) enabling communication between VMM code launched on non-root level with the first component of the Hypervisor to enable root mode for the VMM. A Virtual Machine is running on a user level under control of the VMM.
US09367670B2	Managing a software item on a managed computer system A method and system is provided of managing a current software item on a managed computer system connectable to a management computer system via a computer network. The method includes identifying, using an agent application, the current software item on the managed computer system, identifying if the current software item is an unauthorized software item; and selectively disabling the unauthorized software item.
US09367664B2	Mobile apparatus for executing sensing flow for mobile context monitoring, method of executing sensing flow using the same, method of context monitoring using the same and context monitoring system including the same A mobile apparatus includes a sensing handler and a processing handler. The sensing handler includes a plurality of sensing operators. The sensing operator senses data during a sensing time corresponding to a size of C-FRAME and stops sensing during a skip time. The C-FRAME is a sequence of the sensed data to produce a context monitoring result. The processing handler includes a plurality of processing operators. The processing operator executes the sensed data of the sensing operator in a unit of F-FRAME. The F-FRAME is a sequence of the sensed data to execute a feature extraction operation.
US09367660B2	Electromigration-aware layout generation In some embodiments, in a method, cell layouts of a plurality of cells are received. For each cell, a respective constraint that affects a geometry of an interconnect to be coupled to an output pin of the cell in a design layout is determined based on a geometry of the output pin of the cell in the cell layout.
US09367659B2	Complex layout-based topological data analysis of analog netlists to extract hierarchy and functionality A system and method for reverse synthesizing an integrated circuit from a netlist. A netlist extracted from a device under review is received and converted to a connected graph. Blocks of cells are identified within the connected graph and a circuit model is formed from the blocks of cells, wherein forming includes iteratively building more complex blocks of cells from simpler blocks of cells.
US09367658B2	Method and apparatus for designing and generating a stream processor Embodiments of the invention provide a method and apparatus for generating programmable logic for a hardware accelerator, the method comprising: generating a graph of nodes representing the programmable logic to be implemented in hardware; identifying nodes within the graph that affect external flow control of the programmable logic; retaining the identified nodes and removing or replacing all nodes which do not affect external flow control of the programmable logic in a modified graph; and simulating the modified graph or building a corresponding circuit of the retained nodes.
US09367651B2	3D wearable glove scanner Disclosed is a 3D scanner in the form of a wearable glove that can be worn by a user to swiftly scan the objects that the user touches. Touching the edges or corners of the object is enough for the present invention to automatically generate the necessary 3D model of the object. The user can scan an object with holes regardless of the object's size. The wearable glove is thin and light, and can be folded and carried in the user's pocket ready for use at any time or place.
US09367650B2	Solar installation mapping In an example embodiment, a first set of estimated locations for calibration points in a roof is identified in a first satellite image, the first satellite image having a first zoom level and a first angle relative to ground. Then a second set of estimate locations for the calibration points is identified in a second satellite image, the second satellite image having a second zoom level and a second angle relative to ground. Actual locations for the calibration points are derived using the first and second sets of estimated locations, the first and second zoom levels, and the first and second angles. Then dimension information is calculated for the roof based on the derived actual locations for the calibration points.
US09367647B2	Method of providing system design An embodiment of a computer implemented method of providing a design of a system receives a relative performance specification for the system. A particular system design is returned that is expected to perform at about the relative performance specification.
US09367645B1	Network device architecture to support algorithmic content addressable memory (CAM) processing The present disclosure describes systems and techniques relating to processing of network communications. According to an aspect of the described systems and techniques, a network device includes a content addressable memory (CAM) device including random access memory (RAM) devices; and a register configured to store a value for the RAM devices of the CAM device; wherein the CAM device is configured to retrieve data stored in the RAM devices of the CAM device, at a received address offset by the value stored in the register, for comparison to at least a portion of a search string received from a network processor to handle network packet processing.
US09367643B2	Methods and apparatus for suppressing network feed activities using an information feed in an on-demand database service environment Disclosed are systems, apparatus, methods, and computer readable media for suppressing network feed activities using an information feed in an on-demand database service environment. In one embodiment, a message is received, including data indicative of a user action. An entity associated with the user action is identified, where the entity is a type of record stored in a database. A type of the entity is identified. It is determined whether the entity type is a prohibited entity type. When the entity type is not a prohibited entity type, the message data is saved to one or more tables in the database. The tables are configured to store feed items of an information feed capable of being displayed on a device. When the entity type is a prohibited entity type, the saving of the message data, to the one or more tables in the database configured to store the feed items, is prohibited.
US09367642B2	Flexible storage of XML collections within an object-relational database A database server determines, on an element-level of granularity, what form of VARRAY storage to map collections of elements defined by a XML schema. A collection element may be mapped to an in-line VARRAY or an out-of-line VARRAY. The determination may based on a variety of factors, including the database type mapped to the collection element, database limitations that limit the form storage for certain database types, and annotations (“mapping annotations”) embedded within that XML schema that specifying a database type for database representation of a collection element or a form of VARRAY storage.
US09367641B2	Predictive web page rendering using a scroll vector Systems, methods, and apparatus for improving a user experience during viewport scrolling is herein disclosed. Rendering and drawing of a viewport is performed for a destination viewport based on a viewport scroll vector calculated from a user scroll input at a display device. The destination viewport is rendered before viewports between a starting viewport and the destination viewport so that there is no lag in rendering when the scrolling action reaches the destination viewport. The compromise is that intermediate viewports may be rendered based on a thumbnail image in low resolution, but since these low-resolution portions of the webpage are viewed briefly as the webpage scrolls to the destination viewport, a user is unlikely to notice the reduced resolution.
US09367640B2	Method and system for creating linked list, method and system for searching data A method and system for creating a linked list and a method and system for searching data are disclosed. The method for creating the linked list includes obtaining a first linked list from a first storage area, in which the first linked list has at least one node, and each node at least includes first data; obtaining the first data of each node from the linked list; storing the first data into a preset second storage area and forming a second linked list. The method stores the node identifiers and the node pointers of the linked list preferentially using the continuous storage area, such that the times of cache updating which is triggered by the traverse operation are reduced, and the access speed of the accessed data is increased.
US09367638B2	Surfacing actions from social data Social data is used to extract actions that end users perform in order to provide deeplinks for search results. Social data from social networking services may be accessed and analyzed to identify actions performed by end users. Additionally, the social data may be analyzed to identify URLs of web pages at which the actions may be performed. Information regarding the actions and corresponding URLs is stored for use by a search engine service to provide deeplinks for search results returned in response to user search queries.
US09367637B2	System and method for searching a bookmark and tag database for relevant bookmarks A method comprises receiving a search request to search a bookmark package database storing bookmarks and tag information, e.g., user-generated keywords; using the search request to search the tag information in the bookmark package database to locate relevant bookmarks and to generate search results; and presenting the search results to a user. The search results may identify user-specific relevant bookmarks, and/or relevant bookmarks regardless of the creator. The method may include determining related terms and enabling selection of the related terms to initiate additional searching. The method may include generating a relevance value based on keyword order, meta-information type, number of bookmarks to a given content item, number of hits on a given bookmark, time of last bookmarking to a given content item, and/or content analysis. Search result organization may be based on the relevance values. The bookmark package database may further store automatically generated and user-generated meta-information.
US09367633B2	Method or system for ranking related news predictions Methods and systems are provided that may be utilized to rank related news predictions and to provide one or more predictions to a user. In a particular implementation, one or more digital signals representing a query may be generated at least partially in response to an article being accessed by a user. One or more digital signals representing one or more predictions comprising one or more sentence portions having one or more references to one or more future dates may be obtained based at least in part on a comparison of the one or more digital signals representing the query with one or more digital signals representing a prediction index.
US09367631B2	Dynamic directory and content communication Features for dynamic directory and content communication are described which provide bidirectionally optimize searches for users and/or content. One type of message which may be associated with a contact is a private descriptor identifying how the user wishes to identify the contact (e.g., other user). Other users of the system will not see this tag. Accordingly, when the user who provided the tag submits a search, the tag will be considered as part of the search. A global or public descriptor may also be associated with the contact. The public descriptor is added to the system by the contact and indicates how the contact wants the world to find and view him. All users of the system will see this tag. The public and private descriptors are used by a search engine to dynamically optimize searches conducted therewith.
US09367627B1	Selecting supplemental content for inclusion in a search results page Disclosed are various embodiments that involve selecting supplemental content to be included in a search results page. A search query is received. A set of search results is generated by executing a search based at least in part on the search query. A subset of supplemental content providers is selected based at least in part on respective relevancies of the supplemental content providers to the search query. A search results page is generated. The search results page is configured to present supplemental content from the subset of supplemental content providers in association with the set of search results.
US09367626B2	Computer implemented methods and apparatus for implementing a topical-based highlights filter Disclosed are methods, apparatus, systems, and computer readable storage media for filtering content to be displayed in an online social network. Highlights from a plurality of highlight sources relevant to a first user can be received. Topics or other subject matter associated with the received highlights can be identified and social network data to be presented to the first user can be determined based on the identified subject matter. In some implementations, data indicating the determined social network data can be generated and provided to a display device associated with the first user. A presentation including a reference to the determined social network data can be displayed on the display device.
US09367625B2	Search query interactions on online social networks In one embodiment, a method includes accessing a social graph that includes a plurality of nodes and edges, receiving from a user a structured query comprising references to selected nodes and selected edges, generating a query command based on the structured query based on the structured query comprising a first query constraint and a second query constraint, identifying a first set of nodes matching the first query constraint and at least in part matching the second query constraint, identifying a second set of nodes matching the second query constraint, and generating search results based on the first and second set of nodes.
US09367624B2	Identity workflow that utilizes multiple storage engines to support various lifecycles In one embodiment, an indication of a request pertaining to a user account is obtained, where the user account is associated with at least one user. An account type of the user account is determined, where the account type is one of two or more account types. One or more actions indicated by the request are performed based, at least in part, upon the account type.
US09367619B2	Large scale real-time multistaged analytic system using data contracts An analytic system may have a number of processing stages. One or more data sources may provide data to a first processing stage. The first processing stage may specify one or more data contracts having a schema describing a layout and types of data provided by the one or more data sources. Each of the processing stages may specify a respective data contract having a schema such that the processing stages may understand a layout and types of data provided as input to the processing stages. The data contracts me further specify a valid range of values for various items of data described by schemas. Data not conforming to a data contract may be automatically filtered out such that a corresponding processing stage may not be provided with the non-conforming data.
US09367618B2	Context based search arrangement for mobile devices Embodiments are directed towards managing mobile searches by enabling a user to indicate a context of a search query to narrow a scope of the search. A user may fine tune a search by selecting from a plurality of pre-defined contexts for which to perform a search query. In one embodiment, the user may combine two or more pre-defined contexts to create more complex contexts for use in customized context search queries. The user also enters one or more search terms. A subset of databases is selected from a plurality of databases associated with different subject categories. The subset of databases is selected as predefined by an operator based on the user's context, and searched based on the user's entered search terms and selected context. Results are then aggregated and provided to the user. Results may be rank ordered based on the given user context or user's previous search behavior.
US09367612B1	Correlation-based method for representing long-timescale structure in time-series data A system identifies a set of initial segments of a time-based data item, such as audio. The segments can be defined at regular time intervals within the time-based data item. The initial segments are short segments. The system computes a short-timescale vectorial representation for each initial segment and compares the short-timescale vectorial representation for each initial segment with other short-timescale vectorial representations of the segments in a time duration within the time-based data item (e.g., audio) immediately preceding or immediately following the initial segment. The system generates a representation of long-timescale information for the time-based data item based on a comparison of the short-timescale vectorial representations of the initial segments and the short-timescale vectorial representations of immediate segments. The representation of long-timescale information identifies an underlying repetition structure of the time-based data item, such as rhythm or phrasing in an audio item.
US09367611B1	Detecting improper position of a playback device A position of a playback device with respect to a base is detected and an orientation of the playback device is detected. The detected position is determined not to match a reference position for the detected orientation. Responsively, an indication is provided that the playback device is improperly positioned.
US09367608B1	System and methods for searching objects and providing answers to queries using association data System and methods are disclosed for providing answers to search queries, and for searching using association data without requiring keyword matching. Datasets representing objects and their properties are created from unstructured data sources based on natural language analysis methods, and can be used to answer queries about objects or properties of objects. Implementations include general information search engines and embodiments for searching products, services, people, or other objects without knowing the names of such objects, or searching for information about known objects by using either keyword-based queries or natural language queries such as asking questions. System and methods are also provided for creating a structured or semi-structured representation of various unstructured data, in contrast to the conventional term-vector or term-document matrix representation.
US09367607B2	Natural-language rendering of structured search queries In one embodiment, a method includes accessing a social graph that includes a plurality of nodes and edges, receiving an unstructured text query, identifying nodes and edges that correspond to portions of the text query, accessing a context-free grammar model, identifying query tokens from the grammar model that correspond to the identified nodes and edges, selecting grammars having query tokens that corresponding to each of the identified nodes and edges, and generating structured queries based on the selected grammars, where the structure queries are based on strings generated by the grammars.
US09367605B2	Abstract generating search method and system The present disclosure provides an information search method and system applicable in an information search system wherein each document has corresponding forward index data to address the issue of low search efficiency suffered by existing information search techniques. In one aspect, the method may include: receiving an inquiry word and obtaining one or more keywords contained in the inquiry word by segmentation; searching one or more documents matching the one or more keywords and forward index data corresponding to the one or more documents through the information search system's inverted index data; and determining an abstract of each of the one or more documents according to a corresponding document's forward index data, and outputting the abstract and information of the one or more documents as a search result. The proposed techniques can increase efficiency of information search and, at the meantime, guarantee accuracy of the search to a certain extent.
US09367602B2	Probabilistic cluster assignment A computing device to assign observations to clusters based on a statistical probability is provided. A first cluster assignment is defined by assigning the plurality of observations to a first set of clusters. A second cluster assignment is defined by assigning the plurality of observations to a second set of clusters. A set of composite clusters is defined based on the defined first set of clusters and the defined second set of clusters. For each observation, a statistical probability value for assigning an observation to each composite cluster of the defined set of composite clusters is computed based on the first and second cluster assignments and a composite cluster assignment is defined by assigning the observation to a cluster of the set of composite clusters based on the computed statistical probability value. The defined composite cluster assignment is stored.
US09367598B2	Merging an out of synchronization indicator and a change recording indicator in response to a failure in consistency group formation A first data structure stores indications of storage locations that need to be copied for forming a consistency group. A second data structure stores indications of new host writes subsequent to starting a point in time copy operation to form the consistency group. Read access is secured to a metadata storage area and a determination is made as to whether the second data structure indicates that there are any new host writes. In response to determining that the second data structure indicates that there are new host writes, write access is secured to the metadata storage area, the first data structure is updated with contents of the second data structure to determine which additional storage locations need to be copied for formation of a next consistency group, and the second data structure is updated to indicate that that the second data structure is in an initialized state.
US09367597B2	Automatically managing mapping and transform rules when synchronizing systems A method and associated system for managing rules that synchronize operations of a source system and a target system. A set of linked worksheets is generated as a function of the internal logic of the synchronization rules and of worksheets that represent data models of the source and target systems. These generated worksheets describe and relate data elements of the data models, extrinsic data that is stored externally to the source and target systems, and logical procedures performed by the synchronization rules. When the source data model, the target data model, or a logical procedure is revised, the linked worksheets are updated in response to the revision and these updates automatically propagate across the synchronization rules and across other components of the source system, the target system, and the synchronization mechanism.
US09367595B1	Method and system for visual wiring tool to interconnect apps A computer system includes a display interface; a user input device interface; and a processor cooperatively operable with the display and user input device interfaces. The processor provides a browser user interface that interacts with a user to selectively indicate (i) content fields displayed in the source user interface from which information is to be sent and (ii) content fields displayed in the destination user interface which are to receive the information from the source content fields. The computer system stores an indication of the destination app registered for the topic together with an indication of the selected destination content fields which are to receive the information from the selected content fields of the source app. The source app and destination app do not publish/subscribe to each other. An intermediary brokers messages from the source app, maps the data, and sends on to the destination app.
US09367593B2	Method for sorting and displaying data on a portable electronic device A method of sorting and displaying data on a portable electronic device includes: determining geographical coordinates of the portable electronic device, providing search criteria to the portable electronic device, performing a search in a database based on the search criteria resulting in a list of database records, determining a search area of the portable electronic device and displaying selected records from the list of database records on a display screen of the portable electronic device. Each of the selected records is located within a search radius, which originates at the geographical coordinates of the portable electronic device, and within the search area, which is determined based on a pointing direction of the portable electronic device.
US09367591B2	Client system and server Embodiments of the present invention provide a client system and a server for searching, through the Internet, useful information that matches more closely a user's intention. The system is used for searching questions or answers posted by members in a Q&A (question and answers) site which is used by users who are registered as members. The members are then classified into multiple types based on a database, in which posted questions and answers were separated, and attribute information of members. For each question and answer, the tendency of the type who often supports the contents is stored. In this way, a question or answer is searched based on not only a search keyword but also on a type of searcher.
US09367580B2	Method, apparatus and computer program for detecting deviations in data sources The present disclosure describes a method and an apparatus for detecting deviations in data sources, each data source comprising a plurality of data posts, each data post comprising a number of data values. The method comprises identifying (102) data post pairs, each pair comprising a first data post in a first data source and a second data post in a second data source, wherein, for a unique matching data attribute of the first data post and the second data post in a data post pair, a subset of the data value is equal. The method further comprises determining (104) whether individual of a plurality of combinations of data values of the first data post with data values of the second data post within each of the plurality of data post pairs fulfill individual of a plurality of relation pattern algorithms, and determining (106) a conformity level for the determined fulfillment of relation pattern algorithms for the plurality of data post pairs. The method further comprises selecting (108) relation pattern algorithm from the plurality of relation pattern algorithms based on the determined conformity level, and analyzing (110) data value combinations of individual data post pairs in relation to the selected relation pattern algorithm in order to detect data value combinations of individual data post pairs that does not conform to the selected relation pattern algorithm, a non-conformance indicating (114) a possible deviation in data of the individual data post pair.
US09367577B2	Method for processing patent information for outputting convergence index The present invention relates to a method for outputting a convergence index, and more particularly, to a method for outputting a convergence index by utilizing patent information. According to the method for outputting the convergence index of the present invention, the convergence index can be outputted by using time information related to a patent which is included in a patent group, a patent classification, and an industrial classification that corresponds to the patent classification. The method for outputting the convergence index of the present invention systematically outputs the convergence index by using patent data, which is an objective data, thereby outputting the convergence index which is objective and appropriate.
US09367573B1	Methods and apparatus for archiving system having enhanced processing efficiency Methods and apparatus for archiving files in a system with primary storage and secondary storage that reduces thread contention. A single input reader thread generates list of files for processing by multiple map threads that evaluate each file in a list against a number of archive policies, such as move, purge, index and delete. Reduce threads take the lists from the map threads and generates list of files for action under a given policy, e.g., move, purge, index, delete. This arrangement eliminates thread contention for files and lists.
US09367570B1	Ad hoc queryable JSON with audit trails Techniques are described for storing JavaScript Object Notion (JSON) formatted data in a database object. A server receives first and second JSON formatted data identifying the database object associated with a first user and second user, respectively. The first and second JSON formatted data are stored with audit records in a data store such that identification of changes to the database object is possible. The server judges whether it is possible to merge the stored first and second JSON formatted data by using operational transformation on the stored audit records. If the merging is judged possible, the server applies the stored first JSON formatted data along with the stored second JSON formatted data to the database object by using operational transformation.
US09367569B1	Recovery of directory information Locating a file object in a storage system includes determining at least one characteristic of the file object, obtaining a subset of nodes in the storage system by applying the at least one characteristic to criteria for storing file objects at particular ones of the nodes in the storage system, and examining the subset of nodes to determine if any contain the file object. A metadata location server may be used to obtain the subset of nodes. The criteria may include at least one policy relating to placement of objects corresponding to files at the time the files are created. The policies may relate to owners of the files. The characteristic information may include the owner of a target file corresponding to the file object, the date that the target file was created, a business organization associated with the target file, and/or the size of the target file.
US09367568B2	Aggregating tags in images In one embodiment, a method includes receiving, from a first user associated with an online social network, a request to view an image associated with the online social network, accessing the image, wherein the image includes multiple tags corresponding to multiple objects, generating an aggregated tag for two or more of the tags based on the proximity of the tags to each other, determining a social-graph affinity for each object in the aggregated tag, and rendering the image with a tag-label for the aggregated tag, where the description in the tag-label is based on the social-graph affinity for the objects associated with the aggregated tag.
US09367566B2	Tiled map display on a wireless device A tiled-map display control with a predictive caching technique that minimizes user wait time and provides at least the illusion of continuous panning, even while map tile images are being loaded. Important components of the tiled map display are its definition and cached use of map tiles, as well as the way that the map tiles are put together on a small screen. Easy, seamless, wait-free and convenient viewing of a map for a user of a wireless device provides information, e.g., mapped traffic conditions. The disclosed embodiments are techniques that have been reduced to practice in both a BREW platform, and then in a J2ME platform, and deployed for operation in major carrier wireless networks. The invention has particular applicability for use in wireless devices with typically smaller display screens requiring the need for panning, and limited bandwidth capabilities of the supporting wireless network.
US09367565B2	Polygon creation for an aquatic geographic information system A method of processing geo-statistical data includes piloting a watercraft with a monitoring system on a water body, taking measurements of a depth of the water body and the position of the watercraft using the monitoring system, and aligning the depth measurements with the position measurements. The method also includes creating a contour map from the depth and position measurements, creating a polygon on the contour map, and analyzing at least one of the depth and position measurements within the polygon.
US09367562B2	Distributing data on distributed storage systems A method of distributing data in a distributed storage system includes receiving a file into non-transitory memory and dividing the received file into chunks using a computer processor in communication with the non-transitory memory. The method also includes distributing chunks to storage devices of the distributed storage system based on a maintenance hierarchy of the distributed storage system. The maintenance hierarchy includes maintenance units each having active and inactive states. Moreover, each storage device is associated with a maintenance unit. The chunks are distributed across multiple maintenance units to maintain accessibility of the file when a maintenance unit is in an inactive state.
US09367561B1	Prioritized backup segmenting A method, article of manufacture, and apparatus for backing up data, including backing up an object to a repository, segmenting the object into a plurality of sub-objects, and assigning a priority to a sub-object. Segmenting the object may include segmenting the object based on file access patterns. Assigning a priority may include assigning a high priority based on file access patterns, or based on policy, among others.
US09367557B1	System and method for improving data compression Techniques for improving data compression of a storage system are described herein. According to one embodiment, a first sequence of data is partitioned into a plurality of data chunks in a first sequence order according to a predetermined chunking algorithm. The similarity of the data chunks is determined based on data patterns of the data chunks. The data chunks are reorganized into a second sequence order based on the similarity of the data chunks, the second sequence order being different from the first sequence order. The reorganized data chunks are compressed in the second sequence order into a second sequence of data, such that similar data chunks are stored and compressed together within the second sequence of data.
US09367555B2	Systems and methods for transformation of logical data objects for storage Systems and methods for transforming a logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Transforming the logical data object comprises creating in the storage device a transformed logical data object comprising one or more allocated storage sections with a predefined size; transforming one or more sequentially obtained chunks of obtained data corresponding to the transforming logical data object; and sequentially storing the processed data chunks into said storage sections in accordance with a receive order of said chunks, wherein said storage sections serve as atomic elements of transformation/de-transformation operations during input/output transactions on the logical data object. The processing may comprise two or more data transformation techniques coordinated in time, concurrently executing autonomous sets of instructions, and provided in a manner preserving the sequence of processing and storing the processed data chunks.
US09367554B1	Systems and methods for enhancing performance of a clustered source code management system A clustered source code management system is described. The system comprises a plurality of cluster nodes, a shared file server storing repository data, and a load balancer. Each of the plurality of cluster nodes is configured to receive an incoming request sent from a client computer, the incoming request being a source code management request to access repository data stored on the shared file server and process the incoming request to determine if a type of the incoming request is a cacheable request type. If the incoming request is of a cacheable request type, the cluster node is configured to determine if a valid cached response to the incoming request is available on storage media locally accessible to the cluster node; and, if so, respond to the incoming request by communicating the valid cached response to the client computer.
US09367549B2	Virtual private cloud that provides enterprise grade functionality and compliance Techniques to enforce policies with respect to managed files and/or endpoints are disclosed. A policy to be applied with respect to a synchronization set is received at a file management system. Compliance with the policy across a plurality of heterogeneous endpoints associated with the synchronization set is ensured by propagating the policy to the heterogeneous endpoints. Each of the endpoints is configured to enforce at the endpoint policies received from the file management system, including by responding in a manner prescribed by the policy to occurrence of a policy-triggering event defined in the policy.
US09367546B2	Method and apparatus for customizing syndicated data feeds A method and apparatus enables customized receipt of syndicated data feeds according to designated time periods. According to an exemplary embodiment, the method includes the steps of enabling a user to select a first syndicated data feed to be received by a first device during a first time period, and enabling the user to select a second syndicated data feed to be received by a second device during a second time period different from the first time period.
US09367543B2	Game achievements system Systems and method for providing a game achievements system where players are rewarded with game achievements based on mastering certain in-game facets of the games they play. Each game achievement may be conveyed in a profile as a badge or trophy, title, description, date, etc. Players may also accumulate points based on game achievements. A display interface may be made available such that a player may see his achievements and total points, as well as those of others.
US09367542B2	Facilitating access to resource(s) idenfitied by reference(s) included in electronic communications A technique for using a reference to identify permissions required to access a resource. One or more processors detect a reference in an electronic communication. The reference points to a resource stored in storage of a data processing system. The one or more processors identify a set of permissions required to access the resource pointed to by the reference in the electronic communication. The one or more processors then perform a set of access-oriented actions associated with the set of permissions.
US09367541B1	Terminological adaptation of statistical machine translation system through automatic generation of phrasal contexts for bilingual terms A method for terminological adaptation includes receiving a vocabulary pair including source and target language terms. Each term is in a class which includes a set of sequences. Contextual phrase pairs are extracted from a bilingual training corpus, each including source and target phrases. The phrases each include a sequence of the same class as the respective source and target terms as well as some associated context. Templates are generated, based on the contextual phrase pairs. In each template the source and target sequences of a contextual phrase pair are replaced with respective placeholders, each denoting the respective class of the sequence. Candidate phrase pairs are generated from these templates. In each candidate phrase pair, the placeholders of one of the templates are replaced with respective terms of a vocabulary pair of the same class. Some candidate phrase pairs are incorporated into a phrase table of a machine translation system.
US09367533B2	Method and system for generating and utilizing persistent electronic tick marks Consistent with embodiments of the invention, computer-based systems and methods for annotating documents with a special type of graphical icon—referred to herein as a tick mark—are provided. Accordingly, utilizing a document annotation tool consistent with one embodiment of the invention, a user can quickly and easily place a tick mark next to an element of a document (e.g., a word, sentence, paragraph, number, chart, graph or figure) being displayed to visually convey some information about that particular element of the document. A second user, who is viewing the same document subsequent to the first user placing the tick mark, will immediately recognize and appreciate the information conveyed by the placement of the tick mark.
US09367530B2	Distributed document co-authoring and processing A method and a device are disclosed including plug-in software components that are integrated with document processing software suites. The plug-in software components provide a set of integrated interfaces for collaborative document processing in conjunction with multiple remote file, data, and application service providers. The set of interfaces enable coauthoring a document, document merging, discovering and displaying context-sensitive metadata on a software dashboard based on permissions associated with the metadata and/or a client computing device, caching, symmetric distributed document merge with the multiple service providers, and integrated search and insertion of multimedia data in documents, among others. The documents typically include, but are not limited to formatted text documents, spreadsheet documents, and slide presentation documents.
US09367528B2	Method and device for document coding and method and device for document decoding The method of coding a structured document comprises: —a step of obtaining at least one pattern designated as “primary” representing at least one of the pieces of structural information of data of said document, —a step (200 to 230) of obtaining a part of the document different from the entirety of the document, —a step of creating at least one derived pattern formed by modifying a primary pattern, representing data of said part of the document and—a step of coding data of the document to provide a code, said code associating a pattern with at least one piece of coded data. In embodiments, during the coding step, a step is carried out of determining a pattern that best describes data to code, the pattern associated with said data being that closest pattern.
US09367522B2	Time-based presentation editing Systems and methods are disclosed herein for time-based editing of an electronic presentation. An electronic presentation editing interface for editing an electronic presentation is provided. The interface includes a digital canvas including multiple canvas objects in multiple canvas layers and a digital timeline including multiple timeline objects. Each canvas object is linked to a timeline object, and a location of a timeline object on the digital timeline is indicative of a time and a canvas layer that each linked canvas object is displayed on the digital canvas.
US09367519B2	Sparse matrix data structure Various embodiments relating to encoding a sparse matrix into a data structure format that may be efficiently processed via parallel processing of a computing system are provided. In one embodiment, a sparse matrix may be received. A set of designated rows of the sparse matrix may be traversed until all non-zero elements in the sparse matrix have been placed in a first array. Each time a row in the set is traversed, a next non-zero element in that row may be placed in the first array. If all non-zero elements for a given row of the set of designated rows have been placed in the first array, the given row may be replaced in the set of designated rows with a next unprocessed row of the sparse matrix. The data structure in which the sparse matrix is encoded may be outputted. The data structure may include the first array.
US09367517B2	Integrated circuit package with multiple dies and queue allocation A package includes a first die and a second die. The dies are connected to each other through an interface. At least one of the first and second dies includes a plurality of signal sources, wherein each source has at least one quality of service parameter associated therewith, and a plurality of queues having a different priorities. A signal from a respective one of the signal sources is allocated to one of the plurality of queues in dependence on the at least one quality of service parameter associated with the respective signal source. The interface is configured such that signals from said queues are transported from one of said first and second dies to the other of said first and second dies.
US09367515B1	Managing adaptive reboots on multiple storage processors A technique for managing a boot process on a data storage system having multiple storage processors is disclosed. A first storage processor communicatively coupled to and directs a second storage processor to perform one or more boot sequences. Elapsed time and timeout variables and an empty set of boot states are provided. After sleeping for a predetermined time the elapsed time variable is incremented. If the boot state of the second processor is not successful, the technique determines if the current boot state is a new boot state, and if so, the new boot state is added to the set of boot states and the elapsed time value is reset. The timeout value is set equal to the user defined value. If the elapsed time is less than the timeout value, the technique loops back to the sleep state and continues thereon, else if greater that the timeout value, a failure is indicated.
US09367514B2	Communication node and communication method In a network environment where end hosts communicate with each other through end nodes connected to a backbone network, when data is sent, each end host generates a packet including a header including host identifier information corresponding to a reception path and a destination path, and transfers the corresponding packet to the end node through an access network. The end node adds a new transport control protocol (TCP) header to the received packet and transfers it to the backbone network, thus controlling traffic, errors and the like in the backbone network.
US09367512B2	Systems and methods for dynamically updating virtual desktops or virtual applications in a standard computing environment The present invention provides systems and methods for dynamically updating computer memory and modifying function requests within virtual computing environments. Methods for updating computer memory environmental variables may comprise methods for modifying, computer processes, methods for providing client applications to capture and respond to information requests, and methods for configuring application frameworks to capture and respond to information requests.
US09367511B2	System method for managing USB data transfers by sorting a plurality of endpoints in scheduling queue in descending order based partially on endpoint frequency System and methods are provided for managing universal-serial-bus (USB) data transfers. An example system includes a non-transitory computer-readable storage medium including a first scheduling queue for sorting endpoints and a host controller. The host controller is configured to: store a plurality of endpoints for data transfers to the storage medium, an endpoint corresponding to a portion of a USB device; sort the plurality of endpoints in a first order; generate a first transmission data unit including multiple original data packets, the original data packets being allocated to the plurality of endpoints based at least in part on the first order; and transfer the first transmission data unit.
US09367508B2	Interface configuration for a memory card and memory card control device Card detection pin and input pin configured to receive an interface reset signal are connected to each other in a high-speed data transfer memory card. A memory card control device noncompliant with the memory card initializes the interface reset signal to a memory card to a second electric potential, and then when the memory card control device detects a first electric potential of the card detection pin of the memory card, the memory card control device determines that the memory card is mounted. When the memory card is mounted in such a memory card control device, the memory card control device does not detect the mounting of the memory card, and thus does not start subsequent operation such as driving the interface reset signal to the first electric potential and supplying electric power to the memory card.
US09367505B2	Coherency overcommit One or more systems, devices, methods, and/or processes described can receive, via an interconnect, messages from processing nodes, and a first portion of the messages can displace a second portion of the messages based on priorities of the first portion of messages or based on expirations times of the second portion of messages. In one example, the second portion of messages can be stored via a buffer of a fabric controller (FBC) of the interconnect, and the first portion of messages, associated with higher priorities than the second portion of messages, can displace the second portion of messages in the buffer. For instance, the second portion of messages can include speculative commands. In another example, the second portion of messages can be stored via the buffer, and the second portion of messages, associated with expiration times, can displace the second portion of messages based on the expiration times.
US09367503B2	Electronic device with card interface When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device executes signal assignment on a plurality of data pins peculiar to an operation mode indicated by the acquired operation mode information, thereby switching a data transfer width, and allowing the card-shaped device to operate in the operation mode.
US09367502B1	Communication methods and apparatus and power supply controllers using the same Communication methods and apparatus and power supply controllers using the same. The method includes transferring information over a line from a first location to a second location as a voltage signal while simultaneously transferring information over the same line from the second location to the first location as a current signal. Further, digital information may be transmitted over the same line. When applied to a power supply controller system, a master controller may control a plurality of slave controllers by initially setting up the slave controllers by transmitting digital information to the slave controllers, and then maintaining a set point for each controller while monitoring controller characteristics over the same lines.
US09367500B2	Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request.
US09367493B2	Method and system of communicating between peer processors in SoC environment A method and system comprises transferring data from a first processor to at least one pulse generator directly connected to an interrupt control of at least a second processor. The transferring of the data bypasses memory. The method further includes reading the transferred data directly from the at least one pulse generator by the at least a second processor.
US09367492B2	Storage virtualization apparatus causing access request process to be delayed based on incomplete count and storage virtualization method A storage virtualization apparatus includes: a first storing unit to store, with respect to each storage port, a process incomplete command count defined as number of commands not yet processed by the storage device having each storage port; a control unit to obtain process incomplete command counts accumulated by other storage virtualization apparatuses, and stores into a second storing unit a process incomplete command total count that is a total of the process incomplete command counts obtained from the other storage virtualization apparatuses and the first storing unit; and an access request responding unit to, when receiving an access request, obtain the process incomplete command total count about a storage port corresponding to the received access request, and to, when the obtained process incomplete command total count is larger than a prescribed number, cause completion timing of an access responding process to the access request to be delayed.
US09367487B1	Mitigating main crossbar load using dedicated connections for certain traffic types One embodiment of the invention sets forth a control crossbar unit that is designed to transmit control information from control information generators to destination components within the computer system. The control information may belong to various traffic paradigms, such as short-latency data traffic, narrow-width data traffic or broadcast data traffic. The physical connections within the control crossbar unit are categorized based on the different types of control information being transmitted through the control crossbar unit. The physical connections belong to the following categories: one-to-one (OTO) connections, one-to-many (OTM) connections, valid-to-one (VTO) connections, valid-to-many (VTM) connections wire-to-one (WTO) connections and wire-to-many (WTM) connections.
US09367485B2	Storage device, data processing device, registration method, and recording medium A storage device includes a switching unit which switches an access destination in a storage area between a first storage area and a second storage area in response to an access request from a host device; and a nonvolatile storage medium which stores a first host device information used to identify the host device in the second storage area, and a software module executed by a CPU provided in the host device, the software module comprising causing an authority grant unit which transmits a control signal for switching the access destination to the first storage area to the switching unit of the storage device, when the acquired first and second host device information are compared to find that the first and second host device information match with each other.
US09367482B2	Systems and methods to extend ROM functionality Various embodiments allow for flexible and secure updates of drivers for numerous types of external memory devices by utilizing an address-selection mechanism within a simple and secure ROM code to enable the loading of a dynamic routine from an external source into a dynamic memory. In certain embodiments, the routine enables a simple and trusted framework to access and modify the content of any number of complex memory devices via simple commands without affecting existing security measures. This increases the usable lifetime of secure ROM code, simplifies device validation, and shortens the overall development cycle by extending the functionality of secure ROM code while keeping the ROM code and any programming thereof simple.
US09367480B2	System and method for updating data in a cache In one embodiment, a computing system includes a cache having one or more memories and a cache manager. The cache manager is able to receive a request to write data to a first portion of the cache, write the data to the first portion of the cache, update a first map corresponding to the first portion of the cache, receive a request to read data from the first portion of the cache, read from a storage communicatively linked to the computing system data according to the first map, and update a second map corresponding to the first portion of the cache. The cache manager may also be able to write data to the storage according to the first map.
US09367479B2	Management of destage tasks with large number of ranks A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count, and a higher maximum count, of Task Control Blocks (TCBs) to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.
US09367477B2	Instruction and logic for support of code modification in translation lookaside buffers A processor includes a core with logic to execute a translated instruction. The translated instruction is translated from an instruction stored in a memory location. The processor further includes a translation lookaside buffer including logic to store translation indicators from a physical map. Each translation indicator indicates whether a corresponding memory location includes translated code to be protected. The processor further includes a translation indicator agent including logic to determine whether the buffer indicates whether the memory location has been modified subsequent to translation of the instruction.
US09367469B2	Storage system and cache control method A cache memory comprises a cache controller and a nonvolatile semiconductor memory as a storage medium. The nonvolatile semiconductor memory comprises multiple blocks, which are data erase units, and each block comprises multiple pages, which are data write and read units. The cache controller receives data and attribute information of the data, and, based on the received attribute information and attribute information of the data stored in the multiple blocks, selects a storage-destination block for storing the received data, and writes the received data to a page inside the selected storage-destination block.
US09367463B2	System and method utilizing a shared cache to provide zero copy memory mapped database Methods and systems for providing a plurality of applications with concurrent access to data are disclosed. One such method includes identifying attributes of an expected data set to be accessed concurrently by the applications, initializing a shared cache with a column data store configured to store the expected data set in columns and creating a memory map for accessing a physical memory location in the shared cache. The method may also include mapping the applications' data access requests to the shared cache with the memory map. Only one instance of the expected data set is stored in memory, so each application is not required to create additional instances of the expected data set in the application's memory address space. Therefore, larger expected data sets may be entirely stored in memory without limiting the number of applications running concurrently.
US09367458B2	Programmable coherent proxy for attached processor A coherent attached processor proxy (CAPP) within a primary coherent system participates in an operation on a system fabric of the primary coherent system on behalf of an attached processor (AP) that is external to the primary coherent system and that is coupled to the CAPP. The operation includes multiple components communicated with the CAPP including a request and at least one coherence message. The CAPP determines one or more of the components of the operation by reference to at least one programmable data structure within the CAPP that can be reprogrammed.
US09367455B2	Using predictions for store-to-load forwarding The described embodiments include a core that uses predictions for store-to-load forwarding. In the described embodiments, the core comprises a load-store unit, a store buffer, and a prediction mechanism. During operation, the prediction mechanism generates a prediction that a load will be satisfied using data forwarded from the store buffer because the load loads data from a memory location in a stack. Based on the prediction, the load-store unit first sends a request for the data to the store buffer in an attempt to satisfy the load using data forwarded from the store buffer. If data is returned from the store buffer, the load is satisfied using the data. However, if the attempt to satisfy the load using data forwarded from the store buffer is unsuccessful, the load-store unit then separately sends a request for the data to a cache to satisfy the load.
US09367454B2	Address index recovery using hash-based exclusive or Systems and methods are provided that facilitate retrieval of a hash index in an electronic device. The system contains an addressing component that generates a hash index as a function of an exclusive-or identity. The addressing component can retrieve the hash index as a function of a tag value. Accordingly, required storage area can be reduced and electronic devices can be more efficient.
US09367450B1	Address arithmetic on block RAMs Systems and methods are disclosed for reducing or eliminating address lines that need to be routed to multiple related embedded memory blocks. In particular, one or more inputs are added to a block Random Access Memory (RAM) such that when one or more of the inputs are asserted, the address input to the Block RAM may be incremented prior to being used to retrieve data contents of the block RAM. Thus, if address is provided to the block RAM and the address increment signal is asserted, data may be read from location instead of , where N may be an integer. Block RAMs with such address arithmetic may be used to implement wide First-In-First-Out (FIFO) queues, wide memories, and/or data-burst accessible block RAMs.
US09367449B2	Hierarchical garbage collection in an object relational database system Techniques of hierarchical garbage collection in an object-relational database system are described. When the object-relational database system receives a request to delete an object, the object-relational database system marks the object for deletion. A garbage collection procedure executing in the background can perform iterations of sweep and mark to delete the object and children objects of the object. In each iteration, a layer or “generation” of objects is deleted. The garbage collection procedure can continue the iterations until the object and all descendants of the objects are deleted.
US09367447B2	Removable memory card discrimination systems and methods Removable memory card discrimination systems and methods are disclosed. In particular, exemplary embodiments discriminate between secure digital (SD) cards and other removable memory cards that comply with the SD form factor, but support the Universal Flash Storage (UFS) protocol. That is, a host may have a receptacle that supports the SD card form factor and is configured to receive a device. In use, a removable memory card is inserted into the receptacle and, using an SD compliant interrogation signal, the host interrogates a common area on the card so inserted. The common area includes information related to capability descriptors of the card. An SD compliant card will respond with information such as capability descriptors about the SD protocol capabilities, while a UFS compliant card will respond with an indication that the card is UFS compliant. The host may then restart the communication with the card using the UFS protocol.
US09367445B2	Data processing apparatus, method for processing data, and computer readable recording medium recorded with program to perform the method A data processing apparatus includes a first storage device which stores compressed data therein, a second storage device which accesses and temporarily stores the compressed data stored in the first storage device, a data decompressor which generates decompressed data by decompressing the compressed data and outputs the decompressed data to the second storage device so that the decompressed data is temporarily stored in the second storage device, and a controller which accesses the decompressed data temporarily stored in the second storage device. The data decompressor directly scatters the decompressed data into a page cache based on addresses of the page cache. Accordingly, the operating speed of the program and the data processing apparatus can be improved.
US09367442B2	Allocating memory usage based on voltage regulator efficiency Systems and methods for allocating memory usage based on voltage regulator efficiency are disclosed. According to an aspect, a method may include receiving a first efficiency value of a first voltage regulator associated with a first memory device among multiple memory devices. The method may also include receiving a second efficiency value of a second voltage regulator associated with a second memory device of the memory devices. The method may also include receiving a request to write data to one of the first memory devices and the second memory device. The method may also include determining whether to write the data to the first memory device or the second memory device based on the first and second efficiency values. Further, the method may include writing the data to the first memory device or the second memory device based on the determination.
US09367438B2	Semiconductor integrated circuit and method for operating same First data to be written which is output from a function module (2) is supplied to a built-in memory (3) and a first buffer memory (11), and second data to be written which is output from the function module (2) is supplied to the built-in memory (3) and a second buffer memory (12). The first and second FIFO memories (13, 14) select and store data items having a predetermined number of outputs from a plurality of first and second output data items which are sequentially output from the first and second buffer memories (11, 12), and do not select other data items. A comparator (15) compares the data items having the predetermined number of outputs which are selected and are output by the first and second FIFO memories (13, 14) with each other.
US09367435B2	Integration testing method and system for web services A method of testing a web service includes obtaining web service metadata from the web service. Test cases are generated automatically using the web service metadata, heuristic algorithm modules selected based on the contents of the web service metadata, and stochastic processes. Energy selection logic is used to update test parameters included in the test cases between rounds of testing until a set of test cases is generated that produces test results meeting one or more predetermined criteria. Testing is performed periodically using that set of test cases until the test results indicate that the web service has changed. New test cases are automatically generated and used to test the web service until test results meet the one or more predetermined criteria.
US09367434B2	Testing framework for policy-based workflows A system comprehensively tests each feasible path in a policy-based Extensible Markup Language (XML) workflow. The system may receive an input workflow and parse workflow (or proxy code of the workflow) to construct a policy control flow graph. The system may identify paths in the policy control flow graph, such as each feasible path in the policy control flow graph. The system may determine path constraints for the identified paths, where the path constraints identify path conditions for traversing the identified path in the policy control flow graph. Then, the system may generate a set of test inputs for the workflow using the path constraints that, when input into the policy-based XML workflow, cause the workflow to traverse the identified paths.
US09367433B2	Generating input values for a test dataset from a datastore based on semantic annotations A technique for operating a user interface automation framework includes accessing a datastore that includes semantic annotations with a dataset generator. The dataset generator generates input values for a test dataset from the datastore based on the semantic annotations.
US09367432B2	Testing system The present subject matter relates a testing system for an application. The system includes a test data generation module to generate test data for a program code. The test data generation module in turn includes a relational expression creation module that determines a relational expression corresponding to a set of parameters of the program code based on a rule indicating a format of a valid test data for the parameters. A boundary recognition module identifies a set of boundary values of the parameters based on the relational expression. Further, a solver module then generates valid test data and invalid test data for the parameters based on the boundary values.
US09367431B2	Testing data silo In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for creating a data silo and testing with a data silo including, for example, initiating a test sequence against a production database within the host organization, in which the test sequence specifies: a) new data for insertion into the production database during the test sequence, and b) one or more test queries against the production database during the test sequence; performing a database transaction to insert the new data into the production database without committing the new data to the production database; recording names of one or more objects corresponding to the inserted new data, the one or more objects created as part of the transaction to insert the new data into the production database within a transaction entity object map; modifying the one or more test queries specified by the test sequence to no longer query against the production database by substituting the one or more test queries with references to the names of the one or more objects in operating memory separate from information stored within the production database; and executing the one or more modified test queries. Other related embodiments are disclosed.
US09367422B2	Determining and using power utilization indexes for servers A power utilization index is determined for a server that defines an amount of energy that is consumed by the server for a unit of workload performed by the server. Future power usage by the server may then be predicted based on the power utilization index and a projected workload demand on the server. Moreover, workload for the server may be selectively assigned in response to the predicting. The power utilization index may be determined by a obtaining measurements of power consumed by the server in response to various workloads. Measurements of workload demands placed on the server are also obtained for the workloads. The measurements of workload demands may separately account for demands placed upon a processor subsystem of the server, a memory subsystem of the server, a network communication subsystem of the server and a storage subsystem of the server, for the various workloads.
US09367421B2	Systems, methods, and computer programs products providing relevant correlation of data source performance A method performed by a monitoring tool in a computer system, the method including: for a set of network nodes in a computer system: applying a correlation formula on an input based on performance data of the set, and determining a correlation score based on applying the correlation formula, the correlation score indicating a correlation between network nodes in the set; determining, based on the correlation scores, a first list including a first plurality of network nodes having a correlation score that satisfies a first threshold; identifying a second plurality of network nodes included in the first list, the second plurality of network nodes having a correlation score that satisfies a second threshold, which indicates a correlation that is higher than the first threshold; analyzing the performance data of the second plurality against a constancy metric; and removing, based on the analyzing, the second plurality from the first list.
US09367419B2	Implementation on baseboard management controller of single out-of-band communication access to multiple managed computer nodes Certain aspects of the present disclosure are directed to a baseboard management controller (BMC). The BMC includes: a processor; a network interface controller assigned with a network address; and a memory having firmware. The firmware is configured to be, when executed at the processor, in communication with a plurality of computer nodes, and to receive, through the same network interface controller, management requests each for performing a management operation at one of the plurality of computer nodes and addressed to the same network address, the management requests being directed to at least two of the plurality of computer nodes.
US09367416B2	Safety circuit of an elevator, and method for identifying a functional nonconformance of a safety circuit of an elevator The invention relates to a safety circuit of an elevator and also to a method for identifying a functional nonconformance of the safety circuit of an elevator. In the method a message is formed in node A, a testing field is added to the message for testing the operation of the safety circuit of an elevator, and the aforementioned message containing the testing field is sent from node A to the communications bus in the safety circuit of the elevator.
US09367412B2	Non-disruptive controller replacement in network storage systems A network-based storage system includes multiple storage devices and system controllers. Each storage device in multiple aggregates of storage devices can include ownership portion(s) that are configured to indicate a system controller to which it belongs. First and second system controllers can form an HA pair, and can be in communication with each other, the storage devices, and a separate host server. A first system controller controls an aggregate of storage devices and can facilitate an automated hotswap replacement of a second system controller that controls another aggregate of storage devices with a separate third system controller that subsequently controls the other aggregate of storage devices. The first system controller can take over control of the second aggregate of storage devices during the automated hotswap replacement of the second system controller, and can exchange system identifiers and ownership portion information with the separate third system controller automatically during the hotswap.
US09367411B2	System and method for an integrated open network switch A device includes a first processing unit and a second processing unit. The first processing unit is configured to execute a performance test on the device. The second processing unit is in communication with the first processing unit, and is configured to migrate an application from the second processing unit to the first processing unit. The second processing unit is further configured to detect a failure of the first processing unit, to migrate the application to a third processing unit in response to the failure of the first processing unit, and to assign a first plurality of ports to the third processing unit in response to the failure of the first processing unit.
US09367410B2	Failover mechanism in a distributed computing system The disclosure is directed to failover mechanisms in a distributed computing system. A region of data is managed by multiple region servers. One of the region servers is elected as a “leader” and the remaining are “followers.” The leader serves the read/write requests from a client. The leader writes the data received from the client into the in-memory store and a local write-ahead log (“WAL”), and synchronously replicates the WAL to the followers. A region server designated as an “active” region server synchronizes a distributed data store with the data from the WAL. Active witness followers apply the data from the WAL to their in-memory store while shadow witness followers do not. Different types of servers provide failover mechanisms with different characteristics. A leader is elected based on their associated ranks—higher the rank, higher the likelihood of electing itself as a leader.
US09367409B2	Method and system for handling failures by tracking status of switchover or switchback Techniques for recovering from a failure at a disaster recovery site are disclosed. An example method includes receiving an indication to shift control of a set of volumes of a plurality of volumes. The set of volumes is originally owned by a second storage node. The first storage node is a disaster recovery partner of the second storage node. The method includes shifting control of the set of volumes. The method further includes during the shifting, changing a status of a flag corresponding to a progress of the shifting. The method also includes during a reboot of the first storage node, determining the status of the flag and determining, based on the status of the flag, whether to mount the set of volumes during reboot at the first storage node.
US09367406B2	Manageability redundancy for micro server and clustered system-on-a-chip deployments Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
US09367405B1	Managing software errors in storage systems A method is used in managing software errors in storage systems. It is detected that a first processor of a storage system has a problem performing an I/O on a logical object. The first processor has a first path to the logical object. The problem includes a software error. Whether responsibility of performing the I/O on the logical object is transferred to a second processor of the storage system is evaluated. The second processor has a second path to the logical object.
US09367404B2	Systems and methods for host image transfer Methods and systems for transferring a host image of a first machine to a second machine, such as during disaster recovery or migration, are disclosed. In one example, a first profile of a first machine of a first type, such as a first client machine, is compared to a second profile of a second machine, such as a recovery machine or a second client machine of a second type different from the first type, to which the host image is to be transferred, by a first processing device. The first and second profiles each comprise at least one property of the first type of first machine and the second type of second machine, respectively. At least one property of a host image of the first machine is conformed to at least one corresponding property of the second machine. The conformed host image is provided to the second machine, via a network. The second machine is configured with at least one conformed property of the host image by a second processing device of the second machine.
US09367403B2	Terminal and application restoring method The present invention provides a terminal, comprising: a judging unit for judging whether an application corresponding to a desktop icon can run normally upon receiving an operation instruction triggering the desktop icon; and a restoring unit for restoring the application in a preset manner when the application cannot run normally. Correspondingly, the present invention also provides an application restoring method. The technical solutions of the present invention can automatically restore an application that cannot run normally when the desktop icon is triggered, and can execute corresponding functions according to different responses to improve users' experience.
US09367401B2	Utilizing an incremental backup in a decremental backup system Utilizing an incremental backup in a decremental backup system. In one example embodiment, a method for utilizing an incremental backup in a decremental backup system includes creating a base backup that includes all original allocated blocks in a source storage at a first point in time. Next, an incremental backup is created that includes allocated blocks in the source storage that were newly allocated or were changed between the first point in time and a second point in time. The changed allocated blocks in the incremental backup are identified. During a third time period, a decremental backup is created and the incremental backup is ingested into the base backup by copying, into the decremental backup, original allocated blocks from the base backup that correspond to the changed allocated blocks in the incremental backup. Lastly, the newly-allocated blocks and the changed allocated blocks from the incremental backup are added to the base backup.
US09367390B2	Memory controlling method, memory storage device and memory controlling circuit unit A memory controlling method, a memory storage device and a memory controlling circuit unit are provided. The method includes: providing a first clock signal to a rewritable non-volatile memory module and reading a first data in the rewritable non-volatile memory module according to the first clock signal; providing a second clock signal to the rewritable non-volatile memory module and writing a second data into the rewritable non-volatile memory module according to the second clock signal. A frequency of the second clock signal is different from a frequency of the first clock signal. Accordingly, an operation speed of the rewritable non-volatile memory module may be increased and probabilities of having errors for some operations are decreased.
US09367387B2	Rate adaptive irregular QC-LDPC codes from pairwise balanced designs for ultra-high-speed optical transports Systems and methods for data transport include encoding one or more streams of input data using one or more Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders; controlling irregularity of the QC-LDPC encoded data while preserving the quasi-cyclic nature of the LDPC encoded data and eliminating the error floor phenomenon. A parity-check matrix may be partially reconfigured to adapt one or more code rates; and one or more signals are generated using a mapper, wherein the output of the mapper is modulated onto a transmission medium. One or more streams of input data are received, and the streams are decoded using one or more QC-LDPC decoders.
US09367380B2	Dynamically altering error logging activities in a computing system Dynamically altering error logging activities in a computing system, including: receiving, by an error logging manager, historical error resolution data; identifying, by the error logging manager in dependence upon the historical error resolution data, a plurality of computing components associated with each error contained in the historical error resolution data; and associating, by the error logging manager in a related component repository, an identification of each of the plurality of computing components associated with each error and an identification of the error.
US09367373B2	Automatic configuration consistency check Reliability and performance of complex applications executed across workload groups of one or more host computer systems may be improved by automating the verification of consistent policies across the workload groups. An automatic verification process may be executed on a host computer system to identify workload groups that are not collecting statistics, to identify polices that are not enforced on certain workload groups, to identify policies that are not in force for certain periods of the day, and to identify policies that are disabled. Where an application has a complex configuration, the automatic verification process allows an administrator to identify inconsistent policies.
US09367369B2	Automated merger of logically associated messages in a message queue Embodiments of the invention provide a method, system and computer program product for message merging in a messaging queue. In an embodiment of the invention, a method for message merging in a messaging queue can be provided. The method can include receiving a request to add a new message to a message queue in a message queue manager executing in memory by a processor of a host computing platform. The method can also include a merge indicator to stipulate whether or not a merge should take place. The method also can include identifying an association key associating the new message with an existing message in the message queue and locating an associated message in the message queue corresponding to the identified association key. Finally, the method can include merging the new message with the located associated message in the message queue.
US09367367B2	Application router A process for registering applications is disclosed. The applications typically work in a Session Initiation Protocol (SIP) JSR 289 environment. A request to register a application to monitor a communication session is received. A first instruction that identifies a first event in the communication session is received from the application. An event may be the sending of a specific type of packet, such as a SIP INVITE. The first event in the communication session is detected. In response to detecting the first event in the communication session, the application is registered to monitor the communication session according to the first instruction. A notification is also sent to the application to monitor the communication session according to the first instruction.
US09367362B2	Administration of virtual machine affinity in a cloud computing environment Administration of virtual machine affinity in a cloud computing environment, where the cloud computing environment includes a plurality of virtual machines (‘VMs’), the VMs composed of modules of automated computing machinery installed upon cloud computers disposed within a data center, the cloud computing environment also including a cloud operating system and a data center administration server operably coupled to the VMs, including installing, by the cloud operating system on at least one VM, an indicator that at least two of the VMs have an affinity requirement to be installed upon separate cloud computers; communicating, by at least one of the VMs, the affinity requirement to the data center administration server; and moving by the data center administration server the VMs having the affinity requirement to separate cloud computers in the cloud computing environment.
US09367356B2	Resource access control Various embodiments can control access to a computing resource (e.g., a memory resource) by detecting that a high priority activity is accessing the resource and preventing a lower priority activity from accessing the resource. The lower priority activity can be allowed access to the resource after the high priority activity is finished accessing the resource. Various embodiments enable memory operations to be mapped to account for changes in data ordering that can occur when a lower priority activity is suppressed. For example, when an activity requests that data be written to a logical memory region, a mapping is created that maps the logical memory region to a physical memory region. The data can then be written to the physical memory region.
US09367354B1	Queued workload service in a multi tenant environment Tasks to be performed for a user can be outsourced to a workload service operable to process those types of tasks. Information for the tasks, such as code to be executed and data to be processed, can be stored to a queue for the workload service. The workload service can pull the task when an appropriate resource is available and provide the result to the user. The user can be charged only for the approximate time of the processing, without need to obtain the resource for an extended period of time resulting in unused capacity. The user can take advantage of queuing, data, and code storage services whereby tasks can contain pointers to code, data, and other information needed for a task. The workload service can pre-load the supporting code or information needed to provide an environment in which code of the type for the user task can be executed.
US09367350B2	Meta-scheduler with meta-contexts A process in a computer system creates and uses a meta-scheduler with meta-contexts that execute on meta-virtual processors. The meta-scheduler includes a set of schedulers with scheduler-contexts that execute on virtual processors. The meta-scheduler schedules the scheduler-contexts on the meta-contexts and schedules the meta-contexts on the meta-virtual processors which execute on execution contexts associated with hardware threads.
US09367341B2	Encrypting and decrypting virtual disk content using a single user sign-on A mechanism for automatically encrypting and decrypting virtual disk content using a single user sign-on is disclosed. A method of embodiments of the invention includes receiving credentials of a user of a virtual machine (VM) provided as part of a single sign-on process to access the VM, referencing a configuration database with the received credentials of the user, determining encryption and decryption policy settings for the VM from the configuration database, and at least one of encrypting or decrypting, by the VM, files of the VM based on the determined encryption and decryption policy settings.
US09367337B1	Cloud-based personalization of shared resources Methods and systems for personalization in a shared environment are provided. Information is stored in memory regarding the shared environment to which a plurality of users are provided with access. A plurality of files are also stored in memory. Each file is specific to one of the users and may be updated to include information regarding changes to a resource as made in a session associated with the user. Subsequent access by the user to the resource may be based at least in part on the updated file. For example, in some embodiments, a request may be received over a communication network; the request may concern a rollback for an identified user. A session associated with the identified user may then be restored based on a file associated with the identified user and including information regarding changes to the session associated with the identified user.
US09367333B2	Booting a printer A method for booting a printer includes storing a configuration image of the printer on a network storage device. The configuration image includes an input/output (I/O) initialization sequence for at least one component of the printer and I/O flow control steps and timing. The method further includes downloading the configuration image from the network storage device to the printer and playing back the initialization sequence and flow control based on the configuration image.
US09367330B1	Method of accessing files in electronic devices In a method for accessing files in an electronic device, a Random Access Memory (RAM) disk is set-up to store the file system root of the electronic device. At least one file system to be mounted is discovered in the electronic device. Mount points are established on the RAM disk for each file system. Drive identifiers are assigned for each file system. A file access request comprising a first file name path comprising a drive identifier is detected. The drive identifier is mapped to a mount point and a second file name path based on the mount point and the first file name path is formed. Thereupon, a file is accessed using the second file name path in the electronic device.
US09367329B2	Initialization of multi-core processing system This disclosure is directed to use of shared initialization and configuration vectors, which are delivered to processing cores in a multi-core processor using packets. An initialization core may include reset logic that may read initialization and configuration vectors from a centralized storage location, which may be on a die containing the processing cores (e.g., a fuse, etc.), off the die (e.g., in volatile memory, flash memory, etc.), or a combination of both. The initialization core may then generate packets to transmit the initialization and configuration vectors to processing cores that await initialization (e.g., following a reset). In some instances, the initialization and configuration vector information may be shared by two or more cores of a same type.
US09367326B2	Multiprocessor system and task allocation method A multiprocessor system includes a master processor, at least one slave processor, and a synchronization unit. The master processor has a first flag indicating whether the master processor is in a task activation accepting state and a second flag reflective of a flag of a slave processor, iteratively updates the first flag at a frequency based on the volume of tasks processed by the master processor, and activates a task on the master processor or the slave processor based on the first flag and the second flag. Each slave processor has a third flag indicating whether the slave processor is in the task activation accepting state and iteratively updates the third flag at a frequency based on the volume of tasks processed by the slave processor. Tasks are allocated to the slave processor by the master processor. The synchronization unit synchronizes the third flag and the second flag.
US09367323B2	Processor assist facility An operation is provided to signal a processor that action is to be taken to facilitate execution of a transaction that has aborted one or more times. The operation is specified within an instruction or is itself an instruction. The instruction is executed based on detecting an abort of the transactions, and includes a field indicating how many times the transaction has aborted. The processor uses this information to determine what action is to be taken.
US09367318B1	Doubling thread resources in a processor Methods and systems are provided for managing thread execution in a processor. Multiple instructions are fetched from fetch queues. The instructions satisfy the condition that they involve fewer bits than the integer processing pathway that is used to execute them. The instructions are decoded, and divided into groups. The instructions are processed simultaneously through the pathway, such that part of the pathway is used to execute one group of instructions and another part of the pathway is used to execute another group of instructions. These parts are isolated from one another so the execution of the instructions can share the pathway and execute simultaneously and independently.
US09367317B2	Loop streaming detector for standard and complex instruction types A processor includes a microcode storage comprising a plurality of microcode flows and a decode logic coupled to the microcode storage. The decode logic is configured to receive a first instruction, decode the first instruction into an entry point vector to a first microcode flow in the microcode storage, the entry point vector comprising a first indicator specifying a number of clock cycles associated with the first microcode flow, initiate the microcode storage, wherein the microcode storage inserts microinstructions of the first microcode flow into an instruction queue, count clock cycles after initiating the microcode storage, and decode a second instruction without first receiving a return from the microcode storage, wherein the second instruction is decoded at a particular clock cycle based on the number of clock cycles associated with the first microcode flow.
US09367315B2	Image processing semiconductor device and image processing device Provided is an image processing device capable of an image processing with using a general-purpose image processing hardware in accordance with video input without mediation of a CPU. The image processing device includes: a storage medium for storing an image data acquired by video inputting unit for acquiring video images; a CPU for a general processing; image processing unit for processing the image data stored in the storage medium; setting unit for determining a processing content of the image processing unit; a command list indicating an order of setting and activating the image processing unit; and command writing unit for setting and activating the image processing unit based on the command list in synchronization with input of the image data from the video inputting unit without mediation of the CPU.
US09367313B2	Run-time instrumentation directed sampling The invention relates to implementing run-time instrumentation directed sampling. An aspect of the invention includes a method for implementing run-time instrumentation directed sampling. The method includes fetching a run-time instrumentation next (RINEXT) instruction from an instruction stream. The instruction stream includes the RINEXT instruction followed by a next sequential instruction (NSI) in program order. The method further includes executing the RINEXT instruction by a processor. The executing includes determining whether a current run-time instrumentation state enables setting a sample point for reporting run-time instrumentation information during program execution. Based on the current run-time instrumentation state enabling setting the sample point, the NSI is a sample instruction for causing a run-time instrumentation event. Based on executing the NSI sample instruction, the run-time instrumentation event causes recording of run-time instrumentation information into a run-time instrumentation program buffer as a reporting group.
US09367312B2	Processor efficiency by combining working and architectural register files A processor includes an execution pipeline configured to execute instructions for threads, wherein the architectural state of a thread includes a set of register windows for the thread. The processor also includes a physical register file (PRF) containing both speculative and architectural versions of registers for each thread. When an instruction that writes to a destination register enters a rename stage, the rename stage allocates an entry for the destination register in the PRF. When an instruction that has written to a speculative version of a destination register enters a commit stage, the commit stage converts the speculative version into an architectural version. It also deallocates an entry for a previous version of the destination register from the PRF. When a register-window-restore instruction that deallocates a register window enters the commit stage, the commit stage deallocates local and output registers for the deallocated register window from the PRF.
US09367309B2	Predicate attribute tracker In an embodiment, a processor includes a register attribute tracker configured to track one or more attributes corresponding to registers. The register attribute tracker may track the attributes associated with the registers when those registers are used as output registers of instructions that explicitly define the attributes and, if the register attribute tracker has a tracked attribute associated with an input register of an instruction that does not explicitly define the attribute, the register attribute tracker may annotate the instruction with an attribute and/or associate an attribute with the output register of the instruction in the register attribute tracker.
US09367307B2	Staged points-to analysis for large code bases A method, system, and computer-readable medium (CRM) for performing a staged points-to analysis of an object-oriented codebase, including obtaining the codebase and a points-to query, slicing the codebase to obtain a program slice, and performing a type analysis of the program slice to compute a type set. The method, system, and CRM include refining the program slice, after performing the type analysis, by resolving virtual dispatch sites based on the type set, and performing, after refining the program slice, a context-insensitive points-to analysis of the program slice to compute a first points-to set. The method, system, and CRM include re-refining the program slice, after performing the context-insensitive points-to analysis, by resolving the virtual dispatch sites based on the first points-to set, and performing, after re-refining the program slice, a context-sensitive points-to analysis of the program slice to compute a second points-to set, which is provided to a developer.
US09367303B2	Upgrade packet generation method, server, software upgrade method, and mobile terminal A method of generating a Firmware Over-The-Air (FOTA) upgrade package is disclosed, comprising: determining whether a file having a same filename or being similar as a file in a software package of a new version exists in a software package of an old version; when there exists a file having a same filename or a similar file, generating a difference file between the file in the software package of the old version and the file in the software package of the new version and adding the difference file into the FOTA upgrade package, and when there doesn't exist a file having a same filename or a similar file, adding the file in the software package of the new version into the FOTA upgrade package. An FOTA upgrading method, a server, and a mobile terminal are also disclosed.
US09367298B1	Batch configuration mode for configuring network devices In general, techniques are described for a batch configuration mode for configuring network devices. A network device comprising a committed data source and a control unit may implement the techniques. The control unit may receive a plurality of separate commit commands instructing the network device to commit configuration changes to the committed data source. Each of the plurality of commit commands instructs the network device to commit an associated portion of the configuration changes to the committed data source. The control unit then groups two or more of the plurality of separate commit commands to form a batch of commit commands and executes the batch of commit commands to commit the portions of the configuration changes associated with the grouped commit commands to the committed data source as if the grouped portions of the configuration changes were associated with a single commit command.
US09367297B2	Method for operating an IT system, and IT system having at least one first processing unit and one second processing unit connected to one another An IT system includes at least one first processing unit and one second processing unit. The first and second processing units jointly execute an application program and are each associated with an installation routine designed to control updating of a first or second program part of the application program. A first actual state is associated with the first processing unit and a second actual state is associated with the second processing unit. After system reboot, or as soon as the first and second program part have been successfully stored, or an error is detected when storing the first and/or second program part, predefined processing steps are respectively carried out in a predefined order by the first processing unit aid the second processing unit depending on the actual state of the first processing unit and the actual state of the second processing unit.
US09367295B2	Methods for virally distributing location-based applications A location-based messaging system and its methods of operation are disclosed, including methods for virally distributing location-based applications are also disclosed. Methods for sending geographic location information for a target address from a computing device to a receiving device that will enable the receiving device to display a map and/or directions from a geographic location of the receiving device to the geographic location of the target address, methods for processing and distributing location-based data, and methods for receiving and responding to location-based data.
US09367294B2	Systems and methods for disambiguating dialects in limited syntax languages to reduce system fragility An embodiment generally relates to systems and methods for improving system performance by reducing fragility of computing systems. A processing module can identify separate ensemble files each comprising interpretations, by separate entities of a workflow, of a phrase in a file. The processing module can compare the interpretations to determine if the interpretations are the same or essentially the same. If the interpretations are neither the same nor essentially the same, a subsequent entity in the workflow can create a new file that replaces an associated interpretation of the phrase with a common interpretation. The subsequent entity can proceed with an intended operation.
US09367288B2	Device and method responsive to influences of mind An anomalous effect detector responsive to an influence of mind comprises a source of non-deterministic random numbers, SNDRN, a phase-sensitive filter and a results interface. In some embodiments, the phase-sensitive filter comprises a complex filter. An artificial sensory neuron comprises a SNDRN. Preferably, several artificial sensory neurons are grouped in a small volume. An analog artificial sensory detector comprises a plurality of analog artificial sensory neurons, an abstracting processor and a control or feedback unit. Some embodiments include an artificial neural network. An artificial consciousness network contains a plurality of artificial neural networks. One of the artificial neural networks comprises an activation pattern meta-analyzer. An artificial consciousness device comprises a cluster of artificial consciousness networks, a sensory input device to provide sensory input signals to the input of one or more ANNs in ACD, and an output device.
US09367282B2	Electronic music box Music data memory includes pieces of music within a group and other pieces of music outside the group. The next piece to be played is automatically determined by random table among pieces within the group. Favorite or newest piece is weighted to be more frequently played in the group. Piece in music data memory is automatically included into the group by random table. Newly downloaded piece into music data memory is included into the group by priority. Most frequently played piece is excluded from the group in place of newly included piece. Favorite or newest piece may be an exception of exclusion. Next piece is capable of being played in tempo similar to that of preceding piece by means of tempo-adjusted or piece replacement or repetition of the same piece for the purpose of continued baby cradling in synchronism with the same tempo of succeeding pieces.
US09367280B2	Dual screen visibility with virtual transparency Generally, this disclosure provides devices, systems and methods to provide dual screen visibility with virtual transparency. A device may include a dual-sided display element to display a first image on a first side of the display element and to display a second image on a second side of the display element; an activation detection module to detect a user request to initiate the dual screen visibility mode; an image processing module to generate a horizontally transposed version of the second image; and an image rendering module. The image rendering module may be capable of, in response to the initiation request, displaying the horizontally transposed version on the first side of the display element and adjusting a relative transparency between the first image and the displayed horizontally transposed version.
US09367278B2	Image processing apparatus, image forming apparatus, and image processing method An image processing apparatus includes a print processing portion, a first determination portion, a first determination target excluding portion, and a print color mode switching portion. The first determination portion determines, for each page of the document sheets, whether or not each of a plurality of divided areas is of a color type that is different from the print color mode. The first determination target excluding portion excludes divided areas that are determined as being of a color type that is different from the print color mode in a first set number or more of pages of the document sheets, from determination targets of the first determination portion from then. The print color mode switching portion is able to switch the print color mode during the print process when the number of divided areas that are the determination targets of the first determination portion becomes a predetermined number or smaller.
US09367277B2	Image processing apparatus An image processing apparatus is wirelessly connected to an external communication apparatus that includes a communicator that performs wireless communication with the image processing apparatus, a display that displays information on a screen, a sound generator that generates a sound, and a sound transmitter that sends the generated sound. The image processing apparatus includes a wireless communicator that performs wireless communication with the external communication apparatus, a display that displays information on a screen, a sound receiver that receives the sound sent from the sound transmitter, and a screen switch that switches a screen of the display based on the sound received by the sound receiver. When the sound transmitter sends the sound based on screen information displayed on the display of the external communication apparatus and the sound receiver receives the sound, the screen switch switches the screen of the display of the image processing apparatus according to the screen information.
US09367269B2	Printing apparatus and wireless communication method to implement charging control for printing a print data transmitted by a communication terminal This invention provides a technique capable of appropriately executing, for a communication terminal apparatus, charging processing for printing. When a printing apparatus detects a communication terminal, if the ID information of the communication terminal matches ID information corresponding to a communication terminal which has transmitted print target data, the printing apparatus executes charging processing for printing of the print target data, and print processing for the print target data.
US09367268B2	Print production scheduling A print production system includes a dispatcher and a task-resource scheduler. The dispatcher sorts print requests for placement among a series of containers to identify relative priorities among all print requests in each container and then merges the containers together to produce a prioritized list of print requests among all containers. Upon release by the dispatcher of a top N print requests from the prioritized list, the scheduler converts the prioritized list into a task-resource schedule for print production.
US09367266B2	Information processing apparatus, control method, and storage medium An information processing apparatus includes a first generation unit configured to generate a first print queue, and a second generation unit configured to generate a second print queue by operating a printer driver corresponding to the first print queue, wherein, after the second generation unit generates the second print queue, a printer list program for displaying printer information, which is printer-related information, displays the printer information about a printer corresponding to the first print queue and does not display the printer information about a printer corresponding to the second print queue.
US09367263B2	Transaction check instruction for memory transactions A processing unit of a data processing system having a shared memory system executes a memory transaction including a transactional store instruction that causes a processing unit of the data processing system to make a conditional update to a target memory block of the shared memory system conditioned on successful commitment of the memory transaction. The memory transaction further includes a transaction check instruction. In response to executing the transaction check instruction, the processing unit determines, prior to conclusion of the memory transaction, whether the target memory block of the shared memory system was modified after the conditional update caused by execution of the transactional store instruction. In response to determining that the target memory block has been modified, a condition register within the processing unit is set to indicate a conflict for the memory transaction.
US09367262B2	Assigning a weighting to host quality of service indicators Quality of service indicators are provided from a host via a host interface. The quality of service indicators relate to data stored in a non-volatile data storage via the host. Workload indicators related to the quality of service indicators are measured, and a weighting is assigned to the host in response to a correlation between the quality of service indicators and the measured workload indicators. The weighting is applied to the quality of service indicators when responding to data access requests from the host.
US09367258B2	Systems and methods for managing storage space in hybrid data storage systems The present invention relates to systems and methods for managing storage space in hybrid data storage systems. Specifically, the systems and methods of the present invention intelligently allocate data to solid state drives or other relatively high performance drives, and other data storage, such as, for example, hard drives or other like drives, based on data source, data type, data function or other like parameters. The intelligent allocation between at least one solid state drive, or other relatively high performance drive, and at least one other drive type allows for greater system performance through efficient use storage space. Specifically, the present invention adaptively uses the fastest necessary connected storage options in a hybrid data storage set to maintain maximum performance while most efficiently using minimum rewrites of data. Moreover, the allocation of data to storage in a hybrid data storage system may be controlled automatically or may be specifically set by a user thereof.
US09367255B2	Storage device including variable resistance memory, flash memory and controller A storage device includes a variable resistance memory, a flash memory and a controller. The flash memory includes a plurality of memory cells connected to a plurality of word lines. The controller is configured to receive data from an external device and program the received data in the variable resistance memory or the flash memory according to a quantity of data to be programmed in the flash memory. Further, the controller is configured to read from the variable resistance memory and program the read data in the flash memory, when the quantity of data accumulated in the variable resistance memory corresponds to a super page of data.
US09367254B2	Enhanced data verify in data storage arrays To provide enhanced operation of data storage devices and systems, various systems, methods, and software are provided herein. In a first example, a data storage system is configured to provide at least a portion of a first data storage device as a verification cache for a storage region of a second data storage device, write data for storage in the verification cache of the first data storage device and write the data for storage in the storage region of the second data storage device. The data storage system is configured to perform a verification process on the data written to the storage region after a verification trigger condition has been met. The data storage system is configured to transfer portions of the data that fail to pass the verification process from the verification cache to supersede the one or more parts of the data in the storage region.
US09367252B2	System and method for data replication using a single master failover protocol A system that implements a data storage service may store data on behalf of storage service clients. The system may maintain data in multiple replicas of various partitions that are stored on respective computing nodes in the system. The system may employ a single master failover protocol, usable when a replica attempts to become the master replica for a replica group of which it is a member. Attempting to become the master replica may include acquiring a lock associated with the replica group, and gathering state information from the other replicas in the group. The state information may indicate whether another replica supports the attempt (in which case it is included in a failover quorum) or stores more recent data or metadata than the replica attempting to become the master (in which case synchronization may be required). If the failover quorum includes enough replicas, the replica may become the master.
US09367251B2	System and method of a shared memory hash table with notifications A method and apparatus of a device that includes a shared memory hash table that notifies one or more readers of changes to the shared memory hash table is described. In an exemplary embodiment, a device modifies a value in the shared memory hash table, where the value has a corresponding key. The device further stores a notification in a notification queue that indicates the value has changed. In addition, the device invalidates a previous entry in the notification queue that indicates the value has been modified. The device signals to the reader that a notification is ready to be processed.
US09367247B2	Memory access requests in hybrid memory system Incoming memory access requests are routed in a set of incoming queues, the incoming memory access requests comprise a range of host logical block addresses (LBAs) that correspond to a memory space of a primary memory. The host LBA range is directly mapped to clusters of secondary memory, the secondary memory corresponding to a memory space of a secondary memory. Each incoming memory access request queued in the set of incoming queues is transformed into one or more outgoing memory access requests that include a range of secondary memory clusters or one or more clusters of secondary memory clusters. The outgoing memory access requests are routed in a set of outgoing queues. The secondary memory is accessed using the outgoing memory access requests.
US09367241B2	Clustered RAID assimilation management In one embodiment, a node of a cluster is coupled to a storage array of storage devices. The node executes a storage input/output (I/O) stack having a redundant array of independent disks (RAID) layer that organizes the storage devices within the storage array as a plurality of RAID groups. Configuration information is stored as a cluster database. The configuration information identifies the RAID groups associated with the storage devices. Each RAID group is associated with a plurality of segments and each segment has a different RAID configuration.
US09367239B2	Navigation device and method for displaying alternative routes A navigation device has a route re-calculation function. This is activated by the user touching the screen to task away from the normal navigation map mode to a menu screen which displays multiple types of route re-calculation options.
US09367236B2	System and method for processing touch actions A system and method for processing touch actions are provided. A plurality of sequentially performed touch actions including a first touch action and a second touch action are determined on a touch interface of an electronic device. An initiation location and a completion location of each of the first and second touch actions are determined on the touch interface. A command is selected based on the determined completion location of the first touch action, the second touch action, and the determined initiation location of the second touch action. The selected command is executed on the electronic device.
US09367235B2	Detecting and interpreting real-world and security gestures on touch and hover sensitive devices “Real-world” gestures such as hand or finger movements/orientations that are generally recognized to mean certain things (e.g., an “OK” hand signal generally indicates an affirmative response) can be interpreted by a touch or hover sensitive device to more efficiently and accurately effect intended operations. These gestures can include, but are not limited to, “OK gestures,” “grasp everything gestures,” “stamp of approval gestures,” “circle select gestures,” “X to delete gestures,” “knock to inquire gestures,” “hitchhiker directional gestures,” and “shape gestures.” In addition, gestures can be used to provide identification and allow or deny access to applications, files, and the like.
US09367233B2	Display apparatus and method thereof A display method of a display apparatus is provided. The display method includes displaying an image on a screen, detecting a touch manipulation with respect to the image, and if the touch manipulation is detected, changing a display status of the image according to a physical attribute of the touch manipulation.
US09367228B2	Fine object positioning There is disclosed a method of controlling the positioning of an object displayed on an interactive display surface, in which interactive display surface the display resolution is greater than the detection resolution, the method comprising: determining selection of a displayed object on the interactive display surface; detecting movement of an input at the interactive display surface associated with the selected displayed object; and in an object transformation mode, moving at least one displayed pixel of the selected displayed object by a distance which is less than the distance of the detected movement of the detected input.
US09367222B2	Information processing apparatus, method of controlling the same, and storage medium An information processing apparatus that displays a numeric value input area having multiple digit positions and changes a numeric value of the input area in accordance with a user operation on the input area, as well as a control method and a storage medium. The information processing apparatus calculates, when a movement of the plurality of digit positions of the numeric value input area is instructed by the operation of the user, a movement direction and a movement amount, performs a moving, in accordance with the movement direction and the movement amount of each numeral of the plurality of digit positions of the input area, and inserts a predetermined numeral into a digit position whose numeral became undefined by the moving of the numeral of each digit position in the moving.
US09367218B2	Method for adjusting playback of multimedia content according to detection result of user status and related apparatus thereof A playback method of a multimedia content includes: receiving the multimedia content; performing playback upon the multimedia content; detecting a user status and accordingly generating a detection result; and automatically adjusting the playback of the multimedia content in response to the detection result. A playback apparatus of a multimedia content includes a receiving block, a playback block, and a detecting block. The receiving block is used for receiving the multimedia content. The playback block is coupled to the receiving block, and used for performing playback upon the multimedia content. The detecting block is coupled to the playback block, and used for detecting a user status and accordingly generating a detection result. The playback block automatically adjusts the playback of the multimedia content in response to the detection result.
US09367216B2	Hand-held device with two-finger touch triggered selection and transformation of active elements A hand-held electronic device, method of operation and computer readable medium are disclosed. The device may include a case having one or more major surfaces. A visual display and a touch interface are disposed on at least one of the major surfaces. A processor is operably coupled to the visual display and touch screen. Instructions executable by the processor may be configured to a) present an image on the visual display containing one or more active elements; b) correlate one or more active portions of the touch interface to one or more corresponding active elements in the image on the visual display; c) operate the one or more active elements according to a first mode of operation in response to a first mode of touch on one or more of the active portions; and d) operate the one or more active elements according to a second mode of operation in response to a second mode of touch on one or more of the active portions, wherein in the second mode of operation, the second mode of touch activates an enhancement of one or more of the active elements.
US09367215B2	Mobile devices and related methods for configuring a remote device A method for configuring a remote device in a mobile device is provided. The method includes the steps of providing a dialogical user interface, obtaining a first position of the remote device, displaying a question message including information of the first position via the dialogical user interface, receiving an answer message corresponding to the question message via the dialogical user interface, and determining whether to set the first position as a safe zone for the remote device in response to whether the answer message is a confirmation message or a rejection message, wherein when the answer message is the conformation message, setting the first position as the safe zone of the remote device and displaying the setting result via the dialogical user interface.
US09367211B1	Interface tab generation Technology is described for generating an interface tab in an application. The method may include receiving an instruction to create an interface tab in the application. Another operation may be defining computing resources that are to be applied to loading of the interface tab and page content. The interface tab and the page content may be loaded using the computing resources defined.
US09367206B2	Displaying indicators that indicate ability to change a size of a widget on a display of a mobile terminal A mobile terminal capable of performing a touch input and a control method therefor are provided. A mobile terminal includes a display unit, a sensing unit and a controller. The display unit outputs an objective related to an application. The sensing unit senses a touch input to the objective. The controller executes the application related to the objective, in response to that a first touch input to the objective is sensed, and executes an edition mode for changing the size of the objective displayed on the display unit, in response to that a second touch input different from the first touch input to the objective is sensed.
US09367201B2	Graphic flow having unlimited number of connections between shapes Techniques are described herein that are capable of generating a graphic flow having an unlimited number of connections between shapes. The shapes are provided in a visual representation of a workspace defined by pixels. For instance, a first shape may have an outer perimeter defined by a first subset of the pixels; a second shape may have an outer boundary defined by a second subset of the pixels, and so on. Any pixel in each subset may serve as a connection point. For example, a first pixel of the first subset may serve as a first connection point based on any of a variety of first criteria, and a second pixel of the second subset may serve as a second connection point based on any of a variety of second criteria. In accordance with this example, a connection may be provided between the first and second connection points.
US09367196B1	Conveying branched content Items of content may be organized into branched portions. From a current portion of an item of content, a branch may be selected, and the portion of the item of content connected by the selected branch to the current portion of the item of content may be conveyed. In this respect, multiple paths through the item of content may be achieved, each path including one or more portions connected to each other by one or more branches.
US09367192B2	Surface capacitive touch panel and method of determining touch coordinate position A surface capacitive touch panel including a panel body, four electrodes, a power supply module, a grounding and measuring module, and a computation control module. The electrodes are disposed on four sides of the panel body, respectively, and each have a first end portion and a second end portion. In response to a control signal, the power supply module selects one of the electrodes to function as an electrode under test. The power supply module connects with the first end portion of the electrode under test to supply a power to the electrode under test. The grounding and measuring module connects with the second end portion of the electrode under test to create a grounded loop for measuring currents under test. The computation control module computes touch coordinate positions with values of currents under test measured at the electrodes. Hence, single-touch and multi-touch coordinate positions are accurately determined.
US09367188B2	RC matching in a touch screen A touch screen. In some examples, the touch screen can comprise a first element coupled to a first sense connection, and a second element coupled to a second sense connection. In some examples, the first and second sense connections can be configured such that a load presented by the first sense connection and the first element is substantially equal to a load presented by the second sense connection and the second element. In some examples, the first and second sense connections can comprise detour routing configured such that a resistance of the first sense connection is substantially equal to a resistance of the second sense connection. In some examples, the first and second sense connections can be coupled to dummy routing configured such that a first capacitance presented by the first sense connection is substantially equal to a second capacitance presented by the second sense connection.
US09367187B2	Touch panel A touch panel having at least one non-right angle corner region on a corner of the touch panel is provided. The touch panel includes a first electrode and a second electrode. The first electrode crosses the second electrode, and the first electrode is electrically isolated from the second electrode. The first electrode includes a plurality of first stripe electrodes extending along a first direction. The second electrode includes a plurality of second stripe electrodes and at least one auxiliary electrode. The second stripe electrodes extend along a second direction. The auxiliary electrode is disposed on the non-right angle corner region. An included angle between the auxiliary electrode and the second direction is less than 90 degrees. The auxiliary electrode is electrically connected to at least one of the second stripe electrodes adjacent to the auxiliary electrode.
US09367182B2	Panel operating apparatus Disclosed is a panel operating apparatus. The panel operating apparatus changes a state of a display device electrically connected to a circuit board located below a panel. The panel operating apparatus includes a tact member mounted on the circuit board, and a resilient member electrically connected to a circuit pattern of the circuit board and separated from the panel and the circuit board. The resilient member is selectively brought into contact with the panel or the tact member depending on a degree of pressure applied to the panel, thereby allowing the apparatus to be operated in a tact manner when the apparatus cannot be operated in a touch manner due to individual features of operators or external conditions.
US09367178B2	Touchless interfaces The shape or position of an object is estimated using a device comprising one or more transmitters and one or more receivers, forming a set of at least two transmitter-receiver combinations. Signals are transmitted from the transmitters, through air, to the object. They are reflected by the object and received by the receivers. A subset of the transmitter-receiver combinations which give rise to a received signal meeting a predetermined clarity criterion is determined. The positions of points on the object are estimated using substantially only signals from the subset of combinations.
US09367173B2	Finger sensor having pixel sensing circuitry for coupling electrodes and pixel sensing traces and related methods A finger sensor may include pixels, pixel sensing traces each associated with a respective pixel, and electrodes overlying the pixel sensing traces. The finger sensor may also include pixel sensing circuitry coupled to the pixel sensing traces and the electrodes. The pixel sensing circuitry may be capable of operating in a measurement mode by operating the pixels so that at least some of the pixels are active, and at least some other of the pixels are inactive and coupling pixel sensing traces associated with the inactive pixels to a voltage reference. The pixel sensing circuitry may also be capable of operating in the measurement mode by coupling electrodes associated with the active pixels to the voltage reference and coupling electrodes associated with the inactive pixels to a drive signal.
US09367170B1	Touch panel and display device A touch panel includes a plurality of sensing lines disposed in a sensing area, a plurality of touch-controlling lines disposed in a touch-detecting area, and an extended sensing line. The plurality of sensing lines are used for generating sensing signals, and the plurality of touch-controlling lines are used for receiving touch-controlling signals. The plurality of touch-controlling lines are extended to the sensing area to form mutual capacitances. The sensing line stretches into the touch-detecting area as the extended sensing line, forming a mutual capacitance in the touch-detecting area. It decreases the dead areas effectively and makes the positioning of touches more accurate.
US09367168B2	Touch screen system and method of driving the same A touch screen system includes a touch screen panel including first lines, second lines crossing the first lines, a plurality of sensing cells formed at the crossing regions between the first lines and the second lines, a driving circuit for sequentially applying a driving signal to the first lines, a first sensing circuit for receiving capacitance change information sensed by the first lines, and generating a first sensing signal corresponding to the capacitance change information, a selecting unit for selectively coupling the first lines to the driving circuit or the first sensing circuit, a second sensing circuit for receiving the capacitance change information sensed by the sensing cells from the second lines and generating a second sensing signal corresponding to the capacitance change information, and a processing unit for receiving a sensing signal from the first sensing circuit and/or the second sensing circuit and determining a detected touch position.
US09367167B2	Bottom-up watershed dataflow method and region-specific segmentation based on historic data to identify patches on a touch sensor panel The application of a watershed algorithm to pixels and their touch values obtained from a scan of a touch sensor panel to determine patches corresponding to images of touch is disclosed. Prior to applying the watershed algorithm, background pixels having little or no touch values can be eliminated. A primary merge algorithm can then merge adjacent patches together when the saddle point between them is shallow as compared to the peak represented by the patches. However, if two candidate patches for merging have a total number of pixels below a certain threshold, these two patches may not be merged under the assumption that the patches might have been caused by different fingertips. Conversely, if two candidate patches for merging have a total number of pixels above a certain threshold, these two patches can be merged under the assumption that the patches were caused by a single thumb or palm.
US09367166B1	System and method of visualizing capacitance sensing system operation Systems and methods of visualizing capacitance sensing system operation. A graphical user interface for visualizing capacitance sensing system operation includes a first window. The window includes a representation of a physical layout of a plurality of sensor devices on a target apparatus. The graphical user interface is operable to accept input from a pointing device to select a selected sensor from the plurality of sensor devices. A second window is for displaying capacitive sensing data of the selected sensor.
US09367164B2	Pixel circuit integrating threshold voltage compensation with touch detection, driving method thereof, and organic light-emitting display panel Embodiments of the present disclosure provide a pixel circuit, a driving method thereof, an organic light-emitting display panel and a display device. The pixel circuit is provided with a touch sensing module, a driving transistor, a driving control module and a light-emitting module. The pixel circuit compensates for a threshold voltage of the driving transistor by a diode connection of the driving transistor and a discharging of a storage capacitor, so that a driving current of the driving transistor is independent of the threshold voltage of the driving transistor, and thus the driving currents of the OLEDs located at different positions on the organic light-emitting display panel are consistent, which can improve a brightness uniformity and a reliability of the display panel.
US09367161B2	Touch sensitive device with stylus-based grab and paste functionality Techniques are disclosed for grabbing and pasting content using a stylus in communication with an electronic device. The grab function can be used to copy/cut content from the device to stylus memory. The paste function can be used to delete content from the stylus memory, or paste that content to the same or different device. The user can grab content to the stylus with a stylus action, which may include manipulating a stylus control feature or performing a particular stylus gesture. The content may then be deleted from the stylus memory or pasted to a device by performing another stylus action, which may be the same or distinct from the grab stylus action. Pasting the content from the stylus memory to an electronic device may also include removing the content from the stylus memory. An animation can be displayed as content is sucked into stylus, or pasted to new locations.
US09367160B2	Information processing apparatus, information processing method, and non-transitory computer readable medium An information processing apparatus includes a display having a display screen that displays an image; an acquiring section that acquires information indicating a contact point which is a position where an operator is brought into contact with the display screen by a user; a display controller that makes the display screen display an image showing a designation point designated by the user; and a setting section that sets an operation mode by switching between a first operation mode in which a disposition of the designation point relative to the contact point is changeable and a second operation mode in which the designation point is moved in accordance with movement of the contact point so that the disposition changed in the first operation mode is maintained. The display controller controls display of the designation point in accordance with the operation mode set by the setting section.
US09367158B2	Proximity and multi-touch sensor detection and demodulation The use of one or more proximity sensors in combination with one or more touch sensors in a multi-touch panel to detect the presence of a finger, body part or other object and control or trigger one or more functions in accordance with an “image” of touch provided by the sensor outputs is disclosed. In some embodiments, one or more infrared (IR) proximity sensors can be driven with a specific stimulation frequency and emit IR light from one or more areas, which can in some embodiments correspond to one or more multi-touch sensor “pixel” locations. The reflected IR signal, if any, can be demodulated using synchronous demodulation. In some embodiments, both physical interfaces (touch and proximity sensors) can be connected to analog channels in the same electrical core.
US09367157B2	Information processing apparatus and storage medium for storing information processing program An input coordinate point on the display surface of a display device is obtained from a pointing device. In a first mode of operation, every time there is a touch-on operation, based on the input coordinate point, a moving velocity is set, and based on the moving velocity, an object is moved to a position in the virtual space, the position corresponding to the input coordinate point. In a second mode of operation, if there is a touch-off operation, the moving velocity is set to a predetermined value, and an object is moved to a position in the virtual space, the position corresponding to the input coordinate point obtained immediately before the touch-off operation. Then, the display device is caused to display the virtual space within the display area.
US09367153B2	Display apparatus and method thereof A display apparatus and a method thereof. The display apparatus includes a display with variable transparency, a sensor which senses a location of at least one of a person and an object, and a controller which determines proximity of the at least one of the person and the object to the display based on a result of the sensing by the sensor, and adjusts the transparency of the display differently according to a result of the determining. Accordingly, a user can easily recognize contents displayed on the display screen having high transparency in the display apparatus.
US09367149B2	Charging mechanism through a conductive stylus nozzle Input devices and methods for charging input devices are disclosed. A stylus input device has a tip configured to interact with a touch computing device and a body connected to the tip. The stylus has a nozzle housing between its body and tip, electrical components, and an internal rechargeable power source. The internal power source can store power received via a connection between an external power source and a conductive surface on the nozzle housing and supply power to the stylus' electrical components. A method for charging a stylus determines whether power is being received via an electrical connection between a conductive surface on a nozzle of the stylus and an external power source and then determines an amount of power stored in the stylus' battery. If the stylus is receiving power from the external power source and the battery is not fully charged, the method charges the rechargeable battery.
US09367148B2	Selective frame rate switching A method for selectively switching a frame rate of a mouse includes: setting a plurality of acceleration thresholds respectively corresponding to a plurality of frame rates at which the mouse is operated; operating the mouse at a first frame rate of the plurality of frame rates; determining a velocity of the mouse according to a difference between a first frame captured by the mouse at the first frame rate and a second frame following the first frame captured by the mouse at the first frame rate; determining an acceleration of the mouse between the first captured frame and second captured frame according to the velocity of the first frame, the velocity of the second frame, and the frame rate; comparing the acceleration with the plurality of thresholds; and directly switching the frame rate of the mouse to a frame rate which corresponds to the determined threshold.
US09367144B2	Methods, systems, and media for providing a remote control interface for a media playback device In accordance with some implementations of the disclosed subject matter, mechanisms for providing a remote control interface are provided. In some implementations, a method for providing a remote control interface is provided, the method comprising: receiving an image of a user input interface associated with a media playback device; identifying the user input interface from a plurality of user input interfaces based on image recognition; determining a code library associated with the identified user input interface; and transmitting the code library to a mobile device that provided the image of the user input interface, wherein the code library allows a mobile device to control the media playback device.

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