| Document | Document Title |
|---|---|
| US09337453B2 |
Battery pack for use with hand-held electric power tool
A battery pack (10; 110) for a power tool includes a housing (18) made of a rigid material. The housing contains a cooling air passage (54), which is in gaseous communication with the outside environment, and at least one isolated space (52). At least one isolating wall (44) is disposed inside the housing so as to physically separate and isolate the cooling air passage from the at least one isolated space. A plurality of battery cells (32) is disposed within the housing such that an end portion (32a) thereof is disposed within the at least one isolated space and an intermediate portion (32b) thereof is disposed adjacent the cooling air passage. First portions (78) of the at least one isolating wall respectively contact the plurality of battery cells and are comprised of a material that is more flexible and/or elastic than the rigid material of the housing (18). |
| US09337451B2 |
System and method for roller interconnection of battery cells
A battery module includes a power assembly including a first battery cell and a second battery cell in a stacked orientation relative to each other. The first battery cell includes a first tab electrode extending therefrom, and the second battery cell includes a second tab electrode extending therefrom. The battery module also includes an interconnect assembly configured to facilitate electrically coupling the first tab electrode with the second tab electrode. The interconnect assembly includes a roller housing structure about which the first and second tab electrodes at least partially conform such that the first and second tab electrodes are positioned in an opening defined by the roller housing structure. The interconnect assembly also includes a roller disposed in the opening of the roller housing structure such that the first and second tab electrodes are secured in electrical communication. |
| US09337449B2 |
Organic light-emitting device and image display system employing the same
An organic light-emitting device and an image display system employing the same are provided. The organic light-emitting device includes: a first substrate; an organic light-emitting pixel structure disposed on a top surface of the first substrate; a second substrate having a bottom surface opposite to the top surface of the first substrate; and an optical functional layer disposed over the organic light-emitting pixel structure. |
| US09337447B2 |
Radiation emitting device
A radiation-emitting device having an organic radiation-emitting functional layer and a radiation decoupling layer. The organic radiation-emitting functional layer emits a primary radiation; the radiation decoupling layer is disposed in the beam path of the primary radiation. On the side remote from the radiation-emitting functional layer the radiation decoupling layer comprises a microstructure having regularly disposed geometric structural elements; at least partial regions of the radiation decoupling layer contain regions which effect scattering of the primary radiation. |
| US09337444B2 |
Organic light emitting display device and method for manufacturing the same
Disclosed is an organic light emitting display device in which water is prevented from externally permeating thereinto. The organic light emitting display device comprises a first substrate on which an organic light emitting diode and a driving device designed to drive the organic light emitting diode are formed; a second substrate facing the first substrate; a viscosity layer interposed between the first substrate and the second substrate to cover entire areas of the first substrate and the second substrate, the viscosity layer including a filler capable of water absorption; and a first adhesion layer arranged to adhere the viscosity layer to the first substrate, wherein the viscosity layer is a material including a cross-linkage functional group and having a viscosity characteristic at room temperature. |
| US09337442B2 |
Display panel with varying conductive pattern zone
An organic electroluminescence display panel comprises a first substrate, a second substrate assembled to the first substrate, an organic light-emitting layer positioned between the first and second substrates, a sealant positioned between the first and second substrates, a varying pattern zone, and supplemental pattern zone. The second substrate comprises a sealant dispensing area, a metal region, and a non-metal region adjacent to the metal region. The metal region includes plural traces. The sealant is formed in the sealant dispensing area of the second substrate. The varying pattern zone is formed at one of the traces of the metal region, and is corresponding to the sealant dispensing area. The varying pattern zone comprises plural conductive portions. The supplemental pattern zone comprising plural supplemental conductive portions is formed at the non-metal region. A width of the conductive portions is larger than a width of the supplemental conductive portions. |
| US09337433B2 |
Method and apparatus for manufacturing flexible display device
A method of manufacturing a flexible display device includes a first step of providing a three-dimensional cover window having a flat portion, and a curved portion that is bent in a third direction intersecting a first direction of the flat portion while extending to a second direction intersecting the first direction at both sides of the first direction, and a second step of attaching by a line contact at least one of an adhesive film, a touch panel, and a flexible display panel that are stacked at an inner surface of the cover window. |
| US09337432B2 |
Organic electroluminescent element
Provided is an organic electroluminescent device (organic EL device) which exhibits improved luminous efficiency, ensures sufficient driving stability, and has a simple configuration. The organic electroluminescent element includes an anode, a plurality of organic layers, and a cathode laminated on a substrate, and contains a carbazole compound represented by the general formula (1) in at least one layer selected from the group consisting of a emitting layer, a hole-transporting layer, and an electron-blocking layer. In general formula (1), L represents an m-valent aromatic hydrocarbon group or aromatic heterocyclic group, R's each represent hydrogen, an alkyl group, or a cycloalkyl group, m represents an integer of 1 to 3, and n's each represent an integer of 1 to 4, provided that at least one n represents an integer of 2 to 4, and at least one specific structure represented by the formula (1a) is present in the formula. |
| US09337427B2 |
Laser induced thermal imaging device and laser induced thermal imaging method
A laser induced thermal imaging device includes a substrate stage configured to support a substrate and a donor film; a beam radiation portion configured to emit a laser beam toward the donor film to image an imaging layer of the donor film on a pixel region on the substrate; an error measurement portion configured to determine a position of the laser beam and a position of the pixel region from the donor film to measure a pattern error; and a stage moving portion configured to move the substrate stage in accordance with the pattern error to correct the pattern error. |
| US09337426B2 |
Method for ink jet printing organic electronic devices
A method of fabricating an organic electronic device using ink jet printing in swathes, comprises depositing an ink into a first set of locations in a column in a first print pass; wherein the first set of locations is less than a total number of locations in the column; and depositing an ink into a second set of locations in the column in a subsequent print pass; wherein the second set of locations is less than a total number of locations in the column. Preferably the number of nozzles used to fill all locations in a column is equal to the number of print passes needed to print the column. All locations in the swathe are printed after all print passes using a regular repeating randomized pattern, such that be ensured that print locations are not under filled, or over filled. |
| US09337423B2 |
Two-terminal switching device using a composite material of nanoscopic particles and carbon nanotubes
An improved switching material for forming a composite article over a substrate is disclosed. A first volume of nanotubes is combined with a second volume of nanoscopic particles in a predefined ration relative to the first volume of nanotubes to form a mixture. This mixture can then be deposited over a substrate as a relatively thick composite article via a spin coating process. The composite article may possess improved switching properties over that of a nanotube-only switching article. A method for forming substantially uniform nanoscopic particles of carbon, which contains one or more allotropes of carbon, is also disclosed. |
| US09337415B1 |
Perpendicular spin transfer torque (STT) memory cell with double MgO interface and CoFeB layer for enhancement of perpendicular magnetic anisotropy
A magnetic tunnel junction (MTJ) for use in a magnetoresistive random access memory (MRAM) has a CoFeB alloy free layer located between the MgO tunnel barrier layer and an upper MgO capping layer, and a CoFeB alloy enhancement layer between the MgO capping layer and a Ta cap. The CoFeB alloy free layer has high Fe content to induce perpendicular magnetic anisotropy (PMA) at the interfaces with the MgO layers. To avoid creating unnecessary PMA in the enhancement layer due to its interface with the MgO capping layer, the enhancement layer has low Fe content. After all of the layers have been deposited on the substrate, the structure is annealed to crystallize the MgO. The CoFeB alloy enhancement layer inhibits diffusion of Ta from the Ta cap layer into the MgO capping layer and creates good crystallinity of the MgO by providing CoFeB at the MgO interface. |
| US09337414B2 |
Reader sensor structure and its method of construction
A TMR (tunneling magnetoresistive) read sensor is formed in which a portion of the sensor stack containing the ferromagnetic free layer and the tunneling barrier layer is patterned to define a narrow trackwidth, but a synthetic antiferromagnetic pinning/pinned layer is left substantially unpatterned and extends in substantially as-deposited form beyond the lateral edges bounding the patterned portion. The narrow trackwidth of the patterned portion permits high resolution for densely recorded data. The larger pinning/pinned layer significantly improves magnetic stability and reduces thermal noise, while the method of formation eliminates possible ion beam etch (IBE) or reactive ion etch (RIE) damage to the edges of the pinning/pinned layer. |
| US09337412B2 |
Magnetic tunnel junction structure for MRAM device
A magnetic tunnel junction stack is provided that includes nonmagnetic spacer layers between the free layer and the polarizer layer formed from magnesium oxide and tantalum nitride materials that balance the spin torques acting on the free layer. The design provided enables a deterministic final state for the storage layer and significantly improves the tunneling magnetoresistance value and switching characteristics of the magnetic tunnel junction for MRAM applications. |
| US09337411B2 |
Slat-constructed autonomic transformers
Multilayered piezoelectric transformers, transformer elements and methods of constructing piezoelectric transformers are disclosed. |
| US09337407B2 |
Photoelectronic element and the manufacturing method thereof
A photoelectronic element includes an electrically insulative substrate, an electrically conductive substrate, an intermediate layer and a semiconductor stacked layer. The electrically insulative substrate has a top surface. The electrically conductive substrate has a lower portion, and an upper portion surrounded by the electrically insulative substrate and coplanar with the top surface. The intermediate layer has a first portion formed directly under the electrically insulative substrate and above the electrically conductive substrate, a second portion and a bent portion formed between the first portion and the second portion. The semiconductor stacked layer has an light-emitting active layer with a high band gap, disposed on the electrically insulative substrate and the upper portion. |
| US09337400B2 |
Semiconductor light emitting element and method for manufacturing the same
According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers. |
| US09337399B2 |
Phosphor and light-emitting device
A phosphor has the general formula (M2x,M3y,M4z)mM1O3X(2/n), wherein M1 represents at least one element including at least Si and selected from the group consisting of Si, Ge, Ti, Zr, and Sn, M2 represents at least one element including at least Ca and selected from the group consisting of Ca, Mg, Cd, Co, and Zn, M3 represents at least one element including at least Sr and selected from the group consisting of Sr, Ra, Ba, and Pb, X represents at least one halogen element, M4 represents at least one element including at least Eu2+ and selected from the group consisting of rare-earth elements and Mn, m is in the range 1≦m≦4/3, n is in the range 5≦n≦7, and x, y, and z are each in such a range as to satisfy x+y+z=1, 0.45≦x≦0.8, 0.05≦y≦0.45, and 0.45, and 0.03≦z≦0.35. |
| US09337396B2 |
Semiconductor light emitting device
According to one embodiment, a semiconductor light emitting device includes a first metal layer, a second metal layer, a third metal layer, a semiconductor light emitting unit and an insulating unit. The semiconductor light emitting unit is separated from the first metal layer in a first direction. The second metal layer is provided between the first metal layer and the semiconductor light emitting unit to be electrically connected to the first metal layer, and is light-reflective. The second metal layer includes a contact metal portion, and a peripheral metal portion. The third metal layer is light-reflective. The third metal layer includes an inner portion, a middle portion, and an outer portion. The insulating unit includes an first insulating portion, a second insulating portion, and a third insulating portion. |
| US09337395B2 |
Methods for producing new silicon light source and devices
The present invention relates to production method and device applications of a new silicon (Si) semiconductor light source that emits at a single wavelength at 1320 nm with a full width at half maximum (FWHM) of less than 200 nm and a photoluminescence quantum efficiency of greater than 50% at room temperature. The semiconductor that is the base for the new light source includes a surface which is treated by an acid vapor involving heavy water or Deuterium Oxide (D2O) and a surface layer producing the light source at 1320 nm. |
| US09337390B2 |
Sapphire substrate and method for manufacturing the same and nitride semiconductor light emitting element
A method for manufacturing a sapphire substrate in which a plurality of projections are formed on a C-plane of the sapphire substrate by etching, includes: forming a patterned etching mask on the C-plane of the sapphire substrate; etching the sapphire substrate until the projections are formed, wherein each of the projections formed by the etching has a substantially triangular pyramidal-shape and has a plurality of side surfaces, a pointed top and a bottom, wherein the bottom of each of the projections has a substantially triangular shape having three outwardly curved arc-shaped sides. The projections are arranged on vertexes of a triangular lattice, and an orientation of the bottom of the projections conforms with an orientation that is rotated by about 30 degrees from an orientation of a triangle of the triangular lattice; and removing the etching mask from the sapphire substrate. |
| US09337388B2 |
Method for producing a semiconductor layer sequence, radiation-emitting semiconductor chip and optoelectronic component
A method can be used for producing a semiconductor layer sequence, which is based on a nitride compound semiconductor material and which comprises a microstructured outer surface. The method has the following steps: A) growing at least one first semiconductor layer of the semiconductor layer sequence on a substrate; B) applying an etch-resistant layer on the first semiconductor layer; C) growing at least one further semiconductor layer on the layer sequence obtained in step B); D) separating the semiconductor layer sequence from the substrate, a separating zone of the semiconductor layer sequence being at least partly removed; E) etching the obtained separating surface of the semiconductor layer sequence by an etching means such that a microstructuring of the first semiconductor layer is carried out and the microstructured outer surface is formed. |
| US09337382B2 |
Method for producing semiconductor microparticles and the microparticles
It is an object to provide a method for producing compound semiconductor particles in which monodisperse compound semiconductor particles can be prepared according to the intended object, clogging with products does not occur due to self-dischargeability, a large pressure is not necessary, and productivity is high. In producing compound semiconductor particles by separating and precipitating, in a fluid, semiconductor raw materials, the fluid is formed into a thin film fluid between two processing surfaces arranged so as to be able to approach to and separate from each other, at least one of which rotates relative to the other, and the semiconductor raw materials are separated and precipitated in the thin film fluid. Further, in producing semiconductor microparticles containing semiconductor elements by reacting a compound containing semiconductor elements, in a fluid, with a reducing agent, the fluid is formed into a thin film fluid between two processing surfaces arranged so as to be able to approach to and separate from each other, at least one of which rotates relative to the other, and the compound containing semiconductor elements is reacted with the reducing agent in the thin film fluid. |
| US09337379B2 |
Method for manufacturing solar cell, and solar cell
The present invention aims to provide a method of producing a solar cell which can produce a porous inorganic oxide layer that has a high porosity and contains less impurities even by low-temperature firing. The present invention also aims to provide a solar cell produced by the method of producing a solar cell. The present invention directs to a method of producing a solar cell. The method includes: applying an inorganic oxide paste that contains inorganic oxide fine particles, a binder resin, and an organic solvent to a surface of a base to form an inorganic oxide layer on the base, the base including a conductive layer as an outermost layer thereof, the surface being a conductive layer-side surface; firing the inorganic oxide layer; irradiating the inorganic oxide layer with active energy rays or subjecting the inorganic oxide layer to ozonolysis to form a porous inorganic oxide layer; and laminating a semiconductor on the porous inorganic oxide layer. |
| US09337378B2 |
System and method for photovoltaic device temperature control while conditioning a photovoltaic device
A system and method for applying an electrical bias to a photovoltaic device in a temperature control chamber, in which the temperature of the photovoltaic device is controlled according to a temperature profile. The temperature profile may include at least one hot phase and at least one cool phase. |
| US09337376B2 |
Method and apparatus providing multi-step deposition of thin film layer
A multi-stage method and apparatus for vaporizing and depositing a tellurium containing semiconductor material on a substrate. |
| US09337371B2 |
Cam turntable, sun-tracking device equipped with same and control method for the device
Provided are a cam turntable (2), a sun-tracking device equipped with the cam turntable (2) and a control method for the device. The sun-tracking device comprises a support mechanism for mounting a photovoltaic assembly (1), and an azimuth driving device, which is a cam turntable (2), fixed on the support mechanism for adjusting the azimuth thereof. The sun-tracking device adjusts the azimuth of the support mechanism for mounting the photovoltaic assembly (1) by utilizing the cam turntable (2) as the azimuth driving device, so that harmful incoming impact loads on the sun-tracking device as a whole are transferred into friction forces which are then transferred and alleviated, therefore it is advantageous in avoiding damages to subsequent driving devices due to the excessively large impact loads, especially in protecting the precision of a control worm gear (2-12) from being affected, which in turn extends the service life of the sun-tracking device as a whole. The device has high safety, large load capacity, and the function of automatic gap adjustment. |
| US09337369B2 |
Solar cells with tunnel dielectrics
A solar cell can have a first dielectric formed over a first doped region of a silicon substrate. The solar cell can have a second dielectric formed over a second doped region of the silicon substrate, where the first dielectric is a different type of dielectric than the second dielectric. A doped semiconductor can be formed over the first and second dielectric. A positive-type metal and a negative-type metal can be formed over the doped semiconductor. |
| US09337368B2 |
Ceramic composition having dispersion of nano-particles therein and methods of fabricating same
Ceramic compositions having a dispersion of nano-particles therein and methods of fabricating ceramic compositions having a dispersion of nano-particles therein are described. In an example, a method of forming a composition having a dispersion of nano-particles therein includes forming a mixture of semiconductor nano-particles and ceramic precursor molecules. A ceramic matrix is formed from the ceramic precursor molecules. The ceramic matrix includes a dispersion of the semiconductor nano-particles therein. In another example, a composition includes a medium including ceramic precursor molecules. The medium is a liquid or gel at 25 degrees Celsius. A plurality of semiconductor nano-particles is suspended in the medium. |
| US09337365B2 |
Transversely-illuminated high current photoconductive switches with geometry-constrained conductivity path
A photoconductive switch having a wide bandgap semiconductor material substrate between opposing electrodes, with one of the electrodes having an aperture or apertures at an electrode-substrate interface for transversely directing radiation therethrough from a radiation source into a triple junction region of the substrate, so as to geometrically constrain the conductivity path to within the triple junction region. |
| US09337364B2 |
Solid-state imaging element and electronic apparatus
A solid-state imaging element includes a light receiving unit formed on a semiconductor base, and an anti-reflection film formed on the light receiving unit. The anti-reflection film has a plurality of planar layers whose planar layer in an upper layer is narrower than the planar layer in a lower layer. |
| US09337360B1 |
Non-alloyed contacts for III-V based solar cells
A multi junction solar cell is provided with a non-alloyed ohmic contact metallization stack by inversion of the top semiconductor layer from n-type to p-type and including the utilization of a tunnel junction. Alternatively, the non-alloyed ohmic contact can be achieved by changing the top semiconductor layer from a higher bandgap material to a lower bandgap material. |
| US09337358B2 |
Photovoltaic cell with benzodithiophene-containing polymer
Benzodithiophene-containing polymers, as well as related photovoltaic cells, articles, systems, and methods, are disclosed. |
| US09337356B2 |
Devices and methods related to electrostatic discharge protection benign to radio-frequency operation
Disclosed are systems, devices and methods for providing electrostatic discharge (ESD) protection for integrated circuits. In some implementations, first and second conductors with ohmic contacts on an intrinsic semiconductor region can function similar to an x-i-y type diode, where each of x and y can be n-type or p-type. Such a diode can be configured to turn on under selected conditions such as an ESD event. Such a structure can be configured so as to provide an effective ESD protection while providing little or substantially nil effect on radio-frequency (RF) operating properties of a device. |
| US09337355B2 |
Voltage nonlinear resistor and multilayer varistor using same
A voltage nonlinear resistor includes a plurality of N-type ZnO crystal grains, a grain boundary layer, and an oxide grain as a P-type semiconductor. The grain boundary layer is formed between the ZnO crystal grains, and contains at least one kind of oxide of alkaline-earth metal. The oxide grain is disposed between the ZnO crystal grains via the grain boundary layer. |
| US09337353B2 |
Semiconductor device and method for fabricating the same
A semiconductor device and a method of manufacturing the same. The semiconductor device includes a channel, a gate, and a memory layer is interposed between the channel and the gate. The memory layer includes a tunnel insulating layer adjacent to the channel, a charge blocking layer adjacent to the gate, and a charge storing layer interposed between the tunnel insulating layer and the charge blocking layer. The tunnel insulating layer includes a first insulating layer adjacent to the channel and an air layer interposed between the first insulating layer and the charge storing layer. |
| US09337352B1 |
Floating gate flash memory device and compilation method thereof
The present invention discloses a floating gate flash memory device, comprising: a P-type substrate which has a source and a drain, and a first polysilicon gate, a first control gate and a second polysilicon gate and a second control gate which are respectively located in parallel on the upper and lower sides of the substrate, first and second polysilicon floating gates being respectively provided between the first and second control gates and the substrate; the floating gate flash memory device of the present invention utilizes a double-gate structure, can solve the problems such as the poor programming efficiency of the floating gate flash memory and the high programming current power consumption, by using the compilation mechanism of source side injection. |
| US09337347B2 |
Oxide semiconductor element and semiconductor device
A semiconductor element having high mobility, which includes an oxide semiconductor layer having crystallinity, is provided. The oxide semiconductor layer includes a stacked-layer structure of a first oxide semiconductor film and a second oxide semiconductor film having a wider band gap than the first oxide semiconductor film, which is in contact with the first oxide semiconductor film. Thus, a channel region is formed in part of the first oxide semiconductor film (that is, in an oxide semiconductor film having a smaller band gap) which is in the vicinity of an interface with the second oxide semiconductor film. Further, dangling bonds in the first oxide semiconductor film and the second oxide semiconductor film are bonded to each other at the interface therebetween. Accordingly, a decrease in mobility resulting from an electron trap or the like due to dangling bonds can be reduced in the channel region. |
| US09337340B2 |
FinFET with active region shaped structures and channel separation
A semiconductor structure in fabrication includes a n-FinFET and p-FinFET. Stress inducing materials such as silicon and silicon germanium are epitaxially grown into naturally diamond-shaped structures atop the silicon fins of the n-FinFET and p-FinFET areas. The diamond structures act as the source, drain and channel between the source and drain. The diamond structures of the channel are selectively separated from the fin while retaining the fin connections of the diamond-shaped growth of the source and the drain. Further fabrication to complete the structure may then proceed. |
| US09337333B2 |
Transistors with an extension region having strips of differing conductivity type
A transistor includes a gate dielectric over a semiconductor having a first conductivity type, a control gate over the gate dielectric, source and drain regions having a second conductivity type in the semiconductor having the first conductivity type, and strips having the second conductivity type within the semiconductor having the first conductivity type and interposed between the control gate and at least one of the source and drain regions. |
| US09337330B2 |
Scheme to align LDMOS drain extension to moat
An integrated circuit and method having an extended drain MOS transistor, wherein a diffused drain is deeper under a field oxide element in the drain than in a drift region under the gate. A field oxide hard mask layer is etched to define a drain field oxide trench area. Drain dopants are implanted through the drain field oxide trench area and a thermal drain drive is performed. Subsequently, the drain field oxide element is formed. |
| US09337329B2 |
Method of fabrication and device configuration of asymmetrical DMOSFET with schottky barrier source
A trenched semiconductor power device includes a trenched gate insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate. The source region surrounding the trenched gate includes a metal of low barrier height to function as a Schottky source and that may include a PtSi, ErSi layer and may further be a metal silicide layer having the low barrier height. A top oxide layer is disposed under a silicon nitride spacer on top of the trenched gate for insulating the trenched gate from the source region. A source contact disposed in a trench opened into the body region for contacting a body-contact dopant region and covering with a conductive metal layer such as a Ti/TiN layer. |
| US09337327B2 |
Manufacturing method of semiconductor device and semiconductor device
The present invention makes it possible to improve the accuracy of wet etching and miniaturize a semiconductor device in the case of specifying an active region of a vertical type power MOSFET formed over an SiC substrate by opening an insulating film over the substrate by the wet etching. After a silicon oxide film having a small film thickness and a polysilicon film having a film thickness larger than the silicon oxide film are formed in sequence over an epitaxial layer, the polysilicon film is opened by a dry etching method, successively the silicon oxide film is opened by a wet etching method, and thereby the upper surface of the epitaxial layer in an active region is exposed. |
| US09337321B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions. |
| US09337319B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device includes a fin-shaped semiconductor layer disposed on a semiconductor substrate, a first insulating film disposed around the fin-shaped semiconductor layer, a first pillar-shaped semiconductor layer disposed on the fin-shaped semiconductor layer, a first gate insulating film that is disposed around the first pillar-shaped semiconductor layer and includes a charge storing layer, a second gate insulating film disposed around the first pillar-shaped semiconductor layer and at a position higher than the first gate insulating film, a fifth gate insulating film surrounding an upper portion of the first pillar-shaped semiconductor layer, and a first contact electrode surrounding the fifth gate insulating film. |
| US09337317B2 |
Semiconductor device including finFET and diode having reduced defects in depletion region
A semiconductor device comprises a first substrate portion and a second substrate portion disposed a distance away from the first substrate portion. The first substrate portion includes a first active semiconductor layer defining at least one semiconductor fin and a first polycrystalline layer formed directly on the fin. The first polycrystalline layer is patterned to define at least one semiconductor gate. The second substrate portion includes a doped region interposed between a second active semiconductor region and an oxide layer. The oxide layer protects the second active semiconductor region and the doped region. The doped region includes a first doped area and a second doped area separated by the first doped region to define a depletion region. |
| US09337313B2 |
Spacerless fin device with reduced parasitic resistance and capacitance and method to fabricate same
A structure includes a substrate having an insulator layer and a plurality of elongated semiconductor fin structures disposed on a surface of the insulator layer. The fin structures are disposed substantially parallel to one another. The structure further includes a plurality of elongated sacrificial gate structures each comprised of silicon nitride. The sacrificial gate structures are disposed substantially parallel to one another and orthogonal to the plurality of fin structures, where a portion of each of a plurality of adjacent fin structures is embedded within one of the sacrificial gate structures leaving other portions exposed between the sacrificial gate structures. The structure further includes a plurality of semiconductor source/drain (S/D) structures disposed over the exposed portions of the fin structures between the sacrificial gate structures. The embodiments eliminate a need to form a conventional spacer on the fin structures. |
| US09337305B2 |
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
A semiconductor device including a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel region; a gate electrode formed on the channel region via a gate insulating film; and a stress-introducing layer that applies stress to the channel region, the semiconductor device having a stress distribution in which source region-side and drain region-side peaks are positioned between a pn junction boundary of the channel region and the source region and a pn junction boundary of the channel region and the drain region. |
| US09337301B2 |
Aluminum nitride based semiconductor devices
Semiconductor structures and techniques are described which enable forming aluminum nitride (AIN) based devices by confining carriers in a region of AIN by exploiting the polar nature of AIN materials. Embodiments of AIN transistors utilizing polarization-based carrier confinement are described. |
| US09337297B2 |
Fringe capacitance reduction for replacement gate CMOS
A replacement metal gate transistor structure and method with thin silicon nitride sidewalls and with little or no high-k dielectric on the vertical sidewalls of the replacement gate transistor trench. |
| US09337294B2 |
Semiconductor device fabrication method and semiconductor device
There is provided a method of fabricating a semiconductor device, the method including: forming a first semiconductor region at a front surface of a substrate, the first semiconductor region including an active element that regulates current flowing in a thickness direction of the substrate; grinding a rear surface of the substrate; after the grinding, performing a first etching that etches the rear surface of the substrate with a chemical solution including phosphorus; after the first etching, performing a second etching that etches the rear surface with an etching method with a lower etching rate than the first etching; and after the second etching, forming a second semiconductor region through which the current is to flow, by implanting impurities from the rear surface of the substrate. |
| US09337293B2 |
Semiconductor device having electrode and manufacturing method thereof
The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with an electrode. An exemplary structure for a semiconductor device comprises a semiconductor substrate; an electrode over the semiconductor substrate, wherein the electrode comprises a trench in an upper portion of the electrode; and a dielectric feature in the trench. |
| US09337292B1 |
Very high aspect ratio contact
A semiconductor device with a very high aspect ratio contact has a deep trench in the substrate. A dielectric liner is formed on sidewalls and a bottom of the deep trench. A contact opening is formed through the dielectric liner at the bottom of the deep trench to expose the substrate, leaving the dielectric liner on the sidewalls. Electrically conductive material is formed in the deep trench to provide the very high aspect ratio contact to the substrate through the contact opening. |
| US09337291B2 |
Deep gate-all-around semiconductor device having germanium or group III-V active layer
Deep gate-all-around semiconductor devices having germanium or group III-V active layers are described. For example, a non-planar semiconductor device includes a hetero-structure disposed above a substrate. The hetero-structure includes a hetero-junction between an upper layer and a lower layer of differing composition. An active layer is disposed above the hetero-structure and has a composition different from the upper and lower layers of the hetero-structure. A gate electrode stack is disposed on and completely surrounds a channel region of the active layer, and is disposed in a trench in the upper layer and at least partially in the lower layer of the hetero-structure. Source and drain regions are disposed in the active layer and in the upper layer, but not in the lower layer, on either side of the gate electrode stack. |
| US09337281B2 |
Planar semiconductor growth on III-V material
A semiconductor structure includes a III-V monocrystalline layer and a germanium surface layer. An interlayer is formed directly between the III-V monocrystalline layer and the germanium surface layer from a material selected to provide stronger nucleation bonding between the interlayer and the germanium surface layer than nucleation bonding that would be achievable directly between the III-V monocrystalline layer and the germanium surface layer such that a continuous, relatively defect-free germanium surface layer is provided. |
| US09337279B2 |
Group III-nitride-based enhancement mode transistor
A Group III-nitride-based enhancement mode transistor includes a multi-heterojunction fin structure. A first side face of the multi-heterojunction fin structure is covered by a p-type Group III-nitride layer. |
| US09337276B2 |
Silicon carbide semiconductor device having junction barrier Schottky diode
A silicon carbide semiconductor device includes a junction barrier Schottky diode including a substrate, a drift layer, an insulating film, a Schottky barrier diode, and a plurality of second conductivity type layers. The Schottky barrier diode includes a Schottky electrode and an ohmic electrode. A PN diode is configured by the plurality of second conductivity type layers and the drift layer, and the plurality of second conductivity type layers is formed in stripes only in a direction parallel to a rod-shaped stacking fault. |
| US09337272B2 |
Ferromagnet-free spin transistor and method for operating the same
A spin transistor includes: an input part that is made of a material exhibiting a spin Hall effect and configured to transfer electrons with a predetermined direction of spin to a connecting part; and the connecting part that receives the electrons with the predetermined direction of spin from the input part, rotates the spin of the electrons in accordance with a gate voltage applied to the gate electrode, and transfers the electrons to the output part. |
| US09337269B2 |
Buried-channel FinFET device and method
A fin field effect transistor (FinFET), and a method of fabrication, is introduced. In an embodiment, trenches are formed in a substrate, wherein a region between adjacent trenches defines a fin. A dielectric material is formed in the trenches. The fins are doped to form source, drain and buried channel regions. A gate stack is formed over the buried channel regions. Contacts are formed to provide electrical contacts to the source/drain regions and the gate. |
| US09337268B2 |
SiC devices with high blocking voltage terminated by a negative bevel
A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode. |
| US09337267B2 |
Semiconductor device
A semiconductor device is provided with an electronic transit layer, an electron supply layer, a source region, a drain electrode, a source electrode and an insulated gate. In a region between the drain electrode and the insulated gate, a two-dimensional electron gas layer is configured to be generated at a hetero junction between the electronic transit layer and the electron supply layer. A part of the insulated gate is configured to face to the source region. |
| US09337263B2 |
Semiconductor device including a semiconductor sheet unit interconnecting a source and a drain
A semiconductor device includes a substrate, a first source/drain (S/D), a second S/D, and a semiconductor sheet unit. The substrate extends in a substantially horizontal direction. The first S/D is formed on the substrate. The second S/D is disposed above the first S/D. The semiconductor sheet unit extends in a substantially vertical direction and interconnects the first S/D and the second S/D. A method for fabricating the semiconductor device is also disclosed. |
| US09337258B2 |
Method of making a FinFET device
A method for fabricating a fin field-effect transistor (FinFET) device includes forming a first dielectric layer over a substrate and then etching the first dielectric layer and the substrate to form a first fin and a second fin. A second dielectric layer is formed along sidewalls of the first fin and the second fin. A protection layer is deposited over the first fin and the second fin. A portion of the protection layer and the first dielectric layer on the second fin is removed and the second fin is then recessed to form a trench. A semiconductor material layer is epitaxially grown in the trench. The protection layer is removed to reveal the first fin and the second fin. |
| US09337257B2 |
Semiconductor device
[Problem] To provide a semiconductor device in which it is possible to lessen the local concentration of an electric field on a termination structure.[Solution] The semiconductor device (1) comprises: an n-type SiC substrate (2) having an active region (3); a p-type termination structure (4) formed along the outer periphery of the active region (3), and a source electrode (14) that is formed on the SiC substrate (2) with an interlayer film (12) therebetween, and that selectively penetrates the interlayer film (12) and is connected to the termination structure (4). The termination structure (4) forms a second side (42) that has a relatively high dielectric breakdown strength, and a first side (41) that has a relatively low dielectric breakdown strength compared to the second side (42). The shape of the second side (42) and the shape of the first side (41) are asymmetrical. |
| US09337256B2 |
Semiconductor device and method of manufacturing semiconductor device
A method of manufacturing a semiconductor device having a VDMOSFET (Vertical Double-diffused Metal Oxide Semiconductor Field-Effect Transistor) and a planar gate MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), including forming a semiconductor layer of a first conductivity type by epitaxy, forming a body region recess for forming a body region of the VDMOSFET on the semiconductor layer, and embedding a semiconductor material of a second conductivity type in the body region recess by epitaxy or CVD (Chemical Vapor Deposition). |
| US09337249B2 |
OLED display panel and method of manufacturing the same and display apparatus
An Organic Light Emitting Diode (OLED) display panel is disclosed. The display panel includes a substrate, a plurality of power lines disposed on the substrate, and a reflection layer disposed on the power lines, where the reflection layer is electrically connected with the power lines. The display panel also includes an anode disposed on the reflection layer, an optical modulation layer disposed between the reflection layer and the anode, a cathode disposed on the anode, and an organic emitting device layer disposed between the anode and the cathode, where the reflection layer is insulated from the anode, and the OLED display panel is configured to transmit light from a side of the reflection layer away from the substrate. |
| US09337247B2 |
Organic light-emitting diode display with bottom shields
A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a drive transistor. Each display pixel may also have control transistors for compensating and programming operations. The array of display pixels may have rows and columns. Row lines may be used to apply row control signals to rows of the display pixels. Column lines (data lines) may be used to apply display data and other signals to respective columns of display pixels. A bottom conductive shielding structure may be formed below each drive transistor. The bottom conductive shielding structure may serve to shield the drive transistor from any electric field generated from the adjacent row and column lines. The bottom conductive shielding structure may be electrically floating or coupled to a power supply line. |
| US09337240B1 |
Integrated circuit package with a universal lead frame
A lead frame for an integrated circuit (IC) package is disclosed. The lead frame includes a center region and a plurality of lead fingers surrounding the center region. The plurality of lead fingers that surrounds the center region defines a periphery region around the center region. A portion of the plurality of lead fingers extends from the center region to hold the center region in place. Tie bars that are typically used to hold the center region in place may not be included in the lead frame. |
| US09337235B2 |
Method and apparatus for image sensor packaging
A backside illuminated image sensor having a photodiode and a first transistor in a sensor region and located in a first substrate, with the first transistor electrically coupled to the photodiode. The image sensor has logic circuits formed in a second substrate. The second substrate is stacked on the first substrate and the logic circuits are coupled to the first transistor through bonding pads, the bonding pads disposed outside of the sensor region. |
| US09337229B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes an epitaxial layer including a first surface and a silicon layer disposed on the first surface and including a second surface opposite to the first surface, wherein the silicon layer includes a plurality of pillars on the second surface, a portion of the plurality of pillars on a predetermined portion of the second surface are in substantially same dimension, each of the plurality of pillars on the predetermined portion of the second surface stands substantially orthogonal to the second surface, the plurality of pillars are configured for absorbing an electromagnetic radiation of a predetermined wavelength projected from the epitaxial layer and generating an electrical energy in response to the absorption of the electromagnetic radiation. |
| US09337227B2 |
Multi-substrate image sensor having a dual detection function
The present invention relates to an image sensor in which substrates are stacked, wherein a substrate-stacked image sensor according to the present invention is configured such that a first photodiode is formed on a first substrate, a second photodiode is formed on a second substrate, the two substrates are aligned with and bonded to each other to electrically couple the two photodiodes to each other, thereby forming a complete photodiode within one pixel. |
| US09337226B2 |
Image pickup element, method of manufacturing image pickup element, and electronic apparatus
An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface. |
| US09337225B2 |
Semiconductor device and manufacturing method thereof
A backside illumination semiconductor image sensing device includes a semiconductor substrate. The semiconductor substrate includes a radiation sensitive diode and a peripheral region. The peripheral region is proximal to a sidewall of the backside illumination semiconductor image sensing device. The backside illumination semiconductor image sensing device further includes a first anti reflective coating (ARC) on a backside of the semiconductor substrate and a dielectric layer on the first anti reflective coating. Additionally, a radiation shielding layer is disposed on the dielectric layer. Moreover, the backside illumination semiconductor image sensing device has a photon blocking layer on the sidewall of the backside illumination semiconductor image sensing device. The at least a portion of a sidewall of the radiation shielding layer is not covered by the photon blocking layer and the photon blocking layer is configured to block photons penetrating into the semiconductor substrate. |
| US09337224B2 |
CMOS image sensor and method of manufacturing the same
A CMOS image sensor has a photodiode including first and second impurity layers sequentially formed on a substrate, an isolation layer on the second impurity layer, and a transfer gate structure through the second impurity layer. The transfer gate structure contacts a top surface of the first impurity layer and a portion of the second impurity layer and includes a bottom surface having a step shape. |
| US09337222B2 |
Solid-state imaging apparatus
In order to suppress a variation of a signal held by each signal holding unit, a solid-state imaging apparatus of the present invention is characterized in that, when a clamp operation of a pixel output signal is performed in the signal holding unit, a time changing rate of an amplitude of a drive pulse supplied to the selecting unit for turning from a non-conducting state to a conducting state is not larger than a time changing rate of the amplitude of the drive pulse supplied to the selecting unit for turning from the conducting state to the non-conducting state. |
| US09337216B2 |
Substrate device and method for manufacturing same
The present invention allows a current leakage path to be reliably disconnected even when a conductive film residue occurs between data wiring lines. An interlayer insulating film of a TFT panel includes an interlayer insulating film opening at a position corresponding to a pattern edge of an insulating protective film. |
| US09337209B1 |
Semiconductor device and method of fabricating the same
A method of fabricating a semiconductor device, including the following steps. A plurality of fin structures are formed on a substrate. There is a trench between the fin structures. At least two times of circulating processes are performed. The circulating processes include: a deposition process and an etching process. The deposition process is performed to fill a first conductor material layer in the trench. The first conductor material layer covers top parts and sidewalls of the fin structures. The etching process is performed to remove a part of the first conductor material layer. |
| US09337208B2 |
Semiconductor memory array with air gaps between adjacent gate structures and method of manufacturing the same
A method of manufacturing a semiconductor device is provided. Gate structures are formed on a substrate, and a first dielectric layer having grooves is formed between two adjacent gate structures. An upper surface of the first dielectric layer is lower than an upper surface of the gate structures. Afterwards, an intermediate layer is formed to cover the gate structures, the first dielectric layer, and the grooves, and openings are formed therein. Each opening is formed between two adjacent gate structures, and the first dielectric layer is removed through the opening. Next, a second dielectric layer is formed on the intermediate layer, so as to define an air gap between two adjacent gate structures. Furthermore, a semiconductor device is provided. |
| US09337207B2 |
Semiconductor devices including word line interconnecting structures
A semiconductor memory device includes a substrate including a cell region and an interconnection region, adjacent first and second rows of vertical channels extending vertically from the substrate in the cell region, and layers of word lines stacked on the substrate. Each layer includes a first word line through which the first row of vertical channels passes and a second word line through which the second row of vertical channels passes, and the word lines include respective word line pads extending into the interconnection region. An isolation pattern separates the first and second word lines in the cell region and the interconnection region. First and second pluralities of contact plugs are disposed on opposite sides of the isolation pattern in the interconnection region and contact the word line pads. |
| US09337203B2 |
Semiconductor device with line-type air gaps and method for fabricating the same
A method includes: forming a first contact hole by etching a first inter-layer dielectric layer; forming a preliminary first conductive plug that fills the first contact hole; forming a bit line structure over the preliminary first conductive plug; forming a first conductive plug by etching the preliminary first conductive plug so that a gap is formed between a sidewall of the first contact hole and the first conductive plug; forming an insulating plug in the gap; forming a multi-layer spacer including a sacrificial spacer; forming a second conductive plug neighboring the bit line structures and the first conductive plugs with the multi-layer spacer and the insulating plug therebetween; and forming a line-type air gap within the multi-layer spacer by removing the sacrificial spacer. |
| US09337186B2 |
Semiconductor device and a method for manufacturing a semiconductor device having a semi-insulating region
A semiconductor device and a method for forming a semiconductor device are provided. The semiconductor device includes a semiconductor body including a diode-structure with a pn-junction, and an edge-termination structure arranged in a peripheral area of the semiconductor body. The edge-termination structure includes an insulating region partially arranged in the semiconductor body adjacent the pn-junction and a semi-insulating region arranged on the insulating region and spaced apart from the semiconductor body. The semi-insulating region forms a resistor connected in parallel with the diode-structure. |
| US09337182B2 |
Method to integrate different function devices fabricated by different process technologies
The present disclosure is directed to an apparatus and method for manufacture thereof. The apparatus includes a first passive substrate bonded to a second active substrate by a conductive metal interface. The conductive metal interface allows for integration of different function devices at a wafer level. |
| US09337178B2 |
Method of forming an ESD device and structure therefor
In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is configured to enable a transistor or a transistor of an SCR responsively to an input voltage having a value that is no less than the trigger value of the ESD device. |
| US09337177B2 |
Integrated sensor structure
Embodiments of the present invention provide a method for manufacturing an integrated sensor structure. In one step, a semiconductor substrate having integrated readout electronics and a metallization structure is provided, the metallization structure including tungsten and being exposed on a surface of the semiconductor substrate. In another step, a sensor layer is deposited onto the surface of the semiconductor substrate, the semiconductor substrate having the integrated readout electronics and the metallization structure being exposed, when depositing the sensor layer, to a temperature which is above a maximum temperature used when generating the integrated readout electronics such that the sensor layer is connected to the integrated readout electronics via the metallization structure. |
| US09337175B2 |
Light emitting device and method of fabricating the same
A light emitting device and a method of fabricating the same. The light emitting device includes a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells includes a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside. |
| US09337174B2 |
Semiconductor device for suppressing inductance
According to one embodiment, a semiconductor device includes first to fourth circuit substrates. Each of the first to fourth circuit substrates includes a switching device. The first circuit substrate includes a first terminal unit and a second terminal unit set to a potential lower than a potential of the first terminal unit. The third circuit substrate includes a fifth terminal unit and a sixth terminal unit set to a potential lower than a potential of the fifth terminal unit. The first circuit substrate overlaps the third circuit substrate. The second circuit substrate overlaps the fourth circuit substrate. A direction from the first terminal unit toward the second terminal unit is reversely oriented with respect to a direction from the fifth terminal unit toward the sixth terminal unit. |
| US09337173B2 |
Three-dimensional inter-chip contact through vertical displacement MEMS
An electrically conducting, vertically displacing microelectromechanical system (MEMS) is formed on a first integrated circuit chip. The first integrated circuit chip is physically connected to a three-dimensional packaging structure. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and a second integrated circuit chip. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes contact with a contact pad on the second integrated circuit chip when it is in the second position forming a conductive path and providing electrical communication between the first integrated circuit chip and the second integrated circuit chip. The MEMS avoids making contact with the contact pad on the second integrated circuit chip when it is in the first position. |
| US09337172B2 |
Semiconductor device
Provided is a small and thin semiconductor device while preventing contamination of a wire bonding terminal caused by creeping-up of a die bond. The semiconductor device includes: a first semiconductor chip having a main surface formed with electrodes; an extension part extended outward from a side end surface of the first semiconductor chip; a rewiring layer formed from the main surface of the first semiconductor chip to a first surface of the extension part; a connection terminal provided on the rewiring layer of the extension part; a die bond that fixes the first semiconductor chip and the extension part to a substrate; and in the extension part, a step outside the connection terminal. |
| US09337171B2 |
Full bridge rectifier module
A full bridge rectifier includes four bipolar transistors, each of which has an associated parallel diode. A first pair of inductors provides inductive current splitting and thereby provides base current to/from one pair of the bipolar transistors so that the collector-to-emitter voltages of the bipolar transistors are low. A second pair of inductors similarly provides inductive current splitting to provide base current to/from the other pair of bipolar transistors. In one embodiment, all components are provided in a four terminal full bridge rectifier module. The module can be used as a drop-in replacement for a conventional four terminal full bridge diode rectifier. When current flows through the rectifier module, however, the voltage drop across the module is less than one volt. Due to the reduced low voltage drop, power loss in the rectifier module is reduced as compared to power loss in a conventional full bridge diode rectifier. |
| US09337168B2 |
Hermetic wafer level packaging
Provided is a wafer level packaging. The packaging includes a first semiconductor wafer having a transistor device and a first bonding layer that includes a first material. The packaging includes a second semiconductor wafer having a second bonding layer that includes a second material different from the first material, one of the first and second materials being aluminum-based, and the other thereof being titanium-based. Wherein a portion of the second wafer is diffusively bonded to the first wafer through the first and second bonding layers. |
| US09337166B2 |
Wire bonding apparatus and bonding method
Provided is a wire bonding apparatus capable of performing high-speed wedge wire bonding, the apparatus including: a bonding tool having a through hole and a pressing surface for pressing a wire; a clamper for holding the wire; and a control unit. The control unit includes: wire tail extension unit that moves the bonding tool, after wedge bonding of the wire to a first lead, upward and along a second straight line connecting a second pad and a second lead, and causes the wire to extend from the through hole in a direction along the second straight line from the second pad to the second lead; and tail cut unit that, after causing the wire tail to extend, cuts the wire tail by moving the bonding tool in the direction along the second straight line connecting the second pad and the second lead while the clamper is closed. |
| US09337165B2 |
Method for manufacturing a fan-out WLP with package
The present disclosure is directed to a method for making a microelectronic package that includes assembling a microelectronic unit with a substrate, and electrically connecting redistribution contacts on the microelectronic unit and terminals on the substrate with a conductive matrix material extending within at least one opening extending through the substrate. |
| US09337164B2 |
Coating layer for a conductive structure
A coating layer for use in copper integrated circuit interconnect and other conductive structures hinders and decreases oxide growth on surfaces of such conductive structures. The coating layer includes an amorphous copper containing layer deposited on a crystalline copper substrate, such as utilized for a lead frame and a bonding wire. Additional amorphous layers may be interposed between the amorphous copper containing layer and the copper substrate, such as an amorphous tantalum nitride layer and an amorphous titanium nitride layer. |
| US09337160B2 |
Copper wire receiving pad
One embodiment is directed to a welding pad capable of receiving a ball-shaped copper wire at its end, including a first copper pad coated with a protection layer and topped with a second pad containing aluminum having dimensions smaller than those of the first pad and smaller than the ball diameter once said ball has been welded to the welding pad. |
| US09337158B2 |
Integrated circuit device and electrostatic discharge protection device thereof
An integrated circuit (IC) device includes an IC and an electrostatic discharge (ESD) protection device. The IC has a substrate, a core and a power mesh. The power mesh has a power electrode, a grounding electrode and a seal ring. The core is formed inside the grounding electrode. The power electrode is formed between the seal ring and the grounding electrode. The ESD protection device has multiple switch triggering units, multiple switching units and multiple discharging units formed on the substrate and electrically connected between the power electrode and the grounding electrode. The switching units turn on corresponding discharging units upon detecting occurrence of ESD to guide static electricity on the power electrode to the grounding electrode, thereby preventing the core from being damaged by static electricity. |
| US09337149B2 |
Semiconductor devices and methods of fabricating the same
Semiconductor devices may include a substrate including an active region defined by a device isolation layer, source/drain regions in the active region, word lines extending in a first direction parallel to the active region and being arranged in a second direction crossing the first direction, a bit line pattern extending in the second direction and crossing over a portion of the active region positioned between the word lines, and a graphene pattern covering at least a portion of the bit line pattern. |
| US09337148B2 |
Chip with programmable shelf life
A structure includes a first interconnect structure and a second interconnect structure each located within an interlevel dielectric (ILD), a first top metal layer and a second top metal layer disposed on and in direct electrical connection with the first interconnect, a third top metal layer and a fourth top metal layer disposed on and in direct electrical connection with the second interconnect, a silicon dioxide layer above the first, second, third and fourth top metal layers, the silicon layer is in direct contact with the first and fourth top metal layers, and a barrier layer separating the silicon dioxide layer from each of the second and third top metal layers, a high resistance connection exist between the third top metal layer and the fourth top metal layer due to the presence of the silicon dioxide layer. |
| US09337146B1 |
Three-dimensional integrated circuit stack
A particular three-dimensional integrated circuit stack includes a first die including a first bonding interface and a first plurality of interconnect layers arranged according to a first Manhattan wiring scheme. The three-dimensional integrated circuit stack also includes a second die including a second bonding interface and a second plurality of interconnect layers arranged according to a second Manhattan wiring scheme. The first die and the second die stacked with the first bonding interface coupled to the second bonding interface such that the first Manhattan wiring scheme and the second Manhattan wiring scheme are non-Manhattan with respect to each other. |
| US09337145B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes: a semiconductor substrate; a first semiconductor pillar above the semiconductor substrate; a first insulating layer comprising a first section and a second section, the first section being in contact with the semiconductor substrate and a bottom of the first semiconductor pillar, and the second section covering a side of the first semiconductor pillar; conductive layers and second insulating layers stacked one by one above the semiconductor substrate and covering the second section of the first insulating layer; a first plug on the first semiconductor pillar; and an interconnect on the first plug. |
| US09337143B2 |
E-fuse structure with methods of fusing the same and monitoring material leakage
The present disclosure generally provides for an e-fuse structure and corresponding method for fusing the same and monitoring material leakage. The e-fuse structure can include a metal dummy structure and an electrical fuse link substantially aligned with a portion of the metal dummy structure, wherein the metal dummy structure cools at least part of the electrical fuse link in response to an electric current passing through the electrical fuse link. |
| US09337140B1 |
Signal bond wire shield
A semiconductor device includes a semiconductor die having opposing first and second main surfaces, contact pads and a metal ring accessible from the first main surface, and signal leads surrounding and spaced from the die. Each of the signal leads has a first end near the die, a second end remote from the die, and a body extending between the first and second ends. A dummy lead frame is disposed between the signal leads first ends and the die, and connected to a fixed potential. First bond wires are coupled to respective ones of the signal leads and the contact pads. Second, shield bond wires, located adjacent to respective ones of the bond wires, are coupled to the dummy lead frame and the metal ring. |
| US09337138B1 |
Capacitors within an interposer coupled to supply and ground planes of a substrate
An embodiment of an apparatus to reduce supply voltage noise with capacitors of an interposer of a stacked die is disclosed. In this embodiment, an interposer is coupled to a first integrated circuit die using a first plurality of interconnects. A substrate is coupled to the interposer using a second plurality of interconnects. The substrate includes a supply voltage plane and a ground plane, each of which is coupled to the first integrated circuit die using the second plurality of interconnects, the interposer, and the first plurality of interconnects. The interposer includes capacitors coupled in parallel using the supply voltage plane, the ground plane, and the second plurality of interconnects, where capacitance from capacitors of the interposer is provided to the first integrated circuit die using the supply voltage plane and the ground plane of the substrate. |
| US09337137B1 |
Method and system for solder shielding of ball grid arrays
Methods and systems for solder shielding of ball grid arrays are disclosed and may include placing an array of solder balls onto a substrate, where the substrate may comprise a contact pad for each of the solder balls and a subset of the contact pads may be coupled via a solder mask opening. A subset of the array of solder balls may be coupled utilizing a solder reflow process and via the solder mask opening. The coupled subset may comprise an outer perimeter of the array. The substrate may comprise an interposer or an integrated circuit die, where the coupled subset shields circuitry from receiving electromagnetic interference. The substrate may comprise a packaging substrate or a printed circuit board (PCB) and the coupled subset may be coupled to a ground plane. The subset of the array of solder balls may be utilized to generate one or more reactive elements. |
| US09337134B2 |
Semiconductor device
Reliability of a semiconductor device is improved. A semiconductor device has a base material comprised of insulating material having a through hole, a terminal formed on a lower surface of the base material, and a semiconductor chip mounted on an upper surface of the base material in a face-up manner. Further, the semiconductor device has a conductive member such as a wire, which electrically connects a pad of the semiconductor chip with an exposed surface of the terminal which is exposed from the through hole of the base material, and has a sealing body for sealing the conductive member, inside of the through hole of the base material, and the semiconductor chip. An anchor means is provided in a region of the exposed surface of the terminal which is exposed from the through hole of the base material except for a joint portion joined with the conductive member such as the wire. |
| US09337132B2 |
Methods and configuration for manufacturing flip chip contact (FCC) power package
A power device package for containing, protecting and providing electrical contacts for a power transistor includes a top and bottom lead frames for directly no-bump attaching to the power transistor. The power transistor is attached to the bottom lead frame as a flip-chip with a source contact and a gate contact directly no-bumping attaching to the bottom lead frame. The power transistor has a bottom drain contact attaching to the top lead frame. The top lead frame further includes an extension for providing a bottom drain electrode substantially on a same side with the bottom lead frame. In a preferred embodiment, the power device package further includes a joint layer between device metal of source, gate or drain and top or bottom lead frame, through applying ultrasonic energy. |
| US09337131B2 |
Power semiconductor device and the preparation method
An ultrathin power semiconductor package with high thermal dissipation performance and its preparation method are disclosed. The package includes a lead frame unit with a staggered structure including an upper section and a lower section. A thin layer is attached on the surface of the lead frame unit having a plurality of contact holes on the upper section and at least one opening on the lower section. A semiconductor chip is attached on the opening on the lower section of the lead frame unit and then a plurality of metal bumps are deposited, where one metal bump is formed on each contact hole on the upper section and on each of the electrodes on the top surface of the semiconductor chip. |
| US09337128B2 |
Semiconductor device
A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is bonded, a lead disposed around the island, a bonding wire extended between the surface of the semiconductor chip and the upper surface of the lead, and a resin package sealing the semiconductor chip, the island, the lead, and the bonding wire, while the lower surface of the island and the lower surface of the lead are exposed on the rear surface of the resin package, and the lead is provided with a recess concaved from the lower surface side and opened on a side surface thereof. |
| US09337127B2 |
Ultra-thin semiconductor device and preparation method thereof
A small and ultra-thin power semiconductor device and a preparation method are disclosed. The device includes a chip mounting unit with a plurality of pads with a plate arranged on top surface of each pad; a semiconductor chip flipped and attached on the chip mounting unit, where the electrodes at the front of the chip are electrically connected to the pads; a plastic packaging body covering the chip mounting units and the chip, where the top surface of the plate and the back surface of the chip are exposed out from top surface of the plastic packaging body and the bottom surfaces of the pads are exposed out of the bottom surface of the plastic packaging body; a plurality of top metal segments arranged on the top surface of the plastic packaging body and electrically connected to the top surface of each plate and the back surface of the chip. |
| US09337126B2 |
Integrated circuit and fabricating method thereof
An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a first substrate, a second substrate, and a bump pad. The first substrate has at least one active device and a plurality of first metallic pads electrically connected to the active device. The first substrate has front-end-of-line processing layers without back-end-of-line processing layers over the front-end-of-line processing layers. The second substrate has a semiconductor substrate and an interconnect structure disposed on the semiconductor substrate, and the interconnect structure has at least one second metallic pad. The second substrate does not include any active devices. The bump pad is sandwiched by the first substrate and the second substrate. The active device and the first metallic pad of the first substrate are electrically connected to the second metallic pad of the second substrate through the bump pad. |
| US09337124B1 |
Method of integration of wafer level heat spreaders and backside interconnects on microelectronics wafers
A method for forming a wafer level heat spreader includes providing a mesh wafer, the mesh wafer having a plurality of openings and mesh regions between the openings, bonding the mesh wafer to a backside of an integrated circuit (IC) wafer, the IC wafer comprising a plurality of circuits; and electroplating a heat sink material through the plurality of openings and onto to the backside of the IC wafer. |
| US09337120B2 |
Multi-chip module with multiple interposers
A Multi-Chip Module is presented herein that comprises a package substrate, at least two integrated circuit devices, each of which is electrically coupled to the package substrate, and an interposer. Formed in the interposer are electrical connections which are predominantly horizontal interconnects. The first interposer is arranged to electrically couple the two integrated circuit devices to each other. Methods for manufacturing a Multi-Chip Module are also presented herein. |
| US09337113B2 |
Semiconductor device
A semiconductor device includes a transistor, lead frames, a metal spacer, one surface of which is bonded to the transistor by a first bonding material and the other surface of which is bonded to the lead frame by a second bonding material, and a plastic mold. The plastic mold packages the transistor and the metal spacer. One surface of each of the lead frames is attached to the plastic mold. Strength of the second bonding material is lower than strength of the first bonding material. According to the above configuration, when stress is repeatedly applied to the semiconductor device, a crack occurs earlier in the second bonding material than in the first bonding material. The stress is buffered at the first bonding material. |
| US09337108B2 |
Semiconductor device with metal gate and high-k dielectric layer, CMOS integrated circuit, and method for fabricating the same
A semiconductor device includes a gate dielectric layer over a substrate, a metal layer over the gate dielectric layer, a capping layer over the metal layer, wherein the capping layer includes a plurality of dipole forming elements concentrated at the interface between the metal layer and the capping layer. |
| US09337104B1 |
Method for chemical mechanical polishing of high-K metal gate structures
A method for manufacturing a semiconductor device includes providing a substrate, a dielectric layer on the substrate, a first hard mask layer on the substrate, and a second hard mask layer on the first hard mask layer. The method also includes removing the first hard mask layer using a reactive gas that does not cause damage to the dielectric layer to improve the performance and yield of the semiconductor device. |
| US09337102B2 |
Method for manufacturing semiconductor device including doping epitaxial source drain extension regions
A method for manufacturing a semiconductor device comprises, including forming a plurality of fins on a substrate, forming, a dummy gate stack on the fins forming a gate spacer on opposite sides of the dummy gate stack, forming source/drain trenches by etching the fins with the gate spacer and the dummy gate stack as a mask, forming source/drain extension regions on the bottom and sides of the trenches by performing lightly-doping ion implantation; and by performing epitaxial growth in and/or on the source/drain trenches, removing the dummy gate stack to form a gate trench; and forming a gate stack in the gate trench. |
| US09337099B1 |
Special constructs for continuous non-uniform active region FinFET standard cells
Methods for abutting two cells with different sized diffusion regions and the resulting devices are provided. Embodiments include abutting a first cell having first drain and source diffusion regions and a second cell having second drain and source diffusion regions, larger than the first diffusion regions, by: forming a dummy gate at a boundary between the two cells; forming a continuous drain diffusion region having an upper portion crossing the dummy gate and encompassing the entire first drain diffusion region and part of the second drain diffusion region and having a lower portion beginning over the dummy gate and encompassing a remainder of the second drain diffusion region; forming a continuous source diffusion region that is the mirror image of the continuous drain diffusion region; and forming a poly-cut mask over the dummy gate between, but separated from, the continuous drain and source diffusion regions. |
| US09337097B2 |
Chip package and method for forming the same
A chip package includes: a substrate; a signal pad and a ground pad disposed on the substrate; a first and a second conducting layers disposed on the substrate and electrically connected to the signal pad and the ground pad, respectively, wherein the first and the second conducting layers extend from an upper surface of the substrate towards a lower surface of the substrate along a first and a second side surfaces of the substrate, respectively, and the first and the second conducting layers protrude from the lower surface; and a protection layer disposed on the substrate, wherein the protection layer completely covers the entire portion of the first conducting layer located on the first side surface of the substrate, and the entire portion of the second conducting layer located on the second side surface of the substrate is not covered by the protection layer. |
| US09337094B1 |
Method of forming contact useful in replacement metal gate processing and related semiconductor structure
A method of forming a contact is provided. The method may include forming a liner against a spacer around a gate; selectively removing an upper portion of the liner adjacent the spacer, forming a void; forming a spacer extension by filling the void with a spacer material; and forming a contact self-aligned to the spacer extension. A semiconductor structure is also disclosed. The structure may include: a gate; a spacer around the gate; a spacer extension extending laterally from an upper portion of the spacer; and a contact self-aligned to the spacer extension. |
| US09337091B2 |
Semiconductor device having stable structure and method of manufacturing the same
The semiconductor device includes a stacked structure including conductive layers and insulating layers alternately stacked; semiconductor patterns configured to pass through the stacked structure; and contact plugs electrically coupled to the conductive layers, respectively, wherein each of the conductive layers includes a first region which has a first thickness, and a second region electrically coupled to the first region and a second thickness greater than the first thickness, and a second region of a lower conductive layer located under a second region of an upper conductive layer. |
| US09337086B2 |
Die up fully molded fan-out wafer level packaging
A method of manufacturing a semiconductor chip comprising placing a plurality of die units each having an active front surface and a back surface facing front surface up on an encapsulant layer, encapsulating the plurality of die units on the active surface of the encapsulant layer with an encapsulant covering a front surface and four side surfaces of each of the plurality of die units, and exposing, through the encapsulation on the front surface, conductive interconnects electrically connecting a die bond pad to a redistribution layer. |
| US09337082B2 |
Metal lines having etch-bias independent height
A dielectric material stack including at least a via level dielectric material layer, at least one patterned etch stop dielectric material portion, a line level dielectric material layer, and optionally a dielectric cap layer is formed over a substrate. At least one patterned hard mask layer including a first pattern can be formed above the dielectric material stack. A second pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure. The first pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure while the second pattern is transferred through the via level dielectric material layer to form integrated line and via trenches, which are filled with a conductive material to form integrated line and via structures. |
| US09337081B2 |
Semiconductor device and method of manufacturing the same
Manufacturing stability of a semiconductor device is improved. A method of manufacturing a semiconductor device includes the steps of: forming an etching stopper film over a first interlayer insulating film; forming an inorganic insulating film over the etching stopper film; forming a resist film over the inorganic insulating film; selectively etching the etching stopper film and the inorganic insulating film by using the resist film as a mask to form a first opening in the etching stopper film and to form a second opening in the inorganic insulating film; removing the resist film by O2 plasma ashing; forming a second interlayer insulating film over the inorganic insulating film; and etching the second interlayer insulating film to form a wiring groove that is coupled to the second opening, and etching a portion located under the first opening of the first interlayer insulating film to form a via hole. |
| US09337076B2 |
Workpiece support structure with four degree of freedom air bearing for high vacuum systems
A workpiece adjustment assembly is disclosed. The assembly can include a shaft, a spherical bearing, and a wafer support. A spherical housing receives the spherical bearing and allows the bearing to rotate therein. The housing and bearing may form an air bearing. A seal may be formed in the housing to prevent gas from the air bearing and the ambient atmosphere from migrating to a process chamber side of the housing. A set of spherical air pads may be positioned on an ambient side of the bearing to press the bearing against the housing when the process chamber is not under vacuum conditions. The seal can include a set of differentially pumped grooves. The spherical bearing enables the wafer manipulation end, and a wafer attached thereto, to be moved with four degrees of freedom. The arrangement facilitates isocentric scanning of a workpiece. Methods for using the assembly are also disclosed. |
| US09337072B2 |
Apparatus and method for substrate clamping in a plasma chamber
The present invention generally provides methods and apparatus for monitoring and maintaining flatness of a substrate in a plasma reactor. Certain embodiments of the present invention provide a method for processing a substrate comprising positioning the substrate on an electrostatic chuck, applying an RF power between the an electrode in the electrostatic chuck and a counter electrode positioned parallel to the electrostatic chuck, applying a DC bias to the electrode in the electrostatic chuck to clamp the substrate on the electrostatic chuck, and measuring an imaginary impedance of the electrostatic chuck. |
| US09337071B2 |
Automated wafer defect inspection system and a process of performing such inspection
An automated defect inspection system has been invented and is used on patterned wafers, whole wafers, broken wafers, partial wafers, sawn wafers such as on film frames, JEDEC trays, Auer boats, die in gel or waffle packs, MCMs, etc., and is specifically intended and designed for second optical wafer inspection for such defects as metalization defects (such as scratches, voids, corrosion, and bridging), diffusion defects, passivation layer defects, scribing defects, glassivation defects, chips and cracks from sawing, solder bump defects, and bond pad area defects. |
| US09337070B2 |
Substrate processing apparatus, substrate processing method and storage medium
A particle level varied depending on a drying processing condition can be suppressed to be stably lowered. A batch type substrate processing apparatus include a cleaning processing unit 62 having a cleaning tank 69 that stores therein a cleaning solution for cleaning a substrate, and a drying processing unit 61 disposed above the cleaning tank 69 and having a drying chamber 65 configured to perform therein a drying process on the substrate. Based on a previously investigated relationship, an internal temperature of the drying chamber is set as an internal temperature of the drying chamber when loading the substrate thereinto corresponding to the batch size of a next batch process performed in the drying chamber, and the internal temperature of the drying chamber is adjusted to be identical to the set internal temperature of the drying chamber before loading the substrate into the drying chamber. |
| US09337068B2 |
Oxygen-containing ceramic hard masks and associated wet-cleans
A method of forming an oxygen-containing ceramic hard mask film on a semiconductor substrate involves receiving a semiconductor substrate in a plasma-enhanced chemical vapor deposition (PECVD) process chamber and depositing forming by PEVCD on the substrate an oxygen-containing ceramic hard mask film, the film being etch selective to low-k dielectric and copper, resistant to plasma dry-etch and removable by wet-etch. The method may further involve removing the oxygen-containing ceramic hard mask film from the substrate with a wet etch. Corresponding films and apparatus are also provided. |
| US09337067B2 |
High temperature electrostatic chuck with radial thermal chokes
A wafer support assembly including a wafer support and cooling plate with radial thermal chokes is provided. The cooling plate and wafer support may have limited contact and may not contact each other outside of certain limited thermal contact patches. The thermal contact patches may generally define one or more radial thermal choke regions. In some implementations, high- and low-temperature cooling systems may be placed at one or more locations across the cooling plate to assist in temperature management. |
| US09337066B2 |
Wafer cleaning module
The present disclosure relates to a wafer cleaning module for post CMP processes that reduces defects (e.g., watermarks, deposited particles) on a substrate, and an associated method. In some embodiments, the wafer cleaning module has a cleaning tank that may receive a semiconductor substrate within a cleaning medium. A pusher is may vertically move the semiconductor substrate from a starting position within the cleaning tank to an ending position. A position sensor may determine a position of the semiconductor substrate relative to a meniscus of the cleaning medium. Based upon the determined position, a control unit is may adjust a location of the starting position to a predetermined distance below the meniscus. |
| US09337064B2 |
Methods of protecting peripheries of in-process semiconductor wafers and related in-process wafers and systems
Methods of processing semiconductor wafers may involve, for example, encapsulating an active surface and each side surface of a wafer of semiconductor material, a plurality of semiconductor devices located on the active surface of the wafer, an exposed side surface of an adhesive material located on a back side surface of the wafer, and at least a portion of a side surface of a carrier substrate secured to the wafer by the adhesive material in an encapsulation material. At least a portion of the side surface of the adhesive material may be exposed by removing at least a portion of the encapsulation material. The carrier substrate may be detached from the wafer. Processing systems and in-process semiconductor wafers are also disclosed. |
| US09337063B2 |
Package for three dimensional integrated circuit
A wafer level package includes a semiconductor die bonded on a supporting wafer. The semiconductor die has at least a step recess at its substrate. An underfill layer is formed between the semiconductor die and the supporting wafer. Moreover, the height of the underfill layer is limited by the step recess. During a fabrication process of the wafer level package, the step recess helps to reduce the stress on the wafer level package. |
| US09337060B1 |
Filling materials and methods of filling through holes for improved adhesion and hermeticity in glass substrates and other electronic components
A glass substrate and method of processing the glass substrate for use in semi-conductor packaging applications. The glass substrate has top surface and a bottom surface. At least one through-hole extends from the top surface to the bottom surface of the glass substrate. At least one interior layer is disposed inside the through-hole. At least one external layer is disposed on the top surface and at least one external layer is disposed on the bottom surface. The through holes of the glass substrate are filled with a metallized paste material using thick film technology. The glass substrate is planarized after metallization to clean and flatten a surface of the glass substrate. The surface of the glass substrate is coated with at least one redistribution layer of a metal, a metal oxide, an alloy, a polymer, or a combination thereof. The paste material has improved adhesion to the through-holes. The filled through-holes are hermetic and have a low resistivity. |
| US09337058B2 |
Method for reducing nonuniformity of forward voltage of semiconductor wafer
There is provided a method for reducing the nonuniformity of forward voltage Vf of an N-type semiconductor wafer in which density of impurities included in an N-layer is nonuniformly distributed in a plane view of the semiconductor wafer. The method reduces the nonuniformity of forward voltage, by irradiating charged particles to the N-type semiconductor wafer, and generating defects in the N-layer to reduce the nonuniformity of forward voltage. In one aspect of the method, charged particles are irradiated so that a reaching positon in a depth direction or an irradiation density may differ according to the density of impurities in the N-layer in the plane view of the semiconductor wafer. |
| US09337055B2 |
Chemical circulation system and methods of cleaning chemicals
A method includes passing a chemical solution through a metal-ion absorber, wherein metal ions in the metal-ion absorber are trapped by the metal-ion absorber. The chemical solution exiting out of the metal-ion absorber is then used to etch a metal-containing region, wherein the metal-containing region includes a metal that is of a same element type as the metal ions. |
| US09337054B2 |
Precursors for silicon dioxide gap fill
A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO2/SiO2 trench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material. |
| US09337053B2 |
Method of forming contacts for a memory device
The present invention is generally directed to a method of forming contacts for a memory device. In one illustrative embodiment, the method includes forming a layer of insulating material above an active area of a dual bit memory cell, forming a hard mask layer above the layer of insulating material, the hard mask layer having an original thickness, performing at least two partial etching processes on the hard mask layer to thereby define a patterned hard mask layer above the layer of insulating material, wherein each of the partial etching processes is designed to etch through less than the original thickness of the hard mask layer, the hard mask layer having openings formed therein that correspond to a digitline contact and a plurality of storage node contacts for the dual bit memory cell, and performing at least one etching process to form openings in the layer of insulating material for the digitline contact and the plurality of storage node contacts using the patterned hard mask layer as an etch mask. |
| US09337052B2 |
Silicon-containing EUV resist underlayer film forming composition
A resist underlayer film forming composition for EUV lithography, comprising: as a silane, a hydrolyzable silane, a hydrolyzate of the hydrolyzable silane, a hydrolysis condensate of the hydrolyzable silane, or a mixture of any of the hydrolyzable silane, the hydrolyzate, and the hydrolysis condensate, wherein the hydrolyzable silane includes a combination of tetramethoxysilane, an alkyltrimethoxysilane, and an aryltrialkoxysilane, and the aryltrialkoxysilane is represented by formula (1): (R2)n2—R1—(CH2)n1—Si(X)3 Formula (1) In formula (1), R1 is an aromatic ring consisting of a benzene ring or a naphthalene ring or a ring including an isocyanuric acid structure, R2 is a substituent replacing a hydrogen atom on the aromatic ring and is a halogen atom or a C1-10 alkoxy group, and X is a C1-10 alkoxy group, a C2-10 acyloxy group, or a halogen group. |
| US09337050B1 |
Methods of forming fins for finFET semiconductor devices and the selective removal of such fins
One illustrative method disclosed herein includes, among other things, forming an inverted, generally T-shaped mandrel feature having a base mandrel structure and a substantially vertically oriented fin mandrel structure, the base mandrel structure having a lateral width that is greater than a lateral width of the fin mandrel structure, forming a sidewall spacer adjacent the sidewalls of the base mandrel structure and the fin mandrel structure, performing at least one etching process to remove portions of the inverted, generally T-shaped mandrel feature not covered by a sidewall spacer, wherein, after the etching process is completed, the sidewall spacers and remaining portions of the mandrel feature, collectively, define a fin pattern, and performing at least one additional process operation to form a plurality of fins in the substrate that correspond to the fin pattern. |
| US09337048B2 |
Method for disconnecting polysilicon stringers during plasma etching
A method of fabricating wordlines in semiconductor memory structures is disclosed that eliminates stringers between wordlines while maintaining a stable distribution of threshold voltage. A liner is deposited before performing a wordline etch, and a partial wordline etch is then performed. Remaining portions of the liner are removed, and the wordline etch is completed to form gates having vertical or tapered profiles. |
| US09337043B2 |
Metal gate transistor and method for forming the same
Various embodiments provide metal gate transistors and methods for forming the same. In an exemplary method, a substrate having a top surface and a back surface can be provided. A dummy gate can be formed on the top surface. A first interlayer dielectric layer can be formed on the top surface and planarized to expose the dummy gate. The dummy gate can be removed to form a trench. A metal gate stack can be formed to cover the first interlayer dielectric layer and to fill the trench. The metal gate stack can be planarized to remove a portion of the metal gate stack from the first interlayer dielectric layer to form a metal gate electrode in the trench. A remaining edge portion of the metal gate stack can exist over an annular region of the substrate and can be removed from the annular region by an edge cleaning process. |
| US09337042B2 |
Method for fabricating a metal high-k gate stack for a buried recessed access device
A method for fabricated a buried recessed access device comprising etching a plurality of gate trenches in a substrate, implanting and activating a source/drain region in the substrate, depositing a dummy gate in each of the plurality of gate trenches, filling the plurality of gate trenches with an oxide layer, removing each dummy gate and depositing a high-K dielectric in the plurality of gate trenches, depositing a metal gate on the high-K dielectric in each of the plurality of gate trenches, depositing a second oxide layer on the metal gate and forming a contact on the source/drain. |
| US09337039B2 |
Method for electrical activation of dopant species in a GaN film
The method includes the steps of a) Providing a stack having a support substrate and a film of GaN having dopant species, b) Directly bonding a shielding layer having a thickness higher than 2 micrometers to the surface of the film of GaN, so as to form an activation structure, and c) Applying a thermal budget to the activation structure according to conditions allowing to electrically activate at least one portion of the dopant species. |
| US09337035B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type located between the first electrode and the second electrode and having a region in which a carbon vacancy density becomes lower in a first direction from the first electrode to the second electrode, a second semiconductor layer of the first conductivity type located between the first electrode and the first semiconductor layer and having an impurity element concentration higher than the impurity element concentration of the first semiconductor layer, and a plurality of third semiconductor layers of a second conductivity type located between the second electrode and the first semiconductor layer. |
| US09337034B2 |
Method for producing a MOS stack on a diamond substrate
The invention relates to a method for producing a component comprising a conductive grid insulated from a semiconductor monocrystalline diamond substrate by an insulating region, comprising the following steps: a) oxygenating the surface of the substrate so as to replace the hydrogen surface terminations of the substrate with oxygen surface terminations; and b) forming the insulating region on the surface of the substrate by repeated monatomic layer deposition. |
| US09337033B1 |
Dielectric tone inversion materials
A process for patterning a hard mask material with line-space patterns below a 30 nm pitch and a 15 nm critical dimension by employing a spin-on titanium-silicon (TiSi) polymer or oligomer as a tone inversion material is provided. The spin-on TiSi material is spin-coated over a patterned OPL that includes a first pattern generated from a DSA based process. The spin-on TiSi material fill trenches within the patterned OPL to form a tone inverted pattern by removing the patterned OPL selective to the spin-on TiSi material. The inverted pattern is a complementary pattern to the first pattern, and is transferred into the underlying hard mask material by an anisotropic etch. |
| US09337031B2 |
Semiconductor devices and methods of manufacturing the same
A method of manufacturing a semiconductor device includes partially removing an upper portion of an active fin of a substrate loaded in a chamber to form a trench; and forming a source/drain layer in the trench, which includes providing a silicon source gas, a germanium source gas, an etching gas and a carrier gas into the chamber to perform a selective epitaxial growth (SEG) process using a top surface of the active fin exposed by the trench as a seed so that a silicon-germanium layer is grown; and purging the chamber by providing the carrier gas into the chamber to etch the silicon-germanium layer. |
| US09337030B2 |
Method to grow in-situ crystalline IGZO using co-sputtering targets
A co-sputter technique is used to deposit In—Ga—Zn—O films using PVD. The films are deposited in an atmosphere including both oxygen and argon. A heater setpoint of about 300 C results in a substrate temperature of about 165 C. One target includes an alloy of In, Ga, Zn, and O with an atomic ratio of In:Ga:Zn of about 1:1:1. The second target includes a compound of zinc oxide. The films exhibit the c-axis aligned crystalline (CAAC) phase in an as-deposited state, without the need of a subsequent anneal treatment. |
| US09337026B2 |
Graphene growth on a carbon-containing semiconductor layer
A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer during a high temperature anneal, during which the semiconductor material on the surface of the semiconductor-carbon alloy layer is evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed and the carbon concentration on the surface of the semiconductor-carbon alloy layer increases, the remaining carbon atoms in the top layers of the semiconductor-carbon alloy layer coalesce to form a graphene layer having at least one graphene monolayer. Thus, a graphene layer may be provided on a commercially available semiconductor substrate having a diameter of 200 mm or 300 mm. |
| US09337023B1 |
Buffer stack for group IIIA-N devices
A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided Group IIIA-N layer is deposited on the substrate, and a first essentially void-free Group IIIA-N layer is then deposited on the first voided Group IIIA-N layer. A first high roughness Group IIIA-N layer is deposited on the first essentially void-free Group IIIA-N layer, and a first essentially smooth Group IIIA-N layer is deposited on the first high roughness Group IIIA-N layer. At least one Group IIIA-N surface layer is then deposited on the first essentially smooth Group IIIA-N layer. |
| US09337020B2 |
Resist mask processing method using hydrogen containing plasma
A method for processing a resist mask includes: (a) a step of preparing, in a processing chamber, a target object to be processed having a patterned resist mask provided thereon; and (b) a step of generating a plasma of the hydrogen-containing gas by supplying a hydrogen-containing gas and supplying a microwave into the processing chamber. The hydrogen-containing gas may be, e.g., H2 gas. |
| US09337019B2 |
Method for manufacturing electronic component, and electronic component
Provided is a method for producing an electronic component, which is capable of forming a cured adhesive layer easily with high accuracy.The method for producing a curable film electronic component according to the present invention includes an application step in which an adhesive is applied onto a first electronic component body using an ink jet device to form an adhesive layer, a first light irradiation step in which an adhesive layer is irradiated with light from a first light irradiation part, an attachment step in which a second electronic component body is disposed on the adhesive layer irradiated with light and attached, and a step in which the adhesive layer is cured by heating, thereby giving an electronic component, the ink jet device includes an ink tank to store the adhesive, a discharge part, and a circulation flow path part, and in the application step, the adhesive is applied while being circulated in the ink jet device. |
| US09337017B2 |
Method for repairing damages to sidewalls of an ultra-low dielectric constant film
A method for repairing damages to sidewalls of an ultra-low dielectric constant film is disclosed by the present invention comprises the following steps: depositing an ultra-low dielectric constant film on an semiconductor substrate; dry-etching the ultra-low dielectric constant film to form a sidewall structure thereof; performing wet cleaning by using a chemical agent containing an unsaturated hydrocarbon having —O—C(Re)x; and performing ultraviolet curing. The present invention can restore pores size and porosity of the ultra-low dielectric constant film, and to keep effective dielectric constant to a minimum. |
| US09337016B2 |
Semiconductor device and method of manufacturing the same
An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced. |
| US09337013B2 |
Silicon wafer and method for producing the same
Methods for producing a silicon wafer from a defect-free silicon single crystal grown by a Czochralski (CZ) method are provided. The methods comprise: preparing a silicon wafer obtained by slicing the defect-free silicon single crystal and subjected to mirror-polishing; then performing a heat treatment step of subjecting the mirror-polished silicon wafer to heat treatment at a temperature of 500° C. or higher but 600° C. or lower for 4 hours or more but 6 hours or less; and performing a repolishing step of repolishing the silicon wafer after the heat treatment step such that a polishing amount becomes 1.5 μm or more. Therefore, it is an object to provide a method by which a silicon wafer can be produced at a high yield, the silicon wafer in which Light Point Defects (LPDs) are reduced to a minimum, the silicon wafer with a low failure-incidence rate in an inspection step and a shipment stage. |
| US09337009B2 |
Exponential scan mode for quadrupole mass spectrometers to generate super-resolved mass spectra
A novel scanning method of a mass spectrometer apparatus is introduced so as to relate by simple time shifts, rather than time dilations, the component signal (“peak”) from each ion even to an arbitrary reference signal produced by a desired homogeneous population of ions. Such a method and system, as introduced herein, is enabled in a novel fashion by scanning exponentially the RF and DC voltages on a quadrupole mass filter versus time while maintaining the RF and DC in constant proportion to each other. In such a novel mode of operation, ion intensity as a function of time is the convolution of a fixed peak shape response with the underlying (unknown) distribution of discrete mass-to-charge ratios (mass spectrum). As a result, the mass distribution can be reconstructed by deconvolution, producing a mass spectrum with enhanced sensitivity and mass resolving power. |
| US09337007B2 |
Apparatus and method for generating chemical signatures using differential desorption
The present invention is directed to a method and device to generate a chemical signature for a mixture of analytes. The present invention involves using a SPME surface to one or both absorb and adsorb the mixture of analytes. In an embodiment of the invention, the surface is then exposed to different temperature ionizing species chosen with appropriate spatial resolution to desorb a chemical signature for the mixture of analytes. |
| US09337004B2 |
Grounded confinement ring having large surface area
A wafer processing system is provided for use with a driver and a material supply source. The driver is operable to generate a driving signal. The material supply source is operable to provide a material. The wafer processing system includes an upper confinement chamber portion, a lower confinement chamber portion, a confinement ring, and an electro-static chuck. The upper confinement chamber portion has an upper confinement chamber portion inner surface. The lower confinement chamber portion is detachably disposed in contact with the upper confinement chamber portion. The lower confinement chamber portion has a lower confinement chamber portion inner surface. The confinement ring is removably disposed in contact with the upper confinement chamber portion inner surface and the lower confinement chamber portion inner surface. The confinement ring has a confinement ring inner surface. The electro-static chuck has an electro-static chuck upper surface and is arranged to receive the driving signal. The upper confinement chamber portion, the lower confinement chamber portion, the confinement ring and the electro-static chuck are arranged such that the upper confinement chamber portion inner surface, the lower confinement chamber portion inner surface, the confinement ring inner surface and the electro-static chuck upper surface surround a plasma-forming space that is capable of receiving the material. The upper confinement chamber portion, the lower confinement chamber portion, the confinement ring and the electro-static chuck are operable to transform the material into a plasma when the electro-static chuck receives the driving signal. The confinement ring has a non-rectangular cross section. |
| US09337000B2 |
Control of impedance of RF return path
A system for controlling an impedance of a radio frequency (RF) return path includes a matchbox further including a match circuitry. The system further includes an RF generator coupled to the matchbox to supply an RF supply signal to the matchbox via a first portion of an RF supply path. The RF generator is coupled to the matchbox to receive an RF return signal via a first portion of an RF return path. The system also includes a switch circuit and a plasma reactor coupled to the switch circuit via a second portion of the RF return path. The plasma reactor is coupled to the match circuitry via a second portion of the RF supply path. The system includes a controller coupled to the switch circuit, the controller configured to control the switch circuit based on a tune recipe to change an impedance of the RF return path. |
| US09336996B2 |
Plasma processing systems including side coils and methods related to the plasma processing systems
A plasma processing system for generating plasma to process a wafer. The plasma processing system includes a set of top coils for initiating the plasma, a set of side coils for affecting distribution of the plasma, and a chamber structure for containing the plasma. The chamber structure includes a chamber wall and a dielectric member. The dielectric member includes a top, a vertical wall, and a flange. The top is connected through the vertical wall to the flange, and is connected through the vertical wall and the flange to the chamber wall. The set of top coils is disposed above the top. The set of side coils surrounds the vertical wall. A vertical inner surface of the vertical wall is configured to be exposed to the plasma. The inner diameter of the vertical wall is smaller than the inner diameter of the chamber wall. |
| US09336995B2 |
Multiple radio frequency power supply control of frequency and phase
A system has a first RF generator and a second RF generator. The first RF generator controls the frequency of the second RF generator. The first RF generator includes a power source, a sensor, and a sensor signal processing unit. The sensor signal processing unit is coupled to the power source and to the sensor. The sensor signal processing unit scales the frequency of the first RF generator to control the frequency of the second RF generator. |
| US09336994B2 |
Multi charged particle beam writing apparatus and multi charged particle beam writing method
A charged particle beam writing apparatus includes a storage unit to store each pattern data of plural figure patterns arranged in each of plural small regions made by virtually dividing a writing region of a target workpiece to be written on which resist being coated. The charged particle beam writing apparatus further including an assignment unit to assign each pattern data of each figure pattern to be arranged in each of the plural small regions concerned, and a writing unit to write, for each of plural groups, each figure pattern in each of the plural small regions concerned by using a charged particle beam. |
| US09336993B2 |
Digital pattern generator (DPG) for E-beam lithography
A method of lithography including providing a first mirror array and a second mirror array of a digital pattern generator (DPG); the second mirror array is offset from the first mirror array in a first direction. A first data piece and a second data piece associated with an IC device, are received by the DPG. The first and second data piece each defines a state of a pixel of the DPG. The first data piece is provided to a first pixel of the DPG. The second data piece is also provided to the first pixel of the DPG. A first point on a photosensitive layer on a target substrate is exposed. The first point is defined by the first data piece and the second data piece. The target substrate moved in a second direction, perpendicular to the first direction to expose a second point. |
| US09336983B2 |
Scanning particle microscope and method for determining a position change of a particle beam of the scanning particle microscope
The invention refers to a scanning particle microscope comprising: (a) at least one reference object which is fixedly arranged at an output of the scanning particle microscope for a particle beam so that the reference object can at least partially be imaged by use of the electron beam; (b) at least one scanning unit operable to scan a particle beam of the scanning particle microscope across at least one portion of the reference object; and (c) at least one setting unit operable to change at least one setting of the scanning particle microscope. |
| US09336981B2 |
Charged particle detection system and multi-beamlet inspection system
A charged particle detection system comprises plural detection elements and a multi-aperture plate in proximity of the detection elements. Charged particle beamlets can traverse the apertures of the multi-aperture plate to be incident on the detection elements. More than one multi-aperture plate can be provided to form a stack of multi-aperture plates in proximity of the detector. A suitable electric potential supplied to the multi-aperture plate can have an energy filtering property for the plural charged particle beamlets traversing the apertures of the plate. |
| US09336980B2 |
Electron beam writing apparatus, and method for adjusting convergence half angle of electron beam
An electron beam writing apparatus includes an electron gun system to emit an electron beam, a height adjustment unit, arranged at the downstream side compared to the electron gun system with respect to the optical axis direction, to variably adjust a height position of the electron gun system, an electron lens, arranged at the downstream side compared to the height adjustment unit with respect to the optical axis direction, to converge the electron beam, a lens control unit to control, for each variably adjusted and changed height position of the electron gun system, the electron lens such that the electron beam forms a crossover at a predetermined position, and an objective lens, arranged at the downstream side compared to the electron lens with respect to the optical axis direction, to focus the electron beam having passed the electron lens. |
| US09336978B2 |
Protective device
A protective device including a substrate, a conductive section and a bridge element is provided. The conductive section is supported by the substrate, wherein the conductive section comprises a metal element electrically connected between first and second electrodes. The metal element serves as a sacrificial structure having a melting point lower than that of the first and second electrodes. The bridge element spans across the metal element in a direction across direction of current flow in the metal element, wherein the bridge element facilitates breaking of the metal element upon melting. |
| US09336970B2 |
Disconnecting switch
A disconnecting switch includes a contact part that includes a stationary contact and a movable contact, a shaft that moves the movable contact relative to the stationary contact, an open/close mechanism part that moves the shaft back and forth freely between a closed contact position at which the movable contact contacts with the stationary contact and an open contact position at which the movable contact is separated from the stationary contact, and a housing that houses at least the contact part and the shaft. The open/close mechanism part includes an operation lever, an arm that rotates according to an operation of the operation lever to move the shaft between the open contact position and the closed contact position, and a wheel rotatably attached to the housing. The arm has a rotation slot in which the wheel is placed so that the wheel moves when the arm rotates. |
| US09336962B2 |
Action button apparatus
The claimed embodiments contemplate methods, systems and apparatuses directed to an active display button. In various embodiments, an active display button may generally be a button containing one or more elements that move when the button is engaged. By example, and not limitation, these elements may include one or more reels, be they mechanical or video, or perhaps a rotating indicator. The active display button may also include lights, vibratory motors and other experience-enhancing implements. The active display button may be installed on a gaming machine and operated in conjunction with the gaming device, separate from the gaming machine on which it is installed or perhaps as part of the operation of the gaming machine. |
| US09336961B2 |
Blade-type fuse
In a blade-type fuse (10) according to the present invention one of an upper casing (20) and a lower casing (30) includes a fixing post (30K), the other casing includes a through-hole (20K) through which the fixing post (30K) is passed, and also the flat terminal portion (41) includes a through-hole (40K) through which the fixing post (30K) is passed. The flat terminal portion (41) is formed bilaterally symmetrically about a vertical line passing through a center of the blade-type fuse (10), and vertically symmetrically about a horizontal line passing through the center of the blade-type fuse (10). |
| US09336959B2 |
Collector, electrode structure, non-aqueous electrolyte cell, and electrical storage device
An object of the present invention is to provide a current collector which can decrease the internal resistance of a non-aqueous electrolyte battery, be used suitably for a non-aqueous electrolyte battery such as a lithium ion secondary battery and the like or for an electrical storage device such as a lithium ion capacitor and the like, and improve high rate characteristics. According to the present invention, a current collector which is structured by forming a resin layer possessing conductivity on at least one side of a conductive substrate is provided. The resin layer contains a chitosan-based resin and a conductive material, and the water contact angle of the surface of the resin layer measured by θ/2 method in a thermostatic chamber at 23° C. is 5 degrees or more and 60 degrees or less. In addition, an electrode structure, a non-aqueous electrolyte battery, and an electrical storage device which use the current collector are provided. |
| US09336954B2 |
Quasi-broadband doherty amplifier with associated capacitor circuit
An amplifier provides a first amplifier circuit (16), a second amplifier circuit (17), a first hybrid-coupler circuit (18) and a termination (3). The hybrid-coupler circuit (18) provides an output terminal (13) and an insulation terminal (12). In this context, the termination (3) is connected to the insulation terminal (12) of the hybrid-coupler circuit (18). The termination (3) comprises a first capacitor (34) and/or an inductance (35), which is disposed directly at the insulation terminal (12) of the hybrid-coupler circuit (18). |
| US09336951B2 |
Multilayer ceramic capacitor and board for mounting the same
There is provided a multilayer ceramic capacitor including: a ceramic body including a plurality of dielectric layers and having first and second main surfaces opposing each other, first and second side surfaces opposing each other, and first and second end surfaces opposing each other; first internal electrodes each having a first lead part exposed to the first side surface of the ceramic body; second internal electrodes respectively disposed to face the first internal electrodes, having at least one dielectric layer among the plurality of dielectric layers interposed therebetween, and each having a second lead part exposed to the first side surface of the ceramic body; first and second external electrodes connected to the first and second internal electrodes, respectively; a first conductive pattern connected to the second external electrode; and a second conductive pattern connected to the first external electrode. |
| US09336949B2 |
Low inductance integral capacitor assembly
The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes. By connecting two units of the two-capacitor assemblies in different ways, various four-capacitor assemblies (80; 90) can be configured to provide enhanced voltage and current multiplication. |
| US09336948B2 |
Laminated ceramic electronic component
A laminated ceramic capacitor includes a laminate including an inner layer portion including a ceramic dielectric layer and an internal electrode, and an outer layer portion defined by a ceramic dielectric layer. At both end portions of the laminate, external electrodes are connected to the internal electrode. In the outer layer portion, a glass layer is provided. An outer ceramic dielectric layer positioned outwardly of the glass layer has a different color from the color of an inner ceramic dielectric layer positioned inwardly of the glass layer. |
| US09336947B2 |
Dielectric composition for low-temperature sintering, multilayer ceramic electronic component including the same, and method of manufacturing multilayer ceramic electronic component
There is provided a dielectric composition for low-temperature sintering including BaTiO3 as a main ingredient, and xB2O3-(1-x)BaO as an accessory ingredient, wherein x ranges from 0.25 to 0.8, and the content of the accessory ingredient ranges from 0.1 to 2.00 mol %, based on 100 mol % of the main ingredient. |
| US09336944B2 |
Multilayer ceramic electronic component and board for mounting the same
There are provided a multilayer ceramic electronic component and a board for mounting the same. The multilayer ceramic electronic component includes a hexahedral ceramic body including dielectric layers and satisfying T/W>1.0 when a width thereof is defined as W and a thickness thereof is defined as T; an active layer in which capacitance is formed, by including a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having the dielectric layer interposed therebetween, an upper cover layer formed above the active layer; a lower cover layer formed below the active layer and having a greater thickness than the upper cover layer; and first and second external electrodes covering the end surfaces of the ceramic body, wherein when a thickness of the lower cover layer is defined as Tb, 0.03≦Tb/T≦0.25 is satisfied. |
| US09336943B2 |
Transformer
A transformer includes a magnetic core, a primary winding, and a plurality of secondary windings. The magnetic core has an axial and a radial direction. The primary winding includes a plurality of winding sections and at least one connecting section. The winding sections are arranged along the axial direction. The connecting section is connected between the two adjacent winding sections. Each of the winding sections includes a plurality of primary winding layers and pull-out portions. The primary winding layers surround the magnetic core and are arranged along the radial direction. One pull-out portion connects two primary winding layers adjacent to the pull-out portion. Part of normal projections of the primary winding layers on a surface of the magnetic core are located between normal projections of the pull-out portions on the surface of the magnetic core. The secondary windings surround the primary winding. |
| US09336940B2 |
Laminated inductor and array thereof
There is provided a laminated inductor including: a body having a plurality of sheets laminated in a width direction, and having first and second main surfaces in a thickness direction, third and fourth end surfaces in a length direction, and fifth and sixth side surfaces in the width direction; a first connection electrode formed on the first main surface of the body; first and second terminal electrodes formed on the second main surface of the body to be spaced apart from one another; a plurality of first internal conductive patterns connecting the first connection electrode and the first terminal electrode; and at least one or more second internal conductive patterns connecting the first connection electrode and the second terminal electrode. |
| US09336937B2 |
Co2Fe-based heusler alloy and spintronics devices using the same
To realize a spintronics device with high performance, it is an object of the present invention to provide a Co2Fe-based Heusler alloy having a spin polarization larger than 0.65, and a high performance spintronics devices using the same. A Co2Fe(GaxGe1-x) Heusler alloy shows a spin polarization higher than 0.65 by a PCAR method in a region of 0.25 |
| US09336933B2 |
Ferrite magnetic material
An object of the present invention is to provide a ferrite magnetic material which can provide a permanent magnet retaining high Br and HcJ as well as having high Hk/HcJ. The ferrite magnetic material according to a preferred embodiment is a ferrite magnetic material formed of hard ferrite, wherein a P content in terms of P2O5 is 0.001% by mass or more. |
| US09336932B1 |
Grain boundary engineering
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for creating magnetic material. One of the methods may make a compound that includes at least one of: i) an amount of Nd in a range of [6.1717, 11.8917] (at. %), inclusive, ii) an amount of Pr in a range of [1.5495, 4.821] (at. %), inclusive, or iii) an amount of Dy in a range of [0.2132, 5.3753] (at. %), inclusive, and an amount of Co in a range of [0, 4.0948] (at. %), inclusive, an amount of Cu in a range of [0.0545, 0.2445] (at. %), inclusive, and an amount of Fe in a range of [81.1749, 85.867] (at. %), inclusive. |
| US09336931B2 |
Chip resistor
The disclosure provides a chip resistor including: a substrate, two first electrodes, two second electrodes, a resistive layer, at least one protection layer and at least one coating layer. The protection layer covers part of the two first electrodes, and includes at least two overlay sides and at least one overlay plane. The coating layer covers the at least two overlay sides, the at least one overlay plane, and part of the two first electrodes and the two second electrodes. The chip resistor uses the two overlay sides and the overplay plane to extend a distance between the two first electrodes and the outside. Therefore, it is difficult for the airborne sulfur, sulfides and sulfur-containing compounds to enter and react with the two first electrodes. Thus, the chip resistor can resist corrosion of harmful substances such as sulfur, sulfides and sulfur-containing compounds or halogens on the electrodes. |
| US09336927B2 |
Halogen-free, flame retardant composition for wire and cable applications
A halogen-free, flame retardant composition comprises: A. A polymer blend comprising: 1. Polypropylene, and 2. Thermoplastic elastomer (TPE) other than the polypropylene of (A)(1), and B. An intumescent flame retardant comprising at least one of: 1. A compound of Formula 1 where M is at least one of melamine, morpholine, piperazine, piperidine, alkyl hydroxyl and a triazine polymer of Formula 2 where D is a heterocyclic or polyamine moiety, and m and n are independently integers the sum (m+n) of which is less than 1000, and 2. A piperazine phosphate. |
| US09336919B2 |
Methods for preparing colloidal nanocrystal-based thin films
Methods of exchanging ligands to form colloidal nanocrystals (NCs) with chalcogenocyanate (xCN)-based ligands and apparatuses using the same are disclosed. The ligands may be exchanged by assembling NCs into a thin film and immersing the thin film in a solution containing xCN-based ligands. The ligands may also be exchanged by mixing a xCN-based solution with a dispersion of NCs, flocculating the mixture, centrifuging the mixture, discarding the supernatant, adding a solvent to the pellet, and dispersing the solvent and pellet to form dispersed NCs with exchanged xCN-ligands. The NCs with xCN-based ligands may be used to form thin film devices and/or other electronic, optoelectronic, and photonic devices. Devices comprising nanocrystal-based thin films and methods for forming such devices are also disclosed. These devices may be constructed by depositing NCs on to a substrate to form an NC thin film and then doping the thin film by evaporation and thermal diffusion. |
| US09336917B2 |
X-ray apparatus, method of using the same and X-ray irradiation method
An X-ray apparatus that creates a virtual source having a narrow energy bandwidth and enables a high-resolution X-ray diffraction measurement; a method of using the same; and an X-ray irradiation method are provided. An X-ray apparatus 100 includes a monochromator 105 that focuses a divergent X-ray beam while dispersing it and a selection part 107 that is installed in a condensing position of the condensed X-ray beam for selecting an X-ray beam having a wavelength in a specific range, allowing it to pass through, and creating a virtual source. With this arrangement, it is possible to create a virtual source having a narrow energy bandwidth at a focal point 110 and by means of the virtual source a high-resolution X-ray diffraction measurement is available. By using the X-ray apparatus 100, it is possible to sufficiently separate an X-ray beam having such an extremely narrow energy bandwidth as, for example, Kα1 ray from Kα2 ray. In addition, it is also possible to cut out part of continuous X-ray beams to create a virtual source. |
| US09336914B2 |
Radioactive waste solidification method
A radioactive waste (zeolite to which Cs-137 was adsorbed) in a waste tank and a glass raw material (soda lime glass) in a glass raw material tank are supplied into a solidifying vessel. Graphite in a graphite tank is also supplied into the solidifying vessel. The solidifying vessel is filled with a mixture of the radioactive waste, glass raw material, and graphite and is then disposed in an adiabatic vessel. The radioactive waste and glass raw material in the adiabatic vessel are heated by thermal energy generated due to radiation emitted from Cs-137. The heat is transferred to the peripheral portion of the solidifying vessel through the graphite, raising the temperature of the peripheral portion. The glass raw material is melted and enters clearances among the radioactive waste, producing a vitrified radioactive waste. This radioactive waste solidification method can shorten a time taken to produce a vitrified radioactive waste. |
| US09336913B2 |
Radioactive organic waste treatment method
Disclosed is a method for treating a radioactive organic waste, the radioactive organic waste including a cation exchange resin adsorbing radionuclide ions, the method including the step of bringing the radioactive organic waste into contact with an organic acid salt aqueous solution containing an organic acid salt and whereby desorbing the radionuclide ions from the cation exchange resin, in which the organic acid salt contained in the organic acid salt aqueous solution includes a cation that is more readily adsorbable by the cation exchange resin than hydrogen ion is. This enables reduction in concentration of a radioactive substance in the radioactive organic waste and reduction in amount of a high-dose radioactive waste. |
| US09336912B2 |
Product cartridge for radionuclide
A product cartridge for a radionuclide including a product vial having a permeable cap and surrounded by a radiation shield and a filling cartridge having a separate radiation shield, the filling cartridge is supported adjacent the permeable cap by coupling the radiation shield of the filling cartridge to the radiation shield of the product vial, the filling cartridge is moveable within the radiation shield of the filling cartridge to engage and pierce the permeable cap during filling of the product vial, the filling cartridge includes an aperture on an end opposite the product vial that receives a radionuclide, a scavenger that removes heavy metals from the radionuclide and a filter that filters the biological contaminants, simultaneously venting the product vial as the radionuclide flows from the aperture through the filling cartridge and into the product vial. |
| US09336908B2 |
Pressurized water reactor with upper vessel section providing both pressure and flow control
A pressurized water reactor (PWR) includes a vertical cylindrical pressure vessel having a lower portion containing a nuclear reactor core and a vessel head defining an integral pressurizer. A reactor coolant pump (RCP) mounted on the vessel head includes an impeller inside the pressure vessel, a pump motor outside the pressure vessel, and a vertical drive shaft connecting the motor and impeller. The drive shaft does not pass through the integral pressurizer. The drive shaft passes through a vessel penetration of the pressure vessel that is at least large enough for the impeller to pass through. |
| US09336907B2 |
Pressure-tube reactor with coolant plenum
A pressure-tube nuclear reactor can include an outer shell having an interior to contain a moderator at a first pressure and a coolant plenum to receive the coolant fluid at a second pressure, the second pressure being greater than the first pressure. The reactor also includes a plurality of pressure tubes. Each pressure tube is received within and extends through a corresponding shell tube and is configured to releasably retain at least one fuel bundle. A first end of each pressure tube being coupled to the plenum tubesheet in fluid communication with the plenum chamber and a second end of each pressure tube fluidly connected to a coolant conduit to enable the coolant fluid to flow between the coolant plenum and each pressure tube and to flow from the nuclear reactor for further processing. |
| US09336905B2 |
Repair circuit and semiconductor apparatus using the same
A repair circuit includes a fuse set latch array including a plurality of fuse set latches, and configured to store fuse informations in target fuse latches selected among the plurality of fuse set latches in response to fuse latch select signals; a fuse information control unit configured to generate the fuse latch select signals by using boot-up source signals generated by differently combining boot-up mode region select informations according to a region determination signal; and a repair processing unit configured to compare an address inputted from an exterior and the fuse informations, and access a normal memory cell corresponding to the external address or a redundant memory cell. |
| US09336903B2 |
Semiconductor apparatus
A semiconductor apparatus includes an input buffer configured to buffer data inputted through a data input/output pad; a data input control unit configured to transfer an output of the input buffer to a data input/output line in response to a write clock; a test loop control unit configured to output one of a signal of the data input/output line and test latch data in response to a test mode signal; a data output control unit configured to output an output of the test loop control unit in response to a read clock; an output inversion select unit configured to output an output signal of the data output control unit by inverting or non-inverting it; and an output buffer configured to buffer an output signal of the output inversion select unit and output a resultant signal to a node which is coupled with the data input/output pad and input buffer. |
| US09336902B2 |
Semiconductor memory device, test control system, and method of operating test control system
A semiconductor memory device includes a plurality of memory cells electrically coupled to a plurality of word lines and a word line failure detection unit suitable for supplying a test voltage to a test target word line selected from among the plurality of word lines, and for detecting the test voltage transferred from at least one of the plurality of word lines, wherein the at least one of the plurality of word lines does not include the test target word line. |
| US09336900B2 |
Shift register and method of driving the same, and group of shift registers and method of driving the same
A shift register circuit is disclosed. In some embodiments, the shift register circuit includes six transistors and no capacitors. A group of such shift register circuits is also disclosed. In some embodiments, the shift registers of the group are connected so as to be configured to provide driving signals for a display. A method of using the shift registers is also disclosed. |
| US09336897B2 |
Shift register circuit
A shift register circuit comprises a first transistor connected between a clock terminal and an output terminal, a second transistor for charging a control electrode of the first transistor in response to activation of an output signal of the preceding stage, a third transistor for discharging the control electrode of the first transistor, an inverter using a control electrode of the third transistor as an output end, and a fourth transistor which discharges an input end of the inverter at power-off and is turned off after power-on. A fifth transistor which is a load element of the inverter charges the control electrode of the third transistor at power-on. It is thereby possible to initialize the respective levels of the nodes without any external initialization signal and prevent a decrease in the level change rate of the output signal in the shift register circuit. |
| US09336896B1 |
System and method for voltage regulation of one-time-programmable (OTP) memory programming voltage
An integrated circuit is provided that allows for the use of the same supply voltage pin to receive both a normal operating voltage for the integrated circuit (IC) and a one-time-programmable (OTP) memory program voltage sufficient to program an OTP memory located on the integrated circuit. In one embodiment, when an OTP programming voltage is received at a supply voltage pin of the IC, the OTP programming voltage is provided to the OTP memory of the integrated circuit and the OTP programming voltage is regulated to the normal operating voltage level prior to providing the voltage to the internal circuitry of the integrated circuit. As such, the present invention establishes a dual-purpose supply voltage pin, thereby eliminating the need for a separate OTP programming voltage pin on the integrated circuit. |
| US09336895B2 |
Memory device, semiconductor unit and method of operating the same, and electronic apparatus
A semiconductor unit with memory devices, each of the memory devices includes: a first semiconductor layer; second and third semiconductor layers; a first dielectric film and a first conductive film; first, second, and third electrodes electrically connected to the second semiconductor layer, the third semiconductor layer, and the first conductive film, respectively, the third electrode being electrically connected to the first electrode. In the memory devices, when a voltage equal to or higher than a predetermined threshold value is applied between the first and second electrodes, a filament that is a conductive path electrically linking the second and third semiconductor layers is formed in the region between the second and third semiconductor layers, and thereby, writing operation of information is performed. |
| US09336891B2 |
Look ahead read method for non-volatile memory
A read operation for selected memory cell on a selected word line compensates for program disturb which is a nonlinear function of the data state of an adjacent memory cell on an adjacent word line. When a command to perform a read operation for the selected memory cell is received, a read operation is first performed on the adjacent memory cell to determine its data state, or to classify the adjacent memory cell into a threshold voltage range which includes one or more data states, or a portion of a data state. The selected memory cell is then read using a baseline control gate voltage which does not provide compensation, and one or more elevated control gate voltages which provide compensation, to distinguish between two adjacent data states. An optimal sensing result is selected based on the data state or threshold voltage range of the adjacent memory cell. |
| US09336882B2 |
Semiconductor storage device and driving method thereof
A memory includes a cell array including nonvolatile memory cells. A power generator generates a power supply voltage for driving the cell array. A receiver receives a command and an address. A controller controls an active state of the cell array, the power generator, and the receiver. In an activation mode, the cell array, the power generator, and the receiver are turned into the active states. In a first power saving mode, the cell array, the power generator, and the receiver are turned into inactive states. In a second power saving mode, the cell array and the power generator are turned into the active states, and the receiver is turned into the inactive state. In a third power saving mode, at least a part of the power generator is turned into the active state, and the cell array and the receiver are turned into the inactive states. |
| US09336874B2 |
Mixed mode programming for phase change memory
Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory. |
| US09336869B2 |
Nonvoltile resistance memory and its operation thereof
A memory cell and the associated array circuits are disclosed. The memory array circuit includes a plurality of memory units, in which each of the memory units includes a storage device and a field-effect transistor. The storage device includes a top electrode, a bottom electrode and an oxide-based dielectric layer. The top electrode is formed by metal or metallic oxide dielectrics and connected to a word line. The bottom electrode is formed by metal, and the oxide-based dielectric layer is placed between the top electrode and the bottom electrode. The field-effect transistor includes a gate terminal connected to the bottom electrode, a source terminal connected to a ground line, and a drain terminal connected to a bit line. The resistance of the storage device is configured to be adjusted according to a first voltage applied to the word line and a second voltage applied to the bit line. |
| US09336868B1 |
Common plate switching reduction in resistive switching memory devices
Structures and operations of a resistive switching memory device are described herein. In one embodiment, a resistive switching memory device can include: a plurality of resistive memory cells, each configured to be programmed to a low resistance state by application of a first voltage in a forward bias direction, and erased to a high resistance state by application of a second voltage in a reverse bias direction; a plurality of common plates, each being connected to a subset of the resistive memory cells; a command detector configured to detect a write command to be executed as a first and second write operations; and a write controller configured to perform the first write operation on each resistive memory cell in a selected subset, and to perform the second write operation on at least one of the resistive memory cells in the selected subset based on the detected write command. |
| US09336865B1 |
Multi-port SRAM module and control method thereof
A multi-port SRAM module includes a cell array comprising a plurality of cells, each having a first port and a second port; a first word line which is coupled to a plurality of cells of a target row to open and close the first port; a second word line which is coupled to the cells of the target row to open and close the second port; and a switch, which is coupled to the first word line and the second word line and couples the second word line to a reference voltage level according to a voltage level of the first word line. |
| US09336864B2 |
Silicon germanium read port for a static random access memory register file
A static random access memory (SRAM) circuit includes a write port and a read port coupled to the write port. The read port includes a read bit line and a first p-type metal oxide semiconductor (PMOS) transistor having a silicon germanium (SiGe) channel. The read port also includes a second PMOS transistor having a second SiGe channel, where the second PMOS transistor is coupled to the first PMOS transistor. |
| US09336863B2 |
Dual write wordline memory cell
A static random-access memory (SRAM) memory cell includes a pair of cross-coupled inverters and a gating transistor coupled to a first node of a first inverter of the pair of cross-coupled inverters. A gate of the gating transistor is coupled to a first wordline. The gating transistor is configured to selectively couple a bitline to the first node of the first inverter responsive to a first wordline signal. The first inverter has a second node coupled to a second wordline. The first wordline and the second wordline are each independently controllable. |
| US09336861B1 |
Static random access memory (SRAM) bitcell and memory architecture without a write bitline
A bit cell and memory architecture wherein a write bitline is not required is presented. The bitcell and the memory architecture bring a huge improvement in the performance, dynamic power, leakage power, area, and the yield of the memory. |
| US09336857B2 |
Semiconductor memory device including stacked memory chips
A semiconductor memory device includes: a master chip suitable for generating a plurality of first control signals and a second control signal based on a read command; and a plurality of slave chips each suitable for latching data read from a plurality of memory cells included in a corresponding slave chip and transmitting the latched data to the master chip based on a correspond control signal of the first control signals, wherein the master chip latches the data transmitted from the slave chips based on the first control signals and outputs the data latched in the master chip based on the second control signal. |
| US09336854B2 |
Semiconductor memory apparatus
A semiconductor memory apparatus may include an active control portion configured to generate a preliminary bank active signal and a single bank refresh signal in response to a command, a refresh control signal, and a bank active signal. The semiconductor memory apparatus may also include a signal combination portion configured to enable the bank active signal when either the preliminary bank active signal or the single bank refresh signal is enabled. |
| US09336846B2 |
MRAM element with low writing temperature
MRAM element having a magnetic tunnel junction including a reference layer, a storage layer, a tunnel barrier layer between the reference and storage layers, and a storage antiferromagnetic layer. The storage antiferromagnetic layer has a first function of exchange-coupling a storage magnetization of the storage layer and a second function of heating the magnetic tunnel junction when a heating current in passed in the magnetic tunnel junction. The MRAM element has better data retention and low writing temperature. |
| US09336841B1 |
Pipeline register with data alignment therein
A device is disclosed that includes a first memory module and a second memory module. The first memory module is configured to output a data signal according to a first phase of a first control signal. The second memory module is connected to the first memory module and includes a latch and a derace latch. The latch is configured to hold a received data signal according to a second phase of a second control signal. The derace latch transmits the data signal from the first memory module to the latch according to the second phase of both of the first control signal and the second control signal. |
| US09336840B2 |
Semiconductor apparatus capable of compensating for data output time and method for controlling the same
A semiconductor apparatus may include a base die and a plurality of core dies stacked above the base die. Each of the core dies may be configured to output a strobe signal in response to a read command, and the base die may be configured to make remaining data output times correspond to any one data output time among respective data output times of the plurality of core dies, in response to the read command and the strobe signal. |
| US09336839B2 |
Integrated circuit and memory device
An integrated circuit may include a nonvolatile memory circuit, a data bus suitable for transferring data outputted from the nonvolatile memory circuit, a shift register suitable for sequentially activating first to Nth selection signals whenever a clock is activated, and first to Nth latch circuits corresponding to the first to Nth selection signals, respectively, and suitable for storing data of the data bus in response to activation of one or more of the first to Nth selection signals. |
| US09336836B2 |
Semiconductor memory device and driving method thereof
A semiconductor memory device in which capacitance of a capacitor is lower and integration degree is higher. A plurality of memory blocks is connected to one bit line BL_m. A memory block MB_n_m includes a sub bit line SBL_n_m, a write switch, and a plurality of memory cells. A sub bit line SBL_n+1_m adjacent to the sub bit line SBL_n_m is connected to an amplifier circuit AMP_n/n+1_m including two inverters and two selection switches. A circuit configuration of the amplifier circuit can be changed with the selection switches. The amplifier circuit is connected to the bit line BL_m through a read switch. Because of a sufficiently low capacitance of the sub bit line SBL_n_m, potential change due to electric charges of the capacitor in each memory cell can be amplified by the amplifier circuit AMP_n/n+1_m without an error, and the amplified data can be output to the bit line BL_m. |
| US09336834B2 |
Offsetting clock package pins in a clamshell topology to improve signal integrity
The disclosed embodiments relate to the design of a memory system which includes a set of one or more memory modules, wherein each memory module in the set has a clamshell configuration, wherein pairs of opposing memory packages containing memory chips are located on opposite sides of the memory module. The memory system also includes a multi-drop path containing signal lines which pass through the set of memory modules, and are coupled to memory packages in the set of memory modules. For a given signal line in the multi-drop path, a first memory package and a second memory package that comprise a given pair of opposing memory packages are coupled to the given signal line at a first location and a second location, respectively, wherein the first location and the second location are separated from each other by a distance d1 along the given signal line. |
| US09336831B2 |
HAMR drive fault detection system
An apparatus of the present disclosure includes a controller coupled to a read/write head wherein the controller is configured to perform various operations. More specifically, the controller is configured to monitor an operational parameter of the read/write head and to detect a fault based on the operational parameter. The fault indicates that a write enabling energy source is malfunctioning during a write operation. The controller is additionally configured, in response to the fault, to take remedial action to protect data associated with the write operation. |
| US09336830B1 |
Techniques for analyzing operations of one or more restaurants
Embodiments of the invention provide techniques for using operational data and/or video footage to identify and diagnose operational issues. In some embodiments, business metrics represented in data produced by a restaurant's operational systems are identified and stored, conditions which warrant attention are identified, and the metrics that may indicate potential causes for those conditions are identified. Video footage may be correlated with business metric data to assist in diagnosing and remediating issues. |
| US09336827B2 |
Systems and methods for browsing a mobile device with an in-vehicle user interface
Systems and methods for browsing a mobile device are provided. Some embodiments may include determining a location of each of a plurality of media files on the mobile device. The plurality of media files may be organized according to a predetermined configuration and may include at least two identical media files at different locations in the predetermined configuration. Similarly, some embodiments may include receiving a request for a requested media file of the plurality of media files at the vehicle computing device and determining which of the at least two identical media files is more accessible. Still some embodiments may include navigating the mobile device to one of the at least two identical media files that is more accessible and play the requested media file through a vehicle audio system. |
| US09336823B2 |
Playing audio in trick-modes
A method of playing a digital audio signal at a speed different from that at which it was recorded. The method comprises: playing a first segment of the signal; skipping to a second segment that is not contiguous with the first segment; and playing the second segment, wherein at least one of the first and second segment is played at a rate different from the rate at which it was recorded. |
| US09336821B2 |
Recording apparatus, and recording method
Provided is a recording apparatus including a light radiating unit that radiates light to an optical recording medium, a recording unit that performs light emission control of the light radiating unit, and performs recording on the optical recording medium, and a control unit that controls the recording unit in a manner that recording of remaining data starts from a position over a defect occurrence area, according to occurrence of a defect, in a state in which a logical address space and a physical address space are defined with respect to a recording area of the optical recording medium, and controls the recording unit in a manner that, when the buffer area is consumed and data is not completely recorded, a recording area of the remaining data that is not completely recorded is replaced with the spare area and the remaining data is recorded on the spare area. |
| US09336820B2 |
Data sector sync mark with multiple patterns
A data storage device may be configured with at least one data sector sync mark. Various embodiments are generally directed to a data sector having a sync mark and stored on a data storage medium with the sync mark having either a first or second patterns and a sync circuit configured to distinguish between the two different patterns to identify a status of at least some other portion of the data sector. |
| US09336816B1 |
Determining estimated position information of a magnetic recording tape using media thickness estimation
In one embodiment, a method includes acquiring, by the computer, position information from encoding on a magnetic medium, causing, by the computer, a reel around which the magnetic medium is wrapped to rotate a number of rotations, calculating, by the computer, an estimated thickness of the magnetic medium based on the position information, the number of rotations, and a pack radius of the magnetic medium on the reel, and causing to be stored, by the computer, the estimated thickness. In another embodiment, an apparatus includes a controller and logic integrated with and/or executable by the controller, the logic being configured to cause the controller to perform the foregoing method. |
| US09336809B2 |
Method for making an imprint template with data regions and non-data regions using block copolymers
A method to fabricate an imprint template for bit-patterned magnetic recording media using block copolymers (BCPs) integrates data region patterning and servo region patterning. A heat sink layer is formed on the imprint substrate only in the data regions. A sublayer for the BCP is deposited over both the data regions and the servo regions and patterned to form stripes in the data regions and servo features in the servo regions. A BCP is then deposited in both the data and servo regions. Only the BCP in the data regions is heated, which causes phase separation of the BCP in the data regions into the two BCP components. The selective heating may be accomplished by directed controlled laser radiation to only the data regions. The heat sink layer below the data regions absorbs the heat from the laser radiation, confining it to the data regions. |
| US09336808B2 |
Magnetic tape processing
A system including a magnetic tape processing system that includes a read/write head to write to a top surface of a magnetic tape. The read/write head provides a write head field gradient of at least 40 Oersteds per nanometer at the top surface of the magnetic tape. The magnetic tape processing system and the read/write head provide a track density of greater than 8000 tracks per inch, a bit density of greater than 440 kilo-bits per inch, and an aspect ratio of less than 70. |
| US09336806B2 |
Tape head with thermal tape-head distance sensor
Tape head with thermal tape-head distance sensor to reduce the distance between the tape and the head to allow an increase in areal density. A tape head designed for reading and/or writing to a tape, including: a tape bearing surface shaped to form an air bearing when moving the tape with respect to the tape bearing surface; a thermal tape-head distance sensor circuit adapted to sense heat dissipated at the level of the tape bearing surface by the tape and thereby sense a distance between the tape bearing surface and the tape; and tape-head distance control means connected to the thermal tape-head distance sensor circuit to receive a signal provided by the tape-head distance sensor circuit and configured to alter the distance according to a signal received from the tape-head distance sensor circuit. This invention is further directed to a method of tape-head distance control for the above tape head. |
| US09336805B2 |
Recording medium having independent track for velocity, timing and/or longitudinal position
A product according to one embodiment includes a magnetic recording tape having at least one first servo track, and a supplemental servo track positioned in a spare area located within a data band of the magnetic recording tape. An apparatus according to one embodiment includes a magnetic head and at least one module having an array of transducers. The apparatus is configured to read and/or write to magnetic recording media having at least one first servo track, and a supplemental servo track positioned in a spare area located within a data band of the magnetic recording tape. |
| US09336802B2 |
Zig-zag MIMO head reducing space between three sensors
The embodiments disclosed generally relate to a magnetic recording head having three magnetoresistive effect elements. The structure comprises a first magnetoresistive effect element on a lower magnetic shield layer. Additionally, two lower electrodes are disposed on the two sides of the first magnetoresistive effect element. A second magnetoresistive effect element is disposed on a lower electrode while a third magnetoresistive effect element on another lower electrode. An upper magnetic shield layer is disposed between the second magnetoresistive effect element and the third magnetoresistive effect element. The upper magnetic shield also serves as an electrode of the first magnetoresistive effect element. |
| US09336799B2 |
Method of forming a writer with an AFM write gap
A perpendicular magnetic recording (PMR) head is fabricated with main pole and a trailing edge shield antiferromagnetically coupled across a write gap by either having the write gap layer formed as a synthetic antiferromagnetic tri-layer (SAF) or formed as a monolithic layer of antiferromagnetic material. The coupling improves the write performance of the writer by enhancing the perpendicular component of the write field and its gradient. Methods of fabricating the writer are provided. |
| US09336794B2 |
Content identification system
The content of a media program is recognized by analyzing its audio content to extract therefrom prescribed features, which are compared to a database of features associated with identified content. The identity of the content within the database that has features that most closely match the features of the media program being played is supplied as the identity of the program being played. The features are extracted from a frequency domain version of the media program by a) filtering the coefficients to reduce their number, e.g., using triangular filters; b) grouping a number of consecutive outputs of triangular filters into segments; and c) selecting those segments that meet prescribed criteria, such as those segments that have the largest minimum segment energy with prescribed constraints that prevent the segments from being too close to each other. The triangular filters may be log-spaced and their output may be normalized. |
| US09336792B2 |
Systems and methods for voice enhancement in audio conference
System and methods are provided for voice enhancement in audio conferencing among a plurality of participants. An example system includes a signal processor, a pre-processing component, and a voice-enhancement component. The signal processor is configured to generate a first mixed signal based at least in part on a first audio signal associated with a first remote participant and a local audio signal associated with a local participant. The pre-processing component is configured to generate a first input signal and a second input signal based at least in part on the first mixed signal and a second audio signal associated with a second remote participant. In addition, the voice-enhancement component is configured to generate a first output signal to be transmitted to the second remote participant based at least in part on the first input signal and the second input signal. |
| US09336790B2 |
Packet loss concealment for speech coding
A speech coding method of reducing error propagation due to voice packet loss, is achieved by limiting or reducing a pitch gain only for the first subframe or the first two subframes within a speech frame. The method is used for a voiced speech class. A pitch cycle length is compared to a subframe size to decide to reduce the pitch gain for the first subframe or the first two subframes within the frame. A strongly voiced class is decided by checking if the pitch lags are stable and the pitch gains are high enough with the frame; for the strongly voiced frame, the pitch lags and the pitch gains can be encoded more efficiently than other speech classes. |
| US09336788B2 |
Method for coding pulse vectors using statistical properties
Improved methods for coding an ensemble of pulse vectors utilize statistical models (i.e., probability models) for the ensemble of pulse vectors, to more efficiently code each pulse vector of the ensemble. At least one pulse parameter describing the non-zero pulses of a given pulse vector is coded using the statistical models and the number of non-zero pulse positions for the given pulse vector. In some embodiments, the number of non-zero pulse positions are coded using range coding. The total number of unit magnitude pulses may be coded using conditional (state driven) bitwise arithmetic coding. The non-zero pulse position locations may be coded using adaptive arithmetic coding. The non-zero pulse position magnitudes may be coded using probability-based combinatorial coding, and the corresponding sign information may be coded using bitwise arithmetic coding. Such methods are well suited to coding non-independent-identically-distributed signals, such as coding video information. |
| US09336786B2 |
Signal processing device, signal processing method, and storage medium
There is provided a signal processing device including a voice pickup unit that picks up a user's voice and generates an audio signal, a signal processing unit that generates a masking voice signal for masking the user's voice according to the audio signal, and a first speaker that reproduces the masking voice signal. |
| US09336784B2 |
Apparatus, system and method for merging code layers for audio encoding and decoding and error correction thereof
Apparatus, system and method for encoding and decoding ancillary code for digital audio, where multiple encoding layers are merged. The merging allows a greater number of ancillary codes to be embedded into the encoding space, and further introduces efficiencies in the encoding process. Utilizing certain error correction techniques, the decoding of ancillary code may be improved and made more reliable. |
| US09336782B1 |
Distributed collection and processing of voice bank data
Voice data may be collected by a plurality of voice donors and stored in a voice bank. A voice donor may authenticate to a voice collection system to start a session to provide voice data. During the voice collection session, the voice donor may be presented with a sequence of prompts to speak and voice data may be transferred to a server. The received voice data may be processed to determine the speech units spoken by the voice donor and a count of speech units received from the voice donor may be updated. Feedback may be provided to the voice donor indicating, for example, a progress of the voice collection, a quality level of the voice data, or information about speech unit counts. The voice bank may be used to create TTS voices for voice recipients, create a model of voice aging, or for other applications. |
| US09336780B2 |
Identification of a local speaker
Method for speaker identification includes detecting a target speaker's utterance locally; extracting features from the detected utterance locally, analyzing the extracted features in the local device to obtain information on the speaker identification and/or encoding the extracted features locally, transmitting the encoded extracted features to a remote server, decoding and analyzing the received extracted features by the server to obtain information on the speaker identification, and transmitting the information on the speaker identification from the server to the location where the speaker's utterance was detected. The method further includes detecting speech activity locally. Extracting features, encoding the extracted features, and/or transmitting the encoded extracted features to the server, are only performed if speech activity above some predetermined threshold is detected. |
| US09336775B2 |
Posterior-based feature with partial distance elimination for speech recognition
A high-dimensional posterior-based feature with partial distance elimination may be utilized for speech recognition. The log likelihood values of a large number of Gaussians are needed to generate the high-dimensional posterior feature. Gaussians with very small log likelihoods are associated with zero posterior values. Log likelihoods for Gaussians for a speech frame may be evaluated with a partial distance elimination method. If the partial distance of a Gaussian is already too small, the Gaussian will have a zero posterior value. The partial distance may be calculated by sequentially adding individual dimensions in a group of dimensions. The partial distance elimination occurs when less than all of the dimensions in the group are sequentially added. |
| US09336767B1 |
Detecting device proximities
An audio device may be configured to produce output audio and to capture input audio for speech recognition. In some cases, a second device may also be used to capture input audio to improve isolation of input audio with respect to the output audio. In addition, acoustic echo cancellation (AEC) may be used to remove components of output audio from input signals of the first and second devices. AEC may be implemented by an adaptive filter based on dynamically optimized filter coefficients. The filter coefficients may be analyzed to detect situations in which the first and second devices are too close to each other, and the user may then be prompted to increase the distance between the two devices. |
| US09336760B2 |
Generating music from image pixels
Musical compositions are generated from image pixels. To do so, pixel values are mapped to musical elements together for creating the musical compositions. Additionally, images are formed from pixels generated from musical compositions. More generally, a computer system creatively generates media using captured media as a source. The system also generates collage images in which individual images are pixels for the collage image. Collages are further generated from text. |
| US09336759B2 |
Electronic pad
The present invention provides an electronic pad, including: a struck body, including a first struck portion and a second struck portion; a first and a second vibration sensor, detecting a vibration of the first struck portion and the second struck portion. In the electronic pad, a partitioning portion is interposed between the first struck portion and the second struck portion for partitioning. The partitioning portion includes: a first upright portion, protruding further than at least one of an upper surface of the first struck portion and a lower surface opposite the upper surface; a second upright portion, separated from the first upright portion by a predetermined spacing and protruding further than at least one of an upper surface of the second struck portion and a lower surface opposite the upper surface; and a connection portion connected between the first upright portion and the second upright portion. |
| US09336755B2 |
Tremolo bar and associated assembly and tremolo arm accessory
An assembly for attachment to a guitar includes a first elongated member having first and second opposing ends arranged along a major axis of the first elongated member. The assembly also includes a bridge engagement mechanism coupled to the first elongated member and configured to couple a bridge of the guitar. The assembly additionally includes a second elongated member having a first region proximate to a first end of the second elongated member and a second region. The first and second regions of the second elongated member are arranged along a major axis of the second elongated member with the first end of the second elongated member coupled to the first elongated member. Further, the major axis of the second elongated member is rigidly arranged or movably arranged to be within about forty-five degrees of perpendicular to the major axis of the first elongated member. |
| US09336751B2 |
Image processing system, apparatus, and method and medical image diagnosis apparatus
In an image processing system according to an embodiment, a display unit simultaneously displays a predetermined number of parallax images. A parallax image generation control unit performs control such that a group of parallax images of point-of-view positions which are larger in number than the predetermined number is generated. A display control unit classifies the group of the parallax images into a first parallax image sub group including a set of parallax images whose point-of-view positions are discontinuous to each other and a second parallax image sub group including parallax images whose point-of-view positions are between the set of the parallax images, and performs control such that the display unit displays the first parallax image sub group and the second parallax image sub group while switching the first parallax image sub group and the second parallax image sub group at a predetermined switching speed. |
| US09336748B1 |
Tile row pixel shift in a tiled display system
The display of a portion of an image in successive rows of display tiles in a tiled display system are delayed, so that the top portion of a first display tile is illuminated immediately after the bottom portion of a second display tile is illuminated, where the second display tile is adjacent to and above the first display tile. This removes the appearance of a broken up image when the image moves across the display tiles in a direction somewhat parallel to the direction of raster scanning. In this way, a raster scanning tiled display system does not produce a stair-step effect even though the top and bottom portion of an image on a tile in the tiled display system is raster-scanned at different times. |
| US09336744B2 |
Information processing apparatus and control method thereof
An information processing apparatus for determining polarity of a vertical synchronizing signal, in an effective state, included in a video signal measures a duration in which the vertical synchronizing signal maintains the same polarity, obtains the polarity of the vertical synchronizing signal when the measured duration exceeds a predetermined duration, and determines the polarity of the vertical synchronizing signal in the effective state based on the obtained polarity. |
| US09336742B2 |
Display device and driving method thereof
A display device and a driving method thereof are disclosed. In one aspect, the display device includes a display panel including a plurality of pixel rows, a data driver configured to transfer data voltages to the display panel, a gate driver configured to transfer gate signals to the display panel, and a signal controller configured to control the data driver and the gate driver. The pixel rows are divided into i (i is a natural number of 2 or more) pixel row groups including a plurality of pixel rows, respectively. The display panel displays one still image for one frame set including the i sequential frames, and each of the i pixel row groups is charged by receiving the data voltage for each frame of the frame set, and the frames in which the i pixel row groups are charged are different from each other. |
| US09336740B2 |
Shift register, display drive circuit, display panel, and display device
A shift register is disclosed which includes, at respective stages, unit circuits (11) each including (i) a flip-flop (11a) including first and second CMOS circuits and (ii) a signal generation circuit (11b) for generating an output signal (SROUTk) for the current stage with use of an output (Q, QB) of the flip-flop (11a), the shift register including a floating control circuit (11c) between a gate terminal of an output transistor (Tr7) of the signal generation circuit (11b) and a Q terminal. This makes it possible to reduce a circuit scale of a display driving circuit without causing a shift register to malfunction. |
| US09336734B2 |
Driving method for polarity inversion of data signal and image display method of liquid crystal panel
The present invention relates to a driving method for polarity inversion of data signals and an image displaying method of liquid crystal panel, which comprises: alternately outputting data signals of left-eye images and data signals of right-eye images, wherein periodically switching polarity of data signals, with eight frames as one period, such that in each period, the number of times that polarity of data signals of left-eye image being the same with polarity of data signals of right-eye image of the previous frame equals to the number of times that polarity of data signals of right-eye image being the same with polarity of data signals of left-eye image of the previous frame, in the meantime, in each half period, polarity of data signals between adjacent images of the same single eye are opposite. The liquid crystal display panel based on this driving method can not only eliminate 3-D image residual of shutter glasses but also improve brightness difference of the right eye from the left eye, such that it is able to greatly improve 3-D image displaying effect and has prominent practicality. |
| US09336731B2 |
System and method to compensate for an induced voltage on a pixel drive electrode
We describe a display system comprising an electrooptic display coupled to a display driver and including an induced voltage compensation circuit. The compensation circuit comprises a system to measure a voltage applied a common pixel electrode of the display, and one or both of: a system to measure a voltage swing on a pixel select line of the display, and a system to measure a change in voltage on the common pixel electrode due to a voltage induced on a pixel drive electrode of the display. The compensation circuit also includes a system to apply a voltage to the common pixel electrode, responsive to a combination of the measured applied voltage and one or both of the measured voltage swing and the measured change in voltage, to compensate for the induced voltage. |
| US09336729B2 |
Optical configurations in a tileable display apparatus
A display apparatus including a screen layer for displaying a unified image to a viewer and an illumination layer having an array of light sources. Each light source emits a light beam. An array of optical elements, each coupled to a corresponding light source in the array of light sources, is disposed between the screen layer and the illumination layer. The display layer includes a matrix of pixlets and a spacing region disposed between the pixlets in the matrix, wherein the array of light sources emit their light beams through the array of optical elements, wherein each optical element is configured to shape the received light beam into a divergent projection beam having a limited angular spread to project sub-images displayed by the pixlets as magnified sub-images on the backside of the screen layer, the magnified sub-images to combine to form the unified image that is substantially seamless. |
| US09336720B2 |
Organic light-emitting diode display panel
An organic light-emitting diode display panel is disclosed herein. The organic light-emitting diode display panel includes display units. Each of display units includes an organic light-emitting element, a light-driving circuit and stages of shift register connected in series. The light-driving circuit drives the organic light-emitting element according to a light-emitting control signal. Each of the stages of the shift register includes a shift register circuit and a control signal output circuit. The shift register circuit generates a current stage shift signal according to a previous stage shift signal and a first clock signal. The control signal output circuit outputs the light-emitting control signal according to the current stage shift signal and a previous stage carry signal. The enabling period of the light-emitting control signal is determined by the time period between the enabling period of the current stage shift signal and the previous stage carry signal. |
| US09336714B2 |
Threshold voltage compensating pixel circuit and organic light emitting display using the same
A pixel includes an organic light emitting diode (OLED), a first transistor having a gate electrode coupled to a first node, a first electrode coupled to a first power supply, and a second electrode coupled to the OLED, a first capacitor for storing a data signal, and a second capacitor coupled between the first node and the second electrode of the first transistor to charge a voltage corresponding to the data signal and a threshold voltage of the first transistor, wherein, in a period where a voltage stored in the first capacitor is supplied to the first node, the second capacitor is electrically blocked from the first node. |
| US09336713B2 |
Organic light emitting display and driving method thereof
An organic light emitting display comprises: a driving TFT comprising a gate connected to a node B, a drain connected to an input terminal of high-potential cell driving voltage, and a source connected to the organic light emitting diode through a node C; a first switching TFT for switching the current path between a node A and the node B in response to a light emission control signal; a second switching TFT for initializing the node C in response to an initialization signal; a third switching TFT for initializing either the node A or the node B in response to the initialization signal; a fourth switching TFT for switching the current path between a data line and the node B in response to a scan signal; a compensation capacitor connected between the node B and the node C. |
| US09336711B2 |
Display device and display driving method
Disclosed herein is a display device including a pixel array configured to include pixel circuits arranged in a matrix having a light emitting element, driving transistor, sampling transistor, and hold capacitor. The display device further includes a signal selector, driving control scanner, and writing scanner. The signal selector alternately carries out supply of a video signal voltage in order from a beginning line to an end line in a unit and supply of a video signal voltage in order from an end line to a beginning line in a unit. The writing scanner outputs the pulse to the writing control lines in such a way that input of a video signal voltage in order from a beginning line to an end line in a unit and input of a video signal voltage in order from an end line to a beginning line in a unit are alternately carried out. |
| US09336710B2 |
Organic light emitting display and method of driving the same
An organic light emitting display capable of preventing data collision to improve picture quality. The organic light emitting display includes pixels positioned at crossings between scan lines and data lines, a scan driver for driving the scan lines, a data driver for driving the data lines, a timing controller for controlling the scan driver and the data driver, and an input controller for receiving data and an input clock, and for controlling a point in time where the data is supplied to the timing controller in response to at least one clock signal supplied from the timing controller. |
| US09336697B2 |
Adjustable marking device to visually identify valves in a multi valve fluid distribution and/or transmission system
An adjustable marking device for visual identification of a valve in a valve housing or a pipe comprises a substantially planar flexible body having a tail, a head, and a visual indicator. A permanent magnet is secured to the body for magnetic attachment to the housing or pipe. A fixing means holds the tail and the head when they are brought into overlapping proximity with one another to form an in use configuration to fit the housing or pipe. The visual indicator may be a color indicator and/or a directional indicator. A method is provided for visually identifying a valve in a valve housing or a pipe in a multi-valve distribution and/or treatment system by means of a color indicator and directional indicator of valve operation. |
| US09336696B2 |
Enhanced security setup for media decryption
Systems and methods for enhanced security of media are provided. Media security may be enhanced by improving the setup of encryption and/or decryption, by improving the performance of encryption and/or decryption, or by improving both. The calls related to enhanced security of media from an application in an emulated environment to a security module in the operating system hosting the emulated environment may be combined to reduce the overhead of accessing a security module. An application handling secure shell (SSH) communications may execute multiple calls to a cryptographic module in the host operating system. Because many calls to the cryptographic module during SSH communications follow patterns, two or more related calls may be combined into a single combined call to the cryptographic module. For example, a call to generate a server-to-client key and a call to generate a client-to-server key may be combined into a single call. |
| US09336695B2 |
Method and system for providing customized regional maps
A method for customizing a map is provided. The method includes receiving a query for a portion of a map, and determining a predetermined region of interest (ROI) map tile included in the portion of the map. The predetermined ROI map tile indicates information associated with a category. The method further includes providing the predetermined ROI map tile for displaying to a user. Further, an apparatus for customizing maps is provided. The apparatus includes a movement event processor for receiving a query for a portion of a map, and a Region of Interest (ROI) selector for determining a predetermined region of interest (ROI) map tile included in the portion of the map. The predetermined ROI map tile indicates information associated with a category. The apparatus further includes a map tile layout generator for providing the predetermined ROI map tile for displaying to a user. |
| US09336692B1 |
Surgical training eye apparatus
An apparatus for teaching and practicing an ophthalmologic surgical technique of creating the continuous curvilinear capsulorhexis comprises a housing with a first base end and a second suction cup end for holding a malleable body; a flexible film or cellophane-type membrane covers the operating area of the malleable body; this flexible film can be held into place on the first base end with a first cap with an aperture or opening; in between the first base end and the second suction cup end, there can be a flexible stock with a threaded or friction connection. There can also be a second cap addition, which simulates a cornea and anterior chamber, which can be filled with viscoelastic material, which can increase the pressure in the eye and flattens the anterior capsule. |
| US09336689B2 |
Methods and apparatuses related to text caption error correction
Systems and methods related to providing error correction in a text caption are disclosed. A method may comprise displaying a text caption including one or more blocks of text on each of a first device and a second device remote from the first device. The method may also include generating another block of text and replacing a block of text of the text caption with the another block of text. Furthermore, the method may include displaying the text caption on the second device having the block of text of the first text caption replaced by the another block of text. |
| US09336682B2 |
Navigation system for vehicle and navigation service method for the same
A navigation system for a vehicle and a navigation method for the same are disclosed. The navigation system collects transportation information and fuel efficiency information from several source vehicles located in a specific region, generates an optimum route for the corresponding region, and informs a target vehicle having requested a navigation service of the optimum route, resulting in the implementation of more effective navigation service. |
| US09336681B2 |
Navigation using crowdsourcing data
Method, computer program product, and apparatus for providing navigation guidance to vehicles are disclosed. The method may include receiving crowdsourcing data from a plurality of vehicles, determining traffic data corresponding to a road using the crowdsourcing data, predicting traffic condition of each lane of the road using the traffic data, and providing navigation guidance to a vehicle in accordance with the traffic condition of each lane of the road. The crowdsourcing data includes on board diagnostics data (OBD) correlated with time stamps and GPS locations of a vehicle, where the on board diagnostics data includes odometer information, speedometer information, fuel consumption information, steering information, and impact data. |
| US09336678B2 |
Signal detecting and emitting device
Systems, methods, apparatus, and articles of manufacture are disclosed. An example playback device includes a signal detector adjacent to a first side of the playback device; a signal emitter adjacent to a second side of the playback device; a processor; and memory having stored thereon instructions executable by the processor to cause the playback device to perform functions. The example functions include detecting, by the signal detector, an analog signal; amplifying the analog signal in analog form; applying an offset to analog signal in analog form; filtering the offset signal in analog form; and emitting, by the signal emitter, the filtered signal. |
| US09336677B2 |
System and method for vibration mediated networks
A system and method to enable vibration mediated communication between electrical devices such as photovoltaic solar panel controllers. The electrical devices may be connected to a mesh network with individual router devices. The individual router devices will send and receive data packets by creating or detecting vibrations in a solid vibration conducting media (such as the solar power wiring) that connects the individual electrical devices. Often at least one centralized control device is used to periodically request sensor data packets from the individual router devices and electrical devices. When the electrical devices are photovoltaic solar arrays, the centralized control device may, for example, be used to compute the proper adjustments for the solar arrays that will optimize the overall power output from the photovoltaic solar array. The control device will then send adjustment data packets back to the individual router devices through the mesh network, thus optimizing overall power output. |
| US09336676B2 |
Electronic transceiver module for network wireless communication in electric or electronic devices or systems, a method of controlling it and a method of creating a generic network communication platform with transceivers
An electronic transceiver module and method for controlling the electronic transceiver module for network wireless communication in electric and/or electronic devices or systems in high frequency bands up to 10 GHz, including a device for wireless communication connected to an antenna entry, a control device, and a memory device. The control device is connected to the memory device, to the device for wireless communication and to a comparator block, which is further connected to the memory device. The memory device includes at least two separate memories for storing information identifying various wireless networks. |
| US09336674B1 |
Notifying a user utilizing smart alerting techniques
A configuration associated with an electronic message may be received, the electronic message containing a keyword. Historical notification information comprising information about multiple electronic messages may be accessed to determine one or more related electronic messages. A number of related electronic messages may be determined by comparing the keyword to the historical notification information. An electronic notification may be generated based at least in part on the configuration information, the electronic message, and the multiple related electronic messages. |
| US09336673B1 |
Bluetooth wireless electronic tether
A Bluetooth electronic tether device having an on/off switch, an indicator light, a speaker, a battery pack, a Bluetooth wireless interconnection device, a CPU, and an alarm, the indicator light indicating a condition of communication between the Bluetooth wireless interconnection device within the electronic tether unit and an existing Bluetooth equipped mobile device, and a cessation of communication between the device and the existing Bluetooth equipped mobile device initiates the alarm. |
| US09336672B2 |
Healthcare communication system for programming bed alarms
A system that monitors various conditions of a plurality of hospital beds located in different rooms of a healthcare facility is provided. Alternatively or additionally, other types of equipment may be monitored by the system. Various configurations of network interface units that are coupleable to or integrated into a hospital bed are also disclosed. The system receives data from the hospital beds and/or other equipment and initiates a communication to a wireless communication device of at least one designated caregiver in response to the received data being indicative of an alarm condition. |
| US09336671B2 |
Fire detector
This fire detector is provided with a light-emitting portion that repeats stopping of light emission and light emission a plurality of number of times in predetermined light emission periods during a predetermined smoke detection operation time set for each first period; a light-receiving portion that receives the light emitted from the light-emitting portion and outputs a light reception signal during the smoke detection operation time; a light reception signal detecting portion that detects as a zero-point light reception signal the light reception signal that the light-receiving portion outputs at each light emission stop timing of the smoke detection operation time, and detects as a smoke light reception signal the light reception signal that the light-receiving portion outputs at each light emission timing; a smoke detecting portion that detects a smoke detection signal based on the zero-point light reception signals of a plurality of number of times and the smoke light reception signals of a plurality of number of times detected by the light reception signal detecting portion; and a noise assessing-processing portion that assesses the presence of mixing-in of noise to the light reception signal based on the zero-point light reception signals of a plurality of number of times and the smoke light reception signals of a plurality of number of times, and carries out noise removal processing in a case of having assessed that the noise is mixed in. |
| US09336670B2 |
Method for remote initialization of targeted nonlethal counter measures in an active shooter suspect incident
The present invention is directed to providing a method and system that enables a first responder police Incident Commander to take command and control of a building having an active suspect ongoing event. Using the method and system herein, the Police Incident Commander is able to clearly distinguish the positions of his building entry teams (BETs) in the building relative to the position of the suspect through a graphic display of Friend and Foe designation whereupon he can precisely direct their maneuver to close with the suspect. The incident commander communicates to a Command and Control Center to arm non-lethal chemical canisters pre-located in “Hot Zones” for use in remotely incapacitating the intruders. When the intruders, boxed in by the BETs, enter a “Hot Zone” the incident commander gives the command to release the non-lethal chemical/smoke, ammonia spray that disorients and blinds the intruders allowing the BETs to safely end the incident. |
| US09336665B2 |
EAS tag with arming switch
An EAS tag has an arming switch protruding from its body to detect when the EAS tag is being forcibly removed from an object to which it is attached. A plate covers the arming switch to provide a broader surface for interacting with the attached object. The plate is capable of floating and moving when it is impinged upon by an attached object. When moved by an object when the EAS tag is attached to an object, the plate actuates the arming switch and changes its state. This can arm the EAS tag or can be a step in the arming process of the EAS tag. When the EAS tag is forcibly removed from an object, the plate and arming switch are released, and electronics onboard the EAS tag determine an alarm condition. |
| US09336659B2 |
Gaming device and methods of allowing a player to play a gaming device having selectable awards
A gaming machine for providing a slot game to a player is described herein. The gaming machine includes a display device and a controller for displaying a game to a player. The controller is configured to randomly determine an outcome of the game and display the outcome on the display device, determine a first award as a function of the outcome, and determine a second award as a function of the first award. The first award includes a first number of free games and a first award multiplier. The second award includes a second number of free games and a second award multiplier. The controller allows the player to select one of the first award and the second award and responsively provides the selected one of the first award and the second award to the player. |
| US09336655B2 |
Wagering games having reduced maximum wagering levels
A gaming system and method includes receiving a wager and in response thereto a basic game is conducted. The basic game includes a plurality of symbols that indicate a randomly selected outcome. In response to an offer trigger, an offer is displayed to conduct one or more subsequent plays of the basic game at a reduced maximum bet wager having a wager amount that is less than a normal maximum bet wager amount. A second input is received indicative of an acceptance of the offer for a reduced maximum bet wager. A randomly selected outcome is displayed. The plurality of possible outcomes each include a plurality of symbols arranged in an array. If the randomly selected outcome includes a winning symbol combination, an award is provided for any winning outcome. The provided award is determined as though a normal maximum bet wager amount was received. |
| US09336653B2 |
Gaming system and method for providing a multiple player bonus event
A gaming system which includes a bonus event associated with a bonus event time period or bonus event time window. The bonus event utilizes a plurality of bonus event component sequences, wherein each bonus event component sequence is associated with a plurality of time periods or windows which collectively (when accounting for any overlaps) forms the bonus event time period. In these embodiments, upon the triggering of the bonus event, the gaming system provides one or more awards in association with each bonus event component sequence. That is, for the single occurrence of a bonus event triggering event, the gaming system determines a plurality of winners for a plurality of different time periods that are each associated with the bonus event. |
| US09336648B2 |
Gaming system and method for providing symbol combinations with dynamic awards
The gaming system and method disclosed herein provides a plurality of symbol combinations that are each associated with a dynamic award. Such dynamic awards increase based, at least in part, on one or more random events which occur in association with one or more plays of a game. In one embodiment, the gaming system increases the dynamic award of a designated symbol combination based on the random generation of another, different symbol combination. In this embodiment, if the gaming system randomly generates the other symbol combination, the gaming system: (i) provides any award associated with this other symbol combination, and (ii) increases the dynamic award of the designated symbol combination. Additionally, if the gaming system randomly generates the designated symbol combination, the gaming system provides to a player the dynamic award of the designated symbol combination. |
| US09336645B2 |
Gaming system and method for playing a game including a plurality of linked symbol generators
A gaming system including a game which utilizes a plurality of symbol generators. Each of the symbol generators is linked to at least another one of the symbol generators, such that the plurality of symbol generators are linked with each other to form a group of coupled symbol generators. In operation, for a play of a game, the gaming system activates (i.e., spins) one of the symbol generators. Due to the symbol generators being directly or indirectly coupled with one another, this activation of one of the symbol generators causes an activation of each of the linked symbol generators. Following the activation of the symbol generators, one of the symbol generators is deactivated (i.e., stopped) at a randomly selected orientation which causes each of the symbol generators to also be deactivated. The gaming system then evaluates any indicated symbols associated with the stopped symbol generators and provides one or more awards based on the evaluated symbol generators. |
| US09336644B2 |
System and method for remotely controlling an electronic gaming device from a mobile device
A system and method for controlling an electronic gaming machine (“EGM”) from a mobile device during a remote access play session. The EGM is switched between a local access mode in which the inputs on the EGM are active and a remote access mode in which the inputs on the EGM are de-activated and a player interfaces the EGM using a mobile device such as a smartphone or a tablet computer. During remote access play sessions, all critical game play operations continue to be performed exclusively on the EGM and not on the mobile device. Critical game play operations include random number generation and determination of game outcome. Game content, including video, screenshot images and audio of the game are transmitted to the mobile device for display to the player. Player input and selections are made on the mobile device. |
| US09336643B2 |
Live table gaming and auxiliary mystery progressive jackpots
The invention provides a method for playing an auxiliary progressive jackpot game associated with a base, live casino table game. The invention extends to an apparatus for administering the auxiliary game and notifying players of game occurrences including jackpot winners. |
| US09336640B2 |
Security element for securing documents of value
The invention relates to a security element for securing documents of value. Along the security element a portion of a magnetic coding with first and second coding elements is arranged. The coding elements are arranged along a predetermined direction, wherein the first coding element continuously has along the predetermined direction a first magnetic region with a first coercive field strength and the second coding element has at least one first gap region and one second magnetic region with a second coercive field strength. At least one of the first magnetic regions is directly adjacent to at least one of the second magnetic regions. The sum of the lengths of the directly adjacent first and second magnetic regions amounts to a maximum of 8 mm. |
| US09336637B2 |
Wireless access control system and related methods
A wireless access control system includes a remote access device. A plugin device communicates with the remote access device. A lock controls the ability to lock and unlock a door in which the lock is disposed. The lock is in communication with the plugin device. The plugin device determines a distance between the remote access device and the lock and causes the lock to communicate with the remote access device when the remote access device is at a distance less than or equal to a predetermined distance from the lock to enable the lock to be unlocked. |
| US09336636B2 |
Apparatus and system for controlling access to premises
The invention describes a control apparatus 100 for controlling access to premises, comprising at least one access door (10) to a premises (1), at least one detection device (12) in said premises (1), a control device (20) configured to determine commands (C11, C12, C2) for the premises (1), wherein the device (20) comprises a user interface (30) configured to receive first primary parameters (P11) for commanding the door and auxiliary parameters (P2) for activating a detection device (12), a processing unit (40) for processing the parameters received so as to determine first commands (C11) for the door (10) and third commands (C2) for the detection device (12), an operating module (45) for transmitting the first and third commands (C11, C2) to at least one door (10) and to at least one detection device (12), respectively. |
| US09336635B2 |
System and method for permitting secure access to a structure
A wireless device access system employs short-range wireless communication to require the proximity of a user device to a structure prior to communicating an unlock request. The access system authenticates the unlock request and the proximity of the user to the structure prior to transmitting an unlock command to the structure. Additionally, the wireless device may require the proximity of a user token prior to operation and/or the access system may include an override within the structure blocking any unlock command. |
| US09336631B2 |
Remote monitoring terminal device for mobile work vehicle or vessel
Disclosed is a remote monitoring terminal device including: connection terminals (T, . . .); a data storage control section for storing, in a data storage section at predetermined interval (TA), only a predetermined number of latest data sets in data fed via the connection terminals (T, . . .); and a communications section, wherein in response to an occurrence of a predetermined event in the mobile work vehicle or vessel, the data storage control section stores in the data storage section the predetermined number of data sets including a data set obtained upon the occurrence of the predetermined event and transmits the predetermined number of data sets stored in the data storage section, together with information indicating the predetermined event, to a remote monitoring device via the communications section. |
| US09336629B2 |
Coordinate geometry augmented reality process
Embodiments of the invention include a method, a system, and a mobile device that incorporate augmented reality technology into land surveying, 3D laser scanning, and digital modeling processes. By incorporating the augmented reality technology, the mobile device can display an augmented reality image comprising a real view of a physical structure in the real environment and a 3D digital model of an unbuilt design element overlaid on top of the physical structure at its intended tie-in location. In an embodiment, a marker can be placed at predetermined set of coordinates at or around the tie-in location, determined by surveying equipment, on that the 3D digital model of the unbuilt design element can be visualized in a geometrically correct orientation with respect to the physical structure. Embodiments of the present invention can also be applied to a scaled down 3D printed object representing the physical structure if visiting the project site is not possible. |
| US09336627B2 |
Creating a model of a scanned surface for comparison to a reference-surface model
Generating a scanned-surface model representing a scanned surface includes various steps. For example, instrument model coordinates may be obtained that represent a position of the instrument in the 3D model. In addition, surface-distance measurements may be derived describing a distance from the scanned surface. Inertial measurements are also recorded. The instrument model coordinates, surface-distance measurements, and inertial measurements are correlated and filtered by a rules based selection process to determine scanned-surface model coordinates. |
| US09336625B2 |
Object refinement using many data sets
Digitizing objects in a picture is discussed herein. A user presents the object to a camera, which captures the image comprising color and depth data for the front and back of the object. The object is recognized and digitized using color and depth data of the image. The user's client queries a server managing images uploaded by other users for virtual renditions of the object, as recognized in the other images. The virtual renditions from the other images are merged with the digitized version of the object in the image captured by the user to create a composite rendition of the object. |
| US09336622B2 |
System and method to achieve better eyelines in CG characters
Systems and methods are provided to create better-looking animated eyes for CG characters. The systems and methods set the rigging of each eye to, rather than precisely converge on a target location, converge but be rotationally or angularly offset by a certain amount to simulate correct physical eye positioning and movements. In addition, the systems and methods provide even more realistic eye appearance by taking account of the refractive properties of the cornea, e.g., which can make the pupil appear larger than it actually is. The systems and methods may further take account of a shadowing effect of the upper eye caused by the brow, eyelashes, and upper lid (as well as an effect caused by reflection from the underside of the eyelashes). This darkening of the upper portion of the eye addresses vertical eyeline discrepancies caused by the visual and optical illusion of incorrect lighting. |
| US09336621B2 |
Method and apparatus for playing an animation in a mobile terminal
A method and apparatus are provided for playing an animation in a mobile terminal. The method includes displaying content; determining an object of an animation from the content; determining whether an interaction event occurs while displaying the content; and playing an animation of the determined object, when the interaction event occurs. |
| US09336618B1 |
Stochastic chunk-based map generation
An approach to facilitating stochastic chunk-based map generation is provided. Tile chunks may be obtained for inclusion in a map of a virtual space. The obtained tile chunks may include first and second tile chunks having map tiles of different tile types. The first tile chunk may have a first tile of a first tile type and a second tile of a second tile type different from the first tile type. The second tile chunk may have a third tile of a third tile type and a fourth tile of a fourth tile type different from the third tile type. Stochastic distribution of the obtained tile chunks over a map area in the map may be effectuated. Distribution of individual map tiles between the distributed tile chunks on the map area may be effectuated. |
| US09336614B1 |
Methods and systems for performing joint estimation techniques in image reconstruction
A method for correcting an emission tomography image includes obtaining a first modality image dataset, identifying areas in the first modality dataset that may be impacted by respiratory motion, and applying joint estimation attenuation correction techniques to improve emission image data. A medical imaging system is also described herein. Emission tomography may include positron emission tomography (PET) and single photon emission computed tomography (SPECT). |
| US09336611B2 |
Multi-contrast image reconstruction with joint bayesian compressed sensing
A method for reconstructing multiple images of a subject depicting multiple different contrast characteristics from medical image data acquired with a medical imaging system is provided. Multiple image data sets are acquired with one or more medical imaging systems and the image data sets used to estimate hyperparameters drawn from a prior distribution, such as a prior distribution of image gradient coefficients. These hyperparameters and the acquired image data sets are utilized to produce a posterior distribution, such as a posterior distribution of image gradients. From this posterior distribution, multiple images with the different contrast characteristics are reconstructed. The medical imaging system may be a magnetic resonance imaging system, an x-ray computed tomography imaging system, an ultrasound system, and so on. |
| US09336610B2 |
Information processing device, method, and program
An information processing device includes a face detection unit that detects a face area from a target image, a feature point detection unit that detects a feature point of the detected face area, a determination unit that determines an attention area that is an area to which attention is paid in the face area based on the detected feature point, a reference color extraction unit that extracts a reference color that is color setting obtained from the target image in the determined attention area, an adjustment unit that adjusts the extracted reference color to a color setting for a modified image generated from the target image as a base, and a generation unit that generates the modified image from the target image by drawing the attention area using the color setting for the modified image. |
| US09336608B2 |
Color arrangement checking device, information storage medium storing a computer program thereof, and data processing method
A color arrangement checking device stores a full-color document in which elements of each color are placed on a page, detects at least a color and a size of the elements for each page of the document, adds up the size of the elements for the whole page by the color which is output as an occupancy ratio, and determines whether or not at least one of brightness and saturation exceeds a predetermined color threshold value for each color of the elements. The color arrangement checking device determines whether or not the occupancy ratio by the color of the elements, which assume the color, of which at least one of the brightness and the saturation is determined to exceed the color threshold value, as an attribute, exceeds a predetermined occupancy threshold value, and outputs the elements which assume the color, of which the occupancy ratio is determined to exceed the occupancy threshold value, as the attribute. |
| US09336604B2 |
System and method for generating a depth map through iterative interpolation and warping
A computer-implemented method for generating a depth map including, generating an initial depth map for a first image, the first image being one of a pair of stereo images received from an imaging device, the pair of stereo images including the first image and a second image and generating an estimated depth map based on the initial depth map by hypothesizing depth values for missing regions in the initial depth map. The method including warping the second image based on the estimated depth map, generating a warped depth map based on the first image and the warped second image, and generating a new depth map for the first image relative to the second image based on the warped depth map and the estimated depth map. |
| US09336603B2 |
Information processing device and information processing method
An information processing device includes, a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, acquiring images which includes a target object, and the images captured by a plurality of cameras on a time series basis; calculating a plurality of distance from the plurality of each cameras to a target object by using the images; and correcting, in a case where the target object has reached a predetermined x-y plane and a difference in an area of the target object between the images is equal to or less than a predetermined first threshold, the distance that has been calculated to a distance from the cameras to the x-y plane. |
| US09336601B2 |
Shape from camera motion for unknown material reflectance
A computer vision method that includes deriving a relationship of spatial and temporal image derivatives of an object to bidirectional reflectance distribution function (BRDF) derivatives under camera motion, and deriving with a processor a quasilinear partial differential equation for solving surfaced depth for orthographic projections using the relationship of spatial and temporal image derivatives without requiring knowledge of the BRDF. The method may further recover surface depth for an object with unknown BRDF under perspective projection. |
| US09336600B2 |
Shape from motion for unknown, arbitrary lighting and reflectance
Systems and methods are disclosed for determining three dimensional (3D) shape by capturing with a camera a plurality of images of an object in differential motion; derive a general relation that relates spatial and temporal image derivatives to BRDF derivatives; exploiting rank deficiency to eliminate BRDF terms and recover depth or normal for directional lighting; and using depth-normal-BRDF relation to recover depth or normal for unknown arbitrary lightings. |
| US09336599B2 |
Determining proximity of a mobile device to a subject based on shadow analysis
Portions of the disclosure relate generally to shadow analysis, e.g., on mobile platforms. One claim recites a mobile phone comprising: a camera for capturing images and video; memory for buffering captured images and video; means for identifying a shadow cast by the mobile phone on a subject being imaged by said camera by analyzing buffered captured images and video; and means for determining proximity to the subject based on an analysis of the shadow. Of course, other claims and combinations are provided too. |
| US09336592B2 |
Method and apparatus for determining tumor shift during surgery using a stereo-optical three-dimensional surface-mapping system
A system and method for determining intraoperative locations of a lesion in tissue from lesion locations determined in preoperative imaging includes determining three dimensional locations of surface features of the organ in the preoperative images. A preoperative surface map is extracted from stereo images annotated with surface features from preoperative images. An intraoperative surface map of the organ is extracted from stereo images, and surface features are identified in the stereo images corresponding to surface features annotated into the preoperative surface map. Three dimensional displacements of the surface features are determined and used to constrain a computer model of deformation of the organ. In embodiments, the model of deformation is adapted or constrained to model locations and dimensions of surgical cavities using an optical flow method and/or locations of surgical instruments in the organ. The model of deformation is used to determine intraoperative locations for the lesion. |
| US09336591B2 |
Integration of user inputs and correction of deformation vector field in deformable image registration workflow
Adeformation vector field (DVF) (22)is computed that relatively spatially registers a first image (16)and a second image (14). A contour (26)delineating a structure in the first image is adapted using the DVF to generate an initial contour (52)for the structure in the second image. A final contour (56)is received for the structure in the second image. The DVF is corrected based on the initial and final contours for the structure in the second image to generate a corrected DVF (32). The correction may comprise computing an adjustment DVF (62)relating the initial and final contours and combining the DVF and the adjustment DVF to generate the corrected DVF. The final contour may be received by displaying the second image overlaid with the initial contour, and receiving user adjustments of the overlaid contour with the overlaid contour updated for each received user adjustment. |
| US09336589B2 |
Sheet feeder
The paper feeder comprises a first transport unit (5) to transport a sheet (S) on top of a paper stack (2) on a paper loading table (3), and a second transport unit (6) to discharge sheets transferred from the first transport unit toward a binding device. The first transport unit begins transporting the next sheet each time a sheet is discharged from the second transport unit. Image data for a specified printed portion on the first sheet in the paper stack is stored in memory (19) as reference data. A camera (14) is disposed above the paper stack and photographs a region corresponding to the specified printed portion on the topmost sheet. A control unit (18) compares the image data for the paper photographed by the camera with the reference data, and if the image data matches the reference data, the first transport unit operations are paused. |
| US09336584B2 |
Active imaging systems for plant growth monitoring
Active imaging systems for plant growth monitoring acquire images in which each pixel represents an absolute NDVI value obtained with active illumination. |
| US09336583B2 |
Systems and methods for image editing
Various embodiments are disclosed for image editing. A frame is obtained from a frame sequence depicting at least one individual, and facial characteristics in the frame are analyzed. A utilization score is assigned to the frame based on the detected facial characteristics, and a determination of whether to utilize the frame is made based on the utilization score. A completeness value is assigned, and a determination is made based on the completeness value of whether to repeat the steps above for an additional frame in the frame sequence based on the completeness value. Regions from the frames are combined to generate a composite image. |
| US09336582B1 |
Convolutional color correction
A computing device may obtain an input image. The input image may have a white point represented by chrominance values that define white color in the input image. Possibly based on colors of the input image, the computing device may generate a two-dimensional chrominance histogram of the input image. The computing device may convolve the two-dimensional chrominance histogram with a filter to create a two-dimensional heat map. Entries in the two-dimensional heat map may represent respective estimates of how close respective tints corresponding to the respective entries are to the white point of the input image. The computing device may select an entry in the two-dimensional heat map that represents a particular value that is within a threshold of a maximum value in the heat map, and based on the selected entry, tint the input image to form an output image. |
| US09336576B2 |
Method and system for improving the visibility of features of an image
A system and method provide enhanced perceived contrast within a region of interest (102) of an image being displayed in order to enable viewers to more easily perceive subtle features in images, such as during medical diagnostics. The enhanced perceived contrast may be implemented using software only, hardware only, or a combination of hardware and software. If the backlight of a display includes only one or few light sources, the enhanced perceived contrast can be achieved through a software only solution in which the area (104) outside of the ROI (102) is darkened. If the backlight of the display comprises, for example, an LED matrix, enhanced perceived contrast may be implemented through a hardware only solution in which the luminance of the display is increased in the ROI (102). In addition, enhanced perceived contrast may also be achieved through a solution utilizing both hardware and software. |
| US09336573B2 |
Self-adaptive image edge correction device and method thereof
A self-adaptive image edge correction device and method thereof, including an image fetching unit, an image processing unit, and an image output unit. Wherein, the image fetching unit is used to provide an original image, and is connected electrically to the image processing unit, that includes a sharpening filter, a superimposer, and an edge detector. The sharpening filter converts the original image into a sharpened edge image, and the superimposer superimposes the original image to the sharpened edge image, to form an enhanced image. The edge detector fetches the edge of the enhanced image, to obtain a differential edge image. The image processing unit then utilizes selectively the horizontal correction or vertical correction to correct the differential edge image, based on s deviation direction of the differential edge image, to form a corrected image, and provide it to the image output unit to output as required. |
| US09336572B1 |
Temporal filtering with local neighborhood limitations
A method for temporal filtering with local neighborhood limitations is disclosed. Step (A) of the method may perform a temporal filter operation on a target sample in a current picture of a sequence of pictures to generate an intermediate value of the target sample. Step (B) may find a minimum value and a maximum value among a plurality of local samples in a local neighborhood in the current picture around the target sample. The minimum value and the maximum value generally bound a minimum/maximum range. Step (C) may adjust the intermediate value toward the minimum/maximum range to generate a final value of the target sample if the intermediate value is outside a limited range. The limited range is generally based on the minimum/maximum range. |
| US09336571B2 |
Method and device of skin tone optimization in a color gamut mapping system
In a method of skin tone optimization in a color gamut mapping system, an image signal is first transformed from a predetermined color domain to an HSV color domain for generating an HSV image signal. Next, a skin tone optimization is performed on the HSV image signal for generating an adjusted saturation gain. Then, a color enhancement is performed on the HSV image signal according to the adjusted saturation gain and a color shift signal so as to generate a color enhancement signal. Finally, the color enhancement signal is transformed from the HSV color domain to the predetermined color domain. |
| US09336569B2 |
Image compensation method and apparatus
A method and apparatus of image compensation are provided. The method may include: calculating an overlapping position between two adjacent scannings; obtaining two images at the overlapping position of the two adjacent scannings, and calculating mutual information of the two images by using a three dimensional non-rigid registration method; and acquiring a corresponding transformational matrix when the mutual information reaches a threshold, and compensating one of the two scans which needs to be compensated by using the transformational matrix. Images at the overlapping position of two neighboring scannings can be used to find a motion law at an identical z position of the two adjacent scannings and to obtain a corresponding match factor. Thus inconsistence of images caused by a patient's movement can be compensated. |
| US09336566B2 |
Image deformation method and apparatus using deformation axis
The present invention relates to an image deformation method. An image deformation method using a deformation axis according to the present invention includes deforming the deformation axis based on deformation energy of points according to a deformation of at least one deformation axis including a plurality of points predetermined with respect to an image to be deformed; and deforming the image using a plurality of segments of the deformation axis divided based on points of the deformed deformation axis. According to the present invention, an image deformation method using a deformation axis is performed based on a freeform deformation axis (FDA) that is independent from a type of an original object and thus, may be more advantageous and may be utilized in combination with various types of deformation methods. Deformation of an image may be performed intuitively and in real time and thus, may be easily used by general users. |
| US09336565B2 |
Image processing device, display apparatus, and image processing method
An image processing device includes: a first memory section that has memory areas equivalent to data of k1 rows of an image and stores data of at least two adjoining pixels in each of the memory areas; a second memory section that has memory areas equivalent to data of k2 rows of the image and stores data of at least two adjoining pixels in a row different from pixels of which data is stored in the first memory section in each of the memory areas; and a correction section that corrects data of an object pixel, out of pixels of r rows×c columns, using data of a plurality of pixels stored in a memory area corresponding to a position designated by an offset vector corresponding to the object pixel in the first and second memory sections. |
| US09336563B2 |
Buffer underrun handling
A graphics system may include a display pipe with a buffer configured to store pixels to be processed by a display controller for displaying on a display device, with a buffer control circuit coupled to the buffer to supply pixels to the display controller. When the buffer control circuit detects an underrun of the buffer responsive to the display controller attempting to read pixels from the buffer that have not yet been written to the buffer, the buffer control circuit may supply an underrun pixel to the display. The underrun pixel may be selected from a set of previously stored set of underrun pixels, which may include a most recent valid pixel read by the display controller. A read pointer representative of the location in the buffer from where the display controller is currently attempting to read may be advanced even when an underrun condition occurs. The underrun pixel may be supplied to the display controller until the underrun has been resolved, at which point the most recent valid pixel read from the buffer may be supplied to the display controller. |
| US09336560B2 |
Facilitating efficient switching between graphics-processing units
The disclosed embodiments provide a system that facilitates seamlessly switching between graphics-processing units (GPUs) to drive a display. In one embodiment, the system receives a request to switch from using a first GPU to using a second GPU to drive the display. In response to this request, the system uses a kernel thread which operates in the background to configure the second GPU to prepare the second GPU to drive the display. While the kernel thread is configuring the second GPU, the system continues to drive the display with the first GPU and a user thread continues to execute a window manager which performs operations associated with servicing user requests. When configuration of the second GPU is complete, the system switches the signal source for the display from the first GPU to the second GPU. |
| US09336559B1 |
Resolution recommendation for displaying content items
When a request for a content item is received from a device, the resolution parameters of the device are identified. Based on the resolution parameters of the device, a selection is made as to a version of the content item to recommend from a plurality of versions of the content item. Each version of the content item has a different resolution. A recommendation is provided to the user of the device that the selected version of the content item be displayed on the device. |
| US09336558B2 |
Wavefront encoding with parallel bit stream encoding
In the video encoders described herein, blocks of pixels from a video frame may be encoded (e.g., using CAVLC encoding) in a block processing pipeline using wavefront ordering (e.g., in knight's order). Each of the encoded blocks may be written to a particular one of multiple DMA buffers such that the encoded blocks written to each of the buffers represent consecutive blocks of the video frame in scan order. A transcode pipeline may operate in parallel with (or at least overlapping) the operation of the block processing pipeline. The transcode pipeline may read encoded blocks from the buffers in scan order and merge them into a single bit stream (in scan order). A transcoder core of the transcode pipeline may decode the encoded blocks and encode them using a different encoding process (e.g., CABAC). In some cases, the transcoder may be bypassed. |
| US09336554B2 |
Social network system and method
A social network system includes one or more participant terminals operable to act as a client on a social network and a computer operable to act as a server on the social network and to communicate with each of the participant terminals over the social network. The computer includes: a memory configured to store a set of instructions; and a processor configured to execute the set of instructions. The set of instructions cause the processor to display categories into which content may be categorized, and to accept categorization of a user's own postings and of postings of other participants of the system. Displayed categories and icons for implementing categorization may appear on the initial page of the user. The number of items categorized in each category may be displayed to generate a profile summarizing the interests of the user having the user page. |
| US09336553B2 |
Diversity enforcement on a social networking system newsfeed
A social networking system generates a newsfeed for a user to view when accessing the social networking system. Candidate stories associated with users of the social networking system are selected and attributes of each story are determined. The candidate stories are ranked so that the ranking of a candidate story having one or more common attributes with another candidate story is modified. This reduces the likelihood of the newsfeed presenting candidate stories with common attributes proximate to each other. |
| US09336552B1 |
Laser-based methods and systems for capturing the condition of a physical structure
In a computer-implemented method and system for capturing the condition of a structure, the structure is scanned with a three-dimensional (3D) scanner. The 3D scanner generates 3D data. A point cloud or 3D model is constructed from the 3D data. The point cloud or 3D model is then analyzed to determine the condition of the structure. |
| US09336542B2 |
Construction payment management system and method with automatic notification workflow features
Systems and method for managing a construction payment process. An input is received from a first participant and one of a plurality of stored notification workflows is accessed from a memory based on the information received from the first participant. Each stored notification workflow defines a sequence of automatic electronic notifications that are transmitted from the application server to one or more participants in the construction project in response to one or more predetermined events. Based on the accessed notification workflow, a second participant is identified and a first notification is automatically transmitted to the second participant. A response to the first notification is received from the second participant through an electronic form. The content of the response is automatically processed and a second notification is transmitted to a third participant based on the accessed notification workflow. |
| US09336540B2 |
Method and system for use of game for charity donations
A method and system for use of a game with charity donations. In one example, a donation agent interacting with a merchant website can offer an online user an option to allocate at least a portion of a payment for or price of a purchase, associated with a transaction made by the user via the merchant website, to be donated by a merchant (corresponding to the merchant website), on behalf of the user, to a charity of the user's choosing. The donation agent can disburse the calculated donation amount to the charity selected by the customer. The points earned can be combined with a college scholarship award mechanism. The game encourages people to participate in the charity in a fun way, e.g., as a hobby every day, with a large user base. |
| US09336532B1 |
Method and system for compiling a multi-source database of composite investor-specific data records with no disclosure of investor identity
A system and method are disclosed for compiling a database of investor-related data by gathering and linking customer-specific data records from multiple unaffiliated financial institutions, where such data records are coded in such a manner that the database compiler is enabled to link, across data providers and/or time periods, data records that pertain to the same investor without being provided any information that reveals the identity of any investor. |
| US09336530B2 |
Mixing first and second price bids in an auction
In one aspect, methods include receiving one or more first bids that have associated fixed prices, receiving one or more second bids that have dynamic prices that are adjusted at a time of auction in consideration of other bids in the auction, conducting an auction including pricing the one or more first bids and the one or more second bids, the one or more first bids being priced at their respective fixed prices and the one or more second bids being priced at respective amounts that maintain each second bid in a position marginally above a next-highest bid in the auction, and serving content based on one or more winning bids from the auction. |
| US09336525B2 |
Method and apparatus for enabling dynamic analytics configuration on a mobile device
A computer implemented method and apparatus for enabling dynamic analytics configuration on a mobile device. generating a mobile application, which mobile application, when executed on a mobile device, includes accessing of instructions for analytics data collection, which instructions are accessed from a location remote from the mobile device executing the mobile application, and which instructions are modifiable without modification to the mobile application, thereby enabling dynamic analytics configuration on the mobile device. |
| US09336522B2 |
Method of controlling a game machine
A server transmits an encryption key or encryption key information for specifying the encryption key to a mobile terminal. The mobile terminal acquires play money at the game machine, generates encrypted information by encrypting an ID token with the received encryption key or an encryption key corresponding to the received encryption key information, and transmits the ID token and the encrypted information to the server through the game machine. The server decodes the encrypted information, transacts a payment based on a user ID identifying a user of the mobile terminal and the amount of play money when the ID token received by the server matches the ID token acquired by the decoding, and authorizes the game machine to let the user play up to the amount of play money. Therefore, the game can be started by exchanging electronic data between the mobile terminal and the game machine with high security. |
| US09336520B2 |
System and method for processing funds transfer between entities based on received optical machine readable image information
A system and method for coordinating processing of a funds transfer transaction between a transaction requestor and a transaction responder over a communications network. The transaction system comprises receiving a funds amount, requestor identification information, and responder identification information, such that at least one of the funds amount, the requestor identification information, or the responder identification information is encoded in symbology information embodied in a barcode. The system also decodes the symbology information into unencoded information using a coding scheme of the barcode and generates a funds transfer request for the funds transfer transaction, such that the funds transfer request has content including the unencoded information decoded from the symbology information. The system also sends the funds transfer request to a transaction processing system for subsequent settlement, as well as receives transaction confirmation messages. |
| US09336519B2 |
System and method for determining appropriate redemption presentations for a virtual token associated with a stored value account
A method for determining an appropriate redemption presentation for a virtual token associated with a stored value account is disclosed. The method may include receiving a request for presenting a redemption presentation of a virtual token and obtaining a merchant identifier associated with the request. The method may further include determining if the request is for one of an on-line transaction and a transaction with a point-of-sale terminal, and if the request is for a transaction with a point-of-sale terminal, then searching a database using the merchant identifier to find one or more redemption presentations of virtual token preferred by a merchant. Subsequently, the one or more redemption presentations of the virtual token may be transmitted over a computer network to a client device. |
| US09336518B1 |
Method and system for conditioning grant of digital rights on receiving and validating content-distribution referrals
A method and system for conditioning grant of digital rights on receiving and validating content-distribution referrals is provided. A subscriber using a communication device may enter a request to use locked digital content, or request a content-use right. The user may be prompted to enter one or more referrals as potential other recipients of the content. An indication of the one or more referrals may be sent to a network entity, which may determine whether at least a threshold number of the entered referrals are valid. If so, a network entity may transmit to the communication device data that will facilitate use of the digital content. Additionally, a network entity may send a solicitation message to each of at least the threshold number of entered referrals. A network entity may also provide an award in return for the entered referrals. |
| US09336513B2 |
Method for automated acknowledgement of electronic message
An electronic messaging device adapted to receive electronic messages from a sender. The electronic messaging device has a controller, a transmitter and receiver unit connected to the controller, a user interface connected to the controller, and a body detection device connected to the controller. After receipt of a notification message from the sender, the transmitter sends an acknowledgement message to the sender when the body detection device detects the presence of a recipient of the notification message. |
| US09336511B2 |
Import and merge of categorization schemas
Methods and systems for merging a updated schema and a customized schema both derived from the same schema are presented. The schemas may be used by application programs as decision trees. The schemas may have categories with linked business objects. The categories may be organized by a hierarchy which defines relationships between the categories. The customized schema may be imported and merged with the updated schema. The merging may be based on the merging the paths of the updated schema with the paths of the customized schema. Additional steps may include merging the attributes of the updated and customized schemas, merging the application areas of the updated and customized schemas, and merging the attributes of the categories. Adjustments may be performed to the merged updated schema by a user or an application program. The results of merging may be recorded in a log. |
| US09336510B2 |
System and method for providing real-time tracking of items in a distribution network
Systems and methods of processing items. Items in a distribution network or process may be scanned at every handling point in the distribution network, and each scan is recorded in a central repository. The scan information can be used to generate real-time access to data, analytical tools, predictive tools, and tracking reports. |
| US09336508B2 |
Virtual planogram management, systems, and methods
Systems and methods of constructing and managing virtual planograms are presented. Contemplated systems allow for construction of a virtual planogram, which can be used to present consumers virtual inventory items as being available for purchase via a display device. The display device can include an electronic billboard within an establishment, a mall for example, or include a user's smart device, a cell phone or tablet for example. |
| US09336504B2 |
Eliminating execution of jobs-based operational costs of related reports
Optimizing operational costs in a computing environment includes identifying high-cost jobs that are executed to generate one or more reports in the computing environment, identifying one or more reports the generation of which is dependent on the execution of the high-cost jobs, and culling at least a first job from among the high-cost jobs, in response to determining that a benefit achieved from the reports that depend on the first job does not justify costs associated with generating the reports. |
| US09336502B2 |
Showing relationships between tasks in a Gantt chart
A system for showing a dependency relationship between a first task and a second task in a Gantt chart. The system displays the first task. The system also displays at least one selector. The at least one selector is associated with the first task. Tasks dependent upon the first task are accessible via the at least one selector. The second task is dependent upon the first task. The system also receives a selection of the second task via the at least one selector. The system also displays the second task. |
| US09336501B2 |
Method and apparatus for supporting cross jurisdictional mutual aid requests
The same priority is applied to all resources assigned to an incident. A first dispatch system in a first network assigns a network resource in the first network to an incident that occurred in a first jurisdiction. The first dispatch system requests a mutual aid resource from a second dispatch system in a second network subsequent to identifying a resource gap in the first network. The first dispatch system obtains the mutual aid resource from the second dispatch system. A first policy component in the first network receives, from at least one of a first prioritization service in the first network and the at least one second network, at least one of an incident information or a mutual aid information. The first policy component correlates the mutual aid resource with obtained incident information and assigns a same priority to the network resource and the mutual aid resource. |
| US09336489B2 |
Techniques for handling modeling errors during planning
In the area of storage management, service automation can be realized through the use of “MAPE” loop(s). A Planner (P) interacts with the Monitoring (M), Analysis (A) and Execution (E) components in a closed loop. For each new option or potential planning action the Planner (P) invokes the Analysis (A) component. The correctness, as well as effectiveness, of the planning decision is dependent on the Analysis (A) component. Embodiments can utilize an adaptive Analysis (A) component (i.e., an analysis component that can be retrained) that also associates a value of confidence and a corresponding error in the evaluation along with a predicted impact. The Planner (P) component uses this additional information for quoting the final impact of a particular planning action as part of an adaptive MAPE loop to provide improved resource utilization and resource management. |
| US09336485B2 |
Determining answers in a question/answer system when answer is not contained in corpus
Mechanisms are provided for generating an answer for an input question when the answer is not directly present in a corpus of information. An input question is received from a computing device and analyzed to determine whether the input question is requesting an answer that is calculable. In response to a determination that the input question is requesting an answer that is calculable, one or more constituent data values are retrieved, from a corpus of information, for calculating the requested answer to the input question. A value corresponding to the requested answer is calculated based on the one or more retrieved constituent data values and is then output as the requested answer to the input question. |
| US09336484B1 |
System and method for outlier detection via estimating clusters
An efficient method and system for real-time or offline analysis of multivariate sensor data for use in anomaly detection, fault detection, and system health monitoring is provided. Models automatically derived from training data, typically nominal system data acquired from sensors in normally operating conditions or from detailed simulations, are used to identify unusual, out of family data samples (outliers) that indicate possible system failure or degradation. Outliers are determined through analyzing a degree of deviation of current system behavior from the models formed from the nominal system data. The deviation of current system behavior is presented as an easy to interpret numerical score along with a measure of the relative contribution of each system parameter to any off-nominal deviation. The techniques described herein may also be used to “clean” the training data. |
| US09336478B2 |
Contactless chip card
The device contains a flat card, a microcircuit, a dielectric substrate onto which the microcircuit is installed, and an antenna, which is made of an electrical conductor provided along the periphery of and in the plane of the flat card and connected to the microcircuit. The antenna is in the form of a frame, made of an electrical conductor, and a dielectric layer, provided within the electrical conductor, with a hollow space being formed within the frame. At least one partition is installed in the hollow space within the frame, forming through-openings which run transversely relative to the plane of the flat card. One end of the partition is connected to the dielectric layer of the frame. The electrical conductor of the antenna is made of a noble metal. |
| US09336475B2 |
Radio IC device and radio communication terminal
A radio IC device includes a radio IC element that includes an antenna terminal connected to an antenna element, and a ground terminal connected to a ground conductor provided integrally with the antenna element, and a circuit element that includes an impedance matching circuit connected to the antenna terminal of the radio IC element. The circuit element includes a first inductance element that defines the impedance matching circuit, and a second inductance element that is connected, as a high-frequency cutoff circuit for the radio IC element, to the ground terminal. |
| US09336472B2 |
Image forming apparatus
An image forming apparatus includes a master control unit and a slave control unit. The master control unit operates in synchronization with a master clock signal. The slave control unit operates according to an operation instruction by the master control unit in synchronization with a slave clock signal. The slave control unit includes a slave clock generator for generating the slave clock signal, and a signal output unit for outputting the slave clock signal to the master control unit. The master control unit includes a master clock generator for generating the master clock signal with a higher time accuracy than the slave clock signal, and a clock error calculator for calculating an error of the slave clock signal based on obtained information representing a cycle of the slave clock signal using the master clock signal. |
| US09336471B2 |
CRUM chip, image forming apparatus, and communication method of CRUM chip
A CRUM chip mountable on a consumables unit of an image processing unit includes an interface unit configured to receive a first signal including first data and first integrity monitoring data for the first data from a main body of the image forming apparatus, a monitoring unit configured to separate the first integrity monitoring data from the first signal and monitor integrity of the first signal, a data processing unit configured to generate second data to be transmitted to the main body of the image processing unit, a generating unit configured to generate second integrity monitoring data using the second data and the first integrity monitoring data, and a control unit configured to control the interface unit to transmit a second signal including the second data and the second integrity monitoring data to the main body of the image forming apparatus. Therefore, stability of communication is improved. |
| US09336468B2 |
Image forming apparatus, image forming method, and medium
The image forming apparatus includes a PDL analysis unit, a DL generation unit, an edge enhancement determination unit configured to determine whether or not to perform edge enhancement processing for each image, an edge enhancement unit configured to perform edge enhancement processing, and a development processing unit configured to develop a DL into a bitmap. The DL generation unit generates a DL for image data within PDL data on which edge enhancement processing is not performed in the case where the edge enhancement determination unit determines not to perform edge enhancement processing, and generates a DL for image data within PDL data on which edge enhancement processing is performed in the case where the edge enhancement determination unit determines to perform edge enhancement processing. |
| US09336467B2 |
Information processing apparatus, information processing system, and recording medium
An information processing apparatus for generating drawing data by using a print job, includes a plurality of drawing data generation units generating the drawing data by using the print job; a determination unit analyzing the print job and determining any one of the drawing data generation units that is to generate the drawing data by using the print job; and a screen display unit displaying a display screen of settings of the print job on a display part by selecting the display screen based on a result determined by the determination unit. |
| US09336466B2 |
Printing apparatus including a moving guiding portion
A printing apparatus includes: a first driving portion transporting a paper sheet; a printing portion being disposed on an upstream side of the first driving portion in a transporting direction of the transported paper sheet, including a plurality of aligned ejection ports ejecting liquid onto the transporting paper sheet to print an image on the paper sheet by the liquid; a drawing portion being disposed on an upstream side of the printing portion in the transporting direction, drawing the paper sheet of which a tip end is placed at a preset position, and feeding the paper sheet to a transporting path via the printing portion and the first driving portion; and a guiding portion being interposed between the printing portion and the first driving portion in the transporting direction, and when feeding the paper sheet, freely reciprocating between a first position and a second position. |
| US09336464B2 |
Operation device and operation method for showing preview images reflecting changed settings
An operation device includes: a preview image displaying unit configured to display plural setting item keys and icons corresponding to setting items in a predetermined screen and display a preview image that resembles a printed matter corresponding to a setting value of a predetermined setting item upon changing the setting value; an obtaining unit configured to obtain setting values of either a setting item key among the setting item keys or an icon among the icons one by one when a user performs a predetermined operation to the setting item key or the icon; and a generating unit configured to generate preview images corresponding to respective ones of the obtained setting values. The preview image displaying unit is further configured to switch and display the generated preview images in the screen in turn with a predetermined time interval. |
| US09336460B2 |
Adaptive motion instability detection in video
One or more apparatus and method for adaptively detecting motion instability in video. In embodiments, video stabilization is predicated on adaptive detection of motion instability. Adaptive motion instability detection may entail determining an initial motion instability state associated with a plurality of video frames. Subsequent transitions of the instability state may be detected by comparing a first level of instability associated with a first plurality of the frames to a second level of instability associated with a second plurality of the frames. Image stabilization of received video frames may be toggled first based on the initial instability state, and thereafter based on detected changes in the instability state. Output video frames, which may be stabilized or non-stabilized, may then be stored to a memory. In certain embodiments, video motion instability is scored based on a probability distribution of video frame motion jitter values. |
| US09336459B2 |
Interactive content generation
Generation of interactive content. In an embodiment, a representation of candidate object(s) in content of a digital media asset are received. For each of the candidate object(s), feature(s) of the candidate object are compared to corresponding feature(s) of a plurality of reference objects to identify reference object(s) that match the candidate object. For each of the matched candidate object(s), a hotspot package is generated. The hotspot package may comprise a visual overlay which comprises information associated with the reference object(s) matched to the respective candidate object. |
| US09336457B2 |
Adaptive anatomical region prediction
Disclosed herein is a framework for facilitating adaptive anatomical region prediction. In accordance with one aspect, a set of exemplar images including annotated first landmarks is received. User definitions of first anatomical regions in the exemplar images are obtained. The framework may detect second landmarks in a subject image. It may further compute anatomical similarity scores between the subject image and the exemplar images based on the first and second landmarks, and predict a second anatomical region in the subject image by adaptively combining the first anatomical regions based on the anatomical similarity scores. |
| US09336456B2 |
Systems, methods and computer program products for identifying objects in video data
Image based operating systems and methods are provided that identify objects in video data and then take appropriate action in a wide variety of environments. In some embodiments, the image based operating systems and methods allow a user to activate other devices and systems by making a gesture. |
| US09336455B1 |
Methods and apparatus for locating lines in images and using located lines to make image adjustments
Methods and apparatus for identifying lines in an image are described. An image to be processed is divided into a plurality of tiles, and processing is performed on a per tile basis. Lines are identified in tiles and a weight is assigned to each line based on among other things, the length of the line. Quantized first and second parameter values, e.g., values defining where lines enters and leave an area, are used in defining the identified lines. A set of lines is selected based on the weight information and output or used in image processing the image including the lines. |
| US09336454B2 |
Vector processor calculation of local binary patterns
A method (and system) of determining a local binary pattern in an image includes selecting an orientation. For each pixel in the image, the method further includes determining a binary decision for each such pixel relative to one neighboring pixel of the orientation, selecting a new orientation, and repeating the determination of the binary decision for each pixel in the image relative to one neighboring pixel of the newly selected orientation. |
| US09336453B2 |
Image capture and identification system and process
A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object. |
| US09336451B2 |
Video surveillance and analytics system
An apparatus is disclosed which is operative to analyze a sequence of video frames of a camera view field to track an object in the view field and determine a temporal relationship start and end points of track in view field. The apparatus also determines a sequence of video frames of a plurality of surveillance network camera view fields to track an object in respective view fields and store respective start and end points and start and end times as attributes of each said track for respective view fields. |
| US09336449B2 |
Vehicle recognition device
A vehicle recognition device 1 has a characteristic region identifying unit 5 that identifies two characteristic regions 9 arranged in a horizontal direction in an image 6 from an imaging unit 2, and a region outer end identifying unit 10 that identities outer ends 11 in the horizontal direction of the two characteristic regions 9. The region outer end identifying unit 10 identifies a corrected outer end 15 in the case where the difference in width in the horizontal direction between the two characteristic regions 9 is not a predetermined value or less. |
| US09336447B2 |
Ambient environment determination apparatus
In an ambient environment determination apparatus, an imager obtains a picture capturing an area ahead of a vehicle, and a street lamp is detected for each detection frame unit of the picture. Then, an urban area determination process is performed that determines whether or not the ambient environment of the vehicle is an urban area based on both of a street lamp detection result of a current detection frame unit and a street lamp detection result of a past detection frame unit of the picture. Further, in a period after the vehicle turns right or left, determination responsiveness with regard to determination whether or the ambient environment is a urban area or a non-urban area is enhanced than that in a period other than the period after the right or left turn. |
| US09336437B2 |
Segregation of handwritten information from typographic information on a document
A system for segregating handwritten information from typographic information on a document may include a memory, an interface, and a processor. The memory stores an electronic document image of a document where the electronic document image includes pixels and each pixel has a characteristic. The processor may receive, via the interface, the electronic document image and may identify first, second and third most frequently occurring characteristics of the pixels of the electronic document image. The pixels having the first most frequently occurring characteristic represent a background of the document. The processor may determine the typographic information of the document as represented by pixels having the second most frequently occurring characteristic. The processor may determine the handwritten information of the document as represented by pixels having the third most frequently occurring characteristic. The processor may derive a first representation of the handwritten information and a second representation of the typographic information. |
| US09336436B1 |
Methods and systems for pedestrian avoidance
An autonomous vehicle configured to avoid pedestrians using hierarchical cylindrical features. An example method involves: (a) receiving, at a computing device, range data corresponding to an environment of a vehicle, and the range data comprises a plurality of data points; (b) detecting, by the computing device, one or more subsets of data points from the plurality of data points that are indicative of an upper-body region of a pedestrian, and the upper-body region may comprise parameters corresponding to one or more of a head and a chest of the pedestrian; and (c) in response to detecting the one or more subsets of data points, determining a position of the pedestrian relative to the vehicle. |
| US09336433B1 |
Video face recognition
The present invention is a complete end-to-end video face recognition system. The invention performs a track-by-track labeling of all tracks within a video. A novel algorithm Mean Sequence SRC (MSSRC) is applied to a face track to perform video face recognition using a joint optimization to leverage all of the available video data and the knowledge that the face track frames belong to the same individual. Additionally the system constructs a probabilistic affinity graph combining appearance and co-occurrence similarities to model the relationship between face tracks in a video. Finally, using this relationship graph, random walk analysis is employed to propagate strong class predictions among similar face tracks, while dampening weak predictions. |
| US09336432B2 |
Adaptation of a vector drawing based on a modified perspective
Techniques for modifying the appearance of objects comprising a two-dimensional vector drawing are disclosed. Such modifications can be made in response to user input that manipulates a viewing perspective for the drawing. Before a user manipulates the viewing perspective for given scene, information relating to the objects comprising the scene is stored in a data structure. Such information may include, for each object in the scene, a two-dimensional projection of the object onto a reference plane and parameters characterizing the reference plane. Once the user has finished defining the modified viewing perspective, the objects are projected from the reference plane to the modified perspective. The parameters characterizing the reference plane are applied to ensure that the object is rendered at the correct orientation and depth in the modified perspective. Objects comprising the scene can thus be automatically updated in response to the user's manipulation of the viewing perspective. |
| US09336427B2 |
Biometric information image-capturing device, biometric authentication apparatus and manufacturing method of biometric information image-capturing device
A biometric information image-capturing device includes an image capturing unit configured to photograph a body part including biometric information to generate a biometric image in which the biometric information is represented, at least one light source disposed in the periphery of the image capturing unit and configured to illuminate light toward a photographing range of the image capturing unit, and a light guide member disposed to be opposed to the at least one light source in the periphery of the image capturing unit and provided with a concaved portion located at a surface of the light guide member, the concaved portion being nearer to the image capturing unit side than the at least one light source. |
| US09336422B2 |
Rack orientation detection with multiple tags
A first embodiment of the invention relates to systems and methods for detecting the orientation of sample carriers using two or more RFID tags. One or two dimensional matrix of equally spaced RFID reader antennas may be positioned beneath or within an area on which racks are placed. The first RFID tag defines the origin of the sample carrier and its geometry. The second and additional RFID tags define the orientations of the sample carrier relative to the matrix of the RFID reader antennas. At least two of the tag antennas on the rack align uniquely with two antennas on the reader matrix. The system energizes each reader antenna and associates the RFID tags aligned with them to the RFID reader antenna's physical position. |
| US09336417B2 |
Overturn detection device, overturn detection system, and electronic device
An overturn detection device includes a housing including four or more display windows, a back-forth direction detector installed on a first position of the housing and displaying a position of a first detection member in a first display part, and a left-right direction detector installed on a second position of the housing and displaying a position of a second detection member in a second display part. Further, the installation positions of the back-forth direction detector and the left-right direction detector in the first and the second positions are not externally and visually recognizable, and at least a part of the first and the second display parts are displayed through the four or more display windows as pattern data. |
| US09336416B2 |
Methods of hydraulically fracturing a subterranean formation
A hydraulic fracture design model that simulates the complex physical process of fracture propagation in the earth driven by the injected fluid through a wellbore. An objective in the model is to adhere with the laws of physics governing the surface deformation of the created fracture subjected to the fluid pressure, the fluid flow in the gap formed by the opposing fracture surfaces, the propagation of the fracture front, the transport of the proppant in the fracture carried by the fluid, and the leakoff of the fracturing fluid into the permeable rock. The models used in accordance with methods of the invention are typically based on the assumptions and the mathematical equations for the conventional 2D or P3D models, and further take into account the network of jointed fracture segments. For each fracture segment, the mathematical equations governing the fracture deformation and fluid flow apply. For each time step, the model predicts the incremental growth of the branch tips and the pressure and flow rate distribution in the system by solving the governing equations and satisfying the boundary conditions at the fracture tips, wellbore and connected branch joints. An iterative technique is used to obtain the solution of this highly nonlinear and complex problem. |
| US09336415B2 |
Device for securing a capacitive keypad and corresponding terminal
A securing device is provided for securing a capacitive keypad of an electronic payment terminal having at least one processor for managing keys of the capacitive keypad. The securing device is configured for communicating with the processor and includes a driving module for driving at least one simulation element for simulating at least one keystroke on the capacitive keypad. The driving module includes a receiver for receiving at least one simulation command randomly transmitted by the processor. |
| US09336411B2 |
System on chip
In a system on chip responder units comprise one or more responder elements and is associated with one or more protection units. A request analysis unit is arranged to receive from a requesting requestor unit a request for access to one or more target responder elements among responder elements within a target responder unit among the responder units. The request analysis unit determines relevant protection data based on the request and an authorization list, which comprises one or more entries For each entry of the authorization list: taking access requirements specified by the respective entry into account if one or more of the target responder elements are part of the group of responder elements specified by the respective entry. The request analysis unit provides the relevant protection data to one or more target protection unit(s) associated with the responder unit(s), and located in a hierarchical path between the requesting requestor unit requestor unit and the target responder unit. The target protection unit(s) are arranged to perform a protective action for the target responder elements based on relevant protection data. |
| US09336410B2 |
Nonvolatile memory internal signature generation
A nonvolatile memory device generates a signature using a private key and contents within the memory device. The signature is stored in a secure area within the nonvolatile memory device. A processor having the same private key also generates a signature that is stored in the clear. The processor validates the contents of the nonvolatile memory by comparing the signatures. |
| US09336407B2 |
Dynamic data masking system and method
A system and method for providing dynamic data masking for databases through a data masking apparatus. |
| US09336395B2 |
Boot driver verification
An example system in accordance with the present disclosure includes a secure hash calculation engine to intercept and calculate a secure hash for a pre-boot driver before the pre-boot driver is executed, wherein the pre-boot driver is executed based on the computed secure hash being successfully verified, and wherein the pre-boot driver is not executed based on the computed secure hash not being successfully verified. |
| US09336392B2 |
Verification of intellectual property core trusted state
Secure initialization of the state of an electronic circuit. A processor determines the trusted state of one or more architecture state registers of an intellectual property core. The processor clears entries in a memory of the intellectual property core. The processor verifies that state machines, included in execution logic of the intellectual property core, have not generated output. |
| US09336389B1 |
Rapid malware inspection of mobile applications
Disclosed are various embodiments for inspecting malware with little or no user interruption. A first computing device may compare a source code of an application to a fingerprint stored locally on the first computing device. The first computing device may transmit the source code to a second computing device to determine whether the source code resides in a database comprising approved applications. If the source code does not reside in the database, a thorough scan of the source code may be conducted. |
| US09336385B1 |
System for real-time threat detection and management
A system and method for threat detection and management. The method includes: comparing the observed activity with a threat profile; generating a threat detection signal including threat information when the observed activity matches the threat profile; altering an operating characteristic of a client device in response to a threat response signal; receiving the threat information; evaluating the threat information; automatically determining an appropriate response to the threat detection signal based on an evaluation of the threat information; comparing the threat detection signal to known threat patterns; distributing new threat information if the threat detection signal does not match a known threat pattern; storing threat information; and providing a user interface information and controls for delivering control information over a control protocol. |
| US09336384B2 |
Systems and methods for replacing application methods at runtime
A computer-implemented method for replacing application methods at runtime may include identifying an application at runtime that includes a target method to replace at runtime with a source method, locating a target address of a target method data structure (that includes a target code pointer to method code of the target method) within memory at runtime that is referenced by a target class, determining a source address of a source method data structure (that includes a source code pointer to method code of the source method) within memory at runtime that describes the source method, and modifying the application at runtime to have the target class reference the source method instead of the target method by copying the source method data structure from the source address to the target address and, thereby, replacing the target code pointer with the source code pointer. Various other methods and systems are also disclosed. |
| US09336380B2 |
Applying activity actions to frequent activities
Activities of users of a service often involve one or more resources, such as uploading or downloading files in a file system of an FTP server. The activities of the users may be tracked and recorded in an activity log in order to identify frequently performed activities involving particular resources, and for such frequently performed activities, one or more activity actions may be performed. For example, malicious users may upload or utilize an equivalent set of assets stored in several accounts. The frequency of these undesirable activities may be identified, and an activity action may be automatically applied to the users (e.g., banning accounts), resources (e.g., deleting assets), and/or activities (e.g., blocking access to the resources). Conversely, desirable activities involving particular resources may be similarly detected, and the activity action applied to such desirable activities may involve reporting the desirable activity to an administrator of the service. |
| US09336373B2 |
User biometric pattern learning and prediction
A user device collects timing data that indicates screen touch timing behavior during multiple touch events associated with at least one of a hold time for a particular button or a transition time between two particular buttons. The user device also collects force data indicating screen touch force behavior during the multiple touch events. The user device identifies a user biometric pattern for the touch event based on the timing data and the force data, and stores the user biometric pattern. |
| US09336368B2 |
License install support system, license install support method
A license install support method includes receiving input of a first license identifier used for receiving license data, the license data being used by an electronic device for determining whether activation of a program is allowable; sending, to a license source determining device connected via a network, an acquisition request specifying the first license identifier for acquiring issuing source information including issuing source identification information of the license data; receiving the issuing source information returned from the license source determining device; and using a license install processing unit to acquire the license data corresponding to the first license identifier from a license management device relevant to the issuing source information included among plural license management devices connected via the network, and to send the license data to the electronic device. |
| US09336365B2 |
Digital rights management with irregular network access
There is a performing of digital rights management (DRM), operable in an offline mode with respect to a communications network. The performing includes identifying a stored rights object associated with a stored asset. The stored rights object includes reporting duration information associated with the stored asset. The performing also includes determining, utilizing a processor, whether a transmission of an early status message is a successful communication based on an early status message determination. If a failure in communicating the early status message is determined, utilizing the stored asset. The performing may also include transmitting an early status message and/or later status message after identifying the stored rights object. There is also a performing of digital rights management (DRM) associated with a DRM system and operable in an offline mode with respect to a communications network. There are also client devices, communicating systems, computer readable mediums and protocols. |
| US09336364B1 |
Method and system to record onto a media player
A method and system for recording a media content onto a media player are disclosed. A recording interface of the media player is unlocked by a media recorder using a key. Next, the media player receives the media content from the media recorder through the recording interface. The media content is stored onto a storage of the media player, where the storage resides within the media player prior to receiving the media content from the media recorder. The media player includes a mechanism for playing the media content. Then, the recording interface of the media player is locked by the media recorder. In this manner, a way is provided to distribute media content while also protecting against the improper copying of media content. |
| US09336361B2 |
Feature license-related repair/replacement processes and credit handling
A system and method for issuing a license for a device through a license server is provided. A server receives identification information for a device that communicates to the server if a first license binding identity and/or a first display identity has changed. A previous license for the device is revoked and a previous license credit is returned to a user's credit pool if the first license binding identity and/or the first display identity has changed. A license request is received, which includes a second license binding identity identifying the device. If the second license binding identity is the same as the first license binding identity, the previous license for the device is issued. If the second license binding identity is not the same as the first license binding identity, a new license for the device is issued and a new license credit is deducted from the user's credit pool. |
| US09336358B2 |
Granting permission in association with an application
A system and method are provided for granting permission in association with an application, the method comprising accessing a website on an application running on an electronic device, the website comprising metadata, obtaining, from the metadata, a unique identifier of a native application, determining, based on the obtained unique identifier, that the native application is installed on the electronic device and that a permission is set in the native application, verifying, in response to the determination, that the native application corresponds to the website, and setting, in response to the verification, the permission for the website, wherein both the application and the native application allow for setting of the permission. |
| US09336353B2 |
Systems and methods for communicating sensor data between communication devices of a glucose monitoring system
System and method for communicating glucose concentration information between devices of a continuous glucose monitoring system is provided. The continuous glucose monitoring system can include a sensor module generates a glucose concentration measurement data and transmits the data to one or more further devices of the continuous glucose monitoring system. The further devices can include a receiver unit and one or more secondary display devices. The receiver unit can be configured to be a stand-alone device of or physically connect to a secondary display device. A user interface can also be provided that provides enhanced functionality for using the continuous glucose monitoring system. |
| US09336346B2 |
Integral fabrication of asymmetric CMOS transistors for autonomous wireless state radios and sensor/actuator nodes
A method of arranging asymmetrically doped CMOS transistors in a semiconductor wafer that forms base cells within a plurality of logic standard cells in a CMOS process technology that includes conventional symmetric CMOS transistors having different threshold voltages. The asymmetrically doped CMOS transistors have a gate length exceeding 1.5 times the minimum gate length of the symmetric CMOS transistors. Regions defined by electrical junctions directly adjacent to the gate of the asymmetric transistors are formed by an implant mask exposing an area of the wafer on the source side of the transistor to receive the junction implant of the symmetric CMOS transistors with a higher threshold voltage while shielding the drain area, and a further implant mask exposing an area of the wafer on the drain side of the transistor to receive the junction implant of the symmetric CMOS transistors with a lower threshold voltage while shielding the source area. |
| US09336344B2 |
Coarse grid design methods and structures
A layer of a mask material is deposited on a substrate. A beam of energy is scanned across the mask material in a rasterized linear pattern and in accordance with a scan pitch that is based on a pitch of conductive structure segments to be formed on the substrate. The beam of energy is defined to transform the mask material upon which the beam of energy is incident into a removable state. During scanning the beam of energy across the mask material, the beam of energy is turned on at locations where a conductive structure is to be formed on the substrate, and the beam of energy is turned off at locations where a conductive structure is not to be formed on the substrate. |
| US09336343B2 |
Calculating circuit-level leakage using three dimensional technology computer aided design and a reduced number of transistors
A method for calculating leakage of a circuit including a plurality of transistors includes simulating a three-dimensional model of the circuit, wherein the simulating accounts for a subset of the plurality of the transistors that includes less than all of the plurality of transistors, and calculating the leakage in accordance with the three-dimensional model. |
| US09336333B2 |
Searching and reference checking within social networks
A computer-implemented method for identifying a potential reference is disclosed. In one embodiment, a user interface (UI) object (e.g., a one-click reference search button) is provided, for example, on a web page displayed at a user's client device. When selected, the UI object causes a reference search query to be generated. The search query identifies the user performing the search, and a target person for whom the user would like a reference. The search query is communicated to, and processed by, a social networking system (e.g., through an API function call). In turn, the social networking system returns information about potential references to the client. |
| US09336331B2 |
Detecting, using, and sharing it design patterns and anti-patterns
Various embodiments described and illustrated herein include at least one of systems, methods, and software to identify, use, or share patterns and anti-patterns. Embodiments that include pattern and anti-pattern identification operate to identify candidate patterns and anti-patterns within a deployed system and to confirm or receive confirmation that the identified candidates are indeed patterns or anti-patterns. Embodiments that use patterns and anti-patterns operate to consume the identified patterns and anti-patterns to improve system performance. The embodiments that share patterns and anti-patterns include mechanisms whereby patterns and anti-patterns can be sent to and received from other systems. |
| US09336329B2 |
Performing a search for a document
A system for performing a search for a document in a collection of documents (11) is presented. A user input unit (1) enables a user to indicate a part of a search term. An auto completion unit (2) determines one or more completions of the part of the search term in order to obtain one or more completed search terms. An associating unit (3) associates a completed search term with a document matching the completed search term, wherein the document has a property, e.g. a time, associated therewith. An arranging unit (4) arranges the one or more completed search terms, based on the property of the documents associated with the completed search terms, to obtain an arrangement. A display unit (5) displays the one or more completed search terms according to the arrangement. |
| US09336326B2 |
Browser based objects for copying and sending operations
A disclosed method of transferring information between application programs on a mobile device may involve executing a browser application program on the mobile device to display a page containing one or more objects on a touch panel display; responsive to user touching of the display, identifying an object from the displayed page as having been selected by the user; and copying the selected object from the displayed page. The method further includes steps of displaying on the display a list of one or more destination programs available for selection and execution on the mobile device. The method may also involve steps of, responsive to user touching of the touch screen display, identifying one destination program as having been selected by the user, and launching the identified program. Then, the copied object is pasted for use in the execution of the identified destination program. |
| US09336321B1 |
Remote browsing and searching
A remote browsing and searching process is directed to the management of a remote browse session at a network computing provider. Responsive to a search request, the network computing provider provides search results corresponding to historical content representations associated with content previously requested by the client computing device, search results corresponding to content representations associated with current content, or to data about changes in the content. The network computing provider may determine the search results based on a navigation path associated with a previous request for content, navigation paths of other client computing devices, relationships or differences between various versions of content, or based on any number of other factors. Interactive displays may be provided to client computing devices, allowing a user to refine the search results, zoom and manipulate content representations, and view relationships, similarities, and differences in content representations. |
| US09336316B2 |
Image URL-based junk detection
Architecture that includes a junk (unwanted) image detection algorithm which performs junk image detection of unwanted images before the images are actually downloaded for indexing. Features are employed related to image location information and host websites, such as image path descriptor (e.g., URL-uniform resource locator) pattern features, webpage content features, click features, and image aggregated information in a machine learning based framework to predict the probability that an image is unwanted (or wanted) before the images are downloaded. The framework is then applied to build a statistical model and predict junk scores. By removing image URLs marked as “junk” from the work list of an automated indexer (e.g., crawler), the indexer bandwidth is significantly improved with a corresponding improvement in the publish rate. |
| US09336315B2 |
Personalized recommendation of a volatile item
A system, method, and machine readable medium for creating a personalized recommendation of an item by creating a topic vector based on a plurality of search queries, at least one of a plurality of users associated with the search queries or a plurality of items associated with the search queries; inferring a topical preference for a user based on a search query by the user; and recommending at least one item based on the topical preference and the topic vector. |
| US09336314B2 |
Dynamic facet ordering for faceted search
Methods for dynamically ordering facets for search result presentation are provided. Facets specific to a query are determined and facet orderings are dynamically generated. A number of search result arrangements are generated based upon the facet orderings and, as users input the query, various search results arrangements are presented and user engagement with respect thereto is monitored. To determine which of the arrangements to present to a given user, a number of factors are taken into account, e.g., previous user engagement for each arrangement across a segment or population of users, and whether the user has previously been shown any of the arrangements and, if so, the nature of the user's engagement therewith. Each time an arrangement is presented to a user and the user's behavior with respect thereto is recorded, additional data becomes available for deciding what arrangement to show the next time a user inputs the query. |
| US09336310B2 |
Monitoring of negative feedback systems
A computer-implemented method for identifying on-line comments as being legitimate or illegitimate is disclosed. The method includes receiving a comment directed to a piece of on-line content, randomly determining whether to review the comment manually, and providing for review of information regarding the comment by a manual reviewer if a determination is made to manually review the comment. The chance of determining whether to review the comment manually is dependent on outcomes of prior manual reviews of received comments. |
| US09336307B2 |
Virtual wireless multitrack recording system
Disclosed are systems and methods for wirelessly recording multi-track audio files without the data corruption or loss of data that typically occurs with wireless data transmission. In some aspects of the present invention, each performer is equipped with a local audio device capable of locally recording the respective performer's audio while also transmitting it to a master recorder. The locally recorded audio may then be used to repair or replace any audio lost or corrupted during transmission to the master recorder. Such repair or replacement may be performed electronically or via playback of the locally recorded audio. In other aspects of the present invention, a master recorder is not required since all locally recorded audio may be combined or otherwise processed post-recording. Locally recorded audio may include identifiers to aid in post-recording identification of such audio. A multi-memory unit is also provided to facilitate manipulation and processing of audio files. |
| US09336305B2 |
Systems and methods for generating issue networks
Systems and methods for generating issue networks are disclosed. In one embodiment, a computer-implemented method of generating an issue network from a document corpus includes searching, using a computer, the document corpus for a set of documents discussing a starting issue, wherein the starting issue is one of a plurality of normalized issues defined by the document corpus. The method further includes determining a set of normalized issues discussed by the set of documents discussing the starting issue, wherein the set of normalized issues also includes the starting issue, and determining instances of co-occurrences of individual normalized issues of the set of normalized issues within individual cases of the set of documents. The method also includes linking individual normalized issues of the set of normalized issues based on their co-occurrences within the set of documents, wherein the linked individual normalized issues at least in part define the issue network. |
| US09336302B1 |
Insight and algorithmic clustering for automated synthesis
A decision support system and method, which receives user inputs comprising: at least one user criterion, and at least one user input tuning parameter representing user tradeoff preferences for producing an output; and selectively produces an output of tagged data from a clustered database in dependence on the at least one user criterion, the at least one user input tuning parameter, and a distance function; receives at least one reference-user input parameter representing the at least one reference-user's analysis of the tagged data and the corresponding user inputs, to adapt the distance function in accordance with the reference-user inputs as a feedback signal; and clusters the database in dependence on at least the distance function, wherein the reference-user acts to optimize the distance function based on the user inputs and the output, and on at least one reference-user inference. |
| US09336299B2 |
Acquisition of semantic class lexicons for query tagging
A user's search experience may be enhanced by providing additional content based upon an understanding of the user's intent. Query tagging, the assigning of semantic labels to terms within a query, is one technique that may be utilized to determine the context of a user's search query. Accordingly, as provided herein, a query tagging model may be updated using one or more stratified lexicons. A list data structure (e.g., lists of phrases obtained from web pages) and seed distribution data (e.g., pre-labeled probability data) may be used by a graph learning technique to obtain an expanded set of phrases and their respective probabilities of corresponding with particular lexicons (e.g., semantic class lexicons). The expanded set of phrases may be used to group phrases into stratified lexicons. The stratified lexicons may be used as features for updating and/or executing the query tagging model. |
| US09336297B2 |
Content inversion for user searches and product recommendations systems and methods
There is provided systems and method for content inversion for use in user searches and product recommendations. The methods include receiving a first content, wherein the first content includes a first sentence having at least one first sentiment expression, creating a syntactic parse tree of the first sentence, identifying a first sentiment in the at least one first sentiment expression, wherein the first sentiment corresponds to a first polarity, determining a first needs expression corresponding to the first sentiment, wherein the first needs expression includes a first subject. The method may further include creating a sub-tree corresponding to the first needs expression, and grouping the content with other content having similar sub-trees. |
| US09336295B2 |
Fusing contextual inferences semantically
System and methods for performing context inference in a computing device are disclosed. In one embodiment, a method of performing context inference includes: determining, at a computing device, a first context class using context-related data from at least one data source associated with a mobile device; and determining, at the mobile device, a fusion class based on the first context class, the fusion class being associated with at least one characteristic that is common to the first context class and a second context class that is different from the first context class. |
| US09336293B2 |
Data management apparatus and method for surveillance system
Provided are a data management apparatus and a data management method for a surveillance system. The data management apparatus includes: a first storage unit configured to store therein data provided from a data input unit; a second storage unit configured to store therein a copy of the data; and a control unit configured to control the first storage unit to store the data therein on a real time basis, and if the data stored in the first storage unit is equal to or larger than a predetermined threshold amount, generate the copy and control the second storage unit to store the copy in the second storage unit as much as a given amount. |
| US09336288B2 |
Workflow controller compatibility
Aspects of the disclosure relate to workflow controller compatibility for in order to format workflow data such that communication between incompatible workflow controllers is facilitated. A compatibility processing module may execute one or more processes to format a workflow such that communication between previously incompatible workflow controllers is facilitated. A first workflow controller is configured with a compatibility processing module and receives a large number of data points. The compatibility module executes one or more processes on a workflow such that the processed workflow is compatible with a second workflow controller. |
| US09336287B2 |
System and method for merging network events and security events via superimposing data
An integrated network flow and security information management system and method is provided, more particularly, an integrated network flow and security information management system and method which leverages a process of superimposing and cross referencing common events and attributes in order to increase the speed of searches, completeness of searches and size of dataset (flow data). In particular, the process of superimposing may increase the amount of information that can be processed, while accelerating the search, thereby providing the user with more responsive acts of pivoting and scoping leading to a more complete response to network errors and threats. |
| US09336283B2 |
System and method for data sensitive filtering of patient demographic record queries
A method for data sensitive filtering in a patient database searches includes providing a search criteria comprising one or more search locator fields, determining a retrieval formula from the search criteria that maximizes error tolerance in the search criteria while satisfying a predefined response time requirement, and retrieving candidate records from the database. If no retrieval formula can be found that satisfies the response time requirements, the method includes requesting additional search criteria, scoring each candidate record by comparing a search criteria locator field with a corresponding retrieved record field, and determining whether the score of the candidate record exceeds a predefined threshold. If the candidate score does exceed the threshold, the candidate record is added to a list of records to be returned in response to the search criteria. |
| US09336281B2 |
Systems and methods for identifying and analyzing internet users
This disclosure describes systems, methods, and apparatus for generating reports enhancing an understanding of Internet users based on their generated content and actions taken by others in response to the generated content. |
| US09336276B2 |
Content sharing
Disclosed are embodiments of systems and methods that allow for the robust, flexible, and efficient sharing of content. In embodiments, content items may be associated with labels, tags, or other identifiers, third parties may be associated with labels, tags, or other identifiers, and sharing with the third party may be based upon comparisons of the labels, tags, or other identifiers associated with the content items and the labels, tags, or other identifiers associated with the third parties. |
| US09336274B2 |
Scalable acceleration of database query operations
Embodiments include methods, systems and computer program products for offloading multiple processing operations to an accelerator. Aspects include receiving a database query from an application, performing an analysis on the query, and identifying a plurality of available accelerators. Aspects further include retrieving cost information for one or more templates available on each of the plurality of available accelerators, determining a query execution plan based on the cost information and the analysis on the query, and offloading one or more query operations to at least one of the plurality of accelerators based on the query execution plan. |
| US09336273B2 |
Range query methods and apparatus
Range query techniques are disclosed for use in accordance with data stream processing systems. A technique is provided for incrementally processing continual range queries against moving objects. This technique is applicable for location-aware services and applications. A technique for evaluating one or more continual range queries over one or more moving objects comprises maintaining a query index with one or more containment-encoded virtual constructs associated with the one or more continual range queries over the one or more moving objects, and incrementally evaluating the one or more continual range queries using the query index. |
| US09336264B2 |
Collaborative filtering of a graph
Embodiments of the present invention provide for collaborative filtering during retrieval of a graph. In an embodiment of the invention, a method for collaborative filtering of a graph includes loading a data set from a repository of data and representing the data set in a graph of a plurality of arranged nodes and links therebetween. A primary node can be identified amongst the nodes of the graph a composite rating can be retrieved for different ones of the arranged nodes. In this regard, the composite rating for a corresponding one of the nodes can include an aggregation of different ratings previously applied to the corresponding one of the nodes by different end users. Finally, a subset of the arranged nodes can be selected based upon the identified primary node and a composite rating of one or more other nodes. |
| US09336263B2 |
Data loading systems and methods
System, method, and computer program product for processing data are disclosed. The system is configured to perform transfer of data from a file system to a database system. Such transfer is accomplished through receiving a request for loading data into a database system, wherein the data includes a plurality of attributes, determining at least one attribute of the data for loading into the database system, and loading the at least one attribute of the data into the database system while continuing to process remaining attributes of the data. |
| US09336261B2 |
Method and apparatus for updating personal information in communication system
A method and an apparatus for updating personal information in a communication system supporting a Converged Address Book (CAB) service are provided. The apparatus and method includes importing external personal profile information from a non-CAB system, and updating personal information in accordance with a user preference-based synchronization method using the external personal profile information. |
| US09336256B2 |
Method, apparatus, and computer-readable medium for data tokenization
An apparatus, computer-readable medium, and computer-implemented method for data tokenization are disclosed. The method includes receiving, at a database network router, a database access request directed to a tokenized database, the tokenized database containing one or more tokenized data values, applying one or more rules to the request, rewriting the request based on at least one of the one or more rules, such that data values being added to the database will be tokenized data values, and data values received from the database will be non-tokenized data values, and transmitting the rewritten request to the database. |
| US09336255B2 |
Techniques for traversal and storage of directory entries of a storage volume
Techniques for adding a directory entry to an existing directory data structure maintained by a storage system for storing a plurality of directory entries are provided. A first storage index block is used for storing a pointer to a first hash value from among a plurality of hash values. A second storage index block is allocated when the first storage index block has reached a threshold level for storing pointers to hash values for the plurality of directory entries. A group of pointers including a pointer to a second hash value from among the plurality of hash values is selected. The group of pointers is stored in the second storage index block with a pointer to a third hash value from among the plurality of hash values such that the directory entry can be searched using the plurality of hash values. |
| US09336251B2 |
System and method for SLA-aware database consolidation using per-tenant memory size configuration
Systems and methods for consolidating workload on one or more computing devices, comprising: generating tenant performance profiles for at least one of a buffer memory size and a buffer warmness; assigning one or more tenants to a database management system (DBMS) instance; configuring the one or more tenants to minimize a total server count needed to host the one or more tenants; and reducing the total server count by adjusting of buffer sizes while satisfying Service Level Agreement (SLA) requirements. |
| US09336247B2 |
Control data driven modifications and generation of new schema during runtime operations
A computational device receives input data and control data, where the control data includes instructions to modify one or more operations performed during a runtime execution associated with the input data. The control data is processed to modify the one or more operations during the runtime execution associated of the input data. |
| US09336244B2 |
Methods and systems for generating baselines regarding vehicle service request data
Methods and systems for generating baselines based on vehicle service request (VSR) data are described. Additional VSR data accumulated after generating a baseline can be compared to the baselines, by a processor executing program logic, to detect a deviation in the additional VSR data. Responsive to detecting the deviation, a notification regarding the deviation can be provided. The notification can prompt receivers of the notification to analyze the baseline and VSR data and responsively prepare a service bulletin regarding the VSR data. The service bulleting can be provided to repair shop equipment (RSE) or to users of the RSE. VSR data pertaining to different vehicle models built on a common vehicle platform can be aggregated to increase an amount of VSR data used to generate a baseline. Multiple baselines can be generated for each of one or more vehicle models. |
| US09336242B2 |
Mobile terminal and displaying method thereof
A mobile terminal including a wireless communication unit configured to wirelessly communicate with at least one other terminal; a controller configured to create a first set of thumbnail images for a first set of images among a plurality of images; and a display configured to display at least a portion of the first set of thumbnail images generated by the controller. |
| US09336239B1 |
System and method for deep packet inspection and intrusion detection
The present invention relates to a system for deep packet inspection and intrusion detection. The system uses a pattern matching module receiving as an input a data stream in a neural network. Neurons are activated such that when active, the neuron fires to all connecting output neurons to form a neuron spike, each neuron spike from the assigned neuron to a connecting output neuron having a delay. A delay is associated with each input character in the pattern, such that a position of each input character relative to an end of the pattern is stored in an alphabet-pattern-delay matrix (APDFM). An activation matrix (AM) is used to match each input character with a stored pattern to generate a similarity match and determine if the string of characters is the stored pattern. |
| US09336237B2 |
Content distribution
The distribution of content items, such as news items, is dependent in part upon the geographic relevance of the content item and the geographic community to which the target reader belongs. The geographic relevance of content items is determined and compared to a geographic profile for the reader at the distribution target. Where the function of geographic relevance exceeds a predetermined threshold, the content item is delivered to the target. As a result the reader is presented with content items that are more closely relevant to his geographic profile and desired interest threshold. |
| US09336233B2 |
Method and system for determining an optimally located storage node in a communications network
A method for locating an optimum storage node for serving a data file request received via a communications network, includes: receiving a file request from a user device coupled to the communications network; determining a geocode value based on a communications network address associated with the user device, wherein the geocode value is indicative of a geographic location of the user device; selecting a storage node from a plurality of storage nodes coupled to the communications network to serve the file request, wherein the storage node is selected based at least in part on the geocode value; and redirecting the file request to the selected storage node for handling. |
| US09336229B2 |
File cloning and de-cloning in a data storage system
A file cloning mechanism allows for quickly creating copies (clones) of files within a filesystem, such as when a user makes a copy of a file. In exemplary embodiments, a clone of a source object is at least initially represented by a structure containing references to various elements of the source object (e.g., indirect onodes, direct onodes, and data blocks). Both read-only and mutable clones can be created. The source file and the clone initially share such elements and continue to share unmodified elements as changes are made to the source file or mutable clone. None of the user data blocks or the metadata blocks describing the data stream (i.e., the indirect/direct onodes) associated with the source file need to be copied at the time the clone is created. At appropriate times, cloned files may be “de-cloned.” |
| US09336228B2 |
Synchronization of program code between revision management applications utilizing different version-control architectures
A device may receive a request to synchronize a first set of document revisions with a second set of document revisions. The first set of document revisions may be associated with a first format readable by a first application utilizing a stream architecture. The second set of document revisions may be associated with a second format readable by a second application utilizing a branch architecture. The device may determine synchronization configuration information, and may compare the first set of document revisions with the second set of document revisions based on the synchronization configuration information. The device may selectively modify one or more files based on comparing the first set of document revisions and the second set of document revisions. The device may provide information associated with selectively modifying the one or more files. |
| US09336224B2 |
Systems and methods for providing increased scalability in deduplication storage systems
A computer-implemented method for providing increased scalability in deduplication storage systems may include (1) identifying a database that stores a plurality of reference objects, (2) determining that at least one size-related characteristic of the database has reached a predetermined threshold, (3) partitioning the database into a plurality of sub-databases capable of being updated independent of one another, (4) identifying a request to perform an update operation that updates one or more reference objects stored within at least one sub-database, and then (5) performing the update operation on less than all of the sub-databases to avoid processing costs associated with performing the update operation on all of the sub-databases. Various other systems, methods, and computer-readable media are also disclosed. |
| US09336222B2 |
Creation and access of quota trees in a file system
A method of identifying metadata referenced by a quota tree. A quota tree metafile is accessed, and this quota tree metafile includes references to locations of inode grouped data structures associated with quota trees. Here, each quota tree is allocated an inode grouped data structure. A reference to a location of an inode grouped data structure that is allocated to the quota tree is identified from the quota tree metafile. The inode grouped data structure is accessed based on the reference, and this inode grouped data structure defines a set of inode identifiers associated with the quota tree. An inode grouped data structure that stores the metadata is then located using the set of inode identifiers as index. |
| US09336219B2 |
Distributed file system snapshot
Technology is disclosed for managing data in a distributed file system (“the technology”). The technology can gather metadata information associated with the data stored within the distributed file system, create a secondary namespace within a local file system of a local host using the gathered metadata information and store the gathered metadata information as files within the secondary namespace. Further, when a request to create a PPI of the distributed file system is received, the technology can create a PPI of the secondary namespace using a PPI creation feature of the local file system. |
| US09336218B2 |
Managing a binary object in a database system
A method for managing a binary object in a database system is provided. The method may include receiving a request to store the binary object and determining if a size of the binary object is above a first threshold. If the size is less than the first threshold, the method may include storing the binary object in a database of the database system using a database communication protocol. If the size is above the first threshold, the method may include determining if the size is above a second threshold. To this end, if the size is less than the second threshold, the method may include storing the binary object in a file system of the database system using the database communication protocol. Furthermore, if the size is above the second threshold, the method may include storing the binary object in the file system using a file system communication protocol. |
| US09336216B2 |
Command-based data migration
A data migration method includes retrieving data having a first data format that is associated with a first system, and generating at least one logical command that is configured to be interpreted by a migration utility. The logical command is translated to one or more equivalent physical commands that are executable by the second system, and is provided to the second system to recreate the data in accordance with a second data format that is associated with the second system. The command can be provided to the second system for execution thereby to define a system state in the second system that is equivalent to a system state of the first system with respect to the data having the first data format. |
| US09336213B2 |
Active file system
A computerized file system is accessible over the Internet or other type of network, in which certain “triggering events” pertaining to the operation of the file system automatically generate a notification message to users. Once a user has been authenticated, this user's access rights are determined. An Automatic Notification function checks to see if any “triggering” events have occurred when a user performs a particular task. The Automatic Notification function defines what type of event will become a triggering event, and also defines what will be the triggering action, once the triggering event occurs, and stores this information in a database. The Auto-notification function can comprise programs that are launched to perform certain tasks. The precise type of auto-notification message is fully configurable for each component in the file system. |
| US09336212B2 |
Systems and methods for collection and automatic analysis of opinions on various types of media
Systems and methods for collection and automatic analysis of opinions of media are provided. A representative method includes: receiving, from a user, media for review; automatically distributing the media to a pool of reviewers based on reviewer profiles; receiving, from the reviewers, information corresponding to opinions pertaining to the media; automatically generating a report based, at least in part, on the information received from the reviewers; and providing the report to the user. |
| US09336211B1 |
Associating an entity with a search query
Methods and apparatus for associating an entity with at least one search query. Some implementations are directed to methods and apparatus for identifying multiple queries associated with an entity and identifying one or more of the queries as an entity search query that provides desired search results for the entity. Some implementations are directed to methods and apparatus for identifying a particular entity and, in response to identifying the particular entity, identifying an entity search query corresponding to the particular entity. |
| US09336209B1 |
Collaborative use and management of modular applications
A method for providing applications for use within collaborative documents includes storing, on a cloud computing service, a collaborative document accessible by a plurality of collaborators and a plurality of modular applications for a document editing application used by the plurality of collaborators to view the collaborative document, where the plurality of modular applications are usable within the collaborative document. The cloud computing service receives a request from a first collaborator in the plurality of collaborators to activate the use of a first modular application in the plurality of modular applications within the collaborative document, and activates the use of the first modular application within the collaborative document, where the first modular application executes on the cloud computing service and each of the plurality of collaborators may use the first modular application within the collaborative document. |
| US09336208B2 |
Synchronization of configuration changes between applications and their platforms
A method, system, and computer program product for handling synchronization of configuration changes between applications and their platforms. A computer implemented method synchronizes middleware configurations with application configurations using a reciprocating protocol. The protocol includes receiving a middleware state variable from a middleware component, then processing the middleware state variable to determine any application configuration state variables that depend on a value of the middleware state variable. The application (or agent) further processes the application configuration state variable to determine any affected middleware state variables and then sends the affected middleware state variable to the middleware component. The determinations can be performed using a forward mapper or reverse mapper, and the determinations can reciprocate repeatedly between applications and their middleware platforms until quiescence. The techniques can be used during an online patch cycle to maintain synchronization of configuration changes between applications and their platforms even while components are being patched. |
| US09336206B1 |
Systems and methods for determining translation accuracy in multi-user multi-lingual communications
Various embodiments described herein facilitate multi-lingual communications. The systems and methods of some embodiments enable multi-lingual communications through different modes of communication including, for example, Internet-based chat, e-mail, text-based mobile phone communications, postings to online forums, postings to online social media services, and the like. Certain embodiments implement communication systems and methods that translate text between two or more languages. Users of the systems and methods may be incentivized to submit corrections for inaccurate or erroneous translations, and may receive a reward for these submissions. Systems and methods for accessing the accuracy of translations using word based and language based features are described. |
| US09336204B1 |
Techniques for modifying the complexity of literary content
Techniques are described for delivering electronic literary content in a way that adjusts the reading level of the content for the reader while maintaining the overall story context. The adjustment may be made in response to a request by a user or automatically without any user intervention. |
| US09336203B2 |
Semantics-oriented analysis of log message content
A log message is processed. The log message to be processed is received. One or more portions of the log message to be separately extracted are identified. A value is extracted from each identified portion. Extracting the value includes using an extraction rule. The extraction rule is associated with the identified portion. |
| US09336202B2 |
Method and system relating to salient content extraction for electronic content
Individuals receive overwhelming barrage of information which must be filtered, processed, analyzed, reviewed, consolidated and distributed or acted upon. Automatic approaches to “scraping” salient content from sources of content are provided allowing the salient content to be provided to the user or subjected to further processing such as clustering or sentiment analysis for example.Embodiments of the invention provide for: automated scraper induction based on document and/or contextual semantic cues and document structure analysis. identifying salient text, removing boiler-plate text, off-topic content and other non-salient content; deriving reusable descriptive extraction patterns for subsequent documents; applying descriptive extraction patterns for extraction from subsequent documents from the same source; intelligent identification of extraction success confidence score, using historical success scores; and employing confidence scores to automatically trigger new extraction pattern identification if extracted confidence is below an acceptable confidence threshold. |
| US09336199B2 |
Automatic sentence evaluation device using shallow parser to automatically evaluate sentence, and error detection apparatus and method of the same
An automatic sentence evaluating device using a shallow parser. A simple grammatical error and an error in sentence structure are detected by generating a string of parts of speech using n-gram for a composed input sentence and parsing the generated string of parts of speech on the basis of a rule (shallow parsing) defined according to a connective relationship between adjacent parts of speech, and a corrected draft is proposed for the detected errors to thereby increase accuracy of sentence evaluation, and an error detection apparatus and a method for the same. |
| US09336198B2 |
Apparatus, computer readable medium and method for effectively navigating polysemous symbols across a plurality of linked electronic screen overlays, including use with visual indicators
A method, apparatus and computer readable medium are disclosed. In at least one embodiment, the method includes providing polysemous symbols for selection on an initial electronic screen overlay displayed on a display; storing, in a memory, a plurality of the selectable polysemous symbols in association with a pointer identifying display of an electronic screen overlay which is different from the initial electronic screen overlay; and displaying a second electronic screen overlay on the display, in response to initial selection of one of the provided polysemous symbols. In at least one embodiment, the second electronic screen overlay is the electronic screen overlay associated with the selected polysemous symbol. |
| US09336197B2 |
Language recognition based on vocabulary lists
A method is implemented at a computer to determine that certain information content is composed or compiled in a specific language selected among two or more similar languages. The computer integrates a first vocabulary list of a first language and a second vocabulary list of a second language into a comprehensive vocabulary list. The integrating includes analyzing the first vocabulary list in view of the second vocabulary list to identify a first vocabulary sub-list that is used in the first language, but not in the second language. The computer then identifies, in the information content, a plurality of expressions that are included in the comprehensive vocabulary list, and a subset of expressions that are included in the first vocabulary sub-list. Upon a determination that a total frequency of occurrence of the subset of expressions meets predetermined occurrence criteria, the computer determines that the information content is composed in the first language. |
| US09336193B2 |
Method and apparatus for updating a previously generated text
Methods, apparatuses, and computer program products are described herein that are configured to enable updating of an output text. In some example embodiments, a method is provided that comprises generating a new message for each updateable data element based on a predetermined indication. The method of this embodiment may also include determining a classification for each new message by comparing each new message with a corresponding message that describes the updateable data element. The method of this embodiment may also include generating an additional document plan tree that contains at least a portion of the new messages. The method of this embodiment may also include combining the additional document plan tree with an original document plan tree. |
| US09336190B2 |
Writing pad with synchronized background audio and video and handwriting recognition
A stand alone low cost writing pad includes a rechargeable battery, a low capacity memory, a low power processor, a first pair of connectors and supports audio, video and digital ink capturing functionalities. The writing pad may be detached from and re-attached to a stand alone base unit using the first pair of connectors. The base unit includes another rechargeable battery, high capacity memory, high power processor, and a second pair of connectors. The base unit receives captured audio and digital ink from the writing pad via the communication pathway and the high power processor runs voice recognition and optical character recognition software on received data to generate second data. The second data is displayed on the writing pad and/or stored in the high capacity memory for future use. |
| US09336177B2 |
Genome sharing
Sharing data is disclosed. In some cases, sharing data includes receiving a request to share data from a first account to a second account, receiving an indication of a plurality of first account profiles associated with the first account to share with the second account, and establishing sharing from the plurality of first account profiles to the second account, wherein sharing comprises the second account having read access to a subset of nonpublic data associated with the plurality of first account profiles. |
| US09336172B2 |
Parallel computer system, data transfer device, and method for controlling parallel computer system for performing arbitration
A switch includes a plurality of ports and a combination determining unit that determines a central processing unit (CPU) to be paired with one of the ports. The port includes: an arbitration circuit that selects the CPU to be paired therewith when receiving an arbitration request from the CPU to be paired in a predetermined state, and selects one of the CPUs from which the arbitration request has been received in other cases to return transmission permission; and a data transfer unit that transfers the received data from the selected CPU to another CPU. The CPU includes: a request transmission unit that transmits the arbitration request to the ports; and a data transmission unit that transmits data to the paired port when the arbitration request is transmitted to the paired port in the predetermined state, and transmits data to the ports that have returned transmission permission in other cases. |
| US09336162B1 |
System and method for pre-fetching data based on a FIFO queue of packet messages reaching a first capacity threshold
A method is provided for pre-fetching packet data prior to processing. The method accepts a plurality of packets and writes each packet into a memory. A message is derived for each packet, where each message includes a packet descriptor with a pointer to an address of the packet in the memory. Each message is added to a tail of a first-in first-out (FIFO) queue. A pre-fetch module examines a first message, if the first message reaches a first capacity threshold of the FIFO queue. If the first message reaches the first capacity threshold, the pre-fetch module reads a first packet associated with the first message, from the memory, and the first packet is loaded into cache memory. A processor reads the first message from a head of the FIFO queue, and in response to reading the first message, reads the previously loaded first packet from cache memory. |
| US09336158B2 |
Method and system for simplified address translation support for static infiniband host channel adaptor structures
A method for optimized address pre-translation for a host channel adapter (HCA) static memory structure is disclosed. The method involves determining whether the HCA static memory structure spans a contiguous block of physical address space, when the HCA static memory structure spans the contiguous block of physical address space, requesting a translation from a guest physical address (GPA) to a machine physical address (MPA) of the HCA static memory structure, storing a received MPA corresponding to the HCA static memory structure in an address control and status register (CSR) associated with the HCA static memory structure, marking the received MPA stored in the address CSR as a pre-translated address, and using the pre-translated MPA stored in the address CSR when a request to access the static memory structure is received. |
| US09336157B1 |
System and method for improving cache performance
A method, computer program product, and computing system for receiving a Mode Select command concerning a single LUN from each of a plurality of potential hosts. Each Mode Select command defines control information and host identifier information concerning the potential host associated with the Mode Select command. The received Mode Select commands are processed serially and in accordance with the order in which the Mode Select commands were received. The first Mode Select command received is accepted and subsequent Mode Select commands received are rejected, thus defining an accepted Mode Select command and one or more rejected Mode Select commands. The control information and host identifier information included within the accepted Mode Select command are written to a buffer associated with the single LUN. The buffer includes a control field and a GUID field. |
| US09336152B1 |
Method and system for determining FIFO cache size
Described herein are methods, systems and machine-readable media for simulating a FIFO cache using a Bloom filter ring, which includes a plurality of Bloom filters arranged in a circular log. New elements are registered in the Bloom filter at the head of the circular log. When the Bloom filter at the head of the circular log is filled to its capacity, membership information associated with old elements in the Bloom filter at the tail of the circular log is evicted (simulating FIFO cache behavior), and the head and tail of the log are advanced. The Bloom filter ring is used to determine cache statistics (e.g., cache hit, cache miss) of a FIFO cache of various sizes. In response to simulation output specifying cache statistics for FIFO cache of various sizes, a FIFO cache is optimally sized. |
| US09336148B2 |
Cache memory, cache memory control unit, and method of controlling the cache memory
A cache memory includes: a tag storage section in which one of a plurality of indexes, each index containing a plurality of tag addresses and one suspension-indicating section, is looked up by a first address portion of an accessed address; a data storage section; a tag control section configured to, when the suspension-indicating section contained in the looked-up index indicates suspension, allow access relevant to the accessed address to wait, and when the suspension-indicating section contained in the looked-up index indicates non-suspension, compare a second address portion different from the first address portion of the accessed address to each of the plurality of tag addresses contained in the looked-up index, and detects a tag address matched with the second address portion; and a data control section. |
| US09336145B2 |
Techniques for cache injection in a processor system based on a shared state
A technique for performing cache injection includes monitoring, at a host fabric interface, snoop responses to an address on a bus. When the snoop responses indicate a data block associated with the address is in a shared state, input/output data associated with the address on the bus is directed to a cache that includes the data block in the shared state and is located physically closer to the host fabric interface than one or more other caches that include the data block associated with the address in the shared state. |
| US09336144B2 |
Three-dimensional processing system having multiple caches that can be partitioned, conjoined, and managed according to more than one set of rules and/or configurations
Three-dimensional processing systems are provided which have multiple layers of conjoined chips, wherein one or more chip layers include processor cores that share cache hierarchies over multiple chip layers. The caches can be partitioned, conjoined, and managed according to various sets of rules and configurations. |
| US09336137B2 |
System and method for performing data management in a collaborative development environment
An object that is not linked to a root object of a data model is identified. A first instruction comprising a fingerprint and a request to delete the object from memory is transmitted to a plurality of user devices. A second instruction to undo the first instruction is received from one of the plurality of user devices, and, in response to the second instruction, a third instruction comprising the fingerprint and a request to execute and delete any instruction that includes the fingerprint is transmitted to the plurality of user devices. |
| US09336135B1 |
Systems and methods for performing search and complex pattern matching in a solid state drive
A system and method of providing enhanced data processing and analysis in a storage device, such as a solid state drive (SSD). The SSD includes flash memory and an SSD controller capable of executing searches on the data in the flash memory without returning all of the data to be searched to a host CPU outside of the SSD. Other processing capabilities incorporated into the SSD may include encryption and decryption, compression and decompression, and in-line indexing of data. The SSD efficiently processes queries through the use of an internal data buffer and a data engine configured to search partial data. |
| US09336133B2 |
Method and system for managing program cycles including maintenance programming operations in a multi-layer memory
A system and method for managing program cycles in a multi-layer memory are disclosed. The method includes a controller receiving a request to program data from a host and, in advance of programming data associated with the request, determining a program cycle for programming the data associated with the request. The programming cycle may be a set of a host data write programming operation and any maintenance programming operations on an amount of data already programmed in the plurality of memory layers that is necessary to provide free memory capacity for a subsequent request to program data from the host. The controller programs the data associated with the host request, and the amount of data to be programmed in maintenance operations, in predetermined programming units according to the determined program cycle. |
| US09336132B1 |
Method and system for implementing a distributed operations log
Disclosed is an improved approach for implementing a storage system having an operation log where data writes are initially performed to a fast operation log, rather than to its permanent storage location. A distributed operation log can be employed to replicate the data to multiple locations in the storage system. |
| US09336127B2 |
Exposing method related data calls during testing in an event driven, multichannel architecture
Approaches for application testing are provided. An approach includes transmitting a command to an agent associated with an application installed on a mobile device. The approach includes receiving from the agent information about an executed step of the application on the mobile device. The approach includes comparing the information to an expected value of the step. The approach includes display an output based on the comparing. |
| US09336125B2 |
Systems and methods for hardware-assisted type checking
Devices and methods of providing hardware support for dynamic type checking are provided. In some embodiments, a processor includes a type check register and support for one or more checked load instructions. In some embodiments, normal load instructions are replaced by a compiler with the checked load instructions. In some embodiments, to perform a checked load, an error handler instruction location is stored in the type check register, and a type tag operand is compared to a type tag stored in the loaded memory location. If the comparison succeeds, execution may proceed normally. If the comparison fails, execution may be transferred to the error handler instruction. In some embodiments, type prediction is performed to determine whether a checked load instruction is likely to fail. |
| US09336118B2 |
Allocating test capacity from cloud systems
Allocating test capacity from cloud systems can include identifying a product to be tested. Allocating test capacity from cloud systems can include automatically allocating a test capacity during runtime in response to the identification, the test capacity being provided by a test controller coupled to a cloud system. |
| US09336114B2 |
Apparatus and method for detecting error
An apparatus and method for detecting an error occurring when an application program is executed in a computer environment is provided. The error detection apparatus may measure a deterministic progress index (DPI) and a program counter (PC) value when an instruction is executed, set, as a verification set, a DPI and a PC value measured when the instruction is executed without causing an error, set, as a measurement set, the DPI and the PC value measured when an instruction is executed, and detect a runtime error of the instruction by comparing the measurement set to the verification set. |
| US09336113B2 |
Method and device for selecting a networked media device
A method and device for selecting a media device that is enabled to receive and then play or distribute digital media files, where the media device is or has been connected to a network over which the digital media is delivered to the media device. Media devices that have been connected to the network are identified. Identification information for available media devices that are currently connected to the network and turned on, and identification information for unavailable media devices that are not currently turned on or are not currently connected to the network, is stored. A selection of either an available or an unavailable media device is received, and in response the digital media is distributed over the network to the selected media device. |
| US09336107B2 |
Dynamic design partitioning for diagnosis
Aspects of the invention relate to techniques for fault diagnosis based on dynamic circuit design partitioning. According to various implementations of the invention, a sub-circuit is extracted from a circuit design based on failure information of one or more integrated circuit devices. The extraction process may comprise combining fan-in cones of failing observation points included in the failure information. The extraction process may further comprise adding fan-in cones of one or more passing observation points to the combined fan-in cones of the failing observation points. Clock information of test patterns and/or layout information of the circuit design may be extracted and used in the sub-circuit extraction process. The extracted sub-circuit may then be used for diagnosing the one or more integrated circuit devices. |
| US09336106B2 |
Dynamically limiting bios post for effective power management
Presented herein are methods for budgeting power during a power-on self-test (POST) sequence. A determination is made for one or more stages of a power-on-self-test sequence of a system, whether a power profile of a particular stage is greater than a power budget for that stage. The power profile specifies a maximum power consumption as determined by the characteristics of the system and the power budget specifies a power consumption currently allocated to the system. When the power profile is greater than the power budget for that stage, power consumption of the system during the power-on-self-test sequence is limited such that the system does not consume more power than specified by the power budget. |
| US09336100B2 |
Efficient debugging of memory miscompare failures in post-silicon validation
Debugging techniques performed post-silicon, but with reference to pre-silicon phase data and/or reference model data. For example, one debugging technique is as follows: (i) receiving a first memory location that is subject to a miscompare between an associated simulation value for the first memory location and an associated actual value for the first memory location; (ii) backtracking through instructions of a test case to determine the identity of a set of backtrack locations upon which the first memory location is dependent, with the set of backtrack locations being made up of at least one of: memory locations and register locations; and (iii) comparing respective simulation values and actual values for at least one of the backtrack locations to help determine a cause of the miscompare at the first memory location. |
| US09336099B1 |
System and method for event-driven live migration of multi-process applications
A system, method, and computer readable medium for asynchronous live migration of applications between two or more servers. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Asynchronous live migration is provided through a combination of process replication, logging, barrier synchronization, checkpointing, reliable messaging and message playback. The live migration is transparent to the application and requires no modification to the application, operating system, networking stack or libraries. |
| US09336093B2 |
Information processing system and access control method
An information processing system includes a plurality of storage devices, a plurality of data access devices, and a first processor. The first processor selects, when a first data access device permitted to access data in a first storage device fails, a second data access device other than the first data access device. The first data access device is included in the plurality of data access devices. The first storage device is included in the plurality of storage devices. The second data access device is included in the plurality of data access devices. The first processor permits the second data access device to access data in the first storage device. The first processor updates correspondence information, which indicates the first data access device as a transfer destination of a request to access first data in the first storage device, to indicate the second data access device as the transfer destination. |
| US09336091B2 |
Reliability enhancement in a distributed storage system
Machines, systems and methods for enhancing data recovery in a data storage system, the method comprising determining whether one or more data storage mediums in a data storage system are unavailable; determining data that are at a risk of loss, due to said one or more data storage mediums being unavailable; from among the data that is determined to be at the risk of loss, identifying data that is highly vulnerable to loss; and creating one or more temporary replicas of the data that is highly vulnerable to loss. |
| US09336080B2 |
Transmission system and transmission method
A transmission system includes: an error correction encoding agent which converts an input data sequence into an encoded data sequence constituted of an error correction code and coded data; a data distribution agent which divides the encoded data sequence from the error correction encoding agent, in a predetermined processing unit and send them to a plurality of transmission routes; a data combining agent which combines signal sequences from the respective transmission routes and restores the encoded data sequence; an error correction decoding agent which applies error correction to and decodes the encoded data sequence from the data combining agent and outputs the input data sequence; and an agent for configuration in which a redundancy in the error correction encoding agent and a degree of splitting of the encoded data sequence in the data distribution agent are set. |
| US09336079B2 |
System and method for cycle slip correction
A system and method including a parity bit encoder for encoding bits of data to be transmitted with first and second parity check bits to produce successive block of bits. Each of the blocks of bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A de-mapper corrects for 90 degree and 180 degree cycle slip using parity indicated by the first and second parity bits. |
| US09336077B2 |
Method and apparatus for decoding LDPC code
There are provided a method and apparatus for decoding an LDPC code. In this specification, a first result is calculated by performing the calculation of a check node having two inputs forward and recursively, a second result is calculated by performing the calculation of the check node having the two inputs backward and recursively, and the check node is calculated using the first result and the second result as the inputs. |
| US09336076B2 |
System and method for controlling a redundancy parity encoding amount based on deduplication indications of activity
According to one embodiment, a method includes determining, using a processor, which physical blocks are priority physical blocks based on at least one of: a number of application blocks referencing the physical block, and a number of accesses to the physical block, creating a reference to each priority physical block, and outputting the reference. According to another embodiment, a method includes receiving a reference to one or more priority physical blocks in a storage pool, and adjusting an amount of redundancy parity encoding for each of the one or more priority physical blocks based on the reference. |
| US09336074B2 |
Apparatus and method for detecting a fault with a clock source
A method includes receiving a first clock signal from a first clock source at a clock monitoring unit. The method also includes counting a first number of pulses in the first clock signal during a specified time period. The method further includes identifying a fault with the first clock source when the first number does not have an acceptable value. In addition, the method includes testing the clock monitoring unit by determining whether the clock monitoring unit identifies an artificial clock fault. The time period could be defined by receiving a second clock signal, counting a second number of pulses in the second clock signal, and signaling when the second number meets or exceeds a threshold value. In response to the identified fault with the first clock source, a second clock source could be used to provide a second clock signal. |
| US09336072B2 |
Event group extensions, systems, and methods
An operating system uses non-bit aligned test masks to encode compound logical tests within the test mask. Generally, a bit within the test mask will indicate whether the test mask is a bit-aligned test mask or a non-bit-aligned test mask. If the system detects that the test mask in a non-bit-aligned test mask, the system will traverse the test mask to extract bit-aligned sub-masks and perform multi-level logical tests with the bit-aligned sub-masks. Such a system is particularly useful when performing a compound AND-OR logical test involving mutually exclusive event group flags. |
| US09336069B2 |
Attributing causality to program execution capacity modifications
Techniques are described for managing program execution capacity, such as for a group of computing nodes that are provided for executing one or more programs for a user. In some situations, dynamic program execution capacity modifications for a computing node group that is in use may be performed periodically or otherwise in a recurrent manner, such as to aggregate multiple modifications that are requested or otherwise determined to be made during a period of time. In addition, various operations may be performed to attribute causality information or other responsibility for particular program execution capacity modifications that are performed, including by attributing a single event as causing one capacity modification, and a combination of multiple events as possible causes for another capacity modification. The techniques may in some situations be used in conjunction with a fee-based program execution service that executes multiple programs on behalf of multiple users of the service. |
| US09336063B1 |
Distributed task management
Systems and methods are disclosed which facilitate management of a set of tasks between a plurality of task processing devices. Information corresponding to a number of tasks may be accessible to each of the task processing devices. In some instances, the information may be stored within a database. Each task processing device may claim a number of tasks, such that it is not claimable by other task processing devices, and may then process its claimed tasks. Each task processing device may be associated with a desired number of tasks, such that the desired number of tasks are claimed immediately or substantially immediately. Additional tasks may be claimed by a task processing device after a delay which may be based at least in part on the number of tasks currently claimed. |
| US09336060B2 |
Middleware services framework for on-premises and cloud deployment
A framework and middleware services for developing, deploying and managing composite applications is disclosed. The middleware services may be deployed on-premises or in the cloud. The framework includes a rich collection of middleware services, an application model to compose services into a composite application, a high-density multi-tenant scalable container to host the composition logic, and unified lifecycle management of the composite application and its constituent services. |
| US09336056B2 |
Extendible input/output data mechanism for accelerators
Embodiments include methods, systems and computer program products for providing an extendable job structure for executing instructions on an accelerator. The method includes creating a number of data descriptor blocks, each having a fixed number of memory location addresses and a pointer to a next of the number of the data descriptor block. The method further includes creating a last data descriptor block having the fixed number of memory location addresses and a last block indicator. Based on determining that additional memory is required for executing instructions on the accelerator, the method includes modifying the last data descriptor block to become a data extender block having a pointer to one of one or more new data descriptor blocks and creating a new last data descriptor block. |
| US09336053B2 |
Constructing a logical tree topology in a parallel computer
Constructing a logical tree topology in a parallel computer that includes compute nodes, where each node executes a number of tasks and at least one node executes a number of tasks different from another node includes: identifying a compute node executing a greatest number of tasks; selecting, as a global root, a task from the identified compute node, including assigning the task as a local root of the identified compute node and assigning each of the other tasks of the identified compute node as a child of the local root; selecting, from each of the other compute nodes, one task to be a local root, including assigning each task other than the local root as a child of the local root; and assigning each local root of the other compute nodes to be a child of one of the tasks of the identified compute node other than the global root. |
| US09336040B2 |
Techniques for remapping sessions for a multi-threaded application
Examples may include a remapping of sessions for a multi-threaded application that may be executed at a server or a client coupled to the server via a plurality of transmit control protocol (TCP) connections. Sessions may be remapped such that the multi-threaded application may expect to route sessions through a same TCP connection but the sessions are actually outputted via separate TCP connections. |
| US09336034B2 |
Display of host operating system user interface elements within a guest operating system of a virtual machine
Example embodiments relate to the display of user interface elements of a host operating system within a virtual machine guest operating system. In example embodiments, the host OS transmits information relating to a user interface element displayed within the host OS to the guest OS. The guest OS may then output a corresponding user interface element, receive input from a user interacting with the corresponding element within the guest OS, and return information describing the user input from the guest OS to the host OS. |
| US09336030B1 |
Placement and tuning of virtual machines
Approaches are disclosed for enabling owners of virtual computing resources to specify one or more constraints for their virtual machines and/or virtual networks, with respect to metrics such as cost, latency, throughput, network bandwidth, power usage, server availability, data redundancy, correlated failure susceptibility, and other such metrics. A customer can declare a set of constraints with metrics goals for their virtual machine instance or network of instances, and the service provider can optimize the placement (e.g., host selection) and various settings (e.g., hardware and software settings) to satisfy the specified constraints. The satisfaction of customer-specified constraints may need to take into account what other virtual machine instances are performing in the shared resource environment. |
| US09336027B2 |
System and method for modular business applications
A method of providing tailored add-on applications to an underlying foundational software suite that frequently receives updated versions that would otherwise overwrite changes in the foundational software that are required by the tailored add-on. Instead of functional changes to the foundation, the tailored add-on makes a fairly uniform and simple change in the place of each needed change, by inserting a call to an add-in definition object. The add-in definition object then contains code for performing the functionality needed by the add-on application. The add-in definition object is down-ported to all supported versions of the foundational software. The calls of the add-in definition object are integrated into the foundational software in a way which minimizes conflicts, allows for concurrent implementation while maintaining a clear separation between foundational code and modified code, and minimizes ongoing maintenance development of the add-on application's conflicts with the foundational application. |
| US09336025B2 |
Systems and methods of analyzing a software component
A particular method includes receiving, at a device, a request to analyze a software component. The request indicates a target operating system. The method also includes generating a virtual machine at a computing device. The virtual machine implements the target operating system. The method further includes executing the software component in the target operating system on the virtual machine and generating data indicating effects of executing the software component on the virtual machine. |
| US09336014B2 |
Method, apparatus, and system for human-machine interaction
The present disclosure provides a method for configuring a basic application function of an intelligent terminal. The method includes: replacing, in a system program, an original initialization subprogram of an application class in the system program with a new initialization subprogram; configuring an invocation pointer to the original initialization subprogram in the new initialization subprogram, the invocation pointer being used for invoking and executing the original initialization subprogram when the new initialization subprogram is executed; registering a global notification in the new initialization subprogram, the global notification being used for monitoring a trigger condition that is generated by a third-party application program with respect to the application class; and configuring an invocation pointer to the application class in a callback handler function of the global notification, the invocation pointer being used for invoking and executing the application class by using the callback handler function when the trigger condition is detected. |
| US09336013B2 |
Systems and methods for metadata-driven command processor and structured program transfer protocol
Systems and methods for facilitating on-demand delivery and processing of one or more programs and program-compatible applications on a plurality of different machines. In an embodiment, a metadata-driven command processor on a machine sends a request for a booting program and application to an agent. In response to the request, the agent invokes a resource to generate a booting program dataset that defines the booting program and an application dataset that defines the application, generates a response dataset comprising two or more nested datasets, wherein the two or more nested datasets comprise at least the booting program dataset and the application dataset, and sends the response dataset to the metadata-driven command processor. The metadata-driven command processor copies the booting program dataset and the application dataset into a process dataset comprising two or more nested datasets, and processes the first process dataset to execute the booting program and application on the machine. |
| US09336011B2 |
Server and booting method
A server including a basic input output system (BIOS) chip, a control unit and multiple central processing units (CPUs), and a booting method are provided. The BIOS chip outputs a booting signal. One of the CPUs receives the booting signal to execute a booting program, and outputs a successful signal after being booted. The control unit is coupled between the BIOS chip and the CPUs, and receives the successful signal to control a connection between the BIOS chip and the one of the CPUs. When the control unit receives the successful signal, the control unit replaces a connection between the BIOS chip and current one of the CPUs with a new connection between the BIOS chip and next one of the CPUs according to the successful signal, and the next CPU then receives the booting signal. |
| US09336005B2 |
Cooperative preemption
Preempting the execution of a thread is disclosed. Preempting includes receiving an indication that a preemption of the thread is desired and context switching the thread out at a thread safe point in the event that a thread safe point is reached. |
| US09336004B2 |
Checkpointing registers for transactional memory
The present invention provides a method and apparatus for checkpointing registers for transactional memory. Some embodiments of the apparatus include first rename logic configured to map up to a predetermined number of architectural registers to corresponding first physical registers that hold first values associated with the architectural registers. The mapping is responsive to a transaction modifying one or more of the first values associated with the architectural registers. Some embodiments of the apparatus also include microcode configured to write contents of the first physical registers to a memory in response to the transaction modifying first values associated with a number of the architectural registers that is larger than the predetermined number. |
| US09336001B2 |
Dynamic instrumentation
Techniques for dynamic instrumentation are provided. A method for instrumentation preparation may include obtaining address data of an original instruction in an original instruction stream, obtaining kernel mode data comprising a kernel breakpoint handler, obtaining user mode data comprising a user breakpoint handler, allocating a page of a process address space, creating a trampoline, associating the trampoline with a breakpoint instruction, and replacing the original instruction with the breakpoint instruction. A method for instrumentation may include detecting the breakpoint instruction, calling the kernel breakpoint handler, modifying an instruction pointer via the kernel breakpoint handler such that the instruction pointer points to the trampoline, and executing the trampoline. The system for instrumentation may include a breakpoint setup module and a breakpoint execution module for respectively setting up and completing instrumentation involving the trampoline. |
| US09336000B2 |
Instruction execution unit that broadcasts data values at different levels of granularity
An apparatus is described that includes an execution unit to execute a first instruction and a second instruction. The execution unit includes input register space to store a first data structure to be replicated when executing the first instruction and to store a second data structure to be replicated when executing the second instruction. The first and second data structures are both packed data structures. Data values of the first packed data structure are twice as large as data values of the second packed data structure. The first data structure is four times as large as the second data structure. The execution unit also includes replication logic circuitry to replicate the first data structure when executing the first instruction to create a first replication data structure, and, to replicate the second data structure when executing the second instruction to create a second replication data structure. |
| US09335999B2 |
Allocating store queue entries to store instructions for early store-to-load forwarding
The present invention provides a method and apparatus for allocating store queue entries to store instructions for early store-to-load forwarding. Some embodiments of the method include allocating an entry in a store queue to a store instruction in response to the store instruction being dispatched and prior to receiving a translation of a virtual address to a physical address associated with the store instruction. The entry includes storage for data to be written to the physical address by the store instruction. |
| US09335997B2 |
Processing vectors using a wrapping rotate previous instruction in the macroscalar architecture
Embodiments of a system and a method in which a processor may execute instructions that cause the processor to receive an operand vector, a selection vector, and a control vector are disclosed. The executed instructions may also cause the processor to perform a wrapping rotate previous operation dependent upon the input vectors. |
| US09335987B2 |
Data object with common statement series
Various embodiments are directed to a computer implemented method for determining a largest common series of statements from one or more sets of ordered statements. A most common statement in the one or more sets of ordered statements is determined. A first order most common sequential statement following each most common statement is determined. The most common statement and the first order most common sequential statement are stored in a data object as the largest common series. |
| US09335978B2 |
Computer aided visualization of a business object model lifecycle
A method, system and apparatus for visualization of versions of a BOM (business object model) is provided. In accordance with an embodiment of the invention, data from at least two different BOMs can be extracted to create a flat table, where the flat table includes all versions of each of the different BOMs. A hierarchy of nodes can then be generated from the flat table. Additionally, a root node and a hierarchy of descendants based upon the hierarchy of nodes using a tree map can be displayed in a graphical user interface of a computer. |
| US09335977B2 |
Optimization of a data flow program based on access pattern information
System and method for optimizing a data flow diagram based on access pattern information are described. Access pattern information for a data flow diagram may be received. The data flow diagram may include a plurality of interconnected actors, e.g., functional blocks, visually indicating functionality of the data flow diagram. The access pattern information may include one or more of: input pattern information specifying cycles on which tokens are consumed by at least one of the actors, or output pattern information specifying cycles on which tokens are produced by at least one of the actors. A program that implements the functionality of the data flow diagram may be generated based at least in part on the access pattern information. |
| US09335976B1 |
Tracking property representations in modified computational objects
A system and method is disclosed for tracking representations of object properties in modified computational objects. A computational object of the subject technology may include an object property having a first value of a first property type. When the object property is set to a second value of a second property type, a new object map is generated for the computational object, the new object map mapping the object property to the second property type, and transition information in a base object map is updated to designate the new object map instead of a first object map. The first object map is then marked as invalid. |
| US09335975B2 |
Techniques for providing environmental impact information associated with code
A technique for providing environmental impact information associated with code includes determining, based on execution of the code on a computer system, an environmental impact of a code execution sequence included in the code. A section of the code that is associated with the code execution sequence is then annotated with environmental impact information associated with the environmental impact of the code execution sequence. |
| US09335971B1 |
High entropy random bit source
Systems and methods of generating a highly random bit are provided. Two nearly uncoupled clocks are utilized to generate a near-random bit. Even/Odd sampling at a variable rate is provided to condition many near-random bits to yield a single bit with a value of one or zero 50% of the time. |
| US09335968B2 |
Expanded scope incrementer
An incrementor circuit and method for incrementing is provided that computes an output data word by increasing an input data word magnitude by one of several integer values. The incrementor circuit includes a mode increment signal circuit providing a designation of one of the integer values for increasing the input data word magnitude. A single constant incrementor is connected to the mode increment signal circuit and the input data word and provides an intermediate sum by selectively adding a constant to the input data word. A multiplex circuit logically combines selected input data word bit position values with the mode increment signal circuit designation forming logical bit position values and directs selected input data word bit position values, selected logical bit position values, and selected bit position values of the intermediate sum to form the output data word. |
| US09335967B1 |
Accurate floating-point calculation method and device
A method is provided to narrow down the exponent range throughout most part of the division and square root calculations, to make both software assistance and precision extension unnecessary. The method adjusts the exponent at the end of the calculation to reach IEEE-754 results. |
| US09335965B2 |
System and method for excerpt creation by designating a text segment using speech
An apparatus includes at least one input device configured to receive a speech input, a display configured to present predetermined content acquired by the apparatus from which excerpts may be extracted, and a processor configured to execute computer readable program code. The computer readable program code is configured to collect a speech recognition vocabulary set that corresponds to content visible on the display such that at least one vocabulary word in the speech recognition vocabulary set is the same as a word presented on the display, designate a segment of the content to be excerpted based on the speech input, and create a link to a source of the excerpted content and display the link with the excerpted content. |
| US09335962B2 |
Print management device, print management system, print management method and computer readable medium
A print management device includes: a receiving unit that receives a print instruction to perform print of an electronic document on recording media; a canceling unit that cancels the print caused to be performed by the print instruction received by the receiving unit, in accordance with a canceling instruction of the print by an operator; and a recording unit that records the number of the recording media or the number of faces of the recording media, if the print caused to be performed by the print instruction received by the receiving unit is canceled by the canceling unit, the print on the recording media being canceled. |
| US09335960B2 |
Image forming system that ensures preview display by use of portable terminal of user and information processing terminal
An image forming system includes a portable terminal, an information processing terminal, and an image forming apparatus. The portable terminal has an imaging function. The information processing terminal generates print data. The image forming apparatus generates a printed matter based on the print data received from the information processing terminal. The portable terminal includes an imaging unit, an information acquiring unit, a preview image generating unit, and a display unit. The imaging unit images the preview-display code displayed in the display unit of the information processing terminal. The information acquiring unit acquires information necessary for the preview display based on the preview-display code acquired by the imaging unit. The preview image generating unit generates a preview image of the printed matter according to the information acquired by the information acquiring unit. The display unit displays the preview image generated by the preview image generating unit. |
| US09335958B2 |
Methods, apparatuses, and computer program products for implementing cloud connected printers and an adaptive printer-based application framework
Methods, apparatuses, and computer program products are provided to facilitate connections between devices, such as a printer and a cloud-based server, and to implement an adaptive application framework. In the context of an apparatus, a printer is provided comprising communications circuitry configured to facilitate communications with a network; and processing circuitry configured to transmit a connection request to the network; receive requested connection parameters from the network; transmit printer connection parameters to the network; and establish a first secure connection between the printer and the network. The printer comprising processing circuitry further configured to receive requested connection parameters comprising at least a signed security certificate and a DNS name for a server on the network and to verify the signed security certificate and the DNS name for the server. The printer comprising processing circuitry further configured to transmit printer connection parameters comprising at least a signed security certificate for the printer. The printer comprising processing circuitry further configured to receive a request from the network to establish one or more communication channels over the first secure connection. |
| US09335957B2 |
Communication apparatus and method for controlling the same, and storage medium
A technology is provided for, when an error occurs in a communication apparatus (image forming apparatus), notifying a user of information relating to the error using NFC without a decrease in the user's convenience. A communication apparatus according to an aspect of the present invention includes an NFC device (NFC controller) which can operate in either a reader/writer mode or a card emulation mode. The communication apparatus, when an error occurs, obtains information relating to the error, and sets, into the NFC device, the obtained error information as information which an external mobile terminal can read from the communication apparatus via NFC in the card emulation mode. The communication apparatus also sets the operation mode of the NFC device to the card emulation mode. |
| US09335956B2 |
Print control apparatus and method for printing in which a folding position is displayed
In a print control apparatus, a specifying unit specifies a size in a first direction and/or a size in a second direction perpendicular to the first direction thereby specifying a folding size into which to fold a sheet with a printed image. A determination unit determines an output size in which the image is to be printed, based on a size equal to an integral number times the specified size in the first direction and/or a size equal to an integral number times the specified size in the second direction. |