Document Document Title
US09306328B2 Power connector
A power and data connector includes an extension that protrudes from a lip surface. The extension is configured to mate with an electronic device. A connection surface at a terminal end of the extension separately surrounds openings, through which power interfaces extend.
US09306323B2 Cable connector device
A cable connector device for an electronic device is provided. The electronic device includes a connector port disposed in the electronic device, one or more magnet coupling parts, each of the one or more magnet coupling parts which is disposed around the connector port, a cable connector device removably coupled to the connector port, and one or more magnet coupling bodies, each of the one or more magnet coupling bodies which is installed in the cable connector device and has the same polarity as that of each of the one or more magnet coupling parts, wherein each of the one or more magnet coupling parts and each of one or more magnet coupling bodies are disposed in positions where they are pushed by repulsive force when the cable connector device is mounted in a reverse direction.
US09306319B2 Connector
A connector includes a housing (10) into which terminal fittings (110) are accommodated and a housing-side lock (26). A wire cover (70) is mounted on the housing (10) to cover wires (200) pulled out from the housing (10). The wire cover (70) includes a cover-side lock (73) at a position to be lockable to the housing-side lock (26) in a mounted state and is held on the housing (10) by being locked to the cover-side lock (73) after the housing-side lock (26) is resiliently deformed. A restricting member (90) is inserted into a deflection space for the housing-side lock (26) to restrict the deflection of the housing-side lock (26) when the cover-side lock (73) and the housing-side lock (26) are in a locked state.
US09306318B2 Ceramic bushing with filter
One aspect relates to an electrical bushing for use in a housing of an implantable medical device. The electrical bushing includes at least one electrically insulating base body and at least one electrical conducting element. The conducting element is set up to establish, through the base body, at least one electrically conductive connection between an internal space of the housing and an external space. The conducting element is hermetically sealed with respect to the base body. The at least one conducting element includes at least one cermet.The electrical bushing includes an electrical filter structure. The at least one conducting element forms at least one electrically conducting surface of the filter structure.
US09306317B2 Airtight coaxial connector
There is provided a coaxial connector that can ensure high airtightness without using a costly hermetic sealing component. An airtight coaxial connector includes: a resin filling space portion formed more to a coaxial cable connection side than to an insulator in an outer shell; a resin inlet that is open more to a target connector connection side than to the insulator in the outer shell and communicates with the resin filling space portion; and an airtightness resin that is filled in the resin filling space portion through the resin inlet and seals between a central conductor and the outer shell and between a dielectric of a coaxial cable and the outer shell.
US09306313B2 Adapter arrangement
A first adapter arrangement includes a housing having a sealing end supporting the housing in a vertical wall opening of a casing containing an electronics device, and a connecting end extending externally of the casing for connection with the housing of a companion adapter arrangement. A pair of resilient generally-annular longitudinally-spaced seal members are mounted concentrically about the adapter housing sealing portion for sealing the space between the adapter housing outer surface and the adjacent surface of the casing wall opening. An electrical connector mounted in a through passage contained in the adapter housing includes a conductor contact end connected with the conductors of the electrical device, and a connector contact end adapted for connection with the corresponding contacts of a companion second adapter arrangement. A fastening device serves to connect together the adjacent ends of the adapter housings of the first and second arrangements.
US09306312B2 High density sealed electrical connector with multiple shielding strain relief devices
An electrical connector system includes mating pin and socket connectors each designed for increased contact density to improve performance of high-speed data transfer. The connectors include features for retaining a plurality of pin or socket contacts in a ganged, co-aligned configuration and for shielding groups of contacts from one another to reduce interference and crosstalk. The connectors further include features for providing strain relief to the internal wires and/or cables. One of the connectors may include a plug insert with cantilevered fingers extending therefrom that contact a conductive surface of the mating connector to provide a mechanical connection and a low-impedance pathway between the mating connectors for grounding and shielding. The connectors are designed to be readily assembled and disassembled for repair or rework without the use of special tools.
US09306311B2 Connector
A connector includes a housing (10), terminal fittings (30) to be inserted into the housing (10), a retainer (20) configured to retain the terminal fittings (30) by being mounted into the housing (10) in a direction intersecting an inserting direction of the terminal fittings (30), resilient locks (25) formed on a base end of the retainer (20) in a mounting direction into the housing (10) and configured to hold the retainer (20) in a state mounted in the housing (10) by being locked to the housing (10). Slide-contact portions (28) formed on a tip side of the retainer (20) in the mounting direction into the housing (10) and extending parallel to the mounting direction of the retainer (20), and guides (16) formed in the housing, extending parallel to the mounting direction of the retainer (20) and to be brought into sliding contact with the slide-contact portions (28).
US09306310B2 Connector
A connector is provided which includes a housing in which a terminal is accommodated, and a retainer which is mounted on the housing to prevent movement of the terminal in the direction of detachment. A retainer insertion hole is provided on the housing to insert the retainer, and a provisional locking projection and a final locking projection are provided which extend into the retainer insertion hole. A guide portion is provided in the retainer which is flexibly deformed by interference from the provisional locking projection and the final locking projection, and a locked portion is formed, which is a locking hole opened in the guide portion. The locked portion and the provisional locking projection are temporarily locked during the insertion process, and the locked portion and the final locking projection are locked at the end of the insertion process.
US09306309B2 OBD connector protective cover
An OBD connector protective cover includes a clip provided with a pair of openable/closable lugs, a body cover that covers the entire clip including the pair of lugs, a key cylinder provided on a front of the body cover as opening/closing operation means for the pair of lugs and a socket provided on a rear face of the body cover as an opening for inserting a connection terminal section 101 of an OBD connector 100 into the body cover. The pair of lugs are closed through a key operation with the key cylinder, the connection terminal section 101 of the OBD connector 100 and the body cover are integrated together by the lugs holding the connection terminal section 101 of the OBD connector 100, and the body cover constitutes an obstacle to thereby disable access to the connection terminal section 101 from outside.
US09306307B2 Contact element and method for producing a contact element
An electrical contact element, in particular for a medical implant, including a spring sleeve with a bushing for receiving an electrical mating contact in a direction of insertion, at least one groove that is arranged transversely around the bushing at least in areas and that is open to the bushing at least in areas; at least one spring element, arranged in the groove, for electrically contacting the electrical mating contact. Here, at least one feed-through channel is provided to feed the spring element into the peripheral groove and leads from an outer face of the spring sleeve to the at least one groove. The invention further relates to a method for producing a contact element and also to a device for carrying out the method.
US09306298B2 Terminal block
A terminal block including at least one housing for a connection terminal, the housing extending at least partly within a volume delimited by: a first plane transverse to two side planes delimiting the insulating body, substantially parallel to a general direction joining a first end and a second end of a fastening member, and passing through a connecting area of the fastening member, and a second plane transverse to the two side planes delimiting the insulating body, substantially parallel to the first plane and passing through a connecting area of the rear face, at least a third plane transverse to the two side planes delimiting the insulating body, substantially transverse to the first plane and to the second plane, and passing through the furthest elastic branch of the fastening means intended to interact with an edge of the support rail, and at least a fourth plane transverse to the two side planes delimiting the insulating body, substantially transverse to the first plane and to the second plane, and passing through a retaining member intended to lock a tool.
US09306294B2 Smart antenna
A smart antenna apparatus includes a casing, which supports an omnidirectional antenna array; a plurality of transceivers electrically connected with the antenna array; and a format converter and booster device electrically connected between the plurality of transceivers and a network port, said format converter and booster device comprising a multiplexer/de-multiplexer circuit for encoding plural USB signals from the plurality of transceivers to the network port and for decoding plural USB signals from the network port to the plurality of transceivers.
US09306291B2 Mobile device and antenna array therein
A mobile device at least includes a dielectric substrate, an antenna array, and a transceiver. The antenna array at least includes a first antenna and a second antenna. The first and second antennas are both embedded in the dielectric substrate. The first and second antennas have different polarizations. The transceiver is coupled to the antenna array so as to transmit or receive a signal. The polarization of the antenna array may be dynamically adjusted by controlling a phase difference between the first antenna and the second antenna.
US09306289B1 Tapered slot antenna with reduced edge thickness
An apparatus includes first and second antenna elements each having a tapered width end, with the tapered width ends being separated by a gap. A portion of the edge of the tapered width end of the each antenna element has a thickness less than a thickness of the remainder of the respective antenna element. Such portion may be the portion of the edge of the antenna elements closest to a feed point of the antenna elements, and may be angled to a point or a flat edge. The thickness of the tapered width ends increases along the width and/or the height of the respective antenna element as the antenna element extends from the feed point.
US09306285B2 Antenna having three operating frequency bands and method for manufacturing the same
An antenna including a radiation portion is provided. The radiation portion includes a feed terminal and three conductor branch paths directly extending from the feed terminal. The three conductor branch paths are located on the same side of the feed terminal, and each has an initial direction, and any two of the three initial directions have an acute angle therebetween. A method for manufacturing an antenna having three operating frequency bands is also provided.
US09306282B2 Antenna arrangement
An apparatus for antenna arrangement isolation is described. The apparatus includes a first antenna element (for example, a CMMB TV antenna) having a first radiator component and a second antenna element (for example, a cellular antenna) having a second radiator component. A first portion of the first radiator component is adjacent to a second portion of the second radiator component. The second radiator component is configured with at least one operational frequency range. The first portion of the first radiator corresponds to at least one minimum electric field region of at least one resonant frequency of the first radiator. The at least one resonant frequency of the first radiator overlaps with the at least one operational frequency range. Methods, Apparatus and Computer readable media for providing the antenna arrangement are also described.
US09306273B2 Multifilar antenna
Disclosed herein are example embodiments of a dielectrically loaded multifilar antenna for circularly polarised radiation the antenna having a plurality of operating frequencies in excess of 200 MHz. In one embodiment, the antenna comprises: an electrically insulative core having proximal and distal surface portions and, between the proximal and distal surface portions, a laterally directed side surface portion; a pair of feed nodes; at least four elongate generally helical conductive radiating elements located on the core; and, arranged between and coupling together the feed nodes and the radiating elements, a phasing ring formed by a closed loop, wherein the phasing ring is resonant at least two of the operating frequencies, the elongate antenna elements being coupled to the phasing ring at respective spaced apart coupling locations and extending from the phasing ring in a direction away from the feed nodes.
US09306267B2 Antenna assembly integral with metal housing and electronic device using the antenna assembly
The metal housing of a miniaturized electronic device is shaped to function as a multiband antenna assembly. The antenna assembly includes a feeding terminal, a radiator connecting to the feeding terminal, and a metal element. The metal element is part of a housing of the electronic device. The metal element includes two antenna units, both of which are adjacent to and spaced from the radiator. An electronic device using the antenna assembly is also described.
US09306261B2 Magnetic field system and method for mitigating passive intermodulation distortion
A magnetic field method for mitigating passive intermodulation distortion. The method is useful both for mitigating passive intermodulation and for easily locating dominant sources of it, even in shielded components.
US09306258B2 Mixed-mode cavity filter
A mixed-mode cavity filter is disclosed. The disclosed cavity filter includes: at least one first cavity configured to hold a metal coaxial resonator; and at least one second cavity configured to hold a dielectric resonator, where a first coupling window is formed in a wall formed between the first cavity and the second cavity, the first coupling window includes a horizontal window formed parallel to a bottom portion and a vertical window formed perpendicularly to the bottom portion, and the horizontal window and the vertical window overlap each other in at least a partial area. A mixed-mode filter according to an embodiment of the invention can achieve a small size and a light weight while providing low losses.
US09306255B1 Microstructure including microstructural waveguide elements and/or IC chips that are mechanically interconnected to each other
Structures and methods for interconnects and associated alignment and assembly mechanisms for and between chips, components, and 3D systems.
US09306246B2 Battery pack damage monitor
A system is provided for detecting when a vehicle mounted battery pack is damaged from an impact with a piece of road debris or other obstacle. The system utilizes a plurality of cooling conduits located between the lower surface of the batteries within the battery pack and the lower battery pack enclosure panel. The cooling conduits are configured to deform and absorb impact energy when an object strikes the lower battery pack enclosure panel. When the cooling conduits deform, a change in coolant flow/pressure occurs that is detectable by one or more sensors integrated into the conduit's coolant channels. A system controller, coupled to a sensor monitoring subsystem, may be configured to provide any of a variety of responses when cooling conduit deformation is detected.
US09306244B2 Bidirectional interface circuit and battery management system including the same
A bidirectional interface circuit includes a first current mirror circuit that copies a first reference current to generate a first current sunk from a first output terminal, a second current mirror circuit that copies a second reference current to generate a second current sunk from a second output terminal, an interception switch that is connected between the first output terminal and the second output terminal, a first comparator that outputs an upper state signal based on a comparison result of a voltage of the first output terminal and a first threshold voltage, a third current mirror circuit that copies one of a third reference current and a fourth reference current to supply a third current flowing to a third output terminal, and a second comparator that outputs a lower state signal based on a comparison result of a voltage of the second output terminal and a second threshold voltage.
US09306243B2 Optimizing battery usage
Techniques for optimizing battery usage are provided. The techniques include sensing energy level of a battery, comparing the sensed energy level of the battery to a predetermined energy threshold for the battery, and controlling energy flow to and from the battery based on the comparison of the sensed energy level and the energy threshold.
US09306240B2 Solid polymeric electrolytes and lithium battery including the same
A solid polymeric electrolyte having a pattern, and a lithium battery including the same, includes a polymer matrix having a mesh structure and being formed of a cured photo-crosslinking agent; inorganic particles substantially uniformly distributed in the polymer matrix; and a liquid electrolyte comprised of a lithium salt and an organic solvent impregnated between the polymer matrix and the inorganic particles. The liquid electrolyte and the cured photo-crosslinking agent are present in a weight ratio ranging from 50:50 to 99:1. The liquid electrolyte containing the cured photo-crosslinking agent and the inorganic particle are present in a weight ratio ranging from 10:90 to 90:10. The solid polymeric electrolyte has properties suitable for a printing process to provide the pattern including a thickness ranging from about 10 nm to about 500 μm and, prior to curing the photo-crosslinking agent, a viscosity ranging from 100-10,000 poise under a shear rate condition of 1 sec−1.
US09306239B2 Starch-based battery system
The present invention is directed to a starch-based battery system. The starch-based battery system uses a rheological and replaceable starch gluten electrolyte that generates colloidal starch gel adhesive contacted with and/or attached on electrodes to generate current for powering electronic devices. The starch-based battery system that includes control circuit and standard cap module replaces a conventional dry cell battery or is integrated with electronic devices to power, for example, flash-light, lighting ornaments or magnetic actuated motion products and toys. In other embodiments of the invention, the starch-based battery system is integrated into a device for attracting aquatic life forms in an aquatic environment, wherein the starch-based battery powers a light source and/or sound source and also the starch gluten electrolyte acts as bait for attracting aquatic life forms within the aquatic environment.
US09306238B2 Nonaqueous electrolyte secondary battery and method for producing nonaqueous electrolyte secondary battery
A nonaqueous electrolyte secondary battery includes a positive electrode, a negative electrode and a nonaqueous electrolyte. The positive electrode includes LixMnaNibCocMdO2(0
US09306234B2 Polymer, a method of preparing the same, composite prepared from the polymer, and electrode and composite membrane each including the polymer or the composite
A polymer comprising a first repeating unit represented by Formula 1: wherein R1 to R13 and Ar1 in Formula 1 are defined in the specification.
US09306232B2 In situ fuel cell contamination sampling device
A filtration device for a fuel cell system is provided. The filtration device includes a filter adapted to receive a reactant for a fuel cell. The filter includes a molecular sieve material adapted to separate a contaminant from the reactant supplied to the fuel cell. A membrane electrode assembly having the filter integrally formed therewith, and a fuel cell stack having the filter disposed adjacent at least one of the end plates of the fuel cell stack, are also provided.
US09306222B2 Method of assembling a battery
A method of joining a substrate for a bipolar electrode of a bipolar battery to a frame for supporting the bipolar electrode for use in the bipolar battery includes the implanting of a thermoplastic material in the substrate. The substrate and the frame are then vibration welded together at a frequency in the range of 50 Hz to 1 kHz to melt the thermoplastic material. The melted thermoplastic material forms a continuous or substantially continuous loop around the substrate to join the substrate and the frame together. A bipolar battery comprising a substrate and a frame joined together by the method, and a substrate for a bipolar electrode for use in the method are also described.
US09306220B2 Lithium ion secondary battery electrode, manufacturing process for the same, and lithium ion secondary battery using the electrode
To provide a lithium ion secondary battery electrode in which a coated layer is held on a surface of an active material layer over a long period of time to suppress decomposition of the electrolysis solution and to enhance the cyclability, a manufacturing process for the same, and a lithium ion secondary battery using the electrode.A lithium ion secondary battery electrode includes a current collector, an active material layer containing a binder formed on a surface of the current collector, and a coated layer formed on the surface of at least a part of the active material layer, wherein the coated layer contains a silicone-acrylic graft copolymer cured substance including an acrylic type main chain having a functional group and a side chain having a silicone graft-polymerized to the acrylic type main chain, and the coated layer is chemically bonded with the binder.
US09306217B2 Mesoporous carbon structures, preparation method thereof and lithium secondary battery including the same
Provided are mesoporous carbon structures and a method for preparing the same. The mesoporous carbon structures have a high surface area, a large pore volume and a large pore size in addition to a small mesopore length. Therefore, when using the mesoporous carbon structures as an anode active material for a lithium secondary battery, it is possible to provide a lithium secondary battery with excellent lithium ion storability and charge/discharge efficiency.
US09306215B2 Nickel-metal hydride secondary cell and negative electrode therefor
A nickel-metal hydride secondary cell holds therein an electrode group and an alkaline electrolyte solution containing NaOH as a main constituent of its solute. The electrode group has positive and negative electrodes lapped one over the other with a separator therebetween. The negative electrode contains a hydrogen absorbing alloy having a composition represented by the general formula: (RE1-xTx)1-yMgyNiz-aAla (where RE is at least one element selected from among Y, Sc and rare-earth elements, T is at least one element selected from among Zr, V and Ca, and subscripts x, y, z and a are values respectively satisfying 0≦x, 0.05≦y≦0.35, 2.8≦z≦3.9, and 0.10≦a≦0.25), the hydrogen absorbing alloy has a crystal structure in which an AB2 subunit and an AB5 subunit are superimposed one upon the other, and Cr is substituted for part of the Ni.
US09306212B2 Positive active material for rechargeable lithium battery, and positive electrode and rechargeable lithium battery including the same
A positive active material for a rechargeable lithium battery includes a porous material including primary particles, and secondary particles including aggregates of a plurality of the primary particles. The porous material has a tap density of 0.3 to less than 1.0 g/cc. A positive electrode includes the positive active material. A rechargeable lithium battery includes the positive electrode including the positive active material.
US09306203B2 Rechargeable battery and battery module
A rechargeable battery includes an electrode assembly having a positive electrode and a negative electrode; a case housing the electrode assembly; a cap plate coupled to the case; and a terminal electrically coupled to the electrode assembly and having a base portion located on the cap plate and a protrusion portion protruding from the base portion and spaced from the cap plate.
US09306201B2 Power supply unit for electric vehicle
A power supply unit for an electric vehicle includes a tray and at least one battery module fixed on the tray via a strip. Each battery module includes a housing having a bottom plate mounted onto the tray, first to fourth side plates disposed on the bottom plate, a battery pack disposed in the housing and having a plurality of cells arranged along a thickness direction, and first flexible members disposed between the first side plate and the battery pack, and between the third side plate and battery pack respectively, for fastening the battery pack.
US09306193B2 Organic electroluminescent display device and method of manufacturing the same
An organic electroluminescent (EL) display device and a method of manufacturing the same are provided. The organic electroluminescent display device includes a rear substrate, a organic EL portion formed on one surface of the rear substrate with a first electrode, an organic layer and a second electrode sequentially laminated. The front substrate is coupled to the rear substrate to seal an internal space in which the organic EL portion is accommodated, for isolating the organic EL portion from the outside. The front substrate further has a transparent moisture-absorbing layer coated on its internal surface.
US09306191B2 Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus includes: a substrate; a plurality of thin film transistors on the substrate, each of the thin film transistors including an active layer, a gate electrode, and source and drain electrodes; first electrodes electrically connected to the plurality of thin film transistors, respectively, and being on respective pixels corresponding to the plurality of thin film transistors; organic layers on the first electrodes, respectively, and including light-emitting layers; auxiliary electrodes each of which is on at least a portion between adjacent organic layers of the organic layers; and a second electrode facing the first electrodes and covering the organic layers and the auxiliary electrodes.
US09306190B2 Organic light emitting display panel
A display device is provided that comprises a pattern positioned on a substrate, the pattern comprising a multi-layered structure comprising a conductive layer and at least one light-blocking layer in whole or in part; and a bank positioned on the pattern, the bank comprising a light-absorbent material.
US09306186B2 Organic electronic device and method of manufacturing the same
Provided is an organic electronic device exhibiting excellent conductivity and transparency of an electrode, and low driving voltage, together with en excellent storing property and excellent lifetime. Also disclosed is an organic electronic device possessing a transparent substrate and provided thereon, a first transparent electrode, a second electrode and an organic functional layer provided between the first transparent electrode and the second electrode, wherein the first transparent electrode and the second electrode are opposed to each other, and a transparent conductive layer containing a conductive polymer and an aqueous binder is provided between the first transparent electrode and the organic functional layer.
US09306183B2 Photovoltaic conversion element and photovoltaic cell
Described herein are organic photovoltaic (OPV) cells using gold complex(es) with as chemical structure of Structure I as active material: wherein, wherein R1-R15 are independently hydrogen, halogen, hydroxyl, an unsubstituted alkyl, a substituted alkyl, cycloalkyl, an unsubstituted aryl, a substituted aryl, acyl, alkoxy, acyloxy, amino, alkylamino, nitro, acylamino, aralkyl, cyano, carboxyl, thio, styryl, aminocarbonyl, carbamoyl, aryloxycarbonyl, phenoxycarbonyl, hydroxyalkyl, or an alkoxycarbonyl group. The OPV cell can be fabricated by thermal deposition or solution process such as spin coat and printing.
US09306182B2 Organic zener diode, electronic circuit, and method for operating an organic zener diode
This disclosure relates to an organic zener diode having one electrode and one counter electrode, and an organic layer arrangement formed between the electrode and the counter electrode, wherein the organic layer arrangement includes the following organic layers: an electrically n-doped charge carrier injection layer on the electrode side, made from a mixture of an organic matrix material and an n-dopant, an electrically p-doped charge carrier injection layer on the counter electrode side, made from a mixture of another organic matrix material and a p-dopant, and an electrically undoped organic intermediate layer that is arranged between the electrically n-doped charge carrier injection layer on the electrode side and the electrically p-doped charge carrier injection layer on the counter electrode side. An electronic circuit arrangement with an organic zener diode and method for operating an organic zener diode are also provided.
US09306181B2 Forming pn junction contacts by different dielectrics
A carbon nanotube transistor and method of manufacturing a carbon nanotube transistor is disclosed. The carbon nanotube transistor includes a carbon nanotube on a substrate, a gate electrode deposited on the carbon nanotube, and at least one of a source electrode and a drain electrode deposited on the carbon nanotube and separated from the gate electrode by a space region. The carbon nanotube is doped at the gate electrode an in the space region to form a p-n junction.
US09306180B2 Stretchable substrate and organic light emitting display apparatus comprising the same
A stretchable substrate including a plurality of islands that are disposed in a planar lattice pattern and spaced apart from each other, and a plurality of bridges that connect two adjacent islands. An aperture is formed between a pair of bridges, which are adjacent and parallel to each other, and the plurality of bridges are capable of stretching and contraction, and the shapes of the islands remain unchanged during the stretching and contraction of the bridges.
US09306178B2 Platinum(II) complexes for OLED applications
The current invention relates to novel platinum(II) based organometallic materials. These materials show high emission quantum efficiencies and low self-quenching constant. Also provided are high efficiency, green to orange emitting organic light-emitting diode (OLED) that are fabricated using platinum(II) based organometallic materials as the light-emitting material. The organometallic materials of the invention are soluble in common solvents; therefore, solution process methods such as spin coating and printing can be used for device fabrication. The devices fabricated from these materials show low efficiency roll-off.
US09306176B2 Organic electroluminescent device; a charge transporting material for the organic electroluminescent device; and a luminescent device, a display device and a lighting system using the organic electroluminescent device
An organic electroluminescent element comprising a substrate; a pair of electrodes including an anode and a cathode, disposed on the substrate; and at least one organic layer including a light emitting layer, disposed between the electrodes, wherein the light emitting layer includes a compound represented by the following general formula: wherein: R1, R2, and R19; R11 to R18; and A1 to A4 are as defined in the specification.
US09306171B2 Material for organic electroluminescence device and organic electroluminescence device
A material for organic electroluminescence device having a specific central skeleton to which a cyano-substituted aromatic hydrocarbon group or a cyano-substituted heterocyclic group is bonded at its specific position is described. Further described is an organic electroluminescence device including an organic thin film layer between an anode and a cathode. The organic thin film layer include an light emitting layer and at least one layer of the organic thin film layer contains the material for organic electroluminescence device. The material for organic electroluminescence device realizes an organic electroluminescence device with good emission efficiency.
US09306165B2 Replacement materials processes for forming cross point memory
Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line stack extending in a first direction, the lower line stack comprising a sacrificial line over a lower conductive line. The method further includes forming a chalcogenide line extending in the first direction by selectively removing the sacrificial material of the sacrificial line and replacing the sacrificial line with a chalcogenide material.
US09306163B2 Electronic device having resistance element
An electronic device includes a first electrode, a second electrode spaced apart from the first electrode, a resistance variable element interposed between the first electrode and the second electrode, and a conductor arranged at least one of a first side and a second side of the resistance variable element to apply an electric field to the resistance variable element while being spaced apart from the resistance variable element, the first side facing the second side.
US09306161B1 Fabrication methods of conducting bridge random access memory (CBRAM) device structures
A method of forming a conductive bridging memory cell can include forming an active electrode layer above a barrier layer formed on a lower conductive layer; forming at least one ion conductor layer over an active electrode layer; incorporating conductive ions into the ion conductor layer to create a switch memory layer that changes impedance in response to an electric field; and the active electrode layer is a source of conductive ions for the ion conductor, and the barrier layer substantially prevents a movement of conductive ions therethrough.
US09306158B2 MRAM device and fabrication method thereof
A method of forming and a magnetoresistive random access memory (MRAM) device. In an embodiment, the MRAM device includes a magnetic tunnel junction (MTJ) disposed over a bottom electrode, the magnetic tunnel junction having a first sidewall, a top electrode disposed over the magnetic tunnel junction, and a dielectric spacer supported by the magnetic tunnel junction and extending along sidewalls of the top electrode, the dielectric spacer having a second sidewall substantially co-planar with the first sidewall of the magnetic tunnel junction.
US09306155B2 Method and system for providing a bulk perpendicular magnetic anisotropy free layer in a perpendicular magnetic junction usable in spin transfer torque magnetic random access memory applications
A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a pinned layer and nonmagnetic spacer layer between the free and pinned layers. The free layer includes at least one of a hybrid perpendicular magnetic anisotropy (PMA) structure and tetragonal bulk perpendicular magnetic anisotropy (B-PMA) structure. At least one of the free layer and the pinned layer have a perpendicular magnetic anisotropy energy greater than an out-of-plane demagnetization energy. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.
US09306144B2 Thermoelectric generator and production method for thermoelectric generator
An exemplary thermoelectric generator disclosed herein includes: a first electrode and a second electrode opposing each other; and a stacked body having a first end face and a second end face. The stacked body is structured so that first layers made of a first material and second layers made of a second material are alternately stacked, the first material containing a metal and particles having a lower thermal conductivity than that of the metal, the particles being dispersed in the metal, and the second material having a higher Seebeck coefficient and a lower thermal conductivity than those of the first material. Planes of stacking between the first layers and the second layers are inclined with respect to a direction in which the first electrode and the second electrode oppose each other.
US09306143B2 High efficiency thermoelectric generation
A thermoelectric power generating system is provided that includes at least one thermoelectric assembly. The at least one thermoelectric assembly includes at least one first heat exchanger in thermal communication with at least a first portion of a first working fluid. The first portion of the first working fluid flows through the at least one thermoelectric assembly. The at least one thermoelectric assembly includes a plurality of thermoelectric elements in thermal communication with the at least one first heat exchanger. The at least one thermoelectric assembly further includes at least one second heat exchanger in thermal communication with the plurality of thermoelectric elements and with a second working fluid flowing through the at least one thermoelectric assembly. The second working fluid is cooler than the first working fluid. The thermoelectric power generating system further includes at least one heat exchanger portion configured to have at least some of the first portion of the first working fluid flow through the at least one heat exchanger portion after having flowed through the at least one thermoelectric assembly. The at least one heat exchanger portion is configured to recover heat from the at least some of the first portion of the first working fluid.
US09306142B2 High heat-radiant optical device substrate and manufacturing method thereof
The manufacturing of an optical device substrate is achieved by anodizing the surface of a metal plate, coating an insulative liquid bonding agent, having a viscosity which can permeate into an anodized film of the metal plate, on the metal plate, and alternately layering, pressing, and heat treating the metal plate coated with the liquid bonding agent and an insulative film bonding agent before the liquid bonding agent becomes solid so that bonding force between the metal plate and an insulation layer is strengthened, bubbles formation in the liquid bonding agent is inhibited, the fragile nature of the liquid bonding agent after the solidification is reduced producing an optical device substrate with improved mechanical strength and an insulation layer of precisely controlled thickness.
US09306139B2 Light emitting device, method of fabricating the same and lighting system
A light emitting device according to an embodiment includes a body including first and second side walls which correspond to each other, third and fourth side walls which have lengths longer than lengths of the first and second side walls, and a concave portion; a first lead frame under the concave portion and the third side wall; a second lead frame under the concave portion and the fourth side wall; a light emitting chip on at least one of the first and second lead frames; a molding member on the concave portion; a first recess portion recessed from the first side wall toward the second side wall and connected to a bottom of the body; and a second recess portion recessed from the second side wall toward the first side wall and connected to the bottom of the body.
US09306138B2 Light emitting diode packaging structure
A packaging structure of a vertical LED chip includes at least a support system, a glue cup that connects to periphery of the support system, a LED chip with light absorption substrate over the support system and packaging glue distributed in periphery of the LED chip, wherein the packaging structure also comprises a baffle that surrounds the outer side wall of the light absorption substrate. Adding of a baffle structure in the support system of the packaging structure can effectively prevent light from being absorbed by the light absorption substrate and reflect such light out of the packaging structure, thus increasing probability of light emitting and improving light intensity of the vertical LED chip.
US09306137B2 Method of producing crystalline substrate having concave-convex structure
A method of producing the crystalline substrate having a concave-convex structure includes: (A) forming a transfer film by forming a concave-convex film on a support film on the surface having a concave-convex pattern thereon so that thickness of the residual film of the concave-convex film is 0.01 to 1 μm, the concave-convex pattern of the support film having concave parts with a width of 0.05 to 100 μm, a depth of 0.05 to 10 μm, and a ratio of the depth of the concave part to the width of the concave part of up to 1.5, (B) disposing the transfer film on the crystalline substrate, and transferring the concave-convex film onto the crystalline substrate to produce a crystalline substrate having the concave-convex film thereon, (C) etching the crystalline substrate having the concave-convex film thereon to form a concave-convex structure on the surface of a crystalline substrate.
US09306134B2 Encapsulating composition and light emitting device
An encapsulating composition for a light emitting device includes a transparent resin, a plurality of light scattering particles distributed throughout the transparent resin and having an average particle size ranging from 190 nm to 450 nm, and a plurality of phosphor particles distributed throughout the transparent resin. A light emitting device includes the encapsulating composition and a light emitting diode that is encapsulated by the encapsulating composition.
US09306133B2 Optical semiconductor device
An optical semiconductor device in which an optical semiconductor element connected to a silver-plated copper lead frame is sealed with an addition curing silicone resin composition, the addition curing silicone resin composition having (A) organopolysiloxane that contains an aryl group and an alkenyl group and does not contain an epoxy group; (B) organohydrogenpolysiloxane that has at least two hydrosilyl groups per molecule and an aryl group, the organohydrogenpolysiloxane that contains 30 mol % or more of an HR2SiO0.5 unit in a constituent unit having an amount that a molar ratio of the hydrosilyl group in the component (B) with respect to the alkenyl group in the component (A) is 0.70 to 1.00; and (C) a hydrosilylation catalyst having a catalytic amount.
US09306125B2 Light-emitting device, light-emitting device package, and light unit
A light-emitting device, according to one embodiment, comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer which is underneath the first conductive semiconductor layer, and a second conductive semiconductor layer which is underneath the active layer; a reflective electrode, which is arranged under the light-emitting structure; and an electrode which is arranged inside the first conductive semiconductor layer and comprises a conductive ion injection layer.
US09306122B2 Light emitting diode and a manufacturing method thereof, a light emitting device
An LED includes a first electrode, for connecting the LED to a negative electrode of a power supply and a substrate located on the first electrode in which a plurality of contact holes are formed extending through the substrate. The diameter of upper parts of the contact holes is less than the diameter of lower parts of the contact holes, and the contact holes are filled with electrode plugs connecting the first electrode to the LED die. The light emitting device includes the LED, and further includes a susceptor and an LED mounted on the susceptor. The manufacturing method includes forming successively an LED die and a second electrode on a substrate, patterning a back surface of the substrate to form inverted trapezoidal contact holes which expose the LED die, and filling the contact holes with conductive material until the back face of the substrate is covered by the conductive material.
US09306120B2 High efficiency light emitting diode
A method of fabricating method light-emitting diode according to an exemplary embodiment of the present invention includes forming a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a first substrate, forming a second substrate on the second conductivity-type semiconductor layer, separating the first substrate from the first conductivity-type semiconductor layer, forming a mask pattern including a plurality of openings on the first conductivity-type semiconductor layer exposed after separating the substrate, etching the first conductivity-type semiconductor layer having the mask pattern disposed thereon to form a plurality of recesses separated from each other, removing the mask pattern, and etching a surface of the first conductivity-type semiconductor layer to form a sub-micro texture.
US09306117B2 Transfer-bonding method for light emitting devices
A transfer-bonding method for light emitting devices including following steps is provided. A plurality of light emitting devices is formed over a first substrate and is arranged in array, wherein each of the light emitting devices includes a device layer and an interlayer sandwiched between the device layer and the first substrate. A protective layer is formed over the first substrate to selectively cover parts of the light emitting devices, and other parts of the light emitting devices are uncovered by the protective layer. The device layers uncovered by the protective layer are bonded with a second substrate. The interlayers uncovered by the protective layer are removed, so that parts of the device layers uncovered by the protective layer are separated from the first substrate and are transfer-bonded to the second substrate.
US09306111B2 Semiconductor material and method of production
A method of manufacturing (AgxCu1-x)2ZnSn(SySe1-y)4 thin films, the method comprising: providing a thin film comprising Ag and/or Cu, the thin film further comprising Zn and annealing the thin film in an atmosphere comprising S and/or Se, and further comprising Sn.
US09306103B2 Back contact photovoltaic module with integrated circuitry
A back-contact solar cell module and a process for making such a solar cell module are provided. The module includes a porous wire mounting layer with a plurality of elongated electrically conductive wires mounted thereon. A polymeric encapsulant layer is provided between a rear surface of solar cells of the module and the porous wire mounting layer and is melted to adhere to the solar cells and penetrate the porous wire mounting layer. Back electrical contacts on the solar cells are electrically connected to the electrically conductive wires through the porous wire mounting layer.
US09306102B2 Back contact solar module and electrode soldering method therefor
A back contact solar module and an electrode soldering method therefor are disclosed. The back contact solar module includes a substrate, two solar cells formed on the substrate, and a curved solder part. The curved solder part is soldered onto an electrode solder pad of each solar cell. The curved solder part has a curved portion between the two solder pads. The curved portion curves parallel to the substrate. Therefore, the invention utilizes the elasticity in structure or the allowable deformation of the curved portion to release the internal stress induced by the soldering on the electrode pads or by a following lamination packaging, which solves the problem in the prior art that the internal residual stress in an electrode solder part harmfully affects the electrical connection between solar cells.
US09306099B2 Material including graphene and an inorganic material and method of manufacturing the material
A material including: graphene; and an inorganic material having a crystal system, wherein a crystal plane of the inorganic material is oriented parallel to the (0001) plane of the graphene. The crystal plane of the inorganic material has an atomic arrangement of a hexagon, a tetragon, or a pentagon.
US09306097B2 Method for decreasing an excess carrier induced degradation in a silicon substrate
A method (100) for decreasing an excess carrier induced degradation in a silicon substrate, includes providing (120, 130) a charged insulation layer capable of retaining charge on the silicon substrate for generating a potential difference between the charged insulation layer and the silicon substrate, and heat treating (140) the silicon substrate for enabling an impurity causing the excess carrier induced degradation and being in the silicon substrate to diffuse due to the potential difference into a boundary of the silicon substrate and the insulation layer.
US09306092B2 Solar cell and method of fabricating the same
Provided are a solar cell and a method of fabricating the same. The solar cell includes: a substrate; a back electrode layer on the substrate; a light absorbing layer on the rear electrode layer; a window layer on the light absorbing layer; a plurality of beads in the light absorbing layer; and a trap layer on each surface of the plurality of beads.
US09306091B2 Light receiving device
A light receiving device includes an optical substrate disposed over a light receiving surface. In the optical substrate, a first optical multilayer film is formed on an incident surface, a second optical multilayer film is formed on a surface opposite the incident surface, and a third optical multilayer film is formed on the light receiving surface. Light of two wavelength regions separated from each other is transmitted, and light of wavelength regions other than the two wavelength regions is blocked. The two wavelength regions include a first wavelength region on the short wavelength side and a second wavelength region on the long wavelength side. At least a predetermined proportion of light of the second wavelength region is transmitted, and the transmittance of light of the first wavelength region is limited within a predetermined range less than the predetermined proportion.
US09306086B2 Solar cell and method for manufacturing the same
A solar cell according to an embodiment of the invention includes a substrate of a first conductive type, an emitter region of a second conductive type opposite the first conductive type, which is positioned at the substrate, an anti-reflection layer including a first opening exposing the emitter region and a plurality of second openings which expose the emitter region and are separated from one another, a first electrode which is positioned on a first portion of the emitter region exposed through the first opening and is connected to the first portion, a first bus bar which is positioned on a second portion of the emitter region exposed through the plurality of second openings and is connected to the second portion and the first electrode, and a second electrode which is positioned on the substrate and is connected to the substrate.
US09306083B2 Method of producing polyester film, polyester film, and back sheet for solar cell
A method of manufacturing a polyester film, including: preparing a polyester film substrate having an amount of a terminal carboxylic acid group (AV) of from 3 eq/ton to 20 eq/ton, by using a polyester resin having a temperature distribution of a pre-melting peak (Tm′) of from 1° C. to 10° C.; providing a coating layer on at least one surface of the polyester film substrate; and stretching the polyester film substrate provided with the coating layer at least once.
US09306082B2 System for managing and controlling photovoltaic panels
The invention relates to a module for locally controlling a photovoltaic panel that includes: first and second terminals (B1, B2) for connecting in series by a single conductor (13) having homologous modules; a first terminal (A1) for connecting the photovoltaic panel, said first terminal being connected to the first terminal (B1) for connecting in series; a switcher (S) that is connected between the second terminal (B2) for connecting in series and a second terminal (A2) connecting the panel; a diode (D0) that is connected between the first and second terminals (B1, B2) for connecting in series; a converter (70) that is provided so as to supply power to the module on the basis of the voltage that is developed by the panel between the first and second terminals (A1, A2) connecting the panel; a sensor (R3) for measuring the current flowing within the single conductor (13); and a means (60, 62) for closing the switcher when the current flowing within the single conductor exceeds a threshold.
US09306081B2 Solar cell module
Second wiring member includes a first wiring-member piece electrically connected to one of the solar cells of one of the adjacent solar cell strings, and a second wiring-member piece electrically connecting the first wiring-member piece to another one of the solar cell strings. First wiring-member piece includes wiring electrically connecting the solar cell and the second wiring-member piece to each other, a first insulating layer covering part of a surface of the wiring on a solar-cell side, and a second insulating layer covering part of a surface of the wiring on a side opposite from the solar cell. First portion of the wiring is exposed from the first insulating layer. Second portion of the wiring is exposed from the second insulating layer. First portion of the wiring is electrically connected to the solar cell, and the second portion of the wiring is electrically connected to the second wiring-member piece.
US09306075B2 Thin film transistor
A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
US09306074B2 Semiconductor device
Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.
US09306072B2 Oxide semiconductor layer and semiconductor device
An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.
US09306071B2 Organic light-emitting display device including a flexible TFT substrate and stacked barrier layers
A thin-film transistor (TFT) substrate includes a flexible substrate. A first barrier layer is formed on the flexible substrate. The first barrier layer includes a first silicon oxide layer and a first silicon nitride layer. A second barrier layer is formed on the first barrier layer. The second barrier layer includes a second silicon oxide layer and a second silicon nitride layer. A TFT layer is formed on the second barrier layer. The second silicon oxide layer is disposed adjacent to the TFT layer.
US09306065B2 Advanced forming method and structure of local mechanical strained transistor
Embodiments of the invention provide a semiconductor fabrication method and a structure for strained transistors. A method comprises forming a stressor layer over a MOS transistor. The stressor layer is selectively etched over the gate electrode, thereby affecting strain conditions within the MOSFET channel region. An NMOS transistor may have a tensile stressor layer, and a PMOS transistor may have compressive stressor layer.
US09306064B2 Semiconductor device and integrated apparatus comprising the same
The present disclosure provides a semiconductor device and an integrated apparatus having the same. The semiconductor device includes a substrate, a buffer layer on the substrate, a compensation area which includes a p-region and a n-region on the buffer layer, and a transistor cell on the compensation area. The transistor cell includes a source region, a body region, a gate electrode and a gate dielectric formed at least between the gate electrode and the body region. The gate dielectric has a thickness in a range of 12 nm to 50 nm.
US09306062B2 Semiconductor device
A semiconductor device has a body layer disposed in a semiconductor substrate, cell regions arranged around a surface layer part of the body layer, and trenches arranged in a grid pattern for separating the cell regions from each other. A gate insulating film covers inner walls of the first trenches and an inner wall of the second trench, and a gate electrode is filled in the first trenches and the second trench covered by the gate insulating film. A cell circumferential region is disposed to surround an outer side of the second trench. An interlayer insulating film is disposed on the cell regions, the first trenches, and the second trench. A gate contact hole is disposed in the interlayer insulating film at an intersection of the first trenches arranged in the grid pattern. A gate wiring is connected to the gate electrode via the gate contact hole.
US09306058B2 Integrated circuit and method of manufacturing an integrated circuit
An integrated circuit includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
US09306057B2 Metal oxide semiconductor devices and fabrication methods
A semiconductor device includes a first well and a second well implanted in a semiconductor substrate. The semiconductor device further includes a raised drain structure above and in contact with the second well and separate from the gate structure. The raised drain structure includes a drain connection point above the surface of the second well.
US09306055B2 High voltage double-diffused MOS (DMOS) device and method of manufacture
A method of forming an integrated DMOS transistor/EEPROM cell includes forming a first mask over a substrate, forming a drift implant in the substrate using the first mask to align the drift implant, simultaneously forming a first floating gate over the drift implant, and a second floating gate spaced apart from the drift implant, forming a second mask covering the second floating gate and covering a portion of the first floating gate, forming a base implant in the substrate using an edge of the first floating gate to self-align the base implant region, and simultaneously forming a first control gate over the first floating gate and a second control gate over the second floating gate. The first floating gate, first control gate, drift implant, and base implant form components of the DMOS transistor, and the second floating gate and second control gate form components of the EEPROM cell.
US09306051B2 Semiconductor device using a nitride semiconductor
To provide a semiconductor device having improved characteristics. The semiconductor device has, over a substrate thereof, a first buffer layer (GaN), a second buffer layer (AlGaN), a channel layer, and a barrier layer, a trench penetrating through the barrier layer and reaching the middle of the channel layer, a gate electrode placed in the trench via a gate insulating film, and a source electrode and a drain electrode formed on both sides of the gate electrode respectively. By a coupling portion in a through-hole reaching the first buffer layer, the buffer layer and the source electrode are electrically coupled to each other. Due to a two-dimensional electron gas produced in the vicinity of the interface between these two buffer layers, the semiconductor device can have an increased threshold voltage and improved normally-off characteristics.
US09306045B2 Semiconductor power device
A semiconductor power device is provided, comprising a substrate of a first conductive type, a buffering layer of a second conductive type formed on the substrate, a voltage supporting layer formed on the buffering layer, and alternating sections of different conductive types formed at the substrate. The voltage supporting layer comprises first semiconductor regions of the first conductive type and second semiconductor regions of the second conductive type, wherein the first semiconductor regions and the second semiconductor regions are alternately arranged. The alternating section and the buffering layer form a segmented structure of alternated conductive types, which is used as an anode of the semiconductor device.
US09306042B2 Bipolar transistor with carbon alloyed contacts
A method for forming a bipolar junction transistor includes forming a collector intrinsic region, an emitter intrinsic region and an intrinsic base region between the collector intrinsic region and the emitter intrinsic region. A collector extrinsic contact region is formed in direct contact with the collector intrinsic region; an emitter extrinsic contact region is formed on the emitter intrinsic region and a base extrinsic contact region is formed in direct contact with the intrinsic base region. Carbon is introduced into at least one of the collector extrinsic contact region, the emitter extrinsic contact region and the base extrinsic contact region to suppress diffusion of dopants into the junction region.
US09306038B1 Shallow extension junction
A method for fabricating a semiconductor device includes receiving a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, forming a gate structure over a fin that comprises a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and epitaxially growing a gate extender from the seed layer that laterally extends over a source or drain region of the fin. In one embodiment, a semiconductor device includes a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, a gate structure formed over a fin of the plurality of fins, the gate structure comprising a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and a gate extender epitaxially grown from the seed layer that laterally extends over a source or drain region of the fin.
US09306033B2 Semiconductor device and fabrication method thereof
A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a substrate. A spacer is formed adjoining a sidewall of the gate stack. A recess is formed between the spacer and the substrate. Then, a strained feature is formed in the recess. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.
US09306028B2 Graphene devices with local dual gates
An electronic device comprises an insulator, a local first gate embedded in the insulator with a top surface of the first gate being substantially coplanar with a surface of the insulator, a first dielectric layer formed over the first gate and insulator, and a channel. The channel comprises a bilayer graphene layer formed on the first dielectric layer. The first dielectric layer provides a substantially flat surface on which the channel is formed. A second dielectric layer formed over the bilayer graphene layer and a local second gate formed over the second dielectric layer. Each of the local first and second gates is capacitively coupled to the channel of the bilayer graphene layer. The local first and second gates form a first pair of gates to locally control a first portion of the bilayer graphene layer.
US09306025B2 Memory transistor with multiple charge storing layers and a high work function gate electrode
A semiconductor device includes an oxide-nitride-oxide (ONO) dielectric stack on a surface of a substrate, and a high work function gate electrode formed over a surface of the ONO dielectric stack. The ONO dielectric stack includes a multi-layer charge storage layer including a silicon-rich, oxygen-lean top silicon nitride layer and an oxygen-rich bottom silicon nitride layer. The high work function gate electrode includes a P+ doped polysilicon layer.
US09306024B2 Method of forming semiconductor device
A semiconductor device and methods of formation are provided. A semiconductor device includes a dielectric film over a dielectric layer. The dielectric film includes a crystalline structure having a substantially uniform composition of zirconium, nitrogen and oxygen. The dielectric film is formed through in situ nitrogen plasma doping of a zirconium layer. The dielectric film functions as a gate dielectric. The dielectric film has a high dielectric constant between about 28-29 and has a low leakage current density of about 4.79×10−5 A/cm2. The substantially uniform distribution of nitrogen throughout the zirconium oxide of the dielectric film increases the k value of the dielectric film by between about 15% to about 17% as compared to a dielectric film that has a non-uniform distribution of nitrogen through a zirconium oxide layer.
US09306022B1 Semiconductor device having dual work function gate structure and electronic device having the same
A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a second junction region over the vertical channel region; a gate trench exposing side surfaces of the pillar; a gate dielectric layer covering the gate trench; and a gate electrode embedded in the gate trench, with the gate dielectric layer interposed therebetween. The gate electrode includes a first work function liner overlapping with the vertical channel region, and including an aluminum-containing metal nitride; a second work function liner overlapping with the second junction region, and including a silicon-containing non-metal material; and an air gap positioned between the second work function liner and the second junction region.
US09306020B2 Power module and method of manufacturing the power module
A power module includes a semiconductor device having at least one electrode surface on each side thereof, a first conductive member connected to the electrode surface provided on one side of the semiconductor device with solder, and a second conductive member connected to the electrode surface provided on the other side of the semiconductor device with solder, with at least one of the electrode surfaces provided on the one side of the semiconductor device being double comb-shaped.
US09306019B2 Integrated circuits with nanowires and methods of manufacturing the same
Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming a layered fin overlying a substrate, where the layered fin includes an SiGe layer and an Si layer. The SiGe layer and the Si layer alternate along a height of the layered fin. A dummy gate is formed overlying the substrate and the layered fin, and a source and a drain area formed in contact with the layered fin. The dummy gate is removed to expose the SiGe layer and the Si layer, and the Si layer is removed to produce an SiGe nanowire. A high K dielectric layer that encases the SiGe nanowire between the source and the drain is formed, and a replacement metal gate is formed so that the replacement metal gate encases the high K dielectric layer and the SiGe nanowire between the source and drain.
US09306018B2 Trench shielding structure for semiconductor device and method
A shielding structure for a semiconductor device includes a plurality of trenches. The trenches include passivation liners and shield electrodes, which are formed therein. In one embodiment, the shielding structure is placed beneath a control pad. In another embodiment, the shielding structure is placed beneath a control runner.
US09306016B2 Semiconductor device and method for manufacturing the same
The present invention provides a method for manufacturing a semiconductor device, which comprises: providing an SOI substrate, which comprises a base layer, an insulating layer located on the base layer and a active layer located on the insulating layer; forming a gate stack on the SOI substrate; etching the active layer, the insulating layer and a part of the base layer of the SOI substrate with the gate stack as a mask, so as to form trenches on both sides of the gate stack; forming a crystal dielectric layer within the trenches, wherein the upper surface of the crystal dielectric layer is lower than the upper surface of the insulating layer and not lower than the lower surface of the insulating layer; and forming source/drain regions on the crystal dielectric layer. The present invention further provides a semiconductor device. The present invention is capable of eliminating pathway for leakage current between source/drain regions and SOI substrate at the meantime of reducing contact resistance at source/drain regions.
US09306010B2 Semiconductor arrangement
A first semiconductor zone of a first conduction type is formed from a semiconductor base material doped with first and second dopants. The first and second dopants are different substances and also different from the semiconductor base material. The first dopant is electrically active and causes a doping of the first conduction type in the semiconductor base material, and causes either a decrease or an increase of a lattice constant of the pure, undoped first semiconductor zone. The second dopant may be electrically active, and may be of the same doping type as the first dopant, causes one or both of: a hardening of the first semiconductor zone; an increase of the lattice constant of the pure, undoped first semiconductor zone if the first dopant causes a decrease, and a decrease of the lattice constant of the pure, undoped first semiconductor zone if the first dopant causes an increase, respectively.
US09306007B2 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a structural body, an insulating film, and a control electrode. The structural body has a first surface, and includes a first semiconductor region including silicon carbide of a first conductivity type, a second semiconductor region including silicon carbide of a second conductivity type, and a third semiconductor region including silicon carbide of the first conductivity type. The structural body has a portion in which the first semiconductor region, the second semiconductor region, and the third semiconductor region are arranged in this order in a first direction along the first surface. The insulating film is provided on the first surface of the structural body. The control electrode is provided on the insulating film. The structural body has a buried region provided between the second semiconductor region and the first surface. The buried region is doped with a group V element.
US09306004B2 SiC devices with high blocking voltage terminated by a negative bevel
A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode.
US09306003B2 Semiconductor device and method for manufacturing the same
A semiconductor device, including: a substrate having a first semiconductor material; a second semiconductor layer on the substrate; a third semiconductor layer on the second semiconductor layer and being a device formation region; an isolation structure on both sides of the third semiconductor layer and on the substrate; and an insulating layer below the source and drain regions of the third semiconductor layer and between the isolation structure and the ends of the second semiconductor layer.
US09305999B2 Stress-generating structure for semiconductor-on-insulator devices
A stack pad layers including a first pad oxide layer, a pad nitride layer, and a second pad oxide layer are formed on a semiconductor-on-insulator (SOI) substrate. A deep trench extending below a top surface or a bottom surface of a buried insulator layer of the SOI substrate and enclosing at least one top semiconductor region is formed by lithographic methods and etching. A stress-generating insulator material is deposited in the deep trench and recessed below a top surface of the SOI substrate to form a stress-generating buried insulator plug in the deep trench. A silicon oxide material is deposited in the deep trench, planarized, and recessed. The stack of pad layer is removed to expose substantially coplanar top surfaces of the top semiconductor layer and of silicon oxide plugs. The stress-generating buried insulator plug encloses, and generates a stress to, the at least one top semiconductor region.
US09305997B1 Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions
A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.
US09305994B2 Semiconductor apparatus with multi-layer capacitance structure
A semiconductor apparatus including a stacked capacitance structure is provided. The stacked capacitance structure includes a first inner metal layer having a first pad area adjacent to an edge of the first inner metal layer, a first insulating layer disposed on the first inner metal layer and exposing the first pad area, a second inner metal layer disposed on the first insulating layer and having a second pad area adjacent to an edge of the second inner metal layer, a second insulating layer disposed on the second inner metal layer and exposing the second pad area, and a third inner metal layer covering the second inner metal layer and including at least one first slit. The first pad area and the second pad area include a plurality of pads. The first slit corresponds to the second pad area, such that the pads on the second pad area are exposed.
US09305993B2 Method of manufacturing semiconductor structure
A method of manufacturing a semiconductor structure with a high voltage area and a low voltage area is provided. The method includes the following steps: providing a substrate of a first conductivity type; forming a second doped region of a second conductivity type in the substrate by a first implantation; forming a first doped region of a first conductivity type in the second doped region by a second implantation; forming an insulating layer on the substrate; forming a resistor on the insulating layer, wherein the resistor is electrically connecting the high voltage area and the low voltage area; and forming a conductor electrically connected to the resistor. The step of forming a first doped region defines the high voltage area and the low voltage area.
US09305989B2 Organic light-emitting display and method of manufacturing the same
An organic light-emitting display and a method of manufacturing an organic light-emitting display are described. According to an aspect, the organic light-emitting display includes a substrate, a photodiode on the substrate, a planarization layer covering the photodiode, a first electrode on the planarization layer, a pixel defining layer at least partially exposing the first electrode, an organic layer covering the first electrode which is exposed by the pixel defining layer and a second electrode covering the pixel defining layer and the organic layer.
US09305987B2 Organic light emitting diode display
A pixel includes a capacitor coupled to a transistor, a first insulating layer over a semiconductor layer of the transistor, a second insulating layer over the first insulating layer, and a blocking layer between the first insulating layer and the second insulating layer. The first plate of the capacitor is on the first insulating layer and a second plate of the capacitor on the second insulating layer. The blocking layer may be made of a natural oxide layer and the first insulating layer may be made of a material different from the blocking layer.
US09305983B2 Organic light emitting display panel and method of manufacturing the same
An organic light emitting display panel according to an aspect of the present invention includes a planarization layer positioned on a substrate including a plurality of pixels, and a first opening portion formed in a non-emission area of the pixel, a first electrode formed on a portion exposed through the first opening portion and the planarization layer, a bank including a portion overlapping an edge of the first electrode, and exposing a portion corresponding to an emission area of the pixel on the first electrode, an organic layer formed on the portion corresponding to the emission area of the pixel on the first electrode, and a second electrode formed on the bank and the organic layer.
US09305981B2 Organic electro-luminescent device
A display device includes a display area in which pixels are arranged in a matrix, and an inspection area that is formed around the display area, and has an inspection pixel, in which the display area includes plural first electrodes that are disposed in the respective pixels, a light emitting organic layer that includes plural organic material layers having a light emitting layer, and a second electrode that covers the display area, and the inspection pixel includes an inspection first electrode electrically independent from the respective first electrodes, an inspection organic layer in which at least one light emitting layer of the plural organic material layers is continuous from the display area, and comes in contact with the inspection first electrode, and an inspection second electrode that is continuous from the second electrode, and comes in contact with the inspection organic layer.
US09305980B2 Flexible display device and method of fabricating the same
A flexible display device includes a substrate including a bending area that is bent and a flat area that is not bent; a device/wiring layer including a thin film transistor, the device/wiring layer being on the substrate; first pixel units on the flat area on the device/wiring layer; and second pixel units on the bending area on the device/wiring layer, an inter-pixel interval of the first pixel units being different from an inter-pixel interval of the second pixel units.
US09305979B2 Organic light emitting diode display device and method of fabricating the same
An OLED display device includes a substrate; pixel regions defined by gate and data lines, each pixel region including red, green, first blue and second blue sub-pixels; a TFT in each pixel region; a first electrode connected to the thin film transistor; an insulating layer exposing the first electrode; hole injecting and hole transporting layers stacked on the first electrode; red, green and blue emitting layer on the hole transporting layer, the red and green emitting layers respectively being in the red and green sub-pixels, and the blue emitting layer being in the first and second blue sub-pixels; electron transporting and electron injecting layers stacked on the red, green and blue emitting layers; and a second electrode on the insulating layer and the electron injecting layer, wherein the first electrode in the second blue sub-pixel has a multi-layered structure of the first electrode layer and at least one metal layer.
US09305978B2 Method of making organic light emitting diode array
A method of making organic light emitting diode array includes following steps. A base having a number of first electrodes on a surface of the base is provided. A first organic layer is located on the surface of the base to cover the number of first electrodes. A first organic light emitting layer is applied on the first organic layer. A template with a first patterned surface with a number of grooves with different depths is provided. The template is attached on the first organic light emitting layer and separated from each other, wherein a number of protruding structures with different heights is formed. A second organic light emitting layer is deposited on a part of the plurality of protruding structures. A second organic layer is located on the organic light emitting layer. A second electrode is applied to electrically connect to the second organic layer.
US09305975B2 3 dimensional semiconductor device having a lateral channel
A 3D semiconductor device and a method of manufacturing the same are provided. The method includes forming a first semiconductor layer including a common source node on a semiconductor substrate, forming a transistor region on the first semiconductor layer, wherein the transistor region includes a horizontal channel region substantially parallel to a surface of the semiconductor substrate, and source and drain regions branched from the horizontal channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, processing the first semiconductor layer to locate the common source node corresponding to the source region, forming a gate in a space between the source region and the drain region, forming heating electrodes on the source region and the drain region, and forming resistance variable material layers on the exposed heating electrodes.
US09305972B2 Magnetic random access memory and method of manufacturing the same
According to one embodiment, a memory includes a semiconductor layer including a trench which extends in a first direction, the trench having a first portion with a first depth and a second portion with a second depth deeper than the first depth, a gate insulating layer covering the semiconductor layer in the first portion, an element isolation layer covering the semiconductor layer in the second portion, the element isolation layer extending in a second direction from the second portion, a gate electrode provided on the gate insulating layer in the first portion and the element isolation layer in the second portion, the gate electrode filling the trench, and a third impurity region provided in the semiconductor layer directly below the second portion, the third impurity region being continuous in the first direction.
US09305971B2 Integrated piezoelectric resonator and additional active circuit
A semiconductor device comprises a semiconductor wafer; a piezoelectric resonator formed on the wafer, and an active circuit also formed on the wafer. The active circuit (e.g., a frequency divider) is electrically connected to the piezoelectric resonator.
US09305970B2 Illumination method and light-emitting device
To provide an illumination method and a light-emitting device which are capable of achieving, under an indoor illumination environment where illuminance is around 5000 lx or lower when performing detailed work and generally around 1500 lx or lower, a color appearance or an object appearance as perceived by a person, will be as natural, vivid, highly visible, and comfortable as though perceived outdoors in a high-illuminance environment, regardless of scores of various color rendition metric. Light emitted from the light-emitting device illuminates an object such that light measured at a position of the object satisfies specific requirements. A feature of the light-emitting device is that light emitted by the light-emitting device in a main radiant direction satisfies specific requirements.
US09305968B2 Die seal ring for integrated circuit system with stacked device wafers
An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.
US09305964B1 Optoelectronic devices with back contact
A semiconductor structure includes an optoelectronic device located in one region of a substrate. A dielectric material is located adjacent and atop the optoelectronic device. A top contact is located within a region of the dielectric material and contacting a topmost surface of the optoelectronic device. A bottom metal contact is located beneath the optoelectronic device and lining a pair of openings located with other regions of the dielectric material, wherein a portion of the bottom metal contact contacts an entire bottommost surface of the optoelectronic device.
US09305963B2 Marking system and method
A system for use in identifying a user includes a portable emitter transported with the user. The emitter includes a quantum cascade laser configured to emit a thermal beam identifying a location of the user in response to a command, the thermal beam having a wavelength between approximately 2 μm and approximately 30 μm.
US09305962B2 Dual-facing camera assembly
Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.
US09305961B2 Wafer-level packaging method of BSI image sensors having different cutting processes
A wafer-level packaging method of BSI image sensors includes the following steps: S1: providing a wafer package body comprising a silicon base, an interconnect layer, a hollow wall and a substrate; S2: cutting the wafer package body via a first blade in a first cutting process to separate the interconnect layer of adjacent BSI image sensors; and S3: cutting the wafer package body via a second blade in a second cutting process to obtain independent BSI image sensors. As a result, damage of the interconnect layer and the substrate may be decreased to improve performance and reliability of the BSI image sensor.
US09305957B2 Imaging apparatus
Provided is an imaging apparatus having a plurality of light receiving parts for each one microlens in order for capturing a three-dimensional image, while being capable of obtaining a more natural image when creating a two-dimensional image. The imaging apparatus includes: a microlens array (2) having a plurality of microlenses (20) regularly aligned two-dimensionally; an imaging lens for imaging light from a subject onto the microlens array (2); and a plurality of light receiving parts (22L, 22R) disposed for each of the plurality of microlenses (20). The plurality of light receiving parts (22L, 22R) associated with each microlens (20) receive the light from the subject that has been imaged onto the microlens and subject the light to photoelectric conversion. The imaging lens has a pupil which is disposed as being out of conjugation with a light receiving plane of the light receiving parts (22L, 22R).
US09305950B2 Solid-state imaging apparatus and imaging system
A solid-state imaging apparatus, comprising a plurality of pixels arrayed on a substrate, and element isolation regions formed between the plurality of pixels on the substrate, wherein the plurality of pixels include a first pixel including a first color filter for passing light having a first wavelength, a second pixel including a second color filter for passing light having a second wavelength longer than the first wavelength, and a pixel for focus detection including a light-shielding pattern arranged on the photoelectric conversion portion to limit light entering the photoelectric conversion portion, and among the element isolation regions, a first region between the pixel for focus detection and the first pixel has a potential barrier against a signal charge, which is lower than that of a second region between the first pixel and the second pixel.
US09305945B2 TFT array substrate, manufacturing method of the same and display device
According to embodiments of the invention, a TFT array substrate, a manufacturing method of the TFT array substrate and a display device are provided. The method comprises: depositing a metal film on a substrate, and forming a gate electrode and a gate line; forming a gate insulating layer and a passivation layer on the substrate; depositing a transparent conductive layer, a first source/drain metal layer and a first ohmic contact layer, and forming a drain electrode, a pixel electrode, a data line, and a first ohmic contact layer pattern provided on the drain electrode; and depositing a semiconductor layer, a second ohmic contact layer and a second source/drain metal layer, and forming a source electrode, a second ohmic contact layer pattern provided below the source electrode, and a semiconductor channel between the source electrode and the drain electrode.
US09305944B2 Liquid crystal display device and method for manufacturing the same
Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.
US09305941B2 Device and method for improving AMOLED driving
Devices and methods for increasing the aperture ratio and providing more precise gray level control to pixels in an active matrix organic light emitting diode (AMOLED) display are provided. By way of example, one embodiment includes disposing a gate insulator and an interlayer dielectric material between a gate electrode of a thin-film transistor of a driving circuit and a channel of the thin-film transistor. The improved structure of the driving circuit facilitates a higher voltage range for controlling the gray level of the pixels, and may increase the aperture ratio of the pixels.
US09305939B2 Semiconductor device with oxide layer as transparent electrode
A semiconductor device has: a first transparent electrode, a drain electrode, and a source electrode formed on a substrate; an oxide layer joined electrically to the source electrode and the drain electrode and containing a semiconductor region; an insulating layer formed on the oxide layer and the first transparent electrode; a gate electrode formed on the insulating layer; and a second transparent electrode formed so as to overlap at least a part of the first transparent electrode with the insulating layer interposed therebetween. The oxide layer and the first transparent electrode are formed of the same oxide film.
US09305933B2 Methods of forming semiconductor memory devices
Methods of fabricating a semiconductor device are provided. The method includes alternately stacking first material layers and second material layers on a substrate to form a stacked structure, forming a through hole penetrating the stacked structure, forming a data storage layer on a sidewall of the through hole, forming a semiconductor pattern electrically connected to the substrate on an inner sidewall of the data storage layer, etching an upper portion of the data storage layer to form a first recessed region exposing an outer sidewall of the semiconductor pattern, and forming a first conductive layer in the first recessed region. Related devices are also disclosed.
US09305929B1 Memory cells
A memory cell includes a select device and a capacitor electrically coupled in series with the select device. The capacitor includes two conductive capacitor electrodes having ferroelectric material there-between. The capacitor has an intrinsic current leakage path from one of the capacitor electrodes to the other through the ferroelectric material. There is a parallel current leakage path from the one capacitor electrode to the other. The parallel current leakage path is circuit-parallel the intrinsic path and of lower total resistance than the intrinsic path. Other aspects are disclosed.
US09305923B1 Low resistance replacement metal gate structure
A first sacrificial gate structure of a first width and a second sacrificial gate structure of a second width greater than the first width are provided on a semiconductor material portion. A dielectric spacer and a planarizing dielectric material are provided surrounding each sacrificial gate structure. Each sacrificial gate structure is then removed forming gate cavities. A high k dielectric material, a metal nitride hard mask and a physical vapor deposited (PVD) amorphous-silicon cap are provided. Vertical portions of the metal nitride hard mask and the high k dielectric material are removed from a portion of each gate cavity. Additional PVD amorphous silicon is then deposited and then all amorphous silicon and remaining metal nitride hard mask portions are removed. A work function portion having a stair-like surface, a diffusion barrier portion, a conductive metal structure and a dielectric cap are then formed into to each of the gate cavities.
US09305919B2 Semiconductor devices including cell-type power decoupling capacitors
A semiconductor device includes an internal circuit and a cell-type power decoupling capacitor. The cell-type power decoupling capacitor is formed on a semiconductor substrate using a stack cell capacitor process. The cell-type power decoupling capacitor stabilizes a supply voltage to provide the stabilized supply voltage to the internal circuit. Accordingly, the semiconductor device including the cell-type power decoupling capacitor may be insensitive to power noise and may occupy a small area on a chip.
US09305917B1 High electron mobility transistor with RC network integrated into gate structure
A high electron mobility transistor includes a buffer region and a barrier region adjoining and extending along the buffer region, the buffer and barrier regions are formed from semiconductor materials having different band-gaps and form an electrically conductive channel from a two-dimensional charge carrier gas. A gate structure is configured to control a conduction state of the channel and includes an electrically conductive gate electrode, a first doped semiconductor region, a second doped semiconductor region, and a resistor. The first doped semiconductor region is in direct electrical contact with a first section of the gate electrode. The second doped semiconductor region is in direct electrical contact with a second section of the gate electrode. The first and second doped semiconductor regions form a p-n junction with one another. The first and second sections of the gate electrode are electrically coupled to one another by the resistor.
US09305915B2 ESD protection circuit
An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a first NMOS transistor coupled to a power line, a second NMOS transistor coupled between the first transistor and a ground, a detection unit, providing a detection signal when an ESD event occurs at the power line, and a trigger unit, turning on the second NMOS transistor and the first NMOS transistor in sequence in response to the detection signal, such that a discharge path is formed from the power line to the ground via the first and second NMOS transistors. The trigger unit includes a first PMOS transistor coupled between the power line and a gate of the second NMOS transistor, a fourth resistor, and a second PMOS transistor, having a gate coupled to the cathode of the diode for receiving the detection signal.
US09305907B2 Optoelectronic integrated device including a photodetector and a MOSFET transistor, and manufacturing process thereof
An optoelectronic integrated device includes a body made of semiconductor material, which is delimited by a front surface and includes a substrate having a first type of conductivity, an epitaxial region, which has the first type of conductivity and forms the front surface, and a ring region having a second type of conductivity, which extends into the epitaxial region from the front surface, and delimiting an internal region. The optoelectronic integrated device moreover includes a MOSFET including at least one body region having the second type of conductivity, which contacts the ring region and extends at least in part into the internal region from the front surface. A photodetector includes a photodetector region having the second type of conductivity, and extends into the semiconductor body starting from the front surface, contacting the ring region.
US09305904B2 Light-emitting diode device
A light-emitting diode device includes a transparent substrate having an edge side, a peripheral region and a central region surrounded by the peripheral region; and a plurality of light-emitting diode units disposed along the peripheral region and having a first light-emitting diode unit with an edge parallel to the edge side. The central region is devoid of any light-emitting diode unit.
US09305901B2 Non-circular die package interconnect
A computing component may consist of a die package that has at least a board, first computing layer, and second computing layer. Dielectric layers can separate each of the board, first computing layer, and second computing layer. The first computing layer may be disposed between the board and second computing layer. One or more interconnects can continuously extend from the second computing layer to the board with a non-circular cross-section shape.
US09305896B2 No flow underfill or wafer level underfill and solder columns
A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another
US09305894B2 Constrained die adhesion cure process
A clamping apparatus applies a force to a workpiece during processing. The clamping apparatus includes a base defining a work area configured to receive a joined structure having multiple elements. The base defines a recess in the work area. An adjustable mechanism is configured to releasably couple to the base and apply a adjustable downward force to the joined structure to bend the joined structure downwardly into the recess during a process. A resilient plunger is part of the adjustable mechanism. The resilient plunger extends downwardly from a top plate of the adjustable mechanism, and the resilient plunger is configured to contact a top of a first element of the joined structure to apply the downward force.
US09305893B1 Semiconductor package having overhang portion and method for manufacturing the same
A method for manufacturing a semiconductor package includes disposing a structural body over one surface of a substrate formed with a plurality of bond fingers and a plurality of dummy bond fingers; forming an overhang portion by stacking a semiconductor chip formed with a plurality of bonding pads and a plurality of dummy bonding pads adjacent to one edge over the structural body such that the one edge projects out of a side surface of the structural body; forming a plurality of dummy wires which electrically couple the dummy bonding pads and the dummy bond fingers; and forming a plurality of conductive wires which electrically couple the bonding pads and the bond fingers after the dummy wires are formed.
US09305891B2 Semiconductor integrated circuit with TSV bumps
A semiconductor integrated circuit is provided. In the semiconductor integrated circuit, each of ESD protection circuitries is disposed between two of TSV bumps arrayed in a matrix, the two being arranged adjacent to each other. First main power lines are disposed to overlap P-channel ESD protection elements. Second main power lines are disposed to overlap N-channel ESD protection elements. The first and second main power lines are arranged orthogonally to each other.
US09305888B2 Integrated antenna structure and array
Some embodiments relate to a semiconductor module having an integrated antenna structure that wirelessly transmits signals. The semiconductor module has a first die having a first far-back-end-of-the-line (FBEOL) metal layer with a ground plane connected to a ground terminal. A second die is stacked onto the first die and has a second FBEOL metal layer with an antenna exciting element that extends to a position that is vertically over the ground plane. One or more micro-bumps are vertically located between the first FBEOL metal layer and the second FBEOL metal layer. The one or more micro-bumps provide a radio frequency (RF) signal between the first FBEOL metal layer and the antenna exciting element of the second FBEOL metal layer. By using micro-bumps to connect the first and second die, the FBEOL metal layers are separated by a large spacing that provides for good performance of the integrated antenna structure.
US09305886B2 Integrated circuits having crack-stop structures and methods for fabricating the same
Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes fabricating a crack-stop structure that extends through a plurality of metallization layers above a semiconductor substrate. The plurality of metallization layers includes a first metallization layer and a second metallization layer that overlies the first metallization layer. Fabricating the crack-stop structure includes forming a first via-bar overlying and coupled to a first metal line of the first metallization layer that is disposed in a first ILD layer of dielectric material. The first via-bar is disposed in a second ILD layer of dielectric material and has a first width. A second metal line of the second metallization layer that is in the second ILD layer is formed overlying and coupled to the first via-bar. The second metal line has a second width that is from about 1 to about 5 times the first width.
US09305884B1 Overlay mark and method for forming the same
An overlay mark applied to a LELE-type double patterning lithography (DPL) process including a first lithography step, a first etching step, a second lithography step and a second etching step in sequence is described. The overlay mark includes a first x-directional pattern and a first y-directional pattern of a previous layer, second x-directional and y-directional patterns of a current layer defined by the first lithography step, and third x-directional and y-directional patterns of the current layer defined by the second lithography step. The second x-directional patterns and the third x-directional patterns are arranged alternately beside the first x-directional pattern. The second y-directional patterns and the third y-directional patterns are arranged alternately beside the first y-directional pattern.
US09305882B2 Interconnect structures incorporating air-gap spacers
A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure.
US09305881B2 Gate metal structure and forming method of the same
A gate metal structure and a forming method of the same are provided. The gate metal structure includes: a substrate and a copper metal layer; and a barrier layer disposed between the substrate and the copper metal layer, the barrier layer being formed of silicon oxynitride SiON or silicon oxide SiOx. By disposing a SiON or SiOx barrier layer between the substrate and the copper metal layer, conductivity and adhesion can be enhanced while reducing diffusion of copper when copper is used as the conductive metal layer material.
US09305873B1 Integrated circuit packaging system with electrical interface and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: forming an isolated contact having a contact protrusion, the contact protrusion having a lower protrusion surface, an upper protrusion surface, and a protrusion sidewall; forming a die paddle, adjacent to the isolated contact, having a die paddle protrusion, the die paddle protrusion having a lower die protrusion surface, an upper die protrusion surface, and a die protrusion sidewall; depositing a contact pad on the contact protrusion; depositing a die paddle pad on the die paddle protrusion; coupling an integrated circuit die to the contact protrusion; and molding an encapsulation on the integrated circuit die.
US09305872B2 DC-DC converter having terminals of semiconductor chips directly attachable to circuit board
A power supply system has a QFN leadframe with leads and a pad. The pad surface facing a circuit board has a portion recessed with a depth and an outline suitable for attaching side-by-side the sync and the control FET semiconductor chips. The input terminal of the control FET and the grounded output terminal of the sync FET are coplanar with the un-recessed portion of the pad (switch node terminal) so that all terminals can be directly attached to contacts of a circuit board. A driver-and-control chip is vertically stacked to the opposite pad surface and encapsulated in a packaging compound.
US09305870B2 Power semiconductor device and preparation method thereof
A preparation method for a power semiconductor device includes: providing a lead frame containing a plurality of chip mounting units, one side edge of a die paddle of each chip mounting unit is bent and extended upwardly and one lead connects to the bent side edge of the die paddle and extends in an opposite direction from the die paddle; attaching a semiconductor chip to the top surface of the die paddle; forming metal bumps on each electrode at the front of the semiconductor chip with a top end of each metal bump protruding out of a plane of the top surface of the lead; heating the metal bump and pressing a top end of each metal bump by a pressing plate forming a flat top end surface that is flush with the top surface of the lead; and cutting the lead frame to separate individual chip mounting units.
US09305867B1 Semiconductor devices and structures
An Integrated Circuit device including: a first layer including first transistors; a first metal layer overlaying the first transistors and providing at least one connection to the first transistors; a second metal layer overlaying the first metal layer; and a second layer including second transistors overlaying the second metal layer, where the second metal layer is connected to provide power to at least one of the second transistors and a connection path between the second transistors and the second metal layer, where the connection path includes at least one through-layer via, and where the through-layer via has a diameter less than 150 nm.
US09305861B2 Method and system for electrically coupling a chip to chip package
A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each converter is able to (1) convert received electromagnetic signals into electronic signals, which it then may relay to leads on the device on which it is disposed; and (2) receive electronic signals from leads on the device on which it is disposed and convert them into corresponding electromagnetic signals, which it may transmit to a corresponding converter on the other device. Not having a direct physical connection between the chip and the chip package decreases the inductive and capacitive effects commonly experienced with physical bonds.
US09305859B2 Integrated circuit die with low thermal resistance
In a bump-on-leadframe semiconductor package a metal bump formed on a integrated circuit die is used to facilitate the transfer of heat generated in a semiconductor substrate to a metal heat slug and then to an external mounting surface. A structure including arrays of thermal vias may be used to transfer the heat from the semiconductor substrate to the metal bump.
US09305857B2 Cooling device, cooling-control method, and storage having program stored thereon
A first cooling unit is provided for an exothermic member and has a capability of cooling the exothermic member to a temperature less than an ambient temperature of the exothermic member by absorbing heat from the exothermic member. A second cooling unit has a capability of cooling the exothermic member by blowing air onto the exothermic member. A temperature of the exothermic member is detected. It is determined that whether or not the exothermic member is in a supercooled state based on a detection result. The cooling capability of the first cooling unit is decreased and the cooling capability of the second cooling unit is increased, when the exothermic member is in the supercooled state.
US09305856B2 Post-passivation interconnect structure AMD method of forming same
A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure.
US09305854B2 Semiconductor device and method of forming RDL using UV-cured conductive ink over wafer level package
A semiconductor device has a semiconductor die and first insulating layer formed over the semiconductor die. A patterned trench is formed in the first insulating layer. A conductive ink is deposited in the patterned trench by disposing a stencil over the first insulating layer with an opening aligned with the patterned trench and depositing the conductive ink through the opening in the stencil into the patterned trench.Alternatively, the conductive ink is deposited by dispensing the conductive ink through a nozzle into the patterned trench. The conductive ink is cured by ultraviolet light at room temperature. A second insulating layer is formed over the first insulating layer and conductive ink. An interconnect structure is formed over the conductive ink. An encapsulant can be deposited around the semiconductor die. The patterned trench is formed in the encapsulant and the conductive ink is deposited in the patterned trench in the encapsulant.
US09305852B1 Silicon package for embedded electronic system having stacked semiconductor chips
An electronic system comprises a first chip (101) of single-crystalline semiconductor including a first electronic device embedded in a second chip (102) of single-crystalline semiconductor shaped as a container having a slab (104) bordered by ridges (103), and including a second electronic device. The nested chips are assembled in a container of low-grade silicon shaped as a slab 130 bordered by retaining walls 131 and including conductive traces and terminals. The first electronic device is connected to the second electronic device by attaching the first chip onto the slab of the second chip; and the first and second electronic devices are connected to the container by embedding the second chip in the container, wherein the nested first and second chips operate as an electronic system and the container operates as the package of the system. For first and second devices as field effect transistors, the system is a power block.
US09305846B2 Device isolation in FinFET CMOS
Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material (e.g., silicon, or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of replacement fins to prevent carrier spill-out to the replacement fins.
US09305845B2 Self-aligned quadruple patterning process
Methods for modifying a spacer and/or spaces between spacers to enable a fin cut mask to be dropped between the spacers are provided. A first set of second mandrel structures having a first width is formed on facing sidewall surfaces of a neighboring pair of first mandrel structures and a second set of second mandrel structures having a second width less than the first width are formed on non-facing sidewall surfaces of the neighboring pair of first mandrel structures. Each first mandrel structure is removed and a spacer is formed on a sidewall surface of the first and second sets of second mandrel structures. In the region between the neighboring pair of first mandrel structure, a merged spacer is formed. The first and second sets of second mandrel structures are removed. A portion of an underlying substrate can be patterned utilizing each spacer and the merged spacer as etch masks.
US09305841B2 Method of patterning a feature of a semiconductor device
A method including forming a trench over a layer disposed on a semiconductor substrate. The trench is filled with a first material to form a filled trench. A feature of a second material is formed over the filled trench. The feature is disposed over the filled trench and extends along two opposing sidewalls of the filled trench to a top surface of the layer. The feature is then planarized to expose a top surface of the filled trench and provide a first portion of the feature adjacent a first sidewall of the two opposing sidewalls of the filled trench and a second portion of the feature adjacent a second sidewall of the two opposing sidewalls of the filled trench. The first and second portions of the feature are used to define a dimension of an interconnect feature disposed over the semiconductor substrate.
US09305836B1 Air gap semiconductor structure with selective cap bilayer
A semiconductor substrate including one or more conductors is provided. A first layer and a second layer are deposited on the top surface of the conductors. A dielectric cap layer is formed over the semiconductor substrate and air gaps are etched into the dielectric layer. The result is a bilayer cap air gap structure with effective electrical performance.
US09305834B1 Methods for fabricating integrated circuits using designs of integrated circuits adapted to directed self-assembly fabrication to form via and contact structures
Methods for fabricating integrated circuits using directed self-assembly to form via and contact holes are disclosed. An exemplary method includes determining a natural, hexagonal separation distance L0 between cylinders formed in a block copolymer (BCP) material during directed self-assembly (DSA) and determining an integrated circuit feature pitch PA according to the following formula: PA=L0*(sqrt(3)/2)*n, wherein n is a positive integer. The method further includes generating an integrated circuit layout design better accommodating the natural formation arrangement of polymeric cylinders, wherein integrated circuit features are spaced in accordance with the integrated circuit feature pitch PA and wherein via or contact structures are physically and electrically connected to the integrated circuit features and fabricating the integrated circuit features and the via or contact structures on a semiconductor work-in-process (WIP) in accordance with the integrated circuit layout design, wherein the via or contact structures are fabricated utilizing DSA with BCP material.
US09305832B2 Dimension-controlled via formation processing
Methods are provided for dimension-controlled via formation over a circuit structure, including over multiple adjacent conductive structures. The method(s) includes, for instance, providing a patterned multi-layer stack structure above the circuit structure, the stack structure including at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening; providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening; and etching through the at least one layer of the stack structure using the at least one dimension-controlled via opening to facilitate providing the via(s) over the circuit structure. In one implementation, the stack structure includes a trench-opening within a patterned hard mask layer disposed between a dielectric layer and a planarization layer, and the via(s) is partially self-aligned to the trench.
US09305831B2 Integrated metal spacer and air gap interconnect
Embodiments described herein relate to methods for forming an air gap interconnect. A metal spacer layer is conformally deposited on a substrate having mandrel structures formed thereon. The metal spacer layer is etched to form spacer features and the mandrel structures are removed from the substrate. Various other dielectric deposition, patterning and etching steps may be performed to desirably pattern materials present on the substrate. Ultimately, a trench is formed between adjacent spacer features and a capping layer is deposited over the trench to form an air gap between the adjacent spacer features. For packaging purposes, an interconnect via may be configured to contact at least one of the spacer features adjacent the air gap.
US09305830B2 Methods of fabricating semiconductor devices
A method of fabricating a semiconductor device includes forming a stacked structure in which 2n (here, n is an integer which is 2 or more) deposited sacrificial layers and 2n deposited insulating layers disposed on the 2n deposited sacrificial layers respectively are alternately deposited in a third direction perpendicular to a first direction and a second direction on a substrate having an upper surface extending in the first and second directions which are perpendicular to each other. Methods include forming a recess group including 2n−1 first recesses penetrating 20 through 2n−1 deposited sacrificial layers and forming a buried insulating layer group including 2n−1 buried insulating layers filling the 2n−1 first recesses respectively. A contact plug group including 2n contact plugs penetrating an uppermost deposited insulating layer of the 2n deposited insulating layers and the 2n−1 buried insulating layers may be formed.
US09305829B2 Semiconductor package with an indented portion and manufacturing method thereof
A semiconductor package includes a substrate, at least one electronic device, a lead frame, and a molded portion. The substrate has at least one indented portion formed as a groove therein. The electronic device is mounted on one surface of the substrate. The lead frame is bonded to the substrate and electrically connected to the electronic device. The molded portion seals the lead frame and the electronic device and includes at least one through hole extending the indented portion.
US09305827B2 Handle substrates of composite substrates for semiconductors
A composite substrate for a semiconductor includes a handle substrate 11 and a donor substrate bonded to a surface of the handle substrate 11 directly or through a bonding layer. The handle substrate 11 is composed of an insulating polycrystalline material, a surface 15 of the handle substrate 11 has a microscopic central line average surface roughness Ra of 5 nm or smaller, and recesses 6 are formed on the surface of the handle substrate.
US09305823B2 Semiconductor device including STI structure and fabrication method
Semiconductor devices including STI structures and their fabrication methods are provided. A mask layer is provided on a semiconductor substrate and patterned to form an opening in the mask layer to expose a surface portion of the semiconductor substrate. A trench is then formed in the semiconductor substrate by etching along the opening. A first dielectric layer is formed in the trench and has a top surface lower than a top surface of the semiconductor substrate to provide an uncovered sidewall surface of the trench in the semiconductor substrate. An epitaxial layer is formed on the uncovered sidewall surface of the trench in the semiconductor substrate. The epitaxial layer includes a spacing to expose a surface portion of the first dielectric layer. A second dielectric layer is formed on the exposed surface portion of the first dielectric layer to fill the spacing formed in the epitaxial layer.
US09305821B2 Apparatus and method for manufacturing an integrated circuit
An apparatus for manufacturing an integrated circuit having a thick film metal layer includes an applicator configured to selectively apply a paste on a heat-conducting substrate. The paste includes particles of a first metal constituent of particles having sizes substantially within a narrow predetermined range about a predetermined size. The apparatus further includes a radio frequency (RF) generator to selectively inductively coupling RF energy into the paste. The first metal particles of the predetermined size are inductively couplable with the RF energy, and the frequency of the RF energy corresponds to a coupling frequency of the first metal particles of the predetermined size so that the inductive heating of the first metal particles is substantially maximized.
US09305820B2 Substrate processing apparatus and method of manufacturing semiconductor device
A stable and highly reliable device for detecting damage or contact failures of respective parts is provided. The device includes a processing chamber for processing a substrate; a heater for heating the substrate; a substrate support accommodating the heater and installed inside the processing chamber; a shaft for supporting the substrate support; a wire inserted through the shaft; a supporting unit for holding the wire; and a temperature detector connected to the supporting unit.
US09305816B2 Methods and devices for securing and transporting singulated die in high volume manufacturing
A method includes identifying a wafer position for a plurality of die on a wafer, storing the wafer position for each of the plurality of die in a database, dicing the wafer into a plurality of singulated die, positioning each of the singulated die in a die position location on a tray, and storing the die position on the tray for each of the singulated die in the database. The database includes information including the wafer position associated with each die position. The tray is transported to a processing tool, and at least one of the plurality of singulated die is removed from the die position on the tray and processed in the processing tool. The processed singulated die is replaced in the same defined location on the tray that the singulated die was positioned in prior to the processing. Other embodiments are described and claimed.
US09305813B2 Pressure transmitting device for bonding chips onto a substrate
This invention relates to a pressure transmission apparatus for bonding a plurality of chips to a substrate. The pressure transmission apparatus includes a pressure body for applying a bonding force which acts in the bonding direction (B) to the chip. The pressure body has a first pressure side and an opposite second pressure side, both oriented to be transverse to the bonding direction (B). Fixing means are provided to attach to the periphery of the pressure transmission apparatus for fixing of the pressure transmission apparatus on a retaining body in the bonding direction (B). A sliding layer is provided for sliding motion of the pressure body transversely to the bonding direction (B).
US09305810B2 Method and apparatus for fast gas exchange, fast gas switching, and programmable gas delivery
Embodiments of the invention relate to a gas delivery system. The gas delivery system includes a fast gas exchange module in fluid communication with one or more gas panels and a process chamber. The fast gas exchange module has first and second sets of flow controllers and each of first and second sets of flow controllers has multiple flow controllers. The flow controller is configured such that each of the flow controllers in the first and second sets of the flow controllers is independently operated to selectively open to divert gas to the process chamber or an exhaust. The first and second sets of flow controllers are operated for synchronized switching of gases in a pre-determined timed sequence of flow controller actuation. The invention enables fast switch of resultant gas flow in the process chamber while having individual flow controller operated at lower switching speed to provide longer service life.
US09305809B1 Integrated circuit packaging system with coreless substrate and method of manufacture thereof
An integrated circuit packaging system and method of manufacture thereof includes: discrete components coupled to a top trace; vias attached to the top trace separated from the discrete components; a dielectric layer on the top trace, the discrete components, and the vias, includes a component surface formed above the discrete components, with the top trace coplanar with the dielectric layer; and system interconnects coupled to the vias for electrically connecting the top trace, the discrete components, or a combination thereof to the system interconnects.
US09305806B2 Chemical mechanical polishing slurry compositions and method using the same for copper and through-silicon via applications
Provided are novel chemical mechanical polishing (CMP) slurry compositions for polishing copper substrates and method of using the CMP compositions. The CMP slurry compositions deliver superior planarization with high and tunable removal rates and low defects when polishing bulk copper layers of the nanostructures of IC chips. The CMP slurry compositions also offer the high selectivity for polishing copper relative to the other materials (such as Ti, TiN, Ta, TaN, and Si), suitable for through-silicon via (TSV) CMP process which demands high copper film removal rates.
US09305796B2 Methods for etching silicon using hydrogen radicals in a hot wire chemical vapor deposition chamber
Methods for etching silicon using hydrogen radicals in a hot wire chemical vapor deposition process are provided herein. In some embodiments, a method of processing a substrate having a crystalline silicon layer atop the substrate and a patterned masking layer atop the crystalline silicon layer exposing portions of the crystalline silicon layer; the method may include (a) exposing the substrate to a plasma formed from an inert gas wherein ions from the plasma amorphize a first part of the exposed portions of the crystalline silicon layer; and (b) exposing the substrate to hydrogen radicals generated from a process gas comprising a hydrogen-containing gas in a hot wire chemical vapor deposition (HWCVD) process chamber to etch the amorphized first part of the exposed portion of the crystalline silicon layer.
US09305794B2 Etching method and etching composition
An etching method is disclosed. A substrate is provided. An etching is performed to form at least one opening in the substrate. An auxiliary etching layer is formed in the opening to cover at least one etching residue. The auxiliary etching layer includes a media, a carrier and an etching component encapsulated by the carrier. A treatment process is performed to the auxiliary etching layer. The treatment process includes applying an energy to the auxiliary etching layer or exposing the auxiliary layer to a gas, so that the carrier breaks in the treatment and thereby the etching component is released to etch the etching residue.
US09305790B2 Device and method for knife coating an ink based on copper and indium
The device for knife coating a layer of ink based on copper and indium on a substrate includes a supply tank of an ink, said tank collaborating with a coating knife. In addition, the device includes means that allow the ink, the substrate and the coating knife to be kept at different and increasing respective temperatures.
US09305789B2 Semiconductor device comprising an active layer and a Schottky contact
A semiconductor device comprising at least one active layer on a substrate and a a Schottky contact to the at least one active layer, the Schottky contact comprising a body of at least titanium and nitrogen that is electrically coupled with the at least one active layer.
US09305786B2 Semiconductor device and fabrication method
A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
US09305785B2 Semiconductor contacts and methods of fabrication
Embodiments of the present invention provide an improved structure and method of contact formation. A cap nitride is removed from a gate in a region that is distanced from a fin. This facilitates reduced process steps, allowing the gate and the source/drain regions to be opened in the same process step. Extreme Ultraviolet Lithography (EUVL) may be used to pattern the resist to form the contacts.
US09305783B2 Nanometric imprint lithography method
A nanoimprint lithography method, including: pressing a mold in a photosensitive resin to form at least one imprint pattern defined by a stamped area and an adjacent area, the adjacent area being less stamped or not stamped at all, and being thicker than the stamped area; and exposure to a certain amount of sunlight. Respective thicknesses of the two areas are defined such that the two areas absorb a different amount of the sunlight and the amount of sunlight provided by the exposure is predetermined so as to be great enough to activate the resin in whichever of the two areas has the greater absorption, and so as not to be great enough to activate the other of the two areas.
US09305781B1 Structure and method to form localized strain relaxed SiGe buffer layer
A method includes forming a multilayered structure by providing a substrate having a semiconductor layer disposed on a top surface thereof, the semiconductor layer containing misfit dislocations and associated threading dislocations. The method further includes depositing a tensile strained dielectric layer on a top surface of the semiconductor layer to induce a compressive strain in the semiconductor layer and annealing the multilayered structure to cause the misfit dislocations and associated threading dislocations to propagate within the semiconductor layer. The method further immobilizes the propagating misfit dislocations and associated threading dislocations in a predetermined portion of the semiconductor layer. A multilayered structure formed by the method is disclosed wherein a semiconductor layer contains misfit dislocations and associated threading dislocations that are immobilized within a predetermined portion of the semiconductor layer, where other portions of the semiconductor layer surrounding the predetermined portion are locally strain relaxed portions.
US09305763B2 Lighting apparatus
A lighting apparatus having a magnetron configured to generate microwaves, a waveguide including a wave guide space configured to introduce and guide the microwaves and an aperture to discharge the microwaves, a resonator to which the microwaves are transmitted through the aperture, and a bulb located in the resonator, the bulb encapsulating a light emitting material and configured to emit light based on the transmitted microwaves is provided. The apparatus also includes a reflective member or optical member located in the resonator such that light emitted from the bulb towards the aperture is reflected away from the aperture.
US09305758B2 Interface for mass spectrometry apparatus
There is provided an interface for use in sampling ions in a mass spectrometer, the interface being arranged for receiving a quantity of ions from an ion source and forming more than one ion beam therefrom, each ion beam being directed along a respective desired pathway.
US09305754B2 Magnet module having epicyclic gearing system and method of use
This disclosure relates to a magnet assembly including an epicyclic gearing system. The epicyclic gearing system including a central gear configured to be rotated, at least one peripheral gear connected to the central gear and configured to rotate and translate relative to the central gear, and an annulus surrounding the at least one peripheral gear and connected with the at least one peripheral gear. The magnet assembly further includes a magnet module connected with the epicyclic gearing system, the magnet module including a support connected with the at least one peripheral gear, the axis of rotation of the support being coaxial with the axis of rotation of the at least one peripheral gear connected with the support.
US09305753B2 Thickness change monitor wafer for in situ film thickness monitoring
An etch rate monitor apparatus has a substrate, an optical element and one or more optical detectors mounted to a common substrate with the one or more detectors sandwiched between the substrate and optical element to detect changes in optical interference signal resulting from changes in optical thickness of the optical element. The optical element is made of a material that allows transmission of light of a wavelength of interest. A reference waveform and data waveform can be collected with the apparatus and cross-correlated to determine a thickness change. This abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09305751B2 Microwave plasma processing apparatus and microwave supplying method
A microwave plasma processing apparatus includes a processing space; a microwave generator which generates microwaves for generating a plasma; a distributor which distributes the microwaves to a plurality of waveguides; an antenna installed in a processing container to seal the processing space and to radiate microwaves distributed by the distributor, to the processing space; and a monitor unit configured to monitor a voltage of each of the plurality of waveguides. A control unit acquires a control value of a distribution ratio of the distributor, which corresponds to a difference between a voltage monitor value of the monitor unit and a predetermined voltage reference value, from a storage unit that stores the difference and the control value corresponding to each other. The control unit is also configured to control the distribution ratio of the distributor, based on the acquired control value.
US09305750B2 Adjusting current ratios in inductively coupled plasma processing systems
A plasma processing system for generating plasma to process at least a wafer. The plasma processing system may include a first coil for conducting a first current for sustaining at least a first portion of the plasma. The plasma processing system may also include a second coil for conducting a second current for sustaining at least a second portion of the plasma. The plasma processing system may also include a power source for powering the first current and the second current. The plasma processing system may also include a parallel circuit for adjusting one of the amperage of the first current and the amperage of the second current. The parallel circuit may be electrically coupled between the power source and at least one of the first coil and the second coil. The parallel circuit may include an inductor and a variable capacitor electrically connected in parallel to each other.
US09305749B2 Methods of directing magnetic fields in a plasma source, and associated systems
A plasma source includes a plasma vessel that includes a dielectric material that encloses a cavity of a toroidal shape. The toroidal shape defines a toroidal axis therethrough. The vessel forms input and output connections, each of the input and output connections being in fluid communication with the cavity. One or more metal plates are disposed adjacent to the plasma vessel for cooling the plasma vessel. A magnetic core is disposed along the toroidal axis such that respective first and second ends of the magnetic core extend beyond axially opposed sides of the plasma vessel. First and second induction coils are wound about the respective first and second ends of the magnetic core. A plasma is generated in the cavity when an input gas is supplied through the input connection and an oscillating electrical current is supplied to the first and second induction coils.
US09305746B2 Pre-aligned nozzle/skimmer
A method of assembling a nozzle/skimmer module includes coupling a nozzle assembly and skimmer cartridge assembly in a rigid tandem configuration to more accurately control the formation of the Gas Cluster Ion Beam (GCIB). The nozzle/skimmer module is pre-aligned before installation in a production GCIB processing system to more accurately position the GCIB.
US09305741B2 Desktop electron microscope and wide range tunable magnetic lens thereof
A wide range tunable magnetic lens for the desktop electron microscope is provided. The wired range tunable magnetic lens comprises a coil support, an inner pole piece, a permanent-magnet, a first outer pole piece and a second outer pole piece. The inner pole piece covers the coil support and forms a first magnetic-circuit gap. The permanent-magnet forms a ring structure according to the central axis and is disposed at the outer side of the inner pole piece away from the central axis. The first outer pole piece is adjacently disposed at the upper-side of the permanent-magnet and extends to the central hole of the coil support. The second outer pole piece is adjacently disposed at the under-side of the permanent-magnet and extends to the central hole of the coil support, wherein the first outer pole piece and the second outer pole piece forms a second magnetic-circuit gap.
US09305740B2 Charged particle beam system and method of operating thereof
A charged particle beam device is described. In one aspect, the charged particle beam device includes a charged particle beam source, and a switchable multi-aperture for generating two or more beam bundles from a charged particle beam which includes: two or more aperture openings, wherein each of the two or more aperture openings is provided for generating a corresponding beam bundle of the two or more beam bundles; a beam blanker arrangement configured for individually blanking the two or more beam bundles; and a stopping aperture for blocking beam bundles. The device further includes a control unit configured to control the individual blanking of the two or more beam bundles for switching of the switchable multi-aperture and an objective lens configured for focusing the two or more beam bundles on a specimen or wafer.
US09305738B2 Electron emission device and reflex klystron with the same
An electron emission device includes an anode, a cathode, an electron emitter structure, and an electron extraction electrode. The cathode is spaced from the anode. The electron emitter structure is electrically connected to the cathode. The electron extraction electrode is insulated from the cathode. The electron extraction electrode defines a through hole surrounded by a sidewall, and the electron emitter structure faces to the sidewall. The electron emitter structure includes a number of electron emitters extending toward the sidewall, each of the number of electron emitters includes an electron emission terminal, a first distance between each electron emission terminal and the sidewall is substantially the same, a second distance between the electron emission terminal and the anode is greater than or equal to 10 micrometers and smaller than or equal to 200 micrometers, and a pressure in the electron emission device is smaller than or equal to 100 Pascal.
US09305736B2 Phosphor for dispersion-type EL, dispersion-type EL device, and method of manufacturing the same
Provided is a phosphor for a dispersion-type EL that may be manufactured in a simple process and may provide stable, high brightness and light emission efficiency. The phosphor for a dispersion-type EL according to the present invention includes a mixture of an electron-accepting phosphor particle (4A) and an electron-donating phosphor particle (4B). The electron-accepting phosphor particle (4A) includes a base particle and an acceptor element added thereto, and the electron-donating phosphor particle (4B) includes a base particle and a donor element added thereto. For example, the base particle is a ZnS particle, the acceptor element is Cu, and the donor element is Cl or Al.
US09305731B2 Supply system for an aircraft, use of a shielded supply line in an aircraft and an aircraft with a supply system
A supply system for supplying energy in an aircraft includes at least one electrical line including at least one core connectable to a pole of a current source, an electrically conductive shield, and a detection unit having at least two electrical inputs. The shield surrounds the at least one core under a distance and creates an intermediate space between the at least one core and the shield. At least one port of the detection unit is connected to the at least one core. At least another port of the detection unit is connected to at least one of the shield and the at least one core. The detection unit is adapted for detecting a differential current over the at least one core or an absolute current between the shield and a ground potential for generating a warning signal if a predetermined threshold value for the detected current value is exceeded.
US09305729B2 Capacitive driven normal relay emulator using voltage boost
A normal relay emulator is described. The normal relay emulator may include a trigger circuit configured to detect a condition on a first power rail, the first power rail having a first voltage supply level. A boost converter electrically coupled to the first power rail and configured to boost the first voltage supply level to a second, higher, voltage supply level is provided. A bi-stable relay having a first terminal and a second terminal and an actuator electrically coupled to the boost converter and communicatively coupled to the trigger circuit is also provided. The actuator may be configured to energize the bi-stable relay using the second voltage supply level such that electrical contact between the first terminal and the second terminal changes between a first state and a second state based on the trigger circuit detecting the condition.
US09305725B2 Switching apparatus
Provided are: a vacuum interrupter having a fixed contact and a movable contact; a fixed side mounting plate which supports a fixed side conductor; and an operating mechanism which is coupled to a movable side conductor and performs opening and closing operation of both the contacts. The fixed side mounting plate is configured such that a plurality of plate-like members are overlapped; an exposed portion of the fixed side conductor is attached with a divided terminal which has a fitting hole to be fitted to the exposed portion and is formed with a slit in a radial direction from the fitting hole; and the divided terminal is fixed to the fixed side mounting plate and the fixed side conductor is supported by the fixed side mounting plate via the divided terminal.
US09305723B2 Strip type off-circuit tap changer
One aspect of the present invention, a strip type off-circuit tap changer includes an insulating rod and a support, where an operation positioning device is arranged on the support, a rack mobile frame is disposed on the insulating rod, the rack of the rack mobile frame is engaged to a drive gear of the operation positioning device, columnar fixed contacts are longitudinally arranged at a spacing on the insulating rod, the rack mobile frame is connected to a moving contact frame, and a moving contact assembly is arranged on the moving contact frame and fits with the fixed contacts on the insulating rod, the moving contact assembly is formed by an annular moving contact and an elastic pin, and the annular moving contact spans between two adjacent columnar fixed contacts.
US09305722B2 Keyboard backlight system
Disclosed systems provide keyboard backlighting from organic light emitting diodes (OLEDs) placed under the keys. A keyboard stack optionally includes a light guide or reflector. A single OLED can illuminate multiple keys through a light guide. OLEDs used for backlighting may be arranged in a strip to illuminate more than one key. OLEDs can be deposited directly to the light guide or reflector, and can include a seal to promote air stability.
US09305720B2 Electrical signal switch connector structure
An electrical signal switch connector structure is provided, mainly including an insulating case, an elastic terminal, a fixing terminal, and a shielding case. The insulating case respectively accommodates the elastic terminal and the fixing terminal. The elastic terminal has an elastic arm, and the elastic arm of the elastic terminal has a cutting gap. The fixing terminal has a fixing arm, and the elastic arm of the elastic terminal is elastically pressed against the fixing arm of the fixing terminal. An inlet hole of the insulating case is used for passing a terminal of a butting connector therein, and the shielding case wraps the insulating case profile such that an ambient extraneous matter is not attached to the elastic arm of the elastic terminal.
US09305716B2 Rechargeable electrochemical energy storage device
A rechargeable energy storage device is disclosed. In at least one embodiment the energy storage device includes an air electrode providing an electrochemical process comprising reduction and evolution of oxygen and a capacitive electrode enables an electrode process consisting of non-faradic reactions based on ion absorption/desorption and/or faradic reactions. This rechargeable energy storage device is a hybrid system of fuel cells and ultracapacitors, pseudocapacitors, and/or secondary batteries.
US09305715B2 Method of formulating perovskite solar cell materials
A method for preparing photoactive perovskite materials. The method comprises the step of preparing a lead halide precursor ink. Preparing a lead halide precursor ink comprises the steps of: introducing a lead halide into a vessel, introducing a first solvent to the vessel, and contacting the lead halide with the first solvent to dissolve the lead halide. The method further comprises depositing the lead halide precursor ink onto a substrate, drying the lead halide precursor ink to form a thin film, annealing the thin film, and rinsing the thin film with a second solvent and a salt.
US09305707B2 Method for manufacturing ceramic electronic component and ceramic electronic component including cross-linked section
In a ceramic electronic component, a first internal electrode includes a first opposed section and a first extraction section. The first opposed section is opposed to a second internal electrode with a ceramic layer interposed therebetween. The first extraction section is located closer to a first end surface than the first opposed section. The first extraction section is connected to a first external electrode. The number of cross-linked sections per unit area in the first extraction section is less than the number of cross-linked sections per unit area in the first opposed section.
US09305703B2 Systems for producing precision magnetic coil windings
A wire disposing assembly having a support, an axial traverser sub-assembly, a support arm, and a linear stage is provided. The support is configured to receive a plurality of turns of a wire, where the support is configured to rotate. The axial traverser sub-assembly is operatively coupled to the support. Further, a rate of motion of the axial traverser sub-assembly is coupled to a speed of rotation of the support. The support arm includes a resin unit configured to dispose resin on at least a portion of the wire, and a wire disposing device configured to guide a portion of the wire being disposed on a surface of the support. The linear stage is operatively coupled to the support arm.
US09305702B2 Surface-mount inductor and production method thereof
[Technical Problem]This invention provides a surface-mount inductor that is capable of positioning a coil in a predetermined position in a mold, thereby to position the coil in a predetermined position of a core and to prevent led-out ends from being buried in the core.[Solution to the Problem]A surface-mount inductor of the present invention comprises: a coil formed by winding a winding wire; and a core containing a magnetic powder and including the coil therein. The coil has opposite led-out ends, each of which is exposed on respective ones of opposed side surfaces of the core. Each of the led-out ends of the coil is connected to an external electrode formed on the core.
US09305700B2 Auto resonant driver for wireless power transmitter sensing required transmit power for optimum efficiency
An auto-resonant driver for a transmitter inductor drives the inductor at an optimal frequency for maximum efficiency. The transmitter inductor is magnetically coupled, but not physically coupled, to a receiver inductor, and the current generated by the receiver inductor is used to power a load. The system may be used, for example, to remotely charge a battery (as part of the load) or provide power to motors or circuits. A feedback circuit is used to generate the resonant driving frequency. A detector in the transmit side wirelessly detects whether there is sufficient current being generated in the receiver side to achieve regulation by a voltage regulator powering the load. This point is achieved when the transmitter inductor peak voltage suddenly increases as the driving pulse width is ramped up. At that point, the pulse width is held constant for optimal efficiency.
US09305698B2 Coil component
A coil component is provided with a coil, a base supporting the coil having a first surface parallel to an extending direction of the terminal section of the coil, and a terminal electrode having a first terminal portion printed on the first surface of the base. The first surface has a stepped surface including an upper stage surface and a lower stage surface. The first terminal portion has a stepped shape including an upper stage portion formed on the upper stage surface and a lower stage portion formed on the lower stage surface. The upper stage portion has a first terminal surface contacting the terminal section of the coil. The lower stage portion has a second terminal surface positioned on an extension line of the terminal section of the coil and not contacting the terminal section of the coil.
US09305696B2 Stacked inductor
A stacked inductor is provided with a conductive frame including a top surface, two side surfaces depending downward from the top surface, two spaced bottom surfaces each inward bending from a bottom of either side surface, an upper space defined by the top surface, the side surfaces, and the bottom surfaces, two vertical legs each depending downward from either bottom surface, two supports each inward bending from a bottom of either leg, and a lower space defined by the bottom surfaces, the legs, and the supports; an upper core including a bottom groove; an intermediate core; and a lower core including a top groove. The bottom groove is on the top surface, the intermediate core is in the upper space, the lower core is in the lower space and supported by the supports. The upper, intermediate, and lower cores are magnetically connected together.
US09305694B2 Oil-immersed solenoid
An oil-immersed solenoid is provided with a casing including a base, a cylinder, and a flange in an integral manner, a fixed magnetic pole, a plunger having an armature, a guide pipe, a coil unit including a bobbin around which a coil is wound, and a cover, the fixed magnetic pole is integrated with the casing, and in the state where the plunger, the guide pipe, the coil unit, and the cover are attached in the cylinder of the casing, a front end of the cylinder is swaged, thereby holding the plunger, the guide pipe, the coil unit, and the cover in the casing.
US09305693B2 Bistable electromagnetic actuating apparatus, armature assembly and camshaft adjustment apparatus
A bistable electromagnetic actuating apparatus (1) having an actuating element (2), which forms an engagement region (4) at the end and can be moved axially between two end positions, in particular for engaging in a control groove in a cam of an internal combustion engine, and having a coil device (11) which is provided in a stationary manner relative to the actuating element (2) and is designed to exert a force on said actuating element, wherein the actuating element (2) has permanent magnets (5) which are designed to interact with a core region (3) which is provided in a stationary manner relative to the actuating element (2), and wherein the coil device (11) is designed to generate a counterforce, which counteracts a retaining force of the permanent magnets (5) and releases said permanent magnets from the core region (3), in response to an electronic actuation signal, and wherein a spring is arranged such that it applies a spring force to the actuating element (2) in an axial direction which faces away from the core region (3).
US09305692B2 Ionization by magnetic induction for natural gas
A magnetic ionization device is disclosed that reduces harmful Greenhouse Gases produced by the incomplete combustion of liquid or gaseous fossil fuels and increases performance efficiency. The magnetic ionization device comprises a pair of brackets secured together around a natural gas line, and at least two permanent rare earth magnet secured to the pair of brackets. The pair of brackets each comprises an interior surface and an exterior surface, and are generally curved or C-shaped. Furthermore, the brackets comprise a recess for receiving a portion of a natural gas line. Once the permanent rare earth magnets are secured to the brackets, the brackets and magnets can be coated with plastic, powder metal, or any other suitable protective layer as is known in the art. The pair of brackets is then secured together around a natural gas line via plastic ties, nuts, bolts, and/or washers, etc.
US09305682B2 Thermally tuned coaxial cable for microwave antennas
A coaxial cable, including an inner conductor and an outer conductor surrounding the inner conductor and a thermally responsive material positioned between the outer conductor and the inner conductor. The outer conductor is in a generally concentric relationship to the inner conductor and the inner and outer conductors are adapted to connect to an energy source. A thermal change in the thermally responsive material alters the generally concentric relationship between the outer conductor and the inner conductor.
US09305681B2 High-voltage conductive path and wiring harness
A wiring harness including a high-voltage conductive path having a shape holding function for holding a shape along an arrangement pathway. The high-voltage conductive path includes a positive electrode conductor, a first insulator extruded and arranged outside of the positive electrode conductor, a negative electrode arranged outside of the first insulator, a second insulator extruded and arranged outside of the negative electrode conductor, a shield member wrapped outside of the second insulator, first and second sheaths extruded and arranged outside of the shield member.
US09305679B2 Vinyl chloride resin composition, electric wire and cable
A vinyl chloride resin composition includes 55 to 70 parts by mass of a plasticizer, 20 to 65 parts by mass of a metal hydrate and 0.3 to 3 parts by mass of a polytetrafluoroethylene per 100 parts by mass of a vinyl chloride resin. The polytetrafluoroethylene includes a fibril-forming polytetrafluoroethylene and a non-fibril-forming polytetrafluoroethylene.
US09305667B1 Nuclear fuel alloys or mixtures and method of making thereof
Nuclear fuel alloys or mixtures and methods of making nuclear fuel mixtures are provided. Pseudo-binary actinide-M fuel mixtures form alloys and exhibit: body-centered cubic solid phases at low temperatures; high solidus temperatures; and/or minimal or no reaction or inter-diffusion with steel and other cladding materials. Methods described herein through metallurgical and thermodynamics advancements guide the selection of amounts of fuel mixture components by use of phase diagrams. Weight percentages for components of a metallic additive to an actinide fuel are selected in a solid phase region of an isothermal phase diagram taken at a temperature below an upper temperature limit for the resulting fuel mixture in reactor use. Fuel mixtures include uranium-molybdenum-tungsten, uranium-molybdenum-tantalum, molybdenum-titanium-zirconium, and uranium-molybdenum-titanium systems.
US09305663B2 Techniques for assessing pass/fail status of non-volatile memory
Examples are disclosed for assessing pass/fail status of non-volatile memory. In some examples, information may be received to indicate a block having memory pages associated with non-volatile memory cells. The information may indicate at least some of the memory pages have bit errors in excess of an error correction code (ECC) ability to correct. For these examples, the block may be selected for read testing. Read testing may include programming the memory pages with a known pattern and waiting a period of time. Following the period of time each memory page may be read and if a resulting pattern read matches the known pattern programmed to each memory page, the memory page passes. The block may be taken offline if the number of passing memory pages is below a pass threshold number. Other examples are described and claimed.
US09305661B2 Nonvolatile memory system that uses programming time to reduce bit errors
A nonvolatile memory system and a method for using programming time to reduce bit errors in the nonvolatile memory system are disclosed. The method includes programming a plurality of memory cells of a nonvolatile memory device, identifying weak cells using programming time and preventing subsequent programming to the identified weak cells.
US09305660B2 Page buffer connections and determining pass/fail condition of memories
Apparatus and methods for determining pass/fail condition of memories facilitate array efficiencies. In at least one embodiment, a set of common lines, one for each rank of page buffers corresponding to a page, determine the pass/fail status of all connected memory cells, and the pass/fail status results for each line can be combined to determine a pass/fail for the page of memory.
US09305658B2 Finding optimal read thresholds and related voltages for solid state memory
A read is performed using a first iteration of a read threshold voltage that is set to a default voltage to obtain a first characteristic. A second iteration of the read threshold voltage is generated using the default voltage and an offset. A read is performed using the second iteration of the read threshold voltage to obtain a second characteristic. A third iteration of the read threshold voltage is generated using the first and second characteristics. A read is performed using the third iteration of the read threshold voltage to obtain a third characteristic. It is determined if the third characteristic is one of the two characteristics closest to a stored characteristic. If so, a fourth iteration of the read threshold voltage is generated using the two closest characteristics.
US09305656B2 Methods applying a non-zero voltage differential across a memory cell not involved in an access operation
Methods applying a non-zero voltage differential across a memory cell not involved in an access operation can facilitate improved data retention characteristics.
US09305651B1 Efficient wide range bit counter
An efficient wide range bit counter is presented that can support a wide range of counts with scientific notation. The counting scheme is dynamically altered to maintain a balance between accuracy and performance and allows early termination to fit timing budgets. Two (or more) counters each track the number of occurrences of a corresponding subset of events, where, when none of the counters have reached their capacities, the total count is the sum of the counts for the subsets. If one of the counters reaches it capacity, the other counter is then used as an extension of this first counter and the total count is obtained by scaling the count of the extended counter. In case of early termination, the accumulated count can be compensated to approximate the full count.
US09305648B2 Techniques for programming of select gates in NAND memory
In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.
US09305645B2 Variable resistive element, storage device and driving method thereof
An element according to an embodiment can transit between at least two states including a low-resistance state and a high-resistance state. The element comprises a first electrode, a second electrode, a first layer and a second layer. The first electrode includes metal elements. The first layer is located between the first electrode and the second electrode while contacting with the first electrode. The second layer is located between the first layer and the second electrode. At the low-resistance state, a density of the metal elements in the first layer is higher than that of the metal elements in the second layer. The density of the metal elements in the first layer at the low-resistance state is higher than that of the metal elements in the first layer at the high-resistance state. A relative permittivity of the second layer is higher than a relative permittivity of the first layer.
US09305644B2 Resistance memory cell
A resistance memory includes a resistance memory cell having a resistance memory element and a two-terminal access device in series. The two-terminal access device affects the current-voltage characteristic of the resistance memory cell. The resistance memory additionally includes a circuit to apply across the resistance memory cell a set pulse having a set polarity to set the resistance memory cell to a low-resistance state that is retained after application of the set pulse, a reset pulse having a reset polarity, opposite to the set polarity, to reset the resistance memory cell to a high-resistance state that is retained after application of the reset pulse, and a read pulse of the reset polarity and smaller in magnitude than the reset pulse to determine the resistance state of the resistance memory cell without changing the resistance state of the resistance memory cell.
US09305643B2 Solid electrolyte based memory devices and methods having adaptable read threshold levels
A method can include determining at least one use characteristic for the memory cells comprising a solid electrolyte, the use characteristic corresponding to a number of times the memory cells have been programmed to at least one impedance level; and adjusting a read threshold level for the memory cells based on at least the use characteristic, the read threshold level determining data values stored in the memory cells in a read operation.
US09305642B2 Resistance memory device and apparatus, fabrication method thereof, operation method thereof, and system having the same
Resistance memory device and apparatus, a fabrication method thereof, an operation method thereof, and a system including the same are provided. The resistance memory device may include a data storage unit and a first interconnection connected to the data storage unit. A first access device may be connected in series with the data storage unit and a second access device may be connected in series with the first access device. A second interconnection may be connected to the second access device. A third interconnection may be connected to the first access device to drive the first access device and a fourth interconnection connected to the second access device to drive the second access device.
US09305632B2 Frequency power manager
A method and an apparatus are provided. The apparatus is a hardware module that controls a power mode of a plurality of modules. The apparatus receives an indication of a desired operational frequency. Based on the received indication, the apparatus determines to switch from a first power mode associated with a first set of modules to a second power mode corresponding to the desired operational frequency and associated with a second set of modules. The apparatus enables modules in the second set of modules that are unassociated with the first power mode, stops traffic through the plurality of modules upon expiration of a time period after enabling the modules in the second set of modules that are unassociated with the first power mode, routes traffic through the second set of modules, and disables modules in the first set of modules that are unassociated with the second power mode.
US09305630B2 Semiconductor device and method for driving the same
One of a source and a drain of a first oxide semiconductor (OS) transistor is connected to a gate of a second OS transistor and one electrode of a first capacitor. One of a source and a drain of the second OS transistor is connected to one electrode of a second capacitor and one of a source and a drain of a Si transistor. The gate of the second OS transistor serves as a charge retention node. Charge injection and retention at this node is controlled by the first OS transistor. The other of the source and the drain of the second OS transistor is connected to a wiring applying a high potential, and a potential of the second capacitor that corresponds to the write data is maintained. A signal corresponding to the write data is read by the Si transistor.
US09305628B2 Self-referenced magnetic random access memory (MRAM) and method for writing to the MRAM cell with increased reliability and reduced power consumption
MRAM cell including a magnetic tunnel junction including a sense layer, a storage layer, a tunnel barrier layer and an antiferromagnetic layer exchange-coupling the storage layer such that the storage magnetization can be pinned when the antiferromagnetic layer is below a critical temperature and freely varied when the antiferromagnetic layer is heated at or above the critical temperature. The sense layer is arranged such that the sense magnetization can be switched from a first stable direction to another stable direction opposed to the first direction. The switched sense magnetization generates a sense stray field being large enough for switching the storage magnetization according to the switched sense magnetization, when the magnetic tunnel junction is heated at the writing temperature. The disclosure also relates to a method for writing to the MRAM cell with increased reliability and reduced power consumption.
US09305612B2 Programmable LSI with multiple transistors in a memory element
A low-power programmable LSI that can perform configuration (dynamic configuration) at high speed and can quickly start is provided. The programmable LSI includes a plurality of logic elements and a memory element for storing configuration data to be input to the plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements in accordance with the configuration data stored in the configuration memory. The memory element is formed using a storage element including a transistor whose channel is formed in an oxide semiconductor layer and a node set in a floating state when the transistor is turned off.
US09305610B2 Apparatus, system, and method for power reduction management in a storage device
An apparatus, system, and method are disclosed for power reduction management. The method includes determining that a power source has failed to supply electric power above a predefined threshold. The method includes terminating one or more non-essential in-process operations on a nonvolatile memory device during a power hold-up time. The method includes executing one or more essential in-process operations on the nonvolatile memory device within the power hold-up time.
US09305608B2 Memory device with reduced operating current
A memory device may including a first local bit line electrically connected with a first memory cell, a first global bit line electrically connected with the first local bit line, a second local bit line electrically connected with a second memory cell, and a second global bit line electrically connected with the second local bit line. The first global bit line is primarily charged with electric charge. The first global bit line and the second global bit line share the primarily charged electric charge. The second global bit line is secondarily charged with the electric charge.
US09305606B2 High-speed wireless serial communication link for a stacked device configuration using near field coupling
A memory module houses stacked memory devices and a memory controller each having a near-field interface coupled to loop antennas to communicate over-the-air data. A coil is formed on a memory device substrate or molded into a plastic mold to create near-field magnetic coupling with the stacked memory devices and the memory controller.
US09305604B2 Discrete three-dimensional vertical memory comprising off-die address/data-translator
The present invention discloses a discrete three-dimensional vertical memory (3D-MV). It comprises at least a 3D-array die and at least an A/D-translator die. The 3D-array die comprises a plurality of vertical memory strings. At least an address/data (A/D)-translator for the 3D-array die is located on the A/D-translator die instead of the 3D-array die. The 3D-array die and the A/D-translator die have substantially different back-end-of-line (BEOL) structures.
US09305601B1 System and method for generating a synchronized audiovisual mix
A system and method for generating a synchronized mix of a plurality of audiovisual tracks is provided. A new audiovisual track may be recorded simultaneously while one or more other audiovisual tracks are being played to help simulate a live jam session as closely as possible. In a “DJ Mix” mode, a user may manipulate sequencing and/or characteristics related to one or more audiovisual tracks included in a project in real-time while the project (e.g., song) is being played. A synchronized mix of a plurality of audiovisual tracks may be generated based on various attributes associated with the audiovisual tracks. For example, audiovisual tracks that are recorded along with a metronome may be synchronized based on a metronome clock rate selected by a user.
US09305600B2 Automated video production system and method
The invention provides a method and system for the automated post production of a single video file, the method comprising the steps of gathering video data from a plurality of camera sources; gathering audio data from a plurality of microphone sources; using an automated tracking offline algorithm to track a sound emitting from a moving target object in a 3D space, to provide localization data of said target object to identify an optimum camera source to provide video data of said target object; and composing a composite video sequence of said moving target from a plurality of identified optimum camera sources in a single video file. The algorithm relies on both video data from multiple camera views and audio data from multiple microphone arrays to infer the 3D position of the active speaker over the duration of the captured presentation.
US09305592B1 Reception terminal and a method for compensating inter-symbol interference and computer readable recording medium for performing the same
A reception terminal and a method for compensating for inter-symbol interference (ISI) in a two-dimensional (2D) data structure are provided. The method for compensating for ISI includes transmitting, from a transmission terminal, a plurality of source pixel values based on a source 2D data structure via a channel, receiving, at a reception terminal, a plurality of pixel values for compensation based on a 2D data structure, and compensating each of the plurality of pixel values for compensation to each of corresponding pixel values after compensation. The plurality of pixel values for compensation are changed values of the pixel values of the source pixels due to the ISI, and each of the pixel values after compensation is determined based on both of each of the pixel values for compensation and values of adjacent pixels thereof.
US09305591B2 Adaptive correction of symmetrical and asymmetrical saturation in magnetic recording devices
A magnetic recording device includes a preprocessor, an interpolator and a slicer. The preprocessor receives at least n saturated input signals including an nth saturated input signal The preprocessor is configured to process each of the n saturated input signals to produce a corresponding nth output signal. The n output signals include an nm output signal from the nth saturated input signal. The interpolator processes the nth output signal to determine an nth interpolator output. The slicer determines an nth slicer output for the nh output signal. The nth slicer output is at one of three different levels. The preprocessor can receive and process an n +1th saturated input signal to produce an n +1th output signal that is based on a difference between the nth interpolator output and the level of the nth slicer output.
US09305589B2 Method to determine presence of rotator and method to adjust optimal gain
A rotation driving system and a method to determine the presence of a rotator on a turntable are provided. The rotation driving system includes an encoder to detect rotation information of a motor, and a controller to determine whether or not a rotator is present on a turntable and also, to adjust a gain of the motor according to moment of inertia of the rotator.
US09305587B2 Optical disc device
An optical disc device includes an optical pickup and a transfer unit for linearly moving the optical pickup in a radial direction; and a locking module that is mounted on a rear side of the tray for unlocking the tray from the body, the locking module including a locking part having a hook for engaging a locking projection formed on the body and being mounted to be rotatable; a circular gear being mounted to be rotatable in connection with the transfer unit; a first connecting part for rotating by a linear force transmitted through the transfer unit moving outward; and a second connecting part for rotating by a force transmitted sequentially from the first connecting part and the circular gear and to transmit torque to the locking part to cause the hook to be unlocked from the locking projection.
US09305585B2 Recording device
The present invention provides a recording device that offers a large displacement control effect. The recording device includes a recording medium 224, a motor 222 that drives the recording medium, and a recording device head M1 that records and reproduces a signal to and from the recording medium. The recording device also has a displacement control mechanism M2. The displacement control mechanism M2 includes a vibrating plate 226 that has two opposing surfaces facing the recording medium, the vibrating plate being displaced in the rotation axis direction of the recording medium; and an oscillator 232 that is positioned away from the two opposing surfaces of the vibrating plate facing the recording medium, the oscillator driving and displacing the vibrating plate.
US09305579B2 Fabrication of side-by-side sensors for MIMO recording
The embodiments of the present invention relate to a method for forming a magnetic read head having side by side sensors. The method includes depositing a pinned layer, a barrier layer and a free layer over a shield, and removing portions of the pinned layer, barrier layer and free layer to expose portions of the shield. A bias material is deposited over the exposed shield. An opening is formed in the free layer to expose the barrier layer, and an insulative material is deposited into the opening. The resulting side by side sensors each has its own free layer separated by the insulative nonmagnetic material. The side by side sensors share the pinned layer.
US09305574B1 Negative-polarization spin-torque-oscillator
Embodiments disclosed herein generally relate to a MAMR head. The MAMR head includes an STO. The STO has a first magnetic layer, a second magnetic layer and an interlayer disposed between the first and second magnetic layers. One of the first and second magnetic layers is made of a negative polarization material while the other magnetic layer is made of a positive polarization material. As a result, the magnetizations in the first and second magnetic layers are in the same direction when in oscillation, which suppresses the partial cancellation of the magnetizations in the first and second magnetic layers and strengthens the AC magnetic field.
US09305567B2 Systems and methods for audio signal processing
A method for signal level matching by an electronic device is described. The method includes capturing a plurality of audio signals from a plurality of microphones. The method also includes determining a difference signal based on an inter-microphone subtraction. The difference signal includes multiple harmonics. The method also includes determining whether a harmonicity of the difference signal exceeds a harmonicity threshold. The method also includes preserving the harmonics to determine an envelope. The method further applies the envelope to a noise-suppressed signal.
US09305563B2 Method and apparatus for processing an audio signal
The present invention relates to a method for processing an audio signal, comprising: a step of performing a frequency conversion process on an audio signal to obtain a plurality of frequency transform coefficients; a step of selecting either a general mode or a non-general mode, on the basis of a pulse ratio, for the frequency transform coefficients having a high frequency band from among the plurality of frequency transform coefficients; and a step of performing, if the non-general mode is selected, the following steps: extracting a predetermined number of pulses from the frequency transform coefficients having the high frequency band, and generating pulse information; generating an original noise signal from the frequency transform coefficients having the high frequency band, excluding the pulses; generating a reference noise signal using the frequency transform coefficient having a low frequency band from among the plurality of frequency transform coefficients; and generating noise position information and noise energy information using the original noise signal and the reference noise signal.
US09305562B2 Non main CPU/OS based operational environment
A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.
US09305561B2 Effective deployment of temporal noise shaping (TNS) filters
The MPEG2 Advanced Audio Coder (AAC) standard limits the number of filters used to either one filter for a “short” block or three filters for a “long” block. In cases where the need for additional filters is present but the limit of permissible filters has been reached, the remaining frequency spectra are simply not covered by TNS. Two solutions are proposed to deploy TNS filters in order to get the entire spectrum of the signal into TNS. The first method involves a filter bridging technique and complies with the current AAC standard. The second method involves a filter clustering technique. Although the second method is both more efficient and accurate in capturing the temporal structure of the time signal, it is not AAC standard compliant. Thus, a new syntax for packing filter information derived using the second method for transmission to a receiver is also outlined.
US09305559B2 Audio watermark encoding with reversing polarity and pairwise embedding
Audio watermark encoding methods employ reversing polarity and pairwise embedding. A watermark signal is generated, mapped to pairs of embedding locations and inserted in the members of the pair with reverse polarity. The pairs of embedding locations correspond to adjacent regions or frames in time or frequency domains. A method for controlling an audio output device captures audio from the device, extracts its identity from a watermark, and modifies the operation of the device, e.g. varying watermark strength or audio loudness.
US09305554B2 Multi-level speech recognition
A method and device for recognizing an utterance. The method includes transmitting context data associated with a first device to a second device. A first speech recognition model is received from the second device. The first speech recognition model is a subset of a second speech recognition model present at the second device. The first speech recognition model is based on the context data. It is determined whether the utterance can be recognized at the first device based on the first speech recognition model. If the utterance cannot be recognized at the first device, then at least a portion of the utterance is sent to the second device. If the utterance can be recognized at the first device, then an action associated with the recognized utterance is performed.
US09305551B1 Scribe system for transmitting an audio recording from a recording device to a server
A scribe system is provided. The scribe system includes a server operating a software product and a plurality of recording devices for recording speech of a user into a recorded audio file. The scribe system also includes a network connection between the server and the plurality of recording devices. Each recording device transfers the recorded audio file to the server through the network connection in response to completion of recording the audio file. The server confirms successful transmission to the recording device in response to operation of the software product.
US09305549B2 Method and apparatus for generation and augmentation of search terms from external and internal sources
A method and apparatus to identify names, personalities, titles, and topics that are present in a repository and to identify names, personalities, titles, and topics that are not present in the repository, uses information from external data sources, notably the text used in non-speech, text-based searches, to expand the search terms. The expansion takes place in two forms: (1) finding plausible linguistic variants of existing search terms that are already comprehended in the repository, but that are present under slightly different names; and (2) expanding the existing search term list with items that should be there by virtue of their currency in popular culture, but which for whatever reason have not yet been reflected with content items in the repository.
US09305548B2 System and method for an integrated, multi-modal, multi-device natural language voice services environment
A system and method for an integrated, multi-modal, multi-device natural language voice services environment may be provided. In particular, the environment may include a plurality of voice-enabled devices each having intent determination capabilities for processing multi-modal natural language inputs in addition to knowledge of the intent determination capabilities of other devices in the environment. Further, the environment may be arranged in a centralized manner, a distributed peer-to-peer manner, or various combinations thereof. As such, the various devices may cooperate to determine intent of multi-modal natural language inputs, and commands, queries, or other requests may be routed to one or more of the devices best suited to take action in response thereto.
US09305538B2 Transmission obscuring cover device
A transmission obscuring cover device obscures video and audio transmissions from an electronic apparatus. The device includes a panel having a bottom surface. An adhesive is coupled to the bottom surface for being adhered to an electronic apparatus. The panel is a sound absorber wherein the panel is configured for being positioned over a microphone of the electronic apparatus to inhibit transmission of sound to the microphone.
US09305537B2 Signal processing apparatus concealing impulse noise by autoregressive modeling
A signal processing apparatus (100) comprising a noise detector (102) configured to: receive a stream of information representative of a stream of audio signal samples (112); and detect samples in the received stream of information (112) that are distorted by impulse noise in order to generate a noise detection signal (114), wherein the noise detection signal (114) also identifies preceding and succeeding samples that are undistorted. The signal processing apparatus (100) also comprises a processor (104) configured to replace distorted samples in the received stream of information with composite predicted values (426; 526) to provide a reconstructed stream of audio signal samples (116).
US09305535B2 Safety alert apparatus for a portable communication device
A safety alert device (200) is formed of a clip (210) and integrated whistle (220) coupled to a portable communication device (300). The clip and integrated whistle can be removed or re-oriented from the radio (300) to provide user access to the whistle. The removal or rotation of the safety alert device (200) having clip and integrated whistle can further enable emergency radio mode operation. The whistle (220) operates as a safety alert when the battery of the portable communication device is either charged or discharged.
US09305534B2 Audio system for a motor vehicle
An adaptive audio system for a motor vehicle is disclosed. The audio system is operable to retrieve a music item from a storage device, classify the music item in a predefined music category the basis of a determined audio profile, select a category from a plurality of predefined music categories on the basis of a current driving behavior of the driver, and output a music item included in the selected category via an output device. The driving behavior of the driver is understood to mean the mode or style in which the driver drives.
US09305532B1 Musical instrument cable support and positioning device
A cable positioning device for positioning a cable attached to an instrument is provided including a connecting member for affixing the device to the instrument, a spiral member having a first end, a second end, and coils between the first end and the second end. The first end of the spiral member is disposed on the connecting member. The spiral member is for receiving and guiding the cable longitudinally through said spiral member. The spiral member is fabricated from a semi-rigid material providing for flexion when a strain is transferred to the device via the cable, and is positionable by a user of the device. A terminating member disposed on the second end.
US09305531B2 Online real-time session control method for electronic music device
An online real-time session is conducted between at least two electronic music devices each equipped with an interface and a touch panel display for displaying a plurality of performance operators. The same displayed content is shared in real time between electronic music devices by mutually transmitting operation information representing a user's operation on a performance operator, so that the operational state of the performance operator of one electronic music device is reflected in the counterpart electronic music device. A setting operator is used to select a desired music section corresponding to one layer or a combination of layers subjected to simultaneous music performance. The electronic music device generates sound in response to a short press given to a performance operator, while the electronic music device sets a tone-generation point to a performance operator pertaining to a long press.
US09305530B1 Text synchronization with audio
A technology for synchronizing text with audio includes analyzing the audio to identify voice segments in the audio where a human voice is present and to identify non-voice segments in proximity to the voice segments. Segmented text associated with the audio, having text segments, may be identified and synchronized to the voice segments.
US09305528B1 Clamping device for holding shoulder rest to violin and viola
A clamping device for holding shoulder rest to violin and viola includes a holding member, a plurality of clamping members, and a shaft. The holding member has a base portion and an extended portion outward extended from the base portion. The clamping members are connected to the extended portion. The shaft is extended through the clamping members and the extended portion. With these arrangements, a shoulder rest can be very conveniently assembled to a violin or a viola and can be freely adjusted in angle for use.
US09305527B2 Acoustic instrument with neck through body
An acoustic string instrument is provided that includes a headstock formed at a distal end of a neck. The headstock and the neck are formed with a plurality of laminated material strips. A heel is formed at the proximal end of the neck. The heel is fixedly attached to a hollow body having a bottom surface joined to a top surface by a sidewall defining an inner volume. A pair of opposing outer strips from the plurality of laminated material extend past the heel to form an “A” brace in the inner volume, where the “A” brace has a plurality of apertures and an integrated bridge post that extends between the bottom surface and an inner side of the top surface of the hollow body. One or more transverse braces are fixedly attached to the inner side of the top surface, where each of the one or more transverse braces crosses through the plurality of apertures of the “A” brace without touching the “A” brace.
US09305525B2 Interchangeable guitar faceplate and guitar body system
The present invention provides an interchangeable, custom-designed guitar faceplate and guitar body for an electric guitar which allows one to quickly and easily change the appearance, the sounds, the tones and the resonance of the electric guitar. The interchangeable, custom-designed faceplate houses all components and electronics needed for an electric guitar solely on the faceplate itself, so that the tone, sound and resonance characteristics of the guitar can be changed simply by substituting alternate interchangeable faceplates. Further, after assembly of the interchangeable faceplate with the guitar body, the unique configuration of the components and electronic wiring on the faceplate, in combination with the guitar body configuration, produce superior and enhanced sounds, tones and resonance when played by a guitar player.
US09305522B2 Driving circuit
A driving circuit comprises a plurality of shift register (SR). An ith SR among the plurality SR's comprises a resetting circuit, an input switch, a capacitor, and an output circuit. The resetting circuit is used for adjusting a resetting voltage according to a control voltage. The input switch is used for adjusting the control voltage according to an (i−2)th driving signal from an (i−2)th SR among the plurality of SR's, selectively. The capacitor is used for adding a voltage variation of a boosting signal to the control voltage. The output circuit is used for taking an ith input signal as an ith output signal according to the control voltage and the resetting voltage, selectively. The positive edge of the boosting voltage leads the negative edge of the ith input signal.
US09305521B2 Method of reducing power consumption in a display device and a display device using the same
A display device configured to reduce power consumption, in accordance with an exemplary embodiment of the present invention, includes a signal controller configured to calculate saturation data, luminance data, and power consumption data of input image data, to calculate a compensation ratio based on a rate of change of luminance, a rate of increase of saturation, or a power consumption, to generate compensation image data having a saturation of a red, green, or blue image of the input image data increased up to a threshold value so that the compensation ratio exceeds a reference value, and to send the generated compensation image data to a data driver, and the data driver configured to supply data voltages corresponding to the compensation image data, in response to gate signals sequentially generated from a gate driver to a display panel.
US09305520B2 Image display apparatus, method of driving image display apparatus, grayscale conversion program, and grayscale conversion apparatus
An image display apparatus includes: a grayscale conversion device configured to perform grayscale conversion processing on input data to output data; and a display device configured to operate in accordance with the output data to display an image by pixels arranged in a two-dimensional matrix state, wherein the grayscale conversion device is configured to perform first error diffusion processing for converting N0-grayscale input data into N1-grayscale data (2
US09305518B2 Image display apparatus and method for correcting luminance unevenness produced by image display apparatus
An image display apparatus capable of providing a luminance unevenness correction capability that allows a user to readily visually grasp the correction is provided. An image display apparatus that includes an OSD display section that displays pattern images showing areas for luminance adjustment in an image, a pattern image selection operation section that accepts selection of any of the displayed pattern images, a luminance adjustment operation section that accepts operation of adjusting the luminance of the image, and a luminance correction section that adjusts the luminance of the image in the area for luminance adjustment corresponding to the selected pattern image.
US09305513B1 Electrowetting display device control method
A method of controlling an electrowetting display device with display elements arranged in a matrix with n rows. In examples each display element is addressable with a voltage pulse having a pulse duration longer than Tf/n, where Tf is a pre-determined frame period for addressing the n rows. In examples the pulse duration may be longer than ReCe, with Re being an electrical resistance of an electrically conductive fluid of a display element and Ce being an electrical capacitance of a capacitor of the display element.
US09305510B2 LCD driving module, LCD device, and method for driving LCD
The invention discloses an LCD driving module, an LCD device, and a method for driving an LCD. The LCD driving module includes a data driving module and a timing control circuit. The data driving module is provided with a data interface via which to connect with the timing control circuit; a programmable Gamma calibration sub-module is integrated in the data driving module; an input end of the programmable Gamma calibration sub-module is connected to the data interface. The invention saves the PCB space, simplifies the circuit, thereby favoring the acceleration of the development progress and saving the development cost.
US09305507B2 Liquid crystal display device capable of performing 2D display and 3D display, and drive method thereof
An object of the present invention is to prevent screen burn-in in a liquid crystal display device that performs a plurality of types of frame-reversal driving. When any gate bus line is focused, among a plurality of pixel electrodes in a display unit, pixel electrodes provided in pixel formation portions to which a scanning signal is provided from the focused gate bus line are arranged in a staggered manner with the focused gate bus line centered. A latch strobe signal (LS) including pulses where in each pixel formation portion a length of a period (TA1) during which a positive polarity voltage is applied to a liquid crystal is longer than a length of a period (TA2) during which a negative polarity voltage is applied to the liquid crystal is provided to a source driver from a display control circuit.
US09305506B2 VCOM amplifier with transient assist circuit
Electronic devices with a VCOM display panel are configured to provide a common voltage VCOM to a VCOM display panel backplane, referred to as a VCOM reference plane. The common voltage is supplied by a VCOM application circuit coupled to the VCOM reference plane. The VCOM application circuit includes a linear amplifier, such as a Class AB amplifier, coupled to a switched transient assist circuit configured to output the common voltage. The switched transient assist circuit stabilizes the amplifier in the presence of large transient output currents but with minimized power dissipation and heat rise in the amplifier.
US09305503B2 Display panel with pre-charging operations, and method for driving the same
A display panel includes a switch control circuit, a first pre-charge switch circuit and a second pre-charge switch circuit. The switch control circuit is used for comparing the most significant bits (MSBs) of data signals to generate switch control signals for controlling the first and second pre-charge switch circuits, such that data lines are pre-charged through the first and second pre-charge switch circuits respectively. A method for driving a display panel is also provided herein.
US09305498B2 Gate driving circuit, gate driving method and display device
The present disclosure discloses a gate driving circuit, a gate driving method and a display device. The gate driving circuit includes a plurality of cascaded shift register units for outputting gate driving signals, each of the gate driving signals being output by a gate driving signal output terminal of each shift register unit; the gate driving circuit further includes: a gate driving control unit connected with the shift register unit for controlling the gate driving signal to be transmitted to N rows of pixel circuits time-divisionally, wherein N is a positive integer greater than or equal to 2.
US09305495B2 Display device and display method for estimating backlight luminance distribution
A display device includes: a display panel divided into divided regions including mutually adjacent first and second divided regions; a backlight portion having light source portions emitting light with a predetermined luminance distribution; a determination portion determining emission luminance for each divided region; a backlight driver driving the light source portions; a storage storing a division number; a setting portion dividing the divided regions to generate sub-regions, and setting the emission luminance of the sub-regions to that of the divided region; a linear interpolation portion performing linear interpolation using the emission luminance of the first and second sub-regions, to calculate an estimated value of the emission luminance distribution of the backlight portion in a region from the first to second sub-region; a signal correction portion correcting an image signal on the basis of the estimated value; and a panel driver driving the pixels of the display panel.
US09305494B2 Organic light emitting display device and method for driving the same
An organic light emitting display device includes a display panel having a plurality of pixels, each pixel connected to a data line, a gate line group and a reference line, each pixel further including: an organic light emitting device; a driving transistor controlling a current flowing in the organic light emitting device and including first and second gate electrodes overlapped with each other, with a semiconductor layer provided therebetween; a first switching transistor selectively supplying a data voltage supplied to the data line to a first node connected to the first gate electrode; a second switching transistor selectively supplying a sensing voltage to the second gate electrode; a third switching transistor selectively connecting a second node connected to a source electrode of the driving transistor to the first node; a fourth switching transistor selectively connecting the reference line to the second node; a first capacitor connected between the second gate electrode and the second node, the first capacitor storing a threshold voltage of the driving transistor; and a second capacitor connected between the first and second nodes, the second capacitor storing a difference voltage of the first and second nodes.
US09305491B2 Method and apparatus for driving a display device with variable reference driving signals
A method and an apparatus capable of increasing the video depths depending on the video content of each line in order to provide a maximum of color gradation for each given scene shall be proposed. For this purpose there is disclosed an apparatus for driving a display device including input means for receiving a digital value as video level for each pixel or cell of a line of the display device, reference signaling means for providing at least one reference driving signal and driving means for generating a driving signal on the basis of the digital value and the at least one reference driving signal. The apparatus further includes adjusting means for adjusting the at least one reference driving signal in dependence of the digital values of at least a part of the line.
US09305489B2 Organic light emitting diode display
An OLED display includes a plurality of pixels, and a pixel includes a light emitting portion including an emission layer configured to generate light, a pixel electrode, and an opposing electrode facing each other. The light emitting portion is between the pixel electrode and the opposing electrode. Each pixel also includes a light outputting portion at a side of the fight emitting portion and configured to allow light to pass therethrough.
US09305485B2 Organic light emitting display and driving method thereof
The present invention relates to a driving method of an organic light emitting display which is capable of displaying images at uniform luminance. A driving method of an organic light emitting display of an embodiment according to the present invention includes supplying a data signal to a pixel and, after the data signal is supplied, driving the pixel in a constant-voltage system during a first time period and in a constant-current system during a second time period.
US09305484B2 Capacitive-load driving circuit and plasma display apparatus using the same
A plasma display apparatus including a capacitive load and a driving circuit is provided. The plasma display apparatus includes a driving power source supplying a drive voltage to the capacitive load and a reference potential terminal supplying a reference potential to the capacitive load. A drive IC is coupled to the driving power source.
US09305483B2 Display device including a timing controller with a self-recovery block and method for driving the same
A display device and a method for driving the same are discussed. The display device includes an image processing unit, a timing controller which receives various signals through a mobile industry processor interface (MIPI) connected to the image processing unit, and a display module displaying an image under the control of the timing controller. The timing controller includes a logic block for controlling the display module, and a self-recovery block which outputs a self-command signal for escaping an abnormal state when the logic block is faced with the abnormal state due to an external environment factor.
US09305481B2 Display device
A display device includes a driver circuit including a logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line which is electrically connected to the driver circuit; a pixel portion including a pixel whose display state is controlled by input of a signal including image data from the driver circuit through the signal line; a reference voltage line to which reference voltage is applied; and a third transistor which is a depletion type transistor and controls electrical connection between the signal line and the reference voltage line. The first to the third transistors each include an oxide semiconductor layer including a channel formation region.
US09305479B2 Detection circuit for dark point on panel
Provided is a detection circuit for dark points on a panel, comprising a preset voltage generation module and a selection circuit module, wherein the preset voltage generation module is connected with the selection circuit module and is used for transferring N preset voltages to the selection circuit module, and the selection circuit module comprises N inputting terminals for receiving the N preset voltages, respectively, an outputting terminal and a strobe switch for strobing the outputting terminal with one of the N inputting terminals, N≧2. The circuit according to the embodiments of the present disclosure can detect the dark point defect caused by remains in active layers effectively in a panel state and prevent the panels having such dark point defects from being incorporated into modules, so that a waste of cost is avoid and a detection capability in a detection procedure for the panel is increased.
US09305477B2 Organic light emitting display device
An organic light emitting display device of the present embodiments includes: a plurality of pixels positioned at intersections of scan lines, data lines, and emission control lines; a pixel unit, including the plurality of pixels, and divided into two or more blocks; a scan driver sequentially supplying scan signals to the scan lines; a data driver supplying data signals to the data lines in synchronization with the scan signals; and two or more emission drivers connected with emission control lines in the blocks, in which each emission driver supplies emission control signals to emission control lines connected thereto, and at least one or more emission control signals are supplied in each block simultaneously.
US09305473B1 Sign assembly
A sign assembly for displaying information about a vehicle includes a vehicle that has a hood and a front side. A display is coupled to the vehicle. The display is visible forward of the front side. The display may contain information and images pertaining to the vehicle. The display extends between the hood and the front side. A belt is movably coupled to the display. A plurality of pockets is coupled to said belt and contains the information about the vehicle.
US09305472B1 Illuminated traffic control paddle
A traffic control paddle includes a frame with a handle and a head having two sides. The head has a perimeter, a face inset within the perimeter, a surface on the face carrying literal indicia, and an upstanding lip extending around the perimeter and projecting above the face by a first distance. Two spaced-apart light-emitting diodes in the face are seated in annular projections, each of which projects above the face by a second distance. The handle carries batteries and a switch to provide power to the light-emitting diodes. The light-emitting diodes are spaced above and below the literal indicia on the face and are programmed to blink.
US09305470B2 Cu alloy film for display device and display device
The present invention provides a display device which is provided with a Cu alloy film having high adhesion to an oxygen-containing insulator layer and a low electrical resistivity. The present invention relates to a Cu alloy film for a display device, said film having a stacked structure including a first layer (Y) composed of a Cu alloy containing, in total, 1.2-20 atm % of at least one element selected from among a group composed of Zn, Ni, Ti, Al, Mg, Ca, W, Nb and Mn, and a second layer (X) composed of pure Cu or a Cu alloy having Cu as a main component and an electrical resistivity lower than that of the first layer (Y). A part of or the whole first layer (Y) is directly in contact with an oxygen-containing insulator layer (27), and in the case where the first layer (Y) contains Zn or Ni, the thickness of the first layer (Y) is 10-100 nm, and in the case where the first layer (Y) does not contain Zn and Ni, the thickness of the first layer (Y) is 12-100 nm. The present invention also relates to a display device having the Cu alloy film.
US09305464B2 Parking assistance system, method for operating a parking assistance system, computer program, computer-readable medium and motor vehicle
A parking assistance system is provided for a motor vehicle, with a sensor device which is configured to measure a distance of the motor vehicle from an object and an intrinsic speed of the motor vehicle, with a warning device, which is configured to compare the measured distance with a distance threshold value and to output a warning signal if the measured distance drops below the distance threshold value. The warning device is configured to adapt the distance threshold value taking the measured intrinsic speed into account. Furthermore, a method is provided for operating a parking assistance system, a computer program, a computer-readable medium and a motor vehicle.
US09305462B2 V2V safety system using self-generated lane maps
A vehicle-to-vehicle (V2V) communication transponder for use in V2V communication, safety and anti-collision systems incorporating a location point store and a lane records store, wherein the lane records are constructed by the transponder from the point in the location point store, location points are received from other moving transponders, and lane records are shared between transponder response to a request. Separate source counts are kept for internally generated and shared lane records. Methods of sharing are described. Lane types are also derived from the location point store and other vehicle behavior. No central authority, road-side equipment, (RSU), or pre-determined lane maps are required. Embodiments include a hybrid protocol using both TDMA and CSMA. Some embodiments are free of MAC and IP addresses. Embodiments include equipped vehicles and V2V system using the transponder.
US09305461B2 Method and apparatus for vehicle to vehicle communication and information relay
A system includes a processor configured to detect a primary vehicle emergency-state. The processor is also configured to determine that emergency-services communication through an on-board device is not possible. Further, the processor is configured to search for a secondary vehicle having vehicle-to-vehicle communication capabilities. The processor is additionally configured to send an emergency-services request to the secondary vehicle to establish communication with the secondary vehicle and send prioritized emergency data to the secondary vehicle.
US09305455B2 Switch module and lighting control system comprising the switch module
A switch module is designed to facilitate user definition of a group of switch modules that control the same lamp. A lamp unit (12) containing the lamp responds selectively to messages from the switch modules (10, 10′) when the messages comprise ID information matching with ID information stored in the lamp unit (12). A group is formed by detecting user control operation of sensors (100) in the switch modules (10, 10′), transmitting messages from the switch modules (10, 10′) in response and determining from the messages whether the switch modules (10′) have both been operated within a time interval with a duration of less than a predetermined threshold. If so, the ID information value in memories (104) of the switch module (10) and/or the further switch module (10′) are set to matching ID values, for use in the messages to control the lamp unit.
US09305453B2 Method and apparatus for extra-vehicular emergency updates following an accident
A system includes a processor configured to receive instructions from a vehicle computing system (VCS) to being reporting a mobile device location. The processor is also configured to access a list of emergency contacts. Further, the processor is configured to determine that a mobile device has left a predetermined perimeter around a last known vehicle location. The processor is additionally configured to periodically report mobile device GPS coordinates to members of the emergency contacts list, until the mobile device reaches a destination.
US09305443B2 LED security sensor
A door sensor system comprising door sensor circuit and a sensor support circuit. The door sensor circuit has the anode of a first LED and the anode of a second LED coupled to a supply voltage terminal. The door sensor circuit has one or more reed switches, each with a first terminal coupled to the first LED cathode and a second terminal coupled to a sensor output terminal. The door sensor circuit has a Zener diode with a cathode coupled to the second LED cathode and an anode coupled to the sensor output terminal. The sensor support circuit is configured to generate, based on the voltage at the sensor output terminal, a first signal if the door is open, a second signal if the door is closed, and a third signal if tampering with the door sensor system is detected.
US09305442B1 Apparatus, systems and methods for signal localization and differentiation
Apparatus, systems, and methods for providing transmission and localized reception of audio, visual, and tactile signaling are taught for a myriad of useful purposes, including embodiments that permit differentiation between selected groups of intended recipients to permit simultaneous use of multiple instances of this technology in close proximity, if desired.
US09305431B2 Multi-player video poker game and method thereof
A method of playing a video poker game comprising: inviting a plurality of players to play a video poker game, wherein each participating player plays an individual hand dealt from a separate standard 52 card deck for that participating player; placing a wager to begin play by each participating player, wherein there is at least two participating players; dealing five cards to each participating player face up from the separate standard 52 card deck for that participating player, wherein each participating player may one of: hold, fold, or replace any of the five cards; dealing replacement cards to each participating player from the separate standard 52 card deck for that participating player for each participating player who selects to replace any of the five card dealt to that participating player; determining if any of the participating players has a winning wager by verifying if remaining five cards of each participating player matches a poker hand stated on a pay table; and paying each participating player having a winning wager from the wager placed by each participating player.
US09305430B2 Gaming machine with progressive feature for paylines and playing method thereof
A slot machine executes a slot game by rearranging symbols that are arranged in multiple partitioned regions in a matrix including first to fifth columns and first to third rows. There are multiple paylines in these partitioned regions in the matrix. A player selects and specifies some of these paylines to be bet with game media. By betting the game media on each of the specified paylines, those paylines are activated in the slot game. When the rearranged symbols form a winning combination on any of the activated paylines, the player receives an award. Moreover, the slot machine performs a process to decide an award content for a progressive bonus along execution of the slot game in which the player bets the game media on all the paylines or a predetermined number or more of the paylines. The process to decide the award content for the progressive bonus may also be performed when the slot games in which the player bets the game media on all the paylines or the predetermined number or more of the paylines are executed continuously a predetermined number of times.
US09305429B2 Wagering system and method
A system is provided that, in some aspects, determines a user's intent to place a wager or redeem a wager based on bar codes generated by a client device operated by the user.
US09305423B2 Utility hook and sensor assembly for wagering game terminals and gaming systems
Gaming terminals, gaming machines, gaming systems and utility hook and sensor assemblies are presented. A gaming terminal for playing a wagering game is disclosed. The gaming terminal includes a cabinet, at least one display device configured to display aspects of the wagering game, and at least one input device configured to receive an input from a player to play the wagering game. The gaming terminal also includes a support mechanism that is attached to the cabinet and is configured to support a personal belonging of the player. An alert system is configured to detect the presence or absence, or both, of the personal belonging and/or the player at the gaming terminal, and generate an alert signal in response to the detected presence or absence.
US09305421B2 Intelligent power supply and methods for monitoring a power supply
A method of monitoring a power supply of a gaming terminal comprises receiving, at an input of the power supply of the gaming terminal, an input power from an electrical power source, converting the input power to one or more output powers, providing, at one or more outputs of the power supply, the one or more output powers to one or more components of the gaming terminal, measuring, via one or more sensors, at least one electrical characteristic of the input power and the one or more output powers, and storing, in a memory, the measured at least one electrical characteristic for each of the input power and the one or more output powers.
US09305417B2 Automatic supplying device of door hinges
An automatic supplying device of door hinges includes: a door hinge supplying device having the door hinges loaded in upward and downward directions and supplying the door hinges; and a transferring device provided on a rear surface of the door hinge supplying device and automatically transferring the door hinges. The door hinge is automatically supplied when it is mounted, which makes it possible to improve work efficiency. In addition, a cylinder driving scheme is used, which makes it possible to decrease generation of noise at the time of supplying the door hinge, and a configuration for loading and moving the door hinge is simplified, such that a work space may be secured, and improving work convenience.
US09305416B2 Banknote recognition and counting machine and banknote recognition and counting method
Banknotes are taken into a banknote recognition and counting machine (10), a recognition and counting process for the banknotes is performed by a recognition and counting unit (24), judgment for the banknotes is performed by using a first judgment threshold value, based on the recognition result on each banknote recognized by the recognition and counting unit (24), and then the banknotes are fed, selectively, to a stacking unit (26) or reject unit (30), based on the judgment result on each banknote. Then the banknotes, respectively fed to the reject unit (30), are taken again into the banknote recognition and counting machine (10), the recognition and counting process for such banknotes is performed by the recognition and counting unit (24), and then the judgment for the banknotes is performed, by using a second judgment threshold value set smaller than the first judgment threshold value, based on the recognition result on each banknote recognized by the recognition and counting unit (24). Thereafter, information, which relates to the total sum of a count result on the banknotes, respectively judged to be true upon the judgment for the banknotes by using the first judgment threshold value and another count result on the banknotes, respectively judged to be true upon the judgment for the banknotes by using the second judgment threshold value, is output.
US09305414B2 Safe unlocking machine
A safe unlocking machine includes a currency container that may be moved into and out of a container unit. The currency container includes a coin inlet, a bill inlet, and a lock-incorporated shutter that opens and closes a tag. When the shutter is operated to open, RFID wireless verification is performed between an antenna located in the container unit and the tag of the currency container. When predetermined conditions including accomplishment of the RFID verification are satisfied, rotation of a receiver handle is permitted. When the receiver handle is rotated once, a safe main body of a safe, which is located in the safe unlocking machine, is solely moved rearward. The currency in the safe main body falls down due to its own weight and is stored in the currency container.
US09305405B2 Reefer fuel tax reporting for the transport industry
A fuel tax measuring and reporting tool is provided for a mobile refrigeration unit that is capable of providing state-by-state fuel tax reporting, automatically, relating to fuel consumed by a mobile refrigeration unit. Fuel use of an engine powering the refrigeration unit is measured based on either power consumption by, or fuel flow to, the engine. Processing of this data locally or remotely allows accurate fuel tax reporting in connection with transmission of this data from the site of the mobile refrigeration unit.
US09305403B2 Creation of a playable scene with an authoring system
The invention is directed to a process for creating a playable scene with an authoring system, the process comprising the steps of: (a) displaying a three-dimensional authoring scene comprising representations of objects displayed thereon, one of the representations of objects being a three-dimensional experience scene; (b) displacing, upon user action, some of the representations of objects displayed in the authoring scene to the experience scene; and (c) organizing, upon user action, the displaced representations of objects in the experience scene.
US09305399B2 Apparatus and method for displaying objects
An object display device includes an image capturing unit for acquiring an image in real space, an image feature extraction unit for extracting a predetermined feature about an image either in a plurality of feature regions detected from the image in real space or in the entire image in real space, an image processing unit for performing correction processing on an image of an object based on the predetermined feature about the image, and a display unit for displaying an overlaid image in which the image of the object subjected to correction processing is overlaid on the image in real space. With this configuration, the feature of the image in real space is appropriately reflected in the image of the object in the overlaid image.
US09305397B2 Vertex order in a tessellation unit
Systems and methods for a tessellation are described. These systems and methods may divide the domain into a plurality of portions, including a first portion. The systems and methods may also determine coordinates for vertices for a first set of shapes that reside within the first portion, wherein each shape of the first set of shapes includes at least one vertex on a first edge of the first portion. After determining coordinates for the vertices for the first set of shapes, the systems and methods may determine coordinates for vertices for a second set of shapes that reside within the first portion. Each shape of the second set of shapes shares at least one vertex with at least one shape of the first set of shapes and none of the shapes of the second set of shapes includes a vertex on the first edge of the first portion.
US09305394B2 System and process for improved sampling for parallel light transport simulation
Embodiments of the present invention are directed to methods and a system that allow for deterministic parallel low discrepancy sampling, which can be efficiently processed, and are effective in removing transitionary artifacts that occur in low-dimensional projections generated in low discrepancy sequences. Embodiments of the claimed subject matter further provide improvements upon the low-dimensional projections and thus the visual quality when using the Sobol' sequence for image synthesis.
US09305388B2 Bit-count texture format
A system, method, and computer program product are provided for using a bit-count texture format. A rasterized coverage bit mask is received by a texture processing unit from a bit-count format texture map, the rasterized coverage bit mask is converted to a scalar value, and the scalar value is processed while the rasterized coverage bit mask is retained in the bit-count format texture map. The coverage bit mask may be converted by computing a count of samples that are covered by at least one graphics primitive according to the rasterized coverage bit mask.
US09305387B2 Real time generation of animation-ready 3D character models
Systems and methods for automatically generating animation-ready 3D character models based upon model parameter and clothing selections are described. One embodiment of the invention includes an application server configured to receive the user defined model parameters and the clothing selection via a user interface. In addition, the application server includes a generative model and the application server is configured to generate a 3D anatomical mesh based upon the user defined model parameters using the generative model, the application server includes at least one clothing mesh template including a clothing mesh, a template skeleton, and skinning weights and the application server is configured to apply the clothing mesh from the clothing mesh template corresponding to the user clothing selection to the generated 3D anatomical mesh to create a clothed mesh, the application server is configured to adjust the template skeleton of the clothing mesh template corresponding to the user clothing selection based upon the shape of the clothed mesh, the application server is configured to generate skinning weights based upon the skinning weights of the clothing mesh template corresponding to the user clothing selection, and the application server stores an animation-ready 3D character model including the clothed mesh, the adjusted skeleton, and the generated skinning weights.
US09305382B2 Geometrically and parametrically modifying user input to assist drawing
Methods for providing drawing assistance to a user sketching an image include geometrically correcting and parametrically adjusting user strokes to improve their placement and appearance. As a user draws a stroke, the stroke is geometrically corrected by moving the stroke toward a feature of the image the user is intending to draw. To further improve the user strokes, parametric adjustments are made to the geometrically-corrected stroke to emphasize “correctly” drawn lines and de-emphasize “incorrectly” drawn lines.
US09305380B2 Generating land cover for display by a mapping application
Some embodiments provide a method for conflating geometries to a road in a map region for an electronic mapping service. The method receives a first geometry representing a road. The method receives several geometries arranged such that a gap representing the road is between the geometries. The gap is not aligned with the first geometry representing the road. The method expands the geometries toward the first geometry such that the geometries converge at the first geometry. The road geometry is for drawing over the plurality of other geometries by a client mapping application.
US09305377B2 Method and apparatus to detect and correct motion in list-mode PET data with a gated signal
A PET scanner (20, 22, 24, 26) generates a plurality of time stamped lines of response (LORs). A motion detector (30) detects a motion state, such as motion phase or motion amplitude, of the subject during acquisition of each of the LORs. A sorting module (32) sorts the LORs by motion state and a reconstruction processor (36) reconstructs the LORs into high spatial, low temporal resolution images in the corresponding motion states. A motion estimator module (40) determines a motion transform which transforms the LORs into a common motion state. A reconstruction module (50) reconstructs the motion corrected LORs into a static image or dynamic images, a series of high temporal resolution, high spatial resolution images.
US09305373B2 Customized real-time media system and method
Interactive media is defined by objects and interaction logic; unique objects for the interactive media are determined according to the interaction logic. The unique objects are pre-rendered and saved. When a user interacts with the interactive media, the user device requests content. The pre-rendered unique elements are determined and composited according to two-pass depth and alpha compositing technique, which technique reduces composting complexity while maintaining quality. The resulting composited media is then streamed to the user device. Some non-pre-rendered objects may be rendered and/or composited by a server- or client-device at run-time.
US09305369B2 Method and system for data compression
A method and a system for data compression are provided. The method may include: obtaining scanning data to be compressed; compressing the scanning data using a first compression method and a second compression method to obtain a first compressed data and a second compressed data respectively, where a compression ratio of the first compressed data is lower than a compression ratio of the second compressed data; and determining whether the compression ratio of the first compressed data meets a predetermined compression ratio requirement, if yes, determining the first compressed data as a compression result data corresponding to the scanning data, if no, determining the second compressed data as a compression result data corresponding to the scanning data. Scanning data compressed by the method or the system can meet target compression requirements.
US09305366B2 Portable electronic apparatus, software and method for imaging and interpreting pressure and temperature indicating
A system for analyzing pressure and/or temperature indicating material has an input for receiving a monochrome color density image captured from a pressure and/or temperature indicating material, the image being captured alongside a calibration target against a contrast sheet. A processing module is configured to receive the captured image of the indicating material and the calibration target and to generate a pseudo colored spectrum map by converting the monochrome color density image into a corresponding multi color map where the different colors on the map correspond to different color densities on the monochrome color density image. The processing module is configured to compare the captured colored calibration target against a stored reference image and to adjust the output pseudo colored spectrum map to account for environmental factors that are present during the capture of the monochrome color density image.
US09305365B2 Systems, devices, and methods for tracking moving targets
A system for tracking a moving target having up to six degrees of freedom and rapidly determining positions of the target, said system includes an easy to locate precision optical target fixed to the target. This system includes at least two cameras positioned so as to view the optical camera from different directions with each of the at least two cameras being adapted to record two dimensional images of the precision optical target defining precise target point. A computer processor is programmed to determine the target position of x, y and z and pitch, roll and yaw. In an embodiment, the system can be configured to utilize an iteration procedure whereby an approximate first-order solution is proposed and tested against the identified precise target points to determine residual errors which can be divided by the local derivatives with respect to each component of rotation and translation, to determine an iterative correction.
US09305355B2 Photograph localization in a three-dimensional model
A photo localization application is configured to determine the location that an image depicts relative to a 3D representation of a structure. The 3D representation may be a 3D model, color range scan, or gray scale range scan of the structure. The image depicts a particular section of the structure. The photo localization application extracts and stores features from the 3D representation in a database. The photo localization application then extracts features from the image and compares those features against the database to identify matching features. The matching features form a location fingerprint, from which the photo localization application determines the location that the image depicts, relative to the 3D representation. The location allows the user to better understand and communicate information captured by the image.
US09305350B2 Non-touch optical detection of biological vital signs
A microprocessor is programmed to execute a spatial bandpass filter that is operable to apply spatial bandpass filtering to a plurality of images, a regional facial clusterial module that is operably coupled to the spatial bandpass filter and that applies spatial clustering to output of the spatial bandpass filter, a temporal bandpass filter that is operably coupled to the regional facial clusterial module and that is applied to output of the regional facial clusterial module, a temporal-variation identifier that is operably coupled to the temporal bandpass filter and that identifies a temporal variation of the output of the temporal bandpass filter and a vital-sign generator that is operably coupled to the temporal-variation identifier that generates a biological vital sign from the temporal variation.
US09305349B2 Apparatus and method for detecting lesion
An apparatus and method for detecting a lesion, which enables to adaptively determine a parameter value of a lesion detection process using a feature value extracted from a received medical image and a parameter prediction model to improve accuracy in lesion detection and lesion diagnosis. The apparatus and the method include a model generator configured to generate a parameter prediction model based on pre-collected medical images, an extractor configured to extract a feature value from a received medical image, and a determiner configured to determine a parameter value of a lesion detection process using the extracted feature value and the parameter prediction model.
US09305348B2 Rotating 3D volume of data based on virtual line relation to datum plane
A diagnosis imaging apparatus and an operation method thereof are provided. A diagnosis imaging apparatus includes: an image processing apparatus for detecting a first point and a second point on a heart wall of a valve of interest in a 3D volume data of a heart of a subject, rotating the 3D volume data to make a virtual line connecting the first point and the second point be parallel with a datum plane, and acquiring a 3D standard view of the valve of interest based on the rotated 3D volume data; and a display apparatus for displaying the 3D standard view.
US09305344B2 Method for improving linear feature detectability in digital images
The present disclosure is generally directed to of method linear feature detection in a structure by providing a first digital image of the structure, creating a second corresponding digital image of the structure from the first digital image and determining a direction to shift pixels of the second corresponding digital image. A pixel shift value may be input to shift pixels of the second corresponding digital image, and pixels of the second corresponding digital image are shifted by the input pixel shift value in the determined direction. A third corresponding digital image of the structure may be calculated by subtracting the second corresponding digital image of the structure from the first digital image of the structure.
US09305342B2 Method for acquiring a boundary line of an alignment film and method for inspecting the alignment film
The present invention provides a method for acquiring a boundary line of an alignment film, including the steps of: processing an edge of an image and determining the boundary line of the alignment film; conducting a first screen over the determined boundary line, and excluding a straight boundary line; and conducting a second screen toward the firstly-screened boundary line, and selecting the outmost boundary line as the actual boundary line of the alignment film. The present invention further provides a method for inspecting an alignment film. According to the method for acquiring a boundary line of an alignment film and the method for inspecting the alignment film provided the present invention, not only the actual boundary line of the alignment film could be acquired quickly and accurately by screening the determined boundary line, but also the error rate of determining the boundary line of the alignment film could be lowered, so as to facilitate the control and prevention of the alignment film; and the method is simple and easy to operate.
US09305339B2 Multi-feature image haze removal
Multi-feature image haze removal is described. In one or more implementations, feature maps are extracted from a hazy image of a scene. The feature maps convey information about visual characteristics of the scene captured in the hazy image. Based on the feature maps, portions of light that are not scattered by the atmosphere and are captured to produce the hazy image are computed. Additionally, airlight of the hazy image is ascertained based on at least one of the feature maps. The calculated airlight represents constant light of the scene. Using the computed portions of light and the ascertained airlight, a dehazed image is generated from the hazy image.
US09305336B2 Apparatus and method for estimating noise
A noise estimation apparatus and method to prevent texture from being erroneously determined as noise. To this end, the noise estimation method includes generating an initial noise map for an input image signal, generating at least one noise map based on a temporal change of an image signal continuing from the image signal, calculating a correlation value for each region between the initial noise map and the noise maps, and determining noise of an image according to a temporal change based on the correlation value.
US09305334B2 Luminal background cleaning
Apparatus and methods are described for use with an input angiogram image of a device inserted inside a portion of subject's body, the angiogram image being acquired in the presence of contrast agent. At least one processor (11) includes background-image-generation functionality (13) configured to generate a background image in which a relative value is assigned to a first pixel with respect to a second pixel, at least partially based upon relative values of surroundings of the first pixel and the surroundings of the second pixel in the input image. Cleaned-image-generation functionality (14) generates a cleaned image in which visibility of the radiopaque portions of the device is increased relative to the input image, by dividing the input image by the background image. Output-generation functionality (15) drives a display (16) to display an output based upon the cleaned image. Other applications are also described.
US09305328B2 Methods and apparatus for a distributed object renderer
A method performed by software generates a render request record for a render request submitted by a user of an app and stores the render request record in a queue database. The render request includes a visualization to be rendered. The software selects the render request record from the queue database. Selection of the render request record is determined at least in part by a priority value that depends on an amount of time the user has spent using the app. The software generates a rendered image for the selected render request record, using render data. Then the software publishes a publishing element including the rendered image to a newsfeed stream displayed by a social networking site.
US09305321B2 Authenticating a persona in a social networking system
A social networking system provides access to personas comprising information, for example, web pages describing users or entities. The information may be suggested by the social networking system or requested by the user, for example, via search. The social networking system authenticates the personas so that only authentic personas are suggested to users or returned when a user is searching for information. The authenticity of a persona is determined based on the connections and/or likes coming from other personas, user accounts, or other entities represented within the social networking system that have been previously authenticated. The authenticity of the persona is also determined based on external links to the persona, for example, external websites referring to the persona or the rate at which external systems such as search engines direct web traffic to the persona.
US09305320B2 Generation of activity stream from server-side and client-side data
In particular embodiments, the newsfeed is rendered to a particular user using the locally stored copy of the resource, instead of pulling it back from the server-side. Thus, a user may see his or her content even before it is completely uploaded to the social networking system. In particular embodiments, the user may interact with the content, for example, by adding comments, captions, “likes”, etc. to the content even before it has been completely uploaded to the social networking system. In this manner, the user is provided an increased feeling of responsiveness that is independent of the current wireless link condition.
US09305319B2 Controlling social network virtual assembly places through probability of interaction methods
A system and method for controlling a social network based virtual world, in which users are represented by avatars that in turn are linked to the user's real world social network social profiles. The users may virtually meet in various different virtual meeting places or “rooms”. In order to promote development of new and productive virtual relationships with a high degree of relevance to the user's real world experience, the system makes use of probability to interact (PTI) methods and algorithms. The PTI method keeps track of both the respective user's real-world interactions and virtual world interactions, computes one or more PTI values, and uses these PTI values to control the distribution of the user's avatars in a social interaction optimized manner. The PTI methods may also be used to control avatar appearance, suggest virtual events, and control the output of virtual event search engines.
US09305314B2 Methods of transmitting information to mobile devices using cost effective card readers
A method of transmitting information to a mobile device includes providing a card reader is provided with a read head, a slot for swiping a magnetic stripe of a card and device electronics that includes an analog front-end and a microcontroller. The analog to digital front end is coupled to a processing element in the microcontroller. A raw magnetic head signal is received at the analog to digital front end. The raw magnetic head signal is converted into a processed digital signal that the microcontroller can interpret. An output jack output jack signal is delivered to the mobile device.
US09305310B2 Enabling a user to verify a price change for an on-demand service
A method for enabling a user to verify a price change for an on-demand service is provided. One or more processors can determine a real-time price for providing the on-demand service to the user. The one or more processors can determine when the real-time price is equal to or exceeds a threshold price. In response to a request from the user for the on-demand service when the real-time price is equal to or exceeds the threshold price, an intermediate interface can be provided that the user is to correctly respond to before a service request can be transmitted to a service system.
US09305309B2 Remote transaction processing with a point-of-entry terminal using bluetooth
A method and system for conducting an online payment transaction through a point of sale device. The method includes receiving input from a user selecting an item for purchase through the point of sale device; calculating a total purchase amount for the item in response to a request from the user to purchase the item; and sending payment authorization for the total purchase amount from the point of sale device to a payment entity, in which the payment authorization is sent to the payment entity via a mobile communication device of the user. The method further includes receiving a result of the payment authorization from the payment entity through the mobile communication device; and completing the payment transaction based on the result of the payment authorization.
US09305308B2 System and method for batching content for playback on an electronic device
A system is disclosed for providing advertising (AD) content to a radio system of a vehicle. A smartphone may have a stored application thereon related to a specific broadcast station. A utility application may be associated with the radio system (RS) and used to inform the smartphone when the RS is tuned to the specific broadcast station. The RS may have a processor for detecting a start maker and a stop marker in a broadcast signal being received from the specific broadcast station, and to inform the smartphone when the start marker is detected. The start marker and the stop marker define a time interval where at least one advertisement is present in the broadcast signal. The smartphone may provide AD content to the RS which is inserted for playback during the time interval.
US09305306B2 Method and system for autonomously delivering information to drivers
A method delivers information to satisfy current needs of a driver of a vehicle, by first acquiring data related to a current state of the vehicle. The current state and a predictive model are passed to a predictive procedure to determine choice probabilities for nodes in a choice tree (CT). Based on the choice probabilities, information related to the current needs to the driver are selected from a database storing commercial and non-commercial information. Then, the information is delivered to the driver, wherein the delivering is autonomous of the driver.
US09305303B2 Webcast systems and methods with audience sentiment feedback and analysis
A sentiment analysis computing system includes a storage medium and a processing system. Sentiment input is received from audience members viewing a streamed/webcasted event. The received input is stored to the storage medium. A time slice of the webcasted event is determined and sentiment inputs that are within that time slice are obtained. A sentiment value is calculated for the determined time slice based on aggregated sentiment values. The calculated sentiment value for the time slice is then output by the sentiment analysis computing system.
US09305302B2 Weighting sentiment information
Weighting sentiment information includes capturing sentiment information of a post from an electronic source, categorizing the post into categories based on the sentiment information, and assigning a weight to the post based on an interest attribute.
US09305301B2 Method and system for providing real-time communications services
The present invention provides a method and a system for providing at least one communications service to one or more service providers by a communications service provider. Communications capabilities of the communications service provider are sliced into a plurality of virtual slices and each of the plurality of virtual slices is configured for a different service provider from among the one or more service providers. At least one communications service is provided to each of the one or more service providers through a respective configured virtual slice by the communications service provider. Each of the one or more service providers further provides the communications service to a user through the respective configured virtual slice in collaboration with the communications service provider.
US09305300B2 System and method for managing and updating information relating to economic entities
Methods and systems for managing and updating information relating to economic entities using sets of unique identifiers. A universe database contains record entries. Each of the record entries is associated with a unique universe identifier. A customer database contains customer record entries. Each customer record entry is associated with a unique customer identifier. A conversion table provides a mapping between the unique universe identifiers and the unique customer identifiers. The information contained in the customer database is updated using the unique universe identifiers, unique customer identifiers and the conversion table. The unique universe identifiers and the unique customer identifiers are stable over a period of time.
US09305299B1 System, method, and computer program for proactively identifying and addressing customer needs
A system, method, and computer program product are provided for proactively identifying and addressing customer needs. In use, at least one customer need for at least one customer is predicted, based, at least in part, on information associated with the one or more detected customer care request triggering events, information associated with the one or more customer care interactions, and information associated with the one or more after-effects.
US09305296B1 Method and apparatus for third party control of a device
A method and apparatus for third party control of a device have been disclosed. By utilizing a third party to control a device, view and control of a device may be separated.
US09305294B2 Systems and methods for transmitting magnetic stripe data
A device and method for waveform transmission of transaction card data to a merchant point-of-sale device are provided. The device includes a memory device for storing data, a processor, and a transmitter. The device is programmed to receive transaction card data that mimics data stored within a magnetic stripe associated with a transaction card, convert the transaction card data to a first data file for storage within the memory device, transmit the first data file to the transmitter, and transmit a first waveform from the transmitter to the POS device, wherein the first waveform includes changes in a magnetic field that represent the transaction card data.
US09305293B2 System for creating and processing coded payment methods
Embodiments of the invention include systems, methods, and computer-program products for a clearing house for creating and directing readable indicia to/from merchants, users, and/or vendors. As such, merchants, users, and vendors may all be able to recognize, read, and complete transactions using a created universal readable indicia, irrespective of the entities associated with the transaction. The invention may create and provide a universal readable indicia that may be read and/or scanned by any of a user, merchant, or vendor. Subsequently, upon scanning, the system may recognize the appropriate vendor associated with the scan, based on information about the user or merchant derived from the scan. As such, the invention may be able to convert the universal readable indicia to one or more indicia accepted by a vendor that may complete the transaction with the user and/or merchant.
US09305292B1 Systems and methods for providing an adaptable transponder device
Transponder alteration systems and methods are provided for altering the state of a transponder device in the field, the transponder device used by a transponder user. The system may comprise an alteration portion, disposed in a banking system, the alteration portion inputting an alteration request from a user for an additional application to be disposed upon the user's transponder device. The processing of the alteration portion may include (1) accessing a database to retrieve data to process the alteration request; (2) generating an information packet for the user based on the retrieved data, and outputting the information packet to the user; and (3) generating a data packet based on the retrieved data, and outputting the data packet to an interim device, such that the interim device interfaces with the transponder device to transmit the data packet to the transponder device.
US09305290B2 Employee vacation scheduling and payout system
Disclosed is an employee vacation scheduling system for enabling an employee to purchase vacation travel services on the basis of the availability of the paid leaves thereof. The vacation scheduling system comprises a database comprising a plurality of employees wherein, each employee is associated with the number of paid leaves the employee is entitled to. The scheduling system further comprises a store module for enabling an employee to purchase a vacation travel service that spans a predetermined number of vacation days, a date module for enabling the employee, in the process of purchasing the vacation travel service, to mark successive vacation dates for the utilization of the vacation travel service, and a payment module for enabling the employee to pay for the vacation travel service upon determining that the number of vacation days are lesser than or equivalent.
US09305287B2 Score and suggestion generation for a job seeker where the score includes an estimated duration until the job seeker receives a job offer
Methods, systems and computer program products are provided for generating a feasibility score for a job search and for generating a suggestion for enhancing the score. In one method, one or more computing devices receive, over a network, a data object that is associated with a user who is engaged in a search for employment. The data object includes a résumé of the user and a requirement that is associated with the search. The computers calculate, based on the data object, a score that indicates a likelihood of receiving an offer for an employment position that satisfies the requirement. The computers generate a suggestion that identifies how the score may be increased. The computers send the suggestion over the network to a computing device of the user.
US09305286B2 Model-driven candidate sorting
Methods and systems for model-driven candidate sorting for evaluating digital evaluations are described. In one embodiment, a sorting tool selects a data set of digital evaluation data for sorting. The data set includes candidate for evaluation candidates. The sorting tool analyzes the candidate data for the respective evaluation candidate to identify digital evaluation cues and applies the digital evaluation cues to a prediction model to predict an achievement index for the respective evaluation candidate. The list of evaluation candidates is sorted according the predicted achievement indices and the sorted list is presented to the reviewer in a user interface.
US09305282B2 Contact-less tag with signature, and applications thereof
An arrangement of goods, comprising: a plurality of units of an article, the units equipped with respective contactlessly readable tags; each of said tags comprising a respective memory configured to store a respective signature; the signatures stored in the memories of said tags appearing scrambled relative to one another when read by a reader. Also, a method, comprising: contactlessly reading a first signature from a first tag affixed to a first unit of an article; contactlessly reading a second signature from a second tag affixed to a second unit of the same article, the second signature appearing scrambled relative to the first signature; decrypting the first signature with a key to reveal (I) an identifier associated with the article and (II) a first scrambling code; and decrypting the second signature with the same key to reveal the same identifier and a second scrambling code different from the first scrambling code.
US09305279B1 Ranking source code developers
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for ranking developers. One of the methods includes obtaining data representing a plurality of developer actions for a developer, obtaining a net violation baseline for the code base, wherein the net violation baseline represents a measure of violation introductions compared to violation removals by a typical high-productivity developer of the code base, obtaining a developer action baseline for the code base, the developer action baseline representing a number of developer actions for the typical high-productivity developer of the code base. A net violation value and a developer action value are computed for the developer. A score is computed for developer including comparing the sum of the net violation value and the net violation baseline to the sum of the developer action value and the developer action baseline. The developer is ranked relative to other developers by the score.
US09305277B2 Method, system, and computer program product for efficient resource allocation
The present disclosure relates to a tool for increasing efficiency of development and upskilling of developers of software. The system may be configured to identify minimum skills for development of a software tool, identify elements of the software tool to be provided, establish a maximum timeline for completion of the elements of the software tool, based on the elements identified, and determine a proficiency status level appropriate to complete the development of the software tool based on both the identified skills and the elements.
US09305274B2 Traffic shaping based on request resource usage
A current request for a server to perform work for a user profile can be received and processed at the server. It can be determined whether server usage by the profile exhibits a sufficient trend toward a threshold value to warrant performing traffic shaping for the user profile. If so, then a delay time can be calculated based on, or as a function of, server resources used in processing the current request, and a response to the current request can be delayed by the delay time.
US09305273B2 Telephone number use analysis for grouping of consecutive telephone numbers based on assignment status
A system may include a network device including a memory. The memory may store a first database including a plurality of records, wherein each record in the first database stores a telephone number (TN) and a status of the corresponding TN. the first database may stores information to indicate whether one of the records in the first database was updated. The memory may store a second database having a plurality of records. Each record in the second database may indicate a range of consecutive TNs from the first database having a same status. The system may include processors to run a first thread to update the one of the records in the first database. The processors may run a second thread to generate the second database from the first database in response to the stored information indicating that the one of the records in the first database was updated.
US09305268B2 Monitoring and replaying user behaviors on the web
The present disclosure is directed to methods and systems for monitoring and replaying user interactions with one or more interactive electronic documents. The methods generally include identifying an event comprising an interaction between a user and an interactive electronic document, determining to record the event, identifying for the event a user action, a target element, and a set of element features, and recording data for recreating the event. Generally, the methods and systems monitor a training user's interactions with a document and generate an automated replay agent capable of replaying or recreating those interactions on the document or on similar documents. In some embodiments, the replay agent is able to place a document in a desired state and extract information from the document in the desired state. In some embodiments, the replay agent is trained to recognize elements, or types of elements, in the document.
US09305263B2 Combining human and machine intelligence to solve tasks with crowd sourcing
Methods are described for ideally joining human and machine computing resources to solve tasks, based on the construction of predictive models from case libraries of data about the abilities of people and machines and their collaboration. Predictive models include methods for folding together human contributions, such as voting, with machine computation, such as automated visual analyses, as well as the routing of tasks to people based on prior performance and interests. An optimal distribution of tasks to selected participants of the plurality of participants is determined according to a model that considers the demonstrated competencies of people based on a value of information analysis that considers the value of human computation and the ideal people for providing a contribution.
US09305258B1 Optimization of categorizing data items in a computing system
A set of techniques is described for optimizing the categorization of data items in a computing system. The techniques include continuously metering data items by traversing each data item through a chain of rules in a sequential order until the data item matches a rule. Once the item matches the rule, it can be successfully categorized. The system can then analyze the number of matches for each rule over a period of time and optimize the sequential order of the chain of rules according to the analysis of the number of matches. For example, the system can modify the sequential order by arranging the rules according to the number of matches of each rule. Alternatively, the system may compute a velocity of matches and use it to optimize the sequential order. Alternatively, the system may use the rate of change to optimize the sequential order.
US09305257B2 Adaptive cataclysms in genetic algorithms
It is determined that a population of candidate solutions for an optimization problem has prematurely converged during a metaheuristic optimization run. A cause for premature convergence of the population is determined based, at least in part, on an analysis of the metaheuristic optimization run. A first cataclysm strategy of a plurality of cataclysm strategies is selected based, at least in part, on one of the cause of the premature convergence and a history of the metaheuristic optimization run. A cataclysm is simulated based, at least in part, on the first cataclysm strategy.
US09305255B2 Electronic tag having wristband
An electronic tag having a wristband includes a base defining at least one receiving notch, a radio frequency identification element received in the base, at least one connecting element connecting the radio frequency identification element, a locking module captured in the receiving notch and resisting the connecting element, and a wristband mounted in the locking module. The radio frequency identification element, the connecting element, the locking module, and the wristband cooperate to form a closed loop circuit to achieve an electric induction. When the wristband is detached from the locking module, the closed loop circuit is cut and the radio frequency identification element sends out an alarm.
US09305254B2 Method of manufacturing a card of small thickness detachable from a plate of large thickness
A method of manufacturing a card (3) of small format (8) and small thickness (5), detachable from a plate (1) of large thickness (6), includes the following steps: providing in the plate (1) of large thickness (6) at least one hole (4) opposite with a cumulative depth (7) equal to the difference between the large thickness (6) and the small thickness (5), pre-cutting of the card (3) of small format (8) in the at least one hole (4). The product obtained by such a method is also described.
US09305251B2 Image processing apparatus and computer readable storage medium stored with control program of image processing apparatus
An image processing apparatus (1) according to the present invention includes a layer combining unit (11a) that generates a print image based on print data including a plurality of layers, a determining unit (11b) that determines whether objects included in different layers overlap each other in a single pixel constituting the print image, and a selecting unit (11c) that selects image processing to be performed with respect to the single pixel according to a combination of attribute information for each of the layers assigned to the single pixel, when the objects overlap each other in the corresponding single pixel.
US09305250B2 Image processing apparatus and image processing method including location information identification
An image processing apparatus includes an image-area separator that separates a character area from monochrome document data scanned by a scanner, a character pixel detecting unit that counts the number of pixels of a character in the main scanning direction and the sub-scanning direction included in a controller, a bolded character identifying unit that identifies a character as a bolded character in case the count result is larger than a predefined threshold value, and a color converter that converts the bolded character into color data.
US09305246B2 Method of analyzing tamper evident tape residue
Methods and systems for measuring the effectiveness of pigment transfer in a tamper evident tape. A test area can be established on a substrate upon which a residual image is formed by pulling a tamper-evident tape. The test area is divided into a predefined number of units. Then, the number of units in which a residual is left behind on a surface of the substrate can be counted and compared to the number of units within an area of un-applied tamper-evident tape of identical application design such that a percentage of units remaining on the substrate after removal of the tamper-evident tape with the residual comprises a criterion for evaluating a relative effectiveness of the tamper-evident tape.
US09305245B2 Methods and systems for evaluating handwritten documents
A method, a system, and a computer program product for evaluating a handwritten document comprising one or more text fields are provided. The method includes identifying a character in each of the one or more text fields in a digital image by applying a character recognition technique. The character type of the identified character is then compared with a predefined character type corresponding to the associated text field of the one or more text fields. The character type in each of the one or more text fields is then validated based on the comparison. Thereafter the identified character for each of the one or more text fields is recommended while digitalization of the handwritten document.
US09305228B1 Processing damaged items using image data lift
Methods, systems, and computer-readable media for processing damaged items using image data lift are presented. In some embodiments, a computing platform may receive image data of a deposit item. Subsequently, the computing platform may determine whether a magnetic ink character recognition (MICR) line of the deposit item is readable. If the MICR line is not readable, the computing platform may perform an image data lift on the image data to extract information from one or more visible fields of the deposit item. Then, the computing platform may identify a payor of the deposit item based on the extracted information and may determine whether the deposit item is an on-us item. If the deposit item is an on-us item, the computing platform may rebuild MICR information for the deposit item. Thereafter, the computing platform may process the deposit item for deposit based on the rebuilt MICR information.
US09305227B1 Hybrid optical character recognition
Embodiments of the subject technology provide for a hybrid OCR approach which combines server and device side processing that can offset disadvantages of performing OCR solely on the server side or the device side. More specifically, the subject technology utilizes image characteristics such as glyph details and image quality measurements to opportunistically schedule OCR processing on the mobile device and/or server. In this regard, text extracted by a “faster” OCR engine (e.g., one with less latency) is displayed to a user, which is then updated by the result of a more accurate OCR engine (e.g., an OCR engine provided by the server). This approach allows factoring in additional parameters such as network latency and user preference for making scheduling decisions. Thus, the subject technology may provide significant gains in terms of reduced latency and increased accuracy by implementing one or more techniques associated with this hybrid OCR approach.
US09305224B1 Method for instant recognition of traffic lights countdown image
A method for instant recognition of traffic lights countdown image that can quickly scan and confirm the circular feature image of a traffic light, and retrieve the countdown image thereof by calculating the displacement ratio from the circular image, then enhance, cut and converse the countdown image to display a feature image thereof, and proceed similarity comparison with collected data to calculate the percentage of similarity. The method eventually brings out a result from the image comparisons, so as to fulfill the effectiveness of searching and instantly recognizing the countdown image of a traffic light.
US09305220B2 Spectrum measurement device
A spectrum measurement device that recognizes objects to be measured on the basis of spectral data of observed light that is detected by a spectrum sensor capable of measuring wavelength information and light intensity information. The spectrum measurement device comprises a lighting device capable of projecting light that includes a wavelength region with a high atmospheric absorption index and recognizes the distance from a vehicle to an object to be measured through a computation that uses spectral data of observed light that is obtained from the object to be measured whereupon light of at least the wavelength region with the high atmospheric absorption index is projected.
US09305218B2 Methods and systems for identifying, marking, and inventorying large quantities of unique surgical instruments
An apparatus for automatically identifying a surgical instrument, the apparatus comprising a capture module, an attribute database, a comparison module, and an exporting module, the capture module comprising hardware operable to capture multiple attributes of the surgical instrument, the attribute database comprising multiple stored attributes of a plurality of reference surgical instruments, the comparison module programmed to generate a comparison score for the surgical instrument, wherein the comparison module is programmed to generate the comparison score by receiving multiple attributes captured by the capture module and comparing it to the multiple attributes stored in the attribute database, and the exporting module configured to receive and export the comparison score generated by the comparison module.
US09305215B2 Apparatus, method and computer readable recording medium for analyzing video using image captured from video
An apparatus for analyzing a video capture screen includes: a video frame extracting unit extracting at least one frame from a video having a plurality of frames; an extracted frame digitizing unit digitizing features of each of the at least one frame extracted by the video frame extracting unit; an image digitizing unit digitizing features of at least one collected search target image; an image comparing and searching unit comparing the search target image with the at least one frame extracted from the plurality of frames by digitized values of the collected search target image and the at least one frame; and a search result processing unit mapping related information of the collected search target image to a frame coinciding with the search target image and storing the related information in a database, when the extracted at least one frame coinciding with the search target image is present in a comparison result.
US09305214B1 Systems and methods for real-time horizon detection in images
Methods for detecting a horizon in an image with a plurality of pixels can include the step of blurring the image with a noise filter, then dividing the image into an M×N matrix of sub-blocks S. For each sub-block S, horizon features can be coarse-extracted by defining an r-dimensional vector having P feature values for each sub-block S and clustering each r-dimensional vectors into two clusters using a k-means statistical analysis. The corresponding sub-blocks S corresponding to the two clusters can be masked with a binary mask. The methods can further include the step of fine-extracting the horizon features at a pixel level for each sub-block Si, j and sub-block Si−1, j when the binary mask changes value from sub-block Si−1 j to said sub-block Si, j, for i=1 to M and j=1 to N.
US09305208B2 System and method for recognizing offensive images
According to one aspect, a method for categorizing at least one image includes obtaining the at least one image and mapping the at least one image to at least a first grid. The first grid is a two-dimensional grid that includes a plurality of cells. The method also includes characterizing the first grid, wherein categorizing the first grid includes determining whether the first grid is indicative of an offensive characteristic, and identifying the at least one image as offensive when it is determined that the first grid is indicative of the offensive characteristic. When it is determined that the first grid is not indicative of the offensive characteristic, the at least one image is identified as not offensive.
US09305204B2 Method and system to detect the microcalcifications in X-ray images using nonlinear energy operator
A method and system to detect the microcalcifications (MC) in different type of images viz. X-ray images/mammograms/computer tomography with varied densities using nonlinear energy operator (NEO) is disclosed to favor precise detection of early breast cancer. Such Microcalcifications are associated with both high intensity and high frequency content. The same NEO output is useful to detect and remove the irrelevant curvilinear structures (CLS) thereby helps in reducing the false alarms in micro calcification detection technique. This is effective on different dataset (scanned film, mammograms with large spatial resolution such as CR and DR) of varied breast composition (viz. dense, fatty glandular, fatty), demonstrated quantitatively by Free-response receiver operating characteristic (FROC). Importantly, the method and apparatus of the invention can be used in conjunction with machine learning techniques viz. SVM to favor detection of incipient or small microcalcifications, thus benefiting radiologists in confirming detection of micro-calcifications in X-rays images/mammograms and reducing death rates.
US09305203B2 Method for registering fingerprint image
A method for registering a fingerprint image is provided. The method comprises steps of: establishing an orientation field template base according to M training fingerprints, wherein M is a positive integer larger than one; receiving a fingerprint image to be registered; obtaining an initial orientation field of the fingerprint image; obtaining an estimated position and an estimated direction of the fingerprint image according to the initial orientation field and the orientation field template base; and registering the fingerprint image according to a preset position, a preset direction, the estimated position and the estimated direction.
US09305201B2 Symbol reading system with integrated scale base
A symbol-reading system includes a system housing having a horizontal housing portion and a vertical housing portion, the vertical housing portion being configured substantially orthogonal to the horizontal housing portion. The symbol-reading system also includes a symbol reading subsystem, disposed in the system housing, for reading symbols on objects and producing data representative of the read symbols. Additionally, the symbol-reading system includes a weigh scale subsystem including at least one load cell that supports the entirety of the system housing, the weigh scale subsystem being configured for measuring the weight of objects on the system housing and producing data representative of measured weights.
US09305196B2 Entity tracking
A method for tracking an entity is disclosed. In one embodiment, a plurality of messages conveying an identification of an entity are received using a wireless identification component. A geographic location of the wireless identification component is determined by a position determining component wherein the geographic location describes a respective geographic location of the wireless identification component when each of the plurality of messages is received. A geographic position of the entity is determined based upon a known spatial relationship between the position determining component and the wireless identification component.
US09305195B1 RFID tags and readers employing QT command to switch tag profiles
RFID readers transmit a Quiet Technology (QT) command to RFID tags causing at least one of the tags to transition between a private profile and a public profile. When a tag is inventoried in the private profile, it replies to the reader with contents from its private memory. When a tag is inventoried in the public profile, it replies to the reader with contents from its public memory, where the contents of the public memory may be a subset and/or modified version of the private memory contents, or entirely different altogether. The tag's profile can be switched again by another QT command from the reader, or following a loss of power at the tag. An access password and/or a short-range mechanism may be employed to allow only authorized readers to transition tag profiles or interrogate the private memory contents of tags in the public profile.
US09305194B2 One-touch input interface
Some demonstrative embodiments include a one-touch input interface. For example, a one-touch input interface may include a hybrid Body-Area-Network (BAN) Near-Field-Communication (NFC) module to receive NFC information from a NFC device via a body of a user; and a fingerprint sensor to sense a fingerprint of the user, wherein the hybrid BAN NFC module and the fingerprint sensor are to receive the NFC information and to sense the fingerprint during a touch of the one-touch interface by the user.
US09305191B2 Systems and methods for using a hand hygiene compliance system to improve workflow
A hand hygiene compliance (HHC) system that, in addition to monitoring hand hygiene, provides messaging and asset tracking capabilities to improve workflow amongst employees working at a facility. In one embodiment, the HHC system includes a control unit that is associated with a hand hygiene dispenser and programmed to enable use of a menu of icons each time the control unit detects use of the hand hygiene dispenser by as individual, wherein the icons allow the individual to, without limitation, communicate, enter, obtain, or update workflow information. More specifically, the menu of icons is displayed on a feedback device associated with the control unit, and users select icons by physically touching the feedback device. Alternatively, the control unit includes a gesture sense system which allows users to select one or more icons via touch-free gestures.
US09305184B2 Packet-processing scheduler, security context, authentication, packet header, air cipher subsystem
An electronic circuit (200) includes one or more programmable control-plane engines (410, 460) operable to process packet header information and form at least one command, one or more programmable data-plane engines (310, 320, 370) selectively operable for at least one of a plurality of cryptographic processes selectable in response to the at least one command, and a programmable host processor (100) coupled to such a data-plane engine (310) and such a control-plane engine (410). Other processors, circuits, devices and systems and processes for their operation and manufacture are disclosed.
US09305183B2 Method and apparatus for secure execution using a secure memory partition
A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code.
US09305182B1 Managing distribution of sensitive information
Managing distribution of sensitive data is disclosed. In one example, a request is sent to a control platform to add a virtual domain. A domain key associated with the virtual domain is received. A request that the credential be transmitted to the virtual domain is sent, along with the application credential which has been encrypted using the domain key. In another example, a request that one or more application credentials be pushed to a virtual domain is received from a configuration console. The virtual domain is notified that at least one action request associated with the virtual domain is available. A signed request is received from the virtual domain for the action request. The application credentials are transmitted to the virtual domain. In a third example, an application credential of a virtual domain is requested. A signed message including an encrypted application credential is received from the control platform.
US09305179B2 Systems and methods for reducing accuracy of web bugs
Systems and methods for reducing accuracy of web bugs are disclosed. In some implementations, a method includes, at a computing device, identifying an incoming electronic message addressed to an intended recipient. The incoming electronic message includes a plurality of content items provided by a content provider. The method also includes, before the intended recipient reviews the incoming electronic message, reducing accuracy of user activity tracking by the content provider, by: requesting on a modeled temporal basis, a download of a first media content item in the plurality of media content items. In some implementations, the first media content item is invisible to the intended recipient.
US09305178B2 Brokering data access requests and responses
The present invention extends to methods, systems, and computer program products for brokering data access requests and responses. Aspects of the invention include a brokering pipeline that sequentially processes data access requests and data access responses. The brokering pipeline manages access authentications, request brokering, response rewrite, cache, and hosting multiple (e.g., business) entities.
US09305162B2 Centralized selective application approval for mobile devices
A system and method for confirming an application change event associated with a device infrastructure of a mobile device, the method comprising the steps of: storing an application authorization list identifying a plurality of mobile applications, the application authorization list being remote from the mobile device over a communications network; receiving an application authorization request from the mobile device over the communications network, the application authorization request including application identification information; comparing the application identification information with one or more listed mobile applications of the plurality of mobile applications identified in the application authorization list; determining whether the application information matches any of the plurality of mobile applications to produce a decision instruction containing an authorization decision; and sending the decision instruction to the mobile device for subsequent processing of the decision instruction by a mobile agent associated with the device infrastructure; wherein processing of the decision instruction provides for confirmation of the application change event.
US09305153B1 User authentication
There is disclosed a user authentication device for generating time-varying authentication information for authenticating a user in an authentication system. The device comprising at least one sensor for sensing at least one of a biometric measurement of the user and a characteristic of the environmental surroundings of the device.There is also disclosed an authentication system and a method for authenticating a user in an authentication system.
US09305145B2 Site directed management of audio components of uploaded video files
A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio.
US09305143B2 Broadcasting of electronic documents preserving copyright and permitting private copying
A method of broadcasting electronic documents allowing the protection of copyright and private copying includes a network accessible control server taking customer orders, network accessible delivery and control servers, and equipment supporting a display for consulting the document. Each document copy is generated by the delivery server based on the document model ordered. A controller verifies digital rights in force at consultation time, and contains other digital rights acquired by the customer. Copy generation is triggered by the customer activating a URL link to the delivery server. This link was previously sent to the customer via electronic messaging by the order server, containing at least the unique identifier of the copy ordered. The copy is loaded onto the customer's equipment on completion of generation and can be consulted only after issuing a request to the control server containing the unique identifier, and the receipt of the response permitting consultation.
US09305142B1 Buffer memory protection unit
Embodiments described herein include systems and methods for managing security of a storage subsystem. Certain of these embodiments involve the use of a buffer protection module configured to intelligently police requests for access to the subsystem buffer memory.
US09305140B2 System and method of applying state of being to health care delivery
A system for assisting a subject to select a proper form of treatment. The system comprises: a monitoring section that remotely monitors a health status of the subject; an inference section that infers medical information about the subject based on information subject posted on social networks; a subject database that stores subject's information; and a symptom engine that stores symptoms of medical situations. The inference section applies the health status and the medical information against symptoms stored in the symptom engine to determine a proper form of treatment.
US09305137B1 Methods of identifying the genetic basis of a disease by a combinatorial genomics approach, biological pathway approach, and sequential approach
In one embodiment, the invention provides methods of identifying genes and genetic variants that, either alone or in combination, are important to the pathogenesis of a disease. In another embodiment, the disease is stratified by use of an immune response to disease-associated antigens. In another embodiment, the invention provides methods of identifying pathways that, either alone or in combination, are important to the pathogenesis of a disease. In another embodiment, the invention provides a method of diagnosing or predicting susceptibility to a disease in an individual by determining the presence or absence of genes and genetic variants that, either alone or in combination, are important to the pathogenesis of the disease.
US09305135B2 Generating a semiconductor component layout
A method includes generating a first set of configurations of a layout of semiconductor components. The configurations of the first set of configurations each satisfy a first sub-set of a set of design rules. The method also includes generating a second set of configurations of the layout of semiconductor components. The second set of configurations are generated by eliminating one or more configurations of the first set of configurations based on a determination that the eliminated one or more configurations of the first set of configurations fail to satisfy a second sub-set of the set of design rules. The method further includes manufacturing a semiconductor device having semiconductor components arranged based on one of the configurations of the second set of configurations.
US09305129B2 System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells
Clock networks constructed with variable drive strength clock drivers are prepared for tuning. The clock drivers are built from a smaller set of base standard cells. Locations of the input and output netlists of the macrocells are marked and reserved even through the extraction process. The macrocells are able to be flattened, generating a netlist with the base cells, and recombined during circuit simulation, thereby reducing the number of iterations, making the tuning flow more efficient. The clock network is initially tuned by adding or removing cross-links in the mesh to balance capacitive loads on each driver of the clock mesh.
US09305124B2 Methods for integrated circuit analysis
A simulation method for simulating a three-dimensional structure, comprises the steps of: discretizing the three-dimensional structure into two-dimensional (“2-D”) layers; constructing a two-dimensional basis for each of the 2-D layers; and constructing a one-dimensional finite difference basis between the 2-D layers.
US09305117B2 String generation tool
Metadata associated with at least one field defined in a user interface is identified. The metadata associated with the field defined in the user interface is processed to identify at least one characteristic of the field defined in the user interface. Based on the characteristic(s), a test string is generated for use as an input into the field defined in the user interface to perform validation on the field.
US09305113B2 Contextual query revision
Apparatus, systems and methods for contextual query revision are disclosed. A current search query is received during a search session. The current search query includes one or more current search tokens. Potentially inaccurate search tokens are identified from the one or more current search tokens. A possible replacement token is identified based upon the potentially inaccurate search token. A group of related tokens is identified from query logs, and a modified search query is generated if the replacement token is not included in the related tokens.
US09305112B2 Select pages implementing leaf nodes and internal nodes of a data set index for reuse
Provided are a computer program product, system, and method for selecting pages implementing leaf nodes and internal nodes of a data set index for reuse in memory. Pages in the memory are allocated to internal nodes and leaf nodes of a tree data structure representing all or a portion of a data set index for the data set, wherein the leaf nodes include information on members of the data set. The internal nodes include one or more keys used to traverse the tree data structure to reach the leaf nodes to access the members of the data set. At least one page allocated to the leaf nodes and the internal nodes is selected based on durations during which the allocated pages have not been used. Pages allocated to the leaf nodes are selected for reuse at a higher rate than the pages allocated to the internal nodes.
US09305106B1 Open web architecture and gadget workbench for cyber situational awareness and method therefor
A design and implementation of open web architecture for cyber situational awareness is disclosed herein. The architecture is user-centric, web-based and service-oriented to increase the flexibility of user dashboard and utilization of third-party provided information and web services. A method disclosed herein includes accessing a gadget workbench including a workflow to be executed by a web gadget. The method also includes interacting a data source with the workflow, interacting an analysis module with the workflow, and interacting a visualization module with the workflow. The method further includes generating the web gadget based on the data source, the analysis module and the visualization module.
US09305104B2 Systems and methods for behavioral pattern mining
Methods and systems of performing data mining may include receiving a plurality of web log records and a plurality of call log records; associating one or more web log records with a call log record, wherein the associated user for each of the associated one or more web log records and the call log record are the same; identifying one or more patterns among the web log records for the plurality of call log records, wherein each pattern comprises one or more web accesses, a time stamp at which each of the one or more web accesses is performed and the call topic for the call log record; identifying one or more web log records associated with a new call, and predicting a call topic for the new call based on at least one pattern and the one or more web log records.
US09305098B1 Pricing for online listings
An advertiser budget is retrieved from a data store. A set of traffic sources associated with the advertiser budget are identified. An allocated budget for the set of traffic sources is generated by allocating at least part of the advertiser budget to the set of traffic sources. At least one advertisement is delivered via a traffic source of the set of traffic sources based at least in part on the allocated budget.
US09305097B2 System and method for dissemination of relevant knowledge
A method comprises extracting one or more document identifiers from a document currently displayed on the user's computer screen. The method further comprises searching an enterprise network, using the one or more document identifiers, for one or more related documents that are related to the document currently displayed on the user's computer screen. The one or more related documents may then be filtered, and the user may be notified of the one or more filtered related documents.
US09305090B1 Predictive page loading based on suggestion data
Disclosed are various embodiments for predictive page loading. A number of speculative search queries are provided to a server. Each speculative search query includes one of a plurality of suggested keywords. The number of speculative search queries is based on the number of suggested keywords. Responses corresponding to the speculative search queries are obtained. Each response includes a corresponding plurality of speculative search results. A portion of speculative search results from more than one of the responses is rendered in a hidden portion of a browser window. The portion of the speculative search results is rendered in a visible portion of the browser window in response to receiving a user instruction to execute a committed search query that includes a suggested keyword in one of the speculative queries.
US09305086B2 Numeric channel tuner and directory server for media and services
Embodiments disclosed herein describe an apparatus, method and system for indexing online media content and services into numeric channel numbers and enabling a user device to access such content and services by entering the channel numbers. Embodiments may include a media and services tuner software module that resides on a user device and a directory server. The directory server may include a request module configured to receive a request including instructions to provide users access to content or services. Embodiments may also include a database module configured to determine a uniform resource locator for a server associated with the channel number within the received request.
US09305084B1 Tag selection, clustering, and recommendation for content hosting services
Content object tags at a content hosting service are used to classify stored content objects. Tags and clusters of tags (groups of one or more associated tags) can be recommended to a user of the content hosting service based on a user context, such as the browsing, viewing, uploading, or searching of content objects. Tags are scored based on content objects tagged with the tags in a targeted subset of content objects and a baseline subset of content objects, and based on the relevance of the content objects tagged with the tags. These tag scores can be weighted, and one or more tags can be selected for recommendation based on the weighted tag scores. Tag clusters can be selected for recommendation using a cluster hierarchy and determining whether a targeted subset of tags occur within a maximum number of tag clusters at a particular hierarchy level.
US09305079B2 Advanced spam detection techniques
The subject invention provides for an advanced and robust system and method that facilitates detecting spam. The system and method include components as well as other operations which enhance or promote finding characteristics that are difficult for the spammer to avoid and finding characteristics in non-spam that are difficult for spammers to duplicate. Exemplary characteristics include analyzing character and/or number sequences, strings, and sub-strings, detecting various entropy levels of one or more character sequences, strings and/or sub-strings and analyzing message headers.
US09305078B2 Registration of CIM agent to management agent and system
A Common Information Model (CIM) agent is registered to a management agent in a computing environment by a processor device. The management agent is discovered by the CIM agent in a management domain in response to an insertion of the CIM agent into the management domain. At least one of information of the CIM agent and the discovered management agent is registered by the CIM agent. The management agent is compliant with the CIM agent. The management agent is determined by matching a management object scope, or safety strategy in a predefined strategy of the discovered management agent with a management object, or safety strategy of the CIM agent.
US09305077B2 Managing multiple windows on an operator graph
Embodiments of the disclosure provide a method, system, and computer program product for managing a windowing operation. The method for grouping processing of a stream of tuples with each tuple containing one or more attributes can include receiving the stream of tuples to be processed by a plurality of processing elements operating on one or more computer processors. The method can also include processing, with a first processing method, a group of tuples from the stream of tuples into a grouping window. The method can also include processing, with a second processing method, a subgroup of tuples from the group of tuples into a subgrouping window. The second processing method can include identifying a sub-membership condition.
US09305072B2 Information storage system and data replication method thereof
An exemplary information storage system of the present invention includes a plurality of information storage nodes and an administration node. The administration node determines the defined number of information storage nodes for storing the data having the identical content to each of received data. The received data belong to the defined number of categories, respectively. In a case where use of a first information storage node in the plurality of information storage nodes is interrupted, each storage node replicates the data of an identical content to data stored in the first information storage node whose category is pre-associated with a category of the data stored in the first information storage node to an information storage node selected according to a predetermined sequence.
US09305069B2 Method and system for uploading data into a distributed storage system
A method for uploading an object into a distributed storage system is implemented at a computing device The computing device splits an object into one or more chunks and uploads the one or more chunks into the distributed storage system. For each uploaded chunk, the computing device receives a write token from the distributed storage system, inserts an entry into an extents table of the object for the chunk in accordance with the received write token and the chunk ID, chunk offset, and chunk size of the chunk, generates a digest of the extents table, the digest representing the one or more chunks that the client expects to be within the distributed storage system, and sends the digest of the extents table to the distributed storage system. The distributed storage system is configured to use the digest to determine whether it has each of the one or more client-expected chunks.
US09305068B1 Methods and apparatus for database virtualization
Methods and apparatus are provided for database virtualization. A virtualized database is designed by receiving a user selection of one or more existing databases for virtualization; receiving a user selection of a target virtualization platform host profile for the virtualized database; receiving a user selection of a target virtualization storage profile for the virtualized database; and providing the user with a comparison of an actual performance of the selected existing database and a projected performance of the existing database on the selected target virtualization platform host. A user can specify a backup and recovery profile for the virtualized database. Metadata affinity can optionally be analyzed for a plurality of the selected existing databases to identify an affinity correlation across the selected existing databases. Templates and/or configuration files can be generated for the selected target virtualization environment (optionally based on rule-based best practices).
US09305065B2 Calculating count distinct using vertical unions
A query statement is received that specifies a count distinct. Thereafter, a data flow graph that comprises a plurality of nodes for executing the query is generated. The nodes provide aggregation operations, sorting of results on join attributes and vertically appending columns of count distinct results with intermediate results from at least one of the aggregation operations. Thereafter, execution of the query is initiated using the data flow graph. Related apparatus, systems, techniques and articles are also described.
US09305064B1 Keyword-based conversational searching using voice commands
Methods, apparatus, and computer-readable media are described herein related to keyword-based conversational searching using voice commands. A computing device can receive an audio command for performing a search query. The computing device may receive a plurality of keywords associated with a subject matter of the search query, and computing device may configure the plurality of keywords as a plurality of audio instructions receivable by the computing device to cause the computing device to perform a subsequent search query. The computing device can then provide the plurality of keywords for display, along with search results associated with the search query.
US09305062B2 Methods and apparatus for targeting communications using social network metrics
A method for a computer system includes receiving a first user communication, determining a first group of users, determining a target number of users, determining whether the first group of users includes the target number of users, and if not, providing the communication to the first group of users, determining a hierarchal mapping of groups of users in response to user memberships, determining a second group of users from the hierarchal mapping, determining a plurality of social network relationship factors for the second group of users with respect to the first user, and providing the communication to at least a subset of users in the second group of users in response to the first plurality of social network relationship factors.
US09305061B2 Method and apparatus for staged content analysis
A system that incorporates teachings of the present disclosure may include, for example network device having a controller to receive multiple streams of content for portions of a multimedia work, perform a high level analysis for features in each of the streams for the multimedia work, perform a specialized analysis on the portion having a detected general feature to generate a content analysis output, correlate the content analysis output with other content analysis of the multimedia work, and output a weighted content description based on the correlation function. Other embodiments are disclosed.
US09305060B2 System and method for performing contextual searches across content sources
A request is received from a user to perform a contextual search based on a media file or metadata for the media file. A type of the media file is determined. A contextual search menu is presented to the user. A selected contextual search query type selected from the contextual search menu is received from the user. One or more search modules each associated with one or more content sources are queried to determine which one or more search modules can perform the selected contextual search query type. A request is generated for one or more search modules that can perform the selected contextual search query type to perform the selected contextual search query type against one or more selected content sources associated with the one or more search modules. Search results are received from the one or more search modules, wherein the search results include links to one or more files associated with the one or more content sources. The search results are displayed to the user.
US09305057B2 Extensible indexing framework using data cartridges
A framework or infrastructure (extensibility framework/infrastructure) for extending the indexing capabilities of an event processing system. The capabilities of an event processing system may be extended to support indexing schemes, including related data types and operations, which are not natively supported by the event processing system. The extensibility is enabled by one or more plug-in extension components called data cartridges.
US09305054B2 System and method for extracting analogous queries
A system for extracting analogous queries is disclosed. The system includes a search query extracting module, a query pair extracting module, and an analogous query extracting module. The search query extracting module creates a per-user search query DB by reading search queries inputted by users from a search log DB that contains user device identifiers, search queries inputted from user devices, and information about time when the users request a search. The query pair extracting module creates a per-user query pair DB by extracting, from the per-user search query DB, permutations of different two search queries among search queries inputted by a specific user. The analogous query extracting module reads query pairs having a specific query in the per-user query pair DB, and creates analogous queries by extracting counterparts of a specific query from the query pairs. The analogous queries are provided in response to a search request for a specific query from the user device.
US09305053B2 Dynamic sessionization of analytics data
The subject technology provides configurations for providing aggregated analytics tracking data associated with a dynamically generated session in response to a query for analytics tracking data. A query for analytics tracking data associated with a period of time is received in which the analytics tracking data includes data for tracking activity associated with a web site or application. The subject technology determines analytics tracking data for aggregating according to the period of time in order to associate the aggregated analytics tracking data with a dynamically generated session. The aggregated analytics tracking data associated with the dynamically generated session is then provided in response to the query.
US09305051B2 Mining broad hidden query aspects from user search sessions
An optimization-based framework is utilized to extract broad query aspects from query reformulations performed by users in historical user session logs. Objective functions are optimized to yield query aspects. At run-time, the best broad but unspecified query aspects relevant to any user query are presented along with the results of the run time query.
US09305049B2 Addressing cross-allocated blocks in a file system
A mechanism is provided for cross-allocated block repair in a mounted file system. A set of cross-allocated blocks are identified from a plurality of blocks within an inode of the mounted file system, based on a corresponding bit associated with each cross-allocated block in a duplicated block information bitmap being in a first identified state. The set of cross-allocated blocks are repaired using a user-defined repair process. Then one or more of the set of cross-allocated blocks are deallocated based on results of the user-defined repair process.
US09305048B2 System with multiple conditional commit databases
A system for processing a transaction is disclosed. The system comprises a processor and a memory. The processor is configured to check a condition using data in a first database, wherein the data is associated with a transaction, wherein the data in the first database is latched before checking the condition and is unlatched after checking the condition. The processor is further configured to indicate to a second database to check the condition using data in the second database, wherein the data is associated with the transaction. The data in the second database is latched before checking the condition and is unlatched after checking the condition. The memory is coupled to the processor and configured to provide the processor with instructions.
US09305039B2 Indexing of large scale patient set
Systems and methods for indexing data include formulating an objective function to index a dataset, a portion of the dataset including supervision information. A data property component of the objective function is determined, which utilizes a property of the dataset to group data of the dataset. A supervised component of the objective function is determined, which utilizes the supervision information to group data of the dataset. The objective function is optimized using a processor based upon the data property component and the supervised component to partition anode into a plurality of child nodes.
US09305037B2 Methods, systems, and computer program products for providing an integrated knowledge management system
Embodiments provide an automated knowledge management service. A method includes receiving, at a computer processor that implements the knowledge management service, a request for information from a requesting entity. The method also includes generating, by the computer processor, a search query to search for the information across multiple compartmentalized data sources that are non-local to the automated knowledge management service, searching the multiple compartmentalized data sources for the information, and retrieving the information from one of the multiple compartmentalized data sources. The method further includes determining an access channel for transmitting the information, formatting the information to correspond to a format recognized by the access channel, and transmitting formatted information to the requesting entity.
US09305028B2 Gaming platform utilizing a fraud detection platform
A system, computer-readable storage medium storing at least one program, and a computer-implemented method for detecting fraud in a social gaming environment is disclosed herein. For example, game events generated responsive to a player playing a game executing on a client device are received. The game events may then be used to build a player profile for the player. The player profile may characterize the game actions performed by the player. The player profile is then compared with a golden profile. The golden profile may specify an expected gaming behavior. Based on the comparison between the player profile and the expected gaming behavior specified by the golden profile, a player account associated with the player may be marked as suspicious.
US09305025B2 Content selection based on image content
Methods, systems, and apparatus, include computer programs encoded on a computer-readable storage medium, for determining keywords for an image that supports an overlay content item. A method includes identifying, using one or more processors, an image that is to support an overlay content item, the image being presented on a web site and including a portion that is designated as being enabled to receive and display the overlay content item; evaluating pixel data associated with the image including determining one or more labels that are associated with content included within the image; and determining one or more keywords for the image based at least in part on the one or more labels.
US09305023B2 Storing and retrieving large images via DICOM
Systems, methods, and media for storing a digital image using the Digital Imaging and Communication in Medicine (DICOM) standard. In an embodiment, a digital image at a first resolution is divided into a plurality of regions. Each of the plurality of regions is stored as a separate DICOM image file. In addition, each of the DICOM image files is associated with a DICOM series representing the digital image at the first resolution.
US09305021B2 Systems and methods for presenting point of interest (POI) information in an electronic map, and storage medium thereof
A map system for presenting Point of Interest (POI) information is provided with an interface module, a storage unit, and a processing module. The interface module is coupled to a display device and provides an operation interface for receiving a search query and a condition of time period. The storage unit stores a plurality of POIs data and verified data of the POIs each corresponding to a respective one of different time periods. The processing module filters the POIs and the verified data according to the search query and the condition of time period to generate an electronic map, and displays the electronic map to present the filtered POIs via the interface module and the display device.
US09305012B2 Method for data maintenance
A method for data storage implemented in a data storage system is disclosed. Data storage nodes may be interconnected by means of a communications network. The method may include sending a request for a first data item to a plurality of storage nodes. The first data item may include a reference to a second data item stored in the storage system. The method may include receiving the first data item from at least one storage node, and sending a request for the second data item to the plurality of storage nodes based on the reference included in the first data item.
US09305010B1 Virtual file system providing interface between analytics platform and physical file system
A virtual file system is arranged between a physical file system and an analytics platform comprising a plurality of compute nodes, and is configured to control movement of data between the analytics platform and the physical file system. For example, the virtual file system may be configured to present to the analytics platform a software application programming interface (API) through which the analytics platform accesses data stored in the physical file system. The analytics platform illustratively comprises a unified analytics platform that is configurable to support both database analytics and map-reduce analytics. In some embodiments, the physical file system comprises one or more of a Lustre file system, a Hadoop Distributed File System (HDFS) and a General Parallel File System (GPFS), and the virtual file system comprises a parallel log-structured file system (PLFS).
US09305006B2 Media compression in a digital device
Some embodiments of a method to automatically compress content in a digital device have been presented. In some embodiments, available data storage space in the digital device is monitored. When the available data storage space falls below a predetermined threshold, a user of the digital device is automatically asked whether the user allows compression of one or more types of content stored on the digital device in order to increase data storage space available.
US09305001B2 Cluster view for storage devices
One or more techniques and/or systems are provided for generating a macroscopic cluster view of storage devices, as opposed to merely an isolated view from an individual node. For example, nodes within a node cluster may be queried for storage device reports comprising storage device information regarding storage devices with which the nodes are respectively connected (e.g., I/O performance statistics, path connections, storage device attributes, status, error history, etc.). The storage device reports may be aggregated together to define one or more storage device data structures (e.g., a storage device data structure comprising one or more tables that may be populated with storage device information). In this way, the cluster view may be generated based upon querying one or more storage device data structures (e.g., an error cluster view, a storage device cluster view, a node summary cluster view, etc.).
US09305000B1 Creating and publishing service level representations of applications from operational representations
Service level representations of applications being made highly available are automatically created and published, based on their operational representations. A repository containing multiple application service templates is maintained. Each application service template defines the attributes of an application type to include in corresponding service level representations. To create a service level representation for a specific application instance, an appropriate application service template is selected from the repository. The attributes of a copy of the selected template are populated with values describing the application instance and its associated resources (including a service identifier), thereby automatically creating a service level representation of the application instance. The attributes can be populated with data read from resources of the operational representation of the application instance. The created service level representation is validated, and published to the application service consumer for which the application is being made highly available.
US09304995B2 Systems and methods for storing and searching data in a customer center environment
A method includes generating data from workforce applications, at least one of the workforce applications including at least one of forecasting, scheduling, recording, and monitoring functionalities; and storing the data from the at least one of the workforce applications in a storage area network (SAN), the SAN being operable to connect the at least one of the workforce applications to computer storage devices. This may also include keeping recorded contacts in a long term storage device such as the SAN or an operational data store (ODS) and transparently searching in both the ODS and the SAN simultaneously. With a concept of moving data on to a file system SAN which is cheaper as compared to a database technology such as ODS, the method facilitates predictable performance from the ODS and easier manageability with constant cost from SAN.
US09304993B2 Methods and data structures for multiple combined improved searchable formatted documents including citation and corpus generation
Searchable annotated formatted documents are produced by correlating documents stored as photographic or scanned graphic representations of an actual document (evidence, report, court order, etc.) with textual version of the same documents. A produced document will provide additional details in a data structure that supports citation annotation as well as other types of analysis of a document. The data structure also supports generation of citation reports and corpus reports. Methods of creating searchable annotated formatted documents including citation and corpus reports by correlating and correcting text files with photographic or scanned graphic of the original documents. Data structures for correlating and correcting text files with graphic images. Generation of citation reports, concordance reports, and corpus reports. Data structures for citation, concordance, and corpus reports generation. Multiple document data structures are used to create multiple citation documents and reports. Embodiments of citation reports and corpus reports contain correlated, comprehensive multiple citations.
US09304991B2 Method and apparatus for using monitoring intent to match business processes or monitoring templates
Methods and apparatus are provided for using monitoring intent to match business processes or monitoring templates. One or more business processes and monitoring templates are identified by obtaining at least one business process or monitoring template, wherein at least one of the obtained business process or monitoring template has an associated monitoring intent comprising one or more monitoring keywords; obtaining a user-specified monitoring intent from the user, the user-specified monitoring intent comprising one or more search keywords; assigning a score to at least one of the obtained business process or monitoring template, wherein the score is based on a matching of one or more of the monitoring keywords from the associated monitoring intent with the search keywords of the user-specified monitoring intent; and identifying the one or more of the plurality of business processes and the plurality of monitoring templates based on the assigned score. The business processes and monitoring templates each have a plurality of keywords and a weighted score is optionally assigned to each of the plurality of keywords. The assigned score is based, for example, on a weighted score of matching keywords. A ranked list is optionally generated.
US09304989B2 Machine-based content analysis and user perception tracking of microcontent messages
A system and a method for microcontent natural language processing are presented. The method comprising steps of receiving a microcontent message from a social networking server, tokenizing the microcontent message into one or more text tokens, performing a topic extraction on the microcontent message to extract topic metadata, generating sentiment metadata for the microcontent message, analyzing co-occurrence of all available metadatas in the plurality of microcontent messages, producing a list that ranks the plurality of microcontent messages based on all available topic metadata, and compiling a trend database that reveals how perception of users of the social networking server on a given topic changes by tracking how the list changes over time.
US09304986B1 Methods and systems to automatically connect with interfaces
Methods and systems to automatically build a native interface for connecting a hardware block to an external component such as a processor or a memory. A description file of the hardware block is parsed to extract a plurality of interface signals. A register map is automatically created, in hardware, based on the extracted interface signals. A wrapper is automatically generated for interfacing with the automatically built register map according to a target interface.
US09304983B2 Method and system for Xform generation and processing application integration framework
The present invention is a method, system and framework for generating and processing XForms documents. Utilizing the method, system and framework of the present invention, developers need only write loosely coupled components that implement the minimal application-specific interface code, and the method, system and framework coordinates the generation and processing based on a description of the form's lifecycle. It also allows developers to reuse components created for other integrations that implemented the framework. The advantage of the method, system and framework is to significantly reduce development effort to integrate XForms with a vast number of applications, while all known solutions are specific to a single integration case.
US09304982B2 Systems and methods for validating and correcting automated medical image annotations
Systems and methods are disclosed for manipulating image annotations. One method includes receiving an image of an individual's anatomy; automatically determining, using a processor, one or more annotations for anatomical features identified in the image of the individual's anatomy; determining a dependency or hierarchy between at least two of the one or more annotations for anatomical features identified in the image of the individual's anatomy; and generating, based on the dependency or hierarchy, a workflow prompting a user to manipulate the one or more annotations for anatomical features identified in the image of the individual's anatomy.
US09304979B2 Authorized syndicated descriptions of linked web content displayed with links in user-generated content
Syndicated descriptions of web content are obtained from feeds. For each item of each feed, a link is followed to a content page, and it is determined whether the content page directly or indirectly points back to the feed. If so, the description of the item from the feed is stored as an authorized description with a canonical form of the link to the item. Subsequently, when an item of user-generated content that includes a link to web content is received, the link to the web content is canonicalized. Based on the canonicalized link, any stored authorized syndicated descriptions of the linked content is obtained. If more than one authorized syndicated description of an item of linked content is available, one is selected. Then, the item of user-generated content containing a link can be published with an authorized syndicated description of the linked content.
US09304978B2 Maintenance of XML documents
A system and a method of maintaining extensible markup language (XML) document includes splitting an XML document into fragments according to rules stored in a configuration file, binding each of the fragments to an object in a content management system, and providing a reference between the XML document and the fragments.
US09304975B2 Gluing layout containers
A method is disclosed for laying out a plurality of containers on a page to generate a document upon insertion of content in the containers. The containers each have edges whose position upon layout is independent of the dimensions of the content inserted in each container. An association is created between an edge of a first container and an edge of a second container that is parallel and opposed to the first edge which constrains the second edge to a relation to the first edge. The page may then be laid out using the containers such that the edge of the first container moves dependent on the dimensions of content inserted in the first and second containers.
US09304972B2 Lookup table sharing for memory-based computing
Systems for memory-based computing include combining multiple operations into a single lookup table and combining multiple memory-based operation requests into a single read request. Operation result values are read from a multi-operation lookup table that includes result values for a first operation above a diagonal of the lookup table and includes result values for a second operation below the diagonal. Numerical inputs are used as column and row addresses in the lookup table and the requested operation determines which input corresponds to the column address and which input corresponds to the row address. Multiple operations are combined into a single request by combining respective members from each operation into respective inputs an reading an operation result value from a lookup table to produce a combined result output. The combined result output is separated into a plurality of individual result outputs corresponding to the plurality of requests.
US09304970B2 Extended fingerprint generation
A system for creating a representation of a location based on information sensed at the location. For example, apparatuses may comprise various sensors that sense apparatus-related information (e.g., motion, direction, etc.) while also visual, signal, field, etc. information pertaining to a location. Apparatuses may store sensed information about the apparatus while at a particular location, and about the particular location itself, in a mapping database, which may then associate the various types of sensed information with information already stored in the database in order to create a representation of the location.
US09304965B2 Scheduling apparatus and method for load balancing when performing multiple transcoding operations
According to one embodiment, a scheduling method for load balancing in an electronic device such as a server when performing multiple transcoding operations includes performing a first transcoding operation in order to transmit at least one moving image file to a first terminal. The server receives a request from a second terminal to transmit at least one moving image file while performing the first transcoding. The server performs a second transcoding operation in order to transmit the requested moving image file to the second terminal. The server monitors output frame rates of the first transcoding operation and the second transcoding operation, to control the output frame rates.
US09304959B2 Method of optimizing the width of transaction ID for an interconnecting bus
The present invention discloses a method of to generate transaction ID(s) in a bus interconnection design. An encoding table for each slave can be derived by calculating all possible transactions from all the masters to the slave so as to determine the minimum width of the transaction ID received by the slave in the interconnecting bus design, thereby avoiding the routing congestion in the interconnecting bus.
US09304956B2 Interrupt blocker
A method comprises maintaining, in a first electronic device, a list of one or more electronic devices associated with a user, receiving, in the first electronic device, a first command, in response to the first command, forwarding a command to block interrupts on one or more electronic devices on the list of electronic devices. Other embodiments may be described.
US09304955B2 Techniques for identifying and handling processor interrupts
A method for identifying and reporting interrupt behavior includes incrementing a counter when an interrupt signal is a designated type and is not received from an approved peripheral device, and performing a corrective action when the counter reaches a threshold value. In some embodiments, the designated type of the interrupt signal comprises a System Management Interrupt (SMI), which has the capability of halting operations at all processors within a system to execute associated instructions within a protected circumstance, resuming normal operations for each of the plurality of processors when the corrective action has been completed. In another embodiment, the corrective action includes creating a report identifying, within the same protected circumstance, the interrupt signal as an SMI. In some embodiments, the method performs a different corrective action when an interrupt signal is a designated type and is received from an approved peripheral device and decrements a counter. In some embodiments, the interrupt signal includes information indicating its source.
US09304954B2 Multi processor bridge with mixed Endian mode support
An asynchronous dual domain bridge is implemented between the cache coherent master and the coherent system interconnect. The bridge has 2 halves, one in each clock/powerdown domain—master and interconnect. The asynchronous bridge is aware of the endian view used by each individual processor within the attached subsystem, and can perform the appropriate endian conversion on each processor's transactions to adapt the transaction to/from the endian view used by the interconnect.
US09304953B2 Memory controller devices, systems and methods for translating memory requests between first and second formats for high reliability memory devices
A device can include an interface circuit configured to translate memory access requests at a controller interface of the interface circuit into signals at a memory device interface of the interface circuit that is different from the controller interface, the interface circuit including a write buffer memory configured to store a predetermined number of data values received at a write input of the controller interface, and a read buffer memory configured to mirror a predetermined number of data values stored in the write buffer memory; wherein the memory device interface comprises an address output configured to transmit address values, a write data output configured to transmit write data on rising and falling edges of a periodic signal, and a read data input configured to receive read data at the same rate as the write data.
US09304950B2 Overclocked line rate for communication with PHY interfaces
A system side interface of a PHY chip used in conjunction with a 100 GBASE backplane, sends and receives data using an NRZ signal format, but at a data rate of between about 26.5 Gbps/per lane to 27.2 Gbps/per lane, which is consistent with the PAM 4 signaling protocol. Thus, chip-to-chip communications between a PHY chip and a switch or controller chip can use an “overclocked” NRZ signaling format, reducing the amount of logic needed, which in turn can reduce signal latency, and reduce the chip area and power consumption required to implement the logic.
US09304944B2 Secure memory access controller
A memory access circuit and a corresponding method are provided. The memory access circuit includes a crypto block in communication with a memory that encrypts data of a data block on a block basis. The memory access circuit also includes a fault injection block configured to inject faults to the data in the data block. The memory access circuit further includes a data scrambler and an address scrambler. The data scrambler is configured to scramble data in the memory by shuffling data bits within the data block in a plurality of rounds and mash the shuffled data bits with random data. The address scrambler is configured to distribute the scrambled data across the memory. A memory system including the memory access circuit is also disclosed to implement the corresponding method.
US09304938B2 Storage device and data transferring method thereof
A data transferring method of a storage device is provided. The method may include transferring a first data to a first outbound area, transferring the first data sent to the first outbound area to a first area of a main memory corresponding to a first address programmed by an address translation unit, transferring a second data to a second outbound area in response to an indication that the address translation unit is to be reprogrammed, and transferring the second data sent to the second outbound area to the first outbound area.
US09304936B2 Bypassing a store-conditional request around a store queue
In response to receipt of a store-conditional (STCX) request of a processor core, the STCX request is buffered in an entry of a store queue for eventual service by a read-claim (RC) machine by reference to a cache array, and the STCX request is concurrently transmitted via a bypass path bypassing the store queue. In response to dispatch logic dispatching the STCX request transmitted via the bypass path to the RC machine for service by reference to the cache array, the entry of the STCX request in the store queue is updated to prohibit selection of the STCX request in the store queue for service. In response to the STCX request transmitted via the bypass path not being dispatched by the dispatch logic, the STCX is thereafter transmitted from the store queue to the dispatch logic and dispatched to the RC machine for service by reference to the cache array.
US09304933B2 Techniques to request stored data from a memory
Techniques are described to configure a cache line structure based on attributes of a draw call and access direction of a texture. Attributes of textures (e.g., texture format and filter type), samplers, and shaders used by the draw call can be considered to determine the line size of a cache. Access direction can be considered to reduce the number of lines that are used to store texels required by a sample request.
US09304928B2 Systems and methods for adaptive prefetching
Systems and methods which provide for improved prefetching schemes for caching data in a storage network are described. In one embodiment, a dynamically adaptive prefetching mechanism based on block access history information and prior effectiveness of prefetching is provided. Embodiments may take into account prefetch efficiency; a dynamic value indicating the usefulness of past prefetches, prefetch wastage, in conjunction with prefetch resources available at any point in time, to determine the number of blocks to read-ahead during a prefetch. Such embodiments provide improvements over file-based prefetching and previous block schemes, as they provide a finer grain of control over both prefetch block selection, and the number of blocks to prefetch based on block (or block range) access history.
US09304925B2 Distributed data return buffer for coherence system with speculative address support
The MSMC (Multicore Shared Memory Controller) described is a module designed to manage traffic between multiple processor cores, other mastering peripherals or DMA, and the EMIF (External Memory InterFace) in a multicore SoC. Each processor has an associated return buffer allowing out of order responses of memory read data and cache snoop responses to ensure maximum bandwidth at the endpoints, and all endpoints receive status messages to simplify the return queue.
US09304921B2 Affinity group access to global data
A method, system, and computer readable medium to share data on a global basis within a symmetric multiprocessor (SMP) computer system are disclosed. The method may include grouping a plurality of processor cores into a plurality of affinity groups. Global data may be copied into a plurality of group data structures. Each group data structure may correspond to an affinity group. The method may read a first group data structure by a thread executing on a processor core associated with a first affinity group.
US09304920B2 System and method for providing cache-aware lightweight producer consumer queues
A multiprocessor system or a system of hardware accelerators is provided to reduce cache ping-ponging and to provide improved single producer single consumer (SPSC) queues and methods. The systems are configured for specifying separate cache attributes for inner (e.g., local) cache and outer (e.g., shared) cache for promoting lower system overhead. Separate cache attributes are specified such that shared variables are cacheable only in a cache level shared by multiple processors.
US09304918B2 Computer system and cache control method
A computer system, comprising: a server; and a storage system, the server including an operating system, the storage system including a storage control part, wherein the operating system is configured to: transmit a read request for first data to the storage system in a case of receiving the read request for the first data not stored in a server cache from an application; store the first data received from the storage system into the server cache, and wherein the storage control part is configured to: read the first data from the storage cache, transmit the read first data to the server, and invalidate the first data stored in the storage cache.
US09304917B2 Flush control apparatus, flush control method and cache memory apparatus
A flush control apparatus controls a Set Associative cache memory apparatus. A flush control apparatus includes: a tag memory unit associating a tag identifier identifying a tag which associates a plurality of cache lines and tag information representing whether or not the tag is valid. It also includes a line memory unit, a way specification unit and a flush unit which flushes the way specified by the way specification unit.
US09304914B1 Deduplicated cache system of a storage system
A computer-implemented method for caching content in a cache memory device is disclosed. The method starts with receiving a request for accessing a first data block associated with a first file, and a file manager provides access of the first data block in a persistent storage device of a storage system. The file manager then caches the first data block in a cache memory device including deduplicating the first data block, wherein at least some of data blocks stored in the cache memory device are deduplicated data blocks, and wherein at least one of the data blocks is referenced by different regions of an identical file or different files.
US09304910B2 Slice formatting and interleaving for interleaved sectors
A storage system and method for interleaving a plurality of logical sectors in the storage system is disclosed. The method includes: dividing each logical sector into a predetermined number of slices; sequentially indexing the logical sectors, wherein each logical sector is identified by a logical sector index; sequentially indexing the predetermined number of slices in each logical sector, wherein each slice of the predetermined number of slices is identified by a slice index within each logical sector; and interleaving the logical sectors according to a slice interleaving process. The interleaving step further includes: a) identifying a first indexed slice of a first indexed logical sector as an initial slice; and b) identifying a subsequent slice by advancing the slice index to a subsequent index in the slice index sequence and advancing the logical sector index to a subsequent index in the logical sector index sequence.
US09304902B2 Network storage system using flash storage
A system can comprise an I/O circuitry, a processor, reconfigurable circuitry, an array of flash storage devices, and a serial interconnect network that is coupled to transfer data between the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The processor can be configured to designate an interconnect address space for use in communication over the interconnect network among the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The reconfigurable circuitry can be configured to translate data addresses during transfers of data between the I/O circuitry and the array of flash storage devices. A method to access an array of flash storage devices that are coupled to I/O circuitry over a serial interconnect network can comprise using reconfigurable circuitry to capture data during transfers of data over the serial interconnect network.
US09304896B2 Remote memory ring buffers in a cluster of data processing nodes
A data processing node has an inter-node messaging module including a plurality of sets of registers each defining an instance of a GET/PUT context and a plurality of data processing cores each coupled to the inter-node messaging module. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables a particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a different data processing node coupled to the data processing node through a fabric without involvement of an operating system of any one of the data processing cores.
US09304895B1 Evolutionary technique with n-pool evolution
Roughly described, a training database contains N segments of data samples. Candidate individuals identify a testing experience level, a fitness estimate, a rule set, and a testing set TSi of the data samples on which it is tested. The testing sets have fewer than all of the data segments and they are not all the same. Testing involves testing on only the individual's assigned set of data segments, updating the fitness estimates and testing experience levels, and discarding candidates through competition. If an individual reaches a predetermined maturity level of testing experience, then validating involves further testing it on samples of the testing data from a testing data segment other than those in the individual's testing set TSi. Those individuals that satisfy validation criteria are considered for deployment.
US09304890B2 Method for throttling trace data streams
A method of managing a debug trace data stream by detecting conditions where the trace data generated exceeds the available transmission bandwidth, and throttling the trace data stream to ensure that the bandwidth available for the trace data stream is not exceeded. A trace data gap is inserted into the data stream to indicate the amount and type of data discarded during the throttling process.
US09304886B2 Associating energy consumption with a virtual machine
Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.
US09304881B2 Trace routing network
Hardware emulation produces relevant and irrelevant trace data. Verification of a design under test requires knowledge of the relevant trace data. Data lines are provided to capture trace data from the hardware emulator's logic elements during emulation. The data lines connect the outputs of these logic elements to the inputs of a configurable interconnect circuit. The configurable interconnect circuit is capable of being programmed to select from a plurality of these inputs to connect a number of the data lines to a scan chain or trace data storage circuit. The configurable interconnect circuit can then selectively connect those data lines carrying relevant trace data to a trace data processing circuit. The trace data processing circuit may be a scan chain, analysis device or storage device or other suitable trace data processing device.
US09304875B2 Dynamically tracking logical units moving between input/output ports of a storage area network target
A technique for operating a storage area network includes detecting an input/output operation failure associated with a logical unit number, which is associated with a first target port. The technique also includes determining, subsequent to the detected input/output operation failure, whether the logical unit number is associated with a second target port. Finally, the technique includes routing subsequent input/output operations for the logical unit number to the logical unit number via the second target port, in response to determining that the logical unit number is associated with the second target port.
US09304872B2 Method for providing a value for determining whether an error has occurred in the execution of a program
In one embodiment, a method is provided for data processing in order to provide a value for determining whether an error has occurred in the execution of a program. The method may include: determining a numerical value on the basis of a plurality of reference numbers determined by a checking circuit outside the program; determining a signature of at least one instruction of the program by means of an arithmetic code; updating a cumulative value on the basis of the numerical value and the signature; and transferring the updated cumulative value to the checking circuit in order to determine whether an error has occurred in the execution of the program, on the basis of the plurality of reference numbers and the cumulative value.
US09304870B2 Setting copy permissions for target data in a copy relationship
Providing a computer program product, system, and method for setting copy permissions for target data in a copy relationship. Source data is copied from a first storage to a first data copy in a second storage. A request is received to copy requested data from the first data copy to a second data copy. The second copy operation is performed to copy the requested first data copy form the second storage to a second data copy in response to determining that the requested first data copy is not in the state that does not permit the copying. The request is denied in response to determining that the requested first data copy is in the state that does not permit copying.
US09304869B1 Method and computer readable medium for providing checkpointing to windows application groups
A computer readable medium and method providing checkpointing to Windows application groups, the computer readable medium having computer-executable instructions for execution by a processing system. The computer-executable instructions may be for launching an application and creating one or more application threads, receiving a checkpoint signal by an application thread, and entering a checkpoint Asynchronous Procedure Call (APC) handler at IRQL APC_LEVEL, the APC handler disposed in a kernel module, acquiring an ETHREAD block and user-mode context for the application thread, and examining an execution state of the one or more application threads at a time of the checkpoint signal.
US09304867B2 System and method for providing flexible storage and retrieval of snapshot archives
A group of computers is configured to implement a block storage service. The block storage service includes a block-level storage for storing data from a set of distinct computing instances for a set of distinct users. An interface is configured to allow the set of distinct users to specify respective destinations for storing backup copies of respective data stored in the block-level storage for the distinct users. At least some of the respective destinations are for different storage systems remote from one another. A backup copy function is provided for creating backup copies of data stored in the block-level storage by the set of distinct computing instances for the set of distinct users. The backup copies are stored in different destination locations specified by respective ones of the plurality of distinct users via the interface.
US09304865B2 Efficient handing of semi-asynchronous raid write failures
For efficient handing of semi-asynchronous RAID write failures using a processor device in a computing environment, a write operation is committed on a primary copy of data on a primary entity while sending the data to a secondary entity while awaiting an acknowledgment by the secondary entity. The acknowledgment indicates to the primary entity that metadata for the write operation has arrived at the secondary entity without necessarily indicating the data has arrived at the secondary entity. The acknowledgment is sent from the secondary entity regardless of a write failure and allowing the secondary entity to perform a recovery operation if a write failure occurs.
US09304864B1 Capturing post-snapshot quiescence writes in an image backup
Capturing post-snapshot quiescence writes in an image backup. In one example embodiment, a method for capturing post-snapshot quiescence writes in an image backup may include taking a first snapshot of a source storage at a first point in time, identifying a first set of block positions of blocks that are allocated in the source storage at the first point in time, identifying a second set of block positions of blocks that are written to the first snapshot during post-snapshot quiescence of the first snapshot, resulting in a first quiesced snapshot, calculating a third set of block positions by performing a Boolean OR operation on the first set of block positions and the second set of block positions, and copying blocks in the third set of block positions from the first snapshot to a full image backup.
US09304860B2 Arranging data handling in a computer-implemented system in accordance with reliability ratings based on reverse predictive failure analysis in response to changes
Various embodiments for arranging data handling in a computer-implemented system comprising a plurality of existing physical entities include assigning at least one reliability rating to various said existing physical entities of the computer-implemented system; and using the assigned reliability ratings in accordance with reverse predictive failure analysis, to provide a designated cumulative reliability rating, the designated cumulative reliability rating being determined in accordance with the following equation: 1−[PAF(f+Δf, n+Δn)]=1−[PAF(f, n)+(∂PAF/∂f)*Δf+(∂PAF/∂n)*Δn], where PAF is a probability of failure of the computer-implemented system, f is a probability of failure of a physical entity, and n is a number of drives in the computer-implemented system.
US09304859B2 Polar codes for efficient encoding and decoding in redundant disk arrays
An improved technique applies polar codes to storage data to improve the reliability of a storage system that uses high-performance, solid-state disks as part of a RAID group for storing frequently-accessed data. Along these lines, a high-performance storage system having n solid-state disks assigns k of those disks as payload disks. The storage system partitions the payload data into a data vector that has k data symbols. The storage system then applies, to the k payload symbols, a (n, k) polar code generator matrix derived from k rows of the ┌ log2 n┐-times Kronecker product of the matrix   ( 1 0 1 1 ) to produce n encoded symbols and stores each of the encoded payload symbols in a solid-state disk of the RAID group.
US09304856B2 Implementing ECC control for enhanced endurance and data retention of flash memories
A method, system and memory controller are provided for implementing ECC (Error Correction Codes) control to provide enhanced endurance and data retention of flash memories. The memory controller includes a VT (threshold voltage) monitor to determine VT degradation of cells and blocks; the VT monitor configured to store information about the determined VT degradation; a first ECC engine having a first level of ECC capability; a second ECC engine having a second level of ECC capability, the second level higher than the first level, the second ECC engine having a longer latency than the first ECC engine; a logic to issue a read request to a particular cell/block, and, using the determined VT degradation, use the first ECC engine if the determined VT degradation is less than a threshold and to use the second ECC engine if the determined VT degradation is above the threshold.
US09304855B2 Data storage device
A data storage device includes a nonvolatile memory device, an error correction code unit suitable for detecting and correcting a data error read from the nonvolatile memory device in response to an operation clock, and a clock unit suitable for selectively providing the operation clock to the error correction code unit depending on whether the data is read from the nonvolatile memory device or not.
US09304851B2 Decoding with log likelihood ratios stored in a controller
An apparatus having one or more lookup tables and a decoder is disclosed. The lookup tables are configured to store a plurality of sets of values of log likelihood ratios. The decoder is configured to (i) receive a codeword read from a memory, (ii) receive an initial one of the sets from the lookup tables and (iii) generate read data by decoding the codeword based on the values.
US09304848B2 Dynamic accessing of execution elements through modification of issue rules
Embodiments of the invention relate to dynamically routing instructions to execution units based on detected errors in the execution units. An aspect of the invention includes a computer system including a processor having an instruction issue unit and a plurality of execution units. The processor is configured to detect an error in a first execution unit among the plurality of execution units and adjust instruction dispatch rules of the instruction issue unit based on detecting the error in the first execution unit to restrict access to the first execution unit while leaving un-restricted access to the remaining execution units of the plurality of execution units.
US09304847B2 Automatic prompt detection for universal device support
Embodiments provide systems, methods, and computer program products for network management application to automatically determine a session prompt for a network device and perform error handling. After logging in to a network device, the network management application records the first session prompt response. The network management application sends a series of empty carriage returns and random characters and records the session prompt responses. The network management application compares the responses and determines whether the prompt is a static or a dynamic prompt based on the results. The network management application elicits error responses from the network device by sending additional random characters and records the results in an error handling dictionary. The error handling dictionary is used later when running user-provided commands, enabling a determination of whether a command executed successfully.
US09304843B2 Highly secure method for accessing a dispersed storage network
A method begins by a requesting entity sending a distributed storage network (DSN) access request to a request verification entity, wherein the DSN access request includes a signed certificate and DSN accessing information. The method continues by a request verification entity sending a signed DSN access request to the requesting entity when the request verification entity signs the DSN access request after verifying the signed certificate and the DSN accessing information. The method continues by the requesting entity sending the signed DSN access request to a DSN accessing entity. The method continues by the DSN accessing entity sending an authorized DSN access request to the DSN via a network connection when the DSN accessing entity verifies a signature of the request verification entity, wherein the authorized DSN access request includes, at a minimum, the DSN accessing information.
US09304838B1 Scheduling and executing model components in response to un-modeled events detected during an execution of the model
A device may receive a model including a group of blocks, and may receive a command to execute the model. The device may assign a parameter sample time to a subset of blocks of the group of blocks. The parameter sample time may permit a block, of the subset of blocks, to be executed based on a parameter change event detected during the execution of the model. The device may cause the model to be executed after assigning the parameter sample time to the subset of blocks. The device may detect a parameter change event, associated with the model, prior to the execution of the model being completed. The parameter change event may include an event that is external to the execution of the model. The device may cause at least one block, of the subset of blocks, to be executed based on the detecting the parameter change event.
US09304837B2 Cellular user interface
Configurations for a cellular user interface are provided. In one embodiment, a client configuration includes a viewer and a content development kit. A content server distributes cellularized content among several client viewers. Connectors in a scheduled configuration regularly acquire updated content from data sources. An integration server interfaces between the connectors and the content server for distributing content. A monitoring agent assists with content updating upon detecting source changes. A registration server enables cell content update in client viewers through the content server. Cells in the cellularized environment include a visual proxy component and a metadata component. The visual proxy component can be configured for displaying different content at various levels of detail. The metadata component enables intelligent organization and display of content through queries, channels, and data updates. In addition, procedural geometry in the cellularized environment automates the content presentation and provides a flexible arrangement of the cells.
US09304836B2 Bridging data distribution services domains based on discovery data
Bridging data distributed service (DDS) domains in a networked system based on discovery data is provided. Each DDS domain includes DDS software applications capable of publishing data and subscribing to data. A DDS domain bridge is communicatively coupled with the DDS software applications of both DDS domains. The DDS domain bridge monitors discovery data provided by the DDS software applications for a topic name, a topic type, and/or QoS properties. The DDS domain bridge includes creation rules and enabling rules controlling input/output DDS dataflow objects. Based on the state of the DDS dataflow objects set by the rules, uni- or bi-directional DDS dataflow is established between the input and output DDS dataflow objects enabling data propagation between DDS software applications of DDS domains.
US09304835B1 Optimized system for analytics (graphs and sparse matrices) operations
A graph processing system includes a graph API (Application Program Interface), as executed on a processor of a computer and as capable of implementing any of a plurality of graph operators to express computations of input graph analytics applications. A run-time system, executed by the processor, implements graph operators specified by each graph API function and deploys the implemented graph operators to a selected computing system. A library contains multiple implementations for each graph API function, each implementation predetermined as being optimal for a specific set of conditions met by a graph being processed, for functional capabilities of a specific computing system on which the graph is being processed, and for resources available on that specific computing system.
US09304830B1 Fragment-based multi-threaded data processing
Techniques and solutions are described for multi-threaded processing of data, which may include dividing incoming data content stream into a plurality of fragments, for processing by a corresponding plurality of parallel parser threads running within one or more computing devices. A fragment order is assigned to the plurality of fragments. During a first processing phase of the parser threads, for each of one or more selected fragments of the plurality of fragments, a first available delimiter is determined within data content of the selected fragment. The data content within the selected fragment is parsed, starting from the first available delimiter to a last available delimiter within the fragment. During a second processing phase, for each of the one or more selected fragments, data content in a fragment suffix for the selected fragment is parsed with data content from a fragment prefix from a subsequent fragment.
US09304825B2 Processing, on multiple processors, data flows received through a single socket
A data processing system supporting a network interface device and comprising: a plurality of sets of one or more data processing cores; and an operating system arranged to support at least one socket operable to accept data received from the network, the data belonging to one of a plurality of data flows; wherein the socket is configured to provide an instance of at least some of the state associated with the data flows per said set of data processing cores.
US09304821B2 Locating file data from a mapping file
In some examples, a distributed system may include a plurality of nodes with a file stored in a file system across the plurality of nodes. One of the nodes may receive a request for location data corresponding to a part of the file. For instance, the location data may be included in a mapping file, and the request may specify an offset of the mapping file. The mapping file may include locations of nodes storing parts of the file in the file system across the plurality of nodes, and the mapping file may have a plurality of parts corresponding to the parts of the file. In response to the request, the node may access the mapping file and send location data corresponding to the offset of the mapping file. The location data may indicate at least one of the nodes storing the part of the file.
US09304819B2 Virtual deployment
An embodiment relates generally to a method of providing computer services. The method includes receiving at least one user-specified requirements for a computer system instantiation and developing a configuration file base on the at least one user-specified requirements. The method also includes instantiating a virtual machine based on the configuration file and providing the virtual machine as the instantiation of the computer system for remote access.
US09304818B2 Control apparatus, control method, computer program product, and semiconductor device
According to an embodiment, a control apparatus for controlling a target device includes an estimation unit and an issuing unit. The estimation unit is configured to estimate a second amount of energy required for the entire system including the target device and the control apparatus until the target device completes an execution of its function that is requested in accordance with an execution request for the target device. The issuing unit is configured to issue a control command for causing the target device to execute its function in accordance with the execution request, when the first amount of energy at a time point of receiving the execution request is greater than the second amount of energy.
US09304814B2 Determine variable wait time in an asynchronous call-back system based on calculated average sub-queue wait time
A method includes a workload management (WLM) server that receives a first CHECK WORKLOAD command for a workload in a queue of the WLM server. It may be determined whether the workload is ready to run on a WLM client. If the workload is not ready to run, a wait time for the workload with the WLM server is dynamically estimated. The wait time is sent to the WLM client. If the workload is ready to run, then a response is sent to the WLM client that workload is ready to run.
US09304807B2 Fault tolerant batch processing
Among other aspects disclosed are a method and system for processing a batch of input data in a fault tolerant manner. The method includes reading a batch of input data including a plurality of records from one or more data sources and passing the batch through a dataflow graph. The dataflow graph includes two or more nodes representing components connected by links representing flows of data between the components. At least one but fewer than all of the components includes a checkpoint process for an action performed for each of multiple units of work associated with one or more of the records. The checkpoint process includes opening a checkpoint buffer stored in non-volatile memory at the start of processing for the batch.
US09304803B2 Cooperative application workload scheduling for a consolidated virtual environment
Application resource scheduler module is provided to achieve cooperative application workload scheduling for a consolidated virtual environment. The application resource scheduler aids an application workload scheduler that is part of a distributed computing application, such as Hadoop, to achieve a specified relative priority of the application workload virtual machines to other virtual machines in the virtual environment. The application resource scheduler assists in achieving cooperative workload scheduling by revising the amount of resources that the application workload scheduler sees as available and by setting resource controls for the virtual machines of the distributed computing application to influence the resources the virtual machines receive from the underlying consolidated virtual environment.
US09304788B2 Electronic device, configurable component and configuration information storage method thereof
Provided are an electronic device, a configurable component and a configuration information storage method thereof, which are employed for meeting the storage requirements of the configuration information for the configurable component of the electronic device. The method comprises that: obtaining the initial configuration information for the component of the electronic device (S110); employing the initial configuration information as the default configuration information for the component and compiling it into the Basis Input Output System (BIOS) of the electronic device (S120); when the device is powered on, the BIOS stores the default configuration information into the storage medium of the mainboard of the electronic device (S130). Compared with the prior art, the storing and loading of configuration parameters are controlled and implemented by the BIOS without special EEPROM or E-fuse memory, so there is no need to add other hardware additionally and the cost is reduced.
US09304781B2 System and method for running applications from computer devices
A system and method is described to allow web applications to be run from Wi-Fi capable computer devices independent of the operating system of the computer devices. The web applications are stored in a web server which also acts as a wireless access point. Peripherals, which are locally accessible by users and are associated with certain functions of the web applications, are operatively connected to the web server. The web pages of the web application are sent via the Wi-Fi network to the computer devices allowing the user of the computer devices to use the web application as well as their associated peripherals.
US09304780B2 User initiated data rollback using operating system partitions
Methods for returning a computing system to a previous state are provided. In one aspect, a method includes loading a second system state of a second operating system partition, and receiving a request to return to a first system state of a first operating system partition while operating in a second system state of the second operating system partition. The method also includes loading the first system state of the first operating system partition. Systems and machine-readable media are also provided.
US09304778B2 Handling exceptions in a data parallel system
A method of handling exceptions in a data parallel system includes forwarding exceptions thrown by concurrent worker tasks to a coordination task. The thrown exceptions are aggregated into an aggregation exception structure. It is determined whether the aggregation exception structure will be handled by an exception handler. The concurrent worker tasks are unwound when it is determined that the aggregation exception structure will be handled.
US09304775B1 Dispatching of instructions for execution by heterogeneous processing engines
An embodiment of a computing system is configured to process data using a multithreaded SIMD architecture that includes heterogeneous processing engines to execute a program. The program is constructed of various program instructions. A first type of the program instructions can only be executed by a first type of processing engine and a second type of program instructions can only be executed by a second type of processing engine. A third type of program instructions can be executed by the first and the second type of processing engines. An instruction dispatcher is configured to identify and remove program instruction execution conflicts for the heterogeneous processing engines to improve instruction execution throughput.
US09304772B2 Ordering thread wavefronts instruction operations based on wavefront priority, operation counter, and ordering scheme
A system and method is provided for improving efficiency, power, and bandwidth consumption in parallel processing. Rather than requiring memory polling to ensure ordered execution of processes or threads in wavefronts, the techniques disclosed herein provide a system and method to allow any process or thread in a wavefront to run out of order as long as needed, but ensure ordered execution of multiple ordered instructions when needed. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.
US09304771B2 Indirect instruction predication
A method, circuit arrangement, and program product for selectively predicating instructions in an instruction stream by determining a first register address from an instruction, determining a second register address based on a value stored at the first register address, and determining whether to predicate the instruction based at least in part on a value stored at the second register address. Predication logic may analyze the instruction to determine the first register address, analyze a register corresponding to the first register address to determine the second register address, and communicate a predication signal to an execution unit based at least in part on the value stored at the second register address.
US09304769B2 Handling precompiled binaries in a hardware accelerated software transactional memory system
A method and apparatus for enabling a Software Transactional Memory (STM) with precompiled binaries is herein described. Upon encountering an access operation in a transaction, an annotation field associated with a memory location referenced by the access is checked. In response to the memory location representing a previous similar access within the transaction, the access is performed without access barriers. However, if the annotation field is in a default state representing no previous access during a pendancy of the transaction, then a mode of the processor is determined. If the processor mode is in implicit mode, an access handler/barrier is asynchronously executed. Conversely, in an explicit mode, a flag is set instead of asynchronously executing the handler. In addition, during compilation convert explicit and convert implicit instructions are inserted to intelligently convert modes for precompiled and newly compiled binaries. Furthermore, new versions of newly compiled functions may be inserted to provide strong atomicity between previously and newly compiled functions.