最新美国发明专利第2016-03-01期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09276519B2	Securing structure for solar cell module A securing structure for a solar cell module installed on a roof of a building, having an external thread portion extending upward from a placement member, at least one flat plate-like shim member having a slit through which the external thread portion passes and a through-hole and stacked on the placement member, a flat plate-like connecting member placed on the shim member having an insertion hole through which the external thread portion passes, a droop portion drooping in the groove of the placement member through the through-hole, and a plurality of upward projecting portions projecting upward and sticking in the solar cell module and being made of an electrically conductive material, and a first securing member and a second securing member pressing downward on the solar cell module and the solar cell module placed on the connecting member with the external thread portion screwed into an internal thread portion.
US09276518B2	Panel support structure A plurality of support structures that may be secured to a surface and may support panels, such as solar modules. The support structures may include a first side that forms a channel and a second side that forms a support flange. A first edge of a panel may be placed within the channel and a second opposing edge of the panel may be secured to the support flange.
US09276517B2	Control device of AC motor A control device of a three phase AC motor includes: an inverter for driving the motor; a current sensor for sensing current in a sensor phase of the motor; and a controller for switching multiple switching elements in the inverter to control the current of the motor. The controller includes: a revolution number calculation device for calculating the revolution number of the motor; a three-phase voltage command operation device for operating three phase voltage commands to be applied to the motor based on a current command and an electric angle; and a current concentration determination device for determining whether a current concentration is caused based on the three phase voltage commands when the revolution number is not more than a predetermined revolution number. In the current concentration, current not less than a predetermined threshold value flows continuously for a predetermined period in one or more phases of the inverter.
US09276513B2	Method of current reference generation for a motor A motor control system for determining a reference d-axis current is provided, and includes a motor, a DC power source and DC input lines, and a current command controller. The DC power source generates a bridge voltage across the DC input lines. The current command controller is in communication with the motor and the DC input lines. The current command controller is configured to monitor the bridge voltage and a torque reference command. The current command controller is configured to determine a peak current based on the torque reference command. The current command controller is configured to determine a current angle based on the peak current. The current command controller is configured to determine the reference d-axis current based on the current angle.
US09276508B2	Inverter device for driving electric motor An object of the present invention is to provide an inverter device for driving an electric motor, which allows control stability and efficiency to be ensured over a wide region of the speed of the electric motor. The inverter device includes a rotational-speed detection section which detects a rotational speed of the electric motor, a carrier-frequency calculation section which calculates a carrier frequency on the basis of the detected rotational speed, and a carrier-frequency switching section which switches, on the basis of the calculated carrier frequency, the carrier frequency used for performing PWM control on the electric motor. The carrier-frequency calculation section calculates, as the carrier frequency, a frequency increased with an increase in the electric-motor rotational speed detected by the rotational-speed detection section.
US09276504B2	Carrier device and ceramic member A ceramic member, in a carrier device, includes: a plurality of ceramic layers that have insulating properties and are integrally sintered; a clamping electrode formed on a first ceramic layer among the plurality of ceramic layers and inside of the plurality of ceramic layers, and configured to attract a dielectric material by electrostatic force; a power feed port configured to receive a supply of electric power to the clamping electrode from outside of the ceramic member; a land formed on a second ceramic layer, which is different from the first ceramic layer among the plurality of ceramic layers, and configured to receive electric power through the power feed port; and a via arranged to pass through at least one of the plurality of ceramic layers and provided as a conductive material to electrically connect the clamping electrode with the land.
US09276503B2	Energy harvesting device An energy harvester including first and second sheets; and a plurality of walls, each wall being sandwiched between the first and second sheets and surrounding a cavity, wherein each cavity houses at least one curved plate adapted to change from a first shape to a second shape when its temperature reaches a first threshold and to return to the first shape when its temperature falls to a second threshold lower than said first threshold.
US09276493B2	Multilevel converter with cells being selected based on phase arm current A method and computer program product are provided for selecting switching cells for voltage contribution in a phase arm of a multilevel converter, a cell selecting control device for a multilevel converter and a multilevel converter. The cell selecting control device and multilevel converter includes a balancing control element that obtains a reference voltage for the phase arm, obtains a measurement of the current running through the phase arm and selects cells for contributing to an AC voltage output from the multilevel converter based on the reference voltage and the magnitude of the phase arm current.
US09276492B2	Circuit to keep electronic transformers working while under-loaded An LED light source includes a sub-circuit (24) that is connectable via terminals (12,13) to an electronic transformer and to a powered circuit including at least one LED (4). The sub-circuit (24) includes a sub-circuit rectifier (1a, 1b, 1c, 1d) that is connectable to the transformer (25), and a constant current regulator (7) and a sub-circuit capacitor (6) that are connected parallel to the sub-circuit rectifier (1a, 1b, 1c, 1d).
US09276490B2	Voltage setting of adapter Embodiments herein relate to setting a voltage of an adapter (100, 200). In an embodiment, the adapter is to measure a current output by the adapter, compare the measured current at the adapter to a first current and to output a DC voltage. The adapter is to set a level of the DC voltage output by the adapter based on the comparison.
US09276487B2	Power-level waveform generation method The present invention relates to a method of generating various alternating current waveforms, at power level. The AC mains power supply is rectified, processed by various circuits, controlled by a control unit and inverted as required at the output. This method may be employed with converter isolation from the mains. It is also possible to employ the system so that the input current is sinusoidal and the power factor of the converter is unity. The present invention produces preferably the sinusoidal output waveform with fundamental component at the desired frequency, where this waveform is produced employing a DC bus from which output voltage with the fundamental component at the desired shape and frequency is obtained using pulse width modulation techniques. The output stage is simply an inverter which inverts this waveform at zero-crossings of the rectified waveform to obtain an AC output.
US09276484B2	Power conversion apparatus that adjusts the power transmitted between a primary side circuit and a secondary side circuit and method of the same A power conversion apparatus includes a primary side circuit, a secondary side circuit that is connected to the primary side circuit through a reactor and magnetically coupled thereto through a transformer, and a control unit that adjusts power transmitted between the primary side circuit and the secondary side circuit by changing a phase difference between switching of the primary side circuit and switching of the secondary side circuit. The control unit adjusts the frequency of switching of the primary side circuit and the secondary side circuit according to the value of an equivalent inductance of the reactor and the transformer.
US09276482B2	Forward type DC-DC converter With the use of a voltage across a secondary winding of a transformer, a DC output voltage and a conduction time width of a current in the DC reactor on the secondary side circuit in an immediately preceding period, the turning-on time width and the turning-off time width of a synchronous rectification MOSFET in the secondary side circuit of the transformer are obtained by calculations, without receiving any signals from a primary side circuit, to thereby carry out control of a synchronous rectification circuit in a forward DC-DC converter with the time in which a current flows in a diode reduced to the minimum.
US09276480B2	Optimal trajectory control for LLC resonant converter for LED PWM dimming Pulse width modulation is provided for controlling a resonant power converter, particularly for dimming of light emitting diode arrays without loss of efficiency. Dynamic oscillation due to the beginning of a pulse width modulated pulse burst is limited by shortening of the first and/or last pulse of a pulse bust such that the first pulse of a subsequent pulse burst close to or to connect with a full load steady-state voltage/current trajectory of the power converter. Pulse shortening made be made substantially exact to virtually eliminate dynamic oscillation but substantial reduction in dynamic oscillation is provided if inexact or even performed randomly.
US09276478B2	Active forward mode rectifier A power converter includes a transformer having a primary winding and a secondary winding, a primary side circuit coupled to the primary winding, and a secondary side circuit coupled to the secondary winding and configured to output a substantially direct current (DC) output. The primary side circuit is configured to receive an input voltage and to switch the input voltage across the primary winding of the transformer. The secondary side circuit includes an active forward mode rectifier.
US09276477B2	DC-DC converter with enhanced automatic switching between CCM and DCM operating modes A DC-DC converter transitions between continuous conduction mode (CCM) and discontinuous conduction mode (DCM) without causing any overshoot or undershoot deviation output voltage. The DC-DC converter operates in a PWM mode in CCM. During DCM, it skips PWM pulses when a sustained negative current is detected in an output inductor. The current sensing is achieved by sampling and integrating a voltage, the sign of which is inverse to current direction. The sample and hold and integrator circuits are small, simple, and scale to high frequencies. The pulse skipping circuit automatically adjusts the duty cycle of power pulses to force a zero inductor current at the end of each pulse.
US09276471B1	DC-to-DC converter controllers including clamping or boosting subsystems, and associated methods A DC-to-DC converter includes one or more switching circuits, a respective energy storage inductor electrically coupled to each of the one or more switching circuits, and a controller. The controller includes a current deficit signal generator, an integration subsystem, one or more modulators, and a clamping subsystem. The current deficit signal generator is adapted to generate a current deficit signal. The integration subsystem is adapted to integrate the current deficit signal to generate a modulator control voltage. The one or more modulators are adapted to control the one or more switching circuits to transfer power from an input power source to a load, based at least in part on the modulator control voltage. The clamping subsystem is adapted to shunt a portion of the current deficit signal away from the integration subsystem, to prevent the modulator control voltage from falling below a predetermined minimum permissible value.
US09276469B2	DC-DC converter for the control of a battery charge current in portable electronic devices A DC-DC converter controls a supply current (IIN) provided to a rechargeable battery. The converter comprises an electrical input terminal that receives supply current (IIN). An electrical output terminal is connected to the battery through a coil with a resistor in series therebetween. A controllable selector connects the input terminal to the output terminal during a first time interval in order to supply the battery and to connect the input terminal to a ground potential during a successive second time interval. Also, a feedback module generates a control signal for the selector from a resistor feedback signal, indicative of a variation of a battery charge current (IOUT). The feedback module has an electronic block that receives the feedback signal. The electronic block processes the feedback signal to measure a variation of the supply current (IIN) and provide the control signal to adjust the duration of the first time interval.
US09276467B2	Control circuit for DC-DC converter, DC-DC converter, and control method of DC-DC converter A control circuit for a DC-DC converter includes: an output control circuit configured to control an output voltage of a DC-DC converter according to a reference voltage; a reference control circuit configured to control the reference voltage according to an open-circuit voltage of an external power supply coupled to the DC-DC converter; a limiting circuit configured to limit a current flowing from DC-DC converter to an external load; and a stopping control circuit configured to stop operation of the limiting circuit until the reference voltage reaches a given value.
US09276466B2	Switching power supply circuit and control method therefor A switching power supply circuit includes a PWM drive circuit (12) that performs the PWM driving of a switching element (Q1) at a duty ratio (D) commensurate with an input target voltage (VS), and generates from an input voltage (VB) an output voltage (VTL) whose target value is the target voltage (VS), by the PWM drive circuit (12) driving the switching element (Q1). The switching power supply circuit further includes a control circuit (13) and a target voltage limiting circuit (14) that together fix the duty ratio (D) regardless of the target voltage (VS), when a difference between the input voltage (VB) and the target voltage (VS) is less than or equal to a predetermined constant value (α).
US09276465B2	Switching regulator detecting abnormality in power supply voltage A switching regulator includes: a switching element that controlling supply of power supply voltage according to a control signal; a smoothing circuit smoothing the power supply voltage supplied via the switching element and supplying the smoothed power supply voltage as an output voltage to an output terminal; an error amplifier outputting an error signal according to a difference between the output voltage supplied to the output terminal and a reference voltage; a delta sigma modulation circuit generating a delta sigma modulation signal according to the error signal; and a power supply abnormality detection circuit outputting the delta sigma modulation signal as the control signal and detecting an abnormality in the power supply voltage based on the delta sigma modulation signal.
US09276463B2	Low power conversion and management of energy harvesting applications A method and apparatus for low voltage conversion and energy storage uses a charge pump array including a first set of capacitors in parallel with a second set of capacitors and switches for selectively coupling the first and second set of capacitors to a variable input DC voltage. A data processor programmably controls one or more of the switches to couple the first and second set of capacitors to the variable input DC voltage for a variable first time period during which the input DC voltage charges the first and second set of capacitors to a DC voltage level. An energy storage device is switchably coupled to an output of the charge pump array. The data processor programmably controls one or more of the switches to couple the charge pump array output to the energy storage device for a variable second time period during which a voltage stored across each of the capacitors during the first time period is combined to produce a higher voltage significantly higher than the input DC voltage, the higher voltage being provided to the energy storage device.
US09276461B2	Electric power steering driving apparatus In an electric power steering driving unit provided with an electric motor that outputs auxiliary torque to a handwheel of a vehicle, a control apparatus having semiconductor switching devices that each control a current to the electric motor, and a noise filter that prevents noise, produced when the semiconductor switching devices each control a current to the electric motor, from being emitted, the noise filter is configured with a plurality of coils, capacitors that make pairs with the respective corresponding coils, and a bus bar that performs connections among the coils and the capacitors, and part of or all of the noise filter is configured as a structural member that is different from the control apparatus.
US09276456B2	Generating high-frequency power for a load A power-supply system has a power converter configured to generate a high-frequency power signal and supply the high-frequency power signal to a load such as a plasma or gas laser process. The power converter includes a digital-to-analog converter (DAC) configured to generate an analog signal from a digital signal, an amplifier path in which the generated analog signal is amplified, and a logic-circuit unit coupled upstream of the DAC and configured to generate the digital signal and supply the generated digital signal to the DAC. The logic-circuit unit includes a signal-data buffer storing a signal-data value for generating a shape of the analog signal, an amplitude-data buffer storing an amplitude-data value for influencing an amplitude of the analog signal, and a multiplier configured to multiply the signal-data value by the amplitude-data value.
US09276448B2	Condition monitoring system for a motor In order to enable simple, low-cost monitoring of a motor, a switch box cover for the motor, a condition monitoring system has a sensor unit for detecting a measured variable of the motor, a communication device, which is designed to provide a characteristic value that characterizes the measured variable to a reading device, and a supply unit for supplying the sensor unit with energy.
US09276447B2	Electrical machines An electrical machine (10) has three phase windings (12). Each phase winding (12) is connected to a respective current source (18). Each current source 18 provides alternating current to the corresponding winding (12). The current source 18 is connected independently to the respective winding (12). The electrical angles of the phase windings (12) are so arranged that none of the phase windings (12) has a zero torque angle which coincides with a zero torque angle of another phase winding (12).
US09276442B2	Stator element with cooling element arranged on the backside of the yoke A stator element is disclosed. The stator element includes a yoke including laminated metal plates and radially protruding teeth from one side of the yoke. A cooling cavity is arranged on a back side of the yoke. The cooling cavity provides a path for a flow of a cooling medium. A plated metal layer of the cooling cavity is disposed on the yoke only in a region where the cooling cavity contacts the back side of the yoke. The cavity is disposed in direct contact to the back side of the yoke.
US09276438B2	Universal power tool battery pack coupled to a portable internal combustion engine A portable internal combustion engine and a charging device that generates AC power are supported on a manually movable frame. A coupling mechanism which can include a starter circuit and starting device, or a charging circuit and charging device, or both device couples a battery receptacle terminal block to the internal combustion engine. The battery receptacle can include various features to permit and retain electrical coupling between a battery pack for a cordless power tool. For example, key protrusions and corresponding recesses can be associating with latching projections. Additionally or alternatively, cooperating rails and recesses may be associated with the battery pack and receptacle, respectively. Spring loaded movable clips or resilient flexing clips can be included to act on the battery pack. An electrical cord may also be used to couple receptacle terminals to the coupling mechanism.
US09276436B2	Wireless charger for mobile devices with flexible platform and method A wireless charger and a method allow the wireless charger to have enhanced portability and a smaller footprint when not performing the charging function. The wireless charger includes a charging circuit providing power on one or more power lines, a housing for the wireless charger, and a flexible platform that includes a charging surface with two or more contact electrodes. The flexible platform may be unfolded or unrolled for charging a mobile device, and folded up or rolled up to achieve a smaller footprint, when not performing a charging operation. The wireless charger may further includes a data communication circuit for data communication between a power-line network and the mobile device.
US09276435B2	Method and apparatus for wirelessly receiving power Method and apparatus for a receiving device to wirelessly receive electric power from a transmitting device. A power capacity is configured at the receiving device, based on a default power capacity known by both the receiving device and the transmitting device. A first value of a dependent parameter is read. The dependent parameter is associated with the electric power and varies in accordance with an independent parameter adjustable by the transmitting device. A second value of the dependent parameter is then read. A maximum power capacity of the transmitting device is identified based on at least the first and second values and a predetermined threshold. The electric power is then received from the transmitting device.
US09276433B2	Robot cleaning system and control method having a wireless electric power charge function Provided is a wirelessly charged robot cleaning system and a method for wirelessly charging a robot cleaner. The wirelessly charged robot may include a target resonator to receive a resonance power through energy-coupling with a source resonator of a wireless power transmitter, a wireless power receiving unit to convert the received resonance power into a rated voltage, and a battery controller to check the remaining capacity of the battery based and to charge the battery.
US09276432B2	Method and apparatus for charge control of a portable terminal having a solar battery Provided is an apparatus for controlling charging of a portable terminal equipped with a solar battery that converts solar energy into an electrical energy, the apparatus including a thermistor in which a resistance value changes according to a temperature change; a comparator which outputs a first signal when a temperature surrounding the thermistor is less than a preset reference temperature as determined by the resistance value change of the thermistor according to the temperature change and outputs a second signal when the temperature is at least the preset reference temperature or more; and a charging unit which is activated and receives the electrical energy from the solar battery to charge a battery when the first signal is inputted from the comparator, and is deactivated and blocks the charge of battery in case the second signal is inputted.
US09276431B2	Power management for electric vehicles An apparatus for managing power in an electric vehicle includes a control circuit and a first switch. The control circuit is configured to generate a first control signal based on a current of a battery operable for powering the electric vehicle, and to generate a second control signal based on a voltage of the battery. The first switch is configured to control connection of the battery to a power source and a load in the electric vehicle according to the first control signal. The first control signal controls a voltage at a terminal of the first switch to maintain the current of the battery to be substantially equal to a current setting, and the second control signal controls the battery to switch between a first state and a second state.
US09276430B2	Master-slave multi-phase charging A multi-phase charging circuit comprises a device that can be configured for master mode operation or slave mode operation. In master mode operation, the device generates a control signal and a clock signal to control operation of a switching circuit for generating charging current. In slave mode operation, the device receives externally generated control and clock signals to control operation of its switching circuit.
US09276426B2	Apparatus and method for charging battery of electric device having motor An apparatus for charging a battery of an electric device that has a motor by not charging the battery before the electric device is used and a method of charging a battery of an electric device that has a motor by using the apparatus. The apparatus includes a load, a motor for driving the load, a battery that provides a power supply to the motor, a generator that converts a kinetic energy that is generated by the motor to an electric energy, and a control unit that senses an amount of the load of the load and, if the amount of the load is less than a reference value, charges the battery by a first charging mode by using the electric energy output from the generator.
US09276425B2	Power management systems with dynamic target state of charge A power management system includes an energy storage device and a control system coupled to the energy storage device. The control system is configured to execute a control routine to determine whether to charge or discharge the energy storage device using a target state of charge and a current state of charge of the energy storage device. The control system is configured to determine that an output signal, received from a power generator, is outside of a specified range. The control system is configured to modify the target state of charge of the energy storage device in response to determining that the output signal is outside of the specified range.
US09276423B2	Charging base for multiple different sized components positioned using rotating elements An electronic assembly includes an electronic component and a base. The electronic component and another electronic component have first and second thicknesses respectively. The first thickness is greater than the second thickness. The base includes a main body having a slot, a supporting element movably disposed at the main body, and a first elastic element connected between the main body and the supporting element. When the supporting element is at a first position, the supporting element is hidden in the main body, and the electronic component having the first thickness is adapted to be inserted into the slot. When the supporting element is moved to a second position by an elastic force of the first elastic element, at least part of the supporting element is in the slot, and the electronic component having the second thickness is adapted to be inserted into the slot and supported by the supporting element.
US09276422B2	Battery pack and electric power consuming apparatus A battery pack that has a configuration in which a plurality of secondary battery cells are connected in series at time of discharge and are connected in parallel at time of charge, and that has a configuration and a structure with which the charge and the discharge are allowed to be performed without any trouble even if an abnormal-state secondary battery cell exists is provided. A battery pack 10 includes a plurality of secondary battery cells 21 and a control circuit 11. Under control of the control circuit 11, the plurality of secondary battery cells 21 are connected in series at time of discharge, and are connected in parallel at time of charge. The control circuit 11 measures voltages of the respective secondary battery cells 21 before the charge, and in a state that a secondary battery cell 21 having a value of measured voltage equal to or less than a predetermined value as an abnormal-state secondary battery cell is electrically disconnected from other secondary battery cells 21 in the plurality of secondary battery cells 21, the control circuit 11 connects the other secondary battery cells 21 in parallel and charges the other secondary battery cells 21.
US09276415B2	Charging station having battery cell balancing system A charging station which has a battery cell balancing system is disclosed. The charging station includes: a number of balancing charging units, each has: a detecting element for detecting a state of charge of a battery cell; and a charging element for processing charging to the battery cell; a power unit for providing electric power; and a charging control unit, linked to the balancing charging units, and the power unit, for controlling the electric power from the power unit to the charging element to charge the battery cell. The battery cell is linked in serial or parallel with other battery cells in a battery pack. The charging control unit stops the power unit to charge the battery cell when the state of charge of the battery cell detected by the detecting element is full or exceeds a predetermined value.
US09276413B1	Soft switched single stage wireless power transfer A control scheme and architecture for a wireless electrical energy transmission circuit employs two solid-state switches and a zero voltage switching (ZVS) topology to power an antenna network. The switches drive the antenna network at its resonant frequency and simultaneously energize a separate resonant circuit that has a resonant frequency lower than the antenna circuit. The resonant circuit creates out of phase voltage and current waveforms that enable the switches to operate with (ZVS).
US09276411B2	Electricity supply system [Problem] To provide an electricity supply system that efficiently utilizes electricity. [Solution] An electricity supply system includes: a power generation unit (10) for supplying electricity; a load unit (11) for consuming at least one of the electricity supplied from the power generation unit (10) and system electricity supplied from an electricity system; and a control unit (12) for controlling operations of the power generation unit (10) and the load unit (11). The power generation unit (10) supplies electricity to the electricity system, and the control unit (12) controls the power generation unit (10) and the load unit (11) on the basis of values of a plurality of types of electricity handled by the electricity supply system.
US09276404B2	Semiconductor integrated circuit and operating method thereof A semiconductor integrated circuit and its operating method are provided. The present circuit has first and second supply terminals capable of supplying first and second power supply voltages respectively, an input voltage selection circuit coupled to the first and second supply terminals, and first and second power supply switches. The input voltage selection circuit includes a power-on reset circuit, an input voltage detection circuit and a control circuit. When the supply of the first or second power supply voltage to one of both supply terminals is detected upon completion of a power on reset operation, one of both power supply switches and the other thereof are controlled to on and off respectively. When the supply of both power supply voltages to both supply terminals is detected, the one thereof and the other thereof are respectively controlled to on and off according to the preset order of precedence.
US09276401B2	Solid state circuit-breaker switch devices A solid state circuit-breaker switch has a first solid state switch coupled to a positive terminal of a high voltage source, a second solid state switch coupled to a return terminal of the high voltage source, and a diode connected between the switches. A load is coupled between the switches and in parallel with the diode such that voltage transients across the load are limited during turn of conditions. Related methods of operating the switch during turn-on and turn-off events within rated current operation are described, as are turn-on and turn-off events in overload conditions.
US09276398B2	Protective semiconductor device for secondary cell Provided is a protective semiconductor device detecting a disconnection reliably with secondary cells including for each cell: cell-connecting terminals; a first resistance detecting the voltage of each cell; a comparator detecting whether or not the voltage of each cell is in the reference voltage range; a series circuit composed of a second resistance and a first switch element, and including a control circuit controlling ON/OFF of the switch element, wherein the first switch element connects the second resistance to the connecting terminals by turning ON, while disconnecting it by turning OFF, the control circuit maintains a disconnection test signal ON, while turning ON the plurality of first switch elements sequentially and detecting the disconnection between the cells and the connecting terminals based on the output signal from the comparator corresponding to the first switch element turned ON.
US09276396B2	Power transmission fault analysis system and related method Systems configured to analyze and/or respond to faults detected during the operation of a power transmission system are disclosed. In one embodiment, a system includes at least one computing device adapted to monitor operation of a power transmission system by performing actions comprising processing operational data from a set of line phases in the power transmission system to detect a faulted line phase; opening a circuit breaker for the faulted line phase in response to detecting the fault; determining whether the fault is transient or permanent; and determining if an arc associated with the fault has been extinguished.
US09276395B2	Electric circuit for cutting off an electrical supply with relay and fuses The invention relates to an electrical circuit adapted for cutting off an electrical supply to an electrical equipment, said electrical circuit receiving as input at least two discrete electrical signals xi, i=1, N, the electrical circuit comprising: —a voltage source; —a number N>1 cutoff units Ui connected together, i=1, . . . , N in series between the voltage source and the electrical equipment, and a last cutoff unit UN being connected to the electrical equipment, each cutoff unit Ui exhibiting an open or closed state as a function of an electrical control signal; the cutoff units Uj, j=1, N−1 upstream of the last cutoff unit UN each being controlled by a distinct discrete electrical signal xj, j=1, . . . , N−1, the last cutoff unit being controlled as a function of the state of the cutoff units Uj, j=1, . . . , N−1 upstream and a discrete electrical signal xN different from that controlling the upstream cutoff units Uj, j=1, N−1.
US09276391B2	Fault-tolerant self-indicating surge protection system for aircraft A fault-tolerant self-indicating surge protector system and methods are presented. An unwanted surge of electrical energy induced by a lightning strike is directed away from a sensitive electrical or electronic component, and the unwanted surge of electrical energy is directed through series connected pairs of varistors. A voltage signal is extracted from a center tap point between the series connected pairs of the varistors, and the voltage signal is monitored for a health of the varistors. A high impedance in a varistor among the varistors is provided for a low voltage across the varistor, and a low impedance in the varistor is provided and the unwanted surge of electrical energy is diverted through the varistor in response to a high voltage across the varistor.
US09276385B2	Ion generator provided with ion generation units at respective air flow passages Two flow passages are provided for allowing the passage of air sent out from a blower in the same direction individually and discharging the air to outside. An ion generation unit for generating positive ions by only corona discharge is arranged at one flow passage, and an ion generation unit for generating electrostatic atomized water particles with negative polarity by electrostatic atomizing phenomenon is arranged at the other flow passage. A throttle is provided at the one flow passage for making the wind speed of air flowing through the one flow passage faster than the wind speed of air flowing through the other flow passage. Since positive ions having shorter lifetime are emitted more than electrostatic atomized water particles with negative polarity having longer lifetime, the balance between positive and negative polarities in the air can be sustained over a long period of time.
US09276384B2	Spark plug An ignition plug includes a tubular ceramic insulator and a metallic shell having a protrusion protruding radially inward. The ceramic insulator has an engagement portion which is engaged with a receiving surface of the protrusion and an intermediate trunk portion extending rearward from the rear end of the engagement portion. A≦1.70 and B ≧1.20 are satisfied, where A is the thickness (mm) of the metallic shell along a direction which passes through the center of the receiving surface and is orthogonal to the axial line on a cross section including the axial line, and B is the minimum thickness (mm) of the metallic shell 3 at the tube portion along the direction orthogonal to the axial line.
US09276383B2	Spark plug, and production method therefor A spark plug includes a ceramic insulator having an engagement portion, and a metallic shell provided around the ceramic insulator and having a protrusion. The protrusion has a diameter-decreasing portion, which seats on the engagement portion via an annular seat packing. On a cross section including an axial line, θs>θp is satisfied, where θp represents an acute angle (°) between a straight line orthogonal to the axial line and the contour of the engagement portion, and θs represents an acute angle (°) between a straight line orthogonal to the axial line and the contour of the diameter-decreasing portion. In the aforementioned cross section, Hvo>Hvi is satisfied, where Hvo represents the Vickers hardness (Hv) of the seat packing at the midpoint of a first line segment, and Hvi represents the Vickers hardness (Hv) of the seat packing at the midpoint of a second line segment.
US09276381B2	Quantum cascade laser A quantum cascade laser includes a semiconductor substrate, and an active layer being provided on the substrate, and having a cascade structure in which quantum well emission layers and injection layers are alternately laminated, and the laser has a base portion including the substrate, and a stripe-shaped ridge portion including the active layer. Further, a reflection control film is formed from a ridge end face over a base end face on an end face in a resonating direction of the laser, and, on the base end face, for a second side and a third side adjacent to a first side on the ridge portion side of the base end face, and a fourth side facing the first side, the reflection control film is formed on a region other than regions near those three sides with predetermined widths.
US09276379B2	Semiconductor light emitting device and method for manufacturing same A semiconductor light emitting device includes a first conductive clad layer that is group III-V semiconductor mixed crystal, an active layer, and a second conductive clad layer. The second conductive clad layer has a laminated structure of at least three layers including a first layer, a second layer, and a third layer disposed in this order closer to the active layer. The second layer and the third layer are included in a striped ridge, and the second layer is positioned at a skirt of the ridge. The surface of the first layer is a flat part at both sides of the ridge. When Al compositions of the first layer, second layer, and third layer are X1, X2, and X3, respectively, the relation X2>X1, X3 is satisfied. When film thicknesses of the first layer, second layer, and third layer are D1, D2, and D3, the relation D2
US09276378B2	Surface emitting laser element and atomic oscillator A surface emitting laser element includes a lower DBR formed on a substrate; an active layer formed above the lower DBR; an upper DBR formed on the active layer. The upper DBR includes a dielectric multilayer that is formed as a result of dielectrics having different refractive indexes being alternately laminated and formed, a light shielding part is formed above the upper DBR, and the light shielding part has an opening at a central area for emitting light.
US09276371B2	Supercontinuum source A supercontinuum optical pulse source provides a combined supercontinuum. The supercontinuum optical pulse source comprises one or more seed pulse sources, and first and second optical amplifiers arranged along first and second respective optical paths. The first and second optical amplifiers are configured to amplify one or more optical signals generated by said one or more seed pulse sources. The supercontinuum optical pulse source further comprises a first microstructured light-guiding member arranged along the first optical path and configured to generate supercontinuum light responsive to an optical signal propagating along said first optical path, and a second microstructured light-guiding member arranged along the second optical path and configured to generate supercontinuum light responsive to an optical signal propagating along said second optical path. The supercontinuum optical pulse source further comprises a supercontinuum-combining member to combine supercontinuum generated in at least the first and second microstructured light-guiding members to form a combined supercontinuum. The supercontinuum-combining member comprises an output fiber, wherein the output fiber comprises a multimode optical fiber supporting a plurality of spatial modes at one or more wavelengths of the combined supercontinuum.
US09276368B2	Tool for crimping a connector A tool for crimping a cable connector (6) comprises a first, U-shaped arm (3) which defines a seat in which the connector (6) may be accommodated in the working position; a second, compression arm (1) suitable for exerting a compression force on the connector (6), comprising a compression profile (5) at one end thereof, which, in turn, comprises a number of rotation pins which project laterally outwards from the compression profile (5) and are suitable for penetrating into corresponding holes in a branch of the first arm (3), to keep the second, compression arm (1) joined to the first arm (3).
US09276367B2	Method of manurfacturing an electromagnetic energy delivery device An electrosurgical system for directing energy to tissue includes a generator assembly operable to supply power having a selected phase, amplitude and frequency, and an applicator array assembly. The applicator array assembly includes a shell assembly, a plurality of energy applicators disposed within the shell assembly, and a power divider unit electrically coupled to the generator assembly. The power divider unit is operable to divide power into the applicator array assembly.
US09276359B2	Cord coupling securement device A cord coupling securement device secures a male plug to a female plug to prevent unintended disconnection of coupled extension cords. The device includes a first cable tie configured for coupling to a first cord adjacent to a first cord plug and a second cable tie configured for coupling to a second cord adjacent to a second cord plug engageable to the first cord plug. A strap extends transversely from a loop formed by coupling the first cable tie to the first cord. The strap is insertable through a receiver such that the strap is coupled to the receiver and the first cable tie is secured to the second cable tie.
US09276357B2	Apparatus for retaining a plug in a receptacle The present disclosure is an apparatus for retaining a plug within a receptacle. The apparatus for retaining a plug within a receptacle may include a receptacle body and a retention device. The retention device may include a face portion and at least one prong, each prong of the at least one prong including a barb. The retention device is configured to retain a plug inserted within the receptacle body by contact with a shroud of the plug from the barb of each prong of the at least one prong of the retention device.
US09276351B2	Composite insert A composite insert has at least one metallic contact element which is extrusion-coated with the aid of a premolded part which has a first three-dimensional sealing surface to an injection mold, a stiffener of the contact element being formed beyond a transition region of the premolded part to the injection mold.
US09276349B2	Receptacle for connecting modular electronic instruments A receptacle is provided to connect modular electronic instruments to each other. A box-shaped case has a front face having an opening for inserting a single modular electronic instrument into the box-shaped case. A first connector is disposed inside the box-shaped case to connect the single modular electronic instrument to the receptacle. A second connector is disposed on a first side face of the receptacle for connecting the receptacle to a first receptacle on the side of the first side face. A third connector is disposed on a second side face of the receptacle for connecting the receptacle to a second receptacle on the side of the second side face. A lock secures the connection with one of the first and second receptacles. A leg is disposed on the bottom face. The position of the leg is deviated only to one of the first or second side faces.
US09276348B1	Lead lock for securing a lead to a pulse generator A connector for electrically and mechanically coupling a lead pin to a pulse generator that includes a housing and a plunger having openings which can be aligned in an unlocked position to permit insertion and retraction of the lead pin. The connector also has a biasing member which moves and then holds the plunger in a locked position relative to the housing such that the housing and plunger pinch the lead pin thereby coupling the lead pin to the connector.
US09276346B1	Gasketless flip lid for a flanged power inlet receptacle A power inlet box suitable for outdoor or external use is configured in such a manner so as to prevent moisture from entering the power inlet enclosure. A hinged lid assembly is installable directly on the top face of a flanged power inlet enclosure to provide a face seal therewith. The hinged lid assembly has a cover and a base that form a tongue-and-groove seal, thus providing a first line of defense from moisture or other contaminants entering the inlet. As a second line of defense, a tapered stopper is provided on the inside of the cover to provide a stopper seal. A lateral seal is provided at the hinge point of the hinged lid assembly to prevent moisture from entering the hinge area where a tongue-and-groove seal is not present.
US09276344B2	Plug connector having novel primary locking hooks A connector element includes: at least two contact elements; and at least one latching element which has two diametrically opposed detents, which latching element is situated between the at least two contact elements. The at least one latching element is configured to be pivotable or bendable, and the two contact elements each have a recess for establishing a form-fit connection to one of the detents of the latching element. The recess is further configured to enable the latching element to be pivoted or bent in the direction of one of the two contact elements, so that the form-fit connection between the other contact element and the associated detent is able to be released.
US09276343B2	Connector and terminal with insulator separating and insulating first and second terminals in a direction perpendicular to a mating direction A terminal is connectable to a connection object having a first mating connection portion and a second mating connection portion. The terminal comprises a first terminal, a second terminal and an insulator. The first terminal has a first contact portion electrically connectable with the first mating connection portion in a first direction. The second terminal has a second contact portion electrically connectable with the second mating connection portion in the first direction. The insulator fixes and integrates the first terminal and the second terminal in a second direction perpendicular to the first direction. When the first contact portion and the second contact portion are connected to the first mating connection portion and the second mating connection portion, respectively, the first terminal is electrically unconnected with the second mating connection portion, and the second terminal is electrically unconnected with the first mating connection portion.
US09276341B2	Connector and connector assembly A connector is connectable to an object. The object includes a regulated portion, a guided portion and a received portion. The connector includes a housing and a regulating member. The housing has a guide portion and a receive portion which opens forward. The regulating member has a spring portion and a regulating portion. The regulating portion is supported by the spring portion and is vertically movable. When the guided portion is moved rearward along the guide portion under a state where the regulating portion is pressed by the object to be moved downward from an initial position, the receive portion receives the received portion, and the connector is connected to the object. Under a connected state where the connector is connected to the object, the regulating portion returns to the initial position to be located forward of the regulated portion to regulate a forward movement of the regulated portion.
US09276339B2	Electrical interconnect IC device socket A surface mount electrical interconnect adapted to provide an interface between contact pads on an LGA device and a PCB. The electrical interconnect includes a socket substrate having a first surface with a plurality of first openings having first cross-sections, a second surface with a plurality of second openings having second cross-sections, and center openings connecting the first and second openings. The center openings include at least one cross-section greater than the first and second cross-sections. A plurality of contact members are located in the socket substrate such that first contact tips are located proximate the first openings, second contact tips are located proximate the second openings, and center portions located in the center openings.
US09276337B2	Dynamically stable surface mount post header A surface mount post header comprising at least one post and at least one lead, the post and the lead extending from a body and being distinct from each other, the body defining body's longitudinal axis, the lead configured to at least partially define a base of support for the post header on a surface of a substrate; the lead comprising a foot portion distal from the body, wherein at least one longitudinal portion of the foot portion forms an angle between 0 and 90 degrees with a projection of the body's longitudinal axis on the base of support is disclosed. In addition, a surface mount post header with a pick and place pad, and an assembly comprising the header and the substrate are disclosed.
US09276332B2	High-temperature RF connector An electrical connector includes a substantially cylindrical conducting outer body and coaxial contact portion; the outer body having an opening for receiving an end of a cable; a ceramic annular insulator surrounding the contact portion, thereby electrically isolating the contact portion from the outer body; a connecting body connecting to the outer body and coaxial with the opening; and a ring having an exterior surface in contact with an interior surface of the clamp body and coaxial with the opening. The contact portion includes front and rear portions; the rear portion has a hole therein, substantially coaxial with the opening in the outer body, and a slot intersecting the hole for making a solderless connection to a central conductor of the cable. The ring has a slot therein, the ring thereby being closable to make a solderless connection to an outer conductor of the cable.
US09276324B2	Multi-spectral, selectively reflective construct A selectively reflective construct, and a method for making the construct, are described. In one embodiment reflectance, transmission and absorption properties may be controlled in multiple electromagnetic bands. A construct is described comprising a) a thermally transparent, visually opaque substrate comprising a polymeric material and a colorant, and b) a thermally reflective layer comprising a low emissivity component which is optionally transparent to radar signal.
US09276321B2	Diagonally-driven antenna system and method An electronic device (100) includes an antenna system (150) having two antennas (110, 120). A first antenna (110) has a first antenna element (111) positioned outside a first corner (191) of a planar, rectangular ground plane (165) and a second antenna element (115) positioned outside a second corner of the ground plane that is diagonally across from the first corner. A second antenna (120) has a third antenna element (121) positioned near a third corner (193) of the ground plane that is adjacent to the first corner and a fourth antenna element (125) positioned near a fourth corner (195) of the ground plane that is diagonally across from the third corner. At low-band frequencies, the antenna elements (111, 115) of the first antenna (110) are driven out-of-phase relative to each other. Similarly, at low-band frequencies, the antenna elements (121, 125) of the second antenna (120) are driven out-of-phase relative to each other.
US09276320B2	Multi-band antenna A multi-band antenna is to be electrically connected to a transceiving terminal of a radio frequency circuit by a feeding unit and includes a grounding section, a feed-in section electrically connected to the feeding unit, first and second radiator arms respectively disposed at opposite lateral sides of the feed-in section and electrically connected to the feed-in section, and a first coupling component. The first and second radiator arms are configured to generate first and second resonant modes, respectively. When the multi-band antenna transceives radio frequency signals, the second radiator arm and the first coupling component generate a coupling effect such that the first coupling component generates a third resonant mode. Center frequencies of the first, second, and third resonant modes are different from each other.
US09276319B2	Electronic device antenna with multiple feeds for covering three communications bands Electronic devices may be provided that include radio-frequency transceiver circuitry and antennas. An antenna may be formed from an antenna resonating element and an antenna ground. The antenna resonating element may have a shorter portion that resonates at higher communications band frequencies and a longer portion that resonates at lower communications band frequencies. An extended portion of the antenna ground may form an inverted-F antenna resonating element portion of the antenna resonating element. The antenna resonating element may be formed from a peripheral conductive electronic device housing structure that is separated from the antenna ground by an opening. A first antenna feed may be coupled between the peripheral conductive electronic device housing structures and the antenna ground across the opening. A second antenna feed may be coupled to the inverted-F antenna resonating element portion of the antenna resonating element.
US09276318B2	Coupler apparatus and communication apparatus According to one embodiment, a coupler apparatus includes a coupling element, a ground plane, and at least one connecting element. The coupling element which is made of a tabular electrical conducting material and in which power feeding is performed to a reference point. The ground plane which is made of a tabular electrical conducting material and partially faces a part of the coupling element. The connecting element which is made of an electrical conducting material, disposed to the ground plane, contact to a metal member provided to a communication apparatus to face the ground plane, and electrically connects the ground plane to the metal member.
US09276316B2	Antenna module and wireless communication device employing same An antenna module includes an antenna, a connecting member attached to the antenna, a sliding board configured for sliding relative to connecting member, and a radiation member attached to the sliding board. When the sliding board is slid by a user, the radiation member makes contact with or separates from the connecting member, enabling one antenna module to receive and transmit wireless signals of different wavelengths.
US09276315B2	Memory based electronically scanned array antenna control A system for controlling an active electronically scanned array (AESA) antenna, which enables the AESA antenna to switch rapidly between different antenna states, includes memories (38) connected to a common address bus (40). Each memory (38) is also connected to a digitally controlled RF signal transmission block (32) within the AESA antenna, and stores digital control words for the digitally controlled RF signal transmission block (32). When a new address is provided on the address bus (40), each memory (38) outputs a new digital control word to its respective digitally controlled RF signal transmission block (32), causing a change in the state of the AESA antenna.
US09276313B2	Adjustable integrated circuit antenna structure An antenna structure of a Radio Frequency (RF) device includes an antenna and a transmission line circuit coupled to the antenna. The transmission line circuit includes a plurality of transmission line circuit elements and a transmission line coupling circuit that couples at least one of the transmission line circuit elements together to form the transmission line circuit based on a transmission line characteristic signal.
US09276302B2	Waveguide rotary joint including half-height waveguide portions A waveguide rotary joint includes a first waveguide portion for receiving a microwave signal, a second waveguide portion for outputting the received microwave signal, and a conductive pin including a first end and a second end distal from the first end, the first end arranged in and RF coupled to the first waveguide, and the second end arranged in and RF coupled to the second waveguide, and a choke cavity is arranged between the first waveguide portion and the second waveguide portion. The first waveguide and the second waveguide are rotatable relative to each other about a longitudinal axis of the conductive pin.
US09276301B2	Polymeric compound, oxygen permeable membrane, and electrochemical device A polymeric compound including a cross-linked backbone which is a product of a reaction between a multifunctional acrylate compound and a metal porphyrin derivative, wherein the metal porphyrin derivative has a first axial position and a second axial position, and further includes a basic coordination ligand coordinated at the first axial position of the metal porphyrin derivative.
US09276292B1	Electrolytic doping of non-electrolyte layers in printed batteries An electrical or electrochemical cell, including a cathode layer, an electrolyte layer, and an anode layer is disclosed. The cathode layer includes a first material providing a cathodic electric transport, charge storage or redox function. The electrolyte layer includes a polymer, a first electrolyte salt, and/or an ionic liquid, The anode layer includes a second material providing an anodic electric transport, charge storage or redox function. At least one of the cathode and anode layers includes the ionic liquid, a second electrolyte salt, and/or a transport-enhancing additive.
US09276290B2	Electrolyte for rechargeable lithium battery and rechargeable lithium battery comprising same In one aspect, a rechargeable lithium battery comprising a non-aqueous electrolyte including an organic solvent; a lithium salt and a substituted 2-fluoroalkoxy-1,3,2-dioxaphospholane 2-oxide is provided. The 2-fluoroalkoxy-1,3,2-dioxaphospholane 2-oxide can be a compound represented by the following Chemical Formula 1.
US09276283B1	Microbial fuel cell integrated in vehicle A self-propelled microbial fuel cell apparatus includes a microbial fuel cell with a cathode electrode and an anode electrode wherein the anode electrode is enclosed within an enclosure that has an opening in it. The microbial fuel cell is positioned within a self-propelled delivery vehicle so that the electrodes of the fuel cell are exposed to interface with a microbial environment.
US09276281B2	Manufacturing a fuel cell membrane-electrode assembly The present invention provides an apparatus and method for manufacturing a fuel cell membrane-electrode assembly by forming a catalyst layer, which has uniform distribution, excellent porosity, and excellent bondability to a polymer electrolyte membrane, on a metal roll by an electrospray process and transferring the catalyst layer to a polymer electrolyte membrane.
US09276278B2	Hydrogen producing fuel cartridge Disclosed herein is a method of producing hydrogen, including selectively applying heat to a fuel within a canister thermally insulated and inside a cartridge, firing fuel with heating elements to facilitate decomposition and release hydrogen, and, removing said hydrogen from said cartridge via a fluid communication means.
US09276276B2	Apparatus for electronic devices with vibrators and fuel cells The mechanical energy of an actuator is used for producing vibration alerts in a portable electronic device. The same mechanical energy is also utilized to control the flow of fuel or to mix the fuel in a fuel cell of the portable electronic device. Thus, the flow of fuel into a reaction area of a fuel cell is controlled or fuel is mixed in a fuel storage area of a fuel cell assembly. Such fuel flow control and mixing is performed passively whenever a vibration alert occurs, or is performed actively in response to monitoring the status of the fuel cell assembly.
US09276269B2	Catalyst layer, membrane electrode assembly, and electrochemical cell A catalyst layer containing a catalyst material, the catalyst layer having a porosity of 20 to 90% by vol and satisfying a relation: R1≧R0×1.2, wherein R1 is an alignment ratio of the catalyst layer; and R0 is an alignment ratio of the catalyst material in powder form having a random crystalline plane distribution, and each of the alignment ratios is calculated from a X-ray diffraction spectrum having a diffraction angle 2θ range from 10 to 90 degree measured using Cu-Kα-rays.
US09276268B2	Electrocatalyst, fuel cell cathode and fuel cell The present invention is related to fuel cells and fuel cell cathodes, especially for fuel cells using hydrogen peroxide, oxygen or air as oxidant. A supported electrocatalyst (204) or unsupported metal black catalyst (206) of cathodes according to an embodiment of the present invention is bonded to a current collector (200) by an intrinsically electron conducting adhesive (202). The surface of the electrocatalyst layer is coated by an ion-conducting ionomer layer (210). According to an embodiment of the invention these fuel cells use cathodes that employ ruthenium alloys RuMeIMeII such as ruthenium-palladium-iridium alloys or quaternary ruthenium-rhenium alloys RuMeIMeIIRe such as ruthenium-palladium-iridium-rhenium alloys as electrocatalyst (206) for hydrogen peroxide fuel cells. Other embodiments are described and shown.
US09276263B2	All-solid state secondary cell An all-solid state secondary cell which has a positive electrode active material layer, negative electrode active material layer, and solid electrolyte layer, wherein at least one of said positive electrode active material layer, said negative electrode active material layer, and said solid electrolyte layer includes an inorganic solid electrolyte and a binder comprised of an average particle size 30 to 300 nm particulate-shaped polymer and said particulate-shaped polymer is present in said positive electrode active material layer, said negative electrode active material layer, and said solid electrolyte layer in a state holding the particulate state, is provided.
US09276262B2	Battery electrode and lithium ion secondary battery provided with same There are provided a battery electrode wherein an active material layer is formed on a collector surface, and the layer contains an active material and a block copolymer having a vinyl alcohol polymer block; and a lithium ion secondary battery having a laminate structure in which a pair of electrodes having an active material layer are disposed in such a manner that the active material layers face each other via a separator, and an electrolyte composition containing a lithium-containing electrolyte salt fills the gaps between the pair of electrodes and the separator, wherein at least one of the pair of electrodes is the above battery electrode. Thus, there can be provided a lithium ion secondary battery which can be easily produced and be less polarized, exhibiting excellent charge/discharge properties and cycle characteristics.
US09276261B2	Surface treated silicon containing active materials for electrochemical cells Provided are active materials for electrochemical cells. The active materials include silicon containing structures and treatment layers covering at least some surface of these structures. The treatment layers may include aminosilane, a poly(amine), and a poly(imine). These layers are used to increase adhesion of the structures to polymer binders within active material layers of the electrode. As such, when the silicon containing structures change their size during cycling, the bonds between the binder and the silicon containing structure structures or, more specifically, the bonds between the binder and the treatment layer are retained and cycling characteristics of the electrochemical cells are preserved. Also provided are electrochemical cells fabricated with such active materials and methods of fabricating these active materials and electrochemical cells.
US09276260B2	Anode active material for lithium secondary battery, lithium secondary battery comprising the same, and method of preparing the same The present disclosure relates to an anode active material for a lithium secondary battery, a lithium secondary battery comprising the anode active material, and a method of preparing the anode active material. One embodiment of the present disclosure provides an anode active material for a lithium secondary battery, comprising a composite of SiOx-carboxylmethyl cellulose (CMC)-carbon nanotube (CNT) in which CNT is bonded to SiOx (0
US09276257B2	Method for producing anode for lithium secondary battery and anode composition, and lithium secondary battery The invention relates to an anode for lithium secondary battery comprising vapor grown carbon fiber uniformly dispersed without forming an agglomerate of 10 μm or larger in an anode active material using natural graphite or artificial graphite, which anode is excellent in long cycle life and large current characteristics. Composition used for production for the anode can be produced, for example, by mixing a thickening agent solution containing an anode active material, a thickening agent aqueous solution and styrene butadiene rubber as binder with a composition containing carbon fiber dispersed in a thickening agent with a predetermined viscosity or by mixing an anode active material with vapor grown carbon fiber in dry state and then adding polyvinylidene difluoride thereto.
US09276256B2	Lithium secondary battery and method of manufacturing same A lithium secondary battery provided by this invention has electrodes and configured in a structure in which active material layers, including active materials and binders, are held by collectors. The active material of at least one of the positive electrode and the negative electrode of the electrodes is formed from a metal compound which stores and releases lithium ions through conversion reactions. The lithium secondary battery includes a polyimide-base resin as a binder.
US09276254B2	Method for removing burrs of battery electrode plates by inductively coupled plasma dry etching The present invention provides a method for removing burrs of battery electrode plates using inductively coupled plasma (ICP) dry etching, in which an induction coil is used for ionizing reaction gas. A DC bias is applied to accelerate the ionized reaction gas to bombard the burrs of electrode plate, removing burrs that formed in machining processes using physical bombardment. The equipment used in the present invention is an ICP etch system. The method according to the present invention can completely remove the burrs of electrode plate, thereby effectively preventing short circuits caused by burrs penetrating the membrane separator in the battery.
US09276246B2	Treatment and adhesive for microporous membranes An electrochemical cell may have a PVDF microporous membrane that may be adhesively bonded to electrodes. The adhesive may be a mixture of a solvent and non-solvent that may cause the PVDF membrane to become tacky and adhere to an electrode without collapsing. An adhesively bonded cell may be constructed using multiple layers of adhesively bonded membranes and electrodes. In some embodiments, the adhesive solution may be used as a sizing to prepare electrodes for bonding.
US09276244B2	Method for producing polyolefin porous film, and laminated porous film Provided is a method for reproducibly and efficiently producing a polyolefin porous film having a porous structure suitable for a separator for a battery without requiring a special apparatus. The method according to the present invention is a method for producing a polyolefin porous film, the method including conveying a raw material polyolefin sheet having pores into a furnace of a tenter type stretching machine, and tenter-stretching the sheet in a plurality of stretching regions in the furnace to produce a polyolefin porous film, wherein the plurality of stretching regions include at least two stretching regions having different film widening speeds, and the temperature of a stretching region having a high film widening speed is lower than that of a stretching region having a low film widening speed in the at least two stretching regions, and a stretching region having the highest film widening speed is situated in the front stage with respect to a stretching region having the lowest film widening speed.
US09276242B2	Battery cell arrangement A battery cell arrangement having a battery cell which is in the form of a film cell and includes a flat cell body with two end faces, a flexible cell rim surrounding the cell body, and two contact sections arranged on a rim side of the battery cell. The battery cell arrangement further has a frame arrangement which includes a first frame element and a second frame element which frames the cell body on all sides on the rim. At least one vent opening is provided on a side of the frame arrangement which faces away from the end faces of the cell body, in order to allow fluid, in particular gas, to emerge from the battery cell arrangement in the event of damage.
US09276241B2	Molten salt battery case, and molten salt battery The case for a molten salt battery is used for a molten salt battery containing as an electrolyte a molten salt containing sodium ions. The case is formed of aluminum or an aluminum alloy containing 90% by mass or more of aluminum.
US09276231B2	Method for fabricating organic electroluminescence device and organic electroluminescence device A method for fabricating an organic electroluminescence device according to the present invention includes: preparing an organic electroluminescence device having a lower electrode, an organic layer including an emitting layer, an upper electrode, and a shorted part in which the lower electrode and the upper electrode are shorted; and irradiating a part surrounding the shorted part in which the lower electrode and the upper electrode are shorted to alter a material composing the lower electrode or the upper electrode and to form a space between the lower electrode and the upper electrode in a region corresponding to a region surrounded by an altered part.
US09276226B2	Organic-inorganic hybrid multilayer gate dielectrics for thin-film transistors Disclosed are organic-inorganic hybrid self-assembled multilayers that can be used as electrically insulating (or dielectric) materials. These multilayers generally include an inorganic primer layer and one or more bilayers deposited thereon. Each bilayer includes a chromophore or “π-polarizable” layer and an inorganic capping layer composed of zirconia. Because of the regularity of the bilayer structure and the aligned orientation of the chromophore resulting from the self-assembly process, the present multilayers have applications in electronic devices such as thin film transistors, as well as in nonlinear optics and nonvolatile memories.
US09276223B2	Dopant for a hole conductor layer for organic semiconductor components, and use thereof The invention relates to novel metal-organic materials for hole injection layers in organic electronic components. For example, in light-emitting components such as organic light diodes (OLED) or organic light-emitting electrochemical cells (OLEEC) or organic field effect transistors or organic solar cells or organic photo detectors. Luminescence (cd/m2), efficiency (cd/A), and service life (h) of organic electronic components such as from organic light diodes in particular are highly dependent on the exciton thickness in the light-emitting layer and on the quality of the charge carrier injection and are also limited by same, among other things. The invention relates to a hole injection layer consisting of quadratic planar mononuclear transition metal complexes such as copper 2+ complexes, for example, which are embedded into a hole-conducting matrix.
US09276216B2	Organic molecular device An organic molecular device of an embodiment includes a first and a second conductive layers and an organic molecular layer having an organic molecule provided between the first and the second conductive layer. The organic molecule includes a one-dimensional or quasi one-dimensional π-conjugated system chain having either a first aromatic ring or a second aromatic ring. The first aromatic ring has one or more substituents that are an electron withdrawing group, each substituent of the first aromatic ring is independently selected from the group consisting of the electron withdrawing group and hydrogen, the second aromatic ring has one or more substituents that are an electron releasing group, and each substituent of the second aromatic ring is independently selected from the group consisting of the electron releasing group and hydrogen. The first aromatic ring or the second aromatic ring exist in an unbalanced manner in the π-conjugated system chain.
US09276214B2	Composition for organic thin film, organic thin film, and electronic device including the organic thin film A composition for an organic thin film may include a first compound having a linear alkylene oxide moiety and a haloalkyl moiety, and a second compound having conductivity and being capable of controlling a work function.
US09276209B2	Phase change memory with diodes embedded in substrate An integrated circuit structure includes a semiconductor substrate; a diode; and a phase change element over and electrically connected to the diode. The diode includes a first doped semiconductor region of a first conductivity type, wherein the first doped semiconductor region is embedded in the semiconductor substrate; and a second doped semiconductor region over and adjoining the first doped semiconductor region, wherein the second doped semiconductor region is of a second conductivity type opposite the first conductivity type.
US09276202B2	Phase-change storage unit containing TiSiN material layer and method for preparing the same The present invention provides a phase-change storage unit containing a TiSiN material layer and a method for preparing the same. The phase-change storage unit includes a phase-change material layer and a lower electrode located there below, the phase-change material layer and the lower electrode are connected by a TiSiN material layer, the lower electrode includes a bottom and a sheet side connected to the bottom, the sheet side is perpendicular to the bottom to form a blade structure, and the top of the sheet side contacts the TiSiN material layer. The present invention adopts annealing to increase the grain size of the electrode so as to reduce the overall resistance of the device and form a TiSiN material layer on the top of the lower electrode so as to reduce the effective operation region. The phase-change storage unit of the present invention is applied to a phase-change memory to achieve the advantages such as low power consumption, high density and high data retention performance.
US09276199B2	Small form factor magnetic shield for magnetorestrictive random access memory (MRAM) Some implementations provide a die that includes a magnetoresistive random access memory (MRAM) cell array that includes several MRAM cells. The die also includes a first ferromagnetic layer positioned above the MRAM cell array, a second ferromagnetic layer positioned below the MRAM cell array, and several vias positioned around at least one MRAM cell. The via comprising a ferromagnetic material. In some implementations, the first ferromagnetic layer, the second ferromagnetic layer and the several vias define a magnetic shield for the MRAM cell array. The MRAM cell may include a magnetic tunnel junction (MTJ). In some implementations, the several vias traverse at least a metal layer and a dielectric layer of the die. In some implementations, the vias are through substrate vias. In some implementations, the ferromagnetic material has high permeability and high B saturation.
US09276198B2	Magnetic memory devices A magnetic memory device according to embodiments includes a first reference magnetic layer on a substrate, a second reference magnetic layer on the first reference magnetic layer, a free layer between the first reference magnetic layer and the second reference magnetic layer, a first tunnel barrier layer between the first reference magnetic layer and the free layer, and a second tunnel barrier layer between the second reference magnetic layer and the free layer. The first reference magnetic, second reference magnetic and free layers each have a magnetization direction substantially perpendicular to a top surface of the substrate. A resistance-area product (RA) value of the first tunnel barrier layer is greater than that of the second tunnel barrier layer.
US09276196B2	Ferromagnetic device providing high domain wall velocities The invention is directed to a ferromagnetic device (10), having an elongated structure extending along a longitudinal direction (11), comprising a ferromagnetic material, wherein a transverse cross section (20) of the ferromagnetic material, perpendicular to said longitudinal direction, is designed to provide a domain wall velocity above the Walker breakdown limit of the ferromagnetic material. In particular, at least a portion (21-23) of a peripheral contour of the ferromagnetic material forms, in the transverse cross-section (20), a non-orthogonal convex set. For example, the whole peripheral contour may realize a (non-orthogonal) convex polygon.
US09276195B2	Magnetic random access memory According to one embodiment, a magnetic random access memory includes a magnetoresistive element, a contact arranged under the magnetoresistive element and connected to the magnetoresistive element, and an insulating film continuously formed from a periphery of the contact to a side surface of the magnetoresistive element and including a protective portion covering the side surface of the magnetoresistive element.
US09276193B2	Piezoelectric material, piezoelectric element, liquid ejecting head, liquid ejecting apparatus, ultrasonic sensor, piezoelectric motor, and power generator A piezoelectric material contains a first component that is a rhombohedral crystal that is configured to have a complex oxide with a perovskite structure and Curie temperature Tc1, a second component that is a crystal other than a rhombohedral crystal that is configured to have a complex oxide with the perovskite structure and Curie temperature Tc2, and a third component that is configured to have a complex oxide with the perovskite structure in which the component is formed as the same crystal system as the second component and Curie temperature Tc3, in which Tc1 is higher than Tc2, and Tc3 is equal to or higher than Tc1.
US09276190B2	Practical method of producing an aerogel composite continuous thin film thermoelectric semiconductor material by modified MOCVD A method is disclosed of constructing a composite material structure, comprised of an aerogel substrate, which is then overlaid throughout its interior with an even and continuous thin layer film of doped thermoelectric semiconductor such that electrical current is transmitted as a quantum surface phenomena, while the cross-section for thermal conductivity is kept low, with the aerogel itself dissipating that thermal conductivity. In one preferred embodiment this is achieved using a modified metal-organic chemical-vapor deposition (MOCVD) process in the gas phase, with the assist of microwave heating after the reactant gases have evenly diffused throughout the interior of the aerogel substrate.
US09276183B2	Optoelectronic semiconductor component and method for producing such an optoelectronic semiconductor component In at least one embodiment of the optoelectronic semiconductor component (1), the optoelectronic semiconductor component has a support (2). At least one optoelectronic semiconductor chip (3) with a radiation outlet face (30) is applied onto a support upper face (20). A sacrificial layer (5) is located over the radiation outlet face (30) in the direction away from the support (2). A housing body (6) which has a housing upper face (60) is molded around the semiconductor chip (3) and/or around the sacrificial layer (5) in a lateral direction parallel to the radiation outlet face (30). A sacrificial layer (5) upper face (50) which faces away from the radiation outlet face (30) is free of a housing body (6) material.
US09276182B2	Light emitting element A heat radiation structure of a light emitting element has leads, each lead having a plurality of leg sections, and a light emitting chip mounted on any one of the leads. The present invention can provide a high-efficiency light emitting element, in which a thermal load is reduced by widening a connecting section through which a lead and a chip seating section of the light emitting element are connected, and the heat generated from a heat source can be more rapidly radiated to the outside. Further, the present invention can also provide a high-efficiency light emitting element, in which heat radiation fins are formed between a stopper and a molding portion of a lead of the light emitting element so that natural convection can occur between the heat radiation fins, and an area in which heat radiation can occur is widened to maximize a heat radiation effect.
US09276181B2	Light emitting apparatus and production method thereof A light emitting apparatus includes an electrically insulating base member having a longitudinal direction; a pair of electrically conductive pattern portions formed on an upper surface of the base member; at least one light emitting device that is electrically connected to the pair of electrically conductive pattern portions; and a resin portion that surrounds at least a side surface of the at least one light emitting device with at least an upper surface of the at least one light emitting device being exposed from the resin portion and partially covers the pair of electrically conductive pattern portions. Each of the pair of electrically conductive pattern portions extends toward a periphery of the base member from resin-covered parts of the electrically conductive pattern portions. Each of the electrically conductive pattern portions forms a narrower area and a wider area in the longitudinal direction.
US09276179B2	Light emitting device and method for producing same There is provided a light emitting device highly resistant to the environment, and having good heat resistance, light resistance and gas barrier property, and a method for producing same. With the light emitting device, a substrate 2 and interconnect patterns 5A, 5B formed on the surface thereof are covered with an acrylic resin primer 10 having better gas barrier property than a silicone resin sealing resin part 3. Light resistance is ensured by the silicone resin sealing resin portion 3 and the gas barrier property can be ensured by the acrylic resin primer 10.
US09276178B2	Light-emitting dies incorporating wavelength-conversion materials and related methods In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.
US09276177B2	LED lens design with more uniform color-over-angle emission An LED device with improved angular color performance has a silicone lens shaped as a portion of a sphere. The lens is molded over an array of LED dies disposed on the upper surface of a substrate. Phosphor particles are disbursed throughout the material used to mold the lens. The distance between farthest-apart edges of the LED dies is more than half of the length that the lens extends over the surface of the substrate. The distance from the top of the lens dome to the surface of the substrate is between 57% and 73% of the radius of the sphere. Shaping the lens as the top two thirds of a hemisphere reduces the non-uniformity in the emitted color such that neither of the CIE color coordinates x or y of the color changes more than 0.004 over all emission angles relative to the surface of the substrate.
US09276175B2	Light emitting device, light emitting device package Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure, a buffer layer on the light emitting structure, and a filter layer on the buffer layer.
US09276173B2	Light-emitting device A light-emitting device comprises: a light-emitting stack having an upper side, a first edge having an end point, and a second edge opposite to the first edge; a first bonding region arranged on the upper side, near the first edge, and far from the end point; a second bonding region separated from to the first bonding region by a first distance and being far from the end point; a third bonding region arranged on the upper side; a fourth bonding region separated from the third bonding region by a second distance longer than the first distance; a first electrode connected to the first bonding region; a second electrode connected to the second bonding region; a third electrode connected to the third bonding region; a fourth electrode connected to the fourth bonding region; and a fifth electrode connected to the first bonding region and pointing to the fourth bonding region.
US09276172B2	Method of manufacturing a display device It is provided a method of manufacturing a display device for which the damage caused to the display panel due to processing at high temperatures is reduced. The method of manufacturing a display device includes: preparing a carrier substrate including a surface treated region; laying a mother substrate on the carrier substrate; progressing a process of forming a thin film on the mother substrate; and separating the carrier substrate from the mother substrate by using the surface treated region as an initial separation point. Bonding is formed between the carrier substrate and the mother substrate during forming the thin film over the areas that are not surface treated. The two substrates may be separated by disposing permeating oil on the surface treated region wherefrom oil permeates through the remaining regions by osmotic pressure. This way damage caused to the display panel during thin film processing is reduced.
US09276171B2	Nitride semiconductor light-emitting diode Provided is a nitride semiconductor light-emitting diode having a higher light extraction efficiency and a higher polarization degree. A nitride semiconductor light-emitting diode according to the present invention comprises an active layer generating a polarized light, a first side surface, a second side surface, a third side surface, and a fourth side surface. The first and second side surfaces consist only of a plane including the Z-axis and the Y-axis. The third and fourth side surfaces are perpendicular to the first and second side surfaces and include the X-axis. The third and fourth side surfaces include an inclined surface.
US09276169B2	Light emitting device, light emitting device package, and lighting system including the same Provided are a light emitting device, a light emitting device package, and a lighting system including the same. The light emitting device includes a second electrode layerelectrode, a light emitting structure, a texture, and a current spreading layer. The light emitting structure is on second electrode layerelectrode, and includes a second conductive type semiconductor layer, an active layer on the second conductive type semiconductor layer, and a first conductive type semiconductor layer on the active layer. The texture is on at least one portion of the light emitting structure. The current spreading layer is on the light emitting structure provided with the texture.
US09276166B2	Method for forming light-emitting device A method for forming a light-emitting device of the present application comprises providing a wafer; forming a first plurality of light-emitting elements on the wafer; providing a first connection structure to connect each of the first plurality of light-emitting elements; and applying a current flow to one of the first plurality of light-emitting elements for testing at least one electrical property of the light-emitting element while no current flow is applied to the remaining of the first plurality of light-emitting elements.
US09276159B2	Superlattice structure A structure comprised of an InAsSb layer adjacent to a GaSb layer, with the adjacent InAsSb and GaSb layers repeating to form a superlattice (SL). The structure is preferably an unstrained SL, wherein the composition of the InAsSb layer is InAs0.91Sb0.09; the InAs0.91 Sb0.09 layers are preferably lattice-matched to the GaSb layers. The SL structure is preferably arranged such that the Sb component of the InAsSb layers reduces the strain in the SL structure so that it is less than that found in an InAs/GaSb Type-II Strained Layer Superlattice (SLS). The present SL structure is suitably employed as part of an infrared photodetector.
US09276153B2	Solar cell wafer and method of producing the same A solar cell wafer having a porous layer on a surface of a semiconductor wafer typified by a silicon wafer, which can further reduce reflection loss of light at the surface. A solar cell wafer 100 of the present invention has a porous layer 11 having a pore diameter of 10 nm or more and 45 nm or less, on at least one surface 10A of a semiconductor wafer 10, and the layer thickness of the porous layer 11 is more than 50 nm and 450 nm or less.
US09276151B2	Polyolefin adhesive material for use in solar modules This disclosure generally relates to films capable of use in electronic device modules and to electronic device modules including such films. The disclosure also generally relates to materials for use in such films.
US09276147B2	Methods of fabricating a photovoltaic module, and related system A method of processing a semiconductor assembly is presented. The method includes fabricating a photovoltaic module including a semiconductor assembly. The fabrication step includes performing an efficiency enhancement treatment on the semiconductor assembly, wherein the efficiency enhancement treatment includes light soaking the semiconductor assembly, and heating the semiconductor assembly. The semiconductor assembly includes a window layer having an average thickness less than about 80 nanometers, wherein the window layer includes cadmium and sulfur. A related system is also presented.
US09276143B2	Silicon-based visible and near-infrared optoelectric devices In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.
US09276137B2	Diode and semiconductor device including built-in diode A diode is provided with a pillar region formed so as to extend between a barrier region and an anode electrode, contact the barrier region, and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region; and a barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode. The barrier height adjusting region includes at least one component selected from the group consisting of a second conductivity type semiconductor having a concentration lower than that of an anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i-type semiconductor. The barrier height adjusting region and the anode electrode are connected through a Schottky junction.
US09276136B2	Dynamic quantity sensor The present invention provides a dynamic quantity device which reduces stress received by a sensor due to resin packaging and reduces variation in sensor characteristics due to stress. The dynamic quantity sensor includes a semiconductor substrate including a fixing part and a flexible part and a movable part positioned on an interior side of the fixing part, and a cap component configured to cover the flexible part and the movable part, wherein the fixing part includes an interior frame configured to enclose the flexible part and the movable part and an exterior part positioned on a periphery of the interior frame, a slit configured to divide the interior frame and the exterior frame, and a linking part configured to link the interior frame and the exterior frame.
US09276134B2	Field effect transistor constructions and memory arrays In some embodiments, a transistor includes a stack having a bottom source/drain region, a first insulative material, a conductive gate, a second insulative material, and a top source/drain region. The stack has a vertical sidewall with a bottom portion along the bottom source/drain region, a middle portion along the conductive gate, and a top portion along the top source/drain region. Third insulative material is along the middle portion of the vertical sidewall. A channel region material is along the third insulative material. The channel region material is directly against the top and bottom portions of the vertical sidewall. The channel region material has a thickness within a range of from greater than about 3 Å to less than or equal to about 10 Å; and/or has a thickness of from 1 monolayer to 7 monolayers.
US09276129B2	Semiconductor device in which oxygen deficiency in semiconductor is reduced and method for manufacturing the same An object of an embodiment of the present invention is to manufacture a highly-reliable semiconductor device comprising a transistor including an oxide semiconductor, in which change of electrical characteristics is small. In the transistor including an oxide semiconductor, oxygen-excess silicon oxide (SiOX (X>2)) is used for a base insulating layer of a top-gate structure or for a protective insulating layer of a bottom-gate structure. By using the oxygen-excess silicon oxide, oxygen is discharged from the insulating layer, and oxygen deficiency of an oxide semiconductor layer and the interface state density between the oxide semiconductor layer and the base insulating layer or the protective insulating layer can be reduced, so that the highly-reliable semiconductor device in which change of electrical characteristics is small can be manufactured.
US09276126B2	Semiconductor device and method for producing same This semiconductor device (100A) includes: a substrate (1); a gate electrode (3) and a first transparent electrode (2) which are formed on the substrate (1); a first insulating layer (4) formed over the gate electrode (3) and the first transparent electrode (2); an oxide semiconductor layer (5) formed on the first insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); and a second transparent electrode (7) electrically connected to the drain electrode (6d). At least a portion of the first transparent electrode (2) overlaps with the second transparent electrode (7) with the first insulating layer (4) interposed between them, and the oxide semiconductor layer (5) and the second transparent electrode (7) are formed out of the same oxide film.
US09276124B2	Method for manufacturing semiconductor device with sidewall Provided is a method for manufacturing a semiconductor device so as not expose a semiconductor layer to moisture and the number of masks is reduced. For example, a first conductive film, a first insulating film, a semiconductor film, a second conductive film, and a mask film are formed. The first mask film is processed to form a first mask layer. Dry etching is performed on the first insulating film, the semiconductor film, and the second conductive film with the use of the first mask layer to form a thin film stack body, so that a surface of the first conductive film is at least exposed. Sidewall insulating layers covering side surfaces of the thin film stack body are formed. The first conductive film is side-etched to form a first electrode. A second electrode layer is formed with the second mask layer.
US09276122B2	Thin-film transistor, display apparatus and electronic apparatus Disclosed herein is a thin-film transistor having a gate electrode; a source electrode and a drain electrode which form a source/drain-electrode pair; and a channel layer which is provided between the gate electrode and the source/drain-electrode pair, includes a poly-crystal oxide semiconductor material and has a film thickness smaller than the average diameter of crystal grains of the poly-crystal oxide semiconductor material.
US09276119B2	Method of manufacturing stretchable substrate and stretchable substrate manufactured using the method Provided is a method of manufacturing a gradually stretchable substrate. The method includes forming convex regions and concave regions on a top surface of a stretchable substrate by compressing a mold onto the stretchable substrate and forming non-stretchable patterns by filling the concave regions of the stretchable substrate. The stretchable substrate includes a stretchable region defined by the non-stretchable patterns, the non-stretchable patterns have side surfaces in contact with the stretchable region, and the side surfaces of the non-stretchable patterns are formed of protrusions and a non-protrusion between the protrusions repetitively connected to one another.
US09276118B2	FinFET device having a merge source drain region under contact areas and unmerged fins between contact areas, and a method of manufacturing same A method for manufacturing a fin field-effect transistor (FinFET) device, comprises forming a plurality of fins on a substrate, forming a plurality of gate regions on portions of the fins, wherein the gate regions are spaced apart from each other, forming spacers on each respective gate region, epitaxially growing a first epitaxy region on each of the fins, stopping growth of the first epitaxy regions prior to merging of the first epitaxy regions between adjacent fins, forming a dielectric layer on the substrate including the fins and first epitaxy regions, removing the dielectric layer and first epitaxy regions from the fins at one or more portions between adjacent gate regions to form one or more contact area trenches, and epitaxially growing a second epitaxy region on each of the fins in the one or more contact area trenches, wherein the second epitaxy regions on adjacent fins merge with each other.
US09276115B2	Semiconductor devices and methods of manufacture Semiconductor devices with reduced substrate defects and methods of manufacture are disclosed. The method includes forming at least one gate structure over a plurality of fin structures. The method further includes removing dielectric material adjacent to the at least one gate structure using a maskless process, thereby exposing an underlying epitaxial layer formed adjacent to the at least one gate structure. The method further includes depositing metal material on the exposed underlying epitaxial layer to form contact metal in electrical contact with source and drain regions, adjacent to the at least one gate structure. The method further includes forming active areas and device isolation after the formation of the contact metal, including the at least one gate structure. The active areas and the contact metal are self-aligned with each other in a direction parallel to the at least one gate structure.
US09276113B2	Structure and method to make strained FinFET with improved junction capacitance and low leakage A method of forming a semiconductor device that includes forming a gate structure on a fin structure and etching the source and drain region portions of the fin structure to provide a recessed surface. A first semiconductor layer is formed on the recessed surface of the fin structure that is doped to a first conductivity type. A leakage barrier layer is formed on the first semiconductor layer. A second semiconductor layer is formed on the leakage barrier layer. The second semiconductor layer is doped to a second conductivity type.
US09276112B2	Semiconductor device having tipless epitaxial source/drain regions A semiconductor device having tipless epitaxial source/drain regions and a method for its formation are described. In an embodiment, the semiconductor device comprises a gate stack on a substrate. The gate stack is comprised of a gate electrode above a gate dielectric layer and is above a channel region in the substrate. The semiconductor device also comprises a pair of source/drain regions in the substrate on either side of the channel region. The pair of source/drain regions is in direct contact with the gate dielectric layer and the lattice constant of the pair of source/drain regions is different than the lattice constant of the channel region. In one embodiment, the semiconductor device is formed by using a dielectric gate stack placeholder.
US09276108B2	Memory cell array and cell structure thereof A read-only memory (ROM) cell array and a cell structure thereof is disclosed. The ROM cell array is coupled to a plurality rows of bit-lines and a plurality columns of word-lines and comprises: a plurality of sub-cell-arrays arranged along the column direction, each sub-cell-array comprising a plurality of unit cell structures. Each unit cell structure comprises: an cell base region defining a cell boundary, comprising an blanket OD layer having a wide-block profile arranged on a substrate and defining a continuous common source node, a drain pad disposed above the OD layer, arranged in selectively connection with a bit line, a vertical channel structure bridging between the drain pad and the OD layer, and a gate structure disposed vertically between the drain pad and the OD layer and arranged in connection with a word-line. The sub-cell-array boundary is defined entirely within the coverage of the OD layer.
US09276105B2	Silicon carbide semiconductor device A silicon carbide semiconductor device includes an element region and a guard ring region. A semiconductor element is provided in the element region. The guard ring region surrounds the element region in a plan view and has a first conductivity type. The semiconductor element includes a drift region having a second conductivity type different from the first conductivity type. The guard ring region includes a linear region and a curvature region continuously connected to the linear region. A value obtained by dividing a radius of curvature of an inner circumference portion of the curvature region by a thickness of the drift region is not less than 5 and not more than 10. Accordingly, there can be provided a silicon carbide semiconductor device capable of improving a breakdown voltage while suppressing decrease of on-state current.
US09276104B2	High-frequency semiconductor device and method of manufacturing the same A high-frequency semiconductor device, wherein on one surface of a semiconductor substrate, a first insulating layer, an undoped epitaxial polysilicon layer in a state of column crystal, a second insulating layer, and a semiconductor layer are formed in order from a side of the one surface, and a high-frequency transistor is formed in a location of the semiconductor layer facing the undoped epitaxial polysilicon layer with the second insulating layer in between.
US09276099B2	Semiconductor device A semiconductor device of one embodiment, including the semiconductor layer including a III-V group nitride semiconductor; a groove portion formed in the semiconductor layer; the gate insulating film formed at least on a bottom surface of the groove portion, the gate insulating film being a stacked film of a first insulating film and a second insulating film of which dielectric constant is higher than that of the first insulating film; the gate electrode formed on the gate insulating film; and a source electrode and a drain electrode formed on the semiconductor layer across the gate electrode, in which the second insulating film is selectively formed only under the gate electrode.
US09276096B2	Structure of a trench MOS rectifier and method of forming the same A structure of trench MOS rectifier and a method of forming the same are disclosed including a plurality of trenches formed in the n− drift epitaxial layer, a plurality of MOS structure formed on the substrate either in discrete islands or in rows. Asides the MOS gates there are source regions formed under the mesas. A top metal served as an anode is then formed on the resulted front surface connecting the MOS gates and the adjacent source regions.
US09276095B2	Semiconductor device A semiconductor device includes: a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; an insulation film, which is arranged on an inner wall of a recess that extends from an upper surface of the fourth semiconductor region and reaches the second semiconductor region with penetrating the fourth semiconductor region and the third semiconductor region; a control electrode, which is arranged on the insulation film on a side surface of the recess and faces the third semiconductor region; a first main electrode, which is electrically connected to the first semiconductor region, and a second main electrode, which is electrically connected to the fourth semiconductor region, wherein a ratio of a width of the recess to a width of the third semiconductor region contacting the second main electrode is 1 or larger.
US09276089B2	FinFETs and methods for forming the same Methods for forming a semiconductor device and a FinFET device are disclosed. A method comprises forming a dummy gate electrode layer over a substrate, the dummy gate electrode layer having a first height, forming a first etch stop layer on the dummy gate electrode layer, forming a first hard mask layer on the first etch stop layer, and patterning the first hard mask layer. The method further comprises patterning the first etch stop layer to align with the patterned first hard mask layer, and patterning the gate electrode layer to form a dummy gate electrode, the dummy gate electrode aligning with the patterned first etch stop layer, wherein after the patterning the gate electrode layer the first hard mask layer has a vertical sidewall of a second height, the second height being less than the first height, and the first hard mask layer having a rounded top surface.
US09276086B2	Thin film transistor substrate and method of manufacturing the same A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
US09276083B2	Memory elements with stacked pull-up devices Integrated circuits with memory cells are provided. A memory cell may include first and second cross-coupled inverting circuits configured to store a single data bit. The first inverting circuit may have an output serving as a first data storage node for the memory cell, whereas the second inverting circuit may have an output serving as a second data storage node for the memory cell. Access transistors may be coupled between the first and second data storage nodes and corresponding data lines. Each of the first and second inverting circuit may have a pull-down transistor and at least two pull-up transistors stacked in series. The pull-down transistors may have body terminals that are reverse biased to help reduce leakage current through the first and second inverting circuits. The memory cell may be formed using a narrower two-gate configuration or a wider four-gate configuration.
US09276081B2	Methods of forming diodes Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
US09276080B2	Methods and structures of integrated MEMS-CMOS devices A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
US09276078B2	Thin film transistor and display substrate having the same A display substrate includes a base substrate, a semiconductor active layer disposed on the base substrate, a gate insulating layer disposed on the semiconductor active layer, a first conductive pattern group disposed on the gate insulating layer and including at least a gate electrode, a second conductive pattern group insulated from the first conductive pattern group and including at least a source electrode, a drain electrode, and a data pad. The second conductive pattern group includes a first conductive layer and a second conductive layer disposed on the first conductive layer to prevent the first conductive layer from being corroded and oxidized.
US09276077B2	Contact metallurgy for self-aligned high electron mobility transistor A metallization scheme employing a first refractory metal barrier layer, a Group IIIA element layer, a second refractory metal barrier layer, and an oxidation-resistant metallic layer is employed to form a source region and a drain region that provide electrical contacts to a compound semiconductor material layer. The first and second refractory metal barrier layer are free of nitrogen, and thus, do not introduce additional nitrogen into the compound semiconductor layer, while allowing diffusion of the Group IIIA element to form locally doped regions underneath the source region and the drain region. Ohmic contacts may be formed at a temperature as low as about 500° C. This enables fabrication of FET whose source and drain are self-aligned to the gate.
US09276076B2	Semiconductor device According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a first control electrode, a first electrode, a second control electrode, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, and a first insulating film. The first control electrode is provided on or above the first semiconductor region. The first electrode is provided on the first control electrode. The second control electrode is provided on or above the first semiconductor region and includes a first portion which is beside the first control electrode and a second portion which is provided on the first portion and beside the first electrode. The second semiconductor region is provided on the first semiconductor region. A boundary between the first semiconductor region and the second semiconductor region is above the lower end of the first electrode.
US09276073B2	Nanowire and planar transistors co-integrated on utbox SOI substrate Fabrication of a microelectronic device on a semiconductor on insulator type substrate, the device being provided with a transistor of a given type, the channel structure of which is formed from semiconducting bar(s), a dielectric area different from the insulating layer of the substrate being provided to replace the insulating layer, facing the transistor channel structure, specifically for this given type of transistor.
US09276070B2	Semiconductor structures including stacks of indium gallium nitride layers Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.
US09276069B2	Protective interface in silicon carbide semiconductor devices Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon carbide (SiC) device includes forming a thin layer of a protection material over a SiC substrate, in which the protection material has a lattice constant that substantially matches a lattice constant of SiC and the thin layer has a thickness of less than a critical layer thickness for the protection material over SiC to form a uniform interface between the protection material and SiC, forming a layer of an insulator material over the thin layer of the protection material, and forming one or more transistor structures over the insulator material.
US09276068B2	Manufacturing method of silicon carbide semiconductor device A silicon oxide film is formed on an epitaxial layer by dry thermal oxidation, an ohmic electrode is formed on a back surface of a SiC substrate, an ohmic junction is formed between the ohmic electrode and the back surface of the SiC substrate by annealing the SiC substrate, the silicon oxide film is removed, and a Schottky electrode is formed on the epitaxial layer. Then, a sintering treatment is performed to form a Schottky junction between the Schottky electrode and the epitaxial layer.
US09276067B2	SiC semiconductor device and manufacturing method thereof An SiC semiconductor device having a p-type 4H—SiC region formed on a part of a surface portion of an SiC substrate, a defect reduction layer formed in a surface portion of the 4H—SiC region, the defect reduction layer having C defect density <1015 cm−3 by introduction of carbon, a thickness of the defect reduction layer being equal to or less than 5 nm from a surface of the SiC substrate, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film.
US09276065B2	Semiconductor device and method of manufacturing the same Provided is a semiconductor device formed with a trench portion for providing a concave portion in a gate width direction and with a gate electrode provided within and on a top surface of the trench portion via a gate insulating film. At least a part of a surface of each of the source region and the drain region is made lower than other parts of the surface by removing a thick oxide film formed in the vicinity of the gate electrode. Making lower the part of the surface of each of the source region and the drain region allows current flowing through a top surface of the concave portion of the gate electrode at high concentration to flow uniformly through the entire trench portion, which increase an effective gate width of the concave portion formed so as to have a varying depth in a gate width direction.
US09276064B1	Fabricating stacked nanowire, field-effect transistors Methods are presented for facilitating fabricating stacked nanowire, field-effect transistors. The methods include: forming a cut mask spacer on a gate structure disposed above multiple layers above a substrate structure, the gate structure including a sidewall spacer along its sidewalls, and the cut mask spacer overlying the sidewall spacer; defining a stack structure by cutting through the multiple layers using the cut mask spacer and gate structure as a mask, and selectively etching at least one layer of the multiple layers to undercut, in part, the mask, where at least one other layer of the multiple layers remains un-etched by the selectively etching; and providing an alignment mask spacer over the gate structure and over end surfaces of the multiple layers below the gate structure, the alignment mask spacer facilitating etching the other layer(s) of the multiple layers to selectively expose, in part, end surfaces of the other layer(s).
US09276063B2	Gold nanostructures and methods of use The invention is drawn to novel nanostructures comprising hollow nanospheres and nanotubes for use as chemical sensors, conduits for fluids, and electronic conductors. The nanostructures can be used in microfluidic devices, for transporting fluids between devices and structures in analytical devices, for conducting electrical currents between devices and structure in analytical devices, and for conducting electrical currents between biological molecules and electronic devices, such as bio-microchips.
US09276059B2	Semiconductor device structures including metal oxide structures Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.
US09276053B2	Display panel, display unit, and electronic apparatus A display panel includes: a plurality of pixels arranged in a display region, the pixels each including an organic EL element; and a plurality of electrically-conductive wiring layers each arranged between the pixels. The organic EL element includes a plurality of layers including a hole injection layer and a light emitting layer, the light emitting layer emitting light by recombination of an electron and a hole. The hole injection layer of the plurality of layers is common to the pixels in the display region and is electrically connected to the electrically-conductive wiring layers.
US09276051B2	Light-emitting element display device A light-emitting element display device includes a substrate, one or a plurality of thin film transistors, a light-emitting element, a first electrode, and a second electrode. The substrate includes an insulating material. The thin film transistors are in each pixel of a display area on the substrate. The light-emitting element emits light by current flow in each pixel. The first electrode is between the substrate and the thin film transistors, and overlaps at least two of the thin film transistors when viewed in plan. The second electrode includes a conducting material, and is arranged across the first electrode from the substrate via an insulating film so as to form a capacitor together with the first electrode.
US09276047B2	Method for manufacturing flexible display device A method for manufacturing a flexible display device includes forming a separation layer on a carrier substrate, laminating a flexible substrate having an area that is larger than an area of the separation layer, to the separation layer; forming a dummy pattern on and along an edge of the flexible substrate; exposing a portion of the separation layer by removing a portion of the flexible substrate at a side of the flexible substrate; and separating the separation layer and the flexible substrate from each other.
US09276046B2	Color display device structure The invention provides a color display device structure, including a substrate (1), an anode (21), a thin film transistor array (23), a hole injection layer (24), a hole transport layer (25), a light emitting layer (26), an electron transport layer (27), a cathode (28), a cover plate (3), a color conversion layer (4) formed on the inner side of the cover plate (3), and a sealant (6). The light emitting layer (26) is a blue and green light emitting layer (26). The color conversion layer (4) includes a blue filter unit (41), a green filter unit (43) and a red conversion unit (45) separated one another. The blue light and the green light emitted by the blue and green light emitting layer (26) is filtered to become blue light by the blue filter unit (41). The blue light and the green light emitted by the blue and green light emitting layer (26) is filtered to become green light by the green filter unit (43). The blue light and the green light emitted by the blue and green light emitting layer (26) is converted to red light by the red conversion unit (45). The color display is achieved by the color display device structure. The color display device structure is manufactured by a simple production process, and has the features of high color purity, good emitting efficiency, high stability, ultra-thin, and so on.
US09276039B2	Semiconductor storage device and method of manufacturing the same The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.
US09276037B2	Semiconductor device, display device, and electronic device A display device includes a load, a transistor for controlling a current value supplied to the load, a capacitor, a first wiring, a second wiring, and first to fourth switches. Variations in the current value caused by variations in the threshold voltage of the transistor can be suppressed through the steps of: (1) holding the threshold voltage of the transistor in the storage capacitor, (2) inputting a potential in accordance with a video signal, and (3) holding a voltage that is the sum of the threshold voltage and the potential in accordance with the video signal, in the storage capacitor. Accordingly, a desired current can be supplied to the load such as a light emitting element.
US09276035B2	Solid-state imaging device and manufacturing method of solid-state imaging device A light receiving layer is formed with an array of photodiodes for accumulating signal charge produced by photoelectric conversion of incident light. A wiring layer provided with electrodes and wiring for controlling the photodiodes is formed behind the light receiving layer in a traveling direction of the incident light. In the light receiving layer, there is formed a projection and depression structure in which a pair of inclined surfaces have symmetric inclination directions and each inclined surface corresponds to each photodiode. Each inclined surface makes the incident light enter each photodiode by a light amount corresponding to an incident angle.
US09276034B2	Grid topography for patterned semiconductor coating that minimizes optical scatter and obscuration A surveillance device includes an electronic component and a protective surface outwardly of the electronic component. A generally transparent substrate is formed from a first material. Spaced portions of an electrically conductive coating are formed within channels in the substrate. The electrically conductive material is a semiconductor material. A method is also disclosed.
US09276028B2	Semiconductor device including pixels, microlenses, and a monitoring structure, and a method of manufacturing the same A semiconductor device includes a microlens provided in a pixel area and a monitoring structure provided in a peripheral area that is separate from the pixel area. The monitoring structure has a shape correlated with a shape of the microlens. A shape of a section of the monitoring structure in a plane perpendicular to a substrate is constant.
US09276027B2	Solid-state image sensor and camera An image sensor including a first semiconductor region of a first conductivity type that is arranged in a substrate, a second semiconductor region of a second conductivity type that is arranged in the first semiconductor region to form a charge accumulation region. The second semiconductor region includes a plurality of portions arranged in a direction along a surface of the substrate. A potential barrier is formed between the plurality of portions. The second semiconductor region is wholly depleted by expansion of a depletion region from the first semiconductor region to the second semiconductor region. A finally-depleted portion to be finally depleted, of the second semiconductor region, is depleted by the expansion of the depletion region from a portion of the first semiconductor region, located in a lateral direction of the finally-depleted portion.
US09276026B1	Image sensor and manufacturing method thereof A manufacturing method of an image sensor is provided. A substrate is provided, and the substrate includes a pixel array region. A plurality of openings is formed in the pixel array region of the substrate. A light guide region is formed in the substrate aside each of the openings, wherein a portion of the substrate is disposed between the light guide region and the opening, and the depth of the light guide region in the substrate is greater than the depth of the opening aside the light guide region in the substrate. Isolation structures are formed in the openings to define a plurality of pixel regions respectively located between two adjacent isolation structures in the pixel array region. A photosensitive region is formed in each of the pixel regions of the substrate. A conductive line layer is formed on each of the pixel regions of the substrate.
US09276021B2	Electronic device including current sources and amplifiers An electronic device according to one or more embodiments of the invention comprises a plurality of first output lines and a plurality of current to voltage convertors. Current signals from a plurality of signal sources are output to the first output lines. Each of the current to voltage convertors are electrically connected to a corresponding one of the first output lines. The current to voltage convertor includes a first amplification unit. An offset reduction unit in a subsequent stage of the current to voltage convertor is provided for each of the first output lines.
US09276018B2	Display device A display device in which the current load of wirings are distributed and display variations due to voltage drop are suppressed. An active matrix display device of the invention comprises a first current input terminal, a second current input terminal, and a plurality of current supply lines extending parallel to each other. Each current supply line is connected to a plurality of driving transistors in a line. One end of each current supply line is connected to the first current input terminal via a first wiring intersecting with the current supply lines, and the other end thereof is connected to the second current input terminal via a second wiring intersecting with the current supply lines. Accordingly, a current is supplied to each current supply line from both the first and the second current input terminals. The first and the second current input terminals are provided separately from each other.
US09276016B2	Array substrate including oxide thin film transistor and method of fabricating the same An array substrate including: a gate barrier layer on a substrate; a gate line on the gate barrier layer, the gate line having a gate open portion exposing the gate barrier layer in a gate electrode region; a gate insulating layer on the gate line; an active layer on the gate insulating layer over the gate barrier layer in the gate electrode region; and source and drain electrodes spaced apart from each other on the active layer.
US09276013B1	Integrated formation of Si and SiGe fins A method of fabricating silicon (Si) and silicon germanium (SiGe) fins is described. The method includes forming at least two Si fins on a buried oxide (BOX) layer disposed on a substrate, at least one Si fin being formed in a first region and at least one Si fin being formed in a second region, the at least one Si fin in the second region being thinner than the at least one Si fin in the first region. The method also includes depositing an oxide mask over the first region, epitaxially growing an SiGe layer on the at least one Si fin in the second region, and performing a thermal annealing process to drive Ge from the SiGe layer into the at least one Si fin in the second region to form at least one SiGe fin in the second region.
US09276011B2	Cell pillar structures and integrated flows Various embodiments comprise apparatuses and methods, such as a memory stack having a continuous cell pillar. In various embodiments, the apparatus includes a source material, a buffer material, a select gate drain (SGD), and a memory stack arranged between the source material and the SGD. The memory stack comprises alternating levels of conductor materials and dielectric materials. A continuous channel-fill material forms a cell pillar that is continuous from the source material to at least a level corresponding to the SGD.
US09275993B2	Semiconductor device and method for fabricating the same A semiconductor device includes a first interface film on a first area of a substrate, the first interface film including a first growth interface film and a second growth interface film on a lower portion of the first growth interface film, a first dielectric film on the first interface film, and a first gate electrode on the first dielectric film.
US09275988B2	Schottky diodes for replacement metal gate integrated circuits An integrated circuit and method with a metal gate transistor and with a Schottky diode where the metal used to form the Schottky diode is the metal used to form the metal gate.
US09275984B2	Multi-chip package system A multi-chip package system includes a signal transmission line commonly coupled to a plurality of semiconductor chips to transfer data to/from the semiconductor chips from/to outside; and a termination controller suitable for detecting a loading value of the signal transmission line and controlling a termination operation on the signal transmission line based on the loading value.
US09275981B2	Structure and method for forming integral nitride light sensors on silicon substrates A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
US09275980B2	Method for embedding a LED network The invention relates to a method for embedding a non-embedded or bare LED network. To this end, the method of embedding a non-embedded LED network comprises the steps of: •(a) providing said non-embedded LED network associated with a continuous flexible support; •(b) applying in a continuous manner a flexible insulation layer on a liquid basis onto said non-embedded LED network associated with said continuous flexible support.
US09275978B2	Three-terminal printed devices interconnected as circuits A layer of microscopic, 3-terminal transistors is printed over a first conductor layer so that bottom electrodes of the transistors electrically contact the first conductor layer. A first dielectric layer overlies the first conductor layer, and a second conductor layer over the first dielectric layer contacts intermediate electrodes on the transistors between the bottom electrodes and top electrodes. A second dielectric layer overlies the second conductor layer, and a third conductor layer over the second dielectric layer contacts the top electrodes. The devices are thus electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. Separate groups of the devices may be interconnected to form more complex circuits. The resulting circuit may be a very thin flex-circuit.
US09275973B2	Electronic device and method for fabricating an electronic device An embodiment electronic device comprises a semiconductor chip including a first main face, a second main face and side faces each connecting the first main face to the second main face. A metal layer is disposed above the second main face and the side faces, the metal layer including a porous structure.
US09275971B2	Bridge interconnect with air gap in package assembly Embodiments of the present disclosure are directed towards techniques and configurations for a bridge interconnect assembly that can be embedded in a package assembly. In one embodiment, a package assembly includes a package substrate configured to route electrical signals between a first die and a second die and a bridge embedded in the package substrate and configured to route the electrical signals between the first die and the second die, the bridge including a bridge substrate, one or more through-hole vias (THVs) formed through the bridge substrate, and one or more traces disposed on a surface of the bridge substrate to route the electrical signals between the first die and the second die. Routing features including traces and a ground plane of the bridge interconnect assembly may be separated by an air gap. Other embodiments may be described and/or claimed.
US09275969B2	Optical interconnect on bumpless build-up layer package This disclosure relates generally to an electronic package that can include a die and a dielectric layer at least partially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the dielectric layer. An optical emitter can be electrically coupled to the die with a first one of the electrical interconnects and configured to emit light from a first major surface of the electronic package. A solder bump can be electrically coupled to the die with a second one of the electrical interconnects and positioned on a second major surface of the electronic package different from the first major surface.
US09275968B2	Flip chip packages having chip fixing structures, electronic systems including the same, and memory cards including the same A flip chip package includes a chip having a surface, main bumps disposed on a first region of the surface of the chip, dummy bumps disposed on a second region of the surface of the chip, a substrate having a surface, dams disposed on the surface of the substrate, connection pads disposed on the surface of the substrate and electrically connected to respective ones of the main bumps, and adhesion patterns attaching the dummy bumps to respective ones of the dams.
US09275967B2	Protrusion bump pads for bond-on-trace processing A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.
US09275966B2	Semiconductor device apparatus and assembly with opposite die orientations An electronic apparatus includes a base substrate, the base substrate including an interconnect. The electronic apparatus further includes a first die including a first semiconductor device, the first semiconductor device being coupled to the interconnect, and further includes a second die including a second semiconductor device, the second semiconductor device being coupled to the interconnect. The first and second die are attached to the base substrate in opposite orientations.
US09275962B2	Probe pad with indentation An integrated electronic circuit having probe indentations filled by a hard covering substance. The integrated circuit device results from a process of manufacture including forming a substrate comprising a plurality of functional components of the electronic circuit, creating a plurality of conductive layers on such substrate to form an electric contact region with high hardness equal to or greater than a first hardness value of about 300 HV, contacting the electric contact region with a probe thereby causing an indentation. In an embodiment, the process further comprises, after the test run, creating a covering conductive layer on at least one part of the electric contact region contacted by the probe to fill the indentation.
US09275958B2	Chip package and method for forming the same An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a first recess extending from the first surface towards the second surface; a second recess extending from a bottom of the first recess towards the second surface, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the second recess together form an exterior side surface of the semiconductor substrate; a wire layer disposed over the first surface and extending into the first recess and/or the second recess; an insulating layer positioned between the wire layer and the semiconductor substrate; and a metal light shielding layer disposed over the first surface and having at least one hole, wherein a shape of the at least one hole is a quadrangle.
US09275953B2	Semiconductor integrated circuit and fabricating the same A semiconductor integrated circuit (IC) with a dielectric matrix is disclosed. The dielectric matrix is located between two conductive features. The matrix includes a first nano-scale dielectric block, a second nano-scale dielectric block, and a first nano-air-gap formed by a space between the first nano-scale dielectric block and the second nano-scale dielectric block. The matrix also includes third nano-scale dielectric block and a second nano-air-gap formed by a space between the second nano-scale dielectric block and the third nano-scale dielectric block. The nano-scale dielectric blocks share a first common width, and the nano-air-gaps share a second common width. An interconnect structure integrates the dielectric matrix with the conductive features.
US09275948B2	Integrated circuit having stress tuning layer Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.
US09275945B2	Method of manufacturing semiconductor device and semiconductor device Reliability of a semiconductor device is improved. A method of manufacturing a semiconductor device includes a step of arranging a plurality of semiconductor chips next to each other over a chip mounting surface of a die pad. Further, the method of manufacturing a semiconductor device includes a step of electrically coupling the semiconductor chip and the semiconductor chip via a wire. In this regard, a pad (chip-to-chip connection pad) of the semiconductor chip on a second bonding side in the step of coupling the wire is provided such that it is distantly located from a peripheral portion of a surface of the semiconductor chip.
US09275944B2	Semiconductor package with multi-level die block A semiconductor package includes a block having a first side, a second side opposite the first side and a recessed region extending from the second side toward the first side so that the block has a thinner part in the recessed region and a thicker part outside the recessed region. The semiconductor package further includes a first semiconductor die and a second semiconductor die each having opposing first and second sides. The first semiconductor die is disposed in the recessed region of the block and attached to the thinner part of the block at the first side of the first semiconductor die. The second semiconductor die is attached to the second side of the first semiconductor die at a first side of the second semiconductor die.
US09275943B2	Power device having reduced thickness An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with the chip. The heat-sink includes a plate having a first thickness. A recess is provided in the plate that defines a central portion of the plate having a second thickness less than the first thickness. The chip is mounted to the central region of the heat-sink within the recess. The insulating body includes a surface, such as a mounting surface, including an opening exposing at least a portion of the heat-sink. The device may further include a reophore extending through a side surface of the insulating body, that reophore being in contact with the heat sink.
US09275941B2	Quad flat no lead package and production method thereof The present invention discloses a quad flat no lead package and a production method thereof. The quad flat no lead package comprises a lead frame carrier consisting of a carrier pit and three circles of leads arranged around the carrier pit, wherein the three circles of leads respectively consist of a plurality of leads that are disconnected mutually; an IC chip is adhered in the carrier pit; and an inner lead chemical nickel and porpezite plated layer is plated on all the leads; the inner lead chemical nickel and porpezite plated layer is arranged in the same direction as the IC chip; the IC chip is connected with the inner lead chemical nickel and porpezite plated layer through a bonding wire; and the IC chip, the ends of all the leads plated with the inner lead chemical plating nickel and palladium metal layers and the bonding wire are all packaged in a plastic package. The quad flat no lead package is manufactured through the following steps of: thinning and scribing a wafer; manufacturing a lead frame; loading the chip; performing pressure welding and plastic packaging; performing post-curing; printing; electroplating; separating the leads; separating a product; and testing/braiding. According to the package, the problems of few leads, long welding wire, high welding cost and limited frequency application during single-face packaging of the existing normal quad flat no lead package are solved.
US09275940B2	Semiconductor device and manufacturing method thereof A semiconductor device is provided which complies with restrictions on layout on a mounting substrate side. The semiconductor device includes a wiring substrate having a plurality of bonding leads at an upper surface having a rectangular shape, a semiconductor chip mounted over the upper surface of the wiring substrate, and having a plurality of electrode pads at a main surface having a rectangular shape similar to a square shape, and a plurality of metal wires for coupling the bonding leads of the wiring substrate to the electrode pads of the semiconductor chip. In a BGA, the metal wires are arranged at three sides of a main surface of the semiconductor chip, the bonding leads are provided in lines at the upper surface of the wiring substrate outside the respective opposed short sides of the main surface of the semiconductor chip, and the metal wires are coupled to the bonding leads.
US09275938B1	Low profile high temperature double sided flip chip power packaging A wire bondless, double flip chipped discrete power package including a base plate for structural support, heat spreading, and thermal connection, power substrate for electrical interconnection and isolation, lead frames for external connections, an upper substrate for topside electrical interconnection, and injection molded housing for mounting, isolation, and protection.
US09275937B2	Semiconductor device with damascene bit line and method for fabricating the same A semiconductor device includes a substrate having a plurality of contact surfaces, an interlayer dielectric layer formed over the substrate and having a first open portion which exposes a part of the contact surfaces and a second open portion which exposes the other contact surfaces, a storage node contact (SNC) plug filling the first open portion, and a damascene structure filing the second open portion and including a bit line, a spacer formed on both sidewalls of the bit line, a capping layer formed over the bit line and the spacer, and an air gap formed between the bit line and the spacer. The bit line includes a conductive material of which the volume is contracted by a heat treatment to form the air gap.
US09275936B2	BEOL structures incorporating active devices and mechanical strength A method of fabricating a monolithic integrated circuit using a single substrate, the method including forming a first semiconductor layer from a substrate, fabricating semiconductor devices on the substrate, fabricating at least one metal wiring layer on the semiconductor devices, forming at least one dielectric layer in integral contact with the at least one metal wiring layer, forming contact openings through the at least one dielectric layer to expose regions of the at least one metal wiring layer, integrally forming, from the substrate, a second semiconductor layer on the dielectric layer, and in contact with the at least one metal wiring layer through the contact openings, and forming a plurality of non-linear semiconductor devices in said second semiconductor layer.
US09275935B2	Semiconductor device and method of manufacturing the same Technology that achieves high integration of a semiconductor device employing TSV technology is provided. A through electrode is configured by a small-diameter through electrode having a first diameter and being formed on a main surface side of a semiconductor wafer, and a large-diameter through electrode having a second diameter larger than the above-described first diameter and being formed on a back surface side of the semiconductor wafer, and the small-diameter through electrode is arranged inside the large-diameter through electrode in a planar view so that a center position of the small-diameter through electrode and a center position of the large-diameter through electrode do not overlap with each other in the planar view.
US09275934B2	Through-package-via (TPV) structures on inorganic interposer and methods for fabricating same Aspects of the present disclosure generally relate to a microelectronic package including a plurality of through vias having walls in a glass interposer having a top portion and a bottom portion. The microelectric package may also include a stress relief barrier on at least a portion of the top and bottom portions of the glass interposer. The microelectric package may further include a metallization seed layer on at least a portion of the stress relief layer and a conductor on at least a portion of the metallization seed layer. The conductor extends through at least a portion of the plurality of the through vias, forming a plurality of metalized through package vias. At least a portion of the through vias are filled with the stress relief layer or the metallization seed layer.
US09275933B2	Semiconductor device A semiconductor device includes a substrate; an inter layer dielectric disposed on the substrate; a TSV penetrating the substrate and the ILD. In addition, a plurality of shallow trench isolations (STI) is disposed in the substrate, and a shield ring is disposed in the ILD surrounding the TSV on the STI. During the process of forming the TSV, the contact ring can protect adjacent components from metal contamination.
US09275932B2	Active matrix substrate, and display device An active matrix substrate (5) provided with a plurality of scan lines (G) and a plurality of data lines (Sr, Sg, Sb) arranged in a matrix, in which first, second, and third short bars (31r, 31b, 31g) are connected to the respective data lines (Sr, Sg, Sb), and, among the first, second, and third short bars, the second short bar (31b) in the middle is provided in a different layer from the first and third short bars (31r, 31g) which are positioned on the sides of the second short bar (31b).
US09275929B2	Package assembly having a semiconductor substrate Embodiments of the present disclosure provide a method that includes providing a semiconductor substrate comprising a semiconductor material, forming a dielectric layer on the semiconductor substrate, forming an interconnect layer on the dielectric layer, attaching a semiconductor die to the semiconductor substrate, and electrically coupling an active side of the semiconductor die to the interconnect layer, the interconnect layer to route electrical signals of the semiconductor die. Other embodiments may be described and/or claimed.
US09275928B2	Semiconductor package A metallic ring is located on a multilayer ceramic substrate. An optical semiconductor laser is located on the multilayer ceramic substrate, inside the metallic ring. A metallic cap with a window is joined to the metallic ring. The metallic cap covers the optical semiconductor laser. An external heat sink is joined to an external side surface of the metallic cap. These features make it possible to improve high-frequency characteristics, producibility, and heat dissipation.
US09275926B2	Power module with cooling structure on bonding substrate for cooling an attached semiconductor chip According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.
US09275922B2	Semiconductor device, method for manufacturing the same, and electronic device Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.
US09275915B2	Circuit device having a semiconductor component An electrical circuit device includes a semiconductor component which has power terminals and a control terminal electrically insulated from the power terminals, for applying a control voltage, and a control terminal contact surface for contacting the control terminal for measuring the electrical behavior of the semiconductor component. A connection device is provided, via which the control terminal is electrically connectable to a series device, the connection device being transferable from a nonconductive state into a conductive state, in which the control terminal is connected to the series device.
US09275914B2	Coating apparatus and manufacturing method of coated body According to one embodiment, a coating apparatus includes a stage having a mounting surface on which a coating target is mounted, a rotating mechanism that rotates the stage, a coating nozzle that discharges a coating material, a moving mechanism that moves the coating nozzle, a supply device that supplies a material to the coating nozzle, an ejection device that ejects the material, a communication tube that allows the supply device, and a valve device. Further, the coating apparatus includes a control unit which rotates the stage by the rotating mechanism, switches the valve device to achieve the continuity of the supply unit and the coating nozzle, drives the moving mechanism to move the coating nozzle, and applies the coating material to the coating target on the stage.
US09275911B2	Hybrid orientation fin field effect transistor and planar field effect transistor A substrate including a handle substrate, a lower insulator layer, a buried semiconductor layer, an upper insulator layer, and a top semiconductor layer is provided. Semiconductor fins can be formed by patterning a portion of the buried semiconductor layer after removal of the upper insulator layer and the top semiconductor layer in a fin region, while a planar device region is protected by an etch mask. A disposable fill material portion is formed in the fin region, and a shallow trench isolation structure can be formed in the planar device region. The disposable fill material portion is removed, and gate stacks for a planar field effect transistor and a fin field effect transistor can be simultaneously formed. Alternately, disposable gate structures and a planarization dielectric layer can be formed, and replacement gate stacks can be subsequently formed.
US09275910B2	Semiconductor-on-insulator structure and method of fabricating the same Methods for forming a layer of semiconductor material and a semiconductor-on-insulator structure are provided. A substrate including one or more devices or features formed therein is provided. A seed layer is bonded to the substrate, where the seed layer includes a crystalline semiconductor structure. A first portion of the seed layer that is adjacent to an interface between the seed layer and the substrate is amorphized. A second portion of the seed layer that is not adjacent to the interface is not amorphized and maintains the crystalline semiconductor structure. Dopant implantation is performed to form an N-type conductivity region or a P-type conductivity region in the first portion of the seed layer. A solid-phase epitaxial growth process is performed to crystallize the first portion of the seed layer. The SPE growth process uses the crystalline semiconductor structure of the second portion of the seed layer as a crystal template.
US09275909B2	Methods of fabricating semiconductor structures Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
US09275908B2	Semiconductor device including gate channel having adjusted threshold voltage A semiconductor device includes at least one first semiconductor fin formed on an nFET region of a semiconductor device and at least one second semiconductor fin formed on a pFET region. The at least one first semiconductor fin has an nFET channel region interposed between a pair of nFET source/drain regions. The at least one second semiconductor fin has a pFET channel region interposed between a pair of pFET source/drain regions. The an epitaxial liner is formed on only the pFET channel region of the at least one second semiconductor fin such that a first threshold voltage of the nFET channel region is different than a second threshold voltage of the pFET channel.
US09275905B1	Method of forming semiconductor structure with anti-punch through structure A method for manufacturing a semiconductor structure is provided. The method includes implanting a first type of dopants in a first region and a second region and implanting a second type of dopants in the second region. In addition, an un-doped silicon layer is formed over the first and second regions, and a first and a second fin structures are formed. The first fin structure includes a first type of anti-punch through structure implanted with the first type of dopants and a first un-doped silicon structure over the first type of anti-punch through structure, and the second fin structure includes a second type of anti-punch through structure implanted with the second type of dopants and a second un-doped silicon structure formed over the second type of anti-punch through structure.
US09275904B2	Method for fabricating semiconductor device A method for fabricating a semiconductor device, including forming gate patterns over a substrate, forming conductive layer covering top and sidewalls of each gate pattern, forming a metal layer for a silicidation process over the conductive layer, and silicifying the conductive layer and the gate patterns using the metal layer.
US09275901B1	Semiconductor device having reduced contact resistance A semiconductor device including at least one self-aligned contact has at least one gate electrode on a bulk substrate layer of the semiconductor device. A gate cap encapsulates the at least one gate electrode. The semiconductor device further includes at least one contact separated from the at least one gate electrode via a portion of the gate cap. The at least one contact includes a metal portion that directly contacts the gate cap.
US09275898B1	Method to improve selectivity cobalt cap process Methods of forming a Co cap on a Cu interconnect in or through an ULK ILD with improved selectivity while protecting an ULK ILD surface are provided. Embodiments include providing a Cu filled via in an ULK ILD; depositing a Co precursor and H2 over the Cu-filled via and the ULK ILD, the Co precursor and H2 forming a Co cap over the Cu-filled via; depositing an UV cured methyl over the Co cap and the ULK ILD; performing an NH3 plasma treatment after depositing the UV cured methyl; and repeating the steps of depositing a Co precursor through performing an NH3 plasma treatment to remove impurities from the Co cap.
US09275897B2	Semiconductor device and method for fabricating the same An exemplary semiconductor device comprises a through silicon via penetrating a semiconductor substrate including a circuit pattern on one side of the substrate, a first doped layer formed in the other side, and a bump connected with the through silicon via.
US09275896B2	Methods for fabricating integrated circuits using directed self-assembly Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a graphoepitaxy DSA directing confinement well using a sidewall of an etch layer that overlies a semiconductor substrate. The graphoepitaxy DSA directing confinement well is filled with a block copolymer. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The etchable phase is etched while leaving the etch resistant phase substantially in place to define an etch mask with a nanopattern. The nanopattern is transferred to the etch layer.
US09275893B2	Method of detaching a layer The present disclosure concerns a method of detaching a layer to be detached from a donor substrate, comprising the following steps: a) assembling the donor substrate and a porous substrate, b) application of a treatment of chemical modification of the crystallites, the chemical modification being adapted to generate a variation of the volume of the crystallites, the volume variation generates deformation in compression or in tension of the porous substrate, the deformation in compression or in tension generates a stress in tension or in compression in the donor substrate, which causes fracture in a fracture plane, the fracture plane delimiting the layer to be detached, the stress leading to the detachment of the layer to be detached from the donor substrate.
US09275890B2	Methods of forming alignment marks and overlay marks on integrated circuit products employing FinFET devices and the resulting alignment/overlay mark One illustrative method disclosed herein includes forming a plurality of spaced-apart fin structures in a semiconductor substrate, wherein the fin structures define a portion of an alignment/overlay mark trench where at least a portion of an alignment/overlay mark will be formed, forming at least one layer of insulating material that overfills the alignment/overlay mark trench and removing excess portions of the layer of insulating material positioned above an upper surface of the plurality of fins to thereby define at least a portion of the alignment/overlay mark positioned within the alignment/overlay mark trench. A device disclosed herein includes a plurality of spaced-apart fin structures formed in a semiconductor substrate so as to partially define an alignment/overlay mark trench, an alignment/overlay mark consisting only of at least one insulating material positioned within the alignment/overlay mark trench, and a plurality of FinFET semiconductor devices formed in and above the substrate.
US09275887B2	Substrate processing with rapid temperature gradient control A substrate processing chamber comprises an electrostatic chuck comprising a ceramic puck having a substrate receiving surface and an opposing backside surface. In one version, the ceramic puck comprises a thickness of less than 7 mm. An electrode is embedded in the ceramic puck to generate an electrostatic force to hold a substrate, and heater coils in the ceramic puck allow independent control of temperatures at different heating zones of the puck. A chiller provides coolant to coolant channels in a base below the ceramic puck. A controller comprises temperature control instruction sets which set the coolant temperature in the chiller in relation prior to ramping up or down of the power levels applied to the heater.
US09275880B2	Liquid replenishing device The present invention provides a liquid replenishing device comprising a liquid storage tank, a chemical liquid supply pipeline, an ultrapure water supply pipeline, an ultrapure water quantitative supplement pipeline and a circulating pipeline. The chemical liquid supply pipeline supplies chemical liquids to the liquid storage tank. The ultrapure water supply pipeline supplies ultrapure water to the liquid storage tank. The ultrapure water quantitative supplement pipeline quantitatively replenishes ultrapure water to the liquid storage tank. One end of the circulating pipeline is connected with the outlet of the liquid storage tank, the other end of the circulating pipeline is connected with the inlet of the liquid storage tank.
US09275876B2	Stiffener with embedded passive components Systems and methods for preventing warpage of a semiconductor substrate in a semiconductor package. A continuous or uninterrupted stiffener structure is designed with a recessed groove, such that passive components, such as, high density capacitors are housed within the recessed groove. The stiffener structure with the recessed groove is attached to the semiconductor substrate using anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The stiffener structure with the recessed groove surrounds one or more semiconductor devices that may be formed on the semiconductor substrate. The stiffener structure with the recessed groove does not extend beyond horizontal boundaries of the semiconductor substrate.
US09275874B2	Methods for fabricating integrated circuits using chemical mechanical planarization to recess metal Methods for fabricating integrated circuits using chemical mechanical planarization (CMP) for recessing metal are provided. In an embodiment, a method for fabricating an integrated circuit includes filling a trench with a metal and forming an overburden portion of the metal outside of the trench. The method further includes performing a planarization process with an etching slurry to remove the overburden portion of the metal and to recess the metal within the trench.
US09275870B2	Plasma processing method and plasma processing device A plasma processing method for a plasma processing device is provided. The plasma processing device includes a reaction chamber, multiple Radio Frequency (RF) power supplies with different RF frequency outputs apply RF electric fields to the reaction chamber, the output of at least one pulse RF power supply has multiple output states, and the processing method includes a match frequency obtaining step and a pulse processing step. In the match frequency obtaining step, the output state of the pulse RF power supply is switched to make the reaction chamber have multiple impedances to simulate the impedances in the pulse processing step. The output frequencies of the variable frequency RF power supply are adjusted to match the simulated impedances. The adjusted output frequencies are stored as match frequencies. In the subsequent pulse processing step, the fast switched impedances are instantly matched by the stored match frequencies.
US09275862B2	Compensation devices Methods, apparatuses and devices related to the manufacturing of compensation devices are provided. In some cases, an n/p-codoped layer is deposited for calibration purposes to minimize a net doping concentration. In other cases, alternatingly n- and p-doped layers are then deposited. In other embodiments, an n/p-codoped layer is deposited in a trench where n- and p-dopants have different diffusion behavior. To obtain different doping profiles, a heat treatment may be performed.
US09275859B2	Apparatus and method for manufacturing a light-emitting device using a neutral particle beam The present invention relates to an apparatus and method for manufacturing a semiconductor light-emitting device using a neutral particle beam. According to the present invention, since the kinetic energy of the neutral particle beam is provided as a portion of the reaction energy for causing a nitride semiconductor single crystal thin film to be formed on a substrate, and the reaction energy is not provided as heat energy by heating a substrate as in the prior art, the substrate may be treated at a relatively low temperature. Furthermore, elements such as Si, Mg, and the like, which are solid elements required for doping are sprayed onto the substrate from a source which generates solid elements for doping together with the neutral particle beam to achieve high doping efficiency at a lower temperature. According to the present invention, since the substrate is treated at a low temperature, the degradation of the substrate and thin film may be prevented, and the undesired diffusion of the doping elements may be prevented to enable the manufacture of the semiconductor light-emitting device having superior light-emitting properties in a relatively easy manner.
US09275858B2	Semiconductor device and manufacturing method thereof A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.
US09275853B2	Method of adjusting a transistor gate flat band voltage with addition of AL203 on nitrided silicon channel Embodiments of the disclosure generally relate to methods of adjusting transistor flat band voltage, and transistor gates formed using the same. In one embodiment, a method sequentially includes cleaning a substrate, annealing the substrate in a nitrogen-containing environment to form silicon-nitrogen bonds, hydroxylating the substrate surface, and depositing a hafnium oxide layer over the substrate. In another embodiment, the method further includes depositing an aluminum oxide layer over the substrate prior to depositing the hafnium oxide layer, and then annealing the substrate.
US09275846B2	Light source device and filament A light source device comprising a filament showing high electric power-to-visible light conversion efficiency is provided. A light source device comprising a translucent gastight container, a filament disposed in the translucent gastight container, and a lead wire for supplying an electric current to the filament is provided. The filament comprises a substrate formed from a metal material and a visible light reflectance-reducing film coating the substrate for reducing visible light reflectance of the substrate. The reflectance of the substrate for visible lights is thereby made low, and the reflectance of the substrate for infrared lights is thereby made high. Therefore, radiation of infrared lights is suppressed, and visible luminous efficiency can be enhanced.
US09275845B2	Ceramic metal halide lamp having dysprosium iodide A ceramic metal-halide lamp is provided that can improve both lamp efficacy and color characteristics, and in which light color shift from the white region can be prevented when the lamp is dimmed. The lamp includes a luminous material, which contains sodium iodide (NaI), cerium iodide (CeI3), thallium iodide (TIl), dysprosium iodide (DyI3) and indium iodide (InI). The amount D[DyI3] of dysprosium iodide DyI3 is selected so as to fall within a range of 0.07 mg/cm3≦D[DyI3]≦1.53 mg/cm3 and a weight ratio R[InI/TIl] of indium iodide InI relative to thallium iodide TIl contained in the luminous material is selected to so as to fall within a range of 0
US09275843B2	Time-of-flight mass spectrometer An electrostatic lens (3), including five cylindrical electrodes (31-35) arrayed along an ion-optical axis (C) and an aperture plate (38) located on a common focal plane of two virtual convex lenses (L1 and L2) formed under an afocal condition, is used as an ion-injecting optical system for sending ions into an orthogonal acceleration unit. The diameter of a restriction aperture (39) formed in the aperture plate (38) determines the angular spread of an exit ion beam. When voltages for making the electrostatic lens (3) function as an afocal system are set, a measurement with high mass-resolving power can be performed at a slight sacrifice of the sensitivity. When voltages for making the lens function as a non-afocal system having the highest ion-passage efficiency are set, a measurement with high sensitivity can be performed at a slight sacrifice of the resolving power.
US09275842B2	Multi-dopant permeation tube Aspects and embodiments of the present invention are directed to spectrometry systems and for apparatus and methods for delivering dopants to same. In one example, there is provided a dopant delivery device configured to supply dopants to a spectrometry system comprising a tube including a first chamber and a second chamber, a first dopant source included in the first chamber, and a second dopant source included in the second chamber.
US09275838B2	Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof An arrangement for controlling bevel etch rate during plasma processing within a processing chamber. The arrangement includes a power source and a gas distribution system. The arrangement also includes a lower electrode, which is configured at least for supporting a substrate. The arrangement further includes a top ring electrode positioned above the substrate and a bottom ring electrode positioned below the substrate. The arrangement yet also includes a first match arrangement coupled to the top ring electrode and configured at least for controlling current flowing through the top ring electrode to control amount of plasma available for etching at least a part of the substrate top edge. The arrangement yet further includes a second match arrangement configured to control the current flowing through the bottom ring electrode to control amount of plasma available for at least etching at least a part of the substrate bottom edge.
US09275834B1	Selective titanium nitride etch A method of removing titanium nitride is described. The silicon nitride resides on a patterned substrate. The titanium nitride is removed with a gas-phase etch using plasma effluents formed in a remote plasma from a fluorine-containing precursor, a nitrogen-and-hydrogen-containing precursor and an oxygen-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride.
US09275831B2	Method for S/TEM sample analysis An improved method and apparatus for S/TEM sample preparation and analysis. Preferred embodiments of the present invention provide improved methods for TEM sample creation, especially for small geometry (<100 nm thick) TEM lamellae. Preferred embodiments of the present invention also provide an in-line process for S/TEM based metrology on objects such as integrated circuits or other structures fabricated on semiconductor wafer by providing methods to partially or fully automate TEM sample creation, to make the process of creating and analyzing TEM samples less labor intensive, and to increase throughput and reproducibility of TEM analysis.
US09275826B2	Microscopy support structures Electron microscope support structures and methods of making and using same. The support structures are generally constructed using semiconductor materials and semiconductor manufacturing processes. The temperature of the support structure may be controlled and/or gases or liquids may be confined in the observation region for reactions and/or imaging.
US09275825B2	Sample holder for electron microscopy for low-current, low-noise analysis A novel specimen holder for insertion in electron microscopes, wherein the novel specimen holder is designed to minimize electrical noise so that signal integrity can be maintained during in situ electron microscopy.
US09275820B2	Gas coupled arc chamber cooling An ion implantation system, having a temperature controlled ion source chamber is disclosed. The temperature of the ion source chamber is regulated by disposing a heat sink in proximity to the ion source chamber. A gas fillable chamber is disposed between and in physical communication with both the ion source chamber and the heat sink. By controlling the amount of gas, i.e. the gas pressure, within the gas fillable chamber, the coefficient of heat transfer can be manipulated. This allows the temperature of the ion source chamber to be controlled through the application or removal of gas from the gas fillable chamber. This independent temperature control decouples the power used to heat the ion generator from the ion species that are ultimately generated.
US09275818B1	Method of making and use of an automatic system to increase the operating life of vacuum tubes with a vacuum tube device A vacuum tube optimization circuit can automatically ensuring that the preheating required for the thermionic effect to occur within the vacuum tubes within a vacuum tube device, has been sufficient to allow the vacuum tubes to reach their operating temperatures, before allowing signal voltage or current to be applied to their anodes, cathodes, and/or other thermionically-active components. This reduces the diffusion of component-specific surface material coatings onto the surfaces of other internal elements within the vacuum tube, functioning to extend the service life of the vacuum tubes.
US09275814B2	Magnetic contactor Disclosed is a magnetic contactor. The magnetic contactor includes a frame, a holder, a movable core, a bobbin, a fixed core coupled to a side of the bobbin and configured to absorb the movable core with a magnetic force, an elastic member provided between the holder and the bobbin, a b-contact switch configured to sense a closing completion time of the movable contact by using a mechanical mechanism relationship with the movable core, an electronic circuit part configured to receive a sensing signal from the b-contact switch and limit a current applied to the coil, and a switch manipulation member provided at one end of the movable core and configured to operate the b-contact switch.
US09275812B2	Switch A movable contact for a rotary switch is provided. The movable contact includes first and second contacts for contacting a stationary contact, where the first and second contacts are arranged at a distance from each other for receiving the stationary contact between the first and second contacts. The first contact is a straight contact blade for contacting stationary contacts at both ends of the blade. The second contact is a spring element configured to bend when the stationary contact is placed between the first contact and the second contact, and to cause a pressing force to the stationary contact to press the stationary contact against the first contact after the stationary contact has been placed between the first contact and the second contact.
US09275811B2	Switching unit for an electrical switching device and electrical switching device A switching unit includes a pawl and a pawl spring, embodied such that, when a switching lever of the switching unit is moved from an ON position into a TRIP position and/or from the TRIP position into a RESET position, the pawl spring is bent by contact with a lateral face of the pawl. An electrical switching device, such as a circuit breaker, including at least one such switching unit is also disclosed.
US09275806B2	Electrical switching apparatus, and trip assembly and lever member therefor A lever member is for a trip assembly of an electrical switching apparatus. The electrical switching apparatus includes a housing, a signaling mechanism, separable contacts, and an operating mechanism structured to open and close the separable contacts. The trip assembly includes a mounting assembly disposed on the housing and a drive assembly. The drive assembly includes an actuator coupled to the mounting assembly and a plunger disposed on the mounting assembly and being cooperable with the operating mechanism. The lever member includes: a pivot portion structured to engage the mounting assembly; a first arm portion structured to engage the plunger; and a second arm portion disposed between the pivot portion and the first arm portion, the second arm portion being structured to engage the actuator.
US09275805B2	Switching unit for an electrical switching device A switching unit for an electrical switching device, in particular an electrical circuit breaker, is disclosed. The switching unit includes a switching lock with a switching mechanism and a rotor housing with a contact arm disposed therein for opening and closing contacts during a rotation of the rotor housing about a rotation axis. In an embodiment, at least one lever apparatus is functionally connected at its upper end by way of the switching mechanism and at its lower end by way of a connecting pin to a face of the rotor housing.
US09275804B2	Ceramic electronic component and method for producing the same A ceramic electronic component includes a ceramic body, a glass coating layer, and an electrode terminal. The ceramic body includes a plurality of internal electrodes whose ends are exposed on the surface of the ceramic body. The glass coating layer covers a portion of the ceramic body on which the internal electrodes are exposed. The electrode terminal is provided directly on the glass coating layer. The electrode terminal includes a plating film. The glass coating layer is made of a glass medium in which metal powder particles are dispersed. The metal powder particles define conduction paths that electrically connect the internal electrodes with the electrode terminal.
US09275800B2	Method of nano-patterning a foil surce A method for patterning a metal substrate includes a series of surface treatments to control tunnel initiation at a micron or sub-micron level. In particular, the series of surface treatments include forming a hydration layer which acts as a mask while etching the surface of the metal substrate. The hydration layer mask enables control of the tunnel initiation on a micron or sub-micron level because the etching does not undercut the interface between the metal substrate and the hydration layer. As a result, the tunnels can be initiated in an orthogonal direction and closer together, thereby increasing the tunnel density.
US09275795B2	Corrosion-resistant magnet and method for producing the same An object of the present invention is to provide an R—Fe—B based sintered magnet having on a surface thereof a chemical conversion film with higher corrosion resistance than a conventional chemical conversion film such as a phosphate film, and a method for producing the same. The corrosion-resistant magnet of the present invention as a means for achieving the object is characterized by comprising a chemical conversion film containing at least Zr, Nd, fluorine, and oxygen as constituent elements and not containing phosphorus directly on a surface of an R—Fe—B based sintered magnet, wherein R is a rare-earth element including at least Nd.
US09275793B2	Current input converter According to one embodiment, a current input converter includes a first metal plate having a solid shape, which has one end attached to the terminal table and one other end attached to one end of a primary-side coil of the transformer, and connects the terminal table and the one end of the primary-side coil of the transformer to each other, and a second metal plate having a solid shape, which has one end attached to the terminal table and one other end attached to one other end of the primary-side coil of the transformer, and connects the terminal table and the other end of the primary-side coil of the transformer to each other.
US09275791B2	Systems and methods for decoupling multiple wireless charging transmitters This disclosure provides systems, methods and apparatus for decoupling multiple wireless charging transmitters. In one aspect, a device is configured to transmit wireless power to a first receiver. The device includes a first driver coil and a second driver coil. The device further includes a common reactance element connected to the first driver coil and the second driver coil. The reactance element is configured to at least partially cancel mutual inductance between the first driver coil and the second driver coil.
US09275788B2	Control transformer The invention relates to a control transformer that is designed as a phase-shifting transformer, wherein semiconductor switching components are provided for each phase at a regulating winding with several partial windings. According to the invention, an additional connecting line with an additional electronic switching component is provided in each phase wherein each of these connecting lines connects a module of the respective phase with the end of the main winding of the adjacent phase.
US09275784B2	Electronic circuits using coupled multi-inductors Coupled multi-inductors and their applications. An apparatus includes several circuit stages. Each circuit stage includes an inductive element that overlaps with the inductive elements of its adjacent circuit stages, forming a loop of coupled circuit stages. The apparatus may be, for example, a multi-phase oscillator with multiple oscillators that are magnetically coupled to each other for generating oscillation signals at different phases. The apparatus may also be, for example, a phase interpolator for combining input signals.
US09275781B2	Compact undulator system and methods An undulator with a compact construction is provided that reduces weight, complexity and cost. The compact undulator system and methods provides mechanical integrity without compromising magnetic field quality.
US09275780B2	Coil capable of generating an intense magnetic field and method for manufacturing said coil A method for manufacturing a coil for generating an intense magnetic field when an electric current passes through it. Turns are formed in a cylindrical tube made of conducting or superconducting material. At least one indentation is formed in an edge of at least one turn. Insulating material is positioned between the turn including the indentation and an adjacent turn. The recess forms with the insulating material a channel between the interior and the exterior of the tube when the coil is stressed.
US09275778B2	Permanent magnet and method for manufacturing the same The present invention relates to a permanent magnet obtained by wet-mixing a Dy compound or a Tb compound with a magnet raw material to coat a surface of the magnet raw material with the Dy compound or the Tb compound, and sintering a green sheet obtained by mixing the resulting magnet raw material with a resin binder and molding the resulting mixture. Since the present invention has the above-mentioned constitution, it becomes possible to sufficiently improve coercive force by Dy or Tb while decreasing the amount of Dy or Tb used. Further, it can be prevented that Dy or Tb is solid-solutionized in magnet particles to decrease residual magnetization.
US09275776B1	Shielding elements for use in communication cables Cables incorporating discontinuous shielding elements are described. A cable may include at least one twisted pair of individually insulated conductors, and a shield element may be positioned adjacent to the at least one twisted pair. The shield element may include a plurality of segments positioned along a longitudinal direction of the cable. Each segment may include a respective dielectric substrate with electrically conductive material formed on the substrate, and each segment may be electrically isolated from the other segments. A respective overlap may be formed between adjacent segments along a shared longitudinal edge. Additionally, a jacket may be formed around the at least one twisted pair and the shield element.
US09275774B2	Press-fit busbar and busway employing same A busbar for use in a busbar assembly, the busbar having an elongate body portion structured to be generally disposed about, an in contact with an elongate inner component, the body portion being formed from a conductive material.
US09275770B2	X-ray radiation generation apparatus with arm angle restriction unit A radiation generation apparatus includes a radiation generator which generates radiation, an arm which supports the radiation generator, and a column which supports the arm. The arm can open and close with respect to the column. The radiation generation apparatus includes a restriction unit which restricts the opening and closing angle of the arm with respect to the column in accordance with the length of the arm.
US09275763B2	Nuclear fuel rod spacer grid and framework and assembly comprising such a grid A grid including at least two meshed grid parts intended to be superposed in a longitudinal direction, each grid part extending in a transverse plane, and the grid parts being moveable one relative to the other in at least one transverse direction between an open configuration for the insertion of nuclear fuel rods in the longitudinal direction through the grid parts, and a closed configuration allowing each fuel rod inserted through the grid parts to be clamped transversely between the grid parts. According to one aspect of the invention, the grid includes elements for transversely immobilizing the grid parts in the closed configuration, the immobilizing elements being designed to engage as the superposed grid parts are moved closer together in the longitudinal direction.
US09275762B2	Cladding material, tube including such cladding material and methods of forming the same A multi-layered cladding material including a ceramic matrix composite and a metallic material, and a tube formed from the cladding material. The metallic material forms an inner liner of the tube and enables hermetic sealing of thereof. The metallic material at ends of the tube may be exposed and have an increased thickness enabling end cap welding. The metallic material may, optionally, be formed to infiltrate voids in the ceramic matrix composite, the ceramic matrix composite encapsulated by the metallic material. The ceramic matrix composite includes a fiber reinforcement and provides increased mechanical strength, stiffness, thermal shock resistance and high temperature load capacity to the metallic material of the inner liner. The tube may be used as a containment vessel for nuclear fuel used in a nuclear power plant or other reactor. Methods for forming the tube comprising the ceramic matrix composite and the metallic material are also disclosed.
US09275757B2	Apparatus and method for non-intrusive random memory failure emulation within an integrated circuit The system and methods allow for emulation of random hardware failure of an internal embedded memory array of an integrated circuit (IC) device. Emulation of potential defects is performed in order to evaluate the behavior of the rest of the design. This non-intrusive emulation is performed in a pseudo-functional mode in order to evaluate the behavior of one or more memory cores in their standard functional mode. The solution enables the creation of failures and tracking both the detection of the failures and the time required time for detection. Specifically, the emulation of an internal memory array with respect of random failures and the associated diagnostic mechanism ensures that detection and correction mechanisms work as expected. A typical non-limiting use case is to ensure that safety control logic of an IC behaves as expected in cases of data corruption within an embedded memory core.
US09275755B2	Semiconductor system and semiconductor package A semiconductor system includes a plurality of memory chips. Each of the memory chips includes an oscillator suitable for generating a periodic wave in a self refresh mode, and a delay unit suitable for delaying the periodic wave to generate a refresh pulse and for setting a delay value based on a corresponding chip identification.
US09275752B2	Read-only memory A configuration for a bit-1 read-only memory (ROM) cell is provided. The bit-1 ROM cell comprises a first circuit connected to a second circuit. The first circuit comprises a first transistor and the second circuit comprises a second transistor. The second circuit is configured to receive a YMUX signal. The second circuit is connected to a word-line bar. The second circuit is configured to maintain a disconnection or connection between the first transistor and the word-line bar based upon the YMUX signal. The first circuit is located on a different physical layer than the second circuit.
US09275749B1	Internal power voltage generating circuit, semiconductor memory device and semiconductor device The invention is an internal power voltage generating circuit, adjusted such that an internal power voltage becomes the reference voltage. The internal power voltage generating circuit further includes: a charge share circuit, including a charging capacitor, an initial voltage adjusting circuit and a charge reset circuit. The charging capacitor is connected to a differential amplifier via a switch circuit, and is charged by charges of a control voltage. The initial voltage adjusting circuit adjusts and applies an initial voltage to the charging capacitor. The charge reset circuit discharges the charging capacitor. When the internal power voltage is lower than a reference voltage, the charging capacitor having the initial voltage is connected to the differential amplifier, and the charges of the control voltage are transferred to the charging capacitor during a transfer period.
US09275746B2	Source line floating circuits, memory devices including the same and methods of reading data in a memory device A source line floating circuit includes a plurality of floating units. The floating units directly receive decoded row address signals or voltages of word lines as floating control signals, respectively. The decoded row address signals are activated selectively in response to a row address signal. The floating units control electrical connections between source lines and a source voltage in response to the floating control signals in a read operation. Related devices and methods are also described.
US09275745B2	Semiconductor device and method of operating the same A semiconductor device includes a memory cell array includes a plurality of memory blocks, each of the memory blocks including a plurality of pages, wherein at least one of the plurality of memory blocks functions as a first storage unit to store a plurality of page addresses associated with the plurality of pages. A second storage unit loads a page address stored in the first storage unit. A control circuit is configured to cancel a program operation if an externally inputted page address is less than or equal to the page address loaded into the second storage unit, and perform the program operation and update the second storage unit with the externally inputted page address if the externally input page address is greater than the page address loaded into the second storage unit.
US09275741B1	Temperature compensation management in solid-state memory Systems and methods are disclosed for programming data in a non-volatile memory array are disclosed. A data storage device includes a non-volatile memory array including a plurality of non-volatile memory cells and a controller configured to receive a signal indicating a temperature of at least a portion of the data storage device. The controller determines a first offset program verify level associated with a first programming level based at least in part on the temperature and programs a first set of the memory cells of the non-volatile memory array using the first offset program verify level.
US09275738B2	Flash memory having dual supply operation A flash memory device may operate from two supply voltages, one being provided externally, and the other being generated within the flash memory device from the external supply voltage. The flash memory device may be provided with a selectable-level buffer for interfacing with either low supply voltage or high supply voltage integrated circuits. To provide even greater flexibility, the flash memory device may be provided with the capability of receiving a second supply voltage from an external source, which may take precedence over the internally-generated second supply voltage or may be combined with the internally-generated second supply voltage.
US09275737B2	Three dimensional stacked nonvolatile semiconductor memory A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.
US09275733B2	Methods and systems for mapping a peripheral function onto a legacy memory interface A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.
US09275731B1	Systems and methods for increasing the read sensitivity of a resistive random access memory (RRAM) A resistive random access memory system includes a plurality of bitlines, a plurality of wordlines, and an array of resistive random access memory cells. Each of the resistive random access memory cells in the array includes a transistor and a resistive random access memory element connected in a common gate configuration.
US09275725B2	Memory device and method of operating the same A memory device includes a memory cell, a sensing circuit connected to sense data stored in a memory cell and to connect the memory cell by first and second paths separate from one another A sample and hold circuit connected between the memory cell and the sensing circuit may separate a period during which voltages of the first and second paths are developed by the data stored in the memory cell from a period during which the sensing circuit senses the data stored in the memory cell by detecting the developed voltages of the first and second paths.
US09275718B2	Semiconductor devices with periodic signal generation circuits and semiconductor systems including the same A semiconductor system includes a controller and a semiconductor device. The controller receives a temperature signal including information on temperature variation to generate an auto-refresh signal. The semiconductor device generates the temperature signal and controls an amount of electric charges discharged from an internal node according to temperature variation to generate a periodic signal including pulses sequentially created. The semiconductor device also receives the periodic signal or the auto-refresh signal to perform a refresh operation.
US09275717B2	Refresh address generator, volatile memory device including the same and method of refreshing the volatile memory device A refresh address generator includes a refresh sequence buffer and a refresh address generating unit. The refresh sequence buffer stores a sequence of memory groups, each memory group including a plurality of memory cell rows. The refresh address generating unit generates a plurality of refresh row addresses according to the sequence of memory groups stored in the refresh sequence buffer, in response to a refresh signal.
US09275716B2	Cell array and memory with stored value update A memory includes a first cell array configured to include a plurality of first memory cells connected to a plurality of word lines, a second cell array configured to include a plurality of second memory cells connected to the plurality of word lines, wherein a group of the plurality of second memory cells which are connected to a corresponding word line stores the number of activations for the corresponding word line, and an activation number update unit configured to update a value stored in the corresponding group of the plurality of second memory cells connected to the activated word line of the plurality of word lines.
US09275714B1	Read operation of MRAM using a dummy word line Systems and methods relate to a read operation on a magnetoresistive random access memory (MRAM). Prior to determining whether there is a hit in the MRAM for a first address corresponding to the read operation, a dummy word line is activated, based on at least a subset of bits of the first address. A settling process for a reference voltage for reading MRAM bit cells at the first address is initiated, based on dummy cells connected to the dummy word line and a settled reference voltage is obtained. If there is a hit, a first word line is activated based on a row address determined from the first address, and the MRAM bit cells at the first address are read using the settled reference voltage.
US09275713B2	Magnetoresistive element and method of manufacturing the same A planar STT-MRAM comprises apparatus, a method of operating and a method of manufacturing a spin-torque magnetoresistive memory and a plurality of magnetoresistive memory element having a ferromagnetic recording layer forming a flux closure with a self-aligned ferromagnetic soft adjacent layer which has an electric field enhanced perpendicular anisotropy through an interface interaction with a dielectric functional layer. The energy switch barrier of the soft adjacent layer is reduced under an electric field along a perpendicular direction with a proper voltage on a digital line from a control circuitry; accordingly, the in-plane magnetization of the recording layer is readily reversible in a low spin-transfer switching current.
US09275709B2	Electronic apparatus This invention makes is possible to protect programs and shorten the activation time of an electronic apparatus even if a non-volatile memory such as an MRAM stores the programs including a boot program, and is used as a main memory. Upon power-on or receiving a reset signal, a program stored in bank 102 of the non-volatile memory is transferred to another bank. Upon completion of the transfer operation, to disable access from the outside of the non-volatile memory to the bank 102 to protect the bank 102, the bank is set in a disconnection state in the non-volatile memory. A signal indicating completion of the program transfer operation is output to the outside, and a reset-release signal to a processor is generated using the signal as a trigger.
US09275708B2	Row address decoding block for non-volatile memories and methods for decoding pre-decoded address information Decoding blocks, memories, and methods for decoding pre-decoded address information are disclosed. One such decoding block includes a first latch and voltage shift circuit configured to receive first pre-decoded address information at first voltage levels and further configured to latch the first pre-decoded address information and shift the voltage levels of the same to second voltage levels. An address decoder includes a second latch and voltage shift circuit configured to receive second pre-decoded address information at the first voltage levels and latch and shift the voltage levels of the same to the second voltage levels. The address decoder is further configured to select control gates of the memory cells of the memory based at least in part on the first and second pre-decoded address information.
US09275706B2	Auto-calibration for high speed input/output A delay and calibration circuit for an input/output determines an appropriate delay by trying a range of different delays, and for each delay, determining the number of times that a given data sequence is accurately received. The data sequence may be a command, address, host data, or other data. Appropriate delays may be found for different temperatures.
US09275703B2	Semiconductor integrated circuit with stack package structure A semiconductor integrated circuit including first semiconductor chip and second semiconductor chip that are vertically stacked, wherein the first semiconductor chip includes a first column data driving circuit configured to transmit internal data to the second semiconductor chip in a DDR (double data rate) scheme based on an internal strobe signal, and a first column strobe signal driving circuit configured to generate first column strobe signals that are source-synchronized with first column data transmitted to the second semiconductor chip by the first column data driving circuit, based on the internal strobe signal, and transmit the first column strobe signals to the second semiconductor chip.
US09275701B2	Apparatuses and methods for performing logical operations using sensing circuitry The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry comprising a primary latch coupled to a sense line of the array. The sensing circuitry can be configured to perform a first operation phase of a logical operation by sensing a memory cell coupled to the sense line, perform a number of intermediate operation phases of the logical operation by sensing a respective number of different memory cells coupled to the sense line, and accumulate a result of the first operation phase and the number of intermediate operation phases in a secondary latch coupled to the primary latch without performing a sense line address access.
US09275700B2	Semiconductor device A semiconductor device includes a data bus inversion (DBI) decision unit suitable for deciding whether a DBI operation mode is performed, based on a read data, and generating a DBI decision signal corresponding to a result of the decision; an output control unit suitable for generating an arrangement control signal in which a delay amount of time for the decision is reflected, in a DBI operation mode; a data synchronization unit suitable for synchronizing the read data with the arrangement control signal and output the synchronized read data and inverted signals of the synchronized read data, in the DBI operation mode; and a data output unit suitable for selectively outputting the synchronized read data and the inverted signals of the synchronized read data, to an external in response to the DBI decision signal, the arrangement control signal and an output control signal, in the DBI operation mode.
US09275699B2	Memory with alternative command interfaces A memory device or module selects between alternative command ports. Memory systems with memory modules incorporating such memory devices support point-to-point connectivity and efficient interconnect usage for different numbers of modules. The memory devices and modules can be of programmable data widths. Devices on the same module can be configured select different command ports to facilitate memory threading. Modules can likewise be configured to select different command ports for the same purpose.
US09275694B1	FPGA equivalent input and output grid muxing on structural ASIC memory The present invention provide circuits, methods, and apparatus directed to an integrated circuit having a memory interface that is configurable to have one of a multiple different bus widths. The memory interface has a first set of lines and a second set of lines. The first and second set of lines are arranged such that there are multiple locations at which a via may be placed to connect a line of the first set to a line of the second set. The placement of the vias determines the bus width of the memory interface.
US09275691B2	Programmable voltage generator for nonvolatile memory device An exemplary embodiment of the present disclosure provides a programming voltage generator for a nonvolatile memory device. The programming voltage generator comprises a power circuit, a detector, a switching circuit, a control signal generator, and a regulation circuit. The power circuit outputs a programming voltage according to a voltage control signal. The detector detects whether the programming voltage is larger than or equal to a breakdown voltage of the nonvolatile memory device, so as to output an indication signal. The switching circuit temporally drops the programming voltage according to the indication signal. The control signal generator generates a plurality of regulation control signals. The regulation circuit generates the voltage control signal according to the programming voltage and the regulation control signals.
US09275688B2	Semiconductor device and semiconductor package A semiconductor device includes a system-on-chip (SOC) and at least one wide input/output memory device. The SOC includes a plurality of SOC bump groups which provide input/output channels, respectively, independent from each other. The at least one wide input/output memory device is stacked on the system-on-chip to transmit/receive data to/from the system-on-chip through the SOC bump groups. The SOC bump groups are arranged and the at least one wide input/output memory device is configured such that one of the wide input/output memory devices can be mounted to the SOC as connected to all of the SOC bump groups, or such that two wide input/output memory devices can be mounted to the SOC with each of the wide input/out memory devices connected a respective half of the SOC bump groups.
US09275685B2	Smooth playing of video A computer-implemented method, including detecting an event associated with an image displayed on a display device within a software application, loading a media player into the software application behind the image, where the media player is configured to play a media file associated with the image, and causing a representation of a frame of the media file to be displayed within the media player instead of the image.
US09275684B2	Providing sketch annotations with multimedia programs A method for collaborative sketch annotating of a program of multimedia content includes enabling a first user to create a sketch annotation, enabling the first user to store sketch annotation data related to the sketch annotation, and enabling a second user to access the sketch annotation. The second user may navigate the program using the sketch annotation and/or an indication of the sketch annotation. The first user may create the sketch annotation while viewing the program, for example, and the program may be paused for adding the sketch annotation to one or more paused frames. The sketch annotations may include chronological information indicative of a chronological location of the sketch annotation within the program.
US09275681B2	Bookmarks in recorded video In general, in one aspect, the disclosure describes a video recording system including a user interface to enable a user to enter commands. A bookmark manager is to generate bookmarks corresponding to locations in the videos being recorded based on bookmark commands received, to assign end points for the bookmarks, and to generate a program based on selection of one or more of the recorded videos and selection of at least a subset of the bookmarks associated with the one or more recorded videos. A video record/playback manager is to control recording of the videos and the associated bookmarks and to present the program by playing the at least a subset of the associated bookmarks for the one or more of the recorded videos. Playback of each of the at least a subset of the associated bookmarks is to end at the assigned endpoint.
US09275677B1	Hard disk drive top cover removal A hard disk drive (HDD) top cover removal tool includes a nest assembly, a clamp, a guide plate, and a purge and vacuum assembly (PAVA). The nest assembly secures an HDD and rotates it from a first to a second position. The clamp presses against a top cover of the HDD such that the top cover maintains contact with a hard drive body of the HDD. A hole defined in the guide plate is aligned with a screw location of the top cover and the hard drive body, and receives a screw driver for removing a screw fastening the top cover to the hard drive body. The PAVA purges and evacuates particles from the screw location of the top cover and the hard drive body of the HDD in the second position. The clamp releases the top cover. The PAVA removes the released top cover from the hard drive body.
US09275674B2	Spindle motor for hard disk drive and method of fabrication thereof A spindle motor for a hard disk drive includes a base and a bearing assembly coupled to the base. The bearing assembly includes a sleeve configured to rotatably support a shaft therein. A rotor hub is affixed to the shaft so as to be rotatable with the shaft about a rotational axis. A stator is arranged in between the rotor hub and the base. A first magnet is arranged over the stator and on a bottom surface of the rotor hub. In particular, the rotor hub includes a body portion, a peripheral wall portion extending from the body portion in a direction towards the base, and a flange portion having a disk seating surface configured for supporting one or more disks thereon. The peripheral wall portion is configured to at least partially surround the stator in a radial direction. There is also provided a method of fabricating the spindle motor and a hard disk drive incorporating the spindle motor.
US09275670B2	Methods of production for corrosion-resistant bit patterned media (BPM) and discrete track media (DTM) A method for producing a magnetic recording medium in one embodiment includes forming a magnetic material layer above a substrate, transferring an uneven pattern to the magnetic material layer to form concave portions and convex portions, the convex portions being magnetic regions, depositing a nonmagnetic material above the concave portions to form nonmagnetic regions, forming an oxide layer and/or hydroxide layer above the magnetic regions of the recording layer, and forming an organic material layer which exhibits a corrosion-inhibiting characteristic with respect to cobalt or cobalt alloy above the oxide layer and/or hydroxide layer.
US09275667B1	Disk drive servo control system with low power consumption for long seeks A disk drive has a servo control system that implements just-in-time (JIT) seeks with low power consumption for all long seeks. The servo controller receives a seek command to move the transducer to a target data track and sector, calculates rotational latency from the seek command, and limits the transducer velocity for seeks longer than a predetermined seek length. The servo controller then generates a JIT gain from the calculated rotational latency, modifies the transducer acceleration and deceleration using the JIT gain, and modifies the transducer velocity limit using the JIT gain. Positive current is applied to the actuator to move the transducer with the JIT gain-modified acceleration until the transducer reaches the modified velocity limit. The servo controller determines when to initiate deceleration of the transducer, and applies negative current to the actuator to move the transducer with the JIT gain-modified deceleration until the transducer reaches the target track.
US09275665B2	Slider with high frequency voltage ground and low frequency DC voltage isolation In one embodiment, a slider includes a substrate, a magnetic head, and a coupling capacitor. In one embodiment, a slider includes a substrate, a magnetic head, and a coupling capacitor configured to AC couple an electronics ground of the slider to the substrate and DC decouple the electronics ground of the slider from the substrate, the coupling capacitor including: a first conductive layer, a gap layer positioned above the first conductive layer, a dielectric layer positioned above the gap layer and the first conductive layer, and a second conductive layer positioned above the dielectric layer. In another embodiment, a method for forming a capacitor includes forming a substrate, forming a first conductive layer above the substrate, forming a gap layer above the first conductive layer, forming a dielectric layer above the gap layer and the first conductive layer, and forming a second conductive layer above the dielectric layer.
US09275661B2	Magnetic head having a CPP sensor with tunnel barrier layer and ELG material coplanar with the tunnel barrier layer A magnetic head including a CPP read head sensor. The CPP sensor includes a tunnel barrier layer. At least one portion of ELG material is coplanar with the tunnel barrier layer.
US09275660B1	Magnetic head having first magnetic shield, stack, side shield, antiferromagnetic layer, and second magnetic shield, magnetic head assembly, magnetic recording and reproducing apparatus, and manufacturing method of magnetic head A magnetic head of an embodiment has first and second magnetic shields, a stack, a side shield, and an antiferromagnetic layer. The stack has a pin layer, a nonmagnetic layer, and first and second free layers. The second free layer is antiferromagnetically exchange coupled to the first free layer and is exchange coupled to the antiferromagnetic layer. The side shield is exchange coupled to the antiferromagnetic layer.
US09275658B2	Thermally-assisted magnetic recording head including a plasmon generator A return path section includes first and second yoke portions and first, second and third columnar portions. The first and second yoke portions and the first columnar portion are located on the front side in the direction of travel of a recording medium relative to a waveguide core. The second and third columnar portions are located on opposite sides of a plasmon generator and connected to a shield. The first yoke portion connects a main pole to the first columnar portion. The second yoke portion connects the first columnar portion to the second and third columnar portions. A coil is wound around the first columnar portion. A heater and an expansion layer are located on the rear side in the direction of travel of the recording medium relative to the core.
US09275657B1	Process for making PMR writer with non-conformal side gaps A process for manufacturing a PMR writer main pole with non-conformal side gaps is provided. The process may include depositing a stitch layer comprising a magnetic material and a second stitch layer material over a substrate, forming an air-bearing surface (ABS) region in a first damascene material, and forming a yoke region in a second damascene material. The first damascene material may include Aluminum Oxide (Al2O3). The second damascene material may include Silicon Dioxide (SiO2). Side gap regions may include SiO2.
US09275654B2	Method and apparatus for writing servo information on a recording medium A servo system for writing servo information on a recording medium of a hard disk drive and for determining head position based on the servo information with a tracking accuracy, the servo system including a first magnetic head and a servo writer. The servo writer is configured to write the servo information on the recording medium by forming, using the first magnetic head, a first servo pattern comprising a servo burst pattern on a segment of a first track of a first layer of the recording medium; and by forming a second servo pattern comprising addressing information on a segment of a second track of a second layer of the recording medium. The second track is arranged half a width of the first track from the first track to increase the tracking accuracy of the servo system.
US09275647B2	Periodic ambient waveform analysis for enhanced social functions In particular embodiments, one or more computer-readable non-transitory storage media embody software that is operable when executed to receive an audio waveform fingerprint and a client-determined location from a client device. The received audio waveform fingerprint may be compared to a database of stored audio waveform fingerprints, each stored audio waveform fingerprint associated with an object in an object database. One or more matching audio waveform fingerprints may be found from a comparison set of audio waveform fingerprints obtained from the audio waveform fingerprint database. Location information associated with a location of the client device may be determined, and the location information may be sent to the client device. The client device may be operable to update the client-determined location based at least in part on the location information.
US09275646B2	Method for inter-channel difference estimation and spatial audio coding device Methods and devices for a low complex inter-channel difference estimation are provided. A method for the estimation of inter-channel differences (ICDs), comprises applying a transformation from a time domain to a frequency domain to a plurality of audio channel signals, calculating a plurality of ICD values for the ICDs between at least one of the plurality of audio channel signals and a reference audio channel signal over a predetermined frequency range, each ICD value being calculated over a portion of the predetermined frequency range, calculating, for each of the plurality of ICD values, a weighted ICD value by multiplying each of the plurality of ICD values with a corresponding frequency-dependent weighting factor, and calculating an ICD range value for the predetermined frequency range by adding the plurality of weighted ICD values.
US09275644B2	Devices for redundant frame coding and decoding A method for redundant frame coding by an electronic device is described. The method includes determining an adaptive codebook energy and a fixed codebook energy based on a frame. The method also includes coding a redundant version of the frame based on the adaptive codebook energy and the fixed codebook energy. The method further includes sending a subsequent frame.
US09275641B1	Platform for creating customizable dialog system engines Provided are systems and methods for creating custom dialog system engines. The system comprises a dialog system interface installed on a first server or a user device and a platform deployed on a second server. The platform is configured to receive dialog system entities and intents associated with a developer profile and associate the dialog system entities with the dialog system intents to form a custom dialog system engine associated with the dialog system interface. The web platform receives a user request from the dialog system interface, activates the custom dialog system engine based on identification, and retrieves the dialog system entities and intents. The user request is processed by applying the dialog system entities and intents to generate a response to the user request. The response is sent to the dialog system interface.
US09275640B2	Augmented characterization for speech recognition Systems, methods, and apparatus, including computer program products for accepting a predetermined vocabulary-dependent characterization of a set of audio signals, the predetermined characterization including an identification of putative occurrences of each of a plurality of vocabulary items in the set of audio signals, the plurality of vocabulary items included in the vocabulary; accepting a new vocabulary item not included in the vocabulary; accepting putative occurrences of the new vocabulary item in the set of audio signals; and generating, by an analysis engine of a speech processing system, an augmented characterization of the set of audio signals based on the identified putative occurrences of the new vocabulary item.
US09275637B1	Wake word evaluation Natural language controlled devices may be configured to activate command recognition in response to one or more wake words. Techniques are provided to receive a candidate word for evaluation as a wake word that activates a natural language control functionality of a computing device. The candidate word may include one or more words or sounds. Values for multiple wake word metrics are then determined. The candidate word is evaluated based on the various wake word metrics.
US09275635B1	Recognizing different versions of a language Speech recognition systems may perform the following operations: receiving audio at a computing device; identifying a language associated with the audio; recognizing the audio using recognition models for different versions of the language to produce recognition candidates for the audio, where the recognition candidates are associated with corresponding information; comparing the information of the recognition candidates to identify agreement between at least two of the recognition models; selecting a recognition candidate based on information of the recognition candidate and agreement between the at least two of the recognition models; and outputting data corresponding to the selected recognition candidate as a recognized version of the audio.
US09275632B1	Voice-activated customer service assistant A method, apparatus and non-transitory computer readable storage medium, in one embodiment, interpreting at least one input from a user via a wireless device, receiving at least one user account with the at least one input, deriving at least one representation of user intent, identifying at least one task based on the at least one representation of user intent, contacting at least one service to perform the identified at least one task and synthesizing speech to communicate a result of the contact to the wireless device.
US09275631B2	Speech synthesis system, speech synthesis program product, and speech synthesis method Waveform concatenation speech synthesis with high sound quality. Prosody with both high accuracy and high sound quality is achieved by performing a two-path search including a speech segment search and a prosody modification value search. An accurate accent is secured by evaluating the consistency of the prosody by using a statistical model of prosody variations (the slope of fundamental frequency) for both of two paths of the speech segment selection and the modification value search. In the prosody modification value search, a prosody modification value sequence that minimizes a modified prosody cost is searched for. This allows a search for a modification value sequence that can increase the likelihood of absolute values or variations of the prosody to the statistical model as high as possible with minimum modification values.
US09275630B2	Ultrasound imaging beam-former apparatus and method In some illustrative embodiments, an incoming signal from a transducer in an ultrasound imaging beam-former apparatus is applied to an in-phase sample-and-hold and a quadrature sample-and-hold. The quadrature sample-and-hold may be clocked a quarter period behind the in-phase sample-and-hold. The output of the sample-and-holds are applied to in-phase and quadrature analog-to-digital converters. A magnitude calculator receives the in-phase and quadrature digital values, and outputs a magnitude. A phase calculator receives the in-phase and quadrature digital values, and outputs a phase. An apodizer applies a difference between an amplitude of the outgoing signal and the magnitude and applies a first illumination to a image point in substantial proportion to the difference, and a phase rotator applies a second illumination to the image point in substantial proportion to the phase.
US09275629B2	Acoustic projector having synchronized acoustic radiators A method and system for maximizing radiated power from a linear array of acoustic projectors. In one case, the method realizes omni-directional acoustic beam patterns from a linear array of acoustic projectors contained within an acoustically-impervious enclosure with an acoustically transparent aperture. In another case, the method realizes an efficient set of beams for a conventional horizontal projector array or a similar acoustic projector array, which may be within an acoustically transparent enclosure. Drive signals are determined by finding a mutual impedance matrix that characterizes the interdependence of the acoustic projectors and solving an eigenvalue problem for the mutual impedance matrix. One of the eigenvalues is selected on the basis that it maximizes radiated power, and the corresponding eigenvectors are used to derive the corresponding drive signals.
US09275624B2	Audio processing apparatus An audio processing apparatus includes an acquisition unit configured to acquire an audio signal, and an audio processing unit configured to reduce noise contained in the audio signal, wherein the audio processing unit complements an audio signal in a section containing noise of the audio signal with a signal generated based on an audio signal in a predetermined section before the section containing noise and an audio signal in a predetermined section after the section containing noise, and wherein, in a case where noise is contained in one of the audio signal in the predetermined section before the section containing noise and the audio signal in the predetermined section after the section containing noise, the audio processing unit complements the audio signal in the section containing noise with a signal generated based on the audio signal in a noise-free section.
US09275617B2	Systems and methods for choreographing movement using location indicators Methods and apparatus for choreographing movement of individuals for a performance event are disclosed. In an embodiment, a method includes providing a performance event configuration having a plurality of location indicators to assist in the placing or movement of individuals conducting a performance event. The method also includes providing each individual with a wireless audio unit and transmitting body movement instruction signals to the audio units of each individual. In this embodiment, the wireless audio unit may be a wireless, cellular, or mobile telephone. The audio units are configured to receive the signals and to play audio directions for each individual that correspond to choreographed and coordinated body movements directly the individuals at, towards or away from the location indicators to carry out the performance event.
US09275616B2	Associating musical score image data and logical musical score data The method analyzes, on the basis of the musical score image data, an image note sequence that is a time series of a plurality of notes included in the image of a musical score of a given music piece, acquires, on the basis of a logical musical score data, a logical note sequence that is a time series of a plurality of notes included in the musical score of the given music piece, and then identifies correspondence relationship between the individual notes in the image note sequence and the individual notes in the logical note sequence by comparing the image note sequence and the logical note sequence. Further, the method displays the musical score image of the given music piece on the basis of the musical score image data, and controls a display state of the displayed image of the musical score by use of the identified correspondence relationship.
US09275615B2	Information processing terminal that displays information related to a function selected based on a positional relation, and system A sound generating system in the embodiment of the invention includes an information processing terminal displaying a screen relating to a setting for controlling an electronic musical instrument determined based on a positional relation with the electronic musical instrument on a display screen and transmitting control information based on an operation performed on a touch sensor, and the electronic musical instrument performing the setting relating to sound generation according to the received control information to generate an audio signal based on the performed setting.
US09275610B2	Object tracking apparatus and control method thereof The present invention discloses an object tracking apparatus including a reference object, an optical sensor and a controller. The reference object has a plurality of light emitting devices, for generating an optical signal. The optical sensor is for detecting the optical signal and generating an identification signal in response to the optical signal. The controller is for generating a control signal according to the identification signal and outputting the control signal to the reference object, thereby adaptively adjusting a light emitting number or light emitting intensity of the plurality of light emitting devices. The present invention discloses a method for controlling an object tracking apparatus.
US09275606B2	Display device, control device for driving the display device, and drive control method thereof A display device, a driving control device of the display device, and a driving control method are disclosed. In one aspect, the display device comprises a display unit consisting of a plurality of pixels including a light emitting element emitting light according to a driving current corresponding to a data signal; a scan driver transmitting a scan signal through a plurality of scan lines; a data driver transmitting a data signal through a plurality of data lines; a power supply unit supplying a driving voltage to drive a plurality of pixels through a power source wire; and a driving controller connected to the power source wire, obtaining an actual output voltage value of the driving voltage output from the power source voltage supply unit, and compensating a deviation of the driving voltage in a process step by using the actual output voltage value.
US09275604B2	Constant speed display method of mobile device A constant speed display method applied in an electronic device is provided. The electronic device is in a full screen view for illustrating images in a photograph. The method has the following steps of: determining whether consecutive swiping touch actions matching specific criteria have been received by the electronic device; and displaying an aligning animation of the images in the photograph at a constant speed without being affected by a next swiping action after the consecutive swiping touch actions matching the specific criteria have been received by the electronic device.
US09275603B2	Driving displays at cinematic frame rates Described herein are technologies related to playing moving-images content and more particularly to playing such content on a display possessing a display refresh rate which is typically greater than the inherent frame rate (e.g., a cinematic frame rate) of the content. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09275602B2	Display device and method of driving the same A display device including a display panel including gate and data line that cross each other; a first control signal generation unit generating a source output enable signal and a first gate output enable signal in synchronization with a data enable signal modulated according to a spread frequency clock signal; a second control signal generation unit counting a number of clocks of a fixed-frequency clock signal based on a point of time at which a logic high state of the source output enable signal ends, and outputting a second gate output enable signal when the number of the counted clocks becomes equal to a reference value; and a gate driving unit controlling outputting of a gate signal to the gate lines using the second gate output enable signal.
US09275596B2	Signal-line driving circuit, display device and electronic equipments A signal-line driving circuit configured to supply a signal voltage having the positive or negative polarity to each of signal lines connected to display cells arranged to form a matrix as cells each to be subjected to a polarity inversion driving operation according to inversion of the polarity of the signal voltage, the signal-line driving circuit including an output buffer section, wherein the output buffer section employs a positive-polarity operating amplifier, a negative-polarity operating amplifier, a first output buffer, a second output buffer, and a switch group.
US09275591B2	Liquid crystal display A liquid crystal display includes a gate driver including stages, and a clock generator which receives a clock generation control signal, generates a clock signal and a clock bar signal based on one or more of the clock generation control signal, a gate-on voltage and a gate-off voltage, and outputs the clock signal and the clock bar signal to the gate driver. The clock generator includes an overcurrent protector unit which intercepts at least one of the clock signal and the clock bar signal when a voltage level of at least one of the gate-on voltage and the gate-off voltage is greater than a reference level.
US09275586B2	Visible light communication method in information display device having LED backlight unit and the information display device A method provides additional information from a server to a visible light communication terminal through visible light communication in an information display device having a Light Emitting Diode (LED) backlight unit. To this end, if content data regarding an image output through a screen of an information display device is provided from a server, it is determined whether additional information regarding an object of the image is included in the content data, and if so, the additional information is acquired from the content data. The information display device controls light emission of an LED backlight unit of a display unit based on the additional information, thus performing visible light communication. As such, various additional information regarding an object of an image displayed at a particular position of a current screen of the information display device can be provided to a visible light communication terminal.
US09275585B2	Driving method of field sequential liquid crystal display device Input of image signals to part of a plurality of pixels included in a particular region of a pixel portion and supply of light to part of another plurality of pixels which is different from the part are performed concurrently. Therefore, it is not necessary to provide a period in which light is supplied to all of the plurality of pixels included in the region after the image signals are input thereto. In other words, it is possible to start input of the next image signals to all of the plurality of pixels included in the region just after the image signals are input thereto. Accordingly, it is possible to increase the input frequency of the image signals. As a result, it is possible to suppress deteriorations of display caused in the field-sequential liquid crystal display device.
US09275584B2	Brightness control apparatus and brightness control method A brightness control apparatus and a brightness control method are provided. A conversion unit converts a first pulse width modulating signal, indicating brightness of a display, into a DC signal. An analog to digital conversion unit converts the DC signal into a second pulse width modulating signal according to at least one of an environmental condition and a load state of an electronic device, wherein the second pulse width modulating signal controls the brightness of the display.
US09275582B2	Dual scan correction for power fluxuations A scan driver includes scan-driving blocks, each including a first transistor having a gate coupled to a first node to supply a first power to an output terminal, a second transistor having a gate coupled to a second node to couple a second clock to the output terminal, a third transistor having a gate coupled to a first input to supply the first power to the first node, a fourth transistor having a gate coupled to a second input to supply a second power to the first node, and a fifth transistor having a gate coupled to a first clock to couple the first input to the second node. A first scan-driving block further includes a sixth transistor coupled between the second input and the fourth transistor gate, and a NOT gate configured to invert the first input signal and to supply the inverted signal to the sixth transistor gate.
US09275580B2	Driver and display device including the same The present invention relates to a driver and a display device including the same, wherein the driver includes: a first driving circuit generating a first output signal; a second driving circuit generating a second output signal; and at least one buffer circuit generating a third output signal of a voltage level corresponding to a gate-on voltage level of the first output signal or the second output signal when the first output signal or the second output signal is transmitted as a gate-on voltage level, and the buffer circuit includes a first transistor transmitting the voltage of the first level as the third output signal, and a second transistor transmitting the voltage of a second level turning off the first transistor and connected to the gate electrode of the first transistor.
US09275579B2	System and methods for extraction of threshold and mobility parameters in AMOLED displays A system and method for extracting a parasitic capacitance value from a pixel circuit including a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. The system and method determine the biasing voltage of an internal node of the pixel circuit during a driving cycle for a desired measurement level, and modify voltages of the pixel circuit that do not affect said biasing voltage to eliminate unwanted cross talk. In different implementations, the biasing voltage is determined by measuring the voltage at an internal node, or by calculating the voltage at the internal node.
US09275576B2	Power consumption detection apparatus, power consumption control apparatus, image processing apparatus, self-luminous display apparatus, electronic device, power consumption detection method, power consumption control method, power consumption control method, and computer program An image processing apparatus is disclosed. The image processing apparatus includes a display panel and comprises a control section configured to control a duty pulse width for controlling an illumination period within a horizontal line period on a timing synchronized with a horizontal synchronization pulse.
US09275574B2	Organic light emitting diode display An organic light emitting diode (OLED) display that includes a panel assembly outputting an image, an electrode part formed at one side of the panel assembly, and a connection member connected to the electrode part, wherein the connection member includes a body part having a plane shape, a plurality of first electrode lines and a plurality of second electrode lines extending in a longitudinal direction, being wire bonded to the electrode part, spaced apart from one another in a lateral direction in an alternating manner and electrically connecting an external device to the panel assembly.
US09275573B2	Display apparatus A display device which includes a substrate having a pixel unit that receiving first and second voltages is disclosed. In one aspect, the first and second power lines are coupled to the first and second voltages, and are supplied to the pixel unit via first and second power pads. In some aspects, the first and second power pads are alternately disposed while being spaced apart from each other in at least a portion of the peripheral area, and the second power pads are disposed in the space between the respective first power pads.
US09275572B2	Display device and display device driving method for causing reduction in power consumption Display device includes: a power supplying unit which outputs at least a high-side or low-side output potential; an organic EL display unit which includes pixels and receives power supply from the power supplying unit; two or more detecting lines for transmitting a high-side or low-side applied potential applied to two or more pixels; a relay unit which outputs the high-side or low-side applied potentials transmitted by the detecting lines, to output lines fewer in number than the detecting lines; and a regulating unit which regulates at least the high-side or low-side output potential to be outputted by the power supplying unit, such that any one of potential difference between a reference potential and the high-side applied potential from the relay unit, potential difference between the reference potential and the low-side applied potential, and potential difference between the high-side applied potential and the low-side applied potential reaches a predetermined potential difference.
US09275571B2	Method and system to quickly fade the luminance of an OLED display Various embodiments include devices, methods, circuits, data structures, and software that allow for rapid variation in the luminance of an OLED display panel. An OLED display driver circuit can include a first input, a second input, and a scaling circuit. The first input is to receive a scaling factor. The second input is to receive an image input signal including a digital representation of a desired output for a pixel. The scaling circuit is to multiply a pixel-level output voltage associated with the desired output for the pixel by the scaling factor.
US09275565B2	Jersey hanger assembly and jersey display A jersey hanger assembly is described. The jersey hanger assembly allows homes, businesses, schools, or other buildings to display an athletic jersey as a symbol of team pride or of support for an athletic team or an individual player on the team. The jersey hanger assembly includes a bracket member. The bracket member includes a receiving member. The jersey hanger assembly includes a pole with first and second opposing ends. The second pole end is insertable into the receiving member. The pole has a curved shape between the first and second opposing ends.A jersey flag for hanging on the jersey hanger is described. The jersey flag is material of a fabric cut or shaped to resemble an athletic jersey. The material includes a team logo or insignia. A sleeve or an open seam in positioned in the upper portion of the jersey flag to receive the pole.
US09275560B2	High-stretch energy curable inks and method of use in heat transfer label applications Provided are energy curable high-stretch inks and coatings for heat transfer labels. The inks and coatings include monofunctional monomers/oligomers, thermoplastic inert resins, and zero or a limited amount of multifunctional monomers/oligomers and exhibit good stretchability and surface resistance, such as scratch resistance and solvent (water, oil) resistance. Also provided are methods of using the high stretch inks in heat-transfer label (HTL) applications.
US09275557B2	Ultrasound phantom models, materials, and methods Devices, systems, and methods appropriate for use in medical training that include materials that better mimic natural human tissue are disclosed. In one aspect a polysiloxane mixture for simulating human biological tissue, especially human breast tissue, is disclosed. In another aspect, a method of manufacturing a biological tissue ultrasound phantom is disclosed. In another aspect, a human breast tissue models are disclosed. In some instances, the human breast tissue model includes at least one simulated pathological structure that simulates such pathologies as a cyst, a medullary carcinoma, a ductal carcinoma, an infiltrating scirrhus carcinoma, a lobular carcinoma, and a fibroadenoma.
US09275556B1	Spinal injection trainer and methods therefor For use in training needle techniques such as spinal anesthesia and or lumbar epidural steroid injections, a spinal model includes a complete natural bone vertebral column that is embedded in a matrix of crystal clear ballistic gel. The synthetic gel does not harbor bacteria, can be reused and does not require refrigeration. Natural bone offers significantly better image contrast over radiopaque replicas. A transparent synthetic gel matrix permits observation of needle progression by both the trainee and the trainer and provides unique opportunities for coaching and intercession to prevent poor needle placement prior to its occurrence.
US09275554B2	Device, system, and method for enhanced memorization of a document A device, system, and method for enhanced memorization of a document. A document may be initially uploaded into a computer system and the textual information of the document may be converted into a test template for memorization and/or testing. Portions of the test template may be converted into various test items, and the test items, in combination with the contents of the scanned document, may be displayed by the computer system for a user to answer in order to enhance his or her memorization of the document. The test questions may comprise: fill-in-the-blank questions, multiple choice questions, true or false questions, Scrabble®-like questions, and/or a combination thereof.
US09275553B2	Pneumatically supported spatial attitude simulator A flight simulator rests on a plurality of air cushions as a hovercraft and assumes spatial attitudes depending upon the relative heights of the air cushions. Flight controls determine the volume of air supplied to each air cushion and thereby control the pitch and roll attitudes of the flight simulator. The simulator may be connected to an external support frame and may thereby be subjected to longitudinal, lateral, and rotational movements.
US09275545B2	System and method for monitoring vehicle traffic and controlling traffic signals A system and method for monitoring objects, such as vehicle traffic, and controlling a flow of the objects, such as vehicle traffic, through a flow point, such as an intersection having traffic control signals. At least one three-dimensional (3D) vector imaging sensor is operable for detecting an object and capturing node-based object with motion vector data relating to the object. A Sensor Processing Unit (SPU) is associated with the vector imaging sensor(s) and operable for processing the mode-based object with motion vector data, determining a tracked object from a plurality of the objects detected by the vector imaging sensor(s) and extracting the object data of the tracked object to an object database. A Central Tracking Unit (CTU) is associated with the SPU and operable for classifying the tracked object, generating object tracking data from the tracked object, predicting a future object state of the tracked object, and generating an object control output for controlling a control signal to thereby facilitate the flow of the objects through the flow point.
US09275544B2	System and method for realtime community information exchange System and method for traffic mapping service are disclosed for allowing plurality of users having each a navigation device to transmit their locations to a server and optionally to signal to the server their requested destination. The system and method are further capable of calculating traffic parameters such as current traffic speed at a given road based on the momentary locations of the users. The system and method of the invention may also calculate and advise the users of preferred roads to take in order to arrive at the requested location with minimum delay.
US09275539B2	Apparatus and method for providing emergency alert service in portable terminal An apparatus and method for providing an emergency alert service in a portable terminal and for generating an alarm for the emergency alert service are provided. The method includes detecting, by a controller, an SOS execution signal while the portable terminal is being operated in a certain mode, identifying, by the controller, a current operating mode of the portable terminal in response to the SOS execution signal, outputting a control signal according to the identified operating mode to a source audio signal processor, and outputting, by the source audio signal processor, a source audio signal according to an input port receiving the control signal.
US09275536B2	Pump monitoring device A pump monitoring device is configured to be connected to a case drain of a pump. The device includes a manifold having an inlet for connection to the case drain. A flow rate sensor generates a signal indicative of a flow rate of fluid in a fluid path. The flow rate sensor includes a temperature sensor, a heater, and a sensor barrel. The heater heats the sensor barrel while in fluid communication with the fluid. A pressure sensor generates a signal indicative of a pressure of the fluid. There is at least one fault indicator operatively coupled to at least one of the flow rate sensor, the temperature sensor, and the pressure sensor. The fault indicator provides a human perceptible indication that at least one of a sensed flow rate, a sensed temperature, or a sensed pressure of the fluid flowing in the fluid path exceeds a predetermined threshold value.
US09275535B1	Detecting and identifying fare evasion at an access control point Systems and techniques are presented for identifying fare evasion at an access control to a paid area. Received signal strength (RSS) is determined for wireless signals communicated between two or more wireless transceivers and a fare media. A position of the fare media is determined based on the RSS and the position is added to a collection of positions. A position of an object is detected and the position of the object is compared with each position in the collection of positions. A determination is made that the position of the object is not proximate to any position in the collection of positions and an indicator light is generated on the floor proximate to the position of the object.
US09275530B1	Secure area and sensitive material tracking and state monitoring In one aspect, a system for monitoring an area containing sensitive material is provided. The system includes at least one radio frequency identification (RFID) tag for coupling to an object and a reading and warning system including an RFID tag reader operable to receive a signal from the at least one RFID tag. The reading and warning system provides a warning when the at least one RFID tag is coupled to the object and the RFID tag reader receives a signal from the at least one RFID tag, and the object is one of a sensitive material and a prohibited material.
US09275527B2	Controller A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.
US09275525B2	Automated banking machine that operates responsive to data bearing records An automated banking machine controlled responsive to data bearing records includes a card reader that reads identifying data from a user card. A host banking system authorizes operation of an automated banking machine responsive to computer verification of the identifying data. The automated banking machine can dispense cash to an authorized machine user in a cash dispensing transaction, and have the user's bank account charged for the cash amount dispensed. The automated banking machine can acquire image and magnetic data read from deposited checks to determine the genuineness of checks and the authority of a user to receive cash for the checks. Cash can be dispensed from the machine to a user in exchange for a deposited check.
US09275520B2	Gaming system, gaming device and method providing accumulation game A gaming system and method enables a player to assign at least one amplifier to at least one accumulator. In one embodiment, the amplifier causes an increase in the rate of advancement for the accumulator. In one embodiment, the gaming system provides the player any awards associated with the level of one or more of the accumulators.
US09275519B2	Gaming system having controllable dynamic signage A gaming system comprises a first gaming device displaying a first primary wagering game in response to receipt of a first wager from a first player and a second gaming device displaying a second primary wagering game in response to receipt of a second wager from a second player. The system further comprises a community display having a plurality of display regions thereon, and at least one controller operative to (i) detect activation of a first supplemental feature by the first player, (ii) detect activation of a second supplemental feature by the second player, (iii) determine in which of the plurality of display regions to display the first and second supplemental features in accordance with at least a first rule set, and (iv) display the first and second supplemental features on the community display.
US09275516B2	Wagering apparatus, methods and systems A system, method and apparatus provides a unique betting product where players make selections in one or more different events. Players who are in contention to win may be offered an opportunity to sell their tickets, in whole or in part, in response to a full or partial buy-out offer made at any time prior to completion of a wagering event.
US09275513B2	Personal electronic device for gaming and bonus system Embodiments of the present invention are directed to communication methods in gaming networks using portable devices. In some networks portable devices communicate information about the status of particular gaming machines on the gaming network. In other networks portable devices are used as a secondary display for the gaming device. In yet other networks bonus games may be played on the portable devices. Further embodiments include a portable device that operates to match a current state of a game to a pre-defined state or states.
US09275502B2	Driving information restoration system and method for vehicle A driving information restoration system of a vehicle includes: a cluster configured to be operated in a receiving standby mode or transmit driving information stored therein to a diagnosis system depending on a comparison result of the driving information stored therein and driving information stored in controller, display hot key information received from the diagnosis system, transmit information input by a driver to the diagnosis system, and store the driving information received from the diagnosis system.
US09275501B2	Method for controlling at least one function of a motor vehicle A method for controlling a function of a motor vehicle (18) employs a use module (4) at a storage location (6, 8) for a device outside the motor vehicle (18). The use module (4) and the storage location (6, 8) have recognition interfaces (10, 12, 14). The motor vehicle (18) has a first communication module (22), and a second communication module (16) is provided for the use module (4) and for the storage location (6, 8). The recognition interfaces make contact when the use module (4) is at the storage location (6, 8). If a storage location (28, 32) change is registered for the use module (4), a message with an instruction to perform the function of the motor vehicle (18) is transferred from the second communication module (16) for the use module (4) and the storage location (6, 8) to the first communication module (22) of the motor vehicle.
US09275499B2	Augmented reality interface for video A system, method, and computer program product for automatically combining computer-generated imagery with real-world imagery in a portable electronic device by retrieving, manipulating, and sharing relevant stored videos, preferably in real time. A video is captured with a hand-held device and stored. Metadata including the camera's physical location and orientation is appended to a data stream, along with user input. The server analyzes the data stream and further annotates the metadata, producing a searchable library of videos and metadata. Later, when a camera user generates a new data stream, the linked server analyzes it, identifies relevant material from the library, retrieves the material and tagged information, adjusts it for proper orientation, then renders and superimposes it onto the current camera view so the user views an augmented reality.
US09275490B2	Post-render motion blur A method of applying a post-render motion blur to an object may include receiving a first image of the object. The first image need not be motion blurred, and the first image may include a first pixel and rendered color information for the first pixel. The method may also include receiving a second image of the object. The second image may be motion blurred, and the second image may include a second pixel and a location of the second pixel before the second image was motion blurred. Areas that are occluded in the second image may be identified and colored using a third image rendering only those areas. Unoccluded areas of the second image may be colored using information from the first image.
US09275488B2	System and method for animating a body Systems and methods are disclosed for applying a controllable and predictable muscle oscillation to a portion of a body such as a character in a predetermined and intuitive way. Positions of separate muscle locations are analyzed throughout a timeline. A third derivative with respect to time of the positions of the separate muscles is calculated to measure a change of acceleration for a particular point of interest. The change in the acceleration gives positive or negative changes in the applied forces. The direction and magnitude of the applied forces is passed onto a part of a solution that creates a procedural oscillation based on the magnitude and the direction of the applied forces in the muscle space.
US09275486B2	Collage image creating method and collage image creating device A collage image creating method includes a first step that creates a collage image by determining arrangements of the plurality of images according to a placement algorithm including a rotation angle of each image as a parameter; and a second step that recreates a collage image by re-executing the first step to at least one of a change due to an addition or deletion of an image which configure the collage image, a change in arrangement position of at least one image among images which are included in the collage image, a change in rotation angle of at least one image among images which are included in the collage image, and a change in arrangement size of at least one image among images which are included in the collage image.
US09275485B2	Seam network processing for panorama weaving A method of creating an image mosaic is provided. A plurality of image files is read at a computing device. The plurality of image files contains image data defining a plurality of overlapping images. A dual adjacency mesh for an image mosaic is defined based on an arrangement of the plurality of overlapping images. The dual adjacency mesh is defined as a plurality of nodes and edges that connect a pair of the plurality of nodes. A node is defined for each image of the plurality of overlapping images, and an edge is defined when an overlap exists between a pair of images of the plurality of overlapping images. The image mosaic is presented in a display of the computing device. The image mosaic is created from the plurality of overlapping images based on the defined dual adjacency mesh.
US09275483B2	Method and system for analyzing sequential data based on sparsity and sequential adjacency One embodiment of the present invention provides a system for generating a classifier to detect patterns in a data sequence. During operation, the system receives the data sequence, which represents a sequence of measurements of a phenomenon. The system transforms the data sequence into a feature sequence that is of a higher dimensionality than a dimensionality of the data sequence, and the feature sequence is a sequence of feature vectors each created from contiguous members of the data sequence. Next, the system generates a graph where each node of the graph corresponds to a feature vector. The system converts the generated graph into a two-dimensional graph. Subsequently, the system displays, to a user, the two-dimensional graph. The system receives user input indicating that a region of the two-dimensional graph corresponds to a pattern associated with the feature sequence, and then generates a classifier based on the received user input.
US09275476B1	Multi-way and multi-thread conversation system A conversation management module receives user selections of sections in a digital media item from one or more users. The conversation management module also receives one or more comments associated with the selected sections. The conversation management module displays or provides conversation windows in a first portion of an interface, where each window associated with a selected section and displays comments associated with the selected section in the corresponding conversation window. The conversation management module also provides a list of users in a second portion of the interface and a list of keywords which appear in the comments in a third portion of the interface.
US09275472B2	Real-time player detection from a single calibrated camera A method for detecting the location of objects from a calibrated camera involves receiving an image capturing an object on a surface from a first vantage point; generating an occupancy map corresponding to the surface; filtering the occupancy map using a spatially varying kernel specific to the object shape and the first vantage point, resulting in a filtered occupancy map; and estimating the ground location of the object based on the filtered occupancy map.
US09275471B2	Method for ultrasound motion tracking via synthetic speckle patterns A method for measuring motion from biological imaging data including collecting non-carrier data images; patterning the non-carrier data images with synthetic carrier properties; and processing the patterned non-carrier data images with a carrier based motion tracking technique to generate images representing motion measurements. The method preferably converts images lacking a carrier signal to ones with a synthetic carrier signal such that highly accurate and robust speckle tracking can be achieved.
US09275468B2	Fallback detection in motion estimation Techniques related to managing the use of motion estimation in video processing are discussed. Such techniques may include determining dividing two video frames each into corresponding regions, generating phase plane correlations for the corresponding regions, determining whether the video frames are motion estimation correlated based on the phase plane correlations, and providing a video frame prediction mode indicator based on the determination.
US09275466B2	Image processing method and image processing apparatus for segmenting image into regions An image processing method includes, calculating a partial distance between a pixel of interest in an image and each of reference pixels, sequentially calculating a total distance between the pixel of interest and each of the plurality of the reference pixels based on the partial distance, determining a shortest total distance among the total distances that have been already calculated, in the sequential calculation of the total distance, and categorizing the pixel of interest based on the reference pixel corresponding to the shortest total distance, wherein, if the partial distance between the pixel of interest and a specific one of the reference pixels to be calculated is equal to or greater than the shortest total distance in the sequential calculation of the total distance, the calculation of the total distance between the pixel of interest and the specific one of the reference pixels to be calculated is omitted.
US09275461B2	Information processing apparatus, information processing method and storage medium There is provided with an information processing apparatus. An image including a target object is acquired. A coarse position and orientation of the target object is acquired. Information of a plurality of models which indicate a shape of the target object with different accuracy is held. A geometrical feature of the target object in the acquired image is associated with a geometrical feature indicated by at least one of the plurality of models placed at the coarse position and orientation. A position and orientation of the target object is estimated based on the result of association.
US09275460B2	Reference orientations for viewing panoramic images Aspects of the present disclosure relates generally to deciding which part of a panoramic image is most important and using that as a reference point for displaying the panoramic image to user. For example, a 360 degree panoramic image associated with orientation and location information may be identified. Related images, for example, in content and location may also be identified. The related images may be projected as points on a unit circle representing the orientations of the panoramic image. The point farthest from an average location of the points may be removed until the average location of the points is at least a minimum distance from the center of the circle. When this occurs, an angular location of the average location relative to the circle may be identified as a reference orientation. The reference orientation may be associated with the panoramic image, and the association may be stored in memory.
US09275457B1	Real-time subject-driven functional connectivity analysis A method and associated systems for real-time subject-driven functional connectivity analysis. One or more processors receive an fMRI time series of sequentially recorded, masked, parcellated images that each represent the state of a subject's brain at the image's recording time as voxels partitioned into a constant set of three-dimensional regions of interest. The processors derive an average intensity of each region's voxels in each image and organize these intensity values into a set of time courses, where each time course contains a chronologically ordered list of average intensity values of one region. The processors then identify time-based correlations between average intensities of each pair of regions and represent these correlations in a graphical format. As each subsequent fMRI image of the same subject's brain arrives, the processors repeat this process to update the time courses, correlations, and graphical representation in real time or near-real time.
US09275456B2	Image search engine An embodiment of the current invention includes a non-invasive imaging system, comprising: an imaging scanner suitable to generate an image representing a tissue region of a subject under observation, the tissue region having at least one substructure and the image comprising a plurality of image voxels; a signal processing system in communication with the imaging scanner to receive the imaging signal from the imaging scanner; and a data storage unit in communication with the signal processing system, wherein the data storage unit is configured to store: an atlas comprising spatial information of the at least one substructure in the tissue region, and a database comprising a plurality of pre-stored medical images representing the tissue region, and wherein the signal processing system is adapted to: identify, based on the atlas and for each of the at least one substructure, a corresponding portion of image voxels in the image; provide a computed quantification of the corresponding portion of image voxels for each of the at least one substructure of the tissue region by performing spatial filtering on the image; and search the database to provide at least one selected medical image from the plurality of pre-stored medical images, the at least one selected medical image having a corresponding quantification that is substantially similar to the computed quantification.
US09275453B2	Image processing device and image processing method An image processing device includes an extraction process executing unit that extracts a 3-dimensional initial region satisfying a predetermined condition from the volume data, a region correction process executing unit that extracts a 3-dimensional corrected region by performing a correction process on the initial region, and a visualization process executing unit that generates a plurality of cross-sectional diagrams of the 3-dimensional image from the volume data and outputs at least some of the plurality of cross-sectional diagrams. When the initial region is displayed, one or more cross-sectional diagrams having voxels in the initial region are outputted so that the voxels included in the initial region are distinguishable from other regions. When the corrected region is displayed, one or more cross-sectional diagrams having voxels in the corrected region are outputted so that the voxels included in the corrected region are distinguishable from other regions.
US09275452B2	Method and system for automatically determining compliance of cross sectional imaging scans with a predetermined protocol A method of verifying compliance of a cross sectional imaging scan of a subject is provided, which includes determining one or more body volumes covered by the cross sectional imaging scan, and for each of the determined one or more body volumes, locating a presence of at least a portion of one or more internal organs of the subject encompassed in a corresponding determined volume, thereby verifying whether the cross sectional imaging scan is compliant with predetermined criteria. The predetermined criteria can be body coverage criteria for a scan of one or more body regions of the subject. Additionally, a method for verifying whether an image series of a cross sectional imaging scan is performed with contrast is provided.
US09275443B2	Image-processing apparatus for removing haze contained in video, and method therefof An image processing apparatus includes a haze brightness measurer to measure haze brightness in an image containing haze, a transmission estimator to estimate a blockwise transmission for generating a least final cost function value that is calculated by using a contrast, an image loss and a time loss of the image and to estimate a pixelwise transmission based on the estimated blockwise transmission, and an image reconstructor to reconstruct the image by using the measured haze brightness and the estimated pixelwise transmission.
US09275442B2	Gradient assisted image resampling in micro-lithographic printing The present disclosure relates to the re-sampling of pixel data, with one application being micro-lithography. In particular, it relates to a first pixel map, including a plurality of white, black and grey scale pixels and gradient directions for one or more of the grey scale pixels, that is resampled to produce a second pixel map using edge geometry data generated from the gradient directions and grey scale values.
US09275439B2	Image processing apparatus, control method thereof and computer-readable storage medium A subtraction image is generated by performing subtraction between a mask image serving as a radiation image obtained by capturing an object, at least of a specific region of which does not include contrast medium, and a live image serving as a radiation image obtained by capturing the object which includes the contrast medium. The emphasis degree serving as the degree of emphasis processing for the subtraction image is determined based on at least either the mask image or live image. The emphasis processing is performed for the subtraction image based on the emphasis degree.
US09275425B2	Balancing provenance and accuracy tradeoffs in data modeling Generating a data model may include receiving a raw data set and generating a first repository based on a first set of features of the raw data set, a second repository having a second set of features based on an aggregation of features of the first repository, and a third repository having a third set of features based on the first and second features sets. The data model may be generated based on a tradeoff between accuracy and provenance of the model.
US09275420B1	Changing user profile impression The disclosure includes a system and method for changing user profile impression. The system includes a controller, a preview module, a determination module and a graphical user interface module. The controller receives an input describing a selection of a profile impression from a user. The preview module determines profile preview data based at least in part on the selection and source data describing one or more user activities. The determination module receives user review data that describes a user review input based at least in part on the profile preview data. The determination module determines profile impression data based at least in part on the profile preview data and the user review data. The graphical user interface module determines graphical data based at least in part on the profile impression data.
US09275419B1	Method for building, expanding or complementing a social graph based on contact information A system and machine-implemented method includes receiving, using the one or more computing devices, a contact list associated with a first account of a first user on a first service, the first user having an account on a social networking site and the first service being different from the social networking site, receiving, using the one or more computing devices, at least another contact list associated with an account of another user, analyzing, using the one or more computing devices, the contact list with respect to the another contact list in order to determine a shared metric between the lists, and based at least in part on the determined shared metric, suggesting to the first user, the another user as a friend in the social networking site.
US09275407B2	Systems and methods to implement point of sale (POS) terminals, process orders and manage order fulfillment Systems and methods to integrate point of sale processing, online order processing, and supply chain and store management over the Internet. In one aspect, a central server provides point of sale, online order processing, and supply chain and store management functions via browser based interfaces. The system enables users to enter orders from remote locations for order fulfillment at brick and mortar retail locations, where the POS terminals configured based on the browser based interfaces can be changed into a self service mode to allow customers to place orders for themselves at the retail locations.
US09275406B2	Method and system of vending a copy of a digital image A method of vending a physical copy of a digital image includes embedding a version of the digital image and software for purchasing the physical copy of the image from an online image provider into source code for a website, such that, when the website is displayed, the version of the digital image is displayed and the software for purchasing is controlled through a user interface displaying the website.
US09275405B1	Content provider sponsored data services system and methods A method of providing data communication services is provided. The method comprises a mobile electronic device establishing a data connection to a content source, a gateway creating a record comprising information related to the data connection and providing the record to a server, and the server charging the content source for the data connection and providing at least a part of the record to the content source.
US09275398B1	Obtaining metrics for client-side display of content Active script can be provided with content to be displayed on a computing device to determine whether advertising, intended to be displayed with the content, is actually displayed by the computing device. The script can examine various aspects of the code used to render the content, to determine whether ad-blocking software is blocking the ad or something is otherwise preventing the advertising from being displayed. Information about the visibility of the advertising can be sent to a location such as a logging service, which can store the data until such time as the data is to be retrieved and processed, such as to determine an extent to which client devices are blocking ads to be displayed with content.
US09275396B2	Personalized discount keys for enterprise online stores The present disclosure relates to computer-implemented methods, software, and systems for generating and using discount keys associated with a particular sales person in association with sales within an enterprise online store. One example process includes operations for (i) identifying a discount key at a sales system associated with a prospective sale negotiated between a sales person and a prospective customer, (ii) determining at least one item associated with the identified discount key, (iii) determining at least one discount associated with the determined items associated with the identified discount key, (iii) facilitating completion of the prospective sale at the sales system for the prospective customer based on the at least one determined discount associated with the at least one determined item, and (iv) associating the completion of the prospective sale at the sales system with a sales account for the sales person.
US09275395B2	Optimization of social media engagement Methods for optimizing social media are disclosed. Such methods may include identifying at least one keyword utilized for at least one webpage, identifying social media correspondence referencing the at least one keyword, analyzing content collected from the social media to determine a frequency of references to the at least one keyword and generating at least one report including information based on the analysis. The report may include recommendations for optimizing social media by, for example, increasing visibility by using high-performing keywords. Systems for performing the methods are also disclosed.
US09275393B2	Recipe suggestion system and method A computer-implemented method is disclosed herein. The method includes the step of storing, in a consumer purchase history database, identities of items purchased by a consumer. The method also includes the step of receiving, with a processing device of a recipe suggestion server, a recipe request signal from the consumer after said storing step. The method also includes the step of maintaining, in a recipe database, a plurality of recipes wherein each recipe is defined by a plurality of ingredients. The method also includes the step of comparing, with the processing device, the identities of items purchased by the consumer with the respective plurality of ingredients associated with one or more of the plurality of recipes. The method also includes the step of transmitting, with the processing device, at least one of the plurality of recipes to the consumer wherein the plurality of ingredients of the at least one of the plurality of recipes is correlated with the identities of items purchased by the consumer.
US09275389B1	Modular device payment system A modular device payment module includes a chassis. A modular device connector is located on the chassis. A payment module database in the chassis stores funding source information and security information. A payment module engine in the chassis determines that the modular device connector has been connected to a modular device frame of a modular device, and retrieves modular device identifying information from the modular device. The payment module then determines that the modular device identifying information matches an authorized modular device identified by the security information in the payment module database and, in response, enables the transmission of at least some of the funding source information from the payment module database to conduct a payment transaction.
US09275386B2	Method for facilitating payment with a programmable payment card One variation of a method for facilitating payment with a payment card includes: in response to an input on the surface of the payment card exceeding a first input threshold magnitude, transitioning from the off state into a primary payment mode; in the primary payment mode, activating a first timer of a first duration; in response to expiration of the first timer prior to a magnetic read head proximal the payment card, transitioning from the primary payment mode into a sleep state; in response to an input on the surface of the payment card exceeding a second input threshold in the sleep state, transitioning into a secondary payment mode; in the secondary payment mode, activating a second timer of a second duration less than the first duration; and driving a magnetic stripe emulator within the payment card according to a magnetic sequence command corresponding to a magnetic stripe card.
US09275384B2	Point of sale payment system A method for point of sale payments includes receiving, from a seller device over a network, payment information. The payment information is associated with payment code information in a database. The payment code information is then sent to the seller device over the network for posting at a service location. The payment code information is then captured by a payer device at the service location and transmitted over the network. The payment information is then retrieved from the database using the associated payment code information. The payment information is then sent to the payer device over the network. A payment confirmation is received from the payer device over the network and, in response, a payment from a payer account to a seller account is initiated and the payment information and an indication of the payment confirmation is sent to the seller device over the network.
US09275380B1	Card activated automated teller machine and method A method and system is provided that enables generation of messages for various types of card activated terminal devices such as automated teller machines. Automated teller machines operate responsive to a variety of ATM message formats. The transaction processing system may generate ATM messages one of the ATM message formats using information associated with the ATM message format that is stored in a data store. The transaction processing system may include among its software components a message gateway router (MGR) which is operate to use information stored in the data store to convert messages from an internal message format to a variety of external message formats used by the automated teller machine.
US09275377B2	System, method, and computer program product for determining a monotonic set of presets A system, method, and computer program product are provided for determining a monotonic set of presets. In use, a plurality of parameters associated with a product or service is identified. Additionally, a monotonic set of presets associated with the product or service are determined, based on the plurality of parameters.
US09275376B2	Method and apparatus for providing soft reminders An approach is provided for presenting soft reminders (e.g., reminders for notes with no triggering criteria). A reminder manager receives an input, from a user, for specifying a note. The note is not associated with triggering criteria. In response to the request, the reminder manager retrieves contextual information from a device associated with the user, and causes, at least in part, presentation of a reminder of the note based, at least in part, on the contextual information.
US09275374B1	Method and apparatus for pre-fetching place page data based upon analysis of user activities A computer-implemented method and system for pre-fetching label and place page data from a remote, backend mapping system, and subsequently displaying the pre-fetched data, is disclosed. User activity data generated by execution of an application on the mobile device may be analyzed to determine geographic locations that indicate places the user is likely to be in the future. The user activity data may be analyzed at either the frontend or the backend to determine these geographic locations. Label and place page data corresponding to the geographic locations may then be retrieved from the mapping system and stored in a cache memory of the mobile computing device. The label and place page data may describe map features and include plain text, a data feed, or a URL. During periods of reduced connectivity to the mapping system, the mobile device may retrieve the stored label and place page data from the cache memory.
US09275370B2	Virtual interview via mobile device A device executes a virtual interview application, and receives first user input, via the virtual interview application, to create multiple first media clips for a first virtual interview, with each of the first media clips including a different interview question. The device submits, from the device to a remote network device, the multiple first media clips for conducting the first virtual interview with a plurality of first interviewees.
US09275365B2	Integrated productivity services The present disclosure involves systems, software, and computer implemented methods for providing integrated productivity services. One process includes operations for determining a context associated with a user of an application, identifying a user productivity feature for integration with an existing feature of the application based on the context, and augmenting a user interface of the application with a graphical object representing the user productivity feature. In some instances, the context can include an integration context defining a particular release version associated with the application. The context can also or alternatively include a role context defining a particular role of the user of the application within an organization, wherein the particular role is associated with a set of permissions or common tasks performed by the particular role. Still further, the context can include a user context defining a personal preference or habit of the user.
US09275364B2	Semantic configuration in a business process platform In an embodiment, a method is provided for customizing a task associated with a business process. In this method, a business process platform is accessed. The business process platform includes a business process definition and a provider semantic configuration. A group semantic configuration is generated, where the group semantic configuration extends the provider semantic configuration. A task defined in the business process definition is the customized based on the group semantic configuration.
US09275361B2	Out of stock sensor A weight sensing system for retail shelves includes multiple shelves having an electrical communication and power distribution system, and weight sensors located on the top surfaces of the shelves and coupled to the electrical communication and power distribution system for detecting the placement of retail products on the shelves. A controller monitors real-time at-the-shelf inventory and issues alerts when a retail product becomes out-of-stock, is anticipated to become out-of-stock, or is misplaced on a shelf. Collection of real-time inventory data enables comprehensive inventory control at the shelf and in storage areas.
US09275357B2	Method and system for retrieving and serving regulatory history for a property Described is a method and system for retrieving and serving the regulatory history of a property. An identification of data sources for permits and approvals is stored in a computer system. Property identifiers from the data sources are stored in the computer system. The system identifies the types of permit and approval data available from each of the data sources for each of the property identifiers. A determination can be made of the completeness of the regulatory history available for each property associated with each of said property identifiers. The system receives a request for the regulatory history of at least one of the properties associated with the property identifiers. A web page is populated with a list of the regulatory history for the property.
US09275355B2	Business process model analyzer and runtime selector In a method for determining appropriate runtime environments for execution of a process model, a computer receives a process model. The process model includes a plurality of activities, wherein two activities are linked by a relationship. The computer determines that the two activities linked by a relationship match a process pattern. The computer determines one or more runtime environments for execution of the process model, wherein each of the one or more runtime environments is capable of executing the process pattern.
US09275352B1	System and method to automate livery vehicle scheduling from airline itinerary data A system, method, and computer-readable storage medium to automate livery vehicle scheduling from airline itinerary data retrieved from cardholder spending.
US09275351B2	Graphical user interface for travel planning system A user interface for presenting travel itineraries to a user includes an itinerary region for displaying travel itineraries and a filter region. Each travel itinerary has a corresponding value for a first travel criterion and the travel itineraries are grouped into categories based on the values of the first travel criterion. The filter region includes a plurality of cells, each of which is associated with one of the categories of travel itineraries. When a user selects a cell, the itinerary region displays only travel itineraries in the category associated with the selected cell.
US09275346B2	Flight caching methods and apparatus According to some aspects, a system is provided comprising at least one computer readable storage medium storing a cache of flight information comprising a plurality of flight solutions, the cache capable of being accessed to obtain flight solutions that meet a criteria specified in one or more flight search queries, and at least one computer programmed to apply at least one machine learning model to at least some of the flight information in the flight information cache to classify at least one of the plurality of flight solutions according to an assessed fidelity of the at least one flight solution, and perform at least one action based on the classified at least one flight solution.
US09275345B1	System level user behavior biometrics using feature extraction and modeling The interaction of a plurality of users with a computer system is monitored and measurements are made of different features of this interaction such as process creation, registry key changes, and file system actions. These measurements are then analyzed to identify those features that are more discriminatory. The set of features is then used to develop for each user a model of his/her interaction with the computer system that can then be used to authenticate that user when interacting with the computer system at a later time. Advantageously, these steps are performed automatically and may be performed periodically or even continuously to verify that each user of the computer system is indeed the individual he/she purports to be. Illustratively, the feature extraction is performed using Fisher's criteria; and the user model is developed using a Gaussian mixture model. A method for updating the user model is also disclosed.
US09275344B2	Computer-implemented system and method for generating a reference set via seed documents A computer-implemented system and method for generating a reference set via seed documents is provided. A collection of documents is obtained. One or more seed documents are identified. The seed documents are compared with the document collection and those documents that are similar to the seed documents are identified as reference set candidates. A size threshold is applied to the reference set candidates, which are grouped as the reference set when the size threshold is satisfied.
US09275337B2	Device, system, and method of detecting user identity based on motor-control loop model Device, system, and method of detecting identity of a user based on motor-control loop model. A method includes: during a first session of a user who utilizes a pointing device for interacting with a computerized service, monitoring the pointing device dynamics and gestures of the user; based on the monitored dynamics and gestures, estimating parameters that characterize a sensorimotor control loop model of the user; storing in a database a record indicating that the user is associated with the parameters that characterize the sensorimotor control loop model of the user.
US09275330B2	Multi-compartment neurons with neural cores Embodiments of the invention provide a neural core circuit comprising a synaptic interconnect network including plural electronic synapses for interconnecting one or more source electronic neurons with one or more target electronic neurons. The interconnect network further includes multiple axon paths and multiple dendrite paths. Each synapse is at a cross-point junction of the interconnect network between a dendrite path and an axon path. The core circuit further comprises a routing module maintaining routing information. The routing module routes output from a source electronic neuron to one or more selected axon paths. Each synapse provides a configurable level of signal conduction from an axon path of a source electronic neuron to a dendrite path of a target electronic neuron.
US09275329B2	Behavioral homeostasis in artificial nervous systems using dynamical spiking neuron models Methods and apparatus are provided for implementing behavioral homeostasis in artificial neurons that use a dynamical spiking neuron model. The homeostatic mechanism may be driven by neuron state, rather than by neuron spiking rate, and this mechanism may drive changes to the neuron temporal dynamics, rather than to contributions of input or weights. As a result, certain aspects of the present disclosure are a more natural fit with spiking neural networks and have many functional and computational advantages. One example method for implementing homeostasis of an artificial nervous system generally includes determining one or more state variables of a neuron model used by an artificial neuron, based at least in part on dynamics of the neuron model; determining one or more conditions based at least in part on the state variables; and adjusting the dynamics based at least in part on the conditions.
US09275326B2	Rate stabilization through plasticity in spiking neuron network Apparatus and methods for activity based plasticity in a spiking neuron network adapted to process sensory input. In one embodiment, the plasticity mechanism may be configured for example based on activity of one or more neurons providing feed-forward stimulus and activity of one or more neurons providing inhibitory feedback. When an inhibitory neuron generates an output, inhibitory connections may be potentiated. When an inhibitory neuron receives inhibitory input, the inhibitory connection may be depressed. When the inhibitory input arrives subsequent to the neuron response, the inhibitory connection may be depressed. When input features are unevenly distributed in occurrence, the plasticity mechanism is capable of reducing response rate of neurons that develop receptive fields to more prevalent features. Such functionality may provide network output such that rarely occurring features are not drowned out by more widespread stimulus.
US09275320B2	Financial transaction product with electrical assembly and face panel A financial transaction product includes a housing, an electrical assembly, a button, a face panel, and an account identifier. The housing includes a panel having an outside surface. The electrical assembly is maintained within the housing and includes an activation switch and at least one of a light and a speaker. Movement of the activation switch causes activation of the electrical assembly including at least one of illumination of the light and audio emission via the speaker. The button is separate from the housing and the electrical assembly and positioned over the activation switch. The face panel is formed separately from the housing and secured to the outside surface extending over the button such that user interaction with the activation switch is performed at least partially via the face panel and the button. The account identifier is coupled with the housing and associates the product with an account or record.
US09275318B2	Image forming system for partially generating images as log image An image forming system includes a job execution unit and a log-image generating unit. The job execution unit is configured to execute a job. The log-image generating unit configured to generate a log image in the job. The log-image generating unit is configured to partially generate as the log image an image of a page output by the job execution unit among pages in the job.
US09275317B2	Color prediction system and color prediction method A color prediction system includes: database storing absorption/scattering coefficients of each primary color ink; sections for: selecting a spot color ink as a combination of primary color inks that reproduce a colorimetric value of a color sample, reading absorption and scattering coefficients of the primary color inks of a reference spot color from the database, obtaining absorption and scattering coefficients of the spot color ink of a specified formulation ratio, and calculating a spectral reflectance of the spot color ink to be reproduced; obtaining a reproduced color from the spectral reflectance; obtaining a difference from the colorimetric value of the color sample and correcting the formulation ratio to calculate a formulation ratio with an allowable difference; and calculating a Neugebauer primary color of overprinted spot color inks from the absorption and scattering coefficients of the spot color inks calculated at formulation ratios determined by the formulation ratio determination section.
US09275316B2	Method, apparatus and system for generating an attribute map for processing an image A method of generating an attribute map for processing an image. An image encoded into a plurality of segments is received. Each segment is characterized by a position within a base region associated with the image and is encoded according to a corresponding encoding format. A segment from the plurality of segments is decoded into a sub-image. The sub-image is associated with a combination operation and an attribute value derived based on at least one of a segment decoding format and a segment encoding format. The combination operation determines a process of combining the sub-image with the underlying base region. An information-carrying pixel value in the sub-image is determined based on the sub-image pixel content and the attribute value associated with the sub-image. The attribute map for processing the image is generated using the attribute value associated with the sub-image for at least one pixel of the attribute map.
US09275309B2	System and method for rapid face recognition A face recognition method is provided to use sparse representation and regularized least squares-based classification on a computing device. The method includes obtaining an image to be recognized as a test sample y and a set of training images of certain subjects as training sample matrix T, obtaining a sparse representation of the test sample and the training samples including an initial estimation of a sparse vector a, and constructing a new face dictionary comprising training samples with non-zero corresponding coefficients in the sparse vector a for the initial estimation. The method also includes obtaining new coefficients by solving a regularized least squares problem based on the constructed new face dictionary, and determining a face identity of the test sample based on minimum class residual calculated by using the new coefficients.
US09275303B2	Method for constructing a composite image incorporating a hidden authentication image A method is provided for constructing a composite image having an authentication image formed therein. The authentication image is viewable using a decoder lens having one or more decoder lens frequencies. The method includes generating two gray-scale component images having tonal areas that are tonally balanced around at least one tonal value. At least one of the two gray-scale component images includes a representation of the authentication image. The method further includes determining a first pattern of the component image elements for the two gray-scale component images, the first pattern including a first element configuration and at least one element frequency that is equal to or a multiple of one of the decoder lens frequencies. The method includes extracting at least a portion of the content from the component image elements of the two gray-scale component images and constructing a composite image having a second pattern of composite image elements.
US09275302B1	Object detection and identification A two-dimensional (2D) image and a three-dimensional (3D) of an environment may be captured. Upon identifying a location and/or contour of an object from the 3D image, the object from the 3D image may be mapped onto the 2D image. The object, including its location and contour, may be identified from the 2D image. Based at least partly on a comparison between the object from the 3D image and the object from the 2D image, a disparity may be calculated. The location and contour of the object may be determined when it is determined that the disparity is less than or equal to a predetermined threshold. Otherwise, the object from the 3D image may be remapped onto the 2D image.
US09275300B2	Method and apparatus for generating image description vector, image detection method and apparatus This invention relates to a method and an apparatus for generating an image description vector, an image detection method and apparatus. The method for generating an image description vector comprising: an encoding step of encoding each of a plurality of pixel regions of an image into M pieces of N-bit binary codes, wherein each bit of an N-bit binary code represents a neighboring pixel region which is in neighborhood of a corresponding pixel region; and a generating step of generating an image description vector of the image based on matching at least one of the M pieces of N-bit binary code of each pixel region of the plurality of pixel regions with a particular code pattern, where M is an integer of 3 or larger, and N is an integer of 3 or larger.
US09275298B2	Material classification using specular gloss Gloss-based material classification of an object fabricated from an unknown material, particularly where the unknown material is one from a limited set of predetermined materials. The object is illuminated with an area light source such that the object is illuminated from multiple angles. An image of the object is obtained, and specular reflections from the object are measured by analyzing the image. The object material is classified based on a number of high-intensity specular reflections.
US09275295B1	Noise estimation based on a characteristic of digital video Systems and methods are provided for determining a characteristic of video data. A set of N frames of the video data is obtained and filtered using at least one filter to produce a set of N×T blocks of filtered video data, where T is a partition size associated with the at least one filter. Each block in the set of N×T blocks is classified as either a first type block or a second type block. A subset of blocks in the set of N×T blocks is associated with a corresponding frame from the set of N frames. The characteristic of video data is determined based, at least in part, on the subset of blocks in the set of N×T blocks that are associated with the frame.
US09275289B2	Feature- and classifier-based vehicle headlight/shadow removal in video A method for removing false foreground image content in a foreground detection process performed on a video sequence includes, for each current frame, comparing a feature value of each current pixel against a feature value of a corresponding pixel in a background model. The each current pixel is classified as belonging to one of a candidate foreground image and a background based on the comparing. A first classification image representing the candidate foreground image is generated using the current pixels classified as belonging to the candidate foreground image. The each pixel in the first classification image is classified as belonging to one of a foreground image and a false foreground image using a previously trained classifier. A modified classification image is generated for representing the foreground image using the pixels classified as belonging to the foreground image while the pixels classified as belonging to the false foreground image are removed.
US09275288B2	Lane recognition system and method using defog sensor Disclosed herein is a lane recognition system using a defog sensor, including: a defog sensor mounted in a defogging system of a vehicle; an imaging unit mounted on a windshield of the vehicle so as to image the front of the vehicle; and an integrated control unit configured to analyze a defog sensor signal received from the defog sensor, process an image signal received from the imaging unit based on the analyzed defog sensor signal, and acquire lane information.
US09275283B2	Fundus image processing apparatus and fundus observation apparatus To provide the status of the cribrosa lamina of an eye of a living body as diagnostic material. A tomographic image forming part 232 of a fundus observing device 1 forms a horizontal tomographic image Wi based on a three-dimensional image V of a fundus Ef. A cribrosa-lamina region specifying part 233 specifies a cribrosa-lamina region Uj by analyzing the horizontal tomographic image Wi. A hole region specifying part 234 specifies a hole region Pk in the cribrosa-lamina region Uj by analyzing the horizontal tomographic image Wi. The distribution information generating part 235 generates distribution information representing the distribution of the hole region Pk in the cribrosa-lamina region Uj based on the specifying results of the cribrosa-lamina region Uj and the hole region Pk. This distribution information is displayed by a display 240.
US09275280B2	Information processing system and method for document management An information processing apparatus includes an acquisition unit that acquires region information, line information, and character information, a determination unit that determines whether or not a region is in left alignment, a first division unit that divides a region including a character indicated by character information into paragraph regions or itemized regions, an analysis unit that analyzes an indent of a line in a region determined as being in left alignment by the determination unit, a second division unit that divides the region determined as being in left alignment by the determination unit into paragraph regions or itemized regions, and an output unit that outputs the division result by the first division unit for the region determined as not being in left alignment by the determination unit, and the division result by the second division unit for the region determined as being in left alignment by the determination unit.
US09275277B2	Using a combination of 2D and 3D image data to determine hand features information A method of determining hand features information using both two dimensional (2D) image data and three dimensional (3D) image data is described. In one implementation, a method includes: receiving a 2D image frame; receiving 3D image data corresponding to the 2D image frame; using the 3D image data corresponding to the 2D image frame, transforming the 2D image frame; and using the 3D image data corresponding to the 2D image frame, scaling the 2D image frame, where the transforming and scaling results in a normalized 2D image frame, where the normalized 2D image frame is a scaled and transformed version of the 2D image frame, and where the scaling and transforming is performed using a computer.
US09275276B2	Posture estimation device and posture estimation method A posture estimation device that is capable of highly precisely estimating the posture of an object comprising multiple parts. Said device (100) comprises: a posture information database (110) that for each of multiple postures, holds posture information that defines the placement of multiple parts; a fitting unit (160) that computes, for each of the parts in an image, a correlation level between the placement of the parts and the posture information; a difficulty level information table (130) that holds an estimation difficulty level that is a degree of difficulty of estimating each part position and computed on the basis of each parallel line components of each of the parts contained in the posture information; and a posture estimation unit (170) that to the correlation level, applies a weighting based on the estimation difficulty level, and on the basis of the weighted correlation level, estimates the posture of the object.
US09275274B2	System and method for identifying handwriting gestures in an in-vehicle information system An in-vehicle information system includes a camera and a controller that accept gesture input. A controller receives frames of video data and generates trajectory data for a movement of a hand in the video data. The controller uses a first hidden Markov model (HMM) to decode a sequence of strokes from the trajectory data, removes a starting and ending stroke to form an edited stroke sequence, and re-normalizes the strokes in the edited stroke sequence. The controller uses a second HMM corresponding to a predetermined set of characters to identify a character corresponding to the re-normalized edited stroke sequence.
US09275273B2	Method and system for localizing parts of an object in an image for computer vision applications A system is provided for localizing parts of an object in an image by training local detectors using labeled image exemplars with fiducial points corresponding to parts within the image. Each local detector generates a detector score corresponding to the likelihood that a desired part is located at a given location within the image exemplar. A non-parametric global model of the locations of the fiducial points is generated for each of at least a portion of the image exemplars. An input image is analyzed using the trained local detectors, and a Bayesian objective function is derived for the input image from the non-parametric model and detector scores. The Bayesian objective function is optimized using a consensus of global models, and an output is generated with locations of the fiducial points labeled within the object in the image.
US09275272B2	Tag suggestions for images on online social networks In one embodiment, a method includes accessing an image portraying at least a first person, accessing a social graph, determining a social-graph affinity for a first set of users, determining a facial-recognition scores for the first set of users based on the social-graph affinity for each user and a facial-representation associated with each user, where the facial-representation for each user is compared with the image, and generating one or more tag suggestions for the first person portrayed in the image based on the facial-recognition scores.
US09275270B2	Information processing apparatus and control method thereof This invention provides a technique which can enhance personal recognition precision in personal recognition processing of a face in an image. To this end, a management unit classifies feature patterns each including feature information of a plurality of parts of a face region of an object extracted from image data, and manages the feature patterns using a dictionary. A segmenting unit determines whether or not feature information of each part of the face region of the object is segmented, and segments the feature information of the part of interest into a plurality of feature information as new feature information. A registration unit registers a feature pattern as a combination of the new feature information of the part of interest and feature information of parts other than the part of interest in the dictionary as a new feature pattern of the object.
US09275269B1	System, method and apparatus for facial recognition A method for recognizing a face in an image is performed by a facial recognition system. The system retrieves an image and detects a face within the image. The system then determines a set of facial feature positions for a set of facial features. The set of facial feature positions are used to separate the face into a set of facial feature parts. For each part, the system extracts a set of image features. The extracted features are concatenated into a full feature. The system performs dimension reduction on the full feature to derive a final feature. In addition, although narrow claims may be presented below, it should be recognized that the scope of this invention is much broader than presented by the claim(s). It is intended that broader claims will be submitted in one or more applications that claim the benefit of priority from this application. Insofar as the description above and the accompanying drawings disclose additional subject matter that is not within the scope of the claim or claims below, the additional inventions are not dedicated to the public and the right to file one or more applications to claim such additional inventions is reserved.
US09275261B2	Chip-and-pin reader device The invention provides a chip-and-PIN reader device having a slot for accommodating a chip-and-PIN card, a set of electrodes adapted to come into contact with corresponding electrodes on the card when the card is inserted into the slot, and a means for ensuring correct registration between the electrodes on the card and the set of electrodes of the reader device. The means for ensuring correct registration may include two orthogonally disposed walls of the slot, against which the card is pushed. Alternatively, the means may include a pair of electrodes on each side of the set of electrodes of the reader, which are short-circuited when the chip electrodes are not correctly registered with the reader electrodes. The short-circuit is flagged to the user of the card. The reader may also be equipped to read an MSR-type device.
US09275253B2	System, method and computer program product for sharing tenant information utilizing a multi-tenant on-demand database service In accordance with embodiments, there are provided mechanisms and methods for sharing tenant information utilizing a multi-tenant on-demand database service. These mechanisms and methods for sharing tenant information utilizing a multi-tenant on-demand database service can allow automatic sharing of information owned by a first tenant with other tenants of the multi-tenant on-demand database service. In this way, collaboration among tenants of the multi-tenant on-demand database service may be enabled via the sharing of the tenant information.
US09275252B2	Enhanced view compliance tool According to one embodiment, an apparatus comprises a network interface and a processor communicatively coupled to the network interface. The network interface communicates with a database comprising a plurality of columns and a plurality of views. Each view is associated with at least one column of the plurality of columns. The processor receives a request to determine one or more noncompliant views of the database. For each view and each column associated with the view, the processor determines whether the column is associated with a privacy indicator that indicates that the column should be masked and whether the view masks the column. The processor then determines that the view is noncompliant if the view does not mask at least one column that should be masked, and generates a report that indicates whether each view of the database is noncompliant. The network interface communicates the report.
US09275248B1	Updating processor microcode Approaches are described for updating code and/or instructions in one or more computing devices. In particular, various embodiments provide approaches for updating the microcode of one or more processors of a computing device without requiring a restart of the computing device and without disrupting the various components (e.g., applications, virtual machines, etc.) executing on the computing device. The microcode updates can be performed on host computing devices deployed in a resource center of a service provider (e.g., cloud computing service provider), where each host computing device may be executing a hypervisor hosting multiple guest virtual machines (or other guest applications) for the customers of the service provider.
US09275246B2	System and method for static detection and categorization of information-flow downgraders A system and method for static detection and categorization of information-flow downgraders includes transforming a program stored in a memory device by statically analyzing program variables to yield a single assignment to each variable in an instruction set. The instruction set is translated to production rules with string operations. A context-free grammar is generated from the production rules to identify a finite set of strings. An information-flow downgrader function is identified by checking the finite set of strings against one or more function specifications.
US09275239B2	Transaction gateway According to one aspect of an example, there is provided a transaction gateway in a first network for receiving a transaction from the first network and for sending the transaction to a transaction processor in a second network. The transaction gateway is arranged to identify restricted data in the transaction, to modify the received transaction by replacing identified restricted data with replacement data different to the identified restricted data, and to send the modified transaction to the transaction processor in the second network.
US09275235B2	Method and system for preventing unauthorized recording of media content on an apple operating system A method for preventing unauthorized recording of media content on an Apple operating system (OS). The present method registers a compliance mechanism on a client system having the Apple OS operating thereon. The compliance mechanism comprises a framework for validating the compliance mechanism on the client system, and a multimedia component opened by the framework. The present method uses the multimedia component for decrypting the media content on the client system. The present method also prevents decryption of the media content on the client system having the Apple OS operating thereon if a portion of the compliance mechanism is invalidated.
US09275234B2	Protecting data on a mobile device A password protection application is executed on a mobile device and provides an interface by which an authorized user can define and configure a “data protection profile” for the device. This profile defines at least one security event (criteria or condition) associated with the device, and at least one protection action that should occur to protect data on the device upon the triggering of the event. Once defined in a profile, the application monitors for the occurrence of the security event. Upon the occurrence of the specified event, the protection action is enforced on the device to protect the data.
US09275233B1	Generation and use of a modified protected file Generating a modified protected file is disclosed, including: creating a modified protected file at least in part by embedding a protected file into an at least partially unprotected file; and modifying a set of content type information included in the at least partially unprotected file to include a content type associated with the protected file as embedded. Using the modified protected file is disclosed, including: receiving, using a processor, a data access operation to an at least partially unprotected file; determining that the at least partially unprotected file includes a portion associated with a content type associated with embedded protected content; and redirecting the data access operation to the portion of the at least partially unprotected file associated with the content type associated with embedded protected content.
US09275231B1	Method and apparatus for securing a computer using an optimal configuration for security software based on user behavior A method and apparatus for securing a computer using an optimal configuration for security software based on user behavior is described. In one embodiment, the method for providing an optimal configuration to secure a computer based on user behavior includes examining computer user activity to produce behavior indicia with respect to computer security from malicious threats and determining an optimal configuration for security software based on the behavior indicia.
US09275230B2	Communication with a virtual trusted runtime BIOS A computing system and a method of communicating with a virtual trusted runtime BIOS. The computing system can include hardware and a virtual machine monitor. A virtual trusted runtime BIOS can be managed by the virtual machine monitor. A communication channel can communicate with the virtual trusted runtime BIOS. The communication channel can be secured by a secure socket layer.
US09275225B2	Linear address mapping protection Technologies for securing an electronic device include determining addresses of one or more memory pages, injecting for each memory page a portion of identifier data into the memory page, storing an indication of the identifier data injected into each of the memory pages, determining an attempt to access at least one of the memory pages, determining any of the identifier data present on a memory page associated with the attempt, comparing the indication of the identifier data with the determined identifier data present on the memory page, and, based on the comparison, determining whether to allow the access.
US09275221B2	Context-aware permission control of hybrid mobile applications Controlling access to secure resources of a data processing system is provided. An input-to-output mapping of an application installed on the data processing system is generated that determines whether a secure resource in the data processing system is shared with an external entity associated with the application and under what specified conditions. It is determined whether the specified conditions exist during runtime of the application. In response to determining that the specified conditions do not exist during runtime of the application, sharing of the secure resource of the data processing system with the external entity associated with the application is prevented. In response to determining that the specified conditions do exist during runtime of the application, sharing of the secure resource of the data processing system with the external entity associated with the application is allowed.
US09275219B2	Unauthorized account access lockout reduction A method and system for determining unauthorized account access is provided. The method includes receiving a username of a user and a passcode for access to a secure account or device belonging to a user. The passcode is determined to be incorrect. Unauthorized access attempts with respect to the secure account or the device are determined based on based on the incorrect passcode and in response, a quality factor associated with the incorrect passcode with respect to the secure account or device is determined. The quality factor is compared to a threshold value. Security functions associated with the secure account or device with respect to the incorrect passcode and the results of the comparison are performed based on the quality factor and the unauthorized access attempts.
US09275213B2	Method and system for securing the entry of data to a device A method and structure for entering authentication data into a device by displaying in an optical unit a key map which correlates data input into the device with keys of the device, the key map indicating data different from that of the keys of the device.
US09275210B2	System and method of enhancing security of a wireless device through usage pattern detection A method of identifying a user of a device having a security policy and including a touch sensitive input device. The method includes receiving data corresponding to use of the touch sensitive input device by the user and determining from the received data at least one feature. Based on the at least one feature and a signature associated with an identifiable user, the method determines a likelihood that the user is the identifiable user and modifies, based on the likelihood, the security policy on the device.
US09275209B2	Information processing device, control method therefor, program, and information storage medium To provide an information processing device that is capable of restricting the use of an application or content in an unauthorized device to which the application or the content is copied. A storage situation information storing unit (32) stores, in a storage unit (30) where an application or content is stored, storage situation information which indicates a storage situation of the application or the content at predetermined reference timing, as one of components of the application or the content. An execution restricting unit (34) restricts execution of the application or the content in a case where the execution of the application or the content is instructed and a current storage situation of the application or the content differs from a storage situation that is indicated by the storage situation information.
US09275208B2	System for vehicular biometric access and personalization A system and method for authenticating a user and creating and applying a user profile may include authenticating an administrator via an administrator identification. A user identification distinct from the administrator identification may be received, as well as a set of selected features associated with the user. A profile may be created and may include the user identification and the set of selected features. The profile may be applied in response to authenticating a user based on the user identification.
US09275207B2	Method and network entity for registering a user entity with a communication network via another communication network A network entity for registering a user entity with a first communication network, wherein the user entity and the network entity providing access to the first communication network are registered with a second communication network. The network entity has a transceiver for transferring at least one registration message for registering said user entity with the first communication network between the user entity and the network entity over the second communication network.
US09275202B2	Data processing method Method for processing data, in which a Petri net is encoded, written into a memory and read and executed by at least one instance, wherein transitions of the Petri net read from at least one tape and/or write on at least one tape symbols or symbol strings, with the aid of at least one head. In an alternative, data-processing, co-operating nets are composed, the composition result is encoded, written into a memory and read and executed from the memory by at least one instance. In doing this, components can have cryptological functions. The data-processing nets can receive and process second data from a cryptological function which is executed in a protected manner. The invention enables processing of data which prevents semantic analysis of laid-open, possibly few processing steps and which can produce a linkage of the processing steps with a hardware which is difficult to isolate.
US09275201B2	Execution-based license discovery and optimization Systems and articles of manufacture for execution-based license discovery and optimization include collecting multiple parameters of execution information for one or more software processes on one or more servers in an operating system, mapping the multiple parameters of collected execution information for the one or more software processes to one or more software products, determining usage of a software product in the operating system based on the mapping of the collected multiple parameters of execution information for the one or more software processes to one or more software products, and identifying one or more software product license optimization opportunities based on a comparison of the determined usage of the software product in the operating system and an indication of all installations of the software product in the operating system.
US09275199B2	Method and system for detecting violation of intellectual property rights of a digital file A computer-based method and system for detecting violation of intellectual property rights of a digital file, comprising, in a distribution channel, digitally sending or streaming the file from a sending party to a receiving party, adding a watermark to the digital file at the sending party prior to sending or streaming the file, wherein the watermark comprises an identifier of the sending and receiving party(s), as well as a unique file ID. In one embodiment, the party is informed about user and/or customer behavior, and can take precautions.
US09275197B2	Sharing and lending of digital content An individual may wish to make a gift of digital media to a designated recipient. The digital media may be previously purchased by the individual or may be new, unused digital media purchased specifically as a gift for the recipient. The sender of the gift sends a gift notification. The sender is then verified to ensure that the sender is authorized to make the gift by matching an identifier of the digital media with an identifier associated with the sender. The digital media may be associated with a set of rights and privileges. Further rights and privileges associated with the digital media may be offered to the recipient.
US09275196B2	Implementing security functions using ROM Systems, methods, and other embodiments associated with implementing security functions in a read-only memory (ROM) are described. According to one embodiment, an device includes a read-only memory (ROM) that stores (i) a plurality of security functions and (ii) a mapping of locations of the plurality of security functions in the ROM. The device also includes a processing unit configured to, in response to a request by a process being executed by the processing unit, determine a location in the ROM of a security function using the mapping, and execute the security function for the process from the ROM.
US09275192B2	Systems and methods for customizing interactive virtual boundaries A method for customizing an interactive control boundary based on a patient-specific feature comprises identifying a reference feature associated with a virtual implant model. The method also comprises determining an intersection between the identified reference feature and a virtual model associated with an anatomy of the patient. A virtual boundary is generated based on the determined intersection between the identified reference feature associated with the virtual implant model and the virtual model associated with the anatomy of the patient.
US09275190B2	Method and system for generating a four-chamber heart model A method and system for building a statistical four-chamber heart model from 3D volumes is disclosed. In order to generate the four-chamber heart model, each chamber is modeled using an open mesh, with holes at the valves. Based on the image data in one or more 3D volumes, meshes are generated and edited for the left ventricle (LV), left atrium (LA), right ventricle (RV), and right atrium (RA). Resampling to enforce point correspondence is performed during mesh editing. Important anatomic landmarks in the heart are explicitly represented in the four-chamber heart model of the present invention.
US09275189B2	Scan parameter policy A computing apparatus includes a processor (212) that evaluates at least one scan parameter of a scan protocol selected for scanning a subject with an imaging system (102) based on a corresponding scan parameter policy and generates a signal indicative of whether the scan parameter satisfies the scan parameter policy.
US09275185B2	Methods and systems for computer aided design of 3D integrated circuits Methods and systems for generating and verifying circuit layouts from computer-aided design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In one instance, a 3-D technology file of these teachings is obtained by providing an identifier for two or more circuit levels, providing for each one of the two or more circuit levels an identifier for a 2-D technology file corresponding to each of the one or more circuit levels and providing a file structure including the two or more circuit levels and each identifier, corresponding to each one of the one or more circuit levels, for the 2-D technology file corresponding to each one of the two or more circuit levels. Other embodiments are disclosed.
US09275182B2	Placing transistors in proximity to through-silicon vias Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone.
US09275181B2	Cell design One or more techniques or systems for designing a cell are provided. The cell generally includes one or more transistors, such as a pass gate transistor, a pull up transistor, or a pull down transistor, respectively associated one or more gate to gate distances. In some embodiments, a second gate to gate distance is selected based on a first gate to gate distance. For example, the first gate to gate distance and the second gate to gate distance are associated with a first transistor. In another example, the first gate to gate distance is associated with a first transistor and the second gate to gate distance is associated with a second transistor. In this manner, a cell design is provided to improve a static noise margin (SNM) or a write margin (WM) for the cell, for example.
US09275180B1	Programmable integrated circuit having different types of configuration memory To implement a circuit design on a programmable integrated circuit (IC), first data are generated for implementing the circuit design. Critical and non-critical portions of the circuit design are determined, and second data are generated for programming configuration memory cells of the programmable IC to implement the circuit design. A first subset of the second data is assigned to program a first type of configuration memory cells to implement the critical portion of the circuit design on a first subset of programmable logic resources and a first subset of programmable interconnect resources of the programmable IC. A second subset of the second data is assigned to program a second type of configuration memory cells to implement the non-critical portion of the circuit design on a second subset of programmable logic resources and a second subset of programmable interconnect resources. The second data are stored in an electronically readable storage medium.
US09275178B1	Method and apparatus for considering paths influenced by different power supply domains in timing analysis A method for modeling variation includes identifying delay-impacting parameters associated with path elements in arrival paths and required paths. Arrival time traversal and required time traversal are performed for the arrival paths and required paths based on assumptions made for the delay-impacting parameters associated with the path elements.
US09275173B2	Automated generation of mask file from three dimensional model for use in grayscale lithography A method, apparatus and program product automatically generate a grayscale lithography mask file (76) from a three dimensional (3D) model (72) of a desired topography, e.g., as generated by a three dimensional computer aided design (CAD) tool (70).
US09275172B2	Systems and methods for analyzing performance of virtual environments Intelligent monitoring systems and methods for virtual environments are disclosed that understand various components of a virtual infrastructure and how the components interact to provide improved performance analysis to users. In certain examples, a monitoring system assesses the performance of virtual machine(s) in the context of the overall performance of the physical server(s) and the environment in which the virtual machine(s) are running. For instance, the monitoring system can track performance metrics over a determined period of time to view changes to the allocation of resources to virtual machines and their location(s) on physical platforms. Moreover, monitoring systems can utilize past performance information from separate virtual environments to project a performance impact resulting from the migration of a virtual machine from one physical platform to another.
US09275170B2	Methods for presenting online advertising at a social network site based on user interests An advertising system generates customized advertising for social network members. The ads results are personalized based on members' explicit and implicit interests derived from user actions, content selections, etc.
US09275167B2	Content adaptation A system includes a mobile device and an optimization server. The mobile device is capable of transmitting request data that includes a requested webpage and identification data. The optimization server is configured to receive response data that corresponds to the request data from a content server, to adapt the response data based on the identification data, and to transmit the adapted response data to the mobile device.
US09275166B2	Off-line delivery of content through an active screen display A computer-implemented system and method for off-line delivery of content through an active screen display are provided. A processor includes an encoding application to assemble and encode digitally-stored content into encoded content, and to interleave the encoded content with a signal conveying a live screen representation. The live screen representation includes output of a user interface for applications executing on the processor. An active screen display is coupled to the processor over a physical display interface connection. The active screen display includes a runtime application to identify the encoded content within the signal on the active screen display and to decode the encoded content into decoded content. The active screen display further includes an offline application to unilaterally display the decoded content on the active screen display without use of the processor and in an absence of the live screen presentation.
US09275164B2	Grouping and presenting search query results Methods, systems, and apparatus, including computer program products, for presenting search results. In one aspect, a method includes receiving a query and determining whether it is desirable to group search results responsive to the query. If so, the method further includes grouping search results by, for example, domain and displaying an indicator (e.g., a favicon) in proximity to a URL associated with search results that are related to the domain. In another aspect, a method includes crawling web properties to determine if a domain has an associated indicator, and storing an identifier associated with the indicator in a database that associates the identifier with one or more words indicative of the domain. Upon receipt of a query that includes the one or more words, the method further includes retrieving the indicator and displaying the indicator in proximity to a link describing the domain.
US09275163B2	Request and response characteristics based adaptation of distributed caching in a mobile network Systems and methods of request and response characteristics based adaptation of distributed caching in a mobile network are disclosed. In one aspect, embodiments of the present disclosure include a method, which may be implemented on a system, of collecting information about a request or information about the response received for the request, the request being initiated at the mobile device, using the information about the request or the response, determining cacheability of the response, caching the response by storing the response a cache entry in a cache on the mobile device in response to determining the cacheability of the response, and/or serving the response from the cache to satisfy a subsequent request. The response in the cache entry can be verified by an entity physically separate from the mobile device to determine whether the response stored in the local cache still matches a current response at a source which sent the response.
US09275162B2	Pre-caching web content for a mobile device A web service for pre-caching web content on a mobile device includes receiving a request from the mobile device for first web content, fetching the first web content, determining second web content to pre-fetch based upon the first web content, fetching the second web content, and causing the second web content to be stored in a content cache on the mobile device responsive to the request for the first web content. Pre-caching web content in this manner provides web content to the mobile device that the user of the mobile device is likely to access. Pre-caching of additional web content prior to receiving an explicit request improves web browsing performance of the mobile device.
US09275161B2	Enterprise activity pattern analysis system An enterprise activity pattern analysis system retrieves log data from a social networking system. The log data includes information characterizing user interactions with a team group space hosted by, or document uploaded to, the social networking system. The system analyzes the log data to detect patterns in the user interactions. The system embeds widgets into the group space and into the documents uploaded to the social networking system that provide visual representations of the pattern analysis.
US09275158B2	Related URLs for task-oriented query results Methods, computer-storage media, and graphical user interfaces are provided for identifying and presenting rich related sites for task-oriented search queries. Upon receipt of a search query input by a user, one or more query logs are analyzed to determine if the search query is a related to a task being performed by the user. If the query is determined to be a task-oriented search query, search results are identified, as is one or more Uniform Resource Locators (URLs) related to a particular search result. The related URL is presented to the user in association with the particular search result. Additional controls, e.g., search tools that facilitate querying of those URLs determined to be relevant to a particular search result, may also be provided to aid the user in performing the task at hand.
US09275157B2	Content metadata directory services The content metadata directory system connects consumers of identified content to managed metadata databases and other digital resources. The system manages links between identifiers in content objects and metadata sources. It supports a variety of different type of content identifiers and allows for overlap among different content identification schemes. One method of associating a content object with metadata uses a combination of a content identifier and a bounding identifier to enable handling of disparate sets of content identifiers for content objects with potentially conflicting content identifiers. The method receives a content identifier for a content object from among a set of content identifiers and provides a unique bounding identifier for the set of content identifiers. This unique bounding identifier is used in combination with the content identifier to form a globally unique identifier for the content object. This globally unique identifier is associated with a metadata source, which enables routing of a user to the metadata source.
US09275156B2	Trending topic identification from social communications Systems and methods for identifying trending topics from social communications are presented. Social communications from one or more social networking sites are obtained. Links within the social communications are extracted. In various embodiments, the extracted links are filtered such that the linked content corresponding to the extracted links that can be categorized as news are retained. Topic descriptors for the retained links are generated and the topic descriptors are stored in a trending topic data store as trending topics. According to various embodiments, the topic descriptors are stored in the trending topic data store with the extracted links.
US09275155B1	Querying across a composite join of multiple database tables using a search engine index A computer system executes a user-supplied query across multiple relational database tables linked by a common key. A new query form, called a composite join, takes a user-supplied query including one or more terms optionally joined by logical operations, an identification of two or more tables and an identification of a common join key shared across the tables. The composite join applies the query across the tables such that any of the query terms can be matched by any of the tables. A query is performed across all tables for each query term and any join keys associated with matching records from the tables are identified in a set of join keys associated with the respective term. The logical operations are then performed on the resulting sets of join keys to combine the results of the term queries according to the user query.
US09275150B2	System and method for search and display of content in the form of audio, video or audio-video The invention relates to the field of computer search on a network and is particularly directed to searching for and displaying content in the form of audio, video and/or audio-video (“A-V”) results wherein the content that results from the search includes a textual transcript associated with the content. A system and method provide seamless delivery of audio, video and A-V results that are auto-populated into a media player on a computer system.
US09275148B1	System and method for augmented browsing and knowledge discovery A system and method to present global and local context sensitive augmented content in accordance with multiple criteria, including one or more user's preferences, and present the augmented content via a transparent layer on top of the original content for less obtrusive and more efficient browsing, knowledge discovery and exploration experience. The original content remains visible to the user while the augmented content is being viewed or interacted with. The global context sensitive augmented content is generated using metrics based on the overall document or content being viewed, while the local context sensitive augmented content is generated using metrics based on the currently viewed or selected object within the document or content being viewed. Real-time and theme based augmentation are used to further enhance the user's experience. The local and global augmentation represent an in-situ user customized augmented network of concepts and relationships that are of interest to knowledge discovery of the topic at hand.
US09275147B2	Providing query suggestions Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing query suggestions. In one aspect, a method includes receiving a search string from a user device. A measure of query completeness is determined for the search string. The measure of query completeness is compared to a threshold measure of query completeness. One or more specific query suggestions are provided to the user device, selected from a plurality of specific query suggestions for the search string, when the measure of query completeness exceeds the threshold measure of query completeness; or one or more general query suggestions are provided to the user device, selected from a plurality of general query suggestions for the search string, when the measure of query completeness does not exceed the threshold measure of query completeness.
US09275146B2	Expressing and executing semantic queries within a relational database Semantic queries are expressed and executed within a relational database. This can be done by defining semantic rules applied to execute the semantic queries using table valued functions and common table expressions, and then simply calling the defined table valued functions to execute the queries.
US09275137B2	Land mobile radio scanning with network served audio A network based system for distributing audio recordings of discrete transmissions from land mobile radio systems received by plural radio terminals having scanning receivers to plural client terminals, including methods of selecting the best available recordings and selectively storing content both locally in the radio terminals and at network based storage locations.
US09275134B2	Method, apparatus and computer program product for classification of objects In accordance with various example embodiments, methods, apparatuses, and computer program products are provided. A method comprises accessing a gallery comprising a plurality of classes, determining distances between classes of the plurality of classes, and determining thresholds for one or more classes of the gallery for classifying test objects in the classes, wherein threshold for a class is determined based on at least one distance of the class from at least one remaining class of the plurality of classes. The apparatus comprises at least one processor and at least one memory, configured to, cause the apparatus to perform accessing a gallery comprising a plurality of classes, determining distances between classes of the plurality of classes, and determining thresholds for classes of the gallery for classifying test objects in the classes, wherein threshold for a class is determined based on distances of the class from remaining classes of the gallery.
US09275133B1	Content request identification via a computer network Systems and methods of identifying information resources for content item placement via a computer network are provided. A data processing system can identify clusters associated with an information resource, and determine a weight of the plurality of clusters for the information resource. An association metric for the information resource can be determined, and the information resource can be identified as a specialized information resource based on the association metric. The data processing system can select a placement criterion for a content item based on information received from a content provider computing device via the computer network, or information received from a network session between at least one end user computing device and at least one content publisher computing device via the computer network. Based on the placement criterion, the specialized information resource can be selected as a candidate for placement of the content item.
US09275129B2	Methods and systems to efficiently find similar and near-duplicate emails and files A set of trigrams can be generated for each document in a plurality of documents processed by an e-discovery system. Each trigram in the set of trigrams for a given document is a sequence of three terms in the given document. A set of trigrams for each similar document is then determined based on the set of trigrams for the original document. To facilitate identification of the similar documents, a full text index is then generated for the plurality of documents and the set of trigrams for each document are indexed into the full text index, as individual terms. Queries can be generated into the full text index based on trigrams of a document to determine other similar or near-duplicate documents. After a set of potentially similar documents are identified, a separate distance criteria can be applied to evaluate the level of similarity between the two documents in an efficient way.
US09275127B1	Location categorization Data associated with a plurality of check-ins performed by users of a social network is received by processors where each check-in identifies a location and tags associated with the location within the social network that are used by the social network to describe the location. A mapping of tags to categories from a list of categories where each tag is mapped to a single category is accessed by the processors. One or more categories are determined by the processors for each check-in based on the mapping of tags to categories for each check-in. A single category is identified by the processors from the determined one or more categories for each check-in. Data associating each check-in is stored by the processors in association with the identified category for each check-in. Data representing the plurality of check-ins and the respective single category for each check-in is outputted for display by the processors.
US09275117B1	Fast dependency mining using access patterns in a storage system A system and method is provided in which access patterns of data blocks are used to predict future accesses to the data blocks. One of the types of patterns that may be used in connection with the system described herein is depended blocks. Dependent blocks are blocks that are often referenced one after another in a short period of time. For example, one block (block b) is commonly referenced after another block (block a) a noted time period. The system described herein provides a block dependency algorithm that enables a search task involving searching of block dependencies with respect to proposed dependency definitions. In an embodiment, the search task may be performed based on using of a branch and bound methodology. A search tree is built in which a set of activity vectors (V) are ordered, and a search algorithm is used to traverse and “prune” branches of the tree.
US09275114B2	Apparatus and method for profiling users Provided is a process of profiling a user of a mobile computing device, the process including: obtaining a location history of a user, the location history being based on signals from a mobile computing device of the user; obtaining a location-attribute score of a location identified in, or inferred from, the location history; determining, with a computer, a user-attribute score based on the location-attribute score; and storing the user-attribute score in a user-profile datastore.
US09275111B2	Minimizing result set size when converting from asymmetric to symmetric requests A method, system, and a computer program product for converting asymmetric requests into symmetric requests are disclosed. In a first aspect, the method comprises a computer partitioning a query into a set of partitions along a dimension of a multi-dimensional data source, wherein each partition of the set of partitions comprises more than one member and the query has a query result count. The method includes the computer creating a candidate query for each partition of the set of partitions, wherein each candidate query has a candidate query result count. Responsive to a determination that the query result count is greater than a sum of the candidate query result counts, the method includes the computer substituting the query with the candidate queries.
US09275105B2	System and methods of improving a multi-tenant database query using contextual knowledge about non-homogeneously distributed tenant data In embodiments, methods and systems for improving a query in a database system are provided. These method and system embodiments can enable greater contextual knowledge about the types and use of data in tables underlying a relational database to be employed to improve query efficiency. By employing contextual information, embodiments can provide improved queries and/or make recommendations to a query optimizer of a database system to improve its operation based upon knowledge of the data and/or application gathered. Embodiments can be useful in improving query performance in multi-tenant database systems.
US09275103B2	Optimization of JOIN queries for related data Embodiments of the present invention disclose a method, computer program product, and system for optimizing execution of a query that includes a JOIN against a system utilizing data relationship concepts. A computer determines whether one or more data structures in JOIN include a parent/child relationship. The one or more data structures can be one or more tables. Responsive to determining that the one or more data structures in JOIN include a parent/child relationship, the computer determines whether the query that includes the JOIN includes a filter applied on one or more data structures in the JOIN with an OR condition between filters. Responsive to determining that the query that includes the JOIN does not include the filter applied on one or more data structures in JOIN with an OR condition between filters, the computer modifies the query that includes the JOIN into a query utilizing relationship constructs.
US09275099B1	Source independent query language Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a source independent query language. One of the methods includes receiving a first executable statement, the first executable statement referencing a second set of fields in a table in a relational database, the first executable statement having instructions to cause the database to perform operations on data in the table. The method includes Generating a second executable statement based on the first set of fields and the first executable statement. The method includes determining a mapping between the first set of fields and the second set of fields. The method includes specifying a derived table using the corresponding values and the mapping. The method includes generating instructions to cause the database to perform the operations on the derived table. The method includes sending the second executable statement to the database.
US09275095B2	Compressing a multi-version database Managing a multi-version database is provided. A logical record identifier to physical record row identifier indirection mapping table on a solid-state storage device is extended to include a plurality of delta blocks. A delta block within the plurality of delta blocks is maintained for each primary key in a plurality of primary keys associated with a data table on a magnetic hard disk storage device.
US09275094B2	Security in enterprise level business information networking Systems, apparatus, and methods for implementing enterprise level social and business information networking are provided. Users can receive relevant information about a database system and its users at an appropriate time. Users can then use this relevant information to reduce errors and limit redundant efforts. For example, an update of a record in the database can be identified, and a story created automatically about the update and sent to the users that are following the record. Which updates have stories created and which stories are to be sent to which users can be configured. Other events besides updating of records can also be tracked. For example, actions of a user that result in an event can be tracked, where such tracking can also be configurable. Subscriptions to follow an object can be automatic, and access checks can be used to ensure that unauthorized users do not see certain data.
US09275090B2	System and method for identifying non-event profiles A system for avoidance records comprises an interface and a processor. An interface is configured to receive an abbreviated record associated with a non-event profile identifier. A processor is configured to determine a counter value associated with the non-event profile identifier and, in the event that the counter value is greater than a predetermined threshold, create and store an avoidance record.
US09275088B2	Managing versions of artifacts stored across disparate tools Arrangements described herein relate to managing versions of artifacts stored across disparate tools. In a multi-dimensional configuration space, dimensions can be defined. The dimensions can represent respective variations of respective versions of a plurality of artifacts for at least a first configuration of a system. Via the dimensions, versions of the plurality of artifacts can be mapped to at least a corresponding first configuration of the system, the mapped versions of the plurality of artifacts corresponding to the versions of the artifacts used in the first configuration. The first configuration can be identified by a point in the multi-dimensional configuration space defined by the respective dimensions. At least a first of the plurality of artifacts can be stored by a first tool, and at least a second of the plurality of artifacts can be stored by a second tool disparate from the first tool.
US09275081B2	Data management apparatus and data management method A data management method is disclosed. The data management method includes receiving input image data including a plurality of frames, sorting a type of a frame included in the input image data, and erasing one or more I-frames among the plurality of frames included in the input image data or erasing at least a portion of data corresponding to the one or more I-frames among the plurality of frames included in the input image data. Thus, the data management method stores a low amount of image data in a limited storage space while minimizing loss of the image data, thereby effectively storing and managing data.
US09275080B2	System and method for early access to captured images Systems and methods are disclosed for early access to captured images including generating and storing within a geospatial database a plurality of placeholder records having information identifying a particular captured image and including at least one geographic image boundary field containing information indicative of a real-world geographic area depicted within the image, an image file location field, and an image status field; receive a plurality of signals from one or more processing computer, at least two of the signals having the information identifying particular captured images, and second information indicative of updates indicating a change in at least one of the image location and image processing status for the image identified by the first information; and populating at least one of the image location and the image processing status of the placeholders within the geospatial database with the information indicative of updates for identified captured images.
US09275079B2	Method and apparatus for semantic association of images with augmentation data A method and apparatus for enabling semantic association of images with augmentation data is described. The method may include receiving digital image data captured by a mobile device. The method may also include performing image recognition analysis on an object within the digital image data to identify the object. The method may also include querying a semantic associations database based on a determined identify of the object to determine a secondary meaning associated with the object, and transmitting augmentation data to the mobile device that is semantically relevant to the object based on the secondary meaning.
US09275077B2	Method of capturing content and mobile terminal thereof A method of capturing content, performed by a mobile terminal, is provided. The method includes sensing a user's gesture requesting the mobile terminal to capture at least one content, selecting a type of content to be captured, based on a time period that the user's gesture requesting the mobile terminal to capture at least one content is maintained for or a number of times that the user's gesture requesting the mobile terminal to capture at least one content, and capturing the selected type of the content. The type of the content includes internal content to be reproduced in the mobile terminal, and external content from outside the mobile terminal.
US09275075B2	Information processing device, information processing method, information storage medium and program To provide an information processing device, an information processing method, an information storage medium, and a program capable of providing information and executing a processing according to a situation in which content is used. A channel data obtaining unit obtains content-corresponding images corresponding to a plurality of respective contents. An index screen image producing and outputting unit outputs a screen image showing a picture in which the respective content-corresponding images are placed according to a rule determined based on data that is updated upon use of the respective contents. An index-object-related processing executing unit executes, upon receipt of selection of the content-corresponding image, a processing that corresponds to a content-corresponding image selected and is based on data that is updated upon use of a content corresponding to the content-corresponding image.
US09275074B1	Systems and methods for content placement, retrieval and management based on geolocation and other parameters The present invention is in the technical field of geolocation. More particularly, the present invention is in the technical field of making content in the form of electronic data available for retrieval when a device has satisfied the Retrieval Range and other Rules which govern the ability to retrieve the content. Retrieval of Content by user devices may be based on Rules communicated by an App, Admin or third party interface and shall be contained and processed by an application interface engine.

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