Document Document Title
US09270041B2 Stacked connector component in which high-speed signal pins are routed to different side than low-speed signal pins, and circuit board therefor
A stacked connector component includes a housing, connectors at a front opening of the housing and arranged in a stacked formation within one or more columns, and a for and exposed at the connectors. The pins include high-speed pins routed within the housing to a bottom side thereof and low-speed pins routed within the housing to a back side or a top side thereof. A circuit board includes pin pads connectable to the pins and disposed on a substrate. The pin pads include high-speed signal pin pads for the high-speed signal pins. The substrate includes contiguous high-speed areas in which the high-speed signal pin pads for the high-speed pins are located, between which no pin pads are located.
US09270032B2 Connector with piercing tail
An electrical connector and a terminal thereof are provided. The electrical connector comprises a housing, a circuit board and a plurality of terminals. The housing comprises a body and an assembly frame. The body is formed with a first surface and a second surface which are opposite to each other, and includes a terminal mounting hole penetrating through the first surface and the second surface. The assembly frame extends outwardly from the second surface and forms a mounting surface. The circuit board is mounted to the mounting surface. The terminal comprises a main body, a plurality of pins and a pressing portion. The main body is mounted to the corresponding terminal mounting hole. The pins protrude out of the first surface from a side edge of the main body adjacent to the first surface.
US09270030B2 RF and NFC PAMM enhanced electromagnetic signaling
A communication device includes a processing module, a transmitter section, a receiver section, a wireless communication structure, a projected artificial magnetic mirror (PAMM) array, and a metal backing. The transmitter section and the receiver section are on a first layer. The wireless communication structure is on a second layer, the PAMM array is on a third layer, and the metal backing is on a fourth layer. The PAMM array includes a non-conductive area to support coupling of the wireless communication structure to at least one of the transmitter section and the receiver section. In addition, the PAMM array provides electromagnetic shielding of the at least one of the transmitter section and the receiver section from the wireless communication structure.
US09270029B2 Pattern shaping of RF emission patterns
A metallic shaping plate located in the interior housing of a wireless device is disclosed. The metallic shaping plate may influence a radiation pattern being generated by a horizontal antenna array. The result may be an increase in the gain of the array.
US09270026B2 Reconfigurable polarization antenna
Embodiments include antenna systems capable of producing high quality circularly, elliptically, or linearly polarized radiation. Embodiments include single feed (single-ended or differential) or multiple feed antennas. Embodiments can be electronically configured to adjust the type of polarization of the antenna system. In an embodiment, the polarization of the antenna system is adjusted by adjusting at least the position of a grounding node relative to the position of a feed node. In another embodiment, the polarization of the antenna system is adjusted by configuring one or more input nodes of the antenna between feed nodes, grounding nodes, and open nodes. In another embodiment, the polarization of the antenna system is adjusted by adjusting the phase of a single differential feed of the system.
US09270025B2 In-body device having deployable antenna
Deployable antennas for in-body devices, such as implantable and ingestible devices, are provided. Aspects of the in-body deployable antennas of the invention include antennas configured to go from a first configuration to a second configuration following placement in a living body, e.g., via ingestion or implantation. Embodiments of the in-body devices are configured to emit a detectable signal upon contact with a target physiological site. Also provided are methods of making and using the devices of the invention.
US09270015B2 Attachment component with parasitic antenna
A wearable electronic device includes an active antenna and an attachment component for attaching the wearable electronic device to a wearer. The attachment component includes a floating portion adapted to resonate in the presence of a radio frequency (RF) carrier wave transmitted by the active antenna. The floating portion is positioned relative to the active antenna to achieve a target coupling with the transmitted RF carrier wave.
US09270011B2 Antenna coupled to a cover closing an opening in an implantable medical device
An implantable medical device includes a housing. An opening is present in the housing. The implantable medical device includes communication circuitry in the housing. The implantable medical device includes a cover coupled to edges of the housing defining the opening to substantially close the opening. The implantable medical device also includes an antenna coupled to the cover. The antenna is electrically coupled to the communication circuitry.
US09270010B2 RFID system with an eddy current trap
An RFID antenna assembly configured to be energized with a carrier signal is disclosed. The RFID antenna assembly includes an inductive component including a loop antenna assembly, at least one capacitive component coupled to the inductive component, and an eddy current trap positioned a predetermined distance from the loop antenna assembly.
US09270008B2 Transmission line resonator, bandpass filter using transmission line resonator, multiplexer, balanced-to-unbalanced transformer, power divider, unbalanced-to-balanced transformer, frequency mixer, and balance-type filter
A transmission line resonator includes a half-wavelength stepped-impedance resonator with two ends short-circuited to ground, and a capacitive element with one end connected to a center portion of the stepped-impedance resonator and the other end short-circuited to ground. The stepped-impedance resonator includes a first transmission line, a second transmission line, and a third transmission line. The second transmission line has a second line impedance and a second line length, with one end being connected to one end of the first transmission line and the other end being short-circuited to ground. The third transmission line has the second line impedance and the second line length, with one end being connected to the other end of the first transmission line and the other end being short-circuited to ground. The first line impedance is lowered in comparison with the second line impedance.
US09270006B2 Waveguide device, communication module and electronic device
An electronic device includes a central control unit and a waveguide device. The waveguide device includes a communication module having a communication function, and an attachment/detachment unit capable of attaching/detaching a high-frequency signal waveguide so that coupling between the module and the high-frequency signal is possible. The communication module includes a communication device, and a transfer structure configured to cause a high-frequency signal emitted from the communication device to be coupled to the high-frequency signal waveguide.
US09270003B2 Stripline assembly having first and second pre-fired ceramic substrates bonded to each other through a conductive bonding layer
The present invention is directed to a stripline assembly that includes a first pre-fired ceramic substrate including a ground plane disposed on a first surface of the first pre-fired ceramic substrate. A second pre-fired ceramic substrate includes a ground plane disposed on a first surface thereof and a circuit disposed on a second surface of the second pre-fired ceramic substrate opposite the first surface. The circuit is disposed between the first pre-fired ceramic substrate and the second pre-fired ceramic substrate. A conductive bonding layer is disposed around the periphery of the circuit and between the first pre-fired ceramic substrate and the second pre-fired ceramic substrate.
US09269999B2 Structural body, printed board, antenna, transmission line waveguide converter, array antenna, and electronic device
A structural body of the invention includes a first conductor plane (1), a plurality of second conductor planes (4) of which at least a portion is provided facing the first conductor plane (1), and a transmission line (6), having an open end, which is disposed between the first conductor plane (1) and the second conductor plane (4), electrically connected to any one conductor plane of the first conductor plane (1) or the second conductor plane (4) through a conductor connection portion (5) and provided facing the other conductor plane. A unit structure including at least the second conductor plane (4), the transmission line (6), and the conductor connection portion (5) is repeatedly disposed.
US09269998B2 Concave gas vent for electrochemical cell
The invention provides an electrochemical cell system comprising: a fuel electrode, an oxidant electrode for absorbing and reducing a gaseous oxidant, and an interior cell chamber configured to contain a volume of ionically conductive liquid therein. The ionically conductive liquid conducts ions between the fuel and oxidant electrodes. The oxidant electrode separates the ionically conductive liquid from the gaseous oxidant. A gas vent is configured to separate gas in the cell from a mist comprising the ionically conductive liquid and is positioned generally above the volume of ionically conductive liquid. The gas vent comprises a filter body portion comprised of at least one layer so as to absorb a portion of the ionically conductive liquid. The body portion is formed in a concave shape with an apex positioned towards the top of the cell in its upright orientation, and with body surfaces extending downwardly from said apex so as to drain absorbed ionically conductive medium back into the interior chamber. The body portion contains pores so as to permit permeation of the gas therethrough.
US09269990B2 Battery management for a breathing assistance system
A method for providing battery security in a breathing assistance system configured to provide breathing assistance to a patient is provided. A battery security system of the breathing assistance system receives battery data from a battery received in the breathing assistance system, and analyzes the received battery data to determine whether the battery is approved for use in the breathing assistance system. If the battery is determined to be approved for use in the breathing assistance system, the battery is allowed to provide power to the breathing assistance system. If the battery is not determined to be approved for use in the breathing assistance system, the battery is prevented from providing power to the breathing assistance system.
US09269989B2 Electric power supply system
There is provided an electric power supply system comprising a secondary battery unit which stores electric power generated by a solar cell module, a charge switch circuit which disconnects and connects a charge path between the solar cell module and the secondary battery unit, and a charge and discharge control unit which controls the disconnection and the connection of the charge path by the charge switch circuit, wherein, in the charge switch circuit, the disconnection and the connection of the charge path is controlled by an output voltage of the solar cell module when the charge switch circuit cannot be controlled by the charge and discharge control unit.
US09269988B2 Method for manufacturing secondary battery
A method for manufacturing a secondary battery determines the amount of the non-aqueous electrolyte to be injected into the bound cell case on the basis of an amount of air space in a positive electrode active material layer, a swelling rate of the positive electrode active material layer, an amount of air space in a negative electrode active material layer, a swelling rate of the negative electrode active material layer, an amount of air space in a separator sheet, a total surface area of an opposing surface of the positive electrode active material layer and the negative electrode active material layer, and a reference electrolyte amount per unit surface area, which is determined in accordance with a binding rate.
US09269983B2 Flow battery
An electrolyte system for a flow battery has an anolyte including [Fe(CN)6]3− and [Fe(CN)6]4− and a catholyte including Fe2+ and Fe3+.
US09269982B2 Flow cell stack
A stacked cell for a flow cell battery is presented. The stacked cell is sealed by a gasket between individual components. The gasket is formed such that it seals against leakage of electrolytes and facilitates the flow of electrolytes through the stacked cell. Further, the gasket is formed to minimize the linear expansion of the gasket material with temperature.
US09269979B2 Centrifugal water separator for a fuel cell system
A separator for a fuel cell includes first and second ends connected by a side wall to define a separation chamber. The first end has a protrusion extending into the chamber to form a channel with the wall. An inlet conduit is tangentially connected to the wall. An outlet conduit connected to the wall between the inlet conduit and the first end. A liquid drain is connected to the second end. A fuel cell system includes a fuel cell stack and a separator. The separator has first and second portions forming a chamber and a divider. The first portion has a continuous inner wall, an end wall forming a central convex projection, an inlet conduit and an outlet conduit. The second portion has a continuous inner wall, an end wall, and a liquid drain.
US09269978B2 Wind power and hydrogen power complex generating device
A wind power and hydrogen power complex generating device includes a fan assembly having a blade unit and a demultiplexer connected to the blade unit. A heating unit is connected to a first output end of the demultiplexer. A pump is connected to a second output end of the demultiplexer. The pump pressurizes liquid water. A heating assembly is connected to the pump and the heating unit. The heating assembly heats the liquid water into a critical state. An electrolyzing unit includes an input end, a hydrogen output end, and an oxygen output end. The input end is connected to the heating assembly. The electrolyzing unit electrolyzes the liquid water in the critical state into gaseous hydrogen and gaseous oxygen. A fuel cell unit includes an anode passage connected to the hydrogen output end and a cathode passage connected to the oxygen output end.
US09269970B2 Fuel cell system and method of heat recovery thereof
The present invention provides a fuel cell system, and the fuel cell system comprises a fuel cell, an after burner, a heat exchanger and a reformer. The after burner connects with the fuel cell to receive rest-bar of the fuel cell and produce a gas with high temperature. The heat exchanger comprises a first heat exchanging unit and a second heat exchanging unit connected with the first heat exchanging unit, and the second heat exchanging unit connects with a fuel input pipe for receiving the fuel. The reformer connects with the after burner, the first heat exchanging unit and the second heat exchanging unit separately.
US09269968B2 Methods and devices for generating electricity from a fuel and an oxidant using a capacitor
Devices and methods are provided for generating electrical power using a capacitor. The capacitor has a catalytic working electrode, a dielectric, and a counter electrode. Power is generated by flowing a fuel (e.g., hydrogen gas) over the working electrode, charging the capacitor (e.g. by applying a voltage), flowing an oxidant (e.g., oxygen gas) over the working electrode, and connecting the electrodes to a resistive load, which allows current to flow through the load, between the electrodes. The inverse device (i.e., oxidant first, then fuel) functions similarly.
US09269963B2 Solid oxide cell stack and method for preparing same
A method for producing and reactivating a solid oxide cell stack structure by providing a catalyst precursor in at least one of the electrode layers by impregnation and subsequent drying after the stack has been assembled and initiated. The method includes impregnating a catalyst precursor into a cathode of a solid oxide cell stack which already contains an active material (an anode reduction) for example, in the form of Ni/YSZ anodes. Due to a significantly improved performance and an unexpected voltage improvement this solid oxide cell stack structure is particularly suitable for use in solid oxide fuel cell (SOFC) and solid oxide electrolysing cell (SOEC) applications.
US09269956B1 High energy density metal-oxygen battery
The battery includes a cathode configured to generate oxygen ions during discharge of the battery. The battery also includes an oxygen ion-conducting electrolyte that receives the oxygen ions from the cathode during discharge of the battery. The battery further includes an anode that has an anode active medium positioned in the pores of a porous anode current collector. The anode active medium receives the oxygen ions conducted through the oxygen ion conducting electrolyte during discharge of the battery. Additionally, the anode active medium includes an elemental metal that reacts with the oxygen ions to form a metal oxide during discharge of the battery.
US09269953B2 Electrode forming process for metal-ion battery with hexacyanometallate electrode
A method is provided for forming a metal-ion battery electrode with large interstitial spacing. A working electrode with hexacyanometallate particles overlies a current collector. The hexacyanometallate particles have a chemical formula AmM1xM2y(CN)6.zH2O, and have a Prussian Blue hexacyanometallate crystal structure, where A is either alkali or alkaline-earth cations. M1 and M2 are metals with 2+ or 3+ valance positions. The working electrode is soaked in an organic first electrolyte including a salt including alkali or alkaline earth cations. A first electric field is created in the first electrolyte between the working electrode and a first counter electrode, causing A cations and water molecules to be simultaneously removed from interstitial spaces in the Prussian Blue hexacyanometallate crystal structure, forming hexacyanometallate particles having the chemical formula of Am′M1xM2y(CN)6.z′H2O, where m′
US09269951B2 Cathode active material and lithium secondary battery containing them
Provided is a non-aqueous electrolyte-based, high-power lithium secondary battery having a long service life and superior safety at both room temperature and high temperature, even after repeated high-current charging and discharging. The battery comprises a mixture of a lithium/manganese spinel oxide having a substitution of a manganese (Mn) site with a certain metal ion and a lithium/nickel/cobalt/manganese composite oxide, as a cathode active material.
US09269949B2 Synthesis of micro-sized interconnected Si-C composites
Embodiments provide a method of producing micro-sized Si—C composites or doped Si—C and Si alloy-C with interconnected nanoscle Si and C building blocks through converting commercially available SiOx (0
US09269947B2 Glass-fiber containing composite materials for alkali metal-based batteries and methods of making
Glass-fiber composites are described that include a substrate containing glass fibers and particles in contact with the glass fiber substrate. The particles may include an alkali-metal containing compound. In addition, batteries are described with an anode, a cathode, and an electrolyte. The cathode may include alkali-metal containing nanoparticles in contact with glass fibers. Described are methods of making a glass-fiber composite. The methods may include the steps of forming a wet laid non-woven glass fiber substrate, and contacting alkali-metal containing particles on the substrate.
US09269944B2 Battery module
A battery module is provided, including: a plurality of battery packs teach being provided with an anode terminal and a cathode terminal; a plurality of coupling units each having ends coupled to the anode terminal and the cathode terminal of an adjacent battery pack, respectively, to couple the plurality of battery packs in series; an operation unit that is provided on one end of the coupling unit and ascends in accordance with an increasing internal pressure of the battery pack to open a coupling between the one end of the coupling unit and the terminals of the battery pack by raising the one end of the coupling unit; and a bypass unit having one end disposed over the one end of the coupling unit and the other end coupled to the other end of an adjacent coupling unit to maintain the other battery packs coupled in series, except for the battery packs the internal pressures of which have increased, when the one end of the coupling unit ascends by the operation unit.
US09269938B2 Separator for nonaqueous secondary battery, and nonaqueous secondary battery
An object of the invention is to provide a separator for a nonaqueous secondary battery, which has good adhesion to electrodes and is also capable of ensuring sufficient ion permeability even after attachment to an electrode. The separator for a nonaqueous secondary battery of the invention includes a porous substrate and an adhesive porous layer formed on at least one side of the porous substrate and containing a polyvinylidene-fluoride-based resin. The separator for a nonaqueous secondary battery is characterized in that the adhesive porous layer has a crystallinity of 20 to 35%.
US09269935B2 Battery pack with integral seal member and electronic device including the same
An electronic device employs a seal member to seal a battery pack to a housing member to prevent contaminants from entering into a battery bay. The electronic device includes a housing member having an exterior surface a portion of which defines a recess, an electronic assembly contained inside the housing member, and an battery pack received in the recess in the exterior surface of the housing member and electrically connected to the electronic assembly inside the housing member. The seal member engages the battery pack and the housing member along an outer circumference of the battery pack and an inner circumference of the recess such that the seal member seals the gap between the outer circumference of the battery pack and the inner circumference of the recess, thereby preventing contaminants from an external environment from entering into an interior of the recess through the gap.
US09269932B2 Power source encapsulation
A method comprising the steps of encapsulating a power source including a set of power terminals in a cover and sealing the power source including the set of power terminals within the cover and inserting a set of conductive contacts through the cover to contact the set of power terminals and provide conductive access to the set of power terminals of the power source from outside the cover without allowing exposure of the power source to an environment outside the cover.
US09269930B2 Rechargeable battery
A rechargeable battery including an electrode assembly including a positive electrode and a negative electrode; a case including a space receiving the electrode assembly; a cap plate coupled with the case; and a terminal electrically connected to the electrode assembly, the terminal protruding outside of the cap plate, wherein a top of the cap plate has a slanted surface.
US09269926B2 Laser induced thermal imaging apparatus and laser induced thermal imaging method
A laser thermal imaging apparatus includes a substrate stage configured to receive a substrate, a beam irradiation unit over the substrate stage, the beam irradiation unit being configured to irradiate an alignment laser beam onto an alignment mark of the substrate, and a beam observing unit facing the beam irradiation unit, the substrate stage being interposed between the beam observing unit and the beam irradiation unit, the beam observing unit being configured to observe the alignment laser beam and a shadow of the alignment mark formed by the alignment mark.
US09269925B2 Array substrate including wavy transflective layer
Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The array substrate comprises a plurality of pixel units disposed on a substrate, each pixel unit including a thin-film transistor (TFT) structure and an organic light-emitting diode (OLED) driven by the TFT structure. The OLED includes a transparent first electrode, an emission layer and a second electrode for reflecting light in sequence in a direction away from the substrate. A color filter disposed between a layer provided with the OLED and a layer provided with the TFT structure. A transflective layer disposed between the OLED and the color filter. The second electrode of the OLED and the transflective layer constitute a microcavity structure.
US09269923B2 Barrier films for thin film encapsulation
A method and apparatus for depositing an inorganic layer onto a substrate is described. The inorganic layer may be part of an encapsulating film utilized in various display applications. The encapsulating film includes one or more inorganic layers as barrier layers to improve water-barrier performance. An oxygen containing gas, such as nitrous oxide, is introduced during the deposition of the inorganic layer. As a result, the inorganic layer is lower in stress and may obtain a water vapor transmission rate (WVTR) of less than 100 mg/m2-day.
US09269921B2 Lighting device
A lighting device including an electroluminescent (EL) material is connected to an external power supply easily and the convenience is improved. In a lighting device having a light-emitting element including an electroluminescence (EL) layer, a housing including a light-emitting element has a terminal electrode electrically connected to the light-emitting element on a peripheral end portion. The terminal electrode provided on the housing so as to be exposed to the outside is in contact with a terminal electrode for the external power supply, so that the external power supply and the light-emitting element are electrically connected to each other and power can be supplied to the lighting device.
US09269916B2 Organic thin-film solar cell module and sub-module
An organic thin-film solar cell module according to one embodiment includes solar cell panels and reflective surfaces. Each panel includes a substrate, a 1st electrode, a 2nd electrode and a photoelectric conversion layer. When supposing a 1st plane including the reflective surface, a 1st intersection line as a line of intersection of the 1st plane and the 2nd main surface of the substrate, and a 2nd plane including the 1st intersection line and forming an angle of 45° with the 2nd main surface of the substrate and an angle smaller than 45° with the 1st plane, an edge of the photoelectric conversion layer is in contact with the 2nd plane or the 2nd plane intersects the photoelectric conversion layer.
US09269914B2 Light-emitting device, electronic device, and lighting device
A lightweight flexible light-emitting device that is less likely to be broken is provided. The light-emitting device includes a first flexible substrate, a second flexible substrate, an element layer, a first bonding layer, and a second bonding layer. The element layer includes a light-emitting element. The element layer is provided between the first flexible substrate and the second flexible substrate. The first bonding layer is provided between the first flexible substrate and the element layer. The second bonding layer is provided between the second flexible substrate and the element layer. The first and second bonding layers are in contact with each other on the outer side of an end portion of the element layer. The first and second flexible substrates are in contact with each other on the outer side of the end portions of the element layer, the first bonding layer, and the second bonding layer.
US09269906B2 Light-emitting element, light-emitting device, and electronic device
It is an object to provide a light-emitting element having long lifetime. A light-emitting element is provided, in which a light-emitting layer, a first layer, and a second layer are provided between a first electrode and a second electrode; the first layer is provided between the light-emitting layer and the first electrode; the second layer is provided between the light-emitting layer and the second electrode; the first layer is a layer for controlling the hole transport; the second layer is a layer for controlling the electron transport; and light emission is obtained from the light-emitting layer by applying voltage to the first electrode and the second electrode such that the potential of the first electrode is higher than that of the second electrode.
US09269905B2 Polymer compound having carbon cluster structure and organic device using same
A polymer compound, is provided in which at least a part of repeating units has a group containing a carbon cluster structure. The polymer compound preferably one or more, more preferably two or more, units selected from an arylene unit, a heteroarylene unit and an aromatic amine unit, as repeating units.
US09269904B2 Method for manufacturing large-area organic solar cells
A method for manufacturing large-area organic solar cells utilizes a hot solvent vapor annealing manufacturing process while manufacturing the organic solar cells via a large-area proceeding method, such as spraying. Namely, a heated solvent vapor is utilized to modify an active layer after the active layer of the organic solar cells is formed, which ensures a flatness and an uniformity thereof and increases a crystallinity of the active layer and an element charge transport rate so that a power conversion efficiency of the large area organic solar cells is increased, a proceeding time is quite short, and the performance thereof is quite obvious. Therefore, the method not only reduces the cost by a large area production but obtains organic solar cells with higher conversion efficiency.
US09269901B2 Resistance change memory device having threshold switching and memory switching characteristics, method of fabricating the same, and resistance change memory device including the same
Disclosed are a resistance change memory device, a method of fabricating the same, and a resistance change memory array including the same. The resistance change memory device includes a first electrode and a second electrode. A hybrid switching layer is interposed between the first electrode and the second electrode. The hybrid switching layer is a metal oxide layer having both threshold switching characteristics and memory switching characteristics.
US09269900B2 Methods of depositing phase change materials and methods of forming memory
A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed.
US09269892B2 Plasma etching method
In a plasma etching method of plasma-etching a sample which has a first magnetic film, a second magnetic film disposed above the first magnetic film, a metal oxide film disposed between the first magnetic film and the second magnetic film, a second metal film disposed over the second magnetic film and forming an upper electrode, and a first metal film disposed below the first magnetic film and forming a lower electrode, the plasma etching method includes the steps of: a first process for etching the first magnetic film, the metal oxide film, and the second magnetic film by using carbon monoxide gas; and a second process for etching the sample by using mixed gas of hydrogen gas and inactive gas after the first process. In this case, the first metal film is a film containing therein tantalum.
US09269890B2 Magnetoresistance effect element with shift canceling layer having pattern area greater than that of storage layer
According to one embodiment, a magnetoresistance effect element includes a reference layer, a shift canceling layer, a storage layer provided between the reference layer and the shift canceling layer, a tunnel barrier layer provided between the reference layer and the storage layer, and a spacer layer provided between the shift canceling layer and the storage layer, wherein a pattern of the storage layer is provided inside a pattern of the shift canceling layer when the patterns of the storage layer and the shift canceling layer are viewed from a direction perpendicular to the patterns of the storage layer and the shift canceling layer.
US09269888B2 Memory cells, methods of fabrication, and semiconductor devices
A magnetic cell includes a magnetic tunnel junction that comprises magnetic and nonmagnetic materials exhibiting hexagonal crystal structures. The hexagonal crystal structure is enabled by a seed material, proximate to the magnetic tunnel junction, that exhibits a hexagonal crystal structure matching the hexagonal crystal structure of the adjoining magnetic material of the magnetic tunnel junction. In some embodiments, the seed material is formed adjacent to an amorphous foundation material that enables the seed material to be formed at the hexagonal crystal structure. In some embodiments, the magnetic cell includes hexagonal cobalt (h-Co) free and fixed regions and a hexagonal boron nitride (h-BN) tunnel barrier region with a hexagonal zinc (h-Zn) seed region adjacent the h-Co. The structure of the magnetic cell enables high tunnel magnetoresistance, high magnetic anisotropy strength, and low damping. Methods of fabrication and semiconductor devices are also disclosed.
US09269883B2 Thermoelectric conversion device
A thermoelectric conversion device includes a stack in which a first perovskite dielectric film, which includes Sr and Ti and has a first bandgap, and a second perovskite dielectric film, which includes Sr and Ti and has a second bandgap smaller than the first bandgap, are stacked alternately, each of the first and second perovskite dielectric films being doped to have an electric conductivity, the first and the second perovskite dielectric films having respective compositions such that there appears a bandoffset of 0.54 eV in maximum between a conduction band of the first perovskite dielectric film and a conduction band of the second perovskite dielectric film.
US09269882B2 Thermoelectric material, thermoelectric element and module including the same, and method of preparing the thermoelectric material
A thermoelectric material including a 3-dimensional nanostructure, wherein the 3-dimensional nanostructure includes a 2-dimensional nanostructure connected to a 1-dimensional nanostructure.
US09269879B2 Light emitting diode package having frame with bottom surface having two surfaces different in height
Provided is a light emitting device package. It is a substrate comprising a top and a bottom surfaces being substantially parallel to each other; a light emitting diode chip on the substrate; a frame disposed around the light emitting diode chip and configured to reflect light emitted from the light emitting diode chip, the frame having an opening; a first metal layer disposed on the top surface of the substrate; a second metal layer disposed on the top surface of the substrate; a third metal layer disposed on the bottom surface of the substrate; a through hole connected between the first metal layer and the third metal layer; a material being filled in the opening of the frame; and a lens disposed on the material, wherein the substrate and the frame are separate from each other.
US09269878B2 Light emitting device and light emitting apparatus
A light emitting device may be provided that includes a substrate, a light emitting structure, a first electrode under the first semiconductor layer, a reflective electrode layer under the second conductive semiconductor layer, a second electrode under the reflective electrode layer, and a support member under the first semiconductor layer and the reflective electrode layer around the first and second electrodes. A first connection electrode may be provided under the first electrode. At least a part of the first connection electrode is provided in the support member. A second connection electrode may be provided under the second electrode At least a part of the second connection electrode may be provided in the support member.
US09269876B2 Light emitting diodes with low refractive index material layers to reduce light guiding effects
Light emitting diodes including low refractive index layers for reducing guided light are disclosed. The light-emitting diodes include at least one n-doped layer, at least one p-doped layer, and an active region disposed between the at least one n-doped layer and the at least one p-doped layer. The active region comprises a light-emitting material. The light-emitting diode further comprises at least one low refractive index layer disposed in or around the active region.
US09269872B1 Molded electronic package geometry to control warpage and die stress
A method and system are provided for a molded electronic package geometry that enables control of warpage and die stress. A mold tool can be closed to define a space or cavity about a semiconductor die disposed on a substrate. Once the mold tool is closed, a mold material can be applied to the space to produce a mold cap. The mold cap geometry can have a first surface that is in contact with the surface of the substrate and a second surface that is opposite the first surface. The second surface can define a tapered portion of the mold cap in which the larger thickness of the tapered portion of the mold cap is in proximity to the semiconductor die and the smaller thickness of the tapered portion of the mold cap is away from the semiconductor die. The thickness of the tapered portion can vary linearly or non-linearly.
US09269870B2 Light-emitting device with intermediate layer
This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; an intermediate layer formed on the substrate; a transparent bonding layer; a first semiconductor window layer bonded to the semiconductor layer through the transparent bonding layer; and a light-emitting stack formed on the first semiconductor window layer. The intermediate layer has a refractive index between the refractive index of the substrate and the refractive index of the first semiconductor window layer.
US09269869B2 Semiconductor optical element
In order to provide a highly reliable silicon-germanium semiconductor optical element of high luminous efficiency or of low power consumption that can reduce or prevent the occurrence of dislocations or crystal defects on the interface between a light emitting layer or a light absorption layer and a cladding layer, in a silicon-germanium semiconductor optical element, a germanium protective layer 11 of non-light emission is disposed between a germanium light emitting layer or the light absorption layer 10 and a cladding layer 12 disposed above a substrate. The germanium protective layer 11 has the electrical conductivity different from electrical conductivity of the germanium light emitting layer or the light absorption layer 10.
US09269868B2 Semiconductor light emitting element and method for manufacturing semiconductor light emitting element
According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light emitting unit, a first layer, a second layer, and a third layer. The light emitting unit is provided between the n-type and p-type semiconductor layers, and includes a first well layer including a nitride semiconductor. The first layer is provided between the first well layer and the p-type semiconductor layer, and includes Alx1Ga1-x1-y1Iny1N having a first Mg concentration. The second layer is provided between the first layer and the p-type semiconductor layer, and includes Alx2Ga1-x2-y2Iny2N having a second Mg concentration higher than the first Mg concentration. The third layer is provided between the second layer and the p-type semiconductor layer, and includes Alx3Ga1-x3-y3Iny3N having a third Mg concentration higher than the first Mg concentration and lower than the second Mg concentration.
US09269862B2 Light-emitting device
A light-emitting device includes: a Distributed Bragg reflector comprising alternate first semiconductor layers and second semiconductor layers, wherein each first semiconductor layer comprises a low-refractive-index part having a depth; and a light-emitting semiconductor stack associated with the Distributed Bragg reflector; wherein the depths of the low-refractive-index parts of the first semiconductor layers are gradually changed in a direction toward the light-emitting semiconductor stack.
US09269858B2 Engineered substrates for semiconductor devices and associated systems and methods
Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.
US09269857B2 Method and system for eliminating yellow ring occurring on white light emitting diode
Disclosed are a method and system for eliminating yellow ring phenomenon occurring on the white light emitting diode (LED) based on a blue light chip exciting yellow phosphor powders and having a packaging surface enclosing thereon. Lightspot images are repeatedly acquired outside the white LED, and then each analyzed to see if the yellow ring still exists on a lightspot. If yes, a further atomization process is performed on the packaging surface of white LED, until the acquired and analyzed image shows no yellow ring exists. A lightspot-by-lightspot basis is used in the yellow ring elimination task. In the image analysis, a look up table may be provided in advanced or established at the same time simultaneously with the yellow ring elimination task. The atomization performed on the lightspot may also consider a width issue.
US09269856B2 Method for making light emitting diode
The disclosure relates to a method of making light emitting diode. The method includes following steps: providing a free-standing carbon nanotube film, wherein the carbon nanotube film includes a number of carbon nanotubes aligned and connected with each other via van der Waals force; suspending the carbon nanotube film and inducing defects on the surface of the carbon nanotubes; growing a nano-material layer on the surface of the carbon nanotubes via atomic layer deposition; removing the carbon nanotube film by annealing to form a number of nanotubes; wherein the number of nanotubes are successively aligned and connected with each other to form a free-standing nanotube film; setting the nanotube film on a substrate; growing a first semiconductor layer, an active layer and a second semiconductor layer on the substrate; and applying a first electrode on the second semiconductor layer and a second electrode on the first semiconductor layer.
US09269852B2 Semiconductor light-emitting diode and method for manufacturing the same
A semiconductor light-emitting diode, including: an n-GaN layer, a quantum well layer, an electron blocking layer, and a p-GaN layer, which are sequentially stacked on a substrate. The electron blocking layer includes at least one first AlGaN layer and at least one second AlGaN layer. The first AlGaN layer and the second AlGaN layer are alternately stacked. The adjacent first and second AlGaN layers have different Al component.
US09269847B2 Small anode germanium (SAGe) well radiation detector system and method
A small anode germanium well (SAGe well) radiation detector system/method providing for low capacitance, short signal leads, small area bottom-oriented signal contacts, enhanced performance independent of well diameter, and ability to determine radiation directionality is disclosed. The system incorporates a P-type bulk germanium volume (PGEV) having an internal well cavity void (IWCV). The external PGEV and IWCV surfaces incorporate an N+ electrode except for the PGEV external base region (EBR) in which a P+ contact electrode is fabricated within an isolation region. The PGEV structure is further encapsulated to permit operation at cryogenic temperatures. Electrical connection to the SAGe well is accomplished by bonding or mechanical contacting to the P+ contact electrode and the N+ electrode. The EBR of the PGEV may incorporate an integrated preamplifier inside the vacuum housing to minimize the noise and gain change due to ambient temperature variation.
US09269846B2 Phototransistor capable of detecting photon flux below photon shot noise
Disclosed herein is a phototransistor (PT) comprising an emitter, a collector, a floating base, wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being lower than one single photon within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being below a photon shot noise of the photon flux within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux is 1/√{square root over (β)} of a photon shot noise of the photon flux within f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being below 2f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being 2f/β, wherein f is an electrical bandwidth of the PT and β is a current amplification gain of the PT.
US09269843B2 Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching
A method for providing a textured layer in an optoelectronic device is disclosed. The method includes depositing a template layer on a first layer. The template layer has significant inhomogeneity either in thickness or in composition, or both, including the possibility of forming one or more islands to provide at least one textured surface of the island layer. The method also includes exposing the template layer and the first layer to an etching process to create or alter at least one textured surface. The altered at least one textured surface is operative to cause scattering of light.
US09269841B2 CIS-based thin film solar cell
A CIS-based thin film solar cell has a backside electrode layer that is divided by a pattern (P1), and a CIS-based light absorption layer, and a transparent conductive film are sequentially formed on a substrate. The backside electrode layer comprises an intermediate layer on the surface that is in contact with the CIS-based light absorption layer, the intermediate layer being composed of a compound of a metal that constitutes the backside electrode layer and a group VI element that constitutes the CIS-based light absorption layer; the intermediate layer comprises a first intermediate layer portion which is formed on the upper surface and a second intermediate layer portion which is formed on the lateral surface that and faces the pattern (P1); and the film thickness of the second intermediate layer portion is larger than the film thickness of the first intermediate layer portion.
US09269840B2 Method for forming a solar cell with tree-like nanostructure
The present invention discloses a solar cell having a multi-layered structure that is used to generate, transport, and collect electric charges. The multi-layered nanostructure comprises a cathode, a conducting metal layer, a photo-active layer, a hole-transport layer, and an anode. The photo-active layer comprises a tree-like nanostructure array and a conjugate polymer filler. The tree-like nanostructure array is used as an electron acceptor while the conjugate polymer filler is as an electron donor. The tree-like nanostructure array comprises a trunk part and a branch part. The trunk part is formed in-situ on the surface of the conducting metal layer and is used to provide a long straight transport pathway to transport electrons. The large contact area between the branch part and the conjugate polymer filler provides electron-hole separation.
US09269833B2 Methods and apparatus for hybrid MOS capacitors in replacement gate process
Methods and apparatus for hybrid MOS capacitors in replacement gate process. A method is disclosed including patterning a gate dielectric layer and a polysilicon gate layer to form a polysilicon gate region over a substrate; forming an inter-level dielectric layer over the substrate and surrounding the polysilicon gate region; defining polysilicon resistor regions each containing at least one portion of the polysilicon gate region and not containing at least one other portion of the polysilicon gate region, forming dummy gate regions removing the dummy gate regions and the gate dielectric layer underneath the dummy gate regions to leave trenches; and forming high-k metal gate devices in the trenches. A capacitor region including a high-k metal gate and a polysilicon gate next to the high-k metal gate is disclosed. Additional hybrid capacitor apparatuses are disclosed.
US09269829B2 Split gate flash memory structure with a damage free select gate and a method of making the split gate flash memory structure
A method of manufacturing a semiconductor structure of a pair of split gate flash memory cells is provided. A pair of select gates spaced on a semiconductor substrate is formed, and a sacrificial spacer filling a central region between the select gates is formed. A charge trapping dielectric layer is formed conformally along sidewalls of the select gates and over top surfaces of the sacrificial spacer and the select gates, and a pair of memory gates corresponding to the pair of select gates is formed over and laterally abutting the charge trapping dielectric layer. The resulting semiconductor structure is also provided.
US09269822B2 Semiconductor device and method for manufacturing semiconductor device
A method for manufacturing a semiconductor device with adjusted threshold is provided. In a semiconductor device including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is provided, a charge trap layer provided between the first gate electrode and the semiconductor, and a gate insulating layer provided between the second gate electrode and the semiconductor, a threshold is increased by trapping electrons in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the source or drain electrode for 1 second or more while heating. After the threshold adjustment process, the first gate electrode is removed or insulated from other circuits. Alternatively, a resistor may be provided between the first gate electrode and other circuits.
US09269819B2 Semiconductor device having a gate and a conductive line in a pillar pattern
A semiconductor device including a vertical gate and a method for manufacturing the same are disclosed, which prevent a floating body phenomenon, thereby increasing a cell threshold voltage and reducing leakage current, resulting in improved refresh properties of the semiconductor device. The semiconductor device includes a plurality of pillar patterns, including first pillar patterns arranged along a first direction and second pillar patterns arranged along a second direction, formed over a semiconductor substrate; a gate extending in the first direction, arranged along sidewalls of the first pillar patterns, and configured to couple the first pillar patterns; a junction region formed in an upper portion of the pillar patterns; and a conductive line arranged along the sidewalls of the first pillar patterns and provided in a region disposed below the junction region and over the gate.
US09269817B2 Semiconductor device and manufacturing method thereof, delamination method, and transferring method
A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.
US09269816B2 Thin film transistor
A thin film transistor (TFT) is provided, which includes a substrate, a first gate layer, an insulation layer, a first source/drain layer, a second source/drain layer, a semiconductor layer, a passivation layer and a second gate layer. The first gate layer is disposed on the substrate. The insulation layer is disposed on the first gate layer. The first source/drain layer is disposed on the insulation layer. The second source/drain layer is disposed on the insulation layer. The semiconductor layer is disposed on the insulation layer and covers the first source/drain layer and the second source/drain layer. The passivation layer is disposed on the insulation layer and covers the semiconductor layer. The second gate layer is disposed on the passivation layer and contacts the first gate layer through a via so that the two gate layers keep a same voltage level.
US09269815B2 FinFET semiconductor device with a recessed liner that defines a fin height of the FinFet device
One method disclosed herein includes forming a conformal liner layer in a plurality of trenches that define a fin, forming a layer of insulating material above the liner layer, exposing portions of the liner layer, removing portions of the liner layer so as to result in a generally U-shaped liner positioned at a bottom of each of the trenches, performing at least one third etching process on the layer of insulating material, wherein at least a portion of the layer of insulating material is positioned within a cavity of the U-shaped liner layer, and forming a gate structure around the fin. A FinFET device disclosed herein includes a plurality of trenches that define a fin, a local isolation that includes a generally U-shaped liner that defines, in part, a cavity and a layer of insulating material positioned within the cavity, and a gate structure positioned around the fin.
US09269813B2 Field effect transistor
Field effect transistors are provided. An active region protrudes from a substrate and a gate electrode is provided on the active region. Source/drain regions are provided at both sides of the active region under the gate electrode, respectively. A width of a lower portion of the gate electrode is greater than a width of an upper portion of the gate electrode.
US09269811B2 Spacer scheme for semiconductor device
A manufacturing method for a semiconductor device includes providing a substrate having at least agate structure formed thereon and a first spacer formed on sidewalls of the gate structure, performing an ion implantation to implant dopants into the substrate, forming a disposal spacer having at least a carbon-containing layer on the sidewalls of the gate structure, the carbon-containing layer contacting the first spacer, and performing a thermal treatment to form a protecting layer between the carbon-containing layer and the first spacer.
US09269808B2 Method and apparatus for power device with depletion structure
A semiconductor device is provided. The semiconductor device includes a substrate of a first conductivity type and an epitaxial structure of the first conductivity type disposed on the substrate. The semiconductor device further includes a well region having a first doping concentration of a second conductivity type disposed in the epitaxial structure and the substrate. The semiconductor device further includes a drain region and a source region respectively formed in the epitaxial structure inside and outside of the well region. The semiconductor device further includes a body region of the first conductivity type disposed under the source region, and a pair of first and second doped regions disposed in the well region between the drain region and the source region. The first and second doped regions extend outside of the well region and toward the body region.
US09269804B2 Gate recessed FDSOI transistor with sandwich of active and etch control layers
The structure and the fabrication methods herein implement a fully depleted, recessed gate silicon-on-insulator (SOI) transistor with reduced access resistance, reduced on-current variability, and strain-increased performance. This transistor is based on an SOI substrate that has an epitaxially grown sandwich of SiGe and Si layers that are incorporated in the sources and drains of the transistors. Assuming a metal gate last complementary metal-oxide semiconductor (CMOS) technology and using the sidewall spacers as a hard mask, a recess under the sacrificial gate reaching all the way through the SiGe layer is created, and the high-K gate stack and metal gate are formed within that recess. The remaining Si region, having a precisely controlled thickness, is the fully depleted channel.
US09269803B2 Semiconductor device
The reliability of a field effect transistor made of a nitride semiconductor material is improved. An ohmic electrode includes a plurality of unit electrodes isolated to be separated from each other. With this configuration, an on-state current can be prevented from flowing in the unit electrodes in a y-axial direction (negative direction). Further, in the respective unit electrodes, a current density of the on-state current flowing in the y-axial direction (negative direction) can be prevented from increasing. As a result, an electromigration resistance of the ohmic electrode can be improved.
US09269799B2 Semiconductor apparatus
A semiconductor apparatus includes: a substrate; a buffer layer formed on the substrate; a strained layer superlattice buffer layer formed on the buffer layer; an electron transit layer formed of a semiconductor material on the strained layer superlattice buffer layer; and an electron supply layer formed of a semiconductor material on the electron transit layer; the strained layer superlattice buffer layer being an alternate stack of first lattice layers including AlN and second lattice layers including GaN; the strained layer superlattice buffer layer being doped with one, or two or more impurities selected from Fe, Mg and C.
US09269797B2 Manufacturing method of semiconductor device
A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
US09269793B2 Method and system for a gallium nitride self-aligned vertical MESFET
A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region.
US09269792B2 Method and structure for robust finFET replacement metal gate integration
A robust gate spacer that can resist a long overetch that is required to form gate spacers in fin field effect transistors (FinFETs) and a method of forming the same are provided. The gate spacer includes a first gate spacer adjacent sidewalls of at least one hard mask and a top portion of sacrificial gate material of a sacrificial gate structure and a second gate spacer located beneath the first gate spacer and adjacent remaining portions of sidewalls of the sacrificial gate material. The first gate spacers is composed of a material having a high etch resistance that is not prone to material loss during subsequent exposure to dry or wet etch chemicals employed to form the second gate spacer and to remove the hard mask.
US09269784B2 Gallium arsenide based device having a narrow band-gap semiconductor contact layer
A device includes a semiconductor die. The semiconductor die includes a plurality of semiconductor layers disposed on a GaAs substrate, including a first semiconductor layer having a first band-gap and a second semiconductor layer having a second band-gap. The semiconductor die further includes a contact layer disposed epitaxially upon the first semiconductor layer. The contact layer has a thickness that is less than a critical thickness. The second semiconductor layer is epitaxially disposed upon the contact layer. The contact layer has a third band-gap that is less than the first band-gap and the second band-gap. The semiconductor die further includes a conductive layer disposed upon the contact layer to form an ohmic contact. The conductive layer comprises one or more metal layers compatible with silicon processing techniques.
US09269782B2 Semiconductor device
A semiconductor device, comprising: a first semiconductor layer disposed on a substrate; a second semiconductor layer disposed on the first semiconductor layer; a lower insulating film disposed on the second semiconductor layer; a p-type electroconductive oxide film disposed on the lower insulating film; an upper insulating film disposed on the oxide film; and a gate electrode disposed on the upper insulating film, wherein the lower insulating film under the gate electrode has a depressed portion.
US09269777B2 Source/drain structures and methods of forming same
The present disclosure provides a semiconductor device including a gate stack disposed over a substrate, a source/drain (S/D) feature at least partially embedded within the substrate adjacent the gate stack. The S/D feature includes a first semiconductor material layer, a second semiconductor material layer disposed over the first semiconductor material layer. The second semiconductor material layer is different to the first semiconductor material layer. The S/D also includes a third semiconductor material layer disposed over the second semiconductor material layer, which includes a tin (Sn) material.
US09269771B2 Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses
An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.
US09269769B2 Semiconductor component including a short-circuit structure
A semiconductor component including a short-circuit structure. One embodiment provides a semiconductor component having a semiconductor body composed of doped semiconductor material. The semiconductor body includes a first zone of a first conduction type and a second zone of a second conduction type, complementary to the first conduction type, the second zone adjoining the first zone. The first zone and the second zone are coupled to an electrically highly conductive layer. A connection zone of the second conduction type is arranged between the second zone and the electrically highly conductive layer.
US09269766B2 Guard ring for memory array
A device and a method for forming a device are presented. The method includes providing a substrate having an array region in which memory cells are to be formed. Storage gates of the memory cells are formed in the array region. A guard ring surrounding the array region is formed. A gate electrode layer is formed on the substrate. The gate electrode layer fills gaps between the storage gates and guard ring. The gate electrode layer is planarized to produce a planar surface between the gate electrode layer, storage gates and guard ring. The guard ring maintains thickness of the gate electrode layer in the array region such that thickness of the storage gates across center and edge regions of the array region is uniform.
US09269763B2 Method for treating a substrate and a substrate
A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.
US09269760B2 Method of fabricating semiconductor device
A method of fabricating a semiconductor device comprises forming a first etch stop layer over a first dielectric layer. The method also comprises forming a first trench in the first etch stop layer and the first dielectric layer. The method further comprises filling the first trench with a conductive material. The method additionally comprises forming a second etch stop layer over the first etch stop layer. The method also comprises forming a second dielectric layer over the second etch stop layer. The method further comprises forming a second trench to expose the conductive material. The second trench is formed having a depth less than a total thickness of the first etch stop layer, the second etch stop layer and the second dielectric layer. The method additionally comprises depositing a first metal layer over sidewalls of the second trench and in contact with the conductive material.
US09269758B2 Low TCR high resistance resistor
The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.
US09269757B2 Organic light emitting diode display device
An organic light emitting diode display device in accordance with various embodiments may include: a pixel region defined by a gate line and a data line and having an emitting area and a transparent area; at least one driving element disposed in the emitting area; a power line overlapping the emitting area and connected to the at least one driving element; a first capacitor electrode disposed in the emitting area and overlapping the power line, wherein the power line and the first capacitor electrode form a first storage capacitor; and a second capacitor electrode disposed in the emitting area and overlapping the first capacitor electrode, wherein the first capacitor electrode and the second capacitor electrode form a second storage capacitor.
US09269752B2 Organic electroluminescence display
A display includes a substrate; an electrode layer formed on the substrate and having an electrode pattern; and an organic material layer formed on the electrode layer, wherein a plurality of pixel units are configured by the combination of the electrode pattern and the organic material layer. At least one of pixel units includes plural different colored sub-pixels arranged in delta. In one embodiment, the same colored sub-pixels of adjacent pixel units are arranged in delta. In another embodiment, the same colored sub-pixels of adjacent pixel units are arranged as a stripe. According to the embodiment, an opening of the shadow mask is corresponding to at least three sub-pixels with same color when the material is evaporated through the shadow mask.
US09269750B2 Organic light-emitting device
The present invention provides an organic light emitting device including: a substrate; and two or more stacked light emitting elements, which comprise a first electrode, at least one intermediate electrode, a second electrode, and an organic material layer disposed between the electrodes, the stacked organic light emitting elements including a first group of electrodes electrically connected to each other such that among the electrodes, at least two electrodes, which are not adjacent to each other, become a common electric potential, and a second group of electrodes which include one electrode among electrodes which are not electrically connected to the first group of electrodes, or at least two electrodes which are not electrically connected to the first group of electrodes and are electrically connected to each other so as to be a common electric potential without being adjacent to each other, in which the stacked organic light emitting elements are disposed at an interval apart from each other on the substrate and driven by an alternating current power source such that a form, in which a first group of electrodes of one stacked organic light emitting element among the stacked organic light emitting elements are directly connected to a second group of electrodes of another stacked organic light element, is continuously repeated.
US09269749B2 Organic electroluminescence display panel
An organic electroluminescence display panel that includes a plurality of first pixel areas, a plurality of second pixel areas, and a plurality of third pixel areas is provided. The organic electroluminescence display panel includes a first electrode layer, an organic layer including a light-emitting layer made of organic light-emitting material and a second electrode layer. The first electrode layer includes a reflective material. The organic layer is located on the first electrode layer. The second electrode layer is located on the organic layer. The material of the second electrode layer includes a transparent metal oxide conductive material. The thickness of the second electrode layer is a single thickness and is greater than 300 nm.
US09269748B2 Display device and method of converting solar energy into electrical energy
The present invention discloses a display device. The display device includes an OLED display and a voltage converter. The OLED display used for displaying images comprises at least one pixel comprising red, green and blue sub-pixels and arranges an OPV cell used for converting solar energy into electrical energy. The voltage converter is used for converting voltage of the electrical energy. The present invention also discloses a method that the display device converts solar energy into electrical energy.
US09269747B2 Self-aligned interconnection for integrated circuits
Methods and structures provide horizontal conductive lines of fine pitch and self-aligned contacts extending from them, where the contacts have at least one dimension with a more relaxed pitch. Buried hard mask materials permit self-alignment of the lines and contacts without a critical mask, such as for word-line electrode lines and word-line contacts in a memory device.
US09269745B2 Light emitting diode having a plurality of light emitting units
Exemplary embodiments of the present invention provide a light emitting diode including light emitting units disposed on a substrate, and wires connecting the light emitting units to each other, wherein the light emitting units each include a parallelogram-shaped light emitting unit having two acute angles and two obtuse angles, or a triangular light emitting unit having three acute angles.
US09269744B2 Manufacturing method of solid-state imaging apparatus
To realize simplification of a process of forming hollow portions in a solid-state imaging apparatus, a plurality of light receiving portions is formed on a semiconductor substrate, and color filter layers as hollow portion forming layers are formed above the semiconductor substrate (FIG. 1A). A sealable layer for opening boundary portions of the color filter layers is formed on the color filter layers (FIG. 1B). Hollow portions are formed on side surfaces of the color filter layer by etching using the sealable layer as a mask (FIG. 1C). The sealable layer is heated and softened to connect mutually adjacent sealable layers to form a sealing layer for sealing the aperture regions of the hollow portions (FIG. 1D).
US09269743B2 Methods of forming imaging device layers using carrier substrates
An array of color filter elements may be formed over an array of photodiodes in an integrated circuit for an imaging device using a carrier substrate. The carrier substrate may have a planar surface with a release layer. A layer of color filter material may be applied to the release layer. The carrier substrate may then be flipped and the layer of color filter material may be bonded to the integrated circuit. Heat may be applied to activate the release layer and the carrier substrate may be removed at the interface between the release layer and the color filter material. The layer of color filter material may be patterned either before bonding the layer of color filter material or after the carrier substrate is removed. A layer of microlenses may be formed over the array of color filter elements using a carrier substrate.
US09269739B2 Access-resistant diode array device having enhanced stability
A device includes a substrate carrying an array of diodes, organized in rows and columns, and a peripheral substrate contact is arranged on at least one side of the array. The substrate includes one or more buried conducting lines electrically connected to the peripheral substrate contact and being positioned between at least two neighboring columns of diodes and/or between at least two neighboring rows of diodes.
US09269735B2 Method of manufacturing solid-state imaging device, solid-state imaging device, and electronic apparatus
The present disclosure provides a method of manufacturing a solid-state imaging device, including, forming on a first substrate a semiconductor thin film which is to be photoelectric conversion sections, forming driving circuits on a face side of a second substrate, laminating the first substrate and the second substrate by disposing the first substrate and second substrate opposite to each other in a condition in which the semiconductor thin film is connected to the driving circuits, and removing the first substrate from the semiconductor thin film in a condition in which the semiconductor thin film is left on the second substrate side.
US09269734B2 Method of manufacturing solid-state imaging device
According to one embodiment, the method of manufacturing a solid-state imaging device includes: forming a plurality of photoelectric conversion elements by two-dimensionally arranging semiconductor areas of a second conductivity type at a semiconductor layer of a first conductivity type in a matrix pattern; forming the photoelectric conversion elements in a rectangular shape in plan view, the photoelectric conversion elements being formed by forming a grid-like trench in plan view so as to partition the semiconductor layer; forming the photoelectric conversion element formed into the rectangular shape in plan view into a convex polygonal shape in plan view whose number of corners is larger than the number of corners of a rectangular; and forming an element isolation area including a light shielding member at a trench coated with an insulating film after coating an inner peripheral surface of the trench with the insulating film.
US09269731B2 Integrated terahertz imaging systems
A low-power 4×4-pixel THz camera with responsivity greater than 2.5 MV/W and sub-10 pW/√Hz NEP at 0.25 THz is integrated in 130 nm silicon without using either high-resistivity substrates or silicon lenses. Imaging results with a fully integrated radiating CMOS power source demonstrate the first entirely silicon-based THz imager.
US09269729B2 Thin film transistor array panel and manufacturing method of the same
A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.
US09269728B2 Semiconductor device
A semiconductor device including a capacitor with increased charge capacity and having a high aperture ratio and low power consumption is provided for a semiconductor device including a driver circuit. The semiconductor device includes a driver circuit which includes a first transistor including gate electrodes above and below a semiconductor film so as to overlap with the semiconductor film; a pixel which includes a second transistor including a semiconductor film; a capacitor which includes a dielectric film between a pair of electrodes in the pixel; and a capacitor line electrically connected to one of the pair of electrodes. In the semiconductor device, the gate electrode over the semiconductor film of the first transistor is electrically connected to the capacitor line.
US09269726B2 Thin film transistor array panel and manufacturing method thereof
A thin film transistor (TFT) array panel and a manufacturing method thereof are disclosed. A contact hole may be formed to expose a pad disposed on a substrate of the TFT array panel. A first layer of a connecting member is formed with the same layer as a first field generating electrode and is disposed in the contact hole. A second passivation layer is disposed in the TFT array panel, but is removed at a region where the contact hole is formed and portions of the second passivation layer that cover the first layer of the connecting member. A second layer of the connecting member is formed on the first layer of the connecting member.
US09269725B2 Display device
A driver circuit portion of a display device has a function in which image signals are written to a selected pixel successively so as to display an image on a screen and a function in which writing operation of an image signal is stopped and a transistor is turned off so as to maintain one image written to the screen when the one image is continuously displayed on the screen. Such functions are achieved by a transistor whose off current per micrometer in channel width is reduced to an extremely low value that is lower than 10 zA/μm at room temperature and lower than 100 zA/μm at 85° C.
US09269718B1 Manufacturing method of semiconductor memory device
In accordance with an embodiment, a manufacturing method of a semiconductor device includes: forming memory cells and select transistors on a semiconductor substrate configured to select any memory cell, forming a first insulating nitride film, forming a contact, and selectively removing the first insulating nitride film. The first insulating nitride film is formed so as to cover the semiconductor substrate between the select transistors adjacent in the first direction, the select transistors, and the memory cells. The first insulating nitride film is selectively removed in a region other than the region in which the contact is formed and in a region above the select transistors or the memory cells.
US09269716B2 Method of manufacturing semiconductor device having embedded conductive line
Disclosed herein is a method includes: forming first and second cavities, the first cavity having a first width, each of the second cavities having a second width narrower than the first width; forming a first conductive layer buried in the second cavities and formed on bottom and side surface of the semiconductor substrate defined by the first cavity so that a third cavity is defined by the first conductive layer formed on the bottom and side surface of the semiconductor substrate; subjecting an etch back process to the first conductive layer so that a first conductive portion is formed at a bottom corner of the first cavity, further a fourth cavity is formed on the semiconductor substrate uncovered with the first conductive portion in the first cavity; and forming a first insulating layer in the fourth cavity and in the second cavity.
US09269713B2 Semiconductor device and method for producing the same
A power semiconductor device comprises a first substrate that is highly doped with a first dopant type, the first substrate having a front face and a back face, the back face forming a backside of the device, a vertical p-type FET and a vertical n-type FET provided laterally adjacent to each other on the front face of the first substrate, wherein one of the FETs has a first drift zone with a complementary doping to the first dopant of the first substrate, and wherein the p-type FET and the n-type FET share the first substrate as a common backside, and wherein a region between the first drift zone and the first substrate comprises a highly conductive structure providing a low ohmic connection between the first drift zone and the first substrate. Further, a method for producing such a device is provided.
US09269708B2 Methods and apparatus for measuring analytes using large scale FET arrays
Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
US09269705B2 Anti-snapback circuitry for metal oxide semiconductor (MOS) transistor
A circuit for protecting a metal oxide semiconductor (MOS) device is configured to hold down or pull down a voltage at a gate of the protected MOS device during an electrostatic discharge (ESD) event. The circuit includes at least one active device or capacitance-providing element connected to the gate of the protected MOS device, configured to pull down or hold down the voltage at the gate of the protected MOS device when the ESD event occurs.
US09269703B2 ESD protection using diode-isolated gate-grounded nMOS with diode string
An ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device. A method of forming an ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device.
US09269702B2 Methods for cell boundary encroachment and layouts implementing the same
A semiconductor device is disclosed to include a plurality of cells. Each of the cells has a respective outer cell boundary defined to circumscribe the cell in an orthogonal manner. Also, each of the cells includes circuitry for performing one or more logic functions. This circuitry includes a plurality of conductive features defined in one or more levels of the cell. One or more of the conductive features in at least one level of a given cell is an encroaching feature positioned to encroach by an encroachment distance into an exclusion zone. The exclusion zone occupies an area within the cell defined by an exclusion distance extending perpendicularly inward into the given cell from a first segment of the outer cell boundary. The exclusion distance is based on a design rule distance representing a minimum separation distance required between conductive features in adjacently placed cells on the semiconductor device.
US09269695B2 Semiconductor device assemblies including face-to-face semiconductor dice and related methods
Methods of manufacturing semiconductor device assemblies include attaching a back side of a first semiconductor die to a substrate and structurally and electrically coupling a first end of laterally extending conductive elements to conductive terminals on or in a surface of the substrate. Second ends of the laterally extending conductive elements are structurally and electrically coupled to bond pads on or in an active surface of the first semiconductor die. Conductive structures are structurally and electrically coupled to bond pads of a second semiconductor die. At least some of the conductive structures are aligned with at least some of the bond pads of the first semiconductor die. An active surface of the second semiconductor die faces an active surface of the first semiconductor die. At least some of the conductive structures are structurally and electrically coupled to at least some of the bond pads of the first semiconductor die.
US09269694B2 Packages with thermal management features for reduced thermal crosstalk and methods of forming same
An embodiment package includes a first die stack on a surface of a package component, a second die stack on the surface of the package component, and a contour lid over the first die stack and second die stack. The contour lid includes a first thermal conductive portion over the first die stack, a second thermal conductive portion over the second die stack, and a thermal barrier portion between the first thermal conductive portion and the second thermal conductive portion. The thermal barrier portion includes a low thermal conductivity material.
US09269692B2 Stacked microelectronic assembly with TSVS formed in stages and carrier above chip
A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.
US09269691B2 Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposer
A semiconductor device has a semiconductor die. The semiconductor die is disposed over a conductive substrate. An encapsulant is deposited over the semiconductor die. A first interconnect structure is formed over the encapsulant. An opening is formed through the substrate to isolate a portion of the substrate electrically connected to the first interconnect structure. A bump is formed over the first interconnect structure. Conductive vias are formed through the encapsulant and electrically connected to the portion of the substrate. A plurality of bumps is formed over the semiconductor die. A first conductive layer is formed over the encapsulant. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over the first insulating layer and first conductive layer. A second insulating layer is formed over the first insulating layer and second conductive layer. Protrusions extend above the substrate.
US09269689B1 Single sided, flat, no lead, integrated circuit package
An integrated circuit package comprising an enclosure including a dielectric housing, a first electrical contact, and a second electrical contact. The dielectric housing, the first electrical contact, and the second electrical contact are configured to form a contact side of the enclosure. In addition, the first and second electrical contacts are sized to be substantially alignment insensitive for electro-mechanical connection to corresponding contacts of an end-use equipment. The enclosure encapsulates an integrated circuit die which is electrically coupled to the first and second electrical contacts. The alignment insensitive first and second electrical contacts may be electro-mechanically connected to corresponding contacts of an end-use equipment (e.g., a printer). Further, the integrated circuit package may be hosted by a peripheral device (e.g., a printer cartridge).
US09269688B2 Bump-on-trace design for enlarge bump-to-trace distance
A package includes a first and a second package component. The first package component includes a first metal trace and a second metal trace at the surface of the first package component. The second metal trace is parallel to the first metal trace. The second metal trace includes a narrow metal trace portion having a first width, and a wide metal trace portion having a second width greater than the first width connected to the narrow metal trace portion. The second package component is over the first package component. The second package component includes a metal bump overlapping a portion of the first metal trace, and a conductive connection bonding the metal bump to the first metal trace. The conductive connection contacts a top surface and sidewalls of the first metal trace. The metal bump is neighboring the narrow metal trace portion.
US09269685B2 Integrated circuit package and packaging methods
An integrated circuit package includes a package module formed from successive build-up layers which define circuit interconnections, a cavity formed on a top-side of the package module, a chip having a front side with forward contacts and having a back-side, the chip disposed such that in the cavity such that at least one forward contact is electrically connected to at least one of the circuit interconnections of the package module, and a top layer coupled to the back-side of the chip covering at least a part of the chip and the top-side of the package module.
US09269683B2 Integrated circuit chip with pyramid or cone-shaped conductive pads for flexible C4 connections and a method of forming the integrated circuit chip
Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface of the chip, a vertex opposite the base and, optionally, mushroom-shaped cap atop the vertex. Each pad can include a single layer of conductive material or multiple layers of conductive material (e.g., a wetting layer stacked above a non-wetting layer). The pads can be left exposed to allow for subsequent connection to corresponding solder bumps on a chip carrier or a second chip. Alternatively, solder balls can be positioned on the conductive pads to allow for subsequent connection to corresponding solder-paste filled openings on a chip carrier or a second chip.
US09269678B2 Bond pad structure and method of manufacturing the same
A method of manufacturing a bond pad structure, comprising the steps of forming a pad material layer on a passivation layer, forming a protection layer on the pad material layer, performing an etching process to pattern the protection layer and the pad material layer into a bond pad structure, and removing the protection layer on the bond pad structure.
US09269676B2 Through silicon via guard ring
The present disclosure relates to forming a plurality of through silicon vias guard rings proximate the scribes streets of a microelectronic device wafer. The microelectronic device wafer includes a substrate wherein the through silicon via guard ring is fabricated by forming vias extending completely through the substrate. The through silicon via guard rings act as crack arresters, such that defects caused by cracks resulting from the dicing of the microelectronic wafer are substantially reduced or eliminated.
US09269674B2 Integrated circuit having electromagnetic shielding capability and manufacturing method thereof
The present invention discloses an integrated circuit having electromagnetic shielding capability and the manufacturing method thereof. An embodiment of the said integrated circuit comprises: a semiconductor circuit structure including a first surface which covers an electromagnetic radiation area; an electromagnetic shielding layer covering the first surface and including at least one contact; and at least one conducting path operable to electrically connect the at least one contact with a steady voltage and thereby shield off the electromagnetic wave from the electromagnetic radiation area, wherein the current running through the electromagnetic shielding layer is zero or less than the maximum current running through the electromagnetic radiation area.
US09269672B2 Semiconductor integrated device for display drive
In a display drive IC chip of an LCD or the like, an alignment mark is arranged in an alignment mark arrangement region on the main surface thereof, a dummy pattern is arranged on a lower layer, and an actual pattern is further arranged on the lower layer.
US09269668B2 Interconnect having air gaps and polymer wrapped conductive lines
A device includes a first conductive line in a first metallization layer over a dielectric layer, wherein the first conductive line is wrapped by a first polymer layer on three sides and the first conductive line and the dielectric layer are separated by a bottom portion of the first polymer layer, a second conductive line over the dielectric layer, wherein the second conductive line is wrapped by a second polymer layer on three sides and the second conductive line and the dielectric layer are separated by a bottom portion of the second polymer layer and an air gap between the first conductive line and the second conductive line.
US09269667B2 Semiconductor apparatus and an improved structure for power lines
A semiconductor apparatus includes a first power supply pad configured to supply a first power; a second power supply pad configured to supply a second power; a first power line configured to be directly electrically coupled to the first power supply pad; and a second power line configured to be directly electrically coupled to the second power supply pad.
US09269666B2 Methods for selective reverse mask planarization and interconnect structures formed thereby
Methods for planarizing layers of a material, such as a dielectric, and interconnect structures formed by the planarization methods. The method includes depositing a first dielectric layer on a top surface of multiple conductive features and on a top surface of a substrate between the conductive features. A portion of the first dielectric layer is selectively removed from the top surface of at least one of the conductive features without removing a portion the first dielectric layer that is between the conductive features. A second dielectric layer is formed on the top surface of the at least one of the conductive features and on a top surface of the first dielectric layer, and a top surface of the second dielectric layer is planarized. A layer operating as an etch stop is located between the top surface of at least one of the conductive features and the second dielectric layer.
US09269656B2 High efficiency module
A module (1) includes a first functional device (2) and a second functional device (3). The first functional device (2) includes a base electrode, an emitter electrode and a collector electrode. The second functional device (3) includes at least one electrode. The module (1) further includes a conductive frame (4). One of the base electrode, the emitter electrode, and the collector electrode of the first functional device (2) is directly connected to the frame (4). The electrode of the second functional device (3) is also directly connected to the frame (4). The frame (4) includes a portion serving as a terminal for external connection.
US09269655B2 Method for fabricating a semiconductor package with conductive carrier integrated heat spreader
In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.
US09269653B2 SGS or GSGSG pattern for signal transmitting channel, and PCB assembly, chip package using such SGS or GSGSG pattern
A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
US09269651B2 Hybrid TSV and method for forming the same
A semiconductor chip includes a substrate and a semiconductor layer positioned above the substrate. A hybrid through-silicon via (“TSV”) extends continuously through at least the semiconductor layer and the substrate and includes a first TSV portion and a second TSV portion. A lower portion of the first TSV portion is positioned in the substrate and has a lower surface adjacent to a back side of the substrate and an upper surface below the semiconductor layer. Upper sidewall portions of the first TSV portion extend from the upper surface through at least the semiconductor layer. A depth of the lower portion is greater than a thickness of the upper sidewall portions. The second TSV portion is conductively coupled to the first TSV portion, is laterally surrounded by the upper sidewall portions, and extends continuously from the upper surface through at least the semiconductor layer.
US09269650B2 Chip-on-film package and display device including the same
A chip-on-film package includes a base film including a bending area, an integrated circuit chip at an upper surface of the base film, a first line at the upper surface of the base film and overlapping the bending area, a second line at a lower surface of the base film and overlapping the bending area, a via pattern penetrating the base film to electrically couple the first line and the second line, and a common line coupled to the first line and to the integrated circuit chip, wherein at least a portion of the first line does not overlap at least a portion of the second line in a plan view.
US09269645B1 Fan-out wafer level package
A fan-out wafer level package is provided. The fan-out wafer level package includes a semiconductor element, a molding compound, a first fan-out structure, a conductive heat spreader, and a plurality of solder balls. The semiconductor element includes a plurality of bonding pads. The molding compound covers the semiconductor element. The first fan-out structure is formed on the semiconductor element, wherein the first fan-out structure has a plurality of fan-out contacts electrically connected to the bonding pads. The conductive heat spreader is formed on the first fan-out structure, wherein the conductive heat spreader has a plurality of through holes filled with a conductive material. The solder balls are formed on the conductive heat spreader, wherein the solder balls are electrically connected to the first fan-out structure via the through holes filled with the conductive material.
US09269643B2 Chip package structure
A chip package structure is provided. The chip package structure includes a chip, at least one inducting coil, a molding compound and a redistribution circuit layer. The chip includes an active surface, a back surface opposite to the active surface. The inducting coil is disposed around a periphery region of the chip. The molding compound covers the chip and the periphery region and exposes the active surface. The inducting coil is disposed at the molding compound. The redistribution circuit layer covers the active surface, part of the molding compound and part of the inducting coil, and electrically connects the chip.
US09269637B2 Thin film transistor substrate
A TFT substrate includes: a substrate; and a plurality of TFTs, wherein each of the TFTs comprises: a gate electrode, disposed on the substrate; a gate insulating layer, disposed on the substrate and covering the gate electrode; a metallic oxide active layer, disposed on the gate insulating layer; a metallic oxide protection layer, disposed on the metallic oxide active layer; an etching stop layer, disposed on the metallic oxide protection layer, wherein a first through hole and a second through hole penetrate through the etching stop layer and the metallic oxide protection layer; and a source electrode and a drain electrode, disposed in the first through hole and the second through hole respectively, and electrically connected to the metallic oxide active layer.
US09269635B2 CMOS Transistor with dual high-k gate dielectric
A CMOS device with transistors having different gate dielectric materials and a method of manufacture thereof. A CMOS device is formed on a workpiece having a first region and a second region. A first gate dielectric material is deposited over the second region. A first gate material is deposited over the first gate dielectric material. A second gate dielectric material comprising a different material than the first gate dielectric material is deposited over the first region of the workpiece. A second gate material is deposited over the second gate dielectric material. The first gate material, the first gate dielectric material, the second gate material, and the second gate dielectric material are then patterned to form a CMOS device having a symmetric Vt for the PMOS and NMOS FETs.
US09269634B2 Self-aligned metal gate CMOS with metal base layer and dummy gate structure
A semiconductor device is formed by first providing a dual gate semiconductor device structure having FET pair precursors, which includes an nFET precursor and a pFET precursor, wherein each of the nFET precursor and the pFET precursor includes a dummy gate structure. At least one protective layer is deposited across the FET pair precursors, leaving the dummy gate structures exposed. The dummy gate structure is removed from one of the nFET precursor and the pFET precursor to create therein one of an nFET gate hole and a pFET gate hole, respectively. A fill is deposited into the formed one of the nFET gate hole and the pFET gate.
US09269632B2 FinFET device and method of manufacturing same
A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.
US09269630B2 Patterning of vertical nanowire transistor channel and gate with directed self assembly
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical nanowire transistor, potentially based on one lithographic operation. In embodiments, DSA material is confined within a guide opening patterned using convention lithography. In embodiments, channel regions and gate electrode materials are aligned to edges of segregated regions within the DSA material.
US09269629B2 Dummy fin formation by gas cluster ion beam
FinFET structures with dielectric fins and methods of fabrication are disclosed. A gas cluster ion beam (GCIB) tool is used to apply an ion beam to exposed fins, which converts the fins from a semiconductor material such as silicon, to a dielectric such as silicon nitride or silicon oxide. Unlike some prior art techniques, where some fins are removed prior to fin merging, in embodiments of the present invention, fins are not removed. Instead, semiconductor (silicon) fins are converted to dielectric (nitride/oxide) fins where it is desirable to have isolation between groups of fins that comprise various finFET devices on an integrated circuit (IC).
US09269628B1 Methods of removing portions of at least one fin structure so as to form isolation regions when forming FinFET semiconductor devices
One illustrative method disclosed herein includes, among other things, forming a plurality of first and second fins that are made of different semiconductor materials that may be selectively etched relative to one another, forming a first insulating material between the plurality of first and second fins, forming an etch mask above the first and second fins that exposes a portion of at least one first fin and exposes a portion of at least one second fin, performing an etching process to remove the exposed portion of the at least one first fin selectively to the first insulating material and the exposed portion of the at least one second fin so as to thereby define at least one removed fin cavity in the first insulating material, removing the patterned etch mask, and forming a second insulating material in the at least one removed fin cavity.
US09269624B2 Wafer processing method
Disclosed herein is a wafer processing method including a wafer supporting step of mounting an adhesive film for die bonding on the back side of a wafer, attaching a dicing tape to the adhesive film, and supporting the peripheral portion of the dicing tape to an annular frame, wherein the wafer has already been divided into individual device chips along division lines formed on the front side or a break start point has already been formed inside the wafer along each division line, a protective film forming step of applying a water-soluble resin to the front side of the wafer and/or the peripheral portion of the adhesive film projecting from the outer circumference of the wafer, thereby forming a protective film from the water-soluble resin, and an adhesive film breaking step of expanding the dicing tape to thereby break the adhesive film along the individual device chips.
US09269623B2 Ephemeral bonding
Compositions containing an adhesive material and a release additive are suitable for temporarily bonding two surfaces, such as a wafer active side and a substrate. These compositions are useful in the manufacture of electronic devices where a component, such as an active wafer, is temporarily bonded to a substrate, followed by further processing of the active wafer.
US09269620B2 Method of manufacturing bump
A bump manufacturing method may be provided. The bump manufacturing method may include forming a bump on an electrode pad included in a semiconductor device, and controlling a shape of the bump by reflowing the bump formed on the semiconductor device under an oxygen atmosphere.
US09269615B2 Multi-layer barrier layer for interconnect structure
A method for forming an interconnect structure includes forming a recess in a dielectric layer of a substrate. An adhesion barrier layer is formed to line the recess. A first stress level is present across a first interface between the adhesion barrier layer and the dielectric layer. A stress-reducing barrier layer is formed over the adhesion barrier layer. The stress-reducing barrier layer reduces the first stress level to provide a second stress level, less than the first stress level, across a second interface between the adhesion barrier layer, the stress-reducing barrier layer, and the dielectric layer. The recess is filled with a fill layer.
US09269614B2 Method of forming semiconductor device using remote plasma treatment
A method of forming a semiconductor device comprises forming a first etch stop layer over a substrate. The method also comprises forming a low-k dielectric layer comprising carbon over the first etch stop layer. The method further comprises forming an opening in the low-k dielectric layer. The method additionally comprises filling the opening with a conductive layer. The method also comprises performing a remote plasma treatment on the low-k dielectric layer and the conductive layer. The method further comprises forming a second etch stop layer over the treated conductive layer and the treated low-k dielectric layer.
US09269609B2 Semiconductor isolation structure with air gaps in deep trenches
A device includes a semiconductor substrate, a contact plug over the semiconductor substrate, and an Inter-Layer Dielectric (ILD) layer over the semiconductor substrate, with the contact plug being disposed in the ILD. An air gap is sealed by a portion of the ILD and the semiconductor substrate. The air gap forms a full air gap ring encircling a portion of the semiconductor substrate.
US09269608B2 Bonded semiconductor structure with SiGeC/SiGeBC layer as etch stop
A semiconductor structure is formed with a first wafer (e.g. a handle wafer) and a second wafer (e.g. a bulk silicon wafer) bonded together. The second wafer includes an active layer, which in some embodiments is formed before the two wafers are bonded together. A substrate is removed from the second wafer on an opposite side of the active layer from the first wafer using a SiGeC or SiGeBC layer as an etch stop. In some embodiments, the SiGeC or SiGeBC layer is formed by epitaxial growth, ion implantation or a combination of epitaxial growth and ion implantation.
US09269606B2 Spacer enabled active isolation for an integrated circuit device
A method for forming an active isolation structure in a semiconductor integrated circuit die is disclosed. A first hard mask layer is deposited over a semiconductor substrate. Portions of the first hard mask layer are removed to form at least one trench. A spacer layer is deposited over the first hard mask and extends into each trench to cover exposed portions of the semiconductor substrate surface in each trench. Portions of the spacer layer are removed such that remaining portions define spacer layer walls covering the side walls of each trench. A second hard mask layer is deposited and extends into each trench between opposing spacer layer walls. The spacer layer walls are removed such that remaining portions of the first and second hard mask layers define a mask pattern, which is then transferred to the substrate to form openings in the substrate, which are filled with an isolation material.
US09269603B2 Temporary liquid thermal interface material for surface tension adhesion and thermal control
An assembly including a liquid thermal interface material for surface tension adhesion and thermal control used during electrical/thermal test of a 3D wafer and methods of use. The method includes temporarily attaching a thinned wafer to a carrier wafer by applying a non-adhesive material therebetween and pressing the thinned wafer and the blank silicon-based carrier wafer together.
US09269601B2 Method of manufacturing semiconductor element
A method of manufacturing a semiconductor element is provided. The method includes the following steps. A carrier and a mold are provided. A first patterned conductive layer including a plurality of traces is formed on the carrier. A second patterned conductive layer is formed on the first patterned conductive layer. The carrier is disposed with the mold to form at least one mold cavity. The mold cavity is infused with a molding material. The molding material fills the mold cavity to encapsulate the first and second patterned conductive layers. The carrier is removed by etching to expose the plurality of traces embedded in the molding material without affecting the width of the traces.
US09269593B2 Multilayer electronic structure with integral stepped stacked structures
A multilayer electronic support structure comprising a plurality of layers extending in an X-Y plane consisting of a dielectric material surrounding metal via posts that conduct in a Z direction perpendicular to the X-Y plane, wherein a stacked via structure crossing at least two via layers of the plurality of layers comprises at least two via posts in neighboring via layers wherein the at least two stacked via posts in neighboring layers have different dimensions in the X-Y plane, such that the stacked via structure tapers.
US09269589B2 Dense finFET SRAM
A method for fabricating the device includes patterning a first structure and a second structure on a semiconductor device. A first angled ion implantation is applied to the second structure such that the first structure is protected and a second angled ion implantation is applied to the first structure such that the second structure is protected, wherein exposed portions of the first and second structures have an altered rate of oxidation. Oxidation is performed to form thicker or thinner oxide portions on the exposed portions of the first and second structures relative to unexposed portions of the first and second structures. Oxide portions are removed to an underlying layer of the first and second structures. The first and second structures are removed. Spacers are formed about a periphery of remaining oxide portions. The remaining oxide portions are removed. A layer below the spacers is patterned to form integrated circuit features.
US09269583B1 Method for fabricating memory device
Provided is a method for fabricating a memory device, including the following steps. A plurality of semiconductor fin structures is formed on a substrate. Each semiconductor fin structure includes a first doped region and a body region on which the first doped region is disposed, and a trench is disposed between adjacent two semiconductor fin structures. A second doped region is formed in the substrate under the body regions of the semiconductor fin structures and the trenches. A plurality of first contacts are formed on the substrate. A plurality of second contacts are formed on the substrate. Each second contact is electrically connected with the corresponding first doped region.
US09269577B2 Method for manufacturing nitride semiconductor device
Forming a group III nitride semiconductor layer having p-type conductivity on at least one layer or more formed on an Si substrate or sapphire substrate using at least one of an epitaxial growth or ion implantation method. When forming the group III nitride semiconductor layer, at least one type of metal element selected from Zn, Li, Au, Ag, Cu, Pt, and Pd having a formation energy of a group III element substitute higher than that of Mg is doped simultaneously with Mg of a p-type dopant to introduce an interstitial site. Subsequent to activation of Mg as an acceptor, the metal element is removed from the group III nitride semiconductor layer, and the concentration of the metal element is not more than 1/100 of the concentration of Mg to realize a hole concentration of not less than 1018 to 1019 cm−3.
US09269576B2 Silicon carbide semiconductor substrate and method for manufacturing same
A silicon carbide semiconductor substrate is made of a silicon carbide single crystal and is formed with a stamp on at least a surface as an identification indication formed of a crystal defect. When a silicon carbide single crystal is allowed to grow using the silicon carbide semiconductor substrate as a seed crystal, the stamp can be propagated to the silicon carbide single crystal as a crystal defect. When silicon carbide semiconductor substrates are manufactured using the silicon carbide single crystal, the stamp has already been formed on each of the silicon carbide semiconductor substrates.
US09269572B2 Method for manufacturing silicon carbide semiconductor substrate
A method for manufacturing a silicon carbide semiconductor substrate is provided to offer a silicon carbide semiconductor substrate having a highly flat surface at low cost. The method includes: a step of preparing a silicon carbide substrate as a seed substrate; a step of performing vapor phase etching onto a main surface of the silicon carbide substrate; and a step of epitaxially growing silicon carbide on the main surface. A carbon-atom containing gas is supplied to silicon carbide substrate from a point of time in the step of performing the vapor phase etching.
US09269569B1 Low defect density lattice-mismatched semiconductor devices and methods of fabricating same
Lattice-mismatched semiconductor devices having a substrate, a first epitaxial film disposed thereon, a dielectric material, and a second epitaxial film. The first epitaxial film contains etch pits that extend from the outer surface of the first epitaxial film into the first epitaxial film. The dielectric material is disposed within the etch pits and blocks at least some of the threading dislocations in the first epitaxial film from propagating into the second epitaxial film. Semiconductor devices containing a silicon (Si) substrate or a silicon germanium (SiGe) substrate, a germanium (Ge) film disposed over the substrate, and a dielectric material. Methods for producing such semiconductor devices.
US09269567B2 High productivity combinatorial processing using pressure-controlled one-way valves
Apparatus for high productivity combinatorial (HPC) processing of semiconductor substrates and HPC methods are described. An apparatus includes a showerhead and two or more pressure-controlled one-way valves connected to the showerhead and used for controlling flow of different processing gases into the showerhead. The pressure-controlled one-way valves are not externally controlled by any control systems. Instead, these valves open and close in response to preset conditions, such as pressure differentials and/or flow differentials. One example of such pressure-controlled one-way valves is a check valve. These valves generally allow the flow only in one direction, i.e., into the showerhead. Furthermore, lack of external controls and specific mechanical designs allow positioning these pressure-controlled one-way valves in close proximity to the showerhead thereby reducing the dead volume between the valves and the showerhead and also operating these valves at high temperatures.
US09269566B2 Substrate processing apparatus
A substrate processing apparatus capable of forming an oxide film on a substrate by forming a layer on the substrate by supplying a source gas into a process vessel accommodating the substrate via the first nozzle, and simultaneously supplying an oxygen-containing gas through a second nozzle and a hydrogen-containing gas through a first nozzle into the process vessel having an inside pressure thereof lower than atmospheric pressure; mixing and reacting the oxygen-containing gas with the hydrogen-containing gas in a non-plasma atmosphere within the process vessel to generate atomic oxygen; and oxidizing the layer with the atomic oxygen to change the layer into an oxide layer is disclosed.
US09269554B2 Cryogenic collisional cooling cell
A mass spectrometer is disclosed comprising a cooling cell for cooling ions so as to reduce their kinetic energy. The cooling cell comprises: a chamber for receiving the ions or for generating the ions therein, wherein said chamber is formed from walls defining a substantially enclosed region; and a cooling jacket surrounding said chamber, wherein said cooling jacket is arranged and configured to contain a cooling fluid and so as to remove heat from one or more walls of the chamber. The mass spectrometer further comprises a mass analyzer for receiving ions from the cooling cell after they have been cooled. The present invention reduced the kinetic energy of the ions prior to mass analysis and hence improves the resolution of the mass analyzer. The mass analyzer is preferably a time of flight mass analyzer.
US09269553B2 Systems and methods for rapidly screening samples by mass spectrometry
Systems and methods are used to rapidly screening samples. A fast sample introduction device that is non-chromatographic is instructed to supply each sample of a plurality samples to a tandem mass spectrometer using a processor. The fast sample introduction device can include a flow injection analysis device, an ion mobility analysis device, or a rapid sample cleanup device. The tandem mass spectrometer is instructed to perform fragmentation scans at two or more mass selection windows across a mass range of each sample of the plurality of samples using the processor. The two or more mass selection windows across the mass range can have fixed or variable window widths. The tandem mass spectrometer can be instructed to obtain a mass spectrum of the mass range before instructing the tandem mass spectrometer to perform the fragmentation scans.
US09269552B2 Ion detectors and methods of using them
Certain embodiments described herein are directed to ion detectors and systems. In some examples, the ion detector can include a plurality of dynodes, in which one or more of the dynodes are coupled to an electrometer. In other configurations, each dynode can be coupled to a respective electrometer. Methods using the ion detectors are also described.
US09269547B2 Semiconductor equipment
Semiconductor equipment is disclosed in this invention. The semiconductor equipment includes a reaction chamber, a wafer susceptor, and a liner device. The reaction chamber includes an opening and a circular inner wall. The wafer susceptor is capable of carrying at least one wafer. The liner device is disposed between the wafer susceptor and the circular inner wall of the reaction chamber. The liner device is capable of moving vertically between a first position and a second position. The liner device includes at least one venting opening, wherein the venting opening is connected with a venting device. Particles which are accumulated within the liner device can be removed by the venting device.
US09269542B2 Plasma cathode charged particle lithography system
In one embodiment, a system for patterning a substrate includes a plasma chamber; a power source to generate a plasma within the plasma chamber; and an extraction plate system comprising a plurality of apertures and disposed along a side of the plasma chamber. The extraction plate system is configured to receive an extraction voltage that biases the extraction plate system with respect to the plasma chamber wherein the plurality of apertures are configured to extract a plurality of respective charged particle beamlets from the plasma. The system further includes a projection optics system to direct at least one of the plurality of charged particle beamlets to the substrate.
US09269539B2 Focused ion beam apparatus
A focused ion beam apparatus includes: a focused ion beam tube configured to irradiate a focused ion beam onto a sample; a detector configured to detect secondary particles generated from the sample due to the irradiation and to output detection information regarding detected secondary particles; an image forming unit configured to form an observation image of the sample based on the detection information; a storage unit configured to store positional relation between a first processing area set on an observation image of a first sample and a cross-section surface of the first sample; and a processing area setting unit configured to automatically set a second processing area on an observation image of a second sample based on the positional relation stored in the storage unit and a position of a cross-section surface of the second sample on the observation image of the second sample.
US09269538B2 Ion beam uniformity control using ion beam blockers
A method of achieving ion beam uniformity control using ion beam blockers. The method includes generating an ion beam, detecting a current profile of said ion beam with an ion beam blocker unit, wherein said detected current profile is an initial current profile, blocking a portion of said ion beam with said ion beam blocker unit to achieve a second current profile that is different from the initial current profile, and implanting said ion beam into a workpiece after said blocking.
US09269534B2 Sample holder and method for observing electron microscopic image
In an upper main body of a sample holder, a laminate of an insulative thin film and a secondary electron emission protective thin film is provided. An electron beam emitted from an electron gun enters the secondary electron emission protective thin film side. The undersurface of the insulative thin film is a sample adhesion surface, where a sample to be an observation target is held by adsorption or the like. The secondary electron emission protective thin film is made of a material having a low secondary electron emission coefficient δ and, preferably, is non-insulative. That is, the secondary electron emission protective thin film is conductive even though the electric resistance is high. Accordingly, the charge level of a site irradiated with the electron beam has a low charge level.
US09269533B2 Analysis apparatus and analysis method
In accordance with an embodiment, an analysis apparatus includes a secondary electron optical system, at least one detector, and a composition analysis unit. The secondary electron optical system includes a charged particle beam source and a lens. The charged particle beam source generates a charged particle beam and irradiates a sample with it. The lens controls a focal position and a trajectory of the charged particle beam using an electric field or a magnetic field. The detector detects a characteristic X-ray from the sample. The composition analysis unit analyzes a composition of a material constituting the sample from the detected characteristic X-ray. Each detector is arranged in such a manner that at least part of a detection surface thereof is placed on the same plane as an exit surface of the secondary electron optical system, or placed on the charged particle beam side of the same plane.
US09269531B2 Backscatter reduction in thin electron detectors
In a direct electron detector, backscattering of electrons into the detector volume from below the sensor is prevented. In some embodiments, an empty space is maintained below the sensor. In other embodiments, a structure below the sensor includes geometry, such as multiple high aspects ratio channels, either extending to or from the sensor to trap electrons, or a structure of angled surfaces to deflect the electrons that pass through the sensor.
US09269529B2 Systems and methods for dynamic alignment beam calibration
A method for performing DA (Dynamic Alignment) beam calibration in a plasma processing system is provided. The method including acquiring a positional difference, the positional difference is acquired using an optical imaging approach. The optical imaging approach comprising of positioning the wafer on the end effector, taking a still image of the wafer on the end effector, processing the still image to ascertain the center of the wafer and an end effector-defined center defined by the end effector, and determining the positional difference between the center of the wafer and the end effector-defined center defined by the end effector. The method also includes centering a wafer with respect to an end effector by compensating for a positional difference between the wafer and the end effector with robot movement compensation. The method including moving the wafer and the end effector through DA beams associated with a plasma processing module. The method also includes obtaining a reference DA beam pattern by recording a break-and-make pattern of the DA beams. The break-and-make pattern occurring as the wafer and the end effector move through the DA beams.
US09269527B2 High-speed multi-frame dynamic transmission electron microscope image acquisition system with arbitrary timing
An electron microscope is disclosed which has a laser-driven photocathode and an arbitrary waveform generator (AWG) laser system (“laser”). The laser produces a train of temporally-shaped laser pulses each being of a programmable pulse duration, and directs the laser pulses to the laser-driven photocathode to produce a train of electron pulses. An image sensor is used along with a deflector subsystem. The deflector subsystem is arranged downstream of the target but upstream of the image sensor, and has a plurality of plates. A control system having a digital sequencer controls the laser and a plurality of switching components, synchronized with the laser, to independently control excitation of each one of the deflector plates. This allows each electron pulse to be directed to a different portion of the image sensor, as well as to enable programmable pulse durations and programmable inter-pulse spacings.
US09269525B2 Process for producing a high-temperature-resistant composite body
A high-temperature-resistant composite body is formed by joining over an area of a first, nonmetallic section via a bonding solder layer to a second, metallic section composed of Mo, an Mo-based alloy, W or a W-based alloy. A first arrangement composed of the first section, a first Zr solder and an intermediate layer is firstly soldered together in a first soldering step. A second arrangement of the resulting partial composite body, a second solder adjoining the intermediate layer and the second section is subsequently soldered together in a second soldering step. The intermediate layer at least 90 atom % of at least one of the elements Ta, Nb, W. The second solder is formed by precisely one material selected from Ti, Ti-based solder combination, V-based solder combination, Zr or Zr-based solder combination and it melts at a lower temperature than the first Zr solder in the second arrangement.
US09269523B2 Electron emission device and electron emission display
An electron emission device includes a number of first electrodes and a number of second electrodes intersected with each other to define a number of intersections. An electron emission unit is sandwiched between the first electrode and the second electrode at each of the number of intersections, wherein the electron emission unit includes a semiconductor layer and an insulating layer stacked together, the semiconductor layer defines a number of holes, the carbon nanotube layer covers the number of holes, and a portion of the carbon nanotube layer is suspended on the number of holes.
US09269521B2 Micro-plasma field effect transistors
In some aspects, a micro-plasma device comprises a plasma gas enclosure containing at least one plasma gas, and a plurality of electrodes interfaced with the plasma gas enclosure. In other aspects, a micro-plasma circuitry apparatus comprises a first layer having a cavity formed therein and a second layer having a circuit formed therein. The circuit includes a micro-plasma circuit (“MPC”) that includes one or more micro-plasma devices (“MPDs”). The first layer of the circuit is bonded to the second layer of the circuit thereby forming an enclosure that contains at least one plasma gas. An excitation voltage is applied to a drain electrode of the MPDs to generate a conductive plasma path between the drain electrode and a source electrode.
US09269518B2 Electric charging apparatus and failure determination method therefor
An electric charging apparatus and a failure determination method therefor are provided. In the electric charging apparatus, a relay allows a current to flow inside the electric charging apparatus by switching of a switch. An acceleration sensor detects a vibration of the relay and generating an acceleration sensing signal. A control unit receives the acceleration sensing signal from the acceleration sensor and detects failure of the electric charging apparatus.
US09269517B2 Kind of anti-adhesion device, a heating apparatus including the device, and method of operating the same
A kind of anti-adhesion device for a relay. The device can include a control circuit and adhesion detecting circuit of first and second relays, which are used to respectively control power on and power off of the first and second electric heater. Closing a switch of the control circuit of the first and second relays is used to lead out the line and the output elements of the adhesion detecting circuit, to form a detecting loop. An interlocking circuit is bridged between the control circuit of the first and second relay. Therefore the first and second relay won't be closed at the same time, to avoid the fault caused by parallel connection of electric heaters. The adhesion detecting circuit can output a square wave when a relay has adhesion. The square wave avoids mixing with a low level output of the detecting circuit.
US09269516B2 Quake plug
An original apparatus that will react and shut off a main fluid source during a severe earthquake. A steel ball is held at an elevated position by a secured magnet. In a severe earthquake, the seismic vibrations will cause the steel ball to break away from the magnet and fall onto the slide trigger. The weight of the steel ball and slide trigger will be pushed down and the slide trigger shall engage a momentary switch that will send voltage to a normally open motorized ball valve and cause it to close. The apparatus can be reset by manually pulling upward the lift handle towards the top cap. Resulting in the momentary switch to disengage and the voltage will seize to power the normally open motorized ball valve, causing it to go back to its normally open state. Thus allowing the fluid to pass through the ball valve.
US09269514B2 Device for protection against particles generated by an electric switching arc
A protection device for providing protection against the particles generated by an electric arc when a first electrically conductive part and a second electrically conductive part of an electrical connection unit are separated from each other, the protection device including at least one protection element disposed in the proximity of the place at which the first part and the second part separate in order to form a shield against the particles.
US09269513B2 Contactor arrangement for use in dielectric liquid
A contactor arrangement for operation in a dielectric liquid environment may include a first connection terminal and a second connection terminal, a contactor having a fixed contact, and a movable contact that is movable relative to the fixed contact, the contactor having an open state in which the movable contact is spaced apart from the fixed contact and a closed state in which the movable contact is in contact with the fixed contact so as to provide an electric connection through the contactor via the movable contact. The contactor arrangement may further include a conductor section.
US09269512B2 Rocker switch and method of operating same
A rocker switch assembly and method includes a housing having an interior cavity for locating electronic components and a plunger member movably located during actuation within the interior cavity of the housing. The plunger member is coupled to at least one contact support. The switch assembly further comprises at least one terminal fixed within the housing. The at least one terminal corresponding with the at least one contact that engages or disengages with the terminal during actuation. A lever structure is pivotly coupled to the housing by a fulcrum fixedly attached to the housing. The lever structure comprises a lever having an upper side for receiving an external force and a lower side for engaging a head on the plunger member to generate actuation of the rocker switch during pivotal rotation of the lever.
US09269507B2 Spring load adjustment structure of contact device and spring load adjustment method of contact device
A contact device includes: fixed terminals; a movable contact maker; a pressing spring; an adjustment plate that comes into contact with an upper face of the movable contact maker; a holding portion; a movable shaft; and an electromagnet block. The holding portion is divided into first and second holding portions that are separated from each other. The first and second holding portions are electrically connected to each other via only the adjustment plate, due to the adjustment plate being sandwiched by a first side plate of the first holding portion and a second side plate of the second holding portion. The adjustment plate is moved in extending and contracting directions of the pressing spring, and the adjustment plate and each of the first and second side plates are subjected to resistance welding at a position at which pressing force of the pressing spring is a predetermined value.
US09269502B2 Carbon materials comprising enhanced electrochemical properties
The present application is directed to carbon materials comprising an optimized pore structure. The carbon materials comprise enhanced electrochemical properties and find utility in any number of electrical devices, for example, as electrode material in ultracapacitors. Methods for making the disclosed carbon materials are also disclosed.
US09269497B2 Integrated capacitively-coupled bias circuit for RF MEMS switches
A switchable capacitor including a first electrode, a dielectric layer on the first electrode, a second electrode configured to be suspended in an undeflected position over the dielectric layer in a de-activated state, and to deflect toward the first electrode in an activated state in response to a voltage difference between the two electrodes, a gap between the second electrode and the dielectric layer in the activated state being less than a corresponding gap in the de-activated state, and a capacitor having a first and second end, coupled to one of the electrodes at the first end, and configured to reduce the voltage difference between the electrodes as the second electrode deflects toward the first electrode in the activated state, wherein the voltage difference between the electrodes corresponds to a bias voltage applied across the second end of the capacitor and an other one of the first and second electrodes.
US09269496B2 Capacitors adapted for acoustic resonance cancellation
An embodiment of the present invention provides a method, comprising reducing the losses due to electro-mechanical coupling and improving Q in a multilayered capacitor by placing a first capacitor layer adjacent at least one additional capacitor layer and sharing a common electrode in between the two such that the acoustic vibration of the first layer is coupled to an anti-phase acoustic vibration of the at least one additional layer.
US09269494B2 Monolithic ceramic electronic component
Solder-repellent portions are each arranged so as to extend over all or substantially all of a portion of a corresponding one of outer electrodes provided on a corresponding one of end surfaces of a monolithic ceramic electronic component and partially on portions of the outer electrode provided over two side surfaces of the monolithic ceramic electronic component. When the monolithic ceramic electronic component is mounted on the circuit board, solder does not adhere to the end surfaces and portions of the outer electrode provided on portions of the two side surfaces. Thus, expansion and contraction that occur as a result of application of an AC voltage is not transmitted or is not significantly transmitted to the circuit board. Consequently, vibrations of the circuit board are significantly reduced or prevented.
US09269487B2 Common mode noise filter and production method therefor
A common mode noise filter includes a first insulating layer, a first coil conductor on an upper surface of the first insulating layer, a second coil conductor on a lower surface of the first insulating layer, a second insulating layer on the upper surface of the first insulating layer to cover the first coil conductor, a third insulating layer on a lower surface of the second insulating layer to cover the second coil conductor. The first insulating layer contains glass and inorganic filler, and contains pores dispersed therein. The second insulating layer covers the first coil conductor, contains glass and inorganic filler, and contains pores dispersed therein. The third insulating layer covers the second coil conductor, contains glass and inorganic filler, and contains pores dispersed therein. This common mode noise filter has excellent high-frequency characteristics at a high yield rate.
US09269486B2 Power inductor and method of manufacturing the same
There is provided a power inductor, including a magnetic body including a substrate having coils formed thereon, a first metal-polymer complex layer formed on upper and lower surfaces of the substrate, and a second metal-polymer complex layer formed on upper and lower surfaces of the first metal-polymer complex layer and including a higher content of a polymer than that included in the first metal-polymer layer.
US09269485B2 Method of creating spiral inductor having high Q value
A method for fabricating an inductor structure having an increased quality factor (Q) is provided. In one embodiment, a substrate is provided and a plurality of metal layers are formed on the substrate. A spirally patterned conductor layer is formed over and in the substrate and in the metal layers to produce a planar spiral inductor. A via hole is formed over and in the substrate and in the metal layers within the spirally patterned conductor layer, the via hole being formed by a through silicon via (TSV) process. Thereafter, the via hole is filled with a core layer, wherein the core layer extends from a bottom surface of the substrate to a top surface of the metal layers.
US09269483B2 Flux focusing arrangement for permanent magnets, methods of fabricating such arrangements, and machines including such arrangements
Numerous arrangements for permanent magnets are disclosed that can focus the flux produced by the magnets. Depending on the particular application in which the disclosed designs and techniques are used, efficiency and reliability may be increased by minimizing flux leakage, increasing peak flux density, and shaping the flux fields to improve the effective coercivity of the flux focusing permanent magnet arrangement when loaded, and to achieve customized voltage and current waveforms. The disclosed magnet assemblies may be incorporated into a machine, such as a motor/generator, having windings and may be disposed for movement relative to the windings. The magnet assembly may be mounted on a support formed of one or more ferromagnetic materials, such as a back iron. The disclosed flux focusing magnet assemblies may be formed using a variety of manufacturing methods.
US09269482B2 Magnetizing apparatus
Magnetic structure production may relate, by way of example but not limitation, to methods, systems, etc. for producing magnetic structures by printing magnetic pixels (aka maxels) into a magnetizable material. Disclosed herein is production of magnetic structures having, for example: maxels of varying shapes, maxels with different positioning, individual maxels with different properties, maxel patterns having different magnetic field characteristics, combinations thereof, and so forth. In certain example implementations disclosed herein, a second maxel may be printed such that it partially overwrites a first maxel to produce a magnetic structure having overlapping maxels. In certain example implementations disclosed herein, a magnetic printer may include a print head comprising multiple parts and having various properties. In certain example implementations disclosed herein, various techniques for using a magnetic printer may be employed to produce different magnetic structures. Furthermore, description of additional magnet-related technology and example implementations thereof is included herein.
US09269481B2 Iron powder coated with Mg-containing oxide film
Oxide-coated Fe powder for producing various electromagnetic circuit components requiring high resistivity is provided. The oxide-coated Fe powder is a Mg-containing oxide film-coated iron powder coated with an Mg—Fe—O ternary-based deposition film at least containing (Mg, Fe)O. The (Mg,Fe)O is a crystalline MgO-dissolving wustite. The Mg—Fe—O ternary-based oxide deposition film has a sulfur-enriched layer containing a higher concentration of sulfur than that of central portion of the iron powder, fine crystalline texture having a grain size of 200 nm or less, and the outermost surface is substantially composed of MgO. A composite soft magnetic material using the Mg-containing oxide film-coated iron powder is also provided.
US09269477B2 Multi-core cable
One embodiment provides a multi-core cable including: at least one ground wire which is arranged in a center or its vicinity in a cross section perpendicular to a length direction of the cable; plural insulated wires arranged in a periphery of the ground wire; an overall shield layer which covers a periphery of the insulated wires; and a sheath which covers a periphery of the overall shield layer.
US09269472B2 Fluorine-doped tin-oxide particles and manufacturing method therefor
Fluorine-doped tin oxide particles having a structure characterized by peaks at at least 123±5 cm−1, 139±5 cm−1, and 170±5 cm−1 in Raman spectroscopy. The particles preferably have additional Raman spectral peaks at 78±5 cm−1, 97±5 cm−1, 109±5 cm−1, 186±5 cm−1, and 207±5 cm−1. The particles preferably have a specific surface area of 10 to 300 m2/g.
US09269470B1 Neutron beam regulator and containment system
A neutron beam regulator has a magnetic coil configured around a neutron beam between the neutron beam source and a target. The magnetic coil may be used to contain the neutron beam and reduce the scattering of neutron. Neutrons have a magnetic moment and can be affected by exposure to magnetics fields. The magnetic coil may be used to modulate the neutron beam shape, intensity, velocity, direction and polarization. A magnetic coil may extend substantially the entire distance between a neutron beam source and a target. A magnetic coil may be a discrete magnetic coil having a separate power input and output from other magnetic coils and a plurality of discrete magnetic coils may be configured around the neutron beam. A magnetic coil may be a spiral magnetic coil and may be continuous, or extends substantially from the neutron beam source to the target.
US09269469B2 Arrangement and method for inverse X-ray phase contrast imaging
An arrangement for inverse x-ray phase contrast imaging includes a photon-counting x-ray detector and a multibeam x-ray tube. Focal points of the x-ray tube are collimated such that a narrow x-ray beam that is directed toward an optical axis of the arrangement and toward the x-ray detector may be generated. An active surface of the x-ray detector is at least as large as a cross-sectional surface of the narrow x-ray beam. The arrangement also includes a source grating arranged between the x-ray tube and the x-ray detector. The arrangement includes a defraction grating arranged between the source grating and the x-ray detector, and an absorption grating arranged between the defraction grating and the x-ray detector.
US09269468B2 X-ray beam conditioning
An X-ray optical device includes a crystal containing a channel, which passes through the crystal and has multiple internal faces. A mount is configured to hold the crystal in a fixed location relative to a source of an X-ray beam and to shift the crystal automatically between two predefined dispositions: a first disposition in which the X-ray beam passes through the channel while diffracting from one or more of the internal faces, and a second disposition in which the X-ray beam passes through the channel without diffraction by the crystal.
US09269464B2 Neutron shielding ring, apparatus and method using the same for storing high level radioactive waste
An apparatus, system and method for storing high level radioactive waste. In one aspect, the invention is a specially designed ring structure for providing neutron and gamma radiation shielding for high level radioactive materials that produce residual heat. A plurality of the ring structures may be arranged in a stacked assembly that completely surrounds an internal containment boundary. Collars may be provided at the ring-to-ring interfaces. The ring structures may have voids which are configured for receiving neutron absorbing material that completely surrounds the containment boundary.
US09269462B2 Nuclear fission reactor, a vented nuclear fission fuel module, methods therefor and a vented nuclear fission fuel module system
Disclosed embodiments include a vented nuclear fission fuel module system. Given by way of non-limiting example and not of limitation, an illustrative vented nuclear fission fuel module system includes a nuclear fission fuel element capable of generating a gaseous fission product. A valve body is associated with the nuclear fission fuel element, and the valve body defines a plenum therein for receiving the gaseous fission product. A reclosable valve is in operative communication with the plenum for controllably venting the gaseous fission product from the plenum, and the valve body includes a flexible diaphragm coupled to the valve for moving the valve to a closed position.
US09269458B2 Semiconductor device enabling refreshing of redundant memory cell instead of defective memory cell
A semiconductor device includes memory blocks MB1 and MB2 and redundancy determination circuit 25 that can enter a normal operation mode that accesses either memory block MB1 or memory block MB2 and a refresh mode that simultaneously accesses both memory block MB1 and memory block MB2. In response to normal memory cell NMC that belongs to at least one of memory blocks MB1 and MB2 being replaced by redundant memory cell RMC in the refresh mode, redundancy determination circuit 25 deactivates normal cell area NCA to which normal memory cell NMC that is a source of replacement belongs, and activates redundant cell area RCA to which redundant memory cell RMC that is to be replaced belongs and normal cell area NCA to which normal memory cell NMC that is not being replaced belongs.
US09269454B1 Counter using one-time-programmable memory
A method, including receiving a sequence of events to be counted. The method further includes, in response to each event, setting a respective bit in a memory that consists of multiple words organized in tiers, such that a number of set bits in the memory is indicative of a count of the received events, and such that each set bit in a first tier corresponds to a respective word in a second tier and is indicative of whether the corresponding word is fully populated with set bits.
US09269451B2 Storage device and method for performing a self-refresh operation
A storage device and method for performing a self-refresh operation are disclosed. In one embodiment, a storage device determines that the self-refresh operation needs to be performed. In response to that determination, the storage device performs the self-refresh operation by reading data from the memory and writing the data back to the memory without transferring the data outside of the storage device.
US09269447B1 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device according to an embodiment comprises a control unit, in a data write, determining at least one of: a first requirement that the number of times of a data read on first through n1-th pages (where n1 is an integer of 1 to N−1) of a target block executed after the most recent data erase on the target block, is less than a reference number of times; and a second requirement that the number of memory cells whose threshold voltage is higher than a reference voltage, of a plurality of memory cells of a reference page of n1+1-th through N-th pages of the target block, is less than a reference number, and when the determined requirement is satisfied, writing additional data to the n1+1-th through N-th pages of the target block.
US09269441B2 Method for operating non-volatile memory device
A method for operating a non-volatile memory device includes performing an erase operation onto a memory block including a plurality of memory cells, and performing a first soft program operation onto all the memory cells of a string, after the erase operation, grouping word lines of the string into a plurality of word line groups, and performing a second soft program operation onto memory cells coupled with the word lines of each word line group.
US09269440B2 High density search engine
A content addressable memory (CAM) search engine is disclosed. The CAM search engine includes a data compare plane having a content addressable memory die including an array of comparison cells. The CAM search engine further includes a memory stack on the data compare plane. The memory stack has stacked memory dies including memory banks. The array of comparison cells includes parallel interconnects. The parallel interconnects electrically connect to outputs of the memory banks. The comparison cells are time-shared among the one or more memory banks.
US09269436B2 Techniques for determining victim row addresses in a volatile memory
Examples are disclosed for determining a logical address of one or more victim rows of a volatile memory based on a logical address of an aggressor row and address translation schemes associated with the volatile memory. Other examples are described and claimed.
US09269434B2 Resistive memory apparatus and write-in method thereof
A resistive memory apparatus and a write-in method thereof are provided. The memory controller provides unselected bit-lines and unselected word-lines both not coupled to a selected resistive memory cell respectively with a first bit-line voltage and a first word-line voltage in one of a setting duration and a resetting duration, wherein the first bit-line voltage is equal to a product of a writing-in voltage VW and (n−1)/n and the first word-line voltage is equal to VW×1/n. The memory controller provides the unselected bit-lines not coupled to the selected resistive memory cell with a second bit-line voltage and the unselected word-lines not coupled to the selected resistive memory cell with a second word-line voltage in the other one of the setting duration and the resetting duration, wherein the second bit-line voltage is equal to VW×1/n and the second word-line voltage is equal to VW×(n−1)/n.
US09269432B2 Memory systems and memory programming methods
Memory systems and memory programming methods are described. According to one arrangement, a memory system includes a memory array comprising a plurality of memory cells individually configured to have a plurality of different memory states, access circuitry configured to apply signals to the memory cells to program the memory cells to the different memory states, and a controller to configured to control the access circuitry to apply a first of the signals to one of the memory cells to program the one memory cell from a first memory state to a second memory state different than the first memory state, to determine that the one memory cell failed to place into the second memory state as a result of the application of the first signal, and to control the access circuitry to apply a second signal to the one memory cell to program the one memory cell from the first memory state to the second memory state as a result of the determination, wherein the first and second signals have a different electrical characteristic.
US09269430B1 Memory device having cross point array structure, memory system, and method of operating memory device
In a method of operating a memory device having a cross point array structure, the memory device includes multiple tiles, and each of the tiles includes memory cells of multiple layers. The method includes accessing, in a first tile, multiple memory cells of a first layer disposed in a region where at least one first line and at least one second line cross each other, accessing, in the first tile, multiple memory cells of a second layer disposed in a region where at least one first line and at least one second line cross each other, and accessing, after the memory cells of the multiple layers of the first tile are accessed, multiple memory cells included in a second tile. Related memory devices and memory systems are also discussed.
US09269429B2 Resistive memory device, resistive memory system, and method of operating resistive memory device
A resistive memory device includes a memory cell array including a plurality vertically stacked layers having one layer designated as an interference-free layer and another layer designated as an access prohibited layer, wherein the interference-free layer and the access prohibited layer share a connection with at least one signal line and access operations directed to memory cells the access prohibited layer are prohibited.
US09269423B2 Latch-based memory array
The invention concerns a memory array having memory cells arranged in columns and rows, the memory cells of each column being coupled to at least one common write line of their column, the memory cells of each row being coupled to a common selection line of their row, wherein each of the memory cells includes a latch formed of a pair of inverters cross-coupled between first and second storage nodes; a first transistor coupled between the first storage node and a first test data input; and a second transistor coupled between the second storage node and a second test data input.
US09269418B2 Apparatus and method for controlling refreshing of data in a DRAM
An apparatus comprises a dynamic random-access memory (DRAM) for storing data. Refresh control circuitry is provided to control the DRAM to periodically perform a refresh cycle for refreshing the data stored in each memory location of the DRAM. A refresh address sequence generator generates a refresh address sequence of addresses identifying the order in which memory locations of the DRAM are refreshed during the refresh cycle. To deter differential power analysis attacks on secure data stored in the DRAM, the refresh address sequence is generated with the addresses of at least a portion of the memory locations in a random order which varies from refresh cycle to refresh cycle.
US09269417B2 Memory refresh management
Apparatus, systems, and methods to manage memory refresh operations are described. In one embodiment, an electronic device comprises a processor and memory controller logic to determine a memory refresh frequency for a memory system and transmit refresh commands to a refresh control logic in at least one memory bank coupled to the memory controller according to the memory refresh frequency. Other embodiments are also disclosed and claimed.
US09269416B2 Non-volatile counter utilizing a ferroelectric capacitor
A counter that can include a plurality of count stages is disclosed. Each count stage includes a ferroelectric capacitor characterized by first and second polarization states, a variable impedance element, reset and count ports and a detector. The variable impedance element has an impedance between first and second switch terminals that is determined by a signal on a control terminal, the ferroelectric capacitor being connected between the control terminal and the first switch terminal. A reset signal coupled to the control terminal causes the ferroelectric capacitor to be polarized in the first polarization state. The count port is configured to receive pulses to be counted, the count port being connected to the first switch terminal by a conductive load. The detector generates a count complete signal if a potential on the first terminal exceeds a threshold value while the count port is receiving one of the pulses.
US09269415B1 Utilization of the anomalous hall effect or polarized spin hall effect for MRAM applications
Embodiments are directed to using an anomalous hall effect (AHE) or a polarized spin hall effect (PSHE) to switch a magnetic moment of a free layer having perpendicular magnetic anisotropy (PMA). AHE/PSHE includes materials with spontaneous magnetic moment. Thus, the spin orientation generated by AHE/PSHE not only depends upon the geometrical orientation, but also on the magnetic moment orientation of the AHE/PSHE material. Therefore, out-of-plane polarized spins are injected into the magnetic free layer, and the corresponding spin current switches the magnetic moment of a magnetic free layer with PMA through the anti-damping mechanism. In some embodiments, an asymmetric bottom lead may be used, such that a tunneling current flows toward one side after it leaves the free layer.
US09269414B2 Semiconductor integrated circuit
A semiconductor integrated circuit includes a plurality of semiconductor chips. Each of the plurality of semiconductor chips includes a chip selection unit suitable for generating an internal chip selection signal in response to one or more selective chip selection signals and transferring the selective chip selection signals to an adjacent semiconductor chip of the plurality of semiconductor chips, a selective setting unit suitable for generating a selective internal signal, selectively activated in each semiconductor chip, in response to the internal chip selection signal and an external setting signal, and a common setting unit suitable for generating a common internal signal, activated in common in the plurality of semiconductor chips, in response to the setting signal and an external common chip selection signal.
US09269413B2 Semiconductor device having transistor and semiconductor memory device using the same
Semiconductor device capable of preventing off-leakage of the transistor may include a pulse voltage generator configured to generate a pulse voltage, and a transistor configured to have a gate provided with the pulse voltage. The transistor is in an off state in response to the pulse voltage.
US09269407B1 System and method for managing circuit performance and power consumption by selectively adjusting supply voltage over time
Disclosed is a system that periodically increases the supply voltage applied to a power rail of an integrated circuit chip that is incorporated into a product, thereby compensating for age-dependent changes in a performance parameter sensitivity (e.g., in a delay sensitivity). In this system, the chip comprises at least a memory, an age monitor, a voltage selector and a power rail. The memory stores an age/voltage table. The age monitor automatically measures the age of the chip. Based on the age and using the age/voltage table, the voltage selector selects a specific supply voltage and outputs a voltage selection signal to an adjustable voltage regulator, which can apply (e.g., automatically or on-demand) that specific supply voltage to the power rail. Also disclosed is a method for regulating the power supplied to an integrated circuit chip, which is incorporated into a product, and a method for generating an age/voltage table.
US09269406B2 Semiconductor memory device for controlling an internal supply voltage based on a clock frequency of an external clock signal and a look-up table
A control circuit, a memory device and a voltage control method thereof are provided. The memory device includes a memory cell, a voltage regulator circuit and the control circuit. The control circuit receives a clock signal, and determines a clock frequency of the clock signal so as to generate a control signal. An operation voltage is converted into an internal supply voltage for supplying the control circuit by the voltage regulator circuit according to the control signal.
US09269402B1 BVCM hold down apparatus to prevent pivot bearing damage at TVCM installation in disk drive assembly
A device for preventing damage to a pivot bearing assembly during manufacture of a hard disk drive includes a first bottom voice coil motor (VCM) plate hold-down clamp configured to clamp down on a first exposed surface of a bottom VCM plate of the hard disk drive and a second bottom VCM plate hold-down clamp configured to clamp down on a second exposed surface of the bottom VCM plate. The first and second bottom VCM plate hold-down clamps are configured to prevent damage to the pivot bearing assembly during installation of the top VCM plate over the bottom VCM plate by clamping down on the bottom VCM plate with a force that is at least sufficient to prevent the bottom VCM plate from moving when the top VCM plate is installed over the bottom VCM plate.
US09269401B2 Apparatus for storing data
An apparatus for storing data and supplying stored data. The apparatus comprises a support unit having a plurality of connectors for connecting to a plurality of data storage elements, and a plurality of data storage elements. Each data storage element is connected to one of the connectors. The apparatus also comprises a cable having a first end connected to the support unit and a second end connected to a main part. The main part defining a first space containing a portion of the cable, and a second space for containing the support unit. The support unit is movable between (i) a first position providing access to the data storage elements and (ii) a second position in which the data storage elements are located within the second space. The cable is a ribbon cable comprising power wires having a relatively large gauge and signal wires having a relatively small gauge.
US09269399B2 Capture, syncing and playback of audio data and image data
A capture device includes a microphone, a camera, a memory, and a processor. The microphone is configured to record audio data, the camera is configured to capture image data, the memory is configured to store the recorded audio data and the captured image data, and the processor is configured to link the recorded audio data with the captured image data based on a timestamp of the image data, and store the linked audio data and image data in a same record in the memory.
US09269398B2 Content with navigation support
The invention is for player/recording systems for AN content such as DVD+RW, HDD, Blu-ray RE that record content from broadcast. To navigate through the content the player provides menus allowing the user can select content to watch. Passive content is replaced with active agents so that each piece of content will also contain a program part. The action by a user selecting a piece of content to play results in the program part being executed instead of the content being played. This program part displays menus that allow the user to navigate this particular piece of content, or alternatively, the program part may just start playing the AN content. Playing the actual content is under the control of the application. At the end of the content, the application decides the next action, such as displaying another menu. The application chooses when to exit the content (based on user action or end of content) and returns to the player menus. The invention provides more control for the content provider to control the appearance of their content.
US09269393B1 Electronic system with data refresh mechanism and method of operation thereof
An apparatus includes: a media; a head configured to write data on the media; a read channel, coupled to the head, configured to detect servo data from the media; and control circuitry, coupled to the read channel, configured to: generate a position error signal (PES), associated with a write operation of an aggressor track, from the servo data, compare a first threshold to the PES for detecting a write unsafe condition, compare a second threshold, within the first threshold, to the PES for detecting a write squeeze condition, and control a refresh operation of a victim track based on at least one of the comparisons.
US09269392B2 Anti-copy protection for a video signal
An apparatus and method for applying anti-copy protection to a raster-scanned video signal are described. A square waveform 52 is added to the vertical synchronization pulses 50 of the video signal. The effect of the waveform is not apparent until it has been recorded by a video cassette recorder. The anti-copy protected video signal can therefore be viewed normally on a display device at or near to the picture quality intended by the originator of the video signal, but once recorded, exhibits a reduction in picture quality which makes the video signal quite unattractive to view.
US09269388B2 Chemical pinning to direct addressable array using self-assembling materials
A substrate having an arrangement of self-assembling magnetic domains and a method of fabrication therefor. In some embodiments, a substrate is patterned with a plurality of chemically contrasted alignment features, and a block copolymer having a magnetic component and a non-magnetic component is deposited onto the substrate. The block copolymer self-assembles into a sequence of magnetic domains responsive to the alignment features. The period of the alignment features is between about 2 times and about 10 times the period of the magnetic domains.
US09269387B2 Magnetic recording medium and method of fabricating the same
In one embodiment, there are provided: a substrate; a data area disposed on the substrate and having a plurality of first magnetic dots arrayed in lines in mutually different first, second, and third directions; and a boundary magnetic part having a plurality of first magnetic portions arrayed in a line in the third direction and each having a length longer than that of the first magnetic dot in the third direction, and a second magnetic dot disposed between the first magnetic portions and disposed on extensions in the first and second directions of the first magnetic dots, and disposed along with the data area on the substrate.
US09269382B1 Method and system for providing a read transducer having improved pinning of the pinned layer at higher recording densities
A method and system provide a magnetic read transducer having an air-bearing surface (ABS). The magnetic read transducer includes a read sensor stack and a pinning structure. The read sensor stack includes a pinned layer, a spacer layer, and a free layer. The spacer layer is nonmagnetic and between the pinned layer and the free layer. A portion of the read sensor stack is at the ABS. The pinning structure includes a hard magnetic layer recessed from the ABS, recessed from the free layer and adjacent to a portion of the pinned layer.
US09269380B1 Devices including a near field transducer (NFT), at least one cladding layer and interlayer there between
A device that includes a near field transducer (NFT); at least one cladding layer adjacent the NFT; and a carbon interlayer positioned between the NFT and the at least one cladding layer.
US09269379B2 Magnetic stack including cooling element
Various embodiments of a magnetic stack are disclosed. In one or more embodiments, the magnetic stack includes first and second shield layers, and a magnetically responsive lamination disposed between the first and second shield layers. The magnetically responsive lamination can be configured to receive a sense current IS therethrough. The magnetic stack also includes a cooling element disposed between the first and second shield layers and thermally coupled to the magnetically responsive lamination. The cooling element can be configured to receive a bias current IB therethrough. And the cooling element can be configured to cool the magnetically responsive lamination during a read function.
US09269376B1 Efficient burst data verify in shingled data storage drives
To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a data storage device is presented with storage media comprising a cache storage region and a shingled magnetic recording (SMR) storage region that is divided into burst zones. A storage control system receives write operations and accumulates write data in the cache storage region until a commit threshold condition. Responsively, the storage control system transfers the write data into a burst zone of the SMR storage region, and verifies the write data written into the burst zone once the burst transfer is complete. Responsive to data verify errors in the write data written into the burst zone, the storage control system writes data associated with the data verify errors into an exception location associated with the burst zone.
US09269371B2 Adaptive systems using correntropy
Various methods and systems are provided for related to adaptive systems using correntropy. In one embodiment, a signal processing device includes a processing unit and a memory storing an adaptive system executable in the at least one processing unit. The adaptive system includes modules that, when executed by the processing unit, cause the signal processing device to adaptively filter a desired signal using a correntropy cost function. In another embodiment, a method includes adjusting a coefficient of an adaptive filter based at least in part on a correntropy cost function signal, providing an adaptive filter output signal based at least in part on the adjusted coefficient and a reference signal, and determining an error signal based at least in part on a received signal and the adaptive filter output signal.
US09269369B2 Method and device for dereverberation of single-channel speech
The present invention relates to a method and device for dereverberation of single-channel speech. The method includes the following steps of framing an input single channel speech signal, and processing the frame signals as follows according to a time sequence: performing short-time Fourier transform on a current frame to obtain a power spectrum and a phase spectrum of the current frame; selecting several frames previous to the current frame and having a distance from the current frame within a set duration range, and performing linear superposition on the power spectra of these frames to estimate the power spectrum of a late reflection sound of the current frame; removing the estimated power spectrum of the late reflection sound of the current frame from the power spectrum of the current frame by a spectral subtraction method to obtain the power spectra of a direct sound and an early reflection sound of the current frame; and performing inverse short-time Fourier transform on the power spectra of the direct sound and the early reflection sound of the current frame and the phase spectrum of the current frame together to obtain a signal of the current frame after dereverberation. The dereverberation method and device can solve the problem that the estimation of a transfer function of a reverberation environment or the estimation of reverberation time is difficult in the dereverberation of single-channel speech.
US09269367B2 Processing audio signals during a communication event
A method of processing audio signals during a communication session between a user device and a remote node, includes receiving a plurality of audio signals at audio input means at the user device including at least one primary audio signal and unwanted signals and receiving direction of arrival information of the audio signals at a noise suppression means. Known direction of arrival information representative of at least some of said unwanted signals is provided to the noise suppression means and the audio signals are processed at the noise suppression means to treat as noise, portions of the signal identified as unwanted dependent on a comparison between the direction of arrival information of the audio signals and the known direction of arrival information.
US09269363B2 Audio data hiding based on perceptual masking and detection based on code multiplexing
A spread spectrum data hiding for audio signals is described. A set of pseudo-random noise sequences is added to an audio signal according to a data to be embedded. A masking curve is used to shape the added noise. A transient detection step can be used to control whether a shaped noise sequence is to be added or not. Embedded information is detected by first performing a whitening step and then performing a phase-only correlation with a same set of pseudo-random noise sequences. A detection method that is based on correlation of multiplexed noise sequences with a noise sequence embedded in the audio is also described.
US09269353B1 Methods and systems for measuring semantics in communications
A content is divided into tokens. Tokens can represent sounds, symbols, letters, words, sentences, paragraphs, or documents, among other possibilities. Probable measures of meaning (PMMs) are determined for each token. Given a target token, a proximity function for other tokens can be calculated, which in turn can be used to modify the PMMs for the other tokens. These modified PMMs for the other tokens can then be used in conjunction with the PMM for the target token to generate a relative measure of meaning (RMM) for the target token.
US09269352B2 Speech recognition with a plurality of microphones
At least first and second microphones with different frequency responses form part of a speech recognition system. The microphones are coupled to a processor that is configured to recognize a spoken word based on the microphone signals. The processor classifies the spoken word, and weights the signals from the microphones based on the classification of the spoken word.
US09269351B2 Voice recognition device
According to a voice recognition device of this invention, with respect to a keyword extracted by a voice recognition unit from a speech content by a user, display contents each displayed by an operation by the user and their respective numbers of display times are stored as history information, and a search level is set through determination of whether or not the same operations and displays have been made by a predetermined number of times or more. This makes it possible, at the next time the same keyword is extracted, to immediately present information of such a level that the user requires, and thus, detailed information necessary for the user can always be provided efficiently, so that the convenience of the user is enhanced.
US09269343B2 Method of controlling an update algorithm of an adaptive feedback estimation system and a decorrelation unit
An audio processing device comprises a feedback estimation system for estimating feedback from an output transducer to an input transducer, the feedback estimation system comprising an adaptive filter comprising a variable filter part for filtering an input signal according to variable filter coefficients and an algorithm part comprising an adaptive algorithm for dynamically updating filter coefficients, a control unit for controlling the de-correlation unit and the adaptive algorithm, and a correlation detection unit for determining a) the auto-correlation of a signal of the forward path and providing an AC-value and/or b) the cross-correlation between two different signals of the forward path and providing an XC-value.
US09269341B1 Method for processing music to match runners tempo
A method for adjusting a rhythm of music to match a running rhythm of a person's steps. Even if a running rhythm changes during the same run, the rhythm of the music is changed without changing the sound and the key or the pitch of the music. A music file is converted into a universal PCM format and the fingerprint function is calculated. Repeating patterns are detected in the fingerprint function. Music tempo is estimated using data about repeating patterns. Runner's steps are analyzed using an accelerometer. Then, a special coefficient is calculated in order to either speed up or slow down the music for matching it to the rhythm of the runner's steps.
US09269340B2 Modular wireless sensor network for musical instruments and user interfaces for use therewith
A wireless sensor network for musical instruments is provided that will allow a musician to communicate natural performance gestures (orientation, pressure, tilt, etc) to a computer. User interfaces and computing modules are also provided that enable a user to utilize the data communicated by the wireless sensor network to supplement and/or augment the artistic expression.
US09269335B2 Installation structure for acoustic transducer
An installation structure for an acoustic transducer configured to push and pull a vibrated body and having a magnetic-path forming portion; a vibrating unit; and a connector having at least one joint portion configured to connect two members such that axes of the two members are inclined relative to each other by bending at the at least one joint portion, the at least one joint portion having an urging portion configured to generate an urging force by which a pushing-side driving portion of a first member connected to one side of the at least one joint portion urges a pushing-side driven portion of a second member connected on another side of the at least one joint portion in a pushing direction and an urging force by which a pulling-side driving portion of the first member urges a pulling-side driven portion of the second member in a pulling direction.
US09269334B2 Display system
A display system comprises a processing device connected to a plurality of display devices, the processing device comprising a processor connected to a system memory and to a graphics processing unit, the graphics processing unit comprising a graphics processor connected to a video memory. A method of operating the system comprises the steps of maintaining a system frame buffer in system memory, creating a shared primary surface in video memory for an additional display device not controlled by the graphics processing unit, rendering the contents of the system frame buffer onto the shared primary surface, rendering any and all directly rendered applications onto the shared primary surface, maintaining a second frame buffer in system memory, copying at least some of the content of the shared primary surface to the second frame buffer, and outputting at least some of the content of the second frame buffer to the additional display device.
US09269332B2 Font preloading
There is provided a method for preloading the glyphs required to display the content of a system. In accordance with an embodiment of the present technique, only those glyphs which are present in the system upon startup or synchronization of an electronic device are preloaded. The glyphs present upon startup or synchronization of the electronic device may be determined by scanning the system. In an illustrated embodiment, scanning the system may include analyzing models and views to determine the glyphs present in the system.
US09269330B2 Head mounted display apparatus and backlight adjustment method thereof
A head mounted display apparatus and a backlight adjustment method thereof are disclosed. The head mounted display apparatus comprises a display module, a backlight module, an application processor, an eye image capture apparatus, an infrared (IR) light emitting diode (LED) and an application specific integrated circuit (ASIC). The backlight module provides a backlight to the display module. The eye image capture apparatus captures an eye image. The IR LED provides an auxiliary light source to the eye image capture apparatus. The ASIC calculates a current pupil size according to the eye image. The application processor adjusts the backlight intensity of the backlight module according to the current pupil size in an adjustment mode.
US09269327B2 Electronic device and receiving system
An electronic device includes a device main unit and a control unit that controls visual demonstration of a display on a displaying portion so as to visually display, upon receiving from a user an operation pertaining to an energy conservation setup of the device main unit, a state in which the energy conservation setup of the device main unit has been implemented.
US09269326B2 Voltage compensation circuit and operation method thereof
A voltage compensation circuit and an operation method thereof are provided. The voltage compensation circuit is suitable for a display device. The display device includes a direct-current voltage converter, a voltage level shifter, a panel, and a gate driving circuit. The voltage compensation circuit includes a voltage divider providing a divided voltage form a gate pulse signal, a comparing unit, a time counting unit and a processing unit. The comparing unit receives the divided voltage to provide at least one comparison result. The time counting unit provides a plurality of timing control signals at different time points according to the divided voltage. The processing unit provides a voltage reference signal to the direct-current voltage converter according to the plurality of timing control signals and the comparing result, and accordingly, the direct-current voltage converter adjusts an output voltage relating to the gate driving circuit.
US09269323B2 Image layout for a display
One or more techniques and/or systems are disclosed for efficiently organizing one or more images in a display. The display may comprise one or more display lines, such as display rows or display columns. Images can be selected sequentially from an image database and scaled to fill into a display line, at least until a selected image does not fit. If the selected image does not fit, a cropping amount can be determined for the images in the display line, including the image that does not fit, and the images can be proportionally cropped accordingly. The cropping amount can comprise merely enough display space to accommodate a cropped version of the image that does not fit into the display line. The cropped version of the image can then be filled into the display line, and, if available, a next display line can similarly be populated.
US09269320B2 Gate driver and liquid crystal display using the same
A gate driver and a liquid crystal display using the same are provided. The gate driver includes a scan signal generating unit and a compensation unit. The scan signal generating unit has a plurality of output channels, and is used for sequentially outputting a scan signal through the output channels according to a basic clock and a start pulse. The compensation unit is coupled to the scan signal generating unit, and used for compensating the total resistance of each of the output channels, and sequentially receiving and transmitting the scan signal to a display panel.
US09269317B2 Gate driving circuit and display apparatus having the same
A liquid crystal display apparatus including a gate driving circuit disposed on a liquid crystal display is provided. The apparatus further includes a data driving chip, disposed on the liquid crystal display panel, to apply data driving signals to data lines. The gate driving circuit includes a plurality of stages connected to one another in parallel. The odd-numbered stages of the stages each apply gate driving signals to odd-numbered gate lines of the gate lines, in response to a first clock signal and the even-numbered stages of the stages each apply the gate driving signals to even-numbered gate lines of the gate lines, in response to a second clock signal having an opposite phase from a phase of the first clock signal.
US09269316B2 Shift register, gate driving device and liquid crystal display device
A shift register, a gate driving device and a liquid crystal display device aim to solve the problem that the lifespan of the gate driving device is shortened since some transistors in an existing shift register are in a turn-on state all the time during a non-operational period to reduce noise on a corresponding gate line. The shift register includes an output module (12) for connecting a control signal output terminal (OUTPUT) of the shift register and a clock signal input terminal (CLKIN) under the control of the signal output from a driving module (11); a first pull-down module (13) for connecting the pull-up node (PU) and the second level signal input terminal (15) and connecting the control signal output terminal (OUTPUT) of the shift register and the second level signal input terminal (15) under the control of the signal output from a driving module (11); and a second pull-down module (14) for connecting the pull-up node (PU) and the second level signal input terminal (15) and connecting the control signal output terminal (OUTPUT) of the shift register and the second level signal input terminal (15) under the control of the signal output from a driving module (11).
US09269312B2 Rapid estimation of effective illuminance patterns for projected light fields
A method for estimating an effective luminance pattern representing a distribution of projected light in a display apparatus involves determining driving values for one or more light sources arranged to project light. The light sources are solid-state light sources such as light-emitting diodes in some embodiments. The method determines an effective luminance pattern for the projected light by determining contributions to the effective luminance pattern for different components of a point spread function and then combining the contributions of the components the effective luminance pattern to yield an estimated effective luminance pattern.
US09269311B2 Methods and apparatus for driving electro-optic displays
Waveforms for driving electro-optic displays, especially bistable electro-optic displays, are modified by one or more of insertion of at least one balanced pulse pair into a base waveform; excision of at least one balanced pulse pair from the base waveform; and insertion of at least one period of zero voltage into the base waveform. Such modifications permit fine control of gray levels.
US09269309B2 Dual modulation using concurrent portions of luminance patterns in temporal fields
Embodiments of the invention facilitate high-dynamic-range (HDR) imaging by generating portions of spatial and/or temporal luminance patterns with different spectral power distributions substantially concurrent with, for example, the modulation of the light intensity associated with the portions of luminance patterns. The method can include predicting luminance patterns associated with multiple spectral power distributions. The method also can include distributing portions of the luminance patterns in one or more temporal fields. In some embodiments, distributing the portions of the luminance patterns can include interlacing those portions. Further, the method can include modulating light intensities of the luminance patterns to produce an age with other spectral power distributions. In some embodiments, the distribution of the luminance pattern portions can be substantially synchronous with modulating the light intensity of the luminance patterns.
US09269307B1 Visual alert systems and methods for data processing units
A data processing unit, which is operatively coupled within a data center network, is configured to output a first visual indicia, a second visual indicia and a third visual indicia. The first visual indicia includes a set of light outputs, each of which is associated with a port status of a network port of the data processing unit. The second visual indicia includes a set of graphical outputs produced by a display screen, each of which is associated with an operating status of the data processing unit. The third visual indicia includes a set of backlight outputs produced by the display screen, each of which is associated with the operating status of the data processing unit.
US09269305B2 Reduced backlight turn on time
Systems, devices, and methods for using a hot plug detect (HPD) signal to reduce turn on time of a backlight of a display are disclosed. The backlight controller may pre-charge the backlight based at least in part on receiving the HPD signal prior to receiving a BL_EN signal to turn on the backlight. The HPD signal may be a multipurpose signal used by components of a system in addition to the backlight driver. The backlight driver may turn on the pre-charged backlight immediately upon receiving the BL_EN signal. The backlight controller may maintain the pre-charge of the backlight while the device is in a sleep state to reduce the turn on time of the backlight from the sleep state. Embodiments of the HPD signal may also power down the display and backlight.
US09269304B2 Pixel circuit for organic light emitting display and driving method thereof, organic light emitting display
A pixel circuit for an organic light emitting display includes first, second, third, fourth, fifth, and sixth MOS transistors, a first capacitor, and an organic light emitting diode. During a initialization stage, the sixth MOS transistor is turned on, and a reference voltage is transmitted to the gate electrode of the second MOS transistor. During a data-writing stage, the first MOS transistor is turned on and a data signal is transmitted to the first terminal of the first capacitor, the fourth MOS transistor is turned on and the other MOS transistors are turned off. During a light emitting stage, the fifth MOS transistor is turned on and the voltage at the gate of the second MOS transistor is based on the data signal. As a result, the third MOS transistor generates a drive current based on the data signal.
US09269301B2 Self-lighting display device and method of driving the same
The self-lighting subpixels of a display device are ones whose output luminances are functions of analog drive voltages applied to the subpixels and corresponding digital grayscale command signals used for controlling the subpixels. The display device generates corresponding analog dimming values and digital dimming values in accordance with supplied current limiting parameters and generates control value signals using the analog dimming values and the digital dimming values. It also changes the original grayscale digital data values of input video signals of one frame in accordance with the digital dimming values.
US09269299B2 Pixel circuit, method for driving pixel circuit, and display panel
Disclosed are a pixel circuit, a method for driving a pixel circuit, and a display panel, display apparatus and electronic product comprising the pixel circuit. The pixel circuit comprises at least two electroluminescence elements, wherein: an electrode in a first polarity of each of the at least two electroluminescence elements is coupled to a corresponding current control terminal; and an electrode in a second polarity of each of the at least two electroluminescence elements is coupled to a drive unit that supplies a drive current for the at least two electroluminescence elements.
US09269297B2 Electro-optical device
An electro-optical device includes a driving transistor, a first capacitor, a second capacitor, and a switching circuit. The driving transistor is connected between a power supply and an electrode of a light-emitting element. The first capacitor is connected between a gate and source of the driving transistor. The second capacitor stores a gray scale voltage. The switching circuit selectively connects the first capacitor and the second capacitor to the gate of the driving transistor. A control circuit applies the gray scale voltage to the second capacitor while the first capacitor is connected to the gate of the driving transistor by the switching circuit, and writes a source voltage of the driving transistor at the first capacitor while the second capacitor is connected to the gate of the driving transistor by the switching circuit.
US09269288B2 Generating method of Gamma value test chart of display device and measuring method of Gamma value thereof
The present disclosure provides a method for generating a test chart for Gamma value of a display device and a method for testing Gamma value thereof. The method includes: determining a grayscale corresponding to a generated test chart for Gamma value of the display device, and determining luminance of a standard picture area represented by the test chart for Gamma value of the display device; determining a grayscale voltage of a test picture area according to the grayscale corresponding to the standard picture area in the display panel, and determining the luminance of the test picture area displayed by the display panel under the grayscale voltage; comparing the luminance of the test picture area and the luminance of the standard picture area, and determining the Gamma value of the display device according to the result of the comparison.
US09269287B2 Method and system for measuring the response time of a liquid crystal display
A method and system for measuring the response time of an LCD are provided. The method comprises the following steps: step A: controlling the LCD to display a preset image; step B: obtaining the luminance of the LCD that is displaying the preset image, and outputting a luminance-time curve in which the luminance changes over the time; step C: correcting the luminance-time curve to obtain a corrected luminance-time curve, and calculating the response time of the LCD according to the corrected luminance-time curve. When implementing the present application, the measuring errors about the response time of the system for measuring the response time, which are resulted from using different actual luminance measuring devices, can be reduced or eliminated.
US09269286B2 Automated overscan adjustment
Techniques are disclosed for automatically calibrating content shown on an electronic display. According to certain embodiments, a picture of the display is taken while a calibration image is shown on the display. The picture is then analyzed to determine whether any adjustments need to be made. The analysis can, for example, include a comparison between the picture of the calibration image and a stored calibration image. If it is determined an adjustment needs to be made to correct how content is shown on the display, an adjustment is made accordingly.
US09269283B2 Display devices
A display device includes a base structure with a plurality of modules coupled to the base structure. Each of the modules includes a plurality of actuator assemblies, with each of the actuator assemblies being individually controllable to move the actuator assemblies between a retracted state and a plurality of extended states. A controller is coupled to each of the modules. The controller is programmed to control the actuator assemblies to move the actuator assemblies between the retracted state and the plurality of extended states.
US09269281B2 Remote screen control device, remote screen control method, and recording medium
A server apparatus renders a process result of software on an image memory that stores a display image to be displayed on a client terminal, detects an update area in which an update occurs between frames of an image. The server apparatus selectively switches and performs a first generation process and a second generation process according to the number of detected update areas. The first generation process is a process that generates a color map for each update area based on colors used in the update area. The second generation process is a process that generates a color map commonly used between the update areas based on colors used in images of the update areas. The server apparatus reduces the number of colors in an update area using the generated color map and transmits a compressed image of the update area to the client terminal.
US09269280B2 Apparatus for analyzing geographic information and method thereof
Disclosed are a geographic information analyzing apparatus and a method thereof, and more specifically, a geographic information analyzing apparatus which is capable of analyzing a region arbitrarily set by a user and a method thereof. The a geographic information analyzing apparatus disclosed in this specification includes a data storing unit which includes a spatial data storing unit which stores geospatial information and an attribute data storing unit which stores attribute information corresponding to the spatial data; a map viewer which provides a user interface and receives spatial information of an arbitrary region from a user, and a function providing unit which compares the geospatial information with the spatial information of the arbitrary region to calculate an overlapping ratio and performs analysis in accordance with a previously set function using attribute information in accordance with the overlapping ratio.
US09269279B2 Welding training system
A system for training welders that includes a data generating component, a data capturing component and a data processing and visualization component. The data generating component operates in real time and derives data from an actual manually-executed weld and further includes a weld process-specific jig, a calibration block positioned on the jig, wherein the geometric configuration of the calibration block is specific to a particular type of weld joint, a weld coupon positioned on the welding process-specific jig adjacent to the calibration block, a welding gun for use by a trainee, wherein the welding gun is operative to form the weld; and at least one target mounted on the welding gun that is recognized by the data processing and visualization component for providing multidimensional position and orientation feedback to the trainee.
US09269273B1 Systems, methods and computer program products for building a database associating n-grams with cognitive motivation orientations
Computer-implemented methods can transform a corpus of meaningful text sequences into a generalized computer-usable repository of neurolinguistic information that can be applied by one or more computer systems. The computer system(s) can use the neurolinguistic information to neurolinguistically analyze meaningful text sequences to derive statistical information and identify dominant cognitive motivation orientations expressed in those text sequences. The identified dominant cognitive motivation orientations can be used to improve the efficacy of both human-generated and machine-generated communications. The computer system(s) thereby transform a meaningful text sequence into actionable information about the dominant cognitive motivation orientation(s) of the author of that text sequence within the context in which the text sequence was composed. Computer systems and computer-program products for implementing the methods are also described.
US09269268B2 Systems and methods for adaptive vehicle sensing systems
An adaptive sensing system is configured to acquire sensor data pertaining to objects in the vicinity of a land vehicle. The adaptive sensing system may be configured to identify objects that are at least partially obscured by other objects and, in response, the adaptive sensing system may be configured to modify the configuration of one or more sensors to obtain additional information pertaining to the obscured objects. The adaptive sensing system may comprise and/or be communicatively coupled to a collision detection module, which may use the sensor data acquired by the adaptive sensing system to detect potential collisions.
US09269265B2 System and method for providing content to vehicles in exchange for vehicle information
A system and method for providing content from a source to a vehicle is disclosed. The content is restricted by associating the content with at least one requirement for vehicle information from a vehicle to which the content is provided. When restricted content is requested, a vehicle system obtains vehicle related information from the vehicle. The vehicle information is transferred to the vehicle system from the source, and the restricted content is transferred from the source to the vehicle system. The vehicle system, the source, or both determine whether the vehicle information meets the at least one requirement restricting the content. As long as the requirement for vehicle information is met, processing of the restricted content is allowed.
US09269264B2 Vehicle driving assistance device
A vehicle driving assistance device according to the invention is intended to improve the reliability of driving assistance and includes a vehicle sensor that acquires vehicle behavior information about the behavior of a vehicle, an inter-vehicle communication unit that acquires other-vehicle behavior information about the behavior of another vehicle which travels in front of the vehicle, a traffic condition estimating unit that estimates traffic conditions between the vehicle and another vehicle on the basis of the vehicle behavior information and the other-vehicle behavior information, and a driving assistance unit that performs driving assistance on the basis of the estimation result of the traffic condition estimating unit.
US09269258B2 Method and control arrangement to secure an alarm system
A method and control arrangement to secure an alarm system in a site to be monitored. The readiness to forward an alarm out of the site is monitored with a control arrangement through which at least data transmission connections of the alarm system to outside the site are repetitively checked to enable sending the alarm via at least one secondary alarm connection in case the primary alarm connection is prevented. The control arrangement includes at least two controlling devices that monitor continuously the electric connection/readiness of the site to at least two of the following: a data transmission route working on a free frequency, a mobile phone network, an electricity grid, the internet, one or several other controlling devices, a communication connection working on a free frequency, an alarm arrangement belonging to the alarm system, a wired connection.
US09269257B2 Method and system for reminding reader of fatigue in reading while using electronic device
The method and system for reminding readers of fatigue in reading while using electronic devices are revealed. First use a reading speed calculation module to detect user's reading speed within a period of time when the user is using an electronic with a display to read. The reading speed is related to pages being turned or the amount of words being read. Then a fatigue-in-reading reminder module is activated by the reading speed calculation module when the user's reading speed falls within a specific range so as to remind the user by pop-up windows, sounds, flash light or vibration at the proper time and provide the user certain corresponding measures he/she should take. Thereby there is no need to use additional equipment for preventing users from becoming more fatigue and healthy vision is accomplished at lower cost with higher efficiency.
US09269255B2 Worksite proximity warning
Systems and methods for warning of proximity in a worksite are disclosed. A second transceiver is detected at a first transceiver, wherein the first transceiver is a mobile wearable device, and wherein the first transceiver and the second transceiver are located at a worksite. An ad-hoc network is established, at the first transceiver, between the first transceiver and the second transceiver. A distance is calculated, at the first transceiver, in three dimensions between the first transceiver and the second transceiver based on the detecting the second transceiver. A first safety envelope is defined, at the first transceiver, about the first transceiver and a second safety envelope about the second transceiver. An alarm is issued, at the first transceiver, when the first safety envelope comes in contact with the second safety envelope.
US09269250B2 Immediate response security system
Aspects of the present disclosure involve an intelligent and immediate response security system configured to provide continuous and immediate security data to requesting users in the event of a threat, potential threat, and/or the like. Additionally aspects of the present disclosure involve systems capable of initiating and performing various security commands to ensure the personal safety of individuals located within a certain type of facility, venue, location, etc.
US09269249B2 Systems and methods utilizing variable tempo sensory overload to deter, delay, distract or disrupt a perpetrator and decrease an intensity of a potential criminal act
The present invention builds on TASOS as well as recent discoveries in how the human brain manages multiple tasks and deals with new information or stimuli in order to impact a perpetrator's ability to complete a crime, deter, delay, disrupt and distract perpetrators of violent crimes. A sensory overload controller is used to initiate various audible and visual events to deliver sophisticated mental stimulation that challenge a perpetrator's ability to mentally focus and succeed at certain tasks.
US09269246B2 Copper theft alarm for grain bin systems
A copper theft alarm system is disclosed. The alarm system can be deployed on existing grain bins or other electrically powered equipment, allowing persons to receive an automated phone call, text message notification, or other desired notification when the system has sensed that a copper cable is being pulled out of a conduit. The notification can aid in potentially disrupting a thief's activity.
US09269241B2 Tamper-resistant security device
A security device comprises a mounting plate and a mounting device. The mounting plate, for being fixed to a surface, comprises a first electrical contact point and a second electrical contact point electrically connecting to the first electrical contact point. The mounting device is to be assembled to the mounting plate and comprises a third electrical contact point, a fourth electrical contact point and a detection circuit. The third electrical contact point is for contacting the first electrical contact point when the mounting device is assembled to the mounting plate. The fourth electrical contact point is for contacting the second electrical contact point when the mounting device is assembled to the mounting plate. The detection circuit is electrically connected to the fourth electrical contact point, for determining whether the fourth electrical contact point is electrically connected to the third electrical contact point.
US09269238B2 Door knocker with audio playback
A novelty door knocker having an electronic sound effect or effects, the door knocker with mechanical arm, plate, switch or proximity sensor enabled to trigger a sound effect, and a battery-powered circuit for controlling and coordinating the acoustics with the trigger. The door knocker may be decorated with or shaped as a cartoon figure for use on a child's bedroom door, for example.
US09269236B2 RFID tag dispenser
An RFID key dispenser. The tag dispenser has a simple mechanical construction that enables the tag dispenser to be located in unattended locations. The tag dispenser can, even with very simple construction, dispense a large number of tags between being restocked. Simple motions may be used to retrieve an individual tag for programming, move the tag to a programming station, and then route the tag to a dispensing portion of the tag dispenser or to a storage area for defective tags.
US09269235B2 Gaming system and method providing a video poker game with community cards
Various embodiments of the present disclosure are directed to a gaming system and method providing a video poker card game having community cards. Upon receiving a wager, the gaming system provides the player with a quantity of player hands. The gaming system enables the player to discard one or more of the player hands. The gaming system then displays an initial quantity of community cards to the player. The gaming system further enables the player to discard one or more player hands, prior to displaying the remaining community cards. The remaining player hands are each evaluated by combining with the community card against a paytable, to determine an award, if any, won by the player.
US09269234B2 Keno game method and apparatus with multiple card hit replication
A method and apparatus for playing keno on multiple cards with a two-draw cycle where hits from a first draw are replicated from a primary card to at least one secondary card while misses from a first draw are not replicated from the primary card to the at least one secondary card. An independent second draw for each card completes the game cycle resulting in different game outcomes based off the same first draw cycle. The player is awarded where appropriate for each game outcome on each of the cards played.
US09269232B2 System and method for providing a secondary contest determined by the results of a primary wagering game
Systems and methods for providing a secondary contest involving a plurality of players playing a primary wagering game on computing devices within a communication network in which players enter wagers and their results from the primary wagering game in the secondary contest and the highest ranking results will win the wagers placed in the secondary contest.
US09269228B2 Gaming system with linked gaming machines that are configurable to have a same probability of winning a designated award
A gaming system that is controlled by a central controller and includes a plurality of gaming machines. Each of the gaming machines includes a game operable upon a wager by a player, a plurality of winning symbol combinations including a designated winning symbol combination and a probability of achieving the designated winning symbol combination. At least two of the gaming machines have different probabilities of achieving the designated winning symbol combination. The gaming system includes a designated award and a triggering event. After an occurrence of the triggering event, the central controller is programmed to change the probability of achieving the designated winning symbol combination for at least one of the gaming machines such that each gaming machine has an equal probability of generating the designated winning symbol combination.
US09269226B2 Wagering game method, gaming machine, gaming system, and program product providing local and group progressive prizes
A progressive prize method for a group of linked gaming machines includes maintaining both a respective local progressive pool for each respective gaming machine in the group and a group progressive pool shared among the group of gaming machines. A local progressive prize trigger is used to determine when a progressive prize is to be awarded from a local progressive pool and a separate group progressive trigger is used to determine when a progressive prize is to be awarded from the group progressive pool. The group progressive trigger may be based on a count of local progressive prizes that have been awarded. Thus a local progressive trigger may ultimately result in the award of a progressive prize from the group progressive pool rather than the respective local progressive pool.
US09269216B2 Gaming machine having camera for adapting displayed images to detected players
In one embodiment, a gaming machine has a digital camera and automatically takes a picture of a player. Facial detection software identifies certain facial characteristics of the player, such as approximate age and gender. Rules software then selects appropriate sets of animation images and sound files that are associated with the detected physical features of the player. The displayed game, user interface, theme, etc. are then adapted to the player's detected features. If the player is identified, by comparing the picture to previously stored pictures, a personalized message may be displayed. When the gaming machine is in an attract mode, the camera may take pictures/videos of passersby and adapt the attract mode animation to the passerby's physical image or movement. In another embodiment, the camera is used to sense physical motions by the player to control aspects of the game or other displayed features.
US09269215B2 Electronic gaming system with human gesturing inputs
Examples disclosed herein relate to systems and methods, which may receive wagers on one or more paylines. The disclosure relates to an electronic gaming system which allows a player to make one or more inputs via human gesturing, and associated methods.
US09269213B2 Gaming system and method for providing a bonus based on number of gaming machines being actively played
A gaming system includes a controller linked to a plurality of gaming devices. The central server tracks: (i) a quantity of gaming devices being actively played by players, or (ii) a quantity of players actively playing at the gaming devices. The controller determines the players' eligibility for different awards based on the tracked quantity. When the controller tracks a first quantity, the controller provides the active players with an opportunity to win a first award. When the central server tracks a second quantity, the central server provides the active players with an opportunity to win a second award. As the tracked quantity changes, the controller determines or modifies the number of awards available to the players actively playing at the gaming devices.
US09269209B2 Apparatus for transporting and/or storing banknotes
The invention relates to a device (20) for transport and/or storage of notes of value. The device (20) comprises a roller storage (20) having a winding drum (1, 30). Further, the device (20) comprises a sensor (26, 34) for detecting a rotary motion of the winding drum (1, 30).
US09269208B2 Remote entry system
A system is disclosed for providing secure access to a controlled item, the system comprising a database of biometric signatures, a transmitter subsystem comprising a biometric sensor for receiving a biometric signal, means for matching the biometric signal against members of the database of biometric signatures to thereby output an accessibility attribute, and means for emitting a secure access signal conveying information dependent upon said accessibility attribute, wherein the secure access signal comprises one of at least a rolling code, an encrypted Bluetooth™ protocol, and a WiFi™ protocol, and a receiver sub-system comprising means for receiving the transmitted secure access signal and means for providing conditional access to the controlled item dependent upon said information.
US09269205B1 Aircraft environmental impact measurement system
An environmental impact measurement system for an aircraft includes a one-way data interface and a processing system. The one-way data interface is adapted to continuously receive and transmit aircraft data and flight plan data. The processing system is in operable communication with the one-way data interface to receive the aircraft data and the flight plan data transmitted therefrom. The processing system is configured, upon receipt of the aircraft data and the flight plan data, to generate at least data representative of real-time environmental impact of the aircraft, and recommendations for improving the real-time environmental impact of the aircraft.
US09269195B2 Methods and apparatus for generating curved extrusions
Methods and apparatus for generating curved extrusions. A user interface may be provided via which the value of one or more extrusion parameters and/or a reference point may be changed. An extrusion may be generated from an initial 2D object according to the set of extrusion parameters and/or the reference point.
US09269191B2 Server, client terminal, system and program for presenting landscapes
There is provided a server including a reception unit configured to receive, from a client terminal, position information indicating a position of the client terminal, and direction information indicating a direction in which the client terminal is directed, and a search unit configured to search for image data provided with position information indicating an opposite position across a target object present in the direction indicated by the direction information with respect to the position of the client terminal based on the position information.
US09269182B2 System and method for identifying entry points of a hierarchical structure
A method for identifying entry points of a hierarchical structure having a plurality of nodes includes the operations selecting a node of a hierarchical structure and testing it for identification as an entry point. The node is identified as an entry point, and the selection, testing, and identification operations are repeated for at least one additional node of the hierarchical structure to identify at least a second node as a respective second entry point for the hierarchical structure.
US09269178B2 Virtual camera for 3D maps
Some embodiments provide a non-transitory machine-readable medium that stores a mapping application which when executed on a device by at least one processing unit provides automated animation of a three-dimensional (3D) map along a navigation route. The mapping application identifies a first set of attributes for determining a first position of a virtual camera in the 3D map at a first instance in time. Based on the identified first set of attributes, the mapping application determines the position of the virtual camera in the 3D map at the first instance in time. The mapping application identifies a second set of attributes for determining a second position of the virtual camera in the 3D map at a second instance in time. Based on the identified second set of attributes, the mapping application determines the position of the virtual camera in the 3D map at the second instance in time. The mapping application renders an animated 3D map view of the 3D map from the first instance in time to the second instance in time based on the first and second positions of the virtual camera in the 3D map.
US09269175B2 Game apparatus and computer-readable storage medium having a game program stored thereon
In a game apparatus, a trajectory WP on which a waist W of a player character moves and an elliptic trajectory ArP on which an ankle Par of the player character moves are set. When the player character moves in a game space, the waist moves on the trajectory WP and the ankle moves on the elliptic trajectory ArP in accordance with a movement amount of the player character. In this case, while the ankle makes one round on the elliptic trajectory ArP, the waist makes two shuttle movements on the trajectory WP. Thus, motion images in accordance with the movements of legs and feet are not required to be previously prepared and a variety of motions of the legs and feet of the player character can be realized.
US09269163B2 Method and apparatus for compressing or decompressing light field images
A method for compressing a set of images comprising a plenoptic image and at least one refocused image obtained from the plenoptic image for a given focus, by generating a set of data comprising a compressed version of the plenoptic image, some focusing parameter to build a refocused image from this plenoptic image and a compressed residual data to restore the refocused image in its plain quality.Accordingly, the set of images can be compressed in an efficient way, preserving the quality of the shoot using the focus chosen by the photographer.
US09269162B1 Rapid anomaly detection (RAND)
A rapid anomaly detection approach with corresponding method and system to detect anomalies in scene pixels making up a hyperspectral scene, efficiently, is presented. The approach includes tailoring an approximation of an anomaly score for each scene pixel, individually, based on an “intermediate anomaly score.” The intermediate score is computed using a portion of the terms used to compute the anomaly score. Scene pixels with low intermediate anomaly scores are removed from further processing. The remaining scene pixels are further processed, including computing anomaly scores to detect anomalies in these pixels. Advantageously, examples of the RAND approach process a few terms of all scene pixels, eliminate most scene pixels, and calculate more terms on high anomaly scoring scene pixels as needed.
US09269157B2 Methods for extracting objects from digital images and for performing color change on the object
Computerized method for separating an object in a digital image and for performing color change on an object within a digital image. The steps include: obtaining a digital image; receiving a selection of an object within the digital image; selecting a plurality of representative pixels estimated to be within the object; calculating a representative color from the plurality of representative pixels; selecting pixels of the digital image and for each pixel calculating a Euclidian distance to the representative color and, if the Euclidian distance is within a set threshold, identifying the pixel as belonging to the object. For color change, the steps include: generating a plurality of masks, each mask storing different property values of the collection of pixels; selecting a new color; applying the plurality of masks to the new color to generate new image of the object.
US09269152B1 Object detection with distributed sensor array
Objects within a scene are modeled in two- or three-dimensions by acquiring slices of data from a distributed sensor array and generating the model of the object at least in part from those slices. The distributed sensor array may comprise optical transmitters and optical receivers configured such that they may be individually addressed and activated. The system described herein may be used to support an augmented reality environment.
US09269150B1 Using pose data and positioning information to locate online photos of a user
The aspects described herein include receiving a request for available images depicting a user. One or more time and location indicators indicating one or more locations visited by the user are determined. Based on at least in part the one or more time and location indicators, a set of candidate images may be identified. The set of candidate images depict one or more locations at a time corresponding to at least one of the time indicators. Pose data related to the user may be obtained based on the location indicators. The pose data indicates a position and orientation of the user during a visit at a given location depicted in the set of candidate images. One or more images from the set of candidate images may be selected based on the pose data and the 3D reconstruction. The selected images include at least a partial view of the user.
US09269148B2 Displacement detection device
A displacement detection device includes a light source, an image sensor and a processing unit. The light source is configured to illuminate a work surface. The image sensor is configured to capture reflected light from the work surface and to output an image frame. The processing unit is configured to select a window of interest in the image frame having a maximum image feature and to calculate a displacement of the displacement detection device according to the window of interest.
US09269146B2 Target object angle determination using multiple cameras
Systems, methods, and computer media for determining the angle of a target object with respect to a device are provided herein. Target object information captured at approximately the same time by at least two cameras can be received. The target object information can comprise images or distances from the target object to the corresponding camera. An angle between the target object and the device can be determined based on the target object information. When the target object information includes images, the angle can be determined based on a correlation between two images. When the target object information includes distances from the target object to the corresponding camera, the angle can be calculated geometrically.
US09269143B2 Camera on a rover surveying system
A surveying system comprising a station and rover is used to make field measurements of a job site. The station at a first location has one or more cameras and one or more targets. The rover has one or more cameras and one or more targets. The rover is moved to a plurality of locations and images are acquired of the one or more targets of the station and/or the rover. The images are used to determine a spatial relationship between the first location and the plurality of locations.
US09269137B2 Portal dosimetry system
Embodiments of the invention provide systems and methods for evaluating treatment parameters for a patient undergoing radiotherapy. The method includes the step of generating a portal dosimetry image showing differences between a planning image obtained prior to a treatment session and a portal image obtained during the treatment session. A database of prior portal dosimetry results is accessed, and a processor is used to perform a similarity measurement between the portal dosimetry image and the prior portal dosimetry results. Based on the similarity measurement, the system determines whether radiation was delivered as planned during the treatment session.
US09269135B2 Defect management systems and methods
Defect management systems and methods are disclosed. A system for managing defects on an object includes an automatic defect classification (ADC) module, a lithographic plane review (LPR) module, and a defect progression monitor (DPM) module in communication with the ADC module and the LPR module. The DPM module is adapted to obtain information regarding a defect disposed on the object from the ADC module and the LPR module and determine if a repair or cleaning is needed of the object.
US09269133B2 Method and system for providing cooking information about food
Provided are a method and system for providing cooking information about food. The method includes receiving, from a camera, an ingredients image of at least one ingredient on a plate; determining the at least one ingredient based on the ingredients image; determining a food recommendation list related to the at least one ingredient, based on user information about a user of a mobile device; obtaining cooking information about food that is selected from the food recommendation list; and providing the cooking information to a projector that is connected to the mobile device, wherein the cooking information is projected, via the projector, onto the plate on which the at least one ingredient is disposed.
US09269132B1 Night vision detection enhancements in a display system
A method and a display system for dynamically activating a night-vision mode. The display system comprises a processor module that further comprises an image generator module. The processor module is for determining at least a head position of a user in the display system, the head position being used at least for geometry-correction purposes and, while determining the head position, determining that a night-vision-enhancer device is activated by the user. The processor module is further for activating the night-vision mode of the display system and the image generator module, upon activation of the night-vision mode of the display system, renders night-vision-enhanced images of a computer generated environment for display. The night-vision-enhanced images present a night-mode-adapted wavelength spectrum.
US09269131B2 Image processing apparatus with function of geometrically deforming image, image processing method therefor, and storage medium
An image processing apparatus which can increase processing speed, reduce memory access load, and enhance ease of control in image processing. Coordinate computations through different geometric deformations are performed on respective pixels of an input image, thus calculating post-geometric deformation coordinates and coordinate moving vectors. Geometric deformation parameters for geometric deformations are output to a plurality of coordinate computation units connected in series. The coordinate moving vectors are collectively combined together to generate combined coordinate moving vectors, based on which coordinates of pixels in an image to be output are converted into coordinates of the pixels of the input image. The coordinate computations are performed based on the coordinates of the pixels of the input image and the geometric deformation parameters. The post-geometric deformation coordinates output from the preceding coordinate computation units are input as coordinates of the pixels of the image to the second and subsequent coordinate computation units.
US09269127B2 De-noising of real-time dynamic magnetic resonance images by the combined application of karhunen-loeve transform (KLT) and wavelet filtering
A hybrid filtering method called Karhunen Loeve Transform-Wavelet (KW) filtering is presented to de-noise dynamic cardiac magnetic resonance images that simultaneously takes advantage of the intrinsic spatial and temporal redundancies of real-time cardiac cine. This filtering technique combines a temporal Karhunen-Loeve transform (KLT) and spatial adaptive wavelet filtering. KW filtering has four steps. The first is applying the KLT along the temporal direction, generating a series of “eigenimages”. The second is applying Marcenko-Pastur (MP) law to identify and discard the noise-only eigenimages. The third applying a 2-D spatial wavelet filter with adaptive threshold to each eigenimage to define the wavelet filter strength for each of the eigenimages based on the noise variance and standard deviation of the signal. Lastly, the inverse KLT is applied to the filtered eigenimages to generate a new series of cine images with reduced image noise.
US09269126B2 System and method for enhancing the legibility of images
A system and method are described for enhancing readability of scanned document images by operating on each document individually. Via principle component analysis, edge detection and local color contrast computation, an automated method removes image background noise and improves sharpness of the scripts and characters.
US09269122B2 First and second software stacks and discrete and integrated graphics processing units
A first software stack and a second software stack are run in a virtual environment. The virtual environment may be created by a hardware virtualizer. The hardware virtualizer may send the first software stack to the discrete graphics processing unit and the second software stack to the integrated graphics processing unit.
US09269121B2 Techniques for managing system power using deferred graphics rendering
An apparatus may include a memory to store one or more graphics rendering commands in a queue after generation. The apparatus may also include a processor circuit, and a graphics rendering command manager for execution on the processor to dynamically determine at one or more instances a total execution duration for the one or more graphics rendering commands, where the total execution duration comprises a total time to render the one or more graphics rendering commands. The graphics rendering command manager also may be for execution on the processor to generate a signal to transmit the one or more graphics rendering commands for rendering by a graphics processor when the total execution duration exceeds a graphics rendering command execution window.
US09269120B2 Dynamically rebalancing graphics processor resources
According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced.
US09269119B2 Devices and methods for health tracking and providing information for improving health
In one aspect, a device includes at least one storage medium bearing instructions executable by a processor, and at least one processor configured for accessing the storage medium to execute the instructions to configure the processor for receiving input pertaining to at least a first health parameter, monitoring at least one biometric of a user, and determining whether the user's biometric conforms to the first health parameter. The instructions also configure the processor for providing an indication that the biometric conforms to the first health parameter in response to determining that the user's biometric conforms to the first health parameter, and providing a recommendation for conforming to the first health parameter in response to determining that the user's biometric does not conform to the first health parameter.
US09269117B2 Enterprise management system
A health care enterprise management system and method of management are disclosed. The system and method include a routing layer, a plurality of applications in an application layer, wherein the application layer communicates external to the enterprise manager via communicative contact through the routing layer, a business rules layer of a plurality of health care provision business rules, and a core layer.
US09269108B2 Forward-looking transactive pricing schemes for use in a market-based resource allocation system
Disclosed herein are representative embodiments of methods, apparatus, and systems for distributing a resource (such as electricity) using a resource allocation system. One of the disclosed embodiments is a method for generating a bid value for purchasing electricity in a market-based resource allocation system. In this embodiment, a desired performance value indicative of a user's desired performance level for an electrical device is received. Price information from an electricity futures market is received. A bid value for purchasing electricity from a local resource allocation market sufficient to operate the electrical device at the desired performance level is computed. In this embodiment, the computing is performed based at least in part on the desired performance value and based at least in part on the price information from the electricity futures market.
US09269106B2 System and method for dynamically changing the content of an internet web page
A host Web page includes an evolving interactive dialog box wherein an Internet user may enter user data to be processed. When the user completes entering user data in a first revolution of the interactive dialog box, the first revolution is replaced with a second revolution of the evolving interactive dialog box without disturbing or affecting any other part of the host Web page being displayed. Beneficially, the first and second revolutions may be communicated to a user computer together with and at a same time as the host Web page. Also, the second revolution may include a variety of data which is selected or customized to match the user data submitted in the first revolution. Each revolution of the evolving interactive dialog box may be comprised of any combination of general textual data entry fields, category (pull-down) menus, contact information data entry fields, and opt-in/opt-out buttons.
US09269104B2 Automatic detection of mobile payment applications
In one embodiment, a method for making an payment from a buyer to an online seller includes providing the buyer with a mobile payment application that is operable when run on one or more processors of a mobile device of the buyer to effect payments to the seller using a payment service provider. The seller is provided with computer code that is operable when run on one or more processors of a web server of the seller to detect whether a mobile device of a buyer in communication with the server has the payment application installed thereon, and if the server detects that the buyer's device has the application installed thereon, the seller's server automatically redirects the buyer to a web server of the payment service provider to effect a payment from the buyer to the seller using the mobile payment application.
US09269103B1 Combining orders for delivery
In some examples, a first device associated with a first buyer may present information related to a plurality of merchants offering items for delivery. The first device may receive, as a first order, a selection of a first item offered by a selected merchant. The first device may determine that a second device is within a threshold distance of the first device, and may send, to the second device, a communication for creating a combined order, such as for dividing a delivery fee associated with the order. A second buyer may use the second device to select a second item to order from the selected merchant. At least one of the first device or the second device may send order information to a service computing device, which may send the combined order to the first merchant and schedule a courier to deliver the order to the buyers.
US09269100B2 Social graphs using shared personal data
Social graphs using shared personal data are described, including techniques for capturing data from a social data source, determining one or more connections associated with an item using the data, and creating a social graph using the one or more connections, the social graph comprising the one or more connections associated with the item. Embodiments of the invention also include techniques for updating social graphs.
US09269098B2 Push-based recommendations
Among other things, one or more techniques and/or systems are provided for pushing a recommendation to a user. That is, a recommendation may be pushed to a device of the user based upon a triggering event associated with the user. The recommendation may be provided, for example, without user solicitation for the recommendation. In one example, a recommendation component may observe that the user frequently stops for ice cream on Fridays after work (e.g., based upon prior social network check-ins). Accordingly, on the following Friday, the recommendation component may push a recommendation to the user's device to visit a particular grocery store on the way home from work that is within 10 minutes of the user's home so that the user can avoid melting ice cream (e.g., a location constraint may be applied to choose a grocery store that is relatively close to the user's home).
US09269096B2 Advertisement rendering for multiple synced devices
Methods and systems for synchronizing communication of different versions of an advertisement to multiple, disparate devices associated with a user are provided. The advertisement is received on a first device associated with the user. Incident to receiving the advertisement, the first device establishes a communication path with a second device associated with the user. Utilizing the communication path, capabilities of the second device are determined. A version of the advertisement is rendered for the second device, where the version rendered is dependent upon the determined capabilities of the second device. And, utilizing the communication path, the rendered version of the advertisement is communicated to the second device.
US09269091B2 Geographic segmentation systems and methods
Methods and systems for segmenting traffic based on geography include assigning coordinate location data received with respect to members of a plurality of computing devices to analytics data associated with a plurality of requests for content received from respective ones of the plurality of computing devices. A geographical location of interest is defined. The defining the geographical location of interest includes designating a plurality of points defining boundaries of the geographical location of interest. Respective ones of a plurality of traffic segments are assigned to the plurality of requests for content based in part upon a comparison of the geographical location of interest to coordinate location data assigned to respective ones of the plurality of requests for content. Network traffic metrics are generated for ones of the plurality of traffic segments. The request traffic metrics describe request behavior associated with particular segments of the plurality of traffic segments.
US09269088B2 Method and system of advertising
Method and system of advertising. The method and system permitting a user to select advertisements for viewing. The user may select the advertisements so that the advertisements appear during access to media services.
US09269087B2 System and method for a revolutionary development platform and management system using intelligent control rooms
A system and method for a revolutionary development platform and management system using intelligent control rooms, hereafter referred to “the system”, that implements a generic intelligent control room concept in any information system using a groundbreaking framework for the design, build, control and operation of an enterprise's management data and human reporting. It provides both operational knowledge and quality assurance by pragmatically defining the gathering and flow of information in one or all organization units and allows for seamless knowledge dissemination into and within the organization. To meet the mantra of no programming required all new object domains and expert subject rules are added via the base code and database design functionality without requiring any additional programming.
US09269085B2 Authentication system and method
Aspects of the invention relate to a customer authentication system for authenticating a customer making a request related to a customer account. The customer authentication system may include multiple application level data receiving and processing mechanisms for receiving customer requests and collecting customer data. The customer authentication system may additionally include a central authentication system for receiving the customer requests and customer data from the multiple application level data receiving and processing mechanisms, the central authentication system determining, based on authentication policy, whether the collected customer data is sufficient to authenticate each customer in order to fulfill the customer request. The central authentication system may return its conclusions and instructions to the multiple application level data receiving and processing mechanisms. The customer authentication system may additionally include a fraud policy system for centrally managing authentication policy implemented by the central authentication system.
US09269084B2 Apparatus and method for commercial transactions using a communication device
An apparatus for effecting commercial transactions with a server using a transaction card via a communication device is provided. The apparatus includes a transaction device coupled with the communication device for capturing information from the transaction card and a controller for converting the captured card information into an encrypted audio signal and for transmitting the audio signal to the communication device. The communication device delivers the audio signal to the server for processing the commercial transaction.
US09269082B2 Method and system for providing multiple services via a point-of-sale portal architecture
A secure point-of-sale (POS) portal architecture for delivering multiple services is provided. According to one exemplary aspect of the architecture, a number of services offered by various parties are integrated for delivery to merchants. The parties offering the services include, for example, payment processors and merchant acquirers and other external value-added service providers. The integrated services, in turn, are offered to merchants and/or their respective customers via one or more POS devices and its supporting system infrastructure at the merchant locations. The integrated services include, for example, acceptance of multiple payment instruments, payment processing, user dialog management, sales promotion and customer support, loyalty programs, back office processing, receipt capture, employee training, risk management, dispute resolution, system security, system administration etc. Moreover, these integrated services may be customized based on a merchant's particular requirements to provide a specific environment for delivering these services.
US09269080B2 Hierarchical publish/subscribe system
A method for publishing a publication message includes receiving, at one of a plurality of first relays, a subscription request from a first client and transmitting the subscription request from the one of the plurality of first relays to first and second central relays of a plurality of central relays. The method also includes receiving, at another of the plurality of first relays, a publication request from a second client. The publication request includes the publication message. The method further includes transmitting the publication message from the another of the plurality of first relays to all of the plurality of central relays, transmitting the publication message from at least one of the first and second central relays to the one of the plurality of first relays, and transmitting the publication message from the one of the plurality of first relays to the first client.
US09269079B2 Social network stealth and counter messaging
Stealth and counter messaging, in some embodiments in the context of social networking sites, is disclosed. A first user may provide a first, counter-message along with a second, stealth message. When posting the first message, its corresponding identifier as set by the social networking site is recorded in a linked relationship to the second message. When an authorized second user retrieves the first message from the social networking site, its identifier is queried to determine whether there is a corresponding second message. After locating the identifier for the first message, the associated second message is retrieved and transmitted to the second user.
US09269078B2 Method and system for associating a contact with multiple tag classifications
An approach for enabling multiple tag associations to be used for classifying a contact identifier is described. A first tag is associated with a contact identifier for grouping into a first classification; and a second tag is associated with the contact identifier for grouping into a second classification. Storage of the first tag and the second tag is initiated along with the contact identifier as part of a contact list.
US09269070B2 Ephemeral communication
In an embodiment, method(s) and system(s) for providing ephemeral communication is described herein. In an implementation, the method may include determining one or more request keywords associated with a request received from a requesting terminal. The request may be intended for initiating communication. The method may further include transmitting, based on the one or more request keywords, a notification to each of a plurality of target terminals over a communication network for joining a communication group. The method may also include initiating the communication between the requesting terminal and at least one target terminal from the plurality of target terminals. The communication may be initiated upon receiving an acceptance notification from the at least one target terminal to join the communication group.
US09269066B2 3D glasses and related systems
3D glasses having an RFID tag (embedded in one or more temples) are rented to theater or other venue operators. The glasses are shipped to a venue for distribution to patrons and collected from patrons in the trays. Inventory and other measures are implemented by RFID scanning while the glasses are in the trays (e.g., upon delivery to a theater, on collection from the theater, upon inspection at the 3D rental company, etc). Data gathered from RFID scanning and inspections allows the rental company to properly allocate rental costs to various venues based on shrinkage which includes, for example, extraordinary wear of the glasses, breakage or theft, which is attributable and traceable to the specific venues. The theater or venue may also independently scan the trays upon delivery and pick-up to maintain their own records. The invention includes 3D glasses with RFID, a washing rack, and rental systems.
US09269062B2 Methods for optimizing energy consumption and devices thereof
A method, non-transitory computer readable medium, and energy optimization device that optimizes energy consumption includes generating an energy model for each of a plurality of sites in an enterprise network. A plurality of service windows is determined for each of the sites. An energy consumption forecast is generated for each of the sites based on the generated energy models and the determined service windows. Current energy consumption information is obtained for one of the sites. Optimization recommendation(s) are determined for the one site based on a deviation of the obtained current energy consumption information for the one site from the generated energy consumption forecast for the one site in an active one of the determined service windows for the one site, and the optimization recommendation(s) are output.
US09269053B2 Electronic review of documents
An example method for reviewing documents includes scoring documents using an artificial intelligence model, and selecting a subset of highest scoring documents. The method further includes inserting a number of randomly-selected documents into the subset of highest scoring documents to form a set of documents for review, wherein a reviewer cannot differentiate between the randomly-selected documents and the subset of highest scoring documents included in the set of documents for review, and presenting the set of documents for review by the reviewer.
US09269047B2 Rule-based selection of content
A method includes, at a customer premise equipment (CPE) device, accessing data descriptive of content available via a network coupled to a network interface of the CPE device. A plurality of rules are analyzed using a forward-inferencing rules engine to determine whether one or more of the rules are satisfied based on the data. The rules include at least one user-defined rule and at least one automatically generated rule, where the at least one automatically generated rule is automatically generated based on user history information. The method includes selecting particular content of the content available via the network for presentation via a display device.
US09269044B2 Neuromorphic event-driven neural computing architecture in a scalable neural network
An event-driven neural network includes a plurality of interconnected core circuits is provided. Each core circuit includes an electronic synapse array has multiple digital synapses interconnecting a plurality of digital electronic neurons. A synapse interconnects an axon of a pre-synaptic neuron with a dendrite of a post-synaptic neuron. A neuron integrates input spikes and generates a spike event in response to the integrated input spikes exceeding a threshold. Each core circuit also has a scheduler that receives a spike event and delivers the spike event to a selected axon in the synapse array based on a schedule for deterministic event delivery.
US09269042B2 Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devices
Embodiments of the invention relate to a neuromorphic network for producing spike-timing dependent plasticity. The neuromorphic network includes a plurality of electronic neurons and an interconnect circuit coupled for interconnecting the plurality of electronic neurons. The interconnect circuit includes plural synaptic devices for interconnecting the electronic neurons via axon paths, dendrite paths and membrane paths. Each synaptic device includes a variable state resistor and a transistor device with a gate terminal, a source terminal and a drain terminal, wherein the drain terminal is connected in series with a first terminal of the variable state resistor. The source terminal of the transistor device is connected to an axon path, the gate terminal of the transistor device is connected to a membrane path and a second terminal of the variable state resistor is connected to a dendrite path, such that each synaptic device is coupled between a first axon path and a first dendrite path, and between a first membrane path and said first dendrite path.
US09269040B2 Event monitoring devices and methods
A device (10) for processing events (4), including an identifier (8) identifying the event's type, and at least one parameter carrying information about a process, includes an event selector (20) and an event type recognizer (30). The device (10) is configured for receiving an event (4), providing the event (4) to the event selector (20), and providing the identifier (8) to the event type recognizer (30). The event selector (20) stores the provided event (4). The event type recognizer (30) determines, using at least one neural network unit, whether the identifier (8) corresponds to a type for which a subscription exists, and, if so, it causes the event selector (20) to transmit the event (4S) for processing by one or more applications. Furthermore, the device (10) is configured for allowing one or more types of event to be subscribed to. The invention also relates to methods for processing events (4).
US09269038B2 Antenna device, card-type communication device, and communication terminal apparatus
An antenna device includes an antenna resonance circuit connected to a power supply circuit and a variable-frequency resonance element including a resonance circuit which is coupled with the antenna resonance circuit via an electromagnetic field. The resonant frequency of the resonance circuit is variable within a predetermined frequency band.
US09269035B2 Modified two-dimensional codes, and laser systems and methods for producing such codes
Each black square within a two-dimensional code can be represented by a distribution of spots. Each spot can be made small enough to be invisible to the human eye so that the two-dimensional code can be invisible on or within transparent or nontransparent materials. The spots can be spaced at a large distance to increase the signal-to-noise ratio for an optical code reader. A laser can be used to produce the spots.
US09269034B2 Orthogonal encoding for tags
Symbologies for encoding data, as well as methods of encoding and decoding thereof are described. The symbologies may have a plurality of pixels arranged in a plurality of patterns on or in a substrate. Furthermore, each of the plurality of pixels may have one or more optical properties that each provides one or more types of non-interacting data.
US09269033B2 System for identifying joints of elements to be assembled intended for forming an assembly such as, in particular, a pipeline or a tank, and identification method used in such a system
A system for identifying elements involved in joints of elements configured to form a duct, such as a pipeline, which works on element identifiers for an element identification code. The system includes an element identifier reader and a management device for supplying by a combination device the joint identification codes between two elements according to element identification codes of the two elements. The system is also useful for production of tanks for hydrocarbon by-products and for control and maintenance, for example, of pipeline networks and tanks.
US09269029B2 Data communication in a printing device
Apparatus and methods for the communication of data in a printing device are described. The apparatus enable communication between a control system and a plurality of printhead controllers. They have respective interface controllers for encoding and decoding one or more data streams that are communicated via a coupling medium. Print data is encoded for transmission as one or more data streams with a deterministic latency. Packet-based control data is also embedded in the one or more data streams. After receipt, the print data and the packet-based control data are extracted from the one or more data streams for control of at least the plurality of printhead controllers. Status data may also be encoded as a data stream and sent back to the control system.
US09269026B2 Recognition dictionary creation apparatus and recognition dictionary creation method
In accordance with one embodiment, a recognition dictionary creation apparatus comprises an image capturing section, a measurement module, a specification module, an extraction module and a registration module. The image capturing section photographs a commodity at a distance away from the image capturing section to capture an image of the commodity. The measurement module measures the distance from the image capturing section to the commodity photographed by the image capturing section as a distance data. The specification module specifies the commodity from the captured image. The extraction module extracts an appearance feature amount of the commodity from the captured image. The registration module registers the appearance feature amount extracted by the extraction module in a recognition dictionary file in association with the distance data as a feature amount data of the specified commodity at the distance measured by the measurement module.
US09269025B1 Object detection in images
In an embodiment, a method comprises obtaining a frequency domain representation associated with an image; obtaining one or more frequency domain representations of one or more object detection filters; generating a composite frequency domain representation based on the frequency domain representation associated with the image and the one or more frequency domain representations of the one or more object detection filters; and detecting one or more objects in the image based on the composite frequency domain representation. The frequency domain representation associated with the image may be obtained based on a forward transform performed on an image feature description. The image feature description may be obtained based on a feature extraction performed on the image. The one or more frequency domain representations of the one or more object detection filters may be obtained based on one or more Fourier transforms performed on the one or more object detection filters.
US09269021B2 Image comparison based on checksums
A method including dividing a first image into first sub-images; calculating a first checksum value for each of the first sub-images; dividing a second image into second sub-images; calculating a second checksum value for each of the second sub-images; comparing the first checksum values with the second checksum values; and determining whether one or more differences in checksum values exist between the first checksum values and the second checksum values and correspondingly whether one or more differences exist between the first sub-images and the second sub-images.
US09269017B2 Cascaded object detection
Cascaded object detection techniques are described. In one or more implementations, cascaded coarse-to-dense object detection techniques are utilized to detect objects in images. In a first stage, coarse features are extracted from an image, and non-object regions are rejected. Then, in one or more subsequent stages, dense features are extracted from the remaining non-rejected regions of the image to detect one or more objects in the image.
US09269016B2 Content extracting device, content extracting method and program
An information processing apparatus that obtains intimacy degree information corresponding to identification information of a first person, specifies an extraction period based on the intimacy degree information, and extracts content in the extraction period.
US09269015B2 Image capture and identification system and process
A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object.
US09269013B2 Using extracted image text
Methods, systems, and apparatus including computer program products for using extracted image text are provided. In one implementation, a computer-implemented method is provided. The method includes receiving an input of one or more image search terms and identifying keywords from the received one or more image search terms. The method also includes searching a collection of keywords including keywords extracted from image text, retrieving an image associated with extracted image text corresponding to one or more of the image search terms, and presenting the image.
US09269012B2 Multi-tracker object tracking
Systems and approaches are provided for tracking an object using multiple tracking processes. By combining multiple lightweight tracking processes, object tracking can be robust, use a limited amount of power, and enable a computing device to respond to input corresponding to the motion of the object in real time. The multiple tracking processes can be run in parallel to determine the position of the object by selecting the results of the best performing tracker under certain heuristics or combining the results of multiple tracking processes in various ways. Further, other sensor data of a computing device can be used to improve the results provided by one or more of the tracking processes.
US09269011B1 Graphical refinement for points of interest
Various embodiments crowd source images to cover various angles, zoom levels, and elevations of objects and/or points of interest (POIs) while under various lighting conditions. The crowd sourced images are tagged or associated with a particular POI or geographic location and stored in a database for use by an augmented reality (AR) application to recognize objects appearing in a live view of a scene captured by at least one camera of a computing device. The more comprehensive the database, the more accurately an object or POI in the scene will be recognized and/or tracked by the AR application. Accordingly, the more accurately an object is recognized and tracked by the AR application, the more smoothly and continuous the content and movement transitions thereof can be presented to users in the live view.
US09269009B1 Using a front-facing camera to improve OCR with a rear-facing camera
Various embodiments enable a computing device to incorporate frame selection or preprocessing techniques into a text recognition pipeline in an attempt to improve text recognition accuracy in various environments and situations. For example, a mobile computing device can capture images of text using a first camera, such as a rear-facing camera, while capturing images of the environment or a user with a second camera, such as a front-facing camera. Based on the images captured of the environment or user, one or more image preprocessing parameters can be determined and applied to the captured images in an attempt to improve text recognition accuracy.
US09269008B2 Biometric information processing apparatus and biometric information processing method
A biometric information processing apparatus includes an aligning unit that aligns a hand image in a first vein image that includes a vein pattern of one hand among a right hand and a left hand as seen from one side of a palm side of the hand or a back side of the hand, with a hand image in a second vein image that includes a vein pattern of the other hand among the right hand and the left hand as seen from the other side among the palm side of the hand or the back side of the hand; and a match determining unit that determines a line element, among a plurality of line elements in the first vein image, that matches any of a plurality of line elements in the second vein image.
US09269007B2 In-vehicle display apparatus and program product
An in-vehicle display apparatus in a vehicle includes a region recognition circuit and an image output circuit. The region recognition circuit recognizes a target plane region in scenery ahead of the vehicle; the target plane region corresponds to a continuous region having (i) a flatness equal to or greater than a predetermined threshold value and (ii) an area size equal to or greater than a predetermined threshold value. The image output circuit displays a driving information picture as a virtual image using a liquid crystal panel such that a driver of the vehicle views the virtual image in the target plane region within a displayable region through a windshield of the vehicle.
US09269005B2 Commodity recognition apparatus and commodity recognition method
A commodity recognition apparatus acquires an image including a commodity captured by an image capturing module and displays the acquired image on a display module. The commodity recognition apparatus displays a frame border surrounding the commodity on at least a portion of the image displayed on the display module. Moreover, the commodity recognition apparatus recognizes the commodity existing in the frame border according to a feature amount of the image in the area surrounded by the frame border. The commodity recognition apparatus outputs information of the commodity recognized.
US09269004B2 Information processing terminal, information processing method, and program
An information processing terminal includes a recognition unit that recognizes an identifier projected over an image, an acquisition unit that acquires data of an object corresponding to the identifier, a processing unit that changes the orientation of the object according to the positional relationship between the information processing terminal itself and the identifier specified based on the image and, when it is no longer able to recognize the identifier, changes the orientation of the object according to the positional relationship between the information processing terminal itself and the identifier specified based on sensor data, and a display control unit that causes the object of which the orientation is changed according to the positional relationship between the information processing terminal itself and the identifier to be displayed over the image in a superimposed manner.
US09269001B2 Illumination invariant and robust apparatus and method for detecting and recognizing various traffic signs
The present application provides a robust, illumination invariant apparatus and method for detecting and recognizing various traffic signs. A robust method for detecting and recognizing the traffic signs using images captured by a digital color and night vision camera, the said method characterized in being illumination invariant comprising the processor implemented steps of: transforming RGB image into HSV color model and subsequently extracting desired color components by using color quantization; filtering the noise components in the HSV color model based on object symmetrical shape property; detecting edges of the objects and subsequently detecting the distinct objects in the noise components filtered image; classifying the shapes of the traffic signs based on shape of the determined distinct objects; and recognizing the classified shapes of the traffic signs by template matching. Further, the method provides the provision for warning the driver by use of the recognized data of the traffic signs.
US09269000B2 Method and apparatus for providing adaptive display and filtering of sensors and sensor data
An approach is provided for adaptive display and filtering of sensors and sensor data. A sensor manager determines one or more signals associated with one or more sensors. The sensor manager then processes and/or facilitates a processing of the one or more signals for comparison against one or more predetermined signals. The sensor manager determines one or more parameters for one or more filters based, at least in part, on the comparison, wherein the one or more filters operate, at least in part, on the one or more sensors, one or more other signals determined form the one or more sensors, or a combination thereof.
US09268998B2 Image determining apparatus, image processing system, and recording medium
An image determining apparatus of the present invention includes an image type determining section (81) which determines whether an image is a scanned image or a captured image; and a compact PDF file generation determining section (82) which (a) extracts (i) a feature regarding a resolution from the scanned image or (ii) a feature regarding a blur from the captured image and (b) determines, on the basis of the extracted feature, whether or not the image is suitable for the conversion.
US09268996B1 Evaluation of models generated from objects in video
Models are generated from objects identified in video. Each model is evaluated based on knowledge of the objects determined from video analysis, and preferred models are identified based on the evaluations. In some examples, each model could be evaluated by tracking a movement of each object in the video by using each model to track the object from which it was generated, evaluating an ability of each model to identify the objects in the video that are similar to the object from which it was generated, and determining an amount of false identifications made by each model of different objects in different video that does not include the object from which it was generated.
US09268993B2 Real-time face detection using combinations of local and global features
An apparatus comprises a processor configured to: input an image; detect a skin area in the image to obtain an expanded rectangular facial candidate area; detect a face in the expanded rectangular facial candidate area to obtain an initial detected facial area; subject the initial detected facial area to a false alarm removal; and output a detected facial area.
US09268986B2 Security feature
According to one example, there is provided a method of generating a security feature that encodes data. The method comprises obtaining an n-bit code of data to encode, generating an arrangement of dots, designating a first portion of the dots as reference dots and a second portion of the dots as encoding dots, and moving a group of the designated encoding dots by a predetermined direction in a predetermined amount to encode the n-bit code of data.
US09268982B2 Device and method for the acquisition and automatic processing of data obtained from optical codes
The device for the acquisition and automatic processing of data obtained from optical codes comprises a CMOS optical sensor; an analog processing unit connected to the optical sensor; an analog/digital conversion unit connected to the analog processing unit; a logic control unit connected to the CMOS optical sensor, the analog processing unit and the analog/digital conversion unit; and a data-processing unit connected to the logic control unit and the analog/digital conversion unit. The CMOS optical sensor and at least one of the analog processing, analog/digital conversion, logic control and data processing units are integrated in a single chip. The data processing unit processes the digital signals corresponding to the image acquired by the CMOS sensor and extracts the optically coded data.
US09268978B2 RFID-enabled module for enclosures
A self-contained RFID-enabling drawer module includes a probe antenna to introduce a robust EM field into a container within a Faraday cage to activate RFID tags within the container, regardless of the container's resonant frequency. A receiving antenna and reader read the data of the activated RFID tags, and a processor and communications module transmit the RFID tag data to a remote processor. The RFID-enabling module is self-contained in that it needs only power and a data connection with which to operate. Where an Ethernet is used, power is obtained by PoE. The RFID-enabling module may be used to retrofit existing medication drawers of a medication cabinet or may be used during the construction of a new cabinet. The RFID-enabling system includes auto tuning of the antenna to dynamically compensate for loading changes on the EM field. Assembly and testing costs are reduced and serviceability of the system is increased.
US09268977B2 Electronic price label system
A method and system for an electronic price label system comprising at least a base station and a plurality of electronic labels for transferring information between the base station and electronic labels. The method comprises transmitting a first message from base station 6 to a plurality of electronic labels 5a, 5b, the first message comprising at least identification information of one electronic label 5a, 5b, receiving the first message at the electronic label 5a, 5b, recognizing the identification information in the first transmitted message by the electronic label 5a, 5b, transmitting a second message from the base station 6 to the electronic label 5a, 5b, receiving the second message and sending an acknowledgement message to the second message from electronic label 5a, 5b with a modulation frequency from a certain frequency range, and searching the acknowledgement message from a predefined frequency range at the base station 6.
US09268976B2 Method and device for operating a multifunctional near-field communication device supporting several data formats
The present invention relates in the field of power saving battery-operated radio frequency identification (RFID) and near field communication (NFC) devices and provides a method to operate a multifunctional NFC/RFID device that supports two or more data formats according to respective protocols of respective standards. The method of the invention comprises obtaining context information about the context of said multifunctional near-field communication device, and selecting an operation mode for the multifunctional near-field communication device for communicating with external devices on the basis of said obtained context information. In the method said selected operation mode defines proportionality values for communicating according to said two or more supported data formats according to respective protocols of respective standards. Said operation mode is used to for switching operation of said multifunctional near-field communication device between said two or more supported data formats according to respective protocols of respective standards based on the proportionality values.
US09268975B2 Contactless plastic card encoding module
A contactless plastic-card encoding module (2) mounted on the frame of a plastic-card printer (1), the module comprising: an electronic card (23) that fulfills the function of plastic-card encoding, a hollow support (21) comprising fixations (211) for fixing the support to the frame of the printer, a piece (22) absorbing any reliefs on the electronic card, the piece (22) being positioned at the bottom of the hollow support (21) and receiving the electronic card (23), and a holder (24) for holding the electronic card in position on the piece.
US09268973B2 Sensor output correction circuit, sensor output correction device, and sensor output correction method
A sensor output correction circuit includes an analog-to-digital converter configured to receive an input voltage corresponding to a sensor output of a sensor and a reference voltage that are selectively input to the analog-to-digital converter; and an arithmetic unit configured to correct output data, which is output from the analog-to-digital converter when the input voltage is input to the analog-to-digital converter, based on an output value that is output from the analog-to-digital converter when the reference voltage is input to the analog-to-digital converter. The arithmetic unit includes a multiply adder and a non-restoring divider.
US09268970B2 System and method for security-aware master
A security-aware master is provided, such that a master can determine its security state before attempting access to secure resources or before requesting secure access level. An exemplary system include a system interconnect; one or more masters coupled with the system interconnect; and a master security check register coupled with the system interconnect. The master security check register is configured to receive a request from a master via the system interconnect to access the master security check register, wherein the request includes a master operating state signal that indicates a security state of the master requesting access, and return a data value to the master based on the master operating state signal, wherein the data value indicates a current security state of the master requesting access.
US09268962B1 Access revocation
Systems, methods and apparatuses for revoking access to one or more applications for one or more individuals or users are provided. In some examples, revocation settings may be received from different business divisions or enterprises or business groups within an entity and may be compiled to form a standardized set of revocation settings that may be applied across the entity. Accordingly, upon receiving an item that may be associated with access and may include one or more applications to which access may be revoked and/or one or more users from which access may be revoked, the system may apply the standardized revocation settings to determine whether access should be revoked. If it is determined that access should be revoked, the system may revoke access to the one or more applications for the one or more users.
US09268961B2 Storage system, storage control apparatus, and storage control method
In a storage system, a storage apparatus has an encryption key generator and an encryption processor that encrypts data to be recorded in a storage region using an encryption key from the encryption key generator, and is able to change an encryption key for each divided region set in the storage region. A control apparatus has a logical volume setting unit that requests the encryption processor to set an individual divided region for each storage region set as a logical volume in the storage region of the storage apparatus and a data erasure processor that requests the encryption processor to change the encryption key used for encryption in the divided region corresponding to the logical volume to be erased.
US09268960B2 Moderation of shared data objects
Methods, system, and computer storage media are provided for moderating actions performed on shared data objects. Rule enforcement logic is received for an application that is associated with one or more data objects shared between various clients. The rule enforcement logic is stored at a data server that also stores data associated with data objects. A moderator, also stored on the data server, is used to enforce the rule enforcement logic corresponding to the application when a client attempts to perform an action to a data object associated with the application.
US09268957B2 Encryption-and decryption-enabled interfaces
Decryption apparatus includes an input memory (48), which is coupled to receive encrypted data, and an output transducer (28), for presenting decrypted data to a user. A decryption processor (50) is coupled to read and decrypt the encrypted data from the input memory but is incapable of writing to the input memory, and is coupled to convey the decrypted data to the output transducer for presentation to the user.
US09268953B2 Method of performing microprocessor ALU integrity test over a distributed asynchronous serial communication network for ASIL-D level safety critical applications
A system includes first and second modules of a vehicle. The first module stores at least one seed value, calculates a key based on the at least one seed value, forms a seed key pair based on the calculated key and the at least one seed value, generates a data bus message including the seed key pair and data corresponding to operation of the first module, and transmits, over a distributed vehicle network, the data bus message. The second module receives the data bus message over the distributed vehicle network, retrieves the seed key pair from the data bus message, determines whether the calculated key matches an expected key, and selectively verifies integrity of the first module based on the determination of whether the calculated key matches the expected key.
US09268952B2 Scalable precomputation system for host-opaque processing of encrypted databases
A method, system, and computer program product to generate results for a query to an encrypted database stored on a host are described. The method includes generating indexes from the encrypted database, each index identifying records of the encrypted database associated with a range of data for at least one field stored in the records of the encrypted database, and generating index metadata associated with each index, the index metadata indicating the range of data identified by the associated index. The method also includes generating a sub-query from the query for each field associated with the query and determining a subspace of search within the encrypted database based on sub-query results obtained through the index metadata. The method further includes searching the subspace of the encrypted database to generate the results of the query.
US09268951B2 Method and system for enabling a technical apparatus
A method and a system transmit data between a technical apparatus which has a reception unit, a transmission unit and a computer unit, an external device which has a reception unit, a transmission unit and a computer unit, and a mobile terminal which has a reception unit, a transmission unit and a memory unit. The method and system allow registered, authenticated users to use the mobile terminal to perform safe reservation or enabling for a technical apparatus, without requiring an online connection and check between the technical apparatus and the external device for the purpose of authorization and authentication of the user.
US09268946B2 Quantifying the risks of applications for mobile devices
Quantifying the risks of applications (“apps”) for mobile devices is disclosed. In some embodiments, quantifying the risks of apps for mobile devices includes receiving an application for a mobile device; performing an automated analysis of the application based on a risk profile; and generating a risk score based on the automated analysis of the application based on the risk profile.
US09268942B2 Providing a trustworthy indication of the current state of a multi-processor data processing apparatus
A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.
US09268941B1 Method for secure software resume from low power mode
Systems, methods, and other embodiments associated with a secure software resume from low power mode are described. According to one embodiment, a method includes receiving a request to enter a low power mode. In response to the request, the method includes storing a data section in LPDRM, performing a validation function on the data section to compute a validation value, and constructing a resume package that includes the validation value and a location of the data section in the LPDRM. The resume package is stored in the LPDRM for use in resuming operation after exiting low power mode.
US09268939B2 Method and apparatus for determining virus-infected files
Disclosed in the present invention are a method and apparatus for determining a virus-infected file, which belong to the field of computer security. The method includes: locating data in a file being scanned according to the file offset address associated with a virus signature of a virus; making a comparison of the virus signature with the data located in the file being scanned; and determining that the file being scanned is a virus-infected file when the virus signature matches the located data. The apparatus includes: a locating module, a comparison module and a determination module.
US09268937B1 Mitigating malware
Remediating a suspicious element in a web page is disclosed. An indication of a suspicious element is received. A quarantine instruction is sent to a server of the web page. One example of a quarantine instruction is an instruction to block the page from being served. Another example of a quarantine instruction in as instruction to block an element of the page from being served.
US09268930B2 Fuel dispenser user interface system architecture
A vending machine can include a touch display and a touch controller operatively connected to the touch display and configured to transmit display data to the touch display and receive input data from a touchscreen function of the touch display. The vending machine also includes a secure device operatively connected to the touch display for securing the display by managing touch input information provided to one or more applications based on the input data received from the touchscreen functionality. The vending machine has a processor operatively connected to the secure device for communicating access requests for the touch display to the secure device from the one or more applications along with an indication of whether the one or more applications are signed by an authorized entity. The secure device manages the touch input information provided to the one or more applications further based at least in part on the indication.
US09268926B2 Privileged activity monitoring through privileged user password management and log management systems
A system and method is provided for allowing seamless auditing compliance and investigations of privileged account access and activities. Account access information and privileged activity information may be stored in a central data repository. The central data repository may be queried to determine who was granted access to a privileged account, the timeframe that the access was granted, and/or what actions were performed by the user who was granted access.
US09268922B2 Registration of devices in a digital rights management environment
Methods and structure for Digital Rights Management (DRM) are provided. An exemplary system includes a Digital Rights Management (DRM) licensing server. The DRM licensing server is able to receive authentication information generated by a DRM module of a client device, and to receive a device identifier that uniquely distinguishes the client device from other client devices, wherein the device identifier has been generated by the DRM module. The DRM licensing server is further able to authenticate the DRM module based on the authentication information, to create a signed identifier based on the device identifier responsive to authenticating the DRM module, and to transmit the signed identifier to the client device. The system also includes an application server able to register the client device with an account at the application server, based on the signed identifier.
US09268920B1 Dynamic location based content rights management
A system and method for controlling access to digital content based on proximity and location of a user device. A user device connects to a local network and an audio transmission including a perpetually rolling key is transmitted within a geo-fence in the local area. The user device hears the audio transmission and uses the key to authenticate to a content server over the network. Once authenticated, the user device may then stream content from the content server. In order to terminate access to the content when the user device leaves the geo-fence, the content server may require the key to be retransmitted from the user device at regular intervals to re-authenticate the user device. Other factors such as radio fingerprints from the user device may also be used instead of or in addition to the audio to verify the user device's presence within the geo-fence.
US09268916B1 Polymorphic application of policy
Polymorphic application of a policy is disclosed. An indication is received that a retention policy is to be applied with respect to an object. A rule is evaluated associated with the retention policy, in light of a circumstance of the object, to determine a manner in which the retention policy is to be configured to behave with respect to the object.
US09268913B2 Medication management system and method
A medication management system (100) comprises a portable device (10) attachable to a user (30) and a medication dispenser (20). The portable device comprises a lighting means (50) for providing a visual stimulus (55) to indicate an approaching medication intake moment or period. The medication dispenser (20) comprises further lighting means (40, 41) for providing a further visual stimulus (45) to draw the attention of the user. The visual stimulus and the further visual stimulus have a same predetermined color and the visual stimulus (55) is provided a predetermined time before the medication dispenser provides the further visual stimulus (45).
US09268906B2 Methods, apparatuses and computer program products for facilitating location and retrieval of health information in a healthcare system
An apparatus is provided for retrieving information associated with one or more patients. The apparatus includes at least one memory and at least one processor configured to receive queries from devices of health care systems. The queries include data requesting information associated with patients that corresponds to specified items of information indicated in the queries. The processor is further configured to analyze stored patient information to determine items of the patient information that correspond to the specified items of the information. The processor is further configured to detect a subset of the items of the patient information related to health data that is determined to correspond to a respective patient(s) based on a determined value that equals or exceeds a predetermined threshold. Corresponding computer program products and methods are also provided.
US09268905B2 Methods and systems for determining, monitoring, and analyzing personalized response variables using brain wave frequency data and interactive multimedia display
A computer-implemented method for monitoring one or more response variables in response to a media segment using brain wave frequency data includes displaying a media segment to a user. The media segment includes one or more embedded flags to flag one or more positions of the media segment. The method further includes acquiring brain wave frequency data of the user, acquiring amplitude data of the acquired brain wave frequency data in one or more frequency bands; and determining one or more response variables in response to the acquired amplitude data of the acquired brain wave frequency data correlating to flagged positions of the media segment.
US09268903B2 Systems and methods for sequence data alignment quality assessment
A computer-implemented method for classifying alignments of paired nucleic acid sequence reads is disclosed. A plurality of paired nucleic acid sequence reads is received, wherein each read is comprised of a first tag and a second tag separated by an insert region. Potential alignments for the first and second tags of each read to a reference sequence is determined, wherein the potential alignments satisfies a minimum threshold mismatch constraint. Potential paired alignments of the first and second tags of each read are identified, wherein a distance between the first and second tags of each potential paired alignment is within an estimated insert size range. An alignment score is calculated for each potential paired alignment based on a distance between the first and second tags and a total number of mismatches for each tag.
US09268898B1 Estimating power consumption of a circuit design
Estimating power consumption of a circuit design includes associating, using a processor, each partition of a plurality of partitions of a circuit design with a probability distribution (315). For each partition, the associated probability distribution specifies a distribution for a probability distribution parameter correlated with power consumption for the partition. Using the processor, an output probability distribution specifying power consumption of the circuit design can be calculated according to the probability distribution of each partition of the circuit design (320).
US09268897B2 Method for increasing the robustness of a double patterning router used to manufacture integrated circuit devices
A process for manufacturing integrated circuit devices includes providing a set of original color rules defining an original color rule space and defining a design space. The improvement involves applying a perturbed color rule space to the router processing engine to expose double pattern routing odd cycle decomposition errors, and reconfiguring the router processing engine in accordance with the exposed decomposition errors.
US09268896B1 Method of forming a photomask
A method of forming a photomask comprises providing a predetermined fin array having a plurality of fin patterns to a computer readable medium in a computer system. First of all, a plurality of width markers is defined by using the computer system, with each of the width marker parallel to each other and comprising two fin patterns, wherein each of the width markers is spaced from each other by a space. Then, a number of the width markers is checked to be an even. Following this, a plurality of pre-mandrel patterns is defined corresponding to odd numbered ones of the spaces. Then, a plurality of mandrel patterns is defined by sizing up the pre-mandrel patterns. Finally, the mandrel patterns are outputted to form a photomask.
US09268895B2 Circuit design synthesis tool with export to a computer-aided design format
A method (and related apparatus) includes receiving user input and generating at least one of schematic content for a circuit based on the received user input and a printed circuit board (PCB) layout based on the circuit. The method further includes generating a bill of material (BOM) for the circuit, and receiving a user selection of at least one of a computer-aided design (CAD) tool format and a PCB layout tool format. The method also includes receiving a user selection to include footprints for the components used in the schematic content or PCB layout and exporting at least one of the schematic content, and PCB layout as well as the PCB footprints to one or more files in accordance with the selected CAD and/or PCB layout tool format.
US09268892B1 Identification of unknown sources for logic built-in self test in verification
A tool for determining unknown sources in a circuit design for exclusion from logic built-in self test (LBIST) verification for the circuit. The tool determines, by one or more computer processors, an initial nets list, wherein the initial nets list is a representation of a circuit design being tested. The tool initializes, by one or more computer processors, one or more nets contained in the initial nets list. The tool removes, by one or more computer processors, the one or more nets initialized in response to initialization of each of one or more latches in one or more test channels of the circuit design being tested. The tool determines, by one or more computer processors, whether a latch of the one or more latches is corrupted by an unknown source.
US09268888B1 Latency computation circuitry
An integrated circuit may include multiple circuit blocks, each with an associated latency value. As an example, transceiver circuitry in an integrated circuit may receive different data packets and circuit blocks in the transceiver circuitry may have different latency values depending on the data packets received. The integrated circuit may further include latency computation circuitry that receives the different latency values from the multiple circuit blocks. The latency computation circuitry may accordingly output a total latency value for the multiple circuit blocks in the integrated circuit based on the received latency values.
US09268887B2 System and method for determining fluid flow of compressible and non-compressible liquids
A system and method for determining fluid flow of compressible and non-compressible liquids includes an input receiving an object model defined as a plurality of cells having nodes, a processor and memory. The processor is configured for: discretizing a partial differential equation (PDE) corresponding to the received model; for each node P: (i) locating all neighboring cells that share the node P; establish a finite difference stencil at each cell center, and identify stencil intersection points with cell boundary edges; calculate an approximate solution of the PDE at the intersection points; (ii) approximating the PDE at the cell center of the neighboring cells using the stencil and discretized PDE; and (iii) updating a solution of the PDE at the node P by using the solution of approximated discretized PDE at all the neighboring cell centers; and iteratively updating the solution for all nodes P from an initial guess until a convergence criterion is satisfied.
US09268884B2 Production control method and device for checking the traversability of pipes
A device for checkivng steel pipes during production and to a method using the device. The device includes a station for acquiring measurement data representative of physical measurements of the geometry of a pipe taken on an outside thereof, and a computer system configured to store template data applicable in a coordinate system and representative of overall geometry of a sizing body. In a chosen coordinate system, the system then provides a three-dimensional representation of parts of the pipe. For each part of the pipe, the system is referenced to determine a critical parameter, representative of the margin of passage of the sizing body inside a chosen part of the pipe. The method and device may thus establish a diagnostic of traversability of the pipe by a sizing body.
US09268882B2 System and method for analyzing a powertrain configuration
A powertrain optimization device and method that compares a predicted performance of customer-selected vehicle components to a customer-selected optimization goal. The optimization goal is used to determine dynamic performance thresholds. The method compares gradability at cruise, gradability at peak torque, engine speed, and startability to the dynamic thresholds to determine whether the vehicle performance will be satisfactory. The customer selections of vehicle components, selections of optimization goals, and any acknowledgements of failed performance checks are stored for later use.
US09268872B2 Displaying web pages without downloading static files
A computing device is configured to receive a configuration file. The configuration filed includes at least one reference to a static file associated with a web page of a website. The static file is ranked as a most-downloaded static file, of a plurality of static files, by a provider of the configuration file and the website. The computing device is further configured to retrieve the static file based on the reference; store the static file in a memory local to the computing device; receive a request for the web page; identify the static file for the web page; and use the static file to display the web page in a browser associated with the computing device.
US09268867B2 Enhanced favorites service for web browsers and web applications
The invention provides enhancements for the use of favorites during a Web browsing session. A first enhancement identifies when a user is adding a favorite to his favorites list and auto-suggests a category under which the favorite could be stored. A second enhancement allows a user to review his favorites list and see a summary of feed content (RSS or other standard) on each feed enabled page on his favorites list, without requiring the user to link to the page in question. A third enhancement allows the user to view an manipulate the feed in an independent display window.
US09268863B2 Hierarchical in-memory sort engine
A local sorting module includes a set of storage elements storing binary vectors configured in a one-dimensional (1D) or two-dimensional (2D) array structure and separated by respective comparators configured to conditionally compare and sort the binary vectors. The comparators may perform a sort using a compare-and-flip or a compare-and-swap operation. Local sorting modules may be coupled with a global sorting module for enabling a tournament sort algorithm to output values stored in storage elements one at a time until all data is outputted in a predetermined sorting order.
US09268859B2 Method and system for customizing a web site
Method, apparatus, and programs for customizing a web site are provided. In one example, a method for customizing a web site is provided. One or more representations corresponding to one or more customizable components of a web site are provided. The one or more representations are to be displayed on a display screen to a user. An input entered by the user and directed to a specific customizable component of the web site is received. How to customize the specific customizable component of the web site is determined based on the input. An instruction is generated with respect to the customizable component. The instruction is used to implement customization of the specific customizable component of the web site in accordance with the input from the user.
US09268857B2 Suggesting search results to users before receiving any search query from the users
In one embodiment, in response to a user accessing a search tool and before the user submitting any search query or portion thereof to the search tool, compiling a first set of search results based on information known about the user and presenting the first set of search results to the user.
US09268848B2 Semantic navigation through object collections
Embodiments are directed to semantically navigating a data collection and to providing custom data mappings for a semantic group of data items. In one scenario, a computer system displays various data items of a data collection on a data presentation interface of a software application user interface. The user interface receives a first user input indicating that a semantic interface is to be displayed in the software application user interface, and displays the semantic interface which includes semantic headers that identify groups of data items. The user interface then receives a second user input that selects at least one of the semantic headers to display its corresponding group of data items and navigates the data presentation interface to the group of data items corresponding to the selected semantic header.
US09268845B1 Audio matching using time alignment, frequency alignment, and interest point overlap to filter false positives
Systems and methods audio matching using interest point overlap are disclosed herein. The systems include determining at least one matching reference segment based on a probe segment. Interest points for both the at least one matching reference segment and the probe segment can be generated. Probe segment interest points and matching reference segment interest points can be time aligned and frequency aligned. A count can be generated based on a number of overlapping interest points between each set of reference interest points and the set of probe segment interest points. The disclosed systems and methods allow false positive reference to be identified and eliminated based on the count. The benefits in eliminating false positive matches improve the accuracy of an audio matching system.
US09268835B2 Data replication framework
Systems and methods are directed to an eventually consistent replicated data store that uses, for its underlying storage, a computer software library that provides a high-performance embedded database for data. The replicated data store employs a plurality of hosts interconnected to one another, allowing for writes to any host and full awareness of membership across all hosts. With the data replication framework, various modes are allowed to be built up on top of the core system.
US09268834B2 Distributed SQL query processing using key-value storage system
Distributed storage systems support SQL while also providing scalability and fault tolerance by utilizing an SQL library (the SQL execution component) layered on top of a transactional key-value system (the storage component). The SQL library comprises a parser and an execution engine running at the client, while the storage component comprises a key-value system for storing the data. The SQL library parses SQL queries received from client applications and maps them to transactions on the key-value system. The key-value system stores data items identified by key and provides concurrency control mechanisms to handle concurrent transactions. The key-value system may be a distributed system with several storage servers, each attached to one or more storage devices.
US09268833B2 Recurring calendar item master and instance synchronization
A synchronization window for synchronizing data for a calendar in a client calendar data store on a calendar data client computer system with data for the calendar in a server calendar data store on a calendar data server computer system can be calculated using a current time. A request for synchronization data for calendar items for the calendar with calendar times that are within the synchronization window can be sent to the calendar data server. One or more responses to the request can be received from the calendar data server. The response(s) can include received records for calendar items that are at least partially within the synchronization window. The received records can include a master record of a recurring calendar item and an instance record of an occurrence of the recurring calendar item. The received records for the calendar items can be incorporated in the client calendar data store.
US09268832B1 Sorting a data set by using a limited amount of memory in a processing system
An efficient and highly scalable method of sorting an input file in a processing system by using only a limited amount (i.e., a portion) of memory in the processing system, where that amount of memory is substantially smaller than the input file, is disclosed. The input file can be, for example, a fingerprint database for use in deduplication, and the processing system can be, for example, a network storage server. The merge phase is broken down into sub-phases, where each sub-phase takes a predetermined number of subsets of a fingerprint file to merge and writes them back as a sorted, merged group. The number of threads used to process these groups can depend on the number of central processing units (CPUs) present in the system and can be dynamically tuned to achieve desired level of performance.
US09268831B2 System and method for extracting user selected data from a database
A system and method are provided for receiving extracted data from a transaction database. Extracted data is transformed into a predefined structure and used to populate a database. A set of measures are then provided for interrogating the database and these may be displayed to the user with dimensions which maybe applied to filter the data. Data presented to a user is relevant to his or her area of activity. The data is periodically refreshed and signals are presented in the data relating to issues requiring further investigation.
US09268830B2 Multiple media type synchronization between host computer and media device
Improved techniques for transferring media assets between a host computer and a media device are disclosed. The transfer of media assets between a host computer and a media device can be referred to as synchronization. According to one aspect of the invention, media assets being transferred can be formatted (e.g., rendered) in advance at the host computer and then delivered to the media device. According to another aspect of the invention, media assets can be grouped into collections and transferred on a collection basis. According to still another aspect of the invention, media assets to be transferred can be limited based on an amount of storage capacity available at the media device. According to yet another aspect of the invention, media assets of different media types can be transferred in accordance with different priorities.
US09268829B2 Leveraging collaborative cloud services to build and share apps
The present invention includes systems and methods for retrieving information via a flexible and consistent targeted search model that employs interactive multi-prefix, multi-tier and dynamic menu information retrieval techniques (including predictive text techniques to facilitate the generation of targeted ads) that provide context-specific functionality tailored to particular information channels, as well as to records within or across such channels, and other known state information. Users are presented with a consistent search interface among multiple tiers across and within a large domain of information sources, and need not learn different or special search syntax. A thin-client server-controlled architecture enables users of resource-constrained mobile communications devices to locate targeted information more quickly by entering fewer keystrokes and performing fewer query iterations and web page refreshes, which in turn reduces required network bandwidth. Applications are built by leveraging existing collaborative cloud services that enable the maintenance and sharing of user content.
US09268828B2 Computer-implemented systems and methods for extract, transform, and load user interface processing
Computer-implemented systems and methods are disclosed for specifying an Extract, Transform, Load (ETL) process. For example, systems and methods are provided for specifying the ETL process through ETL diagrams, and allowing ETL diagrams with different components to be easily traversed. Behaviors of underlying engine technology of the ETL process may be encapsulated so that users may build a job or data flow of the ETL process without knowing specific details of the underlying engine technology.
US09268824B1 Search entity transition matrix and applications of the transition matrix
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using search entity transition probabilities. In some implementations, data identifying entities and transition probabilities between entities is stored in a computer readable medium. Each transition probability represents a strength of a relationship between a pair of entities as they are related in search history data. In some implementations, an increase in popularity for a query is identified and a different query is identified as temporally related to the query. Scoring data for documents responsive to the different query is modified to favor newer documents. In other implementations, data identifying a first session as spam is received, and a spam score is calculated for either a second session of queries or a single query using transition probabilities. The second session (or single query) is identified as spam from the spam score.
US09268821B2 Device and method for term set expansion based on semantic similarity
A receiving unit (101) receives a seed string. A search unit (102) searches snippets of documents containing the seed string. A segment acquisition unit (103) obtains segments by partitioning the snippets using a segment partition string. A segment component acquisition unit (104) obtains segment components by partitioning the segments using a segment component partition string. A segment score computation unit (105) calculates a segment score for a segment based on the standard deviation of the lengths of the segment components. A segment component score computation unit (106) calculates a segment component score for a segment component based on the segment score and the distance between the position of the seed string and the position of the segment component. A selection unit (107) selects any of the segment components as candidates for instances contained in the expanded set of the seed string based on the segment component scores.
US09268820B2 Providing knowledge panels with search results
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing knowledge panels with search results. In one aspect, a method includes obtaining search results that are responsive to a received query. A factual entity referenced by the query is identified. Content is identified for display in a knowledge panel for the factual entity. The content includes at least one content item obtained from a first resource and at least one second content item obtained from a second resource different than the first resource. Data is provided that causes the identified search results and the knowledge panel to be presented on a search results page. The knowledge panel presents the identified content in a knowledge panel area that is along side at least a portion of the search results.
US09268818B1 Determining intent of a recommendation on a URL of a web page or advertisement
Methods and systems are provided for presenting a user with a recommendation intent query in response to the user indicating that he or she recommends content. The recommendation intent query allows a user to designate (e.g., select, indicate, identify, choose, etc.) one or more components, subjects, characteristics, properties, etc., of the content to which the user's recommendation should be attributed. Therefore, the user's intent with regard to the recommendation can be determined, and a more detailed social annotation about the recommendation can be provided to other users in a social network. The recommendation intent query is in the form of a user interface containing a list of components, subjects, and characteristics of the recommended content, one or more of which may be designated by the user as being the intended target(s) of his or her recommendation.
US09268817B2 Efficient evaluation of hierarchical cubes by non-blocking rollups and skipping levels
Techniques are described herein for efficiently evaluating database queries that include hierarchical cube computations. During second and subsequent evaluation phases (if any), a database server does not re-determine groups (nor re-aggregate within such groups) that have already been determined in a previous evaluation phase. Instead, according to a technique described herein, whenever an evaluation phase subsequent to the first evaluation phase is performed, the database server immediately outputs or otherwise returns certain groups and aggregate results that were determined based on certain grouping column sets that were generated in the previous evaluation phase. The database server does not aggregate within these certain groups when performing aggregation in the current evaluation phase, thereby avoiding the duplication of work already performed during previous evaluation phases.
US09268816B2 Apparatus and method for searching for PLC data log
Disclosed are an apparatus and a method for searching a PLC data log. The apparatus for searching for a PLC data log, includes: a data log module operating a linear characteristic for data search based on at least one data search parameter, calculating an index value or a time data value using the operated linear characteristic, and searching for data using at least one of the calculated index value or the calculated time data value; an interface unit receiving a search request signal and at least one parameter for data search and outputting the data searched from the data log module; and a memory unit storing the data and the parameter input or output through the interface unit.
US09268815B2 Map-reduce and parallel processing in databases
One embodiment is a method that uses MapReduce and Relation Valued Functions (RVFs) with parallel processing to search a database and obtain search results.
US09268814B2 Enablement of quasi time dependency in organizational hierarchies
Changes to a hierarchical organizational structure may be stored in different versions of a data structure depicting the hierarchical organizational structure. Each of these versions may include a validity period field representing a time period that the hierarchical organizational structure depicted in the version accurately reflects the organizational structure of the organization. Each of the versions may also be designated as active or inactive. In some instances, each of the versions may be designated as inactive except for a version that reflects the organizational structure of the organization at a particular time, which may change over time. Historical copies of versions may be stored and subsequently recalled to identify an organizational structure that was in effect at a particular time in the past. The recalled version may then be used to limit the results of a query to a selected node of the historical organizational structure.
US09268811B1 Replay of writes in replication log
A system and method for replaying writes in a replication log is provided. The replay of writes in the replication log can begin at some point after detecting an imminent overflow condition is detected. One method involves detecting the imminent overflow condition, performing a first synchronization for regions of the first volume based upon information in a first subset of the replication log, processing information in a second subset of the replication log while the first synchronization is ongoing, and performing a second synchronization for regions of the first volume based upon information in the second subset of the replication log, subsequent to the first synchronization and subsequent to processing the information in the second subset of the replication log.
US09268809B2 Method and system for document update
Method and system for document update are provided. Information related to document update in the database is obtained. A stochastic model is generated based on the obtained information. An update sequence is determined based on the stochastic model. The update sequence indicates at least one document that needs to be updated in a time slot. One or more documents are retrieved from the database based on the update sequence. The retrieved one or more documents are updated in the time slot.
US09268807B2 In-memory bitmap for column store operations
Disclosed herein are system, method, and computer program product embodiments for implementing a bitmap for a column store database. An embodiment operates by creating, by at least one processor, a bitmap identifying rows in a column store database. The bitmap may include a list of bit chunks, a bit chunk including an offset being a natural number indicating a chunk size, and a bit specification including one of an ordered row id list, a contiguous row id sequence, and a bit vector. In addition, the embodiment includes performing database operations using the bitmap.
US09268803B2 System and method for data cleansing
There is provided a method that includes (a) receiving an input postal address, (b) comparing the input postal address to a standard, (c) providing a single best postal address corresponding to the input postal address based on the comparing, (d) matching the single best postal address to a business in a business information database, (e) obtaining a business address for the business from the business information database, and (f) correcting the single best postal address, based on the business address, to yield a corrected postal address. There is also provided a system that performs the method, and a machine-readable medium having instructions stored thereon that cause the machine to perform the method.
US09268802B2 System and method for end-to-end exposure of exported representations of native data types to third-party applications
Systems and methods are disclosed herein for exporting a file to an application. A processor receives a request from a user for access to a file stored on a web-based storage system. The request includes a designation of an application to open the file, and the file is associated with a native format. The processor determines that the application is not configured to import the file in the native format and determines whether the file can be converted to an importable format that can be imported by the application. The processor converts the file from the native format to the importable format and exports the converted file in the importable format to the application, which opens the converted file.
US09268799B1 System and method for restoring data from a remote repository
A method includes receiving a request to restore a memory of a client and determining a selected full session from a plurality of full sessions, each full session comprising a respective copy of data received from the memory of the client and a respective backup time stamp. The selected full session includes a most recent full backup having a respective backup time stamp prior to a selected restore time. The method further includes copying the selected full session to a restore session and determining a selected incremental session from a plurality of incremental sessions. Each incremental session includes a respective incremental backup time stamp, and respective changes to the data received from the memory of the client. The method further includes modifying the restore session in a cloud computing environment based on the selected incremental session, and transmitting the modified restore session across a network to the client.
US09268791B2 Method and apparatus for image processing and computer readable medium
According to one exemplary embodiment, a method for image processing selects at least one image from a plurality of images, and stores the plurality of images into a buffer, until a storage space of the buffer reaches a criterion. When the storage space of the buffer reaches the criterion, a procedure of image processing is performed for a plurality of temporary images stored in the buffer, which includes constructing an image dictionary according to the at least an image selected, and performing an image recovery and reconstruction procedure for the plurality of temporary images in the buffer according to the image dictionary, thereby obtaining a plurality of reconstructed images.
US09268787B2 Methods and devices for synchronizing and sharing media items
An electronic device with one or more processors and memory detects a user input to play a media item, where the media item is associated with at least a portion of an audio track and one or more media files. The device requests the media item from a server in response to the user input and, in response to the request, receives, from the server, the one or more media files and information identifying at least the portion of the audio track. The device obtains at least the portion of the audio track based on the information identifying at least the portion of the audio track. The device also displays the one or more media files and, while displaying the one or more media files, plays back at least the portion of the audio track in synchronization with the one or more media files.
US09268785B2 Preserving redundancy in data deduplication systems by designation of virtual address
Various embodiments for preserving data redundancy of identical data in a data deduplication system in a computing environment are provided. In one embodiment, a method for such preservation is disclosed. A selected range of virtual addresses of a virtual storage device in the computing environment is designated as not subject to a deduplication operation. Other system and computer program product embodiments are disclosed and provide related advantages.
US09268783B1 Preferential selection of candidates for delta compression
A computer-implemented method and system for improving efficiency in a delta compression process in a data storage system selects a data chunk to delta compress and selects a set of candidate data chunks using a first selection mechanism. Throughput or resource utilization is monitored. A change is made to a second selection mechanism that increases similarity of the set of candidates with the selected data chunk to improve compression in response to determining high resource availability or high throughput level. A change is made to a third selection mechanism that increases throughput of the delta compression process in response to determining low resources availability or low throughput.
US09268780B2 Content-driven information lifecycle management
A method, article of manufacture, and apparatus for managing a lifecycle of an object are disclosed. In an embodiment, this comprises analyzing the content of the object and associating the object to an information lifecycle management policy based on the content analysis and metadata. Metadata may be generated based on the content analysis, and used in setting the information lifecycle management policy. A date of disposition may be associated with the object, and actions in the ILM policy taken on the date of disposition.
US09268779B2 Methods, computer program products, and apparatuses for dispersing content items
An apparatus for dispersing content may include a processor. The processor may be configured to receive a request associated with a content item and generate a hashed identifier based at least in part on the request associated with the content item. The processor may further be configured to generate a respective container within a hierarchy of one or more containers based at least in part on the hashed identifier and store the content item in one of the one or more containers based at least in part on the hashed identifier. Associated methods and computer program products may also be provided.
US09268776B2 Methods and apparatus for data collection
Systems and techniques for directing data collection. Upon an initial data collection, the uncertainty of all or of a portion or portions of the collected data is evaluated. The collected data may be associated with a region, with portions of the collected data associated with subregions. Further data collection, including changes to or refinement of collection techniques, is undertaken based on evaluations of the uncertainty. Further data collection may be undertaken only for portions of the data for which uncertainty exceeds a threshold. Uncertainty evaluation may be performed at least in part using a model. The model may be an initial hypothesis model, and the model may be optimized as further data is collected, and the optimized model may be used to guide further data collection techniques, with iterations of data collection and model optimization being carried out concurrently.
US09268762B2 Techniques for generating outgoing messages based on language, internationalization, and localization preferences of the recipient
According to various embodiments of the disclosure techniques for generating outgoing messages are disclosed. The technique includes receiving a request to generate an outgoing message for a recipient and retrieving one or more recipient preferences of the recipient from a recipient preferences database. The one or more recipient preferences relate to customization of messages that are to be delivered to the recipient. The technique further includes retrieving a message template from a plurality of message templates stored in a message template database based on the request and the one or more recipient preferences. The technique also includes generating the outgoing message based on the retrieved message template and the one or more recipient preferences, and providing the outgoing message to the recipient.
US09268759B2 Recommendation engine for interactive search forms
Systems, methods, and computer program products for interacting with an interactive form. A plurality of values for a plurality of controls of an interactive form are received at a server. The server determines a plurality of recommendation rules based upon the values for interrelated controls. Each value comprises a portion of a travel-related search query entered into one control of the interactive form by each of a plurality of users. Each recommendation rule logically connects two or more of the interrelated controls.
US09268752B2 Personalized website presentation
Systems and methods of dynamically presenting a website. The system includes a storage medium and a server. The storage medium includes data adapted for presentation on a first website. The server includes computer executable instructions configured to receive initial preference data and build a preference profile based on the initial preference data. The server also includes computer executable instructions configured to retrieve select first data from the storage medium based on the preference profile, structure a presentation of the first website based on the select first data; and provide targeted queries or prompts based on the first data.
US09268748B2 System, method, and computer program product for outputting markup language documents
A system, method, and computer program product are provided for use in connection with at least one computer-readable Extensible Markup Language (XML)-compliant data document capable of including: a plurality of line items with a plurality of data values, and a plurality of computer-readable semantic tags that describe a semantic meaning of the data values.
US09268745B2 Method for fast wavelet transform of a signal
Method for determining at least one wavelet coefficient Ws(τ) of a wavelet transform of a signal in which the mother wavelet of the transform has a support subdivided into J≧1 intervals bound by (J+1) extremity points, and is defined by a polynomial of a maximum level N≧1 on each interval. The method includes calculating all or some of the primitives of the signal of order k between 2 and N+1, at least at (J+1) points corresponding to extremity points of the intervals of the wavelet support dilated by a factor of s and translated by a time τ; calculating the convolution of said or each primitive sampled in this way with a respective succession of (J+1) coefficients Cik(s), dependent upon said wavelet; and determining the wavelet coefficient by calculating a linear combination of convolutions. Steps a) to c) are implemented by a processor configured or programmed in an appropriate manner.
US09268738B2 Three-dimensional permute unit for a single-instruction multiple-data processor
A three-dimensional (3D) permute unit for a single-instruction-multiple-data stacked processor includes a first vector permute subunit and a second vector permute subunit. The first and second vector permute subunits are arranged in different layers of a 3D chip package. The vector permute subunits are each configured to process a portion of at least two input vectors. A first contact sub-field of the first vector permute subunit is configured to connect output ports of a first crossbar of the first vector permute subunit, holding an intermediate result of the first vector permute subunit, to a second contact sub-field of the second vector permute subunit. A first contact sub-field of the second vector permute subunit is configured to connect output ports of a first crossbar of the second vector permute subunit, holding an intermediate result of the second vector permute subunit, to a second contact sub-field of the first vector permute subunit.
US09268737B2 Managing virtual computing services
Computer-implemented systems and methods for managing virtual computing services. A service interface may receive from an administrative user an instruction indicating a configuration change for a first virtual computing service. A plurality of agents comprises a leader agent and at least one other agent. The leader agent may assign to the at least one other agent a plurality of jobs for implementing the configuration change. The at least one other agent may execute at least one of the plurality of jobs, where executing the at least one of the plurality of jobs comprises modifying a configuration of a virtual desktop site associated with the first virtual computing service.
US09268736B2 Systems and methods for generating and managing cookie signatures for prevention of HTTP denial of service in a multi-core system
The present application is directed towards systems and methods for generating and maintaining cookie consistency for security protection across a plurality of cores in a multi-core system. A packet processing engine executing on one core designated as a primary packet processing engine generates and maintains a global random seed. The global random seed may be used as an initial seed for creation of cookie signatures by each of a plurality of packet processing engines executing on a plurality of cores of the multi-core system using a deterministic pseudo-random number generation function such that each core creates an identical set of cookie signatures.
US09268734B1 Selecting content-enhancement applications
Techniques for enhancing content being rendered on an electronic device are described herein. In some instances, the techniques include monitoring interactions between a user and a content item that the user consumes on an electronic device. The content items may include electronic books, songs, videos, documents, or the like. In response to detecting an interaction between the user and the content item, the techniques may publish an event indicative of the interaction to an application platform that hosts one or more applications. The applications may be designed to enhance the content that the user consumes in one or more specified ways.
US09268731B2 Controlling devices via advance notice signaling
Generally this disclosure describes methods and systems for controlling device operation in a processing system. A method may include receiving information comprising at least one packet, identifying the information as associated with a device based on a header in the at least one packet and transmitting a signal to the device, the signal being configured to provide advance notice to the device that the information is being scheduled for transmission to the device. Another method may include receiving a signal configured to provide advance notice of information that will be received, transitioning from a first operational state to a second operational state and receiving the information.
US09268730B2 Computing rack-based virtual backplane for field replaceable units
A system for the management of rack-mounted field replaceable units (FRUs) that affords the enhanced availability and serviceability of FRUs provided by blade-based systems but in a manner that accommodates different types of FRUs (e.g., in relation to form factors, functionality, power and cooling requirements, and/or the like) installed within a rack or cabinet.
US09268726B2 Information processing apparatus, control method thereof, and storage medium
An information processing apparatus able to normally unmount a memory and disconnect communication with a first external apparatus when receiving a processing request from a second external apparatus in a state that the first external apparatus mounts the memory connected to the apparatus. A multi-function peripheral as the processing apparatus (20) includes a controller OS. When receiving a processing request from a second host PC (10B) as the second external apparatus in a state where the multi-function peripheral is in communication with a first host PC (10A) as the first external apparatus (S3100), the controller OS requests the first host PC to unmount the memory (S3201), if the memory is mounted thereon. When receiving an unmount instruction from the first host PC (S3004), the controller OS unmounts the memory, disconnects the connection with the first host PC (S3005), and starts communication with the second host PC (S3101).
US09268725B2 Data transferring apparatus and data transferring method
A data transferring apparatus includes a receiving unit configured to receive a transfer request containing attribute information that indicates a type of data transfer, a buffer configured to store the transfer requests received by the receiving unit, a storing unit configured to associate the attribute information with a first identifier and store the attribute information, and a sending unit configured to preferentially transmit, out of the plurality of transfer requests stored in the buffer, a transfer request containing attribute information that corresponds to the attribute information stored in the storing unit, wherein the sending unit is configured to transmit the first identifier associated with the attribute information that corresponds to the attribute information contained in the transfer request in place of the attribute information of the transfer request.
US09268724B2 Configuration of data strobes
Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data. Other embodiments may be disclosed.
US09268723B2 Dram compression scheme to reduce power consumption in motion compensation and display refresh
Systems and methods of operating a memory controller may provide for receiving a write request from a motion compensation module, wherein the write request includes video data. A compression of the video data may be conducted to obtain compressed data, wherein the compression of the video data is transparent to the motion compensation module. In addition, the compressed data can be stored to one or more memory chips. Moreover, a read request may be received, wherein stored data is retrieved from at least one of the one or more memory chips in response to the request. Additionally, a decompression of the stored data may be conducted to obtain decompressed data.
US09268718B2 Signal collection system with frequency reduction unit and signal collection method
An exemplary signal collection system includes a signal transmitting module and a computer. The signal transmitting module outputs a high-speed signal with a high frequency. The signal collection system further includes a data collection module interconnecting the signal transmitting module and the computer. The data collection module includes a frequency reduction unit. The frequency reduction unit reduces the frequency of the high-speed signal output from the signal transmitting module and outputs the high-speed signal with a reduced frequency to the computer. A signal collection method based upon the signal collection system is also disclosed.
US09268717B2 Sharing single root IO virtualization peripheral component interconnect express devices
Systems and methods for sharing a single root I/O virtualization (SR-IOV) device (106) amongst a plurality of roots (104) are described herein. The described systems implement a method which includes identifying a physical function (PF) and a plurality of virtual functions (VFs) associated with the SR-IOV device (106). The method also include generating at least one set of VFs from amongst the plurality of identified VFs, where each set of VFs include one or more VFs, and generating a pseudo PF (PPF) for each of the at least one set of VFs, where each PPF and a set of VFs associated with the PPF forms a projected SR-IOV device (106). The method further includes associating each of the projected SR-IOV device (106) with a root (104) from amongst the plurality of roots (104) to allow sharing of the SR-IOV device (106).
US09268716B2 Writing data from hadoop to off grid storage
In one embodiment, data generated via a map process and/or reduce process may be obtained. A request message may be sent to a server, where the request message indicates a request for a location in storage at which the data is to be stored. Upon receiving the location from the server, the data may be copied to the location in the storage. A commit message may be sent to the server, where the commit message indicates that the data has been copied to the location. In addition, the data may be deleted.
US09268704B2 Low latency data exchange
According to one embodiment, a method for exchanging data in a system that includes a main processor in communication with an active memory device is provided. The method includes a processing element in the active memory device receiving an instruction from the main processor and receiving a store request from a thread running on the main processor, the store request specifying a memory address associated with the processing element. The method also includes storing a value provided in the store request in a queue in the processing element and the processing element performing the instruction using the value from the queue.
US09268702B2 Storage I/O path partitioning to eliminate I/O interference in consolidated servers
A method for storage input/output (I/O) path configuration in a system that includes at least one storage device in network communication with at least one computer processor; the method comprising providing in the I/O path into at least: (a) a block-based kernel-level filesystem, (b) an I/O cache module controlling an I/O cache implemented on a first computer readable medium, (c) a journaling module, and (d) a storage cache module controlling a storage cache implemented on a second computer readable medium, the second computer readable medium having a lower read/write speed than the first computer readable medium. Furthermore, the steps of translating by the filesystem, based on computer executable instructions executed by the at least one processor, a file I/O request made by an application executed by the at least one computer processor into a block I/O request and fulfilling by the at least one processor the block I/O request from one of the I/O cache and the storage cache complete the I/O operation.
US09268698B1 Method and system for maintaining context event logs without locking in virtual machine
System for working with shared memory includes a plurality of contexts, each having executable processes writing and reading data; a ring buffer in the shared memory for writing and reading data by the contexts; a software primitive manages access attempts by the contexts to the ring buffer. Each context, upon writing to the ring buffer, is allocated an amount of space up to a maximum available at that moment. The software primitive guarantees consistency of the data written to the ring buffer. The software primitive permits simultaneous writing into the buffer by multiple contexts. After finishing writing to the buffer, the context updates a state of the buffer by decrementing the count of the active writers and/or by shifting the permitting pointers for communicating with writers and readers. A context can read from the buffer only data is marked as valid for reading by the context that wrote that data.
US09268697B2 Snoop filter having centralized translation circuitry and shadow tag array
A processor is described that includes a plurality of processing cores. The processor includes an interconnection network coupled to each of said processing cores. The processor includes snoop filter logic circuitry coupled to the interconnection network and associated with coherence plane logic circuitry of the processor. The snoop filter logic circuitry contains circuitry to hold information that identifies not only which of the processing cores are caching specific cache lines that are cached by the processing cores, but also, where in respective caches of the processing cores the cache lines are cached.
US09268696B1 System and method for improving cache performance
A method, computer program product, and computing system for receiving a read request on a first cache system, wherein the read request identifies previously-written content included within a data array. The previously-written content identified in the read request is obtained from the data array. A read request content identifier is generated for the previously-written content identified in the read request. The read request content identifier associated with the previously-written content identified in the read request is compared to a plurality of content identifiers included within a content directory for the first cache system to determine if a matching content identifier exists. Each of the plurality of content identifiers is associated with a piece of previously-written content included within the first cache system.
US09268695B2 Methods and structure for using region locks to divert I/O requests in a storage controller having multiple processing stacks
Methods and structure within a storage controller for using region locks to efficiently divert an I/O request received from an attached host system to one of multiple processing stacks in the controller. A region lock module within the controller allows each processing stack to request a region lock for a range of block addresses of the storage devices. A divert-type lock request may be established to identify a range of block addresses for which I/O requests should be diverted to a particular one of the multiple processing stacks.
US09268689B1 Securing virtual machines with optimized anti-virus scan
The present disclosure provides for performing virus scans at a storage device that stores one or more virtual machine disk image files (VMDK files). A secure AV module can coordinate communication between a file system on the storage device, a file system (FS) decoder, and an anti-virus engine to perform a virus scan of files contained within a VMDK file. A secure AV module can determine a subset of files that include changed data, where the subset of files is stored in a file system volume within a VMDK file. The secure AV module can use an FS decoder to translate file addresses relative to the file system volume into file addresses relative to the network storage file system. A secure AV module can provide the network storage file system addresses of the subset of files to the anti-virus engine, which can perform a virus scan on the files.
US09268687B2 Data writing method, memory control circuit unit and memory storage apparatus
A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units, and a memory control circuit unit and the memory storage apparatus are provided. The method includes: grouping the physical erasing units into at least a data area and a spare area; configuring a plurality of logical units for mapping to the physical erasing units of the data area; and dynamically reserving a predetermined number of physical erasing units dedicating to write sequential data. Accordingly, the method can fast write the sequential data with the page-based memory management.
US09268685B2 Memory system and constructing method of virtual block
According to one embodiment, a virtual block is constructed according to configuration conditions that, when a plurality of physical blocks included in the virtual block are selected, the sum of the number of physical block pairs and the number of single blocks allocated from the same memory chip to one virtual block is less than or equal to a first value.
US09268684B2 Populating localized fast bulk storage in a multi-node computer system
A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.
US09268679B2 Using an alias volume name for a volume to allocate space to a data set
Provided are a computer program product, system, and method for using an alias volume name for a volume to allocate space to a data set. An assignment of a plurality of volumes to a data set is maintained, wherein the volumes are configured in a storage system. A request is received to extend the data set. An alias volume name is assigned to the data set for a previously assigned volume to the data to extend the data set in response to one of the previously assigned volumes having available space to extend the data set. A base volume name is assigned to the data set for a volume not assigned to the data set in response to one of the previously assigned volumes to the data set not having available space to extend the data set.
US09268678B2 Memory defragmentation in a hosted hypervisor
Machine memory fragmentation in a computer system having a host operating system and virtual machine running on a hypervisor hosted by the host operating system is reduced by having the hypervisor identify and release those machine memory pages that are more likely than others to reduce the fragmented state of the host machine memory.
US09268676B2 Data storage mechanism using storage system determined write locations
Mechanisms are provided, in a storage system controller of a storage system, for writing data to a storage medium. The storage system controller receives a write request to write a block of data to the storage medium. The write request does not specify a location on the storage medium to which to write the block of data. The storage system controller determines a current position of a write mechanism of the storage system relative to the storage medium and determines a location on the storage medium to write the block of data based on the current position of the write mechanism. The storage system controller sends a notification to a host system identifying the location of the block of data on the storage medium as determined by the storage system controller. The writing mechanism writes the block of data to the determined location on the storage medium.
US09268670B1 System for module selection in software application testing including generating a test executable based on an availability of root access
Systems and methods are described for generating a test executable used for testing an application locally on a host device. A user interface allows selection of particular test modules for use. Based on the selected modules a test executable is generated. The test executable functionality may integrated with the application or be independent of the application. The host device executes the test executable which enables testing and debugging on the local device.
US09268668B1 System for testing markup language applications
A system is described for remotely testing markup language and script language based applications executing on a computing device. A development device such as a desktop computer executes one or more development tool modules. A communication module and an unpack module are deployed to a computing device which executes the application under test. These modules serve to connect the development tool module executing on the development device to an embedded test tool executing on the computing device. Using this connection, the development tool module is able to interactively test and interact with the application executing on the computing device.
US09268665B2 System and method for identifying fault prone computer code files
Metrics associated with computer code files within a codebase may be analyzed to identify bug-prone files. Functions of the method or system may determine metrics corresponding to each file of a plurality of codebase files within an application codebase. The functions may also store the metrics corresponding to each codebase file in a record of a database table, rank order the plurality of codebase files according to at least one metric, and flag each codebase file having a ranking over a threshold value of the metric. The codebase file metrics may describe fault-inducing characteristics of the plurality of codebase files and include both a total number of previous faults and a total number of changes that are associated with each codebase file.
US09268664B2 Method and system for synchronous and asynchronous monitoring
A system and method for synchronous and asynchronous monitoring of network resources is provided. In an example system, an asynchronous monitoring engine is in communication with the network resources and receives asynchronous data from a portion of the network resources. The asynchronous data is collected at an application layer or at an end-user application layer. A synchronous monitoring engine is also in communication with the network resources and accesses synchronous data in the application layer in response to receiving a request from the asynchronous monitoring engine. The system further identifies an anomaly corresponding to the asynchronous characteristic and the synchronous characteristic.
US09268660B2 Matrix and compression-based error detection
Embodiments relate to matrix and compression-based error detection. An aspect includes summing, by each of a first plurality of summing modules of a first compressor, a respective row of a matrix, the matrix comprising a plurality of rows and a plurality of columns of output bits of a circuit under test wherein each output bit of the circuit under test comprises an element of the matrix, and is a member of a row of a column that is orthogonal to the row. Another aspect includes summing, by each of a second plurality of summing modules of a second compressor, a respective column of output bits of the matrix. Yet another aspect includes determining a presence of an error in the circuit under test based at least one of an output of the first compressor and an output of the second compressor.
US09268657B1 Varying data redundancy in storage systems
A disk drive is disclosed that varies its data redundancy policy for caching data in non-volatile solid-state memory as the memory degrades. As the non-volatile memory degrades, the redundancy of data stored in the non-volatile memory can be increased to counteract the effects of such degradation. Redundant data can be used to recover data stored in the non-volatile memory in case of a data corruption. Performance improvements and reduced costs of disk drives can thereby be attained.
US09268655B2 Interface for resolving synchronization conflicts of application states
Technology is disclosed herein for resolving synchronization conflicts when synchronizing application state data between computing devices. According to at least one embodiment, a server detects a first set of application state data at a first computing device conflicting with a second set of application state data at a second computing device. The first and second sets of application state data represent application states of the same computer application running at the first and second computing devices, respectively. Accordingly, the first computing device presents a user interface prompting a user to choose a preferred set of application state data between the first and second sets of application state data. If the user chooses the second set of application state data as the preferred set, the first computing device uses the second set of application state data to overwrite the first set of application state data at the device.
US09268639B2 Storing data in a distributed storage network
A method begins by a dispersed storage (DS) processing module mapping a set of data partitions to a set of storage regions. For each data partition, the method continues with the DS processing module segmenting the data partition into a plurality of data segments and designating a first data segment. The method continues with the DS processing module generating data storage mapping information. The method continues with the DS processing module encoding the data storage mapping information to produce at least one set of encoded mapping information slices and for each data partition, encoding the plurality of data segments to produce a plurality of sets of encoded data slices. The method continues with the DS processing module outputting the at least one set of encoded mapping information slices and, for each data partition, the plurality of sets of encoded data slices to the DSN for storage therein.
US09268634B2 Decoding method, memory storage device and memory controlling circuit unit
A decoding method, a memory storage device and a memory controlling circuit unit are provided. The method includes: reading memory cells according to a first reading voltage to obtain first verifying bits; executing a decoding procedure including a probability decoding algorithm according to the first verifying bits to obtain first decoded bits, and determining whether a decoding is successful by using the decoded bits; if the decoding is failed, reading the memory cells according to a second reading voltage to obtain second verifying bits, and executing the decoding procedure according to the second verifying bits to obtain second decoded bits. The second reading voltage is different from the first reading voltage, and the number of the second reading voltage is equal to the number of the first reading voltage. Accordingly, the ability for correcting errors is improved.
US09268629B2 Dual mapping between program states and data patterns
The present disclosure includes methods and apparatuses for dual mapping between program states and data patterns. One apparatus includes a memory and a controller configured to control a dual mapping method comprising: performing a base conversion on a received data pattern and mapping a resulting base converted data pattern to one of a first number of program state combinations corresponding to a first group of memory cells; and determining a number of error data units corresponding to the base converted data pattern and mapping the number of error data units to one of a number of second program state combinations corresponding to a second group of memory cells. The number of error data units are mapped to the one of the second number of program state combinations corresponding to the second group of memory cells without being base converted.
US09268625B1 System and method for storage management
A method, computer program product, and computing system for receiving, on a first storage processor, a configuration IO request concerning a data array coupled to the first storage processor. The configuration IO request is provided to the data array for execution. A failure indication that the configuration IO request failed to execute is received. In response to receiving the failure indication, a status indicator is determined for a second storage processor coupled to the data array. Whether to reset the first storage processor is determined based, at least in part, upon the status indicator of the second storage processor.
US09268621B2 Reducing latency in multicast traffic reception
A computing device identifies a data packet received at a computing device. The computing device allocates memory having a fixed size to store the network data packet. A latency reducer identifies a free space in the memory allocation, the free space comprising a difference between the fixed size of the memory allocation and a size of the network data packet. The latency reducer creates a socket buffer list for the network data packet in the free space, the socket buffer list comprising a plurality of entries to serve as socket queue objects for a plurality of applications.
US09268619B2 System for communicating between a plurality of remote analytical instruments
A method for allowing communication between a remote analytical instrument and a client component is provided. The method includes communicating a first software message in a first message format from a client component to a first connectivity driver, translating the first software message from the first message format to the second message format using the first connectivity driver, and communicating the software messages in the second message format directly to the first remote analytical instrument from the first connectivity driver. The first software message relates to the operation of a first remote analytical instrument. The first software message is selected from a standardized command set. The first remote analytical instrument is configured to receive messages in a second message format different than the first message format which are capable of inducing operation of the first remote analytical instrument.
US09268617B1 Bus-based dynamic evaluation with dynamic data lookups
Provided are methods of providing dynamic messages on a software bus. Such methods may include generating a dynamic message that corresponds to a service request from an application that is connected to a software bus. The dynamic message includes an executable portion that is executed to perform an action. The dynamic message is submitted to the bus for execution at a time after submission.
US09268615B2 Distributed computing using communities
Distributed computing using communities is described. In an embodiment computations in a distributed computing system are driven and controlled by a document storing a distributed computing graph, a graph layout view of that graph and visualization elements. For example, the document is replicated and synchronized at each of a plurality of entities in the distributed computing system. In examples a community may be drawn as a rectangle or other shape in the graph layout view and represents one or more computing resources in the distributed computing system. For example by placing graphical elements representing currently executing processes into the community on the graph layout view a user is able to ensure that those processes execute using the computing resources of the community. In examples communities may be nested and may have parameters specifying conditions which are to be met by the computing resources they represent.
US09268614B2 Configuring a parallel computer based on an interleave rate of an application containing serial and parallel segments
Methods, systems, and products are disclosed for configuring an application for execution on a parallel computer that include: booting up a first subset of a plurality of nodes in a serial processing mode; booting up a second subset of the plurality of nodes in a parallel processing mode; profiling, prior to application deployment on the parallel computer, the application to identify the serial segments and the parallel segments of the application; and deploying the application for execution on the parallel computer in dependence upon the profile of the application and proximity within the data communications network of the nodes in the first subset relative to the nodes in the second subset.
US09268610B2 Rapid virtual machine cloning
A management server clones a source virtual machine to a plurality of target host computers. For each target host, the management server creates linked clones of the source virtual machine in a target data store that is accessible to the target host. The management server starts execution of the linked clones in the target hosts. While the linked clones execute, for each target host, the management server creates full clones of the source virtual machine in the target data store and, after creating the full clones, suspends execution in the linked clones and resumes execution in the full clones.
US09268609B2 Application thread to cache assignment
Techniques are described for assigning an application thread to a cache. A newly created application thread may be assigned to a plurality of caches. The cache assignment that optimizes performance may be determined. The newly created application thread may be associated with the determined cache.
US09268607B2 System and method of providing a self-optimizing reservation in space of compute resources
A system and method of dynamically controlling a reservation of compute resources within a compute environment is disclosed. The method aspect of the invention comprises receiving a request from a requestor for a reservation of resources within the compute environment, reserving a first group of resources, evaluating resources within the compute environment to determine if a more efficient use of the compute environment is available and if a more efficient use of the compute environment is available, then canceling the reservation for the first group of resources and reserving a second group of resources of the compute environment according to the evaluation.
US09268606B2 Resource management system for automation installations
A method for managing resources of a processor device configured to control an automation installation includes using at least one first operating system and at least one second operating system, which preferably differs from the first operating system, to operate the processor device. The processor device includes at least two processor cores configured to operate the operating systems. The method further includes using at least one processor core to operate each operating system and freely selecting a number of processor cores used to operate the first operating system and a number of processor cores used to operate the second operating system.
US09268603B2 Virtual machine management device, and virtual machine move control method
A virtual machine management device includes an acquiring unit, a specifying unit, and a move processing unit. The acquiring unit acquires an amount of communication data that is exchanged between multiple virtual machines running in multiple server devices and that is used for communication with each other. The specifying unit specifies, on the basis of the communication distance between each of the server devices, a server device that has a shorter communication distance from a server device, which executes one of a pair of the virtual machines whose amount of the communication data is equal to or greater than a predetermined amount, than a communication distance between the server devices in which the pair of the virtual machines are running. The move processing unit moves the other one of the pair of the virtual machines to the specified server device.
US09268602B2 Systems and methods for performing data management operations using snapshots
A system stores a snapshot and an associated data structure or index to storage media to create a secondary copy of a volume of data. In some cases, the associated index includes application specific data about a file system or other application that created the data to identify the location of the data. The associated index may include three entries, and may be used to facilitate the recovery of data via the snapshot. The snapshot may be used by ancillary applications to perform various functions, such as content indexing, data classification, deduplication, e-discovery, and other functions.
US09268587B2 Determining destination cloud system requirements
Technologies and implementations for testing cloud systems to determine destination cloud system requirements are generally disclosed.
US09268586B2 Wake-on-LAN and instantiate-on-LAN in a cloud computing system
Several different embodiments of a flexible virtual machine management system are described. The virtual machine management system is used to instantiate, wake, move, sleep, and destroy individual operating environments in a cloud or cluster. In various embodiments, the virtual machine management system uses single messages to perform complex operations, allowing for flexible and scalable use of virtual resources in a cluster while still reducing energy consumption to the minimum possible level. In one preferred embodiment, Wake-on-LAN packets are used as the messages.
US09268583B2 Migration of virtual machines with shared memory
A system and method of migration of a VM sharing a memory region with another VM includes identifying, by an identification module, a plurality of VMs running on a source host machine, where the plurality of VMs includes first and second VMs that share a first shared memory region coupled to the source host machine; identifying, by a target module, a host machine as a target for the second VM; allocating, by an allocation module, a second shared memory region coupled to the target host machine for the second VM; stopping, by a migration module, execution of the second VM on the source host machine; and migrating, by the migration module, the second VM to the target host machine.
US09268581B2 Internationalization of objects executable in a supervisory process control and manufacturing information system
An application object for a supervisory process control and manufacturing information system application distributable to a plurality of networked computer devices and having a layered architecture, the application object comprising a set of text entries listed in a first language, a dictionary within each object drafted to enable the set of text entries to be translated into a plurality of multiple languages, and a set of one or more translation fields for storing text in each of the plurality of languages corresponding to the set of text entries listed in the first language.
US09268567B2 Instruction and logic for boyer-moore search of text strings
Instructions and logic provide extended vector suffix comparisons for Boyer-Moore searches. Some embodiments, responsive to an instruction specifying: a pattern source operand and a target source operand, compare each of m data elements of the pattern operand with each data element of the target operand. A first and second equal ordered aggregation operation are performed from the comparisons according to the m data elements of the pattern source operand. A result of the first and second aggregation operations indicating whether or not a possible match exists between the m data elements of the pattern source operand and d data element positions relative to data elements of the target source operand is stored. Ordering of the data elements of the pattern and the target operands may be reversed for the second aggregation operation, and d may be a sum of m−1 and the quantity of target operand elements in some embodiments.