最新美国发明专利第2015-11-17期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09190857B1	Solar charger for a portable electronic device A charging device for charging a portable electronic device having a charging port has at least one solar cell array having a top side adapted for converting light energy into an electrical energy. The solar cell array is sized similarly to a paper currency and has a bisector fold line between a first side and a second side along which the solar cell array can be folded and stored within a wallet without damage. A voltage regulator converts the electrical energy from the solar cell array into a DC power within a preset voltage range and providing the DC power on an output connector plug. At least one auxiliary plug adapter can be further included, each having a socket adapted for an electrical connection with the output connector plug of the voltage regulator and a unique charging plug for electrically connecting with the portable electronic device.
US09190856B2	Systems and methods for charging multiple vehicle rechargeable energy storage systems Systems and methods for charging multiple rechargeable energy storage systems (“RESSs”) included in one or more vehicles using a single charging system are presented. In some embodiments, a method for charging one or more RESSs may include receiving an indication that one or more charging ports of a plurality of charging ports included in a charging system have RESSs coupled thereto. Based on the indication, a charging map may be generated. One or more charging parameters may be determined based on the generated charging map. Based on the charging parameters, a switching mechanism included in the charging system may be selectively actuated to provide electrical power from a charging power source to charging ports coupled to RESSs.
US09190852B2	Systems and methods for stabilizing power rate of change within generator based applications Systems and methods for monitoring an electrical energy storage unit and a parameter related to the load and based on the monitoring, if the load parameter is greater than a second rate of change of electrical power for a second component of an electrical power system, providing power from the electrical energy storage unit to the second component until the load parameter and the second component have equivalent rates of change of electrical power.
US09190849B2	Apparatus and method for performing wireless charging A wireless charging method includes searching one or more rechargeable electronic devices, receiving power service information from one or more searched electronic devices, determining whether the one or more searched electronic devices are rechargeable based on the received power service information, and if the one or more searched electronic devices are rechargeable, receiving power from the electronic devices.
US09190846B2	Power quality management system and methods of controlling phase unbalance A power quality management system includes a plurality of phase balancers, each phase balancer including single phase converters coupled between two phase lines and a plurality of controllers to control the plurality of phase balancers. Each controller includes a voltage unbalance detection module to detect amount of voltage unbalance in a plurality of phase lines and a voltage unbalance compensation module to generate reference current commands for each of the single phase converters to reduce the voltage unbalance.
US09190840B2	Electrostatic discharge protection circuit An electrostatic discharge (ESD) protection circuit, suitable for an input stage circuit including a first N channel metal oxide semiconductor (NMOS) transistor, is provided. The ESD protection circuit includes an P channel metal oxide semiconductor (PMOS) transistor and an impedance device, in which the PMOS transistor has a source coupled to a gate of the first NMOS transistor, and a drain coupled to a source of the first NMOS transistor, and the impedance device is coupled between a gate of the PMOS transistor and a first power rail to perform a initial-on ESD protection circuit. The ESD protection circuit formed by the PMOS transistor and the resistor is capable of increasing the turn-on speed of the ESD protection circuit and preventing the input stage circuit from a CDM ESD event.
US09190835B2	Power factor correction (PFC) power conversion apparatus and power conversion method thereof A power factor correction (PFC) power conversion apparatus and a power conversion method thereof are provided. In the invention, by switching a detection switch disposed inside a control chip and connected to a detection pin of the control chip at a certain time, and performing a detection of an input voltage received by a boost power conversion circuit at the certain time through a collocation between a current detection auxiliary circuit and a current detection main circuit. Accordingly, an over current protection (OCP) point corresponding to whether an OCP mechanism is activated is compensated according to the detected result, and thus the detection manner of the OCP performed by the invention can be adaptively suitable for different input voltages. In the invention, according to the detected result, a brown out protection also can be performed, and the output of the boost power conversion circuit also can be changed or determined.
US09190833B2	Integrated thermistor and metallic element device and method A circuit protection device includes a fuse element placed in parallel with a PTC thermistor layer. The element and PTC thermistor layer are provided on one or more insulating substrate, such as an FR-4 or polyimide substrate. First and second conductors connect the fuse element and PTC thermistor layer electrically in parallel, such that current (i) initially under normal flows mainly through the fuse element and PTC thermistor layer at a lower drop in voltage and (ii) after an opening of the fuse element flows under normal operation through the PTC thermistor layer at a higher drop in voltage.
US09190828B2	Detecting circuit for circuit breaker The present disclosure relates to a detecting circuit for a circuit breaker, comprises: a detection sensor configured to output a detection signal by detecting a voltage or a current on an alternating current electric power circuit; a low pass filter configured to output a signal from the detection sensor after removing a high frequency component from the signal; an offset remover configured to output a signal from the low pass filter after removing a direct current offset from the signal; an amplifier configured to amplify a signal from the offset remover, and to output the signal; and a comparator configured to output a breaking control signal such that the circuit breaker operates to a circuit breaking position, if the detection signal input to the amplifier is equal to or larger than a reference voltage.
US09190827B2	Soft restarting of a power network using inverter-controlled energy storage system Systems and methods for softly restarting a power network using an inverter-controlled energy storage system are provided. In response to an event such as a fault or other condition, a power network bus that provides power to one or more industrial loads (e.g. motors) can be disconnected from the utility grid. Instead of automatically recoupling the power network bus to the grid after a specified time period, a soft restart is accomplished by pre-energizing the power network bus with an energy storage system (ESS) according to a ramp up process and synchronizing the power network bus with the utility grid while the power network bus operates in an islanded mode. The power network bus can then be reconnected to the utility grid, for instance, by reclosing the one or more circuit breakers coupled between the power network bus and the utility grid.
US09190826B2	Cascoded semiconductor devices The invention provides a cascode transistor circuit with a main power transistor and a cascode MOSFET formed as an integrated circuit, packaged to form the cascode transistor circuit. A control and protection circuit is integrated into the integrated circuit together and a storage capacitor provides an energy source to drive the control and protection circuit. A charging circuit is also integrated into the integrated circuit for charging the storage capacitor.
US09190821B2	Mount having a push nut and a post A mount having a post and a push nut. The post includes a longitudinal axis. The push nut is connected to the post. The push nut includes an opening for receiving the post along the longitudinal axis and at least one locking wedge rotatably connected to the push nut and extending into the opening. The at least one locking wedge allows the push nut to slide along the longitudinal axis of the post in a first direction and prevents the push nut from sliding along the longitudinal axis of the post in a second direction opposite the first direction.
US09190816B2	Cable manager A cable manager which secures cables and constrains their movement in a controlled fashion. An example cable manager includes a flexible sheet. The flexible sheet includes a support section for supporting a cable along a portion of a length of the cable, the support section including a first end and a second end. A first cable retainer section wider than the support section is adjacent the first end, the first cable retainer section including first retainer sides which interlock. A second cable retainer section wider than the support section is adjacent the second end, the second cable retainer section including second retainer sides which interlock, and the second cable retainer section being separate from the first cable retainer section.
US09190815B2	Method for installing cover sleeves on electrical connections A method for installing an elastomeric cover sleeve on an electrical connection including a connector and a cable having a cable axis includes: providing an installation tool including a slide portion; premounting the installation tool on the cable such that the slide portion extends along the cable axis and covers a portion of the cable; thereafter, sliding the cover sleeve onto the cable and onto the slide portion of the premounted installation tool to a parked position wherein the slide portion is interposed between the cover sleeve and the cable; installing the connector onto the cable; and thereafter, sliding the cover sleeve along the cable axis and the slide portion onto the connector.
US09190806B2	Nitride semiconductor light emitting device A nitride semiconductor light emitting device includes a first coat film of aluminum nitride or aluminum oxynitride formed at a light emitting portion and a second coat film of aluminum oxide formed on the first coat film. The thickness of the second coat film is at least 80 nm and at most 1000 nm. Here, the thickness of the first coat film is preferably at least 6 nm and at most 200 nm.
US09190804B2	Pulse light source, and method for stably controlling phase difference between pulse laser lights A pulse light source includes: a master laser that outputs a master laser light pulse whose repetition frequency is controlled to a predetermined value; a slave laser that outputs a slave laser light pulse; a phase comparator that detects a phase difference between an electric signal having a frequency of the predetermined value, and an electric signal based on a light intensity of the slave laser light pulse; a loop filter; an adder that adds a repetition frequency control signal having a certain repetition cycle, to an output from the loop filter; and a phase comparator that measures a pulse phase difference which is a phase difference between the master laser light pulse and the slave laser light pulse. A magnitude of the repetition frequency control signal is controlled such that the measured pulse phase difference matches with a target value of the pulse phase difference.
US09190795B2	Method of terminating a plurality of wires to an electrical connector A method of terminating a plurality of wires to an electrical connector. The method generally includes providing a heat applicator device that selectively applies heat to a specific connector pin within an electrical connector so that a corresponding wire may be soldered to the connector pin. The heat applicator device applies heat to a first connector pin for a period of time for soldering of a first wire to the first connector pin and then the heat is removed. The heat applicator device then applies heat to the next connector pin for soldering a next wire to the next connector with the process continuing until all of the wires are soldered to their corresponding connector pins on the electrical connector.
US09190791B1	Electrical busway splice connector A splice connector for a busway system utilizes individual connectors made of a conductive material and having a u-shaped cross-section that fit over ends of a pair of busbars to be connected to each other, and within which are mounted multi-contact louvers that extend the length of the connectors to establish a low impedance electrical connection between the connector and the respective busbars. The louvers are secured in place by a dovetail groove that retains the louvers within the connectors and causes the individual contact sections of the louvers to bow outwardly so as to press against the busbars when the connector is fitted over the busbars. The connectors are snapped into insulative housing halves or sections that align the connectors with the busbars, and that provide isolation between horizontally aligned pairs of connectors. A planar insulator board provides separate between vertically-aligned pairs of busbars when the connectors are fitted over the busbars and the insulative housing sections are aligned and secured to each other. Spacers may be utilized to enable different sized u-shaped connectors to fit within a standard insulative housing.
US09190789B2	Pre-forming a twisted-pair electrical cable Methods, systems, and products simplify installation of terminating plugs to cables. A wiring plug helps a user arrange individual wires on the cable to a wiring diagram of a terminating plug, such as an RJ-56 plug. The wiring plug has individual passages prearranged to the wiring diagram, such that the individual wires may simply be inserted into the correct passages. The passages are also sized in diameter and length, such that each wire may be cut to the correct length for crimping to the terminating plug.
US09190786B1	Modular RF connector system The electrical connector or device includes a first center contact, a first outer conductor, a first insulation material, a second center contact, a second outer conductor, a second insulation material, a spring, and a flexible wire. The first center contact has a longitudinal axis. The first insulation material is retained between the first center contact and the second outer conductor. The second center contact has a longitudinal axis. The second insulation material is retained between the second center contact and the second outer conductor. The longitudinal axis of the second center contact is substantially perpendicular to the longitudinal axis of the first center contact. The spring is in contact with the first outer conductor and the second outer conductor. The flexible wire is attached to the first center contact and the second center contact.
US09190783B2	HDMI connector A high definition multimedia interface (HDMI) connector includes a HDMI socket (1b) and at least one pair positioning legs (2b). The HDMI socket (1b) has a shielding frame (11b). Each of the positioning legs (2b) is connected to the HDMI socket (1b) and exposed to the shielding frame (11b). The distance between the positioning legs (2b) is complied with the Display Port specification Thus, the HDMI socket (1b) has the positioning legs (2b) complied with the Display Port specification such that the HDMI socket (1b) can be insertedly disposed on the PCB (100b) having the Display Port connection to enhance assembling convenience.
US09190781B2	Stacking connector having detection function A stacking connector comprises a main body and a plurality of connectors. The main body has a first containing slot and a second containing slot, the first containing slot arranges a connection module, and the second containing slot arranges a USB connector which has a detection function. The USB connector includes a body and a plurality of conductive terminals. The body has a tongue portion extended frontward from top side of the body. The tongue portion has a plurality of upper terminal slots, and each of the conductive terminals is set in a corresponding upper terminal slot. The body has at least one lower terminal slot at bottom side, and at least one detection terminal is set therein. When a male connector which can support high power transmission is inserted into the USB connector, the detection terminal is triggered, and the USB connector provides higher outputted power.
US09190774B2	Contact pin, header connector and connector assembly The invention relates to a contact pin having longitudinal surfaces bulged to define opposite contact lines extending in longitudinal direction of the contact pin, wherein in cross section of the contact pin the plane through the two opposite contact lines is offset from the cross sectional center of the contact pin.
US09190766B2	Electronic control apparatus for vehicle using water proof type housing sealing and method thereof The present disclosure relates to an electronic control apparatus for a vehicle using waterproof housing sealing and a manufacturing method thereof, and the electronic control apparatus includes: an electronic control element configured to electrically control each part of the vehicle; a connector electrically connected with the electronic control element; a housing having an opened one side surface, the connector connected with the electronic control element being inserted from the one side surface in the slot type to be accommodated in the housing; and a connector cover coupled with the connector to cover the opened one side surface of the housing, in which a flange extended by a predetermined length toward the outside is formed on the opened one side surface of the housing along a side surface of the housing, and a potting layer is formed inside the flange on the connector cover.
US09190765B2	Connector receptacle A connector receptacle includes an insulating housing, a plurality of contacts, a protective plate and a metallic shell. The insulating housing includes a base portion and a tongue portion extending forward from the base portion, where the tongue portion is defines a plurality of receiving slots through the base portion; the contacts is retained in the receiving slots of the insulating housing; the protective plate wraps the tongue portion externally and bends to form a front portion, two opposite side portions and two connecting portions, where two ends of the front portion are respectively connected to the two side portions through the two connecting portions; and the metallic shell wraps the insulating housing externally.
US09190762B2	Integrated compression connector An integrated compression connector that comprises a housing that has opposing first and second ends. The housing supports a pin and the pin is supported by an insulator disposed in the housing. The pin includes an elastic end for engaging a cable conductor. A threaded sleeve is externally coupled to the housing at the first end thereof. A cable clamp is externally coupled to the housing at the second end thereof. The cable clamp is configured to clamp to a corrugated outer conductor of a cable, wherein the housing engages the cable clamp in an interference fit to form an integrated structure.
US09190761B2	Connector with audio playing module A connector with an audio playing module provided for being electrically coupled to a main board of an electronic device includes an insulating base, an audio playing module and a jack. The insulating base has a containing space and a containing groove, and the containing space has an opening, and the containing groove has a port. The audio playing module is contained in the containing space and disposed at a position corresponding to the opening and includes a speaker unit and a plurality of pins, and the speaker unit is electrically coupled to each pin. The jack is contained in the containing groove and disposed at a position corresponding to the port. Therefore, the connector can provide an audio playing effect.
US09190759B2	System for connecting motor drives A system for connecting motor drives to each other is disclosed that does not require the use of wire or tools. The system includes an adapter plug and bus bar modules that connect to each other at a conductive receptacle of the adapter plug to define a splice joint at the point of connect of the bus bar modules. The bus bar modules may include insulating covers and insulating clips may overlie the splice joints so that the system is substantially devoid of exposed surfaces of its conductive materials.
US09190757B2	Connector, connector assembly, and cable for use in the connector assembly A connector 10 includes: a housing 30 into which a cable 20 is to be inserted; first contacts 40 housed in the housing 30 and having contact portions 46 with a short effective fitting length; and second contacts 50 housed in the housing 30 and having contact portions 56 with a long effective fitting length. Then, the first contacts 40 are arranged on both ends in a width direction Y of the housing 30, and the contact portions 56 with the long effective fitting length of the second contacts 50 arranged so as to adjoin insides in the width direction Y of the first contacts 40 arranged on both ends, are engaged with engagement portions 22 of the cable 20.
US09190754B2	Lower profile card edge connector for single sided SO-DIMM module and assembly of the same A card edge connector (100) for receiving a module (3) includes an elongated insulative housing (1) having a central slot (10) for receiving a bottom edge of the module and an arm portion (16) coupled to an end of the insulative housing. The arm portion includes a pair of side walls (160) with a retaining slot (168) formed therebetween for receiving a side edge of the module and a latch (17) located between the side walls and integrally extending upwardly from the insulative housing. The latch has a resilient arm (171) defining a retaining embossment (173) for latching the module and a gripping portion (172) for rotating the resilient arm. A number of terminals (2) are mounted on the insulative housing and extend into the central slot for electrical connection to the module.
US09190751B2	Connector and header for use in the same A connector that electrically connects circuit boards to each other by fitting a header 20 and a socket 10 to each other. In such a connector, protruding portions with a protruding shape, which are brought into contact with the socket 10 when the header 20 and the socket 10 are fitted to each other, are provided on side surfaces of the header 20.
US09190749B2	Electrical connector and electrical contacts of the same An electrical contact for being loaded in an electrical connector electrically connecting an IC module to a printed circuit board (PCB) includes a first contact, a second contact and an elastic arm. The first contact includes a first mating portion and a first connecting portion. The first mating portion defines a first contacting end for connecting with the IC socket. The second contact includes a second mating portion and a second connecting portion. The second contacting portion defines a second contacting end for connecting with the PCB. The first and second connecting portions are coupled with each other, the first elastic element rings around the first mating portion of the first contact and presses against the second connecting portion of the second contact.
US09190747B2	Circuit-terminal connecting device A circuit-terminal connecting device comprising an electrical connector having an insulated housing mounted on a main circuit board and a plurality of resilient contacts arranged on the insulated housing, and a flat circuit member having a reinforced portion attached to a reinforcing board member operative to engage with the insulated housing of the electrical connector, wherein each of the resilient contacts has a board connecting portion provided to be connected to a first circuit-terminal provided on the main circuit board, a fixable portion provided to be fixed to the insulated housing, and a resilient arm portion extending from the fixable portion and provided with a contact point for coming into press-contact with a second circuit-terminal provided on the reinforced portion of the flat circuit member and a locking portion for engaging with the reinforcing board member to lock the same.
US09190746B2	High-voltage resistance for a connector attached to a circuit board A circuit board connector is disclosed that has isolator ribs between contact tails, and slots in the edge of a circuit board between circuit pads that communicate with the ribs to avoid pad-to-pad current leakage and high-voltage breakdown. The slots may be between individual circuit board fingers that each include one of the conductor pads.
US09190743B2	Electric wire connection structure of connector terminal A conductor (Wa) of the electric wire (W) whose insulated sheath (Wb) is removed from an extremity of the conductor to a location where the conductor projects backwards from a rear end of the terminal accommodating chamber (11) of the connector housing 10 is crimped and connected by means of a pair of crimping pieces (3b), and an area that ranges from the extremity of the conductor (Wa) to the location that includes an end of the insulated sheath (Wb) is covered with a resin (8).
US09190738B2	Projected artificial magnetic mirror A projected artificial magnetic mirror (PAMM) includes conductive coils, a metal backing, and a dielectric material. The conductive coils are arranged in an array on a first layer of a substrate and the metal backing is on a second layer of the substrate. The dielectric material is between the first and second layers of the substrate. The conductive coils are electrically coupled to the metal backing to form an inductive-capacitive network that, for a a selected frequency band, substantially reduces surface waves along a PAMM surface, the PAMM surface residing within the substrate or above the substrate. The PAMM surface may be substantially adjacent or coexistent with the first layer.
US09190724B2	Phased antenna array for global navigation satellite system signals Systems and methods for phased array antennas are described. Supports for phased array antennas can be constructed by 3D printing. The array elements and combiner network can be constructed by conducting wire. Different parameters of the antenna, like the gain and directivity, can be controlled by selection of the appropriate design, and by electrical steering. Phased array antennas may be used for radio occultation measurements.
US09190722B2	Antenna line protection device An antenna line protection device includes a pair of coaxial connectors and a streamer discharge module. The pair of coaxial connectors are disposed on both side ends of the antenna line protection device. The streamer discharge module is coupled between the coaxial connectors so that, when a pulse signal is input via the coaxial connectors, the streamer discharge module induces an electric field and thus establishes a discharge current channel, thereby suppressing an excessive input pulse.
US09190719B2	Multiband antenna A multiband antenna comprising a substrate having first and second surfaces. A first conductive plate located on the first surface comprises a first conductive region couplable to ground by a shorting element, and a second conductive region. The first and second conductive regions are located to define a gap therebetween. The antenna also has a second conductive plate on the substrate's second surface. The second conductive plate is coupled to a signal terminal of a feeding port and positioned to provide capacitance with the first conductive region. The antenna also has a third conductive plate on the substrate's second surface. The third conductive plate is positioned to provide capacitance with the second conductive region, and a connecting conductor configured to electrically couple the third conductive plate to the second conductive region.
US09190717B2	Radar sensor A radar sensor including an antenna array having multiple antenna elements situated next to one another and at least one feeding point at an outer antenna element. The antenna elements are connected in series via delay lines. The radar sensor has at least two transmitting and receiving units which are each suitable for generating and evaluating a radar signal at a predefined frequency. The at least two transmitting and receiving units are connected to a feeding point of the antenna array. The frequencies of the radar signals of the at least two transmitting and receiving units are predefinable independently of one another.
US09190715B2	Method and apparatus for antenna radiation pattern sweeping A system and method for antenna radiation pattern sweeping in wireless networks, e.g., cellular networks, are disclosed. For example, the system comprises a first base station associated with a first antenna assembly for providing a first antenna radiation pattern over a first footprint of a first cell, a second base station associated with a second antenna assembly for providing a second antenna radiation pattern over a second footprint of a second cell, wherein there is an overlap between the first footprint and the second footprint, and a controller for controlling the first base station and the second base station to continuously provide a variation of the first antenna radiation pattern and the second antenna radiation pattern in a co-ordinated manner for maintaining the overlap between the first footprint and the second footprint.
US09190711B2	Antenna device and communication apparatus including the same There is disclosed an antenna device including: a metal portion which has a surface; and a coil section which is provided above the surface of the metal portion and has an opening portion. Here, a surface of the coil section in which the opening portion is formed is approximately perpendicular to the surface of the metal portion, and the coil section is disposed in the vicinity of an edge of the metal portion.
US09190710B2	Electronic device and antenna module thereof An antenna module in provided. The antenna module includes a metal housing, a radiator and a feed conductor. The metal housing includes a housing surface and a through hole. The radiator surrounds the metal housing. The feed conductor connects the radiator to an inner circuit inside the metal housing via the through hole.
US09190709B2	Antenna apparatus with a modified surface The invention is directed toward antenna apparatus of the type for use in receiving broadcast data signals, such as those transmitted from one or more satellites and also, in certain embodiments the antenna apparatus is capable of transmitting data signals. The antenna apparatus includes at least one component which is provided with a surface, typically an external surface, which is provided with hydrophobic properties such that the gathering of water, condensation and/or snow is reduced hence improving the performance of the antenna and reducing data loss from the data signals.
US09190706B2	Passive waveguide components manufactured by three dimensional printing and injection molding techniques Various embodiments are directed toward low cost passive waveguide components. For example, various embodiments relate to passive waveguide components created busing a low cost fabrication technology. In some embodiments, a three-dimensional (3D) printing process is used to create a design mold and a non-conductive structure of the waveguide is formed using a plastic injection molding process. A conductive layer may be formed over the non-conductive structure such that the conductive layer creates an electrical feature of the passive waveguide component.
US09190705B2	Dual mode dielectric resonator filter having plural holes formed therein for receiving tuning and coupling screws A dielectric resonator filter and a method of manufacturing the same are disclosed. The dielectric resonator includes a metal housing having a top surface and a bottom surface and defining a resonator cavity, and a dielectric rod located within the resonator cavity. The dielectric rod is short-circuited at both the top surface and the bottom surface. A plurality of holes are formed in the dielectric rod parallel to an axis of the dielectric rod and a plurality of apertures are formed on the top surface corresponding to the positions of the holes, respectively. A plurality of screws are inserted into the holes through the apertures, respectively. The dielectric resonator supports dual TM11 degenerate modes, each of which forms a resonant circuit. An insertion depth and a dimension of each of the screws is adjustable to adjust resonance frequencies of the dual degenerate modes and coupling between the dual degenerate modes.
US09190704B2	Electrosurgical systems and printed circuit boards for use therewith An electrosurgical system for treating tissue is disclosed. The system includes an electrosurgical generator, a printed circuit board, a generator ground and a patient ground. The printed circuit board is disposed in mechanical cooperation with the electrosurgical generator and includes a plurality of conductive layers. The generator ground includes a first portion and a second portion. The first portion is electro-mechanically connected to a conductive layer of the printed circuit board and the second portion is electro-mechanically connected to another conductive layer of the printed circuit board. The patient ground includes a portion that is at least partially interposed between the first portion of the generator ground and the second portion of the generator ground.
US09190701B2	In-line pseudoelliptic TE01(nδ) mode dielectric resonator filters The present invention uses TE01(nδ) single-mode resonators in different orientations that are cascaded along an evanescent mode waveguide. By exploiting multiple orthogonal evanescent modes that can alternatively by-pass, or excite the resonators, cross-coupling between non-adjacent resonators is established and properly controlled. Pseudoelliptic filters are realized without using cumbersome cross-coupled architectures, or reduced spurious performance multi-mode resonators. A 6th order filter with two transmission zeros in the lower stopband, a 5th order filter with three transmission zeros, and an 8th order filter with four transmission zeros are included as embodiments of the present invention.
US09190698B2	Lithium-ion electrolytes with improved safety tolerance to high voltage systems The invention discloses various embodiments of electrolytes for use in lithium-ion batteries, the electrolytes having improved safety and the ability to operate with high capacity anodes and high voltage cathodes. In one embodiment there is provided an electrolyte for use in a lithium-ion battery comprising an anode and a high voltage cathode. The electrolyte has a mixture of a cyclic carbonate of ethylene carbonate (EC) or mono-fluoroethylene carbonate (FEC) co-solvent, ethyl methyl carbonate (EMC), a flame retardant additive, a lithium salt, and an electrolyte additive that improves compatibility and performance of the lithium-ion battery with a high voltage cathode. The lithium-ion battery is charged to a voltage in a range of from about 2.0 V (Volts) to about 5.0 V (Volts).
US09190696B2	Lithium secondary batteries containing lithium salt-ionic liquid solvent electrolyte A rechargeable lithium metal or lithium-ion cell comprising a cathode having a cathode active material and/or a conductive supporting structure, an anode having an anode active material and/or a conductive supporting nano-structure, a porous separator electronically separating the anode and the cathode, a highly concentrated electrolyte in contact with the cathode active material and the anode active material, wherein the electrolyte contains a lithium salt dissolved in an ionic liquid solvent with a concentration greater than 3 M. The cell exhibits an exceptionally high specific energy, a relatively high power density, a long cycle life, and high safety with no flammability.
US09190692B2	Fuel cell Provided is a fuel cell capable of maintaining an interface pressure in good condition between a membrane electrode assembly and separators, and preventing an increase in contact resistance. A fuel cell is disclosed including: a membrane electrode assembly provided with a frame at a periphery thereof; two separators holding both the frame and the membrane electrode assembly therebetween; and a gas seal provided between an edge portion of the frame and an edge portion of each separator to have a configuration in which a reactant gas passes through the frame and the membrane electrode assembly and the separators, wherein the frame and the separators are not in contact with and separated from each other in a region between the membrane electrode assembly and the gas seal.
US09190691B2	Fuel cell stack A fuel cell stack is equipped with a stacked body constituted by stacking a plurality of power generating elements, which contain an electrolytic membrane and electrocatalytic layers arranged at both surfaces of the electrolytic membrane, via a separator for providing a flow path for supplying reaction gas to the electrocatalytic layer, and collector plates arranged at both ends of the stacked body, for collecting electricity generated by the stacked body and outputting it to the outside, wherein on the separator and the collector plate are formed at least one of an anode exhaust gas exhaust hole for exhausting anode exhaust gas, a cathode exhaust gas exhaust hole for exhausting cathode exhaust gas, and a medium supply hole for supplying into the stacked body a medium for maintaining the temperature of the stacked body at an approximately fixed level, and at the anode side collector plate arranged at the anode side end of the stacked body, an output terminal for outputting at least part of the collected electricity to the outside is provided in the vicinity of at least one of the anode exhaust gas exhaust hole, the cathode exhaust gas exhaust hole, and the medium supply hole.
US09190688B2	Treatment method for solid oxide fuel cells and apparatus thereof A treatment method for solid oxide fuel cells includes: measuring a radius of curvature of a cell; measuring a surface resistance of cathode current collecting layer of a cell; performing an alcohol permeating test of a cell; performing simultaneously several stages of compression and heating or cooling to a cell; an apparatus for completing above stages is also disclosed.
US09190680B2	Fuel battery A fuel battery includes an oxidant gas flow passage having a downstream section, in which a gas diffusion porous body is arranged. The fuel battery includes a fuel gas flow passage having a downstream section, in which a gas diffusion porous body is arranged. A cooling medium flow passage is formed between a first separator of each unit cell of the fuel battery and a second separator of a unit cell adjacent to the unit cell. The flowing direction of a cooling medium in the cooling medium flow passage is the same as that of oxidant gas in the oxidant gas flow passage. An upstream section of the cooling medium flow passage is located closer to a surface of a membrane-electrode assembly that faces the oxidant gas flow passage adjacent to the cooling medium flow passage as compared with a downstream section of the cooling medium flow passage.
US09190677B2	Membrane humidifier A membrane humidifier is disclosed. The membrane humidifier may include: a housing in which a hollow fiber membrane bundle is mounted, the hollow fiber membrane bundle being formed by integrating a plurality of hollow fiber membranes; a potting portion fixing an end portion of the hollow fiber membrane bundle to the housing and coupled to an end portion of the housing so as to hermetically seal the housing; and a sealing member disposed between the housing and the potting portion and hermetically sealing the housing.
US09190676B2	Flame stabilized mixer-eductor-oxidizer for high temperature fuel cells A mixer/eductor assembly for use with a fuel cell stack, the mixer/eductor assembly mixing and at least partially combusting anode exhaust gas output from an anode-side of the stack and an oxidant supply gas, the mixer/eductor assembly comprising: a first area mixing a first portion of the anode exhaust gas and a first portion of the oxidant supply gas to form a first mixture, the first area being configured to initiate a combustion reaction in the first mixture, a second area coupled with the first area for mixing a second portion of the anode exhaust gas and a second portion of the oxidant supply gas to form a second mixture, wherein the first mixture has a first oxidant to fuel ratio smaller than a second oxidant to fuel ratio of the second mixture, and the first area provides an ignition source to promote continuous combustion of the second mixture.
US09190674B2	Fuel cell and fuel cell system A fuel cell has a membrane electrode assembly and a supply member for supplying an anode fluid to the membrane electrode assembly. The membrane electrode assembly has an electrolyte membrane and an anode catalyst. The supply member has at least one anode fluid flow path for supplying the anode fluid toward the membrane electrode assembly. A gas diffusion layer is provided between the supply member and the membrane electrode assembly. An opening of the at least one anode fluid flow path on a discharge side thereof for the anode fluid is disposed in contact with a side of the gas diffusion layer facing the supply member. The side of the gas diffusion layer includes a region that stores a gas pushed by the supply of the anode fluid.
US09190673B2	SOFC hot box components Various hot box fuel cell system components are provided, such as heat exchangers, steam generator and other components.
US09190671B2	Bismuth palladium based catalyst for a fuel cell with a molecular hydrogen source A hydrogen fuel cell comprising: an anode; a cathode; an electrolyte; a source of a hydrogen-containing fuel for the fuel cell; and a source of an oxidant for the fuel cell; wherein the anode and, optionally, the cathode includes a catalyst comprising an alloy of the formula (I): PdxBiyMz (I) wherein: M is one or more metals; x is 0.2 to 0.4; y is 0.6 to 0.8; z is not greater than 0.1; and x+y+z=1; is described. Catalysts and electrodes for hydrogen fuel cells comprising the alloy and electrochemical methods using the alloy catalysts are also described.
US09190669B2	Cell materials variation in SOFC stacks to address thermal gradients in all planes A solid oxide fuel cell, and methods for modifying the temperature thereof, the fuel cell having a plurality of planar layered fuel cell units, an electrically conductive flow separator plate disposed between each of the fuel cell units, and a cathode contact material element disposed between each cathode electrode of the fuel cell units and each electrically conductive flow separator plate. The cathodes of the individual fuel cell units are modified such that the operating temperatures of the cathodes are matched with the temperatures they experience based upon their locations in the fuel cell stack. The modification involves adding to the cathode contact material and/or cathode at least one alloying agent which modifies the temperature of the cathode electrodes based upon the location of the cathode electrodes within the fuel cell stack. These alloying agents react with a component of the cathode electrode to form alloys.
US09190668B2	Nonaqueous electrolyte secondary battery A nonaqueous electrolyte secondary battery provided by the present invention includes an electrode body in which a positive electrode sheet and a negative electrode sheet 20 are laminated with a separator sheet 40 interposed therebetween. A porous layer 42 including an inorganic filler and a binder is formed on at least one surface of the separator sheet 40. The surface of the porous layer 42 is made uneven by forming peaks and valleys, and a maximum difference of elevation on an uneven surface 42a is 0.2 μm to 1.7 μm.
US09190664B2	Cathode active material composition, cathode prepared by using the same, and lithium battery including the cathode A cathode active material composition includes a cathode active material, a water-based binder, and a transition metal oxide. A cathode is prepared using the cathode active material composition. A lithium battery includes the cathode. The lithium battery has improved high-rate characteristics and lifespan characteristics by preventing an increase in internal resistance due to the corrosion of an electrode base material.
US09190663B2	Composite active material, all solid state battery, and method for producing composite active material A main object of the present invention is to provide a composite active material provided with a coating layer having satisfactory electron conductivity. The object is attained by providing a composite active material including an active material and a coating layer that is formed on the surface of the active material and contains a carbonaceous material and an ion conductive oxide, wherein the elemental carbon concentration of the coating layer surface is 17.0 atm % or more.
US09190661B2	Secondary battery and method for producing secondary battery A secondary battery is provided with a negative electrode sheet including a negative active material layer including negative active material particles. The negative active layer contains, as the negative active material particles, graphite particles formed from graphite and amorphous carbon particles formed from amorphous carbon. The difference (ΔS)(=Sb−Sa) in specific surface area between the specific surface area (Sb) of the amorphous carbon particles and the specific surface area (Sa) of the graphite particles is −0.3 to 2.6 m2/g.
US09190659B2	Secondary battery and a method for manufacturing the secondary battery A secondary battery that can avoid reduction in battery capacity over the lapse of charge-discharge cycles and can exhibit high performance is provided. The secondary battery includes a first electrode layer, a second electrode layer, and an electrolyte layer provided between the first and second electrode layers, the electrolyte layer including electrolyte particles, wherein at least one of the first and second electrode layers includes a base member having a major surface on which a plurality of concave portions are formed and an electrode material filled in at least the concave portions, the major surface facing to the electrolyte layer.
US09190655B2	Lithium primary battery A lithium primary battery includes a positive electrode 1 using iron sulfide as a positive electrode active material, a negative electrode 2 using a lithium alloy as a negative electrode active material, an electrode group 4 formed by winding the positive and negative electrodes 1, 2 with a separator 3 being interposed therebetween, and a non-aqueous electrolytic solution. The lithium alloy contains at least one of magnesium or tin in a range of 0.02-0.2 mol %.
US09190654B2	Battery parts and associated systems and methods Battery parts, such as battery terminals, and associated systems and methods for making same. In one embodiment, a battery part has a sealing region or sealing bead located on a lateral face of an acid ring for increasing resistance to leakage therepast as the battery container shrinks. Another embodiment includes a forming assembly for use with, for example, a battery part having a bifurcated acid ring with spaced apart lips. The forming assembly can include movable forming members that can be driven together to peen, crimp, flare or otherwise form the lips on the bifurcated acid ring.
US09190652B2	Layered solid-state battery A layered solid-state battery that includes a first unit cell, a second unit cell, and an internal collection layer that is disposed to intervene between the first unit cell and the second unit cell. Each of the unit cells is constituted of a positive electrode layer, a solid electrolyte layer, and a negative electrode layer that are sequentially stacked. The internal collection layer is disposed to be in contact with each of the negative electrode layers of the unit cells. Also, the internal collection layer contains an electron conductive material and an ion-conductively electrically conductive specific conductive material.
US09190651B2	Bus bar module A bus bar module (1) includes: a first module body section (3) provided with an output terminal installation section (13); a second module body section (5) detachably attached to the first module body section; an output terminal cover (19) provided to the first module body section using a hinge section (21), and configured to cover an output terminal; a cover latch section (23) provided to the output terminal cover; a cover latching section (27) to which the cover latch section of the output terminal cover is fastened; and a reinforcing section (31) configured to come into engagement with the output terminal installation section when the second module body section is installed on the first module body section, and configured to prevent deformation of the output terminal installation section.
US09190650B2	Electric storage element An electrode assembly has a positive sheet, a negative sheet, and separators that are stacked and wounded. A joint portion is formed by thermally fusion bonding or compression bonding of the separators at one end in a width direction thereof so that one end of the positive sheet on an opposite side in a width direction with respect to a positive lead is wrapped by the separators. Arranged outside of the joint portion in the width direction is a separating portion where the separators are separated from each other. A protecting layer made of an insulating material is formed on the end face of the positive sheet. The positive sheet is reliably prevented from being in contact with a foreign material.
US09190644B2	Staging system for battery on a portable tool A portable battery-operated tool has a frame on which there are a working component, a drive, and a battery assembly. The battery assembly consists of a battery with at least a first electrical connector and housing with at least a second electrical connector. The battery is movable guidingly between first and second positions. With the battery in the first position the at least first electrical connector is electrically engaged with the at least second electrical connector. With the battery in the second position the at least first electrical connector is electrically disengaged from the at least second electrical connector so that the battery is not powering the drive to allow the drive to be operated. The battery assembly further has a locking assembly through which the battery is selectively releasably fixed in the second position.
US09190643B2	Battery pack Provided is a battery pack. The battery pack includes; a first battery cell and a second battery cell; a protection circuit module (PCM) that is located between the first and second battery cells and is electrically connected to the first and second battery cells; a thermal sensor that is electrically connected to the PCM and measures a temperature of the first battery cell; and a frame that accommodates the first battery cell, the second battery cell, and the PCM, wherein the frame includes a seating unit on which the PCM is seated, and the seating unit comprises a hole for inserting the thermal sensor to fix a position of the thermal sensor. Accordingly, damage to the thermal sensor is prevented and reliability of the thermal sensor is increased.
US09190641B2	Rechargeable battery pack A rechargeable battery pack includes a plurality of unit cells adjacent to each other, each unit cell including a rechargeable battery, a case configured to house the unit cells and support side surfaces thereof, and a spacer compressed among the unit cells, the spacer including an elastic material and configured to exert an elastic force to support the unit cells.
US09190639B2	Protecting case Provided is a protecting case for protecting an electronic device. The protecting case includes a protecting case body portion and a sliding case portion having an auxiliary battery cell embedded therein, the sliding case portion being electrically connected with the electronic device, supplying power to the electronic device, and being inserted into/drawn out from the protecting case body portion by sliding movement.
US09190636B2	Rechargeable battery A rechargeable battery, including an electrode assembly having a first electrode plate, a second electrode plate, and a separator, a first terminal electrically connected to the first electrode plate, a case accommodating the electrode assembly and the first terminal, and a cap assembly sealing the case. The first terminal includes a first collector plate in the case electrically connected to the first electrode plate of the electrode assembly, a first electrode terminal exposed to a top surface of the cap assembly, the first electrode terminal having a first terminal hole passing through a top and bottom surface of the first electrode terminal, and a first connection terminal having a first side electrically connected to the first electrode terminal and a second side electrically connected to the first collector plate, the first connection terminal having a first fuse hole at the first side.
US09190635B2	Rechargeable battery having a short circuit plate A rechargeable battery includes a case, an electrode assembly in the case, a terminal electrically connected to the electrode assembly, and a cap assembly sealing the case. The cap assembly includes a cap plate having a short circuit opening and a short circuit plate in the short circuit opening. The terminal includes a collector plate connected to the electrode assembly, a collector terminal connected to the collector plate and penetrating the cap plate, and a fastening terminal spaced apart from the cap plate. The fastening terminal includes a fastener engaged with the collector terminal, and an extender extending from the fastener. The extender is adjacent to the short circuit plate. The cap assembly also includes an insulation member between the cap plate and the fastening terminal, and a cover covering the extender.
US09190633B2	Pouch type lithium secondary battery The present invention is related to a pouch type lithium secondary battery. The pouch type lithium secondary battery according to the present invention may comprise an electrode assembly including a positive electrode, a separator and a negative electrode, and a pouch having a groove for receiving the electrode assembly and upper and lower portions of which are fused to each other around the groove to form flange-shaped edges. In particular, the edges may be at least partially covered at ends thereof with insulating material. As a result, a short circuit between a metal foil of the pouch and the negative electrode of the battery can be prevented, and corrosion of the battery may be also prevented.
US09190627B2	Organic light-emitting display apparatus and method of manufacturing the same An organic light-emitting display apparatus includes a thin film transistor including a first insulating layer between an active layer and a gate electrode, and a second insulating layer between the gate electrode and source/drain electrodes, a pad electrode including a first pad layer on a same layer as the source/drain electrodes and a second pad layer, a third insulating layer including an organic insulating material covering the source/drain electrodes and an end portion of the pad electrode, a pixel electrode including a semi-transmissive metal layer, in an opening in the third insulating layer, a cathode contact unit including a first, second, and third contact layers, a fourth insulating layer covering the end portion of the pad electrode, an organic emission layer on the pixel electrode, and an opposing electrode on the organic emission layer.
US09190625B2	Organic electroluminescent device having conductive layers in a cathode layer and an electron transporting layer having a metal complex An organic electroluminescent device including an anode layer, an organic functional layer and a cathode layer is provided. The organic functional layer is disposed between the anode layer and the cathode layer. The cathode layer includes a first conductive layer and a second conductive layer. The first conductive layer is disposed between the organic functional layer and the second conductive layer, and work function of the first conductive layer is higher than work function of the second conductive layer.
US09190619B2	Compound for organic electroluminescence device The present invention discloses a compound is represented by the following formula (I) or formula (II), the organic EL device employing the compound as phosphorescent host material, hole blocking material, hole blocking electron transport material, can display good performance. The same definition as described in the present invention.
US09190610B2	Methods of forming phase change memory with various grain sizes A memory device includes a phase change element, which further includes a first phase change layer having a first grain size; and a second phase change layer over the first phase change layer. The first and the second phase change layers are depth-wise regions of the phase change element. The second phase change layer has a second average grain size different from the first average grain size.
US09190609B2	Germanium antimony telluride materials and devices incorporating same A chalcogenide alloy composition, having an atomic composition comprising from 34 to 45 Ge, from 2 to 16% Sb, from 48 to 55% Te, from 3 to 15% carbon and from 1 to 10% nitrogen, wherein all atomic percentages of all components of the film total to 100 atomic %. Material of such composition is useful to form phase change films, e.g., as conformally coated on a phase change memory device substrate to fabricate a phase change random access memory cell.
US09190607B2	Magnetoresistive element and method of manufacturing the same According to one embodiment, a magnetoresistive element manufacturing method is provided. In this magnetoresistive element manufacturing method, a first ferromagnetic layer, tunnel barrier layer, and second ferromagnetic layer are sequentially formed on a substrate. A conductive hard mask is formed on the second ferromagnetic layer. The hard mask is patterned. A hard layer is formed on the side surface of the hard mask. The second ferromagnetic layer, tunnel barrier layer, and first ferromagnetic layer are processed by IBE in an oblique direction by using the hard mask and hard layer as masks. The IBE etching rate of the hard layer is lower than that of the hard mask.
US09190605B2	Nanopiezoelectric generator and method of manufacturing the same A nanopiezoelectric generator is provided. The nanopiezoelectric generator includes a first electrode; a second electrode; at least one nanostructure that is interposed between the first electrode and the second electrode, and includes a piezoelectric material and first carriers; and a concentration adjusting unit that adjusts a concentration of the first carriers in the at least one nanostructure.
US09190604B2	Manufacturing method for thin board-shaped fired piezoelectric body A manufacturing method for a thin board-shaped fired piezoelectric body has: a step of manufacturing, using a piezoelectric material, a green sheet having a ratio T/L of 0.000002 to 0.2, where T is the thickness and L is the maximum length within the surface after firing; and a step of obtaining the thin board-shaped fired piezoelectric body with reinforcing members for firing by performing firing after disposing the reinforcing members for firing by scattering at least on one surface of the green sheet so as to exclude the areas to be the thin board-shaped fired piezoelectric body later. The piezoelectric body which has excellent planarity and a thin board shape can be manufactured at low cost by the method.
US09190601B2	Piezoelectric material, piezoelectric element, liquid ejecting head, liquid ejecting apparatus, ultrasonic sensor, piezoelectric motor, and power generator A piezoelectric material contains a first component that is a rhombohedral crystal that is configured to have a complex oxide with a perovskite structure and Curie temperature Tc1 and a second component that is a crystal other than a rhombohedral crystal that is configured to have a complex oxide with the perovskite structure and Curie temperature Tc2, in which \|Tc1−Tc2\| is equal to or less than 50° C.
US09190599B2	Process for fabricating an optimally-actuating piezoelectric membrane In a process for fabricating a membrane, including, on a substrate, a thin-film multilayer including a film of piezoelectric material placed between a top electrode film and a bottom electrode film and an elastic film supporting said piezoelectric film, the process includes: determining at least one concavity/convexity curvature of said membrane along an axis parallel to the plane of the films so that at least one inflection point is defined, said point allowing a first region and a second region, corresponding to a concave part and a convex part or vice versa, to be isolated; depositing, on the surface of the substrate, a thin-film multilayer including at least one film of piezoelectric material, one bottom electrode film and one top electrode film; and structuring at least one of the electrode films to define at least said first membrane region, in which an electric field perpendicular to the plane of the films may be applied, and at least said second region, in which an electric field parallel to the plane of the films may be applied.
US09190598B2	Thin film stack The present disclosure is drawn to a thin film stack, which includes a substrate, a metal layer, and an adhesive layer comprising a blend of from 3 at % to 94 at % indium oxide, from 3 at % to 94 at % gallium oxide, and from 3 at % to 94 at % zinc oxide. The adhesive layer is adhered between the substrate and the metal layer.
US09190597B2	Power-generating system A power-generating system includes a heat source having a temperature that goes up and down over time; a first device that undergoes electric polarization due to a temperature change of the heat source; and a second device that takes out an electric power from the first device.
US09190596B2	Three-dimensional thermoelectric energy harvester and fabrication method thereof A three-dimensional thermoelectric energy harvester and a fabrication method thereof. Low-resistivity silicon is etched to form a plurality of grooves and silicon columns between the grooves, and an insulating layer is formed on a surface of the groove, and thermoelectric columns are fabricated by using a thin-film deposition technique, so that the thermoelectric column and a neighboring silicon column form a thermocouple pair; and then, a metal wiring is fabricated by processes such as etching and deposition, followed by thinning of the substrate and bonding of the supporting substrates, thereby completing fabrication of the three-dimensional thermoelectric energy harvester. Fabrication of the thermocouple pair structure by one thin-film deposition process simplifies the fabrication process. The thermocouple pair using silicon ensures a high Seebeck coefficient. The use of vertical thermocouple pairs having a column structure improves the mechanical stability of the thermoelectric energy harvester.
US09190592B2	Thin film thermoelectric devices having favorable crystal tilt A method of fabricating a thermoelectric device includes providing a substrate having a plurality of inclined growth surfaces protruding from a surface thereof. Respective thermoelectric material layers are grown on the inclined growth surfaces, and the respective thermoelectric material layers coalesce to collectively define a continuous thermoelectric film. A surface of the thermoelectric film opposite the surface of the substrate may be substantially planar, and a crystallographic orientation of the thermoelectric film may be tilted at an angle of about 45 degrees or less relative to a direction along a thickness thereof. Related devices and fabrication methods are also discussed.
US09190587B2	Light-emitting device and method of manufacturing the same A light-emitting device may comprise a substrate, an electric wire fixed to the substrate, and a plurality of light-emitting diodes mounted to the electric wire. According to one embodiment, each of the plurality of light-emitting diodes is an LED chip, and the light-emitting diodes on the substrate are sealed individually or collectively by one or more sealing members. According to another embodiment, the substrate has a plurality of through holes, wherein a plurality of portions of the electric wire provided on a rear surface side of the substrate communicates with a front surface side of the substrate at the plurality of through holes of the substrate, and wherein the plurality of light-emitting diodes is respectively mounted to the respective portions of the electric wire that communicate with the front surface side of the substrate. Other embodiments relate to methods of manufacturing a light-emitting device.
US09190584B2	Optical-semiconductor device The present invention relates to an optical-semiconductor device, which is prepared by: arranging a sheet for optical-semiconductor element encapsulation including an encapsulating resin layer capable of embedding an optical-semiconductor element and a wavelength conversion layer containing light wavelength-converting particles and being laminated directly or indirectly on the encapsulating resin layer, on an optical-semiconductor element-mounting substrate so that the encapsulating resin layer faces the optical-semiconductor element-mounting substrate; followed by compression-molding, in which the wavelength conversion layer is present on an upper part of a molded body in which the optical-semiconductor element is embedded therein, but is not present on a side surface of the molded body.
US09190582B2	Light emitting device A light emitting device according to embodiments includes a light emitting element emitting light having a peak wavelength of 425 nm or more and 465 nm or less, a first phosphor emitting light having a peak wavelength of 485 nm or more and 530 nm or less, a second phosphor emitting light having a peak wavelength longer than that of the first phosphor, and a third phosphor emitting light having a peak wavelength longer than that of the second phosphor. Then, when the peak wavelength of the light emitting element is λ0 (nm) and the peak wavelength of the first phosphor is λ1 (nm), a relation of 30≦λ1−λ0≦70 is satisfied.
US09190579B2	Method for manufacturing light emitting device and light emitting device A method for manufacturing a light emitting device that comprises a light emitting element and a phosphor layer to absorb at least a part of light emitted from the light emitting element to emit a light having a different wavelength from that of the absorbed light comprises a first resin layer forming step of forming a first resin layer with a first resin in which viscosity is adjusted to a first viscosity on a light emitting face of the light emitting element to define a predetermined shape of the phosphor layer; a second resin layer forming step of forming a second resin layer with a second resin containing a phosphor in which viscosity is adjusted to a second viscosity lower than the first viscosity on the first resin layer before curing the first resin layer; and a curing step of curing the first resin layer and the second resin layer.
US09190573B2	Semiconductor light-emitting device with reflective surface region A semiconductor lighting device may include a substrate populated with at least one semiconductor light source, wherein at least one reflective surface region of the substrate is covered with a light-reflecting layer, and wherein the light-reflecting layer has an aluminum carrier coated in a reflection-intensifying manner.
US09190568B2	Light emitting diode structure A light emitting diode structure comprising a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a current resisting layer, a current spreading layer, a first electrode and a second electrode is provided. The first semiconductor layer is formed on the substrate. The active layer covers a portion of the first semiconductor layer, and exposes another portion of the first semiconductor layer. The second semiconductor layer is formed on the active layer. The current resisting layer covers a portion of the second semiconductor layer, and exposes another portion of the second semiconductor layer. The current spreading layer covers the second semiconductor layer and the current resisting layer. The current spreading layer is formed with a reverse trapezoidal concave over the current resisting layer. The first electrode is disposed on the first semiconductor layer. The second electrode is disposed within the reverse trapezoidal concave.
US09190567B2	Nitride semiconductor light emitting device and fabrication method thereof Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.
US09190566B2	Light emitting device Disclosed is a light emitting device package capable of improving luminous efficiency. The light emitting device includes a substrate; a first buffer layer on the substrate; a first insulating layer on the first buffer layer; a second buffer layer on the first insulating layer; a second insulating layer on the second buffer layer; a third buffer layer around the second buffer layer and the insulating layer; and a light emitting structure on the third buffer layer.
US09190564B2	Array substrate and method for fabricating the same An array substrate and a method for fabricating the same are disclosed. The method for fabricating the array substrate comprises: forming a pattern of a gate electrode (2) and a common electrode (3) on a substrate (1); forming a pattern of a gate insulating layer (4), an active layer (5), a source/drain electrode layer (6) and a first passivation layer (7), wherein the first passivation layer (7) has a via hole and a thin film transistor (TFT) channel window, and the TFT channel window is located above the gate electrode (2); forming a TFT channel and a pixel electrode (9) with slits, wherein the pixel electrode (9) is connected to one of the source/drain electrode (6) through the via hole. The method is not only simple and stable but also improves the TFT quality.
US09190563B2	Nanostructure semiconductor light emitting device A nanostructure semiconductor light emitting device includes a plurality of light emitting nanostructures, each of which including a nanocore formed of a first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore, a contact electrode disposed on a surface of the second conductivity-type semiconductor layer and formed of a transparent conductive material, a first light transmissive portion filling space between the plurality of light emitting nanostructures and formed of a material having a first refractive index, and a second light transmissive portion disposed on an upper surface of the first light transmissive portion to cover the plurality of light emitting nanostructures and formed of a material having a second refractive index higher than the first refractive index.
US09190562B2	Light emitting device A light emitting structure includes a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer. A plurality of first electrodes is provided on the first conductive semiconductor layer, and a second electrode electrically connects to the second conductive semiconductor layer. A conductive support member is provided under the second electrode, and a plurality of first connection parts is coupled the first electrodes to the conductive support member, respectively. A second connection part is coupled to the second electrode. The first electrodes are spaced apart from each other on a top surface of the first conductive semiconductor layer.
US09190560B2	Method of forming a light emitting diode structure and a light diode structure A method of forming a vertical III-nitride based light emitting diode structure and a vertical III-nitride based light emitting diode structure can be provided. The method comprises forming a III-nitride based light emitting structure on a silicon-on-insulator (SOI) substrate; forming a metal-based electrode structure on the III-nitride based light emitting structure; and removing the SOI substrate by a layer transfer process such that the metal-based electrode structure functions as a metal-based substrate of the light emitting structure.
US09190558B2	Display device and display panel with large aperture ratio of pixels thereof A display device and a display panel thereof are provided. The display panel includes a plurality of pixels, a first adjacent zone and a plurality of gate lines. The pixels include a first pixel and a second pixel adjacent to the first pixel. Each pixel includes one of the gate lines. The gate lines include a first gate line and a second gate line. The first pixel includes the first gate line. The second pixel includes the second gate line. The first gate line and the second gate line are located at the first adjacent zone.
US09190557B2	Ultraviolet semiconductor light-emitting device and fabrication method An ultraviolet semiconductor light emitting device includes: a light-emitting epitaxial layer including an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer; a tunnel junction at a non-light-emitting surface of the light-emitting epitaxial layer and having a patterned structure with openings to expose the light-emitting epitaxial layer; an optical phase matching layer over a surface layer of the light-emitting epitaxial layer and transmissive of UV light; and a reflecting layer covering the entire tunneling junction and the optical phase matching layer. A patterned structure is provided over the tunnel junction for full-angle light reflection. Part of the tunneling junction forms ohmic contact with the low work function reflecting metal. The patterned distribution design can effectively reduce the ohmic contact resistance.
US09190554B2	Method and device for industrially producing photovoltaic concentrator modules The invention relates to a device for industrially producing photovoltaic concentrator modules which consist of a module frame, a lens pane comprising a plurality of Fresnel lenses, a sensor-carrier pane, and an electric line guide, said device comprising the following features: a) a carriage (30) for retaining a module frame (1) in a tension-free manner by means of clamping elements (31) on the two longitudinal sides and stop elements (37) on the two transverse sides, these clamping elements (31) being adjusted by displacing and rotating a shift rod (32), b) a device (47) for punctually applying acrylic and linearly applying silicone (48) onto the support surfaces of the module frame (1), c) one device for laying the sensor-carrier pane (3) and one for laying the lens pane (2), these panes being conveyed in a tension-free manner using special suction devices (39) and being set down with a centrally-positioned, predetermined contact pressure, d) a device for measuring the position of each pane and for positioning the sensor-carrier pane (3) or lens pane (2), e) a device for finely-adjusting said lens pane (2) relative to CPV sensors (4) of the sensor-carrier pane (3), a voltage being supplied to selected CPV sensors whereupon the light emitted therefrom via the Fresnel lenses (5) is sensed and the lens pane (2) is aligned such that the emission from particularly strategically important Fresnel lenses (5) is at a maximum, f) a device for curing the applied silicone between the module frame (1) and the pane in question, using a plurality of UV light-emitting elements (40), and g) devices for conveying the workpieces to be processed.
US09190540B2	Photo cell devices for phase-sensitive detection of light signals Embodiments relate to photo cell devices. In one embodiment, a trench-based photo cells provides very fast capture of photo-generated charge carriers, particularly when compared with conventional approaches, as the trenches of the photo cells create depleted regions deep within the bulk of the substrate that avoid the time-consuming diffusion of carriers.
US09190538B2	Optical connector An optical connector includes a circuit board. The circuit board includes a substrate and a circuit unit. A photoelectric element and a driver chip are located on the substrate. The photoelectric element includes a conductive pin and a metallic layer. The conductive pin is formed on a surface of the photoelectric element away from the circuit board, and the metallic layer is formed on another surface of the photoelectric element facing the circuit board. The conductive pin and the metallic layer serve as terminals of the photoelectric element. The driver chip is electrically connected to the photoelectric element by the circuit unit.
US09190531B2	Flash memory cell with flair gate An embodiment of the present invention is directed to a method of forming a memory cell. The method includes etching a trench in a substrate and filling the trench with an oxide to form a shallow trench isolation (STI) region. A portion of an active region of the substrate that comes in contact with the STI region forms a bitline-STI edge. The method further includes forming a gate structure over the active region of the substrate and over the STI region. The gate structure has a first width substantially over the center of the active region of the substrate and a second width substantially over the bitline-STI edge, and the second width is greater than the first width.
US09190529B2	Thin film transistor having four different gate electrodes Provided is a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage is controlled, which is a so-called normally-off switching element. The switching element includes a first insulating film, an oxide semiconductor layer over the first insulating film and includes a channel formation region, a second insulating film covering the oxide semiconductor layer, a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The semiconductor device further includes a first gate electrode layer overlapping the channel formation region with the first insulating film therebetween, a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween, and a third gate electrode layer overlapping a side surface of the oxide semiconductor layer in a channel width direction with the second insulating film therebetween.
US09190527B2	Semiconductor device and manufacturing method of semiconductor device A highly reliable semiconductor device including an oxide semiconductor is provided. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer to a channel formation region, whereby oxygen vacancies which might be generated in the channel formation region are filled. Further, a protective insulating layer containing a small amount of hydrogen and functioning as a barrier layer having a low permeability to oxygen is formed over the gate electrode layer so as to cover side surfaces of an oxide layer and a gate insulating layer that are provided over the oxide semiconductor layer, whereby release of oxygen from the gate insulating layer and/or the oxide layer is prevented and generation of oxygen vacancies in a channel formation region is prevented.
US09190522B2	Semiconductor device having an oxide semiconductor An object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film, a metal oxide film which is partly in contact with the oxide semiconductor film, a gate insulating film which is over and in contact with the metal oxide film, and a gate electrode over the gate insulating film. With such a structure, effect of charge on the oxide semiconductor film can be relaxed; thus, shift of the threshold voltage in the transistor, due to charge trapping at an interface of the oxide semiconductor film, can be suppressed.
US09190518B2	Nonplanar device with thinned lower body portion and method of fabrication A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface. A gate dielectric layer is formed on the top surface of the semiconductor body and on the sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
US09190517B2	Methods for making a semiconductor device with shaped source and drain recesses and related devices A method for making a semiconductor device includes forming at least one gate stack on a layer comprising a first semiconductor material and etching source and drain recesses adjacent the at least one gate stack. The method further includes shaping the source and drain recesses to have a vertical side extending upwardly from a bottom to an inclined extension adjacent the at least one gate stack.
US09190510B2	Semiconductor device with breakdown preventing layer A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the device. The breakdown preventing layer can include an insulating film with conducting elements embedded therein. The conducting elements can be arranged along a lateral length of the insulating film. The conducting elements can be configured to split a high electric field spike otherwise present in the high-voltage surface region during operation of the device into multiple much smaller spikes.
US09190507B2	Semiconductor device A transistor which includes an electron transit layer and an electron supply layer which are stacked in a thickness direction of a substrate; an electron transit layer formed over the substrate in parallel to the electron transit layer and the electron supply layer; an anode electrode which forms a Schottky junction with the electron transit layer; and a cathode electrode which forms an ohmic junction with the electron transit layer are provided. The anode electrode is connected to a source of the transistor, and the cathode electrode is connected to a drain of the transistor.
US09190502B2	Semiconductor devices with graded dopant regions Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.
US09190499B2	Nonvolatile semiconductor memory device, capacitance element, and method for manufacturing nonvolatile semiconductor memory device According to one embodiment, a nonvolatile semiconductor memory device includes a memory element region and a capacitance element region. The capacitance region including: a second stacked body, each of a plurality of second electrode layers and each of a plurality of second insulating layers being stacked alternately; a plurality of conductive layers; and a second insulating film provided between each of the plurality of conductive layers and each of the plurality of second electrode layers. In the capacitance element region, a first capacitor is made of one of the plurality of second insulating layers and a pair of the second electrode layers sandwiching the one of the plurality of second insulating layers, and a second capacitor is made of the second insulating film, and one of the plurality of second electrode layers and one of the plurality of conductive layers sandwiching the second insulating film.
US09190492B2	Semiconductor device with improved linear and switching operating modes A semiconductor device that includes a semiconductor body, having a front side and a back side opposite to one another in a first direction of extension; a drift region, which extends in the semiconductor body, faces the front side, and has a first type of conductivity and a first value of doping; a body region, which has a second type of conductivity opposite to the first type of conductivity, extends in the drift region, and faces the front side of the semiconductor body; a first control terminal, which extends on the front side of the semiconductor body, at least partially overlapping, in the first direction of extension, the body region; and a second control terminal, which extends to a first depth in the semiconductor body, inside the body region, and is staggered with respect to the first control terminal.
US09190491B1	Variable resistive memory device including vertical channel PMOS transistor and method of manufacturing the same A semiconductor device having a vertical channel, a variable resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device having a vertical channel includes a vertical pillar formed on a semiconductor substrate and including an inner portion and an outer portion surrounding the inner portion, junction regions formed in the outer portion of the vertical pillar, and a gate formed to surround the vertical pillar. The inner portion of the vertical pillar has a lattice constant smaller than that of the outer portion of the vertical pillar.
US09190490B2	Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. The memory device utilizes a local buried channel dielectric in a NAND string that reduces bulk channel leakage at the edge of the NAND string where the electric field gradient along the direction of the string pillar is at or near a maximum during programming operations. The memory device comprises a channel that is coupled at one end to a bitline and at the other end to a source. A select gate is formed at the end of the channel coupled to the bitline to selectively control conduction between the bitline and the channel. At least one non-volatile memory cell is formed along the length of the channel between the select gate and the second end of the channel. A local dielectric region is formed within the channel at the first end of the channel.
US09190488B1	Methods of forming gate structure of semiconductor devices and the resulting devices One method disclosed includes forming a replacement gate structure for a device. The method includes forming a gate cavity above a semiconductor substrate. The method further includes forming a first bulk metal layer in the gate cavity above a work function metal layer. The method further includes forming a conductive etch stop layer in the gate cavity above the first bulk metal layer. The method further includes forming a second bulk metal layer in the gate cavity above the conductive etch stop layer. The method further includes performing at least one etching process to recess the first and second bulk metal layers selectively relative to the conductive etch stop layer. The method further includes performing at least one etching process to recess at least the conductive etch stop layer.
US09190486B2	Integrated circuits and methods for fabricating integrated circuits with reduced parasitic capacitance Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a sacrificial gate structure over a semiconductor substrate. A spacer is formed around the sacrificial gate structure and a dielectric material is deposited over the spacer and semiconductor substrate. The method includes selectively etching the spacer to form a trench between the sacrificial gate structure and the dielectric material. The trench is bounded by a trench surface upon which a replacement spacer material is deposited. The method merges an upper region of the replacement spacer material to enclose a void within the replacement spacer material.
US09190484B2	Vertical tunneling field-effect transistor cell and fabricating the same A tunneling field-effect transistor (TFET) device is disclosed. A frustoconical protrusion structure is disposed over the substrate and protrudes out of the plane of substrate. A drain region is disposed over the substrate adjacent to the frustoconical protrusion structure and extends to a bottom portion of the frustoconical protrusion structure as a raised drain region. A gate stack is disposed over the substrate. The gate stack has a planar portion, which is parallel to the surface of substrate and a gating surface, which wraps around a middle portion of the frustoconical protrusion structure, including overlapping with the raised drain region. An isolation dielectric layer is disposed between the planar portion of the gate stack and the drain region. A source region is disposed as a top portion of the frustoconical protrusion structure, including overlapping with a top portion of the gating surface of the gate stack.
US09190483B2	AlN single crystal Schottky barrier diode and method of producing the same An AlN single crystal Schottky barrier diode including: an AlN single crystal substrate having a defect density of 106 cm−2 or less and a thickness of 300 μm or more; a first electrode formed on one surface of the AlN single crystal substrate; and a second electrode formed on one surface of the AlN single crystal substrate while being spaced apart from the first electrode, the AlN single crystal Schottky barrier diode being provided with: a rectifying property such that an on-off ratio at the time of applying 10 V and −40 V is at least 103 even at a high temperature of 573 K; a high voltage resistance such that a voltage can be applied at least within a range of −40 V to 10 V; and a low on-resistance characteristic such that a current begins to flow at no greater than 5 V.
US09190482B2	Method of production of SiC semiconductor device A method of production of an SiC semiconductor device, which can form an ohmic electrode while preventing electrode metal from diffusing in the SiC single crystal substrate, includes a step of forming an ohmic electrode on an SiC substrate, characterized by forming a gettering layer with a defect density higher than the SiC substrate on that substrate to be parallel with the substrate surface, then forming the ohmic electrode the gettering layer outward from the substrate.
US09190479B1	Transistor structure having an electrical contact structure with multiple metal interconnect levels staggering one another An electrical contact structure distributes current along a length thereof. The electrical contact structure includes a plurality of n metal rectangles on n levels of metal. The rectangle on one metal level is at least as wide in width and vertically covers in width the rectangle on the metal level immediately below. The rectangle on one metal level is shorter in length than and substantially aligned at a first end with the rectangle on the metal level immediately below. Rectangle first ends are substantially aligned. Features of an exemplary FET transistor of this invention are a source and drain terminal electrical contact structure, a multi-level metal ring connecting gate rectangles on both ends, and a wider-than-minimum gate-to-gate spacing. The invention is useful, for example, in an electromigration-compliant, high performance transistor.
US09190478B2	Method for forming dual oxide trench gate power MOSFET using oxide filled trench A method for forming a dual oxide thickness trench gate structure for a power MOSFET includes providing a semiconductor substrate; forming a first trench on a top surface of the substrate; forming a first oxide layer in the first trench where the first oxide layer has a first depth from the bottom of the first trench; forming a dielectric spacer along the sidewall of the first trench and on the first oxide layer; etching the first oxide layer exposed by the dielectric spacer to a second depth from the bottom of the first trench using the dielectric spacer as a mask where the second depth is lower than the first depth; removing the dielectric spacer; and forming a second oxide layer along the sidewall of the first trench above the first oxide layer where the second oxide layer has a thickness thinner than the thickness of the first oxide layer.
US09190476B2	High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages A lateral DMOS transistor is provided with a source region, a drain region, and a conductive gate. The drain region is laterally separated from the conductive gate by a field oxide that encroaches beneath the conductive gate. The lateral DMOS transistor may be formed in a racetrack-like configuration with the conductive gate including a rectilinear portion and a curved portion and surrounded by the source region. Disposed between the conductive gate and the trapped drain is one or more levels of interlevel dielectric material. One or more groups of isolated conductor leads are formed in or on the dielectric layers and may be disposed at multiple device levels. The isolated conductive leads increase the breakdown voltage of the lateral DMOS transistor particularly in the curved regions where electric field crowding can otherwise degrade breakdown voltages.
US09190475B2	Semiconductor device and semiconductor device manufacturing method A semiconductor device has a p-type metal oxide semiconductor layer; a source electrode connected with the p-type metal oxide semiconductor layer; a drain electrode connected with the p-type metal oxide semiconductor layer; and a gate electrode arranged to oppose to a part of the p-type metal oxide semiconductor layer. The gate electrode and the drain electrode are separated from each other in a top view.
US09190471B2	Semiconductor structure having a source and a drain with reverse facets A semiconductor structure including a semiconductor wafer. The semiconductor wafer includes a gate structure, a first trench in the semiconductor wafer adjacent to a first side of the gate structure and a second trench adjacent to a second side of the gate structure, the first and second trenches filled with a doped epitaxial silicon to form a source in the filled first trench and a drain in the filled second trench such that each of the source and drain are recessed and have an inverted facet. In a preferred exemplary embodiment, the epitaxial silicon is doped with boron.
US09190469B2	Super junction semiconductor device and method for manufacturing the same There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.
US09190466B2	Independent gate vertical FinFET structure A semiconductor device includes a substrate extending in a first direction to define a substrate length and a second direction perpendicular to the first direction to define a substrate width. A first semiconductor fin is formed on an upper surface of the substrate. The first semiconductor fin extends along the second direction at a first distance to define a first fin width. A first gate channel is formed between a first source/drain junction formed in the substrate and a second source/drain junction formed in the first semiconductor fin. A first gate stack is formed on sidewalls of the first gate channel. A first spacer is interposed between the first gate stack and the first source/drain junction.
US09190465B2	FinFET device A method for fabricating a field effect transistor device includes removing a portion of a first semiconductor layer and a first insulator layer to expose a portion of a second semiconductor layer, wherein the second semiconductor layer is disposed on a second insulator layer, the first insulator layer is disposed on the second semiconductor layer, and the first semiconductor layer is disposed on the first insulator layer, removing portions of the first semiconductor layer to form a first fin disposed on the first insulator layer and removing portions of the second semiconductor layer to form a second fin disposed on the second insulator layer, and forming a first gate stack over a portion of the first fin and forming a second gate stack over a portion of the second fin.
US09190462B2	Semiconductor device and method for low resistive thin film resistor interconnect The invention relates to a semiconductor device and a method of manufacturing an electronic device. A first conductive layer (first metal interconnect layer) is deposited. There is an insulating layer (first intermetal dielectric) layer deposited. A resistive layer is deposited on top of the insulating layer and structured in order to serve as a thin film resistor. A second insulating layer (second intermetal dielectric) is then deposited on top of the resistive layer. A first opening is etched into the insulating layers (first and second intermetal dielectric) down to the first conductive layer. A second opening is etched into the insulating layers (first and second intermetal dielectrics) down to the first conductive layer. A cross-sectional plane of the second opening is arranged such that it at least partially overlaps the resistive layer of the thin film resistor in a first direction.
US09190460B2	Organic light emitting device and display unit including the same An organic light emitting device includes a first electrode and a second electrode, an organic layer including a light emitting layer between the first electrode and the second electrode, and an insulating film covering a rim of the first electrode from a surface thereof to a side surface thereof, and having an internal wall surface being in contact with the organic layer, and one or more corner sections in the internal wall surface with a ridge line thereof in parallel with the surface of the first electrode.
US09190458B2	Method and apparatus for providing a window with an at least partially transparent one side emitting OLED lighting and an IR sensitive photovoltaic panel Embodiments of the subject invention relate to a method and apparatus for providing a apparatus that can function as a photovoltaic cell, for example during the day, and can provide solid state lighting, for example at night. The apparatus can therefore function as a lighting window. An embodiment can integrate an at least partially transparent one-side emitting OLED and a photovoltaic cell. The photovoltaic cell can be sensitive to infrared light, for example light having a wavelength greater than 1 μm. The apparatus can be arranged such that the one direction in which the OLED emits is toward the inside of a building or other structure and not out into the environment.
US09190457B2	Organic light-emitting display device and method of manufacturing the same An organic light-emitting display device includes a substrate, a plurality of pixel electrodes arranged in a matrix on the substrate, and an organic common layer covering the pixel electrodes. The pixel electrodes include a plurality of first pixel electrodes, a plurality of second pixel electrodes, and a plurality of third pixel electrodes. An n-th pixel column includes the second pixel electrodes and the third pixel electrodes arranged alternately, an (n+1)-th pixel column which is adjacent to the n-th pixel column includes the first pixel electrodes, and an (n+2)-th pixel column which is adjacent to the (n+1)-th pixel column includes the second pixel electrodes and the third pixel electrodes arranged alternately, wherein n is a natural number. One of the second and third pixel electrodes is disposed in the n-th pixel column in a row and the other one of the second and third pixel electrodes is disposed in the (n+2)-th pixel column in the same row.
US09190455B2	Semiconductor memory device and production method thereof A semiconductor memory device according to an embodiment has a memory cell array including: a plurality of lower wirings extending in the first direction; a plurality of upper wirings extending in the second direction, the upper wirings placed above the plurality of lower wirings; a plurality of memory cells provided at respective crossings of the plurality of lower wirings and the plurality of upper wirings; and an interlayer insulating film provided between the plurality of memory cells adjacent in the second direction, and the device is characterized in that the upper wiring includes: an upper firing first section deposited on the memory cell; and an upper wiring second section deposited on the interlayer insulating film, the upper wiring second section larger in crystal grain size than the upper wiring first section, and an upper surface of the memory cell is lower than an upper surface of the interlayer insulating film.
US09190453B2	Magnetic memory and manufacturing method thereof According to one embodiment, a magnetic memory including an isolation region with an insulator in a trench is disclosed. The isolation region defines active areas extending in a 1st direction and having 1st and 2nd active areas, an isolation region extending in a 2nd direction perpendicular to the 1st direction exists between the 1st and 2nd active areas. 1st and 2nd word lines extending in the 2nd direction are buried in a surface of semiconductor substrate. 1st and 2nd select transistors connected to the word lines are on the 1st active area. 1st and 2nd variable resistance elements connected to drain regions of the 1st and 2nd select transistors are on the 1st active area.
US09190451B2	Light emitting diode array and method for manufacturing the same An LED array includes a substrate, protrusions formed on a top surface of the substrate, and LEDs formed on the top surface of the substrate and located at a top of the protrusions. The LEDs are electrically connected with each other. Each LED includes a connecting layer, an n-type GaN layer, an active layer, and a p-type GaN layer formed on a top of the protrusions in sequence. A bottom surface of the n-type GaN layer connecting the connecting layer has a roughened exposed portion. The bottom surface of the n-type GaN layer has an N-face polarity.
US09190449B2	Image pickup apparatus including signal holding units An image pickup apparatus includes a plurality of pixels each including a photoelectric conversion unit, an amplification element configured to amplify a signal based on a signal charge generated in the photoelectric conversion unit, and a first signal holding unit and a second signal holding unit located at a stage following the first signal holding unit and arranged on an electric path between the photoelectric conversion unit and an input node of the amplification element, in which a coverage by a light-shielding member of the first signal holding unit is lower than a coverage by a light-shielding member of the second signal holding unit.
US09190448B2	Imaging device and operation method thereof Provided is an imaging device that can correct an output value of a pixel circuit. The imaging device includes a pixel circuit, a current detection circuit, an A/D converter, one or more memory circuit portions, and an arithmetic circuit portion. The pixel circuit includes a transistor, a charge accumulation portion, and a light-receiving element. The memory circuit portion includes a first look-up table, a second look-up table, and a region where image data output from the arithmetic circuit portion is stored. The first look-up table stores data of potentials of the charge accumulation portion, which depends on the intensity of light. The second look-up table stores output data of the transistor, which depends on the potentials of the charge accumulation portion.
US09190443B2	Low profile image sensor A sensor package comprising a host substrate with opposing first and second surfaces, an aperture extending therethrough, circuit layers, and first contact pads. A second substrate at least partially in the aperture has opposing first and second surfaces, a plurality of photo detectors, second contact pads at the second substrate first surface and electrically coupled to the photo detectors, and trenches formed into the second substrate first surface, conductive traces extending from the second contact pads and into the trenches. A third substrate has a first surface mounted to the first surface of the second substrate. The third substrate includes a cavity formed into its first surface and positioned over the photo detectors. Electrical connectors connect the first contact pads and conductive traces. A lens module is mounted to the host substrate for focusing light through the third substrate and onto the photo detectors.
US09190440B2	Image sensor and method for fabricating the same An age sensor including a transfer gate formed on a substrate, a photoelectric conversion region formed on a side of the transfer gate, a floating diffusion region with a trench formed on another side of the transfer gate, a barrier layer which covers a bottom of the trench and a conducting layer, which is gap-filled in the trench.
US09190437B2	Semiconductor detection apparatus capable of switching capacitance among different levels, and detection system including the apparatus A detection apparatus includes a transistor disposed on a substrate, a conversion element disposed above the transistor and connected to the transistor, a capacitor connected in parallel with conversion element to the transistor, the capacitor including, between the substrate and the conversion element, an ohmic contact part connected to the conversion element, a semiconductor part connected to the ohmic contact part, and an electrically conductive part disposed at a location opposite to the semiconductor part and the ohmic contact part via an insulating layer, and a potential supplying unit configured to selectively supply a first electric potential to the electrically conductive part to accumulate charge carriers in the semiconductor part and a second electric potential to the electrically conductive part to deplete the semiconductor part. The detection apparatus configured in the above-described manner is capable of controlling pixel capacitance thereby achieving a high signal-to-noise ratio.
US09190435B2	Shared active pixel sensor A shared active pixel sensor with a shared photodiode, a shared sense node, a transfer gate, a shared reset gate and a shared source follower gate is disclosed. A shared photodiode includes at least a first signal node and a second signal node. A shared sense node electrically connected to the shared photodiode. A transfer gate disposed between the first signal node and the shared sense node to control the first signal node and the shared sense node. A shared reset gate is electrically connected to the shared sense node and a shared source follower gate reads a photocurrent from the shared photodiode.
US09190431B2	Thin-film transistor array substrate and method of fabricating the same A thin-film transistor (TFT) array substrate comprises: a substrate; an active layer and a capacitor first electrode formed on the substrate; a gate insulating film formed on the substrate, the active layer and the capacitor first electrode; a gate electrode formed on the gate insulating film corresponding to the active layer and a capacitor second electrode formed on the gate insulating film corresponding to the capacitor first electrode; an interlayer insulating film formed on the gate insulating film, the gate electrode, and the capacitor second electrode; and a pixel electrode, a source electrode, and a drain electrode formed on the interlayer insulating film; wherein at least one of the source electrode and the drain electrode is formed on the pixel electrode. A method of fabricating the TFT array substrate is also disclosed.
US09190426B2	Display device and method of manufacturing the same A display device includes a substrate, an active layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a clad layer, a source electrode, and a drain electrode. The active layer is disposed on the substrate. The gate insulation layer is disposed on the active layer. The gate electrode is disposed on the gate insulation layer. The interlayer insulation layer is disposed on the gate electrode. A dielectric constant of the interlayer insulation layer is less than a dielectric constant of the gate insulation layer. The clad layer is disposed on the interlayer insulation layer. The source and drain electrodes are disposed on the clad layer.
US09190425B2	Semiconductor device, and display device and electronic device utilizing the same A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning OFF a diode-connected transistor 101, the gate terminal of a first transistor 102 is brought into a floating state. At this time, the first transistor 102 is ON and its gate-source voltage is stored in a capacitor. Then, when a potential at the source terminal of the first transistor 102 is increased, a potential at the gate terminal of the first transistor 102 is increased as well by bootstrap effect. As a result, the amplitude of an output signal is prevented from being decreased.
US09190422B2	Display device and method of manufacturing the same A display device and a method of manufacturing the same are disclosed, in which a sensing electrode for sensing a touch of a user is built in a display panel, whereby a separate touch screen is not required on an upper surface of the display panel and thus thickness and manufacturing cost are reduced.
US09190418B2	Junction butting in SOI transistor with embedded source/drain After forming source/drain trenches within a top semiconductor layer of a semiconductor-on-insulator (SOI) substrate, portions of the trenches adjacent channel regions of a semiconductor structure are covered either by sacrificial spacers formed on sidewalls of the trenches or by photoresist layer portions. The sacrificial spacers or photoresist layer portions shield portions of the top semiconductor layer underneath the trenches from subsequent ion implantation for forming junction butting. The ion implantation regions thus are confined only in un-shielded, sublayered portions of the top semiconductor layer that are away from the channel regions of the semiconductor structure. The width of the ion implantation regions are controlled such that the implanted dopants do not diffuse into the channel regions during subsequent thermal cycles so as to suppress the short channel effects.
US09190410B2	Semiconductor devices A method of manufacturing a semiconductor device includes forming first and second gate structures on a substrate in first and second regions, respectively, forming a first capping layer on the substrate by a first high density plasma process, such that the first capping layer covers the first and second gate structures except for sidewalls thereof, removing a portion of the first capping layer in the first region, removing an upper portion of the substrate in the first region using the first gate structure as an etching mask to form a first trench, and forming a first epitaxial layer to fill the first trench.
US09190406B2	Fin field effect transistors having heteroepitaxial channels Disposable gate structures are formed over semiconductor material portions, and source and drain regions can be formed in the semiconductor material portions. After formation of a planarization dielectric layer, one type of disposable gate structure can be removed selective to at least another type of disposable gate structure employing a patterned hard dielectric mask layer. After recessing a surface portion of a body portion, a heteroepitaxial channel portion is formed on the remaining physically exposed portion of the body portion by selective epitaxy of a semiconductor material different from the semiconductor material of the remaining body portion. A plurality of types of heteroepitaxial channel portions can be formed in different types of semiconductor devices. Replacement gate structures can be formed in the gate cavities to provide field effect transistors having different threshold voltages.
US09190405B2	Digital circuit design with semi-continuous diffusion standard cell A CMOS device including a standard cell includes first and second transistors with a gate between the first and second transistors. One active region extends between the first and second transistors and under the gate. In a first configuration, when drains/sources of the first and second transistors on the sides of the gate carry the same signal, the drains/sources are connected together and to the gate. In a second configuration, when a source of the first transistor on a side of the gate is connected to a source voltage and a drain/source of the second transistor on the other side of the gate carries a signal, the source of the first transistor is connected to the gate. In a third configuration, when sources of the first and second transistors on the sides of the gate are connected to a source voltage, the gate floats.
US09190404B2	Semiconductor device and method of fabricating the same Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.
US09190400B2	Method and system for heterogeneous substrate bonding for photonic integration A method of fabricating a composite integrated optical device includes providing a substrate comprising a silicon layer, forming a waveguide in the silicon layer, and forming a layer comprising a metal material coupled to the silicon layer. The method also includes providing an optical detector, forming a metal-assisted bond between the metal material and a first portion of the optical detector, forming a direct semiconductor-semiconductor bond between the waveguide, and a second portion of the optical detector.
US09190399B2	Thermally enhanced three-dimensional integrated circuit package Embodiments of the present invention disclose a semiconductor structure and method for increasing thermal dissipation in a three-dimensional integrated circuit package. In certain embodiments, the semiconductor structure comprises a logic die or a processor die attached to a substrate; a memory die stack attached to the logic die or the processor die; and a first lid attached to a first side of the logic or the processor die. The semiconductor structure further comprises a second lid attached to a second side of the memory die stack; a first heat sink attached to the first lid; and a second heat sink attached to the second lid.
US09190396B2	Low-impedance power delivery for a packaged die A system includes a semiconductor die mounted on a packaging substrate, a signal redistribution layer that is formed within the packaging substrate, a power plane that is formed on a surface of the packaging substrate, and a ground plane that is formed within the packaging substrate. The power plane couples the semiconductor die to a capacitor disposed on the packaging substrate and the ground plane is disposed between the power plane and the signal redistribution layer. An advantage of the disclosed system is that loop inductance between power and ground paths to a packaged semiconductor die is reduced, thereby lowering the impedance of the packaged semiconductor die system and signal noise associated with the packaged semiconductor system.
US09190393B1	Low parasitic capacitance semiconductor device package A semiconductor device package includes a substrate, a transistor, and a lead frame disposed on a side of the substrate opposite to the transistor. The transistor is disposed on the substrate, and includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, a first drain pad, a source plug, and a drain plug. The source and the drain electrodes are disposed on the active layer. An orthogonal projection of the source electrode on the active layer forms a source region. The first insulating layer covers at least a portion of the source electrode and at least a portion of the drain electrode. The first source pad and the first drain pad are disposed on the first insulating layer. An orthogonal projection of the first source pad on the active layer forms a source pad region overlaps the drain region.
US09190392B1	Three-dimensional stacked structured ASIC devices and methods of fabrication thereof A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.
US09190389B2	Chip package with passives A chip package device includes an electrically conducting chip carrier, at least one semiconductor chip attached to the electrically conducting chip carrier, and an insulating laminate structure embedding the chip carrier, the at least one semiconductor chip and a passive electronic device. The passive electronic device includes a first structured electrically conducting layer, the first structured electrically conducting layer extending over a surface of the laminate structure.
US09190385B2	Thin plastic leadless package with exposed metal die paddle A method of making electronic packages includes providing a leadframe strip that includes a plurality of leadframes, wherein the leadframes comprise a plurality of leads, etching a surface of each of the leadframes to form an opening, wherein each of the leads has a lead tip that connects to a die paddle within the opening, isolating each of the leads from the die paddle, adhering a tape to a bottom side of the leadframe strips, leads, and die paddle, attaching a die to the die paddle, placing ball bumps on each of the lead tips, and connecting the die to the ball bumps. The electronic package includes a leadframe having a plurality of leads, wherein each of the leads has a lead tip, an opening formed within the leadframe, a die paddle that is disposed within the opening and is isolated from each of the lead tips, a tape that is adhered to a back side of the leadframe, leads, and die paddle, and a die, wherein the die is attached to the die paddle and is connected by wires to a bump disposed on each of the lead tips.
US09190384B2	Preform including a groove extending to an edge of the preform Embodiments include but are not limited to apparatuses and systems including a die or a preform including at least one groove configured to extend from at least one via of the die to an edge of the die. Other embodiments may be described and claimed.
US09190377B2	Metal coating for indium bump bonding A process of making efficient metal bump bonding with relative low temperature, preferably lower than the melting point of Indium, is described. To obtaining a lower processing temperature (preferred embodiments have a melting point of <100° C.), a metal or alloy layer is deposited on the indium bump surface. Preferably, the material is chosen such that the metal or alloy forms a passivation layer that is more resistant to oxidation than the underlying indium material. The passivation material is also preferably chosen to form a low melting temperature alloy with indium at the indium bump surface. This is typically accomplished by diffusion of the passivation material into the indium to form a diffusion layer alloy. Various metals, including Ga, Bi, Sn, Pb and Cd, that can be used to form a binary to quaternary low melting point alloy with indium. In addition, diffusion of metal such as Sn, Sn—Zn into Ga—In alloy; Sn, Cd, Pb—Sn into Bi—In alloy; Cd, Zn, Pb, Pb—Cd into Sn—In alloy can help adjust the melting point of the alloy.
US09190375B2	Solder bump reflow by induction heating A method of applying inductive heating to join an integrated circuit chip to an electrical substrate using solder bumps including applying a magnetic field to a magnetic liner in thermal contact with a solder bump on the integrated circuit chip. The magnetic field causes Joule heating in the magnetic liner sufficient to melt the solder bump, which has a lower portion embedded in a first dielectric layer and an upper portion at least partially embedded in a second dielectric layer. The lower portion is in electrical contact with a conductive pad, the first dielectric layer is above the conductive pad and the second dielectric layer is on top of the first dielectric layer. The duration of application of the magnetic field is controlled to achieve a joining temperature that is approximately halfway between the storage and operating temperatures of the integrated circuit chip.
US09190371B2	Self-organizing network with chip package having multiple interconnection configurations In general, embodiments of the present invention provide a chip package with multiple TSV configurations. Specifically, the chip package typically includes a backend layer (e.g., metal interconnect layer); a substrate coupled to the backend layer; a set (at least one) of backend side interconnects extending (e.g., angularly) from a side surface of the backend layer to a bottom surface of the backend layer; a set of optional vertical TSVs extending from a top surface of the backend layer through the substrate; and a network organizer positioned in the substrate organizer for handling communications made using the set of backend side interconnects and the set of vertical TSVs. A set of connections (e.g., controlled collapse chip connections (C4s) can be positioned adjacent to any of the vias to provide connectively to other hardware elements such as additional chip packages, buses, etc. Among other things, the use of backend side interconnects allows maximum surface area of the chip package to be utilized and provides increased reliability. These advantages are especially realized when used in conjunction with vertical TSVs.
US09190360B2	Photoresist collapse method for forming a physical unclonable function An organic material layer is lithographically patterned to include a linear array portion of lines and spaces. In one embodiment, the organic material layer can be an organic planarization layer that is patterned employing a photoresist layer, which is consumed during patterning of the organic planarization layer. Volume expansion of the organic planarization layer upon exposure to a halogen-including gas causes portions of the linear array to collapse at random locations. In another embodiment, the height of the photoresist layer is selected such that the linear array portion of the photoresist layer is mechanically unstable and produces random photoresist collapses. The pattern including random modifications due to the collapse of the organic material layer is transferred into an underlying layer to generate an array of conductive material lines with random electrical disruption of shorts or opens. The structure with random shorts can be employed as a physical unclonable function.
US09190356B2	Semiconductor devices with close-packed via structures having in-plane routing and method of making same The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
US09190355B2	Multi-use substrate for integrated circuit A sub-assembly for a packaged integrated circuit (IC) device has a planar substrate. The substrate's top side has multiple sets electrically connected bond posts arranged in corresponding nested contour zones. Each contour zone includes a different bond post of each bond-post set. The bottom side has a different set of pad connectors electrically connected to the each top-side bond-post set. The sub-assembly can be used for different IC packages having IC dies of different sizes, with different contours of bond posts available for electrical connection depending on the size of the IC die.
US09190354B2	Semiconductor device and manufacturing method of the same A semiconductor package includes a semiconductor chip, a protruding pillar electrode provided on the semiconductor chip, and resin covering the semiconductor chip and the pillar electrode. The resin has a concave part and exposes a front edge portion of the pillar electrode from the resin at the bottom face of the concave part. The front edge portion of the pillar electrode is exposed from the concave part of the resin, which makes it possible to suppress increase in the height of the pillar electrode and to form the pillar electrodes having fine patterns or a narrow pitch.
US09190353B2	Lead frame and substrate semiconductor package A semiconductor chip package includes a lead frame having a die paddle, leads surrounding the paddle and a central window through the paddle. A substrate has a base side and a superior side. A peripheral portion of the base side is secured to the paddle and a central portion of the base side is exposed through the central window. A semiconductor chip is secured to the superior side of the substrate. The semiconductor chip is electrically connected to the plurality of leads and the substrate. A mold compound covers at least portions of the lead frame, the substrate and the semiconductor chip. The chip package can be electrically connected to other devices or a circuit board by way of the leads and BGA pads of the substrate exposed in the central window.
US09190348B2	Scheme for connector site spacing and resulting structures A system and method for preventing cracks in a passivation layer is provided. In an embodiment a contact pad has a first diameter and an opening through the passivation layer has a second diameter, wherein the first diameter is greater than the second diameter by a first distance of about 10 μm. In another embodiment, an underbump metallization is formed through the opening, and the underbump metallization has a third diameter that is greater than the first diameter by a second distance of about 5 μm. In yet another embodiment, a sum of the first distance and the second distance is greater than about 15 μm. In another embodiment the underbump metallization has a first dimension that is less than a dimension of the contact pad and a second dimension that is greater than a dimension of the contact pad.
US09190347B2	Die edge contacts for semiconductor devices A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like.
US09190344B2	Liquid-cooled-type cooling device A casing of a liquid-cooled-type cooling device has a peripheral wall including mutually facing right and left side walls. A cooling-liquid inlet is formed at one end of the right side wall, and a cooling-liquid outlet is formed at an end of the left side wall corresponding to the other end of the right side wall. A parallel-flow-channel section is provided within the casing to be located between the left and right side walls and between the cooling-liquid inlet and outlet and includes flow channels through which cooling liquid flows. Internal regions of the casing located upstream and downstream of the parallel-flow-channel section serve as inlet and outlet header sections, respectively. The cross-sectional area of the inlet header section reduces from the cooling-liquid inlet toward the left side wall. The outlet and inlet header sections are asymmetric in shape with respect to the width direction of the parallel-flow-channel section.
US09190343B1	Semiconductor device with tube based heat spreader A packaged semiconductor device having an integrated circuit (IC) die, a flexible tube, and a metal slug. During assembly, a first end of the tube is mounted on a surface of the IC die and a second end of the tube extends away from the die surface. The exposed portions of the surface of the IC die are encased in a molding compound, which also encases the perimeter of the tube. After molding, the tube may be filled with metal to improve conduction of heat away from the die top. If the tube is formed of a soft material like rubber then the tube will not damage the die top during attachment thereto.
US09190335B2	Apparatus and method for evaluating optical properties of LED and method for manufacturing LED device An optical property evaluation apparatus includes: a light conversion filter converting light emitted from an LED chip or a bare LED package, which is to be evaluated, into a different wavelength of light, and emitting a specific color of light; and an optical property measurement unit receiving the specific color of light emitted from the light conversion filter and measuring the optical properties of the received light.
US09190334B2	SOI integrated circuit comprising adjacent cells of different types An integrated circuit on a semiconductor substrate has logic gates comprising FDSOI-type transistors made on said substrate, including at least one first transistor comprising a gate with a first work function, and including a transistor comprising a second work function, a memory including memory cells, each memory cell comprising FDSOI type transistors, including at least one third nMOS transistor with a gate presenting a third work function, the third transistor comprising a buried insulating layer and a ground plane at least one fourth pMOS transistor with a gate presenting said third work function, the fourth transistor comprising a buried insulating layer and a ground plane, the ground planes of the third and fourth transistors being made in a same well separating these ground planes from said substrate.
US09190331B2	Semiconductor device and manufacturing method thereof A non-planar JFET device having a thin fin structure is provided. A fin is formed projecting upwardly from or through a top surface of a substrate, where the fin has a first semiconductor layer portion formed from a first semiconductor material of a first conductivity type. The first semiconductor layer portion has a source region and a drain region, a channel region extending between the source region and the drain region. Two or more channel control regions are formed adjoining the channel region for generating charge depletion zones at and extending into the channel region for thereby controlling current conduction through the channel region. A gate is provided so as to adjoin and short together the at least two channel control regions from the outer sides of the channel control regions.
US09190330B2	Semiconductor device and manufacturing method thereof A method of manufacturing a semiconductor device is provided. The method includes providing a fin protruding upwardly from or through a surface of a substrate, forming a to-be-sacrificed dummy gate enwrapping a first portion of the fin, forming a first insulating material layer so as to at least cover an exposed second portion of the fin, and selectively removing the dummy gate to thereby expose the first portion of the first semiconductor layer portion that was enwrapped by the dummy gate. The method further includes introducing, into the exposed portion of the first semiconductor layer portion, one or more dopants including a conductivity type reversing dopant, so as to form a channel region having a first conductivity type and at least two opposed channel control regions having a second conductivity type, wherein the channel control regions further comprise a portion formed above and adjoining a top of the channel region.
US09190328B2	Formation of fins having different heights in fin field effect transistors A method includes forming at least two fins of a fin field effect transistor (finFET) on a substrate and forming an insulator layer on the at least two fins. A portion of the insulator layer at a top of a first fin of the at least two fins is removed and a sacrificial layer is formed in a top end of the first fin. The method includes etching the sacrificial layer to remove the sacrificial layer to form the first fin having a different fin height than a second fin of the at least two fins.
US09190326B2	Semiconductor device having a post feature and method of manufacturing the same An integrated circuit device and methods of manufacturing the same are disclosed. In an example, integrated circuit device includes a gate structure disposed over a substrate; a source region and a drain region disposed in the substrate, wherein the gate structure interposes the source region and the drain region; and at least one post feature embedded in the gate structure.
US09190325B2	TSV formation A device includes a substrate having a front side and a backside, the backside being opposite the front side. An isolation layer is disposed on the front side of the substrate, wherein first portions of isolation layer and the substrate are in physical contact. A through substrate via (TSV) extends from the front side to the backside of the substrate. An oxide liner is on a sidewall of the TSV. The oxide liner extends between second portions of the substrate and the isolation layer. A dielectric layer having a metal pad is disposed over the isolation layer on the front side of the substrate. The metal pad and the TSV are formed of a same material.
US09190324B2	Manufacturing method for micro bump structure A manufacturing method for a micro bump structure includes the following steps as follows. A substrate is provided and a under bump metallurgy (UBM) is formed on the substrate for accommodating a solder ball. A buffer layer is disposed on the substrate and then the solder ball is disposed on the UBM. Finally, the solder ball is grinded in order get the height reduced to a predetermined height.
US09190320B2	Devices including metal-silicon contacts using indium arsenide films and apparatus and methods Described are apparatus and methods for forming films comprise indium and arsenic. In particular, these films may be formed in a configuration of two or more chambers under “load lock” conditions. These films may include additional components as dopants, such as aluminum and/or gallium. Such films can be used in metal/silicon contacts having low contact resistances. Also disclosed are devices including the films comprising indium arsenide.
US09190317B2	Interconnection structures and fabrication method thereof A method is provided for fabricating an interconnection structure. The method includes providing a substrate having certain semiconductor devices, a metal layer electrically connecting with the semiconductor devices, and a barrier layer on the metal layer. The method also includes forming a dielectric layer on the substrate; and forming an antireflective coating on the dielectric layer. Further, the method includes forming a second mask having a first pattern corresponding to a through hole in the dielectric layer, wherein the antireflective coating significantly reduces lithographic light reflection to avoid photoresist residue in the first pattern; and forming a through hole by etching the dielectric layer and the antireflective coating covering the dielectric layer using the second mask as an etching mask. Further, the method also includes forming a via by filling the through hole with a conductive material.
US09190316B2	Low energy etch process for nitrogen-containing dielectric layer A stack that includes, from bottom to top, a nitrogen-containing dielectric layer, an interconnect level dielectric material layer, and a hard mask layer is formed on a substrate. The hard mask layer and the interconnect level dielectric material layer are patterned by an etch. Employing the patterned hard mask layer as an etch mask, the nitrogen-containing dielectric layer is patterned by a break-through anisotropic etch, which employs a fluorohydrocarbon-containing plasma to break through the nitrogen-containing dielectric layer. Fluorohydrocarbon gases used to generate the fluorohydrocarbon-containing plasma generate a carbon-rich polymer residue, which interact with the nitrogen-containing dielectric layer to form volatile compounds. Plasma energy can be decreased below 100 eV to reduce damage to physically exposed surfaces of the interconnect level dielectric material layer.
US09190314B2	Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate A substrate is treated by means of at least one pulse of a luminous flux of determined wavelength. The substrate comprises an embedded layer that absorbs the luminous flux independently of the temperature. The embedded layer is interleaved between a first treatment layer and a second treatment layer. The first treatment layer has a coefficient of absorption of luminous flux that is low at ambient temperature and rises as the temperature rises. The luminous flux may be applied in several places of a surface of the first layer to heat regions of the embedded layer and generate a propagating thermal front in the first layer opposite the heated regions of the embedded layer, which generate constraints within the second layer.
US09190312B2	Extremely low temperature rotary union A chuck assembly has a wafer chuck attached to a shaft that has a passage defined therewithin. The chuck assembly also has a seal module that has a rotatable assembly and a fixed assembly. The rotatable assembly is disposed around and anchored to the shaft and has a spacer, a rotatable collar, a rotatable diaphragm, and a rotatable seal ring connected to the rotatable collar through the diaphragm with a leak-tight seal. The fixed assembly is disposed around the spacer and has a fixed collar and a fixed seal ring that is sealed to the fixed collar with a leak-tight seal. The fixed collar has a passage defined therewithin that has an opening that connects through the spacer to the passage defined within the shaft. The chuck assembly further includes a housing, to which the fixed assembly is fastened, that may be affixed to a base.
US09190310B2	Grounded chuck Improved reduction of static charge in spin chucks is achieved by providing one or more pin assemblies which are formed from chemically inert material and which include an electrically conductive inlay.
US09190306B2	Dual arm vacuum robot A dual arm robot for a substrate processing system includes a base and a first arm having extended and retracted positions. Each of the first and second arms includes a first arm portion having one end rotatably connected to the base, a second arm portion having one end rotatably connected to another end of the first arm portion, and an end effector having one end rotatably connected to another end of the second arm portion and another end configured to support first and second substrates, respectively. When the first and second arms are arranged in the retracted position, connections between the second arm portions and the end effectors are located over or under the second and first substrates, respectively, and the first substrate is not located over or under the second substrate.
US09190305B2	System and method for managing information about wafer carrier in buffer The wafer carrier information management system includes a reader unit for reading wafer carrier information from a transmitting/receiving unit attached to a wafer carrier in a buffer, and a reader unit controller for collecting the wafer carrier information from the reader unit. The system may further include a buffer controller for collecting the wafer carrier information from the reader unit controller, and a wafer manager for receiving the wafer carrier information from the buffer controller.
US09190304B2	Dynamic storage and transfer system integrated with autonomous guided/roving vehicle A workpiece container storage and handling system includes a base, a number of wheels connected to the base, and a container handling system connected to the base. The wheels provide for movement of the base. The container handling system is defined to hold at least two containers in a vertically overlying orientation relative to each other. The container handling system is defined to provide for controlled vertical travel of the at least two containers in unison relative to the base. Also, the container handling system is defined to provide for controlled and independent horizontal travel of each of the at least two containers relative to the base.
US09190301B2	Wafer separating apparatus and wafer separating method A wafer separating apparatus can separate a plurality of wafers bonded to a slicing base with an adhesive from the slicing base. The apparatus includes: a water tank configured to store therein water; a retainer configured to retain the slicing base; a first nozzle configured to apply a jet of water to side of a wafer of the wafers; and a tray configured to contain a wafer separated from the slicing base, wherein the tray is disposed inside the water tank.
US09190297B2	Semiconductor device and method of forming a stackable semiconductor package with vertically-oriented discrete electrical devices as interconnect structures A semiconductor device has a substrate and first semiconductor die to the substrate. A plurality of vertically-oriented discrete electrical devices, such as a capacitor, inductor, resistor, diode, or transistor, is mounted over the substrate in proximity to the first semiconductor die. A first terminal of the discrete electrical devices is connected to the substrate. A plurality of bumps is formed over the substrate adjacent to the discrete electrical devices. An encapsulant is deposited over and between the first semiconductor die and substrate. A portion of the bumps and a second terminal of the discrete electrical devices is exposed from the encapsulant. An interconnect structure is formed over a surface of the substrate opposite the first semiconductor die. The semiconductor devices are stackable and electrically connected through the substrate, discrete electrical devices, and bumps. A heat spreader or second semiconductor die can be disposed between the stacked semiconductor devices.
US09190295B2	Package configurations for low EMI circuits An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.
US09190294B2	Methods and apparatus for separating a substrate This invention relates to slicing a thin semiconductor substrate from side wall into two substrates of half thickness. The substrate slicing process involves a laser irradiation step. The apparatus for substrate slicing comprises two opposite-facing substrate chucks, with a gap in between for the substrate to pass through.The present invention is further directed to methods and apparatus of separating a continuous thin layer of materials from side wall of a rotating ingot. It can be accomplished by a laser irradiation on the ingot side wall from a tangential direction. A film can be deposited on/bonded to the ingot side wall prior to the separation of the thin film layers. The resulting thin layer of materials can be pulled away from the ingot by a substrate chuck.
US09190293B2	Even tungsten etch for high aspect ratio trenches Methods of evenly etching tungsten liners from high aspect ratio trenches are described. The methods include ion bombardment of a patterned substrate having high aspect ratio trenches. The ion bombardment includes fluorine-containing ions and the ion bombardment may be stopped before breaking through the horizontal liner portion outside the trenches but near the opening of the trenches. The methods then include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasmas effluents react with exposed surfaces and remove tungsten from outside the trenches and on the sidewalls of the trenches. The plasma effluents pass through an ion suppression element positioned between the remote plasma and the substrate processing region.
US09190292B2	Manufacturing process of gate stack structure with etch stop layer A manufacturing process of an etch stop layer is provided. The manufacturing process includes steps of providing a substrate; forming a gate stack structure over the substrate, wherein the gate stack structure at least comprises a dummy polysilicon layer and a barrier layer; removing the dummy polysilicon layer to define a trench and expose a surface of the barrier layer; forming a repair layer on the surface of the barrier layer and an inner wall of the trench; and forming an etch stop layer on the repair layer. In addition, a manufacturing process of the gate stack structure with the etch stop layer further includes of forming an N-type work function metal layer on the etch stop layer within the trench, and forming a gate layer on the N-type work function metal layer within the trench.
US09190291B2	Fin-shaped structure forming process A fin-shaped structure forming process includes the following step. A first mandrel and a second mandrel are formed on a substrate. A first spacer material is formed to entirely cover the first mandrel, the second mandrel and the substrate. The exposed first spacer material is etched to form a first spacer on the substrate beside the first mandrel. A second spacer material is formed to entirely cover the first mandrel, the second mandrel and the substrate. The second spacer material and the first spacer material are etched to form a second spacer on the substrate beside the second mandrel and a third spacer including the first spacer on the substrate beside the first mandrel. The layout of the second spacer and the third spacer is transferred to the substrate, so a second fin-shaped structure and a first fin-shaped structure having different widths are formed respectively.
US09190287B2	Method of fabricating fin FET and method of fabricating device In fin FET fabrication, side walls of a semiconductor fin formed on a substrate have certain roughness. Using such fins having roughness may induce variations in characteristics between transistors due to their shapes or the like. An object of the present invention is to provide a fin FET fabrication method capable of improving device characteristic by easily reducing the roughness of the side walls of fins after formation. In one embodiment of the present invention, side walls of a semiconductor fin are etched by an ion beam extracted from a grid to reduce the roughness of the side walls.
US09190275B2	Bonding substrates with electrical connection through insulating film A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
US09190272B1	Semiconductor device and method of fabricating the same Provided is a semiconductor device and method of fabricating the same. The device includes a substrate including a first region and a second region, a first gate pattern on the first region, a second gate pattern on the second region, and an interlayer insulating layer enclosing the first and second gate patterns. The first gate pattern including a first gate insulating layer and a first gate electrode, the second gate pattern including a second gate insulating layer and a second gate electrode, the first gate insulating layer is thicker than the second gate insulating layer, and a top width of the second gate pattern is larger than a bottom width thereof.
US09190269B2	Silicon-on-insulator high power amplifiers Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.
US09190266B1	High capacitance density gate dielectrics for III-V semiconductor channels using a pre-disposition surface treatment involving plasma and TI precursor exposure A method of depositing a uniform dielectric thin film is provided that includes pre-cleaning a substrate surface, using a deposition apparatus, by exposing the substrate to a plasma, where the plasma can include a nitrogen plasma, a hydrogen plasma, an ammonia plasma, or a plasma containing nitrogen-hydrogen radicals in a plasma chamber of the deposition apparatus, where the substrate comprises a semiconductor of type III-V, and exposing the pre-cleaned substrate surface, using the deposition apparatus, to alternating cycles of the plasma, using the plasma chamber, and pulses of a precursor containing Ti, using a deposition chamber of the deposition apparatus, where less than 10% TiN or Ti—O—N bonding is present on said substrate surface, where a uniform substantially TiO2 dielectric thin film is formed on said substrate.
US09190265B2	Memory devices and formation methods A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.
US09190261B2	Layer alignment in FinFET fabrication Methods for aligning layers more accurately for FinFETs fabrication. An embodiment of the method, comprises: forming a plurality of dummy line features and a plurality of spacer elements according to a first pattern; removing portions of the plurality of spacer elements and portions of the plurality of dummy line features according to a second pattern; defining a reference area by removing some unwanted spacer elements according to a third pattern; aligning a front-end-of-line (FEOL) layer in X direction with the reference area defined by the third pattern; and aligning the FEOL layer in Y direction with the plurality of spacer elements defined by the first pattern. The reference area may be an active area or an alignment mask. The plurality of dummy line features and the plurality of spacer elements are formed on a substrate. The FEOL layer may be a poly layer or a shield layer.
US09190256B2	MALDI imaging and ion source An ion source for a mass spectrometer is disclosed comprising a lens and mirror arrangement which focuses a laser beam onto the upper surface of a target substrate. The lens has an effective focal length ≦300 mm. The laser beam is directed onto the target substrate at an angle θ with respect to the perpendicular to the target substrate, wherein θ≦3°. One or more ion guides receive ions released from the target substrate and onwardly transmit the ions along an ion path which substantially bypasses the lens and mirror.
US09190253B2	Systems and methods of suppressing unwanted ions Certain embodiments described herein are directed to systems including a cell downstream of a mass analyzer. In some instances, the cell is configured as a reaction cell, a collision cell or a reaction/collision cell. The system can be used to suppress unwanted ions and/or remove interfering ions from a stream comprising a plurality of ions.
US09190251B2	Pre-scan for mass to charge ratio range A method of mass spectrometry is disclosed comprising performing a first analysis of a sample of ions wherein one or more parameters are scanned and/or ions are sorted according to one or more parameters during the first analysis. One or more ranges of interest of the one or more parameters from the first analysis are then automatically determined. A second subsequent analysis of the sample of ions is then automatically performed, wherein the second analysis is restricted to one or more of the ranges of interest of the one or more parameters.
US09190249B2	Hollow cathode system, device and method for the plasma-assisted treatment of substrates A hollow cathode system, a device and a method for the plasma-assisted treatment of substrates includes at least one hollow cathode, which can be connected to a power supply. The hollow cathode includes an electrically conducting main body with an opening which is bounded by ribs, follows a spiral or meandering path and allows a gas to pass through in a direction perpendicular to a surface of the main body. Connecting bridge elements are provided on the ribs. The bridge elements serve ensure mechanical stability of the hollow cathode and optimize potential distribution of the hollow cathode. With the hollow cathode system, high treatment rates are achieved for homogeneous treatment of substrates of a large surface area with high plasma stability.
US09190243B2	Composite charged particle beam apparatus and thin sample processing method A composite charged particle beam apparatus includes a FIB column for irradiating a thin sample with a FIB and a GIB column for irradiating the thin sample with a GIB. The thin sample is placed on a sample stage, and a tilt unit tilts the thin sample about a tilt axis of the sample stage, the tilt axis being orthogonal to the FIB irradiation axis and being located inside a plane formed by the FIB irradiation axis and the GIB irradiation axis. A tilt sample holder is mounted on the sample stage and fixes the thin sample such that a cross-sectional surface of the thin sample is tilted at a constant angle with respect to the GIB irradiation axis and the azimuth angle of the GIB column can be changed by rotation of the sample stage.
US09190236B2	Fuse unit A fuse unit including a fuse element therein includes a first resin body and a second resin body. The second resin body is connected to the first resin body by a hinge portion and configured to be bended around the hinge portion with respect to the first resin body. A pair of first side walls and a pair of second side walls are provided on the first resin body and the second resin body respectively and extend in a direction intersecting an axis of the bending of the second resin body. A pair of engaging parts are provided at the lock arms provided at the first side walls respectively respectively, and each of which has a first inclined face. A pair of engaged parts are provided at the second side walls respectively, and corresponds to the engaging parts respectively, and each of which has a second inclined face configured to contact the first inclined face in surface contact in a state that the second resin body is bended. The first inclined face and the second inclined face are formed along a direction intersecting a direction of a reaction force by springback of the fuse element caused by the bending of the second resin body.
US09190234B2	Electromagnetic actuator, in particular for a medium voltage switch The disclosure relates to an electromagnetic actuator, such as for a medium-voltage switch, having a core having a coil applied to it, and a movable yoke. A method for producing such an actuator is also disclosed. A compact design can be achieved with, at the same time, a high level of actuator force, using a magnetic circuit of the actuator which has a rectangular magnet core and a round yoke which corresponds to the magnetic circuit of the magnetic core.
US09190226B2	Switch A door switch includes a casing, a cam, the cam being caused to operate by manipulation of a manipulation key, and a detection unit for detecting an operating state of the cam. The casing houses at least a part of the cam and the detection unit. The cam is configured to be caused to operated by insert manipulation of inserting the manipulation key into the casing when the manipulation key has a shape adapted to a shape of the cam, and not to be caused to operate by the insert manipulation when the manipulation key does not have a shape adapted to the shape of the cam. The door switch can be adapted to Category 2 of ISO 13849-1.
US09190222B1	Production of carbonaceous nano-fibrous materials with ultra-high specific surface area from alkali (Kraft) lignin The present application discloses carbonaceous nano-fibrous materials developed by electrospinning mixtures of alkali lignin with a polymer at varied mass ratios. The present application also discloses processing of the lignin/polymer fibers via progressive heat treatments for stabilization, pre-carbonization and carbonization. The resulting carbon nanofibers maintain a uniform shape and have high specific surface area.
US09190221B2	Aqueous-based electric double-layer capacitor An electric double-layer capacitor (EDLC) and method for manufacturing thereof. The ELDC includes at least one capacitor cell with two parallel current collectors, two opposite polarity electrodes, a separator, a rigid dielectric frame, and at least one evacuation mechanism. Each electrode is disposed on a respective current collector, and impregnated with aqueous electrolyte. The frame is disposed along the perimeter on the surface of a current collector and enclosing the electrodes. The evacuation mechanism removes superfluous fluid material from the capacitor cell interior. The evacuation mechanism may be a compartment in the frame, operative to collect residual electrolyte that seeps out from the electrodes, or a capillary formed within the frame and extending into a portion of the electrode, the capillary composed of a porous hydrophobic material and operative to evacuate discharged gases from the electrodes out of the EDLC.
US09190220B2	Dye-sensitized solar cell A dye-sensitized solar cell includes four generation cells, wherein their negative electrodes and positive electrodes are facing each other, with an electrolytic solution sealed in between, and being contacted by generation layers. On the other main side of a polyimide layer on which the positive electrodes are formed, wiring layers corresponding to the positive electrodes are provided in positions overlapping with both the corresponding positive electrodes and the positive electrodes adjacent thereto. The wiring layers corresponding to the positive electrodes are connected by through holes and conductor penetrating the polyimide layer. The negative electrodes of the generation cells are connected, on the outer periphery side, with the wiring layers that are connected to the positive electrodes of the adjacent generation cells, except for the wiring layer and negative electrode on which leader terminal parts are formed.
US09190216B2	Non-aqueous electrolyte solution for electric double-layer capacitor A non-aqueous electrolyte solution for an electric double-layer capacitor includes a non-aqueous solvent in which electrolyte salt is dissolved. The non-aqueous electrolyte solution is characterized in that the non-aqueous solvent is a mixed solvent of chained sulfone and cyclic lactone compound. The non-aqueous electrolyte solution can suppress increase in the resistance value of the electric storage element even in a low-temperature environment below 0° C. and can also be used in a normal-temperature environment.
US09190214B2	Solid electrolytic capacitors with improved ESR stability An improved capacitor, and method for making the capacitor, is described. The capacitor has an anode and a dielectric on the anode. A cathode layer is on the dielectric wherein the cathode layer comprises at least one conductive layer and an insulative adhesion enhancing layer.
US09190211B2	Composite laminated ceramic electronic component A composite laminated ceramic electronic component that includes co-fired low dielectric-constant ceramic layers and high dielectric-constant ceramic layers. The low dielectric-constant ceramic layers and high dielectric-constant ceramic layers are each composed of a glass ceramic containing: a first ceramic composed of MgAl2O4 and/or Mg2SiO4; a second ceramic composed of BaO, RE2O3 (RE is a rare-earth element), and TiO2; glass containing each of 44.0 to 69.0 weight % of RO (R is an alkaline-earth metal), 14.2 to 30.0 weight % of SiO2, 10.0 to 20.0 weight % of B2O3, 0.5 to 4.0 weight % of Al2O3, 0.3 to 7.5 weight % of Li2O, and 0.1 to 5.5 weight % of MgO; and MnO, and the content ratios of the glass, etc. are varied between the low dielectric-constant ceramic layers and the high dielectric-constant ceramic layers.
US09190209B2	Dielectric ceramic composition and multilayer ceramic capacitor including the same A dielectric ceramic composition includes: a base material powder BamTiO3 (0.995≦m≦1.010); 0.2 to 2.0 moles of a first accessory ingredient, an oxide or carbide containing at least one of Ba and Ca, based on 100 moles of the base material powder; a second accessory ingredient, an oxide containing Si or a glass compound containing Si; 0.2 to 1.5 moles of a third accessory ingredient, an oxide containing at least one of Sc, Y, La, Ac, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, based on 100 moles of the base material powder; and 0.05 to 0.80 mole of a fourth accessory ingredient, an oxide containing at least one of Cr, Mo, W, Mn, Fe, Co, and Ni, based on 100 moles of the base material powder, a content ratio of the first accessory ingredient to the second accessory ingredient being 0.5 to 1.7.
US09190207B2	Multilayer ceramic electronic component having external electrodes which include a metal layer and conductive resin layer There is provided a multilayer ceramic electronic component, including a ceramic body including dielectric layers; a plurality of internal electrodes stacked within the ceramic body, and external electrodes formed on external surfaces of the ceramic body and electrically connected to the internal electrodes, wherein the external electrodes include a metal layer and a conductive resin layer formed on the metal layer, the conducive resin layer containing a copper powder and an epoxy resin, the copper powder including a first copper powder having a content of 10 wt % or more and a particle diameter of 2 μm or greater and a second copper powder having a content of 5 wt % or more and a particle diameter of 0.7 μm or smaller, the first copper powder being a mixture of spherical powder particles and flake type powder particles.
US09190204B1	Multilayer printed circuit board having circuit trace windings A multilayered printed circuit board with circuit trace windings having two or more top layers, two or more bottom layers and one or more intermediate layers therebetween, forming a hollow interior within the circuit board. The layers have wireless electrically conducting holes. Electrical circuit traces connect one hole to another hole, thereby forming two or more sets of wireless circuit trace windings (coils) around the hollow interior. Each set of windings has its own separate pair of a top layer and a bottom layer. When a metal core is positioned in the hollow interior a wireless transformer can be formed having a primary coil and one or more secondary coils. Because the coils are concentric sufficient windings can be achieved to produce adequate magnetic flux for power transfer.
US09190201B2	Magnetic film enhanced inductor An integrated magnetic film enhanced inductor and a method of forming an integrated magnetic film enhanced inductor are disclosed. The integrated magnetic film enhanced inductor includes an inductor metal having a first portion and a second portion, a top metal or bottom metal coupled to the inductor metal, and an isolation film disposed one of in, on, and adjacent to at least one of the first portion and the second portion of the inductor metal. The isolation film includes a magnetic material, such as a magnetic film.
US09190191B2	Extra-flexible insulated electric wire An extra-flexible insulated electric wire includes a conductor portion and an insulating cover. The conductor portion includes an inner layer and an outermost layer. In the inner layer, conductive strands are collectively twisted. In the outermost layer, conductive strands are disposed along an outer circumference of the inner layer. The insulating cover covers the conductor portion.
US09190190B1	Method of providing a high permittivity fluid The present invention provides for an electrically insulating fluid or material of high relative permittivity or dielectric constant. The fluid has a low conductivity and high relative strength and is applicable to pulsed power drilling applications.
US09190186B2	Negative-electrode active material for nonaqueous-electrolyte secondary battery production process for the same, negative electrode for nonaqueous-electrolyte secondary battery, and nonaqueous-electrolyte secondary battery Providing a negative-electrode active material for nonaqueous-electrolyte secondary battery, the negative-electrode active material enabling an output characteristic to upgrade, a production process for the same, a negative electrode for nonaqueous-electrolyte secondary battery, and a nonaqueous-electrolyte secondary battery. The negative-electrode active material includes an Si-metal-carbon composite composed of: a metal/carbon composite matrix including at least one metal selected from the group consisting of Cu, Fe, Ni, Ti, Nb, Zn, In and Sn, at least one member selected from the group consisting of N, O, P and S, and amorphous carbon; and nanometer-size Si particles dispersed in the metal/carbon composite matrix.
US09190185B2	Bulk purification and deposition methods for selective enrichment in high aspect ratio single-walled carbon nanotubes The present disclosure includes purification and deposition methods for single-walled carbon nanotubes (SWNTs) that allow for purification without damaging the SWNTs. The present disclosure includes methods for reducing electrical resistance in SWNT networks.
US09190184B2	Composite core for electrical transmission cables A composite core for use in electrical cables, such as high voltage transmission cables is provided. The composite core contains at least one rod that includes a continuous fiber component surrounded by a capping layer. The continuous fiber component is formed from a plurality of unidirectionally aligned fiber rovings embedded within a thermoplastic polymer matrix. The present inventors have discovered that the degree to which the rovings are impregnated with the thermoplastic polymer matrix can be significantly improved through selective control over the impregnation process, and also through control over the degree of compression imparted to the rovings during formation and shaping of the rod, as well as the calibration of the final rod geometry. Such a well impregnated rod has a very small void fraction, which leads to excellent strength properties. Notably, the desired strength properties may be achieved without the need for different fiber types in the rod.
US09190178B2	Method for refueling a nuclear reactor having an instrumentation penetration flange A method for retracting in-core instrument thimble tubes from the reactor core prior to refueling a nuclear reactor with top mounted instrumentation. The apparatus includes a penetration flange interposed between the head flange and the reactor vessel flange through which the instrumentation cabling passes. The penetration flange is connected to the upper internals and is raised relative thereto to retract instrumentation thimbles from the core prior to removal of the upper internals from the reactor vessel for refueling. The penetration flange is removed from the vessel with the upper internals.
US09190177B2	Systems and methods for controlling reactivity in a nuclear fission reactor Illustrative embodiments provide a reactivity control assembly for a nuclear fission reactor, a reactivity control system for a nuclear fission reactor having a fast neutron spectrum, a nuclear fission traveling wave reactor having a fast neutron spectrum, a method of controlling reactivity in a nuclear fission reactor having a fast neutron spectrum, methods of operating a nuclear fission traveling wave reactor having a fast neutron spectrum, a system for controlling reactivity in a nuclear fission reactor having a fast neutron spectrum, a method of determining an application of a controllably movable rod, a system for determining an application of a controllably movable rod, and a computer program product for determining an application of a controllably movable rod.
US09190176B2	Memory device with redundancy page buffer array A memory device includes a first main page buffer array configured to access data of a first main memory array; a second main page buffer array configured to access data of a second main memory array; a redundancy page buffer array configured to access data of a redundancy memory array replacing the first and second main memory array; a first redundancy transfer unit configured to transfer data between the redundancy page buffer array and the outside of the memory device through a first redundancy bus, when a first column address indicates one or more defective columns of the first main memory array; and a second redundancy transfer unit configured to transfer data between the redundancy page buffer array and the outside through a second redundancy bus, when a second column address indicates one or more defective columns of the second main memory array.
US09190175B2	Self-repair device A self-repair device includes an ARE (array rupture electrical fuse) array block configured to store fail addresses; an ARE control block configured to control a repair operation of fuse sets according to the fail addresses, compare a plurality of the fail addresses, and determine a failed state; and a redundancy block configured to store fuse data of the fail addresses, compare an input address with the fail addresses, and control row and column redundancy operations.
US09190171B2	Method and apparatus for read measurement of a plurality of resistive memory cells A method for read measurement of a plurality N of resistive memory cells having a plurality K of programmable levels. The method includes a step of applying a first read voltage to each of the plurality N of resistive memory cells and, at each of the plurality N of resistive memory cells, measuring a first read current due to the applied first read voltage, determining a respective second read voltage based on the first read current measured at the plurality N of resistive memory cells and a target read current determined for the plurality N of resistive memory cells for each of the plurality N of resistive memory cells, and applying the respective determined second read voltage to the plurality N of resistive memory cells for obtaining a second read current for each of the plurality N of resistive memory cells.
US09190170B1	Shift register unit, gate driving device, display panel and display device The embodiments of the present invention provide a shift register unit, a gate driving device, a display panel and a display device for solving the problem of relatively large noise in the signal outputted by the shift register unit within non-working time when the clock signal is of high level. Within the non-working time of the shift register unit, i.e., when displaying a frame of images, in periods of time other than the period of time when the scan trigger signal is of high level and the period of time when the output end of the shift register unit is of high level, the first pull-down drive module can connect the output end of the shift register unit with a low level signal end when the received clock signal is of high level, or when the received clock signal is of low level and the output end of the shift register unit is of low level, thereby releasing the noise coupled to the output end of the shift register unit by the high level signal to the low level signal end, so as to reduce the noise in the signal outputted by the shift register unit in the non-working time.
US09190164B1	Semiconductor device and operating method thereof A semiconductor device and a method of operating the same are provided. The semiconductor device includes a memory block including a plurality of pages having a plurality of first cells and a plurality of second cells, a circuit group configured to read first cells and second cells of a selected page of the pages a strobe signal control circuit configured to store source bouncing information generated during a read operation of the first cells of the selected page and output a strobe signal based on stored information, and a control circuit configured to control the circuit group in response to the strobe signal during a read operation of the second cells of the selected page.
US09190153B2	Asynchronous/synchronous interface The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.
US09190152B2	Semiconductor memory device A memory device includes a plurality of memory blocks, and a row decoder including a plurality of decoders including a first decoder and a second decoder, the first decoder being configured to output a first block selection signal for selecting one of the memory blocks and a control signal for causing the second decoder to output a second block selection signal for selecting another one of the memory blocks.
US09190149B2	Method and system for switchable erase or write operations in nonvolatile memory Embodiments relate to systems and methods including a step of switching between two or more erase operations and/or two or more write operations for erasing of and/or writing to least one memory cell of a nonvolatile memory enabling to select a most suitable erase and/or write operation for a particular erase and/or write operation within the memory.
US09190142B2	Semiconductor memory device and method of controlling the same A semiconductor memory device according to an embodiment comprises: a nonvolatile memory cell capable of multi-level storage; and a control circuit that performs write control on the memory cell. The control circuit executes: a first write operation to obtain a certain intermediate voltage distribution; a second write operation to obtain a final voltage distribution; and a change operation that changes a value of the first verify voltage according to the number of times of writes and the number of times of erases on the memory cell.
US09190140B2	Semiconductor devices A semiconductor device includes a section signal generator and a decoder. The section signal generator generates a section signal by retarding a pre-section signal including a pulse created during a read operation or a write operation by a delay time that is set according to a level combination of first and second test mode signals. The decoder decodes address signals in response to a pulse of the section signal to generate column selection signals, one of which is selectively enabled, to store an external data in a memory cell of an internal circuit or to output a data stored in a memory cell of an internal circuit.
US09190139B2	Memory and memory system including the same A memory may include a plurality of word lines, one or more redundancy word lines for replacing one or more word lines among the plurality of word lines, a target address generation unit suitable for generating one or more target addresses using a stored address, and a control unit suitable for sequentially refreshing the plurality of word lines in response to a refresh command which is periodically inputted, refreshing a word line selected based on the target address when the refresh command is inputted M times, and refreshing the one or more redundancy word lines whenever the refresh command is inputted N times, wherein the M and N are natural numbers.
US09190137B2	Memory performing target refresh operation and memory system including the same A memory may include a plurality of word lines coupled to one or more memory cells; a target address generation unit suitable for generating one or more target addresses using a stored address; and a control unit suitable for sequentially refreshing the plurality of word lines in response to a refresh command which is periodically inputted, and refreshing a word line corresponding to the target address in response to the refresh command at a random time.
US09190135B2	Organic ferroelectric material based random access memory Illustrative embodiments provide a FETRAM that is significantly improved over the operation of conventional FeRAM technology. In accordance with at least one disclosed embodiment, a CMOS-processing compatible memory cell provides an architecture enabling a non-destructive read out operation using organic ferroelectric PVDF-TrFE as the memory storage unit and silicon nanowire as the memory read out unit.
US09190132B2	Reducing signal skew in memory and other devices Interconnections between signal lines help to reduce signal skew between signals carried on the signal lines. The interconnections may be resistive interconnections, and the signal lines may be clock lines. In a memory controller, for example, resistive traces may connect adjacent clock lines. The resistive traces reduce the clock signal skew between the adjacent clock lines, and throughout the memory controller as a whole.
US09190131B2	Memory and memory system including the same A memory includes a first cell array including a plurality of first memory cells connected to a plurality of word lines, a bit line selection unit configured to select one or more bit lines among a plurality of bit lines based on repair information, a second cell array including a plurality of second memory cells connected to the plurality of word lines and the plurality of bit lines, wherein a group of the plurality of second memory cells connected to a corresponding word line stores the number of activations of the corresponding word line when the one or more connected bit lines are selected and an activation number update unit configured to update a value stored in the second memory cells, which are connected to the one or more selected bit lines and the activated word line among the plurality of word lines.
US09190127B2	Burst length control circuit A burst length control circuit includes a burst length input circuit that outputs a mode register burst length signal and a burst length on-the-fly signal, a burst length generator circuit that outputs a burst length signal, and a burst length adjuster that delays the burst length signal by a write latency time to produce a write burst length control signal. A selection circuit selects any one of the burst length signal and the write burst length control signal according to a write read command signal and an on-the-fly signal received from the burst length input circuit, and outputs a burst length control signal. A burst stop counter counts the burst length control signal according to an internal write command signal and an internal read command signal, and outputs a burst stop signal corresponding to a selected burst length.
US09190125B2	Clock generation circuit and semiconductor memory device employing the same A semiconductor memory device includes a first internal clock generation circuit configured to generate a first internal clock by compensating an external clock signal for a transfer delay thereof in the semiconductor memory device, a control voltage generation circuit configured to generate a control voltage in response to a profile selection signal, a second internal clock generation circuit configured to generate a second internal clock signal by delaying the first internal clock signal by a time corresponding to the control voltage, a selection output circuit configured to select one of the first internal clock signal and the second internal clock signal in response to a path selection signal and output a selected signal as a synchronization clock signal, and a data output circuit configured to output a data in synchronization with the synchronization clock signal.
US09190123B2	Semiconductor devices and semiconductor systems including the same Semiconductor systems are provided. The semiconductor system includes a controller and a semiconductor device. The controller is suitable for generating command signals and address signals. The semiconductor device is suitable for electrically disconnecting a first local line from a second local line in response to an input control signal enabled in a read mode. The read mode is set according to a logic combination of the command signals. Further, the semiconductor device is suitable for sensing and amplifying a data on the first local line or the second local line according to the address signals to output the amplified data through an input/output line.
US09190120B2	Storage device including reset circuit and method of resetting thereof A data storage device including a reset circuit and a method of resetting thereof includes a memory device to receive a driving voltage through a power terminal thereof, a voltage regulator to adjust an external voltage to provide the adjusted voltage to the power terminal of the memory device, and a reset circuit to discharge an enable terminal of the voltage regulator or the power terminal of the memory device according to a change of the external voltage.
US09190119B2	Semiconductor devices having multi-channel regions and semiconductor systems including the same The semiconductor device includes a first channel region suitable for including a first pad region and a first core region and receiving a first power signal through a first power line, a second channel region suitable for including a second pad region and a second core region and receiving the first power signal through a second power line, and a switch unit suitable for electrically disconnecting the second power line from a first power stabilization unit if a predetermined operation of the first channel region is performed and electrically disconnecting the first power line from the first power stabilization unit if the predetermined operation of the second channel region is performed.
US09190118B2	Memory architectures having wiring structures that enable different access patterns in multiple dimensions Multi-dimensional memory architectures are provided having access wiring structures that enable different access patterns in multiple dimensions. Furthermore, three-dimensional multiprocessor systems are provided having multi-dimensional cache memory architectures with access wiring structures that enable different access patterns in multiple dimensions.
US09190116B2	Hard disc drive cover seal Certain embodiments of the present disclosure include a hard disc drive housing comprising a baseplate having a bottom portion and walls extending from a perimeter of the bottom portion, the walls including a clearance area; a cover that includes a planar interface surface with the baseplate, the interface surface having a width that exceeds the baseplate wall thickness in the clearance area; and a gasket configured to be compressed between the baseplate and the cover at the interface surface.
US09190113B2	Docking device for a hard disk A docking device for a hard disk has a protective box housing an electronic unit including a printed circuit card and a fan arranged in or in the vicinity of an opening formed in a first wall of the protective box. The box also has a location for a hard disk. The fan is arranged in the vicinity of an edge of the printed circuit card so that the air stream driven by said fan sweeps over both main faces of the printed circuit card. The guide is designed to guide at least a portion of the air stream driven by the fan directly to the location for a hard disk.
US09190111B2	Method and apparatus for modifying the presentation of content In accordance with an exemplary embodiment, a method for processing an audio/video stream includes providing an audio/video stream including at least one segment of a show and at least one interstitial of the show, receiving location information to identify a video location within the audio/video stream, and processing the audio/video stream to identify boundaries of the at least one segment of the show based on the location information. Further, the method includes outputting the segment of the show for presentation by a display device without outputting the interstitial and outputting the interstitial for presentation by the display device subsequent to outputting the segment of the show.
US09190109B2	System and method for video poetry using text based related media There is provided a system and method for creating video poetry using text based related media. There is provided a method for creating a video poetry media, the method comprising receiving an ordered list of text phrases selected from a defined plurality of text phrases, presenting a plurality of video clips, wherein each of the plurality of video clips is associated with one or more of the ordered list of text phrases, receiving an ordered list of video clips selected from the plurality of video clips, and generating the video poetry media using the ordered list of video clips. In this manner, the barrier of entry for creating video poetry media is reduced, encouraging increased user participation and the creation of the “viral” effect by sharing video poetry online. Positive publicity for associated brands and media properties and additional channels for commercial promotions are thereby provided.
US09190108B2	Contamination reduction head for media A cleaning head for removing contaminants from a data storage media, the cleaning head having a cleaning surface comprising a self-assembled monolayer, with the cleaning surface leading a read/write transducer. The self-assembled monolayer is selected so as to have a terminal functional group that has a high affinity to the contaminant(s) desired to be attracted and/or removed.
US09190107B2	Information recording device and information recording method An information recording device includes a recording medium in which renewal data, which is a target of a data refresh operation, is recorded, a reading module that reads the renewal data recorded in the recording medium, a renewal module that performs updating of a value indicating a state of the data refresh operation, a generation module that generates parity data based on the value and the read renewal data, and a recording module that records the renewal data after recording the generated parity data.
US09190103B2	Data storage medium having security function and output apparatus therefor Provided are a storage medium, which has a security function, for storing media content and an output apparatus for outputting data stored in the storage medium. The storage medium includes a controller for converting at least one of a position of pins of a connector and a storage position of media content in a memory unit in order to control transmission of the media content in the memory unit to the output apparatus.
US09190098B2	Objective lens and optical pickup device An objective lens capable of converging light of a used wavelength with a satisfactory aberration on a recording medium is provided. An objective lens for converging light of a predetermined wavelength λ on a recording medium satisfies the following condition: \|CML\|+\|CMF\|<0.03 λ, where CML is an amount of a generated third-order coma aberration per 1 degree of tilt of the objective lens, and CMF is an amount of a generated third-order coma aberration per 1 degree of tilt of off-axis light.
US09190097B2	Optical information recording/reproducing device and optical information recording/reproducing method In an optical information recording/reproducing device that radiates signal light and reference light to a recording medium, forms a hologram, and records information and emits the reference light to the hologram of the recording medium and reproduces information, a laser light source that generates the signal light and the reference light; a light angle control unit that controls an angle of the reference light incident on the recording medium; a light detecting unit that detects diffracted light when the reference light is radiated; a positioning unit that allocates an address to the recording medium and performs positioning of the recording medium for the address; a tilt measuring unit that measures a tilt of the recording medium; and a control unit that controls the incidence angle of the reference light, on the basis of a tilt measurement result in a recording mode, in a reproduction mode, are included.
US09190096B2	Method for producing glass substrate and method for producing magnetic recording medium Disclosed is a method for producing a glass substrate, which involves a first polishing step and a second polishing step both for polishing the surface of the glass substrate with a polishing solution containing a polishing agent. The method is characterized by additionally involving a heating step for heating the glass substrate, wherein the heating step is carried out after the first polishing step and before the second polishing step.
US09190093B2	Reduced adjacent track errors in bit-patterned media The present disclosure relates to a magnetic medium that includes a substrate and a bit patterned magnetic layer applied to the substrate. The bit-patterned magnetic layer includes islands and each island includes a first magnetic material having a first magnetic anisotropy and that has a top surface, a bottom surface, and a peripheral surface. Each island also includes a second magnetic material covering the peripheral surface of the first magnetic material and having a second magnetic anisotropy that is higher than the first magnetic anisotropy. In one embodiment, the first magnetic material may comprise a nucleation domain in a centrally located surface portion of the magnetic islands and/or the second magnetic material may comprise an outer shell on the peripheral surface of the islands.
US09190089B1	Air bearing area configuration for contaminating particle removal A disk drive for redirecting contaminating particulate matter away from an area bearing of a slider element. At least two etched channels are provided in the slider element of the disk drive. The at least two etched channels direct incoming air flow to a leading edge of the slider element from the leading edge towards respective sides of the slider element. Particulate matter that may be progressing towards the air bearing are redirected by virtue of the incoming air flow to the leading edge and expelled from the air bearing via the at least two etched channels.
US09190084B1	Thermal assisted magnetic recording head with protrusion on leading side of plasmon generator A thermal assisted magnetic recording head of the present invention has an air bearing surface (ABS) opposite to a magnetic recording medium, a core that can propagate laser light as propagating light, a plasmon generator that includes a generator front end surface facing the ABS, and a main pole that faces the ABS and emits magnetic flux to the magnetic recording medium. The plasmon generator is opposite to a part of the core and extends to the generator front surface, is coupled with a portion of the propagating light that propagates through the core in the surface plasmon mode to generate a surface plasmon, propagates the surface plasmon to the generator front end surface, and generates near-field light (NF light) at the generator front end surface to irradiate the NF light to the magnetic recording medium. The ABS has a protrusion that is closer to the leading side than the generator front end surface in the down track direction, and that protrudes more toward the magnetic recording medium than the generator front end surface upon operation of the thermal assisted magnetic recording head.
US09190083B2	Methods of manufacturing magnetic heads using a trigger reader electronic lapping guide A method of manufacturing a magnetic read-write head, including the steps of presenting a row bar to a processing location, the row bar including an air bearing surface, at least one read-write head, at least one electronic lapping guide, and at least one trigger device, wherein each electronic lapping guide is positioned at a different distance from the air bearing surface than each trigger device, and wherein the read-write head and at least one of the trigger devices include a multi-layer stack of materials; lapping the air bearing surface while measuring the electrical resistance of at least one electronic lapping guide and at least one trigger device until the resistance measurement of the trigger device provides an open circuit reading, and measuring an offset resistance value of the at least one electronic lapping guide concurrently with the measurement of the open circuit reading by the trigger device.
US09190081B2	AF-coupled dual side shield reader with AF-coupled USL The embodiments disclosed generally relate to a read head sensor in a magnetic recording head. The read head sensor comprises side shields in addition to the upper and lower shields. The upper shield sensor is a multilayer structure with antiferromagnetic coupling. The side shield is a multilayer structure whereby a lower magnetic layer is separated from an upper magnetic layer. The upper magnetic layer is ferromagnetically coupled to a bottom layer of the upper shield. The bias direction of the read head sensor is antiparallel to the bottom layer of the upper shield.
US09190075B1	Automatic personal assistance between users devices Methods and systems are presented for providing automatic personal assistance on a user device (e.g., mobile phone). In some embodiments, a personal assistant on a first user device may respond automatically to a received input communication from a second user device. In some embodiments, the personal assistant may perform a local search of data stored on the first user device in order to retrieve data responsive to the received input. In some embodiments, the personal assistant may perform a local load of an entry into an application on the first user device in order to perform an action responsive to the received user input. In some embodiments, the automatic response may include sending a responsive output communication to the second user device. The automatic personal assistance may be customized based on user-editable automatic personal assistance settings.
US09190071B2	Noise suppression device, system, and method A noise-suppression assembly of a mechanical drive system having a rotational frequency includes an audio filter unit configured to receive a first audio signal and a timing signal of the mechanical drive system. The audio filter unit generates a noise-cancellation signal based on a frequency of the timing signal to suppress a noise generated by the mechanical drive system and to apply the noise-cancellation signal to the first audio signal to produce a filtered first audio signal. The frequency of the timing signal is based on the rotational frequency of the mechanical drive system.
US09190069B2	In-situ voice reinforcement system A voice reinforcement system extracts a portion of a converted speech signal and redirects it towards a listening area where it may be added with the original signal. The system includes a speech input, a filter, and a converter. The speech input generates an intermediate signal from a speech signal. The filter extracts a portion of the signal extending above a cutoff frequency. The converter converts the filtered signal to an aural signal directed towards a listening area.
US09190067B2	Efficient combined harmonic transposition The present document relates to audio coding systems which make use of a harmonic transposition method for high frequency reconstruction (HFR), and to digital effect processors, e.g. so-called exciters, where generation of harmonic distortion adds brightness to the processed signal. In particular, a system configured to generate a high frequency component of a signal from a low frequency component of the signal is described. The system may comprise an analysis filter bank (501) configured to provide a set of analysis subband signals from the low frequency component of the signal; wherein the set of analysis subband signals comprises at least two analysis subband signals; wherein the analysis filter bank (501) has a frequency resolution of Δf. The system further comprises a nonlinear processing unit (502) configured to determine a set of synthesis subband signals from the set of analysis subband signals using a transposition order P; wherein the set of synthesis subband signals comprises a portion of the set of analysis subband signals phase shifted by an amount derived from the transposition order P; and a synthesis filter bank (504) configured to generate the high frequency component of the signal from the set of synthesis subband signals; wherein the synthesis filter bank (504) has a frequency resolution of FΔf ; with F being a resolution factor, with F≧1; wherein the transposition order P is different from the resolution factor F.
US09190066B2	Adaptive codebook gain control for speech coding In accordance with one aspect of the invention, a selector supports the selection of a first encoding scheme or the second encoding scheme based upon the detection or absence of the triggering characteristic in the interval of the input speech signal. The first encoding scheme has a pitch pre-processing procedure for processing the input speech signal to form a revised speech signal biased toward an ideal voiced and stationary characteristic. The pre-processing procedure allows the encoder to fully capture the benefits of a bandwidth-efficient, long-term predictive procedure for a greater amount of speech components of an input speech signal than would otherwise be possible. In accordance with another aspect of the invention, the second encoding scheme entails a long-term prediction mode for encoding the pitch on a sub-frame by sub-frame basis. The long-term prediction mode is tailored to where the generally periodic component of the speech is generally not stationary or less than completely periodic and requires greater frequency of updates from the adaptive codebook to achieve a desired perceptual quality of the reproduced speech under a long-term predictive procedure.
US09190064B2	Resolution-independent dither sample insertion for audio transmissions Methods, systems, and apparatuses are provided for resolution-independent dither sample insertion for audio transmissions. Audio transmitters transmit audio data streams to audio receivers. Data inactivity in the data stream triggers the audio receivers to enter power-saving/sleep modes in which synchronization with the audio transmitters is lost thus requiring time consuming resynchronization. Inactivity such as silence or zero-value data is detected in a data stream. Upon detection, a dither sample is inserted into the data stream and transmitted to the audio receiver to prevent the loss of synchronization. The dither sample may have a negative value and be formatted for resolution-independence with respect to the audio receiver.
US09190060B2	Speech recognition device and method, and semiconductor integrated circuit device A semiconductor integrated circuit device for speech recognition includes a scenario setting unit that receives a command designating scenario flow information and selects prescribed speech reproduction data in a speech reproduction data storage and a prescribed conversion list, in accordance with the scenario flow information, a standard pattern extraction unit that extracts a standard pattern corresponding to at least part of individual words or sentences included in the prescribed conversion list from a speech recognition database, a speech signal synthesizer that synthesizes an output speech signal, a signal processor that generates a feature pattern representing the distribution state of the frequency component of an input speech signal, and a match detector that compares the feature pattern with the standard pattern and outputs a speech recognition result.
US09190055B1	Named entity recognition with personalized models Features are disclosed for generating and using personalized named entity recognition models. A personalized model can be trained for a particular user, and then interpolated with a general model for use in named entity recognition. In some embodiments, a model may be trained for a group of users, where the users share some similarity relevant to language processing. In some embodiments, various base models may be trained so as to provide better accuracy for certain types of language input than a general model. Users may be associated with any number of base models, and the associated based models may then be interpolated for use in named entity recognition on input from the corresponding user.
US09190052B2	Systems and methods for providing information discovery and retrieval This invention relates generally to software and computers, and more specifically, to systems and methods for providing information discovery and retrieval. In one embodiment, the invention includes a system for providing information discovery and retrieval, the system including a processor module, the processor module configurable to performing the steps of receiving an information request from a consumer device over a communications network; decoding the information request; discovering information using the decoded information request; preparing instructions for accessing the information; and communicating the prepared instructions to the consumer device, wherein the consumer device is configurable to retrieving the information for presentation using the prepared instructions.
US09190051B2	Chinese speech recognition system and method A Chinese speech recognition system and method is disclosed. Firstly, a speech signal is received and recognized to output a word lattice. Next, the word lattice is received, and word arcs of the word lattice are rescored and reranked with a prosodic break model, a prosodic state model, a syllable prosodic-acoustic model, a syllable-juncture prosodic-acoustic model and a factored language model, so as to output a language tag, a prosodic tag and a phonetic segmentation tag, which correspond to the speech signal. The present invention performs rescoring in a two-stage way to promote the recognition rate of basic speech information and labels the language tag, prosodic tag and phonetic segmentation tag to provide the prosodic structure and language information for the rear-stage voice conversion and voice synthesis.
US09190048B2	Speech dialogue system, terminal apparatus, and data center apparatus A speech dialog system includes a data center apparatus and a terminal apparatus. The data center apparatus acquires answer information for request information obtained in a speech recognition process for speech data from a terminal apparatus, creates a scenario including the answer information, creates first synthesized speech data concerning the answer information, transmits the first synthesized speech data to the terminal apparatus, and transmits the scenario to the terminal apparatus while the first synthesized speech data is being created in the creating the first synthesized speech data. The terminal apparatus creates second synthesized speech data concerning the answer information in the received scenario, receives the first synthesized speech data, selects one of the first synthesized speech data and the second synthesized speech data based on a determination result regarding whether the reception of the first synthesized speech data is completed, and reproduces speech.
US09190046B2	Glass fiber-based sound absorbing sheet having adjustable permeability and air porosity The present invention relates to a sound absorbing sheet having excellent sound absorbing performance and surface decorative effects. The sound absorbing sheet of the present invention is characterized by comprising a base and having an average sound absorption of 0.4 or higher in a frequency range of 200 to 2000 Hz. The permeability and air porosity of a base layer of the sound absorbing sheet of the present invention may be adjusted, thereby achieving significantly superior effects of sound absorbing performance despite the thinness of the sound absorbing sheet.
US09190045B2	Noise-absorbent fabric for vehicle and method for manufacturing the same Disclosed is a noise-absorbent fabric for a vehicle and a method for manufacturing the same. The noise-absorbent fabric for the vehicle includes a mono-layered nonwoven fabric and a binder. The mono-layered nonwoven fabric is formed of a super fiber, such as an aramid fiber, with a fineness of about 1 denier to about 15 deniers and a thickness of about 3 mm to about 20 mm. The binder is located in the same layer as the nonwoven fabric to maintain a three-dimensional shape of the nonwoven fabric.
US09190042B2	Systems and methods for musical sonification and visualization of data The current disclosure is directed to systems and methods for automatically converting multi-dimensional, complex data sets to musical symbols while representing the converted data in an animated graph. The system groups the data into a number of subsets of data according to a set of user-configured rules and maps the grouped data points to musical notes according to configurable mapping parameters.
US09190041B1	Neckdive strap A leg strap, that connects a guitar or bass player's upper thigh to the shoulder-strap end pin, located on the body of a guitar or bass, for the purpose of supporting the instrument in a stationary playing position, eliminating an adverse condition known as “neck-dive”, which is the tendency in unbalanced and neck-heavy instruments for the neck-portion of the instrument to drop in a downward direction when both hands are taken off the instrument.
US09190039B2	Radiation curable drumhead membrane A drumhead and a method for coating a drumhead membrane comprising applying a coating having cross linkable polymeric material to the membrane and applying energy to cross link the polymeric material and thereby permanently adhere the material to the membrane as a play surface. The cross-linking not only hardens the coating to improve durability, but also improves the adhesion of the coating to the base film. Actinically cured coatings can completely harden in a matter of 3 to 5 seconds, with UV cured inks being especially desirable.
US09190035B1	String instrument bow guide A string instrument bow guide that selectively fits a bow played string instrument without being fastened to the string instrument. The guide has two arc shaped inserts that may be made of a flexible material and that removably fit within a pair of opposed bouts. A pair of holes is provided in each insert for selective fit of a pair of memory strands that arch above a highway of the strings. A range of desired spacing above the strings is provided by both an insert thickness of the inserts relative to a depth of the bouts and also by a selective fit of the strands within the inserts. The bow guide is selectively disassembled or collapsed to fit within a case of the string instrument.
US09190034B2	Metal-edged plectrum and method of manufacture thereof A plectrum or guitar pick and method of manufacture thereof. The plectrum has one or more metal edges that are substantially flush/planar with the body of the plectrum. This edge may be an outer edge of the plectrum itself or an inner edge of a cutout punched into the body of the pick. Alternatively, metal can be plated onto the body of the plectrum. The body of the plectrum may be formed of a metal, plastic or other suitable material. The interior of the body may contain customized designs, print, or cutouts that contain metal. The metal edge of the plectrum is capable of being flush with the body through a novel method of manufacturing plectra on metallic (e.g., copper clad) boards. Thus, the body and edges of the plectrum may remain coplanar as if created from the same material, though retaining benefits of being formed of two separate materials.
US09190031B1	Piano string tuning using inductive current pumps and associated method of use A present disclosure relates to a method and apparatus for tuning piano strings by heating the piano strings. The apparatus includes split magnetic cores that encircle the piano strings. The magnetic cores comprise wiring wrapped around the outside of the magnetic cores to induce an alternating current in the piano strings through mutual inductance. The generated alternating current in the piano strings allows each piano string to be heated and thereby tuned.
US09190029B2	Display apparatus and method of controlling the same A display apparatus including: a display unit for displaying image data in a first display region of the display unit; a motion sensor for sensing a motion of a user; and a display controller for controlling the display unit to divide the first display region into a bezel display region and a second display region according to the motion of the user sensed by the motion sensor, for displaying variable bezel image data in the bezel display region, for scaling the image data so as to correspond to the second display region, and for displaying the scaled image data in the second display region.
US09190027B2	Recording medium, information processing apparatus, and presentation method When a French character is selected while an English character string candidate is presented, a mobile terminal presents English and French character string candidates by using an English/French mixed candidate dictionary. Furthermore, when a French character is selected while English and French character string candidates are presented by using the English/French mixed candidate dictionary, the mobile terminal presents a French character string candidate by using a French candidate dictionary. Moreover, when a character other than French is selected while a French character string candidate is presented by using the French candidate dictionary, the mobile terminal presents an English character string candidate by using an English candidate dictionary.
US09190026B2	Systems and methods for feature fusion Systems and methods for generating visual words define initial inter-visual word relationships between a plurality of visual words; define visual word-image relationships between the plurality of visual words and a plurality of images; define inter-image relationships between the plurality of images; generate revised inter-visual word relationships in a vector space based on the initial inter-visual word relationships, the inter-image relationships, and the visual word-image relationships; and generate higher-level visual words in the vector space based on the revised inter-visual word relationships.
US09190020B2	Image processing device, image processing method, computer program product, and stereoscopic display apparatus for calibration According to an embodiment, an image processing device includes a first obtaining unit, a specifying unit, a first calculator, a second obtaining unit, and a selector. The first obtaining unit obtains a first parallax number representing a parallax image that is actually observed. The specifying unit specifies a panel parameter candidate. The first calculator calculates a second parallax number which represents a parallax image to be observed from the viewpoint position when the panel parameter is changed from the first panel parameter to the panel parameter candidate. The second obtaining unit obtains a third parallax number calculated when a first panel parameter candidate is specified, and the third parallax number is smaller than an error between the second parallax number calculated when a second panel parameter candidate is specified, and the third parallax number, the selector selects the first panel parameter candidate as the panel parameter.
US09190018B2	Vector-based customizable pointing indicia A method of rendering customized pointing indicia including the steps of monitoring application program interface messaging and intercepting a call for a unique system pointer identifier. A stored collection of predefined vector shapes is accessed, from which a predefined vector shape is selected correlated to the current system pointer identifier. The stroke and fill attributes are set for the vector shapes. A sequence of rasterized frames of vector shapes having different attributes are created and displayed to produce animated pointing indicia effect. The customized vector shape is rasterized and displayed to an end user operating a computer. Customization, animation, and magnification of pointing indicia are performed responsive to user input, which may be a touchscreen event, body movement, hand gesture, mouse event, or a key stroke.
US09190016B2	Color-matching tool for virtual painting A method for virtually painting an image, the method comprising providing an image having a plurality of image pixel units, generating luminosity values based on color data (e.g., RGB triplets and LAB triplets) from the image pixel units, receiving a selection of one of the image pixel units, and setting a reference luminosity value based at least in part on a luminosity value of the selected image pixel unit (corresponding to a desired midpoint brightness). The method also comprises receiving a selection of a new color for virtually painting the image, calculating luminosity differences between the reference luminosity value and the luminosity values of the image pixel units, and generating and displaying overlay pixel units as an overlay with the image based on the calculated luminosity differences and the selected new color.
US09190012B2	Method and system for improving display underflow using variable HBLANK Methods and apparatus for improving the effects of display underflow using a variable horizontal blanking interval are disclosed. One embodiment of the present invention is a method of display that includes detecting a data ready signal that indicates availability of display data for transmission from a display pipeline, and generating a line-transmit signal based upon a clock signal and the data ready signal. The line-transmit signal is provided to the display pipeline. The line-transmit signal is substantially coincident with the clock signal if the data ready signal is set, and may be delayed if the data ready signal is not asserted. The display pipeline transmits the display data upon receiving the line-transmit signal. Another embodiment is an apparatus including a display pipeline configured to set a data ready signal when the display data is available for transmission, and a timing generator coupled to the display pipeline and configured to generate a line-transmit signal based on the status of the data ready signal.
US09190011B2	Devices and methods for common electrode mura prevention Methods and devices employing mura prevention circuitry, are provided. In one example, a method may include supplying a first voltage pathway between a common electrode driver and a common electrode of an electronic display device and supplying a second voltage pathway between the common electrode driver and ground. Mura prevention circuitry may be supplied that activates the first voltage pathway when the electronic display device is turned on and an activation gate signal is provided from a gate corresponding to the common electrode driver. Further, the mura prevention circuitry may activate the second voltage pathway when the electronic display device is turned off or no activation gate signal is provided from the gate corresponding to the common electrode driver.
US09190007B2	Display device A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.
US09190002B2	Display device A display device includes a display portion, a source driver that is connected to a second end of a source signal line to output to the source signal line a first source signal for a first pixel electrode and a second source signal for a second pixel electrode, a gate driver that outputs first and second gate signals to first and second gate signal lines, and a controller that controls the gate driver and the source driver to control output timings of the first and second gate signals relative to output timings of the first and second source signals. The controller sets a first time interval from the output timing of the first source signal to the output timing of the first gate signal to be longer than a second time interval from the output timing of the second source signal to the output timing of the second gate signal.
US09190000B2	LCD panel driving method, driver circuit and LCD device A driving method for liquid crystal display (LCD) panel includes the following steps: A. sending feedback signals to a monitoring module before timing control modules (T-CONs) sends driving signals to drive display of the LCD panel; B. generating control signals when the monitoring module receives the feedback signal of each of the T-CONs, and then simultaneously sending the control signals to each of the T-CONs; C. sending a driving signal to drive display of the LCD panel when each of the T-CONs receives the control signal.
US09189998B2	Backlight dimming method and liquid crystal display using the same A backlight dimming method and a liquid crystal display using the same are disclosed. The backlight dimming method includes producing a first backlight dimming value controlling a backlight luminance of a liquid crystal display panel, producing a convex gain which has less value in a peripheral part of a screen of the liquid crystal display panel than a central part of the screen, reducing the first backlight dimming value to be applied to the peripheral part of the screen using the convex gain to produce a second backlight dimming value, and controlling the backlight luminance of the liquid crystal display panel using the second backlight dimming value.
US09189996B2	Selectable, zone-based control for high intensity LED illumination system A lighting system includes a group of light emitting diode (LED) illumination devices. A user interface allows a user to select a scene that corresponds to a requirement to direct light of a specified color temperature and illuminance level to a location. A controller may cause the processor to identify a set of the illumination devices that correspond to the scene, and to generate commands to cause the device drivers for each of the identified illumination devices to control its corresponding illumination device so that the specified color temperature and illuminance level of light will be received at the location. A system and method for calibrating such a system is also disclosed.
US09189991B2	Organic light emitting display device having pixels and method of driving the same Disclosed herein is an organic light emitting display device capable of stably compensating for a threshold voltage of a driving transistor. The organic light emitting display device according the present invention includes pixels, each for storing a voltage of a data signal in a storage capacitor through a first threshold voltage different from a second threshold voltage of a driving transistor for driving the pixel; scan lines and light emitting control lines respectively coupled to the pixels; and data lines for supplying the data signal to the pixels.
US09189989B2	Integrated circuit for use in plasma display panel, access control method, and plasma display system A plasma display system restricts peak data traffic when a shared memory is used. In the plasma display system, a control unit prohibits a moving picture decoder from accessing a shared memory while an SF reading unit is reading, from the shared memory, SF pixel data which is information about respective cells to be lit in a plurality of subfields. On the other hand, the control unit permits the moving picture decoder to access the shared memory while the SF reading unit is not reading the SF pixel data from the shared memory during a sustain discharge period.
US09189987B2	Method for generating dither carry tables by conversion procedure A carry table generating method is provided for generating N dither carry tables, so as to dither N pixel blocks, wherein a size of the pixel block is N×N, and N is an integer greater than 1. The carry table generating method comprises the following steps: reading a plurality of basic tables from a memory, wherein the base tables are corresponding to a plurality of basic blocks, the number of the basic blocks is smaller than N, and the size of the basic blocks is smaller than the size of the pixel blocks; expanding the size of the basic tables by a first conversion procedure, and expanding the number of the basic blocks by a second conversion procedure; and generating the dither carry tables by using the expanded basic blocks.
US09189986B2	Display panel driving method, display device driving circuit, and display device A method of driving a display panel having a display area including different first and second display areas includes: (1) supplying image data to each of the first and second display area by a supply circuit to display an image therein; and (2) performing a first correction to correct only the image data supplied to the first display area in the image data supplying step. The first correction is performed based on a first correction data stored in a first memory.
US09189983B2	Display ads for door handles with coupon book holder A complementary coupon assembly affixed to a door handle assembly is described. The coupon assembly comprises a seat rail and pad base post, whereby a paper-based or electronic coupon book resides on the surface of the pad base post.
US09189981B2	Display method, film and display device using magnetic particles A display device and a display method using magnetic particles are disclosed. The display method includes: applying a first magnetic field to a plurality of particles in a state where the plurality of particles having a magnetic property and a certain color are dispersed in a solvent so that the plurality of particles are aligned in a direction parallel to a direction of the first magnetic field, and thus a plurality of particle chains are formed; and applying a second magnetic field to at least a part of the formed plurality of particle chains so that at least a part of the plurality of particle chains moves in a direction close to a display surface in an area to which the second magnetic field is applied, and thus the certain color is displayed on the display surface.
US09189980B2	Vehicle flag pole assembly A flag pole assembly for use with a vehicle having a trailer hitch, the flag pole assembly comprising a horizontal member having oppositely disposed first and distal ends, wherein the horizontal member includes a first hole in the first end to attach the horizontal member to the hitch of a vehicle and the horizontal member is at least thirty inches long, a vertical member coupled to the distal end of the horizontal member and the vertical member extends upward, and at least one attachment link is affixed to the vertical member for attaching a first ornament.
US09189977B2	Electronic greeting cards Electronic greeting cards include a greeting card with two or more interconnected panels in combination with a digital multimedia player device which includes an electronic display and an audio output, and circuitry which is operative to receive, store and play digital multimedia files and content. The various greeting card structures cover and encapsulate or otherwise house and adorn the digital multimedia player. Digital files are loaded on to the digital multimedia player by a connection to a network, or directly from a data storage device such as an SD card or USB connection or compact flash which interfaces with a port in the digital multimedia player. Pre-recorded digital multimedia greeting card content is either pre-loaded on a portable data storage device, or selected for purchase and downloaded or transferred for replay by the digital multimedia player of the electronic greeting card.
US09189970B2	Miniature of washing machine for exhibition A miniature of a washing machine for exhibition includes: a casing having an opening at an upper portion thereof; a door for opening and closing the opening; a tub fixedly installed within the casing; a drum rotatably installed within the tub; a driving motor installed at an outer side of the tub; an electric motor unit transferring rotary force of the driving motor to the drum; a tub cover installed at an upper portion of the tub and including a guide unit for guiding water, which is discharged upwardly along an inner wall surface of the tub, to the inner side of the tub when the drum is rotated; and a light emitting unit irradiating light to the interior of the tub.
US09189967B2	Enhancing posted content in discussion forums Methods and arrangements for enhancing content in discussion forums. Access to an online discussion is provided. A posting by an author participating in the discussion is accepted, and a recommendation is automatically produced for the author for amending the posting to increase the likelihood of response to the posting by other individuals participating in the discussion.
US09189966B2	System for learning trail application creation A server configured to create a learning trail application for a geographic area. The server includes a processor configured to: provide a template having a plurality of fields including a location field configured to receive the geographic area and an image archive field configured to receive images; receive template data for placement as the content of one or more of the plurality of fields; receive instructions for determining the placement of the template data into one or more of the plurality of fields; and generate the learning trail application from the template with the received template data. During execution of the application, the application is configured to receive at least one input image, determine whether a match exists between the input images and the content in the image archive field and display the template data associated with the content in the image archive field, when a match exists.
US09189956B2	Remote controller and method of controlling light emission from light-emitting unit thereof When a key input acknowledging unit acknowledges user input from a valid key enabled to control a first electronic device, a light-emission control unit causes a first light-emitting unit for a first selection key to emit light. On the other hand, when the key input acknowledging unit acknowledges user input from a control key other than the valid key, the light-emission control unit causes a second light-emitting unit for a second selection key or a third light-emitting unit for a third selection key to emit light.
US09189955B2	Remote control signaling using audio watermarks A system for using a watermark embedded in an audio signal to remotely control a device. Various devices such as toys, computers, and appliances, equipped with an appropriate detector, detect the hidden signals, which can trigger an action, or change a state of the device. The watermarks can be used with a “time gate” device, where detection of the watermark opens a time interval within which a user is allowed to perform an action, such as pressing a button, typing in an answer, turning a key in a lock, etc.
US09189949B2	Automated monitoring and control of contamination in a production area In an automated process for monitoring and controlling contamination in a production area, captured image data is processed to determine whether an individual is to wearing an article of contamination control equipment (e.g., gloves, face mask, etc) and whether the equipment is properly positioned on the individual. A determination that the contamination control equipment is not present or not properly positioned automatically activates a contamination control device such as contamination control means (e.g., shutting off power to machine) or an alarm or generates and sends a report of the contamination control protocol violation. An automated system for monitoring and controlling contamination includes a computer, an imaging sensor in communication with the computer, and a computer-readable program code disposed on the computer.
US09189948B2	Object acquiring system and acquiring method thereof An object acquiring system includes a cloud center, a target device disposed on an object, a host device, and a plurality of acquiring and tracking devices. The target device is provided with an ID. The host device registers an object account database, according to the ID, in the cloud center, and records a state message for the target device in the object account database. When receiving the ID transmitted by the target device, the acquiring and tracking devices log in the cloud center to check the state message, and determine whether to report the geolocation, and/or the time the ID is received, to the cloud center. The geolocation and the time information, reported by the acquiring and tracking devices, are used to track the moving trace of the target device, so that the object can be quickly located when straying or getting lost.
US09189942B2	Childcare tracking systems and method The present invention is directed toward systems and methods of tracking pick-ups, drop-offs, and changes of responsibility for children entering or exiting from a school. The systems and methods incorporate an automated process in which an acknowledgement is created upon entry of a biometric. The acknowledgment must be delivered to the teacher before responsibility for the child is accepted or relinquished.
US09189941B2	Stepped alarm method for patient monitors A system (202) generates patient alarms using a stepped alarm scheme. The system (202) includes one or more processors (220) programmed to receive physiological scores and/or physiological parameter values; compare the physiological scores and/or the physiological parameter values to a plurality of alarm levels; in response to a physiological score and/or physiological parameter value falling within an uninhibited zone of the alarm levels, issue an alarm; and set a first inhibition period for the uninhibited alarm level after issuing the alarm.
US09189940B2	Method and apparatus for detecting smoke in an ion chamber A smoke detection sensor ion chamber has a capacitance and a change in the permittivity of that capacitance dielectric (ionized air in the chamber) may be used to detect the presence of smoke therein. Smoke from typical fires is mainly composed of unburned carbon that has diffused in the surrounding air and rises with the heat of the fire. The permittivity of the carbon particles is about 10 to 15 times the permittivity of clean air. The addition of the carbon particles into the air in the ion chamber changes in the permittivity thereof that is large enough to measure by measuring a change in capacitance of the ion chamber.
US09189937B2	Protecting a material from contamination Protecting material from contamination by an illicit substance or object during unauthorized or illegal action, performed by children, teenagers, animals Providing material inside a closed container having an access opening, aligning a trap with access opening, mounting aligned trap within the container, and adding decoy material to trap Closed container having access opening, for containing the material, and trap mountable within container, alignable with access opening, and suitable for holding decoy material Trap with decoy material intercepts and traps illicit substance or object introduced via access opening into container, preventing the illicit substance or object from contacting protected material inside container Unique alignment and mounting via appropriate shape, configuration, dimensions, of trap relative to access opening, and amount of decoy material, produce a protective visual illusion against a perpetrator performing unauthorized or illegal action Optional automatic in-situ testing/monitoring quality or/and quantity of decoy material in mounted trap.
US09189935B2	Narrow width acousto-magnetic anti-theft marker having multiple resonators This invention is about a commercial anti-theft device, more specifically involving in a narrow acousto-magnetic (AM) anti-theft marker having multiple resonators. A type of narrow AM anti-theft marker with multiple resonators includes an elongated housing, resonators, housing cover and magnetic bias pieces. The resonators are placed inside the cavity of the housing. The aforementioned housing bottom is connected to the housing cover so that the resonators are enclosed inside the housing. The number of aforementioned resonators is two to five; the width of resonators is 1.6-5.3 mm. This anti-theft marker has high performance/cost ratio. Because resonators with smaller than conventional width are used, it meets the customer demands for protecting smaller or more exquisite merchandise. Meanwhile it saves expensive amorphous alloys of resonators and alloys of bias and double tapes, led to lower raw material costs.
US09189933B1	Portal-security detection mechanism An electronic device that identifies an environmental condition associated with a portal (such as a door or a window) is described. In particular, a sensor mechanism in the electronic device measures environmental signals associated with the portal, such as vibrations and/or acoustic waves. Then, an integrated circuit in the electronic device analyzes the measured environmental signals to identify the environmental condition. To facilitate the measurements, the electronic device may be mechanically coupled to the portal by an impedance-matching material, so that the vibrations and/or the acoustic waves are coupled to the electronic device. Moreover, the analysis may also be based on measured environmental signals received from one or more additional electronic devices that are mechanically coupled to the portal and/or may involve correcting the measured environmental signals for a mechanical transfer function associated with the portal based on a position of the electronic device on the portal.
US09189930B2	Customizing alerts on an alerting device A first device may receive an alert from a second device; and execute, based on receiving the alert, a particular alerting program, of multiple alerting programs, to activate or deactivate multiple separate light sources, implemented within the first device, in a sequence in accordance with instructions included in the particular alerting program. The instructions may be selected or customizable by a user via an application associated with the first device. The first device may be separate from the second device.
US09189927B2	Gaming system and method for providing an incremental wagering game Various embodiments of the present disclosure provide a gaming device which enables a player to purchase the game in stages. The gaming device enables the player to place a first wager for a play of the game. After receiving the first wager, the gaming device randomly generates and displays a first outcome, determines whether the displayed first outcome includes any winning symbol combinations, and provides any awards associated with any displayed winning symbol combinations. Thereafter, the gaming device offers the player the opportunity to make a second wager for the play of the game. If the second wager is placed, the gaming device generates and displays the second outcome while the first outcome remains displayed. The gaming device evaluates the displayed second outcome in combination with the displayed first outcome to determine whether any winning symbol combinations are displayed and provides any awards associated with any displayed winning symbol combinations.
US09189920B2	Crowd based bonus and promotional system and method A bonus and/or promotion system, such as for a casino or other retail location, includes one or more sensors for detecting the presence of one or more persons at a location and a bonus or promotion generator configured to generate and output bonuses or promotions based upon detected levels of persons in an area. The bonus or promotion generator may provide an output to existing audio and/or visual display devices of the location for announcing bonuses or promotions.
US09189919B2	Gaming system and method providing a multiple-player bonus redemption game A gaming system and method including a plurality of gaming devices that may participate in a shared secondary or bonus game and a controller operable to communicate with said plurality of gaming devices. At least one of the plurality of gaming devices is programmed to generate and accumulate collectors upon an occurrence of a first triggering event. Upon an occurrence of a second triggering event at one of the gaming devices, the controller enables a player of said gaming device to redeem a quantity of accumulated collectors in a bonus event. The controller also enables the player to invite other gaming devices from the plurality of gaming devices to redeem accumulated collectors and participate in said bonus event. The odds of each player earning a higher-valued total award in the bonus event increases with the total number of accumulated collectors redeemed in the bonus event.
US09189916B2	Wagering game with multiple viewpoint display feature A gaming system for conducting a wagering game includes an input device for receiving a wager to play a wagering game. The gaming system further includes at least one display for displaying a plurality of game elements. The at least one display is adapted to display a first three-dimensional view of the plurality of game elements from a first viewpoint and a second three-dimensional view of at least one of the plurality of game elements indicating a randomly-selected outcome from a second viewpoint. The first three-dimensional view and the second three-dimensional view are rendered in real-time.
US09189913B2	Automatic vending machine An automatic vending machine with a stabilizing support for stocked items of merchandise includes a cabinet, a driving member secured in the cabinet, a helical element, and a pressing member secured to the cabinet. The cabinet includes a bottom plate. The helical element is secured to the driving member and moveable by the driving member. The pressing member is located within the coils of the helical element and runs the length of the helical element to support items of merchandise and reliably deliver an item of merchandise when bought.
US09189911B2	Method and apparatus for detecting fraud attempts in reverse vending machines A reverse vending machine, including: a chamber adapted to receive an object returned to the reverse vending machine; a plurality of cameras arranged around the perimeter of the chamber for viewing said object; a transparent or translucent plate arranged such that the cameras in use view the object obliquely through the transparent or translucent plate; and means adapted to couple light into the plate such that the light undergoes total internal reflection in the plate. Also, a method of detecting dirt in a reverse vending machine.
US09189907B2	Adjusting device for coin counting machine An adjusting device for a coin counting machine contains: a base including a plate member, an orifice, an adjusting hole, and a positioning hole. The plate member has the orifice screwing with a screw rod of an elastic fitting set, the adjusting hole, and the positioning hole. The adjusting hole has an adjusting post engaging with an elongated aperture of an adjustment piece, the positioning hole has a fixing post engaging with a fix aperture. An adjustment piece includes a tab, an extension, an arcuate sliding aperture, the elongated aperture, and the fix aperture. The elastic fitting set includes the screw rod, a resilient element, and a driving block, wherein the screw rod is screwed with the orifice via the arcuate sliding aperture and has the resilient element, and the driving block is fitted between the resilient element and the tab and is screwed with the screw rod.
US09189904B1	Exit-code-based RFID loss-prevention system Methods and systems are described for authorizing an item with an RFID tag to leave a facility. In one embodiment, a mobile device receives or determines an exit code (EC) to write into the tag in response to providing authorizing information. The EC may be based on information stored in the tag such as the tag's item identifier or other tag information (collectively an item identifier or II), a ticket value, other information such as the OC, a mobile identity or location, or any other suitable information. Upon verification of the EC, the tagged item is allowed to leave the facility. In another embodiment, the mobile device stores an item identifier (II) associated with the tag and provides authorizing information. Upon verifying the authorizing information and confirming that the stored II corresponds to the tagged item's II, the tagged item is allowed to leave the facility.
US09189901B2	Preauthorized wearable biometric device, system and method for use thereof Embodiments are directed towards authenticating users using biometric devices. The biometric device may be arranged to capture one or more biometric feature of a user that may be wearing the biometric device such as biometric features that correspond to an electrocardiogram of the user. The user of the biometric device may be authenticated based on one or more biometric features, or a combination thereof. Authenticating the user of the biometric device, may include communicating information that includes biometric features to an authorized authentication device (AAD). When the user is authenticated, the biometric device may be preauthorized for the user. When the preauthorized biometric device senses at least one access point, an authorization signal may be provided to the access point. If the preauthorized biometric device is removed from the user, the biometric device is deauthorized, disabling access to access points by the user.
US09189898B2	Tachograph having an interface for an external data input device A tachograph including a control unit and an output unit connected to the control unit, and an interface for connecting to a data but. The tachograph additionally includes a further interface, by which a network connection can be established between an external data input device and the output unit, so that data kept available on the external data input device can be output by the output unit.
US09189897B1	Personalized driving ranking and alerting Methods for communicating a ranking characterizing a portion of a roadway include: (a) ranking at least one segment of a roadway based on an amount of deviation between a true driving behavior on the at least one segment of the roadway and an expected driving behavior predefined for the at least one segment of the roadway; and (b) communicating the ranking to a client. Apparatuses for communicating a ranking characterizing a portion of a roadway are described.
US09189896B2	Method and system for vehicular data collection Methods and systems are provided for vehicular communications. The systems include a server and a controller in a vehicle. The controller is configured to receive data from vehicular components and transmit the data to the remote server. In a normal mode, the data is transmitted in accordance with a normal frequency of events, while in an abnormal mode, the data is transmitted in accordance with an abnormal frequency of events. The abnormal frequency is different from the normal frequency. The abnormal mode is set in response to an event trigger denoting a fault of at least one component.
US09189891B2	Systems and methods for navigating a camera Systems and methods for navigating a camera are provided. In some aspects, a method includes identifying an initial projection of a target on a viewport of the camera. The initial projection is associated with an initial camera pose of the camera. The method also includes determining a final projection of the target on the viewport. The final projection is associated with a final camera pose of the camera. The method also includes calculating intermediate camera poses of the camera along a navigational path between the initial camera pose and the final camera pose. Each of the intermediate camera poses is associated with a corresponding intermediate projection of the target on the viewport. The intermediate camera poses is calculated such that each subsequent one of the intermediate projections is closer to the final projection than is a previous one of the intermediate projections.
US09189890B2	Orientating an oblique plane in a 3D representation Systems and methods are provided to facilitate orientation of a plane with respect to a three-dimensional representation. A device is presented utilizing at least one of an accelerometer, gyroscope, or combination thereof, enabling determination of a current position and/or orientation of the device. Outputs from the accelerometer, gyroscope, etc., are captured and orientation of a plane displayed with regard to the three-dimensional representation is accordingly adjusted to correspond with the position of the device. Imaging information relating to the three-dimensional representation and the plane can be captured facilitating analysis of the respective slice of the three-dimensional representation associated with the plane.
US09189885B2	Visual presentation system A method and system for displaying a 2D representation of a 3D world on an image plane of a simulator. The image plane defines a fixed viewing region of the replica environment of the simulator and also corresponds to a view observed by an operator of the simulator. The method includes the steps of determining a head position of the operator of the replica environment and modifying a viewing volume of the 3D world based on the head position of the operator while keeping the image plane constant to form a modified viewing volume. The 2D representation based on the modified viewing volume is then generated and displayed on the image plane.
US09189883B1	Rendering of multiple volumes Embodiments of the invention are directed to rendering scenes comprising one or more volumes viewed along a ray from a virtual camera. In order to render the one or more volumes, embodiments may first determine individual transmissivity functions for the one or more volumes. The individual transmissivity functions may be combined into a combined transmissivity function for the scene. The combined transmissivity function may be used to generate a cumulative density function (CDF) for the scene. The CDF may be sampled in order to determine a plurality of points along the ray. A contribution to a pixel may be determined for each sampled point. The contributions associated with the sampled points may be combined to determine a combined contribution to the pixel.
US09189882B2	Method and apparatus for ray tracing in a 3-dimensional image system A ray tracing method and apparatus in a 3-Dimensional (3D) image system. The method includes sampling for four vertexes of each pixel in a plurality of pixels, sampling for a pivot of the each pixel, and determining a color of the each pixel using the sampling result on the four vertexes and the pivot.
US09189868B2	Multimedia content delivery system A multimedia content delivery apparatus for delivering graphical information across a network to a client device, the apparatus including an environment engine controlling a virtual environment responsive to user commands, an object transformation unit transforming original object data of objects in the environment into compressed object data, a data management unit transmitting compressed data to the client device for decompression to output a sequence of images of the environment on the device, and a handler unit receiving commands from the device and providing the user commands to the environment engine.
US09189860B2	Real-time, interactive image analysis An imaging system and method for real-time, interactive image analysis are provided herein. The imaging system includes an imaging device configured to capture an image of an object and a computing device that includes a display. The computing device is communicably coupled to the imaging device and is configured to acquire the image from the imaging device and generate a segmentation of the image in real-time based on a position of a pointer on the display. The imaging device is also configured to generate a representation of the object based on the segmentation, calculate measurements for the object based on the segmentation, and display the representation and the measurements via the display.
US09189858B2	Determining coordinates of a target in relation to a survey instrument having at least two cameras A method is disclosed for determining coordinates of a target in relation to a surveying instrument wherein a first image is captured using a first camera in a first camera position and orientation, a target is selected by identifying at least one object point in the first image, and first image coordinates of the object point in the first image are measured. In at least one embodiment, a second image is captured using a second camera in a second camera position and orientation, the object point identified in the first image is identified in the second image, and second image coordinates of the object point in the second image are measured. Target coordinates of the target in relation to the rotation center of the surveying instrument are then determined based on the first camera position and orientation, the first image coordinates, the second camera position and orientation, the second image coordinates, and first and second camera calibration data. Furthermore, a surveying instrument for performing the method is disclosed.
US09189854B2	Contour detection and image classification Systems and methods are provided for creating contour images that represent the contour of objects reflected in images, calculating contour histogram descriptors of the contour images, and classifying images based in part on the histogram descriptors of the contour images. For example, a contour image of an image is created. A radial-polar grid having a plurality of radial-polar bins is then positioned on the contour image. A contour histogram descriptor is created to include a number of bins that correspond to the radial-polar bins of the radial-polar grid, where the contents of the bins of the contour histogram descriptor represent the number of pixels of the contour image that are located in the corresponding radial-polar bins of the radial-polar grid. Images are classified at least based in part on comparisons between contour histogram descriptors of the images and contour histogram descriptors of training images.
US09189852B2	Method for manually aligning two digital images on mobile devices Systems and methods of aligning two digital images using a user interface on a device that includes an electronic circuit and a display screen are disclosed. The electronic circuit displays a first image on the display screen and receives a selection of a first reference point on the first image from the user interface. The electronic circuit generates a snippet image that is a partially transparent square portion of the user map image centered on the first reference point. The electronic circuit overlays the snippet image on a second image on the display screen, such that the second image is visible through the snippet image. The electronic circuit receives a selection of a second reference point on the second image corresponding to the first reference point on the first image from the user interface and an indication of acceptable alignment of the two digital images.
US09189849B2	Method and apparatus for multi-level eye registration A method for performing multi-level eye registration comprising: obtaining a first initial reference eye image by a first diagnostic device and defining a reference coordinate system; obtaining a second eye image by a surgery device, said second eye image being obtained in a pre-surgery phase before the surgery has started; performing a first registration between said first eye image and said second eye image to obtain a first registration result; obtaining a third eye image by said surgery device, said third eye image being obtained after surgery has started; performing a second registration between said second eye image and said third eye image to obtain a second registration result; combining said first and second registration results to obtain a combined registration result to thereby obtain a registration between said initial reference eye image obtained by said diagnostic device and said third eye image obtained by said surgery device after surgery has started.
US09189846B2	Method and device for representing multichannel image data The invention relates to a method for display of multi-channel image data, characterized in that multi-channel image data of an object that are provided by multiple channels of an imaging device are received, an image synthesis is performed on the basis of the multi-channel image data, and a synthesized image data set is output on a display device, characterized in that the image synthesis is performed in a way that the single-channel image data are temporally shifted according to a given function and the parameters of the given function are controllable by a user during the output of the synthesized image data set on the display device. Furthermore, the invention relates to a device for display of multi-channel image data with an appliance for receiving multi-channel image data of an object that are provided by multiple channels of an imaging device, a computation unit for the execution of an image synthesis which is performed on the basis of the multi-channel image data, and an output unit for the display of synthesized image data sets, characterized in that the computation unit is designed in a way that for the image synthesis the single-channel image data are temporally shifted according to a given function and parameters of the given function are controllable by a user during the output of the synthesized image data set on the display device.
US09189843B2	Pattern inspection apparatus and method A pattern inspection apparatus is used for inspecting a fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data. The pattern inspection apparatus includes a reference pattern generation device configured to generate a reference pattern represented by one or more lines, comprising one of a line segment and a curve, from the data, an image generation device configured to generate the image of the pattern to-be-inspected, a detecting device configured to detect an edge of the image of the pattern to-be-inspected, and an inspection device configured to inspect the pattern to-be-inspected by comparing the edge of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.
US09189841B2	Method of checking the appearance of the surface of a tyre A tire appearance detection method includes: capturing an original grey-level image of an inner surface of a tire, and transforming the original image into an orthonormal space with an x-axis (OX) representing a circumferential direction and with a y-axis (OY) representing a radial direction; applying a series of filters to the original image, to obtain a multivariate image; splitting the multivariate image according to a predefined tiling in axial and circumferential directions, to obtain multivariate sub-images of the inner surface of the tire; transforming each of the multivariate sub-images into one-dimensional vectors using selected descriptors, to obtain a simplified multivariate image of the inner surface of the tire; transforming the simplified multivariate image into a common reduced factorial space; and locating sub-images of the inner surface of the tire containing an anomaly using a classifier suitable for identifying an area of the common reduced factorial space containing an anomaly.
US09189837B2	Method and device for processing digital image, and computer-readable recording medium for processing digital image There is provided a method of processing a digital image including: (a) obtaining a plurality of images; (b) converting the plurality of images into histograms; (c) setting one of the plurality of images as a reference image and another of the plurality of images as a comparison target image; (d) adjusting a distribution of the histogram of the reference image to match a distribution of the histogram of the comparison target image to produce an adjusted reference image; (e) comparing a difference between the adjusted reference image and the comparison target image to produce a masking image; (f) applying the masking image to the comparison target image to produce an adjusted comparison target image; and (g) combining the reference image and the adjusted comparison target image to produce a high dynamic range (HDR) image. Accordingly, even if there is a complex motion on a subject, a clear image without an image overlap or a ghost effect may be obtained when producing the HDR image.
US09189833B2	Linear transform-based image processing techniques Signal processing techniques utilize operations performed in linear transform domains to perform operations including noise reduction, noise shaping, and gradient integration. The standard wavelet shrinkage method may be altered to constrain the modification of wavelet coefficients towards an initial estimate of the adjusted coefficients. The initial estimates can be computed by applying an edge detection filter to an input image. The wavelet shrinkage method may additionally be altered to include a noise preservation factor that enables an amount of noise to be preserved to avoid the production of artifacts. Integration of modified multi-dimensional gradients may also be performed in the wavelet (or other linear transform) domain by performing simple integration of the gradient (summing) separately in each dimension, obtaining a linear transform representation of the resulting signals, and combining the linear transforms.
US09189832B2	Method and system for noise reduction in low dose computed tomography A method includes de-noising projection data from a lower dose scan in the projection domain, reconstructing the de-noised projection data to generate volumetric image data, and de-noising the volumetric image data in the image domain. A system includes a projection domain processor (116) that de-noises projection data from a lower dose scan, a reconstructor (118) that reconstructs the de-noised projection data and generates image data, and an image domain processor (120) that de-noises the image data such that a noise level of the de-noise image data is substantially the same as an estimated image data noise level of image data for a higher dose scan.
US09189828B2	Graphic processor based accelerator system and method An accelerator system is implemented on an expansion card comprising a printed circuit board having (a) one or more graphics processing units (GPUs), (b) two or more associated memory banks (logically or physically partitioned), (c) a specialized controller, and (d) a local bus providing signal coupling compatible with the PCI industry standards. The controller handles most of the primitive operations to set up and control GPU computation. Thus, the computer's central processing unit (CPU) can be dedicated to other tasks. In this case a few controls (simulation start and stop signals from the CPU and the simulation completion signal back to CPU), GPU programs and input/output data are exchanged between CPU and the expansion card. Moreover, since on every time step of the simulation the results from the previous time step are used but not changed, the results are preferably transferred back to CPU in parallel with the computation.
US09189824B2	Dynamic aviation planning tool A method for airport dynamic aviation planning is disclosed. The method includes the steps of populating an existing conditions database comprising an inventory of existing conditions data at the airport, defining an aviation planning scenario with a graphical user interface by selecting input parameters, developing, by a processor, a future growth forecast comprising future levels of aviation activity at the airport in response to the selected input parameter, generating, by a processor, a facility requirements summary needed to satisfy the selected input parameter by comparing the difference between the future growth forecast and the existing conditions data, and generating, by a processor, a dynamic airport layout plan graphically representing the facility requirements.
US09189823B1	Transferring an ownership right to a copy of a copyrighted work from a physical object to digital media An ownership interest in copies of physical artifacts is acquired from a set of owners. Each physical artifact contains a copyrighted work. The acquired ownership interest in the copyrighted work is transferred from at least a subset of the physical artifacts into a corresponding subset of digital content media items. The acquired ownership interest in the copyrighted works is leveraged to permit a set of consumers to access and utilize the subset of digital content media items. One or more computing devices execute a set of one or more functions to ensure a quantity of the consumers permitted to concurrently access digitized content of the digital content media items never exceeds a quantity of the acquired ownership interests acquired from the physical artifacts.
US09189822B2	Process, device and system for mapping transformers to meters and locating non-technical line losses A process, device and system for mapping usage data from a plurality of utility usage nodes, such as electricity usage meters, to one or more utility distribution nodes, such as a transformer, in which utility usage data collected at a collection device from the plurality of utility usage nodes at predetermined intervals is received, and utility distribution data collected at the collection device from the utility distribution node at the predetermined intervals is likewise received. Aggregate usage data from one or more of the plurality of utility usage nodes is compared to distribution data from the utility distribution node during one or more of the same predetermined intervals to determine, using a computer, which of the plurality of utility usage nodes is connected to the utility distribution node.
US09189821B2	Methods, apparatus and systems for generating digital-media-enhanced searchable electronic records of underground facility locate and/or marking operations Generating a digital-media-enhanced electronic record of a locate and/or marking operation performed by a locate technician. The locate and/or marking operation comprises locating and/or identifying, using at least one physical locate mark, a presence or an absence of at least one underground facility within a dig area, wherein at least a portion of the dig area may be excavated or disturbed during excavation activities. A location of the at least one underground facility and/or the at least one physical locate mark is electronically rendered on a display device so as to generate an electronic visual representation of the locate and/or marking operation. At least one digital media file representation of a corresponding digital media file relating to at least one aspect of the locate and/or marking operation or an environment of the dig area is also electronically rendered on the display device, so as to generate a digital-media-annotated representation of the locate and/or marking operation. Information relating to the digital-media-annotated representation of the locate and/or marking operation is electronically transmitted and/or stored so as to generate the digital-media-enhanced electronic record of the locate and/or marking operation.
US09189820B1	Methods and systems for creating monetary accounts for members in a social network Embodiments of the present invention comprise systems and methods of creating monetary accounts for members in a social network. One aspect of one embodiment of the present invention comprises receiving transaction data associated with at least one member of a social network, associating a first member of the social network with a trust factor, associating a second member of the social network with another trust factor, and determining whether to create an account between the first member and second member, based at least in part on the trust factor of the first member and the trust factor of the second member. Another aspect of one embodiment of the present invention comprises receiving transaction data from a plurality of members of a social network, wherein each member has an associated trust factor, and resolving the transaction data based at least in part on the trust factors associated with the plurality of members.
US09189816B1	Budget planner for softlines Various approaches described herein enable various types of users, such as finance managers, vendors, and vendor managers to access up-to-date information in a retail environment that can assist with obtaining and tracking various items to be offered through that environment. A budget planner can analyze information such as historical performance, projection, and vendor data to establish a budget plan for various providers for a particular period. The budget information is fed to an assortment planner, which can use similar and other types of information to allocate that budget across various types and styles of item for each provider. A commitment tracker enables a user to commit to at least some portion of the allocation for various items, and track how well the orders are filled. Information at each level is fed back into the system to be almost instantly available and to adjust allocations for current or future periods.
US09189815B2	User interface for an electronic trading system A user interface for an electronic trading exchange is provided which allows a remote trader to view in real time bid orders, offer orders, and trades for an item, and optionally one or more sources of contextual data. Individual traders place orders on remote client terminals, and this information is routed to a transaction server. The transaction server receives order information from the remote terminals, matches a bid for an item to an offer for an item responsive to the bid corresponding with the offer, and communicates outstanding bid and offer information, and additional information (such as trades and contextual data) back to the client terminals. Each client terminal displays all of the outstanding bids and offers for an item, allowing the trader to view trends in orders for an item. A priority view is provided in which orders are displayed as tokens at locations corresponding to the values of the orders. The size of the tokens reflects the quantity of the orders. An alternate view positions order icons at a location which reflects the value and quantity of the order. Additionally, contextual data for the item is also displayed to allow the trader to consider as much information as possible while making transaction decisions. A pit panel view is also provided in which traders connected to the pit are represented by icons, and are displayed corresponding to an activity level of the trader.
US09189811B1	Electronic marketplace recommendations A shared “universal” virtual shopping cart (“the cart”) may be provided by a host to enable information sharing between multiple disparate electronic marketplaces provided by various merchants. The host may obtain user information via the cart to improve interactions with a user. The host may recommend an item to the user that is offered at a lower price and related to an item retained in the user's cart. The host may also recommend items based on a user's purchase history, such as complementary items (e.g., up-sell items) and items other users may recommend. In some aspects, the host may compile best selling lists based on data from multiple electronic marketplaces. The host may also perform user specific operations such as indicate an item in a cart is a duplicate of a previous purchase and monitor a price and/or available quantities of an item in the cart.
US09189809B1	Purchase transaction presentation Methods, systems, and apparatus, including computer programs encoded on computer storage media, for presenting information about purchase transactions. One of the methods includes receiving a request for information about a merchant and identifying one or more purchase transactions conducted by the merchant in response to the request. A presentation is generated comprising a purchase transaction entry for each of the one or more purchase transactions, wherein each purchase transaction entry represents one of the one or more purchase transactions conducted by the merchant and identifies one or more items sold in the purchase transaction. The presentation is provided in response to the request.
US09189807B2	In-network online storage with increased session bandwidth A system includes a private communications network to provide content to a user using a first, base amount of bandwidth, a policy server, coupled to the network, for managing services provided to a user of the communications network and a data center, coupled to the network, for providing online storage to the user by the communications network, wherein the first, base bandwidth of the communication network is increased to a second, increased bandwidth for a data upload made by the user. The use of a private network addresses the security and efficiency issues of transmitting data over a public network and increased bandwidth enables data transmission between a user and a data center to be completed in a timely manner.
US09189803B2	Server-based product substantiation with local filtering system and method A system and method is presented for product substantiation and promotion redemption. A purchased product list is transmitted from a retail store system to a promotion analysis server along with a user identifier. The promotion analysis server identifies promotions available to the user, and then considers whether the benefits under the promotions are still available to the user. Discounts for available promotions related to the purchased product list are calculated and transmitted to the retail store system for deduction from the transactions. An approved product list can be provided that filters the purchased product list before transmittal. The approved product list can include promotions from a plurality of programs.
US09189793B2	System and method of creating and displaying messages A system and method of creating a message and displaying the same are described. The system includes a message composer operable on a computer system for composing and generating a message file. The message file has a content portion for containing a message content and a header portion for containing a message attribute. The system also includes a display device having a memory for storing the message file and a message management module for retrieving and rendering the message content on a screen, wherein the stored message file is assigned at least one of a time stamp and a sequential number for establishing a queue.
US09189792B2	System and methods for monitoring devices, systems, users, and user activity at remote locations Systems and methods for monitoring remotely located devices, systems, users, and user activities are described. The systems contain a central device where the digital content is stored, a remote device for delivering the digital content to a user, and means for transferring the digital content from the central location to the remote location. Data about the remote devices, users, and the user activities at the remote devices may be monitored. The data includes fault monitoring data, system performance data, system management data, user physical activity data, graphical interface data, demographic data, sales transaction data, survey data, and the like. The data can be monitored on a periodic basis or on a substantial real-time basis. The monitored data can then be used for various purposes, including customizing the advertising and content for an individual user or a group of users, reducing time wasted for diagnostic trips, lessening user frustration, and/or enhancing customer relationship management, as well as facilitating system administration, system maintenance, and/or statistical marketing analyses.
US09189791B2	System and method for pushing advertisements A server of an operator of a resource is provided that includes a processor configured for operating a service provider application, which is configured for receiving one or more advertisements that are directed to one or more advertised products or services, and are received from one or more advertising merchants. The service provider application is also configured for receiving an indication of a mobile terminal attempting to access the resource of the operator, and for pushing one or more of the received advertisements from the operator to the mobile terminal in response thereto. The advertisement(s) having been pushed to the mobile terminal for consumption thereat, the service provider application is further configured for providing a user of the mobile terminal with a discount in a cost associated with the mobile terminal accessing the resource of the operator in response to at least a partial consumption of the advertisement(s).
US09189790B2	Customer service controller Information about a caller is provided to an agent, such as a customer service operator in a customer service call center. In one embodiment, the agent may receive detailed account and/or personal information about the caller before being connected to the actual or live call. For example, the agent receives information from a customer database regarding a customer profile and information from an order database regarding order or transaction information. The customer database and the order database are external to the call center. The agent may modify the customer profile and/or the order or transaction information. The customer database and order database are update accordingly and the information may be transferred along with the call to another agent.
US09189789B1	Methods, systems, and articles of manufacture for fulfilling a loan request of a business entity Methods, systems, and articles of manufacture for fulfilling a loan request of a business entity. Embodiments are utilized to identify or receive a loan request from the business entity, identify or create borrower and lender profiles, and match the loan request for the business entity using compatibility criteria included in or associated with the profiles. Certain profiles may be created using electronic data from financial management system, and such data can be verified by the financial management system. Borrower-lender compatibility results can be displayed to lenders or business entity for review. A single lender may commit to fund a loan, or respective lenders may commit to fund respective loan portions, which may be presented to the business entity.
US09189783B2	Wireless mobile transaction system and the procedure for carrying out transactions with a mobile phone The invention belongs to the field of systems for provision of computer-supported transactions with the use of a mobile phone, more exactly to the field of enabling universal communication between a telephone device, different transaction terminals and different servers including bank servers for carrying out certain transactions, considering all the security requirements against unauthorized access to an individual bank account or other user account. The core of the wireless mobile transaction system and the procedure for carrying out transactions with the mobile phone according to the invention is in the fact that the transfer of the transaction data between the user's mobile phone and the transaction processing center is done using a secure connection based on GPRS or UMTS data package transfer, whereas between the user's mobile phone and the shop's POS terminal the data is transferred using sound-modulated data transfer through an acoustic coupling or on the basis of infrared data association (IrDA) or Bluetooth wireless data connection or NFC contactless short-range communication technology or wireless internet connection WLAN. This way the user's mobile phone becomes a simple, safe and handy transaction instrument for carrying out financial transactions, such as electronic payment and transfer of funds, as well as non-financial transactions, such as using bonuses, collecting loyalty points and allowing and/or controlling access to secured areas, premises, buildings and similar. According to the invention the system is using operator's existent dedicated wireless data-transfer technology, such as GPRS or UMTS, for transferring data between the transaction processing center and the mobile phone, and is performing identification of the user with the certificate which is securely stored on the user's SIM card or in another secure memory of the mobile phone.
US09189777B1	Electronic commerce with cryptographic authentication A method for facilitating an authentication related to an electronic transaction between a first and a second user is provided. Authentication data is received from the first user along with transaction data defining the first user and the electronic transaction to be authenticated. This authentication data is compared to enrollment authentication data associated with the first user in order to verify the identity of the first user. When the user is properly verified, access to at least one private cryptographic key stored on a secure server is available for use in securing the electronic transaction. The particular private cryptographic key need not be released from the secure server. Data indicating the status of the authentication may then be sent to one of either the first or second user.
US09189776B2	Image editing device, image editing method, and non-transitory computer-readable recording medium encoded with image editing program The image editing device is provided with an area specifying portion to associate identification information for identifying an area of interest with each of a plurality of areas into which an image of original data is divided, an image generating portion to generate an edit image by disposing onto the image of the original data a section image enclosing the area of interest for each of a plurality of areas in association with an image indicating the identification information, a transmission portion to transmit a first electronic mail including the edit image, a reception portion to receive a second electronic mail transmitted back in response to the first electronic mail, an editing portion to generate edited data obtained by updating the original data based on an editing instruction included in the second electronic mail, and an output portion to output the edited data generated.
US09189774B2	System that supports automatic blogging and social group interactions A system that supports automatic blogging as well as social group interactions comprises a mobile device with a client application that is communicatively coupled over Internet to an interaction management server capable of facilitating message distribution to social groups as well as blogging of messages selectively. The client application of the mobile device comprises a message creation module that facilitates creation of a message by a user of the mobile device, a social group interaction module that communicates the message to a social group managed by the interaction management server coupled to the mobile device, and a blogging module that communicates the message as a first blog entry to blog page managed by the interaction management server.
US09189766B2	Real time provisional evaluation of utility program performance Embodiments are directed towards automatic provisional evaluation of utility program performance. Treatment facilities may be determined depending characteristics of a project. A performance profile corresponding to each treatment facility may be generated based on historical information corresponding to each treatment facility. Current usage information and current weather information for each treatment facility may be determined. Pre-treatment usage information that corresponds to each treatment facility may be determined based on the performance profile and the current usage information and the current weather information. A program evaluation report may be generated that includes program realization information. Program realization information may be based on an aggregation of project savings information that corresponds to the treatment facilities. Project savings information may be modified based on confidence weights. A program evaluation report may include information from one or more comparison facilities.
US09189764B2	Usage of quantitative information gain to support decisions in sequential clinical risk assessment examinations A computer-implemented method and apparatus for supporting decisions in sequential clinical risk assessment examinations, the method comprising receiving one or more first test results and a question, both associated with a patient; and assessing by a processor associated with a computing platform, information gain provided by a second test which may be performed for the patient, as the conditional mutual information between a second test and the question, using the first test result.
US09189759B2	Methods, systems, and computer-readable media for providing contact information at turf level Methods, systems, and computer-readable media provide for providing contact information at turf level. According to embodiments, a method for providing contact information at turf level is provided. According to the method, a selected turf from a plurality of turfs displayed in a spreadsheet-based graphical user interface (GUI) is received. In response to receiving the selected turf, contact information for field supervisors associated with disciplines of the selected turf is displayed.
US09189756B2	Case management system and method for collaborative project teaming Described are a system and method for facilitating collaboration on a project by multiple team members. A plurality of projects and a plurality of documents are stored in persistent storage of a server system. A user launches an application program that displays an expandable and collapsible view showing each project of the plurality of projects for which the user is a team member and each document linked to each of the shown projects. Searchable metadata is associated with each project. The searchable metadata associated with each project is propagated to each document linked to that project. A given document is searched for using the metadata propagated from the project linked to that document.
US09189754B2	Adding syndication feeds to calendar application items A user of a calendar application subscribes to a syndication feed corresponding to an event recorded at the calendar application in a calendar data format. The syndication feed commences sending feed data to the user upon occurrence of the event. The feed data indicates a status of the event. The syndication feed binds to a feed data entry in the calendar application that is associated with the calendar item. The feed data of the syndication feed is converted from a feed format to the calendar data format usable by the calendar application to produce converted feed data. The converted feed data is presented in the calendar application proximate to the calendar item. One or more of the subscribing, binding, converting, and presenting is performed by a computing device.
US09189750B1	Methods and systems for sequential feature selection based on significance testing Systems and methods for determining a reduced feature set for a model for classifying data are disclosed. In some embodiments, the method includes obtaining a first feature set for the model. The method may also include selecting a second feature set for the model, wherein the second feature set is a candidate for the reduced feature set. In some embodiments, the second feature set is a subset or a superset of the first feature set. In some embodiments, the selection includes applying a selection statistical test. The method may further include determining whether the model using the second feature set in place of the first feature set is adequate for classifying the data. In some embodiments, the determination includes applying an evaluation statistical test.
US09189747B2	Predictive analytic modeling platform Methods, systems, and apparatus, including computer programs encoded on one or more computer storage devices, for training a predictive model. In one aspect, a method includes receiving over a network predictive modeling training data from a client computing system. The training data and multiple training functions obtained from a repository of training functions are used to train multiple predictive models. A score is generated for each of the trained predictive models, where each score represents an estimation of the effectiveness of the respective trained predictive model. A first trained predictive model is selected from among the trained predictive models based on the generated scores. Access to the first trained predictive model is provided over the network.
US09189745B2	Temporal memory using sparse distributed representation A processing node in a temporal memory system includes a spatial pooler and a sequence processor. The spatial pooler generates a spatial pooler signal representing similarity between received spatial patterns in an input signal and stored co-occurrence patterns. The spatial pooler signal is represented by a combination of elements that are active or inactive. Each co-occurrence pattern is mapped to different subsets of elements of an input signal. The spatial pooler signal is fed to a sequence processor receiving and processed to learn, recognize and predict temporal sequences in the input signal. The sequence processor includes one or more columns, each column including one or more cells. A subset of columns may be selected by the spatial pooler signal, causing one or more cells in these columns to activate.
US09189743B1	System, method, and computer program product for constraint solving The present disclosure relates to a computer-implemented method for iteratively solving a constraint satisfaction problem. The method may include assigning a value to each of one or more variables associated with the constraint satisfaction problem, each of the one or more variables having a first domain. The method may also include identifying an invalid solution resulting from a first value assigned to a first variable. The method may further include replacing the first value with a second value assigned to the first variable. The method may also include, upon identifying the invalid solution, generating a second domain larger than the first domain.
US09189741B2	Automated contract management A system for automated contract management includes a computing device (102) and a memory storing program instructions that when executed by computing device (102). The program instructions cause the computing device (102) to generate an ontology (115) of terms and cross-contractual relationships in contracts (105, 110) and machine interpretable terms (120) and cross-contractual relationships (125) derived from the contracts (105, 110) with reference to the ontology (115). A method for automated contract management is also provided.
US09189736B2	Method and system for processing incompatible NUI data in a meaningful and productive way A method and system for processing incompatible NUI data in a meaningful and productive way. An NUI system capable of combining NUI events from multiple NUI devices and producing a standardized output is described. NUI adaptors covert low level input data into high-level NUI events. These events are stored in a repository. A behavioral analysis engine makes use of the stored NUI events and produces a combined output for users making use of behavioral pattern rules. The behavioral analysis engine also makes use of NUI events for training the system to create and utilize new pattern rules.
US09189735B2	Sparse class representation with linear programming A method, apparatus and computer program product for providing sparse class representation with linear programming is provided. A first model is built using a positive data set. A second model is built using a negative data set. Linear programming is used to distinguishing the first model from the second model to determine a set of salient features for a filter for use as an image classifier.
US09189731B2	Structural plasticity in spiking neural networks with symmetric dual of an electronic neuron A neural system comprises multiple neurons interconnected via synapse devices. Each neuron integrates input signals arriving on its dendrite, generates a spike in response to the integrated input signals exceeding a threshold, and sends the spike to the interconnected neurons via its axon. The system further includes multiple noruens, each noruen is interconnected via the interconnect network with those neurons that the noruen's corresponding neuron sends its axon to. Each noruen integrates input spikes from connected spiking neurons and generates a spike in response to the integrated input spikes exceeding a threshold. There can be one noruen for every corresponding neuron. For a first neuron connected via its axon via a synapse to dendrite of a second neuron, a noruen corresponding to the second neuron is connected via its axon through the same synapse to dendrite of the noruen corresponding to the first neuron.
US09189724B2	Semiconductor device, portable communication terminal, IC card, and microcomputer The present invention provides a noncontact interface technique capable of performing communication operation without stopping an internal operation even when a clock signal cannot be extracted from a carrier wave. In a semiconductor device that receives a modulated carrier wave from an antenna, generates an internal clock signal on the basis of a clock signal extracted from the received carrier wave, and performs operation synchronously with the internal clock signal, a PLL circuit that receives the extracted clock signal and generates the internal clock signal is provided with a voltage control oscillation function. In the case where the clock signal extracted from the carrier wave is discretely interrupted, the function makes the internal clock signal maintained at a frequency immediately before the interruption. With the configuration, even when the clock signal extracted from the carrier wave is interrupted, internal data processes such as decoding and bus interfacing can be continued.
US09189722B2	Systems and methods for motion two dimensional codes Systems and method of the present solution are directed to a motion QR code. In general a motion QR code is a 2D code that evolves over time. More particularly, the motion QR code is displayed, or “played”, to sequentially reveal a plurality of 2D codes. The 2D codes can include 2D barcodes, QR codes, Aztec codes, data matrix codes, or similar codes and are generically referred to as 2D codes. In comparison the a traditional 2D code, the motion QR code dramatically increases the amount of information displayed. The systems and methods described herein a related to a system and method for generating, transmitting, displaying, and authenticating motion QR codes. The QR motion codes can be displayed on, and scanned by, applications executing on client devices such as smartphones and tablet computers. The QR motion codes can be incorporated into traditional IDs, tickets, passes, or other document management systems.
US09189720B2	Method for generating images from text A computer assisted method for generating an image from a text character includes the steps of reading the text character from a machine readable storage device and pattern mapping the text character to a pattern of multiple-valued text characters, and rendering the image.
US09189717B2	Image forming apparatus that transmits response data for information requesting data and responding method An image forming apparatus according to an embodiment of the present disclosure includes a receiving unit, a controlling unit, an information accumulating unit, a sleep mode response data generating unit, and a transmitting unit. The receiving unit receives information requesting data. The controlling unit, in a normal mode, generates first response data after receiving the information requesting data. The information accumulating unit accumulates information associated with the first response data. The sleep mode response data generating unit, in a sleep mode, generates second response data on the basis of the information accumulated by the information accumulating unit. The transmitting unit transmits one of the first and the second response data.
US09189705B2	Phase-controlled model-based overlay measurement systems and methods Overlay measurement systems and methods are disclosed that control the relative phase between the scattered and specular components of light to amplify weak optical signals before detection. The systems and methods utilize model-based regressional image processing to determine overlay errors accurately even in the presence of inter-pattern interference.
US09189702B2	Imaging system for determining multi-view alignment A computer-implemented method which may be used with imaging systems is provided. The method may include receiving a first image from a first device configured to generate the first image based upon, at least in part, a first portion of an item. The method may further include receiving a second image from a second device configured to generate the second image based upon, at least in part, a second portion of the item. The method may also include extracting one or more features from the first image and the second image in a multi-view calibration space wherein the one or more features share a global coordinate system. The method may further include applying a global constraints embedded Hough transform to the one or more features present in the first image and the second image.
US09189700B2	Device and method for analyzing the correlation between an image and another image or between an image and a video The present invention relates to a device and method for analyzing the correlation between an image and another image or between an image and a video. The device for analyzing the correlation between images and the method for using same include: a feature data generating unit for determining a feature point of an image and generating feature data which includes feature point orientation information on each determined feature point; and a relation analyzing unit for analyzing the correlation between an image and another image using feature data generated from the feature data generating unit. The relation analyzing unit includes: a unit for determining corresponding feature points, which determines a pair of corresponding feature points between compared images using feature data generated from the feature data generating unit; and a reliability estimating unit for estimating the reliability of the analysis of the relation between images on the basis of feature point orientation information on a feature point, in pairs of feature points determined by the unit for determining corresponding feature points. According to the present invention, provided are a device and method for quickly and efficiently analyzing a correlation, such as whether or not there is a similarity between an image and another image or between an image and a video, wherein said video includes an image, or a frame of said video corresponds to an image.
US09189696B2	Recording device and control method for a recording device A recording device and a control method for a recording device improve the accuracy of reading MICR information while also shortening the time required for recording media processing. A dot impact printer 10 has a magnetic head 34 that magnetically reads MICR information recorded on a recording medium S, a recording head 18 that is mounted on a different carriage than the magnetic head 34 and records images on the recording medium S, and a back scanner 112 that optically reads MICR information recorded on the recording medium S, disposed sequentially to the transportation path P of the recording medium S. When reading the MICR information by means of the magnetic head 34 does not succeed, the recording medium S is conveyed to the back scanner 112, the MICR information is read by the back scanner 112, the reading results are compared, and the MICR information is identified.
US09189694B2	Image processing device and image processing method An image processing method for identifying a region in an input image by character recognition, the region coinciding with a predetermined search condition, includes receiving the search condition, the search condition including assignments of plural format character strings, each format character string including an assignment of a character type or a specific character for each character of a recognition target, extracting a character string region becoming a candidate from the input image, calculating a similarity between a character recognition result and the plural format character strings with respect to each group of plural character string regions, the character recognition result being of each character string region included in each group, and determining the group coinciding with the search condition among the groups of plural character string regions according to the calculated similarity.
US09189690B2	Target point arrival detector, method of detecting target point arrival, storage medium of program of detecting target point arrival and vehicle-mounted device control system A target point arrival detector for detecting that a vehicle arrives at a target point based on an image ahead of the vehicle moving on a surface captured by an image capturing unit includes a target point arrival signal output unit, using a processing circuit, to output a signal indicating that the vehicle arrives at the target point where an inclination condition of a surface ahead of the vehicle with respect to a surface over which the vehicle moves changes to a downward based on the captured image.
US09189688B2	Identifying spatial locations of events within video image data An invention for identifying a spatial location of an event within video image data is provided. Disclosed are embodiments for detecting an object and obtaining trajectory data of a trajectory of the object within the video image data from a sensor device; converting the trajectory data into a contour-coded compressed image; generating, based on the trajectory data, a searchable code that contains a set of locations traversed by the trajectory of the object within the video image; associating the searchable code with the contour-coded compressed image in a database; and returning, in response to a query having a selected location that corresponds a location of the set of locations in the searchable code, an image of the trajectory data corresponding to the object based on the contour-coded compressed image in the database.
US09189686B2	Apparatus and method for iris image analysis An apparatus including circuitry configured to receive a plurality of images and extract at least one iris image from each of the plurality of images. The circuitry is configured to receive a claimed identity iris image corresponding to an identity to be authenticated, normalize the iris images and the claimed identity iris image, and filter the normalized extracted iris images to select a subset of the normalized extracted iris images based on a similarity measurement relative to the normalized claimed identity iris image. The circuitry is configured to divide the normalized claimed identity iris image and each image of the subset of images into a plurality of sub-images, filter the sub-images to select the sub-image having a closest similarity measurement relative to a sub-image of the normalized claimed identity image in a corresponding sub-image position to the selected sub-image, and generate a composite iris image by fusing the selected sub-images.
US09189681B2	Image processing apparatus, method thereof, and computer-readable storage medium An image processing apparatus comprises, a management unit configured to classify a face feature information of a face region of an object extracted from image data into a predetermined category in accordance with a similarity determination, and manage the face feature information in a dictionary, a condition setting unit configured to set category determination conditions for classifying the face feature information into the category in accordance with individual information representing at least one of an age and sex of the object and a determination unit configured to determine, based on the category determination conditions set by the condition setting unit, a category to which the face feature information belongs in the dictionary.
US09189678B2	Medical image processor and storage medium A medical image processor and a storage medium are shown. According to one implementation, the medical image processor includes the following. An input unit is used to input a cell shape image and a fluorescent image showing expression of a specific protein. A cell nucleus extracting unit extracts a cell nucleus. A fluorescent bright point extracting unit extracts a fluorescent bright point. A region estimating unit sets a predetermined region. When the set region does not overlap with another, it is estimated to include one cell. When a plurality of the set regions overlap, it is estimated to include a plurality of cells. A feature amount calculating unit calculates a feature amount. A determining unit determines whether each estimated cell region is cancer and determines an expression status in the region based on the calculated feature amount. An output unit outputs a determination result.
US09189677B2	Recording medium having observation program recorded therein and observation apparatus A recording medium having an observation program recorded therein, the program may cause a computer to execute: an entire-image-pickup process of picking up an image of a sample by picking up an image of an entire container containing the sample and a solution; a sample-mass-identification process of identifying a sample mass having the samples gathering therein, from the image picked up in the entire image-pickup process; a sample-mass-determination process of extracting shape information of the identified sample mass, and determining a state of the sample mass based on the shape information; a coordinate-detection process of selecting a magnifying-observation-target sample mass from the identified sample masses, and detecting coordinates of the center of the magnifying-observation-target sample mass.
US09189673B2	Identifier and method of encoding information A two-dimensional code that includes a bar code readable by a scanning operation is provided. The two-dimensional code has an associated alphanumeric representation, and the bar code and the alphanumeric representation represent the same first information. Further, a position of at least one character of the alphanumeric representation with respect to at least one element of the bar code represents second information.
US09189668B2	Object condition analysis and control techniques New consumption and inventory recording, tracking, analysis and control techniques are provided. In some aspects of the invention, multiple master tags and signal control elements manage the communication of unique signals indicating and managing inventory status and consumption activity. A master tag may bridge communication from a computer hardware and software control system to smaller, more shielded inventory tags, to assess unique identifying information and control actuation of various functions. In other aspects, drugs and other agents may be variably released and/or applied by a new form of actuable, consumable tag with multiple signal elements.A computer display with specialized software may comprise part of the control system, and may reflect, provide, and/or receive modified data signals to and from such tags and signal elements.In other aspects of the invention, an administrative user may use a GUI to access information concerning, and control, consumption by a consumer user.
US09189667B2	Smart power source An article having a conductive body, a magnetic diverter, and a communication device is described. The magnetic diverter is positioned on an outer surface of the conductive body. The magnetic diverter covers a substantial portion of the outer surface of the conductive body. A communication device is positioned on the outer surface of the diverter or may be recessed therein. The communication device is capable of signal coupling with a reader.
US09189666B2	Reader for fiber router A reader for reading radio frequency identification (RFID) tags of a fiber router. The reader includes a main body and a scanner portion. The main body includes a circuit board and at least one indicating lamp electrically connected to the circuit board. The scanner portion is coupled to the main body and includes at least one scanning protrusion. Each scanning protrusion corresponds to one of the at least one indicating lamps, each scanning protrusion includes an antenna electrically connected to the circuit board, and each antenna corresponds to the indicating lamp. Each antenna receives information from a RFID tag and transmits the information to the circuit board, and the circuit board controls the corresponding indicating lamp to emit indicating colors according to the information received by each of the antennas.
US09189664B2	Card reader and method of use thereof An integrated circuit that communicates with a host device via audio channels includes an interfacing circuit that receives and transmits analog signals on the audio channels. Such audio channels are designed for audio speakers and microphones and the interfacing circuit transmits digital data based on the received analog signals. The integrated circuit includes a processing device that is electrically coupled to the interfacing circuit. The processing device receives the digital data from the interfacing circuit and adjusts at least one parameter of the interfacing circuit based on the received digital data. The interfacing circuit receives the digital data from the processing device and transmits analog signals on at least one of the audio channels based on the at least one adjusted parameter.
US09189659B2	Secure code generation for customer tracking Techniques for securely managing user-specific benefits. An authentication server receives a request for a user-identification code from a computing device. The authentication server generates the user-identification code. The authentication server also generates an expiration date associated with the user-identification code. The authentication server transmits the user-identification code and the expiration date to the computing device. The authentication server also validates the user-identification code received from a code scanning system.
US09189656B1	IC chip package disabling device A chip package comprises: an IC substrate, wherein the IC substrate comprises at least one electronic device; a photovoltaic cell, wherein the photovoltaic cell generates an electrical current when exposed to light; a light blocking shield, wherein the light blocking shield prevents light from striking the photovoltaic cell only while the chip package is mounted on a circuit board, and wherein the light blocking shield ceases to prevent light from striking the photovoltaic cell upon the chip package being dismounted from the circuit board; and a disabling logic, wherein the electrical current, which is generated by the photovoltaic cell in response to the chip package being dismounted from the circuit board, causes the disabling logic to disable the IC substrate.
US09189648B2	Data mapping using trust services Embodiments are directed to mapping encryption policies to data stored in a database using a policy identifier, and to accessing data stored in a database using a policy identifier. In one scenario, a computer system receives an indication that identifies which type of encryption is to be applied when encrypting a specified portion of data stored in a database. The database has a database schema identified by a database schema identifier, where the database schema defines relationships for data stored in the database. The computer system then accesses a namespace that identifies a set of databases in which the specified portion of data is accessed in the same manner. The computer system also generates a policy identifier, which contains information including the namespace and the database schema identifier.
US09189646B2	Protection circuity and method for controlling access by plural processes to a memory A data processing apparatus is provided, comprising plural processing units configured to execute plural processes, a storage unit configured to store data required for the plural processes; and a protection unit configured to control access by the plural processes to the storage unit. The protection unit is configured to define an allocated access region of the storage unit for each process of the plural processes, wherein the protection unit is configured to deny access for each the process outside the allocated access region and wherein allocated access regions are defined to be non-overlapping. The protection unit is configured to define each allocated access region as a contiguous portion of the storage unit between a lower region limit and an upper region limit, and the protection unit is configured such that when the lower region limit is modified the lower region limit cannot be decreased and such that when the upper region limit is modified the upper region limit cannot be decreased.
US09189642B2	Safe processing of on-demand delete requests Methods and apparatus for safe processing of on-demand delete requests are disclosed. An item is stored in a storage entity that is associated with a trusted secure device. A delete request to delete the item is received at the trusted secure device. However, the trusted secure device does not yet delete the item from the storage entity. The trusted secure device creates an audit log of the delete request. The audit log specifies the item to be deleted and includes information about the delete request. The audit log is made available to an approval source. The approval source must grant approval in the form of an approval response in order for the item to be deleted. If the trusted secure device receives an approval response from the approval source, the item is deleted.
US09189641B2	Methods and systems for deleting requested information A method of deleting log records may include identifying a plurality of log records generated during a time period, for each identified log record, determining whether a delete request associated with the log record has been made, and, in response to determining that a delete request has not been received, identifying a unique identifier associated with the log record, searching a user activity table for an entry having a key table index associated with the unique identifier, where the entry is associated with a timestamp, using the key table index and the timestamp to identify a key associated with the unique identifier and the timestamp from a key table, encrypting at least a portion of the log record with the identified key to generate an encrypted value, and storing the encrypted value as an entry in the log record database that is associated with the identified log record.
US09189639B2	Data processing apparatus and method for controlling same A data processing apparatus of this invention, which has a storage unit, includes a deletion unit that deletes user data stored in the storage unit. The data processing apparatus further includes a generation unit that generates status information indicating presence or absence of the user data in a storage area that each of a plurality of addresses assigned to the storage unit indicates, and a presentation unit that presents an image according to the status information, to a user.
US09189632B2	Method for protecting security of data, network entity and communication terminal The present invention relates to communication technologies and discloses a method and an apparatus for protecting security of data, so as to solve the problem of the prior art in which the security of data transmission between a communication terminal which has a characteristic of small data transmission and the network cannot be guaranteed. Information relevant to security context is stored if a communication terminal has a characteristic of small data transmission; current security context is obtained according to the information relevant to security context; and security protection of communication data is performed by employing the current security context. The embodiments of the present invention may be applied to a communication system having a characteristic of small data transmission, such as an MTC and the like.
US09189631B2	Firmware authentication Firmware authentication in Information Handling Systems (IHSs) are disclosed. In some embodiments, an IHS may include a controller having a memory, the memory configured to store a plurality of firmware volumes, each of the plurality of firmware volumes including a plurality of firmware files. The IHS may also include a Basic Input/Output System (BIOS) operably coupled to the controller, the BIOS having program instructions stored thereon that, upon execution, cause the BIOS to authenticate two or more firmware files within a given one of the plurality of firmware volumes using a single digital signature. In another embodiment, a method may include creating a firmware volume, adding a plurality of firmware files to the firmware volume, and creating a digital signature based upon at least one of the plurality of firmware files, where the digital signature, upon being authenticated, allows a BIOS to load any of the plurality of firmware files.
US09189629B1	Systems and methods for discouraging polymorphic malware A computer-implemented method for discouraging polymorphic malware may comprise: 1) receiving a request to register a file in a registration database, 2) applying a registration tax to the file, 3) determining, based on whether the registration tax for the file has been satisfied, whether to register the file in the registration database, and then 4) determining, based at least in part on whether the file has been registered in the registration database, whether to add the file to an approved-file database. A method for determining whether to allow files on a computing device to execute using such an approved-file database is also disclosed. Corresponding systems and computer-readable media are also disclosed.
US09189627B1	System, apparatus and method for conducting on-the-fly decryption of encrypted objects for malware detection According to one embodiment, a computerized method comprises receiving an encrypted object and conducting a first static scanning operation on the encrypted object to decrypt the encrypted object in real-time. Thereafter, a second static scanning operation is conducted on the decrypted object to determine whether the decrypted object is suspected of including malware. Based on the results of the second static scanning operation, the decrypted object may be classified to identify a suspected presence of malware.
US09189626B1	Techniques for detecting malicious code Techniques for detecting malicious code are disclosed. In one particular embodiment, the techniques may be realized as a method for detecting malicious code comprising the steps of identifying a query to a domain name service that resolves to a local address; identifying the process that originated the identified query; and designating the identified process as infected based on identifying the process as having originated the query that resolved to a local address.
US09189622B2	Static redirection for objective C Particular embodiments establish static redirection of a function that is a member of a class to an alternate implementation of the function. A software tool executing on a computer server receives an executable file for an application and a location for an alternate implementation of the function. The function may be written in Objective C. The software tool can be used to locate a structure for the function by traversing serialized metadata in the executable file. The software tool can then be used to modify the metadata in the executable file by updating the value of a selector indicating the location of a current implementation of the function to indicate a location of the alternate implementation. The selector may be included in a element of the structure for the class method. Finally, the application may provide the modified executable file for installation on client devices.
US09189621B2	Malicious mobile code runtime monitoring system and methods Protection systems and methods provide for protecting one or more personal computers (“PCs”) and/or other intermittently or persistently network accessible devices or processes from undesirable or otherwise malicious operations of Java TN applets, ActiveX™ controls, JavaScript™ scripts, Visual Basic scripts, add-ins, downloaded/uploaded programs or other “Downloadables” or “mobile code” in whole or part. A protection engine embodiment provides for monitoring information received, determining whether received information does or is likely to include executable code, and if so, causes mobile protection code (MPC) to be transferred to and rendered operable within a destination device of the received information. An MPC embodiment further provides, within a Downloadable-destination, for initiating the Downloadable, enabling malicious Downloadable operation attempts to be received by the MPC, and causing (predetermined) corresponding operations to be executed in response to the attempts.
US09189617B2	Apparatus and method for implementing zero-knowledge proof security techniques on a computing platform An apparatus and method for zero knowledge proof security techniques within a computing platform. One embodiment includes a security module executed on a processing core to establish a domain of trust among a plurality of layers by sending a challenge from a verification layer to a first prover layer, the challenge comprising an indication of at least one selected option; in response to receiving the challenge, generating first verification information at the first prover layer based on the secret and the indication of the selected option; sending the first verification information to at least a second prover layer, the second prover layer generating second verification information based on the first verification information and the indication of the selected option; and performing a verification operation at the verification layer using the second verification information based on the selected option.
US09189615B2	Systems and methods for system login and single sign-on Systems and methods for system login and single sign-on are described. A first application of a first system receives a request to access a protected application of a second system. An assertion is generated in response to the request. The assertion asserts an identity in the first system of a user generating the request. The assertion is validated and first account information corresponding to the assertion is extracted. The first account information is information of a first account of the user in the first system. Second account information is determined that is information of a second account of the user in the second system. A mapping is generated between the first account and the second account using the first account information and the second account information. The mapping is used to provide access to the protected application by the requestor.
US09189614B2	Password entry for double sided multi-touch display Password definition and recognition in programmable devices with back-to-back transparent, touchscreens includes defining first and second contact patterns on respective first and second ones of the touchscreens as patterns of touchscreen contact inputs generated from contact of respective contact elements on the touchscreens contemporaneously, wherein the touchscreens enable a viewer to see through the touchscreens. A composite password pattern is defined by mapping location of the first pattern on the first screen relative to the location of the second pattern on the second screen. Recognizing a successful entry of the composite password pattern requires an entry of the first pattern on one of first and second, back-to-back touchscreens contemporaneously with an entry of the second pattern on another of the first and second touchscreens in an alignment that is compliant with the composite password mapping.
US09189613B1	Systems and methods for authenticating a user with a device Embodiments described herein provide for systems and methods for providing a user with an interactive, feedback-driven exercise program through the use of exercise equipment which provides tactile, visual and auditory feedback through proactive and reactive control, as well as portable electronic devices in communication with the exercise equipment to sense user activity, store user data and feedback for providing automated exercise program modifications, and provide visual and auditory feedback in the form of an interactive visual exercise experience using displays and other device feedback, as well as authenticate the user and user exercise equipment. The systems and methods are configured to create prescriptive exercises based on user profiles, which are then displayed to the user on the portable electronic devices during the execution of the exercise program on the exercise equipment.
US09189612B2	Biometric verification with improved privacy and network performance in client-server networks The present invention relates to improving the privacy of biometric information used in biometric authentication of identity by retaining all biometric information corresponding to a given user, and conducting all transactions related thereto (i.e., the actual authentication process) on a client (i.e., user) side of the system, thereby maximizing the user's control over biometric information corresponding to himself and preventing the storage of biometric templates on third-party servers outside of the control of the concerned individual. In a particular example of the present invention, security for the biometric information is further enhanced by encrypting the biometric template (used as a comparison reference during authentication, as is known) stored on the client side and completely destroying an original unencrypted version of the template. Also specified is secure storage of encryption keys for encrypting biometric data at the client. In yet a further example of the present invention, authentication is preferably conducted using the encrypted biometric templates.
US09189610B2	Projection type image display device A projection type image display device provided with an unauthorized use preventing system includes a button unit or a remote controller for operating the display device, a condition memory for storing information indicating at least one use condition in an authorized use of the display device, a password memory for storing a password for releasing a restriction on the use of the display device, a detector for detecting a used condition of the display device at a power on timing, and a processor for imposing restrictions on the use of the display device when the use condition detected by the detector does not match the at least one use condition indicated by the information stored in the condition memory and for relieving the restriction based upon input of the password.
US09189603B2	Kill switch security method and system The present invention provides, in at least one embodiment, a system and method to bolster website and mobile authentication providing an additional security layer for access to password protected information. An authorized user is asked to select a kill switch, including one or more image categories or alphanumeric characters that the authorized user would never select while inputting their password. If the kill switch is entered once or too many times, as defined and specified ahead of time by a set of rules and conditions, during password entry, the kill switch kills the password entry operation. User input can be evaluated at the time of entry according to these rules by a rule processing decision engine. Killing the operation can include taking one or more actions, such as locking out the user, sending a notification of breach, and cataloging information about the source of the breach.
US09189599B2	Calculating and monitoring a composite stress index In particular embodiments, a method includes accessing data streams from a first group of physiological sensors monitoring a person, a second group of deconfounding sensors monitoring the person, and a third group of sensors monitoring a stressor, analyzing data sets collected from the person when the person is exposed and not exposed to the stressor, and determining a current stress factor for the stressor with respect to the person based on the analysis.
US09189598B2	Fluid analyte meter A device for managing health data provides a first housing portion including a data storage system that stores health data and a second housing portion including a data communications element. The data communications element provides data communications between the data storage system and a processing device that processes the health data according to a data-management software. The first housing portion and the second housing portion are connected by a cable that communicates signals between the data communications element and other components in the first housing portion. Another device for managing health data provides a first housing portion including a health data management system and a data communications element that provides data communications between the health data management system and an external processing device. The second housing portion is removably coupled to the first housing portion, and includes at least one component used by the health data management system.
US09189595B2	Apparatus and associated method for analyzing small molecule components in a complex mixture A method, apparatus, and computer-readable storage medium are provided for analyzing data from a component separation/mass spectrometer (CS-MS), wherein an intensity peak is determined, with an area thereof determined using an integration procedure, in each two-dimensional data set. The intensity peak indicates a sample component, and the area thereof indicates a relative quantity of the sample component. An integration procedure determines the area of selected peaks of a first portion of the two-dimensional data sets associated with a first sample component, and is applied to the intensity peaks of a second portion having the areas thereof not determined by that integration procedure, to adjust the relative quantity of the first sample component in the second portion samples relative to the relative quantity of the first sample component in the first portion samples. The re-integration may also involve determining whether a second sample component is indicated by the intensity peak.
US09189591B2	Path-based floorplan analysis Systems and techniques for computing a timing effort metric are described. According to one definition, the computed timing effort metric indicates a level of difficulty of fixing a timing violation associated with a timing path between two circuit objects in a circuit design layout.
US09189586B2	Area efficient power switch A method of generating an area efficient power switch cell includes receiving, by a cell library design tool, a specification of a power switch circuit to be established as a power switch cell in a cell library. The cell library design tool also receives one or more attributes of the power switch cell including a height of the cell boundary and receiving, by the cell library design tool, a layout placement constraint requiring the power switch cell to be placed in a semiconductor layout so as to bridge two parallel rows of doped wells. The parallel rows of doped wells are interleaved with doped substrate and the doping of the wells is of a different type than that of the substrate. Based on the specification of the power switch circuit, the one or more attributes, and the layout placement constraint, the cell library design tool generates the power switch cell.
US09189584B2	Cross-talk noise computation using mixed integer linear program problems and their solutions A method includes forming a mixed integer linear problem (MILP) capturing at least a plurality of timing windows over which aggressor net(s), electromagnetically coupled to a victim net in a circuit, produce computed cross-talk noise pulses potentially contributing to a maximum noise for the victim net. The MILP is solved to determine the maximum noise at the victim net. Responsive to the maximum noise meeting one or more criteria, at least an indication of the victim net is output. Forming may include forming a linear problem using overlapping timing windows for which noise pulses contribute to the maximum noise and converting the linear problem to the mixed integer linear problem by introducing into the linear problem binary variables that determine whether individual ones of overlapping or non-overlapping noise pulses from the one or more aggressor nets contribute to the maximum noise. Apparatus and program products are also disclosed.
US09189579B2	Techniques to automatically generate simulated information Techniques to automatically generate simulated information are described. A method comprises receiving, by a program builder component executed on a processor, a structured input file comprising one or more data libraries and one or more directive files to generate simulated data for a simulation database. The method further comprising producing, by the program builder component executed on the processor, a data generator program based on the structured input file, the data generator program arranged to generate the simulated data for the simulation database using multiple data generating sessions executed concurrently or sequentially. Other embodiments are described and claimed.
US09189576B2	Analyzing sand stabilization treatments In some aspects, sand stabilization treatments are analyzed. A computing system can determine a first predicted resource production output for a subterranean reservoir based on a sand stability model analysis for a native condition of the subterranean reservoir. The computing system can determine a second predicted resource production output for the subterranean reservoir based on a sand stability model analysis for a stabilization-treated condition of the subterranean reservoir. The computing system can output an economic value comparison of resource production for the native condition and the stabilization-treated condition based on the first and second predicted resource production outputs.
US09189575B2	SVR dynamic system modeling with delayed output measurements The method comprises the steps of inputting a first set of data into both a physical system and into an SVR model. The method includes collecting a second set of system data from the physical system and stacking a plurality of SVR models to form an output prediction without feeding back the model output. Another aspect of the invention includes a method of hybrid modeling having delayed output measurement. This method includes the steps of inputting a first set of data into both a physical system and into an SVR model and collecting a second set of system data from the physical system. A modeling error is injected into both the second set of system data from the physical system and a third set of system data from the SVR model wherein the modeling error thereby leads to substantially improved model output.
US09189567B1	Determining the likelihood persons in a social graph know each other A system gathers information on important and influential people and builds a social graph. The social graph can be processed to determine a likelihood that two persons know each other. The system takes into consideration a variety of factors when determining the likelihood two persons know each other. For example, it is more likely that two people who work at a small company know each other better than two people at a big company.
US09189566B2	Facilitating extraction and discovery of enterprise services Implementations of the present disclosure include methods for annotating an enterprise service that is electronically stored in an enterprise service repository. In some implementations, methods include generating one or more graphs based on one or more artifacts, the one or more artifacts resulting from a development process of the enterprise service, generating one or more metadata repositories based on the one or more artifacts, each metadata repository comprising instance data corresponding to one of the one or more graphs, storing the one or more graphs and the one or more metadata repositories to a knowledge base provided in a computer-readable medium, determining one or more annotations based on the one or more graphs and the one or more metadata repositories, associating the one or more annotations to the enterprise service, and storing the one or more annotations in the enterprise service repository.
US09189565B2	Managing tag clouds A method, data processing system, and computer program product for managing tags. A computer system identifies one or more groups of similar tags from a multiplicity of tags proposed for inclusion in a tag cloud. The computer system identifies one or more representative tags to represent the respective one or more groups of similar tags. The computer system displays the one or more representative tags in the tag cloud instead of all the similar tags in the one or more groups of similar tags, and concurrently displays other tags in the multiplicity of tags that are not included in the one or more groups of similar tags.
US09189564B2	Method and apparatus for providing user interface for internet service A method and apparatus providing a user interface for an Internet service are provided. The user interface providing apparatus displays an nth Web page including at least one hyperlink on a screen, senses a direction of a gesture, determines a hyperlink indicating one of a previous Web page and next Web page to a current Web page from among the at least one hyperlink based on the gesture direction, and displays a Web page indicated by the determined hyperlink on the screen.
US09189563B2	Inheritance of rules across hierarchical levels Rules, such as condition-action rules, are configured at different levels of a hierarchy. For example, a top level site administrator may configure rules, lower level administrators may configure rules and end users may configure rules. Rules created at a higher hierarchical level are automatically inherited by lower hierarchical levels in the same branch of the hierarchy. The source of the inherited rule is indicated with its display such that the hierarchical level of creation can readily be determined. The inherited rule(s) may be toggled on/off at the lower hierarchical levels but edits to inherited rule(s) are restricted. Instead, a copy of any inherited rule may be made to create a local copy of the rule that is editable. Rules may be ordered and when a lower hierarchical level inherits the rules, the ordering is preserved. While the ordering of any rules remains constant when inherited at the lower levels, the lower level may toggle on/off the execution of each rule within the ordering.
US09189561B2	Bridge event analytics tools and techniques Two selected checkpoints define a group of paths represented in an analytics database. One or more events which appear between the two checkpoints on each of a plurality of the paths are identified as common bridge events. Path analysis information is then output, such as a bridge event analysis including a list of website visitor common bridge events that are ranked by their frequency of appearance, the frequencies calculated without regard to where each visitor event appears on a given path.
US09189560B2	Discovery of asset information through scanning of communication tags associated with assets In some embodiments, a mobile device includes an interface configured to scan information from a communication tag associated with an asset, a memory operable to store the information, and a processor communicatively coupled to the memory. The information comprises a header describing the information, business application data, and asset identification data uniquely identifying the asset. The processor is configured to extract the business application data from the information scanned from the communication tag and extract the asset identification data from the information scanned from the communication tag.
US09189559B2	Providing a multi-column newsfeed of content on a social networking system News feed stories are ranked so that some stories appear above other stories for users of a social networking system. These “top” news stories are selected based on a ranking algorithm that incorporates an analysis of affinities for interests, users, and entities in the social networking system based on user interactions as well as story layout dimensions. The top news stories are presented in a multiple-column format, such as a grid format. Top news stories may be presented higher or in a more prominent placement among one or more columns in the story layout as compared to other news stories. The ranking of the top new news stories may change after a top news story is viewed. The multiple-column newsfeed enables a more visually pleasant placement of targeted advertisements on the social networking system.
US09189556B2	System and method for displaying information local to a selected area A system and method of the subject technology displays non-geographic information associated with a viewed point of interest in an interactive internet map. When the map is repositioned by a user, a new point of interest is determined based on one or more coordinates and one or more predefined rules, and new non-geographic information is automatically generated and displayed for the new point of interest, all without a user having to enter search criteria.
US09189550B2	Query refinement in a browser toolbar Embodiment described herein are generally directed to a toolbar extension of a web browser that grabs a user's search engine query and suggests a refined search query known to yield better search results. The toolbar recognizes the web page the user is on as being associated with a search engine and retrieves the user's search query. The toolbar interacts with a refinement component on a server, and the refinement component determines a refined search query based on confidence scores assigned to data mined from a data center affiliated with different search engine (one related to the toolbar). The refined search query is returned and displayed in a search field of the toolbar, allowing the user to easily run the refined search on the different search engine.
US09189547B2	Method and apparatus for presenting a search utility in an embedded video A method, apparatus and article of manufacture for providing advertisements into a streamed media program is disclosed. In one embodiment, the method comprises the steps of transmitting a webpage to a user computer, wherein the webpage includes instructions comprising instructions for embedding a media program player in the webpage, wherein the embedded media program player comprises an embedded search utility for accepting a textual user query, receiving a search query from the user computer in a media server, the search query entered into the embedded search utility, generating search results responsive to the user search query, transmitting the search results to the media program player embedded in the webpage, rendering the search results using the media program player; and displaying the rendered search results to the user.
US09189545B2	Content summarizing apparatus and content summarizing displaying apparatus According to one embodiment, a content summarizing apparatus includes a selection unit, a record unit, and a storage unit. The selection unit selects at least one image from input content in accordance with at least one selection criterion and at least one parameter corresponding to the at least one selection criterion, and to produce a summary. The record unit cause the storage unit to store a summary record information item that includes the at least one selection criterion and the at least one parameter used by the selection unit. The storage unit stores the summary record information item whenever the summary of the input content is produced. The selection unit acquires past summary record information items from the storage unit, and produces the summary using the at least one selection criterion and the at least one parameter that fails to be included in the past summary record information items.
US09189544B2	Graphically representing tags in a networked computing environment An approach for graphically representing tags in a networked computing environment is provided. In a typical embodiment, a frequency of use of each of a set of tags contained in at least one computer storage medium of the networked computing environment will be determined. A set of relationships between the set of tags will be identified, and each of the set of tags will be displayed within a set of objects of a graphical (e.g., Venn) diagram according to the frequency. The set of relationships between the set of tags may determine an amount of overlap of the set of objects. The set of tags and/or graphical objects may be formatted to graphically represent attributes such as: topics corresponding to the set of tags, groupings of the topics corresponding to the set of tags, trends related to the set of tags, an importance of the set of tags, etc.
US09189542B2	Evidence profiling Evidence profiling, in one aspect, may receive a candidate answer and supporting pieces of evidence. An evidence profile may be generated, the evidence profile communicating a degree to which the evidence supports the candidate answer as being correct. The evidence profile may provide dimensions of evidence, and each dimension may support or refute the candidate answer as being correct.
US09189540B2	Mobile web-based platform for providing a contextual alignment view of a corpus of documents A content platform for providing a mobile, web-based contextual alignment view of a corpus of documents is disclosed. A corpus of documents is mined to identify a set of topics. Each document in the corpus is analyzed to determine a set of opinions associated with the set of topics, the set of opinions including a corpus opinion. Each document in the corpus is classified based on alignment with the corpus opinion. The corpus of documents is presented to the user according to the document classification.
US09189539B2	Electronic content curating mechanisms Mechanisms for managing an electronic document collection are provided. A first electronic document is analyzed to identify a reference to a second electronic document and the second electronic document is analyzed to identify document dependencies with zero or more other electronic documents. A dependency information data structure is generated based on the analysis. The dependency information data structure is analyzed to identify a subset of the electronic document collection that is to be loaded into memory when performing an information analysis operation. An electronic document curation action recommendation is generated based on the identified subset of the electronic document collection. The electronic document curation action recommendation is then output.
US09189536B2	Maintaining a relationship between two different items of data Data is stored persistently. At least two different items of the data are stored in two different non-conflicting regions or two different physical clusters. A relationship is maintained between the two different items of data. The relationship enables a process to reach any one of the data items from the other data item. Consistency of the relationship is maintained notwithstanding updates of either or both of the items.
US09189533B2	Sync framework extensibility Embodiments described herein may involve enabling applications to cooperate with a system-level sync framework. The sync framework may provide system synchronization of files between user devices and a cloud storage service. Arbitrary applications on a user computing device can communicate with the sync framework to temporarily suspend synchronization of a specified file by the sync framework. The application can register functions with the sync framework that the sync framework can invoke in relation to suspending synchronization, continuing to provide system-level access to the file for arbitrary applications, and resuming synchronization.
US09189532B2	System, method and computer program product for locally defining related reports using a global definition In accordance with embodiments, there are provided mechanisms and methods for locally defining related reports using a global definition. These mechanisms and methods for locally defining related reports using a global definition can provide a single global definition that is applicable to various reports. The ability to provide such single global definition can enable multiple local definitions that are report specific to be configured, at least in part, using the single global definition.
US09189531B2	Ontology harmonization and mediation systems and methods A method and system for harmonizing and mediating ontologies to search across large data sources is disclosed. The method comprises receiving a query targeting a first ontology. The method further comprises translating the query into one or more translated queries, each translated query targeting a respective ontology different from the first ontology. For each of the queries, issuing the query to a respective database organized according to the respective ontology of the query, and receiving a respective result set for the query, wherein the respective result set corresponds to the respective ontology of the query. The method further comprises translating the respective result set into a translated result set corresponding to the first ontology, aggregating the result sets into an aggregated result set corresponding to the first ontology, and returning the aggregated results set corresponding to the first ontology.
US09189528B1	Searching and tagging media storage with a knowledge database A system and method for searching media storage with a knowledge database is provided. The system includes a search retrieving unit to retrieve a search request, an association retrieval unit to retrieve an association between a content item from the media storage and an identification from the knowledge database based on the search request, and an output unit to output data generated by the association retrieval unit. A method tagging a content item with a knowledge database includes determining the content item to be tagged, tagging the content item with an identification from the knowledge database, and storing the content item and the tagged identification in a tag database.
US09189527B2	Systems and methods for facilitating communication between a plurality of building automation subsystems A computer-implemented system for facilitating communication between a plurality of building automation subsystems and a plurality of applications includes a first database storing a hierarchical model of a building automation system. The system further includes a messaging engine configured to receive a message from one of the disparate building automation subsystems and for one of the plurality of applications. The messaging engine is configured to use the information in the second database to transform the message into a standard format, to append the projected semantic type string to the transformed message, and to provide the transformed message to one of the plurality of applications.
US09189522B2	SQL execution plan baselines Approaches, techniques, and mechanisms are disclosed for maintaining a set of baseline query plans for a database command. Except in rare circumstances, a database server may only execute a command according to a baseline plan, even if the database server predicts that a different plan has a lower cost. The set of baseline plans are plans that, for one reason or another, have been determined to provide acceptable actual performance in at least one execution context. When the database server receives a request to execute a particular command, the database server, if possible, always executes the command according to the lowest predicted cost baseline plan. The database server may evolve the plan baseline to include additional plans by generating and testing new plans in response to new requests to execute the database command, or as part of a query optimization or tuning process.
US09189521B2	Statistics management for database querying Methods and systems are provided for querying a database. One exemplary method for obtaining data from an on-demand database supporting one or more tenants involves obtaining model database statistics based on expected utilization information for a tenant and providing the model database statistics to the on-demand database. The on-demand database utilizes the model database statistics to generate a query plan and executes the query plan to obtain data from the model database statistics.
US09189515B1	Data retrieval from heterogeneous storage systems Techniques are described for retrieving data stored in disparate datastores that support different or heterogeneous storage systems. A report description may be received from a user, the report description including multiple query templates for generating queries to retrieve data from the disparate datastores. The report description may be analyzed to determine input parameters for generating the queries. A user interface may be dynamically generated to solicit input values corresponding to the input parameters. On receiving the input values, the system may generate and execute the queries of the query plan, and combine the results based on result combination information included in the report description.
US09189511B2	Free resources parameter for improving performance of database alterations Altering tables in a database system may be difficult because the tables may only be altered when all connection to the tables have been released. A free resources parameter may be set on in a management system for the database system to specify that resources should be attempted to be released. Connections to the database may be closed earlier than conventionally closed. For example, connections that are idle may be released. Once the connections have been released the database may be altered and the free resources parameter turned off. The free resources parameter notifies the database system of a pending alteration and allows the database to gracefully close connections to provide an opportunity for the alteration to occur.
US09189510B2	System and method for implementing cache consistent regional clusters When multiple regional data clusters are used to store data in a system, maintaining cache consistency across different regions is important for providing a desirable user experience. In one embodiment, there is a master data cluster where all data writes are performed, and the writes are replicated to each of the slave data clusters in the other regions. Appended to the replication statements are invalidations for cache values for the keys whose values have been changed in the master data cluster. An apparatus in the master data cluster logs replication statements sent to the slave databases. When a slave database fails, the apparatus extracts the invalidations intended for the failed database and publishes the invalidations to a subscriber in the region of the failed database. The subscriber sends the invalidations to the local caches to cause stale data for those keys to be deleted from the caches.
US09189504B2	Application source code scanning for database migration Systems, methods, and other embodiments associated with application source code scanning for database migration are described. In one embodiment, a method includes identifying a subset of application source code files that are likely to require modification to access a destination database. The subset of application source code files is scanned for artifact expressions that access a source database and should be changed to access the destination database.
US09189500B2	Graphical flash view of documents for data navigation on a touch-screen device Content may be displayed on a display of a device as part of a graphical interface in which the content is divided into categories or sections. A content item representing a particular group of content items, such as a group corresponding to a category, may be graphically “flashed” to the user as the user pans or scrolls through content. In particular implementation, a computing device may determine a group of active content items corresponding to a current navigation point of a set of content items, determine a representative content item from the group of active content items, and present an area displaying the representative content item.
US09189497B2	Information processing apparatus, control method therefor, and program for classifying a plurality of data An information processing apparatus classifies a piece of content data as a first or second category in response to a user operation while outputting the content data for a predetermined time. When the user operation is not performed from the start of the output of the content data to the termination, the information processing apparatus automatically classifies the content data as a third category. When there is a shortage of the number of pieces of content data classified as the first or second category, the information processing apparatus adds a piece of content data classified as the third category.
US09189496B2	Indexing documents according to geographical relevance A local search engine efficiently indexes documents relevant to a geographical area by indexing, for each document, multiple location identifiers that collectively define an aggregate geographic region. When creating the index, the search engine may determine a set of geographical areas surrounding a geographical area relevant to a document and associate references to the set of geographical areas with the document index.
US09189492B2	Cross-ACL multi-master replication Techniques for cross-ACL multi-master replication are provided. The techniques allow a replication site in a multi-master replication system implementing an asynchronous replication protocol and an access control policy to appropriately apply received data change updates to data maintained at the site even where a data change update is missing information because of the implemented access control policy.
US09189491B2	Application recommendation using stored files The disclosed technology can enable files to be stored with a networked environment. The files can be associated with information (e.g., properties) such as a file name, a file type, a date/time at which a respective file was last accessed, a number of times a respective file was accessed, data representing the contents of a respective file, and other information. Based at least in part on analyzing the information, the disclosed technology can select or identify a file and/or a file property (e.g., a file type) that the disclosed technology predicts to be most relevant to the user. The disclosed technology can then recommend applications based at least in part on the selected or identified file and/or file property (e.g., file type).
US09189490B2	Fast snapshots A fast snapshot is configured to store a state of a computing environment at a point in time. The fast snapshot operation is performed by avoiding reference counts of one or more data units associated with the snapshot from being updated at a creation and a deletion time.
US09189489B1	Inverse distribution function operations in a parallel relational database Inverse distribution operations are performed on a large distributed parallel database comprising a plurality of distributed data segments to determine a data value at a predetermined percentile of a sorted dataset formed on one segment. Data elements from across the segments may be first grouped, either by partitioning keys or by hashing, the groups are sorted into a predetermined order, and data values corresponding to the desired percentile are picked up at a row location of the corresponding data element of each group. For a global dataset that is spread across the database segments, a local sort of data elements is performed on each segment, and the data elements from the local sorts are streamed in overall sorted order to one segment to form the sorted dataset.
US09189485B2	Time-series data diagnosing/compressing method A predicted-failure-evidence diagnosing section for equipment that does not depend on the equipment and does not require knowledge of the equipment is provided. On the basis of a result of a predicted-abnormality-evidence diagnosis carried out by this section on time-series data gathered from the equipment, an allowable error used for compressing the gathered data can be set and managed in order to compress the data if the result of the diagnosis is normal or to restrict the compression of the data during a period in which an evidence of a predicted abnormality is detected. Thus, the amount of data stored in a memory can be reduced.
US09189481B2	Database and index organization for enhanced document retrieval A customized, specialty-oriented database and index. of a subject matter area and methods for constructing and using such a database are provided. Selection and indexing of articles is done by experts in the specialty with which the database is concerned. A thesaurus allows indexing and search in accordance with terminology familiar to different anticipated groups of users (e.g. doctors, patients, nurses, technicians, and the like) by translating search terms to a standard and limited list of topics; a limited number of which are assigned to each document/article and allowing the topics most likely to be relevant to be found. The search can be conducted based on the most relevant topic found or sequential searches can be performed based on topics most relevant to individual search terms or combined search terms and the search results combined on the basis of common topic classifications to leverage the benefits of document classification.
US09189475B2	Indexing mechanism (nth phrasal index) for advanced leveraging for translation An inventive indexing scheme to index phrases and sub-phrases for advanced leveraging for translation is presented. The scheme provides ways to match at various levels, and allows approximate matches. The system and method comprises an index structure comprising at least one phrasal marker and/or at least one sub-phrasal marker, the index structure performing advanced leveraging for translation by matching to previously stored index structures. The index structure can be a tree structure. The markers can contain constituent names, values, and a level number. Each marker can be obtained by parsing a target string, so that the parsing identifies the constituents and levels in the target string.
US09189473B2	System and method for resolving entity coreference A method and a system for coreference resolution are provided. The method includes receiving a set of document clusters, each cluster in the set of document clusters including a set of text documents. Instances of each of a set of candidate named entities are identified in the document clusters. For a pairs of the candidate named entities, at least one socio-temporal feature is computed that is based on the similarity of the distributions of identified instances of the respective candidate name entities among the document clusters. A decision for merging for the candidate named entities into a common real named entity is based on the socio-temporal features.
US09189471B2	Apparatus and method for recognizing emotion based on emotional segments An apparatus and method to recognize a user's emotion based on emotional segments are provided. An emotion recognition apparatus includes a sampling unit configured to extract sampling data from input data for emotion recognition. The emotion recognition apparatus further includes a data segment creator configured to segment the sampling data into a plurality of data segments. The emotion recognition apparatus further includes an emotional segment creator configured to create a plurality of emotional segments that include a plurality of emotions corresponding to each of the respective data segments.
US09189469B2	Apparatus and method for supporting creation of an electronic document Time spent for the editing operation by a user when a template part in which content is embedded is changed to a new template part is reduced. In a page editing unit, a parts information storage unit stores information on template parts, a part inserting unit retrieves a first template part from the parts information storage unit, and a display unit displays the first template part. An operation reception unit accepts an operation to change the first template part to a second template part, and, in response to the operation, a candidate generating unit displays candidates for the second template part obtained by filtering based on a change rule on the display unit. Moreover, a change processing unit embeds, in an appropriate area in the second template part, content embedded in the first template part in response to an operation to select the second template part from the candidates.
US09189468B2	Form filling based on classification and identification of multimedia data An electronic writing solution server includes a classification application that comprises a classifier and a user interface engine. The classifier receives multimedia data on a form, identifies at least one field in the form to be modified and modifies the at least one field in the form based on the multimedia data. The user interface engine provides the modified form to a user.
US09189461B2	Page frame and page coordinate determination method and system based on sequential regularities Disclosed is a method that generates a page frame structure associated with a sequentially-ordered set of pages, each being characterized by a set of page frame features. N-grams (sequence of n features) are computed from a set for n contiguous pages, and n-grams which are repetitive (Kleene cross) are selected. Pages matching the most frequent repetitive n-ram are grouped together under a new node, and a new sequence is created. The method is iteratively applied to this new sequence. The output is an ordered set of trees.
US09189458B1	Parameter estimation An apparatus relating generally to generation of a compressed matrix is disclosed. In this apparatus, a row determination block is coupled to receive input samples and configuration information and is configured to provide a row output for each of the input samples. A matrix determination block is coupled to receive the row output and the configuration information. The matrix determination block is configured to: generate pivot row indices responsive to the configuration information; generate each outer product using the row output and any of the pivot row indices therefor; and accumulate, for each of the input samples, the outer product therefor for inclusion in the compressed matrix.
US09189456B2	Technique for optimization and re-use of hardware in the implementation of instructions used in Viterbi and turbo decoding, using carry save arithmetic The present invention provides a means for optimization and re-use of hardware in the implementation of Viterbi and Turbo Decoders using carry save arithmetic. Successful provision for each target application requires that two main issues be confronted. These are: merging the computation of summation terms (a2−b2+c2) with (x2+y2+z2); and (a3+b3−c3) with (x3+y3+z3); implementing an efficient method of computing (a4−b4−c4); and merging this computation with (x4+y4+z4). The invention solves both of these issues and successfully merges the Viterbi instructions with a complete reuse of the hardware that is required for the implementation of Turbo instructions. The hardware required by both classes of instructions is optimized by efficiently employing carry save arithmetic.
US09189444B2	Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
US09189443B2	Circuit structure on flexible printed circuit substrate having one end with shape corresponding to SIM card and another end corresponding to microSD memory card in shape A circuit structure is utilized in circuit connection in a hand-held mobile communication device. The circuit structure is enabled to interconnect electrically a SIM (Subscriber Identity Module) card with a microSD (Secure Digital) memory card installed in the hand-held mobile communication device to enhance transmission of signal and data therebetween.
US09189442B1	Fetching data between thread execution in a flash/DRAM/embedded DRAM-equipped system An apparatus and associated method/processing unit are provided for utilizing a memory subsystem including NAND flash memory and dynamic random access memory. Further included is a first circuit for receiving DDR signals and converting the DDR signals to SATA signals. The first circuit includes embedded dynamic random access memory. Also provided is a second circuit for receiving the SATA signals and converting the SATA signals to NAND flash signals. The second circuit is communicatively coupled to the first circuit via a first memory bus associated with a SATA protocol, the NAND flash memory via a second memory bus associated with a NAND flash protocol, and the dynamic random access memory. In operation, data is fetched using a time between an execution of a plurality of threads.
US09189441B2	Dual casting PCIE inbound writes to memory and peer devices Methods and apparatus for supporting dual casting of inbound system memory writes from PCIe devices to memory and a peer PCIe device. An inbound system memory write request from a first PCIe device is received at a PCIe root complex and the memory address is inspected to determine whether it falls within an address window defined for dual casting operations. If it does, an IO write request is generated from the inbound system memory write request and sent to a second PCIe device associated with the address window. During a parallel operation, the original inbound system memory write request is forwarded to a system agent configured to receive such write requests.
US09189439B2	Interface logic for a multi-core system-on-a-chip (SoC) In one embodiment, the present invention includes a system-on-a-chip (SoC) with first and second cores, interface logic coupled to the cores, chipset logic coupled to the interface logic, and a virtual firewall logic coupled between the chipset logic and the second core. The interface logic may include a firewall logic, a bus logic, and a test logic, and the chipset logic may include a memory controller to provide for communication with a memory coupled to the SoC. In some system implementations, both during test operations and functional operations, the second core can be disabled during normal operation to provide for a single core SoC, enabling greater flexibility of use of the SoC in many different implementations. Other embodiments are described and claimed.
US09189438B2	Method and apparatus for dynamic power saving with flexible gating in a cross-bar architecture Various aspects of dynamic power reduction in a bus communication architecture are described herein as embodied in an XBAR architecture that provides flexible gating of multiple paths and repeater circuitry to allow any of a number of selected clients to communicate with any of the other interconnected clients while reducing dynamic power consumption by disabling unused repeater circuitry in the bus communication architecture.
US09189435B2	Method and apparatus for arbitration with multiple source paths A method and apparatus for arbitration. In one embodiment, a point in a network includes first and second arbiters. Arbitration of transactions associated with an address within a first range are conducted in the first arbiter, while arbitration of transactions associated with an address within a second range are conducted in the second arbiter. Each transaction is one of a number of different transaction types having a respective priority level. A measurement circuit is coupled to receive information from the first and second arbiters each cycle indicating the type of transactions that won their respective arbitrations. The measurement circuit may update a number of credits associated with the types of winning transactions. The updated number of credits may be provided to both the first and second arbiters, and may be used as a basis for arbitration in the next cycle.
US09189434B2	Universal serial bus device and method for controlling an idle-delay time thereof A universal serial bus (USB) host device and a method of operating the same are provided. The method includes starting a first data transfer in an on-state, entering a suspend state when an idle-delay time elapses after the first data transfer is completed, making a transition from the suspend state to the on-state after performing a resuming operation when a second data transfer is requested, and dynamically controlling the idle-delay time based on a compared result of a current miss rate and at least two predetermined miss rates.
US09189432B2	Apparatus and method for predicting target storage unit A data processing apparatus comprises processing circuitry and a plurality of storage units. When the processing circuitry executes a data access instruction, then a storage controller identifies based on a target storage address of the data access instruction, which of the storage units includes the target storage location identified by the target storage address. Prediction circuitry is provided to predict a predicted storage unit predicted to include the target storage location, so that retrieval of the data value from the predicted storage unit can be initiated before the storage controller has identified the target storage unit. The prediction circuitry makes the prediction based on the type of the data access instruction executed by the processing circuitry.
US09189430B2	Apparatus and methods for serial interfaces Apparatus and methods for serial interfaces are provided. In one embodiment, an integrated circuit operable to communicate over a serial interface is provided. The integrated circuit includes analog circuitry, registers for controlling the operation of the analog circuitry, and a distributed slave device including a primary block and a secondary block. The registers are accessible over the serial interface using a shared register address space. Additionally, the primary block is electrically connected to the serial interface and to a first portion of the registers and the secondary block is electrically connected to the primary block and to a second portion of the registers.
US09189428B2	Pen/touch tablet computer having multiple operation modes and method for switching operation modes A tablet computer is provided, which includes a sensor section operable to detect positional input by a human operator and output a positional input signal; a display, laid over the sensor section, operable to receive and display a video signal; and a processor, coupled to a memory storing programs for running an operating system (OS) and executing software loaded to the memory, the processor being operable to receive and process the positional input signal from the sensor section and to output a video signal of the OS and the software to the display. The tablet computer further includes a sensor signal filter capable of selectively communicating the positional input signal from the sensor section to the processor, to a separate external processor, or to neither the processor nor the separate external processor; and a display switch capable of coupling the display to the processor or to the separate external processor.
US09189426B2	Protected access to virtual memory Embodiments of techniques and systems for protected access to virtual memory are described. In embodiments, a protected memory management architecture (“PMMA”) may be configured to control accesses to protected physical memory. The PMMA may provide a protected virtual memory window for dynamic allocation of protected memory regions. During forward translation of virtual memory addresses, the PMMA may check a region ID of a process before allowing access. During reverse translation of a physical memory address, the PMMA may prevent accesses to protected physical memory addresses. The PMMA may also dynamically allocate physical memory to protected memory regions in virtual memory and may authenticate the physical memory as available before allocation. Other embodiments may be described and claimed.
US09189423B2	Method and apparatus for controlling cache refills A method and apparatus are provided for controlling a cache. The cache includes a plurality of storage locations, each having a priority associated therewith, and wherein the cache evicts data from one or more of the storage locations based on the priority associated therewith. The method comprises: storing historical information regarding data being evicted from the cache; retrieving data from a secondary memory in response to a miss in the cache; assigning a priority to the retrieved data based on the historical information; and storing the retrieved data in the cache with an indication of the assigned priority.
US09189421B2	System and method for implementing a hierarchical data storage system A system and method for efficiently storing data both on-site and off-site in a cloud storage system. Data read and write requests are received by a cloud data storage system. The cloud storage system has at least three data storage layers. A first high-speed layer, a second efficient storage layer, and a third off-site storage layer. The first high-speed layer stores data in raw data blocks. The second efficient storage layer divides data blocks from the first layer into data slices and eliminates duplicate data slices. The third layer stores data slices at an off-site location.
US09189419B2	Detecting and suppressing redundant input-output operations In a virtual machine, swap activities of a hypervisor and a guest OS are reconciled so that redundant input-output operations (IOs) can be avoided and a synchronous response time of the virtual machine improved. This is achieved with a map of memory pages to blocks of storage. For a write IO to write contents of a memory page into a target block, the map is examined to see if it contains a valid entry for the memory page. If the map contains the valid entry, the write IO is prevented from being issued and a data structure is updated so that subsequent IOs to the target block is redirected from the target block to a block that is associated with the physical memory page in the valid entry. On the other hand, if the map does not contain the valid entry, the write IO is issued.
US09189410B2	Hypervisor-based flash cache space management in a multi-VM environment Techniques for managing space in a flash storage-based cache are provided. In one embodiment, a computer system can calculate “ratio of effective cache space” (rECS) values for a plurality of VMs, where each VM has a cache allocation comprising a subset of a global pool of cache blocks in the flash storage-based cache, and where the rECS value for the VM indicates a proportion of the subset that has been populated with cached data and re-accessed by the VM within a current time window. The computer system can further determine a new cache allocation size for at least one VM in the plurality of VMs based on the rECS values. The computer system can then adjust the number of cache blocks in the at least one VM's cache allocation based on the new cache allocation size.
US09189401B2	Synchronous and asynchronous discard scans based on the type of cache memory A computational device maintains a first type of cache and a second type of cache. The computational device receives a command from the host to release space. The computational device synchronously discards tracks from the first type of cache, and asynchronously discards tracks from the second type of cache.
US09189397B2	Data storage device including buffer memory A data storage device includes a data storage medium; a micro control unit (MCU) connected to a host through a first interface method and configured to control the data storage medium in response to a request of the host; and a buffer memory connected to the host through a second interface method, connected to the MCU, and controlled by the MCU and the host, respectively.
US09189393B2	Computer, control method of computer, and recording medium A computer includes a storage region in which an object generated by executing a program is disposed, and a control unit that performs execution of the program and releasing of the storage region. The control unit updates time information using garbage collection, a capacity of objects in a memory, or similar as a trigger, acquires information of a program generating an object and time information at the time of generation of the object which are recorded in a recording device so as to be correlated with each other when the object is generated. The control unit further detects an object which is unnecessary to execute a subsequent program and acquires the time information, and records a difference between the time information at the time of the generation and at the time of the detection in the recording device so as to be correlated with the information of the program.
US09189391B2	Storage system and data control method therefor Package controller of a flash package, upon receiving an update data write request with respect to a first logical storage area corresponding to a first LU that is treated as a backup target, manages a first physical storage area as a backup storage area in a state where pre-update data is maintained, allocates a second physical storage area to the first logical storage area, and writes the update data to the second physical storage area. The package controller, upon receiving an update data write request with respect to a second logical storage area corresponding to a second LU that is treated as a non-backup target, manages a third physical storage area allocated to the second logical storage area as an invalid storage area, and writes the update data to a fourth physical storage area newly allocated to the second logical storage area.

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