最新美国发明专利
Document Document Title
US09071806B2 Reproducing apparatus
An apparatus which reproduces a movie from a recording medium, when receiving an instruction, reproduces the movie from a point associated with an appearance point of a feature portion.
US09071805B2 Systems, methods, and apparatuses for handling failed media content recordings
An exemplary system includes a communication facility configured to receive transmitted data representative of a plurality of media content instances in accordance with a transmission schedule. The system further includes a media recording facility communicatively coupled to the communication facility. The media recording facility is configured to recognize a failure to record one of the media content instances, and designate the media content instance for consideration for at least one future recording opportunity. In certain embodiments, the designation of the media content instance includes adding at least one identifier representative of the media content instance to a watch list, searching program guide data for the identifier; and identifying, from the program guide data, a scheduled future transmission of the media content instance.
US09071802B2 Display apparatus and control method thereof
A display apparatus includes a display unit; a storage unit which stores user setting information which is set based on an input from a user; and a controller which checks whether the user setting information is stored in the storage unit and displays the stored user setting information on the display unit before the display apparatus is turned off, when a power-off signal of the display apparatus is received from the user.
US09071799B2 Channel tuning redirect
Various arrangements for television channel tuning are presented. Receiving equipment may receive an indication of a first television channel for tuning. The receiving equipment may determine the first television channel is not available. A second television channel that carries the same content as the first television channel may be identified. The second television channel may be available for tuning. The receiving equipment may tune to the second television channel.
US09071795B2 Technique for effectively accessing programming listing information in an entertainment delivery system
In a broadband communications system, e.g., a cable system, programming content can be readily reserved and accessed for viewing using an interactive program guide, a network home graphic user interface (GUI), Quick View Guide, etc., in accordance with the invention. Such programming content may include in-progress programs, future programs and previously broadcast programs which are recorded at a headend in the cable system, and which may or may not have overlapping broadcast times. In addition, the user may reserve programs at a set-top terminal, and may also do so remotely from the terminal through a communications network such as, the Internet, a public switched telephone network (PSTN), a wireless telephone network, etc.
US09071794B2 Image processing device capable of reading a user-identifying image
An image processing device is provided. The image processing device includes a scanner to scan an image formed on a sheet, a first image obtainer to read and obtain a first image being a processible image formed in a first area, the first area being allocated on the sheet, a second image obtainer to read and obtain a second image formed in a second area, the second area being allocated on the sheet separately from the first area, a judging unit to judge as to whether the second image obtained by the second image obtainer is qualifies a predetermined authentication criteria and is identical to a predetermined identifying image, and a function controller to activate a predetermined function of the image processing device, which processes the processible image obtained by the first image obtainer, when the judging unit judges that the second image is identical to the predetermined identifying image.
US09071791B2 Receiving device and transmitting device
A receiving device provided with: a receiving unit for receiving image data from a transmitting device with which the receiving device has established wireless communication; a display unit for displaying setting data for a different transmitting device from the aforementioned transmitting device to establish wireless communication with the receiving device and the image data; and a display control unit for controlling the display of the display unit such that, in the frames displayed before and after a frame containing the setting data, the image data is displayed in the same display region as the display region for the display unit in which the setting data is displayed.
US09071787B2 Display information feedback
In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.
US09071786B2 Printing and print data generating devices, computer-readable media for storing generating instructions, and methods of generating print data
A print data generating device includes an image orientation selecting portion and a print data generating portion. The image orientation selecting portion may select one image orientation of an image to be printed from several image orientations by using partial image data. The print data generating portion may generate print data for printing the image according to the one image orientation. Each image orientation may be with respect to a conveying direction. Each partial image data may correspond to a respective image orientation, a respective partial image, and a respective portion of the image to be printed. Each partial image may be printed in an area defined by a particular distance determined from a corresponding edge of the printing medium. The particular distance may be based on a distance between a location of a downstream roller and a location of a most-upstream nozzle for a printer in the conveying direction.
US09071785B2 Adjusting perspective distortion of an image
The present disclosure concerns a method and system to accurately remove a three-dimensional distortion in an image of a document and convert the image into an accurate two dimensional image. A method for accurately deducing an image of a document to a precise document boundary is also disclosed. A portable computing device may employ the disclosed method and system. The methods involve a marker embedded in a document which provides three-dimensional positional information of a recording device with reference to the marker continuously in real time.
US09071778B2 Ad converting circuit, photoelectric converting apparatus, image pickup system, and driving method for ad converting circuit
An apparatus for acquiring an i-bit digital code by a first stage AD conversion and a j-bit digital code by a second stage AD conversion includes a comparing unit which compares a reference signal and an analog signal in the first stage AD conversion; and an amplifying unit for outputting an amplified residual signal acquired by amplifying a difference between the analog signal and an analog signal corresponding to the i-bit digital code. The comparing unit compares the amplified residual signal and the reference signal in the second stage AD conversion.
US09071777B2 Information processing system, information processing method, and computer readable medium for recommending printing modes for energy-savings
An information processing system includes a determination part, a history storage part, a provisional history storage part, and a changing part. The determination part determines whether or not a printing mode of a job set at a terminal matches a recommended printing mode. The history storage part stores printing histories of plural jobs. The provisional history storage part stores, in a case where the printing mode does not match the recommended printing mode, provisional printing histories including resource-saving effect which represents an effect of reduced resources based on an assumption that the jobs are printed in accordance with the recommended printing mode. The changing part changes the recommended printing mode, based on the stored printing histories and the provisional printing histories.
US09071770B2 Arrangement for and method of projecting an image with linear scan lines
A lightweight, compact image projection module, especially for mounting in a housing having a light-transmissive window, is operative for sweeping a composite laser beam as a pattern of linear scan lines on a planar projection surface and for causing selected pixels arranged along each linear scan line to be illuminated to produce an image of high quality and in color.
US09071766B2 Image capturing apparatus and control method thereof
An image capturing apparatus comprises a photometry unit which detects a luminance of an object; a determining unit which determines, based on a result of photometry at a first exposure, whether to perform autoexposure bracketing that captures a plurality of images at different exposures; a calculating unit which calculates an exposure change amount that is different from the first exposure used when performing the autoexposure bracketing; a correcting unit which corrects the calculated exposure change amount based on a result of photometry at a second exposure that is different from the first exposure; and a shooting control unit which shoots an image at the exposure change amount calculated by the calculating unit or the exposure change amount corrected by the correcting unit.
US09071765B2 System, method, and computer program product implementing an image processing pipeline for high-dynamic range images
A system, method, and computer program product for generating high-dynamic range image data is disclosed. The method includes the steps of receiving image sensor data from an interleaved image sensor. The interleaved the image sensor includes a first portion of pixels exposed for a first exposure time and a second portion of pixels exposed for a second exposure time that is shorter than the first exposure time. The method further includes the steps of identifying a first subset of pixels in the second portion having an intensity value above a first threshold value, identifying a second subset of pixels in the first portion having an intensity value below a second threshold value, and generating high-dynamic range (HDR) data based on the first subset and the second subset.
US09071762B2 Image sensor including real-time automatic exposure control and swallowable pill including the same
An imager and a method for real-time, non-destructive monitoring of light incident on imager pixels during their exposure to light. Real-time or present pixel signals, which are indicative of present illumination on the pixels, are compared to a reference signal during the exposure. Adjustments, if necessary, are made to programmable parameters such as gain and/or exposure time to automatically control the imager's exposure to the light. In a preferred exemplary embodiment, only a selected number of pixels are monitored for exposure control as opposed to monitoring the entire pixel array.
US09071760B2 Image pickup apparatus
Provided is an image pickup apparatus including: an image pickup unit configured to pick up an object image imaged by a lens unit; and a display unit configured to display an image output from the image pickup unit, the display unit detecting a first close condition and a second close condition of a photographer. The display unit displays a first display object indicating a focal point adjustment area on a display image of the object image in response to detection of the first close condition, and displays a second display object indicating a focusing command area on the display image of the object image corresponding to a range of detection of the second close condition.
US09071757B2 Optical image stabilizer and optical apparatus
The optical image stabilizer sets a movable amount of an image stabilizing element to a first movable amount when a detection signal from a shake detector does not exceed a first value. The stabilizer sets the movable amount to a second movable amount when the signal exceeds the first value and then exceeds, without exceeding a second value, a third value within a first period of time, sets the movable amount to a third movable amount when the signal exceeds the first value and then does not exceed the second and third values, sets the movable amount to the second movable amount when the signal exceeds the first value, then exceeds the second value and thereafter exceeds a fourth value, and sets the movable amount to the third movable amount when the signal exceeds the first value and then exceeds the second value without exceeding the fourth value.
US09071756B2 Systems and methods for digital video stabilization via constraint-based rotation smoothing
Systems and methods for digital video stabilization via constraint-based rotation smoothing are provided. Digital video data including a set of image frames having associated time stamps and a set of camera orientation data having associated time stamps may be provided. A smoothed set of camera orientation data may be generated by minimizing a rate of rotation between successive image frames while minimizing an amount of empty regions in a resulting set of smoothed image frames reoriented based on the smoothed set of camera orientation data.
US09071754B2 Image capturing apparatus, image processing apparatus, image processing method, and image processing program
This image capture device is configured to generate a restored image by reducing a motion blur that has been induced by a camera shake during shooting. The device includes: an image sensor 10; an optical system 20; and an image processing section 220 which processes an image signal that has been obtained by the image sensor 10. The image processing section 220 includes: a blur kernel determining section which determines a blur kernel that defines the camera-shake-induced motion blur of the image captured; and an image restoration section which generates the restored image. The blur kernel determining section changes the size of the blur kernel by reference to information that affects the degree of the blur of the image such as the zoom power of the optical system 20.
US09071753B2 Imaging apparatus including a first imaging system and a second imaging system
An imaging apparatus includes: an imaging unit that respectively generates, with imaging devices different from one another, a first captured image with a specific direction of a subject set in a longitudinal direction, a second captured image with an orthogonal direction orthogonal to the specific direction set in a longitudinal direction and including a subject adjacent to one side of the orthogonal direction of the subject included in the first captured image, and a third captured image with the orthogonal direction set in a longitudinal direction and including a subject adjacent to the other side of the orthogonal direction of the subject included in the first captured image; a detecting unit that detects a state of the imaging apparatus; and a control unit that determines, based on the detected state, a range of a target image as a target of display or recording among the first to third captured images.
US09071752B2 Scene imaging method using a portable two-camera omni-imaging device for human-reachable environments
A scene imaging method using a portable two-camera omni-imaging device for human-reachable environments is disclosed. Firstly, an upper omni-image and a lower omni-image of at least one scene are captured. Next, image inpainting and image dehazing perform on the upper omni-image and the lower omni-image. Next, image unwrapping performs on the upper omni-image and the lower omni-image by a pano-mapping table, so as to form an upper panoramic image and a lower panoramic image respectively, and the upper panoramic image and the lower panoramic image respectively have an upper part and a lower part overlapping each other. Finally, a data item on the upper part and the lower part is obtained by view points of the scene and the pano-mapping table, thereby stitching the upper and lower panoramic images.
US09071750B2 Semiconductor integrated circuit and multi-angle video system
The present invention is provided to lessen load on a bus in the case of storing image data captured by a plurality of cameras into a semiconductor memory. To a semiconductor integrated circuit, a plurality of cameras and a semiconductor memory can be coupled. The semiconductor integrated circuit includes a plurality of first interfaces, a second interface, a bus, and a plurality of image processing modules. The image processing modules include a process of performing distortion correction on image data in a pre-designated region, and writing the image data in the region subjected to the distortion correction into the semiconductor memory via the bus and the second interface. By excluding image data out of the pre-designated region from an object of distortion correction in the image processing modules, the amount of image data transferred to the semiconductor memory is reduced.
US09071742B2 Optical imaging with foveation
Selected described embodiments include an imager providing concurrent wide field of view (WFOV) and foveated images. The imager includes a frontend optic configured to receive light from a scene. Corrective optics reduces distortions, and transmits the light to a beam splitter. One portion of the light exiting the beam splitter is focused on a WFOV image detector. A second portion of the light falls on a scanning mirror that can be configured to target a selected field position in the field of view. From the scanning mirror, the light passes through a magnifier and is corrected by an adaptive wavefront corrector. The corrector may be configured to correct aberrations corresponding to the particular field of view selected by the scanning mirror. The light from the wavefront corrector is focused on a foveated image detector. The images captured by the image detectors may be stored, processed, and transmitted to other systems.
US09071740B1 Modular camera system
What is described herein is a system which includes an arm where the arm includes a cutout which is a same shape as at least some part of a video camera and which is configured to hold the video camera. The system further includes a base which is configured to be placed on a surface. The system further includes a joint which is configured to be connected to the arm and the base.
US09071738B2 Integrated broadcast and auxiliary camera system
An integrated broadcast/auxiliary camera system includes a broadcast camera and an auxiliary camera. The broadcast camera may capture a first image of a scene, wherein operational parameters of the broadcast camera including a broadcast focus distance, a broadcast focal length, a broadcast pan angle and a broadcast tilt angle are operator controlled. The auxiliary camera may capture a second image of the scene, the second image different from the first image. A controller may automatically control operational parameters of the auxiliary camera including an auxiliary focus distance, an auxiliary focal length, an auxiliary pan angle and an auxiliary tilt angle based on the operational parameters of the broadcast camera.
US09071731B2 Image display device for reducing processing load of image display
An image display device may include a communication unit that receives frame images sequentially transmitted from image pickup devices, a display unit that displays the frame images, a storage unit that stores processible information on an amount of the frame images and priority information indicating priorities of the frame images, an acquisition unit that acquires status information, a determination unit that determines a data amount of the frame images transmitted by each of the image pickup devices within a predetermined period of time based on the processible information and the priority information stored in the storage unit and the status information acquired by the acquisition unit, and a control unit that performs control that causes information corresponding to the data amount determined by the determination unit to be transmitted from the communication unit to each of the plurality of image pickup devices.
US09071730B2 Product information display and purchasing
A method of providing additional information to a viewer of a moving image file is disclosed. The method includes the steps of providing one or more tags within the moving image file indicating the existence of additional product information; visually indicating the existence of the tags alongside or over the moving image; detecting a request to view the product information associated with the one or more tags; pausing the moving image; and displaying the requested product information over the paused image.
US09071729B2 Providing user communication
Systems and methods are disclosed for providing user communication. First an invitation input may be received from a first user. The invitation input may comprise a recommendation to a second user to take an action regarding content to be delivered over a content delivery system. Then, the invitation input may be transmitted to the second user. Next, an acceptance input may be received from the second user. The acceptance input may comprise an acceptance to the invitation input. The acceptance input may then be transmitted to the first user in response to receiving the acceptance input.
US09071728B2 System and method for notification of event of interest during a video conference
A computer implemented method is disclosed, the method including but not limited to detecting an event of interest in video conference data for a plurality of video conference participants and notifying an end user of the event of interest. A computer readable medium is also disclosed for containing a computer program for performing the method. A computer implemented method is also disclosed for receiving at an end user device, a notification of an event of interest in a video teleconference, the method including but not limited to receiving at an end user device from a notification indicating a detection of the event of interest in video conference data from the video teleconference for a plurality of video conference participants; and sending data from the end user device to the server requesting a transcription of comments from the speaker in video teleconference.
US09071725B2 Methods and user interfaces for video messaging
Systems and techniques for transferring electronic data between users of a communications system by receiving, at an instant messaging host, a video file from a sender and intended for a recipient; authenticating the video file; and sending the video file to the intended recipient.
US09071724B2 Method and apparatus for providing a video call service
A method and an apparatus perform a video call service. A transmission communication device provides information on a rotation angle of a video call image transmitted during a video call to a reception communication device corresponding to a counterpart of the video call. Then, the reception communication device renders the received video call image by using the information on the rotation angle of the received video call image, and displays a rendered video call image. Accordingly, an image of a counterpart of the video call can be normally provided during the video call.
US09071723B2 AV timing measurement and correction for digital television
An invention for measuring, maintaining and correcting synchronization between signals which suffer varying relative delays during transmission and/or storage is shown. The present invention teaches measuring the relative delay between a plurality of signals which have suffered differing delays due to transmission, storage or other processing. The preferred embodiment of the invention includes the use of a marker which is generated in response to a second signal and combined with a first signal in a manner which ensures that the marker will not be lost in the expected processing of the first signal. Subsequently a first delayed marker is generated in response to the marker associated with or recovered from the first signal, and a second delayed marker is generated from the second signal. The first delayed marker and second delayed marker are compared to determine a measure of the relative timing or delay between said first signal and said second signal at said subsequent time.
US09071722B2 Solid-state imaging element, imaging device, and signal processing method
This solid-state image sensor includes a photosensitive cell array including first through fourth photosensitive cells 2a to 2d and a light dispersing element array that is arranged to face the photosensitive cell array and that includes first and second types of light dispersing elements 1a, 1b. If light that would be directly incident on each photosensitive cell, were it not for the light dispersing element array, is called that photosensitive cell's entering light, the light dispersing element array is configured so that the first type of light dispersing element 1a makes a part of light rays with the first color component, which is included in the entering light of each of the first and second photosensitive cells 2a, 2b, incident on the first photosensitive cell 2a and that the second type of light dispersing element 1b makes a part of light rays with the second color component, which is included in the entering light of each of the third and fourth photosensitive cells 2c, 2d, incident on the fourth photosensitive cell 2d.
US09071721B1 Camera architecture having a repositionable color filter array
A camera system includes an array of image pixels disposed in or on a substrate and laid out in a multi-ring pattern. The array of image pixels is coupled to acquire image data of a color image in response to light incident on the array of image pixels. A color filter array (“CFA”) is positioned to color filter the light incident on the array of image pixels and includes at least two different color filter types that filter different color bands of the light. An actuator is coupled to the CFA to adjust the CFA in a sequence and a controller is coupled to the actuator to control the sequence such that each image pixel in the array of image pixels is temporarily optically subtended by each of the at least two different color filter types in the CFA while acquiring the image data associated with the color image.
US09071719B2 Image processing apparatus with a look-up table and a mapping unit, image processing method using a look-up table and a mapping unit, and storage medium in which program using a look-up table and a mapping unit is stored
An image processing apparatus includes a storage unit that is capable of storing a look-up table having association information for associating at least one first image with at least one second image that is an image whose load on a brain has been adjusted, an image accepting unit that accepts at least one image, a mapping unit that acquires a whole or part of one or more second images associated with a whole or part of the at least one image accepted by the image accepting unit, using association information from among the one or more pieces of association information, and an image output unit that outputs at least one output image, which is the whole of the at least one second image acquired by the mapping unit or a group of part of the at least one second image acquired by the mapping unit.
US09071716B2 Sheet carrying apparatus and image forming apparatus having sheet detection power shifter
A sheet carrying apparatus comprises a job executing portion that includes a sheet carrying portion for carrying a sheet, a power supply portion that performs usual power supply to the job executing portion in a usual mode and stops the power supply to the job executing portion in a power saving mode that restricts the power supply more than the usual mode; an ejecting portion into which the sheet carried by the sheet carrying portion is ejected, and an ejected sheet detecting portion that detects presence of the sheet ejected in the ejecting portion, and when there is no sheet in the ejecting portion after a job including ejecting of the sheet into the ejecting portion ends, the power supply portion shifts from the usual mode to the power saving mode.
US09071715B2 Method for detecting whether paper is remained by using means of time-detecting and image-similarity comparing and multi-function printer thereof
A method for detecting whether a paper is remained and a multi-function printer (MFP) thereof are provided. The method includes executing a detection procedure when the MFP accomplishes image capturing and outputting of the paper; recording a time of starting executing the detection procedure; calculating an executed time of the detection procedure; and determining whether to activate an alarm according to the executed time of the detection procedure and a similarity comparison result obtained by executing a scan procedure, so as to remind a user whether the paper is remained in the MFP.
US09071712B2 Image forming apparatus
An image forming apparatus includes a sheet feed portion configured to feed a sheet, an image forming portion configured to form an image on the sheet, a first conveying path configured to guide the sheet fed from the sheet feed portion such that the sheet passes through the image forming portion, a second conveying path configured to guide the sheet on which the image has been formed on one surface thereof by the image forming portion to the first conveying path again, a document feed portion configured to feed a document to the second conveying path, an image reading portion configured to read an image of the document fed by the document feed portion, and a control portion configured to control the sheet feed portion and the document feed portion such that the document and the sheet are conveyed on the second conveying path in a sequence in which the document and the sheet are mixed in a case where an operation of forming images respectively on both surfaces of a plurality of sheets overlaps with an operation of reading images of a plurality of documents.
US09071710B2 Image forming apparatus, printing system and function setting method thereof
An image forming apparatus having a display section to display screens for setting a function; a control section to form an image where alternatives of a function to be set by transiting plural screens are aggregated and arranged on one page of sheet, and to form a composite image where a position detection code for identifying a position on the sheet is combined with the image; a memory section to store a table which correlates each of the alternatives with a position of each of the alternatives on the sheet; and a print section to print the composite image on the sheet, wherein in cases where the control section acquires position information having been identified by the position detection code on the sheet, the control section refers to the table to identify an alternative corresponding to the position information, and sets a function based on the identified alternative.
US09071707B2 Devices and methods for acquiring model information of a peripheral device by a computer
Device and methods for acquiring by a host device model information (model ID) of a device assigned in a new range are provided herein. In many embodiments, the device includes a model information storage unit that stores model information from either a first range or a second range outside the first range and a communication unit that communicates with a device that requests model information, receives a model information request, and in response returns the model information if within the first range and returns specific information if the model information is outside the first range. After the specific information is sent, a new request is sent from the host device after which the communication unit provides the model information within the second range, often in a different format from the specific information.
US09071703B2 Multifunctional keyboard for a mobile communication device and method of operating the same
An apparatus and method for telephony tone signal and character code generation for QWERTY keyboards includes a QWERTY style keyboard, a processor and a keyboard mode control software module. The QWERTY style keyboard has a plurality of letter keys, wherein each letter key is configured to generate a unique input signal. The processor is coupled to the keyboard and is configured to convert each unique input signal generated by the letter keys into a character code and/or a telephony tone signal. The keyboard mode control software module operates on the processor, and controls whether the processor converts the unique input signals from the letter keys into character codes or telephony tone signals.
US09071701B2 Using wireless characteristic to trigger generation of position fix
A wireless characteristic of a wireless signal may be used to trigger generation of a position fix. A mobile computing device may include a wireless transceiver, a location determination circuit and a processing circuit. The wireless transceiver may be configured to receive a wireless signal over a short range wireless network from a wireless system. The processing circuit may be configured to detect a change in the wireless signal and, in response to the detected change, to generate a position fix using the location determination circuit.
US09071699B2 Apparatus and method for automatic call receiving and sending depending on user posture in portable terminal
A method of receiving a call by recognizing a posture of a user in a portable terminal is provided. The method includes identifying whether a call reception event occurs, detecting a motion in which the user brings the portable terminal to an ear by using a posture detecting sensor, when the call reception event occurs, and connecting the call upon detecting the motion.
US09071694B2 Personal hands-free accessory for mobile device
A hands-free accessory for a mobile device may include a microphone element, and a telecoil coupled with the microphone element in parallel. The microphone element and the telecoil are coupled with an output terminal of the hands-free device. The hands-free accessory may further include a capacitor coupled with the telecoil in series. The hands-free accessory may further include an ear speaker. The hands-free accessory may further include a first switch between the microphone element and the telecoil. Alternatively, the mobile device may include a second switch configured to control operation of the microphone element. When the first switch or the second switch is turned off/closed, the microphone element is not operated, and a signal corresponding to an electric current induced in the telecoil is input/transmitted to the mobile device.
US09071693B2 System and method for active call concierge for supplementary call services
Systems and methods according to these exemplary embodiments provide active call concierge services wherein a network tracks users' behaviors with respect to, for example, supplementary services. When a user invokes a supplementary service toward a called party, the network captures this data. The network informs an agent on the user's device that it should prompt the user to reuse the same supplementary service the next time that the user dials the same called party. If the user inputs an acceptance of this suggestion, the user's device automatically appends or adds the service code associated with the repeated supplementary service to the outgoing call setup signal.
US09071692B2 Systems and methods for managing teleconference participant mute state
In accordance with embodiments of the present disclosure, a method for managing a mute state of a participant in a teleconference may include detecting, based on analysis of at least one characteristic of audio data received from a microphone associated with the participant or image data received from a camera associated with the participant, whether the participant is attempting to speak to other teleconference participants. The method may also include providing an alert to the participant in response to a detecting that the participant is attempting to speak to other conference participants while the microphone is muted.
US09071690B2 Call transfer processing in SIP mode
Methods and devices for supervising a transfer of a call or of processing a call set up between first and second terminals in a communications network implementing an SIP type signaling protocol. The method is implemented after sending or receiving, as the case may be, a command to transfer the already-set up call to a call between the first terminal and a third terminal. The supervision method obtains an item of information relating to setting up the call between the first and third terminals and sends a command to resume the call between the first and second terminals as a function of whether at least one non-set up criterion is true. The processing method transmits information relating to setting up the call between the first and third terminals and sets up a call between the first and second terminals as a function of whether the resumption command is received.
US09071689B2 Message backup facilities
Facilities are provided herein for backing up messages and related activities. An active telephone call is initiated to a voicemail server and recording of the audio stream of the active telephone call is initiated to record a voicemail message being played back during the telephone call. The recorded voicemail message may then be edited, tagged, enhanced, organized with other messages, and shared, as examples. In another aspect, backup of messages is facilitated by an intermediary system that establishes an active telephone call between a voicemail server and a client. The intermediary system passes a request from the client to the voicemail server to commence playback of a voicemail message, and the intermediary system records a portion of the audio stream of the active telephone call.
US09071687B1 Outbound time window indicators
A system and machine-implemented method for automated communication is presented. Outbound communication time window groups associated with one or more ranges of time valid are identified for initiating an outbound communication. A set of outbound communication time window groups for each of which the current time is within its associated ranges of time is identified. Subsequently, a call record associated with one of the outbound communication time window groups in the set is obtained, and an outbound communication session is initiated to a communication address included in the obtained call record. After an outbound communication session is established, it may be transferred to a live agent. If the outbound communication session has failed however, another outbound communication session may be initiated to the communication address within a later time range.
US09071685B2 Method and apparatus for time-based mediation of wireless communications
A method and apparatus for time-based mediation of wireless communications is provided to a user of a wireless communications device. The method involves determining local time information associated with the recipient communication device in response to a user-initiated contact function; determining a mediation condition based at least in part on said local time information; and if the mediation condition satisfies a predetermined criterion: providing, to a user of the wireless communication device, an indication of said mediation condition; presenting, to said user, a menu of two or more options for contacting the recipient communication device using the wireless communication device; and initiating communication in accordance with an option selected from said menu. The method can be implemented on an apparatus such as a wireless communication device.
US09071681B1 Inbound telephony orchestrator for hangout-based contact center platform
A system and method are provided for receiving inbound conventional calls and establishing real-time interconnectivity in a multimedia production environment. The system may include: a signaling unit; a contact center bell application, a particular reflector associated with a virtual hangout, and a contact center manager application. The system may further include a room manager application. The method may include: transmitting a call request to the integration unit, wherein call information corresponding to the call request is sent to the contact center manager; and connecting to the communications session, which corresponds to a virtual hangout identification received by the integration unit from the contact center manager based on the call information.
US09071678B2 Intelligent loop diagnostics for digital subscriber line services to support a service assurance system
A method of diagnosing a transmission loop in an Internet protocol television (IPTV) network includes configuring the loop as an open loop and performing a single-ended loop test (SELT), configuring the loop as a terminated-loop and performing another SELT, subtracting a trace of the first SELT from a trace of the second SELT, and determining the length of the loop from the result. A service assurance system in an IPTV network includes a test module and a DSLAM coupled to a residential gateway by a transmission loop. The test module operates to determine that a fault condition on the IPTV network is caused by a fault in the loop, direct the DSLAM to perform an open loop SELT and a terminated-loop SELT on the loop, receive the results of the SELTs, and determine a location of a tap on the loop based upon the results.
US09071673B2 Portable communication device having flexible display unit
A portable communication device having a flexible display unit to form a predetermined curvature or be unfolded includes a first housing, second and third housings rotatably coupled to both ends of the first housing, first and second hinge modules provided between the first, second, and third housings to enable the second and third housings to rotate. The flexible display unit is provided on the first, second, and third housings to form a curvature or be unfolded on the first, second, and third housings through rotation together with the second and third housings, first and second curvature space portions formed between the first, second, and third housings allow formation of the curvature of the flexible display unit.
US09071672B2 Magnetic systems for electronic devices and accessories
A cover is described that is magnetically attached to a tablet device. The cover includes at least as flap. In the described embodiment, the flap includes a plurality of segments where the first segment includes a first plurality of edge attach magnets arrayed along a first edge of the flap and where a second segment includes a second plurality of edge attach magnets arrayed along a second edge of the flap opposite the first edge.
US09071670B2 Method and apparatus for content presentation in association with a telephone call
A method and apparatus are provided for presenting multimedia content to a caller and/or a called party in association with a telephone call. Content may be presented pre-ring (before the called party's telephone rings), in-call, and/or post-call. Content presented to a party may be related to another party participating in the call or may be related to a third party (e.g., an advertiser that paid for the ability to have its content presented). Presented content may be actuable, to allow a caller to change the destination of a call, take advantage of an offer presented to him or her, redeem a coupon, schedule or queue a subsequent call, etc. To find a desired destination party, a caller may initiate a manual or automatic search of his or her local contacts (on his telephone) and/or a central or global directory or contact list.
US09071666B2 Edge router and method for dynamic learning of an end device MAC address
An edge router (Broadband Remote Access Server) and a method are described herein that obtain a Media Access Control (MAC) address of an end device (consumer premises equipment). Once, the edge router obtains the MAC address of the end device then it can use Ethernet Operation, Administration and Maintenance (OAM) tools to troubleshoot the end device.
US09071664B2 Methods and apparatus for secure and adaptive delivery of multimedia content
Techniques for securely and adaptively delivering multimedia content are disclosed in which a set of alternate access units for each time slot is obtained. Then, the encryption stream index of each access unit from the set of alternate access units of the previous time slot are obtained. An encryption stream index is then assigned to each access unit in the set of alternate access units in the current time slot, such that the encryption index increases over time. Thus, the invention overcomes the problem of encrypting a multimedia stream that may have multiple access units for each time slot by selecting the encryption index for each access unit such that the encryption index increases, regardless of which access unit the delivery system (e.g., server) selects for transmission.
US09071661B2 Data communication coordination with sequence numbers
Described are sequence numbers for client-server communication, to control a client's use of server resources. A server grants the client credits, and the client consumes a credit for sending each command to the server. Each credit corresponds to a sequence number, with the set of sequence numbers forming a valid command window. The server enforces that for each received command, the command includes a sequence number that is within the valid command window and that the sequence number has not been used with another command. The server may also maintain a maximum window size, such that clients with credits cannot send a command with a sequence number that beyond a maximum sequence number. When incorporated into a data communication protocol, quality of service, combating denial of service, detection of message loss, division of server resources, secure message signing, and other numerous benefits result.
US09071658B2 Method and system for presenting a meeting in a cloud computing environment
A method for presenting a meeting in a cloud computing environment is disclosed. The method embodiment includes providing by a server a virtual planning space in a cloud computing environment, wherein the virtual planning space is associated with a meeting and is associated with planning content comprising data objects loaded by a plurality of meeting collaborators. The method also includes receiving by the server an indication to launch the meeting, and in response, generating a virtual meeting room associated with the meeting and an identifier for the virtual meeting room. Thereafter, the server is configured to transmit a message to a plurality of meeting participants that includes an invitation to attend the meeting and the identifier for the virtual meeting room, and to present meeting content comprising at least one data object of the planning content to the meeting participants via the virtual meeting room.
US09071656B2 Router and method for routing service
A routing method, apparatus and system are disclosed. The method includes: receiving from a service provider a service registration request which carries a service logical address, a service physical address, and a message rule; registering routing information according to the service registration request; and routing a request message of a service requestor according to the routing information. The present invention enables routing of the request message of a service requestor according to the service logical address, service physical address, and message rule, so that routing is more flexible and more convenient.
US09071654B2 Maintaining concurrency and consistency of globally unique identifiers
Systems, methods, and computer-readable storage media for ensuring data consistency and concurrency for globally unique identifiers (GUIDs) and associated content items via locking. A content management system configured to practice the method can receive, from a client device, a request to perform a content item operation in a storage environment that affects a GUID. Then the content management system can acquire a first mutex for a namespace associated with the content item operation, such as an application-level lock, and acquire a second mutex for the GUID, such as a row-level lock in a database table. After acquiring the locks, the content management system can perform the content item operation according the request, and update the GUID based on the content item operation. Then the content management system can release the mutexes and provide a confirmation to the client device in response to the request.
US09071653B2 Reducing cellular network traffic
A system is configured to store a user profile associated with a user, the user profile including: a first time, a time period, a list of content accessed by the one or more devices from one or more servers. The system may further be configured to identify particular content based on the list of content from the user profile; determine an amount of particular content to transfer based on the time period; and automatically transfer at least the amount of particular content from one or more servers to the one or more devices over a local area network, prior to the first time.
US09071652B1 Demand based communication format switching
Application requirements of at least two applications of a wireless device in communication with a wireless communication network are determined, an access node list comprising available mobile communication formats and network load information from each access node in communication with the wireless device is received, and a mobile communication format from among the available mobile communication formats for each of the at least two applications is determined. A communication schedule based on the application requirements of the at least two applications, the determined mobile communication formats, and the network load information is generated, and data is communicated between the wireless device and the access node according to the communication schedule.
US09071650B1 Method, system and computer program product for enforcing access controls to features and subfeatures on uncontrolled web application
Embodiments disclosed herein provide feature-level access control functionality useful for enforcing access controls to features and subfeatures on uncontrolled, third party Web Applications such as those associated with social networking sites. Specifically, pages of uncontrolled Web applications are programmatically inspected as they are accessed by users of an enterprise computing environment. Specific features on the pages are located and access to these features is enabled or disabled on a per user basis. A modified page is generated if feature(s) on a Web page is/are to be disabled. To block certain feature(s), content may be rewritten on-the-fly. Because embodiments disclosed herein can programmatically inspect a Web page and understand what is on the page at a much finer granularity, it is possible for enterprises to gain benefits that may come from embracing social networking sites without risking the downsides of allowing enterprise users access to uncontrolled Web applications.
US09071649B2 System and method for real time delivery of context based content from the cloud to mobile
The information in the cloud is available in the form of software-as-a-service is accessible from laptops and personal computers. The system obtains information from multiple sources in the “cloud,” correlates the information, determines a subset of information based on context, and pushes the information to at least one mobile device. An engine extracts a context based subset of information and correlates the context based subset of information based on the same context or a different context. A data push engine makes the information available in real time to a user by pushing the information to the at least one mobile device like a smartphone, tablet, and/or navigation system.
US09071647B2 Codebook creating method, codebook creating apparatus and initial codebook creating method
A codebook creating method involves acquiring amplitude or power of channel state information of channels between the transmission antennas and the reception antenna, mapping elements of a codeword of an initial codebook dynamically to the respective transmission antennas based on the amplitude or power of the channel state information thereby to create a first codebook, and scaling norms of elements corresponding to the respective transmission antennas in a codeword of the first codebook by using norm scale factors of the respective transmission antennas fixed based on the amplitude or power of the channel state information. An initial codebook creating method involves configuring a predetermined element of the codeword of the initial codebook to have a predetermined phase resolution, and configuring other elements of the codeword of the initial codebook to be arranged in an increasing or decreasing order of phase resolution.
US09071645B2 Techniques for credential auditing
Techniques for credential auditing are provided. Histories for credentials are evaluated against a principal credential policy for a user and an enterprise credential policy for an enterprise as a whole. An audit trail is produced within a report for the histories. The report indicates whether compliance with the principal and enterprise credential policies occurred and if not at least one reason is provided as to why compliance was not met within the histories.
US09071635B1 Methods and apparatus for identifying paging activities during idle mode
A network configuration capable of using a paging activity sink to aggregate and analyze flood of paging messages during an idle mode is disclosed. In one embodiment, a process using the paging activity sink is able to detect an idle mode of end user (“EU”) equipment in a communication network. Upon detecting a downstream push data such as push mail addressing to the EU equipment indicating a pending message, a predefined portion of data from the first downstream push data is copied or duplicated to form a copy of paging announcement. While sending the downstream push data to the EU equipment, the process forwards the copy of paging announcement to a network element (“NE”) such as a paging activity server for analyzing paging activities.
US09071634B2 Network management system, software and method
A fault prediction system comprises a processor, a data storage device and a network connection. The processor acts to commence monitoring of a newly notified device upon the network irrespective of whether details of the device are stored in a database on the data storage device or not.
US09071632B2 Service management roles of processor nodes in distributed node service management
A distributed node service management system utilizes multiple existing processor nodes of a distributed computing system, in support of the primary data processing functions of the distributed computing system. The distributed node service management system coordinates and manages service functions on behalf of processor nodes of the distributed computing system. Other features and aspects may be realized, depending upon the particular application.
US09071630B2 Methods for the interconnection of fibre channel over ethernet devices using a trill network
Methods are provided for forwarding Fiber Channel over Ethernet (FCoE) frames over a TRILL network by a FCoE device interconnection apparatus (FIA). A FCoE frame is received from a FCoE device at the FIA. The frame includes at least destination Ethernet MAC address and source Ethernet MAC address fields. The destination Ethernet MAC address of the incoming frame is replaced with the MAC address of the remote FCoE device as determined by the Fiber Channel destination address identifier in the received FCoE frame. The source Ethernet MAC address of the incoming frame is replaced. The frame is encapsulated in a TRILL header. The frame is forwarded to an egress FCoE device interconnection apparatus (FIA). The frame is then decapsulated into a FCoE frame, which is forwarded to an attached FCoE device with the original destination and source Ethernet MAC addresses.
US09071629B2 Methods for the interconnection of fibre channel over ethernet devices using shortest path bridging
Methods are provided for forwarding Fiber Channel over Ethernet (FCoE) frames over a TRILL network by a FCoE device interconnection apparatus (FIA). A FCoE frame is received from a FCoE device at the FIA. The frame includes at least destination Ethernet MAC address and source Ethernet MAC address fields. The destination Ethernet MAC address of the incoming frame is replaced with the MAC address of the remote FCoE device as determined by the Fiber Channel destination address identifier in the received frame. The source Ethernet MAC address of the incoming frame is replaced. The frame is encapsulated in a TRILL header. The frame is forwarded to an egress FCoE device interconnection apparatus (FIA). The frame is then decapsulated into a FCoE frame, which is forwarded to an attached FCoE device with the original destination and source Ethernet MAC addresses.
US09071625B2 Cross-environment event notification
A mobile computing device with a mobile operating system and desktop operating system running concurrently and independently on a shared kernel without virtualization. The mobile operating system provides a user experience for the mobile computing device that suits the mobile environment. The desktop operating system provides a full desktop user experience when the mobile computing device is docked to a second user environment. Cross-environment notification and event handling allows the user to be notified of and respond to events occurring within the mobile operating system through the user environment associated with the desktop operating system. Events that may trigger cross-environment notification may be local events and/or remote events. The mobile computing device may be a smartphone running the Android mobile operating system and a full desktop Linux distribution on a modified Android kernel.
US09071618B1 Providing multiple access levels to a single user account using different login credentials
Methods, systems, apparatuses, and computer-readable media for providing multiple access levels to a single user account using different login credentials are presented. In one or more embodiments, a computing platform may receive an access request to access a user account for which at least two valid passwords have been defined. The request may include one or more login credentials. Based on determining that a password included in the one or more login credentials matches a valid password for the user account, the computing platform may determine an access level to be provided. Subsequently, the computing platform may provide access to the user account based on the determined access level. For example, when a first password is received from a third-party system, read-only access may be provided to the user account, whereas when a second password is received from a user device, full access may be provided to the user account.
US09071616B2 Securing partner-enabled web service
The claimed subject matter provides a method for securing a partner-enabled web service. The method includes receiving a request to access the partner-enabled web service. The request is received from a browser client for a partner application. The browser client is associated with a user. Additionally, the method includes determining that the user is authorized to access the partner application. The method further includes generating a token that associates the user with the partner application. Also, the method includes sending the token to the browser client.
US09071615B2 Shared space for communicating information
Embodiments provide a shared space for communicating information. In an embodiment a number of users associated with a computing environment can use a shared space to communicate information with one another. Each computing device of the computing environment can include a shared space application. The shared space application includes a number of interactive tools that can be used to persist various communications between associated computing devices of a computing environment.
US09071612B2 Service providing system
In a system with a terminal sending a request, when a load distributing unit distributes the request to many service providing apparatuses, the load distributing unit becomes a bottleneck of performance and/or a single point of failure. When the load is distributed to the service providing apparatuses without using the load distributing unit, a particular function is required on the terminal side to appropriately select one of apparatuses. A name resolution unit including an address group management table with IP addresses to select, for a request from a terminal, an address from the table to return the address to the terminal and a plurality of service providing apparatuses to which at least zero IP address selected from the table is allocated without duplication are arranged such that each service providing apparatus is allocated with IP addresses according to processing performance thereof, thereby conducting appropriate load distribution.
US09071608B2 Method and apparatus for load balancing in network based telephony application
Techniques are disclosed for load balancing in networks such as those networks handling telephony applications. By way of example, such techniques direct requests associated with calls to servers in a system comprised of a network routing calls between a plurality of callers and at least one receiver wherein a load balancer sends requests associated with calls to a plurality of servers as follows. A request associated with a call, a caller, or a receiver is received, depending on the particular load balancing technique. A server is selected to receive the request. A subsequent request is received. A determination is made whether or not the subsequent request is associated with the call, the caller, or the receiver, depending on the particular load balancing technique. The subsequent request is sent to the server based on determining that the subsequent request is associated with the call, the caller, or the receiver, again depending on the particular load balancing technique.
US09071603B1 Distributed display functionality on multiple mobile devices
Techniques are described for providing functionality to users of mobile devices, including coordinating the inter-connection of multiple mobile devices, such as for multiple mobile devices of multiple distinct types, and optionally using multiple different types of inter-connections. In some situations, the described techniques include performing matchmaking operations to determine whether and/or how a group of multiple inter-connected mobile devices will provide functionality to each other and/or will access functionality from one or more remote server computing systems, including to select a host mobile device for the group. In addition, in some situations, the described techniques include providing a distributed display canvas functionality, by using the displays of multiple inter-connected mobile devices of a group to display some or all of the graphical user interface (“GUI”) of an application, such as by displaying on each mobile device a distinct portion of the GUI specific to that mobile device.
US09071602B2 Biometric authentication system and biometric authentication method
A biometric authentication method is executed by a biometric authentication system comprising a server device to store biometric data of a plurality of users in a registering unit; and a client device to retain the biometric data sampled from the user and authenticated by the server device in a retaining unit together with user information. The method comprises verifying the biometric data sampled from the user with the cache biometric data retained in the retaining unit when in authentication; acquiring synthesized information of the cache biometric data of which the verification gets successful and the biometric data sampled from the user; and authenticating the synthesized information by use of the biometric data specified by the user information of the biometric data of which the verification gets successful in plural sets of biometric data registered in the registering unit.
US09071596B2 Securely establishing a communication channel between a switch and a network-based application using a unique identifier for the network-based application
A network-based application can establish a secure network connection to a switch. A unique identifier (UID) is generated for the network-based application, and a secure authentication request is generated from the network-based application. The UID for the network-based application is embedded in the secure authentication request. The secure authentication request is communicated to the switch. A response to the secure authentication request is received from the switch. One or more operations are performed that utilize the UID to establish a secure communication channel between the network-based application and the switch.
US09071591B2 Authentication method for network connection and network device and network authentication system using the same method
An authentication method for a network connection for a network device is provided. An embedded system is installed in the network connection, and the network device is free from a web browser. First, the network device connects to an authentication server, and an internet access request is sent to the authentication server. An authentication page is retrieved from the authentication server. User authentication data is obtained by an input unit of the network device, and then the user authentication data is filled in corresponding fields of the authentication page. The authentication page is transferred to the authentication server. After, when authentication of the authentication page is successful, the network device connects to the Internet via the authentication server.
US09071585B2 Copy offload for disparate offload providers
Aspects of the subject matter described herein relate to offload technology. In aspects, a source offload provider may transfer bulk data to a destination offload provider even if the offload providers are different and independent from each other and have no prior knowledge of each other. In preparation for transferring bulk data, trust may be extended to the offload providers. After authentication, the offload providers may transfer all or a portion of the bulk data over a secure channel without the data traversing the initiator of the transfer.
US09071582B2 Communication apparatus, reception control method, and transmission control method
Lookaside-type communication apparatus and reception and transmission control methods make high-rate communication of a packet including encrypted data. Receive data including encrypted data are supplied to an encryption data processing part, and supplied to a security part through a second bus when the packet is received. The encrypted data becomes plain-text data in the security part, and supplied to the control part through the system bus. Transmit data including a data body including a plain-text data to be encrypted are supplied to the security part when the packet is transmitted. The plain-text data become the encrypted data in the security part, and the transmit data having the data body including the encrypted data are supplied to the encryption data processing part through the second bus. The transmit data are transmitted in the form of the packet in the transmission and reception part.
US09071581B2 Secure storage with SCSI storage devices
A security command protocol provides secure authenticated access to an auxiliary security memory within a SCSI storage device. The auxiliary security memory acts as an authenticated separate secure storage area that stores sensitive data separately from the user data area of the SCSI storage device. The security command protocol is used to access the auxiliary security memory. The security command protocol allows a trusted execution environment to transport sensitive data to and from storage in the auxiliary security memory. The regular execution environment does not have access to the security command protocol or the auxiliary security memory. The security command protocol and auxiliary security memory eliminate the need for additional secure storage components in devices that provide the security features of firmware TPM.
US09071579B1 System for sender/receiver to send or receive mood related, time sensitive or secretive content/messages
A system and method for submission and receipt of communications and information including sending, receiving, and responding to mood related, time-sensitive and/or secretive messages or information, through a one-step submission to communication networks and/or social media platforms, through a anonymous submit and targeted authorized receipt process, having the generating, assigning, and utilizing of unique identifiers, and corresponding actionable and searchable administrative report generating process.
US09071578B2 Maintaining network address translations
A method, apparatus, and computer-readable media are presented that provide a configuration that sets up and maintains communication connections through the use of Network Address Translation. The configuration includes communicating, by a device, packets from and/or to another device, in which the communication involves a network address translation, and maintaining the network address translation by transmitting, by the device, packets using the network address translation frequently enough to prevent any intermediate device from deleting a mapping for the network address translation from a cache of the intermediate device.
US09071561B2 Document object model API for MIME
The claimed subject matter provides systems and/or methods that facilitate interpreting Multipurpose Internet Mail Extensions (MIME) data. An interface can obtain MIME data. For instance, a stream of MIME data can be obtained, MIME data can be loaded from a static file, etc. Moreover, any disparate type of RFC 822 data can additionally or alternatively be received by the interface. Also, a MIME reader can analyze the MIME data (and/or normalized RFC 822 data) to interpret encoded structural information and generate at least one primitive based on the encoded structural information. Further, a hierarchical model can be built utilizing the at least one primitive.
US09071553B2 Migrating a web hosting service between a dedicated environment for each client and a shared environment for multiple clients
An automated tool for migrating a website hosting service from a first website hosting architecture to a second website hosting architecture, the first architecture comprising a server architecture that serves the services necessary for a client's web sites from a dedicated machine and the second web hosting architecture comprising a server architecture that serves a plurality of unrelated clients from a plurality of shared servers.
US09071549B2 Communication device using plurality of communication paths
There are included an opposite-side transmitter unit for transmitting the same messages to plural communication paths, respectively; and a host-side receiver unit for receiving the messages flowing through the plural communication paths, respectively; wherein, the receiver unit, compares the plural received messages to perform verification using error-detection code on any one of the messages when they are identical, or on all of the messages when there is a mismatch; and when detected error of message due to error inclusion or reception failure, discards all of the messages received at that time, and calculates an accumulated number of error detections for each of the communication paths through which the messages has been transmitted, so as to stop receiving the control-related message, when the number of error detections has reached a given number, from the communication path where the number of error detections has reached the given number.
US09071547B2 Distributed constraint-based optimized routing of interactions
A system for optimized and distributed routing of interactions, comprising a plurality of media servers operating adapted to handle interactions of one or more specific media types, a statistics server, a routing database, and a routing server. Upon receiving or initiating an interaction of a specific media type, a first media server from the media servers sends a route request message comprising at least an interaction identifier and a collection of interaction-specific data to the routing server, the statistics server receives event notifications from the media servers and computes one or more statistics, and the routing server executes, using statistical data from the statistics server and data from the routing database, a routing script comprising a constraint-based optimization process in response to the route request message and sends a response to the first media server directing it to route the interaction to a specific target resource.
US09071544B2 Method and system for managing network elements
A management request complying with a first protocol is generated by a management application executed by a computing system coupled to a network element. A processor executable agent encapsulates a management request using a second protocol. The encapsulated management request is transmitted using a third protocol via a link used by the computing system to send input/output requests for reading and writing data to a storage device. The management request is de-encapsulated to provide the management request complying with the first protocol to a management module of the network element. The management module of the network element prepares a response to the management request complying with the first protocol. A processor executable service at the network element encapsulates the response using the second protocol. The encapsulated response is transmitted to the computing system using the third protocol. The response complying with the first protocol is extracted from the encapsulated response. The response complying with the first protocol is provided to the management application.
US09071541B2 Path weighted equal-cost multipath
Routers balance network traffic among multiple paths through a network according to an amount of bandwidth that can be sent on an outgoing interface computed for each of the paths. For example, a router receives a link bandwidth for network links that are positioned between the first router and a second router of the network, and selects a plurality of forwarding paths from the first router to the second router. Upon determining that one of the network links is shared by multiple of the plurality of forwarding paths, the router computes a path bandwidth for each of the plurality of forwarding paths so as to account for splitting of link bandwidth of the shared network link across the multiple forwarding paths that share the network link. The router assigns packet flows to the forwarding paths based at least on the computed amount of bandwidth for each of the forwarding paths.
US09071532B2 Method for discovery and load balancing of path computation elements based on transport plane link metrics
A method and system for path computation in a communications network having multiple domains are disclosed. According to one aspect, a method of path computation across multiple domains includes identifying a plurality of border nodes at borders of a plurality of domains, each domain having at least one border node. The method includes providing a path computation element at each of the plurality of border nodes of the domains of the network. The locations of the path computation elements are known to be at the border nodes prior to determining a path in response to a path computation request.
US09071531B2 Multi-class data transport
Methods and apparatus for controlling the forwarding of a flow (12) of data units across a network from a sender node (11) to a receiver node (19) via at least one intermediate node (15), the data units each having one of a plurality of different types of class indication associated therewith, each type of class indication providing, to an intermediate node currently processing the data unit with which the class indication is associated, an indication denoting a particular class of treatment, selected from a plurality of different classes of treatment, according to which the data unit is to be processed by that intermediate node, such that different proportions of the data units of the flow are forwarded as different sub-flows each comprising data units having class indications of different types thereby providing indications denoting different classes of treatment.
US09071529B2 Method and apparatus for accelerating forwarding in software-defined networks
A network element acting as a forwarding plane within a software-defined network to reduce negative effects of slow-path packet processing is described. The network element, upon receiving a first packet, determines whether it matches any flow entry within a set of flow tables. When the first packet does not match any flow entry of the set of flow tables, the network element performs a miss procedure including inserting at least a portion of the first packet into a packet miss table of the network element, which is accessed by a controller. The controller may access the packet miss table using a pull mechanism. The miss procedure may also include accessing a configurable default rule table of the network element, which includes rules enabling limited forwarding for those packets that do not match any entry of the set of flow tables.
US09071525B2 Data receiving apparatus, data receiving method, and program storage medium
An apparatus includes: a receiver which receives a data sequence; a specifying unit which specifies a temporary buffer area in a data storage and specifies a destination buffer area in the data storage; a first identifying unit which identifies a destination number range depending on a size of the specified destination buffer area so that the range follows a range that was last identified; a writing unit which writes data that falls within one of the ranges in an area in the destination buffer area that corresponds to the sequence number of that data, and writes data that does not fall within it in the temporary buffer area; a copying unit which reads out data falling within the identified range from the temporary buffer area and writes the read-out data in an area in the destination buffer area that is associated with the sequence number of that data.
US09071521B2 System and method for throughput enhancement
A method in a first node of a network comprises computing a packet duration when using a first unicast profile with a first type preamble and a packet duration when using a second unicast profile with a second type preamble; comparing the computed packet durations so as to determine one from the first and second unicast profiles which yields a shorter duration; and sending the packet to a second node by using the determined unicast profile.
US09071519B1 System, method, and computer program for rating network transmissions based on user requested data
A system, method, and computer program product are provided for rating network transmissions based on user requested data. In use, a transmission of data over a network is identified, where the data includes user requested data and additional data. Additionally, a size of the user requested data is determined. Furthermore, the transmission of the user requested data is rated based on the size of the user requested data. The transmission of additional data may be charged to third parties such as advertisers.
US09071512B2 Methods, systems, and computer readable media for distributing diameter network management information
Methods, systems, and computer readable media for distributing Diameter network management information are disclosed. According to one method, a first Diameter node obtains Diameter network management subscription information. The first Diameter node obtains Diameter network management information. The first Diameter node determines, using the Diameter network management subscription information, whether at least one second Diameter node is subscribed to receive the obtained Diameter network management information. In response to determining that the at least one second Diameter node is subscribed to receive the obtained network management information, the first Diameter node sends the obtained Diameter network management information to the at least one second Diameter node.
US09071511B2 Method and system for traffic flow and link management using domain notifications
A system allowing for path monitoring and notification in a system of switching elements and processing elements is provided. An exemplary technique uses a monitoring and notification module configured to generate and output monitoring messages across multiple paths defined by the plurality of switching elements and the plurality of processing elements, detect a fault in the system based on the monitoring messages, and generate and output multiple alert messages across the multiple paths to initiate recovery from the fault As such, a single element (or group of elements) does not become isolated from the rest of the elements in the system.
US09071508B2 Distributed fabric management protocol
A distributed fabric system comprises a plurality of independent network elements interconnected by inter-switch links and assigned to a same group. Each network element includes a switching chip, a processor, and memory storing program code that is executed by the processor. The program code of each network element includes a device configuration (DC) stacking module and a switch discovery protocol (SDP) module. The SDP module of each network element, when executed, discovers each other network element in the group and elects one of the network elements as a master network element. The SDP module of the master network element, when executed, sends messages to the DC-stacking module of the master network element. Each sent message identifies one of the network elements in the group. The DC stacking module of the master network element, when executed, maintains a record of all network elements that are currently members in the group.
US09071505B2 Method and system for dynamically allocating services for subscribers data traffic
Access services are dynamically allocated for processing received data traffic by creating routing information for data traffic associated with a particular subscriber, subscriber equipment and/or network address information. The routing information identifies services that the data traffic can be subjected to and the order in which the services are provided. When an attached request is received, appropriate services for the requesting subscriber are retrieved from a database based on particular identifying information which may include the identification of the subscriber, subscriber equipment, network address or other information. The services are organized in a routing path and the allocated network address and the routing path are transferred to a smart router. Data traffic, associated with the allocated network address is then routed through servers to provide the identified services.
US09071502B2 Service provider optimization of content management
A system and method for monitoring the performance associated with fulfilling resource requests and determining optimizations for improving such performance are provided. A processing device obtains and processes performance metric information associated with processing a request for an original resource and any embedded resource. The processing device uses the processed performance metric information to determine a set of service providers for alternatively hosting, processing, and/or transmitting at least a portion of the original resource and/or any embedded resources. In some embodiments, in making such a determination, the processing device assesses performance metric information collected and associated with subsequent resource requests for the original resource and any embedded resources using each of a variety of alternative set(s) of service providers. Aspects of systems and methods for generating recommendations associated with monitoring the operation and performance of service providers with respect to specific resource requests are also provided.
US09071501B2 Method for group change issues in MTC
A gateway (GW) is optimized for security management, when a group member of MTC device changes group. The gateway performs access control to determine if MTC device can move to the target group. When the change is successfully completed, the gateway allocates group key of the target group to MTC devices.
US09071493B2 Dual frequency tracking loop for OFDMA systems
Methods and apparatus for correcting frequency errors between a carrier frequency of a signal received by a wireless device and a reference frequency local to the device. For certain aspects, such a method generally includes receiving a signal in a receiver having an LO producing a reference frequency, a radio frequency (RF) phase-locked loop (PLL), and a digital rotator, estimating a frequency difference between a carrier frequency of the received signal and the LO reference frequency, and applying the estimated frequency difference to the RF PLL and the digital rotator.
US09071491B2 Method for transmitting control information and apparatus for the same
Methods and devices for transmitting or receiving data in a wireless local area network are provided. The method in one embodiment includes transmitting, by a transmitter, a first long training field (LTF) to a receiver; transmitting, by the transmitter, a very high throughput (VHT)-SIG-A field to the receiver; transmitting, by the transmitter, a second LTF for multiple input multiple output (MIMO) channel estimation to the receiver; transmitting, by the transmitter, a VHT-SIG-B field to the receiver; and transmitting, by the transmitter, a data field to the receiver, wherein the first LTF, the VHT-SIG-A field, the second LTF, the VHT-SIG-B field and the data field are sequentially transmitted, and wherein the second LTF and the data field are mapped to at least one spatial stream based on a mapping matrix but the first LTF and the VHT SIG-A field are not mapped to the at least one spatial stream.
US09071486B2 Efficient noise canceling circuit for receivers
The disclosed embodiments provide a system that tracks and compensates for input signal noise at a receiver of a data communication channel. In particular embodiments, the receiver of the data communication link receives an input signal which comprises two signal levels. Next, for each of the two signal levels, the system generates an error signal by comparing the input signal value of the signal level with an expected signal value for the signal level. The system then updates a threshold signal value based on at least one of the two error signals associated with the two signal levels. Finally, the system compensates for input signal noise in the received input signal using the updated threshold signal value.
US09071485B2 Remote interaction with electronic devices
An approach for providing remote interaction (e.g., technical support) with electronic devices (e.g., mobile devices such as mobile phones, tablets, laptops, etc.) is provided. Specifically, remote control of a first electronic device may be obtained by an administrator device or the like. The first electronic device may then be remotely operated by the administrator device to view, indicate, and/or perform features/functions of a second electronic device needing technical support.
US09071481B2 Offset and decision feedback equalization calibration
A decision feedback equalizer is calibrated to compensate for estimated inter-symbol interference in a received signal and offsets of sampling devices. The decision feedback equalizer is configured so that an output signal of a sampling circuit represents a comparison between an input signal and a reference of the sampling circuit under calibration. An input signal is received over a communication channel that includes a predetermined pattern. The predetermined pattern is compared to the output signal to determine an adjusted reference for configuring the sampling circuit that accounts for both offset and inter-symbol interference effects.
US09071471B2 Low-complexity estimation of QAM symbols and constellations
Disclosed are methods and structures for soft symbol and variance estimation for QAM constellations including a big-flipping framework and efficient methods for soft symbol estimation and variance estimation for QAM. Disclosed are efficient Gray mapping which provides a much lower complexity, i.e., log N for N-QAM for both squared and non-squared QAM constellations. Also disclosed is an approximation method that avoids multiplications completely while exhibiting only a slight performance degradation. Finally, a low complexity method for variance estimations, particularly second moment estimations for both squared and non-squared QAM constellations with Gray mapping are disclosed. Advantageously—using the disclosed methods—the complexity of the second moment estimation is reduced to O((log N)^2) for an N-QAM symbol for both squared and non-squared QAM.
US09071469B2 Signal identification device
A signal identification device identifies the carrier mode applied to a received signal that has control information embedded therein by extracting the control information from the received signal, generating multiple reference signals, each of the reference signals corresponding to one of multiple formulations of control information for one or more carrier transmission modes, performing a correlation operation on the control information against each of the reference signals, and determining the carrier mode based on results of the correlation operations.
US09071464B2 Message notification in instant messaging
Methods, apparatus and systems for message notification in instant messaging are provided in which a message in an instant messaging session is received at a client application. The content of the received message is compared with a set of entries and the content is matched with an entry. Notification of a new message is displayed in a form representing the matched entry. Each entry may be associated with a category and the step of displaying notification represents the category of the matched entry. The entries may be any one of or a combination of words, phrases and/or symbols which commonly appear in messages such that a user can determine the category of a message content without focusing on the message.
US09071463B2 Systems and methods for sorting alert and offer messages on a mobile device
A method and system are presented for sorting alert and offer messages on a mobile device. One embodiment of the invention is directed to a method including receiving alert messages at a mobile device where each alert message contains transaction data associated with a transaction conducted with a merchant. Upon receiving the alert messages, the mobile device receives alert message sorting criteria from a user associated with the mobile device, sorts the alert messages according to the received offer sorting criteria, and displays the sorted alert messages.
US09071458B2 Dual adjacency between edge devices at a network site
Devices, methods and instructions encoded on computer readable medium for implementation of a dual-adjacency between edge devices of a network site. A first edge device comprises one or more local interfaces configured for communication, via a local network, with one or more network devices co-located in a first network site. The first edge device also comprises one or more overlay interfaces configured for communication, via a core network, with one or more network devices located in one or more other network sites connected to the core network. The first edge device comprises a processor configured to establish, via at least one of the local interfaces, a site communication channel with a second edge device co-located in the first network site. The processor is further configured to establish an overlay communication channel, via at least one of the overlay interfaces, with the second edge device.
US09071454B1 Interfacing internet protocol-based wireless devices with network box and cradle
A method and apparatus in which multiple Internet Protocol (IP) based wireless data transmissions are simultaneously provided between a wireless device and a server, including providing multiple antennas, multiple T/R units, multiple processors and multiple I/O ports on the wireless device. The method includes receiving multiple IP data packets on the I/O ports at substantially the same time, and sending multiple data packets from the wireless device to the server, whereby the transmission rate between the wireless device and the server is increased.
US09071452B2 High-speed communication system and high-speed communication method
A high-speed communication system according to the present invention includes: a plurality of nodes disposed on a communication path; and a plurality of communication connections established between the plurality of nodes. The plurality of nodes exchange a plurality of pieces of performance model information between the nodes, the plurality of pieces of performance model information representing communication performances achievable by each of the plurality of communication connections. Each of the plurality of nodes executes communication control based on any one of the plurality of pieces of performance model information.
US09071449B2 Charging and policy for services at the edge of a mobile data network
Mobile network services are performed at the edge of a mobile data network in a way that is transparent to most of the existing equipment in the mobile data network. The mobile data network includes a radio access network and a core network. A first service mechanism in the radio access network breaks out data coming from a basestation, and performs one or more mobile network services at the edge of the mobile data network based on the broken out data. A second service mechanism in the core network receives data monitored during attach and Packet Data Protocol (PDP) context activation, and establishes sessions with components in the mobile data network that support charging and policy control for sessions broken out by the first service mechanism.
US09071447B2 Security system and method
A method for generating data encryption coding with variable clocking according to one embodiment includes storing a secret code in a first register; storing a locally-generated random number in a second register; storing a second random number generated at a remote device in the second register; extracting bits from the first register; extracting bits from the second register; setting a state of a clock generator in response to one or more bits from each register, the clock generator generating a clock signal controlling operation of the first register, the clock signal varying depending on the state of the clock generator.
US09071446B2 Tamper-protected hardware and method for using same
One of the various aspects of the invention is related to suggesting various techniques for improving the tamper-resistibility of hardware. The tamper-resistant hardware may be advantageously used in a transaction system that provides the off-line transaction protocol. Amongst these techniques for improving the tamper-resistibility are trusted bootstrapping by means of secure software entity modules, a new use of hardware providing a Physical Unclonable Function, and the use of a configuration fingerprint of a FPGA used within the tamper-resistant hardware.
US09071441B2 Identification and authorization of communication devices
A method implemented by a wearable wireless communication device (“WWCD”) includes detecting a connection between the WWCD and an accessory device. The WWCD accesses a memory location in the accessory device, the memory location being designated for storing brand data indicating a brand identity associated with the accessory device. The WWCD determines a brand status of the accessory device based on data, if any, accessed from the memory location in the accessory device. The WWCD also determines one or more interactions permitted between the WWCD and the accessory device based at least in part on the brand status of the accessory device.
US09071435B2 System and method for tuning transmission parameters in multi-user multiple-input-multiple-output systems with aged and noisy channel estimation
System and method for tuning transmission parameters based on estimated ratio between a signal to an estimated interference plus noise (SINR) of a user, in a multiple-user multiple-input multiple-output (MU-MIMO) communication system, the method including obtaining channel state information (CSI) related to a channel from an access point (AP) to users that participate in a next MU-MIMO transmission, wherein the AP, and the users pertain to the MU-MIMO communication system, obtaining error coefficients related to errors related to channel-ageing and to estimation noise of the CSI, and calculating the estimated SINR, wherein the estimated interference is related to power of the other users and to the estimated channel magnitude the user u, and to the error coefficients, wherein the estimated channel magnitude is derived from the CSI.
US09071430B2 RF transceiver with distributed filtering topology
This disclosure includes embodiments of a radio frequency (RF) transceiver having a distributed duplex filtering topology. The RF transceiver includes a power amplifier and a tunable RF duplexer. The tunable RF duplexer is configured to input an RF transmission input signal from the power amplifier, generate an RF transmission output signal that operates within an RF transmission band in response to the RF transmission input signal from the power amplifier, and simultaneously output the RF transmission output signal to an antenna and input an RF receive input signal that operates within an RF receive band from the antenna. The power amplifier includes a plurality of RF amplifier stages coupled in cascode and an RF filter coupled between a first one of the RF amplifier stages and a second one of the RF amplifier stages. Accordingly, the RF filter is configured to provide tuning within the RF receive band.
US09071423B2 Identification of a compromised content player
A system and method for identifying the player that leaked content encryption keys by loading a set of player keys into individual content players and determining the number of encryptions and the number of encryption keys to use in multiple encrypting critical content. The method produces copies of critical data content packets, each copy of which is separately encrypted using any one of a set of encryption keys that are related to one another through a mathematical algorithm. The related set of encryption keys and data describing key relationship and content player identity are transmitted to a previously determined license management agency. The transmitted encrypted content is written to a receiving device or file, or streamed to an individual player for non-synchronous playback. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
US09071420B2 Information processing apparatus, tampering detection apparatus, information processing method, tampering detection method, and computer product
An information processing apparatus includes a processor configured to identify a data length that is longer than a data length of plain text data and that is a multiple of a predetermined block length; calculate a data length difference of the data length of the plain text and the data length; generate a first code that indicates the calculated data length difference; generate a second code that is calculated from the plain text data and is of a data length that is within a remaining data length acquired by subtracting a data length of the generated first code from the data length difference; create padding that includes the generated second code, has the first code at an end, and is of a length equivalent to the data length difference; concatenate the created padding to an end of the plain text data to generate concatenated data; and output the concatenated data.
US09071418B2 Synchronous media rendering of demuxed media components across multiple devices
Some media applications use media containers, media files or media streams that contain multiple media components in it and require that each component of media be sent to different destinations tailored for rendering a particular type of media component. Furthermore there may be multiple destinations for a particular media component type. For example an application might use a media file with one video and one stereo audio stream and want to send this to two video rendering devices and four stereo audio devices. This invention describes a system for rendering these media components synchronously on multiple devices by demultiplexing the media into media sub components at one destination, sending the components to all destinations and synchronizing the rendering at each device.
US09071417B2 Method and system for packet synchronization
A method and system for packet synchronization may comprise receiving a plurality of bits from an incoming sample of data. The received plurality of bits may be sliced at a first sampling rate. A logic level of at least one of the received plurality of bits may be determined based on the slicing of the received plurality of bits. The received plurality of bits may be synchronized with a channel access code based on determining the logic level of at least one of the received plurality of bits. The channel access code may be sampled at a higher frequency, to increase the probability of detecting whether the incoming bit is LOGIC 1 or LOGIC 0.
US09071416B2 Galois/counter mode encryption in a wireless network
A system including a nonce module and an encryption module. The nonce module is configured to generate a nonce for each packet of a plurality of packets to be encrypted using a first temporal key. Each nonce includes a packet number that is different than packet numbers associated with other nonces generated by the nonce module for the plurality of packets. The packet number is greater than N bits in length, where N is an integer greater than 40. The encryption module is configured to encrypt, without reusing a value of the packet number, more than 2(N−1) packets of the plurality of packets using (i) the first temporal key and (ii) the nonces corresponding to the more than 2(N−1) packets using Galois/Counter Mode encryption.
US09071415B2 Semiconductor device
A frequency tracking loop receives a result from a phase detector that detects an advance and a retard of a phase between input data and an extracted clock signal, and conducts a control to reduce a frequency deviation between the input data and the extracted clock signal. A phase interpolator adjusts a phase of the clock signal subjected to spread-spectrum frequency modulation on the basis result of the frequency deviation in the frequency tracking loop, and outputs the extracted clock signal. In the frequency tracking loop, the frequency deviation between the data signal and the clock signal is corrected to offset a variation of the frequency of the clock signal, on the basis of the frequency modulation information related to the clock signal subjected to the spread-spectrum frequency modulation which is input to the phase interpolator. The frequency of the clock signal seemingly follows the frequency of the data signal.
US09071414B2 Method and apparatus for distinguishing broadcast messages in wireless signals
Methods and apparatus for processing and generating broadcast messages determined by a subband and OFDM symbols of frames in which signals are received. Overhead messages indicating resources used by broadcast messages in a wireless communication system are generated. Signals are received over a wireless system and broadcast messages are determined from the signals as designated by a subband and OFDM symbols of frames of an ultraframe in which signals are received.
US09071411B2 Control channel element detection method using CQI in a wireless communication system
A control channel element detection method and apparatus is provided for detecting the Control Channel Elements (CCEs) carrying control information for a mobile station using a Channel Quality Indicator (CQI). A CCE detection method includes searching a current subframe for CCEs, and locating the CCEs carrying control information for the mobile station by decoding the current subframe with variable code rates. Searching for the CCEs includes searching the current subframe for the CCEs carrying the control information for the mobile station while changing a size type of the CCEs according to a result of a comparison between a CQI of the current subframe and a CQI of a previous subframe.
US09071408B2 Communication system
A system effective to communicate a message between two devices. A first device may include a plaintext to monoid element module effective to receive a plaintext message and apply a first function to the plaintext message to produce a first monoid element. A monoid element evaluator module may be effective to receive and insert submonoid generators into a monoid expression to produce a second monoid element in response. An encryption device module may be effective to apply a second function to the first monoid element, the second monoid element, the monoid expression, and a third monoid element to produce an encrypted plaintext message. Decryption may be performed on the encrypted plaintext message knowing the private key which includes the first function, the second function, the third monoid element and the submonoid generators list.
US09071404B2 Base station apparatus and communication control method
To reduce interference that a user terminal connecting to a base station apparatus forming a large-scale cell undergoes from a base station apparatus forming a small-scale cell in a radio communication system in which the small-scale cell is provided in the large-scale cell, a femto-base station forming a femto-cell provided in a macro-cell receives cell identification information of a macro-base station, determines cell identification information of the femto-base station based on the received cell identification information of the macro-base station so as to reduce interference to a control format indicator channel assigned to radio resources by the macro-base station, and controls assignment of control channels to radio resources based on the determined cell identification information of the femto-base station.
US09071403B2 Multiplexing schemes for OFDMA
Methods and systems are provided for allocating resources including VoIP (voice over Internet Protocol) and Non-VoIP resources. In some embodiments, multiplexing schemes are provided for use with OFDMA (orthogonal frequency division multiplexing access) systems, for example for use in transmitting VoIP traffic. In some embodiments, various HARQ (Hybrid Automatic request) techniques are provided for use with OFDMA systems. In various embodiments, there are provided methods and systems for dealing with issues such as Handling non-full rate vocoder frames, VoIP packet jitter handling, VoIP capacity increasing schemes, persistent and non-persistent assignment of resources in OFDMA systems.
US09071400B2 Method of transmitting scheduling information in TDD system
A method of transmitting scheduling information in time-division-duplex (TDD) system is provided. The method comprises configuring a radio frame, the radio frame comprising at least one downlink subframe and at least one uplink subframe, wherein a downlink subframe is reserved for downlink transmission and an uplink subframe is reserved for uplink transmission, and transmitting scheduling information on a downlink control channel in a downlink subframe, the scheduling information comprising an uplink indicator and uplink resource assignment, the uplink indicator indicating which at least one uplink subframe the uplink resource assignment is valid for. Data can be efficiently transmitted by using an uplink indicator which indicates a specific location of a subframe.
US09071396B2 Inserting virtual carrier in conventional OFDM host carrier in communications system
A network element for use in a mobile communications system and a method of using a network element for communicating data to/from mobile communications devices in a mobile communications system. The network element can provide a wireless access interface for communicating data to/from the mobile communications devices, the wireless access interface including: on a downlink a host carrier, the host carrier providing plural resource elements across a first frequency range; transmit data for a first group of mobile communications devices, wherein the data is distributed within the plural resource elements across the first frequency range; a virtual carrier via the wireless access interface, the virtual carrier providing one or more resource elements within a second frequency range which is within and smaller than the first frequency range; and transmit data for a second group of mobile communications devices via the virtual carrier.
US09071395B2 Method and apparatus for changing frequency band used for communication between devices supporting multiple frequency bands
A method and apparatus for changing a frequency band used for communication between first and second devices supporting multiple frequency bands. The method includes transmitting a frequency band change request frame including information regarding a communication capability of the first device and a frequency band change request for requesting to change a frequency band currently being used for communication between the first and second devices, to the second device; receiving a frequency band change response frame corresponding to the frequency band change request frame, from the second device; and selectively changing the frequency band currently being used to another frequency band based on the received frequency band change response frame.
US09071392B2 Device for generating ranging signal of wireless communication system and method of generating ranging signal of wireless terminal
There are provided a method of generating a ranging signal of a wireless terminal and a device for generating a ranging signal of a wireless communication system that can generate the ranging signal using one IFFT engine independently from a mode of the ranging signal transmitted in uplink in a wireless communication system in which a frequency interval of subcarriers used to generate an initial ranging signal and a frequency interval of subcarriers using periodic ranging are different. In this way, it is possible to decrease complexity of hardware and design of the wireless terminal, and decrease power consumption of the wireless terminal through hardware simplification.
US09071388B2 Switchable diplexer with physical layout to provide improved isolation
A switchable diplexer includes a plurality of bandpass filters having passbands for the frequency bands in which communication across a communication channel is desired. The bandpass filters can be arranged in groups of bandpass filters located adjacent to one another physically. Further, a group of bandpass filters can include a plurality of bandpass filters having a stop band in a common frequency range of interest. A plurality of switches can be provided to switch the desired bandpass filter into the circuit to allow communication on its corresponding band. The switches can therefore be electrically coupled to the passband filters and configured to select one of the plurality of bandpass filters for signal communication on the communication channel.
US09071387B1 Threat response signal inhibiting apparatus for radio frequency controlled devices and corresponding methods
An apparatus (100) includes a canine harness (101) with a radio frequency inhibitor (400). A leash (1002) can serve as a control device (102). The leash can selectively mechanically couple to the canine harness and electrically couple an actuator (114) to the radio frequency inhibitor. When the actuator is actuated, the radio frequency inhibitor is to emit one or more radio frequency inhibition signals (405), which can include the emission of all programmed signals simultaneously. Radio frequency inhibitors can also be integrated into clothing or armor (1802), as well as equipment (1901). The radio frequency inhibitor can interrupt, suppress, or halt electronic detonation communications to an explosive device.
US09071384B2 Network design apparatus, network design method, and storage medium storing network design program
A network design apparatus includes a storage unit configured to store network topology information indicating a connection relationship between a plurality of nodes in a network in which the plurality of nodes are connected to each other by a link and demand information indicating a demand including a starting point node, an ending point node, a route, and the number of the demands, and a control unit configured, based on the network topology information and the demand information, to take out a certain number of nodes from the sorted nodes having the higher rank and generate combination candidates of transmission paths in which the starting point node, the ending point node, and the certain number of nodes are set as terminal points with regard to the respective demands, and determine a combination of the transmission paths that accommodate the demand from the combination candidates of the transmission paths.
US09071377B2 Upgraded bandwidth map for ten gigabit passive optical network
An apparatus comprising an optical line terminal (OLT) configured to transmit a bandwidth map (BWmap) for a plurality of burst signals to be transmitted by a plurality of optical network units (ONUs), wherein the BWmap comprises a plurality of allocations, and wherein each allocation comprises a start time for the allocation, a grant size for the allocation, and a header error correction (HEC) for the allocation.
US09071376B2 Bandwidth adjusting method and communication node
A bandwidth adjusting method and a communication node are provided. The adjusting method includes: sending, by an upstream ingress unit, a group of multi-channel parallel basic switch cells in which adjustment signaling is carried to all downstream branch egress units; sending normal signaling when determining that adjustment response statuses returned by all the downstream branch egress units are reception acknowledgment; after receiving the normal signaling by the downstream branch egress unit, adding or removing the basic switch cell into or from a next group of multi-channel parallel basic switch cells according to the adjustment signaling; and adjusting a time slot of an HO ODU sent by the downstream branch egress unit to a downstream node, and instructing the downstream node to adjust the time slot of the HO ODU. Through the method and the communication node, lossless bandwidth adjustment in a point-to-multipoint OTN asymmetric bandwidth carrier system is implemented.
US09071373B2 Multiplexed serial media independent interface
Systems, methods, and devices are provided for a multiplexed serial media independent interface (110-1, 110-N, 210). One system for handling data includes a physical layer (PHY) circuit (102-1, 102-N, 202-1, 202-N) operating at a first rate including a number of ports (104-1, 104-P), a media access control (MAC) circuit (108, 208-1, 208-N) operating at the first rate including a number of ports, and a multiplexed serial media independent interface (110-1, 110-N, 210) between the MAC circuit (108, 208-1, 208-N) and the PHY circuit (102-1, 102-N, 202-1, 202-N) operating at a second rate, which is greater than the first rate. The interface (110-1, 110-N, 210) includes a number of conductors and is configured to communicate data between the MAC circuit (108, 208-1, 208-N) and the PHY circuit (102-1, 102-N, 202-1, 202-N) via four conductors per up to eight ports (104-1, 104-P) of the PHY circuit (102-1, 102-N, 202-1, 202-N).
US09071371B2 Method and apparatus for identification of broadcast source
A user (102) hears an audio program being broadcast and can record a sample of the audio. The sample is then conveyed to an analyzing means (106) to determine to which broadcast station the user is listening. The analyzing means monitors many broadcast channels. Thus, characteristics of the audio sample and samples taken from the broadcast channels can be compared to find a match. Broadcast information pertaining to the broadcast channel from which the match was found may then be reported back to the user, combined with an advertisement of a promotion, prize notification, discount offers, and other information specific for a certain radio station for example.
US09071370B2 System and method for set top box viewing data
In a video delivery context, collection and analysis of viewing data can provide insight into viewer interaction with video and the Internet. The viewing data can be transmitted in a controlled manner to a data repository. The system can selectively target specific viewers/households to obtain viewing data, which can be combined with demographics, anonymized, and encrypted. Embodiments enable precision selection of media opportunities, by determining detailed characteristics associated with broadcasts including movement of audiences and specific viewer behavior, such as visits to websites on the Internet. The effective yield of broadcasts, including promotional spots and advertisements, can be determined and predicted based on concrete data at a level of detail down to individual viewers. Accordingly, embodiments enable improvement of the effectiveness and return on investment for programming, promotional spots, and advertisements.
US09071369B2 Optical waveguide system for a display device and display device
The invention relates to an optical waveguide system (20) for a display device (1) and to such a display device (1), wherein the optical waveguide system (20) comprises at least one optical waveguide group (20-1, 20-2, 20-3, 20-4, 20-5, 20-6), wherein at least one of the optical waveguide groups (20-1, 20-2, 20-3, 20-4, 20-5) comprises: several optical waveguides (18) made of a material that is transparent to the light of a LED (14), spacers (34) for adjusting a distance of an interspace (30) between a circuit carrier (12) and a front panel (2), and a housing (22) which is made of a material that is intransparent to the light, surrounds each of the several optical waveguides (18) and connects the optical waveguides (18) and the spacers (34) among each other and to each other.
US09071367B2 Emergency including crime broadcast in a neighborhood social network
Disclosed are a method, a device and a system of emergency including crime broadcast data generation and publication in a constrained geospatial vicinity around a broadcast location of a neighborhood social network. In one embodiment, the emergency broadcast data is radially distributed as a notification data through an on-page posting, an electronic communication, and/or a push notification delivered to (1) a set of recipients through an internet protocol (IP) based network associated with users and/or their user profiles around an epicenter defined at a set of geospatial coordinates associated with the emergency broadcast data generated through a computing device or (2) a set of service providers through a cellular network using the radial algorithm in addition to the set of recipients through the IP based network associated with users and/or their user profiles.
US09071365B2 Optical signal processing device and optical signal processing method
An optical hybrid (100) generates a first optical signal by causing local light to interfere with a received optical signal which is received from an outside with a first phase difference. In addition, the optical hybrid (100) generates a second optical signal by causing the local light to interfere with the received optical signal with a second phase difference shifted by π from the first phase difference. Two photoelectric conversion elements (150) photoelectrically convert the first optical signal and the second optical signal, respectively, and generate a first electrical signal and a second electrical signal. A differential trans-impedance amplifier (200) includes a direct-current component correction unit (210), a trans-impedance circuit (240), and a variable gain amplifier (250). The direct-current component correction unit (210) reduces a difference of the magnitude of a direct-current component of the first electrical signal and the magnitude of a direct-current component of the second electrical signal.
US09071364B1 Coherent optical transceiver with programmable application modes
An optical communication system provides coherent optical transmission for metro applications. Relative to conventional solutions, the optical communication system can be implemented with reduced cost and can operate with reduced power consumption, while maintaining high data rate performance (e.g., 100 G). Furthermore, a programmable transceiver enables compatibility with a range of different types of optical networks having varying performance and power tradeoffs. In one embodiment, the optical communication system uses 100 Gb/s dual-polarization 16-point quadrature amplitude modulation (DP-16QAM) with non-linear pre-compensation of Indium Phosphide (InP) optics for low power consumption.
US09071363B2 Optical transmitters with unbalanced optical sidebands separated by gaps
An apparatus comprising a transmitter configured to generate an optical signal comprising a carrier modulated with at least two sidebands modulated with information, wherein the information introduces a separation gap in a frequency domain between the sidebands and the carrier, wherein one of the sidebands is an undesired sideband and another one of the sidebands is a desired sideband with a higher power intensity than the undesired sideband. A method comprising receiving an optical carrier from a light source and modulating the optical carrier with at least two sidebands modulated with information, wherein the information introduces a separation gap in a frequency domain between the sidebands and the optical carrier, wherein one of the sidebands is an undesired sideband and another one of the sidebands is a desired sideband having a higher power intensity than the undesired sideband.
US09071362B1 Noise-tolerant optical modulation
A method of transmitting data. The method comprises preliminarily providing a modulation scheme comprising an N-symbol constellation defined in an M-dimensional space, wherein N<2M, and a composite distance between a given pair of symbols within the constellation increases with increasing Hamming distance between data words encoded in each of those symbols. During run-time, a data signal to be transmitted is encoded as symbols of the constellation, and modulated onto at least M dimensions of a carrier light in accordance with the symbols.
US09071359B2 Method for noise floor and interference estimation
The present invention relates to a method and arrangement in a wireless communication system, e.g. an evolved UMTS Terrestrial Radio Access Network, for improved scheduling and admission control of the uplink by providing an improved determining of power-related quantities, e.g. neighbor cell interference levels, for specific tones and providing more accurate determination of noise-related quantities, e.g. noise floor power estimates, for specific tones. The method and arrangement obtains a neighbor cell interference measure for each subset of tones from at least a noise floor measure for each subset of tones based on combined power quantities from the total uplink power per subset of tones and dividing said noise floor measure into sub noise floor measures for each subset of tones, said dividing dependent on the bandwidth of each subset of tones.
US09071357B1 Data communications system including an optical fiber data link disposed between serial bidirectional electrical data busses
An optical fiber data communications network in which an electro-optical transceiver couples a plurality of serial electrical data buses over a single bidirectional optical fiber link, and includes a controller that functions by oversampling the digital electrical signal on each of such buses, multiplexes them, and converts the signal into a high speed optical signal for transmission over an optical fiber.
US09071355B2 Dynamic dispersion detecting method and apparatus
A dynamic dispersion detecting method and apparatus are disclosed. The apparatus includes a tunable dispersion compensation module (101), a demodulator (102), a receiver (103), a partial band radio frequency power detecting unit (104), and an electrical signal ratio calculating unit (105). The method includes: demodulating a phase of a received optical signal; converting the demodulated optical signal into an electrical signal; sampling radio frequency power of the electrical signal to obtain an radio frequency signal; obtaining an electrical signal ratio of the radio frequency signal; and comparing a value of a currently detected electrical signal ratio with the values of the previously detected electrical signal ratios, tuning a dispersion compensation value according to a comparison result to find a peak electrical signal ratio, and obtaining a residual dispersion value of a system according to the peak electrical signal ratio.
US09071354B2 Optical receiving apparatus and characteristic compensation method
An optical receiving apparatus includes: a compensator configured to compensate an amount of change in a characteristic; a controller configured to obtain, based on a first amount of change in the characteristic with respect to a first optical signal with a first wavelength, the first wavelength, and a wavelength characteristic in the characteristic, a second amount of change in the characteristic made when a second optical signal with a second wavelength is propagated in an optical path, the second wavelength being different from the first wavelength, and obtain a compensation amount based on the second amount of change; and a first setting unit configured to set the compensation amount for the compensator so that the compensator compensates the amount of change in the characteristic.
US09071350B2 Optical receiver implemented with semiconductor amplifier
An optical receiver able to distinguish a failure occurred in one of multiplexed signals from a failure in the transmission medium is disclosed. The optical receiver includes an optical de-multiplexer, optical devices, a signal processor, and a controller. Each of the optical devices converts the de-multiplexed signal into an electrical signal. A clock is extracted from one of the electrical signals. The processor decides, based on the electrical signals and the clock, one of the multiplexed signals falls in a failure.
US09071348B2 Optical transmission apparatus and optical transmission method
An optical transmission apparatus includes a transmitter that transmits to a counterpart receiver via a transmission path and transmits as optical signals for a plurality of channels, input signals for a plurality of channels; and a controller that when a transmission failure between the transmitter and the receiver is detected, distributes to properly operating channels, data for a channel subject to the transmission failure, increases a transmission rate for the properly operating channels to a given transmission rate, and continues data transmission for all channels including the channel subject to the transmission failure.
US09071347B2 Electronic device and method for transferring information from one device to another device
An electronic device configured for transferring at least one on board application program to a second electronic device, includes a processor employing software for performing an analysis of real-time operating characteristics of the electronic device, including any anomalous operating characteristics, in relation to on board application programs in the electronic device. A communication link, coupled to the electronic device, is configured for transferring at least one onboard application program from the electronic device to the second electronic device. The transfer of the at least one onboard application program from the electronic device to the second electronic device proceeds only if the software employed by the processor validates that the at least one onboard application program in the electronic device is unlikely to degrade operating characteristics of the second electronic device.
US09071345B2 Method and system for obtaining an idle spectrum
The present disclosure provides a method and an apparatus for obtaining an idle spectrum. The method includes: obtaining, by a central management unit, configuration information of a transmitter of an authorized system, and obtaining geographic location information of candidate sense nodes; selecting, by the central management unit, sense nodes from the candidate sense nodes according to the configuration information and the geographic location information, and informing the selected sense nodes to perform spectrum sensing; and receiving, by the central management unit, sensing results of the selected sense nodes, and obtaining information of an idle spectrum according to the sensing results.
US09071337B2 Wideband transmitter/receiver arrangement for multifunctional radar and communication
A transmitter/receiver arrangement comprises a digital arbitrary waveform generator AWG connected to a transmitter. Said waveform generator is configured to generate an arbitrary waveform within a given bandwidth. Said transmitter/receiver arrangement further comprises an antenna arrangement configured to emit a transmitter signal, and to receive an incident signal, a receiver configured to receive a receiver signal, and an analog isolator connected to said antenna arrangement, said transmitter, and said receiver. Said analog isolator is adapted to route said transmitter signal from said transmitter to said antenna arrangement, and said incident signal from said antenna arrangement to said receiver, and to isolate said transmitter signal from said receiver signal. Said receiver is adapted to cancel any residual transmitter signal in said receiver signal by means of at least one digital model of at least said isolator, said antenna arrangement, and said transmitter.
US09071332B2 Base station and clock synchronization method thereof
An enhanced base station and clock synchronization method are provided. The method includes scanning to discover a satellite transmitting a satellite signal and a master base station providing clock synchronization signal, entering, when a satellite having a signal that fulfills predetermined conditions is found, a master mode for receiving the satellite signal to acquire clock synchronization and transmitting a clock synchronization signal to at least one slave base station, and entering, when no satellite having a signal that fulfills the predetermined conditions is found, a slave mode for receiving the clock synchronization signal from the master base station to acquire clock synchronization. The method allows the base station to switch between the master and slave modes dynamically according to variation of the communication environment, resulting in efficient clock synchronization.
US09071326B2 Distributed radio system
A distributed radio system comprising a first receiver (1) and a second receiver (2) each receiver comprising a tuner (11, 21) adapted to receive radio signals and to transmit tuned radio signals, a first baseband unit (12, 22) coupled to the tuner (11,21) and adapted to receive the tuned radio signals and to partially demodulate the tuned radio signals, the first baseband unit (12,22) being further adapted to transmit partially demodulated signals, a second baseband unit (14, 24).The distributed radio system further comprising a digital communication channel (3) adapted to receive the partially demodulated signals and to redistribute the partially demodulated signals to the second baseband unit (14, 24).
US09071325B2 Saw-less, LNA-less low noise receiver
A low noise receiver includes a downconverter configured to receive a radio frequency (RF) signal, the downconverter comprising a switching architecture configured to generate a plurality of output phases based on a respective plurality of local oscillator (LO) signals, a differencing circuit configured to combine the plurality of output phases such that an nth output phase is differenced with an (n+K)th output phase, resulting in gain-added output phases, and a summation filter configured to receive the gain-added output phases and configured to combine the gain-added output phases such that a response of the receiver effectively reduces odd harmonics of the RF signal.
US09071321B2 Methods and system for wireless networks with relays involving pseudo-random noise sequences
Methods and systems are provided for use with wireless networks having one or more cell in which each cell includes a base station (BS), at least one relay station (RS) and at least one mobile station (MS). The at least one relay station can be used as an intermediate station for providing communication between the BS and MS. Methods are provided for allocating OFDM resources for communicating between the BS, RS and/or MS for example dividing transmission resources into uplink and downlink transmissions and methods of inserting pilot symbols into transmission resources used by the RS. In some embodiments on the invention, the methods are consistent and/or can be used in conjunction with existing standards such as 802.16e.
US09071315B2 Interference signal diversity combining for interference cancellation
A method of wireless communication includes receiving a first interference signal and a second interference signal. The method further includes determining whether the second interference signal includes a different version of the first interference signal. Additionally, the method includes combining the first interference signal and the second interference signal to estimate an interference cancellation signal when the second interference signal is the different version of the first interference signal.
US09071313B2 Method and apparatus for demodulation of a desired signal in the presence of nonlinear-distorted interference
The present disclosure provides methods and apparatuses for demodulating discrete-time desired signals in a period-Td bandpass desired signal in the presence of interference that results from a period-T bandpass interference signal that has been nonlinear distorted. Estimation of the nonlinear-distorted interference and subsequent cancellation from a received signal, that includes the interference and desired signal, produces residual-interference signals. The demodulation of the residual-interference signals uses an equalization technique when Td is not equal to T. The estimation, cancellation, and demodulation are adapted for changing nonlinear distortion effects.
US09071312B2 Wireless communication apparatus and wireless communication method
A wireless communication apparatus of the present invention comprises a plurality of branches, a tap output combining section, an adaptive blind processing section and a diversity combining section. Each of the plurality of branches comprises a tap processing section generates a tap output signal and a received signal vector on a basis of a received signal and a tap coefficient in a space diversity method. The tap output combining section calculates by linking the tap output signal as a tap output combination signal. The adaptive blind processing section generates the tap coefficient by an adaptive blind processing on a basis of the tap output combination signal and the received signal vector. The diversity combining section performs a diversity combination of the tap output signals. The adaptive blind processing section uses an evaluation condition so that the tap output combination signal be minimal.
US09071304B2 Digital-to-time converter and methods for generating phase-modulated signals
Embodiments of a digital-to-time converter (DTC) and methods for generating phase-modulated signals are generally described herein. In some embodiments, a divide by 2N+/−1 operation on an oscillator signal generates first and second divider signals, the first divider signal is sampled to provide a rising-edge correlated signal, a divider unit output signal is sampled to provide a falling edge correlated signal, and either the second divider signal or a delayed version of the second divider signal is provided as the divider unit output signal. A selection between the rising-edge and the falling-edge correlated signals generates edge signals. A fine phase-modulated output signal is generated based on an edge interpolation between a first and second edge signals.
US09071302B2 Radio-frequency power amplifier circuitry with power supply voltage optimization capabilities
Electronic devices with wireless communications capabilities are provided. The electronic device may include storage and processing circuitry, power amplifier circuitry, power supply circuitry, etc. The storage and processing circuitry may direct the power amplifier circuitry to operate using a desired power mode, in allocated resource blocks within a particular frequency channel, and at a given output power level. The power supply circuitry may bias the power amplifier circuitry with a power supply voltage. The electronic device may be subject to in-band emissions requirements and adjacent channel leakage requirements that restrict the power levels produced by the device on frequencies that are not allocated to the device. The electronic device may optimize the power amplifier supply voltage based on allocated resource blocks by minimizing the supply voltage to reduce power consumption while ensuring that emissions requirements are satisfied.
US09071297B2 User equipment and methods for codebook subsampling for enhanced 4TX codebooks
Embodiments of user equipment (UE) and methods for codebook subsampling for enhanced 4TX codebooks in 3GPP LTE wireless networks are generally described herein. In some embodiments, a physical uplink control channel (PUCCH) is configured for transmission of channel state information (CSI) feedback including a rank indicator (RI) and a precoding matrix (W1). The rank indicator (RI) and a precoding matrix (W1) are jointly encoded and codebook subsampling is performed for the enhanced 4Tx codebook for at least one of: PUCCH report type 5 (RI/1st PMI) in PUCCH 1-1 submode 1; PUCCH report type 2c (CQI/1st PMI/2nd PMI) in PUCCH 1-1 submode 2; and PUCCH report type 1a (subband CQI/2nd PMI) in PUCCH 2-1.
US09071294B2 Base station
A use signal determining section determines the use of a first known signal for array transmission control, when a downlink priority is higher than a threshold value. The use signal determining section determines the use of a second known signal for the array transmission control, when the downlink priority is lower than the threshold value. When the first known signal is used for the array transmission control for a communication terminal performing downlink communication therewith, a scheduling executing section determines to perform uplink communication with the communication terminal. When the second known signal is used for the array transmission control for a communication terminal performing downlink communication therewith, the scheduling executing section determines whether or not to perform uplink communication with the communication terminal by using an uplink priority for the communication terminal.
US09071284B2 Load impedance detection for static or dynamic adjustment of passive loads
This disclosure provides systems, methods and apparatus for detecting an impedance of a wireless power transmitter load. In one aspect, a method of determining a reactive condition of a wireless power transmitter apparatus is provided. The method comprises determining a value correlated to a voltage of a drain of a switching element of a driver circuit of the wireless power transmitter. The method further comprises determining a reactance load change based on the determined voltage.
US09071281B2 Selective provision of error correction for memory
Embodiments of apparatuses, methods, and storage medium associated with selectively providing error correction to memory are disclosed herein. In one instance, an apparatus may include a memory controller configured to control access to a non-volatile memory having storage locations. The controller may be configured to provide a first error correction arrangement to provide a first level of error correction capability for data stored in the non-volatile memory. The memory controller may include a control/error correction block configured to provide a second error correction arrangement with a second level of error correction capability for data stored in the non-volatile memory. The second level of error correction capability enables correction of at least one bit error more than the first level. The memory controller may be configured to selectively employ the second error correction arrangement to complement the first error correction arrangement. Other embodiments may be described and claimed.
US09071278B2 Digital broadcasting system and method of processing data in digital broadcasting system
The present invention provides a data processing method, the data processing method including receiving a broadcasting signal where mobile service data are multiplexed with main service data, extracting transmission-parameter-channel signaling information and fast-information-channel signaling information from a data group within the received mobile service data, parsing first program table information describing virtual channel information of an ensemble and a service provided by the ensemble using the fast-information-channel signaling information, the ensemble the ensemble corresponding to a virtual channel group of the received mobile service data, obtaining information representing that second program table information, which includes a descriptor describing event information of the mobile service data, is received, from the first program table information, parsing the second program table information, and storing the event information and displaying service guide information including the event information.
US09071275B2 Method and device for implementing cyclic redundancy check codes
The present invention relates to an error control technology in the communication system and discloses a method and an apparatus for implementing Cyclic Redundancy Check (CRC) codes to improve the operation performance of the system significantly and satisfy operation requirements when processing high-rate CRC data. The method includes: performing at least one XOR operation for information bits input in parallel to obtain a first result, where at least one pipeline is added during the XOR operation; performing an XOR operation for a previously obtained CRC code to obtain a second result; and performing an XOR operation for the second result and the first result to obtain a current CRC code. The present invention is applicable to any field that needs to implement CRC codes by means of hardware.
US09071271B1 Digital radio frequency memory utilizing time interleaved analog to digital converters and time interleaved digital to analog converters
A digital radio frequency memory (DRFM) comprises a plurality of time interleaved analog to digital converters (ADCs) in cooperation with a plurality of time interleaved digital to analog converters (DACs) to provide an effective sampling rate which may be greater than the clock rate of the system. A higher sampling rate at the ADC increases instantaneous bandwidth, while a higher sampling rate at the DAC improves spectral purity. The ADCs and DACs are time interleaved by supplying a clock signal to each ADC/DAC which is skewed with respect to the previous and subsequent skewed signal. In order to process the higher effective sampling rate, a pre-computation of DAC values for each high rate sample is performed by an SDAC algorithm that pipelines the calculations of the processed sample values provided to the DAC. A DAC bias correction is provided to adjust for drift in the DACs.
US09071267B1 Multi-path analog front end and analog-to-digital converter for a signal processing system
A processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise and increase dynamic range. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.
US09071265B1 Successive approximation analog-to-digital converter with linearity error correction
A SAR ADC includes capacitors, a comparator, and a SAR logic circuit. The capacitors include a first set of capacitors and an error-detection capacitor. The first set of capacitors generates a first set of voltage signals that are compared with a common-mode voltage signal (VCM) by the comparator during a first set of comparison cycles. The comparator generates a first set of control signals that is used by the SAR logic circuit to successively approximate the first set of voltage signals and generate a first set of bits. An error-detection capacitor generates an error-detection signal that is compared with the common-mode voltage signal VCM by the comparator to generate an error-detection control signal. The SAR logic circuit compensate for an error in the first set of bits based the logic state of the error-detection control signal.
US09071260B2 Method and related device for generating a digital output signal corresponding to an analog input signal
An embodiment of a circuit includes an input node, a generator, a combiner, a converter, and a filter. The input node is configured to receive an input signal in a first domain, and the generator is configured to generate a periodic signal in the first domain. The combiner is configured to combine the input and periodic signals into a resulting signal in the first domain, and the converter is configured to convert the resulting signal into a converted signal in a second domain. And the filter is configured to remove from the converted signal substantially all of a frequency component of the converted signal having substantially a same frequency as a frequency component of the periodic signal.
US09071256B1 Method for link resets in a SerDes system
The present disclosure relates to a method for use with a serializer/deserializer comprising. The method may include grouping one or more lane modules associated with an integrated circuit (IC) together to form a link, wherein each of the one or more lane modules includes a reset state machine and a high speed reset generator. The method may also include providing a common module having a common reset release state machine and a reset release synchronizer and pulse generator, the common module and one or more lane modules being configured to communicate therebetween. The method may further include resetting each link independently using the one or more lane modules.
US09071250B2 Semiconductor integrated circuit and control method for the same
A semiconductor integrated circuit includes a user circuit and a power supply noise suppression circuit. The user circuit includes a plurality of circuit modules each containing an operation ratio control circuit. The power supply noise suppression circuit judges an amount of current fluctuation occurring in the user circuit by monitoring an operation ratio of each of the plurality of circuit modules, and controls, via each of the operation ratio control circuits, the operation ratio of a corresponding one of the circuit modules in accordance with a result of the judgment of the amount of current fluctuation.
US09071245B2 Solid state power controller gate control
A system for controlling gate power includes a metal oxide semiconductor field effect transistor (MOSFET) configured to supply power to a load according to a gate control voltage applied to a gate of the MOSFET. The system includes a gate control circuit configured to turn on and off the gate control voltage supplied to the gate of the MOSFET. The system also includes a ramping circuit configured to perform at least one of ramping up a voltage applied to the gate of the MOSFET based on the gate control circuit turning on power to the gate of the MOSFET and ramping down the voltage applied to the gate of the MOSFET based on the gate control circuit turning off power to the gate of the MOSFET.
US09071244B2 Ground referenced single-ended signaling
One embodiment of the present invention sets forth a mechanism for transmitting and receiving ground-referenced single-ended signals. A transmitter combines a direct current (DC) to DC converter including a flying capacitor with a 2:1 clocked multiplexer to drive a single-ended signaling line. The transmitter drives a pair of voltages that are symmetric about the ground power supply level. Signaling currents are returned to the ground plane to minimize the generation of noise that is a source of crosstalk between different signaling lines. Noise introduced through the power supply is correlated with the switching rate of the data and may be reduced using an equalizer circuit.
US09071243B2 Single ended configurable multi-mode driver
Embodiments of the invention are generally directed to a single-ended configurable multi-mode driver. An embodiment of an apparatus includes an input to receive an input signal, an output to transmit a driven signal generated from the input signal on a communication channel, a mechanism for independently configuring a termination resistance of the driver apparatus, and a mechanism for independently configuring a voltage swing of the driven signal without modifying a supply voltage for the apparatus.
US09071241B2 Data output circuit and operating method with reduced current overlap for semiconductor device
A semiconductor device includes a clock delay unit configured to delay a source clock by a given delay amount and generate a delayed source clock, a driving signal generation unit configured to decide logic levels of first and second driving signals based on a value of input data, to select one of the source clock and the delayed source clock based on current logic levels of the first and second driving signal's, which are detected based on the source clock, and to use a selected clock as a reference of an operation for determining next logic levels of the first and second driving signals, and an output pad driving unit configured to drive a data output pad with a first voltage in response to the first driving signal, and to drive the data output pad with a second voltage in response to the second driving signal.
US09071240B2 Low power, single-rail level shifters employing power down signal from output power domain and a method of converting a data signal between power domains
Provided herein is a voltage level shifter, an apparatus including a voltage level shifter and a method of converting voltages between input and output power domains. In one embodiment, the voltage level shifter includes: (1) an input circuit configured to receive a data signal from an input power domain and a power down signal from a output power domain and (2) a transition circuit coupled to the input circuit and configured to receive the data signal and an inverted signal of the power down signal, wherein the input circuit and the transition circuit are both configured to connect to a supply voltage of the output power domain as a power source.
US09071231B2 Apparatuses and methods for duty cycle adjustments
Apparatuses and methods have been disclosed. One such apparatus includes a plurality of gates coupled together in series. A first pull-down circuit can be coupled to a node between two adjacent gates of the plurality of gates and controlled responsive to a first control signal. A second pull-down circuit can be coupled to an output of one of the gates and controlled responsive to a second control signal. A duty cycle of a signal provided by the plurality of gates can be increased responsive to the first control signal and can be decreased responsive to the second control signal. The plurality of gates and the first and second pull-down circuits can make up a duty cycle adjuster circuit that can adjust the duty cycle of the signal by adjusting only a single type of edges of the signal.
US09071230B2 Gate driving circuit and display apparatus having the same
A gate driving circuit and a display apparatus having the gate driving circuit, in which the gate driving circuit includes a voltage adjusting part using a low clock signal to increase the reliability of the gate driving circuit, thereby extending the lifetime of the gate driving circuit.
US09071225B2 Electronic circuit and electronic module
An electronic circuit includes a plurality of duplexers that are coupled to an antenna terminal and have a pass band different from each other and a plurality of acoustic wave filters that are respectively coupled between the antenna terminal and the plurality of the duplexers, wherein filter characteristics of a first acoustic wave filter of the plurality of the acoustic wave filters are set so as to allow passage of a signal in both a pass band for transmitting and a pass band for receiving of a first duplexer of the plurality of the duplexers that is coupled to the first acoustic wave filter and suppress passage of a signal in both a pass band for transmitting and a pass band for receiving of a second duplexer of the plurality of the duplexers that is different from the first duplexer.
US09071224B2 Filter and duplexer
A filter includes: a plurality of piezoelectric thin film resonators, each having a multilayered film including a lower electrode located on a substrate, a piezoelectric film located on the lower electrode, and an upper electrode located on the piezoelectric film so as to face the lower electrode, wherein at least two piezoelectric thin film resonators have thick film portions, in each of which the multilayered film is thicker in at least a part of an outer peripheral portion than in an inner portion of a resonance region in which the lower electrode and the upper electrode face each other across the piezoelectric film, and lengths of the thick film portions from edges of the resonance regions are different from each other in the at least two piezoelectric thin film resonators.
US09071221B1 Composite RF current attenuator for a medical lead
A composite RF current attenuator for a medical lead includes a conductor having a distal electrode contactable to biological cells, a bandstop filter in series with the lead conductor for attenuating RF currents flow through the lead conductor at a selected center frequency or across a range of frequencies about the center frequency, and a lowpass filter in series with the bandstop filter and forming a portion of the lead conductor. The bandstop filter has a capacitance in parallel with a first inductance. In a preferred form, the lowpass filter includes a second inductance in series with the bandstop filter, wherein the values of capacitance and inductances for the composite RF current attenuator are selected such that it attenuates MRI-induced RF current flow in an MRI environment.
US09071213B2 Bias circuit and amplifier with current limit function
There are provided a bias circuit and an amplifier having a current limit function, including: a control voltage generating unit generating a control voltage using a reference voltage; a bias voltage generating unit generating a bias voltage according to the control voltage; and a bias current limit unit controlling the control voltage according to a bias current of the bias voltage generating unit.
US09071212B2 Audio amplifier
An audio amplifier may comprise a signal limiting circuit and a power amplifier. The signal limiting circuit may be configured to limit an audio signal received at an input and to provide it as a limited audio signal at an output. The power amplifier may have a supply connection which may be coupled to a power supply unit in order to supply power to the power amplifier. The power amplifier may be configured to amplify a signal, which may be based on the limited audio signal, and to provide it as a level-limited audio signal at an output which may be coupled to a load, so that the load may be operated at limited power. The signal limiting circuit may be configured to produce an audio signal which may be limited depending on the load.
US09071210B2 Efficient power transfer power amplifier (PA) architecture
An efficient power transfer power amplifier (PA) architecture is disclosed that includes a first PA, a first impedance transformation network (ITN) coupled to the first PA, a second PA, and a second ITN coupled to the second PA. A switching network having a plurality of load outputs along with a first switch input coupled to a first impedance output of the first ITN and a second switch input coupled to a second impedance output of the first ITN, a third switch input coupled to a third impedance output of the second ITN, and a fourth switch input coupled to a fourth impedance output of the second ITN. A control system is adapted to control the switching network to switch signals at the first, second, third, and fourth switch inputs such that select ones of the signals travel paths having matching impedances to loads coupled to the plurality of load outputs.
US09071207B2 Predistortion of concurrent multi-band signal to compensate for PA non-linearity
Systems and methods are disclosed for effecting predistortion of a concurrent multi-band signal to compensate for power amplifier non-linearity. In general, the concurrent multi-band signal contains frequency components occupying multiple frequency bands with no frequency components between adjacent frequency bands. In one embodiment, a transmitter includes a power amplifier that amplifies a modulated concurrent multi-band signal to provide an amplified concurrent multi-band signal. A predistortion sub-system effects predistortion of the modulated concurrent multi-band signal prior to amplification in order to compensate for non-linearity of the power amplifier. The predistortion sub-system includes a number of predistorters each providing predistortion for a different one of the frequency bands of the modulated concurrent multi-band signal. At least one of the predistorters provides predistortion for the corresponding frequency band of the modulated concurrent multi-band signal based on carrier frequency information for the modulated concurrent multi-band signal.
US09071202B2 Doherty amplifier with peak branch RF conditioning
In one embodiment, a Doherty amplifier having a main amplifier branch and one or more peak amplifier branches, where at least one peak amplifier branch has RF conditioning applied to its peak branch input signal such that the peak amplifier branch is active only when the peak branch input signal is greater than a specified threshold level. In one implementation, a reverse-biased diode is configured between the peak branch input signal and a peak amplifier device, where the bias signal applied to the diode establishes the specified threshold level. Depending on the implementation, the bias signal may be static or dynamic, and multiple peak amplifier branches may have diodes with independently or dependently generated bias signals applied.
US09071199B2 High frequency power amplifier
A high frequency power amplifier includes an FET chip, a wire connected at a first end to the FET chip, an input-side matching circuit substrate, a resistive element on the input-side matching circuit substrate and connected in series with the FET chip, a transmission portion of a conductive material on the input-side matching circuit substrate, in contact with one end of the resistive element, and connected to an input electrode, a wire connection portion of a conductive material on the input-side matching circuit substrate, in contact with a second end of the resistive element, and connected to a second end of the wire, and a shorting portion of a conductive material having a smaller width than the resistive element and on the resistive element, connecting the transmission portion to the wire connection portion.
US09071193B1 System and method for augmenting frequency tuning resolution in L-C oscillation circuit
A system and method are provided for augmenting frequency tuning resolution in an L-C oscillatory circuit which comprises a source of electrical energy, and a tuned section energized by said source of electrical energy for oscillatory conduction of a resonant current therethrough. The tuned section includes an inductor portion extending in substantially looped manner between first and second connection points to define at least one turn. A primary capacitor portion is connected across at least a primary segment of the conductive member delineated by the first and second connection points. The tuned section further includes a secondary capacitor portion connected across a secondary segment of the conductive member intermediately tapped from the primary segment. The secondary capacitor portion defines a base tuning capacitance for the tuned section, which is down-converted to a fine tuning capacitance when reflected to a calibration capacitance of the primary capacitor portion for adjustable combination therewith.
US09071192B2 Oscillator for a powder spray coating device
An oscillator (100) for providing an oscillating voltage for a powder spray coating device (200) is specified. With the aim of improving operational safety, the oscillator (100) as claimed in the invention has a first signal generator (10) for generating an intermediate circuit voltage (11), a second signal generator (20) for generating a modulation signal (21) and a modulation signal isolating element (61), connected to the second signal generator (20), while a first voltage monitoring device (60) is also provided, designed for continuously measuring the oscillator voltage (34), comparing it with at least one specified or specifiable oscillator voltage reference value and, if a first comparison criterion is satisfied, outputting a modulation isolating signal (80) to the modulation signal isolating element (61).
US09071185B2 Constant voltage circuit and analog electronic clock
There are provided a constant voltage circuit that outputs a stable constant voltage for an analog electronic clock, and an analog electronic clock featuring low current consumption and prolonged battery life. The constant voltage circuit has a first voltage holding circuit connected between the gate of an output transistor and an output terminal and a second voltage holding circuit connected between the gate of the output transistor and a ground terminal, and carries out control such that the second voltage holding circuit is enabled when the motor is operated.
US09071184B2 Motor driving system
A motor driving system is disclosed having a control device 4A for controlling a synchronous motor 1, the control device 4A comprising a sensorless control algorithm device 20 that includes an abnormality determining device 25 for determining abnormality of the algorithm based on a magnetic pole position error estimated value of the motor 1. When the abnormality determining device 25 has determined abnormality of the algorithm, the control device 4A controls a power converter 2 using a magnetic pole position detected value detected by a magnetic pole position detector 30 attached to the motor, in place of using a magnetic pole position estimated value. This motor driving system can guarantee reliability of the sensorless control algorithm device 20 while assuring safety. Safety of electric vehicles is enhanced by installing the motor driving system that has been guaranteed reliable.
US09071180B2 Electric drive unit
An electric drive unit includes an electric motor, an inverter supplying electricity to the motor, a continuous current stage supplying electricity to the inverter, a controller including a modulator for driving the inverter controlled by a first digital signal representing the amplitude of the phase voltages to be applied to the motor and by a second digital signal representing the electrical frequency of the phase voltages. An analog/digital stage calculates the optimum value of the advance angle (δopt) of the voltage applied to the motor relative to the counter-electromotive force (“CEMF”) as a linear function of the peak value of the phase current and an analog/digital stage for measuring the angle (φact) between the voltage applied to the electric motor and the phase current. The controller is programmed for estimating the angle (γact) between the phase current and the CEMF as the difference between δopt and φact.
US09071176B2 Apparatus and method for controlling motor
There is provided an apparatus and a method for controlling a motor. The apparatus for controlling a motor includes a signal detection unit detecting a first signal, a sampling unit acquiring the number of pulses of the first signal included in a predetermined sampling period, and an operation unit dividing the sampling period into a predetermined number of, a plurality of sub periods, and computing a speed of a motor by allocating predetermined weights to the number of pulses of the first signal included in the plurality of respective sub periods, wherein the operation unit computes the speed of the motor by controlling at least one of the weights and the number of sub periods when the number of pulses of the first signal included in the plurality of respective sub periods is different.
US09071175B2 Electric bicycle driving apparatus
An electric bicycle driving apparatus is disclosed. The apparatus includes a speed change mode operator to output a first speed change mode signal or second speed change mode signal, a controller to receive the first speed change mode signal or second speed change mode signal and output a first control signal corresponding to the first speed change mode signal or a second control signal corresponding to the second speed change mode signal, a motor driver to, when the first speed change mode signal is output, receive the first control signal and output a first motor driving signal to drive a motor in a first speed change mode, and, when the second speed change mode signal is output, receive the second control signal and output a second motor driving signal to drive the motor in a second speed change mode, and a relay to selectively receive a relay switching enable signal.
US09071173B2 Motor control device, and optical scanning device, image forming device and printed circuit board including the same
A CPU determines that a motor is undergoing a forward rotation when a time difference between a detection timing of a light beam deflected by a rotating polygonal mirror and an output timing of a detection signal from a magnetic detector element falls within a predetermined range, and that the motor is undergoing a reverse rotation when the time difference does not fall within the predetermined range. With this configuration, a detection circuit for detecting voltage induced in three phases is unnecessary, and therefore the cost can be reduced. Furthermore, there is no need to detect voltage induced in each of the three phases. As it suffices to simply detect the time difference, the amount of time required to detect a rotation direction can be reduced.
US09071170B2 Mounting structure for polymer actuator
A movable side mounting portion transmits extension and contraction of a polymer actuator to an electric prosthetic hand. The polymer actuator deforms elastically in accordance with voltage application and returns to its original shape in accordance with stoppage of voltage application. A rear end of the polymer actuator is fixed and a front end of the polymer actuator is movable. When one of a pair of electrodes of the polymer actuator is electrically connected to the fixed side mounting portion, the fixed end is fastened by a bolt to the fixed side mounting portion. Also, when the other electrode is electrically connected to the movable side mounting portion, the movable end is fastened by a bolt to the movable side mounting portion.
US09071167B2 Compound semiconductor device and method for manufacturing the same
An AlGaN/GaN-HEMT has a structure including: compound semiconductor layers formed on a substrate; a gate electrode, a gate pad that has a current path formed between the gate electrode and itself, and a semiconductor layer that is spontaneously polarized and piezoelectrically polarized, which are formed on the compound semiconductor layer; and a gate electrode connection layer formed on the semiconductor layer, wherein the gate electrode connection layer and the gate electrode are electrically connected with each other. This structure which is relatively simple allows the AlGaN/GaN-HEMT to realize an intended normally-off operation without causing such inconveniences as increase in a sheet resistance, increase in an on-resistance, and increase in a leakage current.
US09071163B2 Hybrid DC-to-AC conversion system and method of operating the same
A hybrid DC-to-AC conversion system includes a first DC input voltage, a second DC input voltage, a power conversion apparatus, and a comparison unit. The power conversion apparatus is connected in parallel to the first DC input voltage and the second DC input voltage to convert the first DC input voltage or the second DC input voltage into an AC output voltage. The comparison unit receives the AC output voltage and an external reference voltage. The comparison unit outputs a control signal to make the first DC input voltage supply a load when an absolute value of the AC output voltage is less than or equal to the external reference voltage, whereas the comparison unit outputs the control signal to make the second DC input voltage supply the load when the absolute value of the AC output voltage is greater than the external reference voltage.
US09071161B2 Single stage PFC power supply
A single stage power factor correction power supply has two transformers: a main transformer and an auxiliary transformer (forward transformer). The main transformer transfers energy form the primary circuit to the secondary circuit. The auxiliary transformer is used to correct input current waveform. The advantage of this design over the two stage power supply is that the voltage across the storage capacitor can be designed to be only slightly higher than the peak value of the rectified input voltage. Therefore, it uses less energy to correct input current waveform and results in less of an Electromagnetic Compatibility problem because it has lower input current amplitude through the inductor than that of the two stage PFC power supply.
US09071160B2 Power-dependent mains under-voltage protection
A method and controller for power dependant mains under-voltage (“brown-out”) protection is disclosed. Brown-out protection is meant for protection against overheating due to low mains voltage and associated high mains current. The disclosed method and controller allow for lower mains voltages at low load by comparing the mains voltage with a signal indicating the actual power level of the power supply. In converters such as flyback converters, this brown-out protection can be implemented by comparing the actual peak voltage of the mains voltage with a control signal that indicates the power level. In other embodiments, the mains voltage is compared to a preset level by means of a comparator. Provided the voltage passes the preset level prior to opening the control window, the SMPS functions normally. Conversely, brown-out protection is initiated if the voltage does not pass the preset level before the control window opens.
US09071157B2 High-voltage (HV) startup device
A high-voltage (HV) startup device is disclosed. The HV startup device is connected with a control circuit of a switching power supply and receives a high voltage to provide and increase a triggering voltage received by the control circuit, wherein the control circuit is a pulse width modulator (PWM) or a pulse frequency modulator (PFM). When the triggering voltage reaches to a preset voltage of the control circuit, the control circuit sends out a control signal and the switching power supply uses the control signal to generate a sense signal. The HV startup device receives the control signal or the sense signal to stop providing the triggering voltage.
US09071155B2 Switching power supply apparatus including a plurality of outputs
A resonant capacitor and an inductor are connected in series between a primary winding of a transformer and a second switching element. A first rectifying and smoothing circuit including a first rectifier switching element and a capacitor rectifies and smoothes a voltage generated in a first secondary winding of the transformer, and takes out a first output voltage. A second rectifying and smoothing circuit including a second rectifier switching element and a capacitor rectifies and smoothes a voltage generated in a second secondary winding of the transformer, and takes out a second output voltage. A control circuit controls an on-time of a first switching element and an on-time of the second switching element in accordance with the first output voltage and the second output voltage, respectively.
US09071149B2 Electric power conversion circuit
A DC-DC converter generates PWM signals PWM1H, PWM1L on the basis of a reference signal CLK1 to drive switching elements connected in series. When generating a reset signal RST, the converter generates PWM signals PWM2H, PWM2L on the basis of the reset signal RST. When generating no reset signal, the converter generates the PWM signals PWM2H, PWM2L on the basis of a reference signal CLK2 in order to drive other switching elements connected in series. The converter generates the reset signal RST at an optional timing to the reference signal CLK1. The reference signal CLK2 is brought forward from the reference signal CLK1 by ΔT1. The PWM signals PWM1H, PWM1L are different in timing from the PWM signals PWM2H, PWM2L. This makes it possible to avoid the switching elements diagonally arranged from being simultaneously turned on and off, and suppress a switching loss, and to increase an efficiency of the converter.
US09071147B2 Average input current estimation based on primary side current sense
The embodiments herein describe a power converter including a controller that estimates input current of the power converter. The controller estimates the input current without explicitly sensing the input current. The estimated input current can be used in various applications such as regulating power factor and total harmonic distortion as well as estimating current required to maintain proper operation of a dimmer switch in light emitting diode lamp systems.
US09071139B2 High current switching converter for LED applications
A step-up switching voltage regulator includes two or more inductors and a switching network. A control circuit drives the switching network in a repeating sequence that includes: a magnetizing phase where the inductors are connected in series between an input voltage and ground; and a charge transfer phase where the inductors are connected in parallel to provide current to an output node with at least one of the inductors is connected between ground and the output node.
US09071138B2 Adaptive digital pulse width modulation generator for buck converters
Systems and methods are disclosed to control a buck converter by performing adaptive digital pulse width modulation (ADPWM) with a plurality of upper power transistors each uniquely controlled to enable greater than 100% duty cycle for the buck converter and a lower power transistor coupled to the plurality of upper power transistors; and driving an inductor having one end coupled to the lower power transistor and the upper power transistors.
US09071136B2 System and method for suppression of peaking in an external LC filter of a buck regulator
Disclosed are systems and methods for suppressing voltage peaking in a buck regulator. In one aspect, a buck regulator comprises: a pulse-width modulator (PWM) that generates a pulsed signal; a switch operable to selectively connect the regulator to a DC power supply in response to the pulsed signal and output a pulsed output DC signal; a filter for filtering out high frequency noise from the pulsed output DC signal and generating a regulated output signal; an integrator for comparing the pulsed output DC signal with a reference voltage signal and generating an error signal for input to the PWM; a subtractor operable to subtract the reference voltage signal from the filtered output signal to generate an error feedback signal; and an adder operable to add the error feedback signal to the error signal for input to the pulse-width modulator in order to suppress voltage peaks in the filtered output signal.
US09071130B2 Switching power supply device, switching power supply circuit, and electrical equipment
According to an embodiment of the invention, there is provided a switching power supply device including an integrated body and a plurality of external terminals. In the integrated body, a first switching element, a constant current element, and a diode are connected in series. The plurality of external terminals include a first external terminal connected to a main terminal of an element disposed on one end side of the integrated body and a second external terminal connected to a main terminal of an element disposed on another end side of the integrated body.
US09071123B2 Voice coil motor
A voice coil motor includes a case, a stationary module, and a movable module. The stationary module is retained within the case, and includes a housing and a number of magnets. The housing and the plurality of magnets are integrally formed. The movable module is movably retained within the case, and includes a barrel and a coil coupled to the barrel. When electric current is applied to the coil, the coil generates a magnetic field and the magnetic field repels the magnets, thereby driving the movable module to move.
US09071116B2 Apparatus for installing stator winding conductors
An apparatus for installing an elongate conductor into stator core slots, including a magazine having a radially outer cylindrical surface with recesses that extend inwardly of the cylindrical surface, and a circular rack having a radially outer periphery provided with rack slots. The magazine has an installation mode in which a stator core coaxially surrounds the magazine, there is concurrent radial alignment between pairs of magazine recesses and stator core slots, and a conductor axial branch is receivable by a stator slot from a respectively paired magazine recess; and a load mode in which the circular rack and the magazine have synchronized rotative movements, corresponding pairs of magazine recesses and rack slots are sequentially aligned, and a conductor axial branch is receivable by a magazine recess from its aligned rack slot. Also, a method for loading an elongate conductor onto a magazine for subsequent installation into stator core slots.
US09071113B2 Drive unit terminal holder
A motor includes a stator having a winding wire wound thereon, a rotor, and a shaft. The motor is housed in a motor case, where the motor case has a cylinder part and a bottom part. A first terminal is disposed on the motor case, and has one end coupled to an end of the winding wire, such that the wire passes through a first opening on the bottom part. A controller case is disposed detachably on the bottom part. The controller case has a controller housed therein, and has a second terminal that has one end electrically coupled to a power module and the other end engages with the first terminal to electrically couple the motor and the controller. A terminal holder is attached on the motor case to hold and support the first terminal.
US09071111B2 Blower apparatus and method for controlling blower apparatus in vehicle
The blower apparatus includes a motor; a fan; a motor drive circuit for electrically driving the coil; a microprocessor for controlling the motor drive circuit; and a motor case integrally incorporating the motor, the motor drive circuit, and the microprocessor. The blower apparatus further includes an internal power line for supplying power supply voltage Vig supplied to power supply input terminal Tv1, to the motor drive circuit and the microprocessor in the motor case; a smoothing capacitor connected to the internal power line; and a cut off control circuit for cutting off supply of the power supply voltage to the internal power line according to a command from the microprocessor.
US09071110B2 Abnormality detection method and apparatus
There is provided a system and method for detecting an abnormal operation of a motor controlling an operating parameter of a machine. Both a torque of the motor and the operating parameter are monitored. A memory stores a plurality of predetermined torque values indicative of a normal operation of the motor. A plurality of operating parameter values are also stored in the memory with each operating parameter value having a corresponding predetermined torque value associated therewith. The predetermined torque value corresponding to the monitored operating parameter is retrieved from the memory and compared to the monitored torque value to detect an abnormal operation of the motor.
US09071107B2 Rotor unit, rotating electrical machine, and method for manufacturing rotor unit
A rotor unit includes a rotor core made of laminated steel sheets that are vertically laminated, and a holder made of resin. The rotor core and the holder are fixed together through insert molding. For this reason, the process of manufacturing the rotor core and the holder is shortened. Additionally, in the outer peripheral surface of the rotor core, a portion of resin that defines the holder is present between the plurality of steel sheets that defines the rotor core. For this reason, the fixing strength of the rotor core and the holder improves. Additionally, since a separation between the rotor core and the holder is prevented, magnets can be easily press-fitted.
US09071105B2 Electric machine
An electrical machine is provided, comprising a stator (8) and a rotor (9). The stator comprises slots (1, 2) for receiving a coil of an electrical winding. The coil has a first number of turns (n1) in a first slot (1) and a second number of turns (n2) in a second slot (2).
US09071102B2 Permanent magnet machine having rotor and stator with magnetic surfaces of alternating ridges and valleys
The present invention is directed to the method of utilizing magnetic materials in permanent magnets and permanent magnet discs and surfaces, as a source of magnetic fields for producing rotational means, to produce a permanent magnet machine and utilizing this method to produce a powered means for use in remote pumping stations, geologic sensing stations both undersea and mountain top, remote electrical generating stations for inhabited areas of the planet off the power grid, power units for space stations, repair robots, planetary and lunar land rovers, astronomical research stations, electric generators, stabilization gyros and generators for autonomous robots, power units for motorized vehicles, and single person aircraft.
US09071101B2 High altitude, high voltage rear terminal block assembly
A disclosed terminal block assembly for a generator includes a terminal block with a base with first and second transverse terminal surfaces adjoining one another. One of the terminal surfaces includes an increased width greater than a length of a cable terminal lug for providing a lightning strike and creepage barrier. The terminal surfaces include spaced apart protrusions extending from the first and second surfaces to provide spaced apart terminal areas overlapping the first and second surfaces. First and second terminal studs are disposed within each corresponding first and second terminal areas and are electrically connected by a bus bar.
US09071098B2 Centrifugal heat dissipation device and motor using same
A centrifugal heat dissipation device and a motor using same are disclosed. The centrifugal heat dissipation device includes a main body having a shaft hole, a heat-absorption zone and a heat-transfer zone. The heat-transfer zone has a radially outer side connected to the heat-absorption zone and a radially inner side connected to the shaft hole. The shaft hole axially extends through the main body for receiving a shaft of a motor therein. A centrifugal force generated by the rotating shaft and accordingly, the heat dissipation device enables enhanced vapor-liquid circulation of a working fluid in the heat dissipation device, so that heat generated by the operating motor is absorbed by the centrifugal heat dissipation device and transferred to the shaft for guiding out of the motor, allowing the motor to have largely upgraded heat dissipation performance.
US09071072B2 Available charging/discharging current calculation method and power supply device
A method includes steps of dividing resistance R into a physical and chemical resistances Ro and Rp, obtaining corrected open-circuit voltages Vo corresponding to setting currents Ia to Ix, acquiring predicted reaching voltages Va to Vx corresponding to the setting currents Ia to Ix, and creating a current-voltage curve. The corrected open-circuit voltages Vo are obtained to predict available maximum currents I—target in a particular time t2. The predicted reaching voltages Va to Vx are acquired based on corrected physical and chemical resistances Ro and Rp, and the corrected open-circuit voltages Vo. The current-voltage curve is creased based on the setting currents Ia to Ix and the predicted reaching voltages Va to Vx to acquire upper and lower limit voltages Vmax and Vmin, and upper and lower limit currents Imax and Imin at a temperature whereby assigning these limit currents to available maximum currents I—target in charging and discharging operations, respectively.
US09071069B2 Controlled power fade for battery powered devices
A method is provided for operating a power tool having a motor powered by a battery. The method includes: delivering power from the battery to the motor in accordance with an operator input; detecting a condition of the power tool indicating a shutdown of the power is imminent; and fading the power delivered from the battery to the motor, in response to the detected condition, through the use of a controller residing in the power tool.
US09071066B2 Measurement of environmental impact of electronic devices
Devices, implementations and techniques for measuring the environment impact of electronic devices, such as CO2 emission reduction by using alternative power sources for powering or charging electronic devices.
US09071065B2 Electrical power supply apparatus and controlling method thereof
Disclosed is an electrical power supply apparatus, comprising a switch circuit, an output circuit, single-direction pass circuit and a control circuit. The output circuit is used for outputting a supply of main power source. The standby circuit is used for providing a supply of standby power source. The control circuit is for being capable of controlling the switch circuit according to a state of the external power source, wherein when the external power source is on, the switch circuit is in a cutoff state for allowing a first period or a second period of a power signal of the external power source transferred to the standby circuit through the single-direction pass circuit.
US09071060B2 Battery case for mobile device
A battery case for a mobile device is provided comprising a case, electrical components, a port, and an aperture size to contain at least one rechargeable battery. Also provided is a charger including a mount to receiving a rechargeable battery. The rechargeable battery may be configured to fit inside of the battery case. The charger may be figured to fit inside of the battery case.
US09071056B2 Apparatus and method for managing battery cell, and energy storage system
An energy storage system which balances cell voltages and a method of balancing cell voltages are disclosed. The system and method use a temperature of balancing resistors to determine a time for the balancing resistors to be selectively connected across battery cells so as to balance the battery cells.
US09071049B2 System and methods for protection of battery modules
A circuit includes multiple battery modules and protection circuits respectively coupled to the battery modules. Each protection circuit includes a controller and a shunt circuit. The controller is coupled to one of the battery modules and detects a fault associated with the battery module. The shunt circuit is coupled to the battery module and the controller, and shunts a current around the battery module if the fault associated with the battery module is detected by the controller.
US09071048B2 Voltage surge and overvoltage protection by distributed clamping device dissipation
Disclosed are various embodiments of voltage protectors that include a first voltage clamping device configured to clamp a voltage of an input power applied to an electrical load, and a second voltage clamping device configured to clamp the voltage applied to the electrical load. A series inductance separates the first and second voltage clamping devices. Also, a switching element is employed to selectively establish a direct coupling of the input power to the electrical load, where a circuit is employed to control the operation of the switching element.
US09071046B2 Methods, apparatuses and systems for monitoring for exposure of electronic devices to moisture and reacting to exposure of electronic devices to moisture
Systems and methods for monitoring the moisture to which an electronic device is exposed may alter or vary operation of the electronic device. Operation of the electronic device may be altered or varied to provide a notification that the electronic device has been exposed to moisture. When an electronic device is exposed to moisture, an operational mode of the electronic device may be changed. A change in the operational mode of the electronic device may include termination of the supply of power to one or more components, which may protect those components. Programs or apps that provide a user of the electronic device with information regarding exposure of the electronic device to an amount of moisture that meets or exceeds a moisture response threshold are also disclosed.
US09071039B2 Optical device structure using GaN substrates for laser applications
An optical device includes a gallium nitride substrate member having an m-plane nonpolar crystalline surface region characterized by an orientation of about −1 degree towards (000-1) and less than about +/−0.3 degrees towards (11-20). The device also has a laser stripe region formed overlying a portion of the m-plane nonpolar crystalline orientation surface region. In a preferred embodiment, the laser stripe region is characterized by a cavity orientation that is substantially parallel to the c-direction, the laser stripe region having a first end and a second end. The device includes a first cleaved c-face facet, which is coated, provided on the first end of the laser stripe region. The device also has a second cleaved c-face facet, which is exposed, provided on the second end of the laser stripe region.
US09071034B2 Laser device
The invention relates to a laser device comprising at least three linear laser gain volumes (12) for a gas to be excited, connecting elements (20) for connecting adjacent laser gain volumes, the laser gain volumes being mechanically coupled to other, and forming a common volumetric space, excitation means (50) for the laser gain volumes for exciting the gas in the laser gain volumes for generating a laser light, mirrors (22) arranged in the connecting elements for reflecting laser light between the laser gain volumes, a totally reflecting rear mirror (44), and a partially reflecting output coupler (42) for coupling out a laser beam. The laser gain volumes are arranged in the shape of an open or closed ring surrounding a free central space (8) between them. The invention also relates to a method for marking an object.
US09071032B2 Sub-mount having photodiode and light-emitting element module
A sub-mount having a photodiode region, includes a photodiode which has a first conductivity-type layer arranged in a surface portion of the sub-mount of the photodiode region to form a light-receiving surface and a second conductivity-type region arranged below the first conductivity-type layer and is configured to receive at the light-receiving surface a light emitted from a light-emitting element and convert the light into a photocurrent. A peak light-receiving wavelength at which the photocurrent of the photodiode becomes its maximum value is more than or equal to a minimum emission wavelength of the light-emitting element and less than or equal to a maximum emission wavelength of the light-emitting element.
US09071028B2 Electrical connection between two busbars made of flat conductors and of an insulating layer disposed between the conductors
The disclosure relates to an electrical connection between two busbars made of flat conductors and an insulating layer disposed between the conductors at the opposite longitudinal edges of the two busbars. The two conductors of each busbar run parallel to each other at a distance on the longitudinal edge thereof, wherein a molded part made of electrically insulating material bridges the distances between the conductors of the two busbars. Electrically conductive contact elements, forced against each other but electrically insulated from each other, each contact one of the conductors of each busbar by means of structured contact surfaces and clamp the same between the element and the molded part, wherein the contact surfaces for the conductors of the two busbars including clamping protrusions running parallel to the longitudinal edges.
US09071027B2 Command inverter for a bicycle gearshift control device
A command inverter for at least one bicycle gearshift control device. The inverter has a first interface with an electronic gearshifting control unit that includes a first plurality of electrical terminations; and, a second interface that includes a second plurality of electrical terminations; wherein at least one electrical termination of the first interface is not electrically connected to an electrical termination of the second interface.
US09071026B2 Energy-saving control device and energy-saving control method and power adapter including the same
The present disclosure provides an energy-saving control device, the control method and a power adapter including the energy-saving control device. The energy-saving control device comprises a mechanical switch having a first end and a second end, wherein the second end is an output end of the switch; a controller of which an input terminal is connected to the output end of the mechanical switch and an output terminal outputs a switching control signal; and a power converter for receiving the switching control signal from the controller, wherein the power converter is operated according to the switching control signal. When a connection cable is plugged into or removed from a cable interface, the first end and the second end of the mechanical switch are contacted or separated.
US09071025B2 Socket for electronic components
A socket for electronic components includes a shield plate assembly that is formed by combining first shield plates with second shield plates in the form of a lattice and has conductivity, and contact units electrically connected to electrode terminals of electronic components are disposed in openings of the lattice of the shield plate assembly so that the electrode terminals are electrically connected to the wiring of a wiring board. The shield plate assembly is formed in a shape where lines where openings of the lattice are lined up in a first direction are arranged side by side in a second direction orthogonal to the first direction, and the openings of the adjacent lines are formed so as to be shifted relative to the openings of the next lines in the first direction by a half of the length of the side of the opening that extends in the first direction.
US09071024B2 Shield shell with first and second attachment pieces
A shield shell (21) covering a connector housing (11) includes a first attachment piece (23) in contact with a first attached surface (71) of an attached portion (70) having a hole (71a) for the connector housing (11), and a second attachment piece (25) projecting from an end portion (24) of the first attachment piece (23) to an opposite side to the first attached surface (71) and being in contact with a second attached surface (72) of the attached portion (70). The second attachment piece (25) is fastened to the second attached surface (72) so that the second attachment piece (25) is in elastic contact with the second attached surface (72) with an elastic restoring force bringing the first attachment piece (23) into pressure contact with the first attached surface (71).
US09071023B2 Device connector
A device connector includes a first housing (20) accommodating first terminals (30) connected to terminals of a device and a second housing (40) accommodating second terminals (55) connected to ends of wires (50) and connectable to the first housing (20). Connecting portions (31, 56) of the first and second terminals (30, 55) are placed one over the other and bolted as the housings (20, 40) are connected. The first housing (20) has a work hole (34) for bolting the connecting portions (31, 56) of the terminals (30, 55) together. A metal shield shell (60) covers the connected housings (20, 40) and is bolted to a case (10) at three mounting portions (65, 66) and (97) arranged on an outer part of the shield shell (60) to form a triangle having substantially equal sides.
US09071022B2 Power plug having a universal serial bus port for an electrical appliance
A power plug includes a main body, at least two prongs, and a cable. The main body has a universal serial bus port for receiving a universal serial bus plug. The prongs are disposed on the main body for receiving a power, and the prongs are configured to be insertable into an alternating current source. The cable is disposed on the main body and electrically connected to the prongs, and the cable is electrically connected to the power input end of the electrical appliance.
US09071021B2 Spring lock type connector
A spring lock connector has a male connector (M) with a cylindrical front receptacle (52) and a female connector (F) with a terminal accommodating portion (12) to be fit into the front receptacle (52) and on an outer peripheral side of the front receptacle (52). A spring (40) is mounted on the female connector (F) and spreads as the female connector (F) is connected to the male connector (M). The spring (40) includes engaging portions (43) arranged in an entrance path for the front receptacle (52). Guides (57) are provided on an opening edge of the front receptacle (52) and move onto the engaging portions (43) if a connecting operation is performed in proper connecting postures. Parts of the opening edge of the front receptacle (52) other than the guides (57) contact the engaging portions (43) to prevent connection if the connecting operation is performed in improper connecting postures.
US09071020B2 Locking system for a plug coupling device arranged on a motor vehicle, a charging station or a wall
The invention relates to a locking system for a plug coupling device and to a plug coupling device having a housing in which the locking system according to the invention is arranged. A plug having a projection, which may for example be a guide pin of a commercially available safety plug, can be coupled to the plug coupling device by means of the locking system according to the invention, wherein a locking device in the form of a slider engages behind the projections of the plug such that the plug coupled to the plug coupling device cannot be removed from the plug coupling device. In addition, the locking device being in the locking position prevents an unauthorized insertion of a plug into the plug coupling device.
US09071018B2 Removable media with latch
A removable case is provided with a latch that allows users to remove the case from a memory card slot or peripheral interface slot of an electronic device. The removable case can be used to enclose removable media or peripheral devices, such as wireless network interface controllers. When inserted into the memory card slot or peripheral interface slot, the removable case is designed to sit flush with the surface the electronic device.
US09071017B2 Lever connector
A lever connector includes a female connector, a male connector and a lever. The female connector includes a frame having a flange portion protruding toward a straight direction perpendicular to a direction in which the female connector and the male connector are to be fitted with each other. The flange portion includes a locking portion with flexibility. The lever includes a locked portion locked with the locking portion in a normal fitted state. The locking portion does not abut on a hole edge of an attachment hole formed on a panel in a state where the locked portion is locked with the locking portion, and abuts on the hole edge of the attachment hole in a state where the locked portion is not locked with the locking portion.
US09071014B2 Connector
A connector of the invention includes first and second conducting parts and a coupling part. The coupling part couples ends of the first and second conducting parts to allow the first and second conducting parts to turn from a closed position, in which the first and second conducting parts sandwich therebetween a conductor having flexibility, to an open position, in which the first and second conducting parts release the conductor. At least one of the first and second conducting parts includes a locking projection. The locking projection is configured to swing in accordance with the turning of the one of the conducting parts and pass through the conductor. The locking projection is of a curved form conforming to a swing track of the locking projection.
US09071013B2 Electrical plug and mating pair of electrical connectors having a location slot for engagement
An electrical plug comprising: a connector body having a first and second axial end, the first axial end electrically connectable in use to a jack; a ferrule extending from the second axial end of the connector body, to which a cable is electrically and/or physically connectable in use; and an elongate sleeve rotatably mounted on the connector body and having a first and second axial end, wherein the first axial end of the sleeve has at least one bayonet slot for engagement, in use, with a respective lug of a jack, and the second axial end of the sleeve terminates at the second axial end of the connector body, such that the sleeve substantially encloses the connector body.
US09071010B2 Tight bend-radius cable structures and methods for making the same
Tight bend-radius cable structures and methods for making the same are disclosed. Tight bend-radius cable structures can include a cable electrically and physically coupled to a connector. An inner strain-relief member can be coupled to the cable and the connector to provide protection and strain relief for connection between the connector and the cable. The cable can then be manipulated into a final configuration, and an outer strain-relief member can be coupled to the cable and connector to hold the cable in its final configuration.
US09071008B2 Cable connection system
A cable connection system for connecting a metal jacketed electrical cable with a primary housing, including a socket electrical connector contained within a primary housing bore, a pin electrical connector connected with the cable, a rigid electrical insulating sleeve extending between the pin electrical connector and the metal jacket, and a primary housing compression fitting for mechanically connecting the cable with the primary housing. The cable connection system may further include a secondary housing mechanically connected with the primary housing and a secondary housing compression fitting for mechanically connecting the cable with the secondary housing. A method for assembling the cable connection system including preparing the cable and the pin electrical connector for use, extending the pin electrical connector through the compression fittings and the housing bores to electrically connect the pin electrical connector and the socket electrical connector, connecting the housings, and tightening the compression fittings.
US09071007B2 Connector with grommet
A connector is configured so that a fitting part of a connector housing and a panel is sealed by bringing a lip part of a flange attachment part of a waterproof grommet for surrounding an outer periphery of a flange into pressing contact with the peripheral edge of an attachment hole when the peripheral edge of the attachment hole is held between a locking protrusion of a housing body and the flange provided at a rear end of the housing body. In the connector, the flange includes a plurality of flexible pieces which elastically displaces the lip part to the side of the locking protrusion so as to expand a proper plate thickness range of the panel capable of making close contact with the lip part.
US09071006B2 Seal structure for electronic control apparatus
A seal structure includes a connector-lower-surface-side flat seal portion constituted by a surface-joint portion between a lower surface of a connector and a lower housing member; and a groove seal portion constituted between a groove and a protrusion fitted into the groove. The groove is provided in one of inner surfaces of outer circumferential edge portions of an upper housing member and the lower housing member. The protrusion is provided in another of these inner surfaces. The seal structure further includes a linking seal portion connecting the connector-lower-surface-side flat seal portion with the groove seal portion. The linking seal portion includes a deep-bottom portion having a seal groove continuous with the groove seal portion, a shallow-bottom portion having a seal groove shallower than the seal groove of the deep-bottom portion and continuous with the connector-lower-surface-side flat seal portion, and a connecting portion linking the deep-bottom portion to the shallow-bottom portion.
US09071005B2 Terminal block and electronic device comprising same
To improve airtightness while reducing a usage amount of a resin for a sealing operation. A terminal block 20 of an electronic device 100 includes a resinous portion 21, a terminal member 23, and a connection member 25. Then, since a first area A1 and a second area A2 are divided by a partition wall 273 in the terminal block 20, it is possible to individually charge a charging resin 29A for blocking a through-hole A22 and a charging resin 29B for blocking a boundary portion between the terminal member 23 and the resinous portion 21. Thus, since the charging amounts of the charging resins 29A and 29B may be respectively adjusted, it is possible to appropriately charge the charging resin for improving the airtightness and to reduce the usage amount of the charging resin for a sealing operation.
US09071003B2 Plug-in connector for high data transmission rates
A so-called QSFP-plug-in connector is suggested for high performance-plug-in connections in data centers, which comprises a one-piece metallic exterior housing and in which a one-piece locking device is embodied, which via a latch attached thereat can be released from an appropriately embodied cage-like counter connector.Here, a circuit board is provided for the direct plug-in connection in copper-based twin-axial cable connections which is connected inside the exterior housing with electric conductors arranged therein. The electric conductors are held in axially aligned grooves via a fixing clip encompassing them.
US09070998B2 High speed electrical contact assembly
A contact assembly that comprises a conductive outer body that defines an outer perimeter and an insulative insert body that is receivable in that outer body. The insert body supports first and second contacts in a spaced arrangement. The insert body includes an area that surrounds the conductors between the conductors and the outer perimeter of the outer body, wherein the distance between the conductors and the outer perimeter of the outer body defined by the area of the insert body is substantially constant.
US09070997B2 Mining cable couplers
A mining cable coupler includes a hollow body with an entrance fitting for an electrical cable at the a end of the body and an electrical connector mounting member having a plurality of electrical connector receiving apertures adjacent a second end of the body with electrical connectors mounted in corresponding ones of the receiving apertures. At least one of the electrical connector includes an elongate electrical conductor that has an exposed face at an end of the hollow body. An insulating material surrounds the electrical conductor. The insulating material defines a radiussed region on the exposed end face of the electrical connector that provides electrical stress relief at the exposed end face. The end of the electrical conductor with the exposed face includes either an electrically conductive pin portion protruding from the end face or a mating electrically conductive socket portion having an opening in the end face.
US09070995B2 Connector unit
A connector unit which prevents a user from contacting a first terminal fitting when fitting a first connector and a second connector together is provided. A connector unit 20 includes a first connector 1 having a first housing 4 receiving a first terminal fitting 3 and a contact-preventive housing 51 disposed between the first terminal fitting and the first housing, and a second housing to be fitted to the first housing. The contact-preventive housing includes a tension spring 6 having one end fixed at an outer circumference of the contact-preventive housing and the other end being a free-end arranged to engage to the first housing to restrict the contact-preventive housing from sliding. The second housing includes an entering portion 12 which enters between the tension spring and the first housing and pushes the tension spring to disengage the tension spring to permit the contact-preventive housing to slide.
US09070991B2 System and method for insulating wire terminations
A method for insulating wires is disclosed. A portion of the plurality of wires and an insulating material are placed in a tube having an open end. Pressure is applied to the tube. During the application of pressure, the tube, the plurality of wires, and the insulating material are heated to a temperature above a melting point of the insulating material. As a result, the insulating material is melted and driven toward the open end of the tube. Upon removal of the heat, the insulating material solidifies and forms a barrier proximal to the open end of the tube.
US09070989B2 Terminal connection joint and terminal block
A terminal block includes a terminal portion having an end surface formed with a screw hole and a peripheral surface, a terminal connection joint including a tubular portion having an inner peripheral surface which faces the peripheral surface of the terminal portion, a contact portion having a first contact surface which comes into contact with the end surface of the terminal portion and a second contact surface which comes into contact with a plate-like terminal and a clamping portion for clamping the plate-like terminal between the contact portion and the clamping portion, a fixing bolt including an externally threaded portion to be threadably engaged with the screw hole and a head portion for pressing the clamping portion in a direction to press the plate-like terminal. The contact portion is configured to press the plate-like terminal by being elastically supported on the tubular portion.
US09070985B2 Mobile device and antenna structure therein
A mobile device includes a metal body element, a feeding element, and a second antenna. The metal body element is substantially a planar structure and has a slot, wherein a first antenna is formed by the slot of the metal body element. The feeding element extends across the slot of the metal body element, and is coupled to a first signal source. The second antenna is substantially located inside the slot of the metal body element, and is coupled to a second signal source. The slot is used as a portion of a resonant structure of the second antenna in order to reduce a total size of the first antenna and the second antenna.
US09070979B2 Booster antenna for a chip arrangement, contactless smart card module arrangement and chip arrangement
In various embodiments, a booster antenna for a chip arrangement, for example a smart card, is provided. The booster antenna can have: a first electrical circuit, which forms a first resonant circuit with a phase resonance; and a second electrical circuit, which forms a second resonant circuit with a phase resonance and/or absolute resonance; wherein the first electrical circuit and the second electrical circuit are coupled to one another.
US09070973B2 Control vehicle for a road toll system
A control vehicle for a road toll system on the basis of vehicle-mounted onboard units which can be polled via DSRC radio communications, with the control vehicle comprising at least one DSRC transceiver with at least two antenna systems, which are distributed with a mutual distance over the longitudinal direction of the control vehicle, for polling a passing on-board unit.
US09070968B2 Methods for characterizing tunable radio-frequency elements in wireless electronic devices
A wireless electronic device may contain an antenna tuning element for tuning the device's operating frequency range. The antenna tuning element may include radio-frequency switches, continuously/semi-continuously adjustable components such as tunable resistors, inductors, and capacitors, etc. A test system may be used to measure the radio-frequency characteristics associated with the tuning element assembled with an electronic device. The test system may include a test host, a test chamber, a signal generator, power meters, and radio-frequency testers. The electronic device under test (DUT) may be placed in the test chamber. The signal generator may generate radio-frequency test signals for energizing the antenna tuning element. The power meters and radio-frequency testers may be used to measure conducted and radiated signals emitted from the DUT while the DUT is placed in different desired orientations. A phantom object is optionally placed in the vicinity of the DUT to simulate actual user scenario.
US09070967B2 Antenna and combination antenna
Provided are an antenna and a combination antenna having a wide directivity in a predetermined plane direction. The antenna 100 is configured to have rims 111, 112 at left and right ends of a dielectric substrate 101 in the X direction in such a manner as to sandwich antenna elements 10. The rims 111, 112 may be metal plates or EBGs. As the rims 111, 112 are thus provided at both sides to sandwich the antenna elements 10, it is possible to reduce the width of the dielectric substrate 101 of the antenna 100 required for realizing wide coverage. As a result, it is possible to create a greater space for integration of another RF circuit and improve the space factor.
US09070961B2 High-frequency circuit package and sensor module
Shielding of high-frequency circuits is achieved using a simple and inexpensive configuration not using any lid. A high-frequency circuit mounting substrate (20) is disposed, on an underside surface layer of which are disposed high-frequency circuits (21 and 22) and is formed a first grounding conductor that has same electric potential as grounding conductors of the high-frequency circuits and that surrounds the high-frequency circuits. A mother control substrate (3) is disposed, on which the high-frequency circuit mounting substrate (20) is mounted in such a way that the high-frequency circuits are sandwiched therebetween and on which a second grounding conductor is formed in a region facing the high-frequency circuits. Plural first lands are formed on the first grounding conductor of the high-frequency circuit mounting substrate (20) to surround the high-frequency circuits. Plural second lands are formed that are electrically connected to the second grounding conductor at positions on a surface layer of the mother control substrate (3) which face the first lands. Plural solder balls (30G2) are disposed for connecting the first lands and the second lands. The high-frequency circuits are housed in pseudo shielding cavities surrounded by the solder balls (30G2), the grounding conductors of the high-frequency circuits, and the first and second grounding conductors.
US09070959B2 Connection unit
A connection unit includes: a ceramic substrate; a first signal line on the ceramic substrate; a first grounded conductor on the ceramic substrate and electromagnetically coupled to the first signal line; a first lead pin having a first end connected to an upper surface of the first signal line and a second end protruding beyond the ceramic substrate; a second lead pin having a first end connected to an upper surface of the first grounded conductor and a second end protruding beyond the ceramic substrate; a flexible substrate including an insulating layer through which the first and second lead pins penetrate, a second signal line on a first major surface of the insulating layer and connected to the second end of the first lead pin, and a second grounded conductor on a second major surface of the insulating layer and connected to the second end of the second lead pin.
US09070953B2 Zinc-air secondary battery having inorganic solid electrolyte body
Provided is a zinc-air secondary battery capable of preventing both of the short-circuiting between positive and negative electrodes caused by zinc dendrites and the carbon dioxide incorporation. This zinc-air secondary battery includes an air electrode (12) functioning as a positive electrode; an inorganic solid electrolyte body (14) provided in direct contact with one side of the air electrode and having hydroxide ion conductivity; a metal negative electrode (16) provided opposite to the air electrode with respect to the inorganic solid electrolyte body and comprising zinc or a zinc alloy; and an electrolyte solution in which the metal negative electrode is immersed, the electrolyte solution being separated from the air electrode by the inorganic solid electrolyte body.
US09070951B2 Solvent for nonaqueous electrolyte solution of lithium secondary battery
The present invention provides a solvent for a nonaqueous electrolyte solution enabling a lithium secondary battery to exhibit an excellent discharge capacity, load characteristics, and cycle characteristics even under high voltages, as well as a nonaqueous electrolyte solution that uses this solvent and a lithium secondary battery. This solvent for a nonaqueous electrolyte solution is a solvent for a nonaqueous electrolyte solution for a lithium secondary battery, wherein the solvent for a nonaqueous electrolyte solution contains a fluorine-free cyclic carbonate (I), a fluorine-free chain carbonate (II), and a 1,1-di(fluorinated alkyl)ethylene carbonate (III), and wherein with a sum of (I), (II), and (III) being 100 volume %, the fluorine-free cyclic carbonate (I) is 10 to 50 volume %, the fluorine-free chain carbonate (II) is 49.9 to 89.9 volume %, and the 1,1-di(fluorinated alkyl)ethylene carbonate (III) is from at least 0.1 volume % to not more than 30 volume %.
US09070950B2 Power storage element, manufacturing method thereof, and power storage device
Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.
US09070947B2 Pouch type secondary battery and method for manufacturing the same
Provided are a pouch type secondary battery capable of preventing corrosion of a metal layer due to exposure of the metal layer to the outside at a distal end of a case thereof, and a method for manufacturing the same.
US09070946B2 Electrolyte-electrode joined assembly and method for producing the same
In an electrolyte-electrode joined assembly (MEA), a cathode is formed on an intermediate layer stacked on a solid electrolyte. The cathode is a laminate containing at least a first layer facing the intermediate layer and a second layer disposed on the first layer. The first layer contains a perovskite-type composite oxide represented by BaxSr1-xCoyFe1-yO3 or LaxSr1-xCoyFe1-yO3. The intermediate layer has an open pore on a surface thereof facing the first layer, and the pore is filled with the first layer.
US09070945B2 Metal fluoride and phosphate nanocomposites as electrode materials
The present invention relates to primary and secondary electrochemical energy storage systems. More particularly, the present invention relates to such systems as battery cells, especially battery cells utilizing metal fluorides with the presence of phosphates or fluorophosphates, which use materials that take up and release ions as a means of storing and supplying electrical energy.
US09070944B2 Particle synthesis apparatus and methods
Apparatus and methods of forming a battery-active material are described. An apparatus includes a first processing section that raises the temperature of a precursor material to a reaction threshold temperature, a second processing section that converts the precursor material to a battery-active material, and a third processing section that cools the resulting battery-active material. Each of the processing sections may be a continuous flow tubular component. The first and third processing sections may be metal, and the second processing section may be a refractory material for high temperature service. The battery-active material is collected using a solids collector.
US09070943B2 Anode active material including a multilayer metal nanotube, anode including the anode active material, lithium battery including the anode, and method of preparing the anode active material
An anode active material, an anode including the anode active material, a lithium battery including the anode, and a method of preparing the anode active material. The anode active material includes: a multilayer metal nanotube including: an inner layer; and an outer layer on the inner layer, wherein the inner layer includes a first metal having an atomic number equal to 13 or higher, and the outer layer includes a second metal different from the first metal.
US09070942B2 Nanocomposite of graphene and metal oxide materials
Nanocomposite materials comprising a metal oxide bonded to at least one graphene material. The nanocomposite materials exhibit a specific capacity of at least twice that of the metal oxide material without the graphene at a charge/discharge rate greater than about 10 C.
US09070940B2 Lithium secondary battery and method for manufacturing the same
A lithium secondary battery with superior cycle performance is provided. The lithium secondary battery includes a negative electrode including a negative electrode active material layer disposed on a negative electrode current collector and containing negative electrode active material particles, negative electrode conductor particles, and a negative electrode binder; a positive electrode containing a positive electrode active material; and a non-aqueous electrolyte. The concentration of the negative electrode conductor particles in a surface layer of the negative electrode active material layer facing away from the negative electrode current collector is higher than the concentration of the negative electrode conductor particles in a center of the negative electrode active material layer.
US09070938B2 Terminal lead
A terminal lead 1 includes an inner end portion 1a to be arranged inwardly of an exterior casing 9 which accommodates an electrochemistry element 6, an outer end portion 1b to be arranged outwardly of the exterior casing 9, and a plate-shaped metallic substrate 2 as a base material. An insulating resin film 4 is arranged at a portion of the terminal lead 1 corresponding to a seal portion 9x of the exterior casing 9. In this terminal lead 1, a surface coating layer 3 is formed on both surfaces 2p and 2p of the metallic substrate 2 in a thickness direction thereof. A coated amount of both widthwise end portions 3a and 3a of the surface coating layer 3 formed on both surfaces 2p and 2p of the metallic substrate 2 in the thickness direction is less than that a widthwise intermediate portion 3b thereof.
US09070937B2 Fuel cell systems and related arrangements for limiting relative motion between fuel cells
Fuel cell systems (10) and related methods for limiting fuel cell slippage are provided. A stacked plurality of adjacent fuel cells (14) collectively forming a fuel cell stack (12). The fuel cells each include a pair of first and second plates (30, 30′, 30″; 32, 32′, 32″) at respective opposite ends thereof. A first fuel cell has a first plate (30, 30′, 30″) in engagement with a second plate (32, 32′, 32″) of a second fuel cell adjacent to the first fuel cell. A slip mitigation arrangement (50, 50′, 50″) between at least one of the pairs of the first and second fuel cells comprises first and second seats (62, 62′, 62″; 64, 64′, 64″) recessed in the engagement surfaces of the first and second conductive plates respectively, and a key member (60, 60′, 60″) having opposite ends seated in the first and the second recessed seats such that relative movement between the first and the second fuel cells is limited.
US09070936B2 Thermal electrochemical cell
Technologies are generally described for methods and systems for implementing a thermal electrochemical cell. Some example electrochemical cells described herein may comprise a first container including a first electrode and an electrolyte effective to receive electrons from the first electrode. Some electrochemical cells may further comprise a second container including a second electrode and an aqueous suspension including zinc oxide nanoparticles. Some electrochemical cells may also further comprise a contact member in between the first container and the second container.
US09070932B2 Carbon electrodes
A self-supporting carbon electrode can include, or consist essentially of, nanostructured carbon, for example, oxygen-functionalized nanostructured carbon.
US09070927B2 Exterior member for battery element and non-aqueous electrolyte secondary battery using the same
An exterior member for a battery element includes: a first sheet piece made of a laminated sheet; a second sheet piece made of a laminated sheet; a bending part for partitioning the first sheet piece and the second sheet piece from each other; a sealing part which is formed by a peripheral part of the first sheet piece and a peripheral part of the second sheet piece corresponding to the peripheral part of the first sheet piece and which hermetically seals a battery element; and a thick-walled part formed so as to include at least a part of the bending part.
US09070925B2 Battery charger and battery charger attaching structure
Provided are a battery charger, which is a different body from a vehicle and the durability, performance, etc., of which are maintained, and a battery charger attaching structure. The battery charger attaching structure comprises: a battery; a battery charger being a different body from a vehicle and charging the battery; an electric motor for generating driving force on the basis of the power supplied from the battery; vehicle covers for covering the vehicle; and an attachment portion provided on the vehicle covers and used for attaching the battery charger on the side of the vehicle. The attachment portion is provided at an upper part on a leg shield.
US09070924B2 Battery cover release
An assembly can include a chassis that includes a processor, a memory device with memory accessible by the processor, a battery bay and a cover seat; a cover securable in a seated state with respect to the cover seat to cover the battery bay; and an automatic release mechanism automatically actuatable by an increase in battery volume of a lithium battery disposed in the battery bay to release the cover from its seated state. Various other apparatuses, systems, methods, etc., are also disclosed.
US09070921B2 Subzero ambient shutdown purge operating strategy for PEM fuel cell system
A method for purging water from a fuel cell stack at fuel cell system shutdown. The method includes determining a stack water generation request to control the rate of drying of membranes in the stack and determining a cathode catalytic heating water generation request. A maximum charge a battery in the fuel cell system can accept is also determined. An ancillary power request for powering components of the fuel cell system during shutdown is determined. The method allocates how much of the water generation request will be fulfilled by operating the fuel cell stack to charge the battery and to provide the power needed for the ancillary power request, and how much of the water generation request will be fulfilled by cathode catalytic heating that produces water and heat in a cathode side of the fuel cell stack.
US09070918B2 Module level redundancy for fuel cell systems
This disclosure relates to module level redundancy for fuel cell systems. A monitoring component monitors a set of operational parameters for a fuel cell group. The fuel cell group includes a set of fuel cell units, each having a set of fuel cell stacks. The fuel cell stacks include a set of gas powered fuel cells that convert air and fuel into electricity using a chemical reaction. The monitoring component determines that the set of operational parameters do not satisfy a set of operational criteria, and, in response, a load balancing component adjusts the electrical output capacity of the set of fuel cell units included in the fuel cell group.
US09070914B2 Method of controlling water content of fuel cell and fuel cell system
The present invention is to properly adjust a water content in a cell of a fuel cell in response to a wide variety of conditions. A method of controlling a water content in a cell of a fuel cell, wherein a flow rate and pressure of a hydrogen gas supplied to an anode electrode of the cell of the fuel cell are adjusted so as to satisfy a restrictive condition in order to control a water content in the cell of the fuel cell. A water content state in the cell is detected and, based on the detection result, a flow rate and pressure of the hydrogen gas are adjusted so that a water content in the cell equals a target water content.
US09070909B2 Stack for fuel cell system
A stack for a fuel cell system, including: a membrane electrode assembly, a separator that includes a fuel passage that supplies a fuel to an anode electrode of the membrane electrode assembly and an oxidant passage that supplies an oxidant to a cathode electrode of an adjacent membrane electrode assembly, a first manifold that is formed by connecting first penetration holes that penetrate the separator in a stacking direction and that is connected to the fuel passage, a second manifold that is formed by connecting second penetration holes that penetrate the separator in the stacking direction and that is connected to the oxidant passage and a baffle that is disposed in at least one of the first manifold and the second manifold. The baffle has a membrane structure to control the fluid flow inside of the at least one of the first manifold and the second manifold.
US09070908B2 Battery system, controlling method of the same, and energy storage system including the battery system
A battery system includes a rack having a plurality of battery tray positions, a battery tray in a corresponding battery tray position among the battery tray positions, and a system management unit electrically coupled to the battery tray. Each of the battery tray positions is associated with position information, and the battery tray has an identifier. The system management unit is configured to receive and store the position information and the identifier, and to determine the corresponding battery tray position of the battery tray in accordance with the identifier and the position information.
US09070905B2 Organic electronic device manufacturing method and organic EL device manufacturing method
A manufacturing method including: forming a first electrode; forming a first bank; forming a first organic functional film; forming a second bank; forming a second organic functional film; and forming a second electrode. In the forming of the second bank, the second bank is formed such that, in plan view, a bottom edge of a sidewall surface of the second bank facing the second aperture is located at the same position as or is set back from a bottom edge of a sidewall surface of the first bank facing the first aperture. In the forming of the second organic functional film, the droplet of the second ink is applied such that an upper edge of the second organic functional film within the second aperture is located at a same level as or at a higher level than the bottom edge of the sidewall surface of the second bank.
US09070904B2 Method of manufacturing organic light emitting diode display
An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.
US09070903B2 Inorganic oxide thin film and method for preparing the same
A quantum-dots containing multi-component inorganic oxide thin film is provided to include an amorphous inorganic oxide bulk region and a plurality of crystalline inorganic oxide regions, wherein the crystalline inorganic oxide regions are discontinuously formed to be surrounded by the amorphous inorganic oxide of the bulk region.
US09070901B2 OLED device with macro extractor
The invention relates to an OLED device with a stack comprising: a light emitting organic layer (2), a cathode layer (1), and a transparent anode layer (3), the organic layer (2) being arranged between the cathode layer (1) and the anode layer (3), wherein a macro extractor layer (5) is arranged on top of a transparent substrate (4), wherein the macro extractor in optical contact with the transparent substrate (4), and wherein the macro extractor (5) layer comprises a plurality of mirror surfaces which extend from the bottom to the top of the macro extractor layer (5), preferably embedded in a matrix which has a refractive index matching the one of the transparent substrate. Preferably, the macro extractor layer comprises a crash glass device with a pre-stressed crash glass pane (6) having air-filled cracks (9). Since these cracks (9) act as mirrors for the light emitted by the organic layer (2), trapping of light is avoided and, thus, light extraction from the device is enhanced.
US09070899B2 Organic electroluminescent element
An organic electroluminescent element in accordance with the present invention includes: a transparent electrode; a blue light-emitting layer containing a blue light-emitting material having a maximum emission wavelength 460 nm or less; a first green light-emitting layer containing a first green light-emitting material having a maximum emission wavelength in the spectrum between 460 nm and 610 nm; a red light-emitting layer containing a red light-emitting material having a maximum emission wavelength of 610 nm or more; a second green light-emitting layer containing a second green light-emitting material having a maximum emission wavelength in the spectrum between 460 nm and 610 nm; and a reflecting electrode. The maximum emission wavelength of the first green light-emitting material is located on a short wavelength side of the spectrum. The maximum emission wavelength of the second green light-emitting material is located on a long wavelength side of the spectrum.
US09070895B2 OLED package and packaging method thereof
There is provided an OLED package including a substrate, a lighting component, a compound barrier layer, a moisture absorption zone and an inorganic barrier layer. The lighting component is formed on the substrate. The compound barrier layer completely seals the lighting component configured to block moisture and oxygen. The moisture absorption zone is formed on the substrate surrounding the compound barrier layer and is not formed upon the lighting component. The inorganic barrier layer completely seals the compound barrier layer and the moisture absorption zone configured to block moisture and oxygen.
US09070894B2 Light emitting device
The present invention provides a light-emitting device comprising a first light-emitting element that emits red light, a second light-emitting element that emits green light, a third light-emitting element that emits blue light, and a color filter, where the color filter comprises a first coloring layer that selectively transmits red light, a second coloring layer that selectively transmits green light, and a third coloring layer that selectively transmits blue light, the first to third light-emitting elements respectively correspond to the first to third coloring layers, wherein each of the first to third light-emitting elements has a first electrode, an electroluminescent layer on the first electrode, and a second electrode on the electroluminescent layer, and wherein the electroluminescent layer includes a layer in contact with the second electrode, and a metal oxide or a benzoxazole derivative is included in the layer in contact with the second electrode.
US09070891B2 White color light of organic light emitting diode
A white color light source of an organic light emitting diode is provided and is suitable for irradiating on plants. The white color light source includes a first color light and a second color light. A peak in the frequency spectrum of the first color light is within a first wavelength range. A peak in the frequency spectrum of the second color light is within a second wavelength range. The white color light source is at least formed by mixing the first color light and the second color light, wherein an intensity of a frequency spectrum of a wavelength range from 520 nm to 580 nm is substantially equal to or less than 20% of a total intensity of a frequency spectrum of the white color light source.
US09070890B2 Pixel and organic light emitting display device having the same
A pixel of an organic light emitting display device includes a transistor configured to output a first source voltage, an organic light emitting diode coupled to the transistor, and a wiring configured to be applied with a reference voltage to ground a leakage current of the transistor. The organic light emitting diode includes a first electrode configured to receive the first source voltage, a first common layer on the first electrode, an organic light emitting layer on the first common layer, and a second electrode on the organic light emitting layer and configured to be applied with a second source voltage different from the first source voltage. The first common layer is coupled to the wiring.
US09070889B2 OLED display having organic and inorganic encapsulation layers, and manufacturing method thereof
An organic light emitting diode (OLED) display a includes: a substrate; an organic light emitting element on the substrate and including a first electrode, a light emission layer, and a second electrode; and an encapsulation layer on the substrate while covering the organic light emitting element. The encapsulation layer includes an organic layer and an inorganic layer. A mixed area, where organic materials forming the organic layer and inorganic materials forming the inorganic layer co-exist along a plane direction of the encapsulation layer, is formed at the boundary between the organic layer and the inorganic layer.
US09070885B2 Anthracene compound and organic electroluminescence element using same
Provided is an organic electroluminescence element having superior element service life. An anthracene compound in which an aryl group having C10 or greater is bonded to the 9-position and a naphthyl group is bonded to the 10-position, wherein a compound in which a specific aryl group has been substituted, in particular, at the 7-position of the naphthyl group (which is bonded at the 2-position thereof to the anthracene) is used as a material for a luminescence layer to produce the organic electroluminescence element.
US09070880B2 Method of manufacturing a tape cast multilayer sonar transducer
A manufacturing process provided herein pertains to a single-piece, multi-layer piezoelectric stack in a sonar transducer element utilized in acoustic arrays requiring many thousands of elements. A slurry formed by mixing ceramics, powders, and binders is filtered, dried and cast into a thin film on a moving substrate. When the film has dried, it is removed from the substrate and layered into piezoelectric stacks. Screening a pattern of conductive platinum ink onto a desired layer forms electrodes. Applied heat and pressure forms a unitary body with electrically accessible layers. Burning removes the binders and sintering produces a final density. Dicing the body exposes the desired electrode polarities. A strip of conductive material is applied to connect the electrodes of like polarity and the ceramic parts are polarized. The transducer elements may be arrayed to conform to the curved surfaces such as a ship's hull.
US09070876B2 Variable resistance element and semiconductor storage device
A variable resistance element is formed by sandwiching a metal oxide layer whose resistance changes between a pair of electrodes and the metal oxide layer includes a pair of variable resistance layers whose resistances change by formation of a current path and a branching suppression layer which is sandwiched between the variable resistance layers and suppresses branching of the current path.
US09070873B2 System and method for sensing torque and angular position of a shaft
A system and method for sensing torque and angular position of a rotating shaft may include a shaft with a magnetostrictive ring affixed to the shaft. The magnetostrictive ring may generate position-dependent magnetic fields relative to the shaft's rotation. A first sensor may measure a magnetic field that varies with angular position. A second sensor may measure a magnetic field that varies with torque.
US09070871B2 Method for fabricating magnetoresistive random access memory element
A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
US09070870B2 Method of fabricating a magnetic tunnel junction (MTJ) device with reduced switching current
Partial perpendicular magnetic anisotropy (PPMA) type magnetic random access memory cells are constructed using processes and structural configurations that induce a directed static strain/stress on an MTJ to increase the perpendicular magnetic anisotropy. Consequently, reduced switching current of the MTJ results. The directed static strain/stress on the MTJ is induced in a controlled direction and/or with a controlled magnitude during fabrication. The MTJ is permanently subject to a predetermined directed stress and permanently includes the directed static strain/strain that provides reduced switching current.
US09070868B2 Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity
A technique is provided for a thermally assisted magnetoresistive random access memory device. A magnetic tunnel junction is formed. Contact wiring having a top contact electrode and a bottom contact electrode is formed. The contact wiring provides write bias to heat the magnetic tunnel junction. A multilayer dielectric encapsulant is configured to retain the heat within the magnetic tunnel junction.
US09070867B2 Non-volatile resistive-switching memories
Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
US09070863B2 Resonator element, resonator, oscillator, electronic apparatus, and moving object
A resonator element includes a piezoelectric substrate that includes a vibration portion, and a thick portion which is integrally formed with an outer edge excluding a partial outer edge in an outer edge of the vibration portion and which is thicker than the vibration portion, and a pair of excitation electrodes that are respectively provided on a first main surface and a second main surface of a vibration region which are in front and rear relationships. In addition, the piezoelectric substrate includes first and second beam portions that are provided along a fourth side of the vibration portion.
US09070861B2 Piezoelectric transducers using micro-dome arrays
An ultrasonic piezoelectric transducer device includes a transducer array consisting of an array of vibrating elements, and a base to which the array of vibrating elements in the transducer array are attached. The base include integrated electrical interconnects for carrying driving signals and sensed signals between the vibrating elements and an external control circuit. The base can be an ASIC wafer that includes integrated circuitry for controlling the driving and processing the sensed signals. The interconnects and control circuits in the base fit substantially within an area below the array of multiple vibrating elements.
US09070859B1 Low temperature deposition method for polycrystalline silicon material for a non-volatile memory device
A method of forming a non-volatile memory device, includes providing a substrate, forming a first dielectric over the substrate, forming a first wiring structure over the first dielectric, forming a first conductor in contact with the first wiring structure, forming a polycrystalline p+ SiGe material over the first conductor at a deposition temperature ranging from about 350 to about 500 Degrees Celsius, forming a polycrystalline silicon conformally over the SiGe material using the SiGe material as a lattice template at a deposition temperature within about 350 to about 500 Degrees Celsius, the polycrystalline silicon having an intrinsic semiconductor characteristic, forming a second conductor over the polycrystalline silicon in physical and electric contact with the resistive polycrystalline silicon, and forming a second wiring structure over the second conductor.
US09070857B2 Piezoelectric element
A laminated piezoelectric element includes a base part that is configured from a piezoelectric layer, and a laminate configured by a first internal electrode and a second internal electrode, which are alternately laminated with the piezoelectric layer interposed therebetween, and that includes a displacement part extending from the base part in a laminating direction of the first internal electrode and the second internal electrode.
US09070856B1 Waveform generator for driving electromechanical device
An electrical waveform generator for driving an electromechanical load includes a digital signal processor connected to a waveform generator component in turn connected to an amplifier section with a filter network, the latter being connected to sensing and conditioning circuit componentry that is in turn connected to analog-to-digital converter circuitry. A digital memory stores digitized voltage and current waveform information. The processor determines a phase difference between voltage and current waveforms, compares the determined phase difference to a phase difference command and generates a phase error or correction signal. The processor also generates an amplitude error signal for inducing the amplifier section to change its output amplitude to result in a predetermined amplitude error level for a respective one of the voltage and current waveforms.
US09070854B2 Techniques for patterning multilayer magnetic memory devices using ion implantation
A method of patterning a substrate includes providing a layer stack comprising a plurality of layers on a base portion of the substrate, where the layer stack includes an electrically conductive layer and a magnetic layer. The method further includes forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, and directing ions towards the layer stack to magnetically isolate and electrically isolate the first protected region from the second protected region.
US09070850B2 Light emitting diode package and method for fabricating same
An LED package includes a submount having a top and bottom surface with a plurality of top electrically and thermally conductive elements on its top surface. An LED is included on one of the top elements such that an electrical signal applied to the top elements causes the LED to emit light. The electrically conductive elements also spread heat from the LED across the majority of the submount top surface. A bottom thermally conductive element is included on the bottom surface of said submount and spreads heat from the submount, and a lens is formed directly over the LED. A method for fabricating LED packages includes providing a submount panel sized to be separated into a plurality of LED package submounts. Top conductive elements are formed on one surface of the submount panel for a plurality of LED packages, and LEDs are attached to the top elements. Lenses are molded over the LEDs and the substrate panel is singulated to separate it into a plurality of LED packages.
US09070849B2 Parallel plate slot emission array
In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.
US09070842B2 Light-emitting diode manufacturing method
A light-emitting diode manufacturing method comprises steps of: providing a flexible material layer having a flexible reflective layer and phosphor glue in the flexible reflective layer; providing a hard material layer having a substrate and an LED chip on the substrate; combining the flexible material layer and the hard material layer together wherein the LED chip inserts into the phosphor glue and is surrounded by the flexible reflective layer; and solidifying the flexible reflective layer and the phosphor glue to form a reflective cup and a phosphor layer, respectively.
US09070841B2 Semiconductor light emitting device and method for manufacturing same
According to one embodiment, a semiconductor light emitting device includes: a stacked body, a wavelength conversion layer, a first metal layer, and a first insulating section. The stacked body includes: a first and a second semiconductor layers; and a first light emitting layer provided between the first and the second semiconductor layers. The wavelength conversion layer is configured to convert wavelength of light emitted from the first light emitting layer. The first semiconductor layer is placed between the first light emitting layer and the wavelength conversion layer. The first metal layer is electrically connected to the second semiconductor layer. The first insulating section is provided between a first side surface and a first side surface portion of the first metal layer and between the wavelength conversion layer and the first side surface portion.
US09070836B2 Semiconductor light-emitting device
A semiconductor light-emitting device includes a lamination of semiconductor layers including a first layer of a first conductivity type, an active layer, and a second layer of a second conductivity type; a transparent conductive film formed on a principal surface of the lamination and having an opening; a pad electrode formed on part the opening; and a wiring electrode connected with the pad electrode, formed on another part of the opening while partially overlapping the transparent conductive film; wherein contact resistance between the transparent conductive film and the lamination is larger than contact resistance between the wiring electrode and the lamination. Field concentration at the wiring electrode upon application of high voltage is mitigated by the overlapping transparent conductive film.
US09070832B2 Light-emitting device and fabrication method thereof
Disclosed is a light-emitting device including a conductive support substrate, a reflective layer arranged on the conductive support substrate, a first electrode layer arranged on the reflective layer and provided with a step in at least one region of the edge thereof, a protective layer arranged on the step, and a light-emitting structure arranged on the first electrode layer and the protective layer, the light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein at least one region of the reflective layer and the first electrode layer vertically overlaps the protective layer. Based on this configuration, the light-emitting device can exhibit improved adhesion between the electrode layer and the reflective layer and be provided with a wider reflective layer, thus improving brightness.
US09070829B2 Light emitting diode chip and method for manufacturing the same
An LED package includes a substrate, a buffer layer formed on the substrate, an epitaxial structure formed on the buffer layer, and a plurality of carbon nanotube bundles formed in the epitaxial structure.
US09070824B2 Heterogeneous laminate including graphene, and thermoelectric material, thermoelectric module, and thermoelectric apparatus including the heterogeneous laminate
A heterogeneous laminate including: graphene; and a thermoelectric inorganic compound disposed on the graphene.
US09070819B2 Method for manufacturing thin film compound solar cell
To manufacture a thin film compound solar cell which can improve the adhesive property of electrodes even when being provided with a base material, and which prevents the base material from being separated. A cell main body configured by laminating a plurality of compound semiconductor layers is formed on a substrate. A rear surface electrode 7 is formed on the cell main body, and a rear surface film 8 as the base material is formed on the rear surface electrode 7. A reinforcing material 9 is attached on the rear surface film 8. The substrate is separated from the cell main body, and the cell main body is mesa-etched. A surface electrode 13 is formed on a contact layer 3 after the etching. The reinforcing material 9 is separated, and the surface electrode 13 is annealed. The formed thin film compound solar cell is separated into a plurality of solar cell elements.
US09070818B2 Methods and structures for bonding elements
Embodiments of the invention relate to methods and structures for fabricating semiconductor structures that include at least one bonding layer for attaching two or more elements to one another. The at least one bonding layer may be at least substantially comprised of zinc, silicon and oxygen.
US09070808B2 Supplemental solar energy collector
A supplemental solar energy collection system including a photovoltaic panel which converts incident radiation into electricity. A housing includes a top thermally conductive surface mated with the photovoltaic panel and serving as a thermal collector. Open channels behind the thermally conductive surface carry fluid in contact with the top thermally conductive surface for removing heat from the photovoltaic panel.
US09070804B2 Back contact sliver cells
A solar cell uses a sliver of a silicon wafer as a substrate. The sliver has a front side that faces the sun during normal operation. The front side of the sliver includes a surface from along a thickness of the wafer, allowing for more efficient use of silicon. Metal contacts are formed on the back side of the sliver. The metal contacts electrically connect to the emitter and base of the solar cell, which may be formed within the sliver or be made of polysilicon. The emitter of the solar cell may be a P-type doped region and the base of the solar cell may be an N-type doped region, for example. The solar cell may include an anti-reflective coating formed on the front side of the sliver. The anti-reflective coating may be over a textured surface on the front side of the sliver.
US09070803B2 Nanostructured solar cell
Systems and methods for fabrication of nanostructured solar cells having arrays of nanostructures are described, including nanostructured solar cells having a repeating pattern of pyramid nanostructures, providing for low cost thin-film solar cells with improved PCE.
US09070802B2 Image sensor and fabricating method of image sensor
The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.
US09070800B2 Solar cell and texturing method thereof
The present invention relates to a solar cell. The solar cell includes a substrate of a first conductive type, the substrate having a textured surface on which a plurality of projected portions are formed, and surfaces of the projected portions having at least one of a plurality of particles attached thereto and a plurality of depressions formed thereon; an emitter layer of a second conductive type opposite the first conductive type, the emitter layer being positioned in the substrate so that the emitter layer has the textured surface; an anti-reflection layer positioned on the emitter layer which has the textured surface and including at least one layer; a plurality of first electrodes electrically connected to the emitter layer; and at least one second electrode electrically connected to the substrate.
US09070798B2 Solar cell and method for manufacturing the same, and solar cell module
A charge transferor of a solar cell, which collects and transfer charges generated from a semiconductor substrate, includes at least one electrode collecting the charges; and at least one collector transferring the charges collected by the at least one electrode, the at least one collector being included in at least one collector region on the substrate, wherein the at least one collector region in a first direction comprises at least one deletion portion where the at least one collector is not formed.
US09070793B2 Semiconductor device packages having electromagnetic interference shielding and related methods
The semiconductor device package includes a conformal shield layer applied to the exterior surface of the encapsulant, and an internal fence or separation structure embedded in the encapsulant. The fence separates the package into various compartments, with each compartment containing at least one die. The fence thus suppresses EMI between adjacent packages. The package further includes a ground path connected to the internal fence and conformal shield.
US09070791B2 Tunable capacitor
Disclosed are embodiments of a design structure transistor that operates as a capacitor and an associated method of tuning capacitance within such a capacitor. The embodiments of the capacitor comprise a field effect transistor with front and back gates above and below a semiconductor layer, respectively. The capacitance value exhibited by the capacitor can be selectively varied between two different values by changing the voltage condition in a source/drain region of the transistor, e.g., using a switch or resistor between the source/drain region and a voltage supply. Alternatively, the capacitance value exhibited by the capacitor can be selectively varied between multiple different values by changing voltage conditions in one or more of multiple channel regions that are flanked by multiple source/drain regions within the transistor. The capacitor will exhibit different capacitance values depending upon the conductivity in each of the channel regions.
US09070789B2 Semiconductor device and method for producing a semiconductor device
A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the two electrodes, a drift region is arranged, the drift region including charge compensation zones and drift zones arranged substantially parallel to one another. At least one charge carrier storage region which is at least partially free of charge compensation zones is arranged in the semiconductor body.
US09070784B2 Metal gate structure of a CMOS semiconductor device and method of forming the same
The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate, an N-metal gate electrode, and a P-metal gate electrode. The substrate comprises an isolation region surrounding a P-active region and an N-active region. The N-metal gate electrode comprises a first metal composition over the N-active region. The P-metal gate electrode comprises a bulk portion over the P-active region and an endcap portion over the isolation region. The endcap portion comprises the first metal composition and the bulk portion comprises a second metal composition different from the first metal composition.
US09070782B2 Semiconductor structure
A semiconductor structure includes multiple buried gates which are disposed in a substrate and have a first source and a second source, an interlayer dielectric layer covering the multiple buried gates and the substrate as well as a core dual damascene plug including a first plug, a second plug and an insulating slot. The insulating slot is disposed between the first plug and the second plug so that the first plug and the second plug are mutually electrically insulated. The first plug and the second plug respectively penetrate the interlayer dielectric layer and are respectively electrically connected to the first source and the second source.
US09070781B2 Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes a floating gate formed over a substrate; a contact plug formed on a first side of the floating gate and disposed parallel to the floating gate with a gap defined therebetween; and a spacer formed on a sidewall of the floating gate and filling the gap, wherein the contact plug and the floating gate have a sufficiently large overlapping area to enable the contact plug to operate as a control gate for the floating gate.
US09070779B2 Metal oxide TFT with improved temperature stability
A metal oxide thin film transistor includes a metal oxide semiconductor channel with the metal oxide semiconductor having a conduction band with a first energy level. The transistor further includes a layer of passivation material covering at least a portion of the metal oxide semiconductor channel. The passivation material has a conduction band with a second energy level equal to, or less than 0.5 eV above the first energy level.
US09070778B2 Semiconductor device and method for manufacturing semiconductor device
A highly reliable semiconductor device that includes a transistor including an oxide semiconductor is provided. In a semiconductor device which includes a bottom-gate transistor including an oxide semiconductor film, the spin density of the oxide semiconductor film is lower than or equal to 1×1018 spins/cm3, preferably lower than or equal to 1×1017 spins/cm3, further preferably lower than or equal to 1×1016 spins/cm3. The conductivity of the oxide semiconductor film is lower than or equal to 1×103 S/cm, preferably lower than or equal to 1×102 S/cm, further preferably lower than or equal to 1×101 S/cm.
US09070767B2 Vertical memory devices and apparatuses
Vertical memory devices comprise vertical transistors, buried digit lines extending in a first direction in an array region, and word lines extending in a second direction different from the first direction. Portions of the word lines in a word line end region have a first vertical length greater than a second vertical length of portions of the word lines in the array region. Apparatuses including vertical transistors in an array region, buried digit lines extending in a first direction, and word lines are also disclosed. Each of the word lines extends in a second direction perpendicular to the first direction, is formed over at least a portion of a sidewall of at least some of the vertical transistors, and vertically has a depth in a word line end region about equal to or greater than a depth thereof in the array region.
US09070765B2 Semiconductor device with low on resistance and high breakdown voltage
A semiconductor device includes an epitaxial layer of semiconductor material of a first conductivity type, a body region of a second (opposite) conductivity type extending into the epitaxial layer from a main surface of the epitaxial layer, a source region of the first conductivity type disposed in the body region, and a channel region extending laterally in the body region from the source region along the main surface. A charge compensation region of the second conductivity type can be provided under the body region which extends in a direction parallel to the main surface and terminates prior to a pn-junction between the source and body regions at the main surface, and/or an additional region of the first conductivity type which has at least one peak doping concentration each of which occurs deeper in the epitaxial layer from the main surface than a peak doping concentration of the device channel region.
US09070760B2 Method and apparatus for plasma dicing a semi-conductor wafer
The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.
US09070759B2 Semiconductor device and method of making same
A method of making a semiconductor device is disclosed. A device is fabricated on a semiconductor body. A gate electrode is disposed over the semiconductor body with a gate dielectric between the gate electrode and the semiconductor body, wherein the gate dielectric has a length greater than the gate electrode. A first source/drain region is disposed within the semiconductor body adjacent to the first edge of the gate with the gate dielectric at least partially overlapping the first source/drain region, and a second source/drain region is disposed within the semiconductor body adjacent to the first edge of the gate with the gate dielectric at least partially overlapping the second source/drain region.
US09070756B2 Group III nitride high electron mobility transistor (HEMT) device
A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (112), a drain electrode (111), a main gate (116), a top gate (118), an insulating dielectric layer (117) and a heterostructure, wherein the source electrode (112) and the drain electrode (111) are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor (113) and a second semiconductor (114); the first semiconductor (113) is disposed between the source electrode (112) and drain electrode (111); the second semiconductor (114) is formed on the surface of the first semiconductor (113) and is provided with a band gap wider than the first semiconductor (113); the main gate (116) is disposed at the side of the surface of the second semiconductor (114) adjacent to the source electrode (112), and is in Schottky contact with the second semiconductor (114); the dielectric layer (117) is disposed on the surfaces of the second semiconductor (114) and the main gate (116) and between the source electrode (112) and the drain electrode (111); the top gate (118) is formed on the surface of the dielectric layer (117), at least one side edge of the top gate extends towards the direction of the source electrode (112) or the drain electrode (111), and the orthographic projection of the top gate overlaps with the two side edges of the main gate (116). When the HEMT device is at work, the main gate (116) and the top gate (118) are respectively controlled by a control signal. The device can effectively inhibit the “current collapse effect”.
US09070755B2 Transistor having elevated drain finger termination
According to an exemplary implementation, a transistor includes drain finger electrodes interdigitated with source finger electrodes. The transistor also includes a current conduction path in a semiconductor substrate between the drain finger electrodes and the source finger electrodes. At least one of the drain finger electrodes has a drain finger electrode end and a drain finger electrode main body, where the drain finger electrode main body is non-coplaner with at least a portion of the drain finger electrode end. The transistor may also include a dielectric material situated between at least a portion of the drain finger electrode end and the semiconductor substrate. The dielectric material can be an increasing thickness dielectric material. The dielectric material can thus elevate the drain finger electrode end over the semiconductor substrate. Further, the drain finger electrode end can have an increased radius of curvature.
US09070753B1 Method for fabricating memory device
Provided is a method for fabricating a memory device. A stack layer, including a storage layer, a first conductive layer and a first mask layer, is formed on the substrate in a first region and a second region. The stack layer is patterned to form a plurality of first patterned stack layers extending along a first direction and from the first region to the second region. Two sides of each first patterned stack layers have openings respectively. A filling layer is formed on the substrate, and filled in the openings. A second mask layer is formed on the second region, and does not cover the filling layer in the second region. Then, using the second mask layer and the filling layer as mask, the first patterned stack layers and part of the substrate are removed, and a plurality of trenches are formed in the substrate in the second region.
US09070750B2 Methods for reducing metal oxide surfaces to modified metal surfaces using a gaseous reducing environment
Method and apparatus for reducing metal oxide surfaces to modified metal surfaces are disclosed. Metal oxide surfaces are reduced to form a film integrated with a metal seed layer on a substrate by exposing the metal oxide surfaces to a reducing gas atmosphere comprising radicals of a reducing gas species. The radicals of the reducing gas species can form from exposing the reducing gas species to ultraviolet radiation and/or a plasma. The substrate is maintained at a temperature below a temperature that produces agglomeration of the metal seed layer during exposure to the reducing gas atmosphere, such as below 150° C. for copper. In some embodiments, the reducing gas species can include at least one of hydrogen, ammonia, carbon monoxide, diborane, sulfite compounds, carbon and/or hydrocarbons, phosphites, and hydrazine.
US09070747B2 Electroplating using dielectric bridges
Structures and methods provide a dielectric bridge for use in electroplating. A method comprises: providing a semiconductor wafer with a plurality of die, wherein a first die is adjacent to a second die, and the first die and second die are separated by a dicing street area; forming a patterned dielectric layer overlying the semiconductor wafer, the dielectric layer including a dielectric bridge that crosses the dicing street area; forming a conductive layer (e.g., a metal seed layer) overlying the dielectric layer, wherein a portion of the conductive layer is overlying the dielectric bridge to provide a current pathway from the first die to the second die; and electroplating targeted areas of the conductive layer by providing current to the second die using the current pathway. Other such bridges formed from the dielectric layer provide current pathways to other die on the wafer.
US09070744B2 Shallow trench isolation structure, manufacturing method thereof and a device based on the structure
The present invention relates to a shallow trench isolation structure, manufacturing method thereof and a device based on the structure. The present invention provides a method for manufacturing a shallow trench isolation (STI) structure, characterized in comprising the following steps: providing a semiconductor substrate; forming an insulating medium on said semiconductor substrate; etching a part of the insulating medium by using a mask to expose the semiconductor substrate thereunder, the unetched insulating medium forming STI regions; and epitaxially growing a semiconductor layer on said semiconductor substrate between said STI regions as an active region. With the method provided by the present invention, the problem of filling a small-size trench is solved and the problem of STI step height is overcome.
US09070741B2 Method of manufacturing a semiconductor device and a semiconductor workpiece
A semiconductor device is manufactured in a semiconductor substrate comprising a first main surface, the semiconductor substrate including chip areas. The method of manufacturing the semiconductor substrate comprises forming components of the semiconductor device in the first main surface in the chip areas, removing substrate material from a second main surface of the semiconductor substrate, the second main surface being opposite to the first main surface, forming a separation trench into a first main surface of the semiconductor substrate, the separation trench being disposed between adjacent chip areas. The method further comprises forming at least one sacrificial material in the separation trench, and removing the at least one sacrificial material from the trench.
US09070732B2 Bipolar transistor having collector with doping spike
This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be disposed relatively near an interface between the collector and the base. For instance, the doping spike can be disposed within half of the thickness of the collector from the interface between the collector and the base. Such bipolar transistors can be implemented, for example, in power amplifiers.
US09070730B2 Method and apparatus for removing a vertically-oriented substrate from a cassette
A system and method are disclosed for removing vertically oriented substrates from a cassette. A lifter includes a lifter notch and a stabilizer notch for holding a substrate. The lifter notch engages and lifts the substrate along the substrate ID, while the stabilizer notch captures the substrate OD to prevent lateral movement of the substrate during lifting. In use, the cassette is tilted to bias all substrates to one side and ensure consistent spacing. The lifter moves up into the cassette until the notches are adjacent, but beneath, the ID and OD of a substrate. The lifter is moved laterally to position the notches directly below the ID and OD. Upward movement of the lifter causes the lifter notch to lift the substrate along the ID. The lifter continues upward with the substrate until the substrate clears the top of the cassette. Other embodiments are described and claimed.
US09070728B2 Method of lowering temperature of substrate table, computer-readable storage medium, and substrate processing system
A method of lowering a temperature of a substrate table uses a substrate W processing system including a first substrate table 2b; one or more processing chambers 1b, in each of which the first substrate table 2b is disposed, the processing chamber being configured to perform a predetermined process, with the substrate being placed on the first substrate table 2b; a substrate transfer apparatus 31 configured to transfer the substrate to the processing chamber 1b; a transfer chamber in which the substrate transfer apparatus 31 is disposed; and a second substrate table configured to cool the substrate. The method of lowering a temperature of a substrate table comprises the steps of first transfer in which the substrate W placed on the first substrate table 2b is transferred to the second substrate table by the substrate transfer apparatus 31, and second transfer in which the substrate placed on the second substrate table is transferred to the first substrate table 2b. By repeating the step of first transfer and the step of second transfer, a heat of the first substrate table 2b is absorbed by the substrate W placed on the first substrate table 2b, so that a temperature of the first substrate table 2b is lowered.
US09070727B2 Substrate processing system, substrate transfer method and storage medium
A substrate processing system 10 includes a multiple number of substrate processing units 40A and 40B having substrate processing modules 40a and 40b, respectively; substrate buffers 30a and 30b which respectively correspond to the substrate processing units 40A and 40B; and a first substrate transfer device 50 configured to take out substrates W from substrate receptacles 20 on substrate mounting tables 25 into substrate buffers 30a and 30b. When a second substrate transfer device 60b of the substrate processing unit 40B is broken down, a substrate W remaining in the substrate buffer 30b corresponding to the substrate processing unit 40B is delivered into the substrate buffer 30a corresponding to the substrate processing unit 40A by a substrate delivery device 35.
US09070726B2 Temperature control method of chemical vapor deposition device
A temperature control method of a chemical vapor deposition device including: a chamber; a susceptor positioned on the inner side of the chamber allowing rotation therein, a wafer stacked on an upper side; a gas supplier disposed on the inner side of the chamber, and sprays gas toward the wafer; a heater disposed on the inner side of the susceptor, and heats the wafer; and a temperature sensor positioned in the chamber, and measures the temperature. The temperature control method includes: (a) calculating the temperature distribution of the susceptor based on a measured value of the temperature sensor, and dividing a section with relatively high temperature as a susceptor section and a section with relatively low temperature as a wafer section from the temperature distribution; and (b) controlling the heater by comparing a reference temperature with the temperature of a selected position of the susceptor section or the wafer section.
US09070725B2 Measuring apparatus and plasma processing apparatus
Provided a measuring apparatus includes a wavelength dispersion device which dispersed light reflected by one surface of an examination target having a thickness D and light reflected by a rear surface of the examination target, as incident light, a detector in which a plurality of photodetection elements receiving light dispersed by the wavelength dispersion device and detecting a power of the received light in are provided in an array shape, and a piezoelectric device which is attached to the detector to convert an applied voltage into a mechanical power, wherein the detector detects the power of the received light when the detector is shifted by the mechanical power converted by the piezoelectric device as much as d/m, where d is a width of each of the photodetection elements in an array direction and m is an integer equal to or greater than 2.
US09070722B2 System and method for the sonic-assisted cleaning of substrates utilizing a sonic-treated liquid
The present invention is directed to sonic-assisted systems mid methods of processing of substrates utilizing a sonic-treated liquid. In one embodiment, the sonic-treated liquid can be created by subjecting a desired processing liquid to sonic energy generated by a first sonic energy source prior to being applied So the substrate, The sonic-treated liquid is applied to the substrate where a second source of sonic energy applies sonic energy to the substrate. The sonic-treated liquid can be used as the coupling fluid between the second source of sonic energy and the substrate.
US09070718B2 Thin film transistor having semiconductor with different crystallinities and manufacturing method thereof
A thin film transistor, a display device, and a manufacturing method thereof. The thin film transistor includes a control electrode, a semiconductor overlapping the control electrode, and an input electrode and an output electrode disposed on or under the semiconductor and opposite to each other. The semiconductor includes a first portion disposed between the input electrode and the output electrode and having a first crystallinity, and a second portion connected with the first portion, which overlaps the input electrode or the output electrode, and having a second crystallinity. The first crystallinity is higher than the second crystallinity.
US09070717B2 Method of fabricating polysilicon layer, thin film transistor, organic light emitting diode display device including the same, and method of fabricating the same
A method of fabricating an organic light emitting diode (OLED) display device having a thin film transistor including a polysilicon layer. The method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
US09070714B1 Strapped dual-gate VDMOS device
Semiconductor devices are described that include a dual-gate configuration. In one or more implementations, the semiconductor devices include a substrate having a first surface and a second surface. The substrate includes a first and a second body region formed proximal to the first surface. Moreover, each body region includes a source region formed therein. The substrate further includes a drain region formed proximal to the second surface and an epitaxial region that is configured to function as a drift region between the drain region and the source regions. A dual-gate is formed over the first surface of the substrate. The dual-gate includes a first gate region and a second gate region that define a gap there between to reduce the gate to drain capacitance. A conductive layer may be formed over the first gate region and the second gate region to lower the effective resistance of the dual-gate.
US09070712B2 Methods for manufacturing a field-effect semiconductor device
A method of fabricating a field-effect transistor is disclosed. In one aspect, the method includes forming a channel layer comprising germanium over a substrate. The method additionally includes forming a gate structure on the channel layer, where the gate structure comprises a gate layer comprising silicon, and the gate layer has sidewalls above a surface of the channel layer. The method additionally includes forming sidewall spacers comprising silicon dioxide on the sidewalls by subjecting the gate structure to a solution adapted for forming a chemical silicon oxide on materials comprising silicon. The method further includes forming elevated source/drain structures on the channel layer adjacent to the gate structure by selectively epitaxially growing a source/drain material on the channel layer.
US09070710B2 Semiconductor process
A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and a gate structure partially overlapping the fin-shaped structure is formed. Subsequently, a dielectric layer is blanketly formed on the substrate, and a part of the dielectric layer is removed to form a first spacer on the fin-shaped structure and a second spacer besides the fin-shaped structure. Furthermore, the second spacer and a part of the fin-shaped structure are removed to form at least a recess at a side of the gate structure, and an epitaxial layer is formed in the recess.
US09070707B2 Semiconductor device
A semiconductor device includes: a substrate; a semiconductor layer composed of GaN-based compound semiconductor on the substrate; a source electrode, a gate electrode, and a drain electrode on the substrate; and an additive substance added to the semiconductor layer. The additive substance serves as a luminescent center within the semiconductor layer. Charge trapped at an energy level in the semiconductor layer is released and recombined by light generated from the luminescent center.
US09070703B2 High speed digital interconnect and method
In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.
US09070702B2 Method for obtaining three-dimensional actin structures and uses thereof
The present invention relates to a method for preparing three-dimensional actin structures having a well-defined shape and displaying improved mechanical rigidity. This method comprises the steps of (a) providing a polymerization solution comprising actin monomers, a branching agent and a capping agent, (b) providing at least one surface having thereon a pattern which is coated with a nucleating agent, and (c) contacting the at least one surface of step (b) with the polymerization solution of step (a) so as to induce the polymerization of actin and obtain the said desired three-dimensional actin structure. Applications of the present invention in various technological fields such as microelectronics are also provided.
US09070700B2 Apparatus for electrostatic discharge protection and noise suppression in circuits
An integrated circuit assembly is provided that includes an integrated circuit (IC) package substrate including a package ground rail that is divided into a plurality of segments that are electrically isolated from each other. An IC die is disposed on the IC package substrate, the IC die including a plurality of circuit blocks and an IC ground rail. The IC ground rail is divided into a plurality of segments, where each segment of the IC ground rail is coupled to another segment of the IC ground rail by one or more diodes. The plurality of circuit blocks have corresponding ground nodes electrically connected to corresponding segments of the IC ground rail. The segments of the IC ground rail are electrically coupled to corresponding segments of the package ground rail by corresponding first connections.
US09070697B2 Device for detecting a laser attack in an integrated circuit chip
A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.
US09070696B2 Semiconductor device manufacturing method and semiconductor device
In a method of manufacturing a semiconductor device, a molding die for molding a resin case for a semiconductor device is prepared such that the molding die has protrusions to fix each of a plurality of terminals having a leg portion in a predetermined position. Each of the plurality of terminals is held to the corresponding protrusions in the molding die, and resin is injected into the molding die to integrally mold the plurality of terminals and the resin case.
US09070695B2 Integrated circuit with sensor and method of manufacturing such an integrated circuit
An integrated circuit package for an integrated circuit having one or more sensor elements in a sensor element area of the circuit. An encapsulation covers bond wires but leaves an opening over the sensor element area. A protection layer is provided over the integrated circuit over which the encapsulation extends, and it has a channel around the sensor element area to act as a trap for any encapsulation material which has crept into the opening area.
US09070690B2 Semiconductor device and method of manufacturing the same
A semiconductor device is provided in which reliability of the semiconductor device is improved by improving an EM characteristic, a TDDB characteristic, and a withstand voltage characteristic of the semiconductor device. An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in the lower insulating layer. Further, a side wall insulating layer which is a dense layer including the first vacancies having an average diameter smaller than the second vacancies is formed on the surface of the interlayer insulating film exposed on a side wall of a wiring trench.
US09070686B2 Wiring switch designs based on a field effect device for reconfigurable interconnect paths
An integrated circuit, including a substrate, at least one metal wiring layer disposed above the substrate. The metal wiring layer including a wiring switch and a plurality of patterned conductors. The wiring switch including a back gate field effect transistor (BGFET).
US09070685B2 Compound semiconductor integrated circuit
A compound semiconductor integrated circuit is provided, comprising a substrate, at least one compound semiconductor electronic device, a first metal layer, a protection layer, a plurality of second metal layers, and at least one dielectric layer. The first metal layer contains Au but does not contain Cu, and is at least partly electrically connected to the compound semiconductor electronic device. The protection layer covers the compound semiconductor electronic device and at least part of the first metal layer. Each of the plurality of second metal layers contains at least a Cu layer, and at least one of the plurality of second metal layers is partly electrically connected to the first metal layer described above. The at least one dielectric layer separates each pair of adjacent second metal layers. The second metal layers are used to form passive electronic components.
US09070684B2 Integrated circuit power grid with improved routing resources and bypass capacitance
An integrated circuit power grid is provided with improved routing resources and bypass capacitance. A power grid for an integrated circuit comprises a plurality of thick metal layers having a plurality of metal traces, wherein at least one of the thick metal layers has a lower pitch than a substantial maximum pitch allowed under the design rules for a given integrated circuit fabrication technology. A power grid for an integrated circuit can also comprise a plurality of thin metal layers having a plurality of metal traces, wherein a plurality of the metal traces on different thin metal layers are connected by at least one via, wherein the at least one via is substantially surrounded by a metal trace on at least one thin metal level connected to a different power supply voltage than a power supply of one or more additional thin metal levels. The via can be positioned, for example, at an intersection of a given standard cell row and a given vertical strap.
US09070683B2 Die fracture detection and humidity protection with double guard ring arrangement
An electronic apparatus includes a semiconductor substrate, outer and inner guard rings disposed along a periphery of the semiconductor substrate, and first and second contact pads electrically coupled to the outer and inner guard rings, respectively. The outer and inner guard rings are electrically coupled to one another to define a conduction path between the first and second contact pads. Each of the outer and inner guard rings includes an Ohmic metal layer having a plurality of gaps and further includes conductive bridges across the gaps. The gaps of the outer guard ring are laterally offset from the gaps of the inner guard ring such that the Ohmic metal layers of the outer and inner guard rings laterally overlap.
US09070681B2 Method of forming a single metal that performs N and P work functions in high-K/metal gate devices
The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate with a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a metal layer over the high-k dielectric layer, the metal layer having a first work function, protecting the metal layer in the first region, treating the metal layer in the second region with a de-coupled plasma that includes carbon and nitrogen, and forming a first gate structure in the first region and a second gate structure in the second region. The first gate structure includes the high-k dielectric layer and the untreated metal layer. The second gate structure includes the high-k dielectric layer and the treated metal layer.
US09070680B2 Chip on film type semiconductor package
A chip on film (COF) type semiconductor package is provided. The chip on film (COF) type semiconductor package includes a film, a plurality of leads formed on a surface of the film, a chip adhered to ends of the leads, an underfill layer filled within a space between the chip and the leads, and a heat dissipation layer adhered to an other surface of the film, the heat dissipation layer including a graphite material layer, a protection layer formed on a surface of the graphite material layer to cover the graphite material layer, and an adhesion layer formed on an other surface of the graphite material layer to adhere the heat dissipation layer to the other surface of the film.
US09070676B2 Bowl-shaped solder structure
An apparatus relating generally to a substrate is disclosed. In this apparatus, a first metal layer is on the substrate. The first metal layer has an opening. The opening of the first metal layer has a bottom and one or more sides extending from the bottom. A second metal layer is on the first metal layer. The first metal layer and the second metal layer provide a bowl-shaped structure. An inner surface of the bowl-shaped structure is defined responsive to the opening of the first metal layer and the second metal layer thereon. The opening of the bowl-shaped structure is configured to receive and at least partially retain a bonding material during a reflow process.
US09070675B2 Plating structure for wafer level packages
A plating structure for wafer level packages are disclosed and may include a semiconductor wafer comprising a plurality of semiconductor die and a plating structure for forming an under bump metal on redistribution layers on the plurality of semiconductor die. The plating structure may comprise a plating connection line around a periphery of the semiconductor wafer, and a plating bar coupling the plating connection line to plating traces on the plurality of semiconductor die. The plating traces may be electrically coupled to the redistribution layers on the plurality of semiconductor die. The semiconductor wafer may comprise a reconstituted wafer of said semiconductor die. The semiconductor wafer may comprise a wafer prior to singulating the plurality of semiconductor die. The plating bar may be located in a sawing line for the singulating of the plurality of semiconductor die. A passivation layer may cover the redistribution layer and the plating traces.
US09070674B2 Through-silicon coaxial via structure and method
A silicon interconnect structure includes a peripheral outer via in a silicon substrate, a solid core inner via in the silicon substrate, the solid core inner via coaxial with the peripheral outer via to form a coaxial via structure, a metal interconnect stack formed over a first surface of the peripheral outer via and the solid core inner via, at least portions of the metal interconnect stack forming an electrical connection with the peripheral outer via and the solid core inner via, first contact pads on a surface of the metal interconnect stack, and second contact pads on an exposed surface of the peripheral outer via and the solid core inner via.
US09070672B2 Semiconductor device packaging structure and packaging method
Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.
US09070671B2 Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing
Processes of assembling microelectronic packages with lead frames and/or other suitable substrates are described herein. In one embodiment, a method for fabricating a semiconductor assembly includes forming an attachment area and a non-attachment area on a lead finger of a lead frame. The attachment area is more wettable to the solder ball than the non-attachment area during reflow. The method also includes contacting a solder ball carried by a semiconductor die with the attachment area of the lead finger, reflowing the solder ball while the solder ball is in contact with the attachment area of the lead finger, and controllably collapsing the solder ball to establish an electrical connection between the semiconductor die and the lead finger of the lead frame.
US09070670B2 Electrical connectivity of die to a host substrate
According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. A surface of the die includes multiple conductive elements disposed thereon. The multiple conductive elements on the surface are electrically coupled to respective nodes of the first transistor and the second transistor. Prior to assembly, the first transistor and second transistor are electrically isolated from each other. During assembly, the surface of the die including the respective conductive elements is mounted on a facing of the host substrate. Accordingly, a die including multiple independent transistors can be flipped and mounted to a respective host substrate such as printed circuit board, lead frame, etc.
US09070666B2 Semiconductor device including cooler
A semiconductor device includes a package and a cooler. The semiconductor package includes a semiconductor element, a metal member, and a molding member for encapsulating the semiconductor element and the metal member. The metal member has a metal portion thermally connected to the semiconductor element, an insulating layer on the metal portion, and a conducting layer on the insulating layer. The conducting layer is at least partially exposed outside the molding member and serves as a radiation surface for radiating heat of the semiconductor element. The cooler has a coolant passage through which a coolant circulates to cool the conducting layer. The conducting layer and the cooler are electrically connected together.
US09070662B2 Chip-scale packaging with protective heat spreader
A semiconductor package can include a semiconductor die having an integrated circuit, a first die surface, and an opposite second die surface. A packaging can be attached to the die and have a holder surface opposite the first die surface. A heat spreader can be configured to cover the second die surface and the packaging surface and can be attached thereto by a layer of adhesive positioned between the heat spreader and the semiconductor die. A semiconductor package array can include an array of semiconductor dies and a heat spreader configured to cover each semiconductor die. A conductive lead can be electrically connected to the integrated circuit in a semiconductor die and can extend from the first die surface. Manufacturing a semiconductor package can include applying thermally conductive adhesive to the heat spreader and placing the heat spreader proximate the semiconductor die.
US09070658B2 Semiconductor device and method for manufacturing semiconductor device
A p anode layer (2) is formed on one main surface of an n− drift layer (1). An n+ cathode layer (3) having an impurity concentration more than that of the n− drift layer (1) is formed on the other main surface of the n− drift layer (1). An anode electrode (4) is formed on the surface of the p anode layer (2). A cathode electrode (5) is formed on the surface of the n+ cathode layer (3). An n-type broad buffer region (6) that has a net doping concentration more than the bulk impurity concentration of a wafer and less than that of the n+ cathode layer (3) and the p anode layer (2) is formed in the n− drift layer (1). The resistivity ρ0 of the n− drift layer (1) satisfies 0.12V0≦ρ0≦0.25V0 with respect to a rated voltage V0. The total amount of the net doping concentration of the broad buffer region (6) is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.
US09070647B2 Dual emitting method and device for active matrix organic electroluminescence
An organic electroluminescence (EL) device is provided, including a transparent substrate and an array of pixels over the transparent substrate. Each of the pixels includes at least one first sub-pixel and at least one second sub-pixel, wherein the at least one first sub-pixel each includes a first organic light emitting diode for providing light in a first direction, and the second sub-pixel each includes a second organic light emitting diode for providing light in a second direction substantially opposite to the first direction.
US09070641B2 Methods for forming assemblies and multi-chip modules including stacked semiconductor dice
An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
US09070640B2 Method of forming fine patterns of semiconductor device
A method of forming fine patterns includes patterning a hard mask layer and a buffer mask layer sequentially stacked on a lower mask layer to form first openings, forming sacrificial patterns filling the first openings and protruding from a top surface of the buffer mask layer, forming a spacer pattern filling a space between two adjacent sacrificial patterns and having gaps each of which exposes a portion of the buffer mask layer between at least three adjacent sacrificial patterns, etching portions of the buffer mask layer exposed by the gaps of the spacer pattern to form enlarged holes, etching portions of the hard mask layer exposed by the enlarged holes to form second openings, and subsequently etching the lower layer using the hard mask layer as an etch mask.
US09070638B2 Semiconductor device having low dielectric insulating film and manufacturing method of the same
A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.
US09070635B2 Removing method
A removing method including the following steps. A substrate is transferred into an etching machine, wherein the substrate has a material layer formed thereon. A cycle process is performed. The cycle process includes performing an etching process to remove a portion of the material layer, and performing an annealing process to remove a by-product generated by the etching process. The cycle process is repeated at least one time. The substrate is transferred out of the etching machine. In the removing method of the invention, the cycle process is performed multiple times to effectively remove the undesired thickness of the material layer and reduce the loading effect.
US09070634B1 Semiconductor device comprising a surface portion implanted with nitrogen and fluorine
A method of fabricating a semiconductor device is provided. A substrate is provided. Thereafter, a dielectric layer is formed on the substrate, wherein the dielectric layer includes a first portion adjacent to the substrate and a second portion adjacent to the first portion. Afterwards, the dielectric layer is treated with nitrogen trifluoride (NF3) to remove the second portion of the dielectric layer and therefore expose the first portion of the dielectric layer. A semiconductor device is also provided.
US09070630B2 Mechanisms for forming patterns
The present disclosure provides a method for forming patterns in a semiconductor device. In accordance with some embodiments, the method includes providing a substrate and a patterning-target layer over the substrate; forming one or more mandrel patterns over the patterning-target layer; forming an opening in a resist layer by removing a first mandrel pattern and removing a portion of the resist layer that covers the first mandrel pattern; forming spacers adjacent to sidewalls of a second mandrel pattern; removing the second mandrel pattern to expose the spacers; forming a patch pattern over the spacers and aligned with the opening; etching the patterning-target layer using the patch pattern and the spacers as mask elements to form final patterns; and removing the patch pattern and the spacers to expose the final patterns.
US09070628B2 Method of manufacturing esterified substance
According to the invention, a method of manufacturing an esterified substance including a process in which a copolymer is obtained by copolymerizing a 1-alkene having 5 to 80 carbon atoms and maleic anhydride, and a process in which an esterification reaction of the copolymer and an alcohol having 5 to 25 carbon atoms is caused in a presence of trifluoromethanesulfonic acid in order to obtain a reaction mixture containing an esterified substance including at least one repetition unit selected from formulae (c) to (f) is provided, and, in the formulae (c) to (f), R represents an aliphatic hydrocarbon group having 3 to 78 carbon atoms, R2 represents a hydrocarbon group having 5 to 25 carbon atoms, m represents the copolymerization molar ratio X/Y of the 1-alkene (X) to the maleic anhydride (Y) and is 1/2 to 10/1, and n is an integer of more than or equal to 1.
US09070626B2 Ohmic contact to semiconductor device
Embodiments of an ohmic contact structure for a Group III nitride semiconductor device and methods of fabrication thereof are disclosed. In one embodiment, the ohmic contact structure has less than or equal to 5%, more preferably less than or equal to 2%, more preferably less than or equal to 1.5%, and even more preferably less than or equal to 1% degradation for 1000 hours High Temperature Soak (HTS) at 300 degrees Celsius. In another embodiment, the ohmic contact structure additionally or alternatively has less than or equal to 10% degradation, more preferably less than or equal to 7.5% degradation, more preferably less than or equal to 6% degradation, more preferably less than or equal to 5% degradation, and even more preferably less than 3% degradation for 1000 hours High Temperature operating Life (HToL) at 225 degrees Celsius and 50 milliamps (mA) per millimeter (mm).
US09070625B2 Selective etch chemistry for gate electrode materials
A chemical solution including an aqueous solution, an oxidizing agent, and a pH stabilizer selected from quaternary ammonium salts and quaternary ammonium alkali can be employed to remove metallic materials in cavities for forming a semiconductor device. For example, metallic materials in gate cavities for forming a replacement gate structure can be removed by the chemical solution of the present disclosure with, or without, selectivity among multiple metallic materials such as work function materials. The chemical solution of the present disclosure provides different selectivity among metallic materials than known etchants in the art.
US09070620B2 Method of fabricating dual trench isolated selective epitaxial diode array
Methods and devices associated with phase change memory include diodes operating as selector switches having a large driving current and high switching speed. A method of forming a semiconductor device includes providing a semiconductor substrate, defining a diode array region and a peripheral region on the semiconductor substrate, forming an N+ buried layer in the diode array region by performing an ion implantation process and an annealing process. The method also includes forming a semiconductor epitaxial layer on the N+ buried layer, forming deep trench isolations through the epitaxial layer and the N+ buried layer into a portion of the substrate in the first direction, and forming shallow trench isolations in the diode array region and in the peripheral region in the second direction. The shallow trench isolation has a depth equal to or greater than a thickness of the epitaxial layer.
US09070619B2 Nitride semiconductor wafer for a high-electron-mobility transistor and its use
A nitride semiconductor wafer includes a substrate, and a buffer layer formed on the substrate and including an alternating layer of AlxGa1-xN (0≦x≦0.05) and AlyGa1-yN (0
US09070617B2 Reduced S/D contact resistance of III-V mosfet using low temperature metal-induced crystallization of n+ Ge
Embodiments of this invention provide a method to fabricate an electrical contact. The method includes providing a substrate of a compound Group III-V semiconductor material having at least one electrically conducting doped region adjacent to a surface of the substrate. The method further includes fabricating the electrical contact to the at least one electrically conducting doped region by depositing a single crystal layer of germanium over the surface of the substrate so as to at least partially overlie the at least one electrically conducting doped region, converting the single crystal layer of germanium into a layer of amorphous germanium by implanting a dopant, forming a metal layer over exposed surfaces of the amorphous germanium layer, and performing a metal-induced crystallization (MIC) process on the amorphous germanium layer having the overlying metal layer to convert the amorphous germanium layer to a crystalline germanium layer and to activate the implanted dopant. The electrical contact can be a source or a drain contact of a transistor.
US09070604B2 Method of fabricating a semiconductor device
A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate, adhesion between a buried insulating layer as an under layer and a single crystal silicon layer is high, and it becomes possible to realize a semiconductor device with high reliability.
US09070599B2 Array substrate, manufacturing method thereof and display device
An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) and a source electrode (9), disposed opposite to each other above the active layer (5) and having a channel region of the thin film transistor therebetween; a filling layer (4), provided between the gate electrode (2) and the gate line (15) connected with the gate electrode, and the drain and source electrodes (8) and (9); and a passivation layer (10), provided on the source electrode (9), the drain electrode (8) and the active layer (5), wherein at a position directly facing the gate line (15), the passivation layer (10) is provided with a passivation layer through hole (11) configured to perform a connection between the drain electrode (8) and the pixel electrode (12).
US09070597B2 Thin film transistor, display substrate and method of manufacturing a thin film transistor
A thin film transistor includes a gate electrode, a channel overlapped with the gate electrode, a source electrode contacting the channel, and a drain electrode spaced apart from the source electrode and contacting the channel. The channel includes indium-zinc-tin oxide sourced from a source including a single phase indium-zinc-tin oxide.
US09070594B2 Display device
There is provided a display device comprising a display panel, wherein the display panel comprises pixels, data lines, thin film transistors including first electrodes electrically connected with the data lines, second electrodes disposed to be spaced apart from the first electrodes in a first direction, semiconductor layers overlapping the first electrodes and the second electrodes, and gate electrodes overlapping the semiconductor layers and pads electrically connected with the second electrodes, wherein the thin film transistors includes first thin film transistors and second thin film transistors, which are alternately disposed, the semiconductor layers are divided into first semiconductor layers included in the first thin film transistors and second semiconductor layers included in the second thin film transistors, which are alternately disposed, and a length of the first semiconductor layer in the first direction is larger than a length of the second semiconductor layer in the first direction.
US09070590B2 Workpiece breakage prevention method and apparatus
Methods and apparatus for heat-treating a workpiece are disclosed. An illustrative method includes measuring deformation of a workpiece during heat-treating thereof, and taking an action in relation to the heat-treating of the workpiece, in response to the measuring of the deformation of the workpiece. The workpiece may include a semiconductor wafer. Taking an action may include applying a deformation correction to a temperature or reflectivity measurement of the wafer during thermal processing, or may include modifying the heat-treating of the wafer, for example.
US09070589B2 Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, a first layer formed above the semiconductor substrate, a first conductive layer, an inter-electrode insulating layer, and a second conductive layer sequentially stacked above the first layer, a memory film formed on an inner surface of each of a pair of through holes provided in the first conductive layer, the inter-electrode insulating layer, and the second conductive layer and extending in a stacking direction, a semiconductor layer formed on the memory film in the pair of through holes, and a metal layer formed in part of the pair of through holes and/or in part of a connection hole that is provided in the first layer and connects lower end portions of the pair of through holes, the metal layer being in contact with the semiconductor layer.
US09070588B2 Non-volatile memory structure
A non-volatile memory structure, including a substrate, a plurality of stacked structures, a plurality of first conductive type doped regions, at least one second conductive type doped region, a conductive layer, and a first dielectric layer, is provided. The stacked structures are disposed on the substrate, and each of the stacked structures includes a charge storage structure. The first conductive type doped regions are disposed in the substrate under the corresponding charge storage structures respectively. The second conductive type doped region is disposed in the substrate between the adjacent charge storage structures and has an overlap region with each of the charge storage structures. The conductive layer covers the second conductive type doped region. The first dielectric layer is disposed between the conductive layer and the second conductive type doped region.
US09070587B2 Vertical structure non-volatile memory device having insulating regions that are formed as air gaps between selection transistors of adjacent memory cell strings
A vertical structure non-volatile memory device includes semiconductor regions that vertically extend on a substrate, a plurality of memory cell strings that vertically extend on the substrate along sidewalls of the semiconductor regions and include a plurality of memory cells and at least one or more first selection transistors, which are disposed on sides of the memory cells and are adjacent to one another. A plurality of wordlines is connected to the memory cells of the memory cell strings. A first selection line is connected to the selection transistors of the memory cell strings and insulating regions are formed as air gaps between the first selection transistors of the adjacent memory cell strings.
US09070570B2 Stack packages having token ring loops
Stack packages are provided. The stack package includes a substrate having first and second bond fingers and a plurality of semiconductor chips stacked on the substrate. Each of the plurality of semiconductor chips has an input bonding pad and an output bonding pad. A first interconnection electrically connects the first bond finger to the input bonding pad of a lowermost semiconductor chip of the plurality of semiconductor chips. A second interconnection electrically connects the output bonding pad of a lower semiconductor chip of the plurality of semiconductor chips to the input bonding pad of an upper semiconductor chip stacked on the lower semiconductor chip. A third interconnection electrically connects the output bonding pad of an uppermost semiconductor chip of the plurality of semiconductor chips to the second bond finger.
US09070569B2 Semiconductor memory devices and semiconductor packages
A semiconductor memory device includes a semiconductor die and an input-output bump pad part. The semiconductor die includes a plurality of memory cell arrays. The input-output bump pad part is formed in a central region of the semiconductor die. The input-output bump pad part provides a plurality of channels for connecting each of the memory cell arrays independently to an external device. The semiconductor memory device may adopt the multi-channel interface, thereby having high performance with relatively low power consumption.
US09070568B2 Chip package with embedded passive component
A chip package includes an electrically conducting chip carrier and at least one first semiconductor chip attached to the electrically conducting chip carrier. The chip package further includes a passive component. The electrically conducting chip carrier, the at least one first semiconductor chip, and the passive component are embedded in an insulating laminate structure.
US09070562B2 Circuit including a switching element, a rectifying element, and a charge storage element
A circuit can include a pair of switching elements that have terminals electrically connected to terminals of a power supply and have other terminals electrically connected to an output terminal. The circuit can include rectifying elements and one or more charge storage elements. The circuit may be used as a Buck converter. The rectifying element(s) and charge storage element(s) may help to reduce ringing at an output terminal of the circuit during normal operation and reduce the likelihood of exceeding a breakdown voltage between current-carrying electrodes of a switching element within the circuit during a switching operation.
US09070560B2 Semiconductor chip with modified regions for dividing the chip
A semiconductor wafer with modified regions formed in the substrate is provided. A modified region is formed apart from the side of a wafer and a pad is formed over an insulating film, which is formed over the main surface of the substrate of the wafer. Further, the modified region is formed closer to the side surface of the substrate than the pad. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.
US09070559B2 Pattern forming method and method of manufacturing semiconductor device
According to one embodiment, first, a core pattern is formed above a hard mask layer that is formed above a process object. Then, a spacer film is formed above the hard mask layer. Next, the spacer film is etch-backed. Subsequently, an embedded layer is embedded between the core patterns whose peripheral areas are surrounded by the spacer film. Then, the core pattern and the embedded layer are removed simultaneously. Subsequently, using the spacer pattern as a mask, the hard mask layer and the process object are processed.
US09070557B2 Method of forming double pattern in a structure
A semiconductor structure including a double patterned structure and a method for forming the semiconductor structure are provided. A negative photoresist layer is formed on a positive photoresist layer, which is formed over a substrate. An exposure process is performed to form a first exposure region in the positive photoresist layer and to form a second exposure region in the negative photoresist layer in response to a first and a second intensity thresholds of the exposure energy. A negative-tone development process is performed to remove portions of the negative photoresist layer to form first opening(s). The positive photoresist layer is then etched along the first opening(s) to form second opening(s) therein. A positive-tone development process is performed to remove the first exposure region therefrom to form a double patterned positive photoresist layer.
US09070556B2 Patterning of nanostructures
A technique for forming nanostructures including introducing a plurality of molecular-size scale and/or nanoscale building blocks to a region near a substrate and simultaneously scanning a pattern on the substrate with an energy beam, wherein the energy beam causes a change in at least one physical property of at least a portion of the building blocks, such that a probability of the portion of the building blocks adhering to the pattern scanned by the energy beam is increased, and wherein the building blocks adhere to the pattern to form the structure. The energy beam and at least a portion of the building blocks may interact by electrostatic interaction to form the structure.
US09070553B2 Cyclic carbosilane dielectric films
Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.
US09070552B1 Adaptive standard cell architecture and layout techniques for low area digital SoC
A standard cell CMOS device includes a first power rail extending across the standard cell. The first power rail is connected to one of a first voltage or a second voltage less than the first voltage. The device further includes a second power rail extending across the standard cell. The second power rail is connected to an other one of the first voltage or the second voltage. The second power rail includes a metal x layer interconnect and a set of metal x−1 layer interconnects connected to the metal x layer interconnect. The device further includes a set of CMOS transistor devices between the first and second power rails and powered by the first and second power rails. The device further includes an x−1 layer interconnect extending under and orthogonal to the second power rail. The x−1 layer interconnect is coupled to the set of CMOS transistor devices.
US09070549B2 Substrate processing apparatus and substrate processing method
A drying gas is supplied into a drying chamber in a substantially horizontal direction, an obliquely downward direction descendent from the substantially horizontal direction, or a vertically downward direction under a state where a wafer is immersed in a cleaning liquid in a cleaning tank. The wafer is moved from the cleaning tank into the drying chamber, with the drying gas being supplied into the drying chamber. At this time, the supply of the drying gas into the drying chamber is stopped, under a condition where a part of the wafer is immersed in the cleaning liquid stored in the cleaning tank. After the movement of the wafer into the drying chamber has been finished, a drying gas is supplied into the drying chamber in an obliquely upward direction ascendant from the substantially horizontal direction or a vertically upward direction.
US09070548B2 Metal hardmask compositions
The invention provides a composition comprising at least the following A and B: A) a polymer comprising, in polymerized from, at least one “monomer that comprises at least one hydroxyl group;” and B) an organometal compound comprising at least one metal selected from Ti, Zr, Hf, Co, Mn, Zn, or combinations thereof, and wherein the organometal compound is present in an amount greater than 5 weight percent, based on the sum weight of A and B.
US09070546B2 Semiconductor device
Provided is a semiconductor device in which change in characteristics of a transistor is suppressed and an output signal is changed sharply without increasing W/L of the transistor can be provided. Two transistors are connected in parallel between a wiring to which a low potential is supplied and an output terminal. When the low potential is output from the output terminal, both of the two transistors are turned on and then one of them is turned off. Thus, change in characteristics of the transistor can be suppressed and an output signal can be changed sharply without increasing W/L of the transistor.
US09070545B2 Integrated circuit system including stacked chips for generating ID information
An integrated circuit system includes a first chip including a first node and configured to generate first identification information indicating the first chip in response to a voltage of the first node, a second chip including a second node and configured to generate second identification information indicating the second chip in response to a voltage of the second node, and a channel connected to the first node and the second node and generate a voltage difference between the first node and the second node.
US09070544B1 Light bulb installation and removal tool
An installation and removal tool for light bulbs and similar items comprising modular and interchangeable attachment heads, a pole, an articulating joint, and an extraction head. Attachment heads comprise a gripping unit and a handle and are each configured to cooperate with one or more light bulb shapes and/or sizes and further comprises an adhesive system. Several embodiments of the gripping unit comprise a bulb cavity with an engagement surface and a release lip and an adhesive system mounted on the engagement surface such that an air channel is created surrounding the adhesive system. The adhesive system comprises pressure sensitive adhesive and preferably defines an opening in fluid communication with a bore defined by the handle to accommodate extended and oddly shaped bulbs. A protective liner that cooperates with the adhesive component to preserve the functionality of the adhesive when it is not in use.
US09070543B2 Ion mobility separator with variable effective length
An ion mobility separator or spectrometer is disclosed comprising an inner cylinder and an outer cylinder defining an annular volume through which ions are transmitted. Spiral electrodes a-f are arranged on a surface of the inner cylinder and/or on a surface of the outer cylinder. A first device is arranged and adapted to maintain a DC electric field and/or a pseudo-potential force which acts to urge ions from a first end of the ion mobility separator or spectrometer to a second end of the ion mobility separator or spectrometer. A second device is arranged and adapted to apply transient DC voltages to the one or more spiral electrodes in order to urge ions towards the first end of the ion mobility separator or spectrometer. The net effect is to extend the effective path length of the ion mobility separator.
US09070542B2 Selective ionization using high frequency filtering of reactive ions
Selective ionization at atmospheric or near atmospheric pressure of a sample diluted in air is provided in multiple steps. Initially, components of air and/or other gas are ionized to generate reactive ions. The reactive ions are then filtered using a high frequency filter to yield selected reactive ions. Thereafter, the selected reactive ions are reacted with sample molecules of a sample being analyzed in a charge transfer process. Depending on the properties of the sample molecules, the filter may select some reactive ions to enter the sample zone and block others entirely thus controlling ion chemistry and charge transfer yields in the sample zone. The described system is directed to controlling ions at the ion source level, using a high frequency filter technique, in connection with subsequent analysis. The method generates the ions of choice for subsequent analysis in such platforms as ion mobility and differential mobility spectrometers.
US09070541B2 Mass spectrometer with soft ionizing glow discharge and conditioner
An ion source (12, 102) for a mass spectrometer comprising an ionizer (18, 106) receiving an ionizer gas from an ionizer gas supply (16), a conditioner (20) in communication with the ionizer (18, 106), a reactor (22, 110) in communication with the conditioner (20) and adapted for communication with the mass spectrometer, the reactor (22, 110) adapted to receive a sample from a sample supply in communication with the reactor (22, 110), wherein the conditioner (20) is sized to remove fast diffusing electrons from a flow of the ionizer gas from the glow discharge ionizer (18, 106) to the reactor (22, 110).
US09070539B2 Method of charge reduction of electron transfer dissociation product ions
A mass spectrometer is disclosed wherein highly charged fragment ions resulting from Electron Transfer Dissociation fragmentation of parent ions are reduced in charge state within a Proton Transfer Reaction cell by reacting the fragment ions with a neutral superbase reagent gas such as Octahydropyrimidolazepine.
US09070534B2 Ion beam dimension control for ion implantation process and apparatus, and advanced process control
A process control method is provided for ion implantation methods and apparatuses, to produce a high dosage area on a substrate such as may compensate for noted non-uniformities. In an ion implantation tool, separately controllable electrodes are provided as multiple sets of opposed electrodes disposed outside an ion beam. Beam blockers are positionable into the ion beam. Both the electrodes and beam blockers are controllable to reduce the area of the ion beam that is incident upon a substrate. The electrodes and beam blockers also change the position of the reduced-area ion beam incident upon the surface. The speed at which the substrate scans past the ion beam may be dynamically changed during the implantation process to produce various dosage concentrations in the substrate.
US09070533B2 Environmental scanning electron microscope (ESEM/SEM) gas injection apparatus with anode integrated with gas concentrating structure
A gas injection system provides a local region at the sample surface that has sufficient gas concentration to be ionized by secondary electrons to neutralize charged on the sample surface. In some embodiments, a gas concentration structure concentrates the gas near the surface. An optional hole in the gas concentration structure allows the charged particle beam to impact the interior of a shrouded region. In some embodiments, an anode near the surface increases the number of ions that return to the work piece surface for charge neutralization, the anode in some embodiments being a part of the gas injection system and in some embodiments being a separate structure.
US09070532B2 Charged particle beam apparatus sample holder with magnetic field generating element and sample holding element
The disclosed invention provides a sample holder capable of reducing or preventing the influence of a charged particle beam deflected by applying a magnetic field to a sample and provided with means for simply switching between a mode of observing a sample while applying a magnetic field to the sample, and a mode free of a magnetic field in which a magnetic field becomes zero completely. The sample holder includes a magnetic field generating element including three or more magnetic gaps for applying a magnetic field to a sample, a cantilever-beam-shaped sample holding element that holds a sample on one end thereof, and a moving mechanism that adjusts a relative position between a sample and a magnetic gap. The magnetic gaps can be placed along an optical axis of a charged particle beam.
US09070525B2 Electromagnetic switch for starter
An electromagnetic switch for a starter. The electromagnetic switch includes a cylindrical slidable member that is separate from a plunger, loosely encompasses an outer circumferential periphery of a plunger rod, and is axially movable integrally with the plunger. The slidable member is at least partially axially inserted into an inner circumferential periphery of a cylindrical bore. The slidable member has a sliding surface such that, when the solenoid is in its inactive state, the sliding surface is entirely circumferentially in sliding contact with the inner circumferential periphery of the cylindrical bore, and has a vent groove axially extending on the outer circumferential periphery of the slidable member such that, when the solenoid is in its active state, a plunger compartment and the contact compartment are in fluid communication with each other via the vent groove.
US09070521B2 Circuit breaker
A circuit breaker according to the present disclosure includes a cradle having an accommodation space therein, the cradle having a plurality of terminals and a breaker main body having a plurality of terminal connectors contactable with the terminals, respectively, and a plurality of vacuum interrupters connected to the terminal connectors, respectively, the breaker main body being installed within the cradle to be movable between a connected position where the terminal connectors are connected to the terminals and a disconnected position where the terminal connectors are separated from the terminals. Each of the terminal connectors includes a plurality of segment conductors each having one end connected to the vacuum interrupter and the other end facing the terminal. According to the configuration, an amount of heat radiated may increase without an increase in an amount of copper used, thereby facilitating for cooling the terminal connectors.
US09070520B2 Illumination module and illuminated keyboard having the same
An illuminated keyboard includes a first housing and a second housing having a slot, and between the first housing and the second housing, an illumination module, a circuit board, a shield member and a plurality of keys are disposed therein in sequence. The illumination module includes a cover and a luminescence unit, light generated by the luminescence unit is transmitted into a trough of the cover and then travels from a light incident surface to a light emitting surface of the cover. The keys respectively are inserted in a plurality of openings of the shield member, and the light from the light emitting surface is projected on the keys through the circuit board and the openings of the shield member and then passes through the slot of the second housing. This prevents brightness non-uniformity of keys and light leakage between adjacent keys of the keyboard.
US09070513B2 Method of manufacturing chip-type electric double layer capacitor
A method of manufacturing a chip-type electric double layer capacitor, including: forming a lower case having an opened housing space and first and second external terminals buried therein, the first and second external terminals having first surfaces exposed to the housing space, respectively, and second surfaces exposed to an outer region of the lower case, respectively; mounting an electric double layer capacitor cell in the housing space such that the electric double layer capacitor cell is electrically connected to the first surfaces of the first and second external terminals exposed to the housing space; and mounting an upper cap on the lower case so as to cover the housing space.
US09070511B2 Sealing member for a capacitor and method for manufacturing a capacitor
A sealing member for a capacitor is formed of an elastic material, and has a circular cylindrical shape extending along an axial direction. The sectional view perpendicular to the axial direction shows a circular shape. Further, a pair of through-holes is formed parallel to the axial direction. The shape of each through-hole in the sectional view perpendicular to the axial direction of the sealing member is composed of a first arc and a second arc. The first arc protrudes toward the circumference of the sealing member. The second arc protrudes toward the center of the sealing member and has a curvature smaller than that of the first arc.
US09070509B2 Method for manufacturing a planar electronic device having a magnetic component
A method for manufacturing a planar electronic device includes applying a non-conductive fluid polymer to a lower side of a planar substrate. The substrate includes a hole extending through the substrate. The method also includes curing the fluid polymer to form a solid centering layer on the lower side of the substrate, with the centering layer extending across the hole along the lower side of the substrate. The method further includes loading a ferrite material body into the hole of the substrate through the upper side of the substrate, embedding the ferrite material body in an encapsulating material in the hole, and forming one or more conductive loops around the ferrite material body. The ferrite material body is held within the substrate between the lower side and the upper side of the substrate by the encapsulating material.
US09070507B2 Communication and charging circuitry for a single-coil implantable medical device
Communication and charging circuitry for an implantable medical device is described having a single coil for receiving charging energy and for data telemetry. The circuitry removes from the AC side of the circuit a tuning capacitor and switch traditionally used to tune the tank circuitry to different frequencies for telemetry and charging. As such, the tank circuitry is simplified and contains no switchable components. A switch is serially connected to the storage capacitor on the DC side of the circuit. During telemetry, the switch is opened, thus disconnecting the storage capacitor from the tank circuit, and alleviating concerns that this capacitor will couple to the tank circuit and interfere with telemetry operations. During charging, the switch is closed, which allows the storage capacitor to couple to the tank circuitry through the rectifier during some portions of the tank circuitry's resonance.
US09070506B2 Two dimensional quad integrated power combiner for RF power amplifiers
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.
US09070502B2 Electronic component and method for manufacturing the same
An electronic component includes a first magnetic substrate provided with a first notch portion and a second notch portion, a multilayer body, a coil which includes a coil portion, a first lead portion, and a second lead portion. The first lead portion and the second lead portion are connected to the two end portions of the coil portion and overlap the first notch portion and the second notch portion, respectively. The electronic component further includes a first outer electrode and a second outer electrode, a first connection portion and a second connection portion which connect the outer electrodes to the lead portions. Particles are disposed at joint portions of the lead portions and the connection portions and have a coefficient of linear expansion smaller than the coefficients of linear expansion of the first lead portion, the second lead portion, the first connection portion, and the second connection portion.
US09070500B2 R-T-B based permanent magnet
The present invention provides a permanent magnet whose magnetic properties will not be significantly decreased and which is excellent in the temperature properties compared to the existing R-T-B based permanent magnet. In the R-T-B based structure, a stacked structure of R1-T-B based crystallizing layer and (Y, La)-T-B based crystallizing layer can be formed by alternatively stacking R1-T-B and (Y, La)-T-B. In this way, a high magnetic anisotropy field of the R1-T-B based crystallizing layer can be maintained while an improved temperature coefficient of the (Y, La)-T-B based crystallizing layer can be obtained. Further, the lattice distortion in the total stacked structure is moderated by setting the rare earth elements in the (Y, La)-T-B based crystallizing layer as both of Y and La, and a high residual flux density can be obtained accordingly.
US09070498B2 Multilayer electronic component and method for manufacturing the same
A method for manufacturing a multilayer electronic component includes the steps of preparing a laminate including a plurality of laminated insulating layers and a plurality of internal electrodes disposed along interfaces between the insulating layers, edges of the internal electrodes being exposed at a predetermined surface of the laminate, and forming an external electrode on the predetermined surface to electrically connect exposed the edges of the internal electrodes. The step of forming an external electrode includes a plating step of forming a continuous plating film by depositing plating deposits on the edges of the internal electrodes exposed at the predetermined surface and by performing plating growth to be connected to each other, and a heat treatment step of performing a heat treatment at an oxygen partial pressure of about 5 ppm or less and at a temperature of about 600° C. or more.
US09070497B2 Arrangement with at least one superconductive cable
An arrangement is provided with at least one superconductive cable and a cryostat surrounding the cable is disclosed. The cryostat includes at least one thermally insulated pipe which encloses the superconductive cable and a hollow space for conducting a cooling agent therethrough. The cryostat is constructed in the same manner as the superconductive cable located in the cryostat for connection to stationary parts of a transmission path for electrical energy. At each of the ends of the cryostat (KR) constructed for connection to the stationary parts of the transmission path, two spaced apart bellows are mounted in the cryostat (KR), and between the two bellows each of the two ends of the cryostat (KR) a thermally insulated and curved pipe piece is mounted belonging to the cryostat (KR).
US09070496B2 Rotatable connector device
The object is to allow rotatable rollers to rotate smoothly. Rotatable rollers axially supported by bearings provided in a retainer so as to be rotatable include legs, each of which has an engaging part engageable with the corresponding bearing. A sliding part of the leg which is slidable against an inner circumferential surface of the bearing has a cross-sectional shape which is contactable with the inner circumferential surface over a width smaller than a width of the leg.
US09070495B2 Superconducting wire material and method for manufacturing superconducting wire material
Impurities in an oxide superconducting layer or at a surface of the oxide superconducting layer at an intermediate layer side are reduced. A superconducting wire rod has a configuration that includes a metal substrate 10; an intermediate layer 20 formed on the metal substrate 10 and containing a rare-earth element that reacts with Ba; a reaction suppressing layer 28 formed on the intermediate layer 20 and mainly containing LaMnO3+δ1, wherein δ1 represents an amount of non-stoichiometric oxygen; and an oxide superconducting layer 30 formed on the reaction suppressing layer 28 and mainly containing an oxide superconductor containing Ba.
US09070492B2 Nanoporous metal multiple electrode array and method of making same
A method is disclosed for fabricating a low-impedance nanoporous metal multiple electrode array for measuring electrophysiology activity. A patterned photoresist is applied to a substrate, in which the patterned photoresist corresponds to a pattern of the nanoporous metal multiple electrode array. A metal alloy including a sacrificial alloying element is deposited in the pattern of the nanoporous metal electrode array. The patterned photoresist is removed to expose the metal alloy as deposited. At least part of the sacrificial alloying element is removed from the metal alloy to create nanoporous metal electrode tips thereby forming the nanoporous metal multiple electrode array. The resultant nanoporous metal multiple electrode array has improved impedance characteristics in comparison to conventional multiple electrode arrays.
US09070488B2 Conductive composition, method of producing the same, conductive member, touch panel, and solar cell
A conductive composition includes: a) metal conductive fibers having an average minor axis length of from 1 nm to 150 nm; and b) at least one compound selected from the group consisting of a monosaccharide and a derivative thereof, in an amount of from 0.005% by mass to 0.05% by mass with respect to the metal conductive fibers.
US09070487B2 Conductive member
A conductive member disposed as a power supply line and the like includes: a first conductive material and a second conductive material, at least one of which includes a conductive material having electrical resistance lower than that of aluminum; and a metal film formed by depositing powder including a metal, which is accelerated together with a gas and sprayed, in a sold state, onto a surface of a butting part, where the first conductive material and the second conductive material are butted against each other.
US09070480B2 Semiconductor memory device and memory system including the same
A semiconductor memory device and a memory system including the same are provided. The semiconductor memory device includes a first memory unit and a plurality of second memory unit, each including a plurality of memory cells and page buffers corresponding to the memory cells, and a redundancy memory unit including a plurality of redundancy memory cells and a plurality of redundancy page buffers corresponding to the redundancy memory cells. First input/output (I/O) data lines coupled to the first memory unit and second I/O data lines coupled to the second memory unit are coupled to the redundancy memory unit.
US09070474B2 Nonvolatile semiconductor memory device
An erase verify operation is executed divided into at least a first erase verify operation and a second erase verify operation. The first erase verify operation is an operation that applies a verify read voltage only to a first group of memory cells among the plurality of memory cells included in the NAND cell unit, and applies a first read pass voltage to memory cells other than the first group of memory cells. The second erase verify operation is an operation that applies the verify read voltage to a second group of memory cells different from the first group of memory cells, and applies a second read pass voltage different from the first read pass voltage to memory cells other than the second group of memory cells.
US09070472B2 Non-volatile memory and methods with soft-bit reads while reading hard bits with compensation for coupling
A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”.
US09070471B2 Shift register, display-driving circuit, displaying panel, and displaying device
Provided is a shift register of a display-driving circuit which carries out simultaneous selection of a plurality of signal lines by using a simultaneous selection signal. A stage of the shift register includes (i) a set-reset type flip-flop and (ii) a signal generating circuit which generates an output signal of the stage by selectively outputting a signal in response to an output of the flip-flop. The output signal of the stage (i) becomes active due to an activation of the simultaneous selection signal and then (ii) remains active while the simultaneous selection is being performed, and the output from the flip-flop is inactive during a period in which a setting signal and a resetting signal are both being active. This makes it possible to quickly carry out the simultaneous selection of all the signal lines and the initialization of the shift register.
US09070468B2 Magnetic state element and circuits
Described is an apparatus, for spin state element device, which comprises: a variable resistive magnetic (VRM) device to receive a magnetic control signal to adjust resistance of the VRM device; and a magnetic logic gating (MLG) device, coupled to the VRM device, to receive a magnetic logic input and perform logic operation on the magnetic logic input and to drive an output magnetic signal based on the resistance of the VRM device. Described is a magnetic demultiplexer which comprises: a first VRM device to receive a magnetic control signal to adjust resistance of the first VRM; a second VRM device to receive the magnetic control signal to adjust resistance of the second VRM device; and an MLG device, coupled to the first and second VRM devices, the MLG device having at least two output magnets to output magnetic signals based on the resistances of the first and second VRM devices.
US09070467B2 Memory system including nonvolatile memory device and control method thereof
A memory system is provided including a host configured to generate data bit inversion (DBI) information of data according to a major bit of the data, and a nonvolatile memory device configured to invert one or more bits of the data according to the DBI information, and to program the DBI information and the data. A control method of a memory system comprises generating DBI information according to the number of “1” bits of data relative to the number of “0” bits of the data, transferring the data and the DBI information, and inverting bits of the data according to the DBI information, the inverted bits of the data being programmed at the nonvolatile memory device.
US09070465B2 Anti-fuse circuit using MTJ breakdown and semiconductor device including same
An anti-fuse circuit includes an array of anti-fuses. Each anti-fuse has a tunneling magneto-resistance (TMR) element series connected with a transistor, such that breakdown of a magnetic tunnel junction (MTJ) in response to an applied first voltage stores fuse information. A sensing circuit senses and amplifies respective output signals provided by the anti-fuses.
US09070458B2 Method and apparatus for writing to a magnetic tunnel junction (MTJ) by applying incrementally increasing voltage level
A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present logic state of a first one of a set of at least two MTJs, the set of at least two MTJs including the first MTJ and a second MTJ. The in-coming data is to be written into the second MTJ. Further steps are storing the read logic state into a data register, swapping the contents of the data register and the cache register so that the cache register stores the read logic state and the data register stores the in-coming data, applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ.
US09070456B2 High density magnetic random access memory
A magnetic memory device that comprises a substrate, a memory cell including a magnetic tunnel junction which comprises a free ferromagnetic layer having a reversible magnetization direction directed perpendicular to the substrate, a pinned ferromagnetic layer having a fixed magnetization direction directed perpendicular to the substrate, and an insulating tunnel barrier layer disposed between the pinned and free layers, a first electrical circuit for applying a first current to a first conductor electrically coupled to the free layer to produce a bias magnetic field along a hard axis of the free layer, a second electrical circuit for applying a second current to a second conductor electrically coupled to the pinned layer to cause a spin momentum transfer in the free layer, wherein magnitudes of the bias magnetic field and spin momentum transfer in combination exceed a threshold and thus reverse the magnetization direction of the free layer.
US09070455B2 Memristor device with resistance adjustable by moving a magnetic wall by spin transfer and use of said memristor in a neural network
A device with adjustable resistance includes two magnetic elements separated by an insulating or semi-conductor element. The resistance of the device depends on the position of a magnetic wall in one of the magnetic elements, the magnetic wall separating two areas of said magnetic element each having a separate homogeneous direction of magnetization. The device comprises means for moving the magnetic wall in the magnetic element by applying a spin-polarized electric current, such that the resistance of the device is adjustable in a continuous range of values. The invention is useful in neuromimetic circuits, neural networks and bio-inspired computers.
US09070453B2 Multiple programming of flash memory without erase
To store, successively, in a plurality of memory cells, first and second pluralities of input bits that are equal in number, a first transformation transforms the first input bits into a first plurality of transformed bits. A first portion of the cells is programmed to store the first transformed bits according to a mapping of bit sequences to cell levels, but, if the first transformation has a variable output length, only if there are few enough first transformed bits to fit in the first cell portion. Then, without erasing a second cell portion that includes the first portion, if respective levels of the cells of the second portion, that represent a second plurality of transformed bits obtained by a second transformation of the second input bits, according to the mapping, are accessible from the current cell levels, the second portion is so programmed to store the second transformed bits.
US09070452B2 Programming method of nonvolatile memory device
Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.
US09070450B2 Non-volatile multilevel memory cells
The present disclosure includes methods, devices, modules, and systems for operating non-volatile multilevel memory cells. One method embodiment includes assigning, to a first cell coupled to a row select line, a first number of program states to which the first cell can be programmed. The method includes assigning, to a second cell coupled to the row select line, a second number of program states to which the second cell can be programmed, wherein the second number of program states is greater than the first number of program states. The method includes programming the first cell to one of the first number of program states prior to programming the second cell to one of the second number of program states.
US09070447B2 Contact structure and forming method
Vias are formed within a stack of alternating active and insulating layers by forming a first sub stack, a second sub stack over the first sub stack, a first buffer layer therebetween and a second buffer layer under the first sub stack. An upper layer of the first sub stack is exposed through a set of vias by first and second etching processes. The first etching process forms a first set of etch vias through the second sub stack and stops at or in the first buffer layer. The second etching process etches through the first buffer layer to the upper layer of the first sub stack. A third etching process etches through the first set of etch vias, through the first sub stack and stops at or in the second buffer layer. A fourth etching process and etches through the second buffer layer.
US09070441B2 Non-volatile memory system with reset verification mechanism and method of operation thereof
A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state.
US09070435B2 Pre-computation based ternary content addressable memory
A pre-computation based TCAM configured to reduce the number of match lines being pre-charged during a search operation to save power is disclosed. The pre-computation based TCAM stores additional information in a secondary TCAM that can be used to determine which match lines in a primary TCAM storing data words to be searched need not be pre-charged because they are associated with data words guaranteed to not match. The additional information stored in secondary TCAM can include a pre-computation word that represents a range inclusive of a lower and upper bound of a number of ones or zeroes possible in a corresponding data word stored in the primary TCAM.
US09070434B2 Semiconductor device
A semiconductor device comprises a stacked layer memory block and associated peripheral circuits, such as a booster circuit, in stacked layer arrangements. The booster circuit includes plural rectifier cells that are series-connected and plural first capacitors. The plural first capacitors receive a first clock signal on one end, and the other ends thereof are each connected to one end of a different rectifier cell. Each first capacitor is composed of plural first conductive layers that are arrayed with a set pitch perpendicular to the substrate. Either the even numbered or the odd numbered first conductive layers are supplied with the first clock signal. The other of the even numbered or odd numbered first conductive layers are each individually connected to one end of a different rectifier cell.
US09070433B1 SRAM supply voltage global bitline precharge pulse
A technique to generate timing control for an SRAM circuit operating with dual power supplies is provided. A voltage signal is generated by a programmable local clock buffer that receives power from a first voltage level. The voltage signal is shifted higher by a level shifter that receives power from both the first voltage level and a second voltage level. The voltage signal is delayed by a delay clock chopper circuit that receives power from the second voltage level. The delay clock chopper circuit includes a programmable pulse width variation (PWVAR) circuit that varies the pulse width of the voltage signal. The PWVAR circuit receives power from the second voltage level. The voltage signal drives a global bitline of the SRAM. The voltage signal has timing sensitive to both the first and second voltage levels. The voltage signal has its pulse width sensitive to the second voltage level.
US09070432B2 Negative bitline boost scheme for SRAM write-assist
A device includes a transistor switch coupled between a bit line voltage node and a ground node and a boost signal circuit coupled to a gate node of the transistor switch, where the boost signal circuit providing a boost signal responsive to a write enable signal. The device also includes a first delay element and a first capacitor in series with the first delay element. The first capacitor has a first end coupled to the bit line voltage node and a second end coupled to the gate node through the first delay element.
US09070431B2 Memory circuitry with write assist
Memory circuitry is provided with write assist circuitry for generating a lower power supply voltage during write operations. The write assist circuitry includes a plurality of series connected switches including a header switch and a footer switch. Header bias circuitry generates a header bias voltage and footer bias circuitry generates a footer bias voltage. The header bias voltage is an analog signal with a voltage level intermediate between the power supply voltage level and the ground voltage level. The footer bias voltage is an analog signal with a voltage level intermediate between the power supply voltage level and the ground voltage level. During write operation target bit cells to be written are supplied with the power via a current path through the header switch while these are respectively controlled by the header bias voltage and the footer bias voltage.
US09070425B2 Data line control for sense amplifiers
Some embodiments include apparatuses and methods having a first data line, a second data line, a first transistor, a sense amplifier, and a circuit. The first transistor can operate to couple the first data line to a first node during a first stage of an operation of obtaining information from a memory cell associated with the first data line. The second transistor can operate to couple the second data line to a second node during the first stage. The circuit can operate to apply a first signal to a gate of the first transistor during the operation and to apply a second signal to a gate of the second transistor during the operation. The sense amplifier can operate to perform a sense function on the first and second data lines during a second stage of the operation. Additional apparatus and methods are described.
US09070421B2 Page buffer circuit and nonvolatile memory device having the same
A page buffer circuit includes first and second bit lines coupled to a first sensing circuit and with a first space therebetween, and third and fourth bit lines coupled to a second sensing circuit and with the first space therebetween. The second bit line and the third bit line are adjacent to each other with a second space therebetween, and the second space is smaller than the first space.
US09070420B2 Memory sharing system and memory sharing method
A memory sharing system includes a master control device, a slave control device and a memory device. The master control device selectively generates a clock signal to the memory device. The slave control device receives and tracks the clock signal via a delay phase locked loop (DLL) to generate and align an output signal with the clock signal. The master control device arbitrates an access right.
US09070413B2 Integrated recording head with selective movement
A recording head for use in magnetic storage devices is disclosed. The recording head includes a transducer that is bi-directionally movable with respect to a surface of the magnetic storage medium, thereby enabling improved positioning of the transducer during recording head read and write operations. Various structures are disclosed to bi-directionally actuate the recording head transducer. In one embodiment, an interleaver assembly having a plurality of flexure assemblies employs a motor including magnetic portions for selective, bi-directional actuation. In another embodiment, electrostatic charges are employed in the flexure assemblies for selective actuation. In yet another embodiment, piezoelectric elements are included to provide for selective actuation.
US09070411B1 Writable servo overlap zones
Systems and methods are disclosed for writable servo zone overlap regions on a disc memory. An apparatus may comprise a controller configured to determine a servo gate (sgate) timing for an overlap zone including servo patterns of a first servo super zone and a second servo super zone of a disc memory, the sgate timing based on servo pattern timing for the first servo super zone and the second servo super zone. The controller may initiate writing to the overlap zone based on the sgate timing. The controller may also reduce the impact of servo pattern frequency change between zones by calculating a trajectory error prior to the crossing, and providing 1/X of the trajectory error into a servo feedback loop for a following X servo sampling points.
US09070410B2 Recording media, data storage devices, and methods for determining a position error signal in a recording medium
According to various embodiments, a recording medium may be provided. The recording medium may include a dedicated servo layer configured to provide servo information. The dedicated servo layer may include a plurality of tracks. A first track may include a first servo signal. The first servo signal may include first servo bursts of a pre-determined frequency. A second track adjacent to the first track may include a second servo signal. The second servo signal may include second servo bursts of the pre-determined frequency.
US09070409B1 System and method for visually representing a recorded audio meeting
A system and method of visually representing a recorded audio meeting comprises a plurality of discrete microphones, each connected to an audio speaker as well as to a conventional digital mixing console, and a computer system connected to the digital mixing console. Captured audio is transmitted as audio signals to the audio speaker for broadcasting and to the mixing console where they are converted to a digital audio feed for transmission to the computer system. The computer system, which has associated a visual cue with audio signals based on their source, processes the digital audio feed signal to identify the sources of the captured audio therein and generates a visual cue associated with the identified audio source. This activity is represented in a composite visual representation that displays and records all session participants and indicates speaking participants in real time.
US09070407B2 Variable stopwrite threshold
A data storage system according to one embodiment includes a head, a drive mechanism for passing a medium over the head, a controller electrically coupled to the head, and logic integrated with and/or executable by the controller. The logic is configured to: update a first value based on a current position error signal sample, determine whether the first value exceeds a predetermined threshold, determine a stopwrite threshold based on the first value when the first value exceeds the predetermined threshold, determine whether the current position error signal sample exceeds the stopwrite threshold, disable writing when the current position error signal sample exceeds the stopwrite threshold, and enable writing when the current position error signal sample does not exceed the stopwrite threshold.
US09070404B2 Recording tape cartridge
A recording tape cartridge capable of keeping position error signals during running of a recording tape small. A recording tape cartridge is provided with a reel hub, a magnetic tape that is wound round the reel hub, and a lower flange and upper flange that are disposed to oppose one another at each of the both axial direction ends of the reel hub. In a state in which the magnetic tape is completely wound on the reel hub, the magnetic tape is offset toward the upper flange. A space of an edge clearance between a lower end of an outermost periphery portion of the magnetic tape and the lower flange is at least 0.18 mm and at most 0.46 mm. A rate of widening of a facing distance between the lower flange and the upper flange increases toward the outer periphery side.
US09070395B1 Magnetic disk device, head amplifier, and controlling method of magnetic disk device
According to one embodiment, there is provided a magnetic disk device including a magnetic disk, a magnetic head, a heater, and a control unit. The magnetic head reads out information recorded on the magnetic disk. The heater is configured to adjust a magnetic spacing of the magnetic head from the magnetic disk. The control unit is configured to change a bias amount of the magnetic head according to setting of current flow through the heater.
US09070394B1 Suspension microactuator with wrap-around electrode on inactive constraining layer
A PZT microactuator such as for a hard disk drive has a restraining layer on its side that is opposite the side on which the PZT is mounted. The restraining layer is a stiff material. The restraining layer reduces bending of the PZT as mounted and hence increases effective stroke length, or reverses the sign of the bending which increases the effective stroke length of the PZT even further. For simplicity of construction and assembly to the suspension, the PZT microactuator may be a multi-layer PZT with the top layer being unpoled or otherwise inactive PZT material, and having a wrap-around electrode so that the microactuator can be mechanically and electrically bonded to the suspension using a single adhesive dispense and cure step.
US09070393B2 Three-dimensional structure in which wiring is provided on its surface
One aspect of the present invention is a three-dimensional structure in which a wiring is formed on a surface, the three-dimensional structure having an insulating resin layer that contains a filler formed from at least one element selected from typical non-metal elements and typical metal elements, wherein a recessed gutter for wiring is formed on a surface of the insulating resin layer, and at least a part of a wiring conductor is embedded in the recessed gutter for wiring.
US09070387B1 Integrated heat-assisted magnetic recording head/laser assembly
A structure includes a substrate, a metallization layer on the substrate, and a cap layer on the metallization layer, wherein the cap layer includes a cap platinum (Pt) layer on the metallization layer, and a cap gold (Au) layer deposited on the Pt cap layer. A method of bonding a laser diode submount assembly to a hard disk assembly slider includes disposing a first metallization layer on the slider, disposing a cap layer on the first metallization layer, wherein the cap layer includes a cap Pt layer on the first metallization layer, and a cap Au layer deposited on the cap Pt layer, disposing a second metallization layer on the laser diode submount assembly, and forming a solder bond between the cap layer on the slider and the second metallization layer on the laser diode submount assembly.
US09070386B2 Polarization rotator
A polarization rotator comprises a first waveguide configured to be coupled to an input coupler at a first end and a second waveguide, wherein the first waveguide is offset from the second waveguide and a second end of the first waveguide is coupled to a second end of the second waveguide.
US09070384B1 Perpendicular magnetic recording write head with plate having coil regions and heat-sink regions
A magnetic recording write head has a continuous electrically conductive plate with an aperture, a coil region around the aperture and heat-sink regions spaced from the coil region. A yoke stud is located in the aperture and connects the upper yoke layer to the main pole. The plate with the aperture replaces the multi-turn coil of the prior art and thus allows for a short yoke height. Write current is directed to the plate coil region and induces a magnetic field in the aperture, which generates magnetic flux in the yoke stud and the connected main pole. The heat-sink regions dissipate heat generated in the plate by the write current. A lower electrical lead layer is located below the plate and also has an aperture coincident with the aperture in the plate and a coil region around the aperture to assist in generating the magnetic field in the aperture.
US09070383B2 Graded bevel tapered write pole design for field enhancement
A structure and a process for a perpendicular write pole that provides increased magnetic flux at the ABS is disclosed. This is accomplished by increasing the amount of write flux that originates above the write gap, without changing the pole taper at the ABS. Three embodiment of the invention are discussed.
US09070382B2 Side shield pedestal for data readers
Various embodiments may be generally directed to a magnetic element capable of reading magnetic data bits. Such a magnetic element may have at least a magnetic stack laterally adjacent a side shield and non-magnetic pedestal on an air bearing surface (ABS). The non-magnetic pedestal can be configured to have a greater stripe height from the ABS than the side shield.
US09070378B2 Partial write system
A method and system can be implemented to perform a read-modify-write operation on data recorded in a shingled media format. In one embodiment, a write operation on a band of data stored on a magnetic recording medium is initiated at an intermediate position within the band of data. This is particularly well-suited for data written by a shingled media write operation.
US09070375B2 Voice activity detection system, method, and program product
A voice activity detection method in a low SNR environment. The voice activity detection is performed by extracting a long-term spectrum variation component and a harmonic structure as feature vectors from a speech signal and increasing difference in feature vectors between speech and non-speech (i) using the long-term spectrum variation component feature or (ii) using a long-term spectrum variation component extraction and a harmonic structure feature extraction. A correct rate and an accuracy rate of the voice activity detection is improved over conventional methods by using a long-term spectrum variation component having a window length over an average phoneme duration of an utterance in the speech signal. The voice activity detection system and method provides speech processing, automatic speech recognition, and speech output capable of very accurate voice activity detection.
US09070372B2 Apparatus and method for voice processing and telephone apparatus
A voice processing apparatus includes a voice signal acquiring unit that acquires a voice signal converted to plural frequency bands from an input signal having a narrowed band; an expanding unit that generates based on a narrowband component of the voice signal acquired by the voice signal acquiring unit, an expansion band component expanding the band of the voice signal; a correcting unit that corrects the power of the expansion band component by a correction amount determined based on a noise component included in the voice signal acquired by the voice signal acquiring unit; and an output unit that outputs the voice signal of which the band has been expanded based on the expansion band component corrected by the correcting unit and based on the narrowband component of the voice signal acquired by the voice signal acquiring unit.
US09070369B2 Real time generation of audio content summaries
Audio content is converted to text using speech recognition software. The text is then associated with a distinct voice or a generic placeholder label if no distinction can be made. From the text and voice information, a word cloud is generated based on key words and key speakers. A visualization of the cloud displays as it is being created. Words grow in size in relation to their dominance. When it is determined that the predominant words or speakers have changed, the word cloud is complete. That word cloud continues to be displayed statically and a new word cloud display begins based upon a new set of predominant words or a new predominant speaker or set of speakers. This process may continue until the meeting is concluded. At the end of the meeting, the completed visualization may be saved to a storage device, sent to selected individuals, removed, or any combination of the preceding.
US09070366B1 Architecture for multi-domain utterance processing
Features are disclosed for processing a user utterance with respect to multiple subject matters or domains, and for selecting a likely result from a particular domain with which to respond to the utterance or otherwise take action. A user utterance may be transcribed by an automatic speech recognition (“ASR”) module, and the results may be provided to a multi-domain natural language understanding (“NLU”) engine. The multi-domain NLU engine may process the transcription(s) in multiple individual domains rather than in a single domain. In some cases, the transcription(s) may be processed in multiple individual domains in parallel or substantially simultaneously. In addition, hints may be generated based on previous user interactions and other data. The ASR module, multi-domain NLU engine, and other components of a spoken language processing system may use the hints to more efficiently process input or more accurately generate output.
US09070357B1 Using speech analysis to assess a speaker's physiological health
A method for using speech analysis to detect speech pathologies can begin with registration of a patient with a speech-based health monitor. A speech segment baseline representing an initial state of the patient's speech system can be established for the patient. When prompted, the patient can submit a speech segment representing a current state of the patient's speech system to the speech-based health monitor. The speech-based health monitor can analyze the submitted speech segment using the established speech segment baseline and/or a speech segment history that comprises speech segments previously submitted by the patient. Based upon said analysis, satisfaction of a health alert definition can be determined. A health alert definition can define an action performed by the speech-based health monitor when its associated triggering conditions are satisfied. The action associated with the at least one satisfied health alert definition can then be executed.
US09070356B2 Method and apparatus for generating a candidate code-vector to code an informational signal
A method (300) and apparatus (100) generate a candidate code-vector to code an information signal. The method can include producing (310) a target vector from a received input signal. The method can include constructing (320) a plurality of inverse weighting functions based on the target vector. The method can include evaluating (330) an error value associated with each of the plurality of inverse weighting functions to produce a fixed codebook code-vector. The method can include generating (340) a codeword representative of the fixed codebook code-vector, where the codeword can be used by a decoder to generate an approximation of the input signal.
US09070353B2 Advanced pickup selector switch assembly
The Advanced Pickup Switch is a lever-style switch that will allow any guitarist, with a minimal amount of technical skill, to alter the pickup wiring configuration of their electric guitar for altering the tonal choices available without the need to manually hard-wire each connection. The tonal alterations are effected via rotationally and axially displaceable multi-layer printed circuit board (PCB) discs that contain pre-determined tracings for specific pickup coil configurations. These are attached to the outboard sides of the switch with a single screw, thereby allowing for complex wiring alterations with the use of a screwdriver alone. The lateral movement of the switch and corresponding axial displacement of the PCB's allows for the expansion of the number of combinations without the use of a secondary switch. A robust two-pronged resilient detent arm cooperates with gearage for providing a switch with the tactile feedback that is familiar and comfortable to guitarists worldwide.
US09070352B1 System and method for mixing song data using measure groupings
A system and method are provided for mixing song data based on measure groupings. A player or program may recognize measure groupings in a song through identifying cuepoints. The player or program may use the cuepoints and/or other identifiers of measure groupings to generate a transition between the song and other songs. Parts of one or both songs may be time-stretched, or frames may be added or deleted, such that the beats in both songs are substantially aligned during the transition. The system and method may also involve altering the sequence of frames in one or both of the songs, so that the transition may have various sonic qualities as desired by a user. A choice of transition modes may be provided via a user interface that allow the user some control over when and how transitions between songs are executed.
US09070347B2 Tool for rounding off corners of frets
A file having concave portion is most well-known. The use of this file has a risk of ruining an effect of a leveling of frets due to undesirable scrape of a top portion of the fret and to losing a normal function of the fret due to a change of the height thereof. Since the file is held by hand, a tool angle varies in use. Since the size of a polishing surface of the tool is not suitable for all types of frets, a complete set including a various size of the files is required in order to select and use one of them as necessary and appropriately. Therefore, a tool of the invention has been made to solve these problems as follows: 1. the top portion of the fret is not scraped and the resultant fret after the leveling thereof are protected as important; 2. since the tool is placed on the fretboard with two side portions of the tool, and thus the tool angle is kept constant (thus, during use the axis of the tool is not rotated and the centerline of the tool is not displaced); 3. one model of the tool may be used for all types of frets; and 4. all the frets take a fine symmetrical shape.
US09070345B2 Integrating street view with live video data
An approach is provided in which a system retrieves a street view image that depicts a geographical area viewed from a street view perspective. The system identifies a video device depicted in the street view image that provides a live video stream of a real-time viewable area corresponding to at least a portion of the depicted geographical area. In turn, the system generates a composite image that combines the street view image with a viewing area overlay corresponding to the real-time viewable area.
US09070342B2 Display panel with pre-charging operations, and method for driving the same
A display panel includes a switch control circuit, a first pre-charge switch circuit and a second pre-charge switch circuit. The switch control circuit is used for comparing the most significant bits (MSBs) of data signals to generate switch control signals for controlling the first and second pre-charge switch circuits, such that data lines are pre-charged through the first and second pre-charge switch circuits respectively. A method for driving a display panel is also provided herein.
US09070335B2 Display device
A display device includes an insulating substrate; a first conductive layer in which a first signal line and a second signal line are formed on the insulating substrate; an insulating layer provided in an upper layer of the first conductive layer; and a semiconductor layer, which is provided in an upper layer of the insulating layer, and in which a semiconductor film, which overlaps the first signal line and the second signal line in plan view, is formed.
US09070333B2 Information processing apparatus, information processing method, and program
An information processing apparatus includes a first graphics chip, a second graphics chip, a detection unit, and a display unit. The first graphics chip has a first drawing processing capacity. The second graphics chip has a second drawing processing capacity different from the first drawing processing capacity. The detection unit detects a request to change over from an execution of the first graphics chip to an execution of the second graphics chip. The display unit displays a first window prompting to close an application in execution, in a case where the detection unit detects the request to change over from the execution of the first graphics chip to the execution of the second graphics chip.
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