Document Document Title
US08660062B2 Methods and apparatus for quality of service-based uplink polling schemes
A method for allocating polling bandwidth may include generating polling tokens corresponding to connections maintained by a base station. The polling tokens may be generated at configurable time intervals. The method may also include assigning priorities to the polling tokens. The priority of a polling token may depend on a scheduling type of a corresponding connection. The method may also include allocating polling bandwidth to the connections that correspond to the highest priority polling tokens when uplink bandwidth is available to allocate for polling.
US08660054B2 Method for supporting distribution of warning messages
A method for supporting distribution of warning messages, is characterized in that an NGN (Next Generation Network) infrastructure is employed for distribution, wherein the infrastructure includes a plurality of network elements including endpoints, wherein a hierarchical architecture is defined for the network elements, wherein groups of network elements including endpoints with specific characteristics are defined, wherein each of the network elements provides its group membership information to at least one higher-tier network element, and wherein at least one group warning controller is provided that, upon receiving a request from a source node, generates a warning message for one or more target groups and forwards the warning message to lower-tier network elements of the respective target group or groups towards endpoints.
US08660052B2 Method, base station and user equipment for transmitting and acquiring control information in broadcast multicast system
Various embodiments provide a method for transmitting control information in a broadcast multicast system, the method includes: broadcasting identifier information of N Multicast Broadcast Single Frequency Network (MBSFN) areas to which the current cell belongs through a system message wherein N is an integer with N>1; transmitting indication information of control information of the N MBSFN areas through a system message or a Radio Resource Control (RRC) message; and transmitting the control information of the N MBSFN areas respectively through a Multicast Control Channel (MCCH) of the current cell according to the indication information. Various embodiments can guarantee normal working of a UE when the UE is located in an area overlapped by multiple MBSFN areas.
US08660051B2 Relay apparatus, communication apparatus, communication system, and frame transfer method
A relay apparatus converts a received multicast frame to a unicast frame, sets a relatively higher communication rate than a specified communication rate, and forwards the converted unicast frame to a communication apparatus at the relatively higher communication rate. The relay apparatus attaches conversion information, which represents execution of the conversion, to the unicast frame. On reception of a unicast frame from the relay apparatus, the communication apparatus determines whether the received unicast frame is the converted unicast frame from the multicast frame, based on the conversion information attached by the relay apparatus. Upon determination that the received unicast frame is the converted unicast frame, the communication apparatus reconverts the received unicast frame to a multicast frame and transfers the reconverted multicast frame to an application installed in the communication apparatus to utilize a multicast frame. This arrangement enables the communication apparatus to effectively utilize a received unicast frame that is a converted unicast frame from a multicast frame.
US08660047B2 Method of broadcasting data packets in a network of mobile nodes and associated terminal
Disclosed is a periodic broadcasting of data packets in an ad hoc network formed by a plurality of mobile nodes that can move along traffic lanes forming junctions and can be located. A data packet is broadcast by a broadcaster node elected from a set of candidate nodes at each junction. The broadcaster node is elected in a decentralized manner at each candidate node by comparing the estimated travel time to reach the center of the junction with a particular reference time period between two successive broadcasts.
US08660043B2 Communication apparatus to support multiband communication
A communication apparatus to support multiband communication is provided. The communication apparatus may be applicable to, for example, a duplexer module for the multiband communication. The communication apparatus may be manufactured to be small and light by simplifying a circuit structure of the duplexer module.
US08660041B2 Method and apparatus for time division duplex communication
Embodiments provide a method and apparatus for performing time division duplex communication, such as may be performed over a wireless communications network. In the embodiments a first circuit pathway is used to transmit a first radio frequency signal in a transmission mode and a second circuit pathway is used to receive a second radio frequency signal in a reception mode. In the reception mode, the first radio frequency signal is switched to an alternate circuit pathway. This may be performed by a radio frequency integrated circuit or by other control circuitry. Switching to an alternate circuit pathway reduces leakage of the first radio frequency signal into the second radio frequency signal.
US08660038B1 Previewing voicemails using mobile devices
Previewing voice over internet protocol (VoIP) voicemail is disclosed. A request is sent for VoIP voicemail available to preview using a data channel associated with a cellular phone system. Information of voicemail available to preview and one preview portion for each of the voicemail available to preview are received. Information of voicemail available to preview is displayed. A selection of one of the available voicemails is received. A preview portion of the voicemail corresponding to the selection of one of the available voicemails is played.
US08660035B2 Wireless relay network media access control layer control plane system and method
A method and system for using a communication network having a relay node to provide wireless communication with a mobile station. A ranging region is established with the mobile station in which the establishment of the ranging region includes the transmission of control information corresponding to the relay node. The mobile station is allowed to enter the communication network. The relay node is used to wirelessly communicate with the mobile station in at least one of the uplink and downlink directions.
US08660033B2 Apparatus and method for providing service in service zone
A method for providing a service in a service zone comprises: receiving, from an access point, a service set identifier (SSID) or a basic service set identifier (BSSID); when the SSID or the BSSID has been received for a preset time, transmitting, to a server, a message requesting for service identification information corresponding to the received SSID or BSSID; receiving, from the server, the service identification information; and creating an object based on the received service identification information.
US08660031B2 Communication device, control method therefor, and program
Even when a plurality of communication parameter providing devices exist, a communication parameter setting process is enabled.When a plurality of communication parameter providing devices exist, one of the communication parameter providing devices is determined. For example, all the communication parameter providing devices are caused to stop the providing process. Alternatively, a user is allowed to select a communication parameter providing device. Alternatively, a communication parameter providing device is determined in accordance with a predetermined rule.
US08660030B2 High performance and low complexity scheduling method for adaptive resource usage in OFDMA wireless relay networks
A method for scheduling transmissions in wireless network includes receiving information ranging from conventional data to real-time streaming applications into a basestation of an OFDMA wireless relay network and scheduling transmission of the information from the basestation by influencing adaptive frame segmentation and access hop reuse in the transmission of the information for achieving higher transmission flow of the information, Where the scheduling is formulated as an integer program, the scheduling includes solving a linear programming relaxation of the integer program and rounding to integral allocations with allocation to at least one of a subset of wireless users and subsets of relays in the network for obtaining frame segmentation and reuse. Where the scheduling is formulated by following a bisection approach to guide adaptation of the frame segmentation, the scheduling determines a subset of users with maximum flow per unit resource for a given frame segmentation and the resulting flow from current and previous scheduling being used to guide adaptation of frame segmentation towards convergence.
US08660029B2 Method for designating a dual region
A method for designating a dual region according to one embodiment of the present invention comprises the steps of: enabling a terminal which is in communication with a first network to calculate a channel state threshold value corresponding to data; comparing the channel state value of the first network and the channel state value of the second network, acquired using a pilot signal of a second network, with the channel state threshold value; calculating a network evaluation score of the first network; comparing the network evaluation score of the first network with a network evaluation threshold value for designating a dual region, if the channel state value of the first network and the channel state value of the second network are larger than the channel state threshold value; and determining whether to designate a dual region in accordance with the result of the comparison using the network evaluation threshold value. The method of the present invention can reduce service cutoff or delay time during inter-radio access.
US08660024B2 Estimation method to evaluate a system reliability of a cloud computing network
An estimation method applies to evaluating a system reliability of a cloud computing network, and the steps thereof includes: providing a network model which sends data through at least two path between a cloud and a client; inputting a demand, a time constraint and a maintenance budget into the network model; providing plural capacity vectors corresponding to different states of the flow of the cloud computing network; selecting a first set of vectors from the capacity vectors for satisfying the demand and the time constraint; deleting the capacity vectors which do not meet the maintenance budget from the first set of vectors to form a second set of vectors; and computing an upper boundary of the system reliability based on the first set of vectors and an lower boundary of the system reliability based on the second set of vectors.
US08660016B2 Testing and monitoring voice over internet protocol (VoIP) service using instrumented test streams to determine the quality, capacity and utilization of the VoIP network
The present invention enables testing of a VoIP network using various instrumented test streams. The testing can determine the quality of the transmission network before an internet VoIP service is put into production. The testing also enables regular diagnostic audits of a VoIP network to maintain the quality of the VoIP network. The testing enable measurement of, for example jitter, packet loss and delay and allow characteristics of the VoIP network to be obtained. In addition, the present invention can to determine the capacity and utilization of a VoIP transport network. Based on the measurements and characteristics of the VoIP network the present invention can control routing of a call on the VoIP network or can prevent a call from being made. The present invention also enables dynamic switching of CODECS during a session to enhance the performance of the VoIP network.
US08660011B2 Intelligent jack providing perceptible indication of network connectivity
An intelligent network jack configured for connection to a communication network includes a housing, an input connector, an output connector adapted for coupling to the communication network, processing circuitry arranged within the housing and operative to perform a test for connectivity between the network jack and the communication network, and a display for presenting a result of the connectivity test in a user-perceptible manner. In one embodiment, the network jack comprises an in-wall network jack configured for installation with the housing primarily on one side of a wall and with at least the input connector and display accessible on an opposite side of the wall. In another embodiment, the network jack comprises an adaptor network jack with the output connector configured for insertion into an input connector of an existing conventional in-wall network jack.
US08660010B2 System and method for second order multi-layer traffic grooming for optical network optimization
A method includes forming a set of direct connections (including a high-speed connection and a low-speed connection) between an origination central office (OCO) and a destination central office (DCO). The method includes forming a spoke connection between the OCO and a hub node and forming a connection between the hub node and the DCO. The spoke connection is formed to carry first residual demand traffic from the OCO to the hub node. The connection is formed to carry the first residual demand traffic and second residual demand traffic (received at the hub node from other OCOs) from the hub node to the DCO. The method includes determining a first estimated cost (of forming the set of direct connections) and a second estimated cost (of forming the spoke connection and the connection). The method includes determining whether the first estimated cost exceeds the second estimated cost.
US08660007B2 Performing rate limiting within a network
Methods and systems for performing rate limiting are provided. According to one embodiment, information is maintained regarding a set of virtual networks into which a network has been logically divided. Each virtual network comprises a loop-free switching path, reverse path learning network and provides a path through the network between a first and second component thereby collectively providing multiple paths between the first and second components. Packets are received by the first component that are associated with a flow sent by a source component. The packets are forwarded by the first component to the second component along a particular path defined by the set of virtual networks. A congestion metric is determined for the particular path and based thereon it is determined whether a congestion threshold has been reached. Responsive to an affirmative determination, the source component is instructed to limit the rate at which the packets are sent.
US08660005B2 Load balancing hash computation for network switches
Techniques to load balance traffic in a network device or switch include a network device or switch having a first interface to receive a data unit or packet, a second interface to transmit the packet, and a mapper to map between virtual ports and physical ports. The network device includes hash value generator configured to generate a hash value based on information included in the packet and based on at least one virtual port. The hash value may be optionally modified to load balance egress traffic of the network device. The network device selects a particular virtual port for egress of the packet, such as by determining an index into an egress table based on the (modified) hash value. The packet is transmitted from the network device using a physical port mapped to the particular virtual port.
US08660004B2 Systems and methods for multicast admission control
Systems and methods for multicast admission control are provided. In one embodiment, a node comprises: a first interface configured to receive a multicast channel access request, from a subscriber interface, including an address for a channel; a memory including a subscriber profile and VLAN configuration data for the network; a processor that identifies a first VLAN corresponding to the address from the VLAN configuration data and determines whether the subscriber is authorized to receive the channel via the first VLAN based on access policy designated by the subscriber profile; wherein the processor further determines whether granting access to the channel violates admission control policy based on predefined bandwidth requirements and/or a stream count limit for the first VLAN; wherein when the subscriber interface is authorized to receive the channel and when granting access to the channel does not violate admission control policy, the processor routes the channel to the subscriber.
US08660002B1 Managing media resources utilizing session initiation protocol
Provides management of the communication of media communicated to a Session Initiation Protocol (SIP) enabled multiplexer in a media distribution network. A SIP enabled multiplexer receives information from one or more components of the media distribution network to identify the status of the media distribution networks. Utilizing the information, a level of communication that media is to be communicated from a media source is determined. The level of communication is maintained until a request is received to communicate media from the media source. The request is compared to the determined level of communication at which the media is to be communicated. The media source receives an indication as to the level of communication that media is to be communicated. As a result, the media source communicates a request to communicate media at the indicated level of communication.
US08659998B2 IO latency reduction
An application and audio driver communicate audio data via a ring buffer using a system interface. An application reads or writes data from the buffer in a unit of data. Positions within the buffer correspond to a particular time. To write data to the buffer at a particular position in the buffer that corresponds to a particular time, an application is awaken a period of time (“client-side offset”) before the driver reaches the position. The period of time is computed based on a variety factors. One factor is the amount of time the system interface assumes an application uses to write the unit of data to the buffer. For operations that entail the application inserting data into the buffer, the application may specify a weight value to apply to the factor to reduce it and the latency period.
US08659994B2 Method and system for communicating multicast traffic over protected paths
In accordance with embodiments of the present disclosure, a method is provided for communicating multicast traffic. The method may include in response to receipt of multicast control traffic at a network element to be communicated to a protection switching group, communicating the multicast control traffic to each of a working path and a protection path of the protection switching group. The method may also include in response to receipt of multicast control traffic via either of the working path and the protection path, processing the multicast control traffic as if the multicast control traffic was received via both the working path and the protection path.
US08659993B2 Priority domains for protection switching processes
Embodiments of the invention describe apparatus, systems and methods for creating a protection switching domain having a control virtual local area network (vlan), a first set of high priority protected data vlans, and a second set of lower priority protected data vlans. When a fault is detected at a ring network, indicating a failed link between adjacent nodes, said fault is communicated to a master node of the ring network via the control vlan.Embodiments of the invention allow a user to specify a priority for each of its domains on a given set of ring ports. The higher priority protected data domains are serviced to completion prior to servicing the lower priority protected data domains, ensuring that data traffic convergence time does not increase across these vlans.
US08659991B2 Minimizing the number of not-via addresses
In an embodiment, a method comprises determining a set of protected components that are associated with a notifying node; determining a single network repair address for the set of protected components, wherein the single network repair address is for use in response to unavailability of any of the protected components when transmitting network traffic to the notifying node; assigning the single network repair address to each of the protected components; wherein the notifying node is an internetworking device and wherein the method is performed by one or more processors.
US08659990B2 Serial networking fiber-to-the-seat inflight entertainment system
An entertainment system that exhibits advantages of fiber-to-the-seat systems, has improved failure recovery characteristics, and reduces the connection components is disclosed. In one aspect, an inflight entertainment system comprises a plurality of head end line replaceable units physically interconnected in a ring configuration and a plurality of serially-connected networking line replaceable units physically interconnected in a serial configuration, wherein two of the serially-connected networking line replaceable units at the edge of the serial configuration are physically interconnected with two of the head end line replaceable units, respectively, wherein a loop-free head end data path is maintained between active head end line replaceable units by regulating link participation in the head end data path, and wherein one or more loop-free serially-connected networking data paths are maintained between at least one of the two head end line replaceable units and active serially-connected networking line replaceable units by regulating link participation in the serially-connected networking data paths.
US08659989B2 Method and apparatus for waveform independent ranging
A system and method for calculating a time of arrival (TOA) of an electromagnetic signal is presented. A method receives a fast Fourier transform (FFT) signal that is a FFT of an original electromagnetic signal containing symbol data. The FFT signal is either multiplied or divided with a value to remove the symbol data. Removing the symbol data generates a perturbed data values representing perturbed signal with a perturbed covariance. The method calculates a perturbed covariance of the perturbed data values. After the perturbed covariance is calculated, the method at least partially corrects the perturbed covariance to produce a corrected covariance. The TOA of the original electromagnetic signal is calculated based, at least in part, on the perturbed covariance.
US08659986B1 Crosstalk cancellation for a multiport ethernet system
A transceiver system is disclosed. The transceiver system comprises a first transceiver physical layer circuit (PHY) having a first plurality of channels and a second transceiver PHY disposed adjacent the first transceiver PHY and having a second plurality of channels. Filter circuitry is coupled between at least one of the plurality of first channels and at least one of the plurality of second channels.
US08659985B2 Optical pickup and optical read/write drive
In one embodiment of the present invention, an optical pickup for writing and reading data on an optical storage medium comprises a diffractive element for diffracting a light beam to split it into multiple light beams. The diffracted light beams includes a zero-order diffracted light beam for writing data on a track of the land or the groove of the optical storage medium and non-zero-order diffracted light beams for reading the data from the track. The diffractive element has first and second diffraction gratings that have mutually different grating vector directions and pitches. The first diffraction grating forms light beam spots on the same track by the non-zero-order and zero-order diffracted light beams. The second diffraction grating forms a light beam spot to extend to both sides of said track, or forms a light beam spot on one side of said track, by the non-zero-order diffracted light beams.
US08659980B2 Recording head with waveguide
An apparatus having a first pole with a first side and a second side opposite from the first side, a second pole positioned on the first side of the first pole, and a waveguide positioned on the second side of the first pole wherein the waveguide has an end adjacent to an air bearing surface. The first pole includes a first portion spaced from the waveguide and a second portion extending from the first portion to the air bearing surface, with the second portion being structured such that an end of the second portion is closer to the waveguide than the first portion.
US08659975B2 Vibration generation and detection in shear wave dispersion ultrasound vibrometry with large background motions
A method for measuring a mechanical property of a subject includes using an ultrasonic transducer to apply ultrasonic vibration pulses to a vibration origin in the subject in an on-off time sequence in order to impart a harmonic motion at a prescribed frequency to the subject, and when the vibration pulses are off, preferably using the same transducer to apply ultrasonic detection pulses to a motion detection point and to receive echo signals therefrom in order to sense the harmonic motion on the subject at the motion detection point The ultrasonic detection pulses are interspersed with the vibration pulses and can be applied in a non-uniform manner From the received ultrasonic echo signals, a harmonic signal is detected and a characteristic such as amplitude or phase of the detected harmonic signal is calculated using a Kalman filter or interpolation.
US08659974B2 System and method of 3D salt flank VSP imaging with transmitted waves
According to a preferred aspect of the instant invention, there is provided herein a system and method for imaging complex subsurface geologic structures such as salt dome flanks using VSP data. In the preferred arrangement, a receiver wave field will be downward continued through a salt flood model and a source wave field will be upward continued through a sediment flood model until they “meet” at the subsurface locations of the VSP receivers. The source and receiver wave fields will be cross correlated as an imaging condition at each depth interval.
US08659973B2 Sequential-write, random-read memory
In one embodiment, a method includes, in response to assertion of a write-enable signal at a memory array that comprises a plurality of words, sequentially and at a first clock frequency writing data to the memory array starting at a beginning of the memory array until the memory array is full. The method includes, independent of the writing of data to the memory array, asynchronously and at a second clock frequency that is slower than the first clock frequency reading data from the memory array based on read addresses received at the memory array.
US08659970B2 Memory device power control
The apparatus described herein may comprise a first set of transistors, including a first transistor and a second transistor, and a second set of transistors, including a third transistor and a fourth transistor. Gates of the first and second transistors may be coupled to a first signal and a second signal, respectively, each indicating whether a corresponding one of a first supply voltage and a second supply voltage reaches a first threshold voltage or a second threshold voltage to power on a first circuit or a second circuit of a memory device. Gates of the third and fourth transistors may be coupled to a first inverted version of the first signal and a second inverted version of the second signal, respectively. An outcome signal of the second set of transistors may indicate a power-on state of the memory device responsive to power states of the first and second signals.
US08659969B2 Semiconductor device
By using a fact that a bit error in an on-chip embedded memory occurs at a random address, means for creating a chip-unique ID and utilizing this ID are provided. A controller having received a verification request from outside instructs a variable power supply circuit to decrease a voltage supplied to a memory to be lower than that at the normal operation time. When the voltage supplied to the memory is stabilized, the controller requests a memory test to a memory BIST. By using an address where an error occurs due to a result of the memory test, the controller creates the chip-unique ID and uses the ID as a response to the verification request.
US08659968B2 Power supply circuit and semiconductor memory device including the power supply circuit
According to one embodiment, a power supply circuit, which generates a power supply voltage which is applied to a memory cell array including a plurality of memory cells disposed at intersections between a plurality of word lines and a plurality of bit lines, comprises a first boost circuit configured to boost an input voltage, a first voltage step-down circuit having an input connected to an output of the first boost circuit, and a voltage control circuit configured to control the first boost circuit and the first voltage step-down circuit. The voltage control circuit is configured to generate, not via the first voltage step-down circuit, a voltage which is boosted by the first boost circuit, when a first voltage is transferred to a non-selected memory cell.
US08659965B2 Sense amplifier having loop gain control
Memories, sense amplifiers, and methods for amplifying a current input are disclosed, including a sense amplifier including a bias circuit configured to provide a bias voltage having a magnitude responsive to maintaining a substantially constant loop gain, and further including an amplifier stage coupled to the bias circuit to receive the bias voltage and configured to amplify a input current at an input-output node, a loop gain of the current amplifier stage is controlled at least in part to the bias voltage.
US08659963B2 Enhanced power savings for memory arrays
A memory array is provided that comprises a plurality of global bit lines such that each bit line is coupled to a plurality of memory cells. The memory array further comprises a plurality of precharge logic such that each precharge logic is coupled to an associated global bit line in the plurality of global bit lines. Identification logic in the memory array is coupled to the plurality of precharge logic. The identification logic provides a precharge enable signal to a subset of the plurality of precharge logic on each clock cycle such that the subset of precharge logic precharges its associated subset of global bit lines to a voltage level of a voltage source, thereby reducing the power consumption of the memory array.
US08659962B2 Semiconductor device, semiconductor system having the same and operating method thereof
A semiconductor device includes a data storage unit configured to receive input data, outputs the input data with a difference in voltage level between logic levels, and output comparison data whose logic level is distinguished from the input data; a test operation unit configured to determine a logic level of test data periodically in response to a data reference voltage whose voltage level is determined in response to a level test code during a test operation period defined by a test entry command and a test exit command, and generate a test result signal by comparing a logic level of the comparison data with the logic level of the test data; and a test operation sensing signal generation unit configured to generate a test operation sensing signal that is activated in response to the test entry command and inactivated in response to the test result signal.
US08659959B2 Advanced memory device having improved performance, reduced power and increased reliability
An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device.
US08659955B2 Memory array having word lines with folded architecture
According to an exemplary embodiment, a memory array arrangement includes a plurality of word lines, where at least two of the plurality of word lines are concurrently active word lines. Each of the plurality of word lines drive at least one group of columns. The memory array arrangement also includes a multiplexer for coupling one memory cell in a selected group of columns to at least one of the plurality of sense amps, thereby achieving a reduced sense amp-to-column ratio. The memory array arrangement further includes a plurality of I/O buffers each corresponding to the at least one of the plurality of sense amps. The memory array arrangement thereby results in the plurality of word lines having reduced resistive and capacitive loading.
US08659951B2 Nonvolatile semiconductor memory device and method of data write therein
A bit line is electrically connected to one end of a current path of a memory cell. A word line is commonly connected to the memory cells arranged in a direction intersecting the bit line. A control circuit executes a write operation for applying a write voltage to the word line so shift a threshold voltage of the memory cell to be data written that the threshold voltage of the memory cell to be data written reaches a certain threshold voltage. During the write operation, the control circuit, while applying a gradually rising write voltage to the word line, gradually changes a voltage applied to the bit line based on a relationship between the threshold voltage of the memory cell to be written and a number of times of the write voltage applications.
US08659949B1 Three-dimensional memory structure and method of operating the same hydride
A three-dimensional memory structure is provided, comprising plural stacked structures vertically formed on a substrate, each stacked structure comprising a bottom gate, wherein the bottom gates of the stacked structures are electrically connected; plural gates and gate insulators alternately stacked on the bottom gate; and two selection lines formed above the gates and spaced apart form each other and the selection lines being independently controlled, wherein the gate insulator fills between the selection lines, between the gate and the selection lines and forms on top of the selection lines for insulation. The 3D memory structure further comprises plural charge trapping multilayers formed outsides of the stacked structures and extending to the bottom gates; plural ultra-thin channels formed outsides of the charge trapping multilayers and lined between the adjacent stacked structures; and a dielectric layer formed between the ultra-thin channels and between the stacked structures.
US08659948B2 Techniques for reading a memory cell with electrically floating body transistor
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell consisting essentially of one transistor. The transistor comprises a gate, an electrically floating body region, and a source region and a drain region adjacent the body region. The device includes data sense circuitry coupled to the memory cell. The data sense circuitry comprises a word line coupled to the gate region and a bit output coupled to the source region or the drain region.
US08659946B2 Non-volatile memory devices including vertical NAND strings and methods of forming the same
A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be electrically connected to a respective word line plate, where the plurality of word line contacts are aligned to a bit line direction in the device.
US08659945B2 Nonvolatile memory device and method of operating same
A nonvolatile memory device comprises a bulk region and a plurality of memory cells connected to a source line and a plurality of wordlines. The method comprises applying a source line voltage to the source line with a first magnitude, applying a bulk voltage to the bulk region with a second magnitude lower than the first magnitude, and performing access operations on the plurality of memory cells while maintaining a substantially constant difference between the bulk voltage and the source line voltage.
US08659944B2 Memory architecture of 3D array with diode in memory string
A 3D memory device includes a plurality of ridge-shaped stacks, in the form of multiple strips of conductive material separated by insulating material, arranged as strings which can be coupled through decoding circuits to sense amplifiers. Diodes are connected to the bit line structures at either the string select of common source select ends of the strings. The strips of conductive material have side surfaces on the sides of the ridge-shaped stacks. A plurality of conductive lines arranged as word lines which can be coupled to row decoders, extends orthogonally over the plurality of ridge-shaped stacks. Memory elements lie in a multi-layer array of interface regions at cross-points between side surfaces of the conductive strips on the stacks and the conductive lines.
US08659942B1 Adapting read reference voltage in flash memory device
In one embodiment, a method comprises determining, by a hardware component, an adaptation for a reference voltage used in a flash memory device as a function of a difference of bit error types experienced by the flash memory device. The reference voltage is shifted at least in part by the adaptation.
US08659939B2 Spin-torque memory with unidirectional write scheme
Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme.
US08659933B2 Hereto resistive switching material layer in RRAM device and method
A non-volatile memory device includes a first electrode, a resistive switching material stack overlying the first electrode. The resistive switching material stack comprising a first resistive switching material and a second resistive switching material. The second resistive switching material overlies the first electrode and the first resistive switching material overlying the second resistive switching material. The first resistive switching material is characterized by a first switching voltage having a first amplitude. The second resistive switching material is characterized by a second switching voltage having a second amplitude no greater than the first switching voltage. A second electrode comprising at least a metal material physically and electrically in contact with the first resistive switching material overlies the first resistive switching material.
US08659929B2 Amorphous silicon RRAM with non-linear device and operation
A non-volatile memory device includes a resistive switching device having a first electrode, a second electrode, and a resistive switching element, wherein the resistive switching element comprises a silicon material disposed in an overlapping region between the first electrode and the second electrode, wherein the second electrode comprises at least a metal material physically and electrically in contact with the resistive switching material, wherein the resistive switching element is characterized by a resistance depending on an electric field in the resistive switching element, and a non-linear device coupled between the first electrode and the resistive switching element, wherein the non-linear device is configured to conduct electric current when a voltage greater than a first voltage is applied to the second electrode, wherein the resistive switching device is configured to change from a first state to a second state in response to the first voltage.
US08659927B2 Wiring substrate in which equal-length wires are formed
In a wiring substrate, a double data rate (DDR) memory and a memory controller controlling the DDR memory are mounted. Further, in the wiring substrate, plural equal-length wires connecting the DDR memory and the memory controller are formed. The plural equal-length wires include a differential transmission line, such as a clock wire transmitting a clock signal, which is connected via a common mode choke coil. The differential transmission line may have a wire length shorter than a wire length of another equal-length wire, by a wire length corresponding to delay time of a transmission signal due to the common mode choke coil.
US08659926B1 PMC-based non-volatile CAM
Methods and circuits for CAM cells using PMCs are disclosed herein. In one embodiment, a BCAM cell can include: (i) a first PMC coupled to a first access transistor and a bit node, where the first access transistor is coupled to a true bit line; (ii) a second PMC cell coupled to a second access transistor and the bit node, where the second access transistor is coupled to a complement bit line, and the first and second access transistors are controllable by a word line; (iii) a program enable transistor coupled to the bit node, and configured to couple a program control voltage to the bit node when enabled; and (iv) a match indication transistor configured to discharge a match line in response to states of the true and complement bit lines relative to the bit node.
US08659920B2 Switching device provided with a flowing restriction element
A switching device includes a flowing restriction element, a conductor and a snubber resistor. The flowing restriction element has an opening and closing function to open and close a flowing path of an electric current. The conductor is connected to the flowing restriction element. The snubber resistor is connected to the flowing restriction element and constitutes a snubber circuit. The snubber resistor is disposed along the conductor.
US08659918B2 Method of controlling power conversion device
A correction-term adder 1 compares a maximum value max(V*) with an absolute value of a minimum value min(V*). The correction-term adder 1 selects a signal 1−max(V*) when the maximum value max(V*) is larger than the absolute value of the minimum value min(V*), on the other hand, selects a signal −1−min(V*) when the absolute value of the minimum value min(V*) is larger than the maximum value max(V*). Thereby, a signal of correction amount α is calculated. Moreover, the correction-term adder 1 produces a triangular-wave-shaped signal k(max(V*)+min(V*)) by multiplying a gain k by an addition signal max(V*)+min(V*) of the maximum value max(V*) and the minimum value min(V*). This triangular-wave-shaped signal k(max(V*)+min(V*)) is synchronized with the correction amount α. The correction-term adder 1 produces a correction amount β by selecting smaller one in absolute value between the triangular-wave-shaped signal k(max(V*)+min(V*)) and the correction amount α, and adds the correction amount β to the voltage command values V*U, V*V, V*W.
US08659905B2 Aseismic server rack
An aseismic (earthquake-secure) server rack is fastened to an earthquake frame in order to increase rigidity and is fixed to the floor at least via the earthquake frame.
US08659901B2 Active antenna array heatsink
An active array heat sink cooled by natural free convection is disclosed. A long extruded heat sink is partitioned into multiple, shorter zones separated by gaps having horizontal baffles. The gaps and baffles serve to act as air vents and air inlets for the convection currents. As such, the heat transfer for the overall heat sink is improved because hot convection currents are vented and replaced by cool ambient air along the length of the heat sink.
US08659898B2 Integrated circuit stack
The invention relates to an integrated circuit stack (1) comprising a plurality of integrated circuit layers (2) and at least one cooling layer (3) arranged in a space between two circuit layers (2). The integrated circuit stack (1) is cooled using a cooling fluid (10) pumped through the cooling layer (3). The invention further relates to a method for configuring of such an integrated circuit stack (1) by optimizing a configuration of the cooling layer (3).
US08659897B2 Liquid-cooled memory system having one cooling pipe per pair of DIMMs
Each pair of memory modules in a memory system are cooled using a shared cooling pipe, such as a heat pipe or liquid flow pipe. An example embodiment includes one pair of memory module sockets on opposite sides of the respective cooling pipe. An inner heat spreader plate is thermally coupled to the cooling pipe and in thermal engagement with a first face of the memory module adjacent to the included cooling pipe. Heat is conducted from the second face of the memory module to the cooling pipe, such as from an outer plate in thermal engagement with an opposing second face of the memory modules and with the inner plate.
US08659892B2 Electronic device with heat pipe chamber cover for dissipating heat
An exemplary electronic device includes a base, a cover, side plates, a heat conduct plate, a wick structure, a working medium and at least one electronic element. The cover and the base cooperatively define a cavity. The at least one side plate extends from the cover and receives in the cavity. The heat conduct plate and the at least side plate and the cover cooperatively defines a sealed chamber. The wick structure is attached to an inner surface of the sealed chamber. The working medium is received in the wick structure. The at least one electronic element is received in the cavity and thermally connected to the heat conduct plate.
US08659889B2 Docking station for providing digital signage
Various embodiments of digital signage systems and docking stations are described. In one embodiment, a digital signage system includes an electronic device having a rear surface and an opposing front surface at which a display of the electronic device may be viewed. The system also includes a body for supporting the electronic device. A recessed region is formed in the body from a top surface of the body, and the electronic device is positioned within the recessed region such that the rear surface of the electronic device fits entirely within the recessed region and the front surface of the electronic device is substantially flush with a portion of a top surface of the body that surrounds the recessed region. An aperture may be formed at least partially through the recessed region for receiving a cable assembly operable to connect to the electronic device. An elongated cutout may also be formed, extending from the aperture to an edge or edge surface of the body, and sized so that an insulated wire of the cable assembly can extend from the aperture to the edge or edge surface of the body.
US08659888B2 Disk drive assembly
A disk drive assembly includes a disk drive and a drive bracket. The disk drive includes a first sidewall. The first sidewall includes a first sidewall body, a first resilient tab and a second resilient tab. The first resilient tab and the second resilient tab extend outward from the sidewall body. An extending direction of the first resilient tab is opposite to an extending direction of the second resilient tab. The drive bracket includes a bottom panel and a first side panel substantially perpendicular to the bottom panel. The first side panel is substantially parallel to the first sidewall body. The disk drive is located on the bottom panel. The drive bracket further includes two resilient protrusions extending from the first side panel. The two resilient protrusions resiliently resist the first resilient tab and the second resilient tab.
US08659882B2 Keyboard
A keyboard includes a main body, a bottom plate, and a circuit board. The main body includes a top plate, a bottom plate opposite to the top plate, and a plurality of keys secured to the top plate. The bottom cover is secured to the bottom plate and includes a mounting portion. The mounting portion defines an installation opening. The circuit board is secured to the bottom plate and extends out of the installation opening. A gap is defined between each adjacent two keys. The bottom plate defines a plate opening corresponding to each key. The mounting portion abuts the bottom cover. A receiving space is defined between the bottom cover and the bottom plate. The bottom cover defines a cutout communicating with the receiving space. The gap, the plate opening, the receiving space, and the cutout corporately define a water path.
US08659879B2 Switchgear cabinet or rack
A switchgear cabinet or rack comprises a mounting unit with vertical mounting sections laterally delimiting a cabinet frame for installed user-side units, said sections having flat fixing sections that lie on a front mounting plane used to fix laterally projecting mounting sections of the installed units, and comprising components for determining the presence of an installed unit in an installation position of the cabinet frame. A vertical antenna strip contains antenna elements and code carriers as transponder elements. In order to ensure the secure installation and reliable functioning of the detection device, each transponder element is attached to the mounting section of the associated installed unit that adjoins the antenna strip by a retaining element via a connecting section and the retaining element has a support section that adjoins the connecting section and projects outwards, parallel to the mounting plane. The transponder element is attached to the support section.
US08659878B2 Switchgear cabinet or rack
A switchgear cabinet or rack comprises a mounting unit with vertical mounting profiles laterally delimiting an installation space. Flat fixing sections lie on a mounting plane to fix laterally projecting mounting sections of installed units and comprise components of a detection device for determining the presence of an installed unit in the installation space. A vertical antenna strip is attached to a mounting section and contains antenna elements. Code carriers designed as transponder elements are provided on the installed units. The front face of the antenna strip lies on or is set back by a maximum of 10 mm from said plane, with each transponder element in front of the front face of the antenna strip, fixed to a support section of a retaining element that overlaps the antenna strip, said retaining element being attached to the neighboring mounting section of the associated installed unit by a connection section.
US08659877B2 Solid electrolytic capacitor
A solid electrolytic capacitor includes a capacitor element, an anode terminal, and a cathode terminal. The capacitor element includes an anode body, an anode member buried in the anode body, a dielectric layer formed on part of a surface of the anode body, an electrolyte layer formed on the dielectric layer, and a cathode layer formed on the electrolyte layer. The anode member extends in a predetermined direction along a lower surface of the anode body, and has a lower end portion exposed at the lower surface of the anode body. The anode terminal is electrically connected to the lower end portion. The cathode terminal is electrically connected to the cathode layer at a position below the lower surface of the anode body. The anode and cathode terminals are spaced apart from each other in a direction substantially perpendicular to a direction in which the anode member extends.
US08659873B2 Multilayer capacitor
A first inner electrode is integrally provided with a first terminal connection part connected to a first terminal electrode and a first linking connection part connected to a first linking electrode. A second inner electrode is integrally provided with a second terminal connection part connected to a second terminal electrode and a second linking connection part connected to a second linking electrode. A third inner electrode is integrally provided with a third linking connection part connected to the first linking electrode. A fourth inner electrode is integrally provided with a fourth linking connection part connected to the second linking electrode. The third inner electrode is adjacent to the first and fourth inner electrodes in a laminating direction of the plurality of dielectric layers. The first and fourth inner electrodes overlap the third inner electrode as seen in the laminating direction of the plurality of dielectric layers.
US08659870B2 Modular EMI filtered terminal assembly for an active implantable medical device
A modular EMI filtered terminal assembly for an active implantable medical device (AIMD) includes a hermetic terminal subassembly having at least one conductor extending through an insulator in non-conductive relation with the AIMD housing, and a feedthrough capacitor subassembly disposed generally adjacent to the hermetic terminal assembly. The feedthrough capacitor subassembly includes a conductive modular cup conductively coupled to the AIMD housing, and a feedthrough capacitor disposed within the modular cup. A first electrode plate or set of electrode plates is conductively coupled to the conductor, and a second electrode plate or set of electrode plates is conductively coupled to the modular cup.
US08659869B2 Method for forming rutile titanium oxide and the stacking structure thereof
A method for forming a stacking structure, including forming a ruthenium oxide layer over a substrate; forming a praseodymium oxide layer over the ruthenium oxide layer; and forming a titanium oxide layer over the praseodymium oxide layer; wherein the titanium oxide layer has a rutile phase with the existence of the praseodymium oxide layer underneath. The oxide layers are deposited by a plurality of atomic layer deposition cycles using ruthenium precursor, praseodymium precursor, titanium precursor, and ozone.
US08659867B2 Wind power system for generating electric energy
A wind power system having a tower, a nacelle fitted to the tower to rotate about a first axis, a hub fitted to the nacelle to rotate about a second axis, and at least one blade fitted to the hub to rotate about a third axis, and wherein an elastic conducting member is positioned between the blade and the nacelle to connect the blade electrically to the nacelle.
US08659862B2 Directional fault location and isolation system
A directional fault location and isolation system for a three phase electric power circuit that identifies a faulted segment by determining the direction of the fault at multiple tap points in the electric power circuit. The directional fault controller, which may be a centralized controller or a number of peer-to-peer controllers located at the tap points, includes communication equipment for exchanging information with the monitoring equipment and the sectionalizing equipment at each sectionalizing control point, which includes the tap points and may also include the substations. The controller also includes processing equipment that determines the directionality of a fault on the power line at each current monitoring device, identifies a faulted line section by identifying a change in the directionality of the fault associated with the faulted line section, and operates one or more of the sectionalizing switches to isolate the faulted line section from the circuit.
US08659861B2 Electronic component device and package substrate
In an electronic component device, an ESD protection element including a cavity portion and a pair of opposed discharge electrodes is disposed inside a package substrate. A composite portion made of a composite material including a metal material and an insulating material is disposed on a bottom of the cavity portion. The package substrate including the ESD protection element disposed therein reduces the size of the electronic component device and reliably prevents damage to and malfunctioning of the electronic component device.
US08659859B1 Electrostatic discharge protection scheme for high-definition multimedia interface transmitters
An apparatus generally having a first circuit, a second circuit and a third circuit is disclosed. The first circuit may be configured to selectively switch a bonding pad to (i) a first rail of a power source and (ii) a discharge rail in response to an electrostatic discharge. The second circuit is generally configured to clamp the electrostatic discharge between the discharge rail and the first rail. The third circuit may be configured to bias the discharge rail to a second rail of the power source.
US08659855B2 Trilayer reader with current constraint at the ABS
A magnetoresistive read sensor with improved sensitivity and stability is described. The sensor is a trilayer stack positioned between two electrodes. The trilayer stack has two free layers separated by a nonmagnetic layer and a biasing magnet positioned at the rear of the stack and separated from the air bearing surface. Current in the sensor is confined to regions close to the air bearing surface by an insulator layer to enhance reader sensitivity.
US08659854B2 Magnetoresistive shield with stabilizing feature
A magnetoresistive (MR) reader is adjacent to at least one shield that extends from an air bearing surface (ABS) a first distance. The shield has a stabilizing feature that is contactingly adjacent the MR reader and extends from the ABS a second distance that is less than the first distance.
US08659850B2 Brushless motor, disk drive apparatus, and method of manufacturing the brushless motor
A stationary unit of a brushless motor includes a flat armature and a base member arranged to support the armature. The armature includes a power supply portion to which a lead wire is connected. The base member includes a wall portion and a window portion. The wall portion is radially opposed to an outer edge portion of the armature. The window portion is positioned below the power supply portion to axially extend through the base member. An adhesive agent exists between the wall portion and the outer edge portion of the armature. Accordingly, the base member and the armature are strongly fixed to each other. Further, a sealing material is interposed between a whole periphery of an edge of the window portion and the armature, so that the window portion is sealed.
US08659849B2 Hermetically resealable hard-disk drive configured for recharging with a low-density gas
A hermetically resealable hard-disk drive (HDD) configured for recharging with a low-density gas. The hermetically resealable HDD includes a disk enclosure (DE), a magnetic-recording disk, a head-slider, an actuator, a low-density gas, a through-hole, and a plug. The DE includes a base, and a first cover and a second cover joined to the base. The second cover is disposed above the first cover. The through-hole is configurable for injection of a low-density gas into the DE. The low-density gas, having a density less than air, substantially fills the DE. The plug is press-fitted into, and hermetically seals, the through-hole. The plug is removable to allow recharging the DE with the low-density gas; and, the through-hole is configured to accept a resealing plug to be press-fit into, and to reseal hermetically, the through-hole after recharging. A method for injecting low-density gas into, and sealing, the hermetically resealable HDD is also provided.
US08659844B2 Motor for driving lenses
Disclosed is a motor for driving lenses. The motor includes a case, a yoke fixed in the case, a magnet fixed in the yoke, a carrier equipped with lenses and installed in the magnet such that the carrier moves up and down within the magnet, a coil coupled with the carrier, a spring unit including first and second springs having arc shapes and being separated from each other while forming a ring shape as a whole, a spacer supporting an outer peripheral surface of the spring unit, and a terminal provided on the spacer, in which one side of the terminal protrudes downward by passing through a bottom of the case to make connection with the spring unit and a main PCB of a product.
US08659842B1 Image capturing device and assembling method thereof
An image capturing device and an assembling method thereof are provided. The assembling method includes the following steps. Firstly, a lens holder, a lens module and a casing are provided, wherein the lens holder includes a containing cavity. Next, the lens module is disposed in the containing cavity of the lens holder. Then, the casing is disposed on the lens holder and the lens module, wherein the casing covers a part of the lens module. Finally, an Ultrasonic Welding is applied on the lens holder and the casing for forming a melting interface between the lens holder and the casing so as to fix the casing to the lens holder.
US08659839B2 Imaging lens and imaging device
Disclosed is an imaging lens by which astigmatism and field curvature are satisfactorily corrected by arranging on a first surface a concave surface having an appropriate radius of curvature. Condition (1) defines the radius of curvature of the concave surface arranged on the object-side surface of a bonded compound lens. By fulfilling condition (1), a lens can be obtained in which astigmatism and field curvature are satisfactorily corrected. Condition (1): −1.5
US08659838B2 Image pickup lens, image pickup device provided with image pickup lens, and mobile terminal provided with image pickup device
Provided is an image pickup lens that forms an image on an image pickup element with light from a subject. In the image pickup lens, a lens that is disposed on an image pickup element side is fixed in position, and a focusing lens group having a plurality of lenses including a lens closest to the subject is moved in an optical axis direction, thereby performing focusing.
US08659837B2 Adjustable lens structure
An adjustable lens structure includes a lens housing, a lens module, a rotatable lens seat, and a shifting apparatus. The lens housing has a front housing and a top housing located behind the front housing. The front housing is a hollow cylinder and the rotatable lens seat is placed inside the front housing. The lens module is placed on the rotatable lens seat. The shifting apparatus is engaged with the top housing. The shifting apparatus has a gear assembly engaged with the rotatable lens seat to provide adjustable shooting angle for the lens module.
US08659836B2 Zoom lens system, interchangeable lens apparatus and camera system
A zoom lens system, in order from an object side to an image side, comprising a first lens unit having negative optical power, a second lens unit having positive optical power, a third lens unit having negative optical power, and a fourth lens unit having positive optical power, wherein the first lens unit is composed of at least three lens elements, has at least one lens element having positive optical power, and moves along an optical axis in zooming, and the conditions: np>1.88 and 1.5
US08659834B2 Achromatic gradient index singlet lens
A method of making an achromatic gradient index singlet lens comprising utilizing a gradient index material with a curved front surface in which light does not follow a straight line as it travels through the material and wherein different color rays traverse different curved paths, utilizing the natural dispersion of the curved front surface as a strong positive lens, and developing a weakly diverging GRIN distribution within the lens to balance the chromatic aberrations of the curved front surface.
US08659831B2 Optical system
An optical system comprising a circular image strip comprising an inner image strip, an outer image strip, and an effective zone, and a circular lenticule configured to direct light reflected from the inner image strip to a first eye of a viewer and to direct light reflected from the outer image strip to a second eye of a viewer when the viewer views an effective zone of the circular image strip is disclosed.
US08659828B2 Polarization preserving projection screen with engineered particle and method for making same
Polarization preserving projection screens provide optimum polarization preservation for 3D viewing. The projection screens additionally provide improved light control for enhanced brightness, uniformity, and contrast for both 2D and 3D systems. Generally, the disclosed method for providing a projection screen comprises embossing at least a first side of a first substrate to produce an optically functional material and then cutting the optically functional material into pieces to produce a plurality of engineered particles. The plurality of engineered particles may then be deposited on a second substrate to produce a substantially homogeneous optical appearance of the projection screen.
US08659827B2 Spherical aberration correction for an optical microscope using a moving infinity-conjugate relay
An infinity-conjugate lens relay with a moving first lens is used to select a plane of interest from an image volume. This plane can be selected so that the image is corrected for spherical aberration due to non-ideal imaging conditions. This effectively will allow for deeper, corrected imaging for high power microscopes. Using an infinity-conjugate relay, this device has an ideal “bypass” mode for regular imaging without correction. The device also utilizes software that automatically controls the device for correcting live images.
US08659824B2 Laser microscope
A laser microscope includes an objective lens that radiates a laser beam onto a specimen; a stimulation optical system having an LCOS-SLM located at a position optically conjugate with the pupil position of the objective lens and which modulates the phase of the laser beam; and an observation optical system having a galvanometer mirror that scans the laser beam across the specimen, as observation illuminating light, and a PMT that detects the observation light coming from the specimen and collected by the objective lens. A control unit forms a three-dimensional image of the specimen and sets, in that image, stimulation sites in the specimen to be irradiated with a laser beam serving as a stimulation beam by the stimulation optical system at a plurality of different positions in the optical axis direction. The LCOS-SLM modulates the laser beam such that the stimulation sites are irradiated with the laser beam.
US08659821B2 Device for amplifying light pulses
The present invention relates to a device (1, 11) for amplifying light pulses (2, 12), the device comprised of a stretcher (4, 14) which temporally stretches the light pulses (2, 12), and comprised of at least one amplifier (5, 15) which amplifies the stretched light pulses (2, 12), and comprised of a compressor (6, 16) which recompresses the stretched and amplified light pulses (2, 12), the stretcher (4, 14) and the compressor (6, 16) being dispersive elements with essentially oppositely identical dispersion. To provide a device (1, 11) for amplifying light pulses (2, 12) which is of a compact setup and which can be flexibly applied, the present invention proposes that the dispersion of the amplifier (5, 15), the dispersion of further optical elements of the device (1) and/or a mismatch of dispersion of the stretcher (4, 14) and compressor (6, 16) are at least partly compensated by self-phase modulation of the light pulses (2, 12) and/or by at least one additional element (17) of variable dispersion.
US08659819B2 Apparatus and method for operating an acousto-optical component
An apparatus for controlling an acousto-optical component influencing at least one of illumination light and detection light in a microscope is described. The apparatus comprises a radio-frequency generator for supplying the acousto-optical component with a radio frequency. The radio-frequency generator is configured to compensate deviations in the characteristics of the light due to temperature fluctuations in the acousto-optical component by adapting the radio frequency. The apparatus can be operated by generating a control signal for controlling the radio frequency of the radio-frequency generator; measuring the temperature of the acousto-optical component; adapting the control signal depending on the measured temperature; and sending the adapted control signal into the radio-frequency generator for compensating deviations in the characteristics of the light due to temperature fluctuations and can be used in optical coherence tomography, particularly white light interferometry, optical tweezers in lithography, and distance measurement.
US08659818B2 Optical-path-switching apparatus and light signal optical-path-switching method
An optical-path-switching apparatus according to the present invention includes a reducing optical system capable of guiding signal light and control light along the direction of gravity into a thermal-lens-forming optical element having an incidence plane positioned to be perpendicular to the direction of gravity in such a way as to differentiate respective convergence points in a direction perpendicular to the optical axis. The apparatus further includes a light-receiving unit configured to converge or condense straight-traveling signal light in the absence of irradiation with the control light and signal light whose optical path has been switched due to irradiation with the control light using the same optical element. Further, the apparatus includes a wedge-type prism provided at a passing position of the optical-path-switched signal light to increase the distance between the optical axis of the optical-path-changed signal light and the optical axis of the straight-traveling signal light.
US08659815B2 Optical bank and method for producing the optical bank
The invention relates to an optical bank (1) comprising a carrier (10) for receiving optical components (60, 70) and a crystal (30) that is mechanically connected to the carrier, for changing the frequency of the light irradiated into the crystal (30) from a light source (50). Two rails (12) are arranged essentially in parallel on the carrier (10). The crystal (30) and the carrier (10) are mechanically connected by a surface of the rails (12), facing away from the carrier (10). A heat conducting element (20) is arranged on the crystal, said heat conducting element being applied to the surfaces of the rails (12), that face away from the carrier (10).
US08659812B2 Wavelength selective switch
Provided is a wavelength selective switch, which includes: an input/output unit; a dispersive portion; a deflection portion; and an ovalization relay optical system. In the input/output unit, input/output portions are two-dimensionally arranged. The dispersive portion is capable of dispersing signal light along a first plane. The deflection portion deflects the signal light. The ovalization relay optical system condenses the signal light beams on to a first conjugate point. The ovalization relay optical system makes a beam waist forming position along a first direction coincide with the first conjugate point. The ovalization relay optical system condenses signal light, in a second direction, onto a first condensing point. The ovalization relay optical system makes the first condensing point conjugate to the first conjugate point. The ovalization relay optical system ovalizes the beam shape of the signal light beams incident on the deflection element.
US08659811B2 Actuator, optical scanner and image forming device
An actuator, includes: a movable plate; a supporter to support the movable plate; a pair of linking portions to link the movable plate and the supporter so as to allow the movable plate to rotate relative to the supporter; and a piezoelectric element to rotate the movable plate. The piezoelectric element elongated and contracted by an energization twists the pair of linking portions to rotate the movable plate, and each of the pair of the linking portions includes an axial member extending from the movable plate and a returned portion that links the axial member and the supporter and is formed so as to return to a side adjacent to the movable plate.
US08659810B2 Apparatus for the exact reconstruction of the object wave in off-axis digital holography
A method and apparatus for preparing a digital hologram representing an image of an object includes generating a measurement beam and a first reference beam, irradiating the object by the measurement beam, and guiding the measurement beam reflected to an optical sensor. The method also includes guiding the first reference beam to a first mirror, and guiding the reflected beam to the optical sensor so that both beams generate an interference pattern on the sensor. The method includes providing a digital signal representing the interference pattern on the optical sensor, to obtain a digital hologram, and subjecting the digital hologram to a Fourier transform in the spatial frequency domain to obtain a spectrum. The method further includes replacing a section of a first image term overlapped by a DC-term by a corresponding section of a second image term.
US08659807B2 Image reading apparatus
An image reading apparatus comprises: a guide portion that is linked to a driving portion and extends so as to guide the movement of a reading carriage; a guide rail that guides the reading carriage while supporting the reading carriage; and an interlocking portion that is provided in the reading carriage, has a first sliding surface that makes contact with the guide rail on the side of the guide rail facing the guide portion and a second sliding surface that makes contact with the guide rail on the side of the guide rail that is on the opposite side as the guide portion. The position at which the first sliding surface of the interlocking portion makes contact with the guide rail is lower on the guide rail than the position at which the second sliding surface of the interlocking portion makes contact with the guide rail.
US08659802B2 Image scanner and image scanning method
An image scanner includes a transparent plate, a scanning device, a driving device, a positioning member, a light absorbing portion and a white reference portion. The transparent plate has an original placing surface. The scanning device irradiates an original with light by means of a light source and scans reflected light from the original. The driving device reciprocates the scanning device along the transparent plate. The positioning member positions the original placed on the original placing surface of the transparent plate. The light absorbing portion, which is disposed on the original placing surface side of the positioning member and at substantially a central portion of the positioning member in moving directions of the scanning device, absorbs ambient light entering to the original placing surface side of the positioning member through the transparent plate. The white reference portion is provided to the original placing surface side of the positioning member.
US08659801B2 Image forming apparatus and image forming method determining correct pixel value of target pixel subject to interpolation
An image forming apparatus includes an image interpolation unit to compute a correct pixel value of a target pixel subject to interpolation of a halftone image. The image interpolation unit includes a base pattern setting unit to set a base pattern including the target pixel, a reference pattern setting unit to set reference pattern in a region peripheral to the target pixel, an analogous pattern acquisition unit to acquire at least one analogous pattern analogous to the base pattern from the reference pattern, a high-resolution pattern creating unit to create a high-resolution pattern having a predetermined resolution or higher by synthesizing the acquired analogous pattern, a pixel value estimating unit to compute an estimated pixel value of the target pixel based on the created high-resolution pattern, and a pixel value determination unit to determine the correct pixel value of the target pixel based on the computed estimated pixel value.
US08659800B2 Facsimile sending system including a plurality of facsimile devices and a server sending first sending data to the public line continuously following sending of a second sending data to a specific destination as an identical sending job
A facsimile sending system is provided with facsimile devices and a server. Each facsimile device scans a document, is capable of inputting information concerning a destination, creates sending data including data of the scanned document and the input information, sends the sending data, receives sending data sent from the server, sends the sending data sent from server to a destination determined based on the information included in its sending data, and sends its own facsimile device's running status to the server. The server receives the sending data sent from each facsimile device, receives the running status sent from each facsimile device, selects one facsimile device from the plurality of the facsimile devices based on the running status of each facsimile device, and sends the sending data sent from the facsimile device to the selected facsimile device.
US08659795B2 Image processing apparatus and image processing system
An image processing apparatus for performing color tone conversion on a predetermined original image data using a predetermined color tone conversion parameter, includes a converted image data generating unit that generates weight-applied converted original image data obtained by performing the color tone conversion by the color tone conversion parameter while applying weighted values, which is determined such that the lower the degree to be changed by the color tone conversion is, the smaller the value becomes, on the original image data for each of a predetermined range.
US08659789B2 Printer
When a period from the point of time of receipt of instruction information concerning a cutting instruction to the point of time of receipt of instruction information concerning a printing instruction subsequent to the receipt of the instruction information concerning the cutting instruction has reached a prescribed period, a recording medium is cut and conveyed in a reverse direction by a prescribed distance, and then new printing is started. When the period from the point of time of receipt of the instruction information concerning the cutting instruction to the point of time of receipt of the instruction information concerning the printing instruction subsequent to the receipt of the instruction information concerning the cutting instruction has not reached the prescribed period, the recording medium is cut and then new printing is started without convey of the recording medium in the reverse direction.
US08659782B2 Image forming apparatus using option controller for printing
An image forming apparatus includes a print engine configured to print an image based on raster image data, a main controller configured to execute a process that depends on the print engine, and a relay unit configured to receive the raster image data from an option controller that generates the raster image data, store the raster image data in a memory, receive a control command based on a result of the process that depends on the print engine from the main controller, read the raster image data from the memory in accordance with the control command, and supply the read raster image data to the print engine.
US08659779B2 Non-transitory computer readable recording medium storing print management program, print management device, print management method, and print system configured for causing a computer to function as a job progress status display unit
Disclosed is a non-transitory computer readable recording medium that stores a print management program causing a computer to function as a job progress status display unit that divides job progress statuses of a print job into plural categories and displays plural of the categories so that each of the categories can be selected; and a job list display unit that selects and lists first print jobs in a first job progress status from a first table that stores job progress statuses of print jobs. The job list display unit selects first functions corresponding to the first job progress status of the listed first print jobs from a second table that stores functions corresponding to the divided job progress statuses, and displays icons. Here, each of the icons accepts execution of corresponding one of the selected first functions.
US08659777B2 Server system, print device, network print system including server system and print device, and downloading method in network print system
In print systems based on data reception from a server, it takes much time to receive data of a large size. Therefore systems have been developed in which data is divided before being received. However, if divided data items are received by a print device while temperature adjustment or calibration is performed for an engine of the device, the divided data items are not immediately printed, resulting in a long print time. A print device sequentially receives divided data items if the print device is in a printable status. Otherwise, the print device simultaneously receives the divided data items in a plurality of sessions.
US08659776B2 Print job management server which manages print jobs to be processed by an image forming apparatus
A print server in a print job management system including an information processing apparatus, a print server, and an image forming apparatus, comprises: a management unit configured to receive a print request from the information processing apparatus, and to manage a status of a print job to be executed by the image forming apparatus in response to the print request; and a request receiving unit configured to receive the print request from the information processing apparatus, and to return a response to the print request, wherein the request receiving unit returns the response including a command which controls the information processing apparatus to send a status acquisition request of a print job to the image forming apparatus to the information processing apparatus, and the management unit updates a status of the managed print job in accordance with a status of the print job received from the information processing apparatus.
US08659775B2 Print shop management method for customizing print-on-demand driver
A method implemented in a print shop management system that includes a data processing apparatus having a non-transitory memory for storing a computer software program and a processor for executing the software program, wherein the program includes a program code configured to cause the data processing apparatus to execute a process for customizing a print-on-demand (POD) driver, which process includes the steps of accessing a configuration file of the POD driver having a plurality of fields with respective values; and modifying values of the configuration file fields to customize available user interfaces and print job settings editing options of the POD driver.
US08659767B2 Image forming apparatus that changes the form of the display in an overlapping manner based on the selection of either a one-sided image forming mode or a dual-sided image forming mode
In an image forming apparatus including a control unit made of a display panel and a touch panel display and having one-sided image forming mode and dual-sided image forming mode, the touch panel display includes: a finished state preview controller for displaying the finished state of a hard copy; and a confirmatory display controller. The display panel includes a first display area, a second display area and a third display area. The image forming apparatus includes a display position switching controller that switches the position of the image of the page to be turned to be displayed in the third display area, depending on the image forming mode.
US08659765B2 Three-dimensional shape determining apparatus and three-dimensional shape determining method
Pattern lights A and B of which patterns respectively having bright and dark sections have been in an inverted relation are projected on a subject to calculate luminance distributions L1 and L2 of the subject and average values Ave(L1) and Ave(L2) of the distributions. A luminance distribution obtained by multiplying a luminance distribution L0 of the subject of only a natural light component by a coefficient η is subtracted from the luminance distribution L2 obtained by projecting the pattern light B on the subject and a correction value L2′ thereof is calculated so that a difference e of the average values become zero. Then, an intersection point of the luminance distribution L1 obtained by projecting the pattern light A on the subject and the correction value L2′ of the luminance distribution L2 obtained by projecting the pattern light B on the subject is derived.
US08659762B2 Optical measuring element having a single-piece structure
An optical measuring element measures forces in at least one direction. The measuring element has a single-piece structure. There is an outside wall with notches introduced therein. Each notch defines parallel edges, and the notches define more or less elastically flexible zones in the structure and constitute the only connection between a first region and a second region of the structure. For optical distance measurements between the two regions of the structure, one or more optical fibers are each attached with one end thereof to a region of the structure such that reflective surfaces are located close to the ends. The reflective surfaces are firmly connected to another region. The optical fibers are disposed on the outside wall.
US08659760B2 Resonator fiber optic gyroscope utilizing laser frequency combs
A resonator fiber optic gyroscope comprises a first light source having a first frequency comb spectrum, and a second light source having a second frequency comb spectrum. A first filter is in optical communication with the first light source and configured to pass a first frequency comb portion. A second filter is in optical communication with the second light source and configured to pass a second frequency comb portion. A resonator is in optical communication with the first and second filters. The free spectral range values of the first and second frequency comb portions are adjusted to be an odd integer multiple of the free spectral range value of the resonances of the resonator. The second frequency comb portion is spectrally separated apart from the first frequency comb portion by a multiple of the free spectral range value of the resonances plus a frequency value proportional to rotation rate.
US08659754B2 Inspection system and method for fast changes of focus
An inspection system includes a first focusing unit configured to perform fast focus changes to a first focusing function applied to an incident light beam. A traveling lens acousto-optic device is arranged to receive the light beam focused by the first focusing function and produce focused spots using a plurality of traveling lenses generated in response to radio frequency signals. The traveling lenses apply a second focusing function and the traveling lens acousto-optic device is arranged to alter the second focusing function at a fast rate. The inspection system also includes optics arranged to direct the focused spots onto an inspected object and to direct radiation from the inspected object to a sensor.
US08659752B2 Automated warm-up and stability check for laser trackers
A method for determining when a laser tracker is stable includes performing a plurality of first frontsight measurements and a plurality of first backsight measurements on a first target with the laser tracker, wherein the plurality of first frontsight measurements and the plurality of first backsight measurements are alternated in time, calculating a plurality of first two-face errors based on the plurality of first frontsight measurements and the plurality of first backsight measurements, determining at least one first stability metric based at least in part on the plurality of first two-face errors, the at least one first stability metric being a value defined by a rule, determining whether the laser tracker is stable based at least in part on the at least one first stability metric and a first termination criterion and generating an indication whether the laser tracker is stable or not stable.
US08659750B2 Test apparatus, test method, and device interface
Provided is a test apparatus that tests a device under test including an optical coupler for transmitting optical signals in a surface direction and a first groove for holding an optical transmission path connected to the optical coupler. The test apparatus comprises a substrate on which the device under test is to be loaded; an optical transmission path to be connected to the optical coupler; and a pressing section that presses the optical transmission path from the substrate side toward the first groove. Also provided is a test method.
US08659746B2 Movable body apparatus, exposure apparatus and device manufacturing method
In a liquid crystal exposure apparatus, base pads are respectively placed on two surface plates, and one step board is supported by the base pads. A device main body of an empty-weight cancelling device moves from above one of the surface plates to above the other by moving on the step board, and therefore, a boundary section between the two adjacent surface plates that are separately placed does not function as a guide surface used when the empty-weight cancelling device moves. Accordingly, a fine movement stage that holds a substrate can be guided along an XY plane with high accuracy although the two surface plates are placed apart.
US08659742B2 Lithographic apparatus and a device manufacturing method
An immersion lithographic apparatus is disclosed that has a fluid handling system configured to provide immersion liquid between a final element of a projection system and a surface which includes, in cross-section, a feature, and has an adjustment fluid source configured to locally change the composition of the immersion liquid to cause a local decrease in surface tension of the immersion liquid at least when a meniscus of the immersion liquid contacts the feature.
US08659740B2 Drive error compensation for projection optics
The present invention provides an exposure apparatus comprising a projection optical system configured to project a pattern of a reticle onto a substrate, a driving unit configured to drive a plurality of optical elements which form the projection optical system so as to adjust an imaging state of light which passes through the projection optical system, a detecting unit configured to detect a driving error when the driving unit drives a first optical element of the plurality of optical elements, and a control unit configured to control the driving unit to drive a second optical element different from the first optical element of the plurality of optical elements so as to reduce a change in the imaging state of the light which passes through the projection optical system due to the driving error.
US08659739B2 Liquid crystal lens and display including the same
Provided are a liquid crystal lens which controls an optical path, and a display including the liquid crystal lens. The liquid crystal lens includes a first and a second electrode which face each other, a liquid crystal layer interposed between the first electrode and the second electrode and has flat top and bottom surfaces, and a dielectric layer interposed between the second electrode and the liquid crystal layer, where the dielectric layer includes a first and a second dielectric sub-layer, the first dielectric sub-layer made of a material having a different dielectric constant from that of the second dielectric sub-layer, the first dielectric sub-layer includes one or more unit patterns, a surface of each of the unit patterns includes a plurality of flat sections, and a height of each of the unit patterns in a first flat section is different from the height thereof in a second flat section.
US08659733B2 Liquid crystal display and method for fabricating the same
A liquid crystal display device includes: a plurality of gate lines and a plurality of data lines formed horizontally and vertically to define pixel areas on a substrate; thin film transistors (TFTs) formed at crossings of the gate lines and data lines; a common line formed to be parallel to the gate line; a common electrode formed at each pixel area, connected to the gate line, and having one end overlapping with the data line; and a pixel electrode connected to the TFT and formed to be parallel to the common electrode between the common electrodes formed at each pixel area. The common electrode has a mesh structure to thus reduce a potential deviation of common electrodes in a panel and restrain a reduction in an aperture ratio.
US08659731B2 Liquid crystal display element
A liquid crystal display element comprises a pair of substrates facing each other with a predetermined gap, strips of first electrodes formed on one substrate, strips of second electrodes formed on another substrate and crossing the first electrodes, an alignment film formed on at least one of the substrates and treated with an alignment process in a direction not perpendicular to a longitudinal direction of the second electrodes, a vertical alignment mode liquid crystal layer placed between the substrates and having a pretilt angle, and a pair of polarizers sandwiching the substrates, wherein the fist and the second electrodes cross each other to form pixels, and non-uniform alignment regions where liquid crystal molecules in a center of a thickness of the liquid crystal layer are aligned in a different direction from the direction defined by the alignment process appear near an edge of each pixel.
US08659730B2 Liquid crystal display device comprising a first orientation film and a second orientation film surrounding the first orientation film wherein a side surface and a top surface of the first orientation film are in contact with the second orientation film
A liquid crystal dripping method has a problem in that an uncured sealant increases in width at the time of attaching a pair of substrates and thus a liquid crystal material enters the sealant and unevenness occurs in the inner periphery of the sealant. A region in which reduced is the speed of diffusion of liquid crystal at the time of attaching a pair of substrates is provided between a sealant and an orientation film. Further, time for diffusing the liquid crystal and coming in contact with the sealant is made long. Accordingly, the sealant is subjected to photo-curing before the liquid crystal comes in contact with the sealant. The region in which reduced is the speed of diffusion of the liquid crystal is formed using a material for forming a vertical orientation film, a silane coupling agent, a substance having a photocatalytic function, or the like.
US08659726B2 Liquid crystal display and method of manufacturing liquid crystal display
Transflective-type and reflection type liquid crystal display devices having a high image quality are provided with a good production efficiency.A liquid crystal display device according to the present invention is a liquid crystal display device which includes; a first substrate and a second substrate between which liquid crystal is interposed; a first electrode and a second electrode formed on the first substrate for applying a voltage for controlling an orientation of the liquid crystal; a transistor having an electrode which is electrically connected to the first electrode; a metal layer being formed on the first substrate and including a protrusion, a recess, or an aperture; and a reflective layer formed above the metal layer on the first substrate for reflecting incident light toward a display surface. The metal layer is made of a same material as that of a gate electrode of the transistor. The reflective layer includes a protrusion, a recess, or a level difference which is formed in accordance with a protrusion, a recess, or an aperture of the metal layer.
US08659721B2 Liquid crystal display device having reflecting surface in zigzag manner with polygonal line
A liquid crystal display device capable of efficiently obtaining a high brightness with reduced unevenness in brightness using a single light-emitting section is provided. The liquid crystal display device includes: a liquid crystal panel for controlling display by changing orientation of a liquid crystal composition; a single cylindrical light-source section (634); and a reflecting section (636) provided so that the single cylindrical light-source section is sandwiched between the reflecting section and the liquid crystal panel, for reflecting the light emitted from the single cylindrical light-source section (634) toward the liquid crystal panel, in which at least a part of a sectional shape of a reflecting surface of the reflecting section (636) in a cross section perpendicular to an axial direction of the single cylindrical light-source section (634) is formed based on a parabola whose focal point is a position of the single cylindrical light source section (634).
US08659714B2 Light emitting device
A light emitting device includes a light emitting structure comprising a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; a first ohmic layer and a first electrode provided on the first conductivity type semiconductor layer; and a second electrode provided on the second conductivity type semiconductor layer, wherein a contact area between the first conductivity type semiconductor layer and the first ohmic layer comprises oxygen at 5% or more of an atomic ratio or nitrogen at 50% or more of an atomic ratio.
US08659713B2 Active matrix substrate and liquid crystal device
In an active matrix substrate, the source electrode side and/or the drain electrode side of a crystalline semiconductor film extends to an area located outside both the thin-film transistor and the gate electrode, and a metal light-shielding film is provided, in the same layer as the gate electrode, between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode. An impurity-implanted region implanted with n-type impurity may be formed between the contacting portion between the source electrode or the source line and the crystalline semiconductor film and the gate electrode, and/or between the contacting portion between the drain electrode and the crystalline semiconductor film and the gate electrode.
US08659704B2 Apparatus and method for mixing graphics with video images
In one embodiment, graphics from a general-purpose computer are mixed with video images from a video source. A first interface receives the graphics, the graphics including a plurality of graphics frames, at least some graphics frames including one or more regions having pixels set to one or more predetermined color values. A second interface receives video images from the video source, each video image corresponding to one of the plurality of graphics frames. A video mixer includes logic configured to recognize pixels in the at least some graphics frames that are set to the one or more predetermined color values, and in the one or more regions where the pixels are set to the one or more predetermined color values to mix pixels from the corresponding video image with the graphics frame, to create a plurality of mixed images. One or more output interfaces outputs the mixed images.
US08659700B2 Method for converting a video signal for flicker compensation, and associated conversion device
Method and apparatus for converting a first video signal into a second video signal, including a succession of frames wherein each includes a plurality of points having a luminance. The points of the second video signal can be displayed on corresponding pixels of a display device. The method includes calculating the luminance of a point of a current frame of the second video signal by a weighted sum of a luminance of a corresponding point of a current frame of the first video signal and of a luminance of a corresponding point of a previously stored frame, and storing the luminance of the corresponding point of the current frame of the first video signal. The calculation is repeated for all the points of the current frame of the second video signal, and the storage is repeated for all the points of the current frame of the first video signal.
US08659697B2 Rapid auto-focus using classifier chains, MEMS and/or multiple object focusing
A smart-focusing technique includes identifying an object of interest, such as a face, in a digital image. A focus-generic classifier chain is applied that is trained to match both focused and unfocused faces and/or data from a face tracking module is accepted. Multiple focus-specific classifier chains are applied, including a first chain trained to match substantially out of focus faces, and a second chain trained to match slightly out of focus faces. Focus position is rapidly adjusted using a MEMS component.
US08659696B2 Assembly and method for aligning an optical system
An assembly for aligning an optical system over an image sensor is described. The assembly may include a lens structure positioned over an image sensor and a lens holder positioned over the lens structure and secured onto a substrate. The lens structure may incorporate an optical section and a structural section extending from the optical section and may rest directly on an image sensor with one or more stoppers that may serve to elevate the optical system with respect to the image sensor at a distance corresponding to a near optimal focal length distance. A lip also included in the structural section of the lens structure may abut two or more opposing sides to secure the lens structure over the image sensor in a centered position with respect to the image sensor.
US08659694B2 Pausing column readout in image sensors
An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.
US08659691B2 Solid-state imaging apparatus, imaging system, and drive method of solid-state imaging apparatus
In a solid-state imaging apparatus, if the total read out time of all pixels is shortened when effective pixels are thinned out without thinning out OB pixels, then the rows have different reset time periods, and the problem of uneven charge accumulation time periods arises. An improvement by the present invention is that, if no signals are read out from a part of the rows in an effective pixel region to skip the rows, then the time period in which the rows to be skipped are selected is made shorter than that in which the rows from which signals are read out are selected, and the pixels in the optical black pixel region and those in the effective pixel region are driven by the drive pulses of patterns different from each other.
US08659687B2 Photoelectric conversion film stack-type solid-state imaging device and imaging apparatus
A photoelectric conversion film stack-type solid-state imaging device includes a semiconductor substrate, a photoelectric conversion layer, a photoelectric conversion layer, and a conductive light shield film. A signal reading portion is formed on the semiconductor substrate. The photoelectric conversion layer is stacked above the semiconductor substrate and includes a photoelectric conversion film formed between a first electrode film and a second electrode films which is divided into a plurality of regions corresponding to pixels respectively. The first light transmission layer is stacked above the light incidence side of the photoelectric conversion layer and made of a material that transmits light at least partially. The conductive light shield film is formed in the same layer level as the first light transmission layer and covers an outside of an effective pixel region.
US08659684B2 Image processing apparatus, program, method and image capturing system
An image processing apparatus with extended dynamic range includes a first gradation-conversion-characteristics calculating unit that calculates first gradation conversion characteristics for each of a plurality of areas of input image signals; and a gradation conversion unit that performs gradation conversion on each of the areas of the image signals by using the first gradation conversion characteristics. A filter processing and reduction processing unit generates a plurality of band signals having mutually different frequency bands by multi-resolution conversion processing from the image signals subjected to the gradation conversion. A second gradation-conversion-characteristics calculating unit calculates second gradation conversion characteristics associated with the individual band signals from the first gradation conversion characteristics An NR processing unit performs processing for noise reduction on the individual band signals by using the second gradation conversion characteristics; and an adding unit combines the band signals subjected to the processing for noise reduction.
US08659674B2 Digital photographing apparatus and method for controlling the same during manual operation
A digital photographing apparatus which, when operating in a manual mode for externally manipulating and setting photographing variables, determines when a photo is to be taken, and if photographing conditions are changed from those which occurred when photographing variables were set, notifies a user of the change so that a photo can be taken with desired photographic variables. A method of controlling a digital photographing apparatus to perform these operations is also provided.
US08659669B2 Image stabilization circuit with high pass filter
A first high-pass filter comprising a low-pass filter which allows only a frequency component of an input signal less than or equal to a first frequency to pass, a latch unit which latches an output of a low-pass filter according to a control signal, and a calculating unit which outputs a difference between an input signal and an output of the latch unit are provided on an image stabilization circuit. When latching in the latch unit is released, a held value of the latch unit is stepwise changed to the output value of the low-pass filter. Such a first high-pass filter is used in a centering process of an optical element.
US08659666B2 Electronic apparatus
An electronic apparatus has a first sending unit that sends predetermined data to an external apparatus, the predetermined data is generated by mixing video data and first error data; a second sending unit that sends second error data to the external apparatus without mixing video data and the second error data; and a selecting unit that selects one of the first sending unit and the second sending unit based on a state of the external apparatus to cause the external apparatus to notify an error associated with the electronic apparatus.
US08659660B2 Calibration apparatus and calibration method
A calibration apparatus for executing a camera calibration for each of a plurality of cameras mounted on an object so that image capturing ranges of two of the plurality of cameras overlap each other, the calibration apparatus includes an image obtaining unit configured to obtain first and second images captured by the two cameras, a temporary link structure forming unit configured to form a temporary link structure by using the first and second images including images of markers sets, a link angle determining unit configured to determine an effective link angle to form an effective link structure from the temporary link structure, and a parameter determining unit configured to determine a parameter for positioning at least one of the cameras on the basis of the effective link angle.
US08659659B2 System of gauging a camera suitable for equipping a vehicle
A system and process of gauging a camera suitable for equipping a vehicle. The system and process determines at least one value of at least one geometrical parameter of the camera, at least in accordance with an item of information that represents a parameter associated with an object detected by the camera, compares the determined value to a value of reference (θpitching_ref, θrolling_ref, θtwisting_ref) of the geometrical parameter of the camera, and controls the geometrical parameter of the camera in accordance with the comparison, particularly by modifying the value of reference in such a way as to gauge the camera.
US08659656B1 Hyperspectral imaging unmixing
Methods, circuits, and systems for time encoder-based unmixing of hyperspectral imaging data are disclosed. A method of unmixing hyperspectral imaging data includes receiving mixed image data of one or more pixels. The mixed image data is generated by an imaging device that captures hyperspectral data. The mixed image data includes sensed spectral band intensities of materials in an area represented by a particular pixel. The mixed image data is converted from first analog domain signals into pulse domain signals. A solution to a mixing equation in the pulse domain is generated to identify abundances of one or more of the materials based on the sensed spectral band intensities. The sensed spectral band intensities are compared to reference spectral band intensities of a set of considered materials. The solution is converted from a pulse domain into an analog domain as second analog domain signals.
US08659654B2 Image verification with tiered tolerance
Comparing a sample image to a reference image. Differences between the color channel values of the pixels in the sample image and the corresponding color channel values for the corresponding pixels in the reference image are calculated and compared to predefined tolerances. Based on the comparisons, a pixel status for the pixels in the sample image is defined. An image status indicating whether the sample image differs from the reference image is defined based on the defined pixel status.
US08659653B2 Device for evaluating the surface of a tire
A device for evaluating the appearance of the surface of a tire (P) comprising a color linear camera (1) comprising means (14, 15, 16) for separating the light beam (F) reflected by the surface of said tire (P) and entering the camera (1) into at least two base colors (R, G, B) of given wavelength, so as to direct the light beam to as many sensors (11, 12, 13) capable of obtaining a basic image in gray level (41, 42, 43) for each of the base colors, as many lighting means (21, 22, 23) as base colors, said lighting means being oriented so as to light the surface to be evaluated at different angles, characterized in that each of the lighting means (21, 22, 23) emits a colored light (R, G, B) that differs from that of the other lighting means, and the wavelength of which corresponds substantially to the wavelength of one of the base colors selected by the camera.
US08659646B2 Endoscopy device supporting multiple input devices
The present invention provides a remote-head imaging system with a camera control unit capable of supporting multiple input devices. The camera control unit detects an input device to which it is connected and changes the camera control unit's internal functionality accordingly. Such changes include altering clock timing, changing video output parameters, and changing image processing software. In addition, a user is able to select different sets of software program instructions and hardware configuration information based on the head that is attached. The remote-head imaging system utilizes field-programmable circuitry, such as field-programmable gate arrays (FPGA), in order to facilitate the change in configuration.
US08659642B2 Stereoscopic video file format and computer readable recording medium in which stereoscopic video file is recorded according thereto
The present invention relates to a stereoscopic video file format capable of improving bit efficiency and processing efficiency and a computer-readable recording medium in which the corresponding stereoscopic video file are recorded. The present invention includes: a file type box that stores file format information and information indicating whether or not to include monoscopic data; a movie box that stores a plurality of trak boxes configuring stereoscopic video streams; a media data box that stores multimedia resources; a stereoscopic video media information box that stores at least one common stereoscopic video stream arrangement information; a stereoscopic camera and display information reference box that stores camera parameter and recommendation display information referenced by the plurality of trak boxes; a stereoscopic camera and display information box that exists at each stereoscopic image frame of the stereoscopic video stream and stores reference information of the stereoscopic camera and display information reference box; and a meta box that stores metadata, thereby making it possible to minimize overlapping data and optimizing a configuration of a file format in a simple form.
US08659640B2 Digital 3D/360 ° camera system
The digital 3D/360° camera system is an omnidirectional stereoscopic device for capturing image data that may be used to create a 3-dimensional model for presenting a 3D image, a 3D movie, or 3D animation. The device uses multiple digital cameras, arranged with overlapping fields of view, to capture image data covering an entire 360° scene. The data collected by one, or several, digital 3D/360° camera systems can be used to create a 3D model of a 360° scene by using triangulation of the image data within the overlapping fields of view.
US08659635B2 Information processing system and information processing method
HMDs and compact cameras generate image data of display media of users, and transmit the data to a conference management server. HMDs and compact cameras further generate presentation information of the users for a conference, and transmit the information to the conference management server. The conference management server verifies the display medium by comparing an association between each user and the image data of the display medium used by the user with an association between the received image data of the display medium for the user and the user. If the verification is successful, the server transmits presentation information of the users for the conference received from the HMDs and the compact cameras to the HMDs.
US08659634B2 Method and system for implementing three-party video call by mobile terminals
The disclosure discloses a method for implementing a three-party video call by mobile terminals, which comprises: starting a Bluetooth feature of an intelligent mobile terminal acting as a server and that of an intelligent mobile terminal acting as a client, respectively; after a server intelligent mobile terminal and a client intelligent mobile terminal are bound together in terms of Bluetooth, starting, by the server intelligent mobile terminal and the client intelligent mobile terminal, their respective real-time transmission threads and real-time reception threads, and performing, by the server intelligent mobile terminal, audio/video data processing, so as to implement the three-party video call with a third party intelligent mobile terminal. The disclosure further discloses a system for implementing a three-party video call by mobile terminals. Use of the method and system enables intelligent mobile terminals to implement a three-party video call function, thereby user experience is satisfied.
US08659633B2 Light source control apparatus used in image forming apparatus using electrophotography process, control method therefor, storage medium storing control program therefor, and image forming apparatus
A light source control apparatus that do not always require calculations for the upper limit of driving current when characteristic of a light source varies. The light source control apparatus controls a light source that exhibits a characteristic including an uptrend region where the light amount increases with increasing driving current and a downtrend region where the light amount decreases with increasing driving current. A determination unit determines whether the light source is in the uptrend or downtrend region based on signals from a light variation detection unit and a current variation detection unit. A control unit matches the light amount (L) with target light amount (T), by increasing the driving current when LT in the downtrend region, and by decreasing the driving current when L>T in the uptrend region and when L
US08659632B2 Thermal printer
A thermal printer includes a platen roller, a thermal head, a frame including the thermal head and a side plate, the side plate including a platen roller receiving part configured to detachably support a bearing of the platen roller. The platen roller receiving part includes an open mouth for inserting and pulling out the bearing of the platen roller in a direction perpendicular to an axial direction of the platen roller, and the open mouth includes a protrusion formed on a downstream side in a rotation direction of the platen roller.
US08659630B2 Image processing apparatus, image processing method, and computer program product for image processing
An embodiment of the image processing apparatus for controlling the lighting of a line head that is driven with binary data and performs exposure with subline lighting to thereby form images, includes: a subline generating unit that generates a plurality of sublines from a same image data; an inclination correcting unit that exposes the generated sublines so as to generate correction image data used to correct an inclination of an exposure position; a gradation control unit that controls the lighting of sublines based on the correction image data generated by the inclination correcting unit to express gradation; and a light intensity correction unit that corrects and controls the light intensity based on the correction image data generated by the inclination correcting unit, wherein an output of the gradation control unit and an output of the light intensity correction unit are input into the line head in parallel.
US08659629B2 Image forming apparatus, image forming method, and computer program product
An image forming apparatus that includes an optical writing device for applying light corresponding to image data to form a first image of the image data includes: a temperature detecting unit that detects temperature at a plurality of positions in the optical writing device; and an adjustment processing unit that, when a temperature difference between the positions detected by the temperature detecting unit is out of a predetermined range, forms a second image for quality verification and performs a process for adjusting color registration of the first image by using the second image.
US08659625B2 Mobile terminal and method for adjusting menu bar softkey display dynamically
A method and terminal for adjusting menu bar softkey display dynamically are provided by the present invention. The method includes the following steps: obtaining the total display length of the menu bar and the respective corresponding character string length value and the location information of all the softkeys on the menu bar; setting the softkey of which the character string length value is non-zero on the menu bar as the non-zero softkey; assigning the display location and display length of each non-zero softkey according to the number of the non-zero softkeys and location information of each non-zero softkey; and displaying each non-zero softkey according to the assigned display location and display length. The method and terminal of the present invention overcomes the current defect that currently the fixed value is adopted to display the softkey of the bottom bar.
US08659618B2 Noise-robust edge enhancement system and method for improved image sharpness
A system for edge enhancement includes an input unit to receive an input signal Yin, a vertical enhancement unit to perform a vertical enhancement of an edge of the input signal Yin to generate an output YEV, and a horizontal enhancement unit to perform a horizontal enhancement of the edge of the input signal Yin to generate an output YEH. The system also includes a local gradient analysis unit to generate a local gradient direction GradDir and a local gradient magnitude GradMag based at least partly upon the input signal Yin, and a mixer to generate an output Yout by mixing the output YEV with the output YEH using the local gradient direction GradDir. The system further includes an output unit to output the output Yout.
US08659616B2 System, method, and computer program product for rendering pixels with at least one semi-transparent surface
A system, method, and computer program product are provided for rendering pixels with multiple semi-transparent surfaces. In use, a pixel is identified. Additionally, an operation to generate a plurality of samples for the pixel is performed. Further, a subset of the samples for each of at least one semi-transparent surface associated with the pixel is selected at least in part in a random manner. Moreover, the pixel is rendered utilizing the selected subset of the samples for each of the at least one semi-transparent surface.
US08659615B2 System and method for providing transparent windows of a display
Systems and methods for managing window transparency for a computer display, making windows wholly transparent or semi-transparent, on a window-by-window basis. Window transparency is triggered by monitoring messages exchanged between a program and an operating system, or by a user action. Upon detection of a first message indicating that a window of the display should be transparent, a layered display mode for the window is initiated. Upon detection of a second message indicating that the window should no longer be transparent, the layered display mode for the window is terminated. The layered mode can be controlled by the operating system or by a graphics processor.
US08659612B2 Control device, display device and method for controlling display device
A display device changes the gradation of pixels by a write operation of applying a voltage to the pixels a plurality of times. When newly changing the display state of pixels, the display device judges as to whether or not the pixels whose display state are to be changed are in a write operation. The display device starts the writing operation for those of the pixels that are not in a writing operation, and starts a new writing operation for those of the pixels that are in a writing operation, after the ongoing writing operation is completed. If a writing operation for pixels in progress of being updated and pixels with which a writing operation is to be newly started would lead to substantially large power consumption, the start of the writing operation for the pixels with which a writing operation is to be newly started is postponed.
US08659608B2 Video and graphics system with an integrated system bridge controller
A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.
US08659607B2 Efficient video decoding migration for multiple graphics processor systems
A method for switching decoding and rendering of a digital video stream from a first graphics processing unit (GPU) to a second GPU. The digital video stream is evaluated to determine an amount of time until a next intra-coded frame (I-frame) in the digital video stream. If the amount of time is below a threshold, decoding and rendering of the digital video stream is switched to the second GPU on the next I-frame in the digital video stream and decoding the digital video stream by the first GPU is stopped. If the amount of time is above the threshold, the digital video stream is decoded on both the first GPU and the second GPU, the rendering of the digital video stream is switched to the second GPU, and decoding the digital video stream by the first GPU is stopped.
US08659606B1 Inversion of post-skinning features
A computer-implemented method includes identifying a representation of a feature of an animated character by inverting a skinned representation of the feature in one position. The inversion includes a non-linear inversion of the skinned representation of the feature. The method also includes skinning the identified feature representation to produce the animated character in another position.
US08659602B2 Generating a pseudo three-dimensional image of a three-dimensional voxel array illuminated by an arbitrary light source by a direct volume rendering method
In an image processing method for generating a pseudo three-dimensional image by a volume rendering method in which a pixel value of each pixel on a projection plane on which a three-dimensional image illuminated by an arbitrary light source is projected is determined using a brightness value at each examination point, which is a point on the three-dimensional image sampled along each of a plurality of visual lines connecting an arbitrary viewpoint and each pixel on the projection plane, an illuminance level at each examination point is calculated based on an opacity level at each calculation point, which is a point on the three-dimensional image sampled along each of a plurality of light rays connecting the light source and each examination point, and the brightness value at each examination point is determined based on the calculated illuminance level.
US08659599B2 System and method for generating a manifold surface for a 3D model of an object using 3D curves of the object
Various embodiments of a system and methods for generating a manifold surface of an object from a set of 3D curves which define the shape of the object are described. The set of 3D curves may be directly tessellated in the 3D domain to form a manifold surface with boundary. The tessellation may be a Delaunay tetrahedralization which represents the set of 3D curves. The surface of the tetrahedralization may contain a set of possible manifold surface solutions. A dual complex form of the tetrahedralization may be generated to reduce the number of possible manifold surface solutions. Surface patches may be generated from the dual complex form, dependent on a set of metrics that may further reduce the number of possible manifold surface solutions. Compatible surface patches may be combined to form a set of possible manifold surface solutions which may be displayed to a user.
US08659598B1 Adjusting navigable areas of a virtual scene
A system includes a computing device that includes a memory configured to store instructions. The computing device also includes a processor configured to execute the instructions to perform a method that includes identifying one or more convex polygons being adjacent to a virtual object introduced into a virtual scene. The one or more convex polygons define a navigable area within the virtual scene. The method also includes redefining the one or more convex polygons adjacent to the virtual object to adjust the navigable area for the introduction of the virtual object. Redefining the one or more convex polygons uses Boolean operations and allows aligned perimeters of adjacent convex polygons to use unshared vertices.
US08659597B2 Multi-view ray tracing using edge detection and shader reuse
A multi-view image may be generated by detecting discontinuities in a radiance function using multi-view silhouette edges. A multi-view silhouette edge is an edge of a triangle that intersects a back tracing plane and, in addition, the triangle faces backwards, as seen from the intersection point, and the edge is not further connected to any back facing triangles. Analytical visibility may be computed between shading points and a camera line and shared shading computations may be reused.
US08659594B2 Method and apparatus for capturing motion of dynamic object
The present invention relates to a method and apparatus for capturing a motion of a dynamic object, and restore appearance information of an object making a dynamic motion and motion information of main joints from multi-viewpoint video images of motion information of a dynamic object such as a human body, making a motion through a motion of a skeletal structure on the basis of the skeletal structure, acquired by using multiple cameras. According to the exemplary embodiments of the present invention, it is possible to restore motion information of the object making a dynamic motion by using only an image sensor for a visible light range and to reproduce a multi-viewpoint image by effectively storing the restored information. Further, it is possible to restore motion information of the dynamic object without attaching a specific marker.
US08659591B2 Method of and system for image processing
A method of correlating a representation of a body to a three dimensional representation of the body. A representation (such as a two dimensional image) of a body is acquired and a fitness function is generated for it. A two dimensional outline of the three dimensional representation of the body is then generated for a number of sets of three dimensional position and orientation values. These are compared to the fitness function to generate measures of fit for each set of three dimensional position and orientation values. New sets of position and orientation values are then bred using a genetic algorithm or other breeding algorithm. The method is repeated until the measure of fit converges to an acceptable solution. There is also disclosed a system for performing the method.
US08659581B2 Stylus and portable electronic device using same
A portable electronic device, including a housing defining an earphone connector, a touch screen, and a stylus having a stylus body, a tip and a pin connecting the stylus body with tip, and the pin and the tip are detachably secured in the earphone connector.
US08659564B2 Touch sensible display device having reduced number of image data lines
A touch sensible display device includes a display panel. The display panel includes a plurality of pixels, a plurality of image data lines transferring image data signals to the plurality of pixels and each positioned between two neighboring pixels, a plurality of image scanning lines transferring image scanning signals to the plurality of pixels, a plurality of first sense data lines transferring first sense data signals and each positioned between two neighboring pixels without the image data line interposed therebetween, and a plurality of first sensing units connected with the plurality of first sense data lines and sensing a touch to the display panel.
US08659563B2 Electronic device with a page turning function during a sleep mode of the electronic device
An electronic device includes a touch screen, a microcontroller (MCU), and a central processing unit (CPU). The MCU detects a plurality of touch inputs one the touch screen when the CPU is in a sleep mode, determines whether the touch inputs form a touch event, and wakens the CPU from the sleep mode upon the condition that the touch inputs form the touch event. The CPU obtains the touch event from the MCU and executes the touch event to quickly turn a page of an e-book of the electronic device.
US08659558B2 Touch sensing display panel
A touch-sensing display panel including a display panel and a touch-sensing unit is provided. The touch-sensing unit includes a plurality of first sensing series, a plurality of second sensing series and a plurality of sensing signal transmission lines. Each of the first sensing series includes a plurality of first sub-sensing series and a plurality of first conductive branches connected with the first sub-sensing series. Each of the second sensing series includes a plurality of second sub-sensing series and a plurality of second conductive branches connected with the second sub-sensing series. The first sensing series and the second sensing series are intersected. Further, each one of the first sensing series and each one of the second sensing series is electrically connected to one of the sensing signal transmission lines, respectively.
US08659557B2 Touch finding method and apparatus
A method of determining touches from a data set output from a touch screen comprising an array of sensing nodes. The method comprises analyzing the dataset and identifies a node with a maximum signal value among all unassigned nodes, and, if present, assigns that node to a touch. A logical test is applied to each node that is a neighbor to the assigned node to determine if that node should also be assigned to the touch and the logical test is repeatedly applied to the unassigned neighbors of each newly assigned node until there are no more newly assigned nodes, or no more unassigned nodes, thereby assigning a group of nodes to the touch defining its area. This process can be repeated until all of the nodes of a touch panel are assigned to a touch. The method is ideally suited to implementation on a microcontroller. Therefore, although the kind of processing power being considered is extremely modest in the context of a microprocessor or digital signal processor, it is not insignificant for a microcontroller, or other low specification item, which has memory as well as processing constraints.
US08659552B2 Handheld electronic device
A handheld electronic device includes an input apparatus, an output apparatus, and a processor apparatus. The input apparatus includes a reduced keyboard and roller ball input. The roller ball input includes a movable portion that is substantially continuously rotatable with respect to a housing of the device and is rotatable about more than one axis providing input. The processor apparatus includes a disambiguation routine that can output various proposed interpretations of inputs from the reduced keyboard. The roller ball input advantageously provides various inputs to the handheld electronic device without requiring significant user attention, which enables a user to direct greater amount of attention to the output from the disambiguation routine and other aspects of the device. The roller ball input can be configured to additionally be translatable to provide an input, and additionally and/or alternatively the roller ball input can provide a tactile or other feedback to a user.
US08659547B2 Trajectory-based control method and apparatus thereof
A method for constructing a gesture mouse utilizes an object e.g., a user's palm) in the background of the photographed region of a video camera as a determination basis. In a computer system, (1) for the image of an object, the point with maximum Y-axis value is set to be a cursor; (2) the point with maximum X-axis value is set to be a push button; (3) the cursor and the push button are used as centers to set small tracking areas respectively; (4) if the distance between the cursor and the push button becomes greater than a designated threshold within a time period, an action of the push button is determined to occur. Images obtained by the video camera are input into a computer through the digital image interface of the video camera or an analog/digital converting card for further processing.
US08659538B2 Transflective liquid crystal display device and method of fabricating the same
A transflective liquid crystal display device. A first substrate having viewing and peripheral areas is provided. The viewing area comprises transmissive and reflective regions. A backlight device is disposed under the first substrate, used to provide a backlight passing through the transmissive region. A power management controller connects the backlight device to control an intensity of the backlight. At least one photodetector is formed on the first substrate in the peripheral area, wherein the photodetector detects an intensity of ambient light above the first substrate, and then provides a corresponding signal to the power management controller to control the intensity of the backlight. According to the invention, the intensity of the backlight automatically becomes greater when the intensity of the ambient light becomes lower, and the intensity of the backlight automatically becomes lower when the intensity of the ambient light becomes greater.
US08659535B2 Adaptive smoothing of backlight to reduce flicker
A method and apparatus for adaptively controlling the backlight to reduce flicker in a display is provided. The apparatus includes a display, a backlight providing illumination for said display, a backlight control module for providing backlight control signals to said backlight, and an adaptive transition rate module. The module calculates an adaptive parameter based on a magnitude of change between backlight requirements for two frames, determining a smoothing function based on the adaptive parameter, and using said smoothing function to modify said backlight control signals. Techniques for adaptively controlling the illumination of the backlight according to the difference in the illumination levels of two different sets of image data are also disclosed.
US08659532B2 Semiconductor device
There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
US08659531B2 Display device and driving apparatus thereof
A driving circuit according to an embodiment of the present invention includes an input terminal, unit circuits connected to the input terminal, and output terminals electrically connected to the input terminals. Each of the unit circuits is enabled in response to a control signal inputted via the input terminal.
US08659530B2 Timing controller counts clock signals to produce a control signal only after a number of clock pulses are counted
A timing controller that can reduce malfunctions, a liquid crystal display (LCD) including the timing controller, and a method of operating the LCD, in which the timing controller includes a counter providing a converting enable signal; an analog-to-digital (A/D) converter converting a user command signal into a digital user command signal in response to the converting enable signal; and a control signal generator generating a module control signal that corresponds to the digital user command signal.
US08659527B2 Active device array substrate
An active device array substrate including a substrate, a plurality of pixel structures and a plurality of resistance compensating devices is provided. The substrate has a display region and a scanning signal input region beside the display region. The pixel structures are disposed in the display region. Each of the pixel structures includes a scan line, a data line, an active device and a pixel electrode. The data line is disposed in stagger with the scan line. The active device is electrically connected with the scan line and the data line. The pixel electrode is electrically connected with the active device. Each of the resistance compensating devices and a scan line of a corresponding pixel structure are connected in parallel. Resistances of the resistance compensating devices gradually decrease from a region close to the scanning signal input region to another region away the scanning signal input region.
US08659524B2 Display apparatus with continuous semiconductor layer
A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
US08659523B2 Element substrate and light-emitting device
A potential of a gate of a driving transistor is fixed, and the driving transistor is operated in a saturation region, so that a current is supplied thereto anytime. A current control transistor operating in a linear region is disposed serially with the driving transistor, and a video signal for transmitting a signal of emission or non-emission of the pixel is input to a gate of the current control transistor via a switching transistor.
US08659522B2 Display apparatus having a threshold voltage and mobility correcting period and method of driving the same
In a display apparatus, as shown in FIG. 1, by using a reference signal, a shift register and a logical operation circuit generate a driving signal in periods for correcting a threshold voltage based on a rectangular wave signal. Also by using the reference signal, a write signal in a mobility correcting period is generated by an inverter, a NAND circuit, a level conversion circuit, a buffer circuit, a driving power generating unit, and a low-pass filter including a resistor and a capacitor. The signals are separately generated and are selectively output. Thus, excessive or insufficient mobility correction based on emission brightness can be prevented.
US08659519B2 Pixel circuit with a writing period and a driving period, and driving method thereof
A pixel circuit including at least a light emitting element, and a thin film transistor that supplies to the light emitting element a first current controlling a gray scale according to luminance-current characteristics of the light emitting element, wherein the thin film transistor has a back gate electrode, at least a driving period in which the thin film transistor supplies the first current to the light emitting element, and a writing period in which a second current is written to the thin film transistor before the driving period in order to pass the first current to the thin film transistor during the driving period are included, and by changing voltages which are applied to the back gate electrode in the driving period and the writing period, current capability to a gate voltage of the thin film transistor is made to differ.
US08659517B2 Light emitting device and method of driving the light emitting device
A light emitting device that achieves long life, and which is capable of performing high duty ‘drive,’ by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
US08659514B2 LED matrix driver ghost image prevention apparatus and method
LED drivers specially directed to LED matrix driver's ghost image prevention is disclosed. The LED driver receives an external input and decodes the input to produce a time multiplex timing on turning on an LED array. The LED driver inserts a dead time to the outputs and during this time the ghost image prevention circuit discharges the output stray capacitances to a predetermined level.
US08659513B2 Pixel and organic light emitting display device using the same
A pixel capable of displaying images with substantially uniform luminance and an organic light emitting display device using the same are provided. An organic light emitting display device is driven in a frame divided into a reset period, a compensation period and an emission period. The organic light emitting display device includes pixels coupled to scan lines and data lines. First and second control lines are commonly coupled to the pixels. A control line driver supplies first and second control signals to the respective first and second control lines. A scan driver concurrently supplies a scan signal to the scan lines during a time in the reset and compensation periods. A data driver supplies a reset voltage to the data lines during the time in the reset and compensation periods.
US08659512B2 Organic light emitting diode display and method for manufacturing the same
The present invention relates to an organic light emitting device and a manufacturing method thereof. The organic light emitting device according to an embodiment of the present invention comprises: a first pixel displaying a first color; a second pixel displaying a second color; and a third pixel displaying a third color; wherein each of the first, second, and third pixels comprise a first translucent member, a second translucent member disposed on the first translucent member, an intermediate member disposed between the first and second translucent members, and a pixel electrode disposed on the second translucent member.
US08659500B2 Multi-antenna for a multi-input multi-output wireless communication system
A multi-antenna for a multi-input multi-output wireless communication system includes a substrate, a first planar antenna formed on the substrate along a first direction, a second planar antenna formed on the substrate along a second direction, and a vertical antenna including a conductor formed on the substrate and between the first planar antenna and the second planar antenna, and a radiator perpendicular to the substrate and coupled to the conductor.
US08659496B1 Heat sink for a high power antenna
A mobile multiband antenna has a frequency matching circuit located in a base mount housing for mounting the antenna to a carrier. A heat sink is located on a reverse side of the frequency matching circuit. One or more resistors in the frequency matching circuit are mounted to the heat sink to dissipate heat.
US08659492B2 Multiband antenna
A multiband antenna includes a feed unit, a transceiving unit, and a resonance unit positioned adjacent to but separate from the feed unit and the transceiving unit. When feed signals are input to the feed unit, the feed signals are transmitted to the transceiving unit to form current paths of different lengths, and the resonance unit is driven to resonate and generates additional current paths of different lengths. In this way, the transceiving unit and the resonance unit are enabled to respectively receive and send wireless signals of different frequencies, and thus the multiband antenna is capable of receiving and sending wireless signals in more than two frequency bands.
US08659487B2 Antenna module and method for making the same
An antenna module includes a main body and an antenna radiator located on the main body. The antenna radiator is made of a liquid conductive material mixed by metal powders and diluting agent and is directly formed on the main body. A method for making the antenna module is also described.
US08659486B2 Computer with antenna
A computer includes an enclosure, a mainboard, a main antenna, and an auxiliary antenna. The enclosure includes an inner case and an outer cover. The mainboard is received in the inner case. The main antenna and the auxiliary antenna are mounted at an outer surface of the enclosure. The main antenna and the auxiliary antenna are electrically connected to the mainboard, respectively. The outer cover is mounted on the case and covers and protects the main antenna and the auxiliary antenna.
US08659477B2 Base station device and distance measuring method
Provided are a distance measuring device and a distance measuring method which can easily distinguish a reflected signal from a desired tag from an unnecessary wave so as to improve the distance measuring accuracy even when IR-UWB is used for measuring a distance. The method uses a reader ID indicated by a code string formed by P bits (P is a natural number) for identifying a base station and a tag ID indicated by a code string formed by Q bits (Q is a natural number) for identifying a radio terminal. The method generates a unique word containing P pulses, each of which is ON/OFF-modulated depending on whether each of P bits indicating the reader ID is 1 or 0. The method generates a frame containing 2 M unique words and a burst containing Q frames. The method further outputs a transmission signal containing a plurality of bursts. A radio terminal Amplitude Shift Keying (ASK)—modulates the transmission signal depending on whether each of the Q bits indicating the tag ID is 1 or 0. The ASK-modulated signal is sampling-received at timings of different phases by 1/M (M is an integer not smaller than 1) of the transmission clock cycle.
US08659469B2 Movable information collection apparatus
An object of the present invention is to provide a movable information collection apparatus capable of grasping the current situation in a timely fashion. Also, an object of the present invention is to provide a geographical monitoring system capable of utilizing the movable information collection apparatus. The movable information collection apparatus includes an observation data collection antenna system that receives observation data obtained by observing an observation target area from the air, a geographic information database that stores previously acquired geographic information in the observation target area, an evaluation calculation unit that calculates and outputs a difference between the observation data and the previously acquired geographic information, the observation data collection antenna system, the geographic information database, and the evaluation calculation unit being mounted on a movable pedestal.
US08659468B2 Method of correcting reflectivity measurements by isotherm detection and radar implementing the method
A method of correcting the reflectivity measurements performed by a radar such as a weather radar, a reflectivity measurement being associated with a resolution volume includes analyzing the current resolution volume to determine whether the plane representing the 0° C. isotherm passes through it. When the plane representing the 0° C. isotherm passes through the current resolution volume, the volume is split into two parts lying on either side of said plane, the attenuation associated with the resolution volume is determined by taking into account the contribution of each of the parts to the measured reflectivity. The reflectivity associated with the current resolution volume is corrected using the attenuation thus determined. An onboard weather radar implements the method.
US08659467B1 Zero source insertion technique to account for undersampling in GPR imaging
A method and system for detecting the presence of subsurface objects within a medium is provided. In some embodiments, the imaging and detection system operates in a multistatic mode to collect radar return signals generated by an array of transceiver antenna pairs that is positioned across the surface and that travels down the surface. The imaging and detection system pre-processes the return signal to suppress certain undesirable effects. The imaging and detection system then generates synthetic aperture radar images from real aperture radar images generated from the pre-processed return signal. The imaging and detection system then post-processes the synthetic aperture radar images to improve detection of subsurface objects. The imaging and detection system identifies peaks in the energy levels of the post-processed image frame, which indicates the presence of a subsurface object.
US08659464B2 Analog-digital converter and converting method using clock delay
The present inventive concept relates to an analog-digital converter. The analog-digital converter includes a clock generating unit generating a clock signal; a clock delay adjusting unit outputting one of a first clock signal to a Kth clock signal according to a control signal; a capacitive digital-analog converting unit outputting a difference between the analog signal and a reference signal; a comparison unit judging whether an output of the capacitive digital-analog converting unit is 0, a positive number, or a negative number, in response to an output of the clock delay adjusting unit; and an SAR logic unit transferring an output of the comparison unit to the capacitive digital-analog converting unit in response to an output of the clock delay adjusting unit and performing a successive approximation operation to output the N-bit digital signal.
US08659460B2 Successive approximation register ADC circuits and methods
A non-binary successive approximation analogue to digital converter, for converting using successive conversion steps, is operable in first and second modes. The first and second modes have different noise properties and the converter is switched between the modes during the conversion process.
US08659459B2 Digital-to-analog converter, analog-to-digital converter including same, and semiconductor device
Provided are a capacitor digital-to-analog (DAC), an analog-to-digital converter (ADC) including the capacitor DAC, and a semiconductor device. The DAC includes at least one dummy capacitor configured to cause capacitors included in a capacitor array to have a capacitance that is an integer multiple of the capacitance of a unit capacitor.
US08659458B1 Multiple return-to-zero current switching digital-to-analog converter for RF signal generation
A “multiple return-to-zero” (MRZ) current switching DAC. In operation, the outputs of respective current sources are selectively directed to respective intermediate nodes in response to respective control signals which vary with a digital input word, and in synchronization with a clock CK1. A plurality of MRZ current switches are connected between respective intermediate nodes and the DAC's analog output. The MRZ switches are driven with a clock CK2 which toggles in synchronization with CK1 at a frequency fCK2=N*fCK1. The MRZ switches are operated such that switching noise that arises when CK1 is asserted is prevented from appearing on the analog output. When properly arranged, the DAC can generate a direct digital waveform at RF frequencies, with N chosen to produce an output spectrum such that the DAC's output power is relatively high within the desired frequency range.
US08659456B2 Electronic device and transmitter DC offset calibration method thereof
An embodiment of the invention provides an electronic device. The electronic device includes a digital-to-analog converter (DAC), a transmitter front-end (TX FE), an amplifier, an analog-to-digital converter (ADC), and a swap circuitry. The TX FE has a first and a second input end coupled to a first and a second output end of the DAC, respectively. The ADC has a first and a second input end coupled to a first and a second output end of the amplifier, respectively. The swap circuitry is configured to couple the first and second output ends of the DAC to a first and a second input end of the amplifier in a normal state, respectively, and couple the first and second output ends of the DAC to the second and first input ends of the amplifier in a swapped state, respectively.
US08659455B2 System and method for operating an analog to digital converter
A system and method can be used for scaling an output of a modulator of a sigma-delta analog to digital converter and systems and a method can be used for compensating temperature-dependent variations of a reference voltage in a sigma-delta analog to digital converter. In accordance with one embodiment, a system can be used for scaling an output of a modulator of a sigma-delta analog digital converter (ADC). A decimation filter has a decimation length that is adjustable by a decimation length value received as an input to the decimation filter. The decimation filter is configured to receive the output of the modulator of the sigma-delta ADC and to decimate the received output of the modulator of the sigma-delta ADC using the received decimation length value.
US08659454B2 Time error estimating device, error correction device and A/D converter
A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by performing sampling at timings shifted from one another has correlators each configured to obtain a correlation value representing a similarity between the sampling output signals, and a weight adder configured to estimate the sampling time error of the sampling circuits, based on a result obtained by adjusting a weight on the correlation value.
US08659452B2 Data compression devices, operating methods thereof, and data processing apparatuses including the same
A method of operating a data compression device includes analyzing data using an analyzer and generating a result of the analysis, while the data is buffered by an input buffer, and selectively compressing the buffered data according to the result of the analysis. A data compression device includes a data pattern analyzer configured to analyze data transmitted to an input buffer, and generate an analysis code based on the analysis of the data; and a data compression manager configured to selectively compress the data in the input buffer based on the analysis code.
US08659451B2 Indexing compressed data
A method to at least one of compress and decompress data includes providing a string (T) consisting of multiple given substrings. Identification symbols ($,$1,$2,$3) are assigned to the substrings of the string (T). The substrings of the string (T) are transferred by permutation into a permuted string (O(T),O*(T)). The permuted string (O(T),O*(T)) is sorted into a sorted permuted string (oSort(T), oSort*(T)) according to a given sorting criterion. The identification symbols ($,$1,$2,$3) are permuted and sorted together with the substrings of the sting (T) so that, in a partial inverse transformation step, characters of an Nth substring are sequentially determined within the permuted string (O(T),O*(T)) after determining a position (P) of an Nth identification symbol ($,$1,$2,$3) assigned to an Nth substring within the sorted permuted string (oSort(T),oSort*(T)) without reading characters of other substrings of the permuted string (O(T),O*(T)).
US08659445B2 Devices, systems and methods for reinforcing a traffic control assembly
Reinforcement devices and systems for holding a traffic control assembly in compression are provided. The traffic control assembly includes a traffic signal disconnect hanger and/or a traffic signal and a first span wire positioned above the traffic control assembly. In some embodiments, the reinforcement device includes an upper support device connected to the first span wire where the upper support device has a length that is greater than a width of the traffic control assembly and the upper support device is configured to spread the load of the traffic signal assembly to the first span wire. The reinforcement device includes a lower support device operably connected to the traffic signal, a first vertical support member, and a second vertical support member where the first and second vertical members are tensioned when the upper support device, the lower support device and the first and second vertical support members are connected together.
US08659444B2 Communication between stations and vehicles
An On Board Equipment (OBE) suitable for mounting on a vehicle comprises an OBE antenna connected to an OBE transmit/receive unit. The OBE antenna is arranged to receive a signal from a station via a first wireless communication link. The signal comprises at least one traffic information message from the station. The OBE is arranged to convert the traffic information message for transfer to an audio output through at least one speaker in an existing audio system of the vehicle wherein said transfer of the traffic information message to the existing audio system is arranged to be performed via a second wireless communication link. The traffic information message is arranged to be picked up by standard receiving means of the existing audio system and to be delivered as a voice message on said speakers through a prioritized channel of the existing audio system.
US08659443B2 Treatment area zoning system
A treatment area marker device and method for using the treatment area marker in setting up a triage facility for patient care. The device and the method may be particularly useful during an emergency or crisis situation. The treatment area marker is an article of manufacture that includes a light source that is capable of generating different colors of light. The bottom end of the treatment area marker has the means for keeping the device in a substantially upright position. The method of triage includes establishing one or more treatment areas, and erecting one or more treatment area markers to identify the treatment area.
US08659437B2 Leakage detection and compensation system
A flame sensing system having a flame rod, a signal generator, a signal measurement circuit, and a controller, where the frequency and/or amplitude of the excitation signal may be variable. The signal measurement circuit may include a bias circuitry that references the flame signal to a voltage, a capacitor that varies the filtration, an AC coupling capacitor, a current limiting resistor, and a low-pass filter. The system may determine the flame-sensing rod contamination, the stray capacitance of the flame sensing system, and compensate for stray capacitance in the flame sensing system. The flame model may include a circuit that simulates a flame in the presence of the sensing rod, and another circuit that simulates a contact surface between the flame and the sensing rod.
US08659436B2 Vehicle operator alertness monitoring system
An exemplary vehicle operator alertness monitoring system includes a heart rate monitor and a vehicle operator alert module. The vehicle operator alert module communicates with the heart rate monitor and determines whether a vehicle operator's heart rate is within an acceptable range. The vehicle operator alert module is configured to alert the vehicle operator when the vehicle operator's heart rate is outside of the acceptable range to assist the vehicle operator at maintaining alert control over the vehicle.
US08659435B2 Waterproof optically-sensing fiberless-optically-communicating vitality monitoring and alarming system, particularly for swimmers and infants
The vitality of a swimmer, or of a child, is monitored by a periodically-activated micro-powered solar- and battery-powered waterproof microminiaturized (1) optical sensor of heart activity, electrically connected to (2) a microprocessor monitor, for jointly determining when a person's heart activity has stopped. When and if required, the microprocessor causes to be transmitted, through water a blue-green light alarm signal. When this optical alarm signal is received by an optical receiver/alarm in air, the receiver/alarm produces an audio and/or visual alarm that, when sensed by a human, potentially timely permits rescue and resuscitation of the swimmer, or the child. The battery-and-solar-powered monitor that forms the core of the vitality monitoring system is roughly ten times faster and more capable, with but one-tenth the power consumption, than previous real-time biological monitoring systems.
US08659431B2 Method and apparatus of monitoring and updating security personnel information
A method and apparatus of monitoring security personnel in a building facility is disclosed. One example method may include storing a plurality of information records associated with each of the security personnel in a database. The method may also include compiling, via a processor, a list of the information records that may be in violation of predetermined criteria used to determine whether the security personnel are in compliance with security procedures, and automatically notifying a security supervisor of the building facility of the security personnel that may be in violation of the security procedures. Such measures may reduce security violations and increase compliance with security measures and other safety concerns.
US08659430B2 Radio frequency signal acquisition and source location system
A radio frequency signal acquistion and source location system, including a first signal acquisition and source location module comprising an RF transceiver coupled to an antenna, the antenna provided with a electronic steering circuit. The antenna operative to launch an interrogation signal, the interrogation signal steerable by an electronic steering circuit. A processor operatively coupled to the RF transceiver and the electronic steering circuit, the processor provided with a data storage for storing a signal data record for each of at least one response signal(s) received by the RF transceiver(s). The signal data record including a signal identification, a received signal strength indicator and an RF signal direction along which respective signal(s) are received by the antenna, the RF signal direction derived from the electronic steering circuit. A postion logic operative upon the data record(s) derives a three dimensional signal origin location of each response signal.
US08659423B2 Smart display device for independent living care
A wireless contextual prompting device provides contextual (context-aware) prompting in the home for applications such as Activities of Daily Living (ADL) monitoring, medication adherence, journaling, social messaging and coaching. The device combines the advantages of a small, wireless, battery-operated sensor that may be easily mounted at critical places in a person's daily routine with a low-power, high-contrast display panel that may be palm sized. The context may be displayed on the display screen as images, icons and/or text such that it is easy to interpret warnings by the young, elderly, or the language-challenged.
US08659422B2 Condition, health, and usage monitoring system
A sensor module includes a number of environment sensors and condition sensor interfaces. Each condition sensor interface is configured to couple with a condition sensor capable of sensing an attribute of a component exposed to the environment. The sensor module may be embedded within a structure associated with the component. For example, in the context of a solid rocket motor, the sensor module may be embedded within the exhaust plug.
US08659421B2 Remote child monitoring system with temperature sensing
The present disclosure relates to a monitoring system for sensing and transmitting sounds in a child's vicinity. The present disclosure relates to a monitoring system for sensing and transmitting indicia of temperature in a child's vicinity and/or of a child.
US08659420B2 Tracking system and device
A tracking device and system for tracking containers, in particular, containers and their contents, is disclosed. The tracking device utilizes AGPS/GPS/GSM/CDMA/LTE/EVDO/WiFi/RFID/Bluetooth®/TDMA technology to enable an individual to locate and monitor the movement of a Container at any given time and for any desired period of time. The tracking system utilizes virtual geo-fences to identify buildings or specific addresses to assist in determining the specific location of the containers in relation to these buildings or specific addresses. The tracking devices can also be activated by motion sensors to alert the tracking system of a possible theft of the container or sudden movement. The tracking system incorporates software which enables an individual to determine the location of the containers, determine the contents of the containers, and schedule the use of the containers by specific persons and at specific locations. The tracking system also retains information regarding the persons, the supplier's representatives, the warehouses and sales of the containers and any contents that they may have.
US08659416B1 Instrument for detecting and alerting during an emergency situation
An alarm system with an integral high-intensity illumination means comprising reflective beads for increased visibility is intended to provide alarm notification for the hard-of-hearing or deaf individuals. The illumination means on the bottom provides visual notification to deaf or hard of hearing building occupants and those who may outside of the building. To aid in the visual observation of the illumination means, a series of reflective beads are hung from the bottom of the detector.
US08659414B1 Wireless object-proximity monitoring and alarm system
A wireless child proximity monitoring and alarm system for use with child seats for vehicles includes a separable seat monitor for affixation to the seat's shoulder straps. The seat monitor has a first housing affixable to one of the shoulder straps and a second housing affixable to a second shoulder strap. The second housing has a transceiver for wireless communication and a microcontroller integrated with the transceiver. A micro switch is communicative with the microcontroller and is responsive to the proximity of the first housing. A connecting strap extends between the housings and is separable from at least one housing. A key fob for retention by a child caregiver has a fob case and a transceiver therein for wireless communication with the seat monitor transceiver. A microcontroller is integrated with the transceiver, and an alarm is selectively operable between a first silent sate and a second audible alarm generating state.
US08659413B2 Fluid level monitoring system and method
A fluid level monitoring system may include a control panel having a plurality of input devices, each corresponding to a monitored fluid of a machine, and a plurality of indicators, each corresponding to one of the input devices. The indicators may provide visual displays of fluid level statuses for the monitored fluids. The fluid level monitoring system may further include a message display device that may display a fluid level status message for one of the monitored fluids based on the actuation of the corresponding input device of the control panel.
US08659408B2 Object detection system and method using a camera and a multiple zone temperature sensor
A system and method to provide a notification to an operator of a vehicle that an object is proximate to the vehicle. Data from a visible light camera and a multiple zone temperature sensor are combined or fused to determine which regions of a display should be highlighted in order to help the vehicle operator better notice or discern an object shown on a display. The region or area of the display highlighted is determined by displaying a highlighted area or icon on the display corresponding to an area where objects detected on image data maps of hue and/or saturation and/or intensity data from the camera intersect with objects detected on a temperature data map from the temperature sensor. Misalignment between the camera and the temperature sensor may be tolerated by expanding the object detected on the various maps in order to increase the probability of an intersection occurring.
US08659404B2 Methods and systems related to establishing geo-fence boundaries and collecting data
Establishing geo-fence boundaries and collecting data. At least some of the illustrative embodiments are methods including: detecting a vehicle is located within a first political boundary; establishing a first geo-fence boundary for the vehicle corresponding to the first political boundary, the establishing responsive to detecting the vehicle is within the first political boundary; collecting data regarding the vehicle movement within the first geo-fence boundary; and detecting the vehicle has departed the first geo-fence boundary.
US08659391B2 Multielement and multiproperty tagging
An embodiment relates to a man-made object comprising a distinctive structure with a feature to identify the object, wherein the object has a size such that the object is observable under visible light, wherein the feature is embedded in or on the object and a size of the feature is such that the feature is not observable under visible light, wherein the feature comprises an attribute originating from the feature, and wherein the attribute defines the feature.
US08659389B2 Secure inventory control systems and methods for high-value goods
Embodiments of the present invention include methods and systems for tracking and monitoring high-value goods by scanning RFID tags associated with the goods. A central monitoring service verifies both the RFID tags and the devices used to scan the tags against a database of known and trusted tags and scanning devices. Local and centralized security protocols provide improved security and data integrity.
US08659388B2 Variable strength wireless communication system
A wireless communication system is provided. The communication system comprises a key fob comprising a wireless transmitter adapted to transmit a first signal having a first transmission field strength and first transmission duration, and a second signal having a second transmission field strength and second transmission duration and a vehicle comprising a wireless receiver adapted to receive the first and second signals.
US08659375B2 Reed switch
A reed switch includes an envelope. First and second fixed terminal pieces are at one end of the envelope. A third fixed terminal piece is at another end of the envelope. A movable reed piece has a base end portion facing the one end portion of the third fixed terminal piece across a magnetic gap, a distal end portion to contact the first fixed terminal piece, and a movable contact portion. A first spring member has a base end portion secured to the first fixed terminal piece and a distal end portion to contact the movable contact portion. A second spring member has a base end portion secured to the second fixed terminal piece and a distal end portion to contact the movable contact portion. A third spring member has one and another end portions respectively secured to the movable reed piece and the third fixed terminal piece.
US08659369B2 IC package with embedded filters
Methods and systems for filters embedded in an integrated circuit package are disclosed and may include controlling filtering of signals within an integrated circuit via one or more filter components embedded within a multi-layer package bonded to the integrated circuit. The one or more filter components may be electrically coupled to one or more switchable capacitors within the integrated circuit. The filter components may include transmission line devices, microstrip filters, transformers, surface mount devices, inductors, and/or coplanar waveguide filters. The filter components may be fabricated utilizing metal conductive layers and/or ferromagnetic layers deposited on and/or embedded within the multi-layer package. The integrated circuit may be electrically coupled to the multi-layer package utilizing a flip-chip bonding technique.
US08659368B2 Surface acoustic wave filter device
An IDT electrode defining any one of a plurality of surface acoustic wave resonators defining series arm resonators and parallel arm resonators, except for the IDT electrode having a smallest amount of heat generation per unit time when a signal flows between first and second signal terminals, does not face wiring electrodes.
US08659362B2 Relaxation oscillator circuit with reduced sensitivity of oscillation frequency to comparator delay variation
A relaxation oscillator circuit with reduced sensitivity of oscillation frequency to comparator delay variation includes a first current source that generates charging current, a second current source coupled to the first current source to generate reference voltage, a resistor coupled to the second current source to enable generation of the reference voltage, a capacitor coupled to the first current source that is charged based on the charging current, a comparator responsive to voltage corresponding to the capacitor and the reference voltage to generate output voltage, a peak detector coupled to the capacitor to generate peak voltage, an error detector coupled to the peak detector and the second current source to generate an error based on the peak voltage and the reference voltage, and a controller coupled to the error detector to control one of the charging current, offset voltage input to the comparator, and capacitance of the capacitor.
US08659360B2 Charge-to-digital timer
The charge-to-digital timer apparatus and method disclosed herein estimates the elapsed time between two signals, e.g., a start signal and a stop signal. To that end, at least a capacitive load is charged with a known current to generate a load voltage. Subsequently, a first voltage is ramped in a plurality of discrete voltage steps associated with a plurality of known capacitances until the ramped voltage satisfies a predetermined criterion relative to a second voltage. The elapsed time is determined from the discrete voltage steps, one of the first and second voltages, the known current, and the known capacitive load.
US08659352B2 Power amplifier
A power amplifier includes: a first amplifying element amplifying an input signal; a second amplifying element amplifying an output signal of the first amplifying element; a third amplifying element amplifying the input signal; a first switch connected between an output of the first amplifying element and an input of second amplifying element; a second switch connected between an output of the first amplifying element and an output of the third amplifying element; a third switch connected between an output of the first amplifying element and an output of the second amplifying element; a reference voltage generating a circuit generating reference voltage; a bias circuit supplying a bias current, based on the reference voltage, to inputs of the first, second, and third amplifying elements; and a control circuit controlling the first, second and third switches and the reference voltage generating circuit.
US08659351B2 Electronic circuit for driving a switching amplifier
An electronic circuit is disclosed for driving a switching amplifier. The electronic circuit is configured for generating, when operating in a switch-on mode, a driving signal for driving the switching amplifier. The driving signal carries a plurality of pulses having: an pulse width increasing between contiguous pulses of the plurality of pulses according to a step value having modulus equal to two and odd values; a polarity alternating between the contiguous pulses.
US08659349B1 Control circuit for use with a four terminal sensor, and measurement system including such a control circuit
A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N−1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2π radians or a multiple thereof, where N is greater than 1.
US08659346B2 Body-bias voltage controller and method of controlling body-bias voltage
A body-bias voltage controller includes: a plurality of transistors at least one of which is supplied with a body-bias voltage; a monitor circuit to detect voltage characteristics of the plurality of transistors and to output a indicator signal; and a body-bias voltage generator to generate the body-bias voltage based upon the indicator signal.
US08659345B2 Switch level circuit with dead time self-adapting control
A switch level circuit (110) with dead time self-adapting control, which minimizes the switching loss in a switching power supply converter with synchronous rectification by changing a dead time between a high-side control transistor (10) and a low-side synchronous rectifying transistor (11). The switch level circuit (110) includes the high-side control transistor (10) and the low-side synchronous rectifying transistor (11) which are controlled to be on and off by external control signals, and a waveform with a given duty cycle is outputted at a node (LX) between the two transistors. The switch level circuit (110) also includes a control module for adjusting the dead time. The control module comprises a sampling circuit (16) for detecting the current dead time at the node (LX), an adjusting circuit (17) for buffering and converting the sampling voltage sampled by the sampling circuit (16), and a controlled delay unit (15) equipped with an external control input terminal, wherein the controlled delay unit (15) delays an external control signal and outputs the delayed signal to a controlled terminal of the low-side synchronous rectifying transistor (11) as a control signal. The switch level circuit (110) has simple structure, better performance and wide application range.
US08659344B2 Electronic circuit with a regulated power supply circuit
A power supply regulator circuit uses a feedback loop to control current through a first output transistor from a power supply input to a regulated power supply output. The first output transistor is included in an integrated circuit. In order to avoid heating of the integrated circuit in excess of an acceptable level due to permanent supply of a high current through the first transistor, current through a second output transistor in parallel with the first transistor, but outside the integrated circuit is raised when it is detected that the current through the first output transistor exceeds a threshold level. The second output transistor outside the integrated circuit serves to take over supply of a part of the power supply current from first output transistor inside integrated circuit, when long term supply of that part from first output transistor would lead to undesirable heating of the integrated circuit. During a limited time interval a first transistor current above the threshold level is acceptable. During this time interval the current through the second output transistor is raised slowly in order to avoid unpredictable stability problems and the generation of excessive power supply noise.
US08659340B2 Tunable voltage-controlled pseudo-resistor
A tunable voltage-controlled pseudo-resistor structure, comprising: a symmetric PMOS transistor circuit and an auto-tuning circuit connected in series. Input of the auto-tuning circuit is connected to a central position Vf of the PMOS transistor circuit having its output Vg, with its purpose of keeping Vg−Vf at a constant value. The PMOS transistor circuit may produce body effect through various different bulk voltages. Through the auto-tuning circuit, Vg and Vf are kept constant to make current of transistor to produce compensation effect, such that regardless of Va>Vb or Va
US08659339B2 Offset canceling circuit, sampling circuit and image sensor
An offset canceling circuit stores charge corresponding to a voltage difference between a reset voltage received from a unit pixel and a reference voltage, thereby canceling an offset of the unit pixel.
US08659332B2 Signal circuit
A signal circuit includes a clock terminal for transmitting a reference clock and a data terminal for transmitting an input/output data. In an embodiment, the frequency of the reference clock is one-eighth of the bit rate of the input/output data.
US08659331B2 High accuracy sin-cos wave and frequency generators, and related systems and methods
High accuracy sin-cos wave and frequency generators, and related systems and methods. In non-limiting embodiments disclosed herein, the sin-cos wave generators can provide highly accurate sin-cos values for sin-cos wave generation with low hardware costs and small lookup table requirements. The embodiments disclosed herein may include a circuit to conduct an arithmetic approximation of a sin-cos curve based on a phase input. The circuit may be in communication with a point lookup table and a correction lookup table. The tables may receive the phase input and match the phase input to main sin-cos endpoints associated with the phase, and to a correction value for the phase. These values which are selected based on the phase input, may be communicated to a converter circuit where the arithmetic functions are applied to the values resulting in a sin-cos curve value.
US08659328B2 Method for transmitting a binary signal via a transformer
A method for the repetitive transmission of a signal representing a binary value via a transformer section of a driver of a power semiconductor. Transmitting for the first value a first pulse packet as a sequence of a positive pulse and a negative pulse or for the second value a second pulse packet as a sequence of a negative pulse and a positive pulse to the input of the transformer. The respective pulse packets are repetitively fed to the transformer, one of the first value and the second value is detected at the output of the transformer from the sequence of the polarity of an output variable within a transmitted pulse packet.
US08659327B2 High voltage sustainable output buffer
An output buffer includes a first output transistor, a first switch, a second switch and a third switch. The first output transistor is connected to a first operational voltage for outputting the first operational voltage as the data signal. The first switch is connected to a bulk of the first output transistor for receiving an enable signal. The second switch is connected to the first switch and a second operational voltage for receiving the enable signal, wherein the second operational voltage is lower than the first operational voltage. The third switch includes a first terminal connected to the bulk of the first output transistor, a control terminal connected to the first switch, and a second terminal connected to the first operational voltage.
US08659322B2 Memory having a latching sense amplifier resistant to negative bias temperature instability and method therefor
An integrated circuit includes a memory cell and a sense amplifier coupled to the memory cell via a first bit line and a second bit line. The sense amplifier includes first and second inverters cross-coupled to provide a latch. The first inverter is responsive to a first data signal provided by the memory cell over the first bit line. The second inverter is responsive to a second data signal as provided by the memory cell over the second bit line. A first negative bias temperature instability (NBTI) compensation transistor includes a source electrode coupled to receive a reference voltage, a drain electrode coupled to a source electrode of the first inverter, and a gate electrode coupled to first logic responsive to the first data signal. A second NBTI compensation transistor includes a source electrode coupled to receive the reference voltage, a drain electrode coupled to a source electrode of the second inverter, and a gate electrode coupled to second logic responsive to the second data signal, wherein the second data signal is a logical complement of the first data signal.
US08659320B2 Digital logic circuit with dynamic logic gate
A digital logic gate suitable for a high-speed operation of a central processing unit. The digital logic gate comprises the first dynamic logic gate configured to logically gate a plurality of first input data in response to the first clock signal, a second dynamic logic gate configured to logically gate a gating output of the first dynamic logic gate and a plurality of second input data, and a latching device configured to latch a gating output of the second dynamic logic gate. The digital logic circuit need not adopt a keeper circuit, and thus a gate delay is reduced and the digital logic circuit performs a high-speed gating operation with robust characteristic against a current leakage or an input noise.
US08659317B1 Flexible multi-point routing topology
Apparatuses and methods of configuring a programmable analog routing system to make connections between analog functional blocks of an integrated circuit are described. A programmable analog routing system includes a first set of wires and switch sets of programmable connections coupled to a second set of wires. The programmable connections are configured to make at least one of a direct connection between two of the analog functional blocks using the second set of wires or a connection between one of the second set of wires and one of the first set of wires.
US08659315B2 Method for printed circuit board trace characterization
A method is provided which measures PCB trace characteristics from measurements of a PCB trace structure.
US08659304B2 High frequency characteristic measuring device
A high frequency characteristic measuring device for measuring high frequency characteristics of a high frequency device to be measured by contacting probe needles with the high frequency device to be measured, before mounting of the high frequency device to be measured. The high frequency characteristic measuring device includes an input matching circuit substrate with an input matching circuit thereon, a first coaxial connector electrically connected to the input matching circuit substrate, and first probe needles electrically connected to the input matching circuit substrate. The high frequency characteristic measuring device further includes an output matching circuit substrate with an output matching circuit thereon, a second coaxial connector electrically connected to the output matching circuit substrate, and second probe needles electrically connected to the output matching circuit substrate.
US08659303B2 Occupant detection sensor testing apparatus and method
A testing apparatus for testing whether an occupant detection sensor normally operates is disclosed. The testing apparatus includes: a ground that is an electrically-conductive structural member of the seat; an electrode plate that is electrically-conductive and is on the seat at a time of testing; multiple capacitors that are electrically connected between the electrode plate and the ground and are different in electrostatic capacity from each other; a switch mechanism that selects and switches one capacitor of the multiple capacitors; and a determination result check portion that determines, while switching the one capacitor by the switch mechanism, whether a signal outputted from the occupant detection sensor is a determination result corresponding to the switched one capacitor.
US08659302B1 Monitoring and recoverable protection of thermostat switching circuitry
Voltage is detected on both sides of a protection fuse within a thermostat, such that a determination can be made as to the status of the fuse. When a blown fuse is detected, the user can be notified via (1) an error message on the thermostat display, and/or (2) a message on another device such as a mobile device and/or web-client device. According to some embodiments the thermostat manufacturer is notified via network connection. According to some embodiments drain voltage is measured on MOSFETs used in the thermostat for switching on and off HVAC functions. If an over-current is detected on a FET switch, it immediately turned off and a fault indictor is sent to the microcontroller. The FET switch remains “off” until it is re-enabled under control of the microcontroller.
US08659300B2 Stress testing of silicon-on-insulator substrates using applied electrostatic discharge
A method of implementing electrostatic discharge (ESD) testing of an integrated circuit includes applying an ESD event to an exposed backside of a substrate of the integrated circuit, wherein the backside of the substrate is electrically isolated from circuit structures formed at a front-end-of-line (FEOL) region of the integrated circuit. The operation of the circuit structures is tested to determine whether the ESD event has caused damage to one or more of the circuit structures as a result of a breakdown in the electrical isolation between the circuit structures and the backside of the substrate.
US08659297B2 Reducing noise in magnetic resonance imaging using conductive loops
A method of processing an electrical signal includes: capturing, via at least one main lead, an electrical signal; capturing, via at least one noise lead, a noise reference signal, wherein the at least one noise lead includes at least one conductive loop formed on a plane; receiving, by a processing device, the electrical signal and the noise reference signal; and processing, by the processing device, the electrical signal to cancel the noise reference signal from the electrical signal to obtain a processed electrical signal.
US08659296B2 Double layer multi element RF strip coil array for SAR reduced high field MR
A high or ultra-high field magnetic resonance imaging method and device including a double-layered transmit-receive coil array that includes a transmit element placed in close proximity to a radio frequency shield to reduce SAR, and a receive element that is placed further away from the shield to improve SNR. The transit and receive elements may be mutually decoupled using diodes, transformers, or other decoupling techniques. A portion of the transmit element may pass in front of the RF shield while capacitors in the transmit element may be positioned behind the shield.
US08659294B2 Method for acquiring dynamic motion images to guide functional magnetic resonance imaging analysis of motor tasks
A method for imaging neuromuscular coupling and sensory processing with magnetic resonance imaging (“MRI”) is provided. More specifically, a method for examining the control that a subject's brain has over muscular motion, including both prompted and incidental actions, is provided. A dynamic acquisition is performed to rapidly acquire anatomical images of a desired muscle. This dynamic acquisition is interleaved with a functional acquisition that targets the cortical areas that are responsible for controlling, or processing, signals from the desired muscular region. By interleaving these two acquisitions, synchronized image information about the motion of the muscle along with the neuronal activity associated with the control of the muscle is acquired. Interleaving these data acquisitions also allows imaging of brain and muscle at substantially the same time, thereby reducing errors and pinpointing activity.
US08659292B2 MR sensor with flux guide enhanced hard bias structure
A CPP MR sensor interposes a tapered soft magnetic flux guide (FG) layer between a hard magnetic biasing layer (HB) and the free layer of the sensor stack. The flux guide channels the flux of the hard magnetic biasing layer to effectively bias the free layer, while eliminating instability problems associated with magnetostatic coupling between the hard bias layers and the upper and lower shields surrounding the sensor when the reader-shield-spacing (RSS) is small.
US08659291B2 Magneto-optical detection of a field produced by a sub-resolution magnetic structure
A polarization microscope optically detects the effect of the magnetic field from a sub-optical resolution magnetic structure on a magneto-optical transducer. The magneto-optical transducer includes a magnetic layer with a magnetization that is changed by the magnetic field produced by the magnetic structure. The saturation field of the magnetic layer is sufficiently lower than the magnetic field produced by the magnetic structure that the area of magnetization change in the magnetic layer is optically resolvable by the polarization microscope. A probe may be used to provide a current to the sample to produce the magnetic field. By analyzing the optically detected magnetization, one or more characteristics of the sample may be determined. A magnetic recording storage layer may be deposited over the magnetic layer, where a magnetic field produced by the sample is written to the magnetic recording storage layer to effect the magnetization of the magnetic layer.
US08659278B2 Controller for switching regulator, switching regulator and light source
A switching regulator (2-5) supplies a controllable stable average current to a load (1), such as series-connected light emitting diodes. A regulator controller (2) includes a hysteretic comparator (12, 30) which controls a switch in the form of a transistor (15) for switching current into an inductor (3). The comparator (12) has upper and lower thresholds. A first circuit comprising a fast current monitor (6) supplies a first signal to the comparator representing the instantaneous current in the inductor (3). A second circuit (36, 37, 41, and 42) supplies a second signal to the comparator representing an error between a desired regulator output and an actual regulator output.
US08659272B2 Bidirectional boost-buck DC-DC converter
To provide a DC/DC converter capable of down-sizing magnetic components and varying boosting and bucking ratios, and a bidirectional boosting-bucking operations, a bidirectional boosting-bucking magnetic-field cancellation type of DC/DC converter (10) is provided which includes: a first voltage side port (P1), a second voltage side port (P2); a common reference terminal (CP), a smoothing capacitor (C1), four switching elements (SW1, SW2, SW3, SW4), an inductors (L1, L2), a magnetic-field cancellation type transformer T including a primary winding (L3) and a secondary winging (L4), four switching elements (SW5, SW6, SW7, SW8), and a smoothing capacitor (C2).
US08659263B2 Power supply circuit having low idle power dissipation
Embodiments include a power supply arrangement where major components including an off-line switched power supply are shut off when not in use. When a load is coupled to the power supply arrangement, components are enabled so as to provide power to the load.
US08659262B2 Battery chargers that are used for power tools and are configured to be connectible with cellular phones
A battery charger includes telephone handset and a connector for connecting with a cellular phone. A sound signal can be transmitted between the telephone handset and the cellular phone via the connector.
US08659258B2 Method for operating a brushless motor
The present invention relates to a method for operating a brushless electric motor whose windings are driven by an inverter with the aid of six switches, having an identification unit being provided in order to identify defective switches, a unit for voltage measurement at the outputs of the inverter, and a microcontroller for controlling the switches. Particularly in safety-relevant applications, it is important to quickly determine what characteristic the defective switch has, for example in order to continue to operate the electric motor in an emergency mode, or to switch it off immediately. The defect (F1, F2, F3) is traced and the nature of the defect (F1, F2, F3) in a switch determined by using a different voltage (PWM1, PWM2) to drive those windings (V, W) which are not associated with the defective switch, while a voltage measurement is carried out on the winding (U) associated with the defective switch.
US08659257B2 Electronic operational control device for a piloting member with cross-monitoring, piloting device and aircraft
An electronic operational control device for an aircraft piloting device with two connected piloting members, includes electronic circuits for main monitoring from signals delivered by sensors associated with one of the piloting members, and at least one electronic circuit (52 to 55) for cross-monitoring, for digital processing of signals delivered by sensors (83, 93) associated with the other piloting member, adapted to detect any deviation of these signals corresponding to a fault and to generate a signal representing such a fault. A piloting device and an aircraft including such an electronic operational control device with cross-monitoring are also disclosed.
US08659255B2 Robot confinement
A robot confinement system includes a portable housing and a mobile robot. The portable housing includes a first detector operable to detect a presence of the mobile robot in a field of detection, and an emitter operable to emit a first signal when the first detector detects the presence of the mobile robot in the field of detection. The mobile robot is operable to move on a surface to clean the surface and includes a controller operable to control a movement path of the mobile robot on the surface. The mobile robot further includes a second detector operable to detect the first signal emitted by the portable housing. The controller of the mobile robot is operable to change the movement path of the mobile robot in response to detection of the first signal.
US08659250B2 Management apparatus of a rotating motor and an annexed load during power loss
A management apparatus is described of a rotating motor and a load during power loss; the apparatus comprises a first switching circuit coupled with the rotating motor and a controller of said first switching circuit. The controller is configured to drive the first switching circuit so as to convert a back-electromotive force voltage developed in the rotating motor into a power supply voltage for the load. The first switching circuit is driven in accordance with a first duty cycle. The apparatus comprises a second switching circuit coupled with the load and driven in accordance with a second duty cycle. The controller is configured to vary said first and said second duty cycles to keep the power supply voltage for the load above or equal to a threshold voltage.
US08659248B2 Drive device for electric power conversion circuit
A drive device has a break circuit. The break circuit inputs phase-current values transferred from phase-current sensors mounted on an electrical path of a motor generator. A power switching element is equipped with a freewheel diode connected in parallel with each other. An inverter has pairs of the power switching elements. In each pair, the power switching element in a high voltage side and the power switching element in a low voltage side are connected in series. It is detected for the freewheel diode to be in a freewheel mode when a forward current flows in the freewheel diode. The break circuit detects the freewheel mode where the current flows in the freewheel diode in a lower arm when the phase-current value is not less than a predetermined threshold value. The break circuit detects the freewheel mode where the current flows in the freewheel diode in an upper arm when the phase-current value is not more than the threshold current value.
US08659246B2 High efficiency roller shade
A motorized roller shade is provided. The motorized roller shade includes a shade tube in which a motor unit, a controller unit and a power supply unit are disposed. The controller unit includes a controller to control the motor. The power supply unit includes at least one bearing rotatably coupled to a support shaft. The motor unit includes at least one bearing, rotatably coupled to another support shaft, a DC gear motor and a counterbalancing device. The output shaft of the DC gear motor is coupled to the support shaft such that the output shaft and the support shaft do not rotate when the support shaft is attached to a mounting bracket.
US08659245B2 Active vibration control apparatus
An active vibration control apparatus includes a linear actuator and a controller. The linear actuator includes a moving element, a stator and an elastic support. The stator has a plurality of coils surrounding the moving element. The elastic support supports the moving element to be reciprocally movable relative to the stator in an axial direction of the moving element due to elastic deformation of the elastic support. The controller is configured to apply an alternating current to the stator to generate vibration due to relative displacement of the moving element and the stator in the axial direction. The controller is configured to correct a center position of an amplitude of the vibration by additionally applying a predetermined direct current as a biased current to the stator when the linear actuator satisfies a predetermined vibration condition.
US08659244B2 Variable speed switch and electric power tool with the variable speed switch mounted thereto
A variable speed switch includes a switch main body portion which is accommodated in a housing of an electric power tool and mounted to the housing so as to be capable of relative movement, and a load sensor which is provided in the switch main body portion and capable of outputting an electric signal in proportion to the amount of distortion caused by a pressing force. The switch operating portion is mounted on the surface of the housing so as to be capable of relative displacement with respect to the housing and transmits a pressing force applied to the switch operating portion to the load sensor, with the maximum displacement amount of the switch operating portion being set to equal to or less than 5 mm.
US08659237B2 Hybrid power control system
A hybrid power control system for providing dynamic power control to illumination systems in which a power source can supply any one of a range of AC or DC voltages. One or more switch mode power supplies incorporating one or more linear and switch mode regulator circuits combined to dynamically control current, voltage and power to the illumination system. A microprocessor or other integrated circuit device to receive and send control information in order to regulate the power to a light emitting device One or more output drive stage(s) capable of delivering a wide dynamic current range, channel bonding and protection circuitry compatible with standard or common anode illumination systems.
US08659236B2 Circuit arrangement and method for driving an electrical load
A circuit arrangement for driving an electrical load comprises a connection node (LED) for connecting the electrical load and a control device (Ctrl) that is coupled to the connection node (LED) to drive the electrical load. A detection circuit (Det) is coupled to the connection node (LED) for detecting a trigger signal (trig) at the connection node (LED) and coupled to the control device (Ctrl) via a measurement channel (Mes).
US08659235B2 Process and circuitry for controlling a load
A current source and an associated method for supplying current to a load such as an arrangement of LEDs. The intensity of the supplied current varies as a function of the temperature of the load. The intensity of the current is temperature-dependent and limited to a predefined maximum. The temperature dependence is achieved by the component parts that are used without the help of special temperature sensors. The current source is supplied with a reference voltage derived from an integrated circuit. The reference voltage is tapped from a port of the IC and therefore it is switchable. The reference voltage is used to produce a control current, which is fed through a driver stage to produce the current of the current source. Elements in the current source limit the current's intensity and change it as a function of temperature.
US08659231B2 Electronic ballast and method for operation of at least one discharge lamp
Various embodiments provide an electronic ballast for operation of at least one discharge lamp, with the electronic ballast having an apparatus for power factor correction with a voltage converter. The voltage converter itself includes an inductance, a diode and a switch. A control apparatus, which produces a square-wave signal as a control signal to the switch of the apparatus for power factor correction, includes an I regulator. This produces a first component of the on time of the control signal. In order to react to short-term power demands in the load circuit for example on ignition of the discharge lamp, an electronic ballast furthermore may include a power determining apparatus, which is coupled to the control apparatus, with the control apparatus being designed to vary the control signal as a function of the power consumed in the discharge lamp.
US08659230B2 Illumination control system
An illumination control system includes: illumination apparatuses having respective addresses and perform a dimming control in response to a dimming signal inputted from an outside, and an illumination control terminal which has an imaging device, a capturing range of which is set to include illumination ranges of the illumination apparatuses. The illumination control terminal segments an image captured by the imaging device into a plurality of areas so that the areas correspond to the illumination ranges, detects a person based on the captured image, determines a segmented area in which the person is present if the person has been detected and performs dimming control on an illumination apparatus corresponding to the determined segmented area.
US08659229B2 Plasma attenuation for uniformity control
A plasma processing apparatus and method are disclosed which create a uniform plasma within an enclosure. In one embodiment, a conductive or ferrite material is used to influence a section of the antenna, where a section is made up of portions of multiple coiled segments. In another embodiment, a ferrite material is used to influence a portion of the antenna. In another embodiment, plasma uniformity is improved by modifying the internal shape and volume of the enclosure.
US08659228B2 LED ballast mount
An LED ballast mount preferably includes a housing assembly having sidewalls including a housing LED side wall and a housing opposite side wall. A rechargeable battery is installed in a battery assembly and the battery assembly includes a battery housing mounted to the housing LED side wall. A first LED lamp is mounted on a lower face of the battery housing. A first fluorescent lamp socket mounted on a ballast socket face of the battery housing. A second fluorescent lamp socket mounted on the ballast socket face of the battery housing. A bridge housing including an electronic ballast mounted within the bridge housing. Fluorescent tubes may be mounted in the device.
US08659223B2 Light emitting diode display
An organic light emitting diode (OLED) display is disclosed. In one embodiment, the OLED display includes i) a display substrate, ii) an OLED array, iii) an encapsulation substrate arranged opposite to the display substrate with respect to the OLED array, iv) a sealing member configured to seal the display substrate and the encapsulation substrate and v) a filler applied in a space formed between the display substrate and the encapsulation substrate. In one embodiment, the height of the filler is more than about 1.2 times the height of the OLED array.
US08659215B2 Motor
According to one embodiment, a motor has a cylindrical stator core and rotor. A first framework is fixed to a side of the stator core in an axial direction, and a first bearing housing is fixed to the outside of the first framework. A second framework is fixed to the other side of the stator core. A second bearing housing is fixed to the outside of the second framework. The rotor has a rotational shaft, supported by the bearings, extending into the frameworks. A rotor core is attached to the shaft. Support bases are fixed to the rotor, and are interposed by the rotor core. A locking member coupled to the first framework is configured to contact the first support base. A locking member coupled to the second framework is configured to contact the second support base. The rotor is fixed by the locking members contact with the support bases.
US08659214B2 Piezoelectric actuator including double PZT piezoelectric layers with different permitivities and its manufacturing method
In a piezoelectric actuator including a lower electrode layer, a first PZT piezoelectric layer having a first relative permittivity is formed on the lower electrode layer, and a second PZT piezoelectric layer having a second relative permittivity smaller than said first relative permittivity is formed on the first PZT piezoelectric layer.
US08659212B2 Ultrasound transducer and method for manufacturing an ultrasound transducer
An ultrasound transducer includes an array of acoustic elements, an integrated circuit, and an interposer. The interposer includes conductive elements that electrically connect the array of acoustic elements to the integrated circuit. An electrically conductive adhesive is engaged with the conductive elements of the interposer to electrically connect the interposer to at least one of the integrated circuit or the array of acoustic elements. The electrically conductive adhesive is anisotropically conductive.
US08659211B1 Quad and dual cantilever transduction apparatus
An electro-mechanical transducer is disclosed, which provides a very low frequency wide band response from a bender (or benders) using piezoelectric cantilevers or center mounted free edge disc, providing additive output between the resonant frequencies achieving this response at great depths under equivalent free flooded conditions with additionally improved response with silicone rubber to reduce the acoustic cancellation associated with the dipole mode of vibration of the bender.
US08659203B2 Induction motor, compressor and refrigerating cycle apparatus
The efficiency of an induction motor is improved while suppressing the generation of magnetic flux saturation of a rotor core. In an induction motor, “a magnetic path width of a rotor” which is the product of a circumferential width of a rotor tooth formed in the rotor and the number of rotor teeth is equal to or larger than “a magnetic path width of a stator” which is the product of a circumferential width of a stator tooth formed in the stator and the number of stator teeth.
US08659194B2 Motor drive apparatus
A motor drive apparatus includes a motor; and an ECU. The ECU includes an ECU housing. The ECU housing includes a heat sink having a module receiving portion. The module receiving portion includes a heat-receiving surface and an opening portion open to one-end side of the ECU housing. The ECU further includes a control substrate received by the ECU housing to be perpendicular to the heat-receiving surface and to face the motor; a plurality of semiconductor modules each received in the module receiving portion and connected electrically with the control substrate to control a power supply of the motor. Each of the plurality of semiconductor modules includes a heat-radiating surface at an outer portion thereof. The ECU further includes a module retaining section pressing the heat-radiating surface to the heat-receiving surface to retain each of the plurality of semiconductor modules in the module receiving portion.
US08659190B2 Electric machine cooling system and method
Embodiments of the invention provide an electric machine module including a housing defining a machine cavity. In some embodiments, an electric machine can be positioned within the machine cavity and include a rotor hub coupled to rotor laminations. The rotor hub can include first and second axial ends and the rotor laminations can include a recess. In some embodiments, the recesses can be aligned to define a portion of a plurality of coolant channels that can be in fluid communication with the machine cavity. In some embodiments, the rotor hub can include first and second rotor hub inlets in fluid communication with at least a portion of the coolant channels. The first and the second rotor hub inlets can be adjacent to the axial ends of the rotor hub. In some embodiments, the coolant channels are in fluid communication with the rotor hub inlets are not the same coolant channels.
US08659189B2 Control system for a material handling application
A distributed control system is provided having a plurality of control modules operative to control one or more output devices. A control module includes a first enclosure that houses a plurality of control terminals and a second enclosure that houses a controller for controlling an output device. A maximum voltage of the first enclosure is less than a threshold voltage level, and a maximum voltage of the second enclosure is greater than the threshold voltage level. A safety circuit of the control system includes a plurality of circuit segments connected in a series configuration to the control modules.
US08659188B2 Distributed power harvesting systems using DC power sources
A method for maintaining reliability of a distributed power system including a power converter having input terminals and output terminals. Input power is received at the input terminals. The input power is converted to an output power at the output terminals. A temperature is measured in or in the environment of the power converter. The power conversion of the input power to the output power may be controlled to maximize the input power by setting at the input terminals the input voltage or the input current according to predetermined criteria. One of the predetermined criteria is configured to reduce the input power based on the temperature signal responsive to the temperature. The adjustment of input power reduces the input voltage and/or input current thereby lowering the temperature of the power converter.
US08659186B2 Methods and systems for controlling a power conversion system
A power conversion system is described. The power conversion system includes a first power converter coupled to an electrical grid at a first point of interconnection (POI), a first processing device coupled to the first power converter and configured to control operation of the first power converter, and a first power measurement device coupled to the first processing device and configured to collect data associated with power output of the first power converter. The power conversion system also includes a first global positioning system (GPS) receiver coupled to the first processing device and configured to receive location information corresponding to a location of the first power converter and temporal information corresponding to a time at the location.
US08659184B2 Method and apparatus for powering an appliance
A battery operated vacuum cleaner is provided with one or more principal batteries and one or more supplemental batteries. The batteries and a controller are configured such that as the power provided by the principal batteries drops, one or more of the supplemental batteries is operative connected to provide power to the appliance. A method for providing a substantially constant level of power to an appliance, such as a vacuum cleaner, using a plurality of power sources comprises providing power from a principal power source connected to the appliance; monitoring an operating voltage supplied to the appliance to detect if the operating voltage is below a predetermined threshold voltage level; and upon detecting that the operating voltage is below the predetermined threshold voltage level, providing power from k of n supplemental power sources connected to the appliance, where k and n are positive integers, and k is less than or equal to n. Optionally, upon detecting that the operating voltage is below the predetermined threshold voltage level and where k is equal to n, the principal and supplemental power sources are disengaged from the appliance.
US08659182B2 Power supply system and electric powered vehicle including power supply system, and method for controlling power supply system
Converters are configured to operate in a normal operation to convert the electric power that is input/output to/from secondary batteries bidirectionally to direct current voltage. In a predetermined mode allowing the secondary batteries to be charged, at least one of the converters does not perform a switching operation and holds on an upper arm element to avoid a switching loss in charging the secondary batteries. An electric power loss caused at the converters in charging the secondary batteries can be reduced, and charging efficiency can be enhanced.
US08659181B2 Power line communication method for transmitting data signal with splitting of power transmission interval
A power line communication method is provided, which divides the entire interval for transmitting power and data signals into a power transmission interval and a data transmission interval, and carries one or a plurality of data signals at the data transmission interval in the divided intervals.
US08659180B2 Power generation apparatus
A marine power generation apparatus is provided for generating power from an ocean current. The apparatus includes a turbine operable to generate power when within an ocean current. The turbine includes a pair of turbine blade assemblies each having a hub, a set of turbine spokes, stays or blades extending radially from the hub; and a circumferential ring extending around and connected to an outer periphery of the set of turbine spokes, stays or blades. The pair of turbine blade assemblies is mounted for same-direction rotation when placed in an ocean current and each being coupled with a common turbine shaft or a turbine shaft assembly. In addition, the turbine shaft is coupled along a shared axis with a rotor or an electrical generator. Means is also provided for anchoring the power generation means relative to a floor of the ocean and in alignment with the ocean current.
US08659177B2 Motive power regeneration system for working machine
A motive power regeneration apparatus for a working machine includes a regeneration circuit that is connected to a hydraulic line through which a returning fluid of a boom cylinder is distributed during a boom lowering operation. Also included are a hydraulic motor connected to a generator, a flow regulating circuit that is connected to the hydraulic line and provided with a control valve, an inverter that controls the flow rate on the regeneration circuit in accordance with a first flow rate setting which varies with the operation amount of an operating apparatus, and a control valve and a proportional valve that control the flow rate on the flow regulating circuit in accordance with a second flow rate setting which varies with the operation amount of the operating apparatus. Therefore, the motive power regeneration apparatus is capable of making an operator constantly feel comfortable with the working machine operations.
US08659176B2 Electromagnetic energy harvester and a door latch release mechanism as an energy source for the harvester
A system for electromagnetically harvesting waste kinetic energy. A wound electrical coil having a hollow bobbin abuts an opening in ring magnet. An actuator plunger extends through the opening. Fixed magnets are located at the opposite end of the bobbin. Floating magnets are disposed within the bobbin, arranged with their magnetic field opposing that of the fixed magnets but not that of the ring magnet. Axial force on the actuator plunger moves the floating magnets toward the fixed magnets. When the actuator is released, the floating magnets are repelled by the fixed magnets and attracted by the ring magnet, causing the floating magnets to pass rapidly through the coil, thereby generating an electric current in the coil. In one application, the harvester is actuated by a keeper in a door latch release mechanism. In a second application the harvester is actuated by a latch bolt of a lock set.
US08659175B2 Integrated circuit package system with offset stack
An integrated circuit package system is provided including mounting a first integrated circuit device over a carrier, mounting a second integrated circuit device having an adhesive spacer over the first integrated circuit device in an offset configuration, connecting a first internal interconnect between the carrier and the first integrated circuit device with the first internal interconnect within the adhesive spacer, connecting a second internal interconnect between the carrier and the second integrated circuit device, and encapsulating the first integrated circuit device, the second integrated circuit device, the first internal interconnect and the second internal interconnect.
US08659174B2 Semiconductor device
There is provided a semiconductor device with which stress can be prevented from locally concentrating on an external connecting terminal on a post and thus damages of the external connecting terminal can be prevented. The semiconductor device includes a semiconductor chip, a sealing resin layer stacked on a surface of the semiconductor chip, and the post which penetrates the sealing resin layer in a stacking direction of the semiconductor chip and the sealing resin layer, protrudes from the sealing resin layer, and has a periphery of the protruding portion opposedly in contact with a surface of the sealing resin layer in the stacking direction.
US08659173B1 Isolated wire structures with reduced stress, methods of manufacturing and design structures
An integrated circuit (IC) including a set of isolated wire structures disposed within a layer of the IC, methods of manufacturing the same and design structures are disclosed. The method includes forming adjacent wiring structures on a same level, with a space therebetween. The method further includes forming a capping layer over the adjacent wiring structures on the same level, including on a surface of a material between the adjacent wiring structures. The method further includes forming a photosensitive material over the capping layer. The method further includes forming an opening in the photosensitive material between the adjacent wiring structures to expose the capping layer. The method further includes removing the exposed capping layer.
US08659172B2 Semiconductor device and method of confining conductive bump material with solder mask patch
A semiconductor device has a semiconductor die having a plurality of die bump pad and substrate having a plurality of conductive trace with an interconnect site. A solder mask patch is formed interstitially between the die bump pads or interconnect sites. A conductive bump material is deposited on the interconnect sites or die bump pads. The semiconductor die is mounted to the substrate so that the conductive bump material is disposed between the die bump pads and interconnect sites. The conductive bump material is reflowed without a solder mask around the die bump pad or interconnect site to form an interconnect structure between the semiconductor die and substrate. The solder mask patch confines the conductive bump material within the die bump pad or interconnect site. The interconnect structure can include a fusible portion and non-fusible portion. An encapsulant is deposited between the semiconductor die and substrate.
US08659171B2 Patch on interposer assembly and structures formed thereby
Methods of forming microelectronic structures are described. Embodiments of those methods include attaching a patch structure to an interposer by thermal compression bonding, forming an underfill around an array of interconnect structures disposed on a top surface of the interposer, curing the underfill, and then attaching a die to the patch structure.
US08659170B2 Semiconductor device having conductive pads and a method of manufacturing the same
A semiconductor device includes at least two conductive pads, one of the conductive pads being formed above another of the at least two conductive pads, and a redistribution layer extending from at least one of the conductive pads. The semiconductor device also includes a bump structure formed over the conductive pads and electrically coupled to the conductive pads.
US08659166B2 Memory device, laminated semiconductor substrate and method of manufacturing the same
A memory device has a laminated chip package and a controller chip. In the laminated chip package, a plurality of memory chips are laminated. An interposed chip is laminated between the laminated chip package and the controller chip. The memory chips have a plurality of first wiring electrodes. The interposed chip has a plurality of second wiring electrodes. The second wiring electrodes are formed with a common arrangement pattern common with an arrangement pattern of a plurality of wiring electrodes for controller which are formed in the controller chip. The controller chip is laid on the interposed chip.
US08659162B2 Semiconductor device having an interconnect structure with TSV using encapsulant for structural support
A semiconductor device includes a substrate and a via extending through the substrate. A first insulating layer is disposed on sidewalls of the via. An electrically conductive material is disposed in the via over the first insulating layer to form a TSV. A first interconnect structure is disposed over a first side of the substrate. A semiconductor die or a component is mounted to the first interconnect structure. An encapsulant is disposed over the first interconnect structure and semiconductor die or component. A second interconnect structure is disposed over the second side of the substrate. The second interconnect structure is electrically connected to the TSV. The second interconnect structure includes a second insulating layer disposed over the second surface of the substrate and TSV, and a first conductive layer disposed over the TSV and in contact with the TSV through the second insulating layer.
US08659158B2 Thermally inkjettable acrylic dielectric ink formulation and process
An aqueous composition for forming a micro-fluid jet printable dielectric film layer, methods for forming dielectric film layers, and dielectric film layers formed by the method. The aqueous composition includes from about 5 to about 20 percent by weight of a polymeric binder emulsion, from about 10 to about 30 percent by weight of a humectant, from about 0 to about 3 percent by weight of a surfactant, and an aqueous carrier fluid. The aqueous composition has a viscosity ranging from about 2 to about 6 centipoise at a temperature of about 23° C.
US08659155B2 Mechanisms for forming copper pillar bumps
The mechanism of forming a metal bump structure described above resolves the delamination issues between a conductive layer on a substrate and a metal bump connected to the conductive layer. The conductive layer can be a metal pad, a post passivation interconnect (PPI) layer, or a top metal layer. By performing an in-situ deposition of a protective conductive layer over the conductive layer (or base conductive layer), the under bump metallurgy (UBM) layer of the metal bump adheres better to the conductive layer and reduces the occurrence of interfacial delamination. In some embodiments, a copper diffusion barrier sub-layer in the UBM layer can be removed. In some other embodiments, the UBM layer is not needed if the metal bump is deposited by a non-plating process and the metal bump is not made of copper.
US08659153B2 Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods
Methods of fabricating interconnect structures for semiconductor dice comprise forming conductive elements in contact with bond pads on an active surface over a full pillar diameter of the conductive elements, followed by application of a photodefinable material comprising a photoresist to the active surface and over the conductive elements. The polymide material is selectively exposed and developed to remove photodefinable material covering at least tops of the conductive elements. Semiconductor dice and semiconductor die assemblies are also disclosed.
US08659152B2 Semiconductor device
A semiconductor device includes a semiconductor substrate having a first surface, a through silicon via (TSV) that is formed so that at least a part thereof penetrates through the semiconductor substrate, and an insulation ring. The insulation ring is formed so as to penetrate through the semiconductor substrate and so as to surround the TSV. The insulation ring includes a tapered portion and a vertical portion. The tapered portion has a sectional area which is gradually decreased from the first surface toward a thickness direction of the semiconductor substrate. The vertical portion has a constant sectional area smaller than the tapered portion.
US08659149B2 Semiconductor structure with galvanic isolation
Galvanic isolation between a high-voltage die and a low-voltage die in a multi-die chip is provided by a galvanic isolation die that physically supports the high-voltage die and the low-voltage die, and provides capacitive structures with high breakdown voltages that allow the high-voltage die to capacitively communicate with the low-voltage die.
US08659148B2 Tileable sensor array
A method for forming a tileable detector array is presented. The method includes forming a detector module, where forming the detector module includes providing a sensor array having a first side and a second side, where the sensor array includes a first plurality of contact pads disposed on the second side of the sensor array, disposing the sensor array on an interconnect layer, where the interconnect layer includes a redistribution layer having a first side and a second side, where the redistribution layer includes a second plurality of contact pads disposed on the first side, an integrated circuit having a plurality of through vias disposed therethrough, where a first side of the integrated circuit is operationally coupled to the second side of the redistribution layer, where the sensor array is disposed on the interconnect layer such that the first plurality of contact pads on the second side of the sensor array are aligned with the second plurality of contact pads on the first side of the redistribution layer, operationally coupling the first plurality of contact pads on the second side of the sensor array to the second plurality of contact pads on the redistribution layer to form a sensor stack, coupling the sensor stack to a substrate to form the detector module, and tiling a plurality of detector modules on a second substrate to form the tileable detector array.
US08659147B2 Power semiconductor circuit device and method for manufacturing the same
A power semiconductor circuit device and a method for manufacturing the same, both of which are provided with: a base board on which at least a power semiconductor element is mounted; a resin which molds the base board and the power semiconductor element in a state where partial surfaces of the base board, including a base board surface opposite to a surface on which the power semiconductor element is mounted, are exposed; and a heat dissipating fin joined to the base board by a pressing force. A groove is formed in the base board at a portion to be joined to the heat dissipating fin, and the heat dissipating fin is joined by caulking to the groove.
US08659142B2 Stub minimization for wirebond assemblies without windows
A microelectronic assembly can include a circuit panel having first and second surfaces and panel contacts at each surface, and first and second microelectronic packages having terminals mounted to the panel contacts at the first and second surfaces, respectively. The circuit panel can electrically interconnect terminals of the first package with corresponding terminals of the second package. Each package can include a substrate having first and second surfaces, a microelectronic element, conductive structure extending above a front face of the microelectronic element, and parallel columns of terminals at the second surface. The terminals of each package can include first terminals in a central region of the respective second surface and configured to carry address information usable by circuitry within the package to determine an addressable memory location within the respective microelectronic element. Each central region can have a width within three and one-half times a minimum pitch between adjacent terminals.
US08659141B2 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face facing away from a substrate of the package, and electrically connected with the substrate through conductive structure extending above the front face. First terminals provided in first and second parallel grids or in first and second individual columns can be configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid can have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.
US08659134B2 Multi-chip package and manufacturing method
Manufacturing method and a multi-chip package, which comprises a conductor pattern (1) and insulation (2), and, inside the insulation, a first component (3), the contact terminals (4) of which face towards the conductor pattern (1) and are conductively connected to the conductor pattern (1). The multi-chip package also comprises inside the insulation (2) a second semiconductor chip (13), the contact terminals (14) of which face towards the same conductor pattern (1) and are conductively connected through contact elements (15) to this conductor pattern (1). The semiconductor chips are located in such a way that the first semiconductor chip (3) is located between the second semiconductor chip (13) and the conductor pattern (1).
US08659133B2 Etched surface mount islands in a leadframe package
A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.
US08659132B2 Microelectronic package assembly, method for disconnecting a microelectronic package
A microelectronic package assembly comprises a lead frame having a holding bar (16) and a microelectronic package (14). The microelectronic package (14) comprises a package body (22) and a connecting element (24) for connecting the package body (22) to the holding bar (16) of the lead frame (12). The connecting element (24) extends from an outer surface (26) of the package body (22) and is engaged with an ending part (28) of the holding bar (16).
US08659125B2 Chipset package structure
A chipset package structure includes a carrier, a plurality of pinouts, at least one semiconductor package preforms, at least one electromagnetic shielding layer and a protective layer. The pinouts are disposed on the carrier. The semiconductor package preforms is disposed on the second surface of the carrier and electrically connected to the pinouts. The electromagnetic shielding layer is disposed on the semiconductor package preforms and the electromagnetic shielding layer. At least one of the electromagnetic shielding layers comprises a carbon nanotube film structure. The protective layer covers the electromagnetic shielding layer.
US08659124B2 Physical structure for use in a physical unclonable function
The invention relates to a semiconductor device comprising a physical structure (50) for use in a physical unclonable function, wherein the physical structure (50) comprises a lead-zirconium titanate layer (25), and a silicon-comprising dielectric layer (27) deposited on the lead-zirconium-titanate layer (25), wherein the silicon-comprising dielectric layer (27) has a rough surface (SR), the physical structure (50) further comprising a conductive layer (30) provided on the rough surface (SR) of the silicon-comprising dielectric layer (27). The invention further relates to a method of manufacturing such semiconductor device. The invention also relates to a card, such as a smartcard, and to a RFID tag comprising such semiconductor device. The inventors have found that depositing of a silicon- comprising dielectric layer (27) on a lead-zirconium titanate layer (25) using vapor deposition results in a silicon-comprising dielectric layer (27) having a rough surface (SR). This rough surface (SR) can be used in a PUF to make a resistor (R) with a variable random value by depositing a conductive layer (30) on the rough surface (SR). Alternatively, the combination of both layers (25, 27) can be used in a PUF as composite dielectric to make a capacitor (C) with a variable random capacitance value.
US08659121B2 Semiconductor devices with orientation-free decoupling capacitors and methods of manufacture thereof
Semiconductor devices with orientation-free decoupling capacitors and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes at least one integrated circuit and at least one decoupling capacitor. The at least one decoupling capacitor is oriented in a different direction than the at least one integrated circuit is oriented.
US08659119B2 Electronic components on trenched substrates and method of forming same
An electronic module including a substrate having at least one structure that reduces stress flow through the substrate, wherein the structure comprises at least one trench in a surface of the substrate.
US08659113B2 Embedded semiconductor die package and method of making the same using metal frame carrier
An embedded semiconductor die package is made by mounting a frame carrier to a temporary carrier with an adhesive. The frame carrier includes die mounting sites each including a leadframe interconnect structure around a cavity. A semiconductor die is disposed in each cavity. An encapsulant is deposited in the cavity over the die. A package interconnect structure is formed over the leadframe interconnect structure and encapsulant. The package interconnect structure and leadframe interconnect structure are electrically connected to the die. The frame carrier is singulated into individual embedded die packages. The semiconductor die can be vertically stacked or placed side-by-side within the cavity. The embedded die packages can be stacked and electrically interconnected through the leadframe interconnect structure. A semiconductor device can be mounted to the embedded die package and electrically connected to the die through the leadframe interconnect structure.
US08659109B2 Image sensor photodiode
An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.
US08659107B2 Radiation receiver and method of producing a radiation receiver
A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.
US08659102B2 Nonvolatile magnetic memory device
A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure.
US08659099B2 Method for manufacturing a micromechanical structure, and micromechanical structure
A method for manufacturing a micromechanical structure includes: forming a first insulation layer above a substrate; forming a first micromechanical functional layer on the first insulation layer; forming multiple first trenches in the first micromechanical functional layer, which trenches extend as far as the first insulation layer; forming a second insulation layer on the first micromechanical functional layer, which second insulation layer fills up the first trenches; forming etch accesses in the second insulation layer, which etch accesses locally expose the first micromechanical functional layer; and etching the first micromechanical functional layer through the etch accesses, the filled first trenches and the first insulation layer acting as an etch stop.
US08659094B2 Array substrate for liquid crystal display device and method of fabricating the same
An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.
US08659086B2 ESD protection for bipolar-CMOS-DMOS integrated circuit devices
An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
US08659084B1 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices
In one aspect, a CMOS device is provided. The CMOS device includes a SOI wafer having a SOI layer over a BOX; one or more active areas formed in the SOI layer in which one or more FET devices are formed, each of the FET devices having an interfacial oxide on the SOI layer and a gate stack on the interfacial oxide layer, the gate stack having (i) a conformal gate dielectric layer present on a top and sides of the gate stack, (ii) a conformal gate metal layer lining the gate dielectric layer, and (iii) a conformal workfunction setting metal layer lining the conformal gate metal layer. A volume of the conformal gate metal layer and/or a volume of the conformal workfunction setting metal layer present in the gate stack are/is proportional to a length of the gate stack.
US08659079B2 Transistor device and method for manufacturing the same
Provided is a transistor device including at least a vertical transistor structure. The vertical transistor structure includes a substrate, a dielectric layer, a gate, a first doped region, a second doped region, a third doped region, and a fourth doped region. The dielectric layer is disposed in a trench of the substrate. The gate is disposed in the dielectric layer. The gate defines, at both sides thereof, a first channel region and a second channel region in the substrate. The first doped region and the third doped region are disposed in the substrate and located below the first channel region and the second channel region, respectively. The second doped region and the fourth doped region are disposed in the substrate and located above the first channel region and the second channel region, respectively.
US08659078B2 Semiconductor device and method of manufacturing the same
A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
US08659076B2 Semiconductor device structures and related processes
Improved highly reliable power RFP structures and fabrication and operation processes. The structure includes plurality of localized dopant concentrated zones beneath the trenches of RFPs, either floating or extending and merging with the body layer of the MOSFET or connecting with the source layer through a region of vertical doped region. This local dopant zone decreases the minority carrier injection efficiency of the body diode of the device and alters the electric field distribution during the body diode reverse recovery.
US08659070B2 Semiconductor memory device and manufacturing method thereof
The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line.
US08659066B2 Integrated circuit with a thin body field effect transistor and capacitor
An integrated circuit includes a transistor and a capacitor. The transistor includes a first semiconductor layer and a gate stack located on the first semiconductor layer. The gate stack includes a metal layer and a first high-k dielectric layer. A gate spacer is located on sidewalls of the gate stack. The first high-k dielectric layer is located between the first semiconductor layer and the metal layer and between the gate spacer and sidewalls of the metal layer. A first silicide region is located on a first source/drain region. A second silicide region is located on a second source/drain region. The capacitor includes a first terminal that comprises a third silicide region located on a portion of the second semiconductor. A second high-k dielectric layer is located on the silicide region. A second terminal comprises a metal layer that is located on the second high-k dielectric layer.
US08659060B2 Solid-state imaging device and manufacturing method thereof
According to one embodiment, a solid-state imaging device includes a semiconductor layer including first and second regions, a pixel portion provided in the first region, electrodes provided in the second region and configured to penetrate the semiconductor layer, and a guard ring provided in the second region and configured to penetrate the semiconductor layer and electrically isolate the pixel portion from the electrodes. An upper surface of the semiconductor layer in the second region is lower than an upper surface of the semiconductor layer in the first region.
US08659058B2 Methods of forming nickel sulphide film on a semiconductor device
Embodiments of the present invention describe a method of forming nickel sulfide layer on a semiconductor device. A nickel sulfide layer is formed on a substrate by alternatingly exposing the substrate to a nickel-containing precursor and a sulfur-containing precursor.
US08659057B2 Self-aligned semiconductor devices with reduced gate-source leakage under reverse bias and methods of making
A vertical junction field effect transistor (VJFET) having a self-aligned pin, a p+/n/n+ or a p+/p/n+ gate-source junction is described. The device gate can be self-aligned to within 0.5 μm to the source in order to maintain good high voltage performance (i.e. low DIBL) while reducing gate-source junction leakage under reverse bias. The device can be a wide-bandgap semiconductor device such as a SiC vertical channel junction field effect. Methods of making the device are also described.
US08659052B2 Semiconductor device and method for manufacturing the same
A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. The diode region includes a first layer embedded in a diode trench reaching a diode drift layer from an upper surface side of the semiconductor substrate, and a second layer which is buried in the first layer and which has a lower end located deeper than a boundary between a diode body layer and the diode drift layer. The second layer pressures the first layer in a direction from inside to outside of the diode trench. A lifetime control region is formed in the diode drift layer at least at the depth of the lower end of the second layer, and a crystal defect density inside the lifetime control region is higher than a crystal defect density outside the lifetime control region.
US08659047B2 Light emitting device and manufacturing method thereof
A light emitting device includes a substrate having an element mounting area in a principal surface thereof. The light emitting device also includes at least one light emitting element mounted in the element mounting area of the substrate. The light emitting device also includes a heat transfer member provided on the substrate. The heat transfer member has a thermal conductivity different from thermal conductivity of the substrate so as to form uneven thermal resistance distribution in the element mounting area. Thermal resistance in a heat radiation path through the substrate for release of heat emitted from the light emitting element changes with the mounting position of the light emitting element.
US08659041B2 Nitride semiconductor light emitting diode
A nitride semiconductor light emitting diode includes at least an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer. The active layer is formed of one first nitride semiconductor layer having a highest In ratio in the light emitting diode. The light emitting diode further includes at least one of a second nitride semiconductor layer located between the active layer and the n-type nitride semiconductor layer and including an InGaN layer, and a third nitride semiconductor layer located between the active layer and the p-type nitride semiconductor layer and including an InGaN layer. Respective In (Indium) ratios of the InGaN layers included in the second nitride semiconductor layer and the InGaN layers included in the third nitride semiconductor layer are lower than the In ratio of the first nitride semiconductor layer forming the active layer. The LED with high luminous efficiency can thus be provided.
US08659039B2 Semiconductor light emitting diode
A highly-efficient semiconductor light emitting diode with improved light extraction efficiency comprising at least a substrate having a plurality of crystal planes, a first conductivity-type barrier layer, an active layer serving as a light emitting layer and a second conductivity-type barrier layer stacked on the substrate. The semiconductor light emitting diode comprises a ridge structure configured from one flat surface and at least two inclining surfaces in the in-plane direction. The width (W) of the flat surface of the ridge structure is 2λ (λ: light emission wavelength) or less. The active layer is positioned in the laminating direction so that the shortest length (L) between two points is λ (light emission wavelength) or less, wherewith the first point is the shortest point where the light emitted from the center (C) of the active layer begins total internal reflection at the interface between the inclining surfaces of the ridge structure and air, and the second point is a point where the flat surface begins.
US08659035B2 Light-emitting device, light-emitting device array, optical recording head, image forming apparatus, and method of manufacturing light-emitting device
Provided is a light-emitting device including a semiconductor substrate of a first conductivity type, a semiconductor multilayer reflection mirror of the first conductivity type, formed on the semiconductor substrate, a first semiconductor layer of the first conductivity type, formed on the semiconductor multilayer reflection mirror, a second semiconductor layer of a second conductivity type, formed on the first semiconductor layer, a third semiconductor layer of the first conductivity type, formed on the second semiconductor layer, a fourth semiconductor layer of the second conductivity type, formed on the third semiconductor layer, a first electrode formed on a rear surface of the semiconductor substrate, and a second electrode formed on the fourth semiconductor layer, wherein the semiconductor multilayer reflection mirror includes a first selectively oxidized region and a first conductive region adjacent to the first oxidized region, and the first conductive region electrically connects the semiconductor substrate and the first semiconductor layer.
US08659027B2 Semiconductor device and electronic device
A voltage equal to the threshold value of a TFT (106) is held in capacitor unit (109). When a video signal is inputted from a source signal line, the voltage held in the capacitor unit is added thereto and a resultant signal is applied to a gate electrode of the TFT (106). Even when a threshold value is varied for each pixel, each threshold value is held in the capacitor unit (109) for each pixel. Thus, the influence of a variation in threshold value can be eliminated. Further, holding of the threshold value is conducted by only the capacitor unit (109) and a charge does not move at writing of a video signal so that a voltage between both electrodes is not changed. Thus, it is not influenced by a variation in capacitance value.
US08659022B2 Hybrid silicon wafer
A hybrid silicon wafer which is a silicon wafer having a structure wherein monocrystalline silicon is embedded in polycrystalline silicon that is prepared by the unidirectional solidification/melting method. The longitudinal plane of crystal grains of the polycrystalline portion prepared by the unidirectional solidification/melting method is used as the wafer plane, and the monocrystalline silicon is embedded so that the longitudinal direction of the crystal grains of the polycrystalline portion forms an angle of 120° to 150° relative to the cleaved surface of the monocrystalline silicon. Thus provided is a hybrid silicon wafer comprising the functions of both a polycrystalline silicon wafer and a monocrystalline wafer.
US08659021B2 Organic light-emitting display device and method of manufacturing the same
An organic light-emitting display device is manufactured via a simple process and has an improved aperture ratio. The organic light-emitting display device comprising: a substrate; an auxiliary electrode formed on the substrate; a thin film transistor (TFT) formed on the auxiliary electrode, the TFT comprising an active layer, a gate electrode, a source electrode and a drain electrode; an organic electroluminescent (EL) device electrically connected to the TFT and formed by sequentially stacking a pixel electrode formed on the same layer by using the same material as portions of the source and drain electrodes, an intermediate layer comprising an organic light emission layer (EML), and an opposite electrode disposed to face the pixel electrode; and a contact electrode formed on the same layer by a predetermined distance by using the same material as the source and drain electrodes, and electrically connecting the auxiliary electrode and the opposite electrode.
US08659020B2 Epitaxial silicon wafer and method for manufacturing same
It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.
US08659019B2 Semiconductor device
At a semiconductor device, an integrated circuit including an optoelectronic conversion device is formed on a front face of a sensor chip. A rewiring layer, which leads from pad electrodes, and post electrodes, on the rewiring layer, are formed on the sensor chip. At least a portion of surroundings of the rewiring layer and the post electrodes is sealed with sealing resin, so as to be open above the integrated circuit face. A light-transmissive substrate is disposed over the sealed sensor chip. Penetrating electrodes, corresponding with positions of the post electrodes disposed on the sensor chip, are formed in the light-transmissive substrate, and external terminals such as solder balls or the like are formed so as to electrically connect with the penetrating electrodes.
US08659018B2 Semiconductor device and integrated semiconductor device
The present disclosure provides a semiconductor device including: a semiconductor identifier holding portion configured to hold a semiconductor identifier for identifying a semiconductor device; and a control portion configured such that upon elapse of a predetermined time period following receipt of an externally input instruction to hold the semiconductor identifier, the control portion issues an instruction to the semiconductor device immediately downstream of the semiconductor device to hold a semiconductor identifier of the immediately downstream semiconductor device and that during the time period between the point in time at which the externally input instruction is received and the point in time at which the instruction is issued to the immediately downstream semiconductor device to hold the semiconductor identifier thereof, the control portion causes the semiconductor identifier holding portion to hold the externally input identifier.
US08659013B2 Semiconductor device
An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.
US08659012B2 Light emitting device
A light emitting device having a plastic substrate is capable of preventing the substrate from deterioration with the transmission of oxygen or moisture content. The light emitting device has light emitting elements formed between a lamination layer and an inorganic compound layer that transmits visual light, where the lamination layer is constructed of one unit or two or more units, and each unit is a laminated structure of a metal layer and an organic compound layer. Alternatively, each unit is a laminated structure of a metal layer and an organic compound layer, wherein the inorganic compound layer is formed so as to cover the end face of the lamination layer. In the present invention, the lamination layer is formed on the primary surface of the plastic substrate, so that a flexible substrate structure can be obtained.
US08659010B2 Photo luminescence diode and photoluminescence diplay having the same
A photoluminescence diode which may decrease a driving voltage may include an anode, a cathode, an emission layer interposed between the anode and the cathode, and an electron accepting layer interposed between the emission layer and the cathode and including one material selected from fullerene, methanofullerene, doped fullerene, doped methanofullerene, a derivative thereof, and a mixture thereof.
US08659008B2 Composite material and light emitting element, light emitting device, and electronic device using the composite material
The present invention provides a composite material in which an organic compound and an inorganic compound are composited, which is superior in conductivity, a composite material which is superior in a property of injecting carriers to an organic compound, and a composite material having low resistance with metal. Further, the present invention provides a light emitting element operating at a low drive voltage by applying the composite material to a current excitation type light emitting element, and a light emitting device consuming low power by manufacturing a light emitting device using the light emitting element. The present invention provides a composite material including metal oxide and an organic compound having an oxidation peak potential with respect to an oxidation-reduction potential of ferrocene in dimethylformamide (DMF) at room temperature within the range of 0 V and 1.5 V (vs. Fc/Fc+), preferably within the range of 0.1 V and 1.0 V (vs. Fc/Fc+).
US08659006B1 Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices
A nanowire FET device includes a SOI wafer having a SOI layer over a BOX, and a plurality of nanowires and pads patterned in the SOI layer, wherein the nanowires are suspended over the BOX; an interfacial oxide surrounding each of the nanowires; and at least one gate stack surrounding each of the nanowires, the gate stack having (i) a conformal gate dielectric present on the interfacial oxide (ii) a conformal first gate material on the conformal gate dielectric (iii) a work function setting material on the conformal first gate material, and (iv) a second gate material on the work function setting material. A volume of the conformal first gate material and/or a volume of the work function setting material in the gate stack are/is proportional to a pitch of the nanowires.
US08659001B2 Defect gradient to boost nonvolatile memory performance
Embodiments of the present invention generally relate to a resistive switching nonvolatile memory element that is formed in a resistive switching memory device that may be used in a memory array to store digital data. The memory element is generally constructed as a metal-insulator-metal stack. The resistive switching portion of the memory element includes a getter portion and/or a defect portion. In general, the getter portion is an area of the memory element that is used to help form, during the resistive switching memory device's fabrication process, a region of the resistive switching layer that has a greater number of vacancies or defects as compared to the remainder of resistive switching layer. The defect portion is an area of the memory element that has a greater number of vacancies or defects as compared to the remainder of the resistive switching layer, and is formed during the resistive switching memory device's fabrication process. The addition of the getter or defect portions in a formed memory device generally improves the reliability of the resistive switching memory device, improves the switching characteristics of the formed memory device and can eliminate or reduce the need for the time consuming additional post fabrication “burn-in” or pre-programming steps.
US08658991B2 Particle beam irradiation apparatus utilized in medical field
In order to obtain a particle beam irradiation apparatus that enlarges the dose distribution of beam spots while suppressing a decrease of the maximum available range of a charged particle beam, the particle beam irradiation apparatus includes a particle beam acceleration means; particle beam transport means; scanning apparatus that includes first scanning means and second scanning means, and two-dimensionally scans the beam; and irradiation control means that controls the scanning apparatus so as to irradiate the beam onto a target region including a plurality of small regions. The irradiation control means controls the first scanning means so as to scan the beam over a small region serving as an irradiation subject among the plurality of the small regions, and controls the second scanning means so as to change the small region serving as the irradiation subject to be a different small region among the plurality of the small regions.
US08658984B2 Charged particle analysers and methods of separating charged particles
A method of separating charged particles using an analyzer is provided, the method comprising: causing a beam of charged particles to fly through the analyzer and undergo within the analyzer at least one full oscillation in the direction of an analyzer axis (z) of the analyzer whilst orbiting about the axis (z) along a main flight path; constraining the arcuate divergence of the beam as it flies through the analyzer; and separating the charged particles according to their flight time. An analyzer for performing the method is also provided. At least one arcuate focusing lens is preferably used to constrain the divergence, which may comprise a pair of opposed electrodes located either side of the beam. An array of arcuate focusing lenses may be used which are located at substantially the same z coordinate, the arcuate focusing lenses in the array being spaced apart in the arcuate direction and the array extending at least partially around the z axis, thereby constraining the arcuate divergence of the beam a plurality of times as it flies through the analyzer.
US08658982B2 Optical method and system utilizing operating with deep or vacuum UV spectra
An apparatus and method are presented for use in optical processing of an article. The apparatus comprises: one or more optical windows for directing predetermined electromagnetic radiation therethrough to illuminate a region of interest and collecting radiation returned from the illuminated region; and two or more ports operable for inputting or discharging one or more gases from the vicinity of the region of interest on the article being processed to create in the vicinity of said region a substantially static state of environment, non-absorbable for said electromagnetic radiation, thereby reducing amount of ambient gas in the vicinity of said region of interest and enabling optical processing of the article while maintaining it in the ambient gas environment.
US08658978B2 Methods and apparatus for a radiation monitor
Methods and apparatus for a radiation monitor. In one embodiment, a radiator monitor comprises a housing, a detector material having an adjustable density in the housing, an optical coupler adjacent the detector material to receive Cherenkov energy generated in the detector material, a photodetector coupled to the optical coupler, and a processing module coupled to the photodetector to determine whether a detection threshold is exceeded.
US08658971B2 Method of processing mass spectral data
A method of processing mass spectral data is disclosed comprising digitising a first signal output from an ion detector to produce a first digitised signal. A first set of peaks in the first digitised signal is detected and the arrival time To and peak area So of one or more peaks in the first set of peaks are determined thereby forming a first list of data pairs, each data pair comprising an arrival time value and a peak area value. One or more data pairs from the first list are then filtered out thereby forming a second reduced list, wherein a data pair is filtered out, attenuated or otherwise rejected from the first list if the peak area value of a data pair in the first list is determined to be less than a threshold peak area.
US08658970B2 Ion tunnel ion guide
An ion guide is disclosed comprising a plurality of axial groupings of electrodes, wherein each axial grouping of electrodes comprises a ring or annular electrode which has been radially segmented into a plurality of electrode segments.
US08658965B2 Encoder having a pattern track including different-width patterns
An encoder which measures displacement of a moving part includes a light-emitting unit; a moving part which moves relative to the light-emitting unit; a first pattern track which includes a plurality of first unit patterns sequentially formed on the moving part, separated from one another and having different widths; a first light-receiving unit which is disposed to correspond to the light-emitting unit and detects first information light received from the light-emitting unit via a first pattern of the first unit patterns; at least one second light-receiving unit which is disposed to correspond to the light-emitting unit and detects second information about light received from the light-emitting unit via at least one second pattern of the first unit patterns; and a displacement calculating unit which calculates a relative displacement of the moving part with respect to a reference position based on the first and second information.
US08658960B2 Method and apparatus for correcting excess signals in an imaging system
A method and apparatus for excess signal compensation in an imaging system is described. In one particular embodiment, the invention provides for non-linear background, offset (due to time dependent dark current) and/or lag (including constant, linear and non-linear terms, due to image persistence) corrections of large area, flat panel imaging sensors.
US08658959B2 Parallel analog-to-digital conversion method, device implementing said method and imaging detector comprising said device
An ADC includes a single circuit for generating reference voltages that are constant and then decreasing over time. The ADC includes a constant current source and a resistive bridge connected to the current source. A voltage source produces a decreasing voltage on a node of the bridge. The ADC also includes a contact breaker for the connection of the voltage source to the node. The ADC also includes a digitization circuit which includes a means for comparing a voltage, a means for selecting a reference voltage, a means for counting, and a means for storing on the one hand, a reference associated with the constant reference voltage which is immediately lower than or equal to the voltage for conversion, and on the other hand, the number of counted time units.
US08658958B2 Light sensing circuit having programmable current source and method thereof
A light detecting circuit and a light detecting method thereof are provided. The light detecting circuit includes a first resistor, a light sensor, a current source, and a first current mirror. The light sensor generates a corresponding photocurrent according to the illumination while being illuminated by the high brightness light beam. By dividing the photocurrent corresponding to the low brightness light beam from the photocurrent through the current source, the light detecting circuit can mainly detects the high brightness light beam, so that the detecting accuracy can be enhanced. Accordingly, when being applied to detect the high brightness light beam, the light detecting circuit can provide a sensing voltage in a wide enough range and a large enough sense scale, so that the sensing voltage is easy to be distinguished by the rear stage.
US08658955B2 Optical assembly including a heat shield to axially restrain an energy collection system, and method
Some embodiments relate to an optical assembly that includes an energy collection system that collects energy and a heat shield that axially restrains the energy collection system. The optical assembly further includes a sensor and a structure which supports the energy collection system such that the energy collection system directs the energy to the sensor. Other embodiments relate to a projectile that includes a propulsion system, a guidance system and an optical assembly as described above. Other embodiments relate to a method of directing a projectile that includes collecting energy using an energy collection system; directing the energy to a sensor; axially restraining the energy collection system using a heat shield; using a guidance system to determine the position of the projectile based on data received from the sensor; and directing the projectile toward the destination using a propulsion system that is commanded by a guidance system.
US08658954B2 Microwave oven including hood
A microwave oven including an extendable/retractable hood assembly is provided. The microwave oven draws contaminated air through intake ports that are provided in a hood casing and a hood. The hood is slidably received in the hood casing. Thus, the hood is retracted or extended from the hood casing to more efficiently perform an air exhaust function.
US08658953B2 Antenna cover for microwave ovens
An antenna cover assembly for a high-temperature operating environment has a cover plate, gasket portions, and a retainer plate. The cover plate has an inner side and an outer side, the cover plate being translucent to at least one selected frequency of electromagnetic energy. The gasket portions are each located adjacent one of the inner and outer sides, each gasket portion being configured for sealingly engaging the adjacent side. The retainer plate is configured for attachment to a structure located in a high-temperature operating environment. The retainer plate has a sealing flange adapted for clamping the cover plate generally adjacent an antenna portion of a waveguide.
US08658951B2 Heat treatment apparatus
In-plane temperature of each substrate is uniformly controlled at the time of heating substrates placed on a plurality of susceptors, respectively. A heat treatment apparatus is provided with susceptors, i.e., conductive members for placing wafers thereon, having an induction heating body electrically divided into a center portion thereof and a peripheral portion thereof; a quartz boat supporting the susceptors arranged in a row; an induction coil, which is arranged inside a processing chamber to surround the circumference of each of the susceptors and configured such that the temperature of the induction coil can be freely adjusted; and a control unit which performs temperature control by changing the ratio between heat value at the center portion of the induction heating body and that at the peripheral portion, by controlling two high frequency currents of different frequencies to be applied to the induction coil from a high frequency current circuit.
US08658947B2 Rapid conductive cooling using a secondary process plane
A method and apparatus for thermally processing a substrate is provided. In one embodiment, a method for thermally treating a substrate is provided. The method includes transferring a substrate at a first temperature to a substrate support in a chamber, the chamber having a heating source and a cooling source disposed in opposing portions of the chamber, heating the substrate to a second temperature during a first time period while the substrate is disposed on the substrate support, heating the substrate to a third temperature during a second time period while the substrate is disposed on the substrate support, and cooling the substrate in the chamber to a fourth temperature that is substantially equal to the second temperature during the second time period.
US08658946B2 Control system for a self cleaning oven appliance
A control system for an appliance having at least a first oven and a second oven includes an electronic range control device for regulating a temperature of the first oven, an electromechanical thermostat assembly for regulating a temperature of the second oven, and a relay circuit assembly under control of the electronic range control device, the relay circuit assembly being configured to selectively enable operation of the first oven and the electromechanical thermostat.
US08658943B1 Personal thermal regulating device
A personal thermal regulating device (PTRD) typically includes a heat generating device, a power source, a switchable control operably coupled with each of the heat generating device and the power source, and a head retention device coupled with the heat generating device and configured to retain the heat generating device positioned centrally at and in thermally conductive contact with a user's forehead. The present invention affects a tangible warming of the extremities, particularly the hands and feet, extending retention of manual dexterity and peripheral comfort under cold conditions.
US08658941B2 Wireless system control and inventory monitoring for welding-type devices
A welding-type system is designed for wireless control and for inventory monitoring of welding consumables. The welding-type system includes a power source to produce a welding-type power, wherein the power source is operable in a plurality of operating modes. The welding-type system also includes a controller configured to set a plurality of operating parameters within the power source, at least one wireless monitoring device coupled to the controller, and at least one welding-type consumable associated with a wireless transmitter. The wireless transmitter is configured to emit low frequency magnetic signals having consumable data encoded therein that is indicative of the at least one welding-type consumable. The wireless monitoring device is arranged to communicate with the wireless transmitter by receiving and transmitting the low frequency magnetic signals, with the low frequency magnetic signals being transmitted at a frequency of approximately 131 kHz.
US08658936B2 Method and apparatus for processing metal bearing gases
A method and apparatus for processing metal bearing gases involves generating a toroidal plasma in a plasma chamber. A metal bearing gas is introduced into the plasma chamber to react with the toroidal plasma. The interaction between the toroidal plasma and the metal bearing gas produces at least one of a metallic material, a metal oxide material or a metal nitride material.
US08658930B2 Embedded pole part with an isolating housing made of thermoplastic material
An embedded pole part is provided with an isolating housing made of thermoplastic material. The housing embeds an interrupter as well as the electric terminals of the pole part. At an outer surface of the housing, horizontal and/or vertical aligned three-dimensional structures joined by material engagement are implemented into the thermoplastic material, to achieve a higher mechanical stiffness as well as higher creepage length of the pole part. The mechanical and dielectric parameters of the pole part are thereby strengthened, for example, in the case of a short circuit current.
US08658921B2 Utility meter service switch
Systems for disconnecting and/or connecting service between a utility network and a utility meter are disclosed. In one embodiment, a switch system includes: an actuator connected to a sliding cam for moving the sliding cam between a first position and a second position, the sliding cam slidingly receiving a terminal blade of the utility meter and including a pair of camming surfaces for disengaging a pair of conductors from the terminal blade in response to being moved from the first position to the second position by the actuator.
US08658917B2 Techniques for disambiguating touch data using user devices
Techniques for disambiguating touch data and determining user assignment of touch points detected by a touch sensor are described. The techniques leverage both user-specific touch data projected onto axes and non-user-specific touch data captured over a complete area.
US08658916B2 Snow shield for a truck scale
A snow shield for a truck scale for covering the gap between the lower side of the scale deck of the truck scale and a support surface at each side of the truck scale. A first flexible sheet member has its upper end secured to the outer side of the first frame siderail of the truck scale for the length thereof and extends downwardly therefrom outwardly of the gap at one side of the truck scale. A second flexible sheet member has its upper end secured to the outer side of the second frame siderail of the truck scale for the length thereof and extends downwardly therefrom outwardly of the gap at the other side of the truck scale. The lower ends of the sheet members are secured in place to either the supporting surface or the ground adjacent thereto.
US08658915B2 Two-way wiring device
The configurations of a two way wiring device are provided in the present invention. The proposed device includes a case having a first side, a second side opposite to the first side, a third side formed between the first side and the second side and an open bottom passing therethrough a first conducting wire, wherein the third side includes a first side segment, a second side segment and a middle segment located between the first and the second side segments, and a conducting wire guiding pathway formed on the case and the first conducting wire passing the pathway and wired out of the case through one of the first side segment and the second side segment.
US08658913B2 Control box arrangement with a mounting element
The invention concerns a control box arrangement (1) with a control box (2) and a mounting plate (4) having a front side (18) and a rear side (11) and an opening (5) in which the control box (2) is inserted from the front side (18). It is endeavored to enable simple mounting and dismounting. For this purpose, the control box (2) includes at least one locking bar (7), which rests on the rear side (11) in a mounting position (9), a mounting element (10) being insertable in the control box (2) to displace the locking bar (7) to the mounting position (9).
US08658908B2 Multiple patterning wiring board, wiring board and electronic apparatus
A multiple patterning wiring board includes a base substrate including a plurality of wiring board regions arranged in rows and columns, the wiring board regions each including an electronic component mounting region in a center portion thereof, a dividing groove at borders between wiring board regions in one main face of the base substrate, a lid member bonding region being formed between the electronic component mounting region and the dividing groove in the main face of the base substrate, and the lid member bonding region 1c including a groove, the groove having a width less than or equal to the width of the region and a depth that is less than a depth of the dividing groove.
US08658906B2 Printed circuit board assembly sheet and method for manufacturing the same
A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.
US08658904B2 Flex-rigid wiring board and method for manufacturing the same
A flex-rigid wiring board including a flexible wiring board, a first insulation layer positioned to a side of the flexible board and having a first hole through the first layer, a second insulation layer over the first layer and an end portion of the flexible board and with a second hole through the second layer along the axis of the first hole, a third insulation layer over the first layer and the end portion of the flexible board on the opposite side of the second layer and with a third hole through the third layer along the axis of the first hole, a first structure having a filled conductor in the first hole, a second structure having a filled conductor in the second hole along the axis of the first structure, and a third structure having a filled conductor in the third hole along the axis of the first structure.
US08658903B2 Wired circuit board
A wired circuit board includes an insulating base layer, a conductive pattern that is laminated on the insulating base layer, and an insulating cover layer that is laminated on the insulating base layer so as to cover the conductive pattern. The conductive pattern includes, when projected in a laminating direction of the insulating base layer, the conductive pattern, and the insulating cover layer, a terminal portion that is exposed from the insulating base layer and the insulating cover layer. The terminal portion includes an exposed surface that is exposed toward an external terminal side. A protruded portion that protrudes toward the contact direction with the external terminal is formed on the exposed surface.
US08658896B2 Temperature movable structure of superconducting cable terminal
Disclosed herein is a temperature movable structure of a superconducting cable terminal. The superconducting cable terminal has sections of a high temperature portion, a temperature movable portion and an extremely low temperature portion. The temperature movable structure is disposed in the section of the temperature movable portion between the sections of the high temperature portion and the extremely low temperature portion. The temperature movable structure has upper and lower spacer members, a pipe body, first and third conductors, a second conductor and a contact connecting member disposed between the first and second conductors.
US08658883B2 Solar cell module and method for manufacturing the same
A solar cell module is provided. The solar cell module includes: a substrate; a plurality of unit cells including a first electrode, a semiconductor layer, and a second electrode that are sequentially deposited on the substrate; a first sub-module and a second sub-module having the unit cells, respectively; a first longitudinal pattern dividing the unit cells of the first sub-module, and a second longitudinal pattern dividing the unit cells of the second sub-module; a transverse pattern dividing the first sub-module and the second sub-module; and an insulating portion disposed near the transverse pattern, and insulating between the first sub-module and the second sub-module, wherein the unit cells of the first sub-module are connected in series through the first longitudinal pattern, the unit cells of the second sub-module are connected in series through the second longitudinal pattern, and the first sub-module and the second sub-module are connected in series through the transverse pattern.
US08658882B1 Contactless power generation
Concepts and technologies described herein provide for providing power to an electronic device mounted to a moving apparatus. According to various aspects, a flexible solar panel is detachably mounted to the moving apparatus. A light emitting diode (LED) array is mounted on a flexible circuit board and is configured to emit light at a color temperature range that matches the effective response of the solar panel. The LED array is shaped according to the surface of the moving apparatus and is positioned a uniform gap width apart from the solar panel. When the moving apparatus is activated, light from the fixed LED array is received by the moving solar panel and converted into electricity for powering the electronic device that is electrically connected to the solar panel. Data from the electronic device may be wirelessly transmitted from the moving apparatus to a fixed receiver for storage or use.
US08658881B2 Resonant thermoelectric generator
A thermoelectric generator comprises an electrical circuit having two or more thermocouple junctions (600, 615), a switch (620), a controller (640), and a series resonant circuit consisting of a capacitor (625) and an inductor in the form of a transformer (630). The thermocouple junctions operate between two temperature reservoirs (605, 610) operating at temperatures T2 and T1, respectively, that are sufficiently different to enable the circuit to supply power to a load (635). Using sense lines (650, 655) the controller forces the switch to advance to the next throw at the proper time, forcing the circuit to operate at or near resonance. With each operation of the switch, one junction at a time is connected to the resonant circuit, while one or more junctions are left in an open-circuit condition. By allowing the temporarily disconnected junctions sufficient time to reach thermal equilibrium with the temperature reservoirs, isothermal equilibrium is achieved. By reversing the polarity of each subsequently-connected junction, electrons in the thermally-equilibrated junctions experience a very rapid adiabatic expansion or compression when each junction is connected. The result is a thermoelectric generator that operates with an efficiency that is greater than the prior-art. Power regulation is accomplished through adjustments to the strength of the load and the temperatures of the reservoirs.
US08658878B2 Interventive diagnostic device
Apparatus and methods are described for facilitating improving health of a user. In accordance with some applications, a first physiological variable, which is indicative of a voluntary action of the user, is received. A second physiological variable, which is not entirely under the direct voluntary control of the user, is received. Responsive to the first and second variables, the second physiological variable is changed in a desired manner, by using circuitry to direct the user to modify a parameter of the voluntary action, by generating an output signal. Other applications are also described.
US08658877B1 Lighting systems and related methods
A lighting system. Implementations may include an AC input power source coupled with a power conditioning and control module adapted output a low voltage high frequency pulse width modulated (PWM) signal. A remote transmission cable may be adapted to carry the low voltage high frequency PWM signal to a remote transformer adapted to convert the low voltage high frequency PWM signal to a high voltage high frequency PWM signal. A charge pump may be included which is adapted to receive the high voltage high frequency PWM signal and increase a voltage of the signal. A gas discharge tube may be coupled to the charge pump. A controller may be coupled to the power conditioning and control module and adapted to operate the gas discharge tube at two or more light intensity levels with the low voltage high frequency PWM signal.
US08658870B2 Plants and seeds of corn variety CV024124
According to the invention, there is provided seed and plants of the corn variety designated CV024124. The invention thus relates to the plants, seeds and tissue cultures of the variety CV024124, and to methods for producing a corn plant produced by crossing a corn plant of variety CV024124 with itself or with another corn plant, such as a plant of another variety. The invention further relates to corn seeds and plants produced by crossing plants of variety CV024124 with plants of another variety, such as another inbred line. The invention further relates to the inbred and hybrid genetic complements of plants of variety CV024124.
US08658867B2 Soybean variety A1026434
The invention relates to the soybean variety designated A1026434. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1026434. Also provided by the invention are tissue cultures of the soybean variety A1026434 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1026434 with itself or another soybean variety and plants produced by such methods.
US08658866B1 Soybean variety XBP59001
A novel soybean variety, designated XBP59001 is provided. Also provided are the seeds of soybean variety XBP59001, cells from soybean variety XBP59001, plants of soybean XBP59001, and plant parts of soybean variety XBP59001. Methods provided include producing a soybean plant by crossing soybean variety XBP59001 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XBP59001, methods for producing other soybean varieties or plant parts derived from soybean variety XBP59001, and methods of characterizing soybean variety XBP59001. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XBP59001 are further provided.
US08658864B1 Soybean variety XB74B11
A novel soybean variety, designated XB74B11 is provided. Also provided are the seeds of soybean variety XB74B11, cells from soybean variety XB74B11, plants of soybean XB74B11, and plant parts of soybean variety XB74B11. Methods provided include producing a soybean plant by crossing soybean variety XB74B11 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XB74B11, methods for producing other soybean varieties or plant parts derived from soybean variety XB74B11, and methods of characterizing soybean variety XB74B11. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XB74B11 are further provided.
US08658858B2 Polynucleotides encoding proteins involved in plant metabolism
The invention provides isolated pyruvate dehydrogenase kinase nucleic acids and their encoded polypeptides. The present invention provides methods and compositions relating to altering pyruvate dehydrogenase kinase levels in plants. The invention further provides recombinant expression cassettes, host cells, transgenic plants, and antibody compositions.
US08658855B2 Diacylglycerol acyltransferase 2 genes and proteins encoded thereby from algae
The present disclosure relates to the isolation, purification, and characterization of a diacylglycerol acyltransferase 2 (DGAT2), and genes encoding DGAT2, from algae. DGAT2 can incorporate very long chain polyunsaturated fatty acids in to triacylglycerol more efficiently than DGAT1. The disclosure concerns methods of regulating seed oil content, fatty acid synthesis and fatty acid composition using the DGAT2 gene and to tissues and plants transformed with the gene. The disclosure also relates to transgenic plants, plant tissues and plant seeds having a genome containing an introduced DNA sequence of the disclosure, and a method of producing such plants and plant seeds.
US08658854B2 Cloned transmembrane receptor for 24-hydroxylated vitamin D compounds and uses thereof
The instant invention relates to the use of 24-hydroxylated vitamin D compounds as therapeutics in mammalian bone fracture repair. In addition, the instant invention relates to novel 24-hydroxylated vitamin D compound receptors which can be employed in the development of compounds capable of facilitating fracture repair in animals. The instant invention also relates to nucleic acids encoding such receptors as well as vectors, host cells, transgenic animals comprising such nucleic acids and screening assays employing such receptors.
US08658853B2 Low affinity FcγR deficient mice
Genetically modified non-human animals and methods and compositions for making and using them are provided, wherein the genetic modification comprises a deletion of the endogenous low affinity FcγR locus, and wherein the mouse is capable of expressing a functional FcRγ-chain. Genetically modified mice are described, including mice that express low affinity human FcγR genes from the endogenous FcγR locus, and wherein the mice comprise a functional FcRγ-chain. Genetically modified mice that express up to five low affinity human FcγR genes on accessory cells of the host immune system are provided.
US08658845B2 Process and adsorbent for separating ethanol and associated oxygenates from a biofermentation system
Disclosed is a process and an adsorbent for the separation of ethanol associated oxygenates from a dilute mixture of ethanol and associated oxygenates in water in the presence of organic compounds derived from a biofermentation process. After pretreatment, the separation is carried out in a simulated moving bed adsorption system employing an stationary phase adsorbent comprising fluorinated carbon or modified C18 silica gel selective for the adsorption of ethanol and associated oxygenates, such as 2,3-butanediol, with a mobile phase desorbent selected from the group consisting of methanol, ethanol, propanol, and methyl tertiary butyl ether. The process is useful for removing water from dilute aqueous mixtures of organic compounds comprising ethanol in dilute concentration in water and produced by fermentation, biomass extraction, biocatalytic and enzymatic processes which are not economically recoverable by conventional distillation methods.
US08658843B2 Hydrogenation catalysts prepared from polyoxometalate precursors and process for using same to produce ethanol while minimizing diethyl ether formation
The present invention relates to hydrogenation catalysts prepared from polyoxometalate precursors. The polyoxometalate precursors introduce a support modifier to the catalyst. The catalysts are used for hydrogenating alkanoic acids and/or esters thereof to alcohols with relatively low ether formation, preferably with conversion of the ester coproduct. The catalyst may also comprise one or more active metals.
US08658840B2 Method for producing β-fluoroalcohol
A production method of a β-fluoroalcohol includes performing a reaction of an α-fluoroester with hydrogen gas (H2) in the presence of a specific ruthenium complex (i.e. a ruthenium complex of the general formula [2], preferably a ruthenium complex of the general formula [4]). This production method can employ a suitable hydrogen pressure of 1 MPa or less by the use of such a specific ruthenium complex and does not require a high-pressure gas production facility when put in industrial practice. In addition, this production method can remarkably reduce the amount of catalyst used therein (to e.g. a substrate/catalyst ratio of 20,000) in comparison to the substrate/catalyst ratio conventional reduction of α-fluoroalcohol. It is possible by these reduction in hydrogen pressure and catalyst amount to largely reduce the production cost of the β-fluoroalcohol.
US08658839B2 Oxidation of hydrocarbons
In a process for oxidizing a hydrocarbon to a corresponding hydroperoxide, alcohol, ketone, carboxylic acid or dicarboxylic acid, the hydrocarbon is contacted with an oxygen-containing gas in the presence of a catalyst comprising a cyclic imide of the general formula (I): wherein each of R1 and R2 is independently selected from hydrocarbyl and substituted hydrocarbyl radicals having 1 to 20 carbon atoms, or from the groups SO3H, NH2, OH and NO2, or from the atoms H, F, Cl, Br and I provided that R1 and R2 can be linked to one another via a covalent bond; each of Q1 and Q2 is independently selected from C, CH, N and CR3; each of X and Z is independently selected from C, S, CH2, N, P and elements of Group 4 of the Periodic Table; Y is O or OH; k is 0, 1, or 2; l is 0, 1, or 2; m is 1 to 3, and R3 can be any of the entities listed for R1. The contacting produces an effluent comprising an oxidized hydrocarbon product and unreacted imide catalyst of said formula (I) and the effluent is treated with a solid sorbent to remove at least part of the unreacted imide catalyst and produce a treated effluent comprising said oxidized hydrocarbon product. The organic phase can then be recovered.
US08658837B2 Intermediates for the synthesis of benzindene prostaglandins and preparations thereof
Novel processes for preparing optically active cyclopentanones 1 which are useful for the preparation of benzindene Prostaglandins and novel cyclopentanones are provided. The invention also provides novel processes of preparing benzindene Prostaglandins and novel intermediates for benzindene Prostaglandins.
US08658836B2 Oxidation of hydrocarbons
In a process for oxidizing a hydrocarbon to the corresponding hydroperoxide, alcohol, ketone, carboxylic acid or dicarboxylic acid, a reaction medium comprising a hydrocarbon is contacted with an oxygen-containing gas in the presence of a catalyst comprising a cyclic imide of the general formula (I): wherein each of R1 and R2 is independently selected from hydrocarbyl and substituted hydrocarbyl radicals having 1 to 20 carbon atoms, or from the groups SO3H, NH2, OH and NO2, or from the atoms H, F, Cl, Br and I provided that R1 and R2 can be linked to one another via a covalent bond; each of Q1 and Q2 is independently selected from C, CH, N, and CR3; each of X and Z is independently selected from C, S, CH2, N, P and an element of Group 4 of the Periodic Table; Y is O or OH; k is 0, 1, or 2; l is 0, 1, or 2; m is 1 to 3; and R3 can be any of the entities listed for R1. The contacting is conducted under conditions such as to maintain the concentration of both water and organic acids in the reaction medium below 50 ppm.
US08658828B2 Recovery of toluene diamine from tar waste residue discharged from synthesis process of toluene diisocyanate
The recovery of toluene diamine from tar waste residues discharged from the synthesis process of toluene diisocyanate comprising steps of: a) grinding the tar waste residues into particles; b) dispersing the particles of tar waste residues into a phase transfer catalyst, alkali and water to obtain a slurry, said phase transfer catalyst being selected from the group consisting of higher alcohols, polyols, polyether compounds and combinations thereof having a boiling point ranging from 120 to 280° C.; c) under the protection of a protective gas, subjecting the slurry to a hydrolysis reaction at a temperature of 120-180° C. under a meter-measured pressure of 0-0.95 MPa to produce toluene diamine; and d) recovering toluene diamine from the hydrolysis reaction solution. The present invention achieves highly efficient recovery of toluene diamine (the recovery rate of TDA is up to 60%) under mild conditions such as 120-180° C. and 0-0.95 MPa (meter-measured pressure), and has a significant economic benefit and friendliness to the environment by recycling the phase transfer catalyst (its recovery rate is up to 99.6%) and water.
US08658826B2 Amino acid derivatives used as pharmaceutical substances
The invention relates to a method for improving bioavailability of pharmaceutical substances and for allowing the pharmaceutical substances to permeate the blood-brain barrier, the pharmaceutical substances having at least one or more amidine, guanidine, N-hydroxyamidine (amidoxime) or N-hydroxyguanidine functions. The invention also relates to medicaments containing the correspondingly modified pharmaceutical substances.
US08658823B2 Processes for producing acrylic acids and acrylates
In one embodiment, the invention is to a process for producing an acrylate product. The process comprises the step of providing a crude product stream comprising the acrylate product and an alkylenating agent. The process further comprises the step of separating at least a portion of the crude product stream to form an alkylenating agent stream and an intermediate product stream. The alkylenating agent stream comprises at least 1 wt % alkylenating agent and the intermediate product stream comprises acrylate product.
US08658816B2 Precipitated silicas as a reinforcing filler for elastomer mixtures
The present invention relates to precipitated silicic acids, which have a particularly narrow particle size distribution in combination with a special pore size distribution, to a method for the production thereof, and to the use thereof as a filler for rubber mixtures.
US08658809B2 Process for the preparation of dronedarone
The subject of the present disclosure is a novel process for the preparation of N-[2-n-butyl-3-{4-[(3-dibutylamino)propoxy]benzoyl}-1-benzofuran-5-yl]methanesulfonamide of formula I: and the new intermediates of the preparation process.
US08658805B2 Fused polyheteroaromatic compound, organic thin film including the compound, and electronic device including the organic thin film
A low-molecular-weight fused polycyclic heteroaromatic compound may have a compact planar structure in which seven or more rings are fused together. The compound may exhibit a relatively high charge mobility and enable the use of a deposition process or a room-temperature solution process when applied to devices, therefore realizing improved processibility. An organic thin film and electronic device may include the fused polycyclic heteroaromatic compound.
US08658800B2 Ortho-substituted arylamide derivatives
The present invention relates to novel ortho-substituted arylamide derivatives of the general formula (I) in which R1, R3, R4, R5, Qx, A, Qy, X, L and n have the meanings given in the description, to their use as insecticides and acaricides for controlling animal pests, also in combination with other agents for activity boosting, and to a plurality of processes for their preparation.
US08658799B2 Process for the preparation of crystalline modifications for use in the preparation of esomeperazole sodium salt
The present invention relates to a new process for the preparation of crystal modifications for use in the preparation of esomeprazole sodium salt. Further, the present invention also relates to the use of the new crystal modifications for the treatment of gastrointestinal disorders, pharmaceutical compositions containing them as well as the crystal modifications, as such.
US08658798B2 Herbicide triazolylpyridine ketones
Triazolylpyridine ketones expressed by the following formula (I) and use thereof as herbicides.
US08658797B2 Asymmetric ureas and medical uses thereof
Disclosed are compounds, compositions and methods for the prevention and/or treatment of diseases which are pathophysiologically mediated by the ghrelin receptor. The compounds have the general formula (I):
US08658786B2 Self-repairing cyclic oxide-substituted chitosan polyurethane networks
Thermosetting polymeric compositions, such as polyurethane compositions, and related methods are provided. The invention relates to coating and polymer compositions and related methods derived from a biodegradable natural polysaccharide compound such as chitosan, pectin, heparin, and combinations thereof reacted to a cyclic oxide compound, such as an oxetane, oxolane or oxepane compound. The compositions and methods of the present invention exhibit self-repairing properties upon exposure to ultraviolet (UV) light. The compositions and methods of the present invention can be used in many coating applications, such as the transportation, packaging, fashion, and biomedical industries.
US08658784B2 siRNA targeting amyloid beta (A4) precursor protein (APP)
Efficient sequence specific gene silencing is possible through the use of siRNA technology. By selecting particular siRNAs by rational design, one can maximize the generation of an effective gene silencing reagent, as well as methods for silencing genes. Methods, compositions, and kits generated through rational design of siRNAs are disclosed including those directed to nucleotide sequences for APP.
US08658780B2 Triggered covalent probes for imaging and silencing genetic expression
The present invention relates to the use of cross-linking probes to covalently bind probes to nucleic acid targets. In some embodiments, the probe comprises an initiator region that is able to bind to a first portion of a target nucleic acid, a probe region linked too the initiator region that is able to bind to a second region of the target nucleic acid and that comprises one or more cross-linkers, and a blocking region hybridized to the probe region.
US08658776B2 Synthesis of 2′,3′-dideoxynucleosides for automated DNA synthesis and pyrophosphorolysis activated polymerization
Methods for preparation of 2′,3′-dideoxynucleotides support structures, such as 2′,3′-dideoxyguanosine, 2′,3′-dideoxyadenosine, and 3′-deoxythymidine support structures are disclosed. Various methods of using such structures are also provided, such as their use for automated DNA synthesis and pyrophosphorolysis activated polymerization.
US08658775B2 Chitosan-derivative compounds and methods of controlling microbial populations
The present invention is directed to chitosan-derivative compounds and structures, methods of making chitosan-derivative compounds and methods for controlling, inhibiting and enhancing microbial populations in a variety of environments. The present invention is also directed to the control, inhibition and enhancement of microbial populations in animals, particularly humans. The microbial populations include bacteria, viruses and other pathogens where control of microbial populations are a necessity. The chitosan-derivative compounds of the present invention include chitosan-arginine compounds, related chitosan-L/D unnatural amino acid compounds, chitosan-acid amine compounds, chitosan-L/D natural amino acid derivative compounds, co-derivatives of the chitosan-derivative compounds, salts of the chitosan derivative compounds, and chitosan-guanidine compounds.
US08658769B2 Diagnostic marker for hepatocellular carcinoma comprising anti-FASN autoantibodies and a diagnostic composition for hepatocellular carcinoma comprising antigens thereof
The present invention relates to an autoantibody specifically recognizing the epitope sequence of FASN (fatty acid synthase), more particularly, to the autoantibody or a fragment comprising an antigen-binding site thereof, a diagnostic composition for hepatocellular carcinoma comprising an agent capable of assessing the expression level of the autoantibody, a hybridoma cell line producing the autoantibody, a diagnostic kit for hepatocellular carcinoma comprising the composition, a method for detecting the autoantibody of hepatocellular carcinoma patient using the composition, and a method for screening a therapeutic agent for hepatocellular carcinoma by administering candidate materials for hepatocellular carcinoma treatment to confirm a reduction in the expression level of autoantibody.
US08658759B2 Switchable self-doped polyaniline
A substituted polyaniline whose self-doped state can be controlled via complexation between boronic acid groups along the backbone with D-fructose in the presence of fluoride is described. For the first time, this allows the formation of a water-soluble, self-doped conducting polymer under the polymerization conditions. In turn this facilitates the growth of polyaniline over a wider pH range.
US08658758B2 Process for producing aliphatic polyester reduced in residual cyclic ester content
In the production of an aliphatic polyester by ring-opening polymerization of a cyclic ester, at least a latter period of polymerization is proceeded with by way of solid-phase polymerization, and the resultant aliphatic polyester is subjected to removal of residual cyclic ester. As a result, an aliphatic polyester with a minimized content of residual monomer is obtained.
US08658755B2 Silicon-containing curable composition and cured product thereof
Provided is a silicon-containing curable composition which includes a prepolymer (A) containing two or more Si—H groups in one molecule, which is obtained by subjecting one or more kinds of a cyclic siloxane compound (α) represented the following formula (1) and one or more kinds of a compound (β) represented by the following formula (2), to a hydrosilylation reaction; a cyclic siloxane compound (B) containing, in one molecule, two or more carbon-carbon double bonds that are reactive with Si—H groups; a polysiloxane compound (C) which is different from the prepolymer (A) and the cyclic siloxane compound (B); and a hydrosilylation catalyst (D). In formula (1), R1 to R3 each represent an alkyl group having 1 to 6 carbon atoms, or a phenyl group; a represents a number from 2 to 10; and b represents a number from 0 to 8. In formula (2), n represents the number 1 or 2.
US08658751B2 Molecule-based magnetic polymers and methods
Molecule-based magnetic polymers with reasonably high Curie temperature and methods of preparing are provided. In particular, magnetic polymers having repeating units of an organometallic monomer covalently bonded to a monomer having a plurality of unpaired electrons are disclosed. Intrinsically homogeneous magnetic fluids (liquid magnets) and methods of preparing are also provided.
US08658745B2 Broadening the molecular weight distribution of polyolefins materials made in a horizontal stirred gas phase reactor
An olefin polymerization process comprises gas-phase polymerization of at least one olefin monomer in more than one polymerization zones in one or more polymerization reactors using a high activity catalyst injected in the front end of the reactor to give solid polymer particles. According to the process of the invention, different hydrogen to olefin ratios are applied to the reactor leading to the production of very different molecular weights and therefore broadening the molecular weight distribution of the polymer produced.
US08658740B2 Reduced fuming fluoropolymer
The present invention relates to the reduction of oligomer content of melt-processible fluoropolymer so that the fluoropolymer has at least 25 ppm less oligomer than the as-polymerized fluoropolymer.
US08658738B2 Curable resin composition
A curable resin composition, comprising 100 parts by mass of a (meth)acrylic polymer (A) having, at a terminal thereof, at least one crosslinkable silyl group; 0.1 to 100 parts by mass of a diamine compound (B) having a monovalent or bivalent aliphatic or alicyclic hydrocarbon group that has 8 or more carbon atoms and may be branched and having at least one primary amino group; and 0.1 to 100 parts by mass of a diamine compound (C) having a monovalent aliphatic or alicyclic hydrocarbon group that has 8 or more carbon atoms and may be branched, and having a crosslinkable silyl group and/or a (meth)acryloyl group.
US08658735B2 Polymerizable monomer, graft copolymer, and surface modifier
The graft copolymer comprises a polymerizable monomer (A1) represented by general formula (III) and a polymerizable monomer (B1) containing a pyridyl group, and a ligand can be bonded via the functional group at the terminus of R3a. In the formula, R1a represents a polymerizable group, R2a represents an alkylene group having a carbon number of 2-5, R3a represents an organic group having at a terminus a functional group selected from among an azide group, a phenyl azide group, a carboxyl group, a primary to quaternary amino group, an acetal group, an aldehyde group, a thiol group, a disulfide group, an active ester group, a trialkoxysilyl group, and a polymerizable group, and n represents any integer from 5 to 20,000.
US08658731B2 Resin composition and molded product thereof
An object of the present invention is to provide a resin composition in which a surface resistivity and a volume resistivity actually measured in an antistatic region and an electrostatic diffusion region are equivalent to each other, and a remolded product produced by reutilizing a molded product which can hold the above properties. Specifically, disclosed is a resin composition comprising: 100 parts by weight of (a) a thermoplastic resin; 20 to 80 parts by weight of (b) a nonconductive fibrous inorganic filler having an average fiber diameter of not more than 15 μm; and 10 to 70 parts by weight of the total of (c1) a graphite and (c2) a graphite in which (c) graphite having an average particle diameter of 1 μm to 50 μm wherein each kind thereof has a different particle diameter; and at least one of differences in average particle diameter between two kinds thereof is not less than 5 μm.
US08658730B2 Rubber composition for tire, and pneumatic tire
The invention aims to provide a rubber composition for a tire which achieves a balanced improvement in the abrasion resistance under both low and high severity abrasion conditions, low heat build-up properties, and chipping resistance. The invention relates to a rubber composition for a tire, including: a rubber component containing 60% by mass or more of a natural rubber component; and a carbon black having a cetyltrimethylammonium bromide (CTAB) specific surface area of 140-160 m2/g, a ratio (CTAB/IA) of the cetyltrimethylammonium bromide specific surface area to an iodine adsorption number (IA) of 0.85-1 m2/g, and a ratio (ΔD50/Dst) of a half width (ΔD50) of Stokes' diameter distribution of aggregates to a Stokes' diameter (Dst) of aggregates, as determined by a centrifugal sedimentation method, of 0.9-0.99, the natural rubber component containing 20% by mass or more of highly purified natural rubber per 100% by mass of the natural rubber component.
US08658724B2 Copolyamides
What are described are a solution comprising a terpolymer formed from the monomers of components A, B and C, the total amount of which adds up to 100% by weight, a) 5 to 60% by weight of lactams as component A, b) 5 to 60% by weight of equimolar amounts of adipic acid and one or more aliphatic diamines as component B, c) 10 to 70% by weight of equimolar amounts of adipic acid and 4,4′-diaminodicyclohexylmethane (dicycan) as component C, in an aromatics-free solvent system comprising 50 to 100% by weight of C1-4-alkanol, 0 to 50% by weight of water and not more than 10% by weight of further aromatics-free solvents, where the total amount of the solvent system adds up to 100% by weight, and a terpolymer formed from the monomers of components A, B and C, the total amount of which adds up to 100% by weight, a) 15 to 40% by weight of lactams as component A, b) 20 to 45% by weight of equimolar amounts of adipic acid and one or more aliphatic diamines as component B, c) 25 to 60% by weight of equimolar amounts of adipic acid and 4,4′-diaminodicyclohexylmethane (dicycan) as component C, excluding terpolymers formed from 30 to 40% by weight of component A, 30 to 40% by weight of component B and 30 to 40% by weight of component C.
US08658721B2 Antifoaming agent for vinyl chloride resin slurry
Disclosed is an antifoaming agent for vinyl chloride resin slurry. The agent of the present invention may prevent generation of Fish eyes and deteriorate in production efficiency caused by slurry foams without inhibiting inherent transparency of vinyl chloride resins, in the process of preparing the vinyl chloride resins by polymerizing a monomer mixture containing vinyl chloride as a main component in a polymerization reactor.
US08658718B2 Molding material, use thereof, and process for producing molding material
A molding material of the present invention includes a polymer having a repeating structural unit whose part or whole contains an alicyclic structure, a phenolic stabilizer, a hindered amine light stabilizer and a phosphorus stabilizer, in which at least a part of the phenolic stabilizer and/or hindered amine light stabilizer is presently adhering to the surface of particles of the above polymer.
US08658716B2 Multilayer polymeric article having a metallic variegated look
The invention relates to extruded polymeric sheet and articles with an appearance and a texture that can be varied to produce natural-looking variegated materials, that have a metallic or opalescent look. The appearance can simulate natural materials, such as granite, minerals, stone, metal ore. The extruded polymer sheet or article contains at least one polymer composite appearance layer having crosslinked polymer particles and metallic and/or pearlescent materials distributed in a thermoplastic matrix. The thermoplastic matrix can be pigmented or unpigmented. There extruded sheet or article has a transparent thermoplastic cap layer on the side facing the environment. The particle-containing layer can be coextruded in a multi-layer sheet that could include substrate layers and the cap layer.
US08658714B2 Ecologically friendly composition containing beneficial additives
One embodiment is a composition comprising water; starch; natural fibrous materials; one or more additives to improve certain properties such as heat transfer, microbial resistance, scavenging activity or shelf life; a mold release agent; flavoring agents; coloring agents; and/or wax emulsions, proteins, or other natural polymeric compounds to adjust the product properties for particular applications.
US08658710B2 Oxidation-resistant and wear-resistant polyethylenes for human joint replacements and methods for making them
The present invention presents methods for making oxidation-resistant and wear-resistant polyethylenes and medical implants made therefrom. Preferably, the implants are components of prosthetic joints, e.g., a bearing component of an artificial hip or knee joint. The resulting oxidation-resistant and wear-resistant polyethylenes and implants are also disclosed.
US08658707B2 Expandable functional TFE copolymer fine powder, the expanded functional products obtained therefrom and reaction of the expanded products
A functional TFE copolymer fine powder is described, wherein the TFE copolymer is a polymer of TFE and at least one functional comonomer, and wherein the TFE copolymer has functional groups that are pendant to the polymer chain. The functional TFE copolymer fine powder resin is paste extrudable and expandable. Methods for making the functional TFE copolymer are also described. The expanded functional TFE copolymer material may be post-reacted after expansion.
US08658706B2 Organic superacid monomers containing a bis-sulfonic acid group and methods of making and using the same
One embodiment includes methods of adding two sulfonic acid groups to molecules having at least two cyclic groups.
US08658700B2 Treatment of CNS disorders with trans 4-(3,4-dichlorophenyl)-1,2,3,4-tetrahydro-1-napthalenamine
Treatment of CNS disorders with (1R,4S)-trans 4-(3,4-dichlorophenyl)-1,2,3,4-tetrahydro-1-napthalenamine; and (1S,4R)-trans 4-(3,4-dichlorophenyl)-1,2,3,4-tetrahydro-1-napthalenamine is disclosed. A process for preparing 4-(3,4-dichlorophenyl)-1,2,3,4-tetrahydro-1-napthalenamine is also disclosed. The process includes the preparation of all four isomers of N-[4-(3,4-dichlorophenyl)-1,2,3,4-tetrahydronaphthalen-1-yl]formamide, which are also useful.
US08658695B2 Disodium salts, monohydrates, and ethanol solvates for delivering active agents
The inventors have discovered that the disodium salt of certain delivery agents has surprisingly greater efficacy for delivering active agents than the corresponding monosodium salt. Furthermore, the inventors have discovered that the disodium salts of these delivery agents form solvates with ethanol and hydrates with water. Preferred delivery agents include, but are not limited to, N-(5-chlorosalicyloyl)-8-aminocaprylic acid (5-CNAC), N-(10-[2-hydroxybenzoyl]amino)decanoic acid (SNAD), and sodium N-(8-[2-hydroxybenzoyl]amino)caprylate (SNAC). The invention also provides methods of preparing the disodium salt, ethanol solvate, and hydrate and compositions containing the disodium salt, ethanol solvate, and/or hydrate.
US08658693B2 4-aminobenzonitrile selective androgen receptor modulators
The present invention provides novel selective androgen receptor modulators and their salts and pharmaceutical compositions thereof.
US08658689B2 Heterocyclic inhibitors of necroptosis
The invention features a series of heterocyclic derivatives that inhibit tumor necrosis factor alpha (TNF-α) induced necroptosis. The heterocyclic compounds of the invention are described by Formulas (I) and (Ia)-(Ie) and are shown to inhibit TNF-α induced necroptosis in FADD-deficient variant of human Jurkat T cells. The invention further features pharmaceutical compositions featuring the compounds of the invention. The compounds and compositions of the invention may also be used to treat disorders where necroptosis is likely to play a substantial role.
US08658686B2 Pyrazole compounds having therapeutic effect on multiple myeloma
Novel therapeutic agents for myeloma are provided.A therapeutic agent for multiple myeloma containing a pyrazole compound represented by the formula (1): wherein R1 is C1-C6 alkyl, C1-C6 alkyl substituted with R17, C1-C6 haloalkyl, phenyl, phenyl substituted with a R11's or the like, R2 is a hydrogen atom, C1-C6 alkyl, phenyl or phenyl optionally substituted with e R21's or the like, R3 is a hydrogen atom or the like, X is a single bond or —(CR6R7)n—, each of R4 and R5 is independently C1-C6 alkyl or the like, R6 and R7 are hydrogen atoms or C1-C6 alkyl, R8 is phenyl, phenyl optionally substituted with k R81's or the like, a tautomer of the compound or a pharmaceutically acceptable salt or solvate thereof, as an active ingredient.
US08658685B2 Methods for treatment of kallikrein-related disorders
We have identified classes of kallikrein inhibitors as compounds that are useful in the reduction of vascular permeability (e.g., retinal vascular permeability and cerebral vascular permeability) and astrocyte activation. Diseases and conditions associated with increased vascular permeability include diabetic retinopathy, hemorrhagic stroke, and macular edema. Diseases and conditions associated with astrocyte activation include Alzheimer's disease, multiple sclerosis, Parkinson's disease, amyotrophic lateral sclerosis, Creutzfeldt-Jakob disease, stroke, epilepsy, and brain trauma.
US08658684B2 Pharmaceutical composition and its use in the preparation of a medicament for the treatment of cerebrovascular diseases
A pharmaceutical composition comprises 3-methyl-1-phenyl-2-pyrazolin-5-one and borneol, and can be used to prepare the medicine for treating cerebrovascular diseases.
US08658682B2 (E)-1-(4-((1R,2S,3R)-1,2,3,4-tetrahydroxybutyl)-1H-imidazol-2-yl)ethanone dihydrate and methods of its use
(E)-1-(4-((1R,2S,3R)-1,2,3,4-tetrahydroxybutyl)-1H-imidazol-2-yl)-ethanone oxime dihydrate, compositions comprising it, and methods of its use are disclosed.
US08658677B2 Pyridyl-2-methylamino compounds, compositions and uses thereof
Compounds are provided according to formula I: where R, R′, R3, R4, R5, and R6 are as defined herein. Provided compounds and pharmaceutical compositions thereof are useful for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, Alzheimer's Disease, Down's syndrome, Parkinson's Disease, and others.
US08658676B2 Clevidipine emulsion formulations containing antimicrobial agents
Pharmaceutical formulations comprising clevidipine in an oil-in-water formulation that is resistant to microbial growth and stable against the formation of impurities.
US08658670B2 Methods and compounds for treatment of clostridium based infection
Methionyl tRNA synthetase inhibitors (MetRS) are provided for use in therapy as antibacterial agents in Clostridium based infection.
US08658662B2 Crystalline CDC7 inhibitor salts
The present invention relates to novel crystalline salts of a CDC7 or CDC7/CDKs inhibitor, to a novel crystal form of the corresponding free base, to a process for their preparation, to hydrates, solvates and polymorphs of such new salt forms, to their use in therapy and to pharmaceutical compositions containing them. Such crystal salts are selected from L-asparate, hemifumarate, hydrochloride, maleate, mesylate, sulfate, L-tartrate or phosphate salts of 5-(2-amino-pyrimidin-4-yl)-2-(2,4-dichloro-phenyl)-1H-pyrrole-3-carboxylic acid amide.
US08658659B2 Substituted oxazole derivatives and their use as tyrosine kinase inhibitors
The present invention relates to novel compounds selected from substituted oxazole derivatives of formula (I) that selectively modulate, regulate, and/or inhibit signal transduction mediated by certain native and/or mutant tyrosine kinases implicated in a variety of human and animal diseases such as cell proliferative, metabolic, allergic, and degenerative disorders. More particularly, these compounds are potent and selective c-kit, bcr-abl and Flt-3 inhibitors.
US08658656B2 Methods and compositions utilizing quinazolinones
Quinazolinones of formulae 1a, 1b, 1c and 1d are disclosed. They are useful for treating cellular proliferative diseases and disorders associated with KSP kinesin activity.
US08658655B2 Inhibition of activated cdc42-associated kinase 1
Compounds, compositions, and methods for specific inhibition of activated cdc42-associated kinase 1 (Ack1) are provided.
US08658653B2 Inhibitors of Bruton's tyrosine kinase
Disclosed herein are compounds, including compounds having the structure of Formula (A), (B), (C), and (D), as described in further detail herein, that form covalent bonds with Bruton's tyrosine kinase (Btk). Also described are irreversible inhibitors of Btk. Methods for the preparation of the compounds are disclosed. Also disclosed are pharmaceutical compositions that include the compounds. Methods of using the Btk inhibitors are disclosed, alone or in combination with other therapeutic agents, for the treatment of autoimmune diseases or conditions, heteroimmune diseases or conditions, cancer, including lymphoma, and inflammatory diseases or conditions.
US08658650B2 Substituted 1,1,3,1-tetraoxidobenzo[D][1,3,2]dithiazoles as MGLUR4 allosteric potentiators, compositions, and methods of treating neurological dysfunction
Compounds useful as allosteric potentiators/positive allosteric modulators of the metabotropic glutamate receptor subtype 4 (mGluR4) and methods of using the compounds.
US08658649B2 Kinase inhibitor
The invention is directed to a compound of formula (I): and the prodrugs, and pharmaceutically acceptable salts and solvates of such compounds and their prodrugs. Such a compound has valuable pharmaceutical properties, in particular the ability to inhibit protein kinases.
US08658646B2 Pyrrolopyrazine kinase inhibitors
The present invention relates to the use of novel pyrrolopyrazine derivatives of Formula I, wherein the variables are defined as described herein, which inhibit JAK and SYK and are useful for the treatment of auto-immune and inflammatory diseases.
US08658644B2 Pyridazine derivatives, processes for their preparation and their use as fungicides
The present invention relates to novel pyridazine derivatives of formula (I) wherein R1 is methyl or ethyl; R2 is H or chloro; R3 is fluoro or chloro; R4 is fluoro or methoxy; and R5 is chloro or methoxy or an agrochemically usable salt from thereof, as active ingredients which have microbiodidal activity, in particular fungicidal activity.
US08658643B2 Pyrimidinyl pyridazinone derivatives
Compounds selected from the group according to claim 1 are inhibitors of tyrosine kinases, in particular of Met kinase, and can be employed, inter alia, for the treatment of tumours.
US08658637B2 Glucocorticoid mimetics, methods of making them, pharmaceutical compositions and uses thereof
Compounds of Formula (IA) wherein R1, R2, R3, A, B, C, D, E, G, X, Y, and Z are as defined herein, or a tautomer, prodrug, solvate, or salt thereof; pharmaceutical compositions containing such compounds, and methods of modulating the glucocorticoid receptor function and methods of treating disease-states or conditions mediated by the glucocorticoid receptor function or characterized by inflammatory, allergic, or proliferative processes in a patient using these compounds.
US08658636B2 TRPV4 antagonists
The present invention relates to quinoline analogs, pharmaceutical compositions containing them and their use as TRPV4 antagonists.
US08658633B2 Methods and compositions for treating conditions of the eye
Provided are methods and compositions for treating ocular conditions characterized by the presence of unwanted choroidal neovasculature, for example, neovascular age-related macular degeneration. The selectivity and sensitivity of, for example, a photodynamic therapy (PDT)-based approach can be enhanced by combining the PDT with an ansamycin analog or heat shock protein 90 inhibitor, for example, 17-allylamino-17-demethoxygeldanamycin.
US08658630B2 Allergen depressant and depression method
The invention provides a means capable of effectively inactivating and removing allergen or a precursor thereof. The invention relates to an allergen-reducing agent containing water and a water-soluble polymer compound having units having hydroxy or carboxy groups wherein at least a part of hydrogen atoms of the hydroxy or carboxy groups are substituted by specific groups containing a polyether group.
US08658624B2 Pharmaceutical compositions for preventing and treating eye pathologies
The present invention relates to pharmacology, medicine, opthalmology, and, in particular, concerns a class of chemical compounds of structure (I) and also their solvates, isomers or prodrugs applicable when incorporated into pharmaceutical compositions also containing pharmaceutically acceptable carrier which can be useful for prophylaxis and treatment of different eye pathologies such as cataract and macular dystrophy.
US08658616B2 Nucleoside aryl phosphoramidates and their use as anti-viral agents for the treatment of hepatitis C virus
Compounds having the general formula (I): are provided which have enhanced inhibitory potency and are thus useful in methods of prophylaxis or treatment of a viral infection such as hepatitis C virus. The compounds are phosphoramidate derivatives of nucleoside compounds derived from bases such as adenine and guanine. The glycoside moiety of the nucleoside compound can be substituted at the ss-2′ position with methyl and the phosphoramidate group can be 1-naphthyl linked by —O— to the P atom. These compounds can be administered as pharmaceutical compositions, and methods for their preparation are also provided.
US08658610B2 Replication-competent anti-cancer vectors
Novel vectors which are replication competent in neoplastic cells and which overexpress an adenovirus death protein are disclosed. Some of the disclosed vectors are replication-restricted to neoplastic cells or to neoplastic alveolar type II cells. Compositions and methods for promoting the death of neoplastic cells using these replication-competent vectors are also disclosed.
US08658608B2 Modified triple-helix forming oligonucleotides for targeted mutagenesis
High affinity, chemically modified triplex-forming oligonucleotides (TFOs) and methods for use thereof are disclosed. TFOs are defined as triplex-forming oligonucleotides which bind as third strands to duplex DNA in a sequence specific manner. Triplex-forming oligonucleotides may be comprised of any possible combination of nucleotides and modified nucleotides. Modified nucleotides may contain chemical modifications of the heterocyclic base, sugar moiety or phosphate moiety. A high affinity oligonucleotide (Kd≦2×10−8) which forms a triple strand with a specific DNA segment of a target gene DNA is generated. It is preferable that the Kd for the high affinity oligonucleotide is below 2×10−10. The nucleotide binds or hybridizes to a target sequence within a target gene or target region of a chromosome, forming a triplex region. The binding of the oligonucleotide to the target region stimulates mutations within or adjacent to the target region using cellular DNA synthesis, recombination, and repair mechanisms. The mutation generated activates, inactivates, or alters the activity and function of the target gene.
US08658607B2 Immunostimulatory G, U-containing oligoribonucleotides
Compositions and methods relating to immunostimulatory RNA oligomers are provided. The immunostimulatory RNA molecules are believed to represent natural ligands of one or more Toll-like receptors, including Toll-like receptor 7 (TLR7) and Toll-like receptor 8 (TLR8). The compositions and methods are useful for stimulating immune activation. Methods useful for screening candidate immunostimulatory compounds are also provided.
US08658601B2 Peptides and nanoparticles for therapeutic and diagnostic applications
Provided herein are peptides and nanoparticles conjugates thereof useful for the treatment of diseases and disorders mediated by GIPC/synectin, such as cancer.
US08658599B2 Peptide for the prophylactic or therapeutic treatment of skin tumors in initial stages
A method to inhibit the formation of skin tumors at early stages and their subsequent progression to carcinoma in a mammal is described, the method including the topical application to the mammal's skin of a composition that includes a therapeutically effective amount of disitertide, together with pharmaceutically acceptable carriers or diluents.
US08658597B2 Stabilised compositions of factor VII polypeptides
The invention relates to chemically as well as physically stable kits and compositions comprising polypeptides, in particular Factor VII or Factor VII-related polypeptides, such that these compositions can be stored, handled and used at room temperature.
US08658594B2 Peptide inhibitors of protein kinase C
PKC V5 isozyme-specific peptides are described. The sequences and compositions comprising the sequences are useful for treating disease states associated with the PKC isozyme from which they are respectively derived. Methods of treatment, pharmaceutical formulations and methods of identifying compounds that mimic the activity of the peptides are also described.
US08658591B2 Multi-LEU peptides and analogues thereof as selective PACE4 inhibitors and effective antiproliferative agents
Disclosed herein are PACE4 inhibitors, compositions comprising PACE4 inhibitors and their uses thereof for lowering PACE4 activity, reducing cell proliferation, reducing tumor growth, reducing metastasis formation, preventing and/or treating cancer. Also provided are methods for lowering PACE4 activity, reducing the proliferation of a cell, reducing tumor growth and/or treating and preventing cancer. Methods for screening PACE4 inhibitors and cell proliferation inhibitors are further provided.
US08658584B2 Sulfosuccinate functionalized alkyl polyglucosides for enhanced food and oily soil removal
A cleaning composition including a sulfosuccinate functionalized alkyl polyglucoside, a water conditioning agent and water. In one embodiment, the cleaning composition is substantially free of alkyl phenol ethoxylates. The cleaning composition is capable of removing soils including up to 20% proteins. The cleaning compositions include a biorenewable, environmentally friendly alternative to nonyl phenol ethoxylates and exhibit superior cleaning of food and oily soils.
US08658582B2 Clear cosmetic compositions containing lipophilic materials
The present invention is directed toward a composition comprising: (a) at least one alkoxylated monoamine; (b) at least one alkoxylated monoacid; (c) at least one lipophilic compound; (d) at least one surfactant; (e) optionally, at least one auxiliary ingredient; and (f) at least one cosmetically acceptable carrier; wherein the ratio by weight of (b):(a) is greater than 1 and wherein the ratio by weight of (a)+(b):(c) is greater than 2. The present invention also relates to methods for cleansing and conditioning keratinous substrates. The methods can provide hair with improved shine, condition, manageability, and styling ability.
US08658578B2 Lubricating oil composition and method for manufacturing the same
The disclosure provides a lubricating oil composition and method for manufacturing the same. The lubricating oil composition substantially consists of a base lubricant oil, and an organic-inorganic composite particle uniformly dispersed in the base lubricant oil. This lubricating oil composition is applicable to a sliding section or sliding member of an automotive internal combustion engine or power transmission apparatus to significantly reduce friction coefficient, temperature of oil and wear rate.
US08658574B2 Treatment and reuse of oilfield produced water for operations in a well
The invention discloses method of treatment and reuse of oilfield produced water. The method comprises: providing an aqueous medium comprised at least in part of oilfield produced water; contacting the aqueous medium with a zirconium compound; whereby the fluid viscosity and/or fluid drag reduction ability of the combination of the aqueous medium and zirconium compound is improved compared to the aqueous medium alone; introducing the combination in to the well; and allowing the combination to contact the formation. In another embodiment, the aqueous medium is further contacted by a friction-reduction additive. Still in another embodiment, the aqueous medium is further contacted by a gelling additive. Still in another embodiment, the fluid is energized with a gas.
US08658573B2 Photo-generated carbohydrate arrays and the rapid identification of pathogen-specific antigens and antibodies
The invention relates to novel photo-generated carbohydrate arrays and methods of their use to detect the presence of one or more agents in a sample. The invention also relates to a high-throughput strategy to facilitate the identification and immunological characterization of pathogen-specific carbohydrates, including those of Bacillus anthracis. The invention can be used to determine the presence of a pathogen and whether a subject has been exposed to a pathogen, such as by screening for pathogen-specific antibodies.
US08658572B2 Whole proteome tiling microarrays
The present invention relates to a microarray comprising at least 50,000 oligopeptide features per cm2 where the oligopeptide features represent at least 50%, 60%, 70%, 80%, 90%, 95%, 99%, or 100% of the proteome of a virus or an organism. The present invention further relates to methods for the synthesis of such microarrays and methods of using microarrays comprising at least 50,000 oligopeptide features per cm2. In an embodiment of the invention, the oligopeptide features represent proteins expressed in the same species, wherein the oligopeptide features are presented in a tiling pattern representing at least about 5,000 to-at least about 25,000 proteins expressed in a species. In some embodiments, the oligopeptide microarray features represent proteins expressed in the same species, wherein the microarray features are present in a tiling pattern that represents at least about 5,000 to at least about 50,000 expressed proteins.
US08658570B2 Use of anthranilamide derivatives for controlling insects and spider mites by drenching, soil mixing, furrow treatment, drip application, soil, stem or flower injection, in hydroponic systems, by planting hole treatment or dip application, floating or seedbox application or by treating seed, and also for enhancing the stress tolerance of plants to abiotic stress
The present invention relates to the use of anthranilamide derivatives of the general formula (I) —in which R1, R2, R3, R4, R5, A, X, Qx, Qy and n have the general meanings given in the description—for controlling insects and/or spider mites by drenching, soil mixing, furrow treatment, droplet application, in hydroponic systems, by planting hole treatment, soil, stem or flower injection, dip application, floating or seedbox application or by treating seed, and also for enhancing the stress tolerance of plants to abiotic stress.
US08658561B2 Layered solid sorbents for carbon dioxide capture
A solid sorbent for the capture and the transport of carbon dioxide gas is provided having at least one first layer of a positively charged material that is polyethylenimine or poly(allylamine hydrochloride), that captures at least a portion of the gas, and at least one second layer of a negatively charged material that is polystyrenesulfonate or poly(acryclic acid), that transports the gas, wherein the second layer of material is in juxtaposition to, attached to, or crosslinked with the first layer for forming at least one bilayer, and a solid substrate support having a porous surface, wherein one or more of the bilayers is/are deposited on the surface of and/or within the solid substrate. A method of preparing and using the solid sorbent is provided.
US08658542B2 Coarse grid design methods and structures
A layer of a mask material is deposited on a substrate. A beam of energy is scanned across the mask material in a rasterized linear pattern and in accordance with a scan pitch that is based on a pitch of conductive structure segments to be formed on the substrate. The beam of energy is defined to transform the mask material upon which the beam of energy is incident into a removable state. During scanning the beam of energy across the mask material, the beam of energy is turned on at locations where a conductive structure is to be formed on the substrate, and the beam of energy is turned off at locations where a conductive structure is not to be formed on the substrate.
US08658541B2 Method of controlling trench microloading using plasma pulsing
Methods and apparatus for controlling microloading, such as within cell microloading between adjacent cells or isolated/dense microloading between areas of isolated or dense features during shallow trench isolation (STI) fabrication processes, or other trench fabrication processes, are provided herein. In some embodiments, a method for fabricating STI structures may include providing a substrate having a patterned mask layer formed thereon corresponding to one or more STI structures to be etched; etching the substrate through the patterned mask layer using a plasma formed from a process gas to form one or more STI structure recesses on the substrate; and pulsing the plasma for at least a portion of etching the substrate to control at least one of a depth or width of the one or more STI structure recesses.
US08658540B2 Methods for low temperature conditioning of process chambers
Methods for removing residue from interior surfaces of process chambers are provided herein. In some embodiments, a method of conditioning interior surfaces of a process chamber may include maintaining a process chamber at a first pressure and at a first temperature of less than about 800 degrees Celsius; providing a process gas to the process chamber at the first pressure and the first temperature, wherein the process gas comprises chlorine and nitrogen to remove residue disposed on interior surfaces of the process chamber; and increasing the pressure in the process chamber from the first pressure to a second pressure while continuing to provide the process gas to the process chamber.
US08658537B2 Mask manufacturing method for nanoimprinting
According to one embodiment, a mask manufacturing method includes acquiring positional deviation information between an actual position of a pattern formed on a mask substrate and a design position decided at the time of designing the pattern; calculating an irradiating amount and an irradiating position of radiation to be irradiated to a predetermined area of a square on the mask substrate according to the calculated positional deviation information; and irradiating the radiation based on the calculated irradiating amount and the calculated irradiating position to form in a part of the mask substrate a heterogeneous layer of which volume is expanded more greatly than that of the surrounding mask substrate region.
US08658536B1 Selective fin cut process
A process is provided for selective removal of one or more unwanted fins during FINFET device fabrication. In one aspect, the process includes: providing a conformal protective layer over multiple fin structures on a substrate; patterning one or more openings over the unwanted fin structure(s); and removing at least a top portion of the unwanted fin structure(s) exposed through the opening(s), the removing including removing at least a portion of the conformal protective layer over the unwanted fin structure(s) exposed through the opening(s). In enhanced aspects, the removing includes removing a hard mask from the at least one unwanted fin structure(s) exposed through the opening(s), and selectively removing semiconductor material of at least one unwanted fin structure(s). The conformal protective layer protects one or more remaining fin structures during the selective removal of the semiconductor material of the unwanted fin structure(s).
US08658526B2 Methods for increased array feature density
A method is provided that includes forming completely distinct first features above a substrate, forming sidewall spacers on the first features, filling spaces between adjacent sidewall spacers with filler features, and removing the sidewall spacers. Numerous other aspects are provided.
US08658520B2 Method of manufacturing semiconductor device
According to one embodiment, a method of manufacturing a semiconductor device includes forming a gate electrode on a channel region in a silicon substrate via a gate insulation film; forming a source region and a drain region in the silicon substrate so as to sandwich the channel region along a channel direction by injecting desired impurities to the silicon substrate; forming amorphous regions containing the impurities on surfaces of the source region and the drain region by amorphousizing the surfaces of the source region and the drain region; forming nickel films on the amorphous regions; and forming crystal layers containing the activated impurities and forming nickel silicide films on the crystal layers at low temperature by radiating microwaves to the amorphous regions and the nickel films.
US08658518B1 Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices
A method of fabricating a nanowire FET device includes the following steps. A SOI wafer is provided having a SOI layer over a BOX. Nanowires and pads are etched in the SOI layer. The nanowires are suspended over the BOX. An interfacial oxide is formed surrounding each of the nanowires. A conformal gate dielectric is deposited on the interfacial oxide. A conformal first gate material is deposited on the conformal gate dielectric. A work function setting material is deposited on the conformal first gate material. A second gate material is deposited on the work function setting material to form at least one gate stack over the nanowires. A volume of the conformal first gate material and/or a volume of the work function setting material in the gate stack are/is proportional to a pitch of the nanowires.
US08658517B2 Method of manufacturing GaN-based film
The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in a main surface is more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a side of the main surface of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
US08658516B2 Method of producing silicon wafer, epitaxial wafer and solid state image sensor, and device for producing silicon wafer
An object of the present invention is to provide a method of producing a silicon wafer and a method of producing an epitaxial wafer, which enable easily forming a gettering site in a relatively short period of time and effectively suppressing occurrence of dislocation induced by internal stresses. Specifically, the present invention provides a method of producing a silicon wafer, comprising: irradiating a first laser beam having a relatively long wavelength and a second laser beam having a relatively short wavelength onto a portion of a silicon wafer located at a predetermined depth measured from a surface of the silicon wafer, wherein the first laser beam is concentrated at a portion located at a predetermined depth of the wafer to form a process-affected layer for gettering heavy metals thereat, the second laser beam is concentrated at a beam-concentration portion in the vicinity of the surface of the wafer to melt the beam-concentration portion, the beam-concentration portion is then recrystallized.
US08658512B2 Method for forming MEMS variable capacitors
A method for fabricating an out-of-plane variable overlap MEMS capacitor comprises: providing a substrate (40) comprising a first layer (41), a second layer (42), and a third layer (43) stacked on top of one another; and etching a plurality of first trenches (70) through the third layer (43), through the second layer (42), and into the first layer (41) using a single etching mask. Etching the plurality of first trenches (70) defines a plurality of first fingers (51) in the third layer (43) and a plurality of second fingers (52) in the first layer (41). By using a single mask, the process is self-aligned. The method further comprises removing the second layer (42) in a first region where the plurality of first trenches (70) are provided, thereby forming a spacing or gap between the plurality of first fingers (51) and the plurality of second fingers (52).
US08658511B1 Etching resistive switching and electrode layers
Provided are methods for etching resistive switching and electrode layers in resistive random access memory (ReRAM) cells. Both types of layers are etched in the same operation. This approach simplifies processing in comparison to conventional etching, in which each layer is etched individually. The composition of etchants and process conditions are specifically selected to provide robust and effective etching of both types of layers. The two etching rates may be comparable and may be substantially the same, in some embodiments. Plasma etching involving tri-fluoro-methane and oxygen containing etchants may be used on electrode materials, such as titanium nitride, platinum, and ruthenium, and on resistive switching materials, such as oxides of transition metals. For example, a combination of titanium nitride and hafnium oxide may be etched using such processes. In some embodiments, an etched stack includes a third layer, which may function as a current limiter in ReRAM cells.
US08658508B2 Method for manufacturing SOI substrate
The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.
US08658507B2 MOSFET structure and method of fabricating the same using replacement channel layer
There is provided a MOSFET structure and a method of fabricating the same. The method includes: providing a semiconductor substrate; forming a dummy gate on the semiconductor substrate; forming source/drain regions; selectively etching the dummy gate to a position where a channel is to be formed; and epitaxially growing a channel layer at the position where the channel is to be formed and forming a gate on the channel layer, wherein the channel layer comprises a material of high mobility. Thereby, the channel of the device is replaced with the material of high mobility after the source/drain region is formed, and thus it is possible to suppress the short channel effect and also to improve the device performance.
US08658504B2 Method for manufacturing semiconductor device
According to one embodiment, a method for manufacturing a semiconductor device includes forming a depression in an upper portion of a semiconductor substrate, placing a sacrificial material in the depression, forming a plurality of fins extending in one direction and arranged periodically by selectively removing the semiconductor substrate and the sacrificial material, forming a device isolation insulating film in a lower portion of space between the fins, removing the sacrificial material, forming a gate insulating film on an exposed surface of the fin, and forming a gate electrode. The gate electrode extends in a direction crossing the one direction so as to straddle the fin on the device isolation insulating film.
US08658500B2 Single crystal U-MOS gates using microwave crystal regrowth
Semiconductor devices and methods for making such devices are described. The UMOS semiconductor devices contain single-crystal gates that have been re-grown or formed at low temperature using microwaves. The devices can be formed by providing a semiconductor substrate, forming a trench in the substrate, forming an insulating layer in the trench, depositing a pre-gate layer on the insulating layer, the pre-gate layer comprising a conductive and/or semiconductive material (Si or SiGe) with a non-single crystal structure, contacting the pre-gate layer with a seed layer with a single-crystal structure, and heating the pre-gate layer using microwaves at low temperatures to recrystallize the non-single crystal structure into a single-crystal structure. These processes can improve the resistance and mobility of the gate either as a single crystal structure, optionally with a silicide contact above the source-well junction, enabling a higher switching speed UMOS device. Other embodiments are described.
US08658495B2 Method of fabricating erasable programmable single-poly nonvolatile memory
The present invention provides a method of fabricating an erasable programmable single-poly nonvolatile memory, comprising the steps of: defining a first area and a second area in a first type substrate; forming a second type well region in the first area; forming a first gate oxide layer and a second gate oxide layer covering a surface of the first area, wherein the second gate oxide layer extends to and is adjacent to the second area; forming a DDD region in the second area; etching a portion of the second gate oxide layer above the second area; forming two polysilicon gates covering the first and the second gate oxide layers; and defining a second type doped region in the DDD region and defining first type doped regions in the second type well region.
US08658493B2 Manufacturing method of semiconductor device
An aluminum oxide film covering a ferroelectric capacitor is formed. Next, an opening (51t) where a portion of a top electrode is exposed and an opening (51b) where a portion of a bottom electrode is exposed are formed in the aluminum oxide film. Thereafter, films (23 to 26) are formed and a resist pattern (92) is formed. Then, etching of the films (23 to 26) is performed with using the resist pattern (92) as a mask thereby forming contact holes (27t) and (27b). At this time, since the openings (51t) and (51b) are formed in the aluminum oxide film, the aluminum oxide film is not required to be processed. Consequently, the contact holes (27t) and (27b) can be formed easily.
US08658492B2 Semiconductor power device integrated with ESD protection diodes
A semiconductor power device integrated with ESD protection diode is disclosed by offering a dopant out-diffusion suppression layers prior to source dopant activation or diffusion to enhance ESD protection capability between gate and source.
US08658486B2 Forming facet-less epitaxy with a cut mask
A method of forming a semiconductor structure on a substrate is provided. The method may include preparing a continuous active layer on a region of the substrate and depositing a first raised epitaxial layer on a first region of the continuous active layer. A second raised epitaxial layer is also deposited on a second region of the continuous active layer such that the first raised epitaxial layer is in close proximity to the second raised epitaxial layer. A mask may be used to etch a trench structure into the continuous active layer at both the first and the second raised epitaxial layer, whereby the etched trench structure is filled with isolation material for electrically isolating the first raised epitaxial layer from the second raised epitaxial layer.
US08658484B2 Semiconductor carbon nanotubes fabricated by hydrogen functionalization and method for fabricating the same
Semiconductor carbon nanotubes functionalized by hydrogen and a method for fabricating the same, wherein the functional hydrogenated semiconductor carbon nanotubes have chemical bonds between carbon and hydrogen atoms. The semiconductor carbon nanotube fabricating method includes heating carbon nanotubes in a vacuum, dissociating hydrogen molecules in hydrogen gas into hydrogen atoms, and exposing the carbon nanotubes to the hydrogen gas to form chemical bonds between carbon atoms of the carbon nanotubes and the hydrogen atoms. The conversion of metallic carbon nanotubes into semiconductor nanotubes and of semiconductor nanotubes having a relatively narrow energy bandgap into semiconductor nanotubes having a relative wide energy bandgap can be achieved using the method. The functional hydrogenated semiconductor carbon nanotubes may be applied and used in, for example, electronic devices, optoelectronic devices, and energy storage.
US08658481B2 Method for manufacturing semiconductor device
A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.
US08658467B2 Method of manufacturing stacked wafer level package
A method of manufacturing a stacked wafer level package includes: preparing a substrate; forming a conductive layer on the substrate; forming chip connection pads and internal connection pads on the conductive layer; forming solder balls connected to the internal connection pads; mounting a semiconductor chip on the conductive layer to be connected to the chip connection pads; forming a sealing member to seal the solder balls and the semiconductor chip; separating the substrate from the conductive layer; forming a rearrangement wiring layer by etching the conductive layer; forming an external connection on the rearrangement wiring layer; forming contact holes in the sealing member to expose the solder balls; and stacking an electronic component to be electrically connected to the solder balls exposed through the contact holes.
US08658464B2 Mold chase design for package-on-package applications
A method includes placing a mold chase over a bottom package, wherein the bottom package has a connector at a top surface of the bottom package. The mold chase includes a cover, and a pin under and connected to the cover. The pin occupies a space extending from a top surface of the connector to the cover. A polymer is filled into a space between the cover of the mold chase and the bottom package. The polymer is then cured. After the step of curing the polymer, the mold chase is removed, and the connector is exposed through an opening in the polymer, wherein the opening is left by the pin of the mold chase.
US08658462B2 Method of forming TiO2 array using ZnO template
Provided is a method of forming a method of forming a titanium dioxide (TiO2) array using a zinc oxide (ZnO) template. In the method, polymer nanopatterns are formed on the substrate, and monomolecular monolayers are formed between the polymer nanopatterns on the substrate. A seed layer pattern is formed between the monomolecular monolayers on the substrate, and a zinc oxide template is formed by growing zinc oxide on the seed layer.
US08658460B2 Organic light-emitting display device and method of manufacturing the same
A method of manufacturing an organic light-emitting display device includes forming a gate electrode including a lower gate electrode on a gate insulating layer and an upper gate electrode on the lower gate electrode; forming a source region and a drain region at a semiconductor active layer using the gate electrode as a mask; forming an interlayer insulating layer on a substrate and etching the interlayer insulating layer, resulting in contact holes that expose portions of the source region and the drain region; forming a source/drain electrode raw material on the substrate and etching the source/drain electrode raw material to form a source electrode and a drain electrode; forming a gold overlapped lightly doped drain (GOLDD) structure having a LDD region at the semiconductor active layer by injecting impurity ions; depositing a protective layer on the substrate; and forming a display device on the substrate.
US08658459B2 Compound and method of producing organic semiconductor device
A method of producing an organic semiconductor device is provided in which a layer composed of an organic semiconductor having excellent crystallinity and orientation in a low-temperature region can be formed, and the device can be produced in the air. The method includes forming a layer composed of an organic semiconductor precursor on a base body and irradiating the organic semiconductor precursor with light, wherein the organic semiconductor precursor is a porphyrin compound or an azaporphyrin compound having in its molecule at least one of the structure represented by the following general formula (1) or (2):
US08658457B2 Method of producing semiconductor device, solid-state imaging device, method of producing electric apparatus, and electric apparatus
There is provided a method of producing a semiconductor device. The method includes the steps of: forming a first hard mask having an opening above a substrate; forming a sacrificial film above a side surface of the opening of the first hard mask; forming a second hard mask in the opening having the sacrificial film above the side surface; removing the sacrificial film after the second hard mask is formed; ion implanting a first conductivity-type impurity through the first hard mask; and ion implanting a second conductivity-type impurity through the first and second hard masks.
US08658456B2 Micro-electro-mechanical system tiltable lens
A tiltable micro-electro-mechanical (MEMS) system lens comprises a microscopic lens located on a front surface of a semiconductor-on-insulator (SOI) substrate and a semiconductor rim surrounding the periphery of the microscopic lens. Two horizontal semiconductor beams located at different heights are provided within a top semiconductor layer. The microscopic lens may be tilted by applying an electrical bias between the lens rim and one of the two semiconductor beams, thereby altering the path of an optical beam through the microscopic lens. An array of tiltable microscopic lenses may be employed to form a composite lens having a variable focal length may be formed. A design structure for such a tiltable MEMS lens is also provided.