| Document | Document Title |
|---|---|
| US08644385B2 |
Method and apparatus for encoding video in consideration of scanning order of coding units having hierarchical structure, and method and apparatus for decoding video in consideration of scanning order of coding units having hierarchical structure
A method and apparatus for decoding a video and a method and apparatus for encoding a video are provided. The method for decoding the video includes: receiving and parsing a bitstream of an encoded video; extracting, from the bitstream, encoded image data of a current picture of the encoded video assigned to a maximum coding unit, and information about a coded depth and an encoding mode according to the maximum coding unit; and decoding the encoded image data for the maximum coding unit based on the information about the coded depth and the encoding mode for the maximum coding unit, in consideration of a raster scanning order for the maximum coding unit and a zigzag scanning order for coding units of the maximum coding unit according to depths. |
| US08644382B2 |
Image encoding device, image encoding method, image decoding device, image decoding method, program, and storage medium
A prediction set determining section (13) selects a prediction set from a prediction set group including a plurality of prediction sets having different combinations of prediction modes corresponding to different prediction directions. Further, a prediction mode determining section (11) selects a prediction mode from the prediction set thus selected. An entropy encoding section (4) encodes the prediction set thus selected, the prediction mode thus selected, and residual data between an input image and a predicted image formed on the basis of the prediction set and the prediction mode. This allows an image encoding device to carry out predictions from more various angles, thereby improving prediction efficiency. |
| US08644381B2 |
Apparatus for reference picture resampling generation and method thereof and video decoding system using the same
The exemplary embodiments of the present invention are direct to a method for generating a resampling reference picture and an apparatus and video decoding system using this method. The video image decoding system is used to decode a bit stream, so as to obtain a current frame. The method for generating a resampling reference picture includes following steps: (a) looking ahead specific information of next x frames of the current frame in the bit stream; (b) determining whether to generate a resampling reference picture according to the specific information of the next x frames. |
| US08644377B2 |
System and method for embedding data in video
Apparatus and method for embedding data in initial content having synchronized video and audio, the method comprising defining at least one content segment in the initial content, and altering the video and audio synchronization in the at least one segment in accordance with the data to be embedded, wherein the altered content segment is viewable on a viewing device and the synchronization alteration is imperceptible to a casual viewer. Related apparatus and methods are also described. |
| US08644375B2 |
Methods and systems for intra prediction
Aspects of the present invention relate to systems and methods for intra prediction. According to one aspect of the present invention, a macroblock may be partitioned into two, or more, sets of blocks. The pixel values for a block within a first set of blocks may be predicted using reconstructed values from only neighboring macroblocks. The pixel values for a block within another set of blocks may be subsequently predicted using reconstructed values from blocks in previously reconstructed sets of blocks and/or reconstructed values from neighboring macroblocks. The block residuals for the first set of blocks may be signaled, and the block residuals for subsequently predicted blocks may be signaled. The pixel values for blocks within a set of blocks may be predicted in parallel. |
| US08644369B1 |
Equalizer adaptation for heavily compressed or clipped communications signals
Apparatus and methods generate equalizer coefficients for an equalizer of a receiver. In a high-speed receiver, received symbols can be subject to inter-symbol-interference (ISI). An equalizer can compensate for ISI and improve a bit error rate (BER). However, traditional adaptive techniques to generate coefficients for equalization can generate corrupted coefficients when equalized samples used for adaptation are based on clipped or heavily compressed signals. In certain situations, the clipping rate can be relatively high, such as over 20%. Equalizer performance is improved when the equalized symbols used directly or indirectly for adaptation are selected such that equalized symbols based on clipped input samples are not used for adaptation. |
| US08644368B1 |
Transparent implicit beamforming in a communication system
A method for beamforming in a multiple input, multiple output (MIMO) communication system includes receiving a non-sounding data unit, where the non-sounding data unit does not include an indication that the data unit is for estimating a MIMO communication channel, developing an estimate of a reverse channel in which the non-sounding data unit travels based on the non-sounding data unit, developing an estimate of a forward channel based on the estimate of the reverse channel, and developing a steering matrix to perform beamforming in the forward channel based on the estimate of the forward channel. |
| US08644364B2 |
Method and system for computing a cell normalization factor by sharing arithmetic units in a rake receiver to reduce overall implementation area
A mobile device receives downlink transmissions comprising replicas of an original downlink transmitted signal over corresponding fingers of a RAKE receiver comprising arithmetic units. The RAKE receiver computes a cell normalization factor for each of active cells and neighbor cells associated with the RAKE receiver. The RAKE receiver uses the same arithmetic units comprising one adder, one multiplier, one divider and/or one square root unit to compute cell normalization factors. The received downlink transmitted signal is processed using the computed cell normalization factors. The RAKE receiver determines signal power from each of other cells, separately, to compute cell normalization factors to normalize fingers of the RAKE receiver. Interference over the normalized fingers are cancelled and used to process the received downlink transmitted signal, which are combined and Turbo decoded. Phase correction is performed over interference cancelled fingers for active cells, but need not be performed for neighbor cells. |
| US08644363B2 |
Apparatus and method for estimating channel in MIMO system based OFDM/OFDMA
The present invention relates to an apparatus and method for estimating a channel in a MIMO wireless telecommunication system supporting the 0FDM/0FDMA. The present invention, in estimating a channel by using two or more pilots included in at least one received signal among received signals of a first channel and a second channel received through a first receiving antenna and received signals of a third channel and a fourth channel received through a second receiving antenna, determines a subchannel mapping rule respectively for the received signals of the first channel to the fourth channel, and estimates a channel with a different method according to the determined subchannel mapping rule. That is, the channel is estimated by using two or more pilots included in two or more tiles corresponding to the same subcarrier respectively, in case a subchannel rotation does not exist in the subchannel mapping rule, while the channel is estimated by using two pilots included in an individual tile, in case a subchannel rotation exists in the subchannel mapping rule. |
| US08644360B2 |
System and method for transmitting and receiving ultra wide band pulse or pulse sequence
The present invention provides a method for transmitting and receiving ultra wide band (UWB) signals. By this method, application systems such as wireless UWB communication, wireless UWB positioning and UWB target detecting radar can be achieved. In this method, an UWB device periodically generates pulse signals. In each pulse repetition period, an output signal can be a positive-polarity pulse (positive pulse), or a negative-polarity pulse (negative pulse), or an empty signal (empty signal) without any change. A method of UWB device controlling the output signal to shift between the positive pulse, negative pulse and empty signal is very simple and easy to implement. A transmitter can transmit any variable pulse sequence (the arranging order of the positive pulse, negative pulse and empty signal; the length of the sequence). One or more definite pulse sequences are used to constitute wireless information frame according to certain rules, and functions such as communications, positioning and target detection between one or more transmitters and one or more receivers can be realized. The prevent invention provides a method for generating UWB signals, as well as a low-cost and a high-performance UWB signal receiving method. According to the UWB signal generating and receiving method disclosed in the present invention, the system can very conveniently change (by software control) a central frequency and signal bandwidth of the UWB signals, and therefore can satisfy application requirements in different fields. A plurality of such transceivers can simultaneously work at the same waveband or different wavebands. |
| US08644359B1 |
High power quantum dot optical light source
A system comprising a multiplicity of quantum dot lasers disposed on a back surface of a control circuit, wherein each of the quantum dot lasers produces coherent light; a multiplicity of micro-lens collimators, each micro-lens collimator secured to a corresponding quantum dot laser, where light generated by the quantum dot laser passes through the fiber and exits at the tip; a diffraction grating, wherein the light from each of the micro-lens collimators is directed to the diffraction grating; and wherein the coherent light leaving the diffraction grating is a high powered optical light. |
| US08644353B2 |
Packet flow side channel
A packet flow side channel encoder and decoder embeds and extracts a side channel communication in an overt communication data stream transmitted over a network. The encoder selects more than one group of related packets being transmitted on the network, relates a packet of one group to a packet of another group to form a pair of packets; and delays the timing of at least one packet from each pair of packets The decoder determines inter-packet delays that are the difference in timing between two packets in a pair of packets; determines at least one inter-packet delay difference between two or more determined inter-packet delays; and extracts a bit using the at least one interpacket delay difference. |
| US08644352B1 |
System and method for accurate time sampling in presence of output delay
A system and method for accounting for delay to accurately schedule a data packet for transmission between communicating devices. According to an aspect of the invention, a data packet to be scheduled is identified and the packet modified time, reflecting an estimation of the transmission time of the packet, and the scheduled transmission time, reflecting the time the packet should be scheduled to be transmitted, are calculated. A time stamp in the packet is adjusted to reflect the packet modified time and the packet is stored until either the packet modified time or the scheduled transmission time, when the packet is then transmitted. |
| US08644351B2 |
Node device
There is provided a node device having a plurality of transmission lines, included in a network, the node device including a first clock extracting section configured to extract a clock from a first packet used for synchronization of a clock in the node device, the first packet being received from the network through the transmission line, a second clock extracting section configured to extract a clock from a signal received from the network through the transmission line, and a clock selector to select a clock out of the clock extracted by the first clock extracting section and the clock extracted by the second clock extracting section, wherein the clock selected by the clock selector is used for synchronization of a clock in the node device. |
| US08644348B2 |
Method for generating a robust timing correction in timing transfer systems
High accuracy timing over packet networks is achieved by generating correction factors from multiple separation intervals and timing information contained in packets in both directions between a master and a slave. The methods are based on evaluating the weighted average of short-term, medium-term, and long-term measurements of local clock offset. Weighted averages are used to develop robust correction terms that are modified with an α-shaping factor to provide additional immunity to packet network instabilities. |
| US08644346B2 |
Signal demultiplexing device, signal demultiplexing method and non-transitory computer readable medium storing a signal demultiplexing program
Provided is a signal demultiplexing system that can minimize losses in demultiplexing performance even if signals unsuited to demultiplexing are inputted. The provided signal demultiplexing device contains: an input signal analysis means for determining whether or not a plurality of input signals are suited to demultiplexing; a data memory means for storing data from frequency-domain input signals which result from transformation of the aforementioned input signals into frequency-domain signals; a selection control means for storing the frequency-domain input signals in the data memory means if the input signal analysis means has determined that the input signals are suited to the generation of a demultiplexing matrix for demultiplexing; and a demultiplexing matrix generation means for generating a demultiplexing matrix using frequency-domain input signals including the most recent and older frequency-domain input signals stored in the data memory means. |
| US08644344B2 |
Apparatus and method for coding an information signal into a data stream, converting the data stream and decoding the data stream
More customization and adaptation of coded data streams may be achieved by processing the information signal such that the various syntax structures obtained by pre-coding the information signal are placed into logical data packets, each of which being associated with a specific data packet type of a predetermined set of data packet types, and by defining a predetermined order of data packet types within one access unit of data packets. The consecutive access units in the data stream may, for example, correspond to different time portions of the information signal. By defining the predetermined order among the data packet types it is possible, at decoder's side, to detect the borders between successive access units even when removable data packets are removed from the data stream on the way from the data stream source to the decoder without incorporation of any hints into the reminder of the data stream. |
| US08644338B2 |
Unbundling packets received in wireless communications
Systems and methodologies are described that facilitate unbundling and processing partial packet data units (PDU). PDUs can be transmitted at a communication layer and can include partial PDUs of a disparate communication layer. Complete SDUs can be determined in the partial PDU and provided to an upper communication layer. In addition, however, the partial PDU can comprise a partial SDU. Upon receiving a remaining or additional portion of the partial PDU, a remaining or additional portion of the partial SDU can be combined with the partial SDU to create a complete SDU (or a larger portion thereof). Where a complete SDU is created, it can be provided to an upper communication layer. Alternatively, the partial PDU can be combined with the remaining portion of the partial PDU to generate a complete or larger PDU, from which the previously incomplete SDU can be retrieved and provided to an upper communication layer. |
| US08644331B2 |
Method and apparatus for transmitting ranging channel in wireless communication system
A method and apparatus for transmitting a ranging channel in a wireless communication system is provided. A mobile station (MS) receives frequency resource allocation information of a ranging channel and allocates the ranging channel to one ranging subband on a frequency domain determined based on the frequency resource allocation information of the ranging channel. The MS transmits the ranging channel. The frequency resource allocation information of the ranging channel includes a cell identifier (ID) of a cell and the number of allocated subbands or the number of allocated subband contiguous resource units (CRUs). |
| US08644327B2 |
Switching arrangement and method with separated output buffers
A switching device is able to route the arriving data packets according to data packet destination information to dedicated output ports. The switching arrangement has, for each set of input ports in the switching device, a set of output buffers with an output buffer for storing the payload of each data packet at an address in the output buffer which pertains to the same set of output buffers and belongs to the dedicated output ports. At least one of the output buffers has a set of output queues with an output queue for each output port for storing the address of each payload stored in the corresponding output buffer. An arbiter controls a readout order of the stored addresses. For the output buffers which pertain to the same set of output ports a multiplexer multiplexes according to the readout order the payloads from the output buffers to the output ports. |
| US08644326B2 |
Queue processing method
A method of processing data packets, each data packet being associated with one of a plurality of entities. The method comprises storing a data packet associated with a respective one of said plurality of entities in a buffer, storing state parameter data associated with said stored data packet, the state parameter data being based upon a value of a state parameter associated with said respective one of said plurality of entities, and processing a data packet in said buffer based upon said associated state parameter data. |
| US08644323B2 |
Distributed management of LEO satellite networks with management agility and network efficiency
In a distributed management scheme for LEO satellite networks interactions between a satellite and the designated fixed center occur according to a time schedule and only when the designated center is in the coverage area of the payload. For exception/alarm reporting and real-time configuration updates the interaction varies with time. Interactions of this type occur between a satellite and the management center that is “nearest” to the payload or satellite at the time instant at which the network event occurs or configuration upload is needed. The nearest management center for a payload is the center that can be reached from the payload with fewest number of crosslink hops. A central network operation center determines, prior to payload launch, the association between satellites and management centers for routine information exchange, and the nearest management center for the payload for different snapshots of time. |
| US08644320B2 |
Distributed wireless packet assembly
Distributed assembly of data packets into messages at a group of interface devices that receive data packets from within a coverage area. Each interface device in the group will take ownership of a sequence of data packets forming a message when a data packet of the message meeting predetermined criteria is received by that interface device. Once an interface device takes ownership of a sequence of data packets, it sends a request to the other interface devices for any missing data packets of the sequence that the ownership claiming interface does not have, and then assembles message upon receiving all the data packets of the sequence. |
| US08644319B2 |
Method of data transmission in a data communication network
In a method of data transmission in a data communication network, data packets may be tormatted according to different transmission protocols (“secondary data packets”) that are received for transmission through the data communication network and may be packed into one or more “primary data packets” formatted according to the transmission protocol of the data communication network. In addition to a sequence number, the primary data packets may include a first packet offset to identify the location of a first new secondary data packet that is packed into the primary data packet. A first packet offset field length may be determined during connection negotiation. The data transmission method of the invention may include packing one or more secondary data packets, or a portion thereof, in a primary data packet to fill the primary data packet, thus minimizing unused data bits in the primary data packet. |
| US08644317B1 |
Method and system for using extended fabric features with fibre channel switch elements
A fiber channel switch element and method for routing fiber channel frames is provided. The switch element includes a receive segment that can add a virtual storage area network (“VSAN”) tagging header to frames that are received by the receive segment; and strip the VSAN tagging header before frames are sent to ports that do not support virtual fabric capability. The receive segment includes a table used for matching fabric extension parameters. An incoming frame's VSAN identity value is compared to a control word entry to generate a value used for routing the incoming frame. The table is used to determine if a frame is part of a virtual fabric. The routing table for each port is used to route frames and the routing table includes entries for supported virtual fabrics. |
| US08644316B2 |
In-band media performance monitoring
A method including receiving data packets encapsulating at least part of a media stream, extracting a decoder-ready packet from the data packets, processing the decoder-ready packet; and substantially synchronously with the processing of the decoder-ready packet, generating delivery performance information for the at least part of the media stream, data from which is included in the decoder-ready packet. |
| US08644313B2 |
Break before make forwarding information base (FIB) population for multicast
A method of installing forwarding state in a link state protocol controlled network node having a topology database representing a known topology of the network, and at least two ports for communication with corresponding peers of the network node. A unicast path is computed from the node to a second node in the network, using the topology database, and unicast forwarding state associated with the computed unicast path installed in a filtering database (FDB) of the node. Multicast forwarding state is removed for multicast trees originating at the second node if an unsafe condition is detected. Subsequently, a “safe” indication signal is advertised to each of the peers of the network node. The “safe” indication signal comprises a digest of the topology database. A multicast path is then computed from the network node to at least one destination node of a multicast tree originating at the second node. Finally, multicast forwarding state associated with the computed multicast path is installed in the filtering database (FDB) of the network node, when predetermined safe condition is satisfied. |
| US08644312B2 |
System, method, and computer-readable medium for dynamic device discovery for servers binding to multiple masters
A system that facilitate broadcast of a device discovery beacon by a dynamic physical device wishing to bind to one or more control systems are provided. If the dynamic physical device comprises of server that is configured to bind to multiple master controllers, the dynamic physical device may include a device Type Flag and set the value of the device Type Flag to indicate the dynamic physical device comprises a server. On detection of the beacon, a master controller evaluates the device Type Flag if it is present in the device discovery beacon. If the device Type Flag is present and indicates the dynamic physical device comprise a server which may bind to multiple master controllers, the master controller may automatically load a device Module for the dynamic physical device and commence commutations with the dynamic physical device with no manual intervention. |
| US08644309B2 |
Quarantine device, quarantine method, and computer-readable storage medium
A quarantine device 1 performs processing on a network provided with a VLAN-aware Layer 2 Switch 7. The quarantine device 1 includes a terminal detection unit 11 that, when a single terminal is connected to a specified port of the Layer 2 Switch 7 through a VLAN-unaware hub, detects a connection of a new terminal 4 to the hub, and a switch control unit 12 that, upon detecting the connection of the new terminal 4, configures the specified port as a trunk port and, furthermore, configures a first VLAN, which transfers only Ethernet frames having preset tags attached thereto, and a second VLAN, which transfers only Ethernet frames having no tags attached thereto, on the specified port. |
| US08644307B2 |
Communication transfer apparatus and communication transfer method
A communication transfer apparatus and a communication transfer method can transfer communications at low cost without the need of requesting a global IP network to switch any port number. The local internet protocol address of the origin terminal of transfer described in a record relating to a transfer out of the records of the masquerade table that is utilized for an internet protocol masquerade is rewritten as the local internal protocol address of the destination terminal of transfer, while maintaining the global port number of the record. |
| US08644304B2 |
IP telephony on a home network device
In one embodiment, a method for providing voice communications in a packet switched network protocol through a home network is provided, the method comprising: receiving, at a first home network device, an incoming call in the packet switched network protocol; notifying a second home network device of the incoming call; receiving an indication from the second home network device that the second home network device accepts the call; and forwarding the incoming call to the second home network device. |
| US08644300B2 |
Telephone switching systems
The invention relates to the generation of configuration data for use in the migration of telephone switching systems. Configuration data for use in the migration of subscribers from a first telephone switching system over to a second telephone switching system in a telecommunications network is generated by monitoring signaling information on telephone channels associated with subscribers for telephone calls conducted via the first telephone switching system. The monitored signaling information is then analyzed in relation to call data produced by the first telephone switching system for the calls to identify relationships between the monitored signaling information and call data for calls conducted by subscribers. Configuration data based on the identified relationships is then stored and used to configure the second telephone switching system with mappings between the associated telephone channels and the telephone dialing numbers for subscribers. |
| US08644291B2 |
Spatial reuse in directional antenna systems
In directional antennas, spatial reuse involves enabling two communications to occur on the same link at the same time. The communications may be in the same or opposite directions. If no link of sufficient bandwidth is available that does not already have an active communication, a link with an active communication of sufficient bandwidth is located. Then an antenna training sequence may be implemented. A check determines whether the antenna training sequence was successful. If there was interference during the antenna training sequence, then the spatial reuse is not permitted. Otherwise, spatial reuse may be permitted. |
| US08644290B2 |
Coordination-free rendezvous method for a communication network
In a coordination-free rendezvous method for a communication network, time is divided into superslots with each superslot being further divided into slots. At least one first-class slot and at least one second-class slot are selected out of the slots of each superslot. The relative position between the first-class slot and the second-class slot is changed every superslot, thereby the first-class slots or the second-class slots between or among devices of the communication network may overlap each other in a periodic manner. |
| US08644287B2 |
Wireless communication system, apparatus, and method for transmitting information to describe network topology
A wireless communication system, an apparatus, and a method for transmitting information to describe network topology of the wireless communication system in a mobile multi-hop relay standard are disclosed. The system can either be a two-hop relay station system or a multi-hop relay station system. The apparatus can use a CDMA ranging code set to transmit information and manage other apparatuses of the wireless communication system under a mobile multi-hop relay standard. The CDMA ranging code set comprises a mobile station (MS) code set and a relay station (RS) code set. The MS code set is used to transmit information from the MS to the base station (BS). Likewise, the RS code set is used to transmit information from the RS and the BS. |
| US08644286B2 |
Method and system for fast cell search using psync process in a multimode WCDMA terminal
Certain aspects of a method and system for a fast cell search using a primary synchronization channel (PSYNC) process in a multimode wideband code division multiple access (WCDMA) terminal are provided. A WCDMA frequency search or a global system for mobile communications (GSM) frequency search is performed based on a current radio access technology (RAT), received signal strength indication (RSSI) scan measurements, and PSYNC detection operations. The RSSI scan measurements may be averaged by making multiple measurements during a measurement period. At least part of the PSYNC detection operations may be performed during a remaining portion of the measurement period. WCDMA carrier frequencies may be marked in accordance with the results of the PSYNC detection operations. For GSM, some of the frequencies may be removed from the search based on the PSYNC marking while the remaining search frequencies may be ranked based on results from the RSSI scan measurements. |
| US08644282B2 |
System and method for transmitting a low density parity check signal
A system and method for transmitting LDPC parameters is provided. In the method, an initial number of OFDM symbols (Nsym_init) is determined for a packet that is based on the number of information bits to be delivered in the packet. An STBC value is also determined. A number of extra symbols (Nsym_ext) value is generated based on the Nsym_init value, wherein a Nsym value is based on said Nsym_init value and said Nsym_ext value. An Nldpc_ext value is determined based on the STBC value and the Nsym_ext value for purposes of determining LDPC parameters associated with the packet. |
| US08644281B2 |
Method and apparatus of accessing channel in wireless communication system
A method and apparatus of accessing a channel in a wireless local area network is provided. The method includes receiving, by a device, an operation element for setting up or switching at least one channel from an access point (AP), the operation element including a channel type field indicating whether the at least one channel is either a single channel or multiple channels, and the operation element including two channel center frequency segment fields indicating channel center frequency of a primary channel and a secondary channel respectively if the channel type field indicates that the at least one channel is multiple channels, determining whether the primary channel is idle during a first interval, determining whether the secondary channel is idle during a second interval if the primary channel is idle, and transmitting data by using the primary channel and the secondary channel to the AP or at least one station in a basic service set (BSS) if the primary channel and the secondary channel are idle. |
| US08644276B2 |
Methods and apparatus to provide network capabilities for connecting to an access network
Example methods and apparatus to provide network capabilities for connecting to an access network are disclosed. A disclosed example method involves receiving a request at a first access network of a first network type. The request is addressed to a database and requests network connectivity information for connecting a wireless terminal to a second access network of a second network type different from the first network type. The example method also involves sending a response to the wireless terminal via the first access network. The response includes the network connectivity information for connecting the wireless terminal to the second access network. |
| US08644275B2 |
Method for WLAN localization and location based service supply
A method is for WLAN localization and corresponding location based service supply. By providing a WLAN data set as an actual WLAN fingerprint of a geographical unit for the usage in a mobile device the user is enabled to localize himself self-sustained. Thereby the mobile device receives WLAN signals from at least three WLAN senders for the localization. Due to self-sustained identifying of the WLAN senders by the mobile device on basis of the received WLAN signals the mobile device may calculate the actual geographical position of the mobile device. The calculation is done on basis of the WLAN data set and on basis of the received WLAN signals from the at least three different WLAN senders. Furthermore a location based service is supplied by the mobile device the a user of the mobile device on basis of the calculated actual position. |
| US08644274B2 |
Method and structures for mobility policy in a WiMAX communications system
The invention relates to method and structures for mobility policy e.g. in a Worldwide Interoperability for Microwave Access, WiMAX, based communication. According to embodiments, a method and devices for mobility control of a terminal are provided wherein a mobility policy parameter defines the mobility control of the terminal. The mobility policy parameter preferably is part of a mobility policy or subscription record stored for a subscriber of the terminal in a subscriber data base. The mobility policy parameter may include at least one of an indication of mobility restriction, possibly indicating included or excluded cells or areas etc; an indication of fixed access, indicating a fixed base station to which the subscriber has to request access; nomadicity, indicating that no handover is allowed for that particular subscriber; and restricted mobility limited to a group of base stations or areas. Embodiments allow to deploy mobile WiMAX for fixed access applications, enabling reuse of existing technology and further development towards full mobility. |
| US08644273B2 |
Methods and apparatus for optimization of femtocell network management
Methods and apparatus that reduce network management overhead required for the operation of wireless femtocells. In one aspect of the invention, a central network entity governs the simultaneous operation of several femtocells by specifying modes of operation, and operational parameters for one or more of the femtocells. In one embodiment, at least one of the specified modes of operation directs a femtocell to operate in a substantially autonomous manner within the network-defined operational parameters. The network-defined constraints are provided to the femtocell for example, responsive to a successful registration attempt. |
| US08644272B2 |
Initiating router functions
A method of initiating router functions includes providing a router device having an integrated user interface having a user control and an indicator. From the router device, a first data link to a wide area network is established. From the router device, a second data link to enable a local area network is established. Via the indicator, state information regarding the first and second data links is communicated. It is determined if the user control has been activated. Upon detecting that the user control has been activated one or both of the first and second data links are modified. Information indicating the modification is communicated via the indicator. |
| US08644270B2 |
Method and system for configuring a frame in a communication system
A method and system for configuring a frame in a communication system is provided. The method includes determining a number of frames for configuring one multi-frame, wherein the number is at least two, and configuring each of the determined number of frames, wherein the determined number of frames include a first frame and a second frame temporally discriminated from each other, each of the determined number of frames includes a downlink sub-frame and an uplink sub-frame, a downlink sub-frame of the first frame includes a first area for transmitting a reference signal used for an acquisition of synchronization between a base station and a mobile station, a second area including system information and common control information related to the multi-frame, a third area including modulation scheme information and allocation information of data bursts, a fourth area to which a downlink data burst is allocated in a diversity mode and a fifth area to which a downlink data burst is allocated in a band Adaptive Modulation and Coding (AMC) mode, and a downlink sub-frame of the second frame includes a sixth area including modulation scheme information and allocation information of data bursts, a seventh area to which a data burst is allocated in a diversity mode, and an eighth area to which a data burst is allocated in an AMC mode. |
| US08644269B2 |
Adaptive transmissions in wireless networks
A network includes an access point using a first protocol and a station using both the first protocol and a second protocol. The station uses the first protocol before a first threshold and a second protocol after the first threshold. A first duration between the second threshold and the first threshold is at least of sufficient length for the station to receive one data packet from the access point and send an acknowledgment. The station transmits to the access point a current clear-to-send packet at a current time during a current exchange based on success or failure of a previous exchange during which a previous clear-to-send packet was transmitted to the access point at a previous time. |
| US08644267B2 |
Wireless communication system and method of calling terminal
A wireless communication system, including: a plurality of wireless communication terminals connected to each other in a wired fashion and configuring a cluster; and a plurality of wireless communication base stations, wherein each of the wireless communication base stations divides a call signal into short signals, intermittently transmits the signals to the plurality of the wireless communication terminals, and varies transmission timing from one wireless communication base station to another, and the plurality of the wireless communication terminals receive the call signals from the plurality of the wireless communication base stations in a time division and alternate fashion. |
| US08644266B2 |
System and method for operating a radio communication apparatus with a communication channel for discontinuous data transmission
In a radio communication system (100, 200) using a channel divided into a plurality of time slots, a control signal is transmitted in each time slot and a data signal is transmitted intermittently using a subset of the time slots. The control signal includes a portion which is a predetermined signal, such as a pilot signal, and one or more bits constituting a power control command. The format of the control signal is adapted according to whether or not data is transmitted in the same time slot. When data is not being transmitted, the proportion of the control signal which constitutes a power control command is increased and the energy of the control signal is reduced, at least by reducing the energy of the predetermined signal portion. |
| US08644265B2 |
Wideband analog channel information feedback
Multipoint broadcasting requires that the downlink-channel information be available at collaborating base stations. Methods and apparatus for wideband analog channel feedback are described that provide downlink-channel information feedback from mobile users to base stations via uplink channels, and that use very few or no resources of the RAT of the wireless cellular network. Also described are methods and apparatus that perform channel-feedback signal cancellation at base stations to reduce its interference on the uplink-traffic signal. Wideband analog channel feedback is adaptable to the feedback bandwidth in uplink, and it offers frequency diversity to combat the deep fading in feedback channels. Wideband analog channel feedback is also applicable to uplink channel-information feedback. Applications of the described methods and apparatus include multipoint broadcasting in a wireless cellular network, and more generally, channel feedback between two communicating devices in a communications network. |
| US08644264B2 |
Method and apparatus for canceling pilot interference in a wireless communication system
Methods and systems for estimating and canceling pilot interference in a wireless (e.g., CDMA) communication system. In one method, a received signal comprised of a number of signal instances, each including a pilot, is initially processed to provide data samples. Each signal instance's pilot interference may be estimated by despreading the data samples with a spreading sequence for the signal instance, channelizing the despread data to provide pilot symbols, filtering the pilot symbols to estimate the channel response of the signal instance, and multiplying the estimated channel response with the spreading sequence. The pilot interference estimates due to a plurality of interfering multipaths are accumulated to derive the total pilot interference, which is subtracted from the data samples to provide pilot-canceled data samples. These samples are then processed to derive demodulated data for each of at least one (desired) signal instance in the received signal. |
| US08644262B1 |
Method and apparatus for estimating a channel quality indicator (CQI) for multiple input multiple output (MIMO) systems
Systems and methods are provided for determining a channel quality indicator (CQI) in a transmission system associated with a diversity transmission scheme. A plurality of independent diversity branches are identified in the diversity transmission scheme. Each one of the independent diversity branches may correspond to a different portion of the effective channel and may include any suitable combination of frequency, time, and/or spatial components of the effective channel or of any wired or wireless paths or combinations of the same. An effective Signal-to-Noise Ratio (SNR) value is computed for each one of the identified independent diversity branches. The computed effective SNR values are combined for the identified independent diversity branches to generate a CQI value. |
| US08644261B1 |
Methods and systems for registering a wireless access terminal with a radio access network
A method and system for determining whether an access terminal will perform a hand off to a target base station (BS) or register with a currently-serving BS and thereafter hand off to the target BS. In making that determination, the access terminal may make and compare pilot signal strength measurements. For a target BS transmitting a pilot signal detected to be stronger than a pilot signal transmitted by the currently-serving BS, the access terminal determines whether a distance between the target BS and a currently-registered BS exceeds a registration distance associated with the currently-registered BS. If the registration distance is exceeded, the access terminal registers with the currently-serving BS prior to handing off to the target BS such that the access terminal is more likely to receive page messages directed to the access terminal while it is registering with the currently-serving BS and handing off to the target BS. |
| US08644260B2 |
Apparatus and method for increasing reliability of serving cell change
Methods and apparatus are described herein to manage a serving cell change. A HS-SCCH monitored set is maintained to store entries for all pending serving cell change requests. The HS-SCCH for each entry is monitored for a timer period. Once a change request has been confirmed for one entry, monitoring for the other entries continues until expiration of the associated timers. |
| US08644256B2 |
IP mobility
A method of forwarding IP packets, sent to an old care-of-address of a mobile node, to the mobile node following a handover of the mobile node from a first old access router to a second new access router. The method comprises, prior to completion of said handover, providing said first router or another proxy node with information necessary to determine the new IP care-of address to be used by the mobile node when the mobile node is transferred to the second access router. At said first router or said proxy node, the new care-of-address for the mobile node is determined using said information and ownership of the new care-of-address by the mobile node confirmed, and subsequently packets received at said first access network and destined for said old care-of-address are forwarded to the predicted care-of-address address. |
| US08644255B1 |
Wireless device access to communication services through another wireless device
A method of operating a communication system is disclosed which includes, in a wireless communication device, transferring a wireless beacon signal and responsively receiving a wireless access request from a user device, determining if a user identifier received with the wireless access request has usage credits in a data structure, exchanging wireless signals with the user device and with a wireless communication network based on the usage credits to provide a wireless communication service to the user device, and decrementing the usage credits for the user identifier in the data structure. The method also includes wirelessly transferring usage credit updates for receipt in a master data structure. |
| US08644252B2 |
Method for recovery from a failed handover procedure in a telecommunication system
The present invention relates to a method, a user equipment and a network node in a cellular radio network. According to the method of the present invention, the network units detects a failed transmission of a handover command to the UE, which is still having a uplink channel available, and further receives a RRC message from the UE indicating the loss of a serving cell and indicating the strongest cell. The network unit prepares and initiates a new serving cell re-establishment and sends to the UE a RRC reconfiguration message. The UE can then continue normal operation in the new cell. |
| US08644251B2 |
System and method for performing a handover in an enhanced multicast broadcast system (E-MBS)
A wireless communication network comprising a plurality of base stations capable of wireless communication with a plurality of subscriber stations within a coverage area of the network, wherein at least one of the plurality of base stations is capable of transmitting an edge-zone indicator which indicates the proximity of the at least one base station to an edge of an enhanced multicast broadcast system (E-MBS) zone. |
| US08644250B2 |
Maintaining communication between mobile terminal and network in mobile communication system
Maintaining communication between a mobile terminal and a network in a mobile communication system is achieved by determining a transition to one of a synchronized state and an unsynchronized state with a network while maintaining an active state with the network, and transitions to one of the synchronized state and the unsynchronized state according to the determination. |
| US08644247B2 |
Inter-system handoffs in multi-access environments
Systems and methods according to these exemplary embodiments provide for handing off user equipment between different access networks, e.g., a high rate packet data (HRPD) system and a long term evolution (LTE) system. An existing mobile IP session can be maintained by the UE during the handoff. |
| US08644238B2 |
Demodulation reference signals in a communication system
At least two modes of communicating demodulation reference signals in a system providing a multiple of communication points for communication devices are provided. In a first mode demodulation reference signals are communicated based on an sequence group and separation of sequences provided by adjustment of transmitted demodulation reference signals. In a second mode demodulation reference signals are communicated based on one or more sequence groups and non-adjusted transmission of demodulation reference signals. |
| US08644231B2 |
Method of transmitting feedback message in wireless communication system
A method of transmitting a feedback message in wireless communication system is provided. The method includes selecting N best subbands of M subbands according to CQI, where both M and N are a natural number and M is larger than N, generating multiple input multiple output (MIMO) information comprising N codebook indexes and N differential CQIs and transmitting the feedback message comprising the MIMO information. |
| US08644228B2 |
Method and apparatus of allocating resources in wireless communication system
The present invention relates to a resource allocation device for efficiently using resources by persistently allocating the resources in a wireless communication system, and a method thereof. In the method, a quality of service (QoS) configuration is received according to a predetermined service, persistent resource allocation is performed according to a resource allocation request corresponding to the QoS configuration, various retransmission methods are determined when performing the persistent resource allocation, transmission data are established according to the determined retransmission method, and the transmission data are transmitted. |
| US08644227B2 |
Method for transmitting control signal and method for allocating communication resource to do the same
A method for transmitting a control signal together with RACH transmission and a method for allocation a communication resource for the control signal transmission are disclosed. In allocating a communication resource for a control signal transmission within a transmission unit resource region for performing an RACH transmission, the present invention includes the steps of setting a resource region used for the RACH transmission to a portion of the transmission unit resource region and allocating the control signal transmission resource region unused for the RACH transmission within the transmission unit resource region. |
| US08644225B2 |
Method for determining transmission channels for a LPG based vehicle communication network
A method for determining a transmission channel for multi-hop transmission of a data packet from a plurality of data channels in an ad-hoc network. The network includes at least one local peer group. Each local peer group has a plurality of moving vehicles as nodes. The method comprises steps of determining available channels for data packet transmission at each node, transmitting a first list of available channels to at least one other node, receiving, from the at least one other node, a second list of available channel for the at least one other node, creating an available channel table including the first and second lists of available channels, selecting a transmitting channel for a data packet based upon information in the available channel table, and advertising the selected channel to the at least one other node. |
| US08644222B2 |
Wireless communication system, base station apparatus, mobile station apparatus, and wireless communication method
A mobile station apparatus determines an uplink carrier component to which a physical downlink control channel instructing to start random access procedure corresponds. A wireless communication system includes a base station apparatus and a mobile station apparatus that communicate with each other using a plurality of component carriers. The base station apparatus includes a random access controller that preliminarily allocates random access resources corresponding to a specific downlink component. A transmission processor transmits control information instructing to start the random access procedure. The mobile station apparatus includes a random access processor that, upon receipt of the control information instructing to start the random access procedure, starts the random access procedure by means of the random access resource corresponding to a specific downlink component carrier preliminarily allocated by the base station apparatus. |
| US08644219B2 |
Communication repeater and communication system
A communication repeater comprises a transmitting and receiving that performs wireless communication with a communication device, a power-line carrier communication unit that performs power-line carrier communication with the communication device, and a control unit. The control unit selects either one of the wireless communication and the power-line carrier communication according to conditions. |
| US08644217B2 |
Error rate management
The invention deals with the adjustment of the nominal target error rate for transmission of data from a priority queue to a new predetermined target error rate depending on the state of the priority queue. Usually, the adjustment to the new predetermined target error rate will be to a predefined lower target error rate based on states of the priority queue, such as amount of data in the priority queue, time passed since the latest transmission of data from the priority queue, whether the amount of data in the priority queue will fit into one transport block, whether the data unit to be transmitted for the priority queue is the first or last data unit in the priority queue and may also be based on the type of data stored in the priority queue. There may be more than one such priority queue. |
| US08644216B2 |
Method and system for facilitating preemptive based radio channel access control
Methods and systems for facilitating preemptive based radio access control are provided. The methods and systems include receiving queue data corresponding to a set of requests for highly prioritized communications included on a prioritized queue and utilizing the queue data to determine whether a set of conditions for involuntarily terminating a radio communication session has been met. Session data corresponding to characteristics for each of a plurality of radio communication sessions are also received and utilized to determine which of the plurality of radio communication sessions to terminate if the set of conditions for involuntarily terminating a radio communication session have been met. |
| US08644214B2 |
Timing synchronization and channel estimation at a transition between local and wide area waveforms using a designated TDM pilot
Systems and methods are provided for channel estimation and timing synchronization in a wireless network. In an embodiment, a method is provided for time synchronization at a wireless receiver. The method includes decoding at least one TDM pilot symbol located at a transition between wide and local waveforms and processing the TDM pilot symbol to perform time synchronization for a wireless receiver. Methods for channel estimation at a wireless receiver are also provided. This includes decoding at least one TDM pilot symbol and receiving the TDM pilot symbol from an OFDM broadcast to facilitate channel estimation for a wireless receiver. |
| US08644208B2 |
Multi-antenna relay station with two-way channel
In relaying signals in a multi-hop network, two-way transmission signals are received at the relay device via at least two antenna elements. The received two-way transmission signals are separated and subjected to a transmit processing at the relay device. Thereby, transmit and receive processing can be restricted to the relay device and signalling load between the transmitting end and the receiving end can be reduced. |
| US08644203B2 |
Method of and device for reduced power consumption in synchronized systems
A power reduction method for a first communication device that can communicate with a second communication device in a synchronized fashion. The first communication device has an electronic module and the method includes generating a communication device shut down signal by the electronic module in order to shut down the communication device apart from the electronic module at a first moment in time, generating a communication device wake-up signal by the electronic module in order to switch on and start booting of the communication device at a second moment in time after the first moment in time, and generating a communication device synchronization signal by the electronic module in order to allow the communication device to restart communicating with the second communication device in the synchronized fashion at a third moment in time after the second moment in time. |
| US08644191B2 |
Method and apparatus for planning base station controllers in a wireless network
A method and apparatus for providing planning of a plurality of base station controllers in a wireless network are disclosed. For example, the method obtains input data, and determines a limit for at least one base station controller parameter in accordance with the input data. The method determines if the limit for the at least one base station controller parameter is exceeded and determines an optimal output for an objective function, wherein the objective function is based on a plurality of penalty factors, if the limit for the at least one base station controller parameter is exceeded. |
| US08644190B2 |
Apparatus and method for network access discovery and selection
A method is provided for use in a communications network in which a plurality of accesses are available to a user entity for accessing a network resource, comprising: determining a set of active rules, each rule specifying respective preferences, at least relatively, for at least some of the plurality of accesses, with potential for conflict between the rules of the set concerning which access is most preferred; deriving from the set of active rules network discovery and selection rules a new rule specifying respective preferences, at least relatively, for at least some of the plurality of accesses; and selecting an access for use by the user entity based on the new rule. |
| US08644187B2 |
Systems and methods for selectively disabling routing table purges in wireless networks
The present disclosure generally pertains to systems and methods for disabling routing table purges in wireless networks. In one exemplary embodiment, a node is for use in a wireless sensor network and comprises memory that is configured to store a routing table specifying at least one data route through the wireless sensor network. The node also comprises logic that is configured to track time and to automatically purge at least one entry of the routing table based on the tracked time thereby forcing a rediscovery of a data route for the purged entry. The logic is further configured to selectively disable automatic routing table purges based on user input. |
| US08644185B2 |
System and method of network diagnosis
Embodiments provide systems and methods for diagnosing a network and identifying problems in a network which reduce the data transfer rate of data through the network. One embodiment of a method for network diagnosis may include infusing data into a network upstream and downstream of a portion of the network relative to a library drive, querying the drive at intervals over time for drive data to determine the data transfer rate at the drive and comparing the data transfer rate of the data infused upstream of the device or network portion with the data transfer rate of the data infused downstream of the device or network portion to determine throughput. By comparing the data transfer rate of data infused upstream and downstream of a network device or network portion, problem devices in a network may be identified. |
| US08644184B1 |
Beamforming training techniques for MIMO systems
A set of multiple training signals to be transmitted via multiple antennas over a communication channel are generated, and a different antenna weight vector (AWV) from a first set of AWVs is applied to each of the multiple training signals as the training signals are transmitted during a current iteration of a beamforming procedure. Feedback generated using the multiple training signals is received. A second set of AWVs to be used in a next iteration of the beamforming procedure is determined using the feedback. |
| US08644182B2 |
Method and apparatus for reporting a channel quality in a wireless communication system
The present invention provided a method and apparatus for reporting a channel quality in a wireless communication system. A terminal receives an uplink grant from a base station via one of a plurality of downlink component carriers (CCs). The uplink grant includes a channel quality indicator (CQI) request for instructing uplink allocation and CQI reporting. The terminal reports the CQI of the downlink CC being linked to the base station. The downlink CC being linked is one of the plurality of downlink CCs, which is linked to the uplink CC for which the uplink allocation is scheduled. |
| US08644178B1 |
Transmission of channel assignment messages based on wireless coverage area characteristics
A radio access network (RAN) may limit the number of channel assignment messages that it transmits to a wireless communication device (WCD) when the quality of one or more wireless coverage areas available to the WCD is impaired. For example, if the paging channel utilization of a given wireless coverage area is high, or if the WCD receives a signal strength from the given wireless coverage area that is low, the RAN may refrain from transmitting a channel assignment message via the given wireless coverage area. Similarly, if the aggregate paging channel utilization of a plurality of such wireless coverage areas is high, or if the WCD receives an aggregate signal strength from the one or more wireless coverage areas that is high, the RAN may transmit channel assignment messages via a limited number of wireless coverage areas. |
| US08644176B1 |
Methods and systems for supporting enhanced non-real-time services for real-time applications
Methods and systems for providing an enhanced best-effort quality of service (QOS) are provided. As third-party real-time applications may be unable to explicitly signal QOS requests in some environments, this enhanced best-effort QOS may be applied to real-time flows associated with third-party applications. For instance, devices in an access network may determine that a packet is part of a real-time flow of packets, and is associated with a third-party application. In response to this determination, these devices may forward the packet according to the enhanced real-time QOS. |
| US08644175B2 |
Radio communication system, scheduling method, radio base station device, and radio terminal
A radio communication system, scheduling method, radio base station device, and radio communication terminal all enabling improvement of the system throughput. The radio base station device (400) comprises a signal demultiplexing section (420), an interference/noise power measuring section (425), and scheduler section (430). The signal demultiplexing section (420) acquires information representing the net reception power of the signal which is transmitted from a mobile terminal and from which the influences of the interference and the noise power are removed. The interference/noise power measuring section (425) measures the interference and noise power components of the uplink. The scheduler section (430) carries out uplink band allocation and MCS selection according to the information representing the net reception power and the uplink interference and noise power components. On the basis of the net reception power and the uplink interference and noise power components, the uplink communication environment can be accurately grasped, and the uplink band allocation can be carried out according to these parameters. Hence, since the uplink scheduling can be precisely carried out, the system throughput can be improved. |
| US08644174B2 |
Network based virtualization performance
The disclosed embodiments support improvements in network performance in networks such as storage area networks. This is particularly important in networks such as those implementing virtualization. These improvements, therefore, support improved mechanisms for performing processing in network devices such as switches, routers, or hosts. These improvements include various different mechanisms which may be used separately or in combination with one another. These mechanisms include methods and apparatus for processing traffic in an arbitrated loop, performing striping to support fairness and/or loop tenancy, performing configuration of network devices such as switches to enable virtualization to be performed closest to the storage device (e.g., disk), ascertaining a CPU efficiency that quantifies the impact of virtualization on a processor, and configuring or accessing a striped volume to account for metadata stored in each storage partition. |
| US08644172B2 |
Pluggable module with integrated data analysis function
The invention relates to a network comprising at least one host device having an interface card connected to a backplane of said host device, wherein said interface card comprises at least one cage for receiving a pluggable module which performs a traffic management of data transported via at least one optical fiber connected to said pluggable module. |
| US08644166B2 |
Sensor having an integrated Zigbee® device for communication with Zigbee® enabled appliances to control and monitor Zigbee® enabled appliances
A sensor device integrates ZigBee® technology into power switch device to provide monitoring and control of power usage, as well as operational control of connected devices. The sensor device uses a power line communication (PLC) network to transfer collected data and to provide remote control capability to connected appliances. The sensor device, in conjunction with a master switch device, a communication enabled switching device, and the power switch device, provides an integrated home environment for communication, streaming media, monitoring, and remote control of power usage, as well as remote operational monitoring and control of connected appliances in the home. |
| US08644165B2 |
Method and apparatus for managing device operational modes based on context information
An approach is provided for managing device do-not-disturb operational modes based on context information. A do-not-disturb manager determines context information associated with a device, a user of the device, or a combination thereof. The do-not-disturb manager also processes and/or facilitates a processing of the context information to cause, at least in part, an activation of one or more operational modes of the device. The do-not-disturb manager also causes, at least in part, a disabling or enabling of one or more functions of one or more applications associated with the device based, at least in part, on the activated one or more operational modes. |
| US08644164B2 |
Flow-based adaptive private network with multiple WAN-paths
Systems and techniques are described which improve performance, reliability, and predictability of networks without having costly hardware upgrades or replacement of existing network equipment. An adaptive communication controller provides WAN performance and utilization measurements to another network node over multiple parallel communication paths across disparate asymmetric networks which vary in behavior frequently over time. An egress processor module receives communication path quality reports and tagged path packet data and generates accurate arrival times, send times, sequence numbers and unutilized byte counts for the tagged packets. A control module generates path quality reports describing performance of the multiple parallel communication paths based on the received information and generates heartbeat packets for transmission on the multiple parallel communication paths if no other tagged data has been received in a predetermined period of time to ensure performance is continually monitored. An ingress processor module transmits the generated path quality reports and heartbeat packets. |
| US08644163B2 |
System with wireless network device and method for processing wireless network profile
A system with a wireless network device is provided. The system includes a wireless network device and an electrical device. A storage unit of the electrical device stores a wireless network profile. A second processing unit of the electrical device detects if the wireless network device is connected to the electrical device. When the wireless network device is connected to the electrical device, the second processing unit of the electrical device transmits the wireless network profile to the wireless network device. When the wireless network device obtains the wireless network profile, a first processing unit of the wireless network device drives a first wireless network unit of the wireless network device to transmit data wirelessly according to the wireless network profile. A method for processing a wireless network profile is also disclosed. |
| US08644160B2 |
Network throttle method and system
A method for controlling a number of user equipments in a cellular network, the network comprises at least one user equipment (4), a first interface (1) comprising a probability algorithm capable of connecting the user equipment to a second interface (2). The second interface (2) comprises the probability algorithm and is capable of connecting the user equipment (4) to a third interface (3) comprising the probability algorithm. The user equipment (4) sends an attach request to the first interface (1), the first interface (1) sends a create session request to the second interface (2) and the second interface (2) sends an authentication request to the third interface (3). The load on the third interface (3) is indicated by a first flag set in the response from the second interface (2) to the first interface (1). The value of the first flag in the response is calculated by the probability algorithm in the second interface (2). The first flag in the response from the second interface (2) to the first interface (1) is submitted to the first interface (1) and if the first flag indicates that the load on the third interface (3) is too high, one or several actions from the group comprising, the first interface (1) disconnecting the user equipment (4), aborting the procedure, delaying the procedure, and retrying the procedure towards a different secondary interface, are carried out. |
| US08644159B2 |
System and method for location, time-of-day, and quality-of-service based prioritized access control
A priority server for a provider network includes a traffic volume detection module, a traffic analyzer module, and a rules module. The traffic volume detection module receives operational information from the provider network and determines that a host is experiencing a flash event based upon the operational information. The traffic analyzer module determines that the flash event is not a distributed denial of service attack on the host. When it is determined that the flash event is not a distributed denial of service attack, the rules module provides a priority rule to an access router that is coupled to the host. |
| US08644154B2 |
Predictive throughput management
A wireless device is communicated with using a first throughput. A predicted location for the wireless device is determined. Based on the predicted location, a predicted maximum throughput at the predicted location is determined. Based on the predicted maximum throughput, a second throughput is determined. The wireless device is communicated with using the second throughput. |
| US08644152B2 |
Upstream data rate estimation
In one embodiment, a device includes: a transceiver operable to transmit packets to and receive packets from a modem; and a logic engine configured to transmit first packets at a rate through an upstream path for a modem to an Internet node such that no throttling is triggered in the modem, the logic engine being further configured to transmit second packets through the upstream path for the modem to the Internet node at a rate sufficient to trigger throttling in the modem if the modem implements throttling, the logic engine being further configured to compare an average transmission time for first packets to an average transmission time for the second packets to determine whether the modem implements throttling. |
| US08644145B2 |
System, method and computer readable medium for communicating with a zigbee device from a peripheral network
In order to minimize traffic on a Zigbee network, a gateway of the Zigbee network represents end devices in communications with peripheral networks. The gateway receives messages, such as status request messages, from the peripheral network intended for an end device on the Zigbee network. The Zigbee network generates a response message by retrieving stored data for the end device instead of communicating the received message to the end device. |
| US08644143B2 |
Methods for dynamic bandwidth allocation and queue management in ethernet passive optical networks
In a passive optical network, dynamic bandwidth allocation and queue management methods and algorithms, designed to avoid fragmentation loss, guarantee that a length of a grant issued by an OLT will match precisely the count for bytes to be transmitted to an ONU. The methods include determining an ONU uplink transmission egress based on a three-stage test, and various embodiments of methods for ONU report 700 threshold setting. |
| US08644142B2 |
Mobility in a multi-access communication network
The present invention provides a terminal capable of establishing multiple communication sessions with a public network proxy through different access networks. The terminal actively communicates with the public network proxy to control which of the multiple communication paths are active, as well as control the transition from actively using one communication path to using another. The public network proxy facilitates data and voice sessions between the terminal and any number of other communication devices. In one embodiment, the communication sessions are reserved tunneling sessions, and the terminal cooperates with the public network proxy to effectively control how many tunneling sessions are established, how many tunneling sessions are active at any given time, and the transition from one tunneling session to another for active communications. Each of the communication or tunneling sessions may be established over different access networks using different communication technologies and protocols. |
| US08644137B2 |
Method and system for providing safe dynamic link redundancy in a data network
Method and system for providing dynamic configuration of link redundancy in data network based on detection of dynamic changes in the network topology including the steps of detecting data network topology, determining a number of data paths from a node in the data network topology to each of a respective pair of peer nodes coupled to the node by a corresponding interface, determining a data path in the data network topology between the peer nodes, calculating a set of nodes reachable via each interface coupled to the node and the respective peer node in the data network topology, and comparing the set of calculated nodes is provided. |
| US08644134B2 |
Dual-homing for ethernet line services
Techniques are described which provide mechanisms for dual-homing an access ring for virtual private wire service (VPWS) Ethernet line (E-Line) services. The mechanism may provide resiliency against access ring failures and offer a restoration time of 50 msec upon failure. A method to provide such resiliency may generally include determining, at a first ring port of an access node, a ring failure in an Ethernet ring. Upon determining the first ring port of the access node is not situated on a same side of the Ethernet ring as a node designated as a ring protection link (RPL) owner, a message is transmitted on a second ring port of the access node towards a provider edge (PE) node. The message is used to activate pseudowires (PWs) at the PE node for virtual local area networks (VLANs) of the access node. |
| US08644131B2 |
Network architecture for data communication
This invention relates to a network architecture for data communication between data sources and data destinations via network nodes and at least one data concentrator. According to the invention the nodes (2, 4) are conceived to communicate with a data concentrator (1) in both directions either via a permanently operative network (8) in the multihop mode or via an occasionally operative network (5) in wireless connection with mobile user nodes (6) in the nomadic mode. Means for commutation are provided to detect faulty multihop nodes and to activate nomadic nodes instead until the fault disappears, in order to maintain the overall functionality of the network. Moreover the network according to the invention allows to share the data collected by mobile users with other mobile users, thus forming a peer-to-peer network. |
| US08644126B2 |
Optical information recording medium and method for manufacturing same
Optical information recording medium 10 comprises: a plurality of recording layers 14 which undergo a change in refractive index by irradiation with recording beam; and an intermediate layer 15 provided between the recording layers 14. The intermediate layer 15 includes first intermediate layer 15A disposed adjacent to a recording layer 14 at a side opposite to an incident side from which recording beam enters the recording layer, and second intermediate layer 15B disposed adjacent to a recording layer 14 at an incident side from which the recording beam enters the recording layer. The first intermediate layer 15A and the recording layer 14 have different refractive indices, whereas the second intermediate layer 15B and the recording layer 14 have substantially the same refractive index. The first and the second intermediate layer 15A, 15B are merged with each other at an interface therebetween, whereby refractive index gradually changes at the interface. |
| US08644125B2 |
Seek scan probe (SSP) cantilever to mover wafer bond stop
A seek-scan probe (SSP) memory involves multiple-wafer bonding needing precision small gaps in between. Solder reflow bonding is typically used to join the wafers due to its reliability and ability to hermetically seal. However, solder reflow bonding may not provide a consistently controllable gap due to flowing solder during the bonding process. Thus, a bond stop technique and process is used to provide accurate cantilever to media gap control. |
| US08644121B1 |
Method and device for detecting a sync mark
A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined. |
| US08644120B2 |
Optical information processing device and tracking control method thereof for use with grooveless multilayer optical disc
An optical information device used with a grooveless multilayer disc including multiple recording layers used to record and reproduce information signals and a guide layer dedicated to detect tracking error signals (TES) can always stably detect the TESs when the distance between the recording layer and guide layer varies due to selection of a target recording layer. For example, a plurality of light spots for detecting the TESs are formed by a holographic grating on the guide layer, but are defocused with respect to each other. The TESs are detected individually from the respective light spots. The TESs are subjected to an addition operation to be a signal for tracking control, thereby extraordinarily increasing the defocus dynamic range of the TESs. |
| US08644117B2 |
Electronic timepiece
An electronic timepiece can improve the frequency of satellite signal reception and reduce power consumption. Such timepiece, e.g., a wristwatch has a GPS device that executes a reception process that locks onto a GPS satellite and receives satellite signals; a reception control unit that controls the reception process; and a solar panel that detects illuminance. The reception control unit includes an illuminance-based reception control unit that runs a reception process based on the detected illuminance, and a scheduled reception control unit that runs a reception process when a preset scheduled time is reached. The illuminance-based reception control unit stops reception when a satellite is not locked onto within a first locking time, and the scheduled reception control unit stops reception when a satellite is not locked onto in a second locking time that is shorter than the first locking time. |
| US08644108B2 |
Clock mode determination in a memory system
A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from memory device to memory device through a common clock input. The clock mode configuration circuit in each memory device is set to a parallel mode for receiving the parallel clock signal, and to a serial mode for receiving a source synchronous clock signal from a prior memory device. Depending on the set operating mode, the data input circuits will be configured for the corresponding data signal format, and the corresponding clock input circuits will be either enabled or disabled. The parallel mode and the serial mode is set by sensing a voltage level of a reference voltage provided to each memory device. |
| US08644106B2 |
Shift circuit of a semiconductor device
A shift circuit of a semiconductor device reduces the power consumption of the semiconductor device. The shift circuit comprises a plurality of shifters and a plurality of clock controllers. The plurality of shifters shifts an input signal in sequence in response to a clock. The plurality of clock each supply the clock to a corresponding shifter before an input of the corresponding shifter is activated and stop the supply of the clock to the corresponding shifter when an output of the corresponding shifter is activated. |
| US08644105B2 |
Clock and power fault detection for memory modules
A system, method and apparatus for clock and power fault detection for a memory module is provided. In one embodiment, a system is provided. The system includes a voltage detection circuit and a clock detection circuit. The system further includes a controller coupled to the voltage detection circuit and the clock detection circuit. The system also includes a memory control state machine coupled to the controller. The system includes volatile memory coupled to the memory control state machine. The system further includes a battery and battery regulation circuitry coupled to the controller and the memory control state machine. The battery, battery regulation circuitry, volatile memory, memory control state machine, controller, clock detection circuit and voltage detection circuit are all collectively included in a unitary memory module. |
| US08644103B2 |
Circuits, systems, and methods for reducing simultaneous switching output noise, power noise, or combinations thereof
Memory devices and methods are provided for reducing simultaneous switching output noise and power supply noise during burst data write and refresh operations. An embodiment of a memory device according to the present invention includes a first power domain coupled to some of the components of the memory device and a second power domain coupled to different components of the memory device. One or more distributed power domain coupling circuits may be coupled to the first and second power domains. The power domain coupling circuit includes a controller configured to generate an enable signal responsive to control signals, data signals, or any combination thereof. The power domain coupling circuit also includes coupling circuitry coupled to the first and second power domains and coupled to the controller. The coupling circuitry is configured to couple the first and second power domains together responsive to the enable signal. |
| US08644101B2 |
Local sense amplifier circuit and semiconductor memory device including the same
A local sense amplifier circuit in a semiconductor memory device, the local sense amplifier circuit including a local data sensing unit configured to amplify a voltage difference between a local input/output (I/O) line pair based on a local sensing enable signal to provide the amplified voltage difference to a global I/O line pair, the local I/O line pair including a first local I/O line and a second local I/O line, and a local I/O line control unit including a first capacitor and a second capacitor, the first capacitor increasing a voltage level of the first local I/O line based on the local sensing enable signal, the second capacitor increasing a voltage level of the second local I/O line based on the local sensing enable signal. |
| US08644100B2 |
Scaleable look-up table based memory
An integrated circuit having a logic element that includes an array of storage elements convertibly functioning as either a configuration random access memory (CRAM) or a static random access memory (SRAM) is provided. The logic element includes first and second pairs of data paths having dedicated multiplexers. In one embodiment, the first and second pairs of data paths are multiplexed into bit lines of a row of the array. The logic element also includes a data path control block generating control signals for each of the dedicated multiplexers. The control signals determine whether the storage elements function as a CRAM or a SRAM. A method for selectively configuring a memory array between a CRAM mode and SRAM mode are provided. |
| US08644099B2 |
Apparatus and method for determining a read level of a flash memory after an inactive period of time
Disclosed is an apparatus and method for determining a dwell time in a non-volatile memory circuit after a shutdown of the memory circuit. A voltage shift is calculated by comparing a first read level voltage required to read a test block stored before the shutdown and a second read level voltage required to read a second test block stored after the shutdown. A shutdown time is determined from a look up table indexed by the voltage shift and a number of program/erase cycles. The dwell time is calculated as a function of the drive temperature, a clock, and a block time stamp. Once the dwell time is calculated, a controller calculates a new read level voltage based, in part, on the dwell time and provides one or more programming commands representative of the new read level voltage to the memory circuit to read the memory circuit. |
| US08644094B2 |
Semiconductor memory devices including precharge using isolated voltages
A semiconductor memory device includes a memory cell array including a plurality of word lines, a plurality of bit lines including complementary pairs of bit lines, and a plurality of memory cells storing data; a sense amplifier coupled to the memory cell array and configured to sense voltage differences between the complementary pairs of bit lines and amplify the voltage differences; and at least one voltage driver configured to provide either a predetermined voltage or a first power supply voltage to the memory cell array to increase a sensing margin of the semiconductor memory device. The semiconductor memory device increases respective potential differences between complementary pairs of bit lines using a voltage isolated in the memory cell array. |
| US08644092B2 |
Multi-chip package and method of operating the same
A semiconductor memory device includes a memory cell array including first memory cells for storing data and second memory cells for storing chip identification (ID) information, a data comparison circuit configured to compare input data and the stored data of the first memory cells and to output comparison data, and output circuits configured to output the comparison data received in parallel from the data comparison circuit. The comparison data is outputted through a selected one of the output circuits according to an enable signal generated based on the chip ID information. |
| US08644088B2 |
Semiconductor memory device and semiconductor system including the same
A semiconductor memory device includes a memory block configured to store a data inputted/outputted through a data transfer line, a data output block configured to output the data loaded on the data transfer line in response to a source clock, wherein the data output block is controlled to be coupled with the data transfer line in response to a write operation signal, a write operation signal generation block configured to generate the write operation signal in response to an operation selection signal and a reference clock lagging behind the source clock by a set time, and a data input block configured to load the data on the data transfer line in response to the write operation signal. |
| US08644087B2 |
Leakage-aware keeper for semiconductor memory
A circuit includes a first circuit configured to sense a leakage of a first bit line and output a first signal in response, and a second circuit configured to receive the first signal output from the first circuit and in response supply current to a second bit line for maintaining a voltage level of the second bit line. |
| US08644083B2 |
Degradation equalization for a memory
In an embodiment, an integrated circuit includes a memory and a control circuit configured to cause an inversion of at least a portion of the data stored in the memory to more evenly balance the amount of time that a given memory cell in the memory stores a binary one or a binary zero. In some implementations, the inversion may be controlled for the memory as a whole via a global indication. In other implementations, data may be inverted on a row-by-row or column-by-column basis. In other embodiments, the global indication may be changed at each boot of a device including the integrated circuit. |
| US08644079B2 |
Method and circuit to discharge bit lines after an erase pulse
Disclosed here in a method that comprises performing an erase operation on multiple cells in a memory device, the performing comprising applying an erase voltage to the multiple cells, bit lines coupled to the multiple cells being thereby charged up; and discharging the bit lines by coupling the bit lines to a discharging line through a DC path. |
| US08644078B2 |
Pulse control for nonvolatile memory
A nonvolatile memory device that uses pulsed control and rest periods to mitigate the formation of defect precursors. A first embodiment uses pulsed bitline control, where the coupling between a memory cell channel and a reference voltage is pulsed when it is desired to change state in the associated memory cell. Each pulse may be chosen to be less than about 20 nanoseconds, while a “rest period” between pulses can be on the order of about a hundred nanoseconds or greater. Because bitline control is used, very short rise times can be enabled, enabling generation of pulse durations of 50 nanoseconds or less. In other embodiments, these methods may also be more generally applied to other conductors (e.g., wordline or substrate well, for program or erase operations); segmented wordlines or bitlines may also be used, to minimize RC loading and enable sufficiently short rise times to make pulses robust. |
| US08644077B2 |
Memory device, manufacturing method and operating method of the same
A memory device, a manufacturing method and an operating method of the same are provided. The memory device includes a substrate, stacked structures, a channel element, a dielectric element, a source element, and a bit line. The stacked structures are disposed on the substrate. Each of the stacked structures includes a s tring selection line, a word line, a ground selection line and an insulating line. The string selection line, the word line and the ground selection line are separated from each other by the insulating line. The channel element is disposed between the stacked structures. The dielectric element is disposed between the channel element and the stacked structure. The source element is disposed between the upper surface of the substrate and the lower surface of the channel element. The bit line is disposed on the upper surface of the channel element. |
| US08644075B2 |
Ramping pass voltage to enhance channel boost in memory device
In a non-volatile storage system, first and second substrate channel regions for an unselected NAND string are boosted during programming to inhibit program disturb. The first and second substrate channel regions are created on either side of an isolation word line. During a program pulse time period in which a program pulse is applied to a selected word line, a voltage applied to an unselected word line which extends directly over the second channel region is stepped up to a respective pre-program pulse voltage, at a faster rate at which a voltage applied to an unselected word line which extends directly over the first channel region is stepped up to a respective pre-program pulse voltage. This helps improve the isolation between the channel regions. |
| US08644066B2 |
Multi-level non-volatile memory device, system and method with state-converted data
Methods of programming nonvolatile memory devices include programming a plurality of nonvolatile multi-state memory cells in the non-volatile memory device with state-converted data derived from non-state-converted data. This state-converted data may be associated with a greater number of erased states relative to the non-state-converted data, when programmed into the plurality of nonvolatile memory cells. The methods also include generating a flag having a value that indicates which ones of the plurality of nonvolatile memory cells have been programmed with data that is swapped with data in other ones of the plurality of nonvolatile memory cells. This flag may also be programmed into the nonvolatile memory device. Operations may also be performed to read the state-converted data (and flag) from the plurality of nonvolatile memory cells and then decode the state-converted data into the non-state-converted data, based on the value of the flag. |
| US08644063B2 |
Fabrication and integration of devices with top and bottom electrodes including magnetic tunnel junctions
An electronic device manufacturing process includes depositing a bottom electrode layer. Then an electronic device is fabricated on the bottom electrode layer. Patterning of the bottom electrode layer is performed after fabricating the electronic device and in a separate process from patterning a top electrode. A first dielectric layer is then deposited on the electronic device and the bottom electrode layer followed by a top electrode layer. The top electrode is then patterned in a separate process from the bottom electrode. Separately patterning the top and bottom electrodes improves yields by reducing voids in the dielectric material between electronic devices. One electronic device the manufacturing process is well-suited for is magnetic tunnel junctions (MTJs). |
| US08644060B2 |
Method of sensing data of a magnetic random access memories (MRAM)
A MTJ is sensed by applying a first reference current, first programming the MTJ to a first value using the first reference current, detecting the resistance of the first programmed MTJ, and if the detected resistance is above a first reference resistance, declaring the MTJ to be at a first state. Otherwise, upon determining if the detected resistance is below a second reference resistance, declaring the MTJ to be at a second state. In some cases, applying a second reference current through the MTJ and second programming the MTJ to a second value using the second reference current. Detecting the resistance of the second programmed MTJ and in some cases, declaring the MTJ to be at the second state, and in other cases, declaring the MTJ to be at the first state and programming the MTJ to the second state. |
| US08644051B2 |
Semiconductor memory device and control method of the same
According to one embodiment, a semiconductor memory device includes a plurality of memory cell arrays each includes a plurality of memory cells, the plurality of memory cell arrays being stacked on a semiconductor substrate to form a three-dimensional structure, and a data input/output circuit includes a first address buffer and a second address buffer configured to store a first address and a second address of the plurality of memory cells, and a controller configured to perform control to time-divisionally output the first address and the second address to a first address bus and a second address bus in data input/output. |
| US08644050B2 |
Data retention of ferroelectric films by controlling film composition and strain gradient for probe-based devices
For a probe based data storage (PDS) device a ferroelectric film stack may be used as a media to store data bits by polarizing areas of the film as either an up domain or a down domain to represent bits. However a built-in-bias field (BBF) may create domain retention problems. By growing the ferroelectric films with stress and composition gradients this may generate polarization gradients which reduce the bias field. Thus, the retention (or imprint) may be improved with minimized BBF. |
| US08644049B2 |
Circuit and system of using polysilicon diode as program selector for one-time programmable devices
Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has an OTP element coupled to a diode in a memory cell. The diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a high voltage to an OTP element coupled to the P-terminal of a diode and switching the N-terminal of a diode to a low voltage for suitable duration of time, a current flows through the OTP element may change the resistance state. On the polysilicon diode, the spacing and doping level of a gap between the P- and N-implants can be controlled for different breakdown voltages and leakage currents. The Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting. If the OTP element is a polysilicon electrical fuse, the fuse element can be merged with the polysilicon diode in one piece to save area. |
| US08644048B2 |
Semiconductor device
An object of one embodiment of the present invention is to miniaturize a semiconductor device. Another object of one embodiment of the present invention is to reduce the area of a driver circuit of a semiconductor device including a memory element. A plurality of cells in which the positions of input terminals and output terminals are fixed is arranged in a first direction, wirings each of which is electrically connected to the input terminal or the output terminal of each cell are stacked over the plurality of cells, and the wirings extend in the same direction as the first direction in which the cells are arranged; thus, a semiconductor device in which a driver circuit is miniaturized is provided. |
| US08644045B2 |
Temperature controlled voltage conversion device
A switching frequency setting unit sets switching frequency of a switching element, based on both the temperature of a cooling medium which cools a DC-DC converter and the temperature of a switching element of the DC-DC converter. A switching controller controls the voltage conversion ratio of the DC-DC converter by controlling switching operation of the switching element at the set switching frequency. |
| US08644042B2 |
Alternate current rectifier circuit and power circuit
An alternate current rectifier circuit which includes a first diode, a second diode, a first transistor, a second transistor, a third transistor, and a fourth transistor is power saving. The first diode is connected to the first transistor and the fourth transistor; the second diode is connected to the second transistor and the third transistor. During a positive half cycle of the alternate current, the first transistor and the fourth transistor are switched on and the alternate current flows through the first diode, the first transistor, and the fourth transistor; during a negative half cycle of the alternate current, the second transistor and the third transistor are switched on and the alternate current flows through the second diode, the second transistor, and the third transistor. |
| US08644041B2 |
PFC with high efficiency at low load
A Power Factor Corrector (PFC), typically used as the first stage of switched mode power supplies, particularly suited for Universal Mains inputs, is disclosed, along with methods for controlling a switched mode power supply having power factor correction. In order to increase efficiency, particularly under low load conditions, without undue degradation of the Power Factor, the switching of the PFC circuit is confined to one or more operating windows within each half-cycle. In example embodiments, the operating window comprises a small time window centered around the peak of the mains voltage. The higher the power level, the wider the switching window. |
| US08644038B2 |
Current detection circuit for a power semiconductor device
A current detection circuit for a power semiconductor device utilizes a sense function of the power semiconductor device. The magnitude of current flowing in power semiconductor devices 1, 11 is detected by a current-voltage conversion circuit 24 connected to sense terminals S, S of the power semiconductor devices. The detected signal is delivered to a current direction detection circuit 27, which detects the direction of the current and delivers the detected current direction signal to an external CPU 3, which in turn gives gain-setting and offset-setting signals corresponding to the current direction signal. An output gain adjuster 221 adjusts the magnitude of gain and an output offset adjuster 231 adjusts the magnitude of offset to correct for differences between the characteristics of the sense regions and the main regions of the power semiconductor devices. |
| US08644036B2 |
Multi-output switching power supply device having a step-up/down converter between a stabilized output and a non-stabilized output
In conventional multi-output switching power supply device, power is supplied from a relatively high voltage side output to a relatively low voltage side output through a dropper circuit which generates relatively large power loss so as to improve the voltage accuracy of a non-stabilized output, so that power supply efficiency is low and heat generated from the dropper circuit is high.One DC power supply of a plurality of DC power supplies on the secondary side is a stabilized output (24 V output terminal TM3) having a voltage stabilizing means for stabilizing the output voltage by feeding back the output voltage to a primary side control circuit 4, and the rest of the DC power supplies are non-stabilized outputs (12 V output terminals TM4) not having a voltage stabilizing means for feeding back the output voltage to the primary side. A step-up/down converter is provided between the output of the non-stabilized output and the output of the stabilized output and power is applied/received between the outputs in accordance with the non-stabilized output voltage and, thus, the voltage accuracy of the non-stabilized output is improved. |
| US08644031B2 |
Flexible display device
A flexible display device is provided. The flexible display device includes a flexible plate, a display unit and a sealant. The flexible plate has a concave. The display unit is disposed in the flexible plate and adjacent to the concave. The sealant is formed in the concave and covers the side of the display unit. |
| US08644030B2 |
Computer modules with small thicknesses and associated methods of manufacturing
Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module substrate having a module material and an aperture extending at least partially into the module material. The computer modules can also include a microelectronic package carried by the module substrate. The microelectronic package includes a semiconductor die carried by a package substrate. At least a portion of the semiconductor die extends into the substrate material via the aperture. |
| US08644029B1 |
Surface mount bias tee
A miniaturized wideband surface mount bias tee comprises a printed circuit board with a functioning first capacitor and a dummy second capacitor, and an inductor bonded atop the two capacitors. The capacitors, adhesive and solder are depositable by standard surface mount pick and place machinery. The inductor wires are bonded to one of the first capacitor bonding pads and to an inductor bonding pad. The circuit element bonding pads include portions bordering the pc board edges and are conductively connected to bonding pads on the bottom face of the pc board. Conductive thru-vias for the first capacitor bonding pads reduce parasitic inductance and extend the operating frequency range. A flat-topped insulating cap encloses the bias tee sides and top. The cap forms an air gap between the inductor and circuit elements and provides a surface for manipulating the bias tee with present-day assembly equipment. |
| US08644027B2 |
Method for mechanical packaging of electronics
Electronics mounted on a printed circuit board are housed within a high conductivity case with connecting pins extending therethrough. The case is filled with thermally conductive potting material to provide thermal conduction from the printed circuit board to the case. The case may be a conduit having open ends through which the printed circuit board is inserted or it may comprise a cover mounted to a base plate. |
| US08644025B2 |
Integrated circuit film for smart card
An integrated circuit (IC) film for a smart card is provided. The IC film includes a flexible printed circuit (FPC) board, first electrical contacts, second electrical contacts, and an IC chip. The first electrical contacts are disposed on a first side of the FPC board, and the second electrical contacts are disposed on a second side of the FPC board. The IC chip is disposed on the FPC board and bonded to the leads of the FPC board to thereby form electrical connection. The total thickness of the FPC board and the chip is not larger than 0.5 mm. |
| US08644024B2 |
Cooling system for server and cooling method for electronic apparatus
A cooling system for a server includes at least one radiator and at least one cooling plate that are installed in a server cabinet, a cooling assembly, a storage tank, and a heat exchanger. The cooling assembly is connected to the radiator, and is carried with a first cooling fluid therein. The storage tank is connected to the cooling plate, and is carried with a second cooling fluid therein. The first cooling fluid enters the heat exchanger through the radiator, and the second cooling fluid enters the heat exchanger through the cooling plate. The first cooling fluid and the second cooling fluid perform heat exchange in the heat exchanger, so as to reduce the temperature of the second cooling fluid, thus reducing the required energy enabling the second cooling fluid to return to a set temperature. |
| US08644022B2 |
Internal device arrangement for a passenger cabin
An internal device arrangement for a passenger cabin, for example of an aircraft, is provided. The device has an internal device element which is selected from a group including wall paneling, window panel, side panel, ceiling paneling and luggage compartment. The device has an electrical apparatus fitted in or on the internal device element; and at least one line for supplying power to the electrical apparatus. Furthermore, a heat dissipation device in the form of an integral component part of the internal device element, the electrical apparatus and/or the at least one line is provided. Such a heat dissipation device makes it possible to dispense with an additional heat sink for temperature management and thus save installation space and weight. |
| US08644013B2 |
Movable hinge
A movable hinge to pivotally couple a base and a back panel of an electronic device includes a first slide portion and a second slide portion slidable against the first slide portion. The first slide portion includes a track portion and a first sloped surface connected to the track portion. The second slide portion has a first pin with two ends respectively running through the track portion and fastening to the base, a butting portion coupled on the first pin and slidable thereon, and an elastic element interposed between the butting potion and base. The butting portion is pushed by the elastic element to press the first slide portion to slide against the second slide portion and drive the back panel to move against the base. |
| US08644009B2 |
Thermostat with interchangeable insert
A thermostat includes a housing having a generally rectangular frame-shaped surface that extends around a display device, and first and second side walls on opposing sides of the housing. The first and second side walls of the housing each include at least one recessed notch therein. The various thermostat embodiments further include a colored insert having a generally rectangular frame-shaped configuration, which matches the generally rectangular frame-shaped surface of the housing. The colored insert is disposed over the housing so as to substantially cover the generally rectangular frame-shaped surface of the housing. The various thermostat embodiments further include a single translucent faceplate having an aperture therein, a generally rectangular frame-shaped surface extending around the aperture, and first and second side walls on opposing sides of the single translucent faceplate that include at least one engaging clip configured to engage the recessed notches in the housing. |
| US08644008B2 |
Modular high voltage distribution unit for hybrid and electrical vehicles
A distribution unit has an incomer module disposed on the exterior of a battery casing and electrically connected to a battery housed within the casing, and a plurality of feeder modules electrically daisy-chained to the incomer module and configured to respectively distribute electrical power from the battery to a plurality of individual electrically powered devices. |
| US08644007B2 |
Electrical switching apparatus, and racking assembly and secondary disconnect assembly therefor
A secondary disconnect assembly is provided for a racking assembly of an electrical switching apparatus, such as a circuit breaker. The racking assembly movably couples the circuit breaker to a switchgear enclosure. The secondary disconnect assembly includes a mounting assembly having an elongated mounting member. The elongated mounting member has first and second opposing ends and first and second opposing sides. A sliding assembly is movably coupled to the first side between the first and second ends. A latching member is pivotably coupled to the sliding assembly. The latching member moves between an unlatched position corresponding to the circuit breaker being movable independently with respect to the sliding assembly, and a latched position corresponding to the latching member fixedly coupling the sliding assembly to the circuit breaker in order that the circuit breaker moves with the sliding assembly. The racking assembly may also include a position indicator. |
| US08644005B2 |
Solid electrolytic capacitor and manufacturing method thereof
Provided are a solid electrolytic capacitor including an anode, a dielectric layer provided on a surface of the anode, a coupling agent layer provided on the dielectric layer, a conductive polymer layer provided on the coupling agent layer, and a cathode layer provided on the conductive polymer layer, wherein the coupling agent layer contains a first coupling agent having a phosphonic acid group and a second coupling agent which is a silane coupling agent, and a method for manufacturing the solid electrolytic capacitor. |
| US08644002B2 |
Capacitor including registration feature for aligning an insulator layer
In one example, a capacitor structure may include a capacitor comprising a surface that defines at least one feedthrough aperture and a ceramic insulator layer attached to the surface. The surface of the capacitor may include a capacitor registration feature, and the ceramic insulator layer may include a ceramic insulator layer registration feature. The capacitor registration feature and the ceramic insulator layer registration feature may cooperate to substantially align the ceramic insulator layer to the capacitor, e.g., prior to the ceramic layer being attached to surface of the capacitor. |
| US08644000B2 |
Nanostructured dielectric materials for high energy density multilayer ceramic capacitors
A multilayer ceramic capacitor, having a plurality of electrode layers and a plurality of substantially titanium dioxide dielectric layers, wherein each respective titanium dioxide dielectric layer is substantially free of porosity, wherein each respective substantially titanium dioxide dielectric layer is positioned between two respective electrode layers, wherein each respective substantially titanium dioxide dielectric layer has an average grain size of between about 200 and about 400 nanometers, wherein each respective substantially titanium dioxide dielectric layer has maximum particle size of less than about 500 nanometers. Typically, each respective substantially titanium dioxide dielectric layer further includes at least one dopant selected from the group including P, V, Nb, Ta, Mo, W, and combinations thereof, and the included dopant is typically present in amounts of less than about 0.01 atomic percent. |
| US08643999B2 |
Electromagnetic interference reduction apparatus
Provided is an Electromagnetic Interference (EMI) reduction apparatus. The EMI reduction apparatus includes: an electromagnetic wave absorbing unit absorbing electromagnetic waves from an electromagnetic wave generator and converting the absorbed electromagnetic waves into thermal energy through thermal conversion and emitting the thermal energy; and a thermoelectric unit converting the emitted thermal energy into electric energy. |
| US08643996B2 |
Coaxial in-line assembly
A fine arrestor having a body with a bore there through, an inner conductor within the bore, an inner conductor capacitor within the bore coupled between a surge portion of the inner conductor and a protected portion of the inner conductor, and an inner conductor inductor within the bore coupled electrically in parallel with the inner conductor capacitor. A first shorting portion coupled between the surge portion of the inner conductor and the body and a second shorting portion coupled between the protected portion of the inner conductor and the body, for conducting a surge to ground. Also, other coaxial in-line assemblies may be formed incorporating the inner conductor cavity for isolation of enclosed electrical components. |
| US08643995B2 |
Method and a device for overvoltage protection, and an electric system with such a device
A method and device for protecting an electric system against overvoltage occurrences, the electric system being adapted to be subjected to voltages. The device includes a plurality of surge arresters and a detector configured to detect overvoltage occurrences in the electric system. The surge arresters are connected in series, the plurality of surge arresters including a first surge arrester which is connectable to ground and a second surge arrester which is connectable to the electric system which is to be protected. The device includes a switch connected in parallel with at least one surge arrester of the plurality of surge arresters, and the switch is adapted to be open when no overvoltage occurrence is detected and adapted to close upon overvoltage occurrence detection and short-circuit the surge arrester with which it is connected in parallel. An electric system includes at least one such device. |
| US08643993B2 |
Short-circuit detection circuit and short-circuit detection method
The present invention discloses a short-circuit detection circuit and a short-circuit detection method. The short-circuit detection circuit detects whether an output node is short-circuited to a first predetermined level. A first switch circuit which is controlled by a control signal is coupled between the output node and a second predetermined level. The short-circuit detection circuit includes: a determination circuit, which is coupled between the output node and the second predetermined level, wherein when the determination circuit is enabled, it generates a determination signal according to whether the output node is short-circuited to the first predetermined level; and a second switch circuit, which generates a short-circuit detection signal according to the determination signal. |
| US08643992B2 |
Overcurrent protection apparatus for load circuit
An overcurrent protection apparatus for a load circuit can detect an overcurrent with a high accuracy without being influenced by a deviation ±ΔRon of the on-resistance of a semiconductor element (T1). Supposing that a ratio (R3/R1) between a resistor R3 and a resistor R1 is an amplification factor m, a determination voltage generated by resistors R4, R5 is V4 and the average value of the on-resistance of a MOSFET (T1) is Ron, the overcurrent protection apparatus for a load circuit controls either a current I3 flowing through the resistor R3 or a current IR5 flowing through the resister R5 so that the output signal of a compactor CMP1 is inverted when a current having a value of (V4/m/Ron) flows into the MOSFET (T1). |
| US08643989B2 |
Active current surge limiters with inrush current anticipation
Active current surge limiters and methods of use are disclosed. One exemplary system, among others, comprises a current limiter, including an interface configured to be connected between a power supply and a load; a disturbance sensor, configured to monitor the power supply for a disturbance during operation of the load; and an activator, configured to receive a control signal from the disturbance sensor and to activate the current limiter based on the control signal. |
| US08643985B2 |
Photovoltaic bipolar to monopolar source circuit converter with frequency selective grounding
An electrical power converter for converting power from a bipolar DC source to supply an AC load is disclosed. For one such embodiment the bipolar DC source is a photovoltaic array and the AC power is sourced into an electric power grid. The bipolar photovoltaic array has positive and negative voltage potentials with respect to earth ground. The converter is a utility interactive inverter which does not require an isolation transformer at the electric power grid interface. Embodiments of the invention include methods of detecting and interrupting DC ground faults in the photovoltaic array. |
| US08643982B2 |
Discrete input signal generation via output short-circuit detection
A controller has an output for supplying power to an output device. The controller monitors the supplied power to provide short-circuit protection to the output device. The controller also receives discrete inputs at the output based on the introduction of temporary short-circuit conditions introduced by a momentary switch connected between outputs of the controller in parallel with the output device. The controller detects short-circuit conditions in the output and distinguishes between short-circuit fault conditions and discrete inputs generated by activation of the momentary switch based on measured characteristics of the detected short-circuit conditions. |
| US08643981B2 |
Magnetic domain control for an embedded contact sensor for a magnetic recording head
A head for magnetic data recording that includes an embedded contact sensor. The embedded contact sensor detects head disk contact by detecting changes in temperature as a result of contact between the head and the disk. The embedded contact sensor includes a thermoresistive layer and a structure for pinning the magnetic domains of the thermoresistive layer. This pinning of the magnetic domains prevents the thermoresistive layer from changing resistance in response to magnetic fields (rather than temperature) so as to avoid unwanted signal noise as a result of a magnetic signal from the magnetic media. |
| US08643980B1 |
Micro-actuator enabling single direction motion of a magnetic disk drive head
A magnetic recording device comprises a slider body having a slider interface surface and a magnetic transducer having a lower surface coplanar with an air bearing surface of the magnetic recording device. The magnetic transducer has a transducer interface surface perpendicular to the air bearing surface The magnetic recording device further comprises a piezoelectric actuator operably connecting the slider interface surface and the transducer interface surface. The piezoelectric actuator is configured to translate the magnetic transducer with respect to the slider body in a direction substantially parallel to the slider and transducer interface surfaces. The piezoelectric actuator comprises a plurality of elongate flexures disposed in parallel planes within a body of the piezoelectric actuator. |
| US08643979B2 |
Tapered single pole magnetic heads for perpendicular magnetic recording
Magnetic recording techniques, devices, and systems under a tilted perpendicular recording configuration. An implementation of such a system may include a magnetic head having a single pole to produce a magnetic field along a perpendicular direction; and a storage medium having a top surface to be substantially perpendicular to the perpendicular direction and positioned to interact with the magnetic field, wherein the storage medium includes (1) a magnetic medium layer that has anisotropy easy axes tilted at a tilting angle with respect to the perpendicular direction, (2) a growth layer beneath the magnetic medium layer, and (3) a soft under layer beneath the growth layer. |
| US08643977B1 |
Tape drive for recording data onto and reading data from opposing sides of tape media
A tape drive that passes first and second sides of a storage tape by respective first and second tape head assemblies disposed on a common side of a tape path of the tape to allow for dual-sided recording and/or reading of the tape by the tape head assemblies. Tape leaving a cartridge/supply reel within the tape drive may be wound over one or more tape path guides (e.g., rollers) to face a first side of the tape (e.g., with a first magnetic layer) towards a first tape head assembly. The tape may subsequently be wound over one or more additional guides and then passed in front of a second tape head assembly such that the opposing side of the tape (e.g., with a second magnetic layer) faces the second tape head assembly. After passing by the second tape head assembly, the tape may be wrapped onto a take-up reel. |
| US08643976B1 |
Method for improved repeatable runout learning in a disk drive
A method is disclosed for adaptive learning of fundamental-frequency repeatable runout (1FRRO) compensation information in a disk drive. The disk drive includes a transducer head, a magnetic disk having a plurality of concentric data tracks defined by embedded servo wedges that provide position information, and a control system. In the method, 1FRRO compensation information is learned over a predetermined minimum number of disk revolutions. After the predetermined minimum number of disk revolutions, the 1FRRO compensation information is monitored for convergence while learning of the 1FRRO compensation information continues. Learning is terminated upon detection of convergence of the 1FRRO compensation information. |
| US08643974B1 |
Dynamic reduction of tape stain accumulation on tape head assembly across multiple environments
Systems and methods that sense or obtain environmental conditions of a tape drive and dynamically apply voltage biases to tape head assembly elements based on the sensed/obtained environmental conditions to reduce tape stain accumulation and prolong tape head performance. Detection of different first and second sets of environmental conditions (e.g., in relation to temperatures, humidity levels, tape movement directions, etc.) may result in respective first and second voltage bias level sets being applied to respective first and second head assembly element sets. For instance, different first and second voltage bias level sets may be applied to the same head assembly elements (e.g., the first and second head assembly element sets may be the same), or the first and second voltage bias level sets may be applied to different head assembly elements (e.g., the first and second head assembly element sets may be at least partially different). |
| US08643972B2 |
Magnetic storage apparatus, head drive controller, and head drive control method
A magnetic storage apparatus includes a magnetic recording medium, a microwave assisted magnetic recording head at least equipped with a magnetic recording pole that generates a recording magnetic field for writing to the magnetic recording medium and a high-frequency oscillator that generates a high-frequency field, a magnetic reproducing head that reads information from the magnetic recording medium, a signal processing unit that processes a signal written by the magnetic recording head and a signal read by the magnetic reproducing head and a unit that controls clearance between the high-frequency oscillator and the magnetic recording medium. The magnetic storage apparatus has a characteristic that the high-frequency oscillator is not operated except in recording. |
| US08643970B2 |
Magnetic recording apparatus and recording method of magnetic recording apparatus
According to one embodiment, a magnetic recording apparatus configured to record information onto a magnetic recording medium by a shingled write recording method, the magnetic recording apparatus includes: a recording head configured to cover a plurality of dot arrays and an end portion of which is situated at one dot array of a recording target; an actuator configured to move the recording head by one array after the recording to one dot array by the recording head; and a controller configured to perform recording compensation of the magnetic dot based on prestored recording data of a peripheral dot of a magnetic dot when input user data is recorded to the magnetic dot. |
| US08643967B2 |
Magnetic disk drive and microwave assisted recording method
The present invention enhances reliability by correcting a write error due to unstable oscillation of a spin torque oscillator. In the present invention, a resistance value of a spin torque oscillator is monitored to detect that oscillation becomes unstable during recording. When a measured resistance value is out of a predefined normal range, information for which the recording operation is already performed is rewritten. |
| US08643966B2 |
Inspection device or inspection method for magnetic head or magnetic disc, and magnetic disc recording device and magnetic disc recording method
An inspection device or inspection method for a magnetic head or magnetic disc which can form a servo pattern applicable to a write system, and a magnetic disc recording device or magnetic disc recording method. In inspection or recording of a magnetic disc, which rotates the magnetic disc, a servo pattern is written into a servo pattern region of the magnetic disc by a write-in element of a magnetic head, and is read by a read-in element of the magnetic head. Servo following of a position of the magnetic head on the magnetic disc is performed based on the servo pattern which comprises a plurality of patterns. The patterns are written-in with a first frequency for causing the patterns to be subjected to the servo following and, the patterns are overwritten with a second frequency different from the first frequency, except a servo following width used in the servo following. |
| US08643960B2 |
Internal focus lens
An internal focus lens comprising sequentially from an object side a first lens group having a positive refractive power; a second lens group having a negative refractive power; and a third lens group having a positive refractive power. The second lens group is configured by a simple lens element and is moved along an optical axis to perform focusing. The internal focus lens satisfies condition expressions (1) 0.48<|f3|/f<0.73 and (2) 1.05 |
| US08643959B2 |
Zoom lens and image pickup apparatus equipped with zoom lens
A zoom lens includes a first lens unit having positive refractive power, a second lens unit having negative refractive power, a third lens unit having positive refractive power, and a fourth lens unit having positive refractive power. The first to fourth lens units move during zooming. The first lens unit includes a cemented lens obtained by cementing negative and positive lenses, the second lens unit includes negative, negative, and positive lenses, the third lens unit includes positive and negative lenses, and the fourth lens unit includes a positive lens. Movement amounts M1 and M3 of the first and third lens units, respectively, during zooming from the wide-angle end to the telephoto end and focal lengths f1 and f3 of the first and third lens units, respectively, are appropriately set based on predetermined mathematical conditions. |
| US08643951B1 |
Graphical menu and interaction therewith through a viewing window
Methods and systems involving a navigable area in a head-mounted display (HMD) are disclosed herein. An exemplary system may be configured to: (a) cause a head-mounted display (HMD) to provide: (i) a viewing window that is fully visible in a field of view of the HMD, (ii) a navigable area that is not fully visible in a field of view of the HMD such that the viewing window displays a first portion of the navigable area, and (iii) a media object that is associated with a viewing-window state; (b) receive first head-movement data that is indicative of head movement from a first position of the HMD to a second position of the HMD; and (c) based on (i) the first head-movement data and (ii) the viewing-window state, cause the viewing window to display a second portion of the navigable area which includes the media object. |
| US08643949B2 |
Polarization conversion apparatus
Disclosed is a polarization conversion apparatus, the apparatus including a first optical device capable of angle-converting incident unpolarized light to allow a polarization direction to be emitted in mutually different first and second linear polarizations, an FEL (Fly Eye Lens) including first and second MLAs (Micro Lens Arrays) arrayed with first and second micro lenses, where first and second linear polarizations of the first optical device incident on the first micro lenses are divided and condensed on an upper side and a bottom side of the second micro lenses of the second MLA, and a second optical device converting the first and second linear polarizations condensed on the upper side or the bottom side of the second MLA at the FEL to any one polarization of the first and second linear polarizations and emitting the polarization. |
| US08643947B2 |
Confocal microscope system
There is provided a confocal microscope system configured so as to be compact in size without the needs for a large space, requiring fewer spots for adjustment. In the confocal microscope system, respective units making up the confocal microscope system are integrally housed in a protection cabinet covering the confocal microscope system, and when a specimen disposed opposite to an objective lens is moved toward an external face of the protection cabinet, a side of the external face, adjacent to an opening through which the specimen is taken in, or out, is defined as a front face, the Nipkow disk type scanner unit is disposed backward of the objective lens. |
| US08643944B2 |
Infrared zooming lens
The present invention is directed to an infrared zoom lens that consists merely of optical components of germanium so as to implement an optical system that is capable of reducing variation in brightness during varying a magnification rate and is quite bright and that facilitates compensating for aberration, especially spherical aberration that is generally hard to do, thereby producing a clear and vivid image. The infrared zoom lens comprises first to fourth groups of lens pieces arranged in series from the foremost position closest to the object; each of the lens groups having all the lens pieces made of germanium, and at least one of the lens groups consisting simply of a single lens piece. |
| US08643942B2 |
Compensation of thermally induced refractive index distortions in an optical gain medium or other optical element
In various embodiments, an optical element, e.g., an optical fiber, may be configured to compensate for thermal lensing. For example, thermal lensing may be caused by light power dissipation within an optical fiber, which may include a fiber core that guides amplified light along the longitudinal dimension of the fiber core. Thermal lensing from a thermally induced change in material refractive index as a function of position along dimensions perpendicular to the fiber's longitudinal dimension may be at least partially compensated or offset when light is guided by the fiber core by a designed-in effective refractive index profile selected such that the designed-in material refractive index of the fiber core changes as a function of transverse position within the fiber core, or by selection of a favorable cross-sectional core shape in a plane perpendicular to the longitudinal dimension of the fiber core. |
| US08643939B2 |
Electrophoretic display sheet and manufacturing method therefor
An electrophoretic display sheet manufactured by forming on one surface of a first substrate partitions with an opening and applying and forming a binder layer on one surface of a second substrate, and then causing an electrophoretic dispersion liquid containing black particles and white particles dispersed in a dispersion medium to permeate into the binder layer and affixing the first substrate and the second substrate in a direction in which the surface of the binder layer with the electrophoretic dispersion liquid permeated therein and the surface of the partitions are opposite each other, and a method of manufacturing the electrophoretic display sheet are provided. |
| US08643938B2 |
Microcapsule, system comprising microcapsules, method for changing the state of at least one such microcapsule and apparatus therefor
The invention relates to a microcapsule, a system comprising microcapsules, and a corresponding method and apparatus, the microcapsule (11) comprising a core (12) which is encapsulated by an envelope (14) and in which at least one particle (16) having a motion component (17) and an indication component (18) is provided, the substance of the core (12) being capable of being transferred, at least for a short time, by an input of energy from a solid state or higher-viscosity state to a low-viscosity state, the at least one particle (16) being capable of undergoing a change in its position and/or orientation due to an input of energy occurring during the low-viscosity state of the substance of the core (12), and the substance of the core (12) reverting back, upon completion of the energy input, to the solid state or higher-viscosity state, thereby immobilizing the at least one particle (16) in its new position and/or orientation. |
| US08643937B2 |
Diffractive optical nano-electro-mechanical device with reduced driving voltage
A DND device is disclosed. In one aspect, the device includes a nano-mirror (21), and an actuating module configured to move the nano-mirror in an upward and/or downward position. The actuating module has a cantilever mounted to a fixed structure, and at least one first electrode for moving the cantilever in an upward and/or downward position. Such DND devices may be arranged in a 2D array. |
| US08643934B2 |
Display
A display including a pixel array substrate, an opposite substrate and a fluid medium is provided. The pixel array substrate includes a first substrate including pixel regions and pixel structures disposed in the pixel regions. Each pixel region includes a distribution region of pixel electrode and a non-electrode region. A pixel electrode of the pixel structure is disposed in the distribution region of pixel electrode and has at least one slit extending from the non-electrode region toward the distribution region of pixel electrode. The opposite substrate includes a second substrate and a common electrode disposed on the second substrate and contacting a polar fluid. The fluid medium includes the polar fluid and a non-polar fluid and flows between the pixel array substrate and the opposite substrate. The non-polar fluid is contracted toward the non-electrode region when a voltage difference is generated between the pixel and the common electrodes. |
| US08643929B2 |
Nested Mach-Zehnder modulator
An apparatus includes an optical splitter, an optical intensity combiner, first and second Mach-Zehnder interferometers, and first and second drive electrodes. The first Mach-Zehnder interferometer connects a first optical output of the optical intensity splitter to a first optical input of the optical intensity combiner. The second Mach-Zehnder interferometer connects a second optical output of the optical intensity splitter to a second optical input of the optical intensity combiner. The first drive electrode is located between and connected to a pair of semiconductor junctions along first internal optical arms of the Mach-Zehnder interferometers. The second drive electrode is located between and connected to a pair of semiconductor junctions along second internal optical arms of the Mach-Zehnder interferometers. |
| US08643908B2 |
Color adjustment device, image forming apparatus, and computer readable medium
A color adjustment device includes: a conversion unit that converts color values of a second color space stored in a color conversion table, which defines a correspondence relation between color values of a first color space and color values of the second color space, into color values of a third color space independent from a device outputting an image; a storage unit that stores tables that define different input-output characteristics depending on color values of the third color space; and a change unit that selects at least one table from the tables according to a specified adjustment method, and executes a change process that changes color values of the second color space stored in the color conversion table by using the at least one table. |
| US08643903B2 |
Printing apparatus
Provided is a printing apparatus in which a printed material of a same page is printed in almost same color tone even in a case where calibration execution conditions are satisfied in executing printing processing and concentration correction information is updated. A decision portion decides, when a calibration execution portion executes calibration in executing print image data generation processing based on print setting information of N-up printing, poster printing and the like, whether print image data of N-up printing, poster printing and the like is generated using concentration correction information before update or concentration correction information after update based on print setting information analyzed by a data analyzing portion. Then, based on the decision results, the print image data generation portion generates print image data of N-up printing, poster printing and the like. |
| US08643902B2 |
Bi-color-image-signal generating apparatus, method, and computer program product, and image forming system, using relative brightness of two specified colors
A bi-color-image-signal generating apparatus includes a reception unit and a generating unit. The reception unit receives specification of a specified color in a case of generating a bi-color image signal from a color image signal. The bi-color image signal has color components representing two colors which are an achromatic color and a chromatic color that is the specified color. The generating unit obtains an amount of each color material which is to be used to form an image having the two colors from the color image signal on the basis of a brightness of the specified color, an amount of each color material which is necessary for image formation using the specified color, and a brightness of the color image signal, and generates the bi-color image signal from the color image signal using the obtained amount of each color material. |
| US08643900B2 |
Image forming apparatus and computer-readable storage medium for computer program
An image forming apparatus is provided which performs a process on data stored in advance in accordance with operation by a verified user. The apparatus includes a user authentication portion for performing user authentication on a second user in a state where a first user is verified and logs in the image forming apparatus, an access control portion for, in a login state where both the first user and the second user are verified, giving a permission to perform a process on user data to which one of the first user and the second user determined based on a login order is granted access, and an operation control portion for, in the login state, accepting operation that relates to the user data and falls within at least one of an operation permission given in advance to the first user and an operation permission given in advance to the second user. |
| US08643899B2 |
Device, method, system, and computer program product for determining amount of colorant to maintain thickness of printed layer in regions of molded object based on deformation of print medium
A printed layer formation processing device performs a part of a process for forming a printed layer on a part of the print medium by a first colorant in a molded object formation process. The printed layer formation processing device includes: a formation amount correspondence relationship storage part that stores a formation amount correspondence relationship, which is a correspondence relationship between a degree of deformation of the print medium and a formation amount of the first colorant, which are correlated so that the thickness of the printed layer is substantially the same in respective regions of the molded object, a deformation degree acquisition part that acquires the degree of deformation in the respective regions of the print medium; and a formation amount determining part that determines the formation amount of the first colorant in the respective regions based on the degree of the deformation and the formation amount correspondence relationship. |
| US08643895B2 |
Image processing device capable of saving ink consumption
An image processing device includes an acquiring unit, a rendering unit, and a mode determination unit. The acquiring unit acquires an input data including a character in a first size. The rendering unit renders an output image based on the input data. The mode determination unit determines whether or not a prescribed mode in which a consumption of printing material is reduced while printing the output image is designated. If the mode determination unit determines that the prescribed mode is designated, the rendering unit renders the output image of the character in a second size smaller than the first size. |
| US08643891B2 |
Device, method, system, and computer program product for creating image data to form a multi-layer image on a medium using multiple sets of single-layer data
An image processing device includes a multi-layer data acquiring part configured to acquire multi-layer data having a required-formation-amount-related value representing a value relating to a formation amount required to form an image, and an expanding part configured to expand, based on a correspondence relationship for expansion, the acquired multi-layer data into multiple sets of single-layer data. The correspondence relationship for expansion has a correspondence relationship between the required-formation-amount-related value in each of the sets of single-layer data and the required-formation-amount-related value in the multi-layer data. The required-formation-amount-related value in the multi-layer data is image data that exceeds a maximum-formation-amount-related value representing a value relating to a maximum formation amount of a color value of the single-layer data with which an image can be printed in a single printing process. The required-formation-amount-related value in the single-layer data is image data that is equal to or less than the maximum-formation-amount-related value. |
| US08643890B1 |
Card format for digital screen and print display
A system for formatting and printing wallet cards having the form factor of a standard ISO credit card or debit card, the printing format being calculated according to the aspect ratio and pixel density of mobile handheld devices that are capable of communicating with a printer wherein the handheld device preferably has an internal program that converts the pixilated display screen to a select content portion of the physical ISO card area wherein the remaining card area resulting from the mismatch of the aspect ratios of the display screen and the physical card form is programmed to contain data, graphics, coding, or if desired, left blank as part of the card margin. |
| US08643889B2 |
Image reader
An image reader is provided, which includes a controller that when a PC-scan mode is set as an output mode, the controller controls an image output unit to output second read data of a second side of a document sheet at each time when a storage unit stores the second read data output from a second image reading unit on a line-by-line basis, controls the storage device to store first read data of a first side of the document sheet during a time period from a time when a leading end of the document sheet reaches a reading position of a first image reading unit to a time when a trailing end of the document sheet passes through a reading position of the second image reading unit, and controls the image output unit to sequentially output the first read data stored on the storage unit, after completely outputting the second read data. |
| US08643888B2 |
Image forming apparatus and method for controlling the same
Disclosed is an image forming apparatus including: at least three storing devices; a detecting unit; and a control unit, wherein the striping is carried out by using all of the storing devices, and the mirroring is carried out by using at least two of the storing devices except at least one storing device. When one of the storing device is failed, in case that the mirroring was carried out by using the failed storing device, the mirroring is continued by using the one storing device which is not used for carrying out the mirroring instead of the failed storing device. The striping is carried out by using all of the storing devices except the failed storing device. |
| US08643880B2 |
Control apparatus and control program controlling printing plurality of image files
A printing control apparatus including: a file obtaining section that obtains a specified file including one or more sub-files of a first type and a sub-file of a second type; and a print control section that controls a print section, wherein when a first sub-file of the first type includes M (M being equal to or greater than 1) sets of selected image data and a second sub-file of the first type includes N (N being equal to or greater than 1) sets of selected image data, the print control section controls the print section to obtain a first printing result in which M images based on the M sets of selected image data are printed on a first print medium, and N images based on the N sets of selected image data are printed on a second print medium, which is different from the first print medium. |
| US08643878B2 |
Image forming apparatus, information processing apparatus, computer readable medium and image forming system
An image forming apparatus includes: a deciding unit that decides whether in-monitoring assertion information representing is recorded in the information storing unit by another image forming apparatus or not; a recording unit that generates new in-monitoring assertion information; an acquiring unit that acquires information to be an image forming target; and an executing unit that executes an image formation processing. The recording unit decides that the condition of the expiration is satisfied when an expiration date represented by information indicative of the expiration date elapses if the information is included in the in-monitoring assertion information recorded by the another image forming apparatus, and the recording unit does not generate the in-monitoring assertion information and the executing unit does not execute the image formation processing in that case when the predetermined condition of the expiration is not satisfied. |
| US08643876B2 |
User and device localization using probabilistic device log trilateration
A system and method of localizing elements (shared devices and/or their users) in a device infrastructure, such as a printing network, are provided. The method includes mapping a structure in which the elements of a device infrastructure are located, the elements comprising shared devices and users of the shared devices. Probable locations of fewer than all of the elements in the structure are mapped, with at least some of the elements being initially assigned to an unknown location. Usage logs for a plurality of the shared devices are acquired. The acquired usage log for each device includes a user identifier for each of a set of uses of the device, each of the uses being initiated from a respective location within the mapped structure by one of the users. Based on the acquired usage logs and the input probable locations of some of the elements, locations of at least some of the elements initially assigned to an unknown location are predicted. The prediction is based a model which infers that for each of a plurality of the users, a usage of at least some of the shared devices by the user is a function of respective distances between the user and each of those devices. |
| US08643871B2 |
System and method for controlling printing of a print job in a printing system
A system and method of controlling printing of a print job in a printing system is provided. The print job includes a first section and a second section, with each one of the first and second sections including copyrighted content for which copyright clearance is required prior to printing. In one example of operation, the first and second sections are stored in memory and it is determined that copyright clearance is unavailable for one of the first and second sections. In response to such determining, either (1) printing of the one of the first and second sections is prohibited until it can be determined that a selected condition has been met, or (2) at least one operation is performed with respect to the one of the first and second sections so that only pages for which copyright clearance has been obtained can be printed. |
| US08643863B2 |
Electronic device configured to be connected with a storage medium including a registration unit configured to register information that specifies the media
An electronic device includes a connecting unit configured to be connected with a storage medium that is removable, the electronic device transmitting data with the storage medium that is connected with the connecting unit, a registration unit configured to register information that specifies the media that is permitted to transmit data with the electronic device, and a control unit configured to control whether to permit the electronic device to transmit data with the media that is connected with the connecting unit based on the information that is registered in the registration unit. |
| US08643860B2 |
Image forming apparatus performing network communication
An image forming apparatus having at least a normal mode and an energy saving mode of less energy consumption than the normal mode includes: a main controller executing image processing in the normal mode and stopping operation in the energy saving mode; energy saving controller controlling the image forming apparatus in the energy saving mode; nonvolatile storage unit connected to the main controller; volatile storage unit connected to the main controller and the energy saving controller; and network communication unit connected to the energy saving controller to perform network communication. The nonvolatile storage unit stores a MAC address with which the energy saving controller controls the network communication unit. The main controller writes the MAC address stored in the nonvolatile storage unit into the volatile storage unit during startup of the apparatus. The energy saving controller controls the network communication unit based on the transferred MAC address. |
| US08643859B2 |
Image forming apparatus and control method thereof
An image forming apparatus and a control method thereof which performs an auto-recovery function, the image forming apparatus including: a housing including a door; an image forming unit mounted in the housing to form an image on a print medium; a medium discharger which discharges the print medium to an outside of the housing; a finisher mounted on the housing to perform a finishing operation; a discharging direction changer which changes a discharging direction of the print medium to guide the print medium to one of the medium discharger and the finisher; and a controller which controls the image forming unit, the finisher and the discharging direction changer, and selectively performs an auto-recovery operation to automatically recover a jam of the print medium depending upon an occurrence location of the jam of the print medium if the jam occurs from a predetermined location of a print medium feeding path. |
| US08643854B2 |
Image forming apparatus and print control method used therein
An image forming apparatus, connected to an information processing device via a network, includes a receiving section, a memory, an interpretation section, and a transmission section. The receiving section receives a plurality of pieces of print data from the information processing device via the network. The plurality of pieces of print data include first print data for normal printing, second print data for interruption printing, and third print data. The memory has first to third buffers. The first and second buffers store the first and second print data, respectively. The third buffer stores the third print data during execution of the interruption printing of the second print data. The interpretation section interprets the plurality of pieces of print data. The transmission section transmits a reply message to the information processing device in accordance with a result of the third print data interpreted by the interpretation section. |
| US08643847B1 |
Interferometric technique for measuring patterned sapphire substrates
A patterned sapphire substrate is measured from a fine phase map and a coarser height map of the sample. The boundaries of the PSS features are identified by finding the locations of minimum contrast in the modulation map of the substrate and are used to produce a height map of the substrate base and a phase map of center regions of the features. A fringe-order map of the features with respect to the base is used to identify the most prevalent fringe order of pixels in the center-regions of the features. That fringe order is adopted as the correct offset between corresponding pixels in the phase map of the center regions of the features and the base of the substrate. A complete map of the substrate is thus obtained by combining the phase map of the features with the height map of the substrate with an offset equal to the fringe order produced by the invention. |
| US08643846B2 |
Method and apparatus for the simultaneous generation and detection of optical diffraction interference pattern on a detector
The present invention provides for a novel method and apparatus for the simultaneous generation and detection of optical diffraction interference pattern on a photo detector. The monitoring method and apparatus disclosed herein comprises of a (any) continuous wave coherent collimated beam of light (or a laser) falling on an (any) optically reflective coating on the surface of the body with inherent vibrations, or with manifest vibrations induced from another source through any medium where the said light is reflected, and then received on the surface of a (any) photo detector in such a way that the received light falls partially on the active sensing area, and partially on the outer perimeter of the active sensing area. |
| US08643844B2 |
Laser distance measuring apparatus with beam switch
A laser interferometer (10) comprises: a first beam splitter (22) which splits a laser beam emitted from a light source (3) into a first beam (L2) and a second beam; a second beam splitter (24) which splits the second beam into a third beam (L1) and a fourth beam (L3), and which causes reflected beams, produced by reflection of the split beams (L1, L3) and incident from reverse directions to the directions of the split beams, to exit in a reverse direction to the direction of the second beam; and a beam selecting unit (50, 51, 60, 66, 68) which, from among the reflected beams produced by reflection of the third and fourth beams (L1, L3) and caused to exit the second beam splitter (24) in the reverse direction to the direction of the second beam, selects a beam to be combined in the first beam splitter (22) with a reflected beam produced by reflection of the first beam (L2) and incident on the first beam splitter from a reverse direction to the direction of the first beam (L2). |
| US08643843B2 |
Method of estimating a degree of contamination of a front screen of an optical detection apparatus and optical detection apparatus
A method for estimating a degree of contamination of a front screen of an optical detection apparatus is provided comprising the steps: Transmitting a plurality (p) of transmission radiation pulses into a detection zone; generating a reception signal for each transmission radiation pulse including a plurality (q) of sampled values, a sampled value indicating the intensity of the received back radiation of the transmission pulse after a predefined time interval from the transmission of the transmission radiation pulse; generating an averaged reception signal having a plurality (q) of sampled values from the plurality of reception signals, with those respective sampled values of the reception signals being added which were determined at mutually corresponding points in time to determine a sampled value of the averaged reception signal; generating at least one front screen contamination value by evaluating an amplitude value and/or a measured peak shape value of the averaged signal. |
| US08643841B1 |
Angle-resolved spectroscopic instrument
A method for optically inspecting a specimen by directing a probe beam onto the specimen at varying angle of incidence and azimuth angle, thereby producing a reflected probe beam, gathering the reflected probe beam, separating the reflected probe beam as a function of wavelength, adding astigmatism to separate the reflected probe beam as a function of at least one of the angle of incidence and the azimuth angle, and evaluating the specimen based at least on changes in the reflected probe beam as a function of wavelength of the reflected probe beam and at least one of the angle of incidence and the azimuth angle. |
| US08643835B2 |
Active planar autofocus
A system for inspecting a depth relative to a layer using a sensor with a fixed focal plane. A focus sensor senses the surface of the substrate and outputs focus data. In setup mode the controller scans a first portion of the substrate, receives the focus data and XY data, and stores correlated XYZ data for the substrate. In inspection mode the controller scans a second portion of the substrate, receives the focus data and XY data, and subtracts the stored Z data from the focus data to produce virtual data. The controller feeds the virtual data plus an offset to the motor for moving the substrate up and down during the inspection, thereby holding the focal plane at a desired Z distance. |
| US08643830B2 |
Process for predicting metallic gloss of coating resulting from coating compositions by wet color measurement
The present process adjusts the amount of flattener added to the coating composition, the gloss of a coating resulting therefrom can be controlled from glossy to flat (matte) finish. The process includes measuring reflectance (L-value) of a layer of the coating composition applied over a test substrate by using gloss prediction device of the present invention. The metallic gloss of a coating resulting from the layer is then measured. The process is repeated with varying amounts of one or more flatteners added to the composition and the metallic gloss vs. reflectance is plotted on a graph. Then by means of a curve fitting equation, a metallic gloss prediction curve is plotted. By measuring the reflectance of a wet layer of a target coating composition, the metallic gloss that would be produced by a coating from that target coating composition can then be predicted by using the gloss prediction curve. |
| US08643829B2 |
System and method for Brillouin analysis
A Brillouin analysis sensor system comprising: a Brillouin analysis sensor; a polarization beam splitter/combiner, operably connected to the Brillouin analysis sensor between the sensor and the sensing fiber, for receiving polarized lightwaves from the sensor, combining the lightwaves and launching combined lightwaves waves in the sensing fiber a first direction, and a phase conjugate mirror at a free end of the sensing fiber for receiving combined lightwaves from the polarization beam splitter/combiner, rotating the polarization of the combined lightwaves and launching the rotated combined lightwaves in the sensing fiber in an opposing direction to the first direction. |
| US08643828B2 |
Laser surveying instrument
A laser surveying instrument comprising a light source unit having two or more light emission sources for emitting pulsed distance measuring lights with different wavelengths, a light projecting unit for projecting the pulsed distance measuring lights with the two or more wavelengths on an optical axis, and a deflection member provided on the optical axis, is disclosed. The deflection member has two or more reflection surfaces which reflect each wavelength of the pulsed distance measuring lights independently, thereby dividing the pulsed distance measuring lights for every wavelength, and deflecting each of the distance measuring lights toward an object to be measured. The instrument comprises a single photodetection element for receiving reflected distance measuring lights from the object to be measured. In the laser surveying instrument, a measurement of distance is performed for every pulsed distance measuring light based on a photodetection signal produced by the photodetection element. |
| US08643826B2 |
Method for increasing throughput and reducing blurriness due to movement
A method for illuminating printing plates in which the light from a light source is imaged on a two-dimensional light modulator having a plurality of rows of light-modulated cells, and the light is modulated thereby, whereupon the light modulator is imaged on light-sensitive material via an imaging beam path, wherein the light-sensitive material is moved relative to the light modulator substantially perpendicularly to the direction of the rows of light-modulated cells at a relative speed and wherein the data pattern to be imaged on the light-sensitive material is displayed beginning in the first row of the light modulator in each row consecutively during an exposure time (T, T′) and then moved to the subsequent row of the light modulator. In order to improve the method, the image of the data pattern is held substantially stationary relative to the light-sensitive material during the exposure time (T, T′). |
| US08643818B2 |
Protection structure
A flat panel display device includes a display panel, a backlight module, a printed circuit board and a protection structure. The backlight module is disposed on a non-display side of the display panel. The printed circuit board with a signal connector is connected with the display panel and disposed between the display panel and the printed circuit board. The protection structure is used to protect the backlight module from the deformation caused by the external force, especially the optically films in it, like conductive film etc. The protection structure includes a protective film, a movable piece and an elastic element. The protective film is covered on the printed circuit board and having an opening to expose the signal connector. The movable piece is connected with the protective film, and the opening is disposed between the movable piece and the protective film. |
| US08643811B2 |
Liquid crystal shutter component and liquid crystal shutter
According to one embodiment, a liquid crystal shutter component includes a first polarizer, a second polarizer, a liquid crystal layer, a first retardation layer, a second retardation layer, a third retardation layer and a fourth retardation layer. A liquid crystal orientation of the liquid crystal layer transitions between a plurality of bend orientation states. The retardation in the direction along the plane of the second retardation layer and the fourth retardation layer is 20 nm or more and 120 nm or less. The retardation along the first direction of the second retardation layer and the fourth retardation layer is 40 nm or more and 140 nm or less. |
| US08643810B2 |
Liquid crystal display device having an outer-side optical member and a backlight-side optical member
A liquid crystal display device includes: one side substrate; the other side substrate that is disposed to be opposed to the one side substrate; a liquid crystal layer that is sandwiched between the one side substrate and the other side substrate; and a light source that illuminates light on the liquid crystal layer from the outside of the other side substrate. At a specific peak wavelength, in a region shorter than a wavelength of blue light in a visible light region of the light illuminated from the light source, a transmittance from the other side substrate to the liquid crystal layer is smaller than a transmittance from the one side substrate to the liquid crystal layer. |
| US08643808B2 |
Light-scattering substrate, method for manufacturing light-scattering substrate, polarizing plate and image display device
A light-scattering substrate having an irregular shape on one surface thereof is provided, the light-scattering substrate including: a thermoplastic resin; and at least one kind of transparent particles having a mean primary particle size of 3 μm or more and not more than 12 μm, wherein the light-scattering substrate contains a first region having a thickness of ½ or more times and not more than 4 times the mean primary particle size of the transparent particles from the surface having an irregular shape; and a second region having a thickness of 3/2 or more times the mean primary particle size of the transparent particles from a surface on back side of the surface having an irregular shape, and the first region and the second region have a region not substantially containing the transparent particle. |
| US08643806B2 |
Liquid crystal display device
A liquid crystal display device is provided. The liquid crystal display device includes a light-shielding member to prevent light irradiated upward from a light-emitting surface of a plurality of light-emitting diodes from being incident on a lower edge of an incident surface of a light-guide portion. As a result, a bezel surrounding a liquid crystal display panel may be made thinner, and a bright line defect, hot spot, may be prevented. |
| US08643796B2 |
Liquid crystal display device
In one embodiment, a liquid crystal display device having a plurality of pixels includes a first substrate having an insulating substrate, a first detection element extending in a first direction above the insulating substrate, a second detection element extending in a second direction crossing the first direction and an insulating film provided between the first and second detection circuits. A second substrate is arranged opposing to the first substrate so as to hold a liquid crystal layer therebetween. A detection circuit is provided on the first substrate to detect change of electrostatic capacitance between the first and second detection elements. At least one of the first and second detection elements is an element required for operating the liquid crystal layer. |
| US08643782B2 |
Image display device and method for displaying an image
An image display device including a receiving section acquiring a synchronizing signal superimposed on a digital signal, an image generating section outputting image data based on a digital signal, a control section controlling the image generating section, an adjusting section making an adjustment to the digital signal based on setting information, and an information inputting section to which a display instruction to display a setting image for assisting the change of the setting information is input, wherein the image generating section generates a second synchronizing signal different from the first synchronizing signal, and the control section controls the image generating section. |
| US08643780B2 |
Apparatus and method for detecting vertical blanking interval
An apparatus and method for detecting vertical blanking interval (VBI) is disclosed. The apparatus can automatically detect the presence and type of a VBI signal, so as to perform corresponding VBI decoding subsequently. The apparatus includes a digitizing module and a detecting module. The digitizing module converts a television signal into a digital signal according to a level value. The detecting module detects if the digital signal includes a VBI signal, and if yes, further determines the type of the VBI signal. |
| US08643775B2 |
Simplified data interface protocol for digital television receiver
Certain embodiments of the present invention encapsulate a variety of data, for example, FIC data, together with ATSC-M/H Service data, into a single IP stream, to simplify the interface between demodulator and media processor. A single data interface protocol within the receiver can then be used, facilitating integration. |
| US08643769B2 |
Method for capturing wide dynamic range image in a 16 bit floating point format
Embodiments of the invention provide a 16 bit floating point signal processor will typically give an order of magnitude more performance than a 32 bit floating point signal processor and about twice as much performance as a 16 bit fixed point processor. Capturing wide dynamic range images in 16 bit floating point format entails representing an iris of a imaging device as an exponent of a floating point number and representing the precision of said imaging device as a mantissa of said floating point number. |
| US08643764B2 |
Image pickup apparatus using zoom lens
An image pickup apparatus includes a zoom lens having a first positive lens unit, and a first negative lens unit disposed on an object side of the first positive lens unit. A distance between the first positive lens unit and the first negative lens unit is narrowed at the time of zooming from a wide angle end to a telephoto end. The zoom lens includes an aperture stop disposed between a lens nearest to an image side in the first negative lens unit and a lens nearest to the image side in the first positive lens unit, and a light-amount reducing filter made of a resin material which is disposed on the image side of the lens nearest to the image side in the first positive lens unit, and which can be inserted in an optical path and withdrawn from the optical path. The zoom lens satisfies predetermined conditional expressions. |
| US08643761B2 |
Camera and control method of camera
An apparatus includes an imaging unit to capture an image of an object, a selection unit to select one of a plurality of shooting modes of the imaging unit, a recording unit to record the captured image onto a recording medium, a switching unit to switch between a reproduction mode in which recorded image data is read out and displayed on a display device, and a shooting processing mode in which shooting processing is performed in the selected shooting mode and a reproduction control unit to cause the display device to display the read out image data. When the switching unit switches the mode to the reproduction mode, the reproduction control unit changes an operation that can be instructed in the reproduction mode according to the selected shooting mode. |
| US08643756B2 |
Solid-state image-sensing device having a plurality of controlled pixels, with each pixel having a transfer gate signal that is ternary-voltage signal switched among three levels, and method of operating same
By feeding an appropriate voltage as a signal φTX to a transfer gate TG, a MOS transistor T1 is operated in a threshold region. A potential linearly or natural logarithmically converted by a buried photodiode PD is transferred to an N-type floating diffusion layer FD so as to be fed out, as an image signal, via MOS transistors T3 and T4. |
| US08643753B2 |
Image pickup apparatus and method thereof
An image pickup apparatus and a method thereof are provided. The apparatus includes a sensor array and an ADC array. The sensor array includes M×N sensor blocks SB(i,j). The sensor block includes P×Q image sensing elements Se(x,y). The ADC array is located at another side of the illuminated side of the sensor array. The ADC array includes M×N ADCs ADC(i,j). The ADC(i,j) coupled to the sensor block SB(i,j) obtains the image data Data(x,y) from the image sensing element Se(x,y) of the sensor block SB(i,j). The ADC(i,j) evaluates the gain G(x,y) based on the position of the image sensing element Se(x,y). The compensated image data Datacom(x,y) can be outputted and Datacom(x,y)=Data(x,y)×G(x,y). The image pickup apparatus could improve the optical shading problem. |
| US08643752B1 |
System and method for reducing motion blur using CCD charge shifting
A method and system is disclosed for reducing motion blur using CCD charge shifting. In one embodiment, photodiode wells are exposed for a set of successive exposures with each exposure duration being a fraction of a total exposure time. After each successive exposure, the photodiode wells integrate signal charges and shift them to corresponding storage lines. The shifted signal charges are then shifted along the storage lines for a specified number of storage units. At the same time, the CCD is moved in the direction of a leading edge of the CCD. The photodiode wells are then exposed for another exposure to produce another set of signal charges, which are shifted to the storage lines. Signal charges from the successive exposures are accumulated at the storage lines. After all successive exposures have been taken, the accumulated signal charges are shifted to a serial shift register and output to form an image. |
| US08643750B2 |
Reducing noise in image sensors by concurrently reading reset and image signal levels from active and reference pixels
A method of one aspect includes reading a reset level of an active pixel, and concurrently, reading a reset level of a reference pixel. The method also includes reading an image signal level of the active pixel, and concurrently, reading an image signal level of the reference pixel. A reduced noise image signal level of the active pixel is generated based on the reset levels and the image signal levels of the active and reference pixels. Other methods are disclosed as well as apparatus and systems. |
| US08643749B2 |
Imaging device, display device, control method, and method for controlling area change
An imaging device includes an imaging unit that receives light coming from a subject and thus generates electronic image data; a display unit that displays an image corresponding to the image data; an angle-of-view setting unit that an angle of view to be changed for the image displayed by the display unit according to a first signal input from the outside; and a control unit that starts control of change to a predetermined angle of view set by the angle-of-view setting unit according to a second signal different from the first signal. |
| US08643745B2 |
Content shooting apparatus
A content shooting apparatus is provided which is suitable for generating a digest meeting the user's desire.A scene information generation portion detects a characteristic scene with reference to a parameter contained in either video/audio in content recorded during shooting operation information for the shooting apparatus, and generates scene information, an auxiliary information assignment portion assigns the scene information its type, priority, start time, end time, or representative time as auxiliary information in accordance with a prescribed rule, a listing portion makes a list of the scene information and the auxiliary information thereof, and a scene sorting-out portion sorts out scenes from the content with reference to the priority, such that the number of scenes is within a predetermined range. |
| US08643743B2 |
Image processing apparatus and method
A first white balance correction amount is calculated according to similarity between image data acquired by an image pickup unit and past image data acquired in the past, and a first white balance correction is performed on the image data according to the first white balance correction amount. A luminance correction amount and a color correction amount are calculated according to similarity between the corrected image data and the past image data corrected in the first white balance correction. Using one of them, the first white balance correction amount is corrected thereby to obtain a second white balance correction amount. According to the obtained correction amount, a second white balance correction, a luminance correction, and a color correction are performed on the image data acquired by the image pickup unit. |
| US08643739B2 |
Image recognition apparatus, processing method thereof, and computer-readable storage medium
An image recognition apparatus includes: a storage unit configured to store a dictionary used to recognize a predetermined pattern; a recognition unit configured to detect in image data using the dictionary, as recognition results, a plurality of partial regions having a likelihood of being the predetermined pattern greater than a predetermined threshold; a display unit configured to display the image data, and also display information indicating the partial regions that were detected by the recognition unit; a determination unit configured to determine, based on an instruction by a user, a negative region from among the plurality of partial regions that were detected by the recognition unit; a generation unit configured to generate a learning image based on the determined negative region; and an update unit configured to update the dictionary based on the learning image that was generated by the generation unit. |
| US08643738B2 |
Face detection device, digital camera, and computer readable storage medium which stores a face detection program
A control unit detects a face area from a first image and a second image which differ in shooting conditions by a face detector. If an area of the first image which is in a position corresponding to a face area detected from the second image is not detected as a face area, the control unit extracts the area of the first image as a non-detected area, and based on the non-detected area, executes learning of the face detector so that the non-detected area is detected as a face area. |
| US08643730B2 |
Imaging device and image capturing method
An imaging device is provided which includes an imaging unit for converting light passing through a focus lens into an image signal to obtain an image, an arrangement unit for arranging an evaluation frame on the image obtained by the imaging unit, a determination unit for determining a focusing position of the focus lens based on pixel value evaluation in the evaluation frame arranged by the arrangement unit, and a driving unit for moving the focus lens to the focusing position determined by the determination unit, in which the arrangement unit re-arranges the evaluation frame by modifying the evaluation frame when a straight-line component appearing on the image overlaps with the evaluation frame. |
| US08643724B2 |
Multi-camera vision system for a vehicle
A multi-camera vision system for a vehicle includes first, second and third image capture devices disposed at respective vehicle portions. The first image capture device field of view overlaps with the third image capture device field of view defining a first overlap zone, and the second image capture device field of view overlaps with the third image capture device field of view defining a second overlap zone. Responsive to processing by an image processor of received image data, a synthesized image is generated without duplication of objects present in the first overlap zone and in the second overlap zone. The synthesized image approximates a view as would be seen by a virtual camera at a single location exterior of the vehicle, and is displayed by a single display screen of a reconfigurable display device that is viewable by a driver of the vehicle when normally operating the vehicle. |
| US08643721B2 |
Method and device for traffic sign recognition
In a method and a device for traffic sign recognition, at least one significant feature for a traffic sign is determined which is standardized for a region. The region that corresponds to the determined feature is determined. At least one classification feature and/or at least one classification method is defined depending on the determined region for the recognition of the traffic sign and/or at least one further traffic sign. The recognition of the traffic sign and/or the at least one further traffic sign is performed by using the defined classification feature and/or the defined classification method. |
| US08643719B2 |
Traffic and security monitoring system and method
A method for monitoring a geographic area that using a plurality of unmanned mobile vehicles. Each unmanned mobile vehicle may be programmed with an operational plan to cover a specific subregion of said geographic area. Each unmanned mobile vehicle may be used to obtain visual images of its associated said subregion during operation. A surveillance system is also disclosed for monitoring a geographic area. The system includes a plurality of autonomously operated unmanned mobile vehicles. Each vehicle includes an onboard system that executes an operational plan to enable the vehicle to traverse a specific subregion of the geographic area. Each onboard system further includes a monitoring system to obtain visual images of its associated subregion. |
| US08643718B2 |
Image measuring apparatus
An image measuring apparatus includes: a light source; an imaging device; and a controller configured to adjust a light emission amount of the light source based on a light reception amount of the imaging device, wherein: when a light reception amount of the light receiving element is more than a maximum value, the controller reduces a light amount of the light source in next light reception; when the light reception amount of the light receiving element is less than the maximum value, the controller increases the light amount of the light source in the next light reception; and when the light amount of the light source reaches the maximum light amount and the light reception amount is smaller than a minimum value, the controller makes the light amount of the light source in the next light reception a minimum light amount. |
| US08643717B2 |
System and method for measuring irregular objects with a single camera
An optical system for measuring an irregularly shaped object includes a dimensioning station having a base, a first wall extending from the base, and a second wall extending from the base. A collimated light is passed from each of first and second collimated light sources arranged generally parallel to the base, illuminating the first and second walls and defining first and second shadows, respectively. A camera is arranged to obtain image data representing each of the first and second shadows. The system is configured to collect the image data for determining at least one dimension of an object from each of the first and second shadows. Each of the first and second collimated light sources may be a light with a collimating lens arranged between the light and the respective wall. The light source may be an LED and the collimating lens may be a collimating Fresnel lens. |
| US08643715B2 |
Real-time remote-viewing digital compass
Vehicle-mounted video cameras, if and when wirelessly connected via a hybrid transceiver of satellite and terrestrial links and either through a randomly-formed vehicle-to-vehicle network, or via mobile web links, may enable motorists behind the wheel to remotely see either on a navigator screen, or on a screen of mobile equipment, inclusive of handsets and tablet PCs, any real-time video images of traffic and/or street scenes, far beyond physical limits of human eyesight. In pursuing the said peer-to-peer advantages, the real-time street views targeted in any directions can be picked at the discretion of motorists, by transmitting the location-based inquiry to the targeted on-vehicle cameras, by tapping on an in-vehicle touchscreen or a mobile device screen and also by activating voice commands, if necessary. The viewable range and directions are only affected or limited by the signal strength based on the density of moving vehicles in between and the availability of interconnected roadside stationary surveillance fixtures as well as the availability of target vehicles equipped with video cameras. |
| US08643713B2 |
Imaging apparatus
An imaging apparatus includes an imaging unit for capturing a subject and generating image data of the subject, an operation input unit for receiving inputs of operation signals containing a release signal for instructing the imaging unit to shoot, an acceleration detector for detecting an acceleration of the imaging apparatus, a state detector for separately detecting a case in which the imaging apparatus is overland, a case in which the imaging apparatus is underwater and a photographer shoots while swimming, and a case in which the imaging apparatus is underwater and the photographer shoots while changing a water depth, and a control unit for performing operation control depending on an input into the operation input unit and/or into the acceleration detector according to a state detection result by the state detector. |
| US08643706B2 |
Display apparatus and control method of the same
Provided are a display apparatus and a control method of the same. The display apparatus includes: an organic light emitting panel which alternately scans a left-eye image and a right-eye image in units of a frame; a signal transmitter which outputs a control signal to external shutter glasses to open or to close a left-eye shutter and a right-eye shutter of the shutter glasses; and a controller which controls the signal transmitter to make open and closed states of the left-eye shutter and the right-eye shutter be opposite to each other, and controls emission of the organic light emitting panel to display an image corresponding to an open shutter and not to display an image opposite to the open shutter when one of the left-eye shutter and the right-eye shutter is open. |
| US08643704B2 |
Stereoscopic images generated by adding content to alternate eye images for retinal rivalry
A method for generating stereoscopic images with retinal rivalry effects. The method includes retrieving primary eye images and alternate eye images from memory. These images are filmed from horizontally offset cameras but include the same content. The method continues with processing the alternate eye images to introduce retinal rivalry such as by including a set of frames that have differing content from a corresponding set of frames from the primary eye images. The differing content, for example, may include an object rendered for the alternate eye that was not rendered in the primary eye images. The method may further include editing the primary eye images by inserting a transition and then editing the alternate eye images to perform the transition (e.g., a dissolve or cut) at a temporally offset transition point such as several frames later to introduce frames that differ in content from one eye stream to the other. |
| US08643694B2 |
Method and apparatus for answering and recording automatically in visual telephone service
The present invention provides a method and apparatus for implementing automatic answering and recording in videophone services. The method comprises: when a video call is coming, a called terminal automatically answering the call and playing a prerecorded automatic answering prompting message to a calling user; and the called terminal recording audio and video of the calling user and ending the call after the recording is completed. The present invention has solved the problem that a videophone has no automation answering and recording function in prior art. Thus, the user can answer selectively video calls at anytime and anywhere, important video calls can be automatically recorded, and video calls which are inconvenient to be answered can be answered automatically by choosing various videos. |
| US08643687B2 |
Printing surface processing method and printing surface processing apparatus
A printing surface processing method includes first forming, second forming and applying. In the first forming, a substantially flat first image expressed with unevenness sense based on a touch and/or a stroke of a brush is formed on a first face of a thermal expansion sheet. In the second forming, a second image constituted of a grayscale image is formed on a second face of the sheet. The grayscale image includes a dark portion and a light portion with densities set to form a substantially uneven shape on the first face. The uneven shape corresponds to the unevenness sense of the first image and unevenness sense of fabric where the first image is supposed to be formed. In the applying, thermal energy is applied to the second image to expand the sheet to form the uneven shape on the first face. |
| US08643683B2 |
Driver of field sequential display capable of switching current and voltage of scan signal and display signal and driving method thereof
A driver of a field sequential display is provided. The driver includes a first power device, a second power device, and a driving waveform generator. The first power device generates a first power when the field sequential display is in a color mode. The second power device generates a second power when the field sequential display is in a monochrome mode. The voltage and current of the second power are respectively smaller than the voltage and the current of the first power. The driving waveform generator coupled to the first power device and the second power device and generates a plurality of scan signals and a plurality of display signals according to the first power or the second power, so as to drive a display panel of the field sequential display. |
| US08643682B2 |
Method for driving a light source, light source apparatus for performing the method and display apparatus having the light source apparatus
A method of driving a light source includes: determining a location of pixel data of a display relative to a plurality of light-emitting blocks of a light source, obtaining a plurality of luminance values of the light-emitting blocks corresponding to the location by using a lookup table (LUT) storing the luminance values of the light-emitting blocks, generating a plurality of histograms corresponding to the light-emitting blocks, determining a plurality of target luminance values of the light-emitting blocks using the histograms, and driving the light-emitting blocks using the determined target luminance values. The luminance values of the light-emitting blocks are based on the location of the pixel data within an image block of the display corresponding to each light-emitting block. Each of the histograms indicates a frequency of each of the luminance values of a respective one of the light-emitting blocks. |
| US08643678B1 |
Shadow generation
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating shadows. In one aspect, a method includes identifying a two-dimensional image representing an icon and a two-dimensional image representing a light source, applying an affine transformation to a transparency channel of the image representing the icon, the affine transformation projecting pixels of the transparency channel into three-dimensional space, and generating a field of pixels representing a shadow cast by the icon by computing a portion of the light source that is visible to pixels of the field by subtracting rows of a matrix that represents the affine transformation from rows of a matrix that represents the transparency channel of the light source image, and computing brightness of each of the generated pixels of the field based at least partly on the computed portion of the visible light source. |
| US08643677B2 |
Image processing apparatus and image processing method, and program therefor
An apparatus includes an overlap detector and a display modification unit. The overlap detector is configured to determine if a first image superimposed with a second image overlaps an object in the second image by greater than a threshold. The display modification unit is configured to change the content of the first image superimposed with the second image such that the first image no longer overlaps the object in the second image by greater than the threshold when the overlap detector detects that the first image overlaps the object in the second image by greater than the threshold. |
| US08643673B1 |
Methods and apparatus for improving the typical running time of the bellman-ford algorithm
Disclosed are apparatus and methods for generating displays based on a layout. A layout is received that specifies a set of rectangular components, where each rectangular component has at least one size. A plurality of grid lines is determined from the layout. A system of constraints related to the plurality of grid lines is generated. A graph is generated with a plurality of nodes corresponding to the plurality of grid lines and a plurality of edges corresponding to the system of constraints. The plurality of edges is topologically sorted. Locations for the grid lines are determined by solving a single-source path-length problem for the graph to using a variant of the Bellman-Ford algorithm configured to operate with the topologically-sorted plurality of edges. A display of the rectangular components based on the locations of the grid lines. |
| US08643668B2 |
Medical imaging viewer
A medical imaging viewer application processes and interactively displays grayscale images having a higher grayscale range (bit depth) on a platform optimized for a lower grayscale range. The application additionally provides pixel calculations based on the user's selection of a window center and a window width. |
| US08643667B2 |
Method of displaying comic books and similar publications on a computer
In a method for displaying an illustrated book on a computer screen, a graphics image, corresponding to a page in the illustrated book, is displayed on the computer screen. A text detail image is displayed on the computer screen, the text detail image is displayed as a layer on the top of the graphics image. A cursor rolling over the text detail image is detected. A magnified image of the text detail image is displayed when the cursor has rolled over the text detail image. |
| US08643665B2 |
Method for transformation of colour values
A method for transformation of color values of an initial color space reproducible by a first technical device to color values of a target color space reproducible by a second technical device is provided. The method includes movement from one color space by conversion of color values to different color values in the basic color space and scaling by conversion to different color values in the basic color space. The method also includes conversion of color values of the initial color space to color values which are closest to the color value in the edge area of the target color space. The method also includes movement of color values located in an edge area of the target color space to the interior of the target color space by conversion as a function of the number of identical edge color values to color values on the same color variation plane. |
| US08643661B1 |
Non raster row pixel processing
A system and method for processing digital images that efficiently buffers pixel data relating to digital images is disclosed. Pixel values are read from an image storage memory and temporarily stored in a buffer memory according to a non-raster pattern. The processing of pixels also occurs according to a more efficient non-raster pattern. |
| US08643660B2 |
Technique to share information among different cache coherency domains
A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency rules pertaining to the graphics device. |
| US08643659B1 |
Shader with global and instruction caches
An instruction cache and data cache used to virtualize the storage of global data and instructions used by graphics shaders. Present day hardware design stores the global data and instructions used by the shaders in a fixed amount of registers or writable control store (WCS). However, this traditional approach limits the size and the complexity of the shaders that can be supported. By virtualizing the storage of the global data and instructions, the amount of global or state memory available to the shader and the length of the shading programs are no longer constrained by the physical on-chip memory. |
| US08643657B2 |
Field changeable rendering system for a computing device
One embodiment of a field changeable rendering system includes an output device interfaced to a motherboard, a fixed rendering device mounted to the motherboard for generating information to be output on said output device, a connector for attaching a field-changeable rendering card to the motherboard, said field-changeable rendering card capable of housing a discrete rendering device for generating information to be output on said output device and detection circuitry for detecting that a field-changeable rendering card housing a discrete rendering device is coupled to said connector and causing information from said field-changeable rendering card housing a discrete rendering device to be output on said output device. One advantage of the disclosed edge connector is that it is compatible with a plurality of graphics cards and systems, thereby enabling a computing device user to upgrade the existing device's graphics system. Thus, the user is not forced to purchase an entirely new computing device in order to take advantage of graphics innovations. A further advantage of the disclosed edge connector is that it enables upgrades to low voltage differential signaling (LVDS) features, without the need for additional costly devices capable of operating at LVDS data rates. |
| US08643655B2 |
Method and system for communicating with external device through processing unit in graphics system
The present invention sets forth a method and system for communicating with an external device through a processing unit in a graphics system of a computing device. In one embodiment, the method comprises allocating a first set of memory buffers having a first memory buffer and a second memory buffer in the graphics system based on an identification information of the external device, and invoking a first thread processor of the processing unit of the graphics system to perform services associated with a physical layer according to the identification information of the external device by storing a first data stream received from the external device through an I/O interface of the processing unit of the graphics system in the first memory buffer and retrieving a second data stream from the second memory buffer for transmission to the external device through the I/O interface. |
| US08643654B1 |
Transfer of rigs with temporal coherence
In various embodiments, a user can create or generate objects to be modeled, simulated, and/or rendered. The user can apply a mesh to the character's form to create the character's topology. Information, such as character rigging, shader and paint data, hairstyles, or the like can be attached to or otherwise associated with the character's topology. A standard or uniform topology can then be generated that allows information associated with the character to be transfer to other characters that have a similar topological correspondence. |
| US08643651B2 |
Type-setting method for a text image file
The present invention discloses a type-setting method for a text image file, which comprises steps of: dividing the text image file into a plurality of character-string images along a first direction according to the reading sequence; dividing each character-string image into a plurality of independent and individual character images along a second direction; type-setting and line-feeding the independent and individual character images in light of the dimension of a reading interface. Thereby, the present invention efficiently shows text images according to the reading interface and provides the reading convenience without often dragging both the horizontal and vertical scrollbars to adjust the shown texts on the screen of the reading interface. |
| US08643648B2 |
Systems, methods, and computer-readable media for context-linked importation of user information
Various aspects of the invention described herein provide systems and methods for context-linked importation of user information. One aspect of the invention provides a method for context-linked importation of user information. The method includes: providing an interactive environment that allows posting of content by a plurality of pre-identified users; receiving content for the interactive environment from a pre-identified user; selecting relevant data about the pre-identified user from a database, the relevant data selected based on information contained in the content; and displaying the relevant data along with the content on the interactive environment. |
| US08643647B2 |
Display of travel routes
A method of displaying a graph of nodes adapted to the display of travel routes is described. The method includes the steps of finding a node of highest weight among all nodes of the graph after each node is attributed a weight based on a number of nodes pertaining to a double-tree structure of nodes of which each node is assumed to be the root. Then, the double-tree structure of nodes having the node of highest weight as root is extracted and a layout is computed. If there are remaining nodes left, they are grouped in one or more sub-graphs and a layout of the one or more sub-graphs is iteratively computed. The one or more sub-graphs are then merged with the double-tree structure of nodes to be displayed. |
| US08643643B2 |
Image depth information refreshing method and device
An image depth information refreshing method applied to an image depth information refreshing device is disclosed. The image depth information refreshing device includes a storage unit and an arithmetic logic unit. The storage unit stores a previous depth diagram corresponding to a previous image. The image depth information refreshing method includes the following steps. The arithmetic logic unit divides a current image captured by an image capturing unit into multiple image blocks. The arithmetic logic unit calculates a depth reference value of each image block according to the previous depth diagram, and determines a weight of each image block according to the depth reference values. The arithmetic logic unit determines a refreshing frequency of each image block according to the weights. The arithmetic logic unit respectively refreshes the image block according to the refreshing frequencies of the image blocks, and generates a current depth diagram corresponding to the current image. |
| US08643639B2 |
Non-volatile display module and non-volatile display apparatus
A non-volatile display module has a display panel and a driving circuit. The display panel has a substrate at which at least one scan line, at least one data line and at least one thin film transistor (TFT) are disposed. The TFT is located at an intersection area of the scan line and data line. The driving circuit has a driving unit, a power converting unit and a multiplexing unit. The driving unit receives at least one image controlling signal according to a clock signal. The power converting unit generates a plurality of power signals. The multiplexing unit is electrically connected with the scan line, the data line, the driving unit and the power converting unit, and outputs one of the power signals to the scan line or the data line according to the image controlling signal. A non-volatile display apparatus is also disclosed. |
| US08643638B2 |
Multiple mode driving circuit and display device including the same
The display device includes a driving circuit and a panel. The driving circuit is configured to generate a source output enable signal having at least one pulse during one horizontal scanning period in response to a mode signal and configured to generate a source driving signal by latching an image data in response to the source output enable signal. The driving circuit is further configured to generate an internal horizontal synchronization signal in response to the source output enable signal and configured to generate a gate driving signal in response to the internal horizontal synchronization signal. The panel is configured to display the image data in response to the gate driving signal and the source driving signal. |
| US08643630B2 |
Method and system for generating a display
According to one embodiment of the present invention, a method of displaying an image includes alternating an active state of each of a plurality of light sources. The light sources each generate a light beam when active. The alternating includes deactivating an active light source before an output of a light beam from the active light sources falls below a first predetermined threshold. The alternating further includes activating an inactive light source only after an output of the inactive light source reaches a second predetermined threshold. The method further includes receiving each of the light beams at a modulator. The modulator includes an array of micro-mirror devices. |
| US08643625B2 |
Communication between touch-panel devices
Technologies described herein generally relate to communications between electronic systems. Each electronic system includes a touch-panel device that may be positioned in proximity to one another such that the near field emissions of the touch-panel devices interact with one another. The touch-panel devices can be adapted to sense one another based on these near field emissions. Once detected, the touch-panel devices can be configured to establish a communication channel to communicate information between one another via modulated near field emissions. Such exchanged information may include identification information, network addresses, security keys, and so forth. The exchanged information may be used for discovery or pairing between the touch-panel devices. The technology presented herein can support an intuitive user experience and improved security over traditional wireless pairing approaches. |
| US08643623B2 |
Mobile terminal having touch screen and method for displaying cursor thereof
A portable terminal including a touch screen and method for displaying a cursor thereof are provided. The method includes determining whether a capacitance is equal to or greater than a first critical value and is less than a second critical value, if the change of the capacitance is sensed in the touch screen, displaying a cursor in an area where the change of the capacitance is sensed, if the capacitance is equal to or greater than the first critical value and is less than the second critical value, and performing a function corresponding to the area where the cursor is displayed, if the capacitance sensed in the area where the cursor is displayed is equal to or greater than the second critical value. |
| US08643618B2 |
Electromagnetic-type touch input device, and touch display device incorporating the same
An electromagnetic-type touch input device of a touch display device includes: a main sensor board disposed under a liquid crystal display (LCD) module for sensing an electromagnetic wave signal from an electronic stylus upon a touching by the electronic so as to generate a first sensing output; an auxiliary periphery sensor disposed on a top surface of the LCD module configured with a peripheral non-display area surrounding a central display area, and including X-axis and Y-axis antenna coils disposed above said peripheral non-display area of the LCD module for sensing the electromagnetic wave signal from the electronic stylus upon the touching by the electronic stylus so as to generate a second sensing output; and a control unit outputting an input signal associated with a two-dimensional coordinate and corresponding to a location of a touch point of the electronic stylus based on the first and second sensing outputs. |
| US08643616B1 |
Cursor positioning on a touch-sensitive display screen
In one embodiment, a method for positioning a cursor displayed on a touch-sensitive display screen is provided. The method may comprise detecting a body member touching the touch-sensitive display screen and identifying an offset between the body member and the cursor. Movement of the body member relative to the touch-sensitive display screen can also be detected. Upon detection of the movement, the cursor is also moved from the offset to match the movement of the body member. The body member may then be released and repositioned to a different position on the touch-sensitive display screen. Upon detection of the repositioning, a different offset between the body member at the different position and the cursor is identified. Additional movement of the body member after the detection of the reposition is detected and thereafter, the cursor is moved from the different offset to match the additional movement of the body member. |
| US08643612B2 |
Touchscreen operation threshold methods and apparatus
A computer implemented method for performing a user-defined function in a computer system, performed by the computer system that is programmed to perform the method includes determining by a display a display position in response to a change and a rate change in state of a user-controlled user input device, determining by a physical sensor a magnitude of change in sensed physical in response to the rate of change in the state, determining whether the magnitude of change exceeds a threshold level, determining a function to perform in response to display position when magnitude of change in sensed physical properties exceeds the threshold level, initiating performance of the function in response to the function, and inhibiting performance of the function when the magnitude of change in sensed physical properties does not exceed the threshold level. |
| US08643604B2 |
Seamless button array panels for handheld communication devices
A button array panel for a handheld communication device. The button array panel can include buttons and a continuous and seamless layer covering each button. Each button has an associated function and full recovery. A substrate layer can also be provided and can be interposed between the buttons and continuous and seamless layer. The button array panel can be a side button array panel or a keypad button array panel. The button array panel can prevent material, such as dust or liquid, from penetrating the handheld communication device. |
| US08643596B2 |
Control of a scrollable context menu
Disclosed are a method, a system and a navigation device for generating and controlling an interaction object, which is preferably in the form of a context menu, on a display unit. In at least one embodiment, the method includes presentation of the interaction object by way of at least one presentation signal from the navigation device and selection of at least one functional element from the presented interaction object by way of at least one selection signal from the navigation device, wherein the selection can be made independently of a movement by the navigation device and wherein the at least one functional element to be selected and/or the selected at least one functional element is presented at a constant location on the display unit by moving within the interaction object or by moving the interaction object. |
| US08643590B2 |
Ambient adaptive illumination of a liquid crystal display
A system for modification of an image to be displayed on a display includes receiving an input image and adjusting a luminance level for a backlight of the display for displaying the input image based upon an ambient lighting level and a visual system responsive model to the ambient lightening level. |
| US08643589B2 |
Rapid detection method for decay of liquid crystal display device having LED backlight and display device provided with rapid compensating device for decay
The invention relates to a rapid detection method for the decay of a liquid crystal display device having an LED backlight and a display device provided with a rapid compensating device for decay. The invention employs a mutually orthogonal series of driving signals to drive a plurality of LED devices in a synchronized manner with the driving signals having a one-to-one correspondence with the LED devices. A processing device extracts respective light emission data for the respective LED devices, compares the respective light emission data with the corresponding reference values pre-stored in the memory device and commands another device to compensate for any deviation existing therebetween. Accordingly, the LED devices are tested in batch mode and the testing is remarkably speeded up without interfering with users' activities. |
| US08643588B2 |
Display device and control method thereof
A display device includes a display module for displaying information, a light module for emitting light to the display module, and a display control system. The display control system includes a storage module for storing display control parameters, and a system controller for setting the display module by using the display control parameters when an operation time of the light module equals to a predetermined time point, to compensate for a brightness deterioration of the light module. A related display control method is also provided. |
| US08643587B2 |
Field sequential color mode liquid crystal display
In an FSC mode LCD, a controller operates in response to an external adjustment, and a DC/DC converter converts a battery voltage into a driving voltage under control of the controller. A color LED backlight includes first, second and third color LED arrays connected in parallel, which are operated by the driving voltage. An FSC generator generates first, second and third color PWM signals according to an internal sawtooth voltage and a dimming voltage. A 3-channel current source generates first, second and third driving currents under control of the controller, and on/off switches paths of the first, second and third driving currents flowing through the first, second and third color LED arrays according to the first, second and third color PWM signals generated from the FSC generator, thereby adjusting luminance of the first, second and third color LED arrays of the color LED backlight. |
| US08643580B2 |
Method for driving liquid crystal display device
A method for driving a liquid crystal display device includes the steps of supplying a first image signal used to apply a positive voltage to liquid crystal to pixels via a first and second data lines during a first period; deselecting the pixels with scan lines to supply a second image signal used to apply a negative voltage to liquid crystal which is to be supplied to the pixels in the first row to first data lines and supply the second image signal used to apply a negative voltage to the liquid crystal which is to be supplied to the pixels in the (n+1)-th row to second data lines during a second period; and supplying the second image signal used to apply a negative voltage to the liquid crystal to the pixels via the first and second data lines during a third period. |
| US08643579B2 |
Array substrate, display panel and display device having the same, and method thereof
An array substrate includes a gate line, a data line, a pixel electrode, a first thin film transistor, and a second thin film transistor. The gate line includes a plurality of sub lines receiving a gate signal. The data line crosses the gate line. The pixel electrode is between adjacent sub lines. The first thin film transistor is electrically connected to a first sub line of the adjacent sub lines, the pixel electrode, and the data line. The second thin film transistor is electrically connected to a second sub line of the adjacent sub lines, the pixel electrode, and the data line. Therefore, an image display quality is improved. |
| US08643572B2 |
Pixel circuit and display device having an electrooptic element controlled in luminance by a signal line
A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits. |
| US08643570B2 |
Active matrix organic electroluminescence display and its gradation control method
An active matrix organic electroluminescence(EL) display comprises plural selection and data lines mutually crossed, and a pixel circuit connected to the selection and data lines and having switching devices, a storage capacitor and an organic EL device. In a part of a period that the pixel circuit connected to the selection line is being selected, an applied first data signal is held as a voltage at the storage capacitor of the selected pixel circuit. After the selection signal applying, a first current according to the held voltage is supplied to the organic EL device, and this emits light at luminance according to the first current. In another part of the period, a second current according to an applied second data signal is supplied to the organic EL device of the selected pixel circuit, and this emits light at luminance according to the second current. |
| US08643564B2 |
Triplate line inter-layer connector, and planar array antenna
A triplate line inter-layer connector and a planar array antenna are provided. The triplate line inter-layer connector has an electrical connection structure between a first triplate line and a second triplate line, a first patch pattern formed at a connection-side terminal end of a first feeder line, a first feed substrate having a first shield spacer disposed therebeneath, and a second shield spacer disposed thereabove. Each of the first and second shield spacers has a hollow portion hollowed out to a size encompassing the first feeder line and the first patch pattern so as to define a corresponding one of first and second dielectrics. A second feeder line is provided on a second feed substrate together with a second patch pattern, and a second ground conductor has a first slit formed in a portion thereof located approximately intermediate between the first and second patch patterns. |
| US08643562B2 |
Compact patch antenna array
A compact patch antenna array for mobile terminal applications comprising: a plurality of radiators mounted on one surface of a dielectric, with a ground plane being mounted on the other side of the dielectric. Beneath the ground plane, another dielectric with feeding network is placed. Other embodiments are described and shown in FIG. 2. |
| US08643554B1 |
Ultra wide band antenna element
Antenna unit cells suitable for use in antenna arrays are disclosed, as are antenna array and mounting platform such as an aircraft comprising antenna unit cells. In one embodiment, an antenna unit cell comprises a dielectric substrate having a length extending along a first axis and a width extending along a second axis, a first plurality of radiating elements disposed on a first side of the dielectric substrate, and a second plurality of radiating elements disposed on a second side of the dielectric substrate, opposite the first side, wherein the second plurality of radiating elements extend to an edge of the unit cell, and the first plurality of radiating elements overlap portions of the second plurality of radiating elements. Other embodiments may be described. |
| US08643548B2 |
Dual beam dual selectable polarization antenna
A dual beam dual-selectable-polarization phased array antenna comprises an aperture unit, a printed wiring board, radiating elements, chip units, a pressure plate, and a rear housing unit. The printed wiring board has sub assemblies bonded to each other with a bonding material providing both mechanical and electrical connection. The printed wiring board is connected to the aperture unit. The radiating elements are formed on the printed wiring board. The chip units are mounted on the printed wiring board. The chip units include circuits capable of controlling radio frequency signals radiated by the radiating elements to form dual beams with independently selectable polarization. The pressure plate is connected to the aperture unit. The aperture unit is connected to the rear housing unit such that the aperture unit covers the rear housing unit. |
| US08643546B2 |
Radiation pattern insulator and multiple antennae system thereof and communication device using the multiple antennae system
A radiation pattern insulator and an antennae system thereof are proposed. The radiation pattern insulator includes a dielectric substrate and a plurality of radiation pattern insulation elements. The dielectric substrate allocated between a plurality of antennae includes a top surface and a bottom surface, and a normal direction of the dielectric substrate is substantially perpendicular to propagation directions of electromagnetic waves radiated from the antennae. In addition, the radiation pattern insulation elements are allocated on the top surface or the bottom surface of the dielectric substrate, or alternatively, all allocated on the top surface and the bottom surface. |
| US08643543B2 |
Phased array antenna system with intermodulation beam nulling
A phased array antenna system with intermodulation beam nulling device includes nulling phase shifters. |
| US08643541B2 |
Method and apparatus for enhanced autonomous GPS
A method and apparatus for determining a location of a remote receiver is described. The remote receiver receives satellite tracking data from a server, which it stores in memory. This satellite tracking data has a predetermined validity time period associated with it. When a connection cannot be established between the remote receiver and the server and the predetermine validity time period of the satellite tracking data has expired, the remote receiver calculates acquisition assistance data using the expired satellite tracking data for use with obtaining ephemeris data from a satellite. The remote receiver then calculates its position using the receiver ephemeris data. |
| US08643537B2 |
Method for processing an echo amplitude profile generated by a pulse-echo ranging system
A method for considering an echo amplitude profile as a result of convoluting a single echo with a channel response sequence, wherein for multiple echo detection, an estimation task is broken into three major steps comprising estimating a channel response, recovering a full shape of a single echo, and iteratively updating the channel response and echo shape to increase their accuracy. The estimation of the channel response is treated as a single echo detection problem and includes estimating the strongest echo for its position and amplitude, removing an echo corresponding to this recovered channel from the echo amplitude profile, and repeating the preceding steps for the next strongest echo. |
| US08643531B2 |
Electromagnetic wave absorber
An electromagnetic wave absorber includes a dielectric layer, a divided conductive film layer and an electromagnetic wave reflective layer, wherein a ratio of thickness ‘d’ and wavelength ‘λ’ satisfies a condition of [0.01≦d/λ0.03], weight per unit area of the electromagnetic wave absorber falls within a range of 1000 g/m2 and 3000 g/m2. The divided conductive film layer is configured such that each side's length of conductive films is dimensioned within a range of 0.5 mm and 4.8 mm and arrangement distance between adjoining conductive films is taken within a range of 0.01 mm and 3 mm. |
| US08643526B1 |
Data acquisition system
A data acquisition system for converting an analog input signal to a digital output signal includes a programmable gain amplifier (PGA), an analog to digital converter (ADC), and an averaging module. The PGA generates first and second amplified signals during respective first and second conversion cycles. The first and second amplified signals include respective first and second amplified input signals and first and second sets of offset and noise signals. The first and second amplified input signals have the same polarities, and the first and second sets of offset and noise signals have opposite polarities. The ADC generates first and second digital samples corresponding to the first and second amplified signals respectively and the averaging module averages the first and second digital samples to eliminate the first and second sets of offset and noise signals from the digital output signal. |
| US08643525B1 |
Multiple output dynamic element matching algorithm with mismatch noise shaping for digital to analog converters
A system and method dynamically selects digital-to-analog (DAC) circuit elements to provide a True differential-output delta-sigma (ΔΣ) DAC. The sign and magnitude of a received N-bit input code is determined. If the input code comprises a positive value, m+r circuit elements are selected from a plurality of circuit elements by a positive element selector, in which comprises a number of rotational elements, and r circuit elements are selected by a negative element selector. Each selected circuit element comprises a circuit element that was not selected for an immediately preceding received input code and has a corresponding minimum usage count value. If the input digital code comprises a negative value, m+r circuit elements are selected by the negative element selector, and r circuit elements are selected by the positive element selector. The circuit elements are capable of being configured as positive or negative circuit elements. |
| US08643513B2 |
Data compression systems and methods
Systems and methods for providing fast and efficient data compression using a combination of content independent data compression and content dependent data compression. In one aspect, a method for compressing data comprises the steps of: analyzing a data block of an input data stream to identify a data type of the data block, the input data stream comprising a plurality of disparate data types; performing content dependent data compression on the data block, if the data type of the data block is identified; performing content independent data compression on the data block, if the data type of the data block is not identified. |
| US08643511B1 |
System and method for remote mail delivery notification
Remote mail delivery notification is disclosed. Example embodiments include: providing a radio frequency (RF) transmitter on a mail delivery vehicle, the RF transmitter being configured to transmit a signal on a pre-determined frequency within a pre-determined transmitter proximity region; providing an RF receiver for a recipient of mail delivered by the mail delivery vehicle, the RF receiver being configured to receive a signal on the pre-determined frequency within a pre-determined receiver proximity region, the RF receiver including a mechanism for rendering an alert when the signal is received, the RF receiver further including a reset button to clear the alert and reset the RF receiver to receive a new signal; positioning the RF receiver so a central mailbox associated with the mail recipient is located within the receiver proximity region; and automatically activating an alert on the RF receiver when the mail delivery vehicle is located at the central mailbox. |
| US08643501B2 |
Metering apparatus
A metering apparatus is connectable to the terminals of a circuit breaker and includes a detection apparatus that is configured to detect a status of the breaker and one or more operational parameters of the breaker. The metering apparatus may further include a communication apparatus that is configured to communicate the status of the breaker and/or one or more operational parameters of the breaker to another device. The metering apparatus may additionally include a power input that is independent of the breaker. Alternatively or additionally, the metering apparatus can be configured to communicate with the other device via any of a variety of established protocols, with the metering apparatus being capable of retrofitting to change the communications protocol by which it communicates with the other device. |
| US08643500B2 |
Apparatus and method for diagnosing abnormality in cell balancing circuit
Provided are an apparatus and a method for diagnosing an abnormality in a cell balancing circuit. The apparatus may include a floating capacitor charged with voltage of a battery cell, a cell balancing circuit for discharging the floating capacitor, a voltage measuring unit for measuring the battery cell voltage of the charged floating capacitor and a residual voltage of the discharged floating capacitor, and a control unit for determining an abnormality in the cell balancing circuit based on the residual voltage of the discharged floating capacitor. |
| US08643498B1 |
Optical switches for tank environments
One embodiment of the invention is a combination of a tank and an optical switch, where the tank has a wall forming an enclosure for holding fluids, and the optical switch has a housing floatable in a liquid stored in the tank, and further has a first light fiber having proximal and distal ends, where the first light fiber is connected to a light source at the distal end, and a second light fiber having proximal and distal ends, the second light fiber connected to a light detector at the distal end, the first and second fibers separated by a gap, and a rigid rod connected to the housing and to the tank enclosure, where the rod moves in response to movement of the housing. |
| US08643497B2 |
Integral fluid detection and containment apparatus
Disclosed are integral and/or portable, easy-to-install apparatuses for detecting and containing fluid leaked or otherwise discharged from a fluid-filled device and for facilitating testing and maintenance of the apparatus and fluid-filled devices. In one aspect of the disclosed invention, upon sensing a fluid discharge, the apparatus activates audible and/or visual alarms and directs the discharged fluid to a predetermined drainage area to prevent damage to areas surrounding the fluid-filled device. In another aspect of the present invention, no plumbing or electrical wiring is required to install the apparatus, thereby allowing an unskilled individual to easily and inexpensively install the apparatus. In yet another aspect of the present invention, the apparatus may be easily located since it is not dependent on gravity or a drainage pipe for discharge of the fluid. Furthermore, the apparatus optionally includes an integral leveling mechanism to accommodate leveling of the apparatus when placed on uneven surfaces. |
| US08643496B2 |
Contact for fluid level detection apparatus and fluid level detection apparatus
A contact is provided for a fluid level detection apparatus. The contact includes a contact support spring for rotating in response to a change in fluid level. The contact support spring includes a cantilevered spring arm having a proximal end to be fixed to a holder and a free end, and a contact support which is provided at the free end. First and second contacts are attached to the contact support in first and second positions, respectively, the first position being set at one end opposite to an end at which the second position is set. The joining position of the contact support and cantilevered spring arm is set so that a pressing load applied to the first and second contacts on the contact support by the flexure displacement of the contact support spring falls within a predetermined range. |
| US08643495B2 |
Internet of things based farm greenhouse monitor and alarm management system
A farm greenhouse monitor and alarm management system based on the Internet of things with real-time monitoring environmental parameters, which is aimed at monitoring and managing the growth of crops in the farm greenhouse, includes mobile inspection devices, data acquisition units, data receiving devices, REID devices and data storage servers. The system can automatically collect greenhouse environmental parameters such as air temperature, air humidity, illumination, soil temperature and soil moisture, etc. and also can automatically judge the critical value of every parameter and alarm. It utilizes ZigBee chip integrated wireless sensors and data collecting modules. This system provides inspection devices, which lowers the requirements for practitioners and reduces the cost of automatic management of the farm greenhouse. |
| US08643493B1 |
Child monitoring system
A monitoring pendant is coupled to a person, thing or animal being monitored and is adapted to transmit and receive signals to and from a key chain fob and to and from a base unit. The key chain fob is coupled or integrated into something a guardian would carry such as a set of keys, cell phone or electronics and is adapted to transmit and receive signals to and from the monitoring pendant and to and from the base unit. The base unit is coupled to the vehicle and is adapted to transmit and receive signals to and from the monitoring pendant and to and from the key chain fob. |
| US08643489B2 |
Image processing system, history management apparatus, image processing control apparatus and computer readable medium
A history management apparatus includes: a storage unit that stores history information of image processing which contains set-membership information containing pieces of document identification information of an input document and an output document, and an image of at least one of the input document and the output document as history information; and a notification unit that, when history information in which a surveillance target element is contained in an image of an input document or an image of an output document is detected from the storage unit, notifies a notified party of such as the detected history information. When the surveillance target element is not contained in both of the images in the history information, and it is identified that at least one of ancestral documents of the input document has the surveillance target element, the notification unit notifies the notified party of the history information. |
| US08643487B2 |
Electronic security system for monitoring mechanical keys and other items
A security system with a security container and an electronic lock circuit is used to securely store mechanical keys or other valuable items. Items to be protected are placed in a secured location in the security container. A detector of the security system detects whether the items are indeed in the secured location, such as by means of receiving signals from a transponder attached to the items. The security container is locked only if the items are detected to be in the secured location. Audit trail records for the locking and unlocking events of the security container may be transmitted to a device remote to the security container for analysis. A monitoring device with a location identification device, such as a GPS sensor, may be attached to items to be monitored for tracking locations and activities of the items. |
| US08643486B2 |
Portable alarm device
A portable alarm device includes a portable enclosure, a wireless communication system disposed in the portable enclosure and configured to receive a signal from a monitoring device. The device further includes a processor in communication with the wireless communication system and wherein the processor is configured to initiate an alert when the signal indicates that the portable enclosure is beyond a pre-determined distance from the monitoring device. |
| US08643484B2 |
Visual alert system for set-top box standby mode
A visual display system for a set-top box is includes a source of event data, a light emitting diode display adapted to display event data to a user in a standby mode of operation ,and a main processor configured to receive event data and control the light emitting diode display in response to the received event data. |
| US08643483B2 |
System for maintaining consumables of vehicle and method thereof
A system for maintaining a plurality of vehicle consumables includes a storage unit configured to store a consumable maintenance list according to an engine type and a transmission type of a vehicle; a control unit configured to control recommendation of when to change the consumable by calculating a change interval of each consumable and an actual consumption distance in the consumable maintenance list; and a display unit configured to display a screen that recommends when to change a particular consumable. |
| US08643482B2 |
Display device and vehicle
A vehicle has a display device which widens the field of view (visible area) reflected by a side mirror or a back mirror mounted on the vehicle. To enable a driver driving the vehicle to confirm safety even when it is difficult for the driver to visually recognize some of objects surrounding the vehicle, a liquid crystal display device or an EL display device is provided in the side mirror (door mirror), the back mirror (room mirror) or in an interior portion of the vehicle. A camera is mounted on the vehicle and an image from the camera is displayed on the display device. Further, information read from a sensor (distance measuring sensor) having the function of measuring the distance to another vehicle, and a sensor (impact sensor) having the function of sensing an externally applied impact force larger than a predetermined value is displayed on the display device. |
| US08643481B2 |
Interior rearview mirror assembly with integrated indicator symbol
This invention relates to mirror assemblies for vehicles and in particular to interior rearview minor assemblies having touch screen inputs corresponding to elements representing a symbol. The symbols are located behind a reflective element and not visible until activated by selection of the corresponding input or other means. |
| US08643480B2 |
Input device with haptic feedback
An input device with a housing which includes a displaceable cover wall attached to a circuit board to which is affixed a displaceable magnetic part, at least one sensor and a microprocessor; a second magnetic part which is permanently fixed relative to the housing cooperates with the displaceable magnetic part and, upon displacement of the cover wall, generates a haptically perceptible force; the position of the cover wall relative to the housing is detected by the at least one sensor in the form of a coil which varies its inductance value in response to the detected magnetic field of the two magnetic parts, whereby the coil is a frequency-determining component of an oscillator. |
| US08643471B2 |
Method and system for state encoding
A system including equipment, sensors for measuring the equipment's operating parameters, a signature generator for encoding data streams from the sensors into operating signatures for the equipment, a pattern repository for storing patterns including classified signatures and frequencies, and a signature analyzer for comparing operating signatures to patterns. |
| US08643465B2 |
Network ID activated transmitter
A security code transmitter is provided to transmit a control signal to a barrier movement operator to controlling movement of a movable barrier. The barrier movement operator is proximate to a wireless communication network having a network ID. A receiver of the security code transmitter receives a transmitted network signal comprising the network ID from the wireless communication network. A memory of the security code transmitter stores a predetermined ID. A processor of the security code transmitter determines whether the wireless network ID of the transmitted network signal matches the predetermined wireless network ID. When a match is determined, the security code transmitter is controlled to transmit the control signal to the barrier movement operator. |
| US08643462B2 |
Switch module
A switch module applied for a power supply system is disclosed. The switch module comprises a power switch, an insulating member, a surge absorber and a pyrocondensation belt. The power switch is connected with the power supply system, the insulating member is set on the power switch, the surge absorber is electrically connected with the power switch and adjacent to the power switch, the pyrocondensation belt is connected with the surge absorber and the insulating member. The pyrocondensation belt shrinks with a temperature of the surge absorber. When the insulating member is in the initial state, the insulating member does not affect the power switch. The insulating member makes the power switch off when the shrinkage degree of the pyrocondensation belt develops enough to block the power switch from being on. |
| US08643461B2 |
Integrated transformer
A device having a substrate and a dielectric layer disposed over the substrate is disclosed. The device includes a transformer layout disposed in the dielectric layer. The transformer layout includes an integrated transformer having primary and secondary coil elements. The first and second coil elements are configured to result in noise-self cancellation effect. |
| US08643460B2 |
Transformer structure
A transformer structure includes a bobbin, a conductive base, a first winding coil, plural second winding coils, and a magnetic core assembly. The bobbin includes a main body and a channel. The main body has a first winding section and plural first pins. The plural first pins are located at bilateral sides of the main body. The channel runs through the main body. The conductive base is disposed on a bottom side of the bobbin, and includes at least one connecting part. Through the connecting part of the conductive base, at least a portion of the plural first pins are electrically connected with each other. The first winding coil is wound around the first winding section. The second winding coils are connected with corresponding first pins. The magnetic core assembly is partially embedded into the channel of the bobbin. |
| US08643458B2 |
Winding and method for producing a winding
A winding includes a wound electrical conductor having an electrical insulator. A method is also provided for producing a winding. The winding can be produced as a single piece by using a support on which the electrical conductor can be disposed and electrically insulated. The support is particularly implemented in the form of a cylindrical spiral as a coil, and thereby allows practically unlimited single-piece production of the winding. The cross section and/or the width of the electrical conductor can simultaneously be varied by location on the support. |
| US08643451B2 |
Circuit breaker
A circuit breaker is disclosed, wherein the circuit breaker according to an exemplary embodiment of the present disclosure includes a permanent magnet rotatably hinged to a yoke, and wherein the permanent magnet is changed in magnetic path direction thereof by rotation to set up a sensitivity current, whereby a defect ratio of product is minimized. |
| US08643448B2 |
High power miniature RF directional coupler
An RF directional coupler fabricated utilizing a printed circuit structure that includes a plated slot or trough as and electrical conduit. The slot intersects a capture pad at the end of the trace. The plating wraps around to this capture pad making the trough a hollow trace. The hollow trace allows a large surface area to be parallel in the same plane. The smooth surface of the routed slot allows for a smooth copper surface unlike a typical wall of a hole or treated copper. These unique vertical edge plated troughs inside the coupler providing two significant advantages over previous coupling techniques. First, the surface area of the lines is greater which greatly increases its power handling capability. Second, the mainline and coupled lines all lie in the same plane simplifying construction of the coupler into a pick and place circuit. |
| US08643447B2 |
Terminal circuit and bi-directional coupler using the terminal circuit
A terminal circuit is applied to a bi-directional coupler. The terminal circuit includes a transmission line having a first end and a second end, a first resistor connecting the first end and a first ground and a second resistor connecting the second end and a second ground. A resistance value of the first resistor is substantially identical to that of the second resistor. |
| US08643445B1 |
Crystal oscillator circuit
Oscillator circuits are disclosed herein. An embodiment of an oscillator circuit includes a first bias circuit and a second bias circuit. An oscillator first connection terminal is coupled to a node, wherein the node is coupled to the first bias circuit and the second bias circuit. An oscillator second connection terminal connected to the second bias circuit. An increase in the oscillation amplitude of the oscillator increases the current in the second bias circuit and causes a reduction in the bias current in the first bias circuit. |
| US08643440B2 |
Electric circuit, sensor system equipped with the electric circuit, and sensor device equipped with the electric circuit
An electric circuit includes: a reference signal generation circuit that generates a reference signal based on a first oscillation signal that is an oscillation signal of a first oscillation circuit that vibrates a first vibrator; and a counter circuit that counts a second oscillation signal that is an oscillation signal of a second oscillation circuit that vibrates a second vibrator based on the reference signal, and outputs a count signal, wherein the count signal is a change of the count value in the second oscillation signal. |
| US08643437B2 |
Multi-input differential amplifier with dynamic transconductance compensation
A multi-input differential amplifier with dynamic transconductance compensation is disclosed. The multi-input differential amplifier includes an input stage, an output stage and a transconductance compensation circuit. The input stage includes a plurality of differential input pairs, which includes a first differential input pair, a second differential input pair, a third differential input pair and a fourth differential input pair, for generating a pair of differential signals according to a first input signal, a second input signal, a third input signal, a fourth input signal, and an output signal. The output stage is utilized to generate the output signal in response to the pair of differential signals. The transconductance compensation circuit is coupled between the first and the second differential input pair, for compensating a first transconductance of the first differential input pair and a second transconductance of the second differential input pair. |
| US08643435B2 |
Apparatus and method for expanding operation region of power amplifier
An apparatus and a method for expanding an operation region in an envelope tracking power amplifier are provided. The apparatus for amplifying power of a transmission signal includes an amplitude component determination unit, a supply modulator, and a power amplify module. The amplitude component determination unit determines an amplitude component of a transmission signal. The supply modulator generates a supply voltage to be provided to the power amplify module depending on the amplitude component of the transmission signal determined by the amplitude component determination unit. The power amplify module amplifies power of the transmission signal depending on the supply voltage generated by the supply modulator. |
| US08643434B2 |
Adjustable gain audio power amplifying circuit
An adjustable gain audio power amplifying circuit includes an input unit, an audio amplifying unit connected to the input unit, a gain adjusting unit connected to the audio amplifying unit, a controlling unit connected to the gain adjusting unit, a comparing unit connected between the gain adjusting unit and the controlling unit and an output unit connected to the audio amplifying unit. The comparing unit compares an outputted signal of the output unit with a common-mode reference voltage, outputs a gain adjustment controlling signal and sends the gain adjustment controlling signal into the controlling unit. When the outputted signal equals the common-mode reference voltage, the gain adjustment controlling signal turns over and then the controlling unit detects the turnover and sends a received gain adjustment signal into the gain adjusting unit. Based on the received gain adjustment signal, the gain adjusting unit controls gains of the adjustable gain audio power amplifying circuit. |
| US08643428B2 |
Sampling
There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for example as integrated circuitry on an IC chip. The disclosed circuitry is capable of calibrating itself without being taken off-line. |
| US08643427B2 |
Switching device
A switching device includes: a first switching circuit, having a control node coupled to a first control signal, and arranged to selectively couple a signal node to a first amplifying circuit according to the first control signal; and a first control circuit, having a first control node and a second control node coupled to the control node of the first switching circuit and the signal node, respectively, wherein when the first switching circuit is controlled to electrically disconnect the signal node from the first amplifying circuit and a voltage level of the signal node reaches a first predetermined voltage level, the first control circuit is arranged to make the control node of the first switching circuit electrically connected to the signal node. |
| US08643424B2 |
Passive offset and overshoot cancellation for sampled-data circuits
A zero-crossing detector with effective offset cancellation includes a set of series connected capacitors and an amplifier having an input terminal. An offset capacitor is operatively connected between the amplifier and the set of series connected capacitors. A switch is operatively connected to the input terminal, and an offset sampling capacitor is operatively connected to the switch. The switch connects the offset sampling capacitor to the input terminal of the amplifier during a charge transfer phase. |
| US08643419B2 |
Flexible low power slew-rate controlled output buffer
An output buffer includes a pullup driver, a pulldown driver, and an output stage. The pullup driver has a drive control input, and an output for providing a pullup drive signal in a push-pull mode in response to receiving a first drive control signal on the drive control input, and in a current limited mode in response to receiving a second drive control signal on said drive control input. The pulldown driver has a drive control input, and an output for providing a pulldown drive signal in the push-pull mode in response to receiving a third drive control signal on the drive control input, and in the current limited mode in response to receiving a fourth drive control signal on the drive control input. The output stage provides a voltage on an output terminal in response to the pullup and pulldown drive signals. |
| US08643417B1 |
Method and apparatus to automatically scale DLL code for use with slave DLL operating at a different frequency than a master DLL
A method and apparatus for scaling a DLL code for a slave DLL operating at a different frequency than a master DLL is disclosed. An apparatus includes a master DLL coupled to receive a first clock signal and a group of series-coupled slave DLLs coupled to receive a second clock signal. The master DLL may provide a specified fraction of a cycle of the first clock signal. Scaling circuitry coupled between the master DLL and the group of slave DLLs may determine a ratio of frequencies of the first clock signal to the second clock signal. Based on the ratio and a delay code from the first DLL, the scaling circuitry may generate an adjusted delay code received by the group of slave DLLs to set a delay for the second clock signal to the specified fraction. |
| US08643414B1 |
Fast locking phase-locked loop
A phase-locked loop is placed in a low-power mode. The input to the variable-frequency oscillator is stored before the low-power mode is entered. Then, when the phase-locked loop is awakened, the previous input to variable-frequency oscillator is held at the input to the variable-frequency oscillator. While the input to variable-frequency oscillator is being held, the phase of the feedback signal is calibrated to the reference signal. Once the phase difference between the feedback signal and the reference signal is minimized, the normal feedback operation of the phase-locked loop is enabled. |
| US08643413B2 |
Semiconductor device using multi-phase clock signal and information processing system including the same
Disclosed herein is a device that includes a delay line that includes n delay circuits cascade-connected and delays an input clock signal by k cycles, and a routing circuit that generates multi-phase clock signals having different phases based on at least a part of n output clock signals output from the n delay circuits, respectively. The n and the k are both integers more than 1 and a greatest common divisor thereof is 1. |
| US08643410B1 |
System for compensating for variations in clock signal frequency
A system for compensating for variations in the frequency of an input clock signal having a first frequency includes a coarse counter that receives the input clock signal, counts a predetermined number of clock pulses of the input clock signal, and generates a coarse compensated clock signal having a second frequency. A first compensation module adjusts a clock pulse of the input clock signal based on a coarse compensation value. A residual period adjustment module accumulates a fine compensation value for each clock pulse of the coarse compensated clock signal. A fine counter operates at a third frequency of a fine clock signal, receives an adjusted delay value based on the accumulated fine compensation value, counts a number of fine clock pulses in each clock pulse of the coarse compensated clock signal, and generates a fine compensated clock signal having the second frequency. |
| US08643407B2 |
High temperature half bridge gate driver
A half bridge gate driving circuit for providing gate driving circuits in a bi-hecto celcius (200 degrees celcius) operating environment having multiple functions including combinations of multiple level logic inputs, noise immunity, fault protection, overlap protection, pulse modulation, high-frequency modulation with transformer based isolation, high-frequency demodulation back to pulse width modulation, deadtime generator, level shifter for high side transistor, overcurrent protection, and undervoltage lockout. |
| US08643394B2 |
Non-reflow probe card structure
In accordance with an embodiment, a probe card structure comprises a base board, a connection interposer over the base board, a substrate over the connection interposer, and a fixture over the substrate securing the substrate and the connection interposer to the base board. The connection interposer comprises interposer electrodes that provide an electrical connection between electrodes on the base board and first electrodes on the substrate. |
| US08643393B2 |
Electrical connecting apparatus
An embodiment of an electrical connecting apparatus enables reliable identification of a mark and enables accurate and easy determination of a coordinate position of the mark. The electrical connecting apparatus comprises a supporting body having a lower surface, a plurality of contacts arranged on the lower surface of the supporting body, a mark that is provided on a lower side of the supporting body and whose light passing feature differs from that of an area adjacent to the mark, and a light source provided to the supporting body to irradiate light to the mark from an upper side of the mark. |
| US08643389B2 |
Corrosion sensor and method for manufacturing a corrosion sensor
A corrosion sensor includes a plurality of conductive portions and at least one non-conductive portion between adjacent conductive portions, wherein the at least one non-conductive portion has a dimension less than approximately 500 microns. A method for manufacturing a corrosion sensor includes applying a non-conductive material to a substrate and applying a conductive material to discrete locations on the non-conductive material. The method further includes applying a brazing material around each discrete location of the conductive material. |
| US08643386B2 |
Electromagnetic wave information detection apparatus and electromagnetic wave information detection method
Disclosed is an electromagnetic wave information detection apparatus, including a photoelectric converter including first and second electrode layers; a charge generation layer that generates positive and negative charges by irradiation of an electromagnetic wave; and a charge transport layer; an electric potential imparting unit that imparts electric potentials to the first and second electrode layers; a detection unit; and a control unit controlling the electric potential imparting unit and the detection unit such that the electric potentials of the first and second electrode layers are equalized during a predetermined period of time between a process of imparting detection electric potentials to the first and second electrode layers to detect information carried by an electromagnetic wave of a previous irradiation and a process of imparting the detection electric potentials to the first and second electrode layers to detect information carried by an electromagnetic wave of a subsequent irradiation. |
| US08643379B2 |
Electric sensor web, system and a method for its manufacture
A sensor web for electric field sensing. A substrate has a longitudinal direction. At least one array of electrically conductive sensor areas follows each other in a successive manner along the longitudinal direction and is arranged on one side of the substrate. A group of conductors is on the same side of the substrate. Each electrically conductive sensor area that is to be used for sensing purposes is electrically connected to one conductor. The conductors are adapted to join one by one the group of the conductors advancing in the longitudinal direction of the substrate and the other conductors of the group are adapted to give space for the joining conductor. A method for manufacturing of a sensor web and a system for monitoring a space. |
| US08643378B2 |
Method of performing electrostatic discharge testing on a payment card
Methods of performing electrostatic discharge testing on a transaction card are disclosed. A transaction card may be placed on an insulated surface. A grounding probe may be placed at a first location on the transaction card. A discharge probe may be charged to a known voltage level. The discharge probe may then be discharged at a second location on the transaction card. A discharge wave shape may be recorded from the ground probe, and one of a pass condition and a fail condition may be assigned based on at least the value of the known voltage level as compared to a reference voltage level. The first location and the second location may each be selected from a plurality of areas on the transaction card. |
| US08643375B2 |
Circuit system and method of controlling power management
A circuit system is disclosed. The system comprises a master circuitry, at least one slave circuitry which has a battery sensor for checking battery status of a power supply battery and a shut down mechanism for controlled shut down upon detection of low battery by the battery sensor, and a battery sensor manipulation circuit controlled by the master circuitry. The battery sensor manipulation circuit is arranged to manipulate sensed battery status for the battery sensor of at least one of the at least one slave circuitry to force the controlled shut down of the at least one of the at least one slave circuitry upon provision of a shut down control signal from the master circuitry. A method of controlling power management of such a circuit system is also disclosed. |
| US08643371B2 |
Low magnetic field resonance system
The invention provides a low-field nuclear magnetic resonance system for measuring a magnetic resonance signal of an object. The low-field nuclear magnetic resonance system includes a pre-magnetization module, a uniform magnetic field coil module, a pulse and receiving coil module, a filter amplifier module, a signal acquisition module and a processing module. The pre-magnetization module is used to establish a pre-magnetization field in the object to increase magnetization of the object. The uniform magnetic field coil module is used to change a resonance frequency and background magnetic field intensity of the object during nuclear magnetic resonance measurement by regulating a magnetic field of the coil. The processing module further includes a programming object for controlling timing processing and signal analysis of the measurement process. |
| US08643370B2 |
Flow sensor for cooling water in a gradient coil
A cooling water measurement system for a gradient system of an imaging system, such as a magnetic resonance system, is provided. A volume of cooling water flowing through at least one gradient system cooling water tube of the gradient system per unit of time is determined. The gradient system cooling water measurement system includes a voltage measurement system for measuring a Hall voltage. |
| US08643367B2 |
Cryogenic system and method for superconducting magnets and MRI with a fully closed-loop cooling path
A cryogenic system for a superconducting magnet comprises a closed-loop cooling path. The closed-loop cooling path comprises a magnet cooling tube thermally coupled to the superconducting magnet. The magnet cooling tube comprises a cryogen flow passage. The closed-loop cooling tube further comprises a re-condenser is fluidly coupled to the magnet cooling tube through tube sections and a liquid cryogen container fluidly coupled between the magnet cooling tube and the re-condenser. At least one gas tank is fluidly coupled to the magnet cooling tube through a connection tube. |
| US08643364B2 |
Magnetic resonance imaging apparatus
A magnetic resonance imaging apparatus according to an embodiment includes an imaging unit configured to carry out magnetic resonance imaging of a patient using a transmitting QD coil which allows at least one of phase and amplitude of a radio-frequency transmit pulse on at least one input channel of the transmitting QD coil to be adjusted independently of each other, and an adjustment unit configured to adjust at least one of the phase and the amplitude of the radio-frequency transmit pulse according to imaging conditions. |
| US08643360B1 |
In-water voltage gradient detector
A voltage gradient detector provides notice when a potentially hazardous voltage gradient is present in water, employing a pair of spaced-apart electrodes connected to an LED. The electrode spacing is selected such that, when exposed to a sufficiently large voltage gradient, the voltage between the electrodes causes activation of the LED. The LED can provide visual illumination, or can be a part of a switching device such as a photoMOS relay that in turn activates an alarm device such as an audible sounder or a high-intensity light. Sensitivity in multiple directions can be attained by employing a pair of LEDs between the electrodes, and by employing three pairs of electrodes and associated LED pairs, with the pairs of electrodes being spaced apart along orthogonal axes. The detector can be a passive monitor housed in a floating housing, or can be a handheld device with electrode pairs that are manually immersed. |
| US08643356B2 |
Voltage regulation and modulation circuit
A voltage regulation and modulation circuit of a contactless device, including an adjustable impedance circuit configured to maintain an amplitude of an input voltage to be less than an amplitude of a reference voltage; a current buffer circuit coupled between the adjustable impedance circuit and a load, and configured to buffer a supply current, which is output from the adjustable impedance circuit, to the load; and a parallel regulator coupled to an output of the current buffer circuit, and configured to maintain a constant supply voltage at the load. |
| US08643354B2 |
Multi-phase switching regulator and driver circuit and control method thereof
The present invention discloses a multi-phase switching regulator, a driver circuit of a multi-phase switching regulator, and a control method of a multi-phase switching regulator. The multi-phase switching regulator includes: at least two power stages, switching power transistors in the power stages to convert an input voltage to an output voltage according to pulse width modulation (PWM) signals generated by corresponding PWM controllers respectively; and a current balance circuit, generating a current balance signal according to the current of the corresponding power stage and a phase adjustment signal to averagely distribute current over the active power stages. In the present invention, the gain of the current balance circuit is adjustable, to avoid or reduce output voltage overshoot and undershoot when the phase number changes, while the current balance function is still achieved in normal operation. |
| US08643353B2 |
Driving voltage adjusting circuit capable of adjusting driving voltage via digital rheostat
A driving voltage adjusting circuit includes a digital rheostat, a control chip, a low dropout regulating circuit, and a driving circuit. The control chip is connected with the digital rheostat, and configured for adjusting the resistance of the digital rheostat. The low dropout regulating circuit is connected with the digital rheostat and outputs an output voltage according to the resistance of the digital rheostat. The driving circuit comprising a number of switch elements connected with each other and a driver configured for driving the switch elements, each of the switch elements comprising a first terminal, a second terminal, and a control terminal configured for controlling connection and disconnection of the first terminal and the second terminal; the first terminal and the second terminal connected with the control chip, the driver is connected with the low dropout regulating circuit and output an driving voltage to the control terminal. |
| US08643349B2 |
Power supply controller and method
A power supply controller and method for improving the transient response of the power supply controller. The power supply controller includes a pulse width modulation control module connected to a feedback network. The feedback network is composed of an amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal. A compensation network is coupled between the inverting input terminal and the output terminal of the amplifier and a reference voltage is coupled to the non-inverting input terminal of the amplifier. A switch is coupled between the output terminal of the amplifier and an input terminal of the compensation network. The transient response of the controller is improved by operating the controller in a closed loop compensation configuration during a continuously pulsing operating mode and in an open loop compensation configuration during a pulse skip operating mode. |
| US08643347B2 |
Power converter with capacitive energy transfer and fast dynamic response
A converter circuit and related techniques for providing high power density power conversion includes a reconfigurable switched capacitor transformation stage coupled to a magnetic converter (or regulation) stage. The circuits and techniques achieve high performance over a wide input voltage range or a wide output voltage range. The converter can be used, for example, to power logic devices in portable battery operated devices. |
| US08643345B2 |
Combined semiconductor rectifying device and the electric power converter using the same
A combined semiconductor rectifying device includes PN-junction silicon diode and Schottky barrier diode exhibiting a breakdown voltage higher than the breakdown voltage of PN-junction silicon diode, and Schottky barrier diode is made of a semiconductor, the band gap thereof is wider than the band gap of silicon. The combined semiconductor rectifying device exhibits a shortened reverse recovery time, low reverse leakage current characteristics and a high breakdown voltage, and is used advantageously in an electric power converter. |
| US08643343B2 |
Electronic circuit with capacitor
An electronic circuit comprising a circuit module, a capacitor connected to the circuit module and a shutdown line providing a shutdown signal to the circuit module for suspending the circuit module. The electronic circuit further comprises a switching module for switching the capacitor such as to reduce discharging of the capacitor, depending on the shutdown signal. Particularly, the switching module disconnects the capacitor from ground. Disconnection takes effect when the circuit module is suspended or in power down mode because of the shutdown signal being provided. |
| US08643332B2 |
Battery system and method for detecting internal short circuit in battery system
A battery system includes a battery pack, a detecting portion, a storage portion, and a determining portion. The battery pack includes serially-connected parallel battery units each of which includes battery cells connected in parallel. The detecting portion detects voltage and current of the units, and calculates the accumulated current value of each of the units. The storage portion stores reference voltage values to be associated the accumulated current value of each of the units. The determining portion reads, from the storage portion, one of the reference voltages corresponding to the accumulated value of each of the units, and compares the read reference voltage with the detection voltage of the each of the units. Thus, a battery cell internal short circuit is detected if the difference between the detection voltage and the read reference voltage exceeds a threshold. |
| US08643331B1 |
Enhanced voltage-based fuel gauges and methods
Enhanced voltage-based fuel gauges and methods that increase the accuracy of voltage-based fuel gauges and allow the use of voltage-based fuel gauges to detect current, and particularly excessive current from a battery without the use of a sense resistor. When used with a coulomb counter, the outputs of a voltage-based fuel gauge and a coulomb counter may be combined in a manner that allows the combination to provide better performance that either alone may provide. Various embodiments and methods of operation are disclosed. |
| US08643325B2 |
Integrated battery charger
An integrated battery charger can be used as a charger for a plurality of AA or AAA batteries that can be charged independently and separately in a charging mode and taken out for use by electronic products or it can be used as a discharger switched into a combined serial connection discharging mode by a manual switch for outputting a stabilized DC power for charging a portable electronic product. The present invention is designed and integrated with the switching modes of the manual switch for constituting a circuit structure featuring an “independent separate charging and serially combined discharging mode” and a “synchronous switch control charging and discharging mode” so as to overcome the problems of conventional AA or AAA battery chargers and lithium batteries designed as a portable power and to enhance the effect and safety of the charger. |
| US08643320B2 |
Control system for electric motor applied to cyclic loads and control method for electric motor applied to cyclic loads
The present application refers to a system and a control method especially applied to electric motors designed to drive cyclical loads. The present system includes an electric motor (10), at least an electronic control unit (20) and at least an electronic power unit (30), the electric motor (10) is electrically driven by the electronic power unit (30), the electronic power unit (30) being electrically commanded by the electronic control unit (20), the system including an average speed controller implemented by the electronic control unit (20), the average speed controller being arranged to monitor an instantaneous speed (Vi) of the electric motor (10) and provide an average speed value of the motor (10), the electronic control unit (20) being arranged to calculate an average voltage (Vm) based on the average speed obtained, the electronic power unit (30) being arranged to electrically drive the electric motor (10) by an instantaneous voltage value (Vins), this instantaneous voltage value (Vins) being calculated by multiplying the average voltage (Vm) by the result of the division between the instantaneous speed (Vi) and the average speed. |
| US08643305B2 |
Apparatus for L.E.D. illumination
An illumination source for a camera includes one or more LEDs, and an electrical circuit that selectively applies power from the DC voltage source to the LEDs, wherein the illumination source is suitable for handheld portable operation. In some embodiments, the electrical circuit further includes a control circuit for driving the LEDs with electrical pulses at a frequency high enough that light produced has an appearance to a human user of being continuous rather than pulsed, the control circuit changing a pulse characteristic to adjust a proportion of light output having the first characteristic color spectrum output to that having the second characteristic color spectrum output. Some embodiments provide an illumination source including a housing including one or more LEDs; and a control circuit that selectively applies power from a source of electric power to the LEDs, thus controlling a light output color spectrum of the LEDs. |
| US08643304B2 |
Dimming protocol detection for a light fixture
In some examples, a dimming protocol detection technology includes methods and apparatuses. In other examples, the technology includes a dimmer configured to transmit a dimming input signal. The dimming input signal is in a dimming protocol. The technology further includes a light fixture. The light fixture includes a plurality of lights and a dimming protocol detection module configured to detect the dimming protocol received in the dimming input signal. The dimming protocol is detected from a plurality of dimming protocols. The light fixture further includes a light dimming control module configured to control the plurality of lights based on the detected dimming protocol. |
| US08643301B2 |
LED driver circuit and LED lighting device using the same
Provided is an LED driver circuit, to be connected to an AC power supply via a phase-control dimmer, for driving an LED load, including: a switching power supply part including a switching element and a switching current detection part; an LED current detection part; a first control part for controlling and switching the switching element so that a switching current has a desired current value based on a detection signal of the switching current detection part; a second control part for controlling and switching the switching element so that an LED current has a desired current value based on a detection signal of the LED current detection part; and a switch part for switching between control performed by the first control part when the phase-control dimmer is set to high brightness dimming and control performed by the second control part when the phase-control dimmer is set to low brightness dimming. |
| US08643294B2 |
Single stage electronic ballast with power factor correction
A single stage electronic ballast with power factor correction is provided. The single stage electronic ballast can work under the present intensity discharge lamp without any change and provide higher efficient, lower power consumption of lighting system, and better lighting quality of lamps. The single stage electronic ballast can also provide a stable current to load (lamp) for a long time. The single stage electronic ballast includes a first switch and a second switch that are controlled with complementary switching so as to provide an output voltage in response to the input power source and the variation of the load. |
| US08643290B2 |
Flat panel display, light emitting module for use in flat panel display, and integrated circuit for use in light emitting module
The present invention discloses a flat panel display (FPD), a light emitting module for use in the FPD, and an integrated circuit for use in the light emitting module. The light emitting module includes: at least one light emitting device string; and a local circuit for controlling current through the light emitting device string and generating a local feedback signal, wherein the local circuit has a first terminal for receiving power, a second terminal for coupling to the light emitting device string to control the current through the light emitting device string, a third terminal for generating the local feedback signal, and a fourth terminal for coupling to ground. The wiring of the FPD is therefore simplified. |
| US08643285B2 |
Constant temperature light emitting diode lighting system
A power management system for a lighting system including at least one lighting emitting diode is disclosed. In one embodiment, the light emitting diode(s) of the lighting system are operated under a constant temperature. In another embodiment, the light emitting diode(s) of the lighting system are operated under a constant temperature difference to the ambient temperature. A thermal feedback loop is employed to achieve the constant temperature or the constant temperature difference. |
| US08643281B2 |
Signal generation system
A signal generating system comprises a signal generator (14) for generating an electrical signal at a predetermined frequency; an impedance matching circuit (16), the electrical signal being supplied from the signal generator (14) via the impedance matching circuit (16) to a reactive load (10) in use; and an impedance matching control system (30) for detecting the electrical signal between the signal generator and the reactive load and for adjusting the impedance matching circuit (16) to achieve a predetermined condition. The impedance matching circuit control system (30) comprises a heterodyne circuit, and the system further comprises a heterodyne frequency generator (48) coupled to the signal generator (14) to generate a second, heterodyne frequency from the predetermined frequency from the signal generator. This second, heterodyne frequency is mixed with the detected signal to generate sum and difference signals. A filter (50, 52) passes the difference signal and a processor (Magnitude control; Phase control; 26; 28) responsive to the difference signal is used to adjust the impedance matching circuit (16) to achieve the predetermined condition. |
| US08643279B2 |
Determining high frequency operating parameters in a plasma system
Determining a high frequency operating parameter in a plasma system including a plasma power supply device coupled to a plasma load using a hybrid coupler having four ports is accomplished by: generating two high frequency source signals of identical frequency, the signals phase shifted by 90° with respect to one another; generating a high frequency output signal by combining the high frequency source signals in the hybrid coupler; transmitting the high frequency output signal to the plasma load; detecting two or more signals, each signal corresponding to a respective port of the hybrid coupler and related to an amplitude of a high frequency signal present at the respective port; and based on an evaluation of the two or more signals, determining the high frequency operating parameter. |
| US08643276B2 |
LED lamp for producing biologically-corrected light
A light-emitting diode (LED) lamp for producing a biologically-corrected light. In one embodiment, the LED lamp includes a color filter, which modifies the light produced by the lamp's LED chips, to increase spectral opponency and minimize melatonin suppression. In doing so, the lamp minimizes the biological effects that the lamp may have on a user. The LED lamp is appropriately designed to produce such biologically-correct light while still maintaining commercially acceptable color temperature and color rending properties. Methods of manufacturing such a lamp are provided, as well as equivalent lamps and equivalent methods of manufacture. |
| US08643273B2 |
Light emitting diode device having pillars disposed such that light efficiency of the device is improved
A light emitting diode device is provided. The light emitting diode device comprises a light emitting diode element, an encapsulation layer, and a plurality of pillars. The encapsulation layer is disposed on the light emitting diode element, and the pillars are disposed on the encapsulation layer. The pillars are formed by a light transmissible material. |
| US08643272B2 |
Organic light emitting diode display
An organic light emitting diode (OLED) display with improved display unit sealing performance is provided. The OLED display includes a substrate, a display unit formed over the substrate and including a plurality of pixels, a conductive contact layer disposed at a distance from the display unit around the display unit, and a sealing member facing the display unit and being fixed to the substrate by the conductive contact layer. The sealing member includes a plurality of metal layers laminated with an insulating adhesive layer formed therebetween, and the plurality of metal layers is electrically connected to the display unit through the conductive contact layer. |
| US08643268B2 |
Organic electroluminescence device
An organic EL device includes a pair of electrodes and an organic compound layer between pair of electrodes. The organic compound layer includes an emitting layer including a first material and a second material. The second material is a fluorescent material. Singlet energy EgS(H) of the first material and singlet energy EgS(D) of the second material satisfy a relationship of the following formula (1). The first material satisfies a relationship of the following formula (2) in terms of a difference ΔST(H) between the singlet energy EgS(H) and an energy gap Eg77K(H) at 77K. EgS(H)>EgS(D) (1) ΔST(H)=EgS(H)−Eg77K(H)<0.3 (eV) (2) |
| US08643266B2 |
Light-emitting device including independently electrically addressable sections
Light-emitting devices are described herein. Some embodiments relate to light-emitting diodes with light-emitting sections that are independently electrically addressable. The devices may be used in a variety of applications including illumination and general lighting. |
| US08643264B2 |
Illuminating device
According to one embodiment, the illuminating device of the embodiment has a base part and multiple light emitting elements; the illuminating device includes a supporting part, which is arranged on one end of the base part, and which at least partially encloses an internal space. The supporting part also has an outer surface exposed to the ambient atmosphere. The multiple light emitting elements are disposed on the inner surface side of the supporting part so that at least light emitting surfaces of the light emitting elements are in contact with the supporting part. |
| US08643263B2 |
Insulator strength by seat geometry
A spark plug (20) includes an insulator seat angle (αi) of 35° to 50° and an increased insulator thickness (ti) in selected areas around the insulator seat (28). The insulator seat angle (αi) is greater than or equal to a boundary value provided by the equation: 90°−a cos [1−(R1−R2)÷(R4+R5)], and preferably not greater than 150% of the boundary value. The radii (R1, R2, R3, R4, R5) can be adjusted to maximize R4 while maintaining an acceptable R2. A gasket is compressed between the insulator (22) and shell (58), and the inner gasket thickness (tg2) is greater than or equal to 70% of the outer gasket thickness (tg1). |
| US08643260B1 |
Systems and methods for display assemblies having printed masking
A method of making a display assembly includes providing a display, providing a cover glass, ink jetting an ink covering onto a perimeter portion of the cover glass, and assembling the display to the cover glass to form the display assembly. The ink covering prevents light from leaking from the display through the perimeter portion of the cover glass. |
| US08643257B2 |
Illumination source with reduced inner core size
A illumination source includes a LED assembly and an MR-16 form factor heat sink coupled to the LED assembly. The MR-16 form factor heat sink has an inner core region and an outer core region with the LED assembly disposed upon the inner core region, and the outer core region providing a heat sink. |
| US08643255B2 |
Piezoelectric ceramic and piezoelectric element using the same
Disclosed is a piezoelectric ceramic indicated by the composition formula Bi4Ti3O12.α[(1−β)(M11-γLnγ)TiO3+βM2M3O3], wherein: α, β, and γ satisfy 0.3≦α≦0.95, 0β≦0.5, and 0≦γ≦0.5; M1 is at least one chosen from Sr, Ba, Ca, (Bi0.5Na0.5), (Bi0.55K0.5) and (Bi0.5Li0.5); M2 is at least one chosen from among Bi, Na, K and Li; M3 is at least one chosen from Fe and Nb; and includes 0.01-0.7 mass % of Co in CoO conversion to 100 mass % of bismuth layered compound where Ln is lanthanoid. |
| US08643251B2 |
Piezoelectric motor having a plurality of piezoelectric elements
Provided is a piezoelectric motor including: a stator which includes first and second faces, wherein a plurality of piezoelectric elements are arranged on the first face, and a plurality of protrusions are formed on the second face; a rotor which is rotated by motions of waves of the stator generated by the piezoelectric elements; and a driver device which applies driving voltages to the piezoelectric elements, wherein polarization directions of the plurality of piezoelectric elements are vertical to a rotary face of the rotor. |
| US08643248B2 |
Electrical machine with a restraint system for a rotor winding head
An electrical machine configured to operate in a power range of several MVA includes a rotor configured to rotate about an axis. The rotor includes a rotor winding disposed in a rotor lamination stack and having an exposed winding head outside of the rotor lamination stack. The winding head includes a winding head retention system having a plurality of radially oriented retention elements each including a locking device configured to secure a respective one of the retention elements against at least one of an unintentional loosening and a flying away in an event of a breakage. |
| US08643247B2 |
Electric motor and reduction motor
Disclosed is an electric motor including a yoke formed in a bottomed cylindrical shape; permanent magnets arranged on an inner peripheral surface of the yoke; an armature including a rotary shaft journalled on the yoke, an armature core formed with a plurality of teeth and fixed onto the rotary shaft, an armature coil wound around the teeth of the armature core, a commutator having a plurality of segments and being fixed onto the rotary shaft, and a connecting wire connecting two segments arranged to face each other back to back around the rotary shaft, the armature being surrounded by the permanent magnets and accommodated within the yoke; and a first brush, a second brush, and a third brush coming into sliding contact with the segments of the commutator of the armature. |
| US08643244B2 |
Strength cast rotor for an induction motor
A rotor for an induction motor has a plurality of central laminations defining a central bore extending along an axis. End laminations are at each axial end of the central laminations. Metal is within gaps formed between lamination teeth. The end laminations have teeth extending radially outwardly from a central ring portion. A bore is formed in a face of the end laminations facing outwardly, and adjacent to where the teeth connect into the central ring portion. A motor and method are also described. |
| US08643242B2 |
Squirrel-cage rotor for asynchronous motors
A squirrel-cage rotor for asynchronous motors is provided with a lamination stack made of a magnetic material and a plurality of bars, the intermediate portions of which engage respective slots of the lamination stack; the end portions of the bars protrude with respect to the lamination stack at both axial ends of the rotor and are fixed to two shorting rings; a plurality of spaces are defined, axially, by the lamination stack and the shorting rings, and tangentially by the end portions of the bars; part of such spaces is engaged by stiffening blocks arranged in contact with the end portions of the adjacent bars. |
| US08643235B2 |
Drive device for vehicle
A drive device for a vehicle includes a motor generator generating drive force, and a power control unit provided integrally with the motor generator for controlling the motor generator. The includes a low-voltage circuit section to which a relatively low voltage is applied, a high-voltage circuit section which is located at a rear side of the vehicle relative to the low-voltage circuit section and to which a relatively high voltage is applied, and a cooling plate located between the low-voltage circuit section and the high-voltage circuit section in a longitudinal direction of the vehicle for cooling the high-voltage circuit section. With such configuration, the drive device for a vehicle allows the power control unit to be protected appropriately against an externally imposed shock. |
| US08643227B2 |
Linear motor
A linear motor includes a slider unit having a magnet row in which plural permanent magnets are arranged in series so that the same poles are opposed to each other, a stator unit including electromagnetic coils for plural phases arranged along a movement direction of the slider unit, and plural magnetic detector devices, wherein the plural magnetic detector devices are provided in response to the phases of the electromagnetic coils for plural phases and detect magnetic flux radially extending in a direction perpendicular to the arrangement direction of the permanent magnets at boundaries between the permanent magnets of the magnet row and output signal waveforms for plural phases at phases equal to phases of waveforms of back electromotive forces generated in the respective electromagnetic coils for plural phases when the magnet row moves. |
| US08643225B2 |
Lock-out, tag-out system using safety network
A remote lock-out, tag-out system for controlling multiple power control circuits in a motor control center employs a safety network providing serial communication between one or more remote lock-out, tag-out stations and individual power control circuits of the control center permitting remote disconnection of power without the need for protective gear. |
| US08643224B2 |
High voltage safety device for high voltage battery
A high voltage safety device for a high voltage battery is provided, which comprises: a switch terminal forming a switch of an electric circuit for a high voltage portion and protruding to be fitted in a position hole of a high voltage cover; and a plug forming the electric circuit by connecting the switch when being fitted on the switch terminal and having a size occupying a portion of the high voltage cover. With the safety device, it is possible to prevent unintended separation of a high voltage cover without using a relatively expensive interlock, thereby ensuring safety. |
| US08643221B2 |
Retrofit kit, circuitry and method for reconfiguring a tap changer to avoid electrical arcing
Retrofit kit, circuitry and method are provided for reconfiguring a tap changer (18). The retrofit kit may be used to retrofit a tap changer having contacts (15) subject to electrical arcing so that when the kit is installed such contacts are no longer exposed to electrical arcing. The circuitry may include a vacuum switch assembly (100) having a first vacuum interrupter (202) electrically coupled to a first electrical contact of the tap changer. A second vacuum interrupter (204) may be electrically coupled to a second electrical contact of the tap changer. The first and second vacuum interrupters may be selectively actuated to a respective circuit-interrupting condition when a tap change is performed to avoid formation of electrical arcing on the first and second movable contacts (15). |
| US08643218B2 |
Minimizing saturation caused by power transfer in a communication system transformer
A method and apparatus that minimizes saturation caused by power transfer in a communication system transformer, such as a transformer found in a Power-over-Ethernet system. A magnetic flux imbalance causing saturation in the transformer is detected. A compensation current is injected into a winding to minimize the magnetic flux imbalance and saturation. |
| US08643215B2 |
Mobile auxilliary power system for electrical distribution and transmission systems
A system, apparatus and method for increasing the reliability of an electric power transmission or distribution system by injecting controlled electric power into the transmission or distribution system using mobile electric power sources. The mobile electric power source may be a locomotive engine. The mobile electric power source may be controlled using an IED. The mobile electric power source may be controlled to provide active power or reactive power or act as a governor or exciter to the electric power transmission or distribution system. |
| US08643214B2 |
Load driving device, vehicle equipped with load driving device, and method of controlling load driving device
A Wout calculating portion summates limit values of respective power storage devices to calculate an output power limit value of a power storage portion. An excess current FB control portion executes an excess current FB control if at least one of currents IB1, IB2, and IBT exceeds a predetermined threshold. A Woutf correction processing portion corrects the output power limit value given to a motor power calculating portion to a motor power command value at a timing when at least one of the currents IB1, IB2, and IBT reaches the threshold. In a load driving device that includes a plurality of power storage devices connected in parallel to one another, respective parts may be appropriately protected from overcurrent while sufficiently exploiting the capacities of the plurality of the power storage devices to ensure motive energy performance. |
| US08643211B2 |
Arrangement of at least one personal service unit in a vehicle
An arrangement of at least one personal service unit in a vehicle. At least one rail is arranged on the vehicle side. The rail includes at least one lead. The personal service unit includes at least one electricity collector which is arranged in a manner such that the electricity collector conductively contacts the at least one lead of the rail in the installed condition of the personal service unit in the vehicle. |
| US08643210B2 |
Method and device for supplying operating voltage to a control unit of a motor vehicle
A method for supplying operating voltage to a control unit of a motor vehicle, the control unit being continuously supplied by a vehicle battery, and a device for implementing the method. In the case of a method for supplying a control unit of a motor vehicle with operating voltage, where the power supply to the control unit is reliably ensured in the off and non-running state, respectively, during vehicle start-up, while entailing minimal outlay for circuitry, a potential of the vehicle battery is connected to the control unit at all times via at least one of the lines that are connected to the control unit. |
| US08643206B2 |
Renewable energy system
A water based renewable energy system is shown which uses tidal flow and an associated water wheel/weir assembly to provide pumping power for the system. A water wheel powered pump and associated piping are used to raise water from a lower lake reservoir to a higher storage lake reservoir. The water which is pumped to the higher storage lake can be released to a generator located at a lower elevation and then returned to the lower storage lake. The cycle can then be repeated by again pumping water from the lower lake to the upper lake. The pumped storage provides flow and head to generate electric power through the turbine generator. |
| US08643205B2 |
Wind power generator
A wind-power generator which can improve the performance of a battery and/or a storage battery for a vehicle. The wind-power generator includes: a cylindrical accommodating member having a cutout hole formed by cutting out a portion thereof and an inner surface along which coil bundles are spaced apart from each other; a rotary member which is rotatably accommodated in the accommodating member, the N- and S-pole magnetism of which is alternately arranged along the circumferential direction of the accommodating member such that a portion of the rotary member is exposed to the outside through a cutout hole; and a storage battery electrically connected to the rotary member so as to be directly charged with the electrical energy generated by the rotation of the rotary member. In the present invention, electrical energy is generated using wind power which is a natural energy source, thus protecting the environment in an environmentally-friendly manner. |
| US08643203B2 |
Two-stroke gasoline engine equipped with a self-powering generator
A two-stroke gasoline engine equipped with a self-powering generator is disclosed. The two-stroke gasoline engine includes a housing, an engine bearer, a crank and a self-powering generator. The housing is provided on a side of the two-stroke gasoline engine and formed with a central part. The engine bearer is fixed to the housing and formed on a side thereof with a receiving space for accommodating the self-powering generator. The crank is provided from the central part to pass through the engine bearer with one end protruding into the receiving space. The self-powering generator includes a stator and a rotor. The stator is fixed to the engine bearer, and the rotor is fixed to the crank through the central pivot part so that the self-powering generator is powered by the two-stroke gasoline engine and can generate power continuously. |
| US08643201B2 |
Generator system for recovering vehicle and resident wasted energy
The system is intended to extract energy from a vehicle that is otherwise wasted. As an example and not limiting, the generator and linkage as described can be employed with the rotation of a vehicle wheel to capture energy lost during vehicle braking with the generator functioning to convert vehicle momentum to electric power by putting a load on the wheels of the vehicle which effectively brakes the vehicle while driving the generator, which electricity from the generator likewise is stored in batteries. |
| US08643200B2 |
Resin composition and transparent encapsulant formed using the same, and electronic device including the encapsulant
An embodiment is directed to a polysiloxane having a moiety represented by the following Chemical Formula 1: *—Si-AR—Si—* [Chemical Formula 1] wherein, in the Chemical Formula 1, AR is or includes a substituted or unsubstituted C6 to C30 arylene group. |
| US08643198B2 |
Electronic device package and method for forming the same
An embodiment of the invention provides a method for forming an electronic device package, which includes providing a carrier substrate having an upper surface and an opposite lower surface; forming a cavity from the upper surface of the carrier substrate; disposing an electronic device having a conducting electrode in the cavity; forming a filling layer in the cavity, wherein the filling layer surround the electronic device; thinning the carrier substrate from the lower surface to a predetermined thickness; forming at least a through-hole in the electronic device or the in the carrier substrate; and forming a conducting layer over a sidewall of the through-hole, wherein the conducting layer electrically connects to the conducting electrode. |
| US08643196B2 |
Structure and method for bump to landing trace ratio
The present disclosure provides an integrated circuit. The integrated circuit includes an interconnect structure formed on a substrate; a landing metal trace formed on the interconnect structure and coupled to the interconnect structure, wherein the landing metal trace includes a first width T defined in a first direction; and a metal bump post formed on and aligned with the landing metal trace, wherein the metal bump post includes a second width U defined in the first direction, and the second width U is greater than the first width T. |
| US08643192B2 |
Integrated circuit package with discrete components surface mounted on exposed side
An integrated circuit package has a host integrated circuit with an active front side that is surface-mounted on a support and an inactive back side. Conductive vias extend through the integrated circuit between the front and back sides. A redistribution layer on the back side of the host integrated circuit provides conductive traces and contact pads. The traces of the redistribution layer establish connection between the conductive vias and the contact pads. At least one additional component is surface-mounted on the back side of the host integrated circuit by electrical connection to the contact pads of the redistribution layer to provide a compact three-dimensional structure. In an alternative embodiment, the additional components can be mounted on the active side. |
| US08643186B2 |
Processed wafer via
An apparatus involves a semiconductor wafer that has been back-end processed, the semiconductor wafer including a substrate, electronic devices and multiple metalization layers, a via extending from an outer surface of the substrate through the substrate to a metalization layer from among the multiple metalization layers, and an electrically conductive material within the via, the electrically conductive material forming an electrically conductive path from the metalization layer to the outer surface. A method of processing a semiconductor wafer that has been front-end and back-end processed involves forming a via in the semiconductor wafer extending from a surface of the wafer, into and through semiconductor material, to a metalization layer formed during the back-end processing by etching the semiconductor wafer; and making the via electrically conductive so as to form an electrical path within the via extending from the surface of the wafer to the metalization layer. |
| US08643185B2 |
Semiconductor apparatus, manufacturing method of semiconductor apparatus, and joint material
A die bonding portion is metallically bonded by well-conductive Cu metal powders with a maximum particle diameter of about 15 μm to 200 μm and adhesive layers of Ag, and minute holes are evenly dispersed in a joint layer. With this structure, the reflow resistance of about 260° C. and reliability under thermal cycle test can be ensured without using lead. |
| US08643180B2 |
Semiconductor device
A semiconductor device of the present invention includes a semiconductor chip; an internal pad for electrical connection formed on a surface of the semiconductor chip; a stress relaxation layer formed on the semiconductor chip and having an opening for exposing the internal pad; an under-bump layer formed so as to cover a face exposed in the opening on the internal pad, an inner face of the opening and a circumference of the opening on the stress relaxation layer; a solder terminal for electrical connection with outside formed on the under-bump layer; and a protective layer formed on the stress relaxation layer, encompassing a periphery of the under-bump layer and covering a side face of the under-bump layer. |
| US08643179B2 |
Bump structure including nano-wires and a body connecting ends of the nano-wires, semiconductor package having the bump structure and method of manufacturing the semiconductor package
Provided are a bump structure includes a first bump and a second bump, a semiconductor package including the same, and a method of manufacturing the same. The bump structure includes: first bump provided on a connection pad of a substrate, the first bump including a plurality of nano-wires extending from the connection pad and a body connecting end portions of the plurality of nano-wires; and a second bump provided on the body of the first bump. |
| US08643172B2 |
Heat spreader for center gate molding
A heat spreader for an integrated circuit has a base portion and a top portion. The base portion is attachable to a surface of the integrated circuit, and has at least one channel extending therethrough. The top portion that is larger than the base portion such that the heat spreader is generally T-shaped in cross-section. The top portion has a hole at its center that extends from a top surface of the top portion to the at least one channel of the base portion. Mold compound is injected through the hole and out through the channels. |
| US08643169B2 |
Semiconductor sensor device with over-molded lid
A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions. |
| US08643166B2 |
Integrated circuit packaging system with leads and method of manufacturing thereof
A method of manufacture of an integrated circuit packaging system includes: forming a lead having a lead bottom body, a lead top body, and a lead top conductive layer directly on the lead top body, the lead top conductive layer having a top protrusion and a top non-vertical portion, the lead bottom body having a horizontally contiguous structure; connecting an integrated circuit to the top protrusion; and forming an encapsulation covering the integrated circuit and exposing a top non-vertical upper side of the top non-vertical portion. |
| US08643162B2 |
Pads and pin-outs in three dimensional integrated circuits
A three dimensional semiconductor device, comprising: a substrate including a plurality of circuits; a plurality of pads, each pad coupled to a said circuit; and a memory array positioned above or below the substrate coupled to a said circuit to program the memory array. |
| US08643161B2 |
Semiconductor device having double side electrode structure
A semiconductor device includes a package substrate having a front surface and a backside surface; an electrode pad formed on the front surface; an outer connection pad formed on the backside surface and electrically connected to the electrode pad; a semiconductor chip mounted on the front surface and having an electrode electrically connected to the electrode pad; a sealing resin layer having a through hole formed with a die-molding and reaching the electrode pad for sealing the semiconductor chip; and a through electrode filled in the through hole with a conductive material and having one end portion electrically connected to the electrode pad and the other end portion exposed from the sealing resin layer. |
| US08643153B2 |
Semiconductor device with staggered leads
A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch. |
| US08643151B2 |
Passivation layer for semiconductor devices
An embodiment of the disclosure provides a semiconductor device. The semiconductor device includes a plurality of metallization layers comprising a topmost metallization layer. The topmost metallization layer has two metal features having a thickness T1 and being separated by a gap. A composite passivation layer comprises a HDP CVD oxide layer under a nitride layer. The composite passivation layer is disposed over the metal features and partially fills the gap. The composite passivation layer has a thickness T2 about 20% to 50% of the thickness T1. |
| US08643149B2 |
Stress barrier structures for semiconductor chips
Stress barrier structures for semiconductor chips, and methods of fabrication thereof are described. In one embodiment, the semiconductor device includes a semiconductor substrate that includes active circuitry and an interconnect metallization structure over the active circuitry, wherein the interconnect metallization structure includes a layer of low-k insulating layer. A first metal bump is disposed over the semiconductor substrate and coupled to the active circuitry of the semiconductor substrate. A first stress barrier structure is disposed under the metal bump, and disposed over the low-k insulating layer, and a second substrate is disposed over the first metal bump. |
| US08643148B2 |
Chip-on-Wafer structures and methods for forming the same
A package component includes a substrate, wherein the substrate has a front surface and a back surface over the front surface. A through-via penetrates through the substrate. A conductive feature is disposed over the back surface of the substrate and electrically coupled to the through-via. A first dielectric pattern forms a ring covering edge portions of the conductive feature. An Under-Bump-Metallurgy (UBM) is disposed over and in contact with a center portion of the conductive feature. A polymer contacts a sidewall of the substrate. A second dielectric pattern is disposed over and aligned to the polymer. The first and the second dielectric patterns are formed of a same dielectric material, and are disposed at substantially a same level. |
| US08643144B2 |
Metal-on-passivation resistor for current sensing in a chip-scale package
A current sense resistor integrated with an integrated circuit die housed in a chip-scale semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal pillars are to be electrically connected to a first conductive electrode and a second conductive electrode external to the chip-scale semiconductor package where the first conductive electrode and the second conductive electrode are physically separated from each other by a separation of a first distance. The current sense resistor is formed in a portion of the metal layer spanning the separation between the first and second conductive electrodes. In some embodiments, a semiconductor device including an integrated circuit die housed in a chip-scale semiconductor package includes a current sense resistor formed in a metal layer formed over a passivation layer of the integrated circuit die. |
| US08643141B2 |
Capacitor array layout arrangement for high matching methodology
Some embodiments relate a capacitor array arranged on a semiconductor substrate. The capacitor array includes an array of unit capacitors arranged in a series of rows and columns. An interconnect structure couples unit capacitors of the array to establish a plurality of capacitor elements. The respective capacitor elements have different numbers of unit capacitors and different corresponding capacitances. In establishing the plurality of capacitor elements, the interconnect structure couples unit capacitors of the array in substantially identical sub-arrays tiled over the semiconductor substrate. Other methods and devices are also disclosed. |
| US08643137B2 |
Short channel lateral MOSFET
A short channel Lateral MOSFET (LMOS) and method are disclosed with interpenetrating drain-body protrusions (IDBP) for reducing channel-on resistance while maintaining high punch-through voltage. The LMOS includes lower device bulk layer; upper source and upper drain region both located atop lower device bulk layer; both upper source and upper drain region are in contact with an intervening upper body region atop lower device bulk layer; both upper drain and upper body region are shaped to form a drain-body interface; the drain-body interface has an IDBP structure with a surface drain protrusion lying atop a buried body protrusion while revealing a top body surface area of the upper body region; gate oxide-gate electrode bi-layer disposed atop the upper body region forming an LMOS with a short channel length defined by the horizontal length of the top body surface area delineated between the upper source region and the upper drain region. |
| US08643136B2 |
High voltage device and manufacturing method thereof
The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; a gate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view. |
| US08643130B2 |
Magnetic stack and memory cell comprising such a stack
A magnetic stack with out of plane magnetisation, the magnetic stack including: a first magnetic layer constituted of one or more materials selected from the following group: cobalt, iron and nickel and magnetic alloys based on the materials; a second layer constituted of a metallic material able to confer to an assembly formed by the first and the second layers a perpendicular anisotropy of interfacial origin when the second layer has a shared interface with the first layer; and a third layer deposited on the first layer, the second layer being deposited on the third layer, the third layer being constituted of a metallic material having a miscibility less than 10% with the material of the first layer. |
| US08643127B2 |
Sensor device packaging
A sensor device and a method of forming comprises a die pad receives a sensor device, such as a MEMS device. The MEMS device has a first coefficient of thermal expansion (CTE). The die pad is made of a material having a second CTE compliant with the first CTE. The die pad includes a base and a support structure with a CTE compliant with the first and second CTE. The die pad has a support structure that protrudes from a base. The support structure has a height and wall thickness which minimize forces felt by the die pad and MEMS device when the base undergoes thermal expansion or contraction forces from a header. |
| US08643125B2 |
Structure and process for microelectromechanical system-based sensor
A structure and a process for a microelectromechanical system (MEMS)-based sensor are provided. The structure for a MEMS-based sensor includes a substrate chip. A first insulating layer covers a top surface of the substrate chip. A device layer is disposed on a top surface of the first insulating layer. The device layer includes a periphery region and a sensor component region. The periphery region and a sensor component region have an air trench therebetween. The component region includes an anchor component and a moveable component. A second insulating layer is disposed on a top surface of the device layer, bridging the periphery region and a portion of the anchor component. A conductive pattern is disposed on the second insulating layer, electrically connecting to the anchor component. |
| US08643122B2 |
Silicide contacts having different shapes on regions of a semiconductor device
A structure and method for fabricating silicide contacts for semiconductor devices is provided. Specifically, the structure and method involves utilizing chemical vapor deposition (CVD) and annealing to form silicide contacts of different shapes, selectively on regions of a semiconductor field effect transistor (FET), such as on source and drain regions. The shape of silicide contacts is a critical factor that can be manipulated to reduce contact resistance. Thus, the structure and method provide silicide contacts of different shapes with low contact resistance, wherein the silicide contacts also mitigate leakage current to enhance the utility and performance of FETs in low power applications. |
| US08643121B2 |
Semiconductor device and method of manufacturing a semiconductor device
A semiconductor device and a method of manufacturing a gate stack for such a semiconductor device. The device includes a gate stack that has a gate insulation layer provided over a channel region of the device, and a metal layer that is insulated from the channel region by the gate insulation layer. The metal layer contains work function modulating impurities which have a concentration profile that varies along a length of the metal layer from the source region to the drain region. The gate stack has a first effective work function in the vicinity of a source region and/or the drain region of the device and a second, different effective work function toward a center of the channel region. |
| US08643120B2 |
FinFET with fully silicided gate
A method is provided for fabricating a finFET device. Multiple fin structures are formed over a BOX layer, and a gate stack is formed on the BOX layer. The fin structures each include a semiconductor layer and extend in a first direction, and the gate stack is formed over the fin structures and extends in a second direction. The gate stack includes dielectric and polysilicon layers. Gate spacers are formed on vertical sidewalls of the gate stack, and an epi layer is deposited over the fin structures. Ions are implanted to form source and drain regions, and the gate spacers are etched so that their upper surface is below an upper surface of the gate stack. After etching the gate spacers, silicidation is performed to fully silicide the polysilicon layer of the gate stack and to form silicide regions in an upper surface of the source and drain regions. |
| US08643118B2 |
Bipolar field effect transistor structures and methods of forming the same
Bipolar field effect transistor (BiFET) structures and methods of forming the same are provided. In one embodiment, an apparatus includes a substrate and a plurality of epitaxial layers disposed over the substrate. The plurality of epitaxial layers includes a first epitaxial layer, a second epitaxial layer disposed over the first epitaxial layer, and a third epitaxial layer disposed over the second epitaxial layer. The first epitaxial layer includes at least a portion of a channel of a first field effect transistor (FET) and the third epitaxial layer includes at least a portion of a channel of a second FET. |
| US08643117B2 |
Semiconductor device, method for manufacturing same, and semiconductor storage device
In an SOI-MISFET that operates with low power consumption at a high speed, an element area is reduced. While a diffusion layer region of an N-conductivity type MISFET region of the SOI type MISFET and a diffusion layer region of a P-conductivity type MISFET region of the SOI type MISFET are formed as a common region, well diffusion layers that apply substrate potentials to the N-conductivity type MISFET region and the P-conductivity type MISFET region are separated from each other by an STI layer. The diffusion layer regions that are located in the N- and P-conductivity type MISFET regions) and serve as an output portion of a CMISFET are formed as a common region and directly connected by silicified metal so that the element area is reduced. |
| US08643110B2 |
Localized biasing for silicon on insulator structures
A silicon-on-insulator device has a localized biasing structure formed in the insulator layer of the SOI. The localized biasing structure includes a patterned conductor that provides a biasing signal to distinct regions of the silicon layer of the SOI. The conductor is recessed into the insulator layer to provide a substantially planar interface with the silicon layer. The conductor is connected to a bias voltage source. In an embodiment, a plurality of conductor is provided that respectively connected to a plurality of voltage sources. Thus, different regions of the silicon layer are biased by different bias signals. |
| US08643108B2 |
Buffered finFET device
One embodiment relates to a buffered transistor device. The device includes a buffered vertical fin-shaped structure formed in a semiconductor substrate. The vertical fin-shaped structure includes at least an upper semiconductor layer, a buffer region, and at least part of a well region. The buffer region has a first doping polarity, and the well region has a second doping polarity which is opposite to the first doping polarity. At least one p-n junction that at least partially covers a horizontal cross section of the vertical fin-shaped structure is formed between the buffer and well regions. Other embodiments, aspects, and features are also disclosed. |
| US08643103B2 |
Semiconductor device including gate contact region and protruding gate electrode
A semiconductor device for preventing an outer well from being separated by a trench gate electrode from the well of a cell region while suppressing increase in the gate resistance in which buried gate electrodes extending in a direction overlapping a gate contact region extend only before a gate electrode so as not to overlap the gate electrode, the source contact situated between each of the buried gate electrodes is shorter than the buried gate electrode in the vertical direction, the ends of the buried gate electrodes on the side of the gate electrode are connected with each other by a buried connecting electrode disposed before the gate electrode, the buried connecting electrode extends in a direction parallel with the longer side of the semiconductor device, and is not connected to the buried gate electrode on the side of the contact situated adjacent to the contact-side buried gate electrode. |
| US08643101B2 |
High voltage metal oxide semiconductor device having a multi-segment isolation structure
A high voltage metal oxide semiconductor device with low on-state resistance is provided. A multi-segment isolation structure is arranged under a gate structure and beside a drift region for blocking the current from directly entering the drift region. Due to the multi-segment isolation structure, the path length from the body region to the drift region is increased. Consequently, as the breakdown voltage applied to the gate structure is increased, the on-state resistance is reduced. |
| US08643097B2 |
Trench-gate metal oxide semiconductor device and fabricating method thereof
A trench-gate metal oxide semiconductor device includes a substrate, a first gate dielectric layer, a first gate electrode and a first source/drain structure. The substrate has a first doping region, a second doping region and at least one trench. A P/N junction is formed between the first doping region and the second doping region. The trench extends from a surface of the substrate to the first doping region through the second doping region and the P/N junction. The first gate dielectric layer is formed on a sidewall of the second trench. The first gate electrode is disposed within the trench. A height difference between the top surface of the first gate electrode and the surface of the substrate is substantially smaller than 1500 Å. The first source/drain structure is formed in the substrate and adjacent to the first gate dielectric layer. |
| US08643096B2 |
Semiconductor device with buried bit line and method for fabricating the same
A semiconductor device includes trenches defined in a substrate, buried bit lines partially filling the trenches, a first source/drain layer filling remaining portions of the trenches on the buried bit lines, stack patterns having a channel layer and a second source/drain layer stacked therein and bonded to the first source/drain layer, wherein the channel layer contacts with the first source/drain layer, and word lines crossing with the buried bit lines and disposed adjacent to sidewalls of the channel layer. |
| US08643095B2 |
Semiconductor transistor device and method for manufacturing same
According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×1016 (atoms/cm3). |
| US08643093B2 |
Semiconductor device and method of manufacturing the same
Provided is a semiconductor device that includes a vertical MOS transistor having a trench structure capable of enhancing a driving performance of the vertical MOS transistor. A thick oxide film is formed next to a gate electrode led out of a trench of the vertical MOS transistor having the trench structure, and is removed to form a stepped portion which has a face lower than a surrounding plane and has slopes as well. This makes it possible to form a heavily doped diffusion layer right under the gate electrode through ion implantation for forming a heavily doped source diffusion layer, thereby solving a problem of no current flow in a part of a driver element and enhancing the driving performance of the vertical MOS transistor. |
| US08643092B2 |
Shielded trench MOSFET with multiple trenched floating gates as termination
A trench MOSFET comprising a plurality of transistor cells having shielded trenched gates and multiple trenched floating gates as termination region is disclosed. The trenched floating gates have trench depth equal to or deeper than body junction depth of body regions in termination area. In some preferred embodiments, the trenched floating gates in the termination area are implemented by using shielded electrode structure. |
| US08643090B2 |
Semiconductor devices and methods for manufacturing a semiconductor device
In various embodiments, a semiconductor device is provided. The semiconductor device may include a first source/drain region, a second source/drain region, an active region electrically coupled between the first source/drain region and the second source/drain region, a trench disposed between the second source/drain region and at least a portion of the active region, a first isolation layer disposed over the bottom and the sidewalls of the trench, electrically conductive material disposed over the isolation layer in the trench, a second isolation layer disposed over the active region, and a gate region disposed over the second isolation layer. The electrically conductive material may be coupled to an electrical contact. |
| US08643085B2 |
High-voltage-resistant semiconductor component having vertically conductive semiconductor body areas and a trench structure
A high-voltage-resistant semiconductor component (1) has vertically conductive semiconductor areas (17) and a trench structure (5). These vertically conductive semiconductor areas are formed from semiconductor body areas (10) of a first conductivity type and are surrounded by a trench structure (5) on the upper face (6) of the semiconductor component. For this purpose the trench structure has a base (7) and a wall area (8) and is filled with a material (9) with a relatively high dielectric constant (εr). The base area (7) of the trench structure (5) is provided with a heavily doped semiconductor material (11) of the same conductivity type as the lightly doped semiconductor body areas (17), and/or having a metallically conductive material (12). |
| US08643083B2 |
Electronic devices with ultraviolet blocking layers
Devices and systems for insulating integrated circuits from ultraviolet (“UV”) light are described. The device includes a conductive feature, a first and second UV blocking layer, a first and second insulating laver, and a conductive structure. The first insulating layer overlays the first UV blocking layer. A via opening extends through the first insulating layer and the first UV blocking layer. The second UV blocking layer overlays the first insulating laver. The second insulating layer overlays the second UV blocking layer. An interconnect trench is defined in the second insulating layer and second UV blocking layer. The conductive structure is electrically connected to the conductive feature and extends into the via opening and along the interconnect trench. |
| US08643080B2 |
Three-dimensional semiconductor memory device
Provided are three-dimensional semiconductor devices. The devices may include gap-fill insulating patterns configured to upwardly extend from a substrate and an electrode structure defined by sidewalls of the gap-fill insulating patterns. Vertical structures may be provided between adjacent ones of the gap-fill insulating patterns to penetrate the electrode structure, and the vertical structures may include first and second rows of the vertical structures. A separation pattern may be provided between the first and second rows of vertical structures and include a separation semiconductor layer. The separation pattern extends along a direction parallel to the first and second rows of vertical structures. |
| US08643079B2 |
Nanocrystal formation using atomic layer deposition and resulting apparatus
Nanocrystal structures formed using atomic layer deposition (ALD) processes are useful in the formation of integrated circuits such as memory devices. Rather than continuing the ALD process until a continuous layer is formed, the ALD process is halted prematurely to leave a discontinuous formation of nanocrystals which are then capped by a different material, thus forming a layer with a discontinuous portion and a bulk portion. Such nanocrystals can serve as charge-storage sites within the bulk portion, and the resulting structure can serve as a floating gate of a floating-gate memory cell. A floating gate may contain one or more layers of such nanocrystal structures. |
| US08643078B2 |
Semiconductor structure and manufacturing method of the same
A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a base, a stacked structure and a doped layer. The stacked structure is formed on the base, wherein the stacked structure comprises a plurality of conductive strips and a plurality of insulating strips, one of the conductive strips is located between adjacent two insulating strips, the stacked structure has a first side wall, and a long edge of the first side wall is extended along a channel direction. The doped layer is formed in the first side wall, wherein the doped layer is formed by an ion implantation applied to the first side wall, and an acute angle is contained between an implantation direction of the ion implantation and the first side wall. |
| US08643074B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate, an isolation structure disposed in the semiconductor substrate, a conductive layer disposed over the isolation structure, a capacitor disposed over the isolation structure, the capacitor including a top electrode, a bottom electrode, and a dielectric disposed between the top electrode and the bottom electrode, and a first contact electrically coupling the conductive layer and the bottom electrode, the bottom electrode substantially engaging the first contact on at least two faces. |
| US08643072B1 |
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a bulk, a gate, a source, a drain and a bulk contact region. The gate is on the bulk. The source and the drain are in the bulk on opposing sides of the gate respectively. The bulk contact region is only in a region of the bulk adjacent to the source. The bulk contact region is electrically connected to the bulk. |
| US08643059B2 |
Substrate structure and method of manufacturing the same
A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions. |
| US08643058B2 |
Electro-optical device including nanocrystals
An electro-optical device can include a plurality of nanocrystals positioned between a first electrode and a second electrode. The nanocrystal and at least one electrode can have a band gap offset sufficient to inject a charge carrier from the first electrode or second electrode into the nanocrystal. The device can be a secondary photoconductor. |
| US08643056B2 |
Power semiconductor device and method of manufacturing the same
A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers. The plurality of third second-conductivity-type pillar layers are arranged on the first epitaxial layer. |
| US08643052B2 |
Light emitting diode comprising semiconductor nanocrystal complexes
A light emitting diode (LED) formed by depositing an LED chip and coupling a stability layer to the LED chip. Semiconductor nanocrystals are placed in a first matrix material to form a nanocrystal complex layer. The nanocrystal complex layer is deposited on top of the stability layer. A thickness of the stability layer is chosen to maximizes a power of a light output by the nanocrystal complex layer. The matrix material and the stability layer can be of the same type of material. Additional layers of matrix material can be deposited on top of the nanocrystal complex layer. These additional layers can comprise matrix material only or can comprise matrix material and semiconductor nanocrystals to form another nanocrystal complex layer. |
| US08643045B2 |
Light emitting device
Disclosed is a light emitting structure comprising a first semiconductor layer, a substrate, a reflection electrode disposed on the substrate, a light transmitting electrode disposed on the reflection electrode, and a light emitting structure disposed on the light transmitting electrode, the light emitting structure comprising a first semiconductor layer, a second semiconductor layer, and an active layer interposed between the first and second semiconductor layer. The light transmitting electrode has a thickness of 20 to 200 Å. |
| US08643044B2 |
Semiconductor light emitting device
According to one embodiment, a semiconductor light emitting device includes: a stacked structure body, first and second electrodes, and a pad layer. The body includes first semiconductor layer of a first conductivity type, a light emitting layer, and a second semiconductor layer of second conductivity type. The first semiconductor layer has first and second portions. The light emitting layer is provided on the second portion. The second semiconductor layer is provided on the light emitting layer. The first electrode is provided on the first portion. The second electrode is provided on the second semiconductor layer and is transmittable to light emitted from the light emitting layer. The pad layer is connected to the second electrode. A transmittance of the pad layer is lower than that of the second electrode. A sheet resistance of the second electrode increases continuously along a direction from the pad layer toward the first electrode. |
| US08643042B2 |
Light emitting device
A light emitting device may be provided that includes a conductive support member, a first conductive layer, a second conductive layer, an insulation layer between the first conductive layer and the second conductive layer, and a light emitting structure that includes a second semiconductor layer on the second conductive layer, a first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer. The first conductive layer may include at least one conductive via that passes through the second conductive layer, the second semiconductor layer and the active layer. A top surface of the at least one conductive via is provided into the first semiconductor layer. The insulation layer may substantially surround a side wall of the conductive via. The first surface of the first semiconductor layer may include a first surface area, a second surface area and a recess having a bottom surface. The recess may be aligned with the bottom surface of the first conductive layer, and the first surface of the first conductive layer may be aligned with the first area of the first surface of the first semiconductor layer. The first surface of the first semiconductor layer and the recess may have a surface roughness. |
| US08643040B2 |
Light emitting device and light emitting device package thereof
A light emitting device includes a light emitting structure including a second conduction type semiconductor layer, an active layer, and a first conduction type semiconductor layer, a second electrode layer arranged under the light emitting structure, a first electrode layer having at least portion extending to contact the first conduction type semiconductor layer passing the second conduction type semiconductor layer and the active layer, and an insulating layer arranged between the second electrode layer and the first electrode layer, between the second conduction type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer, wherein said at least one portion of the first electrode layer contacting the first conduction type semiconductor layer has a roughness. |
| US08643039B2 |
Lateral semiconductor Light Emitting Diodes having large area contacts
Light emitting diodes include a diode region having first and second opposing faces that include therein an n-type layer and a p-type layer, an anode contact that ohmically contacts the p-type layer and extends on the first face, and a cathode contact that ohmically contacts the n-type layer and also extends on the first face. The anode and cathode contacts extend on the first face to collectively cover substantially all of the first face. A small gap may be provided between the contacts. |
| US08643038B2 |
Warm white LEDs having high color rendering index values and related luminophoric mediums
Light emitting devices include a solid state lighting source and a recipient luminophoric medium for down-converting at least some of the radiation emitted by the solid state lighting source. The recipient luminophoric medium includes a first material that down-converts the radiation emitted by the solid state lighting source to radiation having a peak wavelength in the green color range that has a full width half maximum emission bandwidth that extends into the cyan color range, and at least one additional material that down-converts the radiation emitted by the solid state lighting source to radiation having a peak wavelength in another color range. |
| US08643037B2 |
Nitride semiconductor light emitting device
There is provided a nitride semiconductor light emitting device including: n-type and p-type nitride semiconductor layers; an active layer disposed between the n-type and p-type nitride semiconductor layers; and an electron injection layer disposed between the n-type nitride semiconductor layer and the active layer. The electron injection layer has a multilayer structure, in which three or more layers having different energy band gaps are stacked, and the multilayer structure is repetitively stacked at least twice. At least one layer among the three or more layers has a reduced energy band gap in individual multilayer structures in a direction toward the active layer, and the layer having the lowest energy band gap has an increased thickness in individual multilayer structures in a direction toward the active layer. |
| US08643034B2 |
Monolithic, optoelectronic semiconductor body and method for the production thereof
An optoelectronic semiconductor body comprises a semiconductor layer sequence which is subdivided into at least two electrically isolated subsegments. The semiconductor layer sequence has an active layer in each subarea. Furthermore, at least three electrical contact pads are provided. A first line level makes contact with a first of the at least two subsegments and with the first contact pad. A second line level makes contact with the second of the at least two subsegments and with a second contact pad. A third line level connects the two subsegments to one another and makes contact with the third contact pad. Furthermore, the line levels are each arranged opposite a first main face, wherein the first main face is intended to emit electromagnetic radiation that is produced. |
| US08643032B2 |
Light emitting diode package array and method for fabricating light emitting diode package
A light emitting diode (LED) package includes: an array substrate; a plurality of LEDs mounted on the array substrate and arranged in rows and columns; a plurality of wavelength conversion units disposed in a light path of light emitted from each of the plurality of LEDs to convert the wavelength thereof; a plurality of first inspection terminals formed on the array substrate and electrically connected to LEDs in the same rows, among the plurality of LEDs; and a plurality of second inspection terminals formed on the array substrate and electrically connected to LEDs in the same columns, among the plurality of LEDs. |
| US08643030B2 |
Light-emitting device
It is an object of the present invention is to provide a light-emitting device in which high luminance can be obtained with low power consumption by improving the extraction efficiency. A light-emitting device of the invention comprises an insulating film, a plurality of first electrodes being in contact with the insulating film and formed on the insulating film to be in parallel, an electroluminescent layer formed over the plurality of first electrodes, and a plurality of second electrodes intersecting with the plurality of first electrodes and formed over the electroluminescent layer in parallel, wherein the insulating film contains nitrogen and silicon and the first electrodes contain a conductive transparent oxide material and silicon oxide. |
| US08643017B2 |
Active device array substrate
An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned conductive layer has first contact holes which expose a portion of the common lines, respectively. The second patterned conductive layer includes data lines, sources, drains and strip capacitance electrodes. Each strip capacitance electrode is electrically connected to one of the common lines through one of the first contact holes. A gap is formed between each data line and one strip capacitance electrode, and the strip floating shielding patterns are disposed under the data lines, the gap and the strip capacitance electrodes. Each pixel electrode is electrically connected to one of the drains through one of the second contact holes. |
| US08643016B2 |
Display device having a pad in electrical contact with a circuit board
A display device includes a substrate comprising a display unit for displaying an image, a non-display unit around the display unit, and at least one first pad for sending an electrical signal to the display unit, a circuit board on the substrate and comprising at least one circuit terminal, and a conductive film between the substrate and the circuit board and including a plurality of conductive particles for electrically connecting the first pad and the circuit terminal, and an insulating resin surrounding the conductive particles, wherein the first pad includes a plurality of fine pad lines, and a region into which the insulating resin is dispersed during a thermal compressing operation located between adjacent ones of the fine pad lines. |
| US08643015B2 |
Semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor
In a CMOS circuit formed on a substrate 100, a subordinate gate wiring line (a first wiring line) 102a and main gate wiring line (a second wiring line) 113a are provided in an n-channel TFT. The LDD regions 107a and 107b overlap the first wiring line 102a and not overlap the second wiring line 113a. Thus, applying a gate voltage to the first wiring line forms the GOLD structure, while not applying forms the LLD structure. In this way, the GOLD structure and the LLD structure can be used appropriately in accordance with the respective specifications required for the circuits. |
| US08643013B2 |
Flat panel display device including a storage capacitor
A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes. |
| US08643012B2 |
Display substrate and method for manufacturing the same
A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask, Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern. |
| US08643008B2 |
Semiconductor device
A semiconductor device which can operate at high speed and consumes a smaller amount of power is provided. In a semiconductor device including transistors each including an oxide semiconductor, the oxygen concentration of the oxide semiconductor film of the transistor having small current at negative gate voltage is different from that of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current. Typically, the oxygen concentration of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current is lower than that of the oxide semiconductor film of the transistor having small current at negative gate voltage. |
| US08643007B2 |
Semiconductor device
It is an object to reduce concentration of an electric field on an end of a drain electrode of a semiconductor device. A semiconductor device includes an oxide semiconductor film including a first region and a second region; a pair of electrodes which is partly in contact with the oxide semiconductor film; a gate insulating film over the oxide semiconductor film; and a gate electrode that overlaps with part of one of the pair of electrodes and the first region with the gate insulating film provided therebetween. At least part of the first region and part of the second region are between the pair of electrodes. The gate electrode does not overlap with the other of the pair of electrodes. |
| US08643005B2 |
Organic light emitting display device and method for manufacturing the same
An organic light emitting display device includes a substrate, a transparent electrode layer, a source/drain layer, an IGZO semiconductor layer, a first insulating layer, a gate layer, a second insulating layer and an organic light emitting diode. The organic light-emitting display device can have a simplified manufacturing process. In addition, the present invention also provides a method for manufacturing the organic light-emitting display device. |
| US08643001B2 |
Semiconductor composition
An electronic device, such as a thin-film transistor, includes a semiconducting layer formed from a semiconductor composition. The semiconductor composition comprises a polymer binder and a small molecule semiconductor of Formula (I): wherein R1, m, n, a, b, c, and X are as described herein. Devices formed from the composition exhibit high mobility and excellent stability. |
| US08643000B2 |
Organic electronic device with low-reflectance electrode
There is provided an organic electronic device including an anode; a hole injection layer; a hole transport layer; a photoactive layer including a plurality of first subpixels, a plurality of second subpixels and a plurality of third subpixels; an electron transport layer including an electron transport material and an n-dopant, the layer having a thickness greater than 50 nm; and a cathode. One of the anode and cathode is light-transmitting and the other has low-reflectance. |
| US08642998B2 |
Array of quantum systems in a cavity for quantum computing
A device includes a volume bounded by electromagnetically conducting walls, an aperture in a bounding wall of the electromagnetically conducting walls, a plurality of quantum systems disposed within the volume and an electromagnetic field source coupled to the volume via the aperture. |
| US08642996B2 |
Graphene nanoribbons and carbon nanotubes fabricated from SiC fins or nanowire templates
Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of silicon carbide (SiC) fins or nanowires. The SiC fins or nanowires are first provided and then graphene nanoribbons or carbon nanotubes are formed on the exposed surfaces of the fin or the nanowires by annealing. In embodiments in which closed carbon nanotubes are formed, the nanowires are suspended prior to annealing. The location, orientation and chirality of the graphene nanoribbons and the carbon nanotubes that are provided are determined by the corresponding silicon carbide fins and nanowires from which they are formed. |
| US08642994B2 |
Light emitting diode array
A light emitting diode (LED) array includes a substrate with an array having a plurality of LED chips thereon, a dielectric layer, a plug, and a conductive connection layer. Each of the LED chips is isolated from another LED chip adjacent thereto by a trench. The dielectric layer covers a surface of the substrate exposed by the trench and sidewalls and partial surfaces of the LED chips adjacent to the trench. The plug fills the trench. The conductive connection layer is disposed over the plug and the dielectric layer to connect the LED chips with the LED chips adjacent thereto. Radiation emitted from one of the LED chips can be reflected by the dielectric layer and the plug, and finally reflected and output from a side of the LED chip not adjacent to the trench, thereby not affecting the adjacent LED chip and being absorbed by it. |
| US08642991B2 |
Photosensitive quantum dot, composition comprising the same and method of forming quantum dot-containing pattern using the composition
A photosensitive quantum dot including a quantum dot, and a plurality of photosensitive moieties that are bound to a surface of the quantum dot, wherein each of the photosensitive moieties includes silicon (Si) and a photosensitive functional group. Also disclosed are a composition for forming a quantum dot-containing pattern, where the composition includes the photosensitive quantum dot, and a method of forming a quantum dot-containing pattern using the composition. |
| US08642990B2 |
Diamond type quad-resistor cells of PRAM
A method of forming a phase-change random access memory (PRAM) cell, and a structure of a phase-change random access memory (PRAM) cell are disclosed. The PRAM cell includes a bottom electrode, a heater resistor coupled to the bottom electrode, a phase change material (PCM) formed over and coupled to the heater resistor, and a top electrode coupled to the phase change material. The phase change material contacts a portion of a vertical surface of the heater resistor and a portion of a horizontal surface of the heater resistor to form an active region between the heater resistor and the phase change material. |
| US08642989B2 |
Resistive random access memory cell and memory
A Resistive Random Access Memory (RRAM) cell and a memory are disclosed. In one embodiment, the RRAM cell comprises a two-state resistor and a resistive switching memory cell connected in series. The two-state resistor can supply relatively large currents under both positive and negative voltage polarities. As a result, it is possible to reduce leakage paths in a crossbar array of memory cells, and thus to suppress reading crosstalk. |
| US08642988B2 |
Non-volatile memory device
A non-volatile memory device includes: a first line extending along a main surface of a substrate; a stack provided above the first line; a second line formed above the stack; a select element provided where the first and second lines intersect, the select element adapted to pass current in a direction perpendicular to the main surface; a second insulator film provided along a side surface of the stack; a channel layer provided along the second insulator film; an adhesion layer provided along the channel layer; and a variable resistance material layer provided along the adhesion layer, wherein the first and second lines are electrically connected via the select element and channel layer, a contact resistance via the adhesion layer between the channel layer and variable resistance material layer is low, and a resistance of the adhesion layer is high with respect to an extending direction of the channel layer. |
| US08642987B2 |
Semiconductor device and manufacturing method thereof
The invention provides a novel memory for which process technology is relatively simple and which can store multivalued information by a small number of elements. A part of a shape of the first electrode in the first storage element is made different from a shape of the first electrode in the second storage element, and thereby voltage values which change electric resistance between the first electrode and the second electrode are varied, so that one memory cell stores multivalued information over one bit. By partially processing the first electrode, storage capacity per unit area can be increased. |
| US08642986B2 |
Integrated circuit having microelectromechanical system device and method of fabricating the same
An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect. |
| US08642975B2 |
Ion generating device
To prevent a reduction in an amount of an ion emission while preventing generation of electromagnetic noise. A high-voltage generating circuit section (2) that supplies a high voltage to an ion generating element (1) that generates ions is housed in a housing (3), and sealed with filled resin (22). An emission port (12) for emitting the generated ions is formed in the housing (3), and an outer surface of the housing except the emission port is covered with a shield case (30). A passage port (33) communicating with the emission port is formed in the shield case. A periphery of the passage port of the shield case is covered with an electrically insulating covering sheet (36) so that emitted ions do not adhere to the shield case. The ions emitted from the emission port do not adhere to the shield case covered with the covering sheet. |
| US08642973B2 |
Detection apparatus for detecting charged particles, methods for detecting charged particles and mass spectrometer
Embodiments of the invention provide a detection apparatus for detecting charged particles having a charged particle detector for receiving and detecting either incoming charged particles or secondary charged particles generated from the incoming charged particles, a photon generator for generating photons in response to receiving at least some of the same incoming charged particles or secondary charged particles generated from the incoming charged particles as are received and detected by the charged particle detector, and a photon detector for detecting photons generated by the photon generator. |
| US08642972B2 |
Neutron scintillator and neutron detector
[Problems to be Solved] A neutron scintillator excellent in neutron detection efficiency and n/γ discrimination ability, and a neutron detector using the neutron scintillator are provided.[Means to Solve the Problems] A neutron scintillator comprising a eutectic body composed of laminar lithium fluoride crystals and laminar calcium fluoride crystals alternately arranged in layers, the thickness of the lithium fluoride crystal layers in the eutectic body being 0.1 to 5 μm; or a neutron scintillator comprising a eutectic body composed of laminar lithium fluoride crystals and laminar calcium fluoride crystals alternately arranged in layers, the calcium fluoride crystal layers in the eutectic body being linearly continuous in at least one direction; and a neutron detector basically constructed from any of the neutron scintillators and a photodetector. |
| US08642970B2 |
Radiographic image detecting apparatus and radiographic image capturing system
A radiographic image detecting apparatus and a radiographic image capturing system are provided. The radiographic image detecting apparatus includes a plurality of photoelectric conversion elements for generating electric charge by emission of radiation, a bias line through which a bias voltage is supplied to the photoelectric conversion elements, a power supply for applying the bias voltage to the photoelectric conversion elements through the bias line, a current detector for detecting a bias current flowing through the bias line, and a reading circuit including an amplifying circuit. The current detector includes a current mirror circuit connected between the bias line connected to the photoelectric conversion elements and the power supply. |
| US08642969B2 |
Sealed tube neutron generator equipped with alpha particle detectors and associated particle measurement system which uses the generator
This generator is equipped with a first alpha particle detector (32) for monitoring the neutrons which are emitted within a first solid angle. According to the invention it is in addition equipped with at least one second alpha particle detector (52) for monitoring the neutrons which are emitted within a second solid angle which is different from the first solid angle. The system allows an object (2) that is placed in the first solid angle to be analysed by means of one or more gamma radiation detectors (34) that are placed in the second solid angle. |
| US08642966B2 |
Gas analyzer for measuring at least two components of a gas
A gas analyzer for measuring at least two components of a gas is disclosed herein. The gas analyzer comprising an emitter configured to emit infrared radiation through the gas, a filter assembly configured to permit a transmission of predetermined wavelengths emitted by the emitter, and a detector configured to receive wavelengths emitted by the emitter and penetrated through the filter assembly. The filter assembly comprises at least two tunable narrowband interference filters in series, each of the filters comprising two dielectric mirrors and an air space between the two dielectric mirrors to tune one of the filters to different transmission band than another of the filters. |
| US08642964B2 |
High repetition rate photoconductive terahertz emitter using a radio frequency bias
A terahertz generation system that emits pulsed THz radiation and incorporates a rapidly oscillating, high voltage bias across electrodes insulated from a photoconductive material. The system includes an ultrafast optical pulse source configured to generate an optical pulse having a duration between about ten picoseconds and ten femtoseconds, the pulse further having a repetition rate of about one megahertz or higher. The system further includes a photoconductor configured to receive the optical pulse from the ultrafast optical pulse source and to generate a terahertz frequency pulse, the photoconductor having insulated electrodes. The system still further includes a radio frequency generator configured to apply an electric field to the photoconductor via the insulated electrodes. |
| US08642963B2 |
Thermal detector, thermal detection device, electronic instrument, and thermal detector manufacturing method
A thermal detector includes a substrate; a support member supported on the substrate interposed by a cavity; a heat-detecting element formed on the support member and having a pyroelectric material layer disposed between a lower electrode and an upper electrode; a light-absorbing layer formed on the heat-detecting element; and a thermal transfer member including a connecting portion connected to the heat-detecting element and a thermal collecting portion disposed inside the light-absorbing layer and having a surface area larger than that of the connecting portion in plan view, the thermal collecting portion being optically transmissive at least with respect to light of a prescribed wavelength. The lower electrode has an extending portion extending around the pyroelectric material layer in plan view, and the extending portion has light-reflecting properties by which at least a part of the light transmitted through the thermal collecting portion of the thermal transfer member is reflected. |
| US08642960B2 |
Detection of neutrinos
A flux detection apparatus can include a radioactive sample having a decay rate capable of changing in response to interaction with a first particle or a field, and a detector associated with the radioactive sample. The detector is responsive to a second particle or radiation formed by decay of the radioactive sample. The rate of decay of the radioactive sample can be correlated to flux of the first particle or the field. Detection of the first particle or the field can provide an early warning for an impending solar event. |
| US08642958B2 |
Composite charged particle beam apparatus and sample processing and observing method
There is provided a composite charged particle beam apparatus, in which a first rotation axis of a rotatable stage intersects a beam irradiation axis of a FIB column and a beam irradiation axis of an SEM so as to be substantially perpendicular thereto, respectively, at a sample observing position, the rotatable stage is provided with a supporting member which can be rotated with respect to the first rotation axis, and the supporting member is connected to a movement mechanism which can dispose the sample at the sample observing position. |
| US08642957B2 |
Scanning electron microscope and a method for imaging a specimen using the same
(1) part or all of the number, coordinates and size/shape and imaging sequence of imaging points each for observation, the imaging position change method and imaging conditions can be calculated automatically from CAD data, (2) a combination of input information and output information for imaging recipe creation can be set arbitrarily, and (3) decision is made of imaging or processing at an arbitrary imaging point as to whether to be successful/unsuccessful and in case a failure is determined, a relief process can be conducted in which the imaging point or imaging sequence is changed. |
| US08642954B2 |
Sample introduction method and system for atomic spectrometry
A method of introducing a sample into an atomic spectrometer utilizes a spray head including a vibratable mesh. A liquid sample is conducted to one face of the mesh and the mesh is vibrated to expel sample droplets from the other face of the mesh into the proximal end of a flow passage axially spaced from the mesh. Also, a low pressure gas as flowed into the proximal end of the flow passage to mix with the droplets to form an aerosol in the flow passage. The vibrating of the mesh is controlled to provide in the aerosol a selected total volume of monodisperse droplets while the flow of the carrier gas is independently controlled to provide a selected rate of flow of the aerosol along the flow passage thereby to optimize consumption of the sample. Apparatus for practicing the method is also disclosed. |
| US08642953B2 |
Interface for the rapid analysis of liquid samples by accelerator mass spectrometry
An interface for the analysis of liquid sample having carbon content by an accelerator mass spectrometer including a wire, defects on the wire, a system for moving the wire, a droplet maker for producing droplets of the liquid sample and placing the droplets of the liquid sample on the wire in the defects, a system that converts the carbon content of the droplets of the liquid sample to carbon dioxide gas in a helium stream, and a gas-accepting ion source connected to the accelerator mass spectrometer that receives the carbon dioxide gas of the sample in a helium stream and introduces the carbon dioxide gas of the sample into the accelerator mass spectrometer. |
| US08642951B2 |
Device, system, and method for reflecting ions
Devices and systems for reflecting ions are provided. In general, the devices and systems include a plurality of curved lens plates adapted for connection to at least one voltage source and having a passage therein to allow the ions to pass therethrough. The plurality of curved lens plates generates electric fields having elliptic equipotential surfaces that reflect and focus the ions as they pass through the passage. Reflectron time-of-flight (RE-TOF) spectrometers are also provided that include an ion source, ion detector, and such a reflectron as described above. Mass spectrometer systems are provided that comprise an ion source that generates ions and a reflectron TOF spectrometer such as described above. |
| US08642950B2 |
Mass spectrometer
A mass spectrometer is disclosed comprising a quadrupole rod set ion trap wherein a potential field is created at the exit of the ion trap which decreases with increasing radius in one radial direction. Ions within the ion trap are mass selectively excited in a radial direction. Ions which have been excited in the radial direction experience a potential field which no longer confines the ions axially within the ion trap but which instead acts to extract the ions and hence causes the ions to be ejected axially from the ion trap. |
| US08642949B2 |
Efficient atmospheric pressure interface for mass spectrometers and method
An ion transfer arrangement for transporting ions between higher and lower pressure regions of the mass spectrometer comprises an ion transfer conduit 60. The conduit 60 has an inlet opening towards a relatively high pressure chamber 40 and an outlet 70 opening towards a relatively low pressure chamber. The conduit 60 also has at least one side wall surrounding an ion transfer channel 115. The side wall includes a plurality of apertures 140 formed in the longitudinal direction of the side wall so as to permit a flow of gas from within the ion transfer channel 115 to a lower pressure region outside of the side wall of the conduit 60. |
| US08642944B2 |
Downhole tools with solid-state neutron monitors
A nuclear tool includes a tool housing; a neutron generator disposed in the tool housing; and a solid-state neutron monitor disposed proximate the neutron generator for monitoring the output of the neutron generator. A method for constructing a nuclear tool includes disposing a neutron generator in a tool housing; and disposing a solid-state neutron monitor proximate the neutron generator for monitoring the output of the neutron generator. A method for logging a formation includes disposing a nuclear tool in a wellbore penetrating the formation, wherein the nuclear tool comprises a neutron generator and a solid-state neutron monitor disposed proximate the neutron generator; generating neutrons from the neutron generator; monitoring neutrons generated by the neutron generator using the solid-state neutron monitor; detecting signals generated from the neutrons traveling in the formation; and correcting the detected signals, based on signal strength detected by the solid-state neutron monitor, to produce corrected signals. |
| US08642943B2 |
Semiconductor wafer, light-receiving element, light-receiving element array, hybrid-type detection device, optical sensor device, and process for production of semiconductor wafer
A light-receiving element includes an InP substrate 1, a light-receiving layer 3 having an MQW and located on the InP substrate 1, a contact layer 5 located on the light-receiving layer 3, a p-type region 6 extending from a surface of the contact layer 5 to the light-receiving layer, and a p-side electrode 11 that forms an ohmic contact with the p-type region. The light-receiving element is characterized in that the MQW has a laminated structure including pairs of an InxGa1-xAs (0.38≦x≦0.68) layer and a GaAs1-ySby (0.25≦y≦0.73) layer, and in the GaAs1-ySby layer, the Sb content y in a portion on the InP substrate side is larger than the Sb content y in a portion on the opposite side. |
| US08642942B2 |
Configurable photo detector circuit
A configurable photo detector circuit comprises a photo detector array including a plurality of photo detectors coupled to a plurality of amplifiers. A method for programming a detection pattern of the configurable photo detector circuit comprises selecting a first detection pattern for the photo detector array, generating first signals to create the first selected detection pattern, and applying the first generated signals to the photo detector circuit to implement the first selected detection pattern. |
| US08642941B2 |
Photonic integrated circuit with integrated optical transceiver
Photonic structures and methods of operating the photonic structures are disclosed. In one embodiment, the photonic structure includes a detector configured to detect radiation of a first wavelength range. The radiation of the first wavelength range is received from an external radiation guide, and the detector is substantially transparent to radiation of a second wavelength range that differs from the first wavelength range. The photonic structure further includes a coupling structure configured to free space couple out of the photonic structure radiation of the second wavelength range. The photonic structure further includes a guiding structure configured to optically guide the radiation of the second wavelength range through the detector. |
| US08642940B2 |
Display device and manufacturing method thereof
A display device in which light leakage in a monitor element portion is prevented without increasing the number of steps and cost is provided. The display device includes a monitor element for suppressing influence on a light-emitting element due to temperature change and change over time and a TFT for driving the monitor element, in which the TFT for driving the monitor element is provided so as not to overlap the monitor element. Furthermore, the display device includes a first light shielding film and a second light shielding film, in which the first light shielding film is provided so as to overlap a first electrode of the monitor element and the second light shielding film is electrically connect to the first light shielding film through a contact hole formed in an interlayer insulating film. The contact hole is formed so as to surround the outer edge of the first electrode of the monitor element. |
| US08642939B2 |
Semiconductor image sensor module, method for manufacturing the same as well as camera and method for manufacturing the same
A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected. |
| US08642937B1 |
Full-aperture, back-illuminated, uniform-scene for remote sensing optical payload calibration
An apparatus, system and method for the radiometric calibration of an optical payload consisting of a housing with an optical aperture, at one portion. The optical aperture is utilized for passing light to an imaging device. The housing also includes at least one door located at another portion of the housing. The door receives and directs light into the housing and toward the optical aperture. The door includes a plurality of holes which are disposed directly in the door. When the housing is moved through predetermined angles relative to the sun, the plurality of holes are capable of passing light into the housing at calibrated levels of radiance. |
| US08642935B2 |
Microwave interactive flexible packaging
A microwave energy interactive structure includes a layer of indium tin oxide, which may be supported on a microwave energy transparent substrate. In one embodiment, the microwave energy interactive structure may have at least one of an oxygen transmission rate of less than about 0.05 cc/m2/day and a water vapor transmission rate of less than about 0.09 g/m2/day. |
| US08642931B2 |
Adaptive temperature controller
The adaptive temperature controller includes a device for measuring resistance, an electrically-conductive material, a power supply, and a device for controlling power. In operation, the controller determines the resistance of material at one or more temperatures and therefore determines the resistance of the material through a range of operating temperature. Based on such determination so long as voltage and power are known, the resistance of the material, and therefore its temperature, are known. As a result the voltage or power may be instantly varied to produce near infinite control over material temperature. |
| US08642930B2 |
Device for heating an object by means of a water bath
The invention relates to a device for heating an object by means of a water bath, in particular for strips of pathological or histological sections, before a microscopic examination, comprising a housing (1) and a trough (2) inserted in the housing (1), wherein the water bath is heated by means of an electrical heater, characterized in that the electrical heater comprises at least one hotplate (4) provided on the base (3) of the trough (2). |
| US08642928B2 |
Temperature control for cooking appliance including combination heating system
A combination cooking appliance controls a radiant heating element provided in an oven cavity and a convection heating element provided in an air plenum with a regulating system which receives signals from multiple temperature sensors. More specifically, the appliance includes a first temperature sensor provided in an air return plenum portion for controlling the radiant heating element and a second temperature sensor arranged in a discharge air plenum portion, preferably downstream of a catalyst, for controlling the convection heating element. The heating elements are independently controlled based on the sensed temperatures to establish a desired oven cavity temperature, while accommodating for temperature fluctuations due to the incoming fresh air stream. |
| US08642920B2 |
Wafer dividing apparatus and laser processing apparatus
A wafer dividing apparatus for dividing a wafer along a plurality of crossing streets in the condition where the wafer is attached to the upper surface of a dicing tape supported to an annular frame and the strength of the wafer is reduced along the streets. The wafer dividing apparatus includes a frame holding unit for holding the annular frame, a wafer holding table having a holding surface for holding the wafer through the dicing tape supported to the annular frame held by the frame holding unit, a tape expanding unit for relatively moving the frame holding unit and the wafer holding table in a direction perpendicular to the holding surface of the wafer holding table to thereby expand the dicing tape, and a vibration generating unit for applying vibration to the holding surface of the wafer holding table. |
| US08642919B2 |
Laser processing nozzle
A laser ablation nozzle including a main pressure chamber centered on an area of a substrate to be ablated and arranged to push a stream of gas through the main pressure chamber onto the substrate. A vacuum chamber surrounds the main pressure chamber and is arranged to vacuum away the process gas and ablation debris. To attempt to address uneven pressure and flow, flow restrictors can be provided at one or both of the process gas inlet and the vacuum chamber. The vacuum flow restrictor is intended to create constriction in a channel to generate a uniform vacuum induced flow around substantially the entire circumference of the nozzle opening. Similarly, the process gas flow restrictor is intended to generate substantially uniform gas flow into the main pressure chamber. |
| US08642913B2 |
Electrical switching apparatus, and arc chute and venting assembly therefor
A venting assembly is provided for an arc chute of an electrical switching apparatus, such as a circuit breaker. The circuit breaker includes a housing and separable contacts. An arc and ionized gases are generated in response to the separable contacts tripping open. The arc chute includes a plurality of arc splitters each having first and second opposing sides, an interior passage, and an exterior. The venting assembly includes a first portion coupled to the first side of at least one of the arc splitters and including a venting segment with first venting apertures. A second portion is coupled to the second side and includes a second venting segment having second venting apertures. The first and second venting segments are spaced from the exterior of the arc splitters to form first and second cooling chambers for cooling the ionized gases. The first and second venting apertures vent the ionized gases. |
| US08642912B2 |
Vacuum circuit breaker
Disclosed is a vacuum circuit breaker. As a plurality of components of main circuit units are integrally formed as one module by molding using epoxy, the main circuit units are easily fabricated, and assembly errors are prevented. Since the main circuit units are arranged to be symmetrical to each other based on a driving unit, an insulation distance between a switchgear and the main circuit units can be obtained without increasing a size of the switchgear. This may allow the main circuit units to be easily arranged at the right side or at the left side according to an installation state of the switchgear. |
| US08642909B2 |
Touch panel
A touch panel includes a substrate, a first and a second patterned conductive layers respectively disposed on an upper surface of the substrate and a lower surface opposite to the upper surface. The substrate has a first sensing area and a first circuit bonding area located on the upper surface. The first patterned conductive layer includes a plurality of first sensing series and a plurality of first dummy patterns respectively located in the first sensing area and the first circuit bonding area. Each of the first sensing series is electrically insulated from each other and has a first terminal extending into the first circuit bonding area. The first dummy patterns surround each first terminal and are electrically insulated from each first terminal. A plurality of first dummy patterns intervenes between any two adjacent first terminals in the first circuit bonding area. |
| US08642904B2 |
Link structure and key switch structure
A link structure can include an outside link member and an inside link member. Shaft holes can be formed in respective inner lateral sides of the outside link member and face each other across a first opening portion. First stopper members can be arranged on the respective inner lateral sides, and each have a first inclined face and a first stopper surface. The outside link member can be elastically deformable based on a pressure applied to the first inclined surfaces that increases a distance between the shaft holes. The inside link member can include a second opening portion, link rotational shafts that are disposed in the shaft holes, and second stopper members each having a second inclined surface and a second stopper surface. The inside link member can be elastically deformable based on a pressure applied to the second inclined surfaces that decreases a distance between the link rotational shafts. |
| US08642903B2 |
Switch with pivoting actuator
A rotary switch having a body, a rotary knob attached to the body, and at least two terminals attached to the body. An actuator is pivotably mounted within the body and operably connected to the rotary knob, the actuator pivoting upon a rotation of the rotary knob. A conductor is pivotably mounted in the body and is in communication with the actuator. The conductor is adapted to connect or disconnect the at least two terminals when the actuator is pivotably moved. |
| US08642900B2 |
Modular electromagnetically shielded enclosure
An electromagnetically shielded enclosure is disclosed. One such system includes a continuously welded shell having a top, a bottom, and a plurality of side walls cooperating to enclose an interior volume, the interior volume sized to receive electronic equipment and allow human entry. The enclosure is constructed from electromagnetically conductive materials and includes continuous welds along seams joining each material. The enclosure includes a sally port located within the enclosure. The sally port includes a first door in one of the plurality of side walls and constructed from electromagnetically conductive materials. The sally port also includes a second door constructed from electromagnetically conductive materials. The sally port defines a secondary interior volume within the enclosure sized to allow human entry through either the first or second door. |
| US08642898B2 |
Circuit board structure with capacitors embedded therein
A circuit board structure with capacitors embedded therein and a method for fabricating the same are disclosed. The structure comprises at least two core layers individually comprising a dielectric layer having two opposite surfaces, circuit layers disposed on the outsides of the two opposite surfaces of the dielectric layer, and at least two capacitors embedded respectively on the insides of the two opposite surfaces of the dielectric layer and individually electrically connecting with the circuit layer at the same side; at least one adhesive layer disposed between the core layers to combine the core layers as a core structure; and at least one conductive through hole penetrating the core layers and the adhesive layer, and electrically connecting the circuit layers of the core layers. Accordingly, the present invention can improve the flexibility of circuit layout, and realize parallel connection between the capacitors to provide more capacitance. |
| US08642895B2 |
Substrate with transparent conductive layer and method for producing the same, and touch panel using the same
A substrate with a transparent conductive layer includes a transparent supporting substrate, a thermosetting resin layer containing 50% by weight or more of a melamine resin, and a carbon nanotube conductive layer in this order, wherein a value of linearity of resistance of the carbon nanotube conductive layer is 1.5% or less. |
| US08642894B2 |
Circuit board, method of manufacturing the same, and resistance element
Provided is a circuit board including a resin base, and a resistance element formed above the resin base. The resistance element includes a resistance pattern including an electrode portion and an extending portion, and an electrode formed on the electrode portion of the resistance pattern and including a foot portion reduced in thickness toward the extending portion. |
| US08642892B2 |
Circuit board with handles
The circuit board includes a main body, at least one handle, and at least one connecting element. The main body defines at least one through hole. One end of each of the at least one handle defines a positioning portion. The positioning portion of each of the at least one handle extends through a corresponding one of the at least one through hole and is engaged with one of the at least one connecting elements. |
| US08642887B1 |
Metallization barrier for a hermetic feedthrough
A metallization that includes a composite of alternating metal and metal oxide layers for incorporation into feedthrough filter capacitor assemblies is described. The feedthrough filter capacitor assemblies are particularly useful for incorporation into implantable medical devices such as cardiac pacemakers, cardioverter defibrillators, and the like, to decouple and shield internal electronic components of the medical device from undesirable electromagnetic interference (EMI) signals. |
| US08642885B2 |
Electrical enclosures with removable end plate
Electrical enclosure assemblies, electrical service enclosures, and methods of assembling an electrical enclosure assembly are presented herein. An electrical enclosure assembly for housing electrical components of an electrical distribution system is disclosed. The enclosure assembly includes a plurality of sidewalls interconnected to define therebetween a mounting space within which are mounted the electrical components, and define at one end thereof an open endface. An endwall guide extends from one or more of the sidewalls into the mounting space. The endwall guide includes a plurality of elongated slots, a plurality of projections, or both. The enclosure assembly also includes an endwall configured to at least partially close off the open endface. The endwall includes a plurality of elongated slots, a plurality of projections, or both. Each of the projections is configured to fit into and secure with a respective elongated slot to thereby removably mount the endwall to the sidewalls. |