Document Document Title
US08391462B2 Communication platform for providing computer telephony integration services to remote subscribers, and associated method
A communication platform for providing computer/telephony integration services to remote subscribers comprises: a hosted call switching unit in communication with an external telephone network or interconnected networks through a communications trunk; for each subscriber, a subscriber telephony component, such as an intelligent agent, executed by processing means belonging to the communication platform and connected to an external subscriber's information system through a permanent private secure data channel, whereby said subscriber telephony component can communicate in a private manner with other information system components of said subscriber so as to be logically part of said information system, each subscriber component being capable of controlling said switching unit according to subscriber data; resources available to each subscriber telephony component in association with call processing or routing; means for allocating resources to each telephone call handled by a subscriber telephony component in response to data communication with said component through a secure interface.
US08391461B2 Caching user information in an integrated communication system
An integrated messaging system for performing various types of messaging across different types of networks, including integrated user interfaces and administrator interfaces. Embodiments include a communication server that couples among networks of different types, and an interface module that couples to the communication server. The interface module may be hosted on a messaging server of a network. The interface module pulls various user information from the messaging server, including information relevant to at least the network that includes the messaging server. A cache couples to the communication server and to the interface module to hold information from the communication server and/or the user information pulled from messaging server. The interface module directs a message from the messaging server and/or the cache to at least one device on the networks using the user information.
US08391458B1 Emergency call prioritization
A system and method of operating a communication system is described. A communication interface receives a first user request for a voice service from a communication device. In response to receiving the first user request, the communication interface transfers an initial message requesting access to the voice service. The communication interface receives a response to the initial message that indicates that the voice service is not available. After receiving the response, the communication interface receives a second user request from the communication device. A processing system processes the second user request to determine if the second user request indicates an emergency service. If the second user request indicates the emergency service, then the communication interface transfers a call request for the emergency service. If the second user request does not indicate the emergency service, then the communication interface notifies the communication device that the voice service is not available.
US08391457B2 Systems and methods of timing DTMF tones for telephony control
Control and status information between a mobile device and another device can be signaled over a voice channel using DTMF tones, e.g., a pre-defined sequence of DTMF tones can signal a desired message (more generally, a feature code). Tones sent are separated from each other by a time gap (Tgap timer). If a receiving device does not receive a sequence of DTMF tones that can be matched to stored definitions of feature codes, then the receiving device generates a negative ACK. Also, if the sending device does not receive either negative or positive ACK, then sending device resends all tones of the feature code after a retry delay (Tretry timer). Rather than having the Tretry timer start when tones for a feature code start to be transmitted, the Tretry timer is started after the Tgap timer expires for the last tone of a feature code. Thus, only one timer is running (either Tgap or Tretry), rather than having multiple timers running concurrently. Race conditions between the timers are avoided.
US08391455B2 Method and system for live collaborative tagging of audio conferences
Methods are disclosed in which participants in a communication session contribute tags—during the course of the communication session—such that the tags are visible to at least some of the participants as the communication session progresses. This creates a “live” collaborative tagging environment.Tags are contributed by some or all the participants on the communication session. The tags are displayed as they are generated. Moreover, one who declines to speak on the communication session can still actively tag. In this way, a tagger can participate and contribute in a collaborative live manner while the communication session is in progress. This approach departs from traditional “after the fact” or “note-taking” techniques in the prior art.The tags, according to some illustrative embodiments of the present invention, can be associated in a variety of ways, including but not limited to: a tag that is associated with an instance in time of the recording of the communication session; a tag that is associated with the recording as a whole; a tag that is associated with a period of time of the recording of the communication session, wherein the period of time is of a predetermined duration; a tag that is associated with a period of time of the recording of the communication session, wherein the period of time is under the control of the person contributing the tag. The tags are searchable and browsable and can be classified.
US08391452B2 User-based authentication for realtime communications
Architecture for a communications system enabling a user to provision a telephone at a new location without network administrative pre-configuring. An input component (e.g., keypad) receives a numeric extension and PIN. The extension is a telephone extension of the user and the PIN can be administratively assigned. A location component provides location information of an enterprise communications server to the telephone based on the extension. The telephone uses the location information to send messages to the enterprise communications server. A registration component registers the telephone with the enterprise communications server based on the numeric extension. A telephony address is returned to the telephone. An authentication component authenticates the telephone based on the PIN. Upon authentication, the extension is assigned to the telephone, and telephone communications can be sent and received from that location.
US08391436B2 Receiving apparatus, transmission apparatus, and transmission method
A receiving apparatus includes a first receiving circuit that receives an input signal based on a clock signal, and outputs a first output signal, a second receiving circuit that receives the input signal based on the clock signal, and outputs a second output signal, and a comparison circuit that compares value of the first output signal outputted by the first receiving circuit and value of the second output signal outputted by the second receiving circuit.
US08391434B2 Receiver for clock reconstitution
A receiver for clock reconstitution in a semiconductor field includes a termination resistor arranged between two input stages, to which a pair of input signals are input, the termination resistor including a first resistor and a second resistor; a strobe signal generator for generating a strobe signal, using a first signal corresponding to a differential voltage output from a node between the first resistor and the second resistor; and a clock reconstitutor for generating a clock signal in response to the strobe signal generated from the strobe signal generator.
US08391427B2 Channel estimation methods and apparatus utilizing the same
A channel estimation device and method for an orthogonal frequency division multiplexing (OFDM) system for receiving OFDM symbols to generate channel estimation information is provided. The channel estimation method includes: obtaining a portion of pilot signals from a plurality of pilot signals as a first pilot set according to corresponding positions of the pilot signals in the OFDM symbols; estimating a first estimation factor by calculating the pilot signals in the first pilot set in a first direction; estimating a second estimation factor by calculating the pilot signals in the first pilot set in a second direction; obtaining a pilot signal estimation result according to the first estimation factor and the second estimation factor; and obtaining the channel estimation information according to the pilot signal estimation result.
US08391425B2 Data processing apparatus and method, receiving apparatus and method, synchronous detection apparatus and method, and computer program
A data processing apparatus includes a first correlation operation unit which performs a mutual correlation operation of a first input series and a second input series, a threshold value operation unit which calculates a threshold value based on the first input series, a first comparison unit which compares a first mutual correlation value with the threshold value, a search window setting unit which sets a search window for detecting the second input series to the first input series on the basis of the comparison result, a hard decision unit which performs binarization of the first input series, a second correlation operation unit which performs a mutual correlation operation of a first input hard decision value, and a detection position determining unit which searches for a maximum value of the mutual correlation value within the search window and determines the detection time of the maximum value.
US08391419B2 Circuit for recovering an output clock from a source clock
An output clock recovery circuit (10) for recovering an output clock (14) from a source clock (12) and time stamp information (18A, 18B) includes a time stamp translator (22) and a phase-locked loop circuit (17) including a fraction processor (34). The time stamp translator (22) receives the time stamp information (18A, 18B) and uses an algorithm that translates the time stamp information (18A, 18B) into a time stamp decimal component (48) and a time stamp integer component (50). The time stamp decimal component (48) is less than one and is processed by the fraction processor (34). The time stamp integer component (50) is maintained within a predetermined range of integers that are greater than zero. The output of the fraction processor (34) and the time stamp integer component (50) can be input into a feedback divider (36) of a feedback loop of the phase-locked loop circuit (17) to recover the output clock (14). The fraction processor (34) can include a fraction accumulator or a delta-sigma type of fractional-N phase-locked loop circuit.
US08391416B1 Syncronization frequency diversity reception utilizing a single RF receiver
A system may include a receiver having a number of reception channels spread across an instantaneous radio frequency bandwidth, each one of the reception channels for receiving a different radio frequency within the instantaneous radio frequency bandwidth. The system may also include control programming for positioning the receiver on one of a number of synchronization frequencies transmitting a synchronization preamble, where a number of reception channels is less than a number of synchronization frequencies, and a probability of not receiving one or more of the synchronization frequencies is smaller than a required message error rate for receiving the plurality of synchronization frequencies.
US08391415B2 Electronic device, integrated circuit and method for selecting of an optimal sampling clock phase
An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
US08391413B2 Channel estimation for an OFDM communication system with inactive subbands
For channel estimation in a spectrally shaped wireless communication system, an initial frequency response estimate is obtained for a first set of P uniformly spaced subbands (1) based on pilot symbols received on a second set of subbands used for pilot transmission and (2) using extrapolation and/or interpolation, where P is a power of two. A channel impulse response estimate is obtained by performing a P-point IFFT on the initial frequency response estimate. A final frequency response estimate for N total subbands is derived by (1) setting low quality taps for the channel impulse response estimate to zero, (2) zero-padding the channel impulse response estimate to length N, and (3) performing an N-point FFT on the zero-padded channel impulse response estimate. The channel frequency/impulse response estimate may be filtered to obtain a higher quality channel estimate.
US08391412B1 PN long code shift for access attempt
A method and system is disclosed for shifting the phase of a PN long code for access attempts by an access terminal in a wireless communication network. An access terminal may seek to acquire access from a base station that is detected by the access terminal above a threshold power level, even if the access terminal is further away from the base station than a threshold distance beyond which access is not normally granted. According to one embodiment, the access terminal will, upon determining that it is beyond the threshold distance, embed in an access request message an apparent distance that is smaller than the threshold distance, by phase-shifting a timing signal and encoding the access request message with the phase-shifted timing signal. The access terminal will then transmit the access request message on an air interface communication link to the base station.
US08391411B2 Wireless communication apparatus and wireless communication method
Provided is a wireless communication apparatus wherein channel estimation accuracy is improved while keeping the position of each bit in a frame, even when a modulation system having a large modulation multiple value is used for a data symbol. In the wireless communication apparatus (100), an encoding section (101) encodes and outputs transmitting data (bit string) to a bit converting section (102), and the bit converting section (102) converts at least one bit of a plurality of bits constituting a data symbol to be used for channel estimation, among the encoded bit strings, into ‘1’ or ‘0’ and outputs it to a modulating section (103). The modulating section (103) modulates the bit string inputted from the bit converting section (102) by using a single modulation mapper and a plurality of data symbols are generated.
US08391409B2 Method for transmitting an information sequence
Methods and apparatus are disclosed for applying successive multi-rank beamforming strategies (e.g., successive precoding strategies) for the design of precoders over a set of parallel channels. Successive beamforming is applied to a narrow band channel model and is also applied for finer quantization of a single beamforming vector (e.g., recursive beamforming). A first embodiment provides the optimal approach with high complexity. An alternative embodiment provides successive beamforming for near optimal precoding selection with medium complexity. A low complexity method for precoder selection is also provided wherein a channel representative matrix for the set of parallel channels is determined and successive beamforming on the calculated channel representative is applied.
US08391408B2 Method and apparatus for spatial mapping matrix searching
A spatial mapping matrix searching apparatus may include a plurality of antennae configured to receive a plurality of transmission signals, a post-coding module configured to generate a post-coding information according to the received plurality of transmission signals and generate a received signal from the received plurality of transmission signals, and a pre-coding module configured to generate a pre-coding information according to the post-coding information.
US08391407B2 Data transmission device and method thereof, and data reception device and method thereof
The present invention discloses a data transmission device and method thereof, and a data reception device and method thereof. The data transmission method in the present invention includes the following steps: encoding information data to obtain mother codes; generating transmission data including the mother codes and repetition codes from the mother codes, wherein parts of the mother codes with low reliability are selected to be repetition codes according to the modulation type of the mother codes; modulating the transmission data; transmitting the modulated data.
US08391406B2 Apparatus and method for amplifying signal and wireless transmitter using the same
Provided are a signal amplifying apparatus and method and a wireless transmitter using the same. The signal amplifier includes a polar coordinate converter configured to output an envelope signal and a phase signal by converting a signal to a polar coordinate, a multilevel quantizer configured to output a multilevel quantized signal by quantizing the envelope signal to multiple levels, an amplification state controller configured to control an amplification state using the multilevel quantized signal, and a power amplifier configured to amplify the phase signal according to the controlled amplification state.
US08391405B2 Symbol mapping method for repetition channel coding
A symbol mapping method for repetition coding is disclosed. The symbol mapping method comprises performing repetition coding on codeword to output repeated codeword symbols, and mapping the repeated codeword symbols with subcarriers located in different localized resource blocks. According to the embodiments of the present invention, it is possible to obtain maximum reliability in a receiving side by mapping codeword bits with subcarriers to reduce the number of bits having low reliability when a transmitting side uses repetition coding. Also, it is possible to improve decoding throughput and obtain channel diversity.
US08391403B2 Method for transmitting signals in a digital communication system and transmitter for a digital communication system
A method is provided which improves reliability of channel estimation in a digital communication system by reducing the ambiguity in the recognition of received symbols evaluated for the channel estimation. A first plurality of bits is mapped to a modulation state according to a given Gray mapping of binary numbers to modulation states and transmitted. The plurality of bits is re-transmitted at least once, with a sub-set of bits contained in the plurality of bits inverted, and mapped to further modulation states according to the same Gray mapping. The bits to be inverted are determined in a way that the number of different vector sum results obtainable, for all combinations of bit values within the first plurality of bits, by adding vectors representing complex values of the first and further modulation states in a complex plane, is lower than the number of different modulation states within the Gray mapping.
US08391399B2 Single carrier waveform system with frequency domain equalization
A communications system includes one or more antennas and a receiver coupled to the one or more antennas. The one or more antennas are operable to receive a signal transmitted from a transmitter. The receiver includes a combiner that is operable to combine the signals received by the one or more antennas into a combined signal. The signal received by the receiver is a single-carrier waveform comprising a signal field and one or more data fields after the signal field. The signal field indicates a modulation technique of the one or more data fields. The one or more data fields include a first short unique word, a data payload after the second short unique word, and a second short unique word after the data payload.
US08391394B2 Communication method and apparatus using codebook in MIMO system
A method and apparatus for transmitting and receiving signals using a codebook which maps each codeword to at least two different antennas is provided for a MIMO system. A transmission method includes mapping multiple codewords to multiple layers; mapping the multiple layers to multiple antennas using a precoding matrix selected from a rank-3 codebook which is designed to map the codewords to different antennas; and transmitting the codewords through paths formed by mapping the layers and the antennas. The precoding matrix of the rank-3 codebook is designed to equalize transmit power ratios between the antennas. The communication method and apparatus is advantageous to solve the problem of transmit power imbalance among the layers and the problem of performance degradation at the high SNR region in the conventional system using the rank-3 precoding matrices.
US08391389B2 MIMO detection with on-time symbol level interference cancellation
Techniques for receiving a MIMO transmission are described. A receiver processes received data for the MIMO transmission based on a front-end filter to obtain filtered data. The receiver further processes the filtered data based on at least one first combiner matrix to obtain detected data for a first frame. The receiver demodulates and decodes this detected data to obtain decoded data for the first frame. The receiver then processes the filtered data based on at least one second combiner matrix and the decoded data for the first frame to cancel interference due to the first frame and obtain detected data for a second frame. The receiver processes this detected data to obtain decoded data for the second frame. The front-end filter processes non on-time signal components in the received data. Each combiner matrix combines on-time signal components in the filtered data to obtain detected data for a channelization code.
US08391386B2 Communication method and radio transmitter
Radio transmission is performed even to a communication party whose bandwidth that can be used for transmission and reception is limited without having an influence of an offset of a DC component. A radio transmitter applied to an OFDMA communication system in which a plurality of different terminals performs communication using OFDM signals at the same time that includes a mapping part that allocates transmission power to each subcarrier, and also selects a subcarrier to which minimum power of the transmission power to be allocated is allocated and modulates transmission data in units of communication slots to output the modulated data; and a transmission part for transmitting radio signals including the modulated data using each of the subcarriers.
US08391385B2 Method and communication system device for the generation or processing of OFDM symbols in a transmission system with spread user data
OFDM symbols are generated using data from one or more users or from one or more data sources represented on a number of sub-carriers. To inhibit multiple-access interference on application of the CDMA principle, the data are transformed in a data-source specific manner and only subsequently allocated to the sub-carriers, independently of the transformation.
US08391381B2 Systems and methods for designing a reference signal to be transmitted in a multiplexed cellular system
A method of the present invention for designing a reference signal is a method for designing a reference signal, including: setting a first set of matrices by combining a plurality of first matrices each including a plurality of sequences; dividing the first set of matrices into a plurality of subsets each including at least one first matrix, and selecting at least one sequence from each of the plurality of subsets; and combining the selected sequences so as to generate a second matrix.
US08391380B2 Method of transmitting data using repetition coding
A method of transmitting data in a wireless communication system is provided. The method includes generating duplicate data by using repetition coding, the duplicate data being the same as original data, shifting the phase of the duplicate data, and transmitting the original data and the phase-shifted duplicate data. The duplicate data is mapped to a modulation symbol having a different size or phase as that of the original data, thus to reduce the PAPR unlike the general repetition coding.
US08391379B2 OFDM signal spectrum shaping device and method for OFDM signal spectrum shaping
An orthogonal frequency division multiplexing (OFDM) signal spectrum shaping device comprises an input interface configured to receive an input signal, a modulation portion coupled to the input interface, configured to modulate the input signal to generate a plurality of uncompensated sub-carriers, and a sub-carrier gain control module configured to selectively apply a plurality of gain factors to the plurality of uncompensated sub-carriers to generate a plurality of compensated sub-carriers that are substantially equal in amplitude.
US08391378B2 Metric computation for lowering complexity of MIMO detection algorithms
Included are embodiments of method for method for computing metrics. At least one embodiment includes searching a MIMO detection tree, the detection tree configuration being formed by a plurality of nodes and a plurality of leaves connected via a plurality of branches, the computational complexity associated with computing a node metric decreases with the node depth in the tree configuration and providing an estimate on a transmitted signal.
US08391368B2 Macro-block based mixed resolution video compression system
A system and method of compressing a video signal can include the steps of: receiving a video signal, the video signal including frames; analyzing, for each frame, the video signal on a macroblock-by-macroblock level; determining whether to downsample a macroblock residual for each of the macroblocks; selectively downsampling a macroblock residual for some of the macroblocks; and coding the macroblocks. A system and method of decompressing a video signal can include the steps of receiving a compressed video signal, the video signal including frames; analyzing, for each frame, the video signal on a macroblock-by-macroblock level; determining whether to upsample a macroblock residual for each of the macroblocks; selectively upsampling a macroblock residual for some of the macroblocks; and decoding the macroblocks.
US08391367B1 High performance context-adaptive video processor
An apparatus comprising a transform circuit, a first coder circuit, a second coder circuit, and a memory circuit. The transform circuit may be configured to generate (i) one or more first coefficients in response to a sample signal when in a first mode and (ii) the sample signal in response to the first coefficients when in a second mode. The first coder circuit may be configured to generate (i) a first bitstream signal in response to one or more second coefficients when in the first mode and (ii) the second coefficients in response to the first bitstream signal when in the second mode. The second coder circuit may be configured to generate (i) a second bitstream signal in response to one or more third coefficients when in the first mode and (ii) the third coefficients in response to the second bitstream signal when in the second mode. The memory circuit may be configured to store the first coefficients, the second coefficients, and the third coefficients. The memory may be configured to allow the transform circuit, the first coder circuit, and the second coder circuit to operate independently.
US08391366B2 Motion estimation technique for digital video encoding applications
The present invention provides an improved motion estimation encoder for digital video encoding applications. In one example embodiment, the improved encoder receives a raw image in the form of a current frame and estimates the macroblock motion vector with respect to a reference frame. The encoder then performs an initial local search around an initial motion vector candidate derived from spatio-temporal neighboring macroblock parameters. The encoder then compares the user-defined complexity scalable sum of absolute difference between the original and the associated reference macroblock against an adaptive threshold value for motion estimation convergence. The encoder introduces a global full search around a candidate from a coarser level, in case an initial local search fails. The encoder then selects an inter encoding mode for coding the current macroblock, when the first local search is successful, otherwise the encoder selects the inter or intra encoding mode for encoding the current macroblock by comparing variances of the original and difference macroblocks.
US08391355B2 Method and device for online dynamic semantic video compression and video indexing
A technique for semantic video compression is shown in block (120). Uncompressed video data (210), including a plurality of video data segments (S1, S2, . . . Sn), are organized into two or more buffer slots (220), such that each of the two or more buffer slots is filled with one or more of the received video data segments, thereby forming two or more buffered video portions corresponding to the two or more buffer slots. The buffered video data is then processed by a leaking rule, to extract one or more buffered video portions, while outputting one or more non-extracted buffered video portions, as compressed video data (230). The leaking rule data is stored in a histogram (240) and later used to organize and index data according to a users request.
US08391353B2 Methods and apparatus for artifact removal for bit depth scalability
Apparatus and methods are described for encoding and decoding an enhancement layer. A deblocking filter is applied at the enhancement layer for bit depth scalability. The deblocking filter is adjusted to remove coding artifacts caused by local inverse tone mapping for intra-layer texture prediction for the bit depth scalability. The boundary strength of the deblocking filter is adjusted based on a threshold that, in turn, is based on a difference of inverse tone mapping parameters for a block and an adjacent block.
US08391345B2 Power spectral distribution measurement to facilitate system acquisition
Wireless devices and techniques providing improved system acquisition in an environment of multiple co-existing technologies over a common frequency band are disclosed. In one aspect, at a remote terminal, a power spectral distribution (PSD) of received signals is sequentially measured in contiguous segments of a frequency band of interest. One or more characteristics of the measured PSD is compared to at least one predetermined metric to identify the presence or absence of at least one technology type of the received signals in frequency locations across the band. A system acquisition operation is performed in accordance with the identification, such as a tailored scan of channels at locations where a desired technology is identified.
US08391344B2 Transceiving device of pulse signal
A transceiving device includes a transmission signal generating module for generating a transmission signal that is frequency-modulated by a predetermined frequency sweep width, a transceiver module for transmitting a pulse signal having substantially the same waveform as a waveform of the transmission signal and receiving an echo signal corresponding to the transmission signal from a detection range, and a pulse-compression filter for pulse-compressing the echo signal received by the transceiver module. The pulse-compression filter has an input/output characteristic. The characteristic has, when the pulse-compression filter is inputted with an input signal having substantially the same waveform as the waveform of the transmission signal, a window function shape such that a phase spectrum of an output signal corresponding to the input signal is linear and an amplitude spectrum of the output signal does not have a frequency component other than a frequency band with which a frequency sweep is carried out.
US08391333B2 Preamble detection apparatus, preamble detection method, and program
A preamble detection apparatus includes: a threshold generation unit that determines a correlation maximum value detection threshold on the basis of a correlation peak value; a determination unit that detects one of correlation results, which exceeds the correlation maximum value detection threshold, as a correlation maximum value; a detection unit that updates the correlation peak value to the detected correlation maximum value when the correlation maximum value is detected; and a control unit that sets a period, in the event a correlation peak occurs, to a first period, sets a period, centering on a position where a distance from a correlation peak position is an integer multiple of a frequency hopping cycle, to a second period, and monitors presence or absence of a correlation result that exceeds the correlation maximum value detection threshold in the first and second periods, while not applying an erroneous detection threshold to the first period.
US08391328B2 Optical pumping of a solid-state gain-medium using a diode-laser bar stack with individually addressable bars
A diode-laser bar stack includes a plurality of diode-laser bars having different temperature dependent peak-emission wavelengths. The stack is arranged such that the bars can be separately powered. This allows one or more of the bars to be “on” while others are “off”. A switching arrangement is described for selectively turning bars on or off, responsive to a signal representative of the temperature of the diode-laser bar stack, for providing a desired total emission spectrum.
US08391324B2 Intense optical high field generator in optical oscillator utilizing chirped pulse amplification
An intense optical high field generator capable of generating an intensive optical high field includes an optical amplification medium that converts optical energy for a wide band or plural bands and performs optical energy conversion into oscillating light oscillated from an optical resonator. The generator also includes: a negative dispersion element that imparts negative dispersion to a pulse light, which is the oscillating light; a mode locking unit that mode locks the optical resonator; a positive dispersion element that imparts positive dispersion on the pulse light; an optical system; and a vacuum chamber that accommodates the negative dispersion element, the mode locking unit, and the positive dispersion element 4, such that an intensive optical high field generating point takes in the pulse light from the negative dispersion element or the positive dispersion element and is formed within the vacuum chamber.
US08391319B2 Communications system and related method for reducing continuity check message (CCM) bursts in connectivity fault management (CFM) maintenance association (MA)
In accordance with a non-limiting example, a system and method minimizes collisions between transmitted connectivity fault management (CFM) packets. Maintenance association endpoints are formed from a plurality of network switch elements to form a maintenance association. The clocks between each network switch element within the maintenance association are synchronized. A unique transmission window is assigned to each maintenance association endpoint as part of the maintenance association. A respective CFM packet is transmitted as a continuity check message (CCM) within the unique transmission window.
US08391318B2 Communication system including a data bus and multiple user nodes connected thereto, and method for operating such a communication system
A method and system of communication capable of expediting a calibration process which requires a data bus, multiple user nodes connected to the data bus, and data frames for data transmission that each include a data field and/or a control field and a check sum field. One user has a high-precision clock generator, and the remaining users have a clock generator having a lower precision. The users having the lower precision clock generator calibrate the lower precision clock generator to a system clock signal of the data bus, taking into account information contained in received calibration messages already present on the data bus. Expedited calibration requires the system clock signal period to be set according to a series of measurements and uses any given messages transmitted via the data bus as calibration messages, thus conserving bandwidth on the data bus.
US08391314B2 Method and apparatus of processing digital broadcasting signal including transmission ensemble number fields in transmitter and receiver
A method and an apparatus for processing digital broadcast signal are disclosed. The method of processing a digital broadcasting signal in a transmitter includes performing RS (Reed-Solomon) encoding on signaling data containing cross layer information between a physical layer and a upper layer, wherein the signaling data includes a first field indicating a protocol version change of the signaling data, a second field indicating a length of an extension field of a header included in the signaling data, and at least one field indicating a number of ensembles for at least one of a first transmission mode and a second transmission mode, and wherein the ensembles include a collection of services, each of the services being a package of packetized streams of mobile service data, forming data groups including the signaling data and the mobile service data, forming mobile service data packets including the signaling data and the mobile service data in the data groups, transmitting the digital broadcasting signal including the mobile service data packets during slots, wherein the first transmission mode is a mode in which the mobile service data are transmitted while reserving greater than 118 packets out of 156 packets in the slot and the second transmission mode is a mode in which the mobile service data are transmitted while reserving less than or equal to 118 packets out of 156 packets in the slot.
US08391311B2 Method for transmitting VoIP packet
A method for transmitting a voice over Internet protocol (VoIP) packet includes allocating a radio resource for VoIP packet transmission to a user, transitioning a VoIP service from a talk period, in which the VoIP packet is transmitted using the radio resource, to a silence period in which the VoIP packet is not transmitted, releasing the radio resource during the silence period, and transitioning the VoIP service to the talk period by reallocating the radio resource. Limited radio resources can be further effectively used.
US08391308B2 DOCSIS PON
In accordance with a first aspect of the disclosure, a system is provided. The system includes: an optical line terminal (OLT) shelf including a plurality of optical line cards, each optical line card supporting at least one passive optical network (PON) interface for communicating with a corresponding set of optical network units (ONUs), the OLT shelf thereby corresponding to a plurality of sets the ONUs; a system card controller for controlling the plurality of optical line cards; and a DOCSIS proxy for emulating a cable modem (CM) SNMP agent for each ONU, the DOCSIS proxy being responsive to an SNP manager in a DOCSIS NMS to configure the ONUs accordingly.
US08391307B2 Method for handling communications over a non-permanent communication link
A method is disclosed for handling communications over a non-permanent communication link. The method comprising centrally receiving a message to transmit from a plurality of applications, checking the availability of the non-permanent communication link, if the non-permanent communication link is not-available, queuing the received message for future transmission, and providing the message to a transport/network layer if the communication link is available.
US08391303B2 Border gateway protocol (BGP) grouped route withdrawals
An apparatus comprising: a first Border Gateway Protocol (BGP) device configured to communicate with a second BGP device and implement grouped route withdrawals with the second BGP device. A method comprising: announcing, by a BGP speaker, a plurality of grouped routes, and withdrawing, by the BGP speaker, a plurality of previously announced grouped routes.
US08391302B1 High-performance ingress buffer for a packet switch
A packet switch includes ingress ports, each of which contains a random access memory having a storage capacity for storing data. An ingress controller of the packet switch allocates the storage capacity of each random access memory among transaction types of packets by allocating credits to each of the transactions types for the random access memory. Each ingress port accepts packets based on the transaction types of the packets and the credits of the random access memory in the ingress port. Moreover, the ingress port stores accepted packets in the random access memory of the ingress port. In further embodiments, the ingress controller dynamically reallocates the credits of the random access memory in the ingress port during operation of the packet switch.
US08391301B2 Method for micro-controller and DSP based data communication within a transceiver
The present invention provides a method for transmitting data and a transceiver. In one embodiment, the method includes: (1) generating data blocks of a data package in a first transceiver to transmit to a second transceiver, the first transceiver including a micro-controller coupled to a digital signal processor, (2) generating identification data in the first transceiver for the data blocks, wherein the identification data is an index of a list of the data blocks to be transmitted and each of the data blocks is transmitted with the index and (3) identifying the data blocks to be transmitted to the second transceiver based on the identification data, wherein the microcontroller employs the index to manage transmission of the data blocks.
US08391299B2 Architecture of gateway between a home network and an external network
A Home Gateway (HGW) interconnects a Home Network (HN) and an External Network (EN), and is adapted to communicate with the HN and EN at a Network layer. HGW is provided with a Service Application Programming Interface Layer (SAPI Layer) capable of performing, at an Application layer, mediator functions for supporting communication and services between the HN and EN. Devices of the HN are able to communicate with devices of EN via the HGW, and to actualize services via the HGW.
US08391295B2 Temporal affinity-based routing of workloads
Techniques for routing client requests among a group of nodes offering a service are described. A coordinator determines that performance could be improved by using affinity-based routing. In one embodiment, the coordinator calculates a Time-to-Live (TTL) metric whereby clients benefit by returning to the same cache and posts this hint to subscribers. Client's start preserving locality data in an affinity context, such that later requests for a connection can be routed to the location last visited. The coordinator measures the system over subsequent intervals. If the gradient of the goodness (viz service quality and capacity) is stable or improving, then the coordinator continues to advise subscribers to use the affinity-based technique. Alternatively, if the gradient of the goodness is deteriorating, then the coordinator posts advice to the subscribers to stop using the affinity-based technique for any instance during the next intervals.
US08391294B2 Method for estimating a system state in a network
A method for estimating a system state, in a decentralized network having a plurality of nodes, each node being confined for receiving and sending information, and for processing information. Each node being connected to neighboring nodes of the network. At each node the method includes: (i) maintaining a set of particles and associated weights, which represent an estimate of the system state, (ii) representing the estimated system state as a mixture of Gaussian distributions in a channel filter, and communicating the mixture to neighboring nodes, and (iii) a neighboring node receiving the mixture in a channel filter that contains a similar Gaussian representation of its own estimate of system state, and dividing the incoming mixture by the existing mixture, for updating the estimate of the system state that is maintained at the node.
US08391292B2 Systems and methods for dynamically adjusting QoS parameters
A method for dynamically adjusting QoS parameters associated with a virtual circuit is disclosed. The virtual circuit includes a first end connected to a first router and a second end connected to a second router. The method includes receiving an offer message at the second router, and sending a request message to the first router. The offer message includes a first set of QoS parameters and the request message includes a second set of QoS parameters. The method further includes receiving a request confirmation message at the second router, receiving a new offer message at the second router, and sending information compliant with the second set of QoS parameters to the first router. The new offer message includes the second set of QoS parameters.
US08391291B2 Learning the expiry time of an address binding within an address translation device for an SIP signaling server
A signaling server (SS) comprising means for transmitting SIP signaling messages with a client (T) through a NAT address translation device temporarily binding a public address to the client's private address, including means for receiving registration messages from the client and for sending the client a validity duration, at the end of which it must transmit a new registration message. The invention resides in the fact that if the client is located behind an address translation device, it determines an approximate expiry time for the temporary binding by successively sending test messages after an increasing wait time until the termination of the binding is detected. This approximate time is then used by being transmitted as the SIP validity period.
US08391287B2 Packet relay method and device
A node according to a packet relay method which enables a multicast transfer or broadcast transfer of a packet effectively is provided. When the node receives a packet set with a multicast address or broadcast address as a destination address from a source client, the packet is added with an MPLS label common to destination clients corresponding to the multicast address or all destination clients corresponding to the broadcast address. The packet added with the common MPLS label is transferred over a ring network. When receiving the packet from a ring network, the node removes a common MPLS label from the received packet to be transmitted to destination clients when it detects that the common MPLS label is added to the received packet.
US08391286B2 Packet switch methods
The present invention relates to a packet switch and a packet switching method. An example embodiment of the present invention comprises at least three network ports, at least one instrument port, a mux-switch, a packet switch fabric, and an address table. The embodiment updates the address table to include the source address of each ingress packet of each network port and associate the source address with that network port. The mux-switch routes the ingress packet traffic of each network port according to the identity of the network port so that at least a copy of the packet traffic of one of the network ports is routed to an instrument port. The packet switch fabric routes the packets from the instrument ports to the network ports according the destination address of the packet and the identity of the network port that is associated with the destination address as recorded in the address table.
US08391285B2 Communication apparatus, communication system, and communication method
A communication apparatus configured to transmit data by configuring a plurality of virtual communication pathways in a physical communication pathway established with another communication apparatus, the communication apparatus includes a configuration unit that configures information related to an order of priority of the virtual communication pathways, a first storage unit that stores the configured information, a second storage unit that stores data, which includes signals, based on the configured information, and a transmission processing unit that carries out transmission processing on the stored data based on the configured information.
US08391282B1 Systems and methods for overlaid switching networks
An overlaid switching network is derived by overlaying perpendicularly one multistage interconnection network with a second multistage interconnection network. The new network is formed by placing a switching element corresponding to the position of switching elements in either multistage interconnection network. Each switching element in the overlaid network has the ports defined by the two multistage interconnection networks as does its interconnection networks. A special case occurs when the number of rows and columns of the first multistage interconnection network is the number of columns and rows of the second multistage interconnection network, respectively. The overlaid switching networks also inherit their upgradeability from the multistage interconnection networks from which they are derived, such as in the case of a redundant blocking compensated cyclic group multistage network.
US08391279B2 Modem and calling packet processing method thereof
A modem to process calling packets includes receiving a calling request packet from a software phone of a communication terminal, and determining if the calling request packet includes a special tag. If the IP phone is idle, the modem records a source IP address of the calling request packet, and modifies the source IP of the calling request packet to be an IP address of the IP phone, then the modem transmits the modified calling request packet to a server, and receives a calling reply packet from the server, then modifies a destination IP address of the calling reply packet to be the IP address of the communication terminal. The modem transmits the modified calling reply packet to the software phone to establish the call.
US08391274B2 Data call terminating service system and method for dynamic IP of mobile communication terminal
Disclosed is a data call terminating service system and method for a dynamic IP of a mobile communication terminal. The method includes the steps of: a) transmitting, from a DNS to a call terminating server, access request information about a request of access to a URL designating a specific mobile communication terminal from an external host; b) acquiring, at the call terminating server having received the access request, a phone number of the mobile communication terminal corresponding to the URL contained in the received access request information by making reference to a database; c) requesting, at the call terminating server, data call establishment from the mobile communication terminal after acquiring location information of the mobile communication terminal corresponding to the phone number acquired in step b) through HLR; and d) notifying, at the call terminating server, the DNS and the external host of IP assignment information received from the mobile communication terminal having established the data call.
US08391269B2 Method and system for transmitting data from a medium access control device via a physical layer to an antenna
The invention relates to a system for transmitting data from a medium access control device (2) via a digital interface (IF1) to a physical layer (PHY) and to an antenna (5), the physical layer (PHY) comprising a base band (4) with a base band controller (7) and a data processing pipeline (3) comprising a plurality of functional blocks (FB1 to FB 13), wherein a burst timing control block of one of all functional blocks (FB1 to FB 13) of the data processing pipeline (3) detects an end of a packet of payload data and, thereupon, sets a halt signal (STALL) for those functional blocks (FB1 to FB 13) preceding the burst timing control block (FB1 to FB 13) in the data processing pipeline (3) and starts a timer (T1) for counting a duration of a minimum inter-frame space (MIFS), wherein the burst timing control block (FB1 to FB 13) resets the halt signal (STALL) after expiration of the timer (T1). It also relates to a corresponding method.
US08391266B2 Direct link setup procedure in tunneled direct link setup wireless network and station supporting the procedure
Provided are a Tunneled Direct Link Setup (TDLS) establishment procedure for a TDLS initiator and a station supporting the establishment procedure. In the establishment procedure, a requesting Non-AP QSTA transmits a TDLS setup request frame via an access point (AP) to an intended peer Non-AP QSTA. And, the requesting Non-AP QSTA receives a TDLS setup response frame via the AP from the intended peer station in response to the TDLS setup request frame. And, the requesting Non-AP QSTA transmits a TDLS setup confirm frame via the AP to the intended peer station in response to the TDLS setup response frame.
US08391264B1 Mobile device handoff while maintaining connectivity with multiple access points
A method, system, and computer-readable media are provided for allowing a mobile device to maintain communication connectivity during a handoff between wireless access points. In one aspect, the method may include negotiating security association information and establishing a first communication tunnel by tunneling an inner IP address within a first outer IP address. The method may further include authenticating a request for establishing a second communication tunnel by identifying the negotiated security association information within the request. Additionally, the method may include establishing the second communication tunnel by tunneling the inner IP address within a second outer IP address. Moreover, the method may include pushing data associated with the communication session through the second communication tunnel.
US08391261B2 Method for generation of beacons by a base station in a wireless communications network
The invention, which relates to a method for the generation of beacons by a base station in a wireless communications network, consisting of at least one base station and at least one station, the beacons being generated repeatedly at time intervals, is based on the object of specifying a method with which the generation of the beacons can be tailored to needs, achieving a reduction of the energy demand and the emissions, and an improvement in the security. According to the invention, the object is achieved in that the generation of the beacons is started with a switching on of the base station and is ended after the expiry of a wait time tw0 in the event that no station is connected to the base station, and in that the generation of the beacons is started by a receipt of a probe request from a station of the communications network and is ended after the expiry of a wait time tw1 in the event that no station is connected to the base station.
US08391258B2 Communication parameter setting method, communicating apparatus, and managing apparatus for managing communication parameters
When a plurality of managing apparatuses which manage communication parameters exists, there is a case where the wrong communication parameters are set into a communicating apparatus. When the communication parameters are set between the managing apparatus which manages the communication parameters and the communicating apparatus, if a plurality of managing apparatuses in a setting state of the communication parameters into the communicating apparatus is detected, the managing apparatus in the setting state is notified that the plurality of managing apparatuses in the setting state exists. Whether or not the setting of the communication parameters is continued is discriminated, thereby continuing or stopping the setting of the communication parameters.
US08391257B2 Wireless communication system, wireless communication apparatus and wireless communication method and computer program
In order to solve problems arising when a communication system such as a wireless LAN is constructed as a decentralized distributed type network without a relationship of control station and controlled stations such as a master station and slave stations, in a wireless communication system composed of a plurality of communication stations without a relationship of control station and controlled stations, respective communication stations transmit beacons with information concerning a network written thereon with each other to construct the network, and it becomes possible to make sophisticated judgment such as communication states of other communication stations by those beacons.
US08391254B2 Channel configuration and bandwidth allocation in multi-hop cellular communication networks
A multi-hop wireless communication network is disclosed, which includes a fixed communication unit, at least one mobile communication unit, and a relay communication unit. The relay communication unit is operable to relay a plurality of signals bi-directionally between the fixed communication unit and the at least one mobile communication unit, by receiving a first signal on at least one of a dedicated sub-carrier and a dynamic sub-carrier in a first downlink channel segment from the fixed communication unit, and transmitting the received first signal to the at least one mobile communication unit on a dynamic sub-carrier in a second downlink channel segment. Also, the relay communication unit is operable to receive a second signal on a dynamic sub-carrier in a first uplink channel segment from the at least one mobile communication unit, and transmit the received second signal to the fixed communication unit on at least one of a dedicated sub-carrier and a dynamic sub-carrier in a second uplink channel segment. Also, the fixed communication unit can allocate bandwidth dynamically or in a fixed amount in the first downlink channel segment, the relay communication unit can allocate bandwidth dynamically in the second downlink channel segment based on at least one Quality of Service value received from the at least one mobile communication unit, the relay communication unit can allocate bandwidth dynamically for the at least one mobile communication unit in the first uplink channel segment, and the fixed communication unit can allocate bandwidth dynamically or in a fixed amount for the relay communication unit in the second uplink channel segment.
US08391251B2 Transmission method for a time division duplex mobile communication system
A method for a time division duplex mobile communication system comprises that setting a minimum unit of transmission time interval and a system frame structure, wherein each radio sub frame is composed of a downlink pilot time slot, a switching guard period, a synchronization time slot and a plurality of service time slots, and the transmission time interval uses the length of time slot as a unit; a user obtaining downlink synchronization by receiving downlink pilot information of the downlink pilot time slot, and obtaining corresponding configuration information of cell by reading cell broadcasting information, and then transmitting uplink synchronization information in the synchronization time slot to fulfill a random access process, wherein the configuration information includes transmission time interval and system frame structure information; the network side/the user transmitting call information to an opposite end, and the opposite end processing call acknowledgement according to the transmission time interval; the network side allocating a channel for the user, wherein the network side and the user communicates through the allocated channel. The method reduces data transmission delay during communication, improves call throughout.
US08391249B2 Code division multiplexing commands on a code division multiplexed channel
An apparatus includes a first encoder for receiving a plurality of symbol streams for respective ones of a plurality of mobile stations and encoding each of the symbol streams with one of a plurality of covering sequences to form a plurality of covered sequences. The apparatus further includes a summer for summing the plurality of covered sequences to form a first Code Division Multiplexed (CDM) signal. In addition, the apparatus includes a second encoder for covering the first CDM signal with a covering sequence to form a first covered CDM signal. A system and method for multiplexing plurality of symbol streams are also provided.
US08391246B2 Radio communication terminal, communication method, and radio communication system
There is provided a radio communication terminal including a measurement execution section which measures, as a measurement value, strength or quality of a signal received by a reception circuit from a base station, a measurement report creation section which creates a measurement report containing the measurement value, an offset amount setting section which sets a correction amount based on a usage status of the radio communication terminal by a user, an offset correction section which calculates an output value by subtracting the correction amount set by the offset amount setting section from the measurement value measured by the measurement execution section, and a measurement report transmission timing control section which designates a timing of transmitting the measurement report created by the measurement report creation section based on the output value calculated by the offset correction section and a threshold.
US08391244B2 Radio communication terminal devices, radio communication network system, method for operating a radio communication terminal device
In an embodiment, a radio communication terminal device is provided. The radio communication terminal device may include a receiver configured to receive radio data signals via a first frequency carrier and a second frequency carrier, and a controller configured to control the receiver such that the receiver does not receive radio data signals via the first frequency carrier during a transmission gap, and such that the receiver receives radio data signals via the second frequency carrier during the transmission gap.
US08391238B2 Automatic configuration of inter-domain access technology neighbor relations
The disclosure relates to automatically configuring a map of inter-access technology neighbor relations. In this neighbor relations map configured by an ANDSF, relationships between neighboring cells of differing access networks of the same or different access technologies are maintained including extra-domain and non-domain neighbor relationships. A domain refers to a domain of one or more access technologies in which ANDSF is not required for intra-domain access selection and discovery. ANDSF configures the map based on neighbor relations data reports from wireless terminals, which record the neighbor relations data as they perform extra-domain or non-domain handovers or reselections or as they scan their surroundings. ANDSF provides steering instructions to configure the neighbor relations data recording and reporting behaviors of the wireless terminals. ANDSF provides access network discovery and selection information, which indicates availability of non-domain accesses, and in some cases domain accesses, to wireless terminals based on their locations.
US08391231B2 Method and apparatus having improved handling of state transitions
A method, in a wireless communications device, for transitioning between communication states, the wireless communications device compliant for use in a Universal Mobile Telecommunications System (UMTS), the method comprising: checking for radio bearer mapping information for the communication state being transitioned to prior to sending an update message, where the transition between communication states is not a transition from a paging state to a bidirectional communication state using shared channels; and transitioning to the state to be transitioned to using the checked radio bearer mapping information for that state and sending the update message.
US08391225B2 Frame based, on-demand spectrum contention destination resolution
A method and system by which a base station in a Wireless Regional Area Network (WRAN), and more generally a transceiver in a cognitive radio (CR) system, can communicate with other transceivers to fairly share transmission and reception of scheduled use (“occupancy”) of frames on a single channel within a frame-based, on demand spectrum contention system. The method and system disclose how the base station currently occupying a channel responds to requests from other base stations for an increased share of the frames available in a subsequent superframe of the CR system. The method and system assure fair and efficient access to the transmission channel by a random number based contention process.
US08391224B2 Proactive load distribution for 802.111-based wireless LANs
A wireless communication system is able to balance load in a wireless network based on radio frequency (RF) utilization, signal strength, quality of signal (QoS), and other measures. The load may be dynamically moved to other wireless access points within the wireless network based on the amount of load on one or more of the access points and on the measures. As such, at different load conditions, the system can change the methods of how to determine which access point should handle a communication session. Further, the system provides methods for proactively adjusting the load in the wireless network before any one access point reaches its capacity.
US08391218B1 Multiple routable IP addresses for a cellular router
A system for negotiating routable Internet Protocol (IP) addresses is provided. The system includes a communication device that is operable to transmit a request for a routable Internet Protocol (IP) address, and a cellular router in communication with the communication device. The routable IP address may be used to provide communication to the communication device. The cellular router is operable to receive the request for the routable IP address and negotiate an IP subnet. The IP subnet includes a plurality of routable IP addresses, which are allocated to the cellular router. The cellular router is operable to provide at least one of the plurality of routable IP addresses to the communication device.
US08391212B2 System and method for frequency domain audio post-processing based on perceptual masking
In an embodiment, a method of frequency domain post-processing is disclosed. The method includes applying adaptive modification gain factor to each frequency coefficient, and determining gain factors based on Local Masking Magnitude and Local Masked Magnitude.
US08391203B1 System and method for data link layer handoffs in a wireless network
A wireless device may establish a data connection with a 2G or 3G wireless network, which the wireless device can then use to engage in packet data communications with other devices on packet data networks. The wireless device may then roam from one wireless network to the other wireless network, such by roaming from the 2G wireless network to the 3G wireless network or vice versa. The wireless device may then transfer its data connection between the networks, thereby allowing the wireless device to continue in any established data sessions with other devices.
US08391200B2 Method of multimedia broadcast multicast service content aware scheduling and receiving in a wireless communication system and related communication device
A method of MBMS content aware scheduling and receiving for a network of a wireless communication system includes receiving data of different resolutions generated from a data source from an MBMS content provider, wherein the received data is used for forming a plurality of MBMS services of different resolution levels, transmitting a plurality of dynamic scheduling information units corresponding to the plurality of MBMS services of different resolution levels formed with the received data except the MBMS service of the lowest resolution level, transmitting scheduling information of the MBMS services of the lowest resolution level on a multicast control channel, and transmitting the plurality of MBMS services of different resolution levels on a multicast traffic channel.
US08391199B2 Flexible medium access control (MAC) for ad hoc deployed wireless networks
Systems and methods are disclosed that facilitate wireless communication using resource utilization messages (RUMs), in accordance with various aspects. A RUM may be generated for a first node, such as an access point or an access terminal, to indicate that a first predetermined threshold has been met or exceeded. The RUM may be weighted to indicate a degree to which a second predetermined threshold has been exceeded. The first and/or second predetermined thresholds may be associated with various parameters associated with the node, such as latency, throughput, data rate, spectral efficiency, carrier-to-interference ratio, interference-over-thermal level, etc. The RUM may then be transmitted to one or more other nodes to indicate a level of disadvantage experienced by the first node.
US08391197B2 Method, system, and terminal for sending and receiving multicast broadcast service
A method, a system, and a terminal for sending and receiving a multicast broadcast service (MBS) are provided in the communication field. Based on a preset correspondence between MBS content IDs and LCIDs, a network side sends MBS data with an LCID corresponding to the MBS content ID in an air interface link identified by an MCID. A terminal generates a corresponding LCID from the MBS content ID of the MBS based on the same correspondence as that of the network side, and receives data via a logical channel identified by the LCID in the air interface link identified by the MCID of the required MBS. A method for assigning an MBS information ID is also provided. The uniqueness of the MBS content ID can be guaranteed within an operator, an access service network (ASN), or an MBS zone.
US08391185B2 Method to transport bidir PIM over a multiprotocol label switched network
A method, system and an apparatus to transport bidir PIM over a multiprotocol label switched network are provided. The method may comprise receiving a multicast packet at a network element, the multicast packet including an upstream label. The method may further comprise identifying, from the upstream label, a Multicast Distribution Tree (MDT) rooted at a rendezvous point. The packet may be forwarded along the MDT towards the RP based on the upstream label. The MDT may be identified from a downstream label and the packet may be forwarded along the MDT away from the RP based on the downstream label.
US08391178B2 Route allocation apparatus and method
A route allocation apparatus includes a route calculation section and a route allocation controller. The route calculation section calculates a route between an outgoing edge node and incoming edge node within a network. The route allocation controller allocates the route to communication slots. Further, the route allocation controller calculates an expected value as an index of the number of the routes allocatable to the communication slots, selects a route allocation in which the expected value is a maximum, obtains the number of the routes allocatable to the selected communication slots after the route allocation, and updates the expected value.
US08391177B2 Use of minimal propagation delay path to optimize a mesh network
The present technology relates to protocols relative to utility meters associated with an open operational framework. More particularly, the present subject matter relates to protocol subject matter for advanced metering infrastructure, adaptable to various international standards, while economically supporting a 2-way mesh network solution in a wireless environment, such as for operating in a residential electricity meter field. The present subject matter supports meters within an ANSI standard C12.22/C12.19 system while economically supporting a 2-way mesh network solution in a wireless environment, such as for operating in a residential electricity meter field, all to permit cell-based adaptive insertion of C12.22 meters within an open framework. Particular present features relate to the use of minimal propagation delay path to optimize a mesh network.
US08391173B2 Method and apparatus for radio resource allocation in an orthogonal frequency division multiplexing communication system
In an OFDM communication system, wherein a frequency bandwidth is divided into multiple Physical Resource Units (PRUs), a Frequency Partitioning Configuration Module (FPCM) is provided that configures a physical layer for use in multiple coverage areas. The FPCM divides the PRUs into a first group, for frequency selective allocations, and a second group, for frequency diverse allocations. The FPCM subdivides each of the two groups into multiple sets of PRUs, maps the sets of PRUs from the first group to consecutive PRUs allocated for contiguous segment allocation (CS-PRUs), and maps the sets of PRUs from the second group to consecutive PRUs allocated for distributed segment allocation (DS-PRUs). The FPCM permutes the DS-PRUs and allocates the CS-PRUs and the permuted DS-PRUs to at least one frequency partition.
US08391172B2 Communication method and communication terminal for radio communication system
A communication method for a radio communication system employing an enhanced uplink scheme includes the steps of determining a transmission power control bit for controlling transmission power of a downlink control channel; generating an uplink control signal including the transmission power control bit; and transmitting the uplink control signal to a base station. In the determining step, whether an indicator channel indicating acknowledgement or negative acknowledgement for an uplink data channel is receivable at a quality level better than a predetermined value is evaluated, and the transmission power control bit of the indicator channel is determined based on the evaluation result.
US08391170B2 Communication characteristic measuring device adapted to wireless terminal
A cognitive terminal includes different types of radio modules suiting to different types radio media employed by a cognitive base station in the radio communication system. The radio module of the cognitive terminal counts the number of times it receives/transmits ACK/NACK in each unit time. A radio environment cognition unit of the cognitive terminal performs calculations using the count number(s) in consideration of the packet transmission time interval or the time required for repeating a single data packet, thus measuring characteristics of delay time variations in uplink/downlink communication with respect to each radio media. Thus, it is possible for the cognitive terminal to switch over radio media based on ACK/NACK in uplink/downlink communication.
US08391169B2 Methods and apparatus for locating a mobile device in a sleep mode
Apparatus and methods are provided for locating a mobile device in a sleep mode. A method comprises transmitting a beacon signal configured to initiate transmission of a response signal from a mobile device in a sleep mode. The mobile device is associated with a first wireless access device on a first communication channel. The method further comprises receiving the response signal from the mobile device on the first communication channel and determining the physical location of the mobile device based on the response signal.
US08391168B2 Automatically discovering architectural roles of packet switching devices
Network architectural roles of packet switching devices are automatically determined by retrieving and analyzing configuration information of the packet switching devices. The retrieved configuration information typically includes operational details of the packet switching operations performed by the packet switching device, with these retrieved operational details being analyzed in order to identify one or more network architectural roles being performed by a particular packet switching device. Examples of such identified network architectural role include, but are not limited to, a customer edge device, a provider edge device, and a user-facing provider edge device. Knowing the architectural role performed by a packet switching device is useful for operations, administration, maintenance and provisioning of networks of these packet switching devices.
US08391167B2 Method to precisely and securely determine propagation delay and distance between sending and receiving node in packet network and packet network node system for executing the method
A system and method for determining a propagation delay between nodes in a packet network are provided. The system and method include sending a ping packet from a source node to a destination node, determining an intermediate node delay of the ping packet at an intermediate node and recording the intermediate node delay in the ping packet and determining the propagation delay at the destination node by using the intermediate node delay.
US08391158B2 Cell identifier assignment and selection
Systems and methodologies are described that facilitate providing physical cell identifier (PCI) assignment. Neighboring access point parameters can be collected and transmitted to a PCI assigning component, which can generate a PCI based on the parameters as well as other local parameters. The neighboring access point parameters can be received by evaluating signals transmitted by the neighboring access points, from a UE communicating with the neighboring access points, over a backhaul link, etc. The parameters can include signal strength, identification, and/or the like. In addition, prioritized lists of PCIs can be provided to an access point, which can utilize the neighborhood parameters to select an optimal PCI from the list.
US08391155B2 Digital content download associated with corresponding radio broadcast items
A portable device is used to capture, in real time, data sufficient to identify an item, such as a product or service promoted, or a music track played, on a broadcast medium such as radio or television. The capture device can be a standalone implementation, or an application program executable on a personal communication device such as a cell phone or Blackberry. The capture device communicates the captured data to a remote server via a selected wired or wireless channel, or the internet, and the server provides services to support the user in responding to the radio or television broadcast item that corresponds to the captured data. The server on demand downloads to the user additional digital content associated with the identified radio broadcast item.
US08391153B2 Decoupling radio resource management from an access gateway
Particular embodiments provide an access gateway that facilitates communication between a plurality of access technologies. The access gateway facilitates data communication with an access terminal through a bearer path. A radio resource manager is configured to provide radio resource management functions for the communications. The radio resource manager is decoupled from the bearer path and provides control of radio transmission characteristics for the bearer path to the gateway. Because the radio resource manager is not in the bearer path, the access gateway may be access technology agnostic. Thus, the access gateway does not need to have access-specific modules based on the radio technology for each bearer path.
US08391151B2 Inter-network-nodes flow control
A mobile network telecommunication system is provided. The system includes a base station for sending flow control signal for a UE (user equipment) to a core network, the core network being capable of responding to the flow control signal by buffering packet data for the UE, and an interface for transmitting the flow control signal between the base station and the core network.
US08391150B2 Buffer status reporting method for uplink scheduling and communication system using the same
In a satellite communication system having a long round-trip delay time, a user terminal reports initial buffer status information when the communication between the satellite and the use terminal started. When a trigger, a timer or padding requiring buffer status information report is generated, the user terminal checks whether there are data to be re-transmitted due to transmission failure from the previous BSR. When transmission-failed data exists, the user terminal sets buffer status amount, which is reported through BSR, as a value that is obtained by adding the amount of transmission-failed data to the amount of newly added after previous report. When there are no transmission-failed data, the user terminal reports BSR which is set as the amount of newly added data to the buffer after previous report. For discriminating entire buffer status reporting and the increased amount of data reporting, the reserved index of a header file is used.
US08391147B2 IP converged system and packet processing method therein
An IP converged system includes a VoIP ALG module and a policer module. The VoIP ALG module acquires dynamically changing RTP IP/port information of a packet by parsing a VoIP SIP message, and transmits the RTP IP/port information to the policer module. The policer module sets IP/port, which provides a real-time data service, by referring to the information from the VoIP ALG module, and discriminatively sets a packet processing condition for a non-real-time data service and a packet processing condition for the real-time data service. The VoIP ALG module and the policer module share RTP IP/port information, dynamically determined by the negotiation between VoIP gateways or VoIP terminals, in call setup/release, so that the policer can discriminately drop or mark VoIP packets by referring to the RTP IP/port information.
US08391145B2 Method and apparatus for improving performance in a network using a virtual queue and a switched poisson process traffic model
A method for improving network performance using a virtual queue is disclosed. The method includes measuring characteristics of a packet arrival process at a network element, establishing a virtual queue for packets arriving at the network element, and modeling the packet arrival process based on the measured characteristics and a computed performance of the virtual queue.
US08391142B2 Access window envelope controller in wireless network
A method may include receiving a packet destined to a wireless node, buffering the packet, and scheduling a time at which to transmit the packet to the wireless node. Scheduling the packet may include determining an application-layer protocol associated with the packet. The method may also include wirelessly transmitting the packet to the wireless node at the scheduled time. In one embodiment, the method may also include sending information to a node that originated the packet indicating that the packet is buffered. In another embodiment, sending information to the node that originated the packet indicating that the packet is scheduled to be wirelessly transmitted at the scheduled time.
US08391141B2 Systems and methods for selecting a network access system
A system according to some embodiments of the invention includes (1) a component (e.g. ANDSF) that provides a cell selection rule to a UE and (2) a component (e.g. an access node) that provides the UE with information about the load in the cell currently utilized by the UE. This enables the UE to determine whether to leave the cell, which may be a 3GPP cell, and use a different cell, which may be a non-3GPP cell, by applying the cell selection rule in conjunction with its knowledge about the load of the cell.
US08391139B2 Dynamic load balancing using quality/loading bands
Methods and apparatus for. An example method includes determining, by a network device, respective quality metrics for each of a plurality of members of an aggregation group of the network device, the respective quality metrics representing respective data traffic loading for each member of the aggregation group. The example method further includes grouping the plurality of aggregation members into a plurality of loading/quality bands based on their respective quality metrics. The example method also includes selecting members of the aggregation group for transmitting packets from a loading/quality band corresponding with members of the aggregation group having lower data traffic loading relative to the other members of the aggregation group.
US08391138B2 Quantum and promiscuous user agents
A call processing system includes a call processing server. The call processing server processes calls for an internal network that employs SIP features and functions. The call processing server can receive calls from or send calls to one or more external communication endpoints that are not part of the internal network. However, the call processing server can associate a floating user agent with the communication from the external communication endpoint and lock the floating user agent to a gateway. After locking onto a gateway and initiating the call, the floating user agent can then publish call event status and receive SIP primitives similar to other SIP-enabled devices.
US08391134B2 Routing protocols for accommodating nodes with redundant routing facilities
Graceful restart in routers having redundant routing facilities may be accomplished by replicating network (state/topology) information.
US08391133B2 System and method for automatic reset of pre-programmed circuits in case of failures in transport networks
A network system comprises at least one input TNE (10) and one output TNE (11) interconnected by circuits in the network (20). Each TNE in the protection step comprises a traffic selector (22, 23) switchable between listening to the traffic input from a work circuit (13, 14) and listening to the traffic input from a reset circuit (18, 19) and a Split module (21, 24) allowing sending of a same traffic output either to a work circuit or to a reset circuit. Each TNE comprises in addition an agent (25, 26) termed ASTN agent commanding activation and deactivation of the reset circuit and switching of the traffic selector between work circuit and reset circuit. Each of the two ASTN agents can emit an “Activate” message to command activation of the reset circuit and signal to the other agent completed activation of the reset circuit and a “RevertRequest” message for signaling to the other agent the desire to deactivate the reset circuit previously activated, and a “Revert” message for commanding deactivation of the reset circuit after reception of a “RevertRequest” message sent to it by the other agent.
US08391131B2 Method for processing the random access transmission in the frequency domain
There is provided a method of operating a communication system, the communication system comprising a user equipment and a receiver, the method in the system comprising generating a random access transmission in a user equipment and transmitting the random access transmission to the receiver in the communication system, the random access transmission including a preamble; receiving the random access transmission from the user equipment at the receiver; processing the random access transmission in the frequency domain to detect the preamble. In preferred embodiments of the invention, the preamble has a cyclic prefix, or is preceded by a plurality of zero-valued symbols.
US08391129B2 Time alignment in multicarrier systems
Transmission timing of a random access preamble in an uplink carrier of a carrier group being determined employing a synchronization signal transmitted on a downlink carrier of the carrier group. The wireless device receives a time alignment command from the base station. The time alignment command comprises a time adjustment value and an index identifying the carrier group. The wireless device apply the time adjustment value to uplink signals transmitted on all activated uplink carriers in the carrier group.
US08391126B2 Method and apparatus for providing echo cancellation in a network
A method and apparatus for providing echo cancellation are disclosed. For example, the method receives via an echo canceller a first audio signal directed towards an endpoint device, and adds an inserted signal to the first audio signal directed towards the endpoint device. The method determines if a second audio signal being received from the endpoint device comprises the inserted signal, and cancels at least a portion of the second audio signal that is associated with the first audio signal, if the inserted signal is detected.
US08391123B2 Optical recording medium including multiple layers and a pre-write area
An optical recording medium provided with one or a plurality of recording layers includes an adjustment data recording area for recording therein adjustment data used for adjusting focus or spherical aberration of laser light used for recording/reproduction, the adjustment data recording area being disposed at a predetermined position on each of the one or plurality of recording layers, and a determination information recording area for recording therein determination information indicating whether or not the adjustment data has been recorded in the adjustment data recording area in each of the one or plurality of recording layers.
US08391119B2 Apparatus and method for recording/reproducing optical information, and data fetching by reference to optical information recording medium
Provided are an optical information recording/reproducing apparatus and method capable of managing a wavelength of a light source when information is recorded/reproduced by utilizing holography, and limiting a wavelength of an interference fringe in a medium, and an optical information recording medium. For information recording/reproducing relative to an optical information recording medium by a pickup, a wavelength detector circuit detects a reference wavelength recorded in a storage area of the optical information recording medium, in accordance with the detected reference wavelength, a controller adjusts a wavelength of a light source of the pickup to have an optimum wavelength, and if a temperature detected with a temperature sensor indicates a predetermined change, readjusts the wavelength of the light source of the pickup to have an optimum wavelength.
US08391112B2 Optical disk apparatus, control method, and program
An optical disk apparatus driving an optical disk includes a tilt-angle adjusting unit configured to adjust a tilt angle indicating the tilt of an optical axis of laser light emitted from a pickup to detect an optimal tilt angle at which a traverse signal has the maximum amplitude and a storing unit configured to store information about the optimal tilt angle. When the optical disk has multiple recording layers on one side, the tilt-angle adjusting unit adjusts the tilt angle with respect to each of the multiple recording layers to detect the optimal tilt angle and the storing unit stores information about the optimal tilt angle with respect to each of the multiple recording layers. The tilt angle with respect to each of the multiple recording layers is controlled in accordance with the information about the optimal tilt angle with respect to each of the multiple recording layers.
US08391109B2 Method of manufacturing heat-assisted magnetic recording head with internal mirror
A manufacturing method for a heat-assisted magnetic recording head includes the step of forming an internal mirror that includes a reflecting film support body and a reflecting film. The reflecting film support body includes first and second inclined surfaces. The reflecting film includes first and second portions that are located on the first and second inclined surfaces, respectively. The step of forming the internal mirror includes the step of forming the reflecting film support body and the step of forming the reflecting film. The step of forming the reflecting film support body forms an initial support body, and performs two taper-etching processes on the initial support body so that the initial support body is provided with the first and second inclined surfaces.
US08391107B2 Slider for heat assisted magnetic recording including a photo detector for monitoring laser power
An apparatus includes a slider including an air bearing surface and a waveguide configured to receive light from a light source, a sensor positioned to receive a portion of light emitted by the light source prior to the light exiting the slider at the air bearing surface, and a controller controlling the light source power in response to a characteristic of the sensor.
US08391101B2 Marine seismic acquisition with controlled streamer flaring
Marine seismic data is acquired with a system of steerable seismic streamers that are intentionally maintained in a flared configuration while the streamers are towed through a body of water.
US08391099B2 Integrated circuit memory device, system and method having interleaved row and column control
An integrated circuit memory device, system and method embodiments decode interleaved row and column request packets transferred on an interconnect at a first clock frequency. Separate row decode logic and column decode logic, clocked at a relatively slower second clock frequency, output independent column and row control internal signals to a memory core in response to memory commands in the request packets. An integrated circuit memory device includes an interface having separate row and column decode logic circuits for providing independent sets of row and control signals. A row decode logic circuit includes a first row decode logic circuit that provides a first row control signal, such as a row address, and a second row decode logic circuit that provides a second row control signal. A column decode logic circuit includes a first column decode logic circuit that provides a first column control signal, such as a column address and a second column logic circuit that provides a second column control signal.
US08391098B2 Data input/output circuit and method of semiconductor memory apparatus
A first timing control unit controls an active timing of a first control signal to output a first driving control signal. A first data input/output unit transmits write data from a data input/output buffer to a global input/output line or transmits read data from the global input/output line to the data input/output buffer, in response to the first driving control signal. A second timing control unit controls an active timing of a second control signal to output a second driving control signal. A second data input/output unit transmits the write data from the global input/output line to a local input/output line or transmits the read data from the local input/output line to the global input/output line, in response to the second driving control signal.
US08391095B2 Method controlling deep power down mode in multi-port semiconductor memory
Disclosed is a method of controlling a deep power down mode in a multi-port semiconductor memory having a plurality of ports connected to a plurality of processors. Control of the deep power down mode in the multi-port semiconductor memory is performed such that activation/deactivation of the deep power down mode are determined in accordance with signals applied through various ports in the plurality of ports.
US08391094B2 Memory circuits, systems, and operating methods thereof
A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a bit line. The memory circuit includes a means for providing a bit line reference voltage VBLref to the bit line, wherein a VBLref/VDD ratio of the bit line reference voltage VBLref to a power voltage VDD is adjustable corresponding to a change of the power voltage VDD.
US08391092B2 Circuit and method for eliminating bit line leakage current in random access memory devices
A method for eliminating bit line leakage current of a memory cell in random access memory devices comprises the steps of: periodically activating a pre-charge equalization circuit, which provides a pre-charge voltage to a pair of complementary bit lines of a memory cell, if the memory cell is in a self-refresh mode or a standby mode; and temporarily activating the pre-charge equalization circuit after the memory cell is refreshed if the memory cell is in the self-refresh mode or the standby mode.
US08391090B2 Semiconductor memory device and read wait time adjustment method thereof, memory system, and semiconductor device
A controller includes a set of first terminals to be coupled to a device that is under control of the controller, and a control circuit configured to generate and output onto the set of first terminals synchronous mode information including a selected one of selection and non-selection modes, the selection mode causing the device to return to the controller a first data signal while activating a first data strobe signal that is synchronous in phase with a system clock, the non-selection mode causing the device to return to the controller a second data signal while activating a second data strobe signal that is asynchronous in phase with the system clock signal, and edge specifying information including a selected one of first and second states, the first state causing the device to activate the first data strobe signal at a first timing.
US08391082B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device comprises a cell array including plural MATs (unit cell arrays) arranged in matrix, each MAT containing a plurality of first lines, a plurality of second lines intersecting the plurality of first lines, and a plurality of memory cells connected at intersections of the first and second lines between both lines, each memory cell containing an electrically erasable programmable variable resistive element of which resistance is stored in a non-volatile manner as data; and a plurality of write/erase circuits connected to the MATs and operative to execute data write or erase to the memory cells inside the MATs in accordance with input data. A part of the plurality of write/erase circuits writes data to memory cells inside a corresponding MAT while another part of the plurality of write/erase circuits erases data from memory cells inside a corresponding MAT at the same time.
US08391080B2 Erase voltage reduction in a non-volatile memory device
In erasing a memory block of memory cells, a semiconductor tub that contains a memory block to be erased can be biased with a high, positive voltage. The control gates of the memory cells that make up the memory block can be biased with a negative voltage. An erase verification can then be performed to determine if the memory block has been successfully erased. If the memory block has not been erased, the erase operation of biasing the tub with the positive voltage and the control gates with the negative voltage can be repeated until the erase verification is successful.
US08391078B2 Method and apparatus of operating a non-volatile DRAM
A non-volatile DRAM cell includes a pass-gate transistor and a cell capacitor. A read operation of the non-volatile cell begins by positively charging the cell capacitor. A cell capacitor of an associated dummy non-volatile DRAM cell is fully charged. The pass-gate transistor is activated and if the pass-gate transistor is erased it does not turn on and if it is programmed, it turns on. Charge is shared on the complementary pair of pre-charged bit lines connected to the non-volatile DRAM cell and its associated Dummy non-volatile DRAM cell. A sense amplifier detects the difference in the data state stored in the pass-gate transistor. The program and erase of the non-volatile DRAM cell is accomplished Gate-induced drain-lowering (GIDL) assisted band-to-band tunneling and Fowler-Nordheim tunneling respectively. Programming or erasing a selected row of cells does not affect the data states of the cells in the unselected rows.
US08391071B2 Readout circuit and semiconductor storage device
A readout circuit has a sense amplifier to compare a cell current which changes according to whether a memory cell is on or off to a reference current to output a comparison signal of a first logic value upon detecting that the cell current is smaller than the reference current, and to output a comparison signal of a second logic value upon detecting that the cell current is greater than the reference current, the readout circuit outputting a data output signal depending upon an output of the sense amplifier. The reference current is set to be greater than a middle value between a first cell current, which flows when the memory cell is in an off-state, and a second cell current, which flows when the memory cell is in an on-state, the reference current is greater than the first cell current and is smaller than the second cell current. The sense amplifier outputs the comparison signal of the second logic value unless the sense amplifier detects that the cell current is smaller than the reference current as a result of a comparison made between the cell current and the reference current, wherein the sense amplifier outputs the comparison signal of the second logic value regardless of whether the sense amplifier detects that the cell current is greater than the reference current.
US08391065B2 Semiconductor memory device reducing resistance fluctuation of data transfer line
According to one embodiment, a semiconductor memory device includes first and second memory cell blocks and an interconnect rerouting unit provided therebetween. The first memory cell block includes first interconnects and second interconnects provided in each space between the first interconnects. The second memory cell block includes a plurality of third interconnects provided on lines extending from the first interconnects and a plurality of fourth interconnects provided on lines extending from the second interconnects. A width and a thickness of the second and fourth interconnects are smaller than a width and a thickness of the first and second interconnects. Each of the first to fourth interconnects is connected to one end of first to fourth cell units including memory cells. The interconnect rerouting unit connects one of the fourth interconnects to one of the first interconnects and connects one of the third interconnects to the second interconnects.
US08391063B2 Method of operating memory cell
A method of operating a memory cell is provided. The memory cell has first, second, third and fourth storage regions in a charge-storage layer between a substrate and a word line. The first and second storage regions are respectively adjacent to lower and upper portions at one side of the protruding part of the substrate, and the third and fourth storage regions are respectively adjacent to lower and upper portions at the other side of the same. The second and third storage regions are regarded as a top storage region. When the top storage region is programmed, a first positive voltage is applied to the word line, a second positive voltage is applied to a top bit line in a top portion of the protruding part, and a bottom voltage is applied to first and second bottom bit lines in the substrate beside the protruding part respectively.
US08391056B2 Magnetic vortex storage device
A magnetic storage device includes a network of planar magnetic cells in a vortex state, each cell's vortex core having a magnetization with either a first and second equilibrium position in opposite direction and perpendicular to the cellular plane, each of the two positions representing binary information. The device includes conductive lines for writing binary information stored in the cells, including conductive lines for selectively applying, in the vicinity of each cell, a first bias static magnetic field roughly perpendicular to the cellular plane and a linearly polarized radio frequency magnetic field roughly parallel to the device. The described device also includes conductive lines for reading preferably resonantly the polarity using a selective transport measurement between two intersecting electrodes by guiding the current lines through the region around the vortex core by means of a point contact.
US08391052B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a memory cell array, the memory cell array including a plurality of first lines, a plurality of second lines configured to intersect the first lines, and a plurality of electrically rewritable memory cells disposed at each of intersections of the first lines and the second lines, each of the memory cells being configured from a variable resistor operative to store a resistance value of the variable resistor as data in a nonvolatile manner. A voltage supply circuit applies a certain voltage to the memory cells via the first lines and the second lines during writing data to the memory cells or forming of the memory cells. A detection circuit detects a change of the resistance value of the variable resistor in the memory cell during application of the certain voltage to the memory cells and outputs the detected change of the resistance value of the variable resistor as detection information. An output circuit outputs to external at least a portion of the detection information outputted from the detection circuit.
US08391044B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a first active area in a semiconductor substrate, memory cells on the semiconductor substrate, first bit lines, first line, a second line, a third line, and a fourth line. The first line extends in a direction that intersects with the first bit lines and transmits a control potential applied to unselected ones of second bit lines connected to the memory cells. The second line is electrically connected to the first line and extends along the first bit lines. The third line is electrically connected to the second line and extends in a direction that intersects with the first bit lines. The fourth line electrically connects both the third line and portions in the active area corresponding to nodes to which the control potential is applied.
US08391041B2 Magnetic memory device
The present invention provides a magnetic memory device capable of providing high-speed access without increasing an array area. Gate word lines are respectively linearly disposed between source impurity regions and drain impurity regions within a memory cell array area. Gate word line protrusions are respectively provided at boundary regions of memory cell forming regions. Contacts relative to the gate word line protrusions are respectively provided at boundary regions of memory cells at adjacent columns. The drain impurity regions are respectively disposed with being shifted from the centers of the memory cell forming regions in such a manner that spaces between the drain impurity regions become large in the regions in which the protrusions are disposed.
US08391040B2 Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device includes a first memory chip, a second memory chip, and a control chip. The first chip includes a first inductor configured to transmit/receive a signal, and a memory cell. The second chip is disposed on the first chip and includes a second inductor configured to transmit/receive a signal, and a memory cell. The control chip includes a control circuit configured to control the first and second chips, and a third inductor configured to transmit/receive a signal to/from the first and second inductors. The outer peripheries of the first and second inductors are included in a closed space produced by extending the outer periphery of the third inductor in a direction perpendicular to a plane that includes the third inductor. The inductance of the third inductor is greater than at least one of the inductances of the first and second inductors.
US08391036B2 Selective enablement of power supply sections for improving efficiency
Systems and methods are disclosed for maximizing the efficiency of a power supply according to the value of a load to be powered. One embodiment provides a power supply system including a first and second stage. The first stage has at least one AC to DC conversion section for converting an AC input to DC at an upper DC voltage value. The second stage has at least one DC to DC regulation section for converting at least a portion of the DC at the upper DC voltage value to DC at a lower DC voltage value and supplying the lower DC voltage value to a DC output. One or both of the first and second stages includes more than one section operating in parallel. A controller selectively enables a selected combination of the AC to DC conversion sections and the DC to DC regulation sections according to an expected or actual value of the load.
US08391035B2 Integrated-type high step-up ratio DC-AC conversion circuit with auxiliary step-up circuit
An integrated-type high step-up ratio DC-AC conversion circuit with an auxiliary step-up circuit applies to converting a low DC voltage of alternative energy into a high AC voltage. The conversion circuit uses an isolated Cuk integration unit and an auxiliary step-up unit to form a multi-phase input and uses parallel charging and cascade discharging to boost the DC voltage in the DC side with a low voltage power switches and low duty cycle and then converts the boosted DC voltage into AC voltage. The auxiliary step-up unit not only shares the entirety of power but also exempts the DC-side circuit from using high voltage power switches, whereby the cost of elements is reduced. Further, the conversion circuit can decrease the switching loss and conduction loss of the DC-side switches and promote the efficiency of the circuit.
US08391034B2 Power supply module with filtering circuit and power supply module assembly
A power supply module includes an AC/DC converter, a voltage transforming circuit, a feedback circuit, and a filtering circuit. The AC/DC converter is used for converting the AC voltage to a primary DC voltage. The voltage transforming circuit is configured for transforming the primary DC voltage to the first DC voltage. The voltage transforming circuit includes a transformer, the transformer includes a primary winding. The feedback circuit is coupled to the primary winding of the transformer and is configured for sampling a current flowing through the primary winding to generate a feedback signal; and the filtering circuit is structured and arranged for filtering any surge voltage transmitted from the feedback circuit to the voltage transforming circuit. Wherein the voltage transforming circuit maintains the first DC voltage at a predetermined value according to the feedback signal. A related power supply module assembly is also provided.
US08391030B2 Switching mode power supplies and associated methods of control
Switching mode power supplies and associated methods of control are disclosed herein. In one embodiment, a method for controlling a switching mode power supply includes determining whether the switching mode power supply is in a burst mode. If the switching mode power supply is in the burst mode, the method includes recording a switching time with and without switching pulses to obtain a current value of an equivalent frequency and generating a peak current limit that decreases as a load becomes lighter based on the equivalent frequency, thereby maintaining the equivalent frequency at the current value above an audible range. If the switching mode power supply is not in the burst mode, the method includes continuing to monitor whether the switching mode power supply is in the burst mode.
US08391023B2 Display apparatus, base chassis, and manufacturing method thereof
A display apparatus is provided. The display apparatus includes a display panel; a base chassis which is disposed on a surface of the display panel, includes a first surface having a convex area and a second surface opposite the first surface and having a concave area corresponding to the convex area of the first surface; a driving circuit which is connected to the display panel to operate the display panel; a connection element which attaches the driving circuit to the convex area of the first surface of the base chassis; and a conductor which is attached to the concave area of the second surface of the base chassis.
US08391022B2 Multi-function mezzanine board alignment and mounting device, with integrated handle
A mezzanine board alignment and mounting device includes a multi-stage pin connected to a main board near a mezzanine board connector disposed on the main board. The multistage pin includes a base adapted to connect to the main board, a point distal to the base adapted to pass through an opening on a mezzanine board, and a support disposed between the base and the point. A diameter of the point widens towards the support. A diameter of the support is wider than a diameter of the opening. When the point is fully inserted through the opening in the mezzanine board, the mezzanine board is aligned properly to connect with the mezzanine board connector on the main board.
US08391021B2 Portable electronic apparatus connector assembly
A portable electronic apparatus comprises a body having a surface with at least one open channel for receiving a connector assembly; an electrical interface on the body and configured to receive power and/or communicate data with an electrical interface of a compatible device; a connector assembly seated in the open channel and comprising at least one rail having a longitudinal member with a recess configured to engage a tooth of a locking arm of the compatible device; and a fastener removably fastening the rail to the body.
US08391020B2 Electro-optical device, electro-optical panel, and electronic apparatus
Disclosed herein is an electro-optical device including: an electro-optical panel including a first terminal portion having a first terminal and a second terminal and a second terminal portion having a third terminal and a fourth terminal, the first and the fourth terminal being electrically connected through a first connection wiring, the second and the third terminal being electrically connected through a second connection wiring; a first circuit substrate having a first external terminal connected to the first terminal and a second external terminal connected to the second terminal through a first connection terminal portion respectively; and a second circuit substrate having a third external terminal connected to the third terminal and a fourth external terminal connected to the fourth terminal through a second connection terminal portion respectively.
US08391018B2 Semiconductor die-based packaging interconnect
An electronic system includes a system board and a packaging substrate mounted on the system board. One or more semiconductor dies are mounted on the packaging substrate and coupled to the system board. The system also includes one or more semiconductor die-based packaging interconnects between the system board and the packaging substrate. The semiconductor die-based packaging interconnect has a first face coupled to the system board and a second face coupled to the packaging substrate. Through silicon vias located in the semiconductor die-based packaging interconnect enable communication between the system board and the one or more semiconductor dies. The semiconductor die-based packaging interconnects may include passive devices, active devices, and/or circuitry. For example, the semiconductor die-based packaging interconnect may provide impedance matching, decoupling capacitance, and/or amplifiers for minimizing insertion loss.
US08391015B2 Capacitor-incorporated printed wiring board and electronic component
A printed wiring board includes an insulating layer and a capacitor including a ceramic high dielectric layer being interposed between a first and a second electrode, and a semiconductor device mounting pad, including a first and a second pad, formed on an outermost resin insulating layer of the resin insulating layers. An underfill which covers an area larger than that of the high dielectric layer is formed, when the underfill covered area is projected along a lamination direction of the resin insulating layers to a face on which the high dielectric layer is formed. The capacitor is located immediately beneath the underfill covered area.
US08391012B2 Integrated handle and stacking system
An integrated handle and stacking system for an inverter generator is provided. Each of a plurality of inverter generators may have a handle disposed at a top side of the inverter generator. Additionally, a mount may be disposed at a bottom side of the inverter generator. The handles may have recesses sized and configured to receive the mounts of an upper inverter generator so that the plurality of inverter generators may be stacked upon each other. Accordingly, the handles provide a convenient means for carrying or transporting the inverter generator from point A to point B and the recesses/mounts provide a convenient means of stacking the plurality of inverter generators. The handles and/or mounts may have dampening material to isolate vibration between stacked inverter generators.
US08391011B2 Cooling device
A cooling device includes a heat sink having a top plate, a bottom plate spaced from the top plate and fins between the top and bottom plates, a first metal member laminated to the side of the top plate that is opposite from the fins, and a first insulator laminated to the first metal member. The top plate, the bottom plate and the first metal member are each made of a clad metal that is composed of a base metal and a brazing metal, so that the fins are brazed to the top and bottom plates, the first metal member is brazed to the top plate, and the first insulator is brazed to the first metal member.
US08391010B2 Internal frame optimized for stiffness and heat transfer
A thin portable electronic device with a display is described. The components of the electronic device can be arranged in stacked layers within an external housing where each of the stacked layers is located at a different height relative to the thickness of the device. One of the stacked layers can be internal metal frame. The internal metal frame can be configured to act as a heat spreader for heat generating components located in layers adjacent to the internal frame. Further, the internal metal frame can be configured to add to the overall structural stiffness of the device. In addition, the internal metal frame can be configured to provide attachment points for device components, such as the display, so that the device components can be coupled to the external housing via the internal metal frame.
US08391009B2 Heat dissipating assembly
A heat dissipating assembly includes a circuit board having opposite first and second faces. The circuit board further includes a through-hole extending from the first face through the second face. A heat generating element is mounted on the first face of the circuit board and electrically coupled to the circuit board. The heat generating element includes a heat conducting portion aligned with the through-hole. A heat dissipating unit includes a base having an engaging face in contact with the second face of the circuit board. A heat conducting adhesive is filled in the through-hole. The heat conducting adhesive is engaged with the engaging face of the base and the heat conducting portion of the heat generating element. The heat generating element is directly engaged with the heat dissipating unit by the heat conducting adhesive to effectively enhance the overall heat dissipating efficiency while reducing the number of members to lower the manufacturing costs.
US08390996B2 Display device
A display device is disclosed. A display device includes a body displaying an image, and a pair of supporting shafts rotatably secured to the body, being tilted to a predetermined angle and a base member supporting the supporting shaft. The present invention relates to a display device having a tilting or height adjustment function of adjusting a viewing angle, with a simple structure and an economized production cost thereof.
US08390991B2 Stacked solid-state electrolytic capacitor with multi-directional product lead frame structure
A stacked solid state solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. The substrate unit includes a positive guiding substrate and a negative guiding substrate. The positive guiding substrate has a positive exposed end integrally extended therefrom along a first predetermined direction. The negative guiding substrate has a first negative exposed end integrally extended therefrom along a second predetermined direction, a second negative exposed end integrally extended therefrom along a third predetermined direction, and a third negative exposed end integrally extended therefrom along a fourth predetermined direction. The first, the second, the third and the fourth predetermined directions are different. The capacitor units are stacked on top of one another and disposed on the negative guiding substrate. The package unit encloses the capacitor units, one part of the positive and one part of the negative guiding substrate.
US08390989B2 Solid electrolytic capacitor, method for producing same, and solution for solid electrolytic capacitor
A solid electrolytic capacitor that is able to maintain a high capacitance and low ESR, and also exhibits a high degree of heat resistance. The solid electrolytic capacitor 10 comprises at least an anode body 11 composed of a porous material, a dielectric layer 12 formed on the surface of the anode body 11, and a cathode body 13b, wherein the solid electrolytic capacitor has a solid electrolyte layer 13a formed in contact with the dielectric layer 12, the solid electrolyte layer 13a comprises at least a hydroxy compound having three or more hydroxyl groups, and the hydroxy compound has a melting point of not less than 170° C.
US08390984B2 Capacitor substrate structure
The disclosed is a capacitor substrate structure to reduce the high leakage current and low insulation resistance issue of organic/inorganic hybrid materials with ultra-high dielectric constant. The insulation layer, disposed between two conductive layers, includes multi-layered dielectric layers. At least one of the dielectric layers has high dielectric constant, including high dielectric constant ceramic powder and conductive powder evenly dispersed in organic resin. The other dielectric layers can be organic resin, or further include high dielectric constant ceramic powder dispersed in the organic resin. The substrate has an insulation resistance of about 50KΩ and leakage current of below 100 μAmp under operational voltage.
US08390978B1 Incapacitation device and method with asynchronous T-wave avoidance
An electric incapacitation device varies both the energy of output pulses and the time intervals between them, where all of the time intervals are longer than about 55 msec. The timing choices keep the output pulses from repeatedly coinciding with the T-wave portion of a targeted person's cardiac waveform. This reduces the risk of inducing fibrillation.
US08390977B2 Solar power inverters, including solar power inverters having surge protective devices, and associated methods
In one embodiment, a solar power inverter includes at least one component associated with conversion of direct current (DC) from one or more photovoltaic cells to alternating current (AC). The component is electrically coupleable to an electrical conductor configured to carry electrical current. The solar power inverter also includes a first surge protective device (SPD) electrically coupled to the component and electrically coupleable to the electrical conductor. The solar power inverter also includes a second SPD electrically coupled in parallel with the first SPD and electrically coupleable to the electrical conductor. As described in more detail herein, the first SPD is configured to actuate in response to a voltage surge on the electrical conductor before the second SPD.
US08390972B2 Secondary protection approach for power switching applications
An apparatus and method for providing a primary and a secondary protection to a load in a power switching application uses an electronic circuit breaker to selectively permit a flow of current from an input to a load. The circuit breaker comprises a plurality of first switches coupled in parallel, and a plurality of fuses coupled to the plurality of first switches. In a disclosed embodiment, each first switch is coupled to a first fuse and to a second fuse. A controller opens and closes the plurality of first switches by commanding a driver current ON and OFF. The controller is operable to detect a fault condition and to open the plurality of first switches in response to the fault condition by commanding the driver current OFF. If the controller fails to open one of the first switches, one of the fuses coupled to the switch is operable to blow. In addition, the circuit breaker also comprises a charge pump that provides an electric current to a second plurality of switches to prevent the second plurality of switches form shorting the driver current.
US08390965B2 Over-current protection device for multiple high-voltage motive devices and method thereof
An over-current protection device for multiple high-voltage motive devices is provided. The over-current protection device includes a comparison module and a logic operation module. The comparison module receives a plurality of voltages generated from a plurality of operating currents of a plurality of high-voltage motive devices and respectively compares the voltages with at least one reference voltage to generate a plurality of comparison results, wherein the high-voltage motive devices are solenoids, electronic clutches, or a combination of solenoids and electronic clutches. The logic operation module receives the comparison results and generates at least one control signal for a plurality of high-voltage motive device driving circuits according to the comparison results. The high-voltage motive device driving circuits respectively drive the high-voltage motive devices according to the control signal.
US08390962B2 Lapping method and station to achieve tight dimension controls for both read and write elements of magnetic recording heads and magnetic storage device formed thereby
A station for performing a lapping method to achieve tight dimension controls for both read and write elements of magnetic recording heads is disclosed. A recording head having a read head stripe height and a write head throat height is lapped using a plurality of lapping forces. At least one of the plurality of lapping forces includes a torque force. A lapping wedge angle is controlled using at least one torque force, which controls the offset between the recording head read head stripe height and the write head throat height.
US08390957B2 Head suspension and method of manufacturing head suspension
A head suspension 11 includes a load beam 17 having a base plate 13, a hinge part 15 resiliently supported by the base plate, and a rigid part 14 joined with the hinge part, a reinforcing plate 25 joined with the rigid part at a portion proximal to the hinge part, and a bend 17c on the load beam formed by bending the load beam toward the reinforcing plate along an edge 25a of the reinforcing plate. Only by accurately joining the reinforcing plate with the load beam in a sway direction (a widthwise direction of the head suspension), the load beam is easily and properly bent without torsion to form the bend 17c along the edge of the reinforcing plate that defines a bending strength boundary.
US08390955B1 Thin-film magnetic head, method of manufacturing the same, head gimbal assembly, and hard disk drive
A thin-film magnetic head is constructed such that a main magnetic pole layer, a write shield layer, a gap layer, and a thin-film coil are laminated on a substrate. The thin-film magnetic head has a leading shield part opposing the main magnetic pole layer on the substrate side of the main magnetic pole layer. The thin-film magnetic head has a substrate side coil layer disposed between the main magnetic pole layer and the substrate. In the thin-film magnetic head, a space between a lower end face of the leading shield part and the substrate and a space between an upper end face in the substrate side coil layer and the substrate are formed equal to each other.
US08390954B2 Magnetic reproducing element using anomalous hall effect and magnetic head using the same
According to one embodiment, magnetic reproducing element for detecting a magnetic field from a magnetic recording medium comprises a sensor film including a perpendicular magnetization film having a magnetization easy axis in a direction perpendicular to a film plane, wherein magnetization in the sensor film tilts upward or downward in an element height direction from the magnetization easy axis while no magnetic field is applied from the magnetic recording medium, and change in anomalous Hall voltage generated in the sensor film is detected, thereby allowing the magnetic field applied from the magnetic recording medium to be detected. Other magnetic reproducing elements and magnetic heads employing magnetic reproducing elements are described as well.
US08390946B2 Electromagnetic lens driving device
An electromagnetic lens driving device includes a casing, a lens module, a positioning structure, and an electromagnetic driving module. The lens module is provided in a receiving space defined in the casing. The positioning structure, which is connected between the lens module and the casing, is configured to limit the lens module within the receiving space and generate a frictional force. The electromagnetic driving module is provided in the receiving space and corresponds in position to the lens module. When supplied with electricity, the electromagnetic driving module generates a magnetic force that drives the lens module to move along a central axis. Once the electricity is cut off, the lens module is fixed in position and prevented from moving freely by the frictional force of the positioning structure; hence, the electromagnetic lens driving features economical use of electricity.
US08390943B2 Optical system, and imaging apparatus incorporating the same
An imaging optical system has, in order from an object side to an image side, a first lens group, an aperture stop, a second lens group and a third lens group. A first lens, in said third lens group, is movable along an optical axis thereby implementing focusing from a focusing-on-infinity state to a focusing-on-a-near-distance state, with satisfaction of: |f(2+3)g/f1g|<1  (1) −6.0<(R3gr+R3gf)/(R3gr−R3gf)<3.5  (2) where f(2+3)g is the combined focal length of the second lens group and the third lens group upon focusing on infinity; f1g is the focal length of the first lens group; R3gr is the axial radius of curvature of the surface of the most image side of a negative lens component of the third lens group; and R3gf is the axial radius of curvature of the surface of the most object side of said lens component of the third lens group.
US08390942B2 Optical lens module
An optical lens module is provided, including a first lens, a second lens, a third lens, and an aperture stop formed in the first lens by wafer level processing. The first lens, the second lens, and the third lens are sequentially arranged from an object side to an image side along an optical axis of the optical lens module. The first lens has a convex surface and a concave surface, respectively, on an object side and an image side. The second lens has a concave surface and a convex surface, respectively, on the object side and the image side. The third lens has a convex peripheral portion on the image side, wherein the convex peripheral portion forms a surface with a concave center on the image side, and the surface has an inflection point.
US08390937B2 Zoom lens, imaging apparatus and method for manufacturing zoom lens
A zoom lens comprising, in order from an object side: a first lens group G1 having positive refractive power; a second lens group G2 having negative refractive power; and a third lens group G3 having positive refractive power; each distance between said lens groups adjacent to each other changing upon zooming from a wide-angle end state to a telephoto end state, said first lens group G1 having a cemented lens including a negative lens L11, and said third lens group G3 having a cemented lens L32 and L33, and a given conditional expression being satisfied, thereby providing a downsized zoom lens having high optical performance.
US08390930B2 Optical element and manufacture method thereof
An optical element and image capture lens structure. The optical element includes a substrate and an optical component with at least one effective area and non-effective area, formed on the substrate, wherein the non-effective area has a rough surface. The image capture lens structure includes a substrate, an optical component formed on the substrate, and a spacer with a micro structure, attached to the substrate by an adhesive, wherein the micro structure is located between the adhesive and the optical component to prevent the overflow of the adhesive.
US08390923B2 Optical amplifier and optical amplification method
There is provided an optical amplifier including a pump light source to generate a pump light being capable of changing a wavelength thereof, a first rare earth doped medium to amplify an input signal light by using the pump light generated by the pump light source, a second rare earth doped medium to amplify the input signal light output from the first rare earth doped medium by using a residual pump light that is a portion of the pump light generated by the pump light source, and a wavelength controller to control a wavelength of the pump light generated by the pump light source, based on an input level of the input signal light.
US08390920B2 Laser device, laser display apparatus, laser radiating apparatus, and nonlinear optical element
A laser device, includes: a fundamental wave generating portion configured to generate a plurality of fundamental waves having wavelengths which are different from each other in at least one set thereof, the fundamental wave generating portion having a semiconductor laser having a plurality of luminous points, and a Bragg reflection structure; and a nonlinear optical element in which a poling structure adapted to pseudophase matching for the wavelengths of the plurality of fundamental waves emitted from the fundamental wave generating portion, respectively, is formed variatively along a propagating direction of the plurality of fundamental waves.
US08390916B2 System and method for false-color sensing and display
A system and method for determining humidity based on determination of an offset voltage shift are disclosed. In one embodiment, a system for determining humidity comprises an electromechanical device comprising a first layer, a second layer, and a dielectric between the two layers, wherein the dielectric is spaced apart from at least one of the first and second layers in an unactuated state of the electromechanical device, and wherein the dielectric contacts both the first and second layers in an actuated state of the electromechanical device, a voltage source configured to apply, between the first and second layers, one or more voltages, and a processor configured to control the voltage source, to determine an offset voltage shift based on the applied voltages, and to determine information regarding humidity about the device based on the offset voltage shift.
US08390915B2 Panel including thermochromic layer and electric conductive layer
A panel including a substrate coated with a thermochromic layer, and a plurality of electric conductive layers formed of an electric conductive material. Here, the infrared ray transmittance of the panel is randomly or desirably adjusted as an electric conductive layer generates heat, and the color tone of the panel may be adjusted as desired by a user.
US08390910B2 Optical delay
A system for varying a delay of an optical beam has a rotatable wheel and a set of one or more prisms mounted about a circumference of the rotatable wheel. The set of one or more prisms are positioned to retroreflect the optical beam that passes approximately tangent to the rotatable wheel to cause a delay or phase shift to the beam as the rotatable wheel rotates.
US08390901B2 Image reading apparatus
An image reading apparatus includes: a document table; a light reception unit; light sources disposed such that positions at which the optical axes of the plurality of light sources cross a reception optical axis of the light reception unit are different from one another; and a read control unit. The image reading apparatus further includes: a light reception amount storage unit configured to store the light reception amount for each of distances; a distance calculation unit configured to calculate a distance between the placement surface and the document based on the light reception amount obtained by the read control operation for each light source by referencing the light reception amount stored in the light reception amount storage unit; and a correction amount determination unit configured to determine a correction amount based on the distance calculated by the distance calculation unit.
US08390897B2 Method and system for controlled production of security documents, especially banknotes
A method and system for controlled production of security documents, especially banknotes, wherein the security documents are subjected to a plurality of successive printing and processing operations on a plurality of processing stations. At least one production order is defined that may be subdivided into a plurality of production loads each being assigned a machine-readable load identifier. Selected processing stations are assigned to process the production order according to the production workflow. Each production load is selectively processed through the processing stations depending on the determined production workflow of the corresponding production order defined for each production load, whereby each production load is first subjected to a load acceptance procedure based on its machine-readable load identifier before being authorized to be processed on a selected processing station among the available processing stations.
US08390896B2 Image reading method, image reading apparatus, and program recording medium
A method for image processing in which an image of a bound document such as a book placed face-down on a document positioning plate is read and processed is provided. The method includes reading the bound document through the document positioning plate, displaying the read image, the read image having at least one of a shadow portion of a bound portion and a shadow portion of an edge portion, inputting information about a direction attribute of a rectangular area of the shadow portion in the displayed image, determining the direction attribute based on the input information, and correcting a density of the rectangular area based on the determined direction attribute.
US08390895B2 Color conversions in the real domain
Methods and systems herein provide for color conversion in the real domain from an input color space to an output color space using a color conversion table that includes color values defined in the output color space corresponding to color values in the input color space, a table of scaling factors, and a conversion engine operable to group the real domain image data into blocks of pixels. The conversion engine, for each block of pixels, converts a color value in the block of pixels from the input color space to the output color space according to the color conversion table, computes differences between the color value and color values of pixels in the block, scales the computed differences according to the table of scaling factors, and adds the scaled differences to the converted color values to convert the pixel color values to the output color space.
US08390893B2 Encoding and screening electronic integral images in printing systems
A method for encoding and screening electronic integral images in a printing system includes receiving an electronic integral image having a plurality of sub-images comprised of image data, wherein at least one sub-image is spaced apart from another sub-image by a background area; adding temporary image data to at least a portion of the background area image data based on image data of one or more surrounding sub-images so as to reduce the spatial variance across at least a portion of the electronic integral image and to make it more compatible to data compression without significant signal or data loss; and subsequently removing the temporary image data added to the electronic integral image so as to reconstruct an accurate representation of the electronic integral image. A system for encoding and screening electronic integral images is also disclosed.
US08390890B2 Halftone image generation method and image processing system and computer program product thereof
A halftone image generation method used in a system including an image input module and a halftoning processing module for generating a halftone image is disclosed. First, an original image is received by the image input module and a dot diffusion process is performed to the original image to generate the halftone image using a first class matrix with a first size and a corresponding first diffused weighting matrix with a first diffused area size, wherein the first class matrix indicates a processing order of the dot diffusion process and the first class matrix with the first size, the first diffused area size and the corresponding first diffused weighting matrix with the first diffused area size are optimized results determined in advance by the halftoning processing module according to class matrixes of different sizes and diffused areas of different sizes.
US08390887B2 Method, apparatus and computer program for adaptive compensation of a MTF
A method and system for adaptively compensating for the printer MTF. The MTF compensation applied locally depends on the local mean: Several compensated High-pass images are computed for different mean values. Then locally, depending on the value of the low-pass band, one compensation high-pass value is selected for the final result.
US08390885B2 Methods and system for improved color characterization
Methods and systems are presented for characterizing a printer, display or other color reproduction device in which parametric and nonparametric forward color transforms are generated to construct a forward color device transform to characterize the mapping of CMYK input data to La*b* data of the device, with the parametric transform adapted to compensate for drifting performance of the color reproduction device.
US08390884B2 Apparatus and method for image processing, and program
An image processing apparatus includes a frequency information extracting unit configured to extract frequency information of an input image, a color information extracting unit configured to extract color information of the input image, a feature amount calculating unit configured to calculate a feature amount of the input image on the basis of the frequency information extracted by the frequency information extracting unit and the color information extracted by the color information extracting unit, and a scene determining unit configured to determine a scene of the input image on the basis of the feature amount calculated by the feature amount calculating unit.
US08390882B2 Systems and methods for estimating the color of coated prints
A method for estimating the color of a coated print includes: measuring the color of an uncoated print with a color measuring device; and estimating the color of the print when coated by a coating process based on the uncoated color measurement using a function that correlates uncoated color measurements and coated color measurements; and adjusting at least one parameter of the printing process based on the coated color estimation. The correlating function may be derived by measuring the color of a plurality of uncoated color patches; measuring the color of the plurality of patches after the patches have been coated by the coating process; and correlating the color of the coated patches with the uncoated patches based on the coated and uncoated color patch measurements.
US08390880B2 Printing apparatus, method and program for automatic image quality adjustment based on combination of correction amounts and display of image and correction information
A printing apparatus having a displaying portion, a display controlling unit, and a print controlling unit.
US08390878B2 Method and system for simulating a fleet of highlight color printers via full-color printer for LCDS users
A method and apparatus for permitting a user to simulate a fleet of highlight color rendering devices utilizing a single full-color rendering device. A list of available colors can be established, defined and edited by a user in association with at least one rendering device among a plurality of rendering devices of a rendering system that renders documents in response to processing of an imaging data stream. One or more rendering queues among a plurality of rendering queues can then be modified to include default color that can be queried and obtained as needed by the rendering system. A particular command can then be added to the imaging data stream, which when identified in a particular rendering job processed by the rendering system, automatically produces rendered output with the default color of the rendering queue to which the job is transmitted.
US08390876B2 Apparatus, method, and computer program product for reading image displayed on electrical paper based on selected size of paper or image
The image reading apparatus, which is capable of communicating with the electrical paper displaying an image based on image data, is configured to select whether the image displayed on the electrical paper is read based on a size of the electrical paper or a size of the image data, when the image is read, and to instruct the electrical paper to change a display content of the image to be displayed on the electrical paper, in accordance with a result of the selection.
US08390870B2 Recording apparatus, control method therefor, program, and computer-readable storage medium for printing on surface
A recording apparatus comprises a writing unit adapted to write data on a recording medium, a selection unit adapted to select data to be written on the recording medium from a storage medium configured to store a plurality of data, and a display control unit adapted to cause a display device to display a display screen concerning printing before the data selected by said selection unit is copied from the storage medium onto the recording medium, wherein said display control unit causes the display unit to display the display screen if there is a restriction on the number of times of copying of the data.
US08390864B2 Print management system for retaining documents with multiple users identifications
A print management system may include at least one client device for generating print jobs, and a plurality of print servers for storing print job information based upon the generated print jobs. The print servers may cooperate to share the print job information therebetween. At least one printing station may retrieve the shared print job information, and selectively print print jobs based thereon.
US08390861B2 Information processing apparatus, method, and recording medium controlling the display of printing options
Setting items in a print setting screen are updated and displayed in response to a changing operation. It is determined whether or not print settings are changed from the initial state. If it is determined that print settings are changed from the initial state, a test print button is displayed. If it is determined that print settings are not changed from the initial state, a full print button is displayed.
US08390858B2 Image forming apparatus
Provided is an image forming apparatus which receives image data from a host device by communication and forms an image based on the received image data on a target, the image forming apparatus including: a communication unit which receives the image data by the communication with the host device; a storage unit which is able to store the received image data; an image forming unit which ejects a fluid, to overlap one partial image forming process with another partial image forming process, in the performing of an image forming process of forming the image on the target by ejecting the fluid from nozzles on a portion of the target and performing a partial image forming process of forming a portion of the image based on the image data stored in the storage unit on the target plural times.
US08390857B2 Image forming apparatus, image forming method, and computer-readable recording medium which performs duplex printing and inserts blank sheet images
An image forming apparatus prints print image data including both a duplex printing instruction and a simplex printing instruction while reducing or eliminating the development of a sheet interval. When it is determined that a print request includes both a duplex printing instruction and a simplex printing instruction, the maximum number N of transfer sheets that can be placed on a transport path is determined, and an order of output of print images is determined based on the maximum interleave number N. A blank sheet image is inserted in accordance with a switch timing from duplex printing to simplex printing.
US08390856B2 Image forming apparatus, communication device, computer readable medium, and communication method
An image forming apparatus includes: a communication unit that receives a request that requests a reply and includes a source of the request and a destination of the request; and a controller that returns from a low electric power condition after moving into the low electric power condition of which the power consumption is low, and that controls the communication unit, wherein when the controller is in the low electric power condition, the communication unit returns the reply to the request received and detects a duplication between an identification information that identifies the source and an identification information that identifies the destination based on the request.
US08390855B2 Apparatus, method and recording medium for obtaining UI pages from server
A display accesses an external server via a browser installed on an image processing apparatus, and displays on itself via the browser, a job instruction screen of the external server, based on screen data of the job instruction screen. When a user specifies a job, a job issuance requester requests the external server to issue the job and accordingly the external server issues the job. And a receiver receives the issued job and a job executor executes the received job. And then, a display controller makes the display to display a screen that matches a result of the receiver's job receipt and/or a job execution status of the job executed by the job executor.
US08390850B2 Toy mailbox
A toy mailbox for children includes a storage unit and a media processing mechanism. The storage unit includes a door member for closeably opening the storage unit and an ejection slot configured on a portion of the storage unit. The media processing mechanism is coupled to the storage unit, such that the media processing mechanism is capable of dispensing a media sheet having data content printed thereon, into the storage unit through the ejection slot. Opening the storage unit enables children to access the media sheet from within the storage unit. The media processing mechanism is also capable of printing the data content on the media sheet prior to dispensing the media sheet into the storage unit.
US08390848B2 Information processing apparatus and secured printing system for preventing a data leakage
An information processing apparatus includes an application that encrypts document data using a public key of a spooler and stores the document data encrypted as a spool file. A printer driver decrypts the encrypted document data using a secret key of the spooler and performs rendering to generate print data. Subsequently, the application decrypts the print data using the public key of the printing apparatus. The printing apparatus decrypts the encrypted print data using the secret key of its own.
US08390842B2 Port monitor apparatus, method, and program for performing printing restriction by monitoring printer driver
A port monitor program to transmit data about a print job generated by a printer driver to an image forming apparatus includes reading the data about the print job that is generated by the printer driver and spooled by a spooler; determining whether an authentication process associated with restriction of printing is to be performed for the readout data about the print job; submitting an authentication request to an external server over a network to acquire functional restriction information used for the restriction of printing from the server if it is determined that the authentication process is to be performed; and determining how the print job is restricted on the basis of the functional restriction information acquired from the server.
US08390834B2 Image processing apparatus
A control section attaches a reprinting data mark to FAX image data received in a “Replace Toner” state and then stores the data. Then, a user is prompted to check whether an image of the FAX image data with the reprinting data mark printed most recently has been outputted appropriately. In case of appropriate output, all the FAX image data pieces with the reprinting data marks stored in a storage section are deleted. In contrast, in case of inappropriate output, the FAX image data is stored intact as reprinting data.
US08390831B2 Image processing apparatus, method for same, image reading system, method of controlling image reading system
A guidance display control unit performing control so that operation guidance is displayed in a preview display area provided to preview-display image data read by an image reading apparatus is provided, where the operation guidance is used to read the image corresponding to the preview display area.
US08390828B2 Image forming apparatus
An image forming apparatus determines if a support function key is pressed down or not. When it is determined that the support function key is pressed down, the image forming apparatus determines if the read document is a one side document or a both-side document. Then the document is read and operable operational conditions are selected based on the read document and the information about an intended use that is inputted by a user. The selected operational conditions are displayed on an operating unit for each operational condition. As a result, it is possible to provide an image forming apparatus wherein the user can set a desired operational condition easily suitable for the user's intended use without omission and fail.
US08390827B2 Drawing processing apparatus, image outputting apparatus, method for drawing processing and computer readable medium
A drawing processing apparatus is provided and includes: a plurality of character definition information memories each storing definition information on a character shape; a registering portion that, when a drawing command containing the definition information on the character shape is received, determines one of the plurality of character definition information memories for each character contained in the drawing command, depending on whether the definition information on the character shape is simple definition information that defines the character shape itself of the character or is a combinational definition information that defines a combination of simple or combinational definition information defining components of the character; and a drawing process instructing portion that instructs to read, from the plurality of character definition information memories, the definition information on the character shape corresponding to the character to be processed, to execute a drawing process of the each character contained in the drawing command.
US08390816B2 Method for attenuated total reflection far ultraviolet spectroscopy and an apparatus for measuring concentrations therewith
In far ultraviolet spectroscopy using attenuated total reflection, total reflection light is measured by using evanescent waves of total reflection light. The penetration depth thereof is equal to or larger than 150 nm in a wavelength range in the far ultraviolet range wherein the penetration depth depends on a wavelength of the far ultraviolet light, refractive index of an object to be measured, refractive index of optical material of the probe and incident angle of the far ultraviolet light at an interface between the probe and the object. The attenuated total reflection probe is made of an optical material selected so as to have the penetration depth equal to or higher than 150 nm in far ultraviolet wavelength range, and the probe makes contact with the object to be measured at the interface, and the far ultraviolet light is incident on the interface at incident angle larger than critical angle in the wavelength range so as to have the penetration depth equal to or higher than 150 nm. The total reflection light from the interface is measured, and absorbance of the object to be measured is determined.
US08390815B2 Surface tension measuring device and method
Low-cost interface property measuring device and method enabling high-precision and simple measurement of an interface property. The interface property measuring device comprises an optical fiber probe (1) having a first end face (2) at least part of which is inclined with respect to a direction perpendicular to a fiber axis, a light supply (24) for supplying light from a second end face on the side opposite to the first end face of the optical fiber probe, a reflected light amount measuring device (24) for measuring the reflected light amount and a moving mechanism (18) for moving at least one of the optical fiber probe and an object (21) to be measured such that the first end face of the optical fiber probe passes through an interface (23) of the object (21) at a constant speed, and the interface property measuring device acquires the interface property of the object to be measured according to the result of measurement of the reflected light amount when the first end face of the optical fiber probe passes through the interface of the object to be measured.
US08390814B2 Interactive variable pathlength device
This disclosure relates generally to a sampling device, and more particularly, a sampling device that facilitates spectroscopic measurements with a variable path length and the necessary software controlled algorithms and methods for such a device.
US08390811B2 48-channel arrayed isosbestic wavelength detection system
A multi-channel arrayed isosbestic wavelength detection system comprises an arrayed light source board, an arrayed photoelectric sensor board, and an intermediate system frame. The arrayed light source board and arrayed photoelectric sensor board are assembled at opposite sides of the intermediate system frame. In addition, the arrayed light source system has a plurality of light-emitting elements, each of which comprises two monochromatic light sources that provide main wavelength and reference wavelength respectively, and the two wavelengths are isosbestic wavelengths. The arrayed photoelectric sensor system has a plurality of photoelectric sensors, which are aligned at fixed positions in one-to-one correspondence with the light-emitting elements.
US08390809B2 Exposure method, exposure apparatus, and method of manufacturing device
An exposure method comprises: a first detection step of detecting a position of a first mark by a first scope; a second detection step of detecting a position of a second mark by a second scope having a magnification higher than the first scope; a first calculation step of calculating a first correction value based on the detection results obtained in the first and second detection steps; a third detection step of detecting a position of a third mark by the second scope after the substrate is aligned based on the first correction value calculated in the first calculation step; a second calculation step of calculating a second correction value based on the detection results obtained in the second and third detection steps; and an exposure step of exposing the substrate after the substrate is aligned based on the second correction value calculated in the second calculation step.
US08390804B2 Surface enhanced Raman spectroscopy employing vibrating nanorods
A surface enhanced Raman spectroscopy (SERS) apparatus, system and method employ a plurality of nanorods configured to vibrate. The apparatus includes the nanorods having tips at free ends opposite an end attached to a substrate. The tips are configured to adsorb an analyte and to vibrate at a vibration frequency. The apparatus further includes a vibration source configured to vibrate the free ends of the nanorods at the vibration frequency in a back-and-forth motion. Vibration of the nanorods is configured to facilitate detection of a Raman scattering signal emitted by the analyte adsorbed on the nanorod tips. The system further includes a synchronous detector configured to receive the Raman signal and to be gated cooperatively with the vibration of the nanorods. The method includes inducing a vibration of the nanorods, illuminating the vibrating tips to produce a Raman signal, and detecting the Raman signal using the detector.
US08390803B2 Calibration device and optical characteristic measuring system using the same
A calibration device 21 according to the present invention is a member used for white calibration of an optical characteristic measuring apparatus 1 for measuring an optical characteristic of a specimen arranged to close a measuring opening and is used together with a spacer 24. Accordingly, such a calibration device 21 can perform more accurate white calibration by preventing formation of an interference pattern by the spacer 24.
US08390795B2 Multiple mirror calibration system
An optical system including a plurality of selectably directable mirrors (38) each arranged to direct a laser beam (41) to a selectable location within a field, a plurality of mirror orientation sensors (45) operative to sense the orientation of the plurality of selectably directable mirrors and to provide mirror orientation outputs and an automatic calibration subsystem (47) for automatically calibrating the plurality of selectably directable mirrors, the automatic calibration subsystem including a target (40) being operative to provide an optically visible indication of impingement of a laser beam thereon; the target being rewritable and having optically visible fiducial markings (54, 56), a target positioner (42) for selectably positioning the target, an optical sensor (44) operative to view the target following impingement of the laser beam thereon and to provide laser beam impingement outputs and a correlator (36) operative to provide a calibration output.
US08390793B2 Optical ranging sensor and electronic equipment
An optical ranging sensor includes a light emitting unit for projecting a light beam on an object to be measured, a light receiving unit on which a light spot of reflected light of the light beam from the object is formed, and a processing circuit unit for processing output signals from the light receiving unit and detecting a distance to the object. The light receiving unit includes an effective light receiving part having light receiving cells arranged in matrix form in a first direction in which a position of the light spot moves as the object moves along a direction of an optical axis of the light emitting unit, and in a second direction orthogonal to the first direction. A size of the effective light receiving part in the second direction is not smaller than a radius of the light spot but not larger than a diameter thereof.
US08390787B2 Lithographic apparatus and device manufacturing method
A lithographic apparatus comprises an illumination system for supplying a beam of radiation, a patterning arrangement incorporating an array of individually controllable elements for imparting a pattern to the beam cross-section, a substrate table for supporting a substrate, and a projection system incorporating a microlens array for projecting the beam onto a target portion of the substrate. An error compensator is provided for supplying error correction values for compensating for the effect of positional errors in the microlens array, and a grey scale modulator is provided for supplying drive signals to controllable elements of the patterning arrangement in dependence on the error correction values in order to compensate for the effect of positional errors in the microlens array by varying the intensity of some parts of the pattern relative to other parts of the pattern.
US08390785B2 Collector optical system
A collector optical system is provided in which radiation is collected from a radiation source and directed to an image focus. The collector optical system includes one or more mirrors, with each mirror being symmetric about an optical axis extending through the radiation source and each mirror having at least first and second reflective surfaces. The first and second reflective surfaces have a common focus, such that radiation from the source undergoes successive grazing incidence reflections at the first and second reflective surface and wherein the common focus is transversely offset by a predetermined distance Δr with respect to the optical axis.
US08390775B2 Liquid crystal display device with protection film at connection of TCP and therminal and fabrication method thereof
A liquid crystal display device includes first and second substrates facing each other; a liquid crystal layer between the first and second substrates; and a seal pattern between the first and second substrates surrounding the liquid crystal layer, wherein the seal pattern is made of one of frit glass and glass paste.
US08390772B2 Liquid crystal display device
A liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer arranged between the first substrate and the second substrate, a plurality of pixels each one of which has a tranmissive display portion for performing a tranmissive display operation and a reflective display portion for performing a reflective display operation, a first electrode provided in the first substrate, a second electrode provided in the first substrate and a third electrode provided in one of the first substrate and the second substrate. The first electrode is arranged both in the tranmissive display portion and in the reflective display portion. The second electrode is arranged in the tranmissive display portion. The first electrode and the second electrode are configured to control an alignment of liquid crystal molecules of the liquid crystal layer. At least one of the first electrode and the second electrode is provided with a plurality of slits formed to extend along a perpendicular axis that is perpendicular to an interface of the tranmissive display portion and the reflective display portion. The third electrode is arranged in the reflective display portion. The second electrode and the third electrode are configured to be provided with voltage independently.
US08390770B2 Liquid crystal display, color filter substrate and manufacturing method thereof
An embodiment of the invention provides a color filter substrate comprising first black matrixes; color resin units; and a protection layer. Each of the color resin units is formed between two adjacent first black matrixes, the protection layer is formed on the first black matrixes and the color resin units, second black matrixes are formed, each corresponding to one first black matrix, on the protection layer for blocking reflected light from the first black matrixes from entering TFT channel regions on an array substrate to be provided to oppose the color filter substrate.
US08390769B2 Liquid crystal display
A liquid crystal display according to an exemplary embodiment of the present invention includes a substrate, a gate line formed on the substrate, a data line intersecting the gate line and including a source electrode, a drain electrode facing the source electrode, a passivation layer formed on the data line and the drain electrode, a color filter formed on the passivation layer, a cover formed on the color filter and having a contact hole exposing the drain electrode, and a pixel electrode formed on the cover and connected to the drain electrode through the contact hole, wherein the cover includes a dummy hole exposing the color filter.
US08390766B2 Light-regulation membrane
A light-regulation membrane easy for installation and maintenance is disclosed to include a PDLC film having two conducting layers prepared by high-reflection black and transparent materials made by means of depositing titanium oxide on a base layer of polyethylene terephthalate by means of spattering deposition and electrically connected to an external power source and a liquid crystal layer sandwiched between the conducting layers, a surface structure consisting of a hard coating layer and an anti-stain layer on one side of the PDLC film, and an adhesion layer formed the opposite side of PDLC film and releasably adhered to a transparent object. So, the transparency of the light-regulation membrane can be regulated from opaque to clear or reversely while the transmittance of the PDLC film being adjusted by the power, and then any light source passing through the light-regulation membrane can be controlled.
US08390765B2 Liquid crystal display apparatus
A wavelength selection substrate 23 is configured with a wavelength selection section 23R which transmits only red laser light and reflects other light components, a wavelength selection section 23G which transmits only a green laser light and reflects other light components, and a wavelength selection section 23B which transmits only a blue laser light and reflects other light components. Of laser light 12 outputted from a light guide plate 14, a laser light component that corresponds to a color passing through one of the wavelength selection sections passes through the wavelength selection substrate 23 and enters a liquid crystal panel 22, whereas a laser light component that does not correspond to the color is reflected from the wavelength selection substrate 23 and returns the light guide plate 14. The laser light having returned the light guide plate 14 is reflected from the reflection plate 21 and again enters the wavelength selection substrate 23. This reciprocation of the laser light is repeated until the laser light pass through the wavelength selection section. With this repetition of passing and reflection, the laser light 12 is separated into respective colors of red, green, and blue, and outputted from the wavelength selection substrate 23.
US08390762B2 Back light unit and liquid crystal display device and game machine including the same
A game machine including: a liquid crystal display including a liquid crystal panel and a back light unit; and at least one reel which is disposed behind the back light unit. The back light unit for a liquid crystal display includes: a pair of light guide plates which are disposed to face each other, transparent electrodes being formed on corresponding predetermined areas of surfaces facing each other of the light guide plates; a polymer dispersed liquid crystal layer which is formed in a space between the light guide plates and is formed by polymer dispersed liquid crystal; and a plurality of light sources respectively disposed at edges of the light guide plates.
US08390759B2 Electronic device display structures with controlled chassis reflections
A display may be based on a display unit that is mounted within a chassis. The display unit may be a liquid crystal display unit. A backlight may be used to illuminate the display unit. The backlight may include a light guide plate. Light from a light source may be launched into an edge of the light guide plate. Scattered light from the light guide plate may travel vertically along a vertical axis that is perpendicular to the plane that contains the light guide plate. The scattered light may pass through the display unit and may serve as backlight for the display. The light guide plate may be mounted within a rectangular opening in the chassis. The edges of the rectangular opening and the edges of the light guide plate may be configured to reduce excessive reflections. These edges may have reflection-reducing coatings, non-planar surfaces, and other reflection-reducing configurations.
US08390757B2 Backlight unit and liquid crystal display device having the same
A backlight unit with a new configuration is disclosed. The backlight unit includes: a main support formed using a mold which opens upward; a light source unit disposed on one side of the main support; a light guide plate disposed parallel to the light source unit and configured to convert dot light emitted from the light source unit into two-dimensional light; and optical sheets disposed on the light guide plate. The main support is provided with a light incident space, which allows light emitted from the light source unit to be entirely and evenly entered to the light guide plate, on its one side opposite to the light source unit.
US08390756B2 Backlight unit, method for assembling the same and liquid crystal display device using the backlight unit
A back light unit includes a light guide plate having a rectangle shape with first and second edges and a light source having a light element to emit light to a first edge of the light guide plate. The light guide plate emits the incident light from the light source to a liquid crystal display panel as a flat light source. An elastic frame is integrally formed with first and second frame elements in a rectangle shape so as to surround the light guide plate. The light source includes a metal frame clipped by a clip shape implemented provided in the first frame element. The first edge facing the second edge of the light guide plate is fitted to the metal frame. The second edge of the light guide plate is fitted to a second frame element having a clip portion for clipping the light guide plate.
US08390755B2 Liquid crystal display device
A liquid crystal display (LCD) device comprises: an LC panel; a light source for supplying light to the LC panel; an optical sheet for converting light from the light source and supplying the converted light to the LC panel; an optical sheet supporting unit including a bar-shaped body portion, a supporting portion upwardly protruding from the body portion and supporting the optical sheet, a first fixing portion downwardly protruding from the body portion, formed in a single bending process, and having a first stopper at the end thereof, and a second stopper downwardly protruding from the body portion; and a lower cover having a first coupling hole to couple a part of the first fixing portion and the second stopper, and having a second coupling hole to couple the first stopper of the first fixing portion, for accommodating the light source and the optical sheet supporting unit therein.
US08390751B2 Display device and method of manufacturing the same
A display device and a method of manufacturing the same are disclosed. In one embodiment, the display device includes: i) a first insulating layer formed on a first substrate, ii) a lower electrode formed on the first insulating layer, iii) a dielectric layer formed to surround the top and side of the lower electrode, wherein the dielectric layer does not cover a pixel region of the display device and iv) an upper electrode formed on the dielectric layer.
US08390749B2 Light modulator for optical image projection
A spatial light modulator 100 comprising an array-type liquid crystal panel 115, a polarization beam splitter 120, an oblique wave plate 130 and a converging lens 135. The polarization beam splitter is orientated to direct a source light 125 towards a reflective planar surface 127 of the array-type liquid crystal panel. The oblique wave plate and converging lens are located between the polarization beam splitter and the array-type liquid crystal panel. The converging lens is configured to direct light from the reflective planar surface onto a facing surface 125 of the polarization beam splitter.
US08390745B2 Channel filter, in particular for a digital television receiver
The channel filter includes at a least one basic bandpass filter centred on the frequency of the channel, in series with two cascade-connected reflective filters whose bandwidths are located either side of the basic bandpass filter encompassing the channels adjacent to the channel. A reflective filter can include a 90° directional coupler combined with a bandpass filter designed to ensure transfer matched to the load impedance of the coupler with the input of the bandpass filter connected to a directional coupler output port, the input of the directive filter being formed by input port of the coupler and the output of the directive filter being formed by a port recovering the bandpass filter reflection coefficient. The invention applies in particular to the implementation of the DVB-T and DVB-H standards aimed at receiving digital television programs from fixed or mobile multistandard terminals such as mobile telephones, PDAs or other multimedia receivers.
US08390744B2 System and method of displaying a video stream
The present disclosure is generally directed to a video stream processing system and to a method of displaying a video stream. In a particular embodiment, the method includes, during a first time period, displaying a first version of a received video stream while recovering a second version of the received video stream, the first version of the received video stream having a lower video display quality than the second version of the received video stream. The first time period begins no more than approximately 100 milliseconds after a detected channel change. The method also includes switching from display of the first version of the received video stream to display of the second version of the received video stream during a second time period.
US08390742B2 Semiconductor integrated circuit and video signal output circuit
In a semiconductor integrated circuit arranged to perform sag compensation for a video signal, an operational amplifier includes a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal. A first resistor includes a first end connected to the inverted input terminal and a second end being grounded. The output terminal is connected to a first external terminal and the inverted input terminal is connected to a second external terminal. A second resistor includes a first end connected to the output terminal and a second end connected to the inverted input terminal. A first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value determined based on a capacitance value of the first capacitor.
US08390736B2 Shooting parameter adjustment method for face detection and image capturing device for face detection
A shooting parameter adjustment method for face detection includes (A) acquiring an image; (B) dividing the image into a plurality of blocks, and calculating a brightness value of each of the blocks; (C) selecting at least one of the plurality of blocks, and adjusting a shooting parameter according to the brightness value of the selected block; and (D) acquiring another image according to the shooting parameter, and performing a face detection procedure with the another image. The shooting parameter adjustment method can automatically adjust a shooting parameter of an image capturing device according to brightness of different blocks in an image. Therefore, by using this method, the brightness of a face, no matter being too high or too low, can be adjusted to a value suitable for face detection, so as to improve the accuracy of the face detection procedure.
US08390729B2 Method and apparatus for providing a video image having multiple focal lengths
A method and apparatus for providing a video image having multiple focal lengths includes a multi-focal lens system and a drive mechanism capable of moving the multi-focal lens system through a cyclic path. A plurality of optical images are formed as the multi-focal lens system moves through the cyclic path. An image pickup device is capable of converting each of the plurality of optical images into a corresponding image signal. An image processor is operative to preferably form a composite image signal wherein individual elements of the optical images are selected to provide preferred focus characteristics.
US08390727B2 Optical unit, imaging unit, imaging body, and imaging device having the imaging body
An optical unit (1) includes a first attachment/detachment portion (2) to which an imaging optical system (31) is detachably attached, an optical path division means (3), a finder optical system (6), and a second attachment/detachment portion (4). An imaging unit includes a third attachment/detachment portion (11) disposed at a position corresponding to the second attachment/detachment portion (4) and an imaging element (12, 12′). An imaging body (20, 20′) includes the optical unit (1) and imaging unit (10, 10′) which are detachably attached to each other through the second and third attachment/detachment portions (4) and (11).
US08390724B2 Image capturing device and network camera system
An image capturing device includes an image capturing element that performs photoelectric conversion of light from an object and outputs a pixel signal, a lens unit that forms images on the image capturing element based on light from the object, and an optical shift mechanism that displaces optical images formed on a light-receiving surface of the image capturing element relative to the image capturing element. The optical shift mechanism has an optical member provided with a parallel plate that is inclined at a predetermined angle with respect to the optical axis of the lens unit and rotated around the optical axis. The optical member is provided in a fluid having a higher refractive index than a refractive index of air.
US08390721B2 Portable electronic device and camera module therefor
The present invention provides a camera module for a portable electronic device. A beam splitter has a first light input end for receiving a first light beam, a second light input end for receiving a second light beam and a light output end for outputting the first or second light beams that enter from the first and second light input ends respectively. A reflector is positioned at the upstream of the first light input end of the beam splitter to redirect the first light beam to the first light input end of the beam splitter. An image sensor is positioned at the downstream of the light output end of the beam splitter to convert the first or second light beams outputted from the light output end into a corresponding signal.
US08390720B2 Advanced magnification device and method for low-power sensor systems
A system and method is provided for enabling an advanced optical magnification (zooming) function for low-power sensors, such as a remote wireless camera, using electronic methods and enabling that magnification be performed in any part of the imager. An image sensor has a set of imager pixels that have a defined field of view. A display device is also provided, which has a far lower resolution than the imager. A magnification level is selected, which results in macroblocks being defined for the sensor. A display data value is generated for each macroblock, and the set of display data values is used to drive a data display. The area of magnification is flexibly selected on the imager. As the magnification level is increased, the number of imager pixels in each macroblock decrease, enabling the display to present increasingly higher resolution images. Accordingly, an aesthetically pleasing magnification function is provided for a low-power, battery operated mobile environment.
US08390716B2 Imaging apparatus having a display monitor
An imaging apparatus includes a pedestal portion which is formed further forward than the handle holding portion and configured to store the display monitor with a display surface of the display monitor face thereto, a projected portion formed further forward than the pedestal portion, and a hinge member one part of which is fixed to the display monitor and the other part of which is fixed to the projected portion. The display monitor is drawn from the pedestal portion to an opposite side to the grip portion by rotating the display monitor in a first direction around a first rotating shaft of the hinge member. The display monitor is drawn from the pedestal portion to a side of the grip portion by rotating the display monitor in a second direction which is an opposite direction to the first direction around a first rotating shaft.
US08390715B2 Solid-state imaging device
The present invention provides a solid-state imaging device which is capable of high-speed and high-quality pixel mixture. The solid-state imaging device includes: a plurality of pixels; a row selecting circuit; a plurality of column signal lines each of which is provided to a corresponding one of columns of pixels, is connected to pixels of the corresponding column, and transfers the signals outputted from the connected pixels; a pixel current source which (i) is provided to a corresponding one of the column signal lines, (ii) is connected to the corresponding column signal line, and (iii) supplies to the connected column signal line a current when the signal is outputted from the selected pixel to the connected column signal line; and a control unit which changes the number of rows of pixels being simultaneously selected by the row selecting circuit, and values of the current supplied by the pixel current source.
US08390714B2 Solid-state imaging device and camera system
When making a potential of a floating node 0V at the time of nonselection, electrons leak from the floating node to a photodiode and noise is generated. A MOS type solid-state imaging device comprised of unit pixels 10, each having a photodiode 11, a transfer transistor 12 for transferring a signal of this photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting a signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11, arranged in a matrix, wherein, as a buffer final stage 29 for driving a drain line 23, a buffer final stage having an inverter configuration formed by arranging a P-type MOS transistor on a ground side is used, thereby making the potential of the floating node N11 for example 0.5V at the time of nonselection and preventing electrons from leaking to the photodiode 11 through the transfer transistor 12.
US08390710B2 Image pickup system, method for driving image pickup elements, and recording medium
An image pickup system includes an image pickup element with an image pickup region in which a plurality of pixels are arranged in a matrix, and a controller configured to control reading of signals from the pixels. The controller divides a first frame period in which a first image is read from the image pickup element into a plurality of divided frame periods, including first and second divided frame periods. When the number of pixels included in the first image is larger than the number of pixels included in a second image, a second frame period required for reading all signals from the pixels included in the second image is inserted between the first and second divided frame periods. A refresh cycle of the second image is shorter than a refresh cycle of the first image.
US08390709B2 Camera and method for adjusting photographing time and mode
A closed circuit television (CCTV) camera includes an image pickup unit to receive an image based on an object, convert the image to an electric signal, and output the electric signal, and a controller to adjust a photographing time or a photographing mode of the CCTV camera based on information of the object derived from the electric signal and pre-set condition information.
US08390708B2 Solid state image pickup device and camera utilizing carrier holding unit and floating diffusion region
A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
US08390704B2 Image deblurring using a spatial image prior
A method for determining a deblurred image, the method implemented at least in part by a data processing system and comprising: receiving a sharp image of a scene captured with a short exposure time; receiving a blurred image of the scene captured with a longer exposure time than the sharp image, wherein the blurred image has a higher level of motion blur and a lower level of image noise than the sharp image; determining a blur kernel responsive to the sharp image and the blurred image; determining one or more reference differential images responsive to the sharp image; determining a deblurred image responsive to the blurred image, the blur kernel and the one or more reference differential images; and storing the deblurred image in a processor-accessible memory system.
US08390701B2 Method for processing an image signal for double or multiple exposure cameras
Methods are described for processing an image signal for double or multiple exposure cameras in order to reduce fluorescent artifact effects.
US08390700B2 Imaging apparatus with colorimetric sensor
An imaging apparatus includes: a display unit for displaying color image data acquired by the imaging unit; a colorimetric position acquisition unit for acquiring colorimetric position data corresponding to a colorimetric part selected by a user in the image data displayed on the display unit; a colorimetric position data record unit for recording the colorimetric position data; a light source; a colorimetric unit, provided near the light source, for performing a colorimetric process at a colorimetric instruction from the user, and acquiring colorimetric data as a result of the colorimetric process; a colorimetric data record unit for recording the colorimetric data; and a storage unit for associating the image data displayed on the display unit, the colorimetric position data recorded on the colorimetric position data record unit, and the colorimetric data recorded on the colorimetric data record unit, and storing the data.
US08390698B2 Image capturing apparatus, reproduction apparatus, image capturing method, and reproduction method
Provided is an image capturing apparatus (100) that can improve coding efficiency, and record a still image with a wide dynamic range and smooth moving images. The apparatus includes: an image capturing unit (110) capturing images by exposure for a first exposure time and a second exposure time longer than the first exposure time to generate a short-time exposure image and a long-time exposure image; a short-time exposure image storage unit (120) storing the short-time exposure image; a long-time exposure image storage unit (130) storing the long-time exposure image; a motion blur adding unit (140) generating a predicted image of the long-time exposure image by adding motion blur to the short-time exposure image; a subtracting unit (150) calculating a difference between the long-time exposure image and the predicted image to generate a difference image; and a coding unit (170) coding the short-time exposure image and the difference image.
US08390697B2 Image processing apparatus, image processing method, imaging apparatus, and program
An image processing apparatus includes: a global motion estimation apparatus that performs global Motion Estimation on current and reference images and then outputs a Motion Vector, wherein the global motion estimation apparatus includes a motion estimation processing unit that has a function of executing an LK method two or more times across a whole screen to perform the global motion estimation between the current and reference images; and the motion estimation processing unit obtains a set of motion vectors based on at least information about pixel value variations and information in which a calculation result of an arbitrary calculation expression is added across a whole screen in first motion estimation, and determines whether to perform addition on each pixel according to a set condition when obtaining the at least information, and obtains and outputs a new set of motion vectors as a result of a second LK method when the condition is satisfied in second motion estimation.
US08390693B2 Image processing apparatus
An image processing apparatus includes first and second standard-deviation calculating circuits for calculating deviations σ1 and σ2 indicating a luminance bias of each pixel forming an input image. The deviation σ1 is calculated by referring to an average luminance of first block images forming the input image, and the deviation σ2 is calculated by referring to an average luminance of second block images forming the input image. A first correction-coefficient calculating circuit adjusts a correction coefficient K1 based on the deviation σ1, and a second correction-coefficient calculating circuit adjusts a correction coefficient K2 based on the deviation σ2. A Y correcting circuit corrects the luminance of each pixel forming the input image by referring to the correction coefficients K1 and K2. A CPU determines an input-image-attribute including presence/absence of a face image of a person so as to change adjustment characteristics of the correction coefficients K1 and K2.
US08390690B2 Dynamic range extending method and apparatus using subsampling
A method and apparatus subsampling a plurality of signals from one frame of a pixel array, pixels within the pixel array belonging to one of at least two sets, each set configured to sense values of a same image parameter, includes controlling integration times for first and second signals for each set output from the pixel array, controlling including using a first integration time for the first signal of the set and using a second integration time, different than the first integration time, for the second signal of the set, and calculating a synthesized value for each set using the first and second signals having different integration times.
US08390687B2 Automated compliance testing for video devices
A method of automated video device testing, and source and sink video devices are disclosed. A test signal may be provided by way of a video link from a video source to a video sink, over a video link extending therebetween. The method includes receiving on the video link a request from the video sink to provide the test signal; identifying based on the request, a requested test signal; providing the requested test signal from the video source to the video sink over the video link. In another embodiment, a video sink may be queried over a video link to determine a metric describing at least a portion of know video signal, as received and determined at the video sink to verify integrity of the video signal at the video sink.
US08390686B2 Surveillance camera apparatus and surveillance camera system
A wide-angle camera is fixed to direct an optical axis in a fixed direction. A telephotographic camera can be inclined in panning and tilting directions to change an aiming direction of its optical axis. An image signal from the wide-angle camera is evaluated. When an image of a moving object is identified in a frame captured by the wide-angle camera, directivity information corresponding to a position of the moving object is calculated based on a relative position to the center of the frame. In accordance with the directivity information, posture of the telephotographic camera is controlled to aim its optical axis at the moving object. Thereafter, the posture of the telephotographic camera is controlled continuously to place the image of the moving object in the center of the frame captured by the telephotographic camera. The telephotographic camera captures the moving object while tracking it.
US08390681B1 Computer assisted semen analyzer to analyze digital video clips received from a remote location
A method of analyzing a semen sample having living sperm is provided comprising receiving from a remote location a set of digital video clips of a prepared semen sample having living sperm and analyzing a subset of the digital video clips taken from the prepared semen sample using a Computer Assisted Semen Analyzer adapted to analyze the subset of digital video clips received from a remote location. A method of measuring sperm morphology is also provided comprising receiving from a remote location a digital video clip of a prepared semen sample having stained non-living sperm, and, analyzing portions of the digital video clip taken from the prepared semen sample.
US08390679B2 Capsule endoscope device
A capsule endoscope device includes an illumination unit that illuminates a living tissue using at least one of a white light illumination unit and a special light illumination unit; an imaging unit that captures an image of the tissue; a transmission unit that transmits imaging information containing the image; a storage unit that stores a threshold with respect to information on a distance between the endoscope and the tissue; a detection unit that detects the information; and an output unit that compares the information with the threshold, selects an image capturing condition of a special light observation mode if the distance is not larger than the threshold, selects an image capturing condition of a normal light observation mode if the distance is larger than the threshold, and outputs the selected image capturing condition to an operation unit related to image capturing.
US08390675B1 Stereoscopic camera and system
The present invention provides a stereoscopic camera containing a binocular instrument and an integrated Stereoscopic Image Acquisition Device (SIAD), and improved methods for acquiring stereoscopic image data. The invention also provides master-slave control of adjustable channels in a stereoscopic camera. The camera can be free standing and may contain integrated power supplies, image processing units, storage mechanisms, or display mechanisms. The invention circumvents the need for, and limitations of, binocular eyepieces, and is capable of producing high resolution, real-time image data while avoiding or mitigating the deleterious effects of spurious parallax, IPD, and convergence.
US08390674B2 Method and apparatus for reducing fatigue resulting from viewing three-dimensional image display, and method and apparatus for generating data stream of low visual fatigue three-dimensional image
Provided is a method of reducing fatigue resulting from viewing a three-dimensional (3D) image display. The method includes: obtaining low visual fatigue parameter information on a frame section including at least one frame of a received 3D image; obtaining disparity vector information on each frame of the 3D image; and determining a disparity minimum limit value and a disparity maximum limit value with respect to the 3D image.
US08390670B1 Multiparty communications systems and methods that optimize communications based on mode and available bandwidth
Improved methods, systems, and devices for managing communications are provided. A user device may display all ongoing communications so that a user can visualize the communications network or some subset thereof (e.g., a subgroup or group of users). A system may maintain the user device in an instant ready-on mode of communication with the other user devices. A user may then initiate communications with a subgroup (e.g., a pair) or group without initiating a new connection. Accordingly, a user can simultaneously and fluidly communicate at the subgroup level, at the group level, or at the inter-group level. Moreover, users can function as independent actors that can freely form and leave subgroups as well as groups.
US08390664B2 Hand-held electrical communication device and image processing method thereof
A hand-held electrical communication device including an image sensing unit, a mobile TV receiver, an image signal processing unit, a display unit and a baseband processing unit is provided. The image sensing unit generates an original image frame. The mobile TV receiver receives a compressed video data. The image signal processing unit adjusts the original image frame to be an adjusted image frame or decompresses the compressed video data into a video image frame, and respectively scales the adjusted image frame or the video image frame to be a scaled image frame. The baseband processing unit displays the scaled image frame on the display unit.
US08390663B2 Updating a local view
A method including creating a local view for a local endpoint, where the local view is created from a local topology for the local endpoint, where the local topology is created from a central topology, scanning for a request to change the local view for the local endpoint, and updating the local view for the local endpoint when the request to change the local view will not violate the local topology for the local endpoint and will not violate the central topology.
US08390659B2 Thermal printer and control method thereof
Embodiments described herein are to a printer which includes a first head configured to print a first data set on a first side of a paper being conveyed along a paper path, and a second head configured to print a second data set on a second side of the paper being conveyed along the paper path. The printer further includes a sensor provided at an upstream side of the first and second heads in the paper feeding direction along the paper path and configured to detect an end portion of the paper being conveyed along the paper path. The printer further includes a control unit, when the end portion of the paper is detected by the sensor, configured to allow the first and second heads to continue a printing operation until the first and second data sets are printed on the remaining portion of the paper.
US08390658B2 Printing apparatus and a printing system
A printing apparatus is provided. The printing apparatus includes an image forming unit to form an image on a sheet in a colorant, a first sheet feeder and a second sheet feeder to supply sheets to the image forming unit, a trial printing system, which conducts a trial printing process to print at least a part of images included in a print job on a sheet supplied from the second sheet feeder when the print job designates the first sheet feeder, a first receiving system, which receives an instruction to continue printing after completion of the trial printing process, and a main printing system, which conducts a main printing process to print the images included in the print job on a sheet supplied from the first sheet feeder when the first receiving system receives the instruction to continue printing.
US08390656B2 Image display device and image display method
There is provided an image display device capable of suppressing the occurrence of a color shift while ensuring a sufficient color reproduction range. An in-area maximum luminance obtaining unit (151) divides an input image (31) into a plurality of areas and obtains, for each of RGB colors, a maximum luminance value (34) in each area. A weighting coefficient calculating unit (152) obtains the maximum luminance values (34) for the respective RGB colors for all of the areas, and determines weighting coefficients (35) which are required upon an LED luminance adjustment process, based on an mean value of the maximum luminances values (34) for each color. An LED luminance adjusting unit (153) adjusts the luminances of respective RGB color LEDs in each area to suppress the occurrence of a color shift, based on the maximum luminance values (34) obtained by the in-area maximum luminance obtaining unit (151) and the weighting coefficients (35) determined by the weighting coefficient calculating unit (152).
US08390654B2 Display and method for fabricating the same
A repair step of repairing a pixel resulting in a defective bright spot so as to display the pixel in black is included. In the repair step, a drain portion of a TFT of the pixel resulting in the defective bright spot is shorted to a corresponding gate line, and in the pixel resulting in the defective bright spot, a semiconductor layer portion of the TFT is cut to allow electrical isolation between a corresponding source line and the corresponding gate line.
US08390652B2 Drive control circuit and drive control method for color display device
One object of an embodiment of the present invention is to provide a drive control circuit for a display device which is capable of displaying high-quality color images suited for external environment, display contents or the like by fully utilizing high representational capability of a display panel of multi-primary color configuration. A liquid-crystal color-display device includes a conversion circuit for adjusting a level of primary-color signals which represent the color images to be displayed. The conversion circuit receives four primary-color signals R1, G1, B1, W1 corresponding to four primary colors of red, green, blue and white as data signal for the color image display; then adjusts the level of these primary-color signals R1, G1, B1, W1 based on an externally inputted primary-color control signal; and outputs primary-color signals R2, G2, B2, W2 which are signals obtained by the adjustment. In the primary-color signal level adjustment process for the four primary colors based on the primary-color control signal, the adjustment is performed in such a way that a relationship between the inputted primary-color signal and the adjusted primary-color signal for a white color among the four primary colors is different from a relationship between the inputted primary-color signal and the adjusted primary-color signal for each of red, green and blue colors.
US08390649B2 Electronic device input control system and method
An electronic device comprises an input translation module configured to translate relative motion of the electronic device into input to an application executing on the electronic device, the application causing image content to be displayed on a display screen of the electronic device, and an input control interface configured to indicate at least one component of the relative motion relative to a reference point.
US08390647B2 Image processing system and method
An image processing system and method for comparing and correcting two monochromic images A2 and B2 that extracts a skeleton of objects in the monochromic image A2 to generate a skeleton image A3 and extracts a skeleton of objects in the monochromic image B2 to generate a skeleton image B3. The system and method then covers the skeleton image A3 with the monochromic image B2 to generate a covered image A4, and covers the skeleton image B3 with the monochromic image A2 to generate a covered image B4. The system and method further corrects allowable variances in the covered images A4 and B4, and outputs the covered images whose variances have been corrected.
US08390646B2 Subpixel rendering filters for high brightness subpixel layouts
A display system comprises a display panel substantially comprising a subpixel repeating group tiled across the panel in a regular pattern. The subpixel repeating group comprises at least one white subpixel and a plurality of colored subpixels. The display system further comprises input circuitry configured to receive input image data indicating an image for rendering on the display panel, and subpixel rendering circuitry configured to compute an output luminance value for each subpixel of the display panel. The subpixel rendering circuitry multiplies data values of a spatial portion of the input image data by at least one image filter kernel which comprises a matrix of coefficients arranged such that each coefficient represents a fractional part of one of said data values of the spatial portion of the input image data. The subpixel rendering circuitry is further configured to sharpen the output luminance values using a luminance signal.
US08390644B2 Methods and apparatus for color uniformity
Methods and apparatus for achieving color and luminance uniformity in color output devices. In one embodiment, measurements of luminance and chrominance are taken at various regions of the display surface for a range of color inputs. Using the collected data, a color volume is formed for each of the measured regions. This color volume comprises a set of all colors producible at the measured region. The color volumes for each of the measured regions are then used to generate a common color gamut, i.e., a volume of colors that are producible in each of the measured regions. A gamut mapping can then be performed for all or a portion of the positions on the display surface to a target color gamut. Input data for the gamut mapping process may be determined by conventional interpolative techniques.
US08390639B2 Method and apparatus for rotating an image on a display
A method and apparatus utilizes a three dimensional rendering engine to rotate an image based on user selected or otherwise determined screen orientation. A vertex coordinate transformation is defined for a rotated destination image. The source image is used as a texture for texture mapping during rendering operation to produce rotated image. In one embodiment, a separate set of software instructions is used for each orientation mode. Accordingly, a non-pixel by pixel based 3D rotation may be carried out using a 3D rendering engine to avoid a single parameter based seriatim pixel by pixel based orientation.
US08390636B1 Graphics display coordination
The subject matter of this specification can be embodied in, among other things, a method that includes computer-implemented graphics frame buffer process that establishes on a computing device a graphics frame buffer accessible to be written by an application process and to be read by a graphics server process. The method further comprises generating a token whose value or values control access to the frame buffer by the application process and the graphics server process and reading frames from the frame buffer using the value or values in the token.
US08390635B2 Graphics accelerator
A graphics display system integrated circuit processes analog video input, digital video input, and graphics input. The system incorporates a graphics accelerator that includes memory for graphics data. The accelerator preferably includes a coprocessor for performing vector type operations on a plurality of components of one pixel of the graphics data. The accelerator also includes an expanded instruction set for storing and loading data.
US08390631B2 Synchronizing queued data access between multiple GPU rendering contexts
Synchronized access to a shared surface from multiple rendering contexts is provided. Only one rendering context is allowed to access a shared surface at a given time to read from and write to the surface. Other non-owning rendering contexts are prevented from accessing and rendering to the shared surface while the surface is currently owned by another rendering context. A non-owning rendering context makes an acquire call and waits for the surface to be released. When the currently owning rendering context finishes rendering to the shared surface, it release the surface. The rendering context that made the acquire call then acquires access and renders to the shared surface.
US08390629B2 Methods and apparatus for designing animatronics units from articulated computer generated characters
A method for specifying a design for an animatronics unit includes receiving motion data comprising artistically determined motions, determining a design for construction of at least a portion of the animatronics unit in response to the motion data, and outputting the design for construction of the animatronics unit.
US08390627B2 Text processing device and text processing method thereof
A text processing device and text processing method are provided. The method includes steps: receiving input characters; displaying current input characters with a predetermined magnification ratio; judging whether length of the input characters is more than the predetermined maximum length, if not, receiving input characters, and if yes, adjusting display state on the text processing device according to the predetermined magnification ratio and the predetermined maximum length.
US08390626B2 Radial histograms for depicting path information
Techniques for displaying path-related information. Techniques are provided for generating and displaying one or more graphical representations for a path. In one embodiment, a radial histogram is generated and output for a path.
US08390625B2 Tranforming stored data into data of requested detail level
A system includes a processor and a memory coupled to the processor. The processor receives a request to send a first data for a graphical representation in a first level of detail over a first time. The processor transforms a first stored data into the first data in the first level of detail. The first stored data is stored in a second level of detail over a second time and a third level of detail over a third time. The second level of detail is not identical to the third level of detail, and the second time is not identical to the third time. The first stored data is stored in the memory. The processor sends the first data in the first level of detail.
US08390624B2 Interrelated graphical method for displaying blood pressure data
A graphical method of displaying interrelated blood pressure data that effectively communicates patient or group performance within or between discrete datasets. The graphical method displays Systolic Pressure (SP), Diastolic Pressure (DP), Pulse Pressure (PP), Mean Arterial Pressure (MAP) and the Classification of Blood Pressure as related to a single data point or a plurality of data points from a discrete dataset. Multiple datasets can be simultaneously displayed for comparison purposes allowing patients, physicians or scientists to understand the relative differences in dataset performance across a series of datasets.
US08390622B2 Apparatus and method for depth image-based representation of 3-dimensional object
Provided are a family of node structures, representing 3-dimensional objects using depth image, adoptable into MPEG-4 AFx for polygonal 3D representations. Family formats include DepthImage, PointTexture, and OctreeImage. DepthImage represents an object through union of its reference images and corresponding depth maps. PointTexture represents the object as a set of colored points parameterized by projection onto a 2D grid. OctreeImage converts same data into hierarchical octree-structured voxel model, set of compact reference images, and a tree of voxel-image correspondence indices. DepthImage and OctreeImage have animated versions, where reference images are replaced by videostreams. DIBR formats are convenient for 3D model construction from 3D range-scanning and multiple source video data. MPEG-4 framework allows construction of a variety of representations from the DIBR formats, providing flexible tools for effective 3D models work. DIBR format compression is achieved by application of image (video) compression techniques to depth maps and reference images (videostreams).
US08390621B2 System and method for calculating multi-resolution dynamic ambient occlusion
A system and method for generating a three-dimensional image is provided. An embodiment of the present invention includes calculating the ambient occlusion at a vertex in multiple, independent stages. Determining the global AO at the vertex may be performed using a first technique. Determining the local AO at the vertex may be performed using a second technique. The total AO can be found as a function of the local AO and global AO.
US08390616B1 Markers for identifying projected graphics objects in object streams
Methods and apparatus, including computer program products, for processing graphics objects in a model space with more than two dimensions. Information specifying a first view of the model space is received. The first view is defined by a projection of a first subspace of the model space onto a two-dimensional space. The first subspace includes at least a portion of two or more graphics objects. One or more markers are defined for the first view in the first subspace. Each marker for the first view is associated with at least one graphics object in a processing sequence for the first view. An object stream is generated, which includes projected objects that describe markers and graphics objects in the first view and are arranged in the object stream according to the processing sequence for the first view. Markers for the first view can be defined outside of any other view.
US08390613B2 Display driver integrated circuits, and systems and methods using display driver integrated circuits
Example embodiments include display driver systems having a host with an external image signal receiving unit configured to receive an external image signal and a graphic control unit configured to transmit input control signals. The systems further include a display driver integrated circuit configured to receive the input control signals, generate a screen display sync signal by using a main clock signal when the external image signal includes a moving image, and generate a screen display sync signal by using an internal clock signal when the external image signal includes a still image, the display driver integrated circuit including. Such circuits have a display driver integrated circuit control unit configured to generate a data control signal, a gradation voltage generating unit configured to generate a gradation voltage and transmit the gradation voltage, and a data driver configured to receive the gradation voltage from the gradation voltage generating unit and apply the gradation voltage to data display signal lines of an LCD panel.
US08390611B2 Image display system and gate driver circuit
An image display system includes a gate driving circuit. The gate driving circuit includes several stages of gate drivers each for generating a gate driving signal to drive a row of pixels. Each stage of the gate driver receives a clock signal and a first reset signal. A first stage of the gate driver receives a vertical start pulse as an input signal of the first stage. The remaining stages of the gate drivers respectively receive the gate driving signal generated by a previous stage of the gate driver as the input signal of the remaining stages. Each stage of the gate drivers further receives the gate driving signal generated by a next stage of the gate driver as a second reset signal, and generates the corresponding gate driving signal according to the clock signal, the first reset signal, and the corresponding input signal and second reset signal.
US08390607B2 Liquid crystal display panel, liquid crystal display device, photo detecting device and light intensity adjustment method
The present invention discloses a liquid crystal display panel, liquid crystal display device, photo detecting device and light intensity adjustment method. The liquid crystal display panel comprises a plurality of first scan lines, a plurality of first data lines, a plurality of first thin film transistors, a plurality of liquid crystal pixel units and a built-in photo detecting module. The plurality of first thin film transistors are respectively disposed at intercrosses of the plurality of first scan lines and the plurality of first data lines, and each of the first thin film transistors is connected to the first data line and the first scan line. Each of the first thin film transistors is used to drive a liquid crystal pixel unit. The built-in photo detecting module detects light and outputs a multi-bit digital signal corresponding to the intensity of the light.
US08390606B2 Display device, method for manufacturing same, and active matrix substrate
A display device includes: a plurality of display interconnects (3) provided so as to extend parallel to each other; a drive circuit (44aa) provided at one ends of the display interconnects (3), and connected to the display interconnects (3); a first interconnect (Wa) provided so as to cross the other ends of the display interconnects (3) in an insulating state; and a second interconnect (Wb) provided so as to cross the one ends of the display interconnects (3) in an insulating state, and so as to be connected to the first interconnect (Wa). When any of the display interconnects (3) is disconnected, a display signal from the drive circuit (44aa) is supplied to the other side of the disconnected display interconnect (3) sequentially through the second interconnect (Wb) and the first interconnect (Wa) in this order via an amplifier circuit (A). The second interconnect (Wb) is configured so that the display signal from the drive circuit (44aa) is supplied to the first interconnect (Wa) via a plurality of paths (Pa, Pb) that are different from each other.
US08390604B2 Differential signaling system and flat panel display with the same
A differential signaling system and a flat panel display using the same. The differential signaling system includes a first wiring and a second wiring connected to a sending end and a receiving end as a differential signal line; a termination resistor connected between the first wiring and the second wiring in the receiving end side; and a programmable compensation circuit connected to the termination resistor in parallel. The programmable compensation circuits includes n switches to receive each bit of an input digital control signal; first resistors connected between a source electrode of each of the switches and the first wiring; and second resistors connected between a drain electrode of each of the switches and the second wiring.
US08390600B2 Interactive display system with contact geometry interface
An interactive display system with a contact geometry interface is disclosed. The interactive display system may include a multi-touch display, a touch detection system configured to detect a touch input on the multi-touch display and to generate contact geometry for a contact region of the touch input, and an application programming interface executed on a processor of the interactive display system. The application programming interface may be configured to receive the contact geometry and to send the contact geometry to a requesting application program for application-level processing. Further, the application programming interface may be configured to receive from the application program a display command based on the application level-processing. The application programming interface may be configured to send the display command to the multi-touch display to adjust a display of a graphical element on the multi-touch display.
US08390599B2 Patterned resistive touch panel
A touch panel having a first panel and a second panel, wherein the first panel has a voltage providing area connected to a power source and the second panel has a patterned resistive element facing the voltage providing area so that when a touch event on the touch panel occurs, the first panel is caused to make contact with and provide a voltage to the second panel at one or more contact points on the resistive element. By measuring the voltage on one or both ends of the resistive element, it is possible to determine the two-dimensional coordinates of each contact point. The touch panel can have one or more resistive elements located at different touch areas for sensing one or more touch points in a touch event.
US08390597B2 Capacitive sensor panel having dynamically reconfigurable sensor size and shape
This relates to a capacitive sensor panel that is able to dynamically reconfigure its sensor size and shape for proximity and/or distance to enable hover and gesture detection. Thus, the size and/or shape of the sensors in the panel can differ according to present needs. The sensor panel may dynamically reconfigure its sensor size and shape based on an object's proximity to the panel. The sensor panel may dynamically reconfigure its sensor size and shape based on a gesture detected by the panel. The sensor panel may dynamically reconfigure its sensor size and shape based on an application executing on a device in communication with the panel.
US08390583B2 Pressure sensitive user interface for mobile devices
Virtual keypads are provided which determine an intended user key entry based upon location of keystrokes as well as other keystroke characteristics such as keystroke shape and/or pressure. Virtual keypad layouts which include overlapping or multi-character keys may be used to reduce typing errors on small pressure sensing touch screens. Keystrokes on overlapping or multi-character keys may be disambiguated using measured pressures applied to the pressure sensing touch screen as well as other keystroke characteristics such as keystroke shape. Additional user interfaces are provided which exploit pressure sensing touch screen capable of discriminating magnitudes of pressure exerted upon the touch screen surface.
US08390580B2 Touch panel, liquid crystal display screen using the same, and methods for making the touch panel and the liquid crystal display screen
A liquid crystal display screen includes an upper board, a lower board opposite to the upper board, and a liquid crystal layer located between the upper board and the lower board. The upper board includes a touch panel. The touch panel includes an amount of transparent electrodes. At least one of the transparent electrodes includes a transparent carbon nanotube structure. The lower board includes a thin film transistor panel. The thin film transistor panel includes an amount of thin film transistors. Each of the thin film transistors includes a semiconducting layer. The semiconducting layer includes a semiconducting carbon nanotube structure.
US08390579B2 System for classifying gestures
A system for classifying gestures executed by a user on a surface or in a graphical interface comprising a meta-classification module which analyzes kinematic and spatial characteristics of an arbitrary gesture undergoing execution and assigns a class of synchronous or asynchronous gestures to this gesture.
US08390578B2 Sensing device, display device, electronic apparatus, and sensing method
A sensing device includes: a plurality of sensors that are arrayed on a screen and that generate first detection signals each having a level corresponding to a touch state of an object on the screen or a distance between the object and the screen; a read unit that reads the first detection signals from the plurality of sensors at predetermined periods; a binarization unit that compares a level of each of the first detection signals read by the read unit with a threshold value and generates a second detection signal that is binarized; a determination unit that determines whether or not the object touches the screen on the basis of each second detection signal; a detection unit that detects a touch position of the object on the screen on the basis of each second detection signal; and a control unit that controls the read unit such that the predetermined period becomes a first period when the determination unit determines that there is no touch and that controls the read unit such that the predetermined period becomes a second period shorter than the first period when the determination unit determines that there is a touch.
US08390572B2 Dynamically located onscreen keyboard
A touch-sensitive display surface having touch-capacitive and vibration sensors. This surface allows the user to rest their fingers on the keys of an onscreen keyboard and type as they would on a regular keyboard. As the user places their fingers on the touch screen, the system relocates the onscreen keyboard to the location where the fingers are resting. The touch sensors report the signal strength level of each key touched to a processor, but no keystroke is issued by the processor until a corresponding “tap” (i.e., vibration) is detected. When a tap is detected, the processor references the status of the touch capacitance sensors before, during, and/or immediately after the moment in time the tap occurred. The size, position, and orientation of the onscreen keyboard keys are dynamically set as determined by the user initiating a home-row definition event by resting their fingers momentarily on a virtual home-row.
US08390569B2 Optical trackpad module and method of using same
An optical trackpad module is described herein. The module includes a light source and a trackpad that is optically coupled to the light source such that light from the light source can reach the trackpad. The trackpad is configured to receive an input object. The module also includes a sensor array that receives at least some of the light from the light source that is reflected off the input object. The sensor array is divided into sub-sections, and each sub-section corresponds to a portion of the trackpad. In addition, each sub-section detects at least translational movement of the input object on the corresponding trackpad portions to enable detection of rotational motion of the input object on the trackpad.
US08390564B2 Display
A display including a first substrate, a first electrode, a second substrate, a second electrode, and a mixed solution is provided. The first electrode is disposed on the first substrate, and the second electrode is disposed on the second substrate. In addition, the mixed solution is disposed between the first electrode and the second electrode. Moreover, the mixed solution includes a solution and a plurality of first neutral micro-particles disposed in the solution.
US08390561B2 Apparatus for driving lamp and liquid crystal display device having the same
Disclosed is a liquid crystal display device having a lamp driving apparatus for preventing lamps from being damaged due to electric current variation among the lamps. A DC/DC converter converts an externally provided DC voltage input into a converted DC voltage signal having a predetermined voltage level. A DC/AC inverter inverts the converted DC voltage signal into an AC voltage signal to supply the inverted AC voltage signal to an input terminal of a lamp. A power controller detects electric current flowing the lamp at an output terminal of the lamp to control the level of the inverted AC voltage signal output from the DC/AC inverter and bypasses a part of electric current applied to the input terminal of the lamp when a level of the detected electric current is higher than a predetermined threshold value. Therefore, when the level of the electric current flowing through the lamp exceeds the predetermined threshold value, the power controller bypasses the part of the electric current supplied to the lamp to the ground, thereby decreasing the amount of the electric current supplied to the lamp and preventing the lamp from being damaged.
US08390560B2 Level shift circuit, signal drive circuit, display device, and electronic device
A level shift circuit includes: a first and a second output transistor outputting voltages derived from a first and a second power source voltage, respectively; a first and a second input transistor outputting, based on a first input pulse signal, a first voltage for turning ON the first output transistor and a second voltage for turning OFF the second output transistor, respectively; a third and a fourth input transistor outputting, based on a second input pulse signal, a third voltage for turning OFF the first output transistor and a fourth voltage for turning ON the second output transistor, respectively; a first bootstrap circuit enlarging an amplitude of the first voltage and supplying the same to the first output transistor; and a first voltage compensation circuit, based on a third input pulse signal, making, at an end timing of the first input pulse signal, a voltage change in a direction opposite to that of a voltage fluctuation caused in the first voltage due to a parasitic capacitance in the first input transistor.
US08390557B2 Display panel driver for reducing heat generation within a data line driver circuit which drives the display panel driver by dot inversion
A display panel drive circuit is provided with a first display output terminal to be connected with a data line of a display panel, first and second output stages, and a control circuit. The first output stage is directly connected with the first display output terminal and configured to output a data signal with the positive polarity with respect to a standard voltage level. The second output stage is also directly connected with the first display output terminal and configured to output a data signal with the negative polarity with respect to the standard voltage level. The control circuit controls the first and second output stages so that one of the first and second output stages is selectively activated while the other of the first and second output stages is deactivated.
US08390556B2 Level shifter for use in LCD display applications
A level shifter for use in LCD display applications is provided which includes a group of separate channels each with a signal input and a signal output and with channel control circuitry supporting gate voltage shaping for improving image quality. The level shifter further has a number of flicker clock inputs. The channel control circuitry of each particular channel in the group comprises logic circuitry combining all of said flicker clock inputs with the signal input of the particular channel and signal inputs form other channels into a gate voltage shaping enable signal for the control circuitry of the particular channel. With this configuration it is possible to use the same level shifter IC with only one flicker clock signal for all phases, regardless of how many, without the need for an additional synchronization signal, or multiple flicker clock signals as is conventional. The level shifter automatically determines which input signal needs to be modified for the gate voltage shaping when the active portion of the flicker clock signal is detected.
US08390554B2 Liquid crystal display device with gamma voltage adjusting unit and driving method thereof for adjusting the potentials of the gamma reference voltages during a horizontal blanking period
A liquid crystal display device and a method of driving the same are disclosed. The liquid crystal display device includes a liquid crystal display panel including data lines, gate lines crossing the data lines, and liquid crystal cells arranged in a matrix format at each of crossings of the data lines and the gate lines; a data drive circuit that converts digital video data into a positive/negative data voltage using gamma reference voltages to supply the positive/negative data voltage to the data lines; and a gamma voltage adjusting unit that increases a potential of each of the gamma reference voltages during a blanking period when a polarity of the positive/negative data voltage is inverted.
US08390552B2 Display device, and circuit and method for driving the same
In one embodiment of the present application, a display is disclosed in which any defective pixel is rendered less noticeable even if a full-screen white display or suchlike is effected. In a normally-white liquid crystal display device, which transitions after power activation from non-display state through display starting state, where a full-screen blank white display is effected, to normal display state, an auxiliary electrode driver portion controls an auxiliary capacitance line voltage Vcs to be applied to auxiliary capacitance lines in accordance with the state of the liquid crystal display device in the following manner. Specifically, during the display starting state, the voltage difference between the auxiliary capacitance line voltage Vcs and a counter voltage Vcom is set at 0, such that any defective pixel is displayed in white, whereas during the normal display state, a predetermined voltage difference ΔVc is caused between the auxiliary capacitance line voltage Vcs and the counter voltage Vcom, such that any defective pixel is displayed in black. The present invention is suitable for active-matrix liquid crystal display devices.
US08390551B2 Driving device for quickly changing the gray level of the liquid crystal display and its driving method
A driving device for quickly changing the gray level of the liquid crystal display and its driving method are disclosed. The driving device includes a group of thin film transistors with matrix array, a plurality of gate lines and a plurality of data lines. The driving method for the thedriving device includes: two gate lines in the liquid crystal display are simultaneously or synchronously turned on according to in the bright period or in the black period, the voltage for displaying the present frame interval data or the voltage for displaying black image is given to the thin film transistors connected with the gate lines, and scanning continues in turn. The present invention is suitable for the picture treatment of various liquid crystal displays, organic light emitting diode (OLED) display or plasma display panel (PDP).
US08390550B2 Method and module for regulating color distribution
The invention relates to a method and module for regulating color distribution. In this method, a reference point in a first gamut and a second reference point in a second gamut are found, and then the first gamut is converted to the second gamut based on the first and second reference point.
US08390538B2 Active-matrix field emission pixel
A field emission pixel includes a cathode on which a field emitter emitting electrons is formed, an anode on which a phosphor absorbing electrons from the field emitter is formed, and a thin film transistor (TFT) having a source connected to a current source in response to a scan signal, a gate receiving a data signal, and a drain connected to the field emitter. The field emitter is made of carbon material such as diamond, diamond like carbon, carbon nanotube or carbon nanofiber. The cathode may include multiple field emitters, and the TFT may include multiple transistors having gates to which the same signal is applied, sources to which the same signal is applied, and drains respectively connected to the field emitters. An active layer of the TFT is made of a semiconductor film such as amorphous silicon, micro-crystalline silicon, polycrystalline silicon, wide-band gap material like ZnO, or an organic semiconductor.
US08390537B2 Method of assembling displays on substrates
Various embodiments of methods and systems for designing and constructing displays from multiple light-modulating elements are disclosed. Display elements having different light-modulating and self-assembling characteristics may be used during display assembly and operation.
US08390535B2 Stereo image display device and method
A stereo image display device includes an image display unit for displaying a parallactic image having a right-eye image and a left-eye image on a display plane, a parallactic image selecting unit for making only the right-eye image of the parallactic image reach the right eye of a viewer and making only the left-eye image of the parallactic image reach the left eye of the viewer to thereby make the viewer view a stereo image, an eye fatigue degree detecting unit for detecting the eye fatigue degree of the viewer, and an eye fatigue relaxation processing unit for carrying out eye fatigue relaxation processing for relaxing the eye fatigue of the viewer.
US08390534B2 Method and device for generating tracking configurations for augmented reality applications
A method and a device for determining tracking configurations for augmented reality applications are provided. A determination is automatically carried out based on a list of modules provided in a real environment and known tracking data of individual modules of the list in terms of an online operation at an operator of a system.
US08390524B2 Antenna device, reception device and radio wave timepiece
An antenna device including: an antenna unit having an oscillating body capable of oscillating at a predetermined natural frequency and being displaceable by an external magnetic field, and a converter for converting motion of the oscillating body to an electrical signal, when a radio wave signal having a frequency band for inducing resonance of the oscillating body comes, the oscillating body resonating with a magnetic field component of the radio wave signal, the converter converting resonance of the oscillating body to the electrical signal, and an electrical signal corresponding to the radio wave signal being outputted; a sensitivity varying section capable of varying degree of displacement of the oscillating body occurring by the external magnetic field; and a sensitivity controller for adjusting the degree of the displacement by using the sensitivity varying section in accordance with the electrical signal outputted from the antenna unit.
US08390521B2 Antenna array for a radar transceiver and circuit configuration for supplying an antenna array of such a radar transceiver
An antenna array for radar transceivers, in particular for ascertaining distance and/or speed in the surroundings of vehicles, a first antenna part being situated on a carrier and a second antenna part being situated on another carrier situated at a distance from the first. The first antenna part has two generally rectangular primary exciter patches which adjoin each other on one edge, where they are short-circuited toward ground, two primary exciter patches have two separate supply lines, and the second antenna part comprises two mutually separated rectangular secondary exciter patches, which partially cover the primary exciter patches and which have, in the region of the ground short-circuit of the primary exciter patches, in the beam direction, a distance from each other that at least exposes the ground short-circuit.
US08390520B2 Dual-patch antenna and array
A dual-patch antenna includes a ground plane, a first patch plate parallel to and separated from the ground plane by a separation distance, and a second patch plate separated from the ground plane by the separation distance. The first and second patch plates are coplanar and separated by a radiating slot. An excitation probe isolatedly passes through the ground plane and connects to the first patch plate. A first wall connects an edge of the first patch plate to the ground plane. The first wall is located approximately ¼ wavelength of a mid-band operating frequency from the radiating slot. A second wall connects an edge of the second patch plate to the ground plane. The second wall is located approximately ¼ wavelength of the mid-band operating frequency from the radiating slot. The dual-patch antennas may be organized in an array.
US08390518B2 Adaptive adjustment of an antenna arrangement for exploiting polarization and/or beamforming separation
It is described an antenna arrangement for transmitting and/or for receiving electromagnetic radiation. The antenna arrangement includes two antenna elements, which are adapted for transmitting and/or for receiving electromagnetic radiation of a first polarization. The antenna arrangement further includes one antenna element, which is adapted for transmitting and/or for receiving electromagnetic radiation of a second polarization being different from the first polarization. Furthermore, there is provided one coupling unit, which is adapted to couple, based on an appropriate control signal, the antenna elements selectively with one terminal of the antenna arrangement in such a manner, that the polarization direction of the antenna arrangement can be adjusted to the first polarization or to a combination of the first and the second polarization.
US08390517B2 Wireless signal antenna
The invention discloses a wireless signal antenna including a substrate, a grounding element, a metal radiator element, a signal transmission line, and a ground connection part. The metal radiator element includes a first radiator unit, a second radiator unit, and a signal feed-in point. The ground connection part is electrically connected to the signal feed-in point and the grounding element. The first radiator unit is disposed on the substrate and bent to include a first radiator part, a second radiator part, and a third radiator part, wherein at least a part of the first radiator unit is disposed along edges of the substrate. The second radiator unit is disposed between the first radiator unit and the grounding element. The signal transmission line includes a signal line and a ground line respectively connected to the signal feed-in point and a layout area of the grounding element. The signal transmission line receives electrical signals from a signal source and then excites the metal radiator element to generate a first frequency band mode and a second frequency band mode.
US08390514B1 Detection and geolocation of transient signals received by multi-beamforming antenna
A bank of order statistic filters applied to a set of antenna or transducer beams are used to detect and determine the line-of-bearing to the source of transient RF (or other, e.g., acoustic) signals. By applying order statistic filters to signals received by a set of antenna or transducer beams, this system sets a detection threshold that is unaffected by transient signals, thereby allowing the detection of these transient signals. Knowing which antenna beam the transient signals are located within allows the determination of a line of bearing to the source of the transient signals.
US08390512B2 On demand positioning
The subject matter disclosed herein relates to determining a location of a mobile device using more than one location-determining technology.
US08390509B2 Radar system and direction detecting method
A reflected wave that a transmitted wave is reflected by targets including a stationary target and a moving target is received as receiving signals of at least two reception antennas. A phase difference between beat signals at respective peak frequencies, generated from a transmitting signal and the receiving signals, is calculated. Directions of the targets are calculated in such a manner that the calculated phase difference of the targets is stored in a storage area in advance, it is predicted whether peak frequencies of the plurality of targets overlap each other, a predicted phase difference of the stationary target at the time when the peak frequencies overlap each other is calculated on the basis of the stored phase difference, and a predicted phase difference of the moving target is calculated on the basis of the calculated phase difference and the predicted phase difference of the stationary target.
US08390503B2 Remote controller and remote control system
A remote control method includes: grouping a plurality of apparatuses to respond to a command from a single remote controller at the same time; broadcasting, by the remote controller, a command corresponding to an operation; receiving, by each of the plurality of apparatuses, the command and judging whether the received command is addressed to a group to which the apparatus itself belongs; and executing, when it is judged by each of the plurality of apparatuses that the received command is addressed to the apparatus itself, processing corresponding to the command.
US08390498B2 Comparing circuit and parallel analog-to-digital converter
First and second resistor series divide a predetermined voltage range to generate first reference voltages and second reference voltages, respectively. First and second switch controlling circuits select respective ones of the first reference voltages and the second reference voltages. A comparing unit generates a logical signal representing a logical value by comparing a combined transistor current based on the selected first and second reference voltages with a transistor current based on an input signal. The first switch controlling circuit specifies two adjacent first reference voltages where the logical value is inverted by sequentially selecting the first reference voltages, and determines to select one of the adjacent reference voltages. Te second switch controlling circuit specifies two adjacent second reference voltages where the logical value is inverted by sequentially selecting the second reference voltages, and determines to select one of the adjacent reference voltages.
US08390495B2 MIMO delta-sigma delta analog-to-digital converter using noise canceling
A multi-input-multi-output-system (MIMO) is provided that includes a first input signal and a second input signal. A plurality of analog-to-digital converter (ADC) cell structures receive as input a combination of the first input signal and the second input signal as well as a combination of quantization noise signals from the respective other ADC cell structures of the plurality of ADC cell structures. The ADC cell structures generate a plurality of first output signals and the noise quantization signals. A plurality of adder modules receive the first output signals and performing either addition or subtraction on a selected combination of the first output signals, the adder modules generate a plurality of second output signals. A plurality of division modules receive the second output signals and perform a division operation on the second output signals by a predetermined factor. The division modules generate a plurality of final output signals of the MIMO.
US08390492B2 Signal processing apparatus
A signal processing apparatus includes: a digital processing unit to which a digital input signal is supplied, which performs a digital process on the digital input signal to produce a digital signal, and which produces a control signal designating a specific time period when an amplitude of an analog output signal is to be lowered; a DA-conversion unit which converts the digital signal to produce an analog signal; and a variable gain unit which adjusts an amplitude of the analog signal to produce the analog output signal, and which lowers the amplitude of the analog output signal during the specific time period designated by the control signal.
US08390488B2 Non-linearity correction that is independent of input common mode, temperature variation, and process variation
In pipeline analog-to-digital converters (ADCs) the third harmonic can degrade the performance of the ADC, and conventional circuits that attempt to cancel this third harmonic are oftentimes sensitive to process variation, temperature variation, and common mode variations. Here a correction circuit is provided that includes a compensator that adjusts control voltages for MOS capacitors to generally ensures that the difference between the gate-source voltages and threshold voltages of MOS capacitors is generally maintained across variations of process, temperature, and common mode.
US08390485B2 Subset transform interleaver
Digital communications interleavers re-order the bits of a data coding block in a way that can be described by a table of indices that map the original order to the interleaved order. Conventional interleavers include index table interleavers, which store an index table ahead of operation and algorithmic Interleavers, which generate the indices during operation.Described herein are a new class of interleavers: Subset Transform Interleavers. A subset of generator outputs is selected and processed to create the interleaver indices. The selection is determined apriori and the selection results are stored in a Subset Usage Table. During operation, the generator is operated again and the Subset Usage Table entries determine which generator outputs are used. The generator may be a pseudo-random number generator. Implementations can use an Indexes Remaining Table, which can additionally be manipulated during operation such that it returns to an initialized state after each block interleaving process.
US08390481B2 Sensing capacitance changes of a housing of an electronic device
Methods and apparatuses are disclosed that allow measurement of a user's interaction with the housing of an electronic device. Some embodiments may measure the electrical characteristics of a housing of an electrical device, where the housing is capable of being temporarily deformed by the user's interaction. By measuring the electrical characteristics of the housing, such as the housing's capacitance, the user's interaction with the housing can be measured in a manner that is independent of the user's electrical characteristics and/or in a manner that may allow the pressure applied to the housing to be quantified.
US08390480B2 Method and system for saving and retrieving spatial related information
The present invention is directed to a method and apparatus for storing, referencing, retrieving, and graphically displaying spatial and non-spatial related information of a mobile computing device, such as a laptop computer or a cellular telephone. The spatial-related information may be obtained by using positioning tracking systems such as a global positioning system, whereas the non-spatial related information may include communication activities associated with the mobile computing device, such as phone calls, e-mails, text messages, pages, etc. The present invention also provides methods and apparatus of sharing event information between mobile communication devices as well as related navigational information for traveling to an event from a real-time position of a mobile communication device.
US08390479B2 Device for locking a movable component of an aircraft
A device for locking a movable component of an aircraft. The device includes an electronic tag adapted for receiving a polling signal and returning an identification signal. An on-board system allows detection of such locking devices.
US08390477B2 Space monitoring detector
Disclosed is an inventory control system or parking space detector including an inductive loop technology that is either embedded in the concrete or located atop the concrete, or any other feasible method of setting an inductive loop. By monitoring the change in inductance of the magnetic field that is generated by the loop as cars of various sizes and weights enter the looped area, a determination of whether or not the inventory is controlled or the parking spaces are all full is made when the inductance value reaches a certain predetermined level. This predetermined level will be determined by calibration in the initial installation in order to determine the exact inductance values when a group of parking spaces are full.
US08390476B2 Image recording apparatus and method
An image recording apparatus suitable for recording a traffic signal violation at an intersection controlled by a traffic light is described. The image recording apparatus includes a first camera focused on the intersection, and a second camera focused on a first lane of a street leading to the intersection. A first control circuit is coupled to the first camera causes the first camera to capture a first image at substantially an instant of time that the traffic light indicates a change of traffic control status. The apparatus also includes a detection circuit to detect when a portion of a vehicle crosses a trigger location in the first lane after the change in traffic control status. A second control circuit coupled to the second camera causes the second camera to capture a close-up image of the vehicle in the event that the detection circuit detects the portion of the vehicle at the trigger location after a change in traffic control status.
US08390474B2 Method for collecting data and system for accomplishing the same
A method for collecting data is disclosed herein. The method involves selecting, via a processor associated with a telematics service center, a mobile vehicle to collect data from a sensor configured to wirelessly communicate with one or more selected vehicles and, via a telematics unit disposed in the selected mobile vehicle, receiving data collected by the sensor. The method further involves, via the telematics unit, transmitting the data from the telematics unit to a data aggregator and reporting the data from the data aggregator to a facility. Also disclosed herein is a system for accomplishing the same.
US08390473B2 System, method and apparatus for advanced utility control, monitoring and conservation
The present application is directed to a system and method of providing flexible real-time two-way energy control and monitoring between utility providers and consumers. Consumer friendly nodes permit communication of targeted information and control, while permitting the utility provider to remotely communicate and control in a real-time environment. Data collection of and accessibility by a community of utility consumers provides social feedback through comparative usage statistics.
US08390470B2 Display device
A display device is provided. The display includes a display main body, a light source, a diffusion part, and a transmission part. The display main body includes a display module and a cabinet protecting the display module. The light source generates light according to an operating state of the display main body. The diffusion part receives the light from the light source and includes a reflective surface oblique to an incident direction of the light. The transmission part includes an optical imaging part on which the light diffused from the diffusion part is projected and transmits the light to the outside at one side of the diffusion part.
US08390469B2 External conditions audio playback system and method
A method and system that controls the playing of different audio or video files by an electric device in a motor vehicle that includes a plurality of different audio or video files and an audio file player software program. The electronic device is coupled to at least one external sensor that measures one of the following: the motor vehicle's current location, the time of day, and/or the weather or temperature. The software program is configured to automatically play the audio file associated with an external condition when the external condition occurs. When the motor vehicle is operating, and the occupant is listening to the electronic device, the audio or video files are automatically played based on the occurrence of the linked external condition.
US08390466B2 Cable clamp-on device including a user interface
In an illustrative embodiment, a cable clamp (100) comprises a first half member (110) and a second half member (115). Each of the half members comprises first and second mating surfaces (120, 125), and interior and exterior surfaces (130, 135). The half members are connected at the first mating surfaces thereof such that the half members form a passageway (140) for receiving a cable (145) therethrough. The clamp further comprises at least one actuator (150) disposed on one of the exterior surfaces, at least one indicator (155) disposed on one of the exterior surfaces, and a transceiver (160) configured to transmit data regarding the at least one actuator and to receive data regarding the indicator via a wireless link.
US08390465B2 Residual-current circuit breaker
A residual-current circuit breaker includes at least one summation current transformer through which at least one first lead and one second lead of a network to be protected are guided. At least one secondary winding is arranged on the summation current transformer and operatively connected at least indirectly with at least one energy storage element. At least one discharging resistor is switched in parallel with the energy storage element. The residual-current circuit breaker has a trip element which is operatively connected with break contacts in the at least one first lead and the at least one second lead. In order to reduce unexpected cut-offs of a network to be protected, the at least one discharging resistor includes a first partial resistor, and a second partial resistor switched in series with respect to the first partial resistor, with a least one electric signaling device operatively connected, at least indirectly, with the first partial resistor.
US08390464B1 Integrating refrigerated transport operations and logistics by creating operational states via wireless communications
A system allows a remote asset, via an Intelligent Device and interconnected Central Data Server to autonomously, and continuously monitor and update its status on various parameters; and from these, to calculate an overall asset state that may be caused by various combinations of the parameters and to infer the operational states and logistical position of a transport refrigeration unit.
US08390459B2 Wireless IC device
A wireless IC device includes an electromagnetic coupling module, which includes a feeder circuit board having a wireless IC chip arranged to process transmission and reception signals mounted thereon, and a radiation plate. Linear loop electrodes provided in the radiation plate are electromagnetically coupled to planar electrodes located on a surface of the feeder circuit board. A signal received by the radiation plate drives the wireless IC chip. A response signal from the wireless IC chip is transmitted to the outside from the radiation plate. A frequency of the transmission and reception signals is substantially determined by inductance of the loop electrodes, capacitance between the loop electrodes and the planar electrodes, and stray capacitance generated between lines of the loop electrodes.
US08390458B2 Wireless IC tag reader
A wireless IC tag reader includes a receiving antenna, a transmitting antenna and a beam direction control unit. The receiving antenna has a maximum beam direction and a half-value angle. The transmitting antenna has a maximum beam direction and a half-value angle narrower than the half-value angle of the receiving antenna. The beam direction control unit changes the maximum beam direction of the transmitting antenna.
US08390447B2 Electronic time data system
Data in the form of discrete learnable objects, is automatically retrieved at time intervals and fed to a user by an electronic time data device based on options such as subject, alert and time interval of 60 minutes or less. Preceding or with the feeding of a data object, an alert is outputted, which is ceased by an input. Inputs such as answers to questions to test comprehension, can also be required. The system can evaluate the responses, and adaptively introduce a new subject when comprehension is demonstrated, and repeat data objects for which comprehension is not demonstrated. The interval, subject matter fed and other parameters can be controlled by the device, or remotely by a second device or administrator, and information representative of comprehension, marketing, and the like can be recorded and collected.
US08390445B2 Sensory enhancement systems and methods in personal electronic devices
Disclosed are personal electronic devices (PEDs) having a sensory enhancement (SE) system for monitoring environmental conditions and detecting environmental events, for example but not limited to, changes in acoustic, thermal, optical, electromagnetic, chemical, dynamic, wireless, atmospheric, or biometric conditions. The detection of such events can be used to invoke a notification, an alert, a corrective action, or some other action, depending upon the implementation to the PED user or another party.
US08390444B2 Sensor-location system for locating a sensor in a tract covered by an earth-based sensor network
A sensor-location system for locating sensors in a tract covered by an earth-based sensor network. The sensor-location system includes at least one sensor-identification device, and at least one sensor locator. The sensor-identification device is affixed to a respective sensor in the earth-based sensor network. The sensor locator is configured for use from on board of an aircraft. In addition, the sensor locator is configured to acquire geographic-location data of said sensor including an identifying signature from the sensor-identification device of the sensor in the tract covered by the earth-based sensor network.
US08390437B2 Ultrasonic vibrator
A mobile device including a casing, a signal generator housed within the casing, for generating signals, at least one speaker housed within the casing and coupled with the signal generator, for producing sound from a signal generated by said signal generator, wherein the sound produced by the at least one speaker is (i) substantially inaudible, and (ii) vibrates the casing at a frequency approximately equal to a resonant frequency of the casing.
US08390436B2 Apparatus, systems, and methods to support service calls
In an embodiment, an apparatus, method, and/or system support a service request made by a computer user in an Internet café or similar electronic service environment. A user may operate a café-provided user terminal in a multi-terminal network controlled by a café service console. The user may operate a switch on the terminal to transmit a service request to the service console. A visible and/or audible indication may be provided to the user, via a suitable indicator on the terminal, regarding the status of the user's service request. The user's service request may cause service-related information to be displayed on a second display of the user terminal for selection by the user. The user may speak with a service administrator using a voice over Internet protocol module built into the terminal. Other embodiments are described and claimed.
US08390434B2 Power controller
A power controller includes an infrared emitting circuit, an infrared receiving circuit, and a switching circuit. The infrared emitting circuit emits an infrared signal received by the infrared receiving circuit which outputs a corresponding control signal. The switching circuit is connected to the infrared receiving circuit to receive the control signal, and is connected to a powering control terminal of a motherboard of a computer to output a pulse signal to turn the computer on and off according to the control signal.
US08390433B2 Method and system for low cost, power efficient, wireless transponder devices with enhanced functionality
A method and system for inventorying wireless transponders, specifically referred to as RFID transceiver devices. To provide higher functionality, a microcontroller is used in the RFID, along with a battery, but the clock frequency of the microcontroller is adjusted, based on external input, to minimize battery requirements. The RFID transceiver device includes at least one sensor coupled to the microcontroller. Data from the at least one sensor is stored in non-volatile memory of the microcontroller if the battery is at a predetermined low level, and is read later when the battery is at a higher level.
US08390431B1 RFID tags that backscatter more codes
RFID reader systems, readers, components, software and methods cause RFID tags to backscatter a combination made from at least portions of a first code and a second code, without transmitting any commands in the interim. The first and/or second codes may include a tag response to a reader challenge. In a number of embodiments, a separate command does not have to be sent for reading the second code along with the first code, thereby saving time in inventorying the tags. Plus, the combination can enable reading tag codes during tag manufacturing that are not otherwise readily available to read in the field. In some embodiments, the combination may further include one or more error-checking codes.
US08390426B2 Apparatus for remote opening of doors or gates of a building
There is disclosed an apparatus for remote opening of doors or gates of at least a building (A, A1 . . . An). The apparatus comprises a unit (B, B 1 . . . Bn) located in the building (A, A1 . . . An) and accessible from a plurality of external terminals (C1 . . . Cn) provided with a GSM module; the unit (B, B1 . . . Bn) is connected to electromechanical means (50) suitable for opening and closing said doors or gates and comprises a database (2) containing the list of the telephone numbers of said plurality of external terminals (C1 . . . Cn), a GSM interface (3) for connecting to the external terminals (C1 . . . Cn) and means (4) for managing said interface (3) and said database (2). The managing means (4) is interrogatable by the external terminals (C1 . . . Cn) and is suitable for commanding the electromechanical means (50) for opening gates or doors if the telephone number of the interrogating external terminal is on the list of telephone numbers of the external terminals (C1 . . . Cn) of the database.
US08390422B2 Electric control device for an automobile
The invention relates to an electric control device for an automobile, that comprises a touch-surface sensor using pressure-sensitive resistors and to be assembled with a holder (3) having a recessed or protruding three-dimensional surface, characterized in that the touch-surface (1) of the sensor is shaped so that, at the assembled state, a portion of at least the shaped touch-surfaces (1) meet each other while conforming to the shape of said three-dimensional surface (4) in order to define an essentially continuous touch-surface (1).
US08390419B2 Electrical assembly and method for making the same
An electrical assembly for use with a rotary transformer is provided. The electrical assembly includes a assembly structure having a first flange positioned proximate a first end portion of the assembly structure and a second flange positioned proximate a second end portion of the assembly structure. The electrical assembly further includes at least one lamella coupled to the assembly structure. The at least one lamella extends from the first flange to the second flange.
US08390418B2 Apparatus and method for reducing inductor saturation in magnetic fields
This document discusses, among other things, an inductive component that can include a core having two portions: (1) a first portion composed of a first material having a first magnetic saturation level; and (2) a second portion composed of a second material selected to provide inductance for the inductive component when an external magnetic field is greater than the first magnetic saturation level. In an example, the first portion can be composed of a material having a relatively low magnetic saturation level (e.g., a ferrite), and the second portion can be composed of a material having a relatively high magnetic saturation level (e.g., a high permeability iron alloy).
US08390413B2 Accessory device with magnetic attachment
A magnetic attachment mechanism and method is described. The magnetic attachment mechanism can be used to releasably attach at least two objects together in a preferred configuration without fasteners and without external intervention. The magnetic attachment mechanism can be used to releasably attach an accessory device to an electronic device. The accessory device can be used to augment the functionality of usefulness of the electronic device.
US08390410B2 Electromagnetic relay
An electromagnetic relay switches to conduct and interrupt currents having different magnitudes and flowing though mutually opposite paths via the electromagnetic relay. The relay includes a coil generating a magnetic force and a pair of contact sections opened and closed selectively by the magnetic force. The contact sections comprise a pair of fixed contacts and a pair of movable contacts. Each fixed contacts is held by a pair of conductive fixed holders and is near a tip section of each fixed holder. The movable contacts are fixed to a conductive movable holder and moves toward and away from the fixed holders selectively in response to the magnetic force. The relay further includes two arc-extinguishing magnet members adjacent to the contact sections such that, the arc generated by interrupting one current having a magnitude larger than the other current is extended toward the tip section at each contact section.
US08390409B2 Switching device and method for inserting or removing a tolerance insert in a magnet chamber of a switching device
At least one embodiment of the invention relates to a switch device particularly a low-voltage switch device, having an actuation magnet chamber by at least one spring element, having at least one displaceable switch contact and at least one stationary switch contact, wherein the at least one displaceable switch contact can be displaced by the actuation magnet, the magnet chamber comprising an assembly opening for inserting or removing a tolerance insert. At least one embodiment of the invention further relates to a method for inserting or removing a tolerance insert in a magnet chamber of such a switch device.
US08390396B2 Duplexer module
A duplexer module that prevents degradation of isolation between signal lines includes transmission filters, reception filters, phase adjusting circuits, and a multilayer substrate. The transmission filters and the reception filters are constituted as separate discrete components. The multilayer substrate includes filter mount terminals to which the transmission filters are mounted, and filter mount terminals to which the reception filters are mounted. The filter mount terminals are arranged along an upper side of the multilayer substrate, and the filter mount terminals are arranged along a lower side of the multilayer substrate.
US08390393B2 Pre-distortion based impedence discontinuity remediation for via stubs and connectors in printed circuit board design
Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
US08390392B2 Variable capacitance module and matching circuit module
In a variable capacitance module capable of achieving necessary variable capacitance ranges, a variable capacitance circuit includes a variable capacitance element and fixed capacitance elements. A first variable capacitance element and a first fixed capacitance element are connected in series, and the series circuit thereof and a second fixed capacitance element are connected in parallel. Accordingly, with reference to the capacitance of the second fixed capacitance element, the range of the combined capacitance of the variable capacitance circuit is provided by a step size of capacitance based on the combined capacitance of the variable capacitance element and the first fixed capacitance element. The first and second fixed capacitance elements are defined by inner-layer flat-plate electrodes in a laminated substrate, and the variable capacitance element is defined by an MEMS element mounted on a top surface of the laminated substrate.
US08390391B2 Semiconductor device and method of integrating balun and RF coupler on a common substrate
A semiconductor die has an RF coupler and balun integrated on a common substrate. The RF coupler includes first and second conductive traces formed in close proximity. The RF coupler further includes a resistor. The balun includes a primary coil and two secondary coils. A first capacitor is coupled between first and second terminals of the semiconductor die. A second capacitor is coupled between a third terminal of the semiconductor die and a ground terminal. A third capacitor is coupled between a fourth terminal of the semiconductor die and the ground terminal. A fourth capacitor is coupled between the high side and low side of the primary coil. The integration of the RF coupler and balun on the common substrate offers flexible coupling strength and signal directivity, and further improves electrical performance due to short lead lengths, reduces form factor, and increases manufacturing yield.
US08390386B2 Variable inductor
A variable inductor includes: a first inductor having two ends connected to a first terminal and a second terminal; a second inductor having two ends connected to the first terminal and the second terminal; a first node provided on the first inductor; a second node provided on the second inductor; and a switch element that switches between a conductive state and a non-conductive state between the first node and the second node.
US08390382B2 Power amplifier circuit
There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.
US08390375B2 Calculating apparatus, distortion correcting apparatus, amplifying apparatus, and calculating method
A calculating apparatus includes a first state variable calculating unit that calculates first state variables respectively having a memory effect and being of an amplifier that causes signal distortion; an amplifier model unit that based on the calculated first state variables, calculates the signal distortion caused by the amplifier, as a distortion characteristic; and an output unit that outputs the calculated distortion characteristic.
US08390373B2 Ultra-high efficiency switching power inverter and power amplifier
An apparatus for providing a power output proportional to a source signal, including a phase modulator driving an upper and an lower power driver with carrier waveforms having a relative phase difference and having a signal modulated thereon, and coupled to a resonator circuit to operate as a substantially zero-voltage zero-current switching element, with the output fed into respective upper and lower transformers. Identical symmetrical secondary circuits on the transformers have a rectifier stage electrically connected to an inductor in series with an upper capacitor to form an upper low pass filter, and a high speed semiconductor switch coupled to a node between the inductor and rectifier stage provides a return path to ground. The lower secondary circuit inductor is highly coupled (>=0.99) to the upper inductor, and an output formed across the upper and lower output elements is isolated from rail voltage and balanced with bi-directional current.
US08390369B2 Electronic circuit and method for operating a module in a functional mode and in an idle mode
A method and an electronic circuit, the electronic circuit includes: a module that comprises multiple flip-flops and a control signal providing circuit; a power management circuit arranged to provide to the module a supply voltage of a functional level when the module is in a functional mode, and to provide to the module a supply voltage of an idle level when the module is in an idle mode; wherein the control signal providing circuit is arranged to provide to the multiple flip-flops, when the module is in the functional mode, a control signal that facilitates a state change of each of the multiple flip-flops; wherein the control signal providing circuit is arranged to provide to the multiple flip-flops, when the module is in the idle mode, a control signal that prevents a state change of each of the multiple flip-flops; wherein the each of the control signal providing circuit and a plurality of flip-flops of the multiple flip-flops comprises at least one hybrid circuit that comprises a low-threshold transistor that is coupled in parallel to at least one high-threshold transistor; wherein each hybrid circuit is arranged to maintain information or a control signal when provided with the supply voltage of the idle level; and wherein high-threshold transistors of each hybrid circuit are arranged to maintain information or a control signal when provided with a supply voltage of a level that is higher than the idle level.
US08390363B2 Circuit, trim and layout for temperature compensation of metal resistors in semi-conductor chips
A temperature compensation circuit for generating a temperature compensating reference voltage (VREF) may include a Bandgap reference circuit configured to generate a Bandgap reference voltage (VBGR) that is substantially temperature independent and a proportional-to-absolute-temperature reference voltage (VPTAT) that varies substantially in proportion to absolute temperature. The circuit may also include an operational amplifier that is connected to the Bandgap reference circuit and that has an output on which VREF is based. The circuit may also include a feedback circuit that is connected to the operational amplifier and to the Bandgap reference circuit and that is configured so as to cause VREF to be substantially equal to VPTAT times a constant k1, minus VBGR times a constant k2.
US08390362B2 Low-power, high-voltage integrated circuits
Embodiments relate to an ultra-low-power, high-voltage integrated circuit (IC) that also has high electromagnetic compatibility (EMC). Embodiments address the desire for an ultra-low-power, high-voltage IC that also has high EMC and comprise a high-voltage EMC protection circuit with normal current consumption coupled to an ultra-low-power, low-voltage oscillator that controls a sleep/wake, or duty, cycle of a high-voltage circuit.
US08390353B2 Duty cycle correction circuit
A duty cycle correction circuit includes a duty correction block configured to generate a first pre-corrected signal and a second pre-corrected signal in response to a duty code and an input signal; a duty-corrected signal generation block configured to generate a duty-corrected signal in response to a first select signal, a second select signal, the first pre-corrected signal and the second pre-corrected signal; and a control block configured to generate the duty code, the first select signal and the second select signal in response to the duty-corrected signal and the input signal.
US08390350B2 Clock signal delay circuit for a locked loop circuit
A clock signal delay circuit includes a variable delay unit, a delay unit, a phase detection block, a control clock output block, and a delay control unit. The variable delay unit controls a delay amount of a reference clock signal based on a delay control signal and provides a delayed clock signal based thereon. The delay unit delays the delayed clock signal and provides a feedback clock signal based thereon. The phase detection block detects a phase difference between the feedback clock signal and the reference clock signal and provides a detected phase difference based thereon. The control clock output block provides a control clock signal based on the detected phase difference. The delay control unit generates the delay control signal based on the detected phase difference and in response to the control clock signal.
US08390348B2 Time base generator and method for providing a first clock signal and a second clock signal
A time base generator and method for providing a first clock signal and a second clock signal comprising generating the first clock signal at a first clock frequency, dividing the first clock frequency by a first integer to produce a first auxiliary signal, dividing the second clock signal by a second integer to produce a second auxiliary signal, generating an error signal by individually weighting and comparing cycle durations or phasing of the first and second auxiliary signals, and generating the second clock signal by a voltage-controlled oscillator controlled by the error signal such that two clock signals of slightly different frequencies with defined time or phase delay are provided.
US08390347B1 Single period phase to digital converter
A phase to digital converter for a digital PLL (Phase Locked Loop) provides an output in the same or single reference clock period for which it is digitizing the phase error information. The phase to digital converter operates on a positive edge of the reference clock and a digital filter operates on the negative edge of the reference clock so the phase correction performed by the PLL occurs in the same reference clock cycle in which the phase to digital converter is digitizing the phase error information.
US08390346B2 System for synchronizing operation of a circuit with a control signal, and corresponding integrated circuit
A system for synchronizing the operation of a circuit with a control signal includes synchronization flip-flops operating in cascade for receiving a control signal to be synchronized and providing a corresponding control signal synchronized with a clock signal, and a circuit including a finite state machine for receiving the clock signal having state flip-flops for storing the current state of the finite state machine, wherein a last synchronization flip-flop includes one of the state flip-flops.
US08390344B2 Method and circuit for waveform generation
A programmable waveform generator, comprising: a controllable waveform generator configured to generate an initial bandwidth signal having an initial frequency bandwidth; a tone generator configured to generate a plurality of tone signals, each tone signal having a different frequency; a first bandwidth-multiplying circuit, including a first mixer having a first input port configured to receive the low-bandwidth signal; a first switch configured to choose one of the plurality of tone signals or a phase shifted version of one of the plurality of tone signals and output the chosen signal as a first chosen tone; a controller configured to control the operation of the bandwidth multiplying block, wherein the first mixer is further configured to receive the first chosen tone at a second input port, wherein the first mixer is further configured to mix the initial bandwidth signal and the first chosen tone to generate a first bandwidth signal at an output port, the first bandwidth signal having a first frequency bandwidth, wherein the first frequency bandwidth is greater than the initial frequency bandwidth, and wherein the first frequency bandwidth is an integer multiple of the initial frequency bandwidth.
US08390343B2 Injection-locked frequency divider
An injection-locked frequency divider is provided and which includes an injection transistor, an oscillator, a current source and a transformer. The injection transistor is used to receive an injection signal. The oscillator is used to divide the injection signal to generate a divided frequency signal. The current source is coupled to the oscillator to provide a current to the oscillator. The transformer is coupled between the injection transistor and the oscillator to increase the equivalent transconductance of the injection transistor, and thus increasing the locking range of the injection-locked frequency divider.
US08390342B2 High voltage switch circuit of semiconductor device
A high voltage switch circuit of a semiconductor device includes a buffer circuit configured to output a control signal in response to an input signal and a boost circuit configured to output a block selection signal to an output terminal by connecting a current path between a voltage supply node and the output terminal in response to the control signal, and to block the current path in case where the control signal falls from a high voltage level to a low voltage level.
US08390334B2 Synthesizer and reception device and electronic device using the same
A synthesizer includes: a synthesizer unit that outputs an oscillation signal based on a reference oscillation signal; a temperature detecting unit that detects a temperature; a time variation detecting unit that detects a time variation in frequency of the reference oscillation signal based on a result of temperature detection by the temperature detecting unit; and a control unit that adjusts a frequency of the oscillation signal outputted from the synthesizer unit based on a result of detection by the time variation detecting unit. With such a configuration, frequency compensation control is performed on a transducer having a large temperature coefficient.
US08390330B2 Base cell for implementing an engineering change order (ECO)
A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell.
US08390329B1 Method and apparatus to compensate for hold violations
A method for controlling a hold buffer delay is provided. A control voltage is generated in response to a measurement of at least one of process variation, temperature variation, and supply voltage variation to compensate for a hold violation, and the delay of a buffer is adjusted using the control voltage. A first data signal is provided in synchronization with a first clock signal. A logic operation is performed on the first signal so as to generate a second data signal. A third data signal is generated and outputted in synchronization with a second clock signal, and at least one of the first and second data signals is buffered with the buffer.
US08390328B2 Supplying a clock signal and a gated clock signal to synchronous elements
A clock gating circuitry is configured to receive a clock signal and to output an output signal comprising either the clock signal or the predetermined gated value. The circuitry receives a clock signal, a clock enable signal having either an enable value or a disable value, and a power mode signal having either a low power value (indicating entry to a low power mode in which at least a portion of the plurality of synchronous elements are powered to retain data and are not clocked and at least a further portion of the plurality of synchronous elements are powered down), or a functional mode value (indicating the plurality of synchronous elements are to be powered). A clock gating unit has logic circuitry that is configured to output the clock signal or the predetermined gated value depending upon the low power value and the functional mode value.
US08390321B2 Reconfigurable logical circuit
Provided is a reconfigurable logic circuit that can effectively use a preposition logic that composes a logic block. The reconfigurable logic block according to the present invention includes a plurality of logic blocks (199) having a full adder (30), two preposition logics (20) that perform a plurality of logic operations according to configuration data, an extended logic block (60) that can perform the logic operation of one or more kinds. Outputs (21A and 21B) of the preposition logic are respectively connected to two argument inputs (A and B) of the full adder (30). A carry output (CO) of the full adder (30) is connected to the extended logic block (60). One selected from a plurality of signals including a fixed logic value is input to a carry input (CI) of the full adder according to the configuration data, and the extended logic block of other logic block generates an output signal according to an output of the extended logic block.
US08390320B2 Dynamic pad hardware control
Some embodiments of the present disclosure relate to dynamic hardware pad control that is triggered by an intelligent hardware module that monitors an operational state of an IC pin. This hardware module then provides a control signal, which is based on the operational state of the IC pin, to a multiplexer control block that selects one of several different configurations for the IC pin. Because the control signal is provided by the hardware module, the techniques disclosed herein allow precise switching between a number of different IC pin configurations in a fast and efficient manner.
US08390317B2 Bidirectional equalizer with CMOS inductive bias circuit
An integrated circuit (IC) device, system and related method of communicating data are described. The IC device includes; a data port configured to provide output data to a channel and receive input data from the channel, an impedance matching circuit connected to the data port and configured to operate as an output driver circuit when the output data is being transmitted and as an on die termination circuit when the input data is being received, and an active inductive bias circuit connected to the data port in parallel with the impedance matching circuit, and configured to adjust the impedance of the data port to the channel during transmission of the output data as a function of output data frequency and adjust the impedance of the data port to the channel during receipt of the input data as a function of input data frequency.
US08390316B2 Termination resistor scheme
An example embodiment of the present invention relates to a method and corresponding apparatus that terminates circuit connectivity in a bus by determining location of an instrument on the bus, and based on coupling a terminating resistance to the instrument. The example embodiment may couple a terminating resistance with the instrument placed at the end of a bus by employing at least one male-to-male connector arranged to establish a connection between the female receptacles of the terminating resistance and the bus. In order to determine a state of termination of circuit connectivity in a bus, an example embodiment of the present invention may connect a transceiver to a terminating resistance and determine a state of termination of circuit connectivity in the bus as a function of sensing receive activity in the transceiver.
US08390312B2 Device for monitoring the operation of a digital circuit
A digital electronic circuit includes: a plurality of sequential elements; at least one data-conducting path connecting an input sequential element to a destination sequential element; a clock outputting a clock signal on a clock tree for setting the speed of the sequential elements; a monitoring device receiving, as an input, at least one data signal traveling on a conducting path and arriving at a destination sequential element, the monitoring device including: a module for defining at least one detection window according to the clock tree; and a detector for detecting a transition of each data signal received during a detection window; and wherein each detection window is defined so as to enable the detection or anticipation of a fault corresponding to a violation of the rise time or the maintenance time of a data signal relative to a clock signal edge received by the destination sequential element receiving the data signal.
US08390311B2 Apparatus for clocked power logic against power analysis attack
A logic apparatus secure against a power analysis attack is disclosed. The logic apparatus may include a clocked power logic to recover and reuse at least a part of charges supplied during a single clock operation; a first device block connected to the clocked power logic to remove a parasitic capacitance difference in the clocked power logic, and a second device block to readjust remaining charges in each node of the clocked power logic after a single clock operation.
US08390310B2 Test system and test method of semiconductor integrated circuit
Provided is a test system of a semiconductor integrated circuit including an output device and an input device for conducting an input/output characteristics test of the output device and the input device inside the semiconductor integrated circuit. In the system, a transmission line provided in a test board where the semiconductor integrated circuit is mounted on establishes a wired connection between an external terminal of one circuit of one of the output device and the input device and external terminals of a plurality of circuits of another one of the output device and the input device.
US08390308B2 Testbed for testing electronic circuits and components
There is disclosed an electronic testbed, an electronic testbed board, and a method for positioning receptacles for nails in the electronic testbed board. In an embodiment, the electronic testbed board includes a mounting through-hole for mounting a receptacle for a nail. The mounting through-hole is drilled to a suitably precise diameter for mounting the receptacle substantially perpendicular to the testbed board. One or more via-holes are located adjacent the mounting through-hole, and are adapted to allow an electrical connection between any conductive layers provided at the one or more via-holes. The receptacle may be mounted more accurately and the electronic test bed may be built more accurately by separating the functions of the via-holes and the mounting through-hole.
US08390307B2 Method and apparatus for interrogating an electronic component
A method and apparatus for interrogating an electronic component (20), includes a body (18 or 102) having an interface (10, 24, 108 or 154) for an interrogating device (48/50 or 106) to use as a conduit in reliably performing multiple discrete interrogations of the electronic component (20) without the interrogating device physically touching the electronic component (20).
US08390302B2 Apparatus and method for adaptive fault detection in MV distribution circuits
A method and a protective device operable to perform the method are provided, wherein the method is for detecting and analyzing faults in a first cable and one or more other cables, which convey power in a three phase feeder system. Current magnitude in the first cable is compared to a threshold level. If the current magnitude exceeds the threshold level, the duration of the condition is measured. If the duration falls within a predetermined duration range, a predetermined time interval is allowed to pass and then a determination is made whether a fault is detected in the one or more other cables. If a fault is not detected in the one or more other cables, then a determination is made that a single phase fault has occurred in the feeder system.
US08390298B2 Method for determination of a setting value which indicates a ground impedance, and measurement device
A method for determining an adjustment value for an electrical protection device wherein, upon occurrence of a ground short circuit, first current indicator measured values and first voltage indicator measured values are captured by a first measurement device at a first end of a segment of an electrical power supply line, and second current indicator measured values and second voltage indicator measured values are captured by a second measurement device at a second end of the segment of an electrical power supply line. In order to design a method of this type such that an adjustment value for a ground impedance can be determined in a relatively simple fashion. A fault location value is determined using the first current and voltage indicator measured values and the second current and voltage indicator measured values, indicating a fault location at which the ground short circuit has occurred in the segment of the electrical power supply line, and an adjustment value indicating a ground impedance is calculated using the fault location value. There is also provided a correspondingly equipped measurement device.
US08390294B2 Multi-resolution borehole resistivity imaging
An apparatus, method and computer-readable medium for obtaining a resistivity image of an earth formation. The apparatus includes a downhole assembly configured to be conveyed in a borehole penetrating the earth formation; a plurality of sensor electrodes on the downhole assembly, at least one of the electrodes having a different area than another of the electrodes; and at least one processor configured to: (i) process measurements using each of the sensor electrodes; (ii) process a subset of the measurements substantially unaffected by the different capacitances to produce an image of the borehole wall; and (iii) record the image on a suitable medium.
US08390291B2 Apparatus and method for tracking movement of a target
The present invention discloses an apparatus and method to track the movement of a target. One embodiment tracks the movement of the patient during medical imaging scanning using optical technology. Optical systems record the position and movement of the target and provide inputs to a processor. The processor is capable of performing mathematical analysis of the movement of the target to determine the positional shift of the patient. Weighted averages, phase correlation, Fourier-Mellin algorithms, and cross-correlation of data related to X-Y translation are used to calculate movement of the target subject. Feedback related to the movement is provided to the medical imaging scanning machine which allows for adjustments in focusing coils for real time tracking of the patient's movements during the procedure. As a result, the medical image scanning procedure becomes more accurate as it is adjusted for the patient's movements.
US08390288B2 Method and RF transmitter arrangement for generating RF fields
A multi-channel RF transmitter arrangement comprising a plurality of RF transmitter elements like RE antennas, antenna elements, coils or coil elements, for generating an RF field, especially for use in a magnetic resonance imaging system for exciting nuclear magnetic resonances, and a method for generating such an RF field wherein the RF transmitter elements are segmented in a plurality of segments at least along the direction of one or more of the main magnetic field of the MRI system, the z-direction or the longitudinal direction.
US08390286B2 Ultra-low field nuclear magnetic resonance and magnetic resonance imaging to discriminate and identify materials
Method comprising obtaining an NMR measurement from a sample wherein an ultra-low field NMR system probes the sample and produces the NMR measurement and wherein a sampling temperature, prepolarizing field, and measurement field are known; detecting the NMR measurement by means of inductive coils; analyzing the NMR measurement to obtain at least one measurement feature wherein the measurement feature comprises T1, T2, T1ρ, or the frequency dependence thereof; and, searching for the at least one measurement feature within a database comprising NMR reference data for at least one material to determine if the sample comprises a material of interest.
US08390283B2 Three axis magnetic field sensor
Three bridge circuits (101, 111, 121), each include magnetoresistive sensors coupled as a Wheatstone bridge (100) to sense a magnetic field (160) in three orthogonal directions (110, 120, 130) that are set with a single pinning material deposition and bulk wafer setting procedure. One of the three bridge circuits (121) includes a first magnetoresistive sensor (141) comprising a first sensing element (122) disposed on a pinned layer (126), the first sensing element (122) having first and second edges and first and second sides, and a first flux guide (132) disposed non-parallel to the first side of the substrate and having an end that is proximate to the first edge and on the first side of the first sensing element (122). An optional second flux guide (136) may be disposed non-parallel to the first side of the substrate and having an end that is proximate to the second edge and the second side of the first sensing element (122).
US08390282B2 Magnetic sensor circuit
Provided is a magnetic sensor circuit capable of a low-voltage operation, which comprises a Hall element and a magnetic offset cancellation circuit for the Hall element. In the magnetic sensor circuit using the Hall element, at the time of turning on transmission gates for switching connections between input terminals of an amplifier circuit in the magnetic offset cancellation circuit and electrodes of the Hall element in order to cancel a magnetic offset of the Hall element, gates of N-channel transistors in the transmission gates are set at voltages higher than a power supply voltage by a drive circuit.
US08390278B2 Eddy current inspection probe for inspecting the interior of a tubular member
An eddy current probe for inspecting steam generator tubing, that has radially outwardly biased rollers that function to center the probe within the tubing and reduce friction as the probe moves along the interior of the steam generator heat exchanger tube walls. The rollers may include a braking system which controls the drag on the rollers and thus the speed of the probe along the tubing. The direction of travel of the rollers is remotely adjustable to control the inspection pattern and the force of the rollers against the interior surface of the tubing can be remotely controlled.
US08390275B2 Component including magnets for input operation
A left-side ring magnet and a right-side ring magnet are fastened to a roller-shaped operation part, circumferentially displaced from each other by a certain angle. Magnetic variation generated by rotation of the magnets is detected by a magnetism detection element. Additionally, a left-side stationary magnet and a right-side stationary magnet, with the same magnetic pole, are annexed correspondingly to the left-side ring magnet and the right-side ring magnet, respectively, so that the stationary magnets are arranged with the same proximal arrangement relative to the ring magnets, respectively. With such a structure, two attractive and repulsive forces between the left-side ring magnet and the left-side stationary magnet; and between the right-side ring magnet and the right-side stationary magnet are totally exerted on the operation part, thereby providing a sharp, clear click touch during rotation.
US08390271B2 Magnetic anchorage equipment with a self-test unit
The present invention relates to magnetic anchorage equipment comprising a frame able to contain a plurality of polar units, each of the plurality of polar units having a ferromagnetic polar element which identifies an anchorage surface and a self-testing unit for checking the magnetic equipment. The magnetic anchorage equipment is characterized in that the self-testing unit for checking the magnetic equipment is at least partly integrated in the frame.
US08390270B2 Measurement signal coupling device with electrical isolation and electrical equipment unit comprising one such device
The coupling device with electrical isolation comprises at least one input signal, an output of an output signal representative of said input signal, and signal transfer means with electrical isolation receiving the input signal and supplying said output signal. The transfer means comprise at least one signal transformer having at least one primary winding to receive a primary signal representative of said input signal, switching means to switch the input signal and supply the latter to said primary winding, and electrically isolated control means of the switching means comprising a control input receiving control signals during switching periods. The electrical switchgear unit comprises one such coupling device connected to measuring resistors and to a processing unit processing electrical protection functions.
US08390254B2 Charging apparatus for laptop computer with multi-batteries and method for the same
A charging apparatus for laptop computer with multiple-batteries is used in a first battery unit and a second battery unit. The charging apparatus comprises a micro controller unit; a first charging switch unit electrically connected to the micro controller unit; a second charging switch unit electrically connected to the micro controller unit; and a charging unit electrically connected to the first charging switch unit and the second charging switch unit. The micro controller unit controls the charging unit charging the first battery unit and the second battery unit via controlling the first charging switch unit and the second charging switch unit. The charging apparatus charges multi-batteries simultaneously.
US08390253B2 Battery control system and vehicle
A battery control system controls an external charging unit in a vehicle including a vehicle body, engine, motors, secondary battery, and the external charging unit, and includes a degradation detecting unit that detects degradation of the secondary battery, during charging of the second battery by the external charging unit.
US08390251B2 Autonomous robot auto-docking and energy management systems and methods
A method for energy management in a robotic device includes providing a base station for mating with the robotic device, determining a quantity of energy stored in an energy storage unit of the robotic device, and performing a predetermined task based at least in part on the quantity of energy stored. Also disclosed are systems for emitting avoidance signals to prevent inadvertent contact between the robot and the base station, and systems for emitting homing signals to allow the robotic device to accurately dock with the base station. Also disclosed are systems and methods for confirming a presence of a robotic device docked with a charger by recognizing a load formed by a circuit in the charger combined with a complementary circuit in the robotic device.
US08390247B1 Disconnect for a charging unit for an electric vehicle
A device for a plug in vehicle includes a cord with a ball-like covering that allows it to be dropped. The cord bounces when dropped, and no damage is caused. There is also an electrical actuator that is based on when the vehicle is in a mode that allows it to be charged. When the vehicle is in the charge mode, the actuator either magnetically attracts the cord, or tightens against the cord to hold it more tightly If the vehicle is put in reverse, for example, the actuator is deenergized, and the cord is less tightly held, facilitating its disconnection.
US08390242B2 Analog photovoltaic power circuit
The present invention discloses an analog photovoltaic power circuit, comprising: a photovoltaic device group for receiving photo energy to generate an input voltage; a power stage circuit for converting the input voltage to an output voltage; an optimum voltage estimation circuit for receiving a predetermined voltage and estimating an optimum voltage according to a direction of variation of the input voltage and a direction of variation of the power generated by the photovoltaic device group; and an analog comparison and control circuit for comparing the optimum voltage with the input voltage, to thereby control the operation of the power stage circuit.
US08390238B2 Softstarter for controlling an asynchronous three-phase motor
A softstarter for starting and stopping an asynchronous motor having three phases, including two pairs of semiconductor devices of the type turning off at zero-crossing of the current therethrough, wherein each of the two pairs of semiconductor devices is connected in anti-parallel, and the first pair of the semiconductor devices is adapted to control the voltage of one of the phases of the motor and the second pair of the semiconductor devices being adapted to control the voltage of another of the phases of the motor, a DC reducing unit associated with the two pairs of semiconductor devices, a first voltage measuring unit for measuring voltages across the two pairs of semiconductor devices, and a first zero-crossing detecting unit configured for detecting zero-crossings of the measured voltages across the two pairs of semiconductor devices and providing zero-crossing signals to the DC reducing unit.
US08390236B2 Drive system for operating an electric device
A drive system is disclosed for operating an electric device. The drive system includes an electric motor having a permanent magnet rotor connectable to the electric device for controlling the operation of it by a limited-angle rotation, the electric motor further including a stator winding. The drive system includes a drive circuit connected to the stator winding. The permanent magnet rotor can be arranged to be aligned to a magnetic field created by the stator winding when supplied with current from the drive circuit, so that a maximum torque can be applied to the rotor and thereby to the movable part within an interval of ±25 degrees around a middle position between two end positions of the limited-angle rotation of the rotor.
US08390234B2 Method for the automated startup and/or for the automated operation of controllers of an electrical drive system with vibrational mechanics as well as an associated device
A method for automated startup and/or for automated operation of controllers of an electrical drive system with vibrational mechanics with the following steps: (a) determining a preliminary value of at least one parameter; (b) determining a model of the electrical drive system by determination of initially a non-parameterized model through the recording of frequency data during operation of the drive system subject to the utilization of the preliminary value of at least one parameter and the subsequent determination of parameters of the electrical drive system based on the frequency data and subject to optimization of at least one preliminary value of at least one parameter by a numerical optimization method on the basis of the Levenberg-Marquardt algorithm and (c) parameterizing at least one controller of the electrical drive system by at least one of the determined parameters.
US08390232B2 Permanent magnet motor with field weakening
A permanent-magnet electrical machine is disclosed in which the rotor or stator have at least one movable iron segment. A magnetic field of the electric machine is weakened when the movable iron segment is moved a position away from the rotor or stator, respectively. When the movable iron segment is in a first position, such as in contact with the rotor or stator, the field strength is high. When the movable iron segment is in a second position in which the movable iron segment is displaced away from the rotor or stator, the field strength is low. The ability to weaken the field strength causes the constant-power, speed ratio to be increased and thereby increases the utility of the electric machine for applications in which a wide speed range is desired. The electric machine may be used as both a permanent-magnet motor and generator.
US08390227B2 Electric power control system and efficiency optimization process for a polyphase synchronous machine
A system and process includes continuously determining an applied armature voltage supplied to a polyphase synchronous machine for which a maximum mechanical load is characterized by a pull-out torque. The armature voltage is supplied from a power source via one of many taps of a regulating transformer. The armature voltage being supplied from the power source to the machine is changed by selecting one of the voltage levels from the taps of the regulating transformer. The tap voltage levels are selected based on the determined applied armature voltage to minimize power consumption of the machine while ensuring based on a predetermined confidence level that the pull-out torque of the machine will not be exceeded.
US08390224B2 Drive device for an adjusting device for adjusting a vehicle part and method for operating a drive device
A drive device for an adjusting device for adjusting a vehicle component of a vehicle includes an electronically commutated motor and an electronic control device which actuates the electronically commutated motor with an actuating voltage. The electronic control device can adapt the signal form of the actuating voltage on the basis of at least one operating parameter in order to optimize the power output, the acoustics, the electromagnetic irradiation and/or the heating of the drive device.
US08390223B2 Control device for electric motor drive device
A control device that controls an electric motor drive device. The control device is configured with a first voltage control section that derives a modulation rate representing a ratio of an effective value of the voltage command values to the DC voltage and a voltage command phase. A second voltage control section generates a control signal for controlling the DC/AC conversion section on the basis of the modulation rate, the voltage command phase, and a magnetic pole position representing a rotational angle of a rotator of the AC electric motor. A computation cycle of the first voltage control section is set to be longer than a computation cycle of the second voltage control section.
US08390220B2 Device for controlling regeneration energy in an electronic motor drive having an LC filter to reduce conducted emissions from the motor back to the voltage source
The present invention provides a unique improvement (23) in an electronic motor drive (20) having an LC filter (21) to reduce conducted emissions from a motor (M) back to a voltage source (V1). The improvement broadly includes diode (24) in series with the inductor (L1) of said filter to prevent transmission of regenerative power from the motor to said voltage source; and a bypass switch (25) arranged in parallel with the diode and selectively operable to enable transmission of regenerative power from the motor to said voltage source.
US08390219B2 Door operator with electrical back check feature
A door operator with an electrical back check feature is disclosed. Embodiments of the present invention are realized by a motorized door operator that electrically creates a back check force for an opening door. The door operator simulates the back check normally created by hydraulic means in convention door closers, but without the use of pistons, springs or hydraulic fluid. The door operator includes a motor disposed to operatively connect to a door so that the door will open when the motor moves, and a position sensor to determine a position of the door. A processor is programmed to exert a closing force on the door in the back check region. In some embodiments, the closing force is exerted by injecting a voltage into the electric motor of the door operator.
US08390218B2 Synchronized vibration device for haptic feedback
The present invention relates to synchronized vibration devices that can provide haptic feedback to a user. A wide variety of actuator types may be employed to provide synchronized vibration, including linear actuators, rotary actuators, rotating eccentric mass actuators, and rocking mass actuators. A controller may send signals to one or more driver circuits for directing operation of the actuators. The controller may provide direction and amplitude control, vibration control, and frequency control to direct the haptic experience. Parameters such as frequency, phase, amplitude, duration, and direction can be programmed or input as different patterns suitable for use in gaming, virtual reality and real-world situations.
US08390216B2 Apparatus and method for a light-emitting diode lamp that simulates a filament lamp
Disclosed herein is a circuit assembly comprising a light-emitting diode (LED) load in combination with a filament bulb simulation circuit, the filament bulb simulation circuit being configured to simulate a load that would be presented to a monitoring system by a filament bulb. In this manner, a filament bulb can be effectively replaced with one or more LEDs and thereby achieve power consumption savings. Also disclosed is a method for monitoring an LED circuit assembly with a monitoring system to determine whether the LED circuit assembly is deemed operational.
US08390215B2 Light emitting diode circuit, light emitting diode driving circuit, voltage selection circuit, and method for driving thereof
A voltage selection circuit selecting a minimum voltage from the remainder voltages outputted from the light emitting diode channels is disclosed. The voltage selection circuit includes a first picking circuit, which has the first operation amplifiers, a positive input terminal, an output terminal, a negative input terminal, and an output stage. Each of the first operation amplifiers includes a positive input terminal, an output terminal, a negative input terminal, and an output stage. The positive input terminal receives one of the remainder voltages from one of the first ends of the light emitting diode channels. The output terminal outputs the minimum voltage, in which the output terminals of the first operation amplifiers are connected together. The negative input terminal is electrically connected to the output terminal. The output stage is electrically connected to the output terminal, in which the output stage has current sinking ability stronger than current sourcing ability.
US08390214B2 LED-based lighting power supplies with power factor correction and dimming control
A power supply for powering one or more loads includes a boost circuit with power factor correction (PFC) that provides an operating voltage from an electrical power source, and a dimmer detection circuit that determines a dimming level applied to the electrical power source, and generates a pulse width modulated (PWM) signal based upon the dimming level. The power supply also includes one or more current control circuits, each current control circuit being associated with each of the one or more loads, and coupled in series with the operating voltage, its associated load, and a ground of the power supply, so as to control a current through its associated load in response to the PWM signal.
US08390213B2 LED power-source circuit and illumination fixture using the same
An LED power-source circuit includes an input filter circuit including noise prevention capacitors and a line filter, a diode bridge connected to the input filter circuit, a smoothing capacitor connected to an output of the diode bridge and having a capacitance of 1 μF or less, a DC-DC conversion circuit connected to the smoothing capacitor, and an LED assembly connected to an output of the DC-DC conversion circuit. Grounding capacitors are coupled to ground from an input power line between the line filter and the diode bridge. The total capacitance from the input power line to ground is set to be 1/200 or less of that of the smoothing capacitor.
US08390212B2 Light-emitting element driving control circuit
A light-emitting-element-driving-control circuit comprising: a control circuit to turn on or off a transistor based on an input-control signal, the transistor being connected in series with a light-emitting element and an inductor connected in series and controlling increase and decrease of a driving current of the light-emitting element; a maximum-value-detection circuit to detect a maximum value of the driving current; and a control-signal-generation circuit to generate the control signal for turning on the transistor to increase the driving current at a speed corresponding to a level of a power-supply voltage when the driving current is smaller than the maximum value and turning off the transistor to be kept for a predetermined period to decrease the driving current at a speed corresponding to a level of a forward voltage of the light-emitting element when the driving current reaches the maximum value, based on a detection result of the maximum-value-detection circuit.
US08390209B2 Circuit arrangement for conversion of an input AC voltage to a DC voltage, retrofit lamp having a circuit arrangement such as this, as well as a lighting system
A circuit arrangement for conversion of an input AC voltage to a DC voltage is provided. The circuit arrangement may include an input into which the input AC voltage is input; an output to which a load can be connected; and a first storage circuit and a second storage circuit, each storage circuit comprising at least one inductance and each comprising at least one capacitance, and a diode network.
US08390208B2 Drive circuits for electro-luminescent lamps
A drive circuit for delivering an AC voltage to an array of electro-luminescent lamps (8a to 8n) includes a single coil (1), the energy in which is transferred to each lamp through a corresponding switch assembly (10a to 10n) having positive and negative-going paths for conducting positive and negative voltages to the corresponding lamp. The magnitudes of the voltages applied to the parallel-connected lamps are controllable so that the illumination levels of the lamps are individually adjustable.
US08390207B2 Integrated LED-based luminare for general lighting
Lighting apparatus and methods employing LED light sources are described. The LED light sources are integrated with other components in the form of a luminaire or other general purpose lighting structure. Some of the lighting structures are formed as Parabolic Aluminum Reflector (PAR) luminaires, allowing them to be inserted into conventional sockets. The lighting structures display beneficial operating characteristics, such as efficient operation, high thermal dissipation, high output, and good color mixing.
US08390205B2 LED control using modulation frequency detection techniques
A light emitting diode (LED) controller for controlling a plurality of LED channels includes channel select circuitry, detection circuitry, and error processor circuitry. The channel select circuitry is configured to drive N−1 LED channels of a plurality of (N) LED channels at a nominal modulation frequency and to selectively drive a selected one of the N LED channels at a probe modulation frequency. The detection circuitry is configured to receive a composite brightness signal corresponding to brightness signals from the N LED channels. The detection circuitry is further configured to filter the composite bright signal and generate a selected brightness signal corresponding to a brightness of the selected LED channel at the probe modulation frequency. The error processor circuitry is configured to compare the selected brightness signal to user defined and/or preset photometric quantities and generate a control signal for adjusting the brightness of the selected LED channel.
US08390197B1 Long arc column gas discharge tube
A low pressure Ultra Violet (UV) light source produces a high intensity output proportional to the inside diameter and length of a arc discharge column. The light source includes a cathode and anode contained within a high density ceramic body and a sapphire window mounted in line with the arc discharge column. The anode is in line with the arc column at the end opposite the sapphire window, and the cathode is disposed to an area outside the arc discharge column to which the arc moves through an aperture in the side of the arc discharge column structure. As the electrons move through the low pressure gas ionization of the gas occurs releasing photons in the UV region of the spectrum. The sum of the photons generated at each location along the arc discharge column produces the high intensity UV radiation that exits the lamp through a sapphire window.
US08390193B2 Light emitting device with phosphor wavelength conversion
A light emitting device comprises: a thermally conductive substrate (MCPCB); at least one LED mounted in thermal communication with a surface of the substrate; a housing attached to the substrate and configured such the housing and substrate together define a volume that totally encloses the at least one LED, the housing comprising at least a part that is light transmissive (window); and at least one phosphor material provided on an inner surface of the housing within said volume said phosphor being operable to absorb at least a part of the excitation light emitted by the at least one light emitting diode and to emit light of a second wavelength range. The housing is attached to the substrate such that the volume is substantially water tight, preferably air/gas tight.
US08390191B2 Methods of preparing a Li film and methods of preparing an organic light emitting device
The present invention relates to a method of preparing a Li film, wherein said Li film is fabricated by directly decomposing a compound of Li under a vacuum evaporation condition, and said compound is Li3N. Said Li film is fabricated by decomposing Li3N at an evaporation rate of 0.01-0.25 nm/s and an evaporation temperature of 300-450° C., and said Li film has a thickness of 0.3-5.0 nm. The present invention also relates to an organic light emitting device comprising said Li film as an electron injection layer and a method for the preparation thereof, and an organic light emitting device including an electron injection layer comprising an electron transport material doped with Li obtained by decomposing Li3N under a vacuum evaporation condition, and a method for the preparation thereof.
US08390189B2 White light emitting diode and method of manufacturing the same
Provided is a white LED including a reflector cup; an LED chip mounted on the bottom surface of the reflector cup; transparent resin surrounding the LED chip; a phosphor layer formed on the transparent resin; and a light transmitting layer that is inserted into the surface of the phosphor layer so as to form an embossing pattern on the surface, the light transmitting layer transmitting light, incident from the phosphor layer, in the upward direction.
US08390183B2 Spark plug and method for manufacturing spark plug
This invention has an object to provide a spark plug exhibiting high withstand voltage characteristics and high strength at high temperature, formed by an alumina-based sintered body prepared with excellent processability and high productivity, and a method for manufacturing the spark plug. This invention relates to a spark plug 1 including an insulator 3, wherein the insulator 3 includes a dense alumina-based sintered body having an average crystal particle diameter of 1.50 μm or more, and the alumina-based sintered body contains Si, a Group 2 element component containing Ba and a Group 2 element other than those, and a rare earth element component, such that a ratio of a content S of the Si component to a total content of the content S and a content A of the Group 2 element component is 0.60 or more, and a method for manufacturing the spark plug 1 prepared through a grinding-shaping process in which the insulator 3 is ground before burning to shape the same.
US08390176B2 Stacked crystal resonator and manufacturing method thereof
An object of the invention is to provide a method of manufacturing a stacked crystal resonator whereby a large number of stacked crystal resonators formed on a wafer can be easily broken away from the wafer, and the risk of damage to the outside surfaces and the like of the stacked crystal resonators is reduced. There is formed a framed crystal plate connected to a first wafer by a first support section, a cover connected to a second wafer by a second support section, and a base connected to a third wafer by a third support section, and a thickness of at least one of the first support section through third support section is thinner than a thickness the connected wafer.
US08390173B2 MEMS switch and method of manufacturing the MEMS switch
The MEMS switch comprises a substrate with signal-lines having fixed-contacts, a movable-plate with a movable-contact, a flexible support-member supporting the movable-plate, a static-actuator and a piezoelectric-actuator configured to contact the movable-contact with the fixed-contact. The movable-contact is provided at its longitudinal center with the movable-contact, and its both the longitudinal ends with static-movable-electrode-plate. The support-member is four strips disposed on portions outside of the both width ends of the movable plate. The strip extends along the longitudinal direction of the movable plate, provided with a first end fixed to the movable plate, and provided with a second end fixed to the substrate. The piezoelectric-element is disposed on an upper surface of the strip to be located at a portion outside of the width ends of the movable-plate. The piezoelectric-actuator is configured to develop the stress applied to the coupling-portion which is created between each the strip and the movable-plate.
US08390170B2 Piezoelectric actuator
A piezoelectric actuator has a piezoelectric element adapted to simultaneously generate first and second vibration modes in response to a voltage applied thereto. The piezoelectric element has one outer surface including a first region and a second region projecting from the first region, while the second region comes into contact with a body to be driven, so as to cause a frictional force with the body to be driven. Without restricting the size of the piezoelectric element, the piezoelectric actuator inhibits its driving state from fluctuating.
US08390167B2 Motor for compressor and hermetic compressor having the same
Disclosed are a motor for a compressor and a hermetic compressor having the same. An aluminum coil cheaper than a copper coil is used in the motor for the compressor, to thusly reduce a fabricating cost. Also, a ratio of a height of end coil of a coil to an inner diameter of a stator is appropriately designed or a ratio of an entire area of slot portions to the inner diameter of the stator is appropriately designed, and simultaneously a ratio of the inner diameter of the stator to a width of the tooth portion is appropriately designed, so as to previously prevent a deterioration of damping effect, increase in noise, lowering of efficiency, reduction of driven torque, all caused due to the use of the aluminum coil.
US08390164B1 Method of fabrication of permanent magnet machines with magnetic flux regulation
A method of forming a flux regulated machine includes winding stator windings into slots in an outer core. The outer core is formed to have a plurality of radially inwardly extending tooth pieces that are circumferentially spaced, and which define the slots. Further, control coils are wound around an inner core. Then, the inner core is inserted within the outer core such that the tooth pieces contact the inner core, and such that the control coils close off the slots at a radially innermost position. A flux regulated permanent magnet machine generally made according to this method is also disclosed.
US08390160B2 Compact electromechanical actuator
An electromechanical actuator for controlling the position of an aircraft component has a linear actuator to be driven to position a component. A transverse flux motor drives the linear actuator to move in a linear direction and control the position of the component.
US08390156B2 Rotor for a multipolar synchronous electric machine with salient poles
A rotor for a multipolar synchronous rotating machine includes a plurality of salient poles, each salient pole including a polar body and being surrounded by an induction coil including a plurality of layers of coiled wire; a plurality of spacers such that each spacer of the plurality of spacers creates a first spacing between two successive layers of coiled wire of the plurality of layers for the circulation of coolant between each layer of coiled wire of the plurality of layers, the rotor including a second spacing between the polar body and each layer of coiled wire of the plurality of layers for the circulation of the coolant between the induction coil and the polar body.
US08390153B2 Linear motor and method of manufacturing the same
Provided is a linear motor capable of simplifying assembling of a coil unit and stabilizing a coil pitch and the overall length of the coil unit.The linear motor has a rod 1 having magnets 3, a plurality of coils 4 arranged in the axial direction of the rod 1, a housing 2 covering the coils 4, and a coil holder 5 holding the coils 4 in the housing 2. The coil holder 5 includes a holder main body 5a elongating in the coil arrangement direction and a plurality of spacer portions 5b made of resin and each interposed between each adjacent two of the coils 4 to insulate the coils 4 from each other, the spacer portions 5b being formed integrally with the holder main body 5a.
US08390152B2 Device and method for generating a stable high voltage
A device is disclosed for generating a stable high voltage, namely a high-voltage DC generator for a particle beam apparatus. A method is also disclosed for generating a stable high voltage for a particle beam apparatus. The high-voltage DC generator has a controllable voltage source, which is connected to an amplifier. The high-voltage DC generator ensures that fluctuations of the smoothed high voltage are detected by a capacitive divider and supplied to the amplifier. The amplifier controls the controllable voltage source in counterphase. The voltage of the controllable voltage source is superimposed on the smoothed high voltage. The sum of the voltage of the controllable voltage source and the smoothed high voltage forms the generated and stable high voltage, which is supplied to a particle beam apparatus.
US08390151B2 SSPC with active current limiting
A power distribution module has an input line to receive power from a DC power source. A switch selectively opens the input line and blocks supply of power from the input line to an output line to be connected to a DC load. A solid state power control controls a gate drive for the switch. The solid state power control is operable to distinguish between a pre-charge mode, at which current is rushing to supply a capacitor in the downstream DC load, and a short circuit mode, at which a short circuit exists.
US08390149B2 Harmonic filter with integrated power factor correction
A distributed electrical power generating and utilizing system includes an induction generator driven by a prime mover requiring reactive power to operate for providing electrical power on a bus. The bus has a gross load and is also connectable to a utility power grid by a switch. The gross load includes at least a non-linear electrical load component, typically including a variable speed device and associated diode rectifier front end. The bus includes a harmonic filter having a power factor-correcting capacitor integrated therewith for collectively compensating harmonic distortion caused by the non-linear load component and for correcting power factor to compensate for reactive power required by at least the inductive generator.
US08390148B2 Systems and methods for power supply wear leveling in a blade server chassis
A method for wear leveling in an information handling system including multiple power supply units (PSUs) is provided. The method includes maintaining each PSU in one of multiple different operational states, collecting data relating to the use of each PSU, storing the collected data, and automatically changing the operational state of at least one of the PSUs based at least on the collected data regarding the use of each PSU in order to level the wear on the PSUs.
US08390145B2 Battery isolator unit
A battery isolator unit is disclosed for controlling a switching means having a first contact for connection to a terminal of a first battery, a second contact for connection to a corresponding terminal of a second battery, and an actuating input for biasing a switch element of the switching means switch in a closed position. The battery isolator unit includes a sensing circuit and a switch controller. The sensing circuit periodically determines a first and second value attributable to terminal voltage values of the first battery and the second battery respectively. The switch controller is responsive to detecting a predetermined condition of the first battery and/or the second battery to provide to the actuating input a control signal having a characteristic for biasing the switch element to the closed position. The switch controller periodically determines a difference between the first and second values when the switch element is in the closed position to obtain a obtain a sequence of difference values, and controls the characteristic of the control signal according to a comparison of a present difference value with a previous difference value to modify the bias of the switch element.
US08390143B2 Communication system and communication apparatus
Disclosed herein is a communication system including: at least one power line communication apparatus connected via a general power line for supplying a commercial alternate current power; a communication terminal having a modem for power line communication, and a plurality of first coils having different directivities; and a coupling apparatus, connected to a power line, having a filter for attenuating an alternate current component of the power line, and a second coil arranged after the filter; wherein the communication terminal executes mutual communication with any of the power line communication apparatus connected via the general power line through proximity communication based on an electromagnetic coupling action that is generated between the plurality of first coils and the second coil when the communication terminal is brought to the proximity of a coupling surface of the coupling apparatus.
US08390141B2 Hydropower device
A hydropower device for generating electric power comprises a pipe having an upstream portion and a downstream portion and being arranged to convey water. A valve is provided at the downstream portion and adjustable between a closed position hindering the water and an open position permitting the water to flow. A cylinder member defines an inner space and having a first end and a second end. The inner space extends away from the pipe along a centre axis (x) and receives water from the pipe via the first end when the valve is in the closed position. A piston is disposed in the inner space and movable back and forth along the centre axis. The piston moves away from the pipe by means of an overpressure arising when the valve is in the closed position.
US08390138B2 Wind energy installation with negative sequence system regulation and operating method
A wind energy installation can include a generator which is driven by a rotor and generates electrical power in a multiphase manner for feeding into a network, a converter which is connected to the generator and to the network, and a control system which interacts with the converter and includes a negative sequence system regulation mechanism. The negative sequence system regulation mechanism can include a phase control module configured to determine an electrical variable of the negative sequence system according to the phase. Accordingly, an available current can be provided according to the operating situation for active power or idle power in the negative sequence system regulation mechanism. The negative sequence system regulation mechanism can thus help stabilize the network in the event of asymmetrical network conditions. Also, this relates to a correspondingly equipped wind park and an operating method.
US08390132B2 Chip card, and method for the production thereof
A chip card in the form of an ID-1 card, a plug-in SIM or a USB token has a layered compound (12) with two (4, 5) or three (4, 5, 9) layers extending over the complete chip card (1). An exterior foil layer (4) has on its outward facing front side (4a) a communication contact layout (2) and on its back side (4b) a flip chip (7), as well as a flip chip contact layout (6) which is electroconductively connected with the communication contact layout (2) on the front side.
US08390130B1 Through via recessed reveal structure and method
A stacked assembly includes a stacked structure stacked on a through via recessed reveal structure. The through via recessed reveal structure includes recesses within a backside surface of an electronic component that expose backsides of through vias. Pillars of the stacked structure are attached to the exposed backsides of the through vias through the recesses. The recesses in combination with the pillars work as a lock and key arrangement to insure self-alignment of the pillars with the backsides of the through vias allowing fine pitch interconnections to be realized. Further, by forming the interconnections to the backsides of the through vias within the recesses, the overall thickness of the stacked assembly is minimized. Further still, by forming the interconnections to the backsides of the through vias within the recesses, shorting between adjacent through vias is minimized or eliminated.
US08390126B2 Method and arrangement for reduced thermal stress between substrates
A module (20) can include a first substrate (12) comprised of a first material, at least a second substrate (22) comprised of at least a second material, selectively applied solder (14) of a first composition residing between the first substrate and at least the second substrate, and selectively applied solder (16) of at least a second composition residing between the first substrate and at least the second substrate. Preferably, no crack will exist in the module as a result of a reflow process of the solder due to the CTE mismatch between the first and second substrates. The different selectively applied solder compositions can have different melting points and can be solder balls, solder paste, solder preform or any other known form of solder.
US08390125B2 Through-silicon via formed with a post passivation interconnect structure
An integrated circuit structure includes a semiconductor substrate, a through-silicon via (TSV) extending into the semiconductor substrate, a pad formed over the semiconductor substrate and spaced apart from the TSV, and an interconnect structure formed over the semiconductor substrate and electrically connecting the TSV and the pad. The interconnect structure includes an upper portion formed on the pad and a lower portion adjacent to the pad, and the upper portion extends to electrically connect the TSV.
US08390123B2 ULSI micro-interconnect member having ruthenium electroplating layer on barrier layer
A ULSI micro-interconnect member having a substrate and a ULSI micro-interconnect formed on the substrate, wherein the ULSI micro-interconnect includes a barrier layer formed on the substrate and a ruthenium electroplating layer formed on the barrier layer; the ULSI micro-interconnect member further including a copper electroplating layer formed using the ruthenium electroplating layer as a seed layer; and a process for fabricating the ULSI micro-interconnect members.
US08390122B2 Sputtering targets including excess cadmium for forming a cadmium stannate layer
Methods are generally provided for forming a conductive oxide layer on a substrate. In one particular embodiment, the method can include sputtering a transparent conductive oxide layer (e.g., including cadmium stannate) on a substrate from a target in a sputtering atmosphere comprising cadmium. The transparent conductive oxide layer can be sputtered at a sputtering temperature greater of about 100° C. to about 600° C. Methods are also generally provided for manufacturing a cadmium telluride based thin film photovoltaic device.
US08390121B2 Semiconductor device and method of manufacture thereof
A semiconductor device includes a substrate, an element formed on the substrate, a nitride film formed on the substrate, a anti-peel film formed on the nitride film, and a molded resin covering the anti-peel film and the element. The anti-peel film has residual compressive stress.
US08390118B2 Semiconductor package having electrical connecting structures and fabrication method thereof
A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.
US08390116B1 Flip chip bump structure and fabrication method
A method includes forming a patterned buildup layer on a first surface of a dielectric layer, the patterned buildup layer including a patterned buildup layer opening exposing a trace coupled to the dielectric layer. A conductor layer is flash plated on the patterned buildup layer and within the patterned buildup layer opening. The patterned buildup layer opening is filled with a blanket conductive filler layer. The blanket conductive filler layer and the conductor layer are planarized to form a flip chip bump.
US08390111B2 Wafer bonding method
One embodiment of a micro-electronic device includes a substrate including micro-electronic components thereon, and a cover including a ring of sealing material secured to the substrate and a raised ring of material positioned opposite the cover from the ring of sealing material.
US08390107B2 Semiconductor device and methods of manufacturing semiconductor devices
This application relates to a semiconductor device comprising a semiconductor chip, a molded body covering the semiconductor chip, wherein the molded body comprises an array of molded structure elements, and first solder elements engaged with the molded structure elements.
US08390105B2 Lead frame substrate, manufacturing method thereof, and semiconductor apparatus
A lead frame substrate, including: a metal plate having a first surface and a second surface; a semiconductor element mount portion and a semiconductor element electrode connection terminal that are formed on the first surface; an external connection terminal formed on the second surface and electrically connected to the semiconductor element electrode connection terminal; a conducting wire that connects the semiconductor element electrode connection terminal and the external connection terminal to each other; a resin layer formed on the metal plate; a hole portion that is partly formed in the second surface of the metal plate and does not penetrate the metal plate; and a plurality of protrusions that are formed on a bottom surface of the hole portion and protrude in a direction away from the metal plate, the protrusions having a height lower than a position of the second surface, not being in electrical conduction with the conducting wire, and being dispersed separately.
US08390104B2 Semiconductor apparatus packaging structure having embossed tape over tab tape, the embossed tape and method of forming the semiconductor apparatus packaging structure
A TAB tape (100) packaging structure in which (i) the TAB tape (100) including a plurality of semiconductor chips (103) which are fixed, on a film (101) on which wiring patterns are repeatedly provided and (ii) an embossed tape (200) which is electroconductive and has embossed parts (202) which are sequentially provided on a first surface of and in a longitudinal direction of a film (201) are wound on a reel which is electroconductive is arranged such that the TAB tape (100) and the embossed tape (200) are wound on the reel, while (i) a first surface of the film (101) on which surface the plurality of semiconductor chips (103) are fixed and (ii) the first surface of the film (201) on which surface the embossed parts (202) protrude are overlapping and facing each other, and the embossed tape (200) has a total thickness of not less than (t+0.4) mm and not more than 1.1 mm in a case where each of the plurality of semiconductor chips (103) has a thickness of t (0.2≦t≦0.625) mm and the film (201) has a substantial thickness of 0.125 mm. This realizes packaging of a TAB tape in a desired winding length while sufficiently securing protection of the TAB tape during shipping and transportation.
US08390100B2 Conductive oxide electrodes
Conductive oxide electrodes are described, including a bi-layer barrier structure electrically coupled with an adhesion layer, and an electrode layer, wherein the bi-layer barrier structure includes a first barrier layer electrically coupled with the adhesion layer, and a second barrier layer electrically coupled with the first barrier layer and to the electrode layer. The conductive oxide electrodes and their associated layers can be fabricated BEOL above a substrate that includes active circuitry fabricated FEOL and electrically coupled with the conductive oxide electrodes through an interconnect structure that can also be fabricated FEOL. The conductive oxide electrodes can be used to electrically couple a plurality of non-volatile re-writeable memory cells with conductive array lines in a two-terminal cross-point memory array fabricated BEOL over the substrate and its active circuitry, the active circuitry configured to perform data operations on the memory array.
US08390092B2 Area-efficient high voltage bipolar-based ESD protection targeting narrow design windows
An area-efficient, high voltage, single polarity ESD protection device (300) is provided which includes an p-type substrate (303); a first p-well (308-1) formed in the substrate and sized to contain n+ and p+ contact regions (310, 312) that are connected to a cathode terminal; a second, separate p-well (308-2) formed in the substrate and sized to contain only a p+ contact region (311) that is connected to an anode terminal; and an electrically floating n-type isolation structure (304, 306, 307-2) formed in the substrate to surround and separate the first and second semiconductor regions. When a positive voltage exceeding a triggering voltage level is applied to the cathode and anode terminals, the ESD protection device triggers an inherent thyristor into a snap-back mode to provide a low impedance path through the structure for discharging the ESD current.
US08390089B2 Image sensor with deep trench isolation structure
Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner.
US08390086B2 Solar cell employing a nanowire
One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.
US08390083B2 System with recessed sensing or processing elements
Backside recesses in a base member host components, such as sensors or circuits, to allow closer proximity and efficient use of the surface space and internal volume of the base member. Recesses may include covers, caps, filters and lenses, and may be in communication with circuits on the frontside of the base member, or with circuits on an active backside cap. An array of recessed components may a form complete, compact sensor system.
US08390078B2 Quadrangle MOS transistors
A quadrangle transistor unit includes four transistor units. Each of the four transistor units includes a gate electrode. The gate electrodes of the four transistor units are aligned to four sides of a square. At least two of the four transistor units are connected in parallel.
US08390072B2 Chemical mechanical polishing (CMP) method for gate last process
A method for fabricating a semiconductor device is provided which includes providing a semiconductor substrate, forming a plurality of transistors, each transistor having a dummy gate structure, forming a contact etch stop layer (CESL) over the substrate including the dummy gate structures, forming a first dielectric layer to fill in a portion of each region between adjacent dummy gate structures, forming a chemical mechanical polishing (CMP) stop layer over the CESL and first dielectric layer, forming a second dielectric layer over the CMP stop layer, performing a CMP on the second dielectric layer that substantially stops at the CMP stop layer, and performing an overpolishing to expose the dummy gate structure.
US08390067B2 Substrate for manufacturing semiconductor device and manufacturing method thereof
A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface.
US08390066B2 Semiconductor nanowire memory device
According to an embodiment, a semiconductor memory device capable of stably operating even when an element is shrunk is provided. The semiconductor memory device of the embodiment includes: first and second diodes serially connected between power sources of two different potentials, formed by nanowires, and exhibiting negative differential resistances; and a select transistor connected between the first diode and the second diode. The nanowires are preferably silicon nanowires. The thickness of the silicon nanowires is preferably 8 nm or less.
US08390065B2 Semiconductor device
An object is to reduce the resistance of each member included in a transistor, to improve ON current of the transistor, and to improve performance of an integrated circuit. A semiconductor device including an n-channel FET and a p-channel FET which are provided over a single crystal semiconductor substrate with an insulating layer provided therebetween and are isolated by an element isolation insulating layer. In the semiconductor device, each FET includes a channel formation region including a semiconductor material, a conductive region which is in contact with the channel formation region and includes the semiconductor material, a metal region in contact with the conductive region, a gate insulating layer in contact with the channel formation region, a gate electrode in contact with the gate insulating layer, and a source or drain electrode partly including the metal region.
US08390064B2 Semiconductor device having gate trenches and manufacturing method thereof
A semiconductor device includes a first gate trench, a second gate trench, and a dummy gate trench provided in an active region extending in an X direction; and a first gate electrode, a second gate electrode, and a dummy gate electrode extending in a Y direction crossing the active region, at least a part of which are buried in the first gate trench, the second gate trench, and the dummy gate trench, respectively. The dummy gate electrode arranged between second and third diffusion layers isolates and separates a transistor constituted by the first gate electrode and first and second diffusion layers provided on both sides of the first gate electrode, respectively, from a transistor constituted by the second gate electrode and third and fourth diffusion layers provided on both sides of the second gate electrode, respectively.
US08390063B2 Semiconductor device having a lightly doped semiconductor gate and method for fabricating same
According to one embodiment, a semiconductor device comprises a high-k gate dielectric overlying a well region having a first conductivity type formed in a semiconductor body, and a semiconductor gate formed on the high-k gate dielectric. The semiconductor gate is lightly doped so as to have a second conductivity type opposite the first conductivity type. The disclosed semiconductor device, which may be an NMOS or PMOS device, can further comprise an isolation region formed in the semiconductor body between the semiconductor gate and a drain of the second conductivity type, and a drain extension well of the second conductivity type surrounding the isolation region in the semiconductor body. In one embodiment, the disclosed semiconductor device is fabricated as part of an integrated circuit including one or more CMOS logic devices.
US08390061B2 Semiconductor device having a trench structure and method for manufacturing the same
A semiconductor device has a well region formed of a first conductivity type semiconductor at a predetermined depth from a surface of a substrate, trenches formed in the well region, and a gate insulating film formed on surfaces of concave and convex portions of the trenches. A first gate electrode is embedded inside the trenches, and a second gate electrode is formed on the substrate in contact with the first gate electrode in regions of the concave and convex portions excluding vicinities of both ends of the trenches. Source and drain regions of a second conductivity type are formed from a part of a surface of the semiconductor so as to extend deeper in a side surface of the concave portion of each trench than in the surface of the convex portion of each trench and shallower than the depth of the well region.
US08390052B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device having a source-side-injected split-gate type of nonvolatile memory cell which can be formed by a one-layer polysilicon CMOS process is provided. A memory cell includes a first memory cell unit including first and second diffusion regions formed on a semiconductor substrate surface, and first and second gate electrodes separately formed through a gate insulation film on a first channel region between the first and second diffusion regions, a second memory cell unit including third and fourth diffusion regions formed on the semiconductor substrate surface, and a third gate electrode formed through a gate insulation film on a second channel region between the third and fourth diffusion regions, and a control terminal. The first to third gate electrodes are formed of the same electrode material layer. The second and third gate electrodes are electrically connected to form a floating gate capacitively coupled to the control terminal.
US08390048B2 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device
For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
US08390047B2 Miniaturized implantable sensor platform having multiple devices and sub-chips
An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component.
US08390044B2 Non-linear element, display device including non-linear element, and electronic device including display device
A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5×1019/cm3 or lower, a work function φms of a source electrode in contact with the oxide semiconductor, a work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ<φmd, and an area of contact between the drain electrode and the oxide semiconductor is larger than an area of contact between the source electrode and the oxide semiconductor. By electrically connecting a gate electrode and the drain electrode in the transistor, a non-linear element having a favorable rectification property can be achieved.
US08390040B2 Localized spacer for a multi-gate transistor
In one embodiment, the present invention includes a double gate transistor having a silicon fin formed on a buried oxide layer and first and second insulation layers formed on a portion of the silicon fin, where at least the second insulation layer has a pair of portions extending onto respective first and second portions of the silicon fin to each act as a self-aligned spacer structure. Other embodiments are described and claimed.
US08390035B2 Massively parallel interconnect fabric for complex semiconductor devices
An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the time and cost for development and going from prototyping to production, reducing cost per die, reducing or eliminating NRE, and increasing performance. Other embodiments of this invention enable debugging complex SoC through large contact points provided through the MPIF, provide for multi-platform functionality, and enable incorporating FGPA core in ASIC platform through the MPIF.
US08390034B2 Methods for isolating portions of a loop of pitch-multiplied material and related structures
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.
US08390031B2 Pad layout structure of semiconductor chip
Provided is a pad layout structure of a semiconductor chip capable of preventing lead-broken problems when packaging the semiconductor chip with a high aspect ratio in a tape carrier package (TCP). In the pad layout structure of the semiconductor chip, a plurality pads are arranged along upper, lower, left and right sides of the semiconductor chip with a high aspect ratio, and a longitudinal width of pads arranged at the left and right sides and a transverse width of pads arranged at both edges of the upper and lower sides are greater than a transverse width of pads arranged at centers of the upper and lower sides.
US08390025B2 Inductively coupled photodetector and method of forming an inductively coupled photodetector
A photodetector detects the absence or presence of light by detecting a change in the inductance of a coil. The magnetic field generated when a current flows through the coil passes through an electron-hole generation region. Charged particles in the electron-hole generation region come under the influence of the magnetic field, and generate eddy currents whose magnitudes depend on whether light is absent or present. The eddy currents generate a magnetic field that opposes the magnetic field generated by current flowing through the coil.
US08390020B2 Face-up optical semiconductor device and method
A face-up optical semiconductor device can be prepared by forming an n-type GaN layer, an active layer, and a p-type GaN layer on a C-plane sapphire substrate. Parts of the p-type GaN layer and the active layer can be removed, and a transparent electrode can be formed over all or most of the remaining p-type GaN layer. A p-side electrode including a pad portion and auxiliary electrode portions can be formed on the transparent electrode layer. An n-side electrode can be formed on the exposed n-type GaN layer. On regions of the transparent electrode layer where weak light emission regions may be formed, outside independent electrodes can be provided. They can be disposed on concentric circles with the n-side electrode as a center or tangent lines thereof so as to be along the circles or the tangent lines. The outside independent electrodes can diffuse current from the p-side electrode to the n-side electrode flowing through the transparent electrode layer into the short side end portions of the transparent electrode layer, thereby decreasing the weak light emission regions.
US08390019B2 Light emitting device, semiconductor device, and method of fabricating the devices
A semiconductor device in which degradation due to permeation of water and oxygen can be limited, e.g., a light emitting device having an organic light emitting device (OLED) formed on a plastic substrate, and a liquid crystal display using a plastic substrate. A layer to be debonded, containing elements, is formed on a substrate, bonded to a supporting member, and debonded from the substrate. A thin film is thereafter formed on the debonded layer. The debonded layer with the thin film is adhered to a transfer member. Cracks caused in the debonded layer at the time of debonding are thereby repaired. As the thin film in contact with the debonded layer, a film having thermal conductivity, e.g., film of aluminum nitride or aluminum nitroxide is used. This film dissipates heat from the elements and has the effect of preventing deformation and change in quality of the transfer member, e.g., a plastic substrate.
US08390014B2 Light emitting device and light emitting device package
Disclosed is a light emitting device including a second conductive semiconductor layer; an active layer on the second conductive semiconductor layer; a first semiconductor layer on the active layer, the first semiconductor layer having at least one lateral side with a step portion; and a lateral electrode on the step portion formed at the at least one lateral side of the first semiconductor layer.
US08390012B2 Semiconductor light emitting device and method of fabricating semiconductor light emitting device
A semiconductor light emitting device has a support substrate, a light emitting element, and underfill material. The light emitting element includes a nitride-based group III-V compound semiconductor layer contacted via a bump on the support substrate. The underfill material is disposed between the support substrate and the light emitting element, the underfill material comprising a rib portion disposed outside of an end face of the light emitting element to surround the end surface of the light emitting element.
US08390008B2 LED device structure to improve light output
A light-emitting device, including a substrate; a LED element formed over the substrate including a transparent or semi-transparent electrode, a reflective electrode, and one or more layers, at least one of which is light-emitting, formed between the transparent or semi-transparent electrode and reflective electrode, the transparent or semi-transparent electrode and reflective electrode defining a single, controllable light-emitting area, wherein the LED element emits light into a waveguide defined by the transparent or semi-transparent electrode, reflective electrode, and the one or more layers; and one or more first topographical features and one or more second topographical features different from the first topographical features formed over the substrate within the single, controllable light-emitting area, wherein the first and second topographical features disrupt the waveguiding of light within the single, controllable light-emitting area to increase the emission of light in at least one direction.
US08390005B2 Apparatus and method for nanowire optical emission
An optical emitter includes at least one nanowire connected in a circuit such that current selectively flows into the nanowire. The nanowire has a length-to-diameter ratio of ten or less. A method for generating optical emission includes applying a voltage across a nanowire to inject charge carriers into the nanowire, the nanowire having a length-to-diameter ratio of ten or less; and confining the charge carriers within the nanowire by placing a high bandgap material at each end of the nanowire, wherein the charge carriers recombine to emit optical energy.
US08390002B2 Light emitting device and method of manufacturing the same
There are provided a light emitting device and a method of manufacturing the same. A light emitting device according to the present invention includes a substrate; an N-type semiconductor layer, an active layer and a P-type semiconductor layer, sequentially formed on the substrate; one or more trenches formed to expose the N-type semiconductor layer by partially removing at least the P-type semiconductor and active layers; a first insulating layer formed on sidewalls of the trenches; and a conductive layer filled in the trenches having the first insulating layer formed therein. According to the present invention, it is possible to obtain a characteristic of uniform current diffusion, and thus, light is uniformly emitted to thereby enhance the light emitting efficiency.
US08389998B2 Thin film transistor array panel and method for manufacturing the same
A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
US08389997B2 Light emitting device
The invention provides a light emitting device which is capable of displaying on both sides, has a small volume, and is capable of being used as a module. A light emitting element represented by an EL element and the like is used in a pixel portion, and two pixel portions are provided in one light emitting device. A first pixel portion has a structure to emit light only from a counter electrode side of the light emitting element. A second pixel portion has a structure to emit light only from a pixel electrode side of the light emitting element. That is, in the first pixel portion and the second pixel portion, directions of light emission are reverse in front and back.
US08389992B2 Organic thin film transistor array panel and manufacturing method thereof
A method of manufacturing a thin film transistor array panel is provided, the method includes forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrodel; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.
US08389991B2 Thin film transistor, display device, and electronic device
The present invention provides a thin film transistor using an oxide semiconductor as a channel, controlling threshold voltage to a positive direction, and realizing improved reliability. The thin film transistor includes: a gate electrode; a pair of source/drain electrodes; an oxide semiconductor layer provided between the gate electrode and the pair of source/drain electrodes and forming a channel; a first insulating film as a gate insulating film provided on the gate electrode side of the oxide semiconductor layer; and a second insulating film provided on the pair of source/drain electrodes side of the oxide semiconductor layer. The first insulating film and/or the second insulating film contain/contains fluorine.
US08389989B2 Transistor having oxide semiconductor layer and display utilizing the same
It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
US08389988B2 Display device
In order to take advantage of the properties of a display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area are necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer over the gate insulating film; a channel protective layer covering a region which overlaps with a channel formation region of the first oxide semiconductor layer; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and over the first oxide semiconductor layer. The gate electrode is connected to a scan line or a signal line, the first wiring layer or the second wiring layer is directly connected to the gate electrode.
US08389986B2 Condensed-cyclic compound and organic light-emitting device including the same
A condensed-cyclic compound and an OLED including the same, the condensed-cyclic compound represented by Formula 1 below:
US08389984B2 Organic light emitting diode display device and method of fabricating the same
An organic light emitting diode display device and a method of manufacturing thereof, the device including a substrate, the substrate including a pixel part and a circuit part; a first semiconductor layer and a second semiconductor layer on the pixel part of the substrate; a gate insulating layer on an entire surface of the substrate; gate electrodes on the gate insulating layer, the gate electrodes corresponding to the first semiconductor layer and the second semiconductor layer, respectively; source/drain electrodes insulated from the gate electrodes, the source/drain electrodes being connected to the first and second semiconductor layers, respectively; a first electrode connected to the source/drain electrodes of the first semiconductor layer; an organic layer on the first electrode; a second layer on the organic layer; and a metal catalyst layer under the first semiconductor layer.
US08389980B2 Light emitting apparatus
Provided is a light emitting apparatus in which light extraction efficiency can be improved without adversely affecting a functional layer of a light emitting device. The light emitting apparatus includes multiple light emitting devices formed on a substrate, each of the multiple light emitting devices at least including: a reflective layer; a first electrode; the functional layer including an emission layer with an emission region; and a second electrode. In which an optical waveguide including a periodic structure is formed between the emission regions and the optical waveguide includes a surface which is opposite to the substrate and is more repellent to a light emitting material liquid for forming the emission layer than the emission region.
US08389977B2 Reverse side engineered III-nitride devices
Group III-nitride devices are described that include a stack of III-nitride layers, passivation layers, and conductive contacts. The stack includes a channel layer with a 2DEG channel, a barrier layer and a spacer layer. One passivation layer directly contacts a surface of the spacer layer on a side opposite to the channel layer and is an electrical insulator. The stack of III-nitride layers and the first passivation layer form a structure with a reverse side proximate to the first passivation layer and an obverse side proximate to the barrier layer. Another passivation layer is on the obverse side of the structure. Defected nucleation and stress management layers that form a buffer layer during the formation process can be partially or entirely removed.
US08389976B2 Methods of forming carbon nanotube transistors for high speed circuit operation and structures formed thereby
Methods and associated structures of forming a microelectronic device are described. Those methods may comprise forming a channel region on a substrate, wherein the channel region comprises at least one CNT, forming at least one source/drain region adjacent the channel region, and then forming a gate electrode on the channel region, wherein a width of the gate electrode comprises about 50 percent to about 90 percent of a width of the contact region.
US08389974B2 Multiple-wavelength opto-electronic device including a superlattice
A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.
US08389972B2 Nonvolatile memory device and method of manufacturing the same
To realize miniaturization and increased capacity of memories by lowering break voltage for causing resistance change and suppressing variation in break voltage.The nonvolatile memory device (10) in the present invention includes: a lower electrode (105) formed above a substrate (100); a first variable resistance layer (106a) formed above the lower electrode (105) and comprising a transitional metal oxide; a second variable resistance layer (106b) formed above the first variable resistance layer (106a) and comprising a transitional metal oxide having higher oxygen content than the transitional metal oxide of the first variable resistance layer (106a); and an upper electrode (107) formed above the second variable resistance layer (106b), wherein a step (106ax) is formed in an interface between the first variable is resistance layer (106a) and the second variable resistance layer (106b). The second variable resistance layer (106b) is formed covering the step (106ax) and has a bend (106bx) above the step (106ax).
US08389965B2 Method and device of irradiation of logs with electron beams as a phytosanitary treatment
For quarantine treatment of a farming and forestry product for pest control, a method and a device may irradiate logs as a phytosanitary treatment with electron beams. The method may include: spreading the logs; aligning the spread logs to be flush at one end; conveying the spread and flush logs laterally; conveying the logs longitudinally through an irradiation field formed by accelerators to provide treatment of irradiation with the electron beams; throwing the irradiated logs out; and laterally conveying the logs away. The device may include a conveying device for conveying the logs, a shielding structure surrounding the conveying device, and accelerators provided in the conveying path of the conveying device. Two or more accelerators may be provided in centrosymmetry about the conveying path.
US08389964B2 Ion implanting apparatus and deflecting electrode
An ion implanting apparatus includes: an electrostatic accelerating tube for causing an ion beam extracted from an ion source to have a desirable energy, and deflecting the ion beam to be incident on a target, the electrostatic accelerating tube including deflecting electrodes provided to interpose the ion beam therebetween. The deflecting electrodes include a first deflecting electrode and a second deflecting electrode to which different electric potentials from each other are set. The second deflecting electrode is provided on a side where the ion beam is to be deflected and includes an upstream electrode provided on an upstream side of the ion beam and a downstream electrode provided apart from the upstream electrode toward a downstream side. An electric potential of the upstream electrode and an electric potential of the downstream electrode are independently set from each other.
US08389961B2 Cleaning method of radiation image conversion panel, and method of reading image information and image information reading apparatus
It is a feature that in the present invention, provided is a method of cleaning a radiation image conversion panel possessing a substrate and provided thereon, a phosphor layer, and further possessing a protective layer provided on the phosphor layer, wherein a surface of the protective layer is cleaned by moving a cleaning member, while applying a pressure of 1 mN/cm2-1 N/cm2 to the surface of the protective layer with the cleaning member. Also provided can be a method of cleaning a radiation image conversion panel to provide an image information reading method by which image information exhibiting reduced image defect and image unevenness without damaging the radiation image conversion panel can be read out.
US08389960B2 Microfluidic devices and methods
Embodiments of the present invention provide improved microfluidic devices and related apparatus, systems, and methods. Methods are provided for reducing mixing times during use of microfluidic devices. Microfluidic devices and related methods of manufacturing are provided with increased manufacturing yield rates. Improved apparatus and related systems are provided for supplying controlled pressure to microfluidic devices. Methods and related microfluidic devices are provided for reducing dehydration of microfluidic devices during use. Microfluidic devices and related methods are provided with improved sample to reagent mixture ratio control. Microfluidic devices and systems are provided with improved resistance to compression fixture pressure induced failures. Methods and systems for conducting temperature controlled reactions using microfluidic devices are provided that reduce condensation levels within the microfluidic device. Methods and systems are provided for improved fluorescent imaging of microfluidic devices.
US08389955B2 Method for thinning a sample and sample carrier for performing said method
A sample carrier (3) for thinning a sample (1) taken from e.g. a semiconductor wafer. The sample carrier comprises a rigid part (5), e.g. made of e.g. copper, with an outer boundary (6), and a supporting film (4), e.g. made of carbon, extending beyond the outer boundary. By placing the sample on the supporting film, the sample can be attached to the rigid structure using e.g. IBID. The supporting film aligns the samples when they are placed onto it. After attaching the sample to the rigid structure the sample can be thinned with e.g. an ion beam, during which thinning the supporting film is locally removed as well. The invention results in better alignment of the sample to the sample carrier, and also in more freedom how the sample is transported from the wafer to the sample carrier, e.g. with the help of an electrically charged glass needle (2). The latter eliminates the attaching/severing steps that are normally associated with the transport of a sample to a sample carrier.
US08389952B2 Particle beam irradiation apparatus and particle beam therapy system
There is provided a particle beam irradiation apparatus in which two or more pairs of scanning electromagnets are utilized so that scanning of a charged particle beam can be performed with a high accuracy and with a high flexibility in the speed, from a low speed to a high speed. In a particle beam irradiation apparatus that scans an incident charged particle beam on X-direction and Y-direction (two-direction) desired orbits perpendicular to the travelling direction of the charged particle beam and irradiates the charged particle beam onto an irradiation subject, there are provided two or more pairs of scanning electromagnets that scan a charged particle beam in the two directions; the desired orbit is given by time-series desired orbit data in which desired irradiation positions corresponding to time are determined; and command values for respective scanning electromagnets in the two or more pairs of scanning electromagnets are generated based on plural pieces of data obtained by frequency-separating the time-series desired orbit data.
US08389949B2 Particle beam therapy system and adjustment method for particle beam therapy system
The objective is to obtain a particle beam therapy system, the irradiation flexibility of which is high and that can reduce the amount of irradiation onto a normal tissue. There are provided a scanning electromagnet that performs scanning and outputting in such a way that a supplied charged particle beam is formed in a three-dimensional irradiation shape based on a treatment plan; and deflection electromagnets that switch the orbits for the charged particle beam in such a way that the charged particle beam with which scanning and outputting are performed by the scanning electromagnet reaches an isocenter through a single beam orbit selected from a plurality of beam orbits established between the isocenter and the scanning electromagnet. The distance between the scanning electromagnet and the isocenter is made long.
US08389942B2 Photomultiplier and detection systems
The invention provides a switchable photomultiplier switchable between a detecting state and a non-detecting state including a cathode upon which incident radiation is arranged to impinge. The photomultiplier also includes a series of dynodes arranged to amplify a current created at the cathode upon detection of photoradiation. The invention also provides a detection system arranged to detect radiation-emitting material in an object. The system includes a detector switchable between a detecting state in which the detector is arranged to detect radiation and a non-detecting state in which the detector is arranged to not detect radiation. The system further includes a controller arranged to control switching of the detector between the states such that the detector is switched to the non-detecting state while an external radiation source is irradiating the object.
US08389941B2 Composite gamma-neutron detection system
The present invention provides a gamma-neutron detector based on mixtures of thermal neutron absorbers that produce heavy-particle emission following thermal capture. The detector consists of one or more thin screens embedded in transparent hydrogenous light guides, which also serve as a neutron moderator. The emitted particles interact with the scintillator screen and produce a high light output, which is collected by the light guides into a photomultiplier tube and produces a signal from which the neutrons are counted. Simultaneous gamma-ray detection is provided by replacing the light guide material with a plastic scintillator. The plastic scintillator serves as the gamma-ray detector, moderator and light guide. The neutrons and gamma-ray events are separated employing Pulse-Shape Discrimination (PSD). The detector can be used in several scanning configurations including portal, drive-through, drive-by, handheld and backpack, etc.
US08389936B2 Method for inspecting a sample
The invention describes a method for inspecting samples in an electron microscope. A sample carrier 500 shows electrodes 504, 507 connecting pads 505, 508 with areas A on which the sample is to be placed.After placing the sample on the sample carrier, a conductive pattern is deposited on the sample, so that voltages and currents can be applied to localized parts of the sample.Applying the pattern on the sample may be done with, for example, Beam Induced Deposition or ink-jet printing.The invention also teaches building electronic components, such as resistors, capacitors, inductors and active elements such as FET's in the sample.
US08389935B2 Charged particle beam apparatus permitting high-resolution and high-contrast observation
A lower pole piece of an electromagnetic superposition type objective lens is divided into an upper magnetic path and a lower magnetic path. A voltage nearly equal to a retarding voltage is applied to the lower magnetic path. An objective lens capable of acquiring an image with a higher resolution and a higher contrast than a conventional image is provided. An electromagnetic superposition type objective lens includes a magnetic path that encloses a coil, a cylindrical or conical booster magnetic path that surrounds an electron beam, a control magnetic path that is interposed between the coil and sample, an accelerating electric field control unit that accelerates the electron beam using a booster power supply, a decelerating electric field control unit that decelerates the electron beam using a stage power supply, and a suppression unit that suppresses electric discharge of the sample using a control magnetic path power supply. Thus, whether landing energy of an electron beam varies widely, the electron beam can be focused with the electromagnetic superposition type objective lens approached to the sample.
US08389933B2 Mass analyzer utilizing a plurality of axial pseudo-potential wells
A mass analyser is provided comprising a plurality of electrodes having apertures through which ions are transmitted in use. A plurality of pseudo-potential corrugations are created along the axis of the mass analyser. The amplitude or depth of the pseudo-potential corrugations is inversely proportional to the mass to charge ratio of an ion. One or more transient DC voltages are applied to the electrodes of the mass analyser in order to urge ions along the length of the mass analyser. The amplitude of the transient DC voltages applied to the electrodes is increased with time and ions are caused to be emitted from the mass analyser in reverse order of their mass to charge ratio. A first AC or RF voltage is arranged to provide optimal pseudo-potential corrugations while a second AC or RF voltage is arranged to provide optimal radial confinement of ions within the mass analyser.
US08389932B2 Stacked-electrode peptide-fragmentation device
A chemical processing apparatus includes a fragmentation device that includes a linear set of stacked electrodes and a voltage control module that forms DC potential wells of opposite polarity for mutual confinement of opposite polarity ions. A method of protein analysis includes confining positive peptide ions and negatively charged reagent anions in, respectively, first and second DC potential wells in a fragmentation device, mixing the ions, in the fragmentation device, and analyzing ion fragments formed in the mixture.
US08389929B2 Quadrupole mass spectrometer with enhanced sensitivity and mass resolving power
A novel method and mass spectrometer apparatus is introduced to spatially and temporally resolve images of one or more ion exit patterns of a multipole instrument. In particular, the methods and structures of the present invention measures the ion current as a function of time and spatial displacement in the beam cross-section of a quadrupole mass filter via an arrayed detector. The linearity of the detected quadrupole ion current in combination with it reproducible spatial-temporal structure enables the deconvolution of the contributions of signals from individual ion species in complex mixtures where both sensitivity and mass resolving power are essential.
US08389928B2 X-ray detector comprising a directly converting semiconductor layer and calibration method for such an X-ray detector
An X-ray detector includes a directly converting semiconductor layer for converting an incident radiation into electrical signals with a band gap energy characteristic of the semiconductor layer, and at least one light source for coupling light into the semiconductor layer, wherein the generated light, for the simulation of incident X-ray quanta, has an energy above the band gap energy of the semiconductor layer. One embodiment includes at least one evaluation unit for calculating an evaluation signal from the electrical signals generated when the light is coupled into the semiconductor layer, and at least one calibration unit for calibrating at least one pulse discriminator on the basis of the evaluation signal. This provides the prerequisites for a rapidly repeatable calibration of the X-ray detector taking into account of the present polarization state without using X-ray radiation. Another embodiment additionally relates to a calibration method for such an X-ray detector.
US08389923B2 Photoelectric conversion device, image sensing system, and method of manufacturing photoelectric conversion device
A photoelectric conversion device having a pixel array region in which a plurality of pixels each including a photoelectric converter are arrayed, and a peripheral region arranged around the pixel array region, the device comprising a multilayer wiring structure which is arranged on a semiconductor substrate, and includes wiring layers in the peripheral region more than wiring layers in the pixel array region, and a plurality of interlayer lenses which is arranged on the multilayer wiring structure in the pixel array region, wherein the plurality of interlayer lenses each includes a first insulator, and a second insulator arranged to cover the first insulator, and having a refractive index higher than the first insulator, and wherein the first insulator in each of the plurality of interlayer lenses, and an uppermost interlayer insulating film in the peripheral region in the multilayer wiring structure are made of an identical material.
US08389921B2 Image sensor having array of pixels and metal reflectors with widths scaled based on distance from center of the array
An image sensor in accordance with embodiments disclosed herein includes an array of imaging pixels, an insulator layer, and a plurality of metal reflectors. The array of imaging pixels are disposed within a semiconductor layer, where each imaging pixel in the array of imaging pixels includes a photosensitive element configured to receive light from a backside of the image sensor. The insulator layer is disposed on a frontside of the semiconductor layer and the plurality of metal reflectors are disposed within the insulator layer to reflect the light to a respective photosensitive element. A width of each of the plurality of metal reflectors is equal to a width of a metal reflector at the center of the array multiplied by a scaling factor, where the scaling factor is dependent on a distance of the metal reflector from the center of the array.