Document Document Title
US08340146B2 Radiation-emitting semiconductor chip
The invention relates to a radiation-emitting semiconductor chip, comprising an active zone for generating radiation having a wavelength lambda and a structured region having irregularly arranged structure elements which contain a first material having a first refractive index n1 and which are surrounded by a medium comprising a second material having a second refractive index n2. A method for producing a semiconductor chip of this type is furthermore specified.
US08340139B2 Method and system for weight determination in a single channel (SC) multiple-input multiple-output (MIMO) system for WCDMA/HSDPA
In wireless systems, method and system for weight determination in a single channel (SC) multiple-input multiple-output (MIMO) system for WCDMA/HSDPA are provided. Models of signals received in multiple receive antennas may be determined in a single weight baseband generator (SWBBG) from propagation channel estimates and noise statistics. The models may be utilized to determine combined signal and noise components. The combined signal and noise components may be utilized to determine a plurality of signal-to-noise ratio (SNR) or signal-to-interference-and-noise ratio (SINR) values for various phase and/or amplitude factors. The SINR may be utilized when either single or multiple interfering signals are present. A highest of the SINR or SNR values may be selected to determine a channel weight to apply to the additional receive antennas.
US08340136B2 Method of transmitting data in a communication system
A method of transmitting over a network a signal comprising a plurality of data elements the method comprising; receiving the signal at a terminal; determining a transmission delay of at least one data element; estimating a first component of the transmission delay; determining a second component of the transmission delay by removing the first component of the transmission delay from the transmission delay; and determining a receiver delay to be applied between receiving at the terminal and outputting from the terminal one of said plurality of data elements, in dependence on the second component of the transmission delay.
US08340135B2 Apparatus and method for coding an information signal into a data stream, converting the data stream and decoding the data stream
More customization and adaptation of coded data streams may be achieved by processing the information signal such that the various syntax structures obtained by pre-coding the information signal are placed into logical data packets, each of which being associated with a specific data packet type, and by defining a predetermined order of data packet types within one access unit. The consecutive access units may correspond to different time portions of the information signal. By defining the predetermined order it is possible, at decoder's side, to detect the borders between successive access units even when removable data packets are removed from the data stream between data stream source and decoder without incorporating any hints into the datastream. Therefore, decoders surely detect the access unit beginnings and endings and are not liable to buffer overflow.
US08340132B2 Method for contention resolution in time-hopping or frequency-hopping
A method of transmitting data, whereby the data is transmitted by using a multiple access frame divided in logical slots. Each data packet is divided into k units which are decoded by an (n,k) decoder, producing n−k redundant units. The n units are transmitted within a multiple access frame in n different slots according to a time-hopping pattern, a frequency-hopping pattern or a combination of both.At the receiver side lost or corrupted data packets are recovered by using the redundant units, whereby the presence of a unit for each slot is detected. If a unit is present in a slot and has been transmitted without collisions, this unit is recovered. If a sufficient k+δ amount of units composing a data packet is recovered, the packet level decoder is used to recover the remaining n−k−δ units which experienced collisions in the respective slots.
US08340131B2 Efficient broadcast of data in a communication network
A system (and a method) are disclosed for reliably disseminating a state of a node in a large network consisting of nodes with constrained resources. The system comprises a process embodied by a state machine comprised of an advertise state, a request state, and a share state. The system processes input events, mutates its internal state, and outputs side effects. The outputs from one node in the network may become inputs events to one or more other nodes in the network. Viral dissemination is an emergent behavior across the nodes in a network that all independently and continuously perform these input processings, state mutations, and output side effects.
US08340129B2 Method for compressing a real-time transport protocol header extension field
A method for compressing an extension field to be selectively included in a Real-time Transport Protocol (RTP) header is provided. It is determined whether an RTP header extension field is included in the RTP header. Information indicating a determination result is recorded. Profile information of the RTP header extension field is recorded. Total length information of the RTP header extension field is recorded. Information indicating whether changed data exists is recorded using a header extension information map.
US08340128B2 Apparatus and method for generating and parsing MAC PDU in a mobile communication system
An apparatus and method for generating and parsing a MAC PDU in a mobile communication system are provided in which LCIDs of MAC SDUs to be multiplexed are checked, the length of an LF is determined for each of the MAC SDUs, referring to LF lengths predetermined for the LCIDs, a MAC header including the LCIDs and LFs of the determined lengths for the MAC SDUs is generated, and a MAC PDU is generated by attaching the MAC header to payload including the MAC SDUs. During the MAC header generation, if a padding size required for the MAC PDU generation calculated taking into account the absence of a last LF in the MAC header is larger than the length of the last LF, the last LF is included in the MAC header, the required padding size is recalculated, taking into account the inclusion of the last LF, and a padding is added according to the re-calculated padding size.
US08340125B2 Method and apparatus for block acknowledgement in a communication network
A method includes receiving a request for bandwidth from a first network node of a coordinated network and broadcasting a first transmission schedule to a plurality of network nodes including the first network node. The first transmission schedule allocates bandwidth for the first network node to transmit data to a second network node. An acknowledgement (ACK) message is received from the second network node identifying that the second network node successfully received the data from the first network node.
US08340123B2 Multi-channel transceiver module card
In one embodiment, a networking device may include a network port and be configured to receive a transceiver module card in the network port. The networking device may detect whether the transceiver module card is a single channel card or a multi-channel card, where the single channel card includes a single transceiver module and the multi-channel card includes multiple transceiver modules. The networking device may transmit data to the transceiver card either as a single channel de-multiplexed over multiple lanes or as multiple independent channels corresponding to the multiple lanes based on whether the transceiver module card is the single channel card or the multi-channel card. The networking device may transmit data over each of the lanes at one data rate regardless whether of the transceiver module card is the single channel card or the multi-channel card.
US08340122B2 Reference signal transmission method for downlink multiple input multiple output system
A reference signal transmission method in a downlink MIMO system is disclosed. The downlink MIMO system supports a first UE supporting N transmission antennas among a total of M transmission antennas (where M>N) and a second UE supporting the M transmission antennas. The method includes transmitting, by a base station (BS), subframe-associated information which designates a first subframe in which data for the first UE and the second UE is transmitted and a second subframe in which data only for the second UE can be transmitted within a radio frame having a plurality of subframes, and transmitting the first subframe and the second subframe. Reference signals corresponding to antenna ports ‘0’ to ‘N−1’ of the N antennas are mapped to the first subframe, and reference signals corresponding to antenna ports ‘0’ to ‘M−1’ of the M antennas are mapped to the second subframe.
US08340120B2 User selectable multiple protocol network interface device
An Ethernet/Fiber Channel network interface device which can be configured by a user to operate on an FC SAN, a CEE network or both. In one embodiment the configuration can be done using jumpers or connections to the pins of a chip, thus allowing a manufacturer to only inventory one device for use with either or both networks. In a second embodiment the configuration can be done in software by setting registers and memory values on the device. This embodiment allows the device to be changed between configurations without removing it from the server or blade. The devices according to the preferred embodiments further reduce power consumption by shutting down portions of the chip not needed based on the configuration of the device.
US08340118B2 System and method for multiplexing fractional TDM frames
A multiplexing card comprises a primary TDM port over which TDM frames are communicated to and from a networking device, a plurality of secondary TDM ports over each of which fractional TDM frames are communicated to and from a plurality of digital subscriber line (DSL) units; and a logic device coupled between the primary TDM port and the plurality of secondary TDM ports, wherein the logic device is operable to map timeslots from each of the fractional TDM frames received over the plurality of secondary TDM ports to timeslots in a TDM frame communicated over the primary TDM port, and to map each of a plurality of blocks of timeslots in a TDM frame received over the primary TDM port to one of the plurality of secondary TDM ports; wherein the combined number of timeslots containing user data in the fractional TDM frames received over the plurality of secondary TDM ports is less than or equal to the maximum number of available timeslots in the corresponding TDM frame communicated over the primary TDM port.
US08340115B2 Apparatus and method for combined rate and TX antenna selection mechanism
A method and apparatus for a combined rate and transmission (TX) antenna selection mechanism are described. In one embodiment, the method includes switching between TX antenna combination during a high throughput (HTP) burst transmission of, for example, a physical layer (PHY) aggregated packet. In one embodiment, switching between TX antenna pairs of various combinations of two out of three antennas is performed during the HTP burst transmission. Following the HTP burst transmission, in one embodiment, a block acknowledgement (ACK) is received regarding the HTP burst transmission. In one embodiment, the block ACK is analyzed to select a TX antenna combination. In one embodiment, a TX antenna combination having a lowest packet error rate (PER) is selected according to the block ACK. Other embodiments are described and claimed.
US08340114B2 Mobile communication terminal, mode switching method, and network switching method
In order to input/output only necessary information in accordance with the form of application, a mobile phone includes: a wireless circuit 22 to connect to a first network in order to communicate with a device connected to the first network; a wireless LAN circuit 23 to connect to a second network different from the first network in order to communicate with a device connected to the second network; and a setting mode switching portion 21 to switch between a first setting mode capable of activating wireless circuit 22 and wireless LAN circuit 23 and a second setting mode capable of activating only wireless circuit 22 among wireless circuit 22 and wireless LAN circuit 23.
US08340110B2 Quality of service provisioning for wireless networks
A technique for improving quality of service involves dynamically provisioning quality of service parameters. An example according to this technique is a system including a server and an access point. The server provisions quality of service parameters restricting the station's transmission of data through the access point to one or more access classes of varying priority.
US08340104B2 Communication network system, path calculation device, and communication path establishment control method
In an MPLS or GMPLS network, links for hops of a communication path and adaptation to be implemented on the border of management domains or layers are automatically appropriately selected based on a service type or a requirement for maintenance. First, a unit that appends an identifier of a service to be provided and an attribute of the service to a communication path establishment control message, and requests path establishment is installed in a source node. Secondly, a unit that determines a requirement for maintenance of the communication path and adaptation on the basis of the service identifier and/or service attribute is installed in each node. Thirdly, maintenance attributes of network resources are compared with the requirement for maintenance in order to determine links and nodes through which the communication path passes. The determined links, nodes, and adaptation are designated as action parameters for a switching unit and/or interface unit.
US08340102B2 Apparatus and method for providing a network termination point
Apparatus and method for providing a termination point for service emulation instances in an access network is provided. In an embodiment, the service emulation instances are implemented utilizing, for example, pseudowires. Communications to and from the access network are aggregated and transmitted via one or more pseudowires to a service emulation instance terminator. The service emulation instance terminator converts the traffic to its native form and, if necessary, converts the traffic to a different type of format or service. The service emulation instance terminator then frames the traffic for the appropriate type of service and transmits the traffic to the service edge. Traffic received from the service is removed prepended with a pseudowire label and aggregated with other traffic. The aggregated traffic is transmitted to the customer via the access network. If necessary, an interworking function may convert the traffic from one type of service to another type of service. Further, functionalities of equipment such as frame relay switching or Asynchronous Transfer Mode (ATM) switching may be realized in the service emulation instance terminator.
US08340101B2 Multiplexed data stream payload format
A network component comprising a processor configured to implement a method comprising promoting the communication of a frame of octet-sized timeslots, wherein the timeslots are configured to carry a plurality of data types. Also disclosed is a method comprising communicating a high priority data and a low priority data in a frame comprising a plurality of octet-sized timeslots, wherein each timeslot is assigned to the high priority data or the low priority data, wherein the high priority data is provided in the timeslots assigned to the high priority data, and wherein the low priority data is provided in the timeslots assigned to the low priority data. Also disclosed is a network component comprising a processor configured to implement a method comprising recognizing the reception of a plurality of data streams each having a priority, and promoting the multiplexing of the data streams based on the priority of each data stream.
US08340099B2 Control of background data transfers
Control of background data transfers is described. In an embodiment, a background data transfer is controlled at a receiver node by measuring a time period taken to receive from a sender node a data sequence of the same size as a receive window. The time period is used to evaluate available network capacity, and the network capacity used to calculate a new window size. The new window size is applied and communicated to the sender node. In another embodiment, a background data transfer is controlled at a receiver node by measuring a quantity of data received from a sender node during a first control interval. The measured quantity is used to evaluate available network capacity, and the network capacity used to calculate a new receive window size and a second control interval duration. The new window size is applied for the second control interval, and communicated to the sender node.
US08340098B2 Method and apparatus for delivering compressed video to subscriber terminals
Method and apparatus for distributing a content stream from a headend to a subscriber terminal is described. In one example, the content stream is processed at the headend to generate a sequence of instances having successively staggered reference frames. A request for the content streams is received from the subscriber terminal at an initial time. In response to the request, an instance from the sequence of instances having the first reference frame after the initial time is selected. The selected instance is transmitted towards the subscriber terminal.
US08340093B2 System and method for monitoring physical layer connectivity
Embodiments of the present inventions are directed to a system and method for monitoring connectivity between a switch having switch ports and a patch panel having patch panel ports connected by removable cords. The system may include an identification device physically shaped to fit a cavity of the switch port, a communication cord having identification wires to connect the switch port to a patch panel port, a microcontroller mounted on the patch panel to read a unique identification number of the identification device in order to identify a connection between the switch port and the patch panel port and a management station to receive the unique identification from the microcontroller and to store data regarding the connection of the switch port and the patch panel port.
US08340092B2 Switching system and method in switching system
A switching system includes a data collection device, one or more switching devices. The data collection device is for collection of first data subject to specific processing. The switching devices directly or indirectly connected to the data collection device. At least one of the switching devices includes a determination module that determines whether received data is the first data or is second data which is not subject to the specific processing, and a marking module that puts first marking on the received data determined to be the first data. The switching devices respectively includes a transferring processor that executes a first transfer process for sending the received data to the data collection device when the received data has the first marking, and a second transfer process that sends the received data to the specified destination when the received data does not have the first marking.
US08340081B2 Communication apparatus for providing services to a communication device through a private base station
A communication apparatus provides services to a communication device. The communication apparatus comprises a private base station, such as a Home Node B, for communicating with a communication device authorized to use the private base station and a gateway, such as a Home Node B gateway, communicatively coupled to the private base station for providing access to an IP Multimedia Subsystem, IMS, network and at least one other communication network, such as a Circuit Switched, CS, network. The private base station is arranged to select a route for providing a service to the communication device through the private base station and gateway, the selected route being one of a route between the communication device and the IMS network and a route between the communication device and the at least one other communication network. The private base station is arranged to select a route based on the service to be provided.
US08340078B1 System for concealing missing audio waveforms
In one embodiment, a method can include: (i) establishing an internet protocol (IP) connection; (ii) forming a buffered version of a plurality of voice frame slices from received audio packets; and (iii) when an erasure is detected, performing a packet loss concealment (PLC) to provide a synthesized speech signal for the erasure, where the PLC can include: (a) identifying first and second pitches from the buffered version of the plurality of voice frame slices; and (b) forming the synthesized speech signal by using the first and second pitches, and more if needed, followed by an overlay-add (OLA).
US08340068B2 Method and system for enabling rendering of electronic media content via a secure ad hoc network configuration utilizing a handheld wireless communication device
A handheld wireless communication device (HWCD) establishes an ad hoc network comprising interconnected networks for a user. The HWCD gains access to content on a first device and controls communication of the content from the first device via the HWCD to a second device. The HWCD enables the second device to consume the content. The content may be streamed from the first device via the HWCD to the second device. The first device is a service provider network device or other network device. The access may be authenticated and/or secure. Secure access to the content is extended from the first device to the second device. The ad hoc network is configured and/or reconfigured until communication is complete. The HWCD comprises multiple wireless interfaces. The ad hoc network comprises a PAN, WLAN, WAN and/or cellular network. The HWCD may hand-off among base stations during communication of the content.
US08340063B2 Wireless communication device and computer program
A wireless communication device communicable with a first type and a second type of networks based on a first type and a second type wireless setting data respectively, includes: an obtaining section obtaining an identifier of an access point when a detection section detects the disconnection with the second type network through a certain access point; and a trial section trying to connect with the second type network through the certain access point if at least one second type wireless setting data stored in the second storage includes the obtained identifier, and the trial section trying to connect with the first type network through the certain access point any of the second type wireless setting data stored in the second storage does not includes the obtained identifier but the first type wireless setting data stored in the first storage includes the obtained identifier.
US08340062B2 Uncontrolled spatial multiple access in wireless networks
An uncontrolled spatial multiple access system and method facilitating spatial multiple access for multiple devices in a wireless local-area network (WLAN). Embodiments of the system and method increase throughput of the wireless network by facilitating concurrent encoded frame transmission. Decoding of the quasi-overlapped frames is achieved using a chain decoding technique that takes data streams (or signals) containing the quasi-overlapping encoded frames and isolates each encoded frame so that the frame can be decoded. Quasi-overlapped frames means that the frames are overlapped in the body of the frame but not at the preamble (or headers) of the frames. Embodiments of the chain decoding also use interference nullifying and interference cancellation to enable concurrent quasi-overlapping transmission. A carrier counting multiple access technique of embodiments of the system and method allow wireless networks to retain their asynchronous nature while supporting spatial multiple access and maintain backwards compatibility with the IEEE 802.11 standard.
US08340060B2 OFDMA-based co-channel femtocell
A femtocell increases efficiency and coverage of a macrocellular network operating in a co-channel manner within the macrocell spectrum by selecting subcarriers for its mobile station using both the subcarrier allocation map received from the macrocell and a spectrum sensing operation. Interference is avoided by selecting only subcarriers not allocated by the macrocell and subcarriers allocated to users not nearby to the femtocell. Interference is eliminated from the received signals using co-channel interference avoidance techniques. Selection of subcarriers for femtocell use may take into consideration inter-carrier interference detected.
US08340059B2 Response system and method with dynamic personality assignment
A response system and method of receiving remotely entered user input selections at a central location includes providing at least one base unit and a plurality of response units. A user input selection is received with each of the response units. The user input selection is communicated to the at least one base unit utilizing wireless communication. Personality data is received at each of the response units. The at least one base unit communicates with each of the response units according to the personality data of the particular one of the response units to receive a user input selection. The personality data is received by an individual one of the response units communicating with the at least one base unit at close proximity to provide personality data to that response unit.
US08340056B2 Systems and methods for interoperability positive train control
A method for implementing communications in a railroad communications system having a base station radio and remote radios, the remote radios including a mobile radio and a wayside radio. The method includes assigning a common radio communications channel for allowing a remote radio to connect with the base station radio using a carrier sense multiple access (CSMA) communications protocol and assigning a local channel for allowing communications between the radio base station and the remote radios and between the remote radios, wherein communications on the local channel utilizes a selected one of fixed time division multiple access (FTDMA) and dynamic time division multiple access (DTDMA) communications protocols.
US08340055B1 Prioritization of final page attempt to mobile station
Methods and systems are disclosed herein that may help to increase the paging success rate, among other benefits. An exemplary method involves a radio access network: (a) detecting a page-shedding event, wherein the page-shedding event comprises an overhead message being sent in a first paging-channel slot instead of a page to a mobile station that was previously scheduled for the first paging-channel slot; (b) in response to detecting the page-shedding event, the radio access network determining whether or not it is a last attempt to send the page that was previously scheduled for the first paging-channel slot; (c) if it is not the last attempt, the radio access network scheduling a next attempt to send the page according to a standard scheduling procedure; and (d) if it is the last attempt, the radio access network rescheduling the last attempt to send the page according to an alternate scheduling procedure.
US08340053B2 Wireless sensor network and method for performing communication therein
A method for performing communication in the wireless sensor network is disclosed. The upper node transmits a beacon message to the lower nodes, wherein the beacon message distinguishes an indirect transmission interval, in which the upper node transmits downlink data to the plurality of lower nodes, from a direct transmission interval adjacent to the indirect transmission interval, in which the upper node receives uplink data from the plurality of lower nodes. The lower nodes determine the indirect transmission interval and the direct transmission interval from the received beacon message. The downlink data is transmitted from the upper node to the lower nodes in the indirect transmission interval. The uplink data is transmitted from the lower nodes to the upper node in the direct transmission interval. When communication is performed between the upper node and the lower nodes, the data can be efficiently transmitted from the upper node to the lower nodes.
US08340046B2 Method and apparatus for associating a packet with an H-ARQ channel identifier
Method and apparatus are provided for transmitting control information to a mobile station. A persistent assignment is transmitted to a mobile station, wherein the persistent assignment includes a plurality of hybrid automatic repeat request (H-ARQ) channel identifiers (ACIDs). A subsequent assignment including an ACID derived from the plurality of ACIDs is transmitted to the mobile station. In another aspect of the invention, a mobile station receives from a base station a persistent assignment including a plurality of ACIDs, and a subsequent assignment including an ACID derived from the plurality of ACIDs.
US08340045B2 Method and apparatus for mitigating interference in a wireless communication system
Techniques to mitigate inter-cell interference using joint time and frequency division are described. A frequency band is divided into multiple non-overlapping frequency subbands. The transmission timeline is divided into Tin and Tout time intervals. Data is exchanged with users in at least one inner region of a cell on the entire frequency band in the Tin time intervals. Data is exchanged with users in multiple outer regions of the cell on the multiple frequency subbands in the Tout time intervals. The frequency band may be partitioned into three frequency subbands. Data may then be exchanged with users in first, second and third outer regions on first, second and third frequency subbands, respectively. The regions in which the users are located may be determined based on pilot and/or other measurements.
US08340044B2 Apparatus and method of generating and maintaining orthogonal connection identifications (CIDs) for wireless networks
A first device is configured to select and utilize a connection identifier (CID) for a peer-to-peer communication connection between the first device and a second device in a wireless communications network. The CID is selected from a predetermined set of a plurality of CIDs. Prior to selecting the connection identifier, the first device monitors a CID broadcast channel to determine whether the CID is being utilized by other nearby connections. If it is determined that the CID is being utilized by another connection in the proximity, a different (unused) CID is selected. A transmission request is transmitted to the second device using a first transmission resource unit within a traffic management channel slot, the first transmission resource unit being determined as a function of the selected CID. The first device transmits traffic data to the second device in a traffic channel slot corresponding to the traffic management channel slot.
US08340043B2 Wireless communication system, communication device, and communication method
When transmission of uplink control information is necessary, a transmission processor (a14) allocates the uplink control information to one of radio resources assigned by a base station device, and transmits the uplink control information.
US08340038B2 Method for time frequency spreading in a femtocell network for interference reduction
A femtocell network uses idle resource blocks of a data frame to reduce interference by spreading the resource blocks of the users over the available spectrum. Spreading may be achieved by repeating the transmission using a number of the resource block groups. As a result, (a) more robustness is obtained against interference; (b) transmission power levels may be decreased because of the spreading, resulting in reducing interference between nearby femtocells and between a macrocell and a femtocell. Other methods of spreading such a frequency or time slot hopping may also be used.
US08340037B2 Methods and apparatuses for generating and parsing continuous resource allocation signaling
A method for generating continuous resource allocation signaling comprises: a sender determines a value of the total number of resource blocks NRB in a system according to the total resource number in the system and determines, according to the amount and location of the total resources occupied by the continuous resources allocated to the target user equipment, the number of continuous resource blocks allocated to the user equipment LCRBs and the value of the index number of the starting resource block RBstart in the continuous resource blocks allocated to the user equipment; the sender compares LCRBs−1 with └NRB/2┘ to compute the value RIV of the resource allocation signaling of the user equipment; if the LCRBs−1 is greater than the └NRB/2┘, then the RIV is NRB(NRB−LCRBs+1)+(NRB−1−RBstart); else the RIV is NRB(LCRBs−1)+RBstart; and the resource allocation signaling of the target user equipment is generated according to RIV and transmitted. An apparatus for generating continuous resource allocation signaling, and a method and an apparatus for parsing continuous resource allocation signaling, are also disclosed. The present invention ensures that under any resource allocation situation the overhead for resource allocation signaling is always ceil ( log 2 ⁢ N · ( N + 1 ) 2 ) .
US08340035B2 Method and apparatus for changing communication link between source devices and sink devices
Provided is a method of changing a communication link between source devices and sink devices. The method includes in a first downlink period, broadcasting an uplink period allocation message to the sink devices and passive source devices by an active source device, which establishes a communication link with a primary sink device from among the sink devices; during a first uplink period, broadcasting by a primary passive source device a link set message for establishing a communication link with the primary sink device to all the source devices in the network; during a second downlink period, relaying the link set message to all the sink devices in the network, wherein the link set message is relayed by the active source device; and during a second uplink period, establishing a communication link between the primary sink device and the primary passive source device by the primary sink device.
US08340034B1 Bluetooth and wireless LAN arbitration
Bluetooth and wireless LAN arbitration is described. In embodiments, a communication device includes a Bluetooth device for Bluetooth communication according to Bluetooth protocol, and includes a wireless LAN device for network communication according to wireless network protocol. An antenna switching circuit connects the Bluetooth device to an antenna for the Bluetooth communication, and connects the wireless LAN device to the antenna for the network communication. An arbitration control system arbitrates when the Bluetooth device is connected to the antenna via the antenna switching circuit and when the wireless LAN device is connected to the antenna via the antenna switching circuit.
US08340029B2 Resource allocation in wireless multi-hop relay networks
Technologies that, among other things, provide resource allocation in multi-hop wireless networks with relay stations and can be used to supply information to link data packets with a respective resource allocation.
US08340026B2 Transmitting data in a mobile communication system
The present invention is related to transmitting data in a mobile communication system. Preferably, the present invention comprises transmitting first data to a receiving side and receiving acknowledgment information for indicating whether the first data was successfully transmitted to the receiving side. If the first data was not successfully transmitted to the receiving side, the method further comprises determining whether an amount of available radio resources is sufficient for retransmitting the first data to the receiving side, retransmitting the first data to the receiving side if the amount of available radio resources is sufficient to retransmit the first data, reconfiguring the first data into at least one second data if the amount of available radio resources is insufficient to retransmit the first data, wherein the at least one second data can be transmitted to the receiving side using the amount of available radio resources, and transmitting the at least one second data to the receiving side.
US08340018B2 Wireless communication system, radio base station apparatus and radio terminal apparatus
A wireless communication system comprises radio base station apparatuses each of which transmits an estimation pilot in advance for estimating the quality of a downlink communication after a spatial signal processing performed after a time unified among the radio base station apparatuses; and radio terminal apparatuses each of which receives the estimation pilot to determine the quality of the downlink communication, thereby reporting the determined downlink communication quality to the radio base station apparatus via an uplink channel. The estimation pilot is transmitted at the same time and frequency established among the radio base station apparatuses by use of the same directivity beam as used for transmitting the data after the unified time.
US08340016B1 Flexible forward and return capacity allocation in a hub-spoke satellite communication system
A method for conducting communications via a satellite includes providing a hub-spoke spot beam group. The hub-spoke spot beam group includes at least one fixed location spot beam illuminating a location containing a gateway terminal and at least one fixed location spot beam illuminating a location containing at least one user terminal. The satellite comprises a pathway associated with the hub-spoke spot beam group. At least one receive-side switch is sequentially switched to connect an input of the pathway with different spot beams within the hub-spoke spot beam group. At least one transmit-side switch is sequentially switched to connect an output of the pathway with different spot beams within the hub-spoke spot beam group. Beam switching patterns support both forward and return traffic within a frame.
US08340012B2 Device and method for controlling user equipment access to services of the MBMS type offered by a mobile network
A device for controlling the access of user equipments to broadcast MBMS-type services includes i) a detector for determining whether general information, related to a MBMS service and broadcast by the radio access network, contains configuration information for a MICH-type, notification transport channel dedicated to the MBMS service and ii) a controller for either forcing the user equipment to periodically monitor a MCCH-type logical channel which carries control information related to the service, in the event that the configuration information for the MICH channel is not determined, in order to retrieve information necessary for accessing the MBMS service; or at least suggesting that the user equipment monitor the MICH channel in the event that its configuration information is determined, in order to retrieve update information for the MCCH channel making it possible to monitor the MCCH channel, so as to retrieve the information necessary for accessing the MBMS service.
US08340011B2 Methods and apparatuses for increasing data transmission efficiency in a broadcast network
A method for increasing data transmission efficiency in a broadcast network having at least one unicast transmission link and at least one multicast transmission link to a mobile device, the method comprising: identifying a viewing trend based upon monitored viewing activity of first content data by a first plurality of users over the unicast transmission link; determining, based upon the identified trend, that a viewing audience will exceed a target threshold for second content data; and in response to the determination, broadcasting the second content data to a second plurality of users over the multicast transmission link to increase data transmission efficiency in the broadcast network. This method may also be used to promote the dissemination of useful or popular information such as service awareness as part of marketing activities.
US08340010B2 Method and system for energy efficient synchronization in packet based networks
Aspects of a method and system for energy efficiency synchronization packet based networks are provided. In this regard, an amount that a clock of a network device drifts between consecutive communications of one or more synchronization packets may be determined, and transitions of the network device into and/or out-of an energy-saving mode of operation may be controlled based on the determination. Additionally or alternatively, the transitions may be controlled based on a number of times that synchronization packets are communicated between the network device and a link partner. An average difference between the clock of the network device and a reference clock may be calculated, and the transitions may be controlled based on the calculated average.
US08340008B2 Fault tolerance in wireless networks
A network includes a plurality of logical access entities. Each access entity includes two or more communication interfaces. The network further includes a plurality of logical node entities. Each logical node entity includes two or more communication interfaces that are configured to wirelessly communicate in a redundant manner with any of the logical access entities. In an embodiment, a communication degradation in the network is assessed, and the network is configured as a function of that assessment to provide fault tolerance within the network.
US08340007B2 Wireless device, pairing method, and unpairing method
A wireless device triggers pairing or un-pairing between the wireless device and another wireless device. The wireless device further exchanges media access control (MAC) addresses, pairing magic numbers (PMNs), and pairing indices with the another wireless device so as to establish the pairing with the another wireless device upon the condition that the wireless device triggers the pairing. The wireless device further exchanges the MAC addresses, the PMNs, and the pairing indices with the another wireless device so as to establish the unpairing with the another wireless device upon the condition that the wireless device triggers the unpairing. The pairing magic numbers are operable to identify the pairing between the wireless device and the another wireless device. The pairing indices are operable to launch the MAC addresses, the PMNs, and the pairing indices.
US08340005B1 High speed packet interface and method
A high speed multi-lane serial interface and method for constructing frames for such an interface are provided. Frames are constructed for transmission on a multi-lane serial interface. For each of a plurality of transmit channels, packets are fragmented into fragments. Meta-frames are generated having a size defined by a constant meta-frame length×number of lanes, each frame having a meta-frame separator and a payload. Per-transmit channel flow control information is received. Each payload has a plurality of bursts, each burst comprising a burst control word and an associated data burst, the burst control word identifying one of said transmit channels to be transmitted on the associated data burst, each data burst comprising one of the fragments for the transmit channel identified in the associated burst control word. The channels to transmit in a given meta-frame are selected as a function of the received flow control information.
US08340003B2 H-ARQ acknowledgment detection validation by re-decoding
Systems and methodologies are described that facilitate reliably receiving a sequence of data packets in a wireless communications environment. In particular, mechanisms are provided that enhance hybrid automatic repeat request protocols through validation of acknowledgment message detection by re-decoding. A transmitter sends a data packet from a sequence of packets in one or more data transmissions. A receiver acknowledges the data packet upon obtaining sufficient transmissions to decode the packet. The receiver re-decodes a successive data transmission in combination with previously received transmissions to validate if the transmitter detected the acknowledgment.
US08339995B2 Network sync planning and failure simulations
The invention is directed to a method and system for providing synchronization clock performance simulation in a timing-over-packet network having a network management system. The system retrieves information from nodes in a network and determines a timing-over-packet topology in a simulated model of the network, and determines clock stability statistics. The system further accepts simulation inputs such as addition or deletion of nodes in the simulated network, or introduction of failures into in the simulated network. The system provides predicted clock stability performance of an existing network under various simulated conditions without requiring modifications or introduction of failures to the existing network which would be useful for network optimization and network planning.
US08339994B2 Defining an optimal topology for a group of logical switches
A Layer 2 network switch fabric is partitionable into a plurality of virtual fabrics. A network switch chassis is partitionable into a plurality of logical switches, each of which may be associated with one of the virtual fabrics, including a base switch. Logical switches in multiple network switch chassis are connected by logical connections, such as logical inter-switch links that use physical connections, such as extended inter-switch links between base switches, for data transport. A topology of logical connections is established that balances competing metrics, such as robustness and scalability, while maintaining alignment with the topology of the physical connections. A topology factor allows establishing different topologies with different balances between the competing metrics.
US08339992B2 System and method to provision MPLS/VPN network
Systems and methods of automatically determining a set of route targets is provided. The method includes receiving network topology data specifying configuration of a network. The method also includes automatically converting the network topology data into route targets to be assigned to virtual routing and forwarding elements. The route targets are grouped into sets and duplicate sets of route targets are removed based on the route targets between duplicate sets of route targets identified as being the same. The method further includes generating a data record including information related to the set of route targets.
US08339989B2 Ad-hoc simple configuration
A protocol governing the operation of an ad-hoc WLAN enables each device in the WLAN to be configured as a registrar and/or an enrollee. Accordingly, each device is configurable to support both the registrar as well as enrollee modes of operations. In response to a time-driven user action, the device may be configured to enter into a registrar mode or an enrollee mode. While in the registrar mode, the device enters into an aggressive beaconing phase by setting its beacon contention window to a relatively very small value. The aggressive beaconing increases the probability of the discovery of the registrar by the enrollees. Optionally the device may prompt the user to select between a registrar and an enrollee mode of operation by displaying the option on an LCD panel.
US08339988B2 Method and system for provisioning logical circuits for intermittent use in a data network
A method and system are provided for provisioning logical circuits for intermittent use in a data network. A customer order requesting the use of a logical circuit for communicating data for a predetermined time period is received in the data network. A logical circuit is then provisioned in the data network prior to the start of the predetermined time period for communicating the customer data. Once the predetermined time period has elapsed, the provisioned logical circuit is deleted from the data network.
US08339987B2 Determining a congestion metric for a path in a network
Methods and systems for determining a congestion metric for a path in a network are provided. According to one embodiment, multiple paths are provided between each pair of multi-path load balancing (MPLB) components within a Layer 2 network by establishing overlapping loop-free topologies in which each MPLB component is reachable by any other via each of the overlapping topologies. A first MPLB component associated with a first network device sends a latency request packet, including a first timestamp provided by a first clock associated with the first MPLB component, to a second MPLB component associated with a second network device via the path. Responsive thereto, the first MPLB component receives, from the second MPLB component, a latency response packet, including a second timestamp provided by a second clock associated with the second MPLB component. The first MPLB component derives a one-way latency value for the path based upon the timestamps.
US08339976B2 Method of determining video quality
A method and a device utilizing an algorithm using measurement data derived from parameters related to a video-streaming player and/or parameters related to data transport is disclosed. The data are used as input data in a model designed to generate a value corresponding to the quality of the multimedia sequence, such as for example a MOS score.
US08339972B2 Method and system for monitoring a GTP communication path in an UMTS/GPRS network
A method for monitoring a GTP communication path in an UMTS/GPRS network as well as a corresponding monitoring system that is connected to the UMTS/GPRS network. The monitoring system comprises means for generating a GTP-C message in the form of a GTP echo request message containing an IP address of the monitoring system as an originating address and an IP address of a node of the UMTS/GPRS network or an external network as a destination address. The system also includes means for transmitting the GTP echo request message to the addressed network node and storing the message transmission time, means of receiving a GTP echo response message sent by the addressed network node as a reply to a successfully transmitted GTP echo request message, and means for determining a round trip time of the GTP echo request/response messages by forming the difference between the time the GTP echo response message is received and the time the GTP echo request message is sent.
US08339967B2 Method and apparatus for generating data frame
Provided is a method and apparatus for generating a data frame. The method includes: generating a plurality of subframes by using at least one medium access control (MAC) service data unit (MSDU); generating at least one field of an unequal error protection (UEP) field indicating whether UEP is applied to the subframes, a modulation and coding scheme (MCS) field indicating a modulation and coding scheme applied to each of the subframes, and a length field indicating the length of each of the subframes; and generating a data frame by using the subframes and the at least one of the UEP field, the MCS field, and the length field.
US08339962B2 Limiting RLC window size in the HSDPA flow control
In one aspect, a method and apparatus are disclosed that can provide an efficient and robust HSDPA flow control solution. The RNC (110) can receive information regarding allowed data rate from the Node-B (120) for a data flow in a downlink direction. Based on the received data rate information and optionally based on other predetermined considerations, the RNC (110) adjusts the RLC PDU transmission window size for the data flow. When the RLC PDU transmission window is properly sized, reaction to congestion can be performed quicker relative to the existing Iub flow control.
US08339960B2 Congestion control system
A congestion control system is provided between a terminal and a server device to avoid a congestion state in the server device by preferentially regulating the request with a high load on the server device. The congestion control system estimates the load of the request from the terminal to be placed on the server device for the next communication sequence, based on the response from the server device to the request from the terminal, and adds the estimated load information to the response to the terminal. Subsequently, the request from the terminal includes the load information, so that the congestion control system controls the regulation of the request from the terminal based on the load information included in the request.
US08339959B1 Streamlined packet forwarding using dynamic filters for routing and security in a shared forwarding plane
A network router includes a plurality of interfaces configured to send and receive packets, and a routing component comprising: (i) a routing engine that includes a control unit that executes a routing protocol to maintain routing information specifying routes through a network, and (ii) a forwarding plane configured by the routing engine to select next hops for the packets in accordance with the routing information. The forwarding plane comprises a switch fabric to forward the packets to the interfaces based on the selected next hops. The network router also includes a security plane configured to apply security functions to the packets. The security plane is integrated within the network router to share a streamlined forwarding plane of the routing component.
US08339955B2 Out-of-band control of communication protocol in an in-line device
Systems and methods for a network diagnostic component that is placed in-line between two nodes in a network to control the protocol with which two nodes communicate. The network diagnostic component receives a network data stream from a first node for communication with a second node. The network data stream is received by a receive component or module. The network data stream includes a portion that conforms with at least a first network protocol. The diagnostic component then determines that the first network protocol is not to be used to communicate with the second node. This determination is performed by a determine component or module. The diagnostic component modifies the network data stream so that the network data stream is in a form that is no longer recognized by the second node as being in accordance with the first network protocol. The modification is performed by a modification component or module.
US08339952B1 Protocol offload transmit traffic management
Transfer of data is facilitated between at least one application and a peer via a network. Data destined for the peer is provided from the at least one application for transmission to the peer via the network. Modulation event tokens are managed, and protocol processing of the data with the peer is based in part on a result of the modulation event tokens managing such that protocol processed data is caused to be transmitted to the peer via the network nominally with desired data transmission rate characteristics. A result of the protocol processing step is fed back to the to the modulation event tokens managing. The desired data transmission rate characteristics may include, for example, shaping and pacing.
US08339946B2 Method and system for controlling the allocation of services in a communication network, and corresponding network and computer-program product
The provision of services to the users of a multi-resource communication network is controlled by modelling the system made up of these resources as a Markov chain, wherein each state of the Markov chain is identified by a respective set of values of the numbers of the users served by each of the resources, and the transitions between states are represented by the allocation and de-allocation to the users of the services provided by the resources. A cost function is defined wherein each of the states gives a respective contribution weighted by the probability that the Markov chain is in that state, such probability being a function of the possible transitions between the states. A plurality of transitions between the states is thus identified that optimizes the cost function, and the resources are allocated to the users according to such plurality of transitions that optimizes the cost function.
US08339945B2 Data link control architecture for integrated circuit devices
Methods and apparatus are described for a data link control layer of a communication modem in which data movement functionality is implemented in hardware. In one embodiment, a data link layer comprises software, memory and hardware. The software comprises a processor configured to receive control signaling from a host device and provide control information to the hardware. The hardware comprises an outbound memory manager configured to receive data from the host device, determine locations in the memory for the data, store the data in the memory, determine which of the data is to be forwarded to a physical layer during a given transmit period, and forward the data to the physical layer. In preferred embodiments, the modem is a high performance modem designed for the terminals of a wireless local area network having multiple data flows, segmentation and reassembly, encryption, automatic repeat request, and quality of service requirements.
US08339943B2 Virtual router failover dampening
A virtual router spans a number of physical routing devices. One of the physical routing devices is designated as master, and the other physical routing devices are designated as backups to the master. A failover protocol that includes both a non-dampened state and a dampened state can be implemented. According to the failover protocol, an attempt to designate one of the backups as master in place of the current master is permitted while the virtual router is in the non-dampened state, while such an attempt is suppressed while the virtual router is in the dampened state.
US08339941B2 Methods and apparatus for selecting the better cell from redundant streams within a cell-oriented environment
The specification discloses methods and apparatus for selecting the better of two or more copies of a cell in a cell-oriented redundant switching system connected to an external communications network. In the preferred embodiment, the best cell copy selection aligns redundantly transmitted cell streams before selecting cells for insertion in the data stream. Because the streams are aligned before the selection is made, the best cell copy selector compares each cell at the same instant in time, rather than basing its selection on past events.
US08339937B2 Communications network
A distributed Internet Protocol communications network comprises a central control system comprising control processing means and at least one access point remote from the central control system for providing access to the packet based communications network. Under normal operating conditions the at least one access point is controlled by the control processing means. The network also comprises an emergency processing distinct from the central control system for controlling the at least one access point when there is a failure in the control processing means control of the at least one access point.
US08339931B2 Method and apparatus for transmitting control information in wireless communication system
A method and apparatus of transmitting control information in a wireless communication system is provided. A sequence corresponding to control information from a sequence set is determined. A reference modulation symbol set corresponding to a mini unit by modulating the sequence is generated. At least one reordered modulation symbol set is generated by reordering and repeating the reference modulation symbol set. The at least one reordered modulation symbol set is reordered in a unit of a subgroup. The reference modulation symbol set and the at least one reordered modulation symbol set are mapped to the plurality of mini units in the resource unit respectively.
US08339929B2 Network apparatus for eliminating interference between transport ports and method thereof
A network apparatus for eliminating interference between transport ports includes a plurality of transport ports and at least one alien NEXT canceller. The alien NEXT canceller is coupled to a designated transport port of the plurality of transport ports for eliminating NEXT interference from other transport ports of the plurality of transport ports. The alien NEXT canceller operates in a time domain or a frequency domain. In one exemplary embodiment, the network apparatus is a switch.
US08339928B2 Single-sided pre-recorded dual-layer DVD disc functioning as a dual-sided pre-recorded DVD
An optical disc structure for playback by a read-out device is described. The optical disc structure includes a first layer with first content recorded thereon. A second layer is coupled to the first layer. The second layer has first content and second content recorded thereon. The disc of the present principles makes use of the fact that a less than full capacity DVD9 disc leaves available recording space after the end of program area and required lead-out area on the second of the two data layers of a DVD9 disc.
US08339927B2 Write-once read-many information recording medium, information recording method, information reproduction method, information recording apparatus, and information reproduction apparatus
A write-once read-many information recording medium is provided, which is capable of easily searching for a latest DDS and a latest defect list. At least one disc management working area is sequentially allocated in a predetermined direction on the write-once read-many information recording medium of the present invention. The latest defect list and the latest DDS are provided in a recorded disc management working area neighboring a border between the recorded disc management working area and an unrecorded disc management working area, where the latest defect list precedes the latest DDS in the predetermined direction.
US08339925B2 Optical information recording/reproducing optical system and optical information recording/reproducing apparatus
An optical information recording/reproducing optical system, comprising a light source; an optical element converting a laser beam into a substantially collimated beam; and an objective lens, wherein a wavelength λ (unit: nm) of the laser beam falls within a range of 400<λ<410, the optical element and the objective lens are made of same resin materials or different resin materials having a glass transition temperature of Tg>115° C., each of optical surfaces is configured not to have an optical thin film which contains at least one of or elements of titanium, tantalum, hafnium, zirconium, niobium, molybdenum and chromium, each of optical surfaces of the optical element is provided with an antireflection film made of one of or a mixture of at least two of silicon oxide, aluminum oxide, aluminum fluoride and magnesium fluoride, and a following condition is satisfied ∏ i = 1 n - 1 ⁢ ( 1 - R ( BL ) ⁢ i 100 ) - ∏ i = 1 n - 1 ⁢ ( 1 - R ( UV ) ⁢ i 100 ) > 0.05 .
US08339923B2 Objective optical element and optical pickup device
Provided is an objective optical element which can appropriately correct degradation from spherical aberration upon fluctuation of a light source wavelength while maintaining light use efficiency, just by changing the magnification of the objective optical element, and which can record/reproduce information to/from different optical discs. Also provided is an optical pickup device using the objective optical element. When a light flux having two different wavelengths λ11, λ12 (wherein λ11<λ12 and λ12−λ11=5 nm) within a range of wavelength λ1 is introduced to the objective optical element to measure the wavefront aberration, the following third order and fifth order spherical aberrations in unit of λrms are obtained: SA3(λ11), SA5(λ11), SA3(λ12), SA5(λ12). If ΔSA3=|SA3(λ12)−SA3(λ11)|, ΔSA5=|SA5(λ12)−SA5(λ11)|, the following expression is satisfied: 0.18>ΔSA3>ΔSA5>0 (1).
US08339921B2 Optical information recording apparatus, optical information recording method, optical information recording/reproducing apparatus and optical information recording/reproducing method
An optical information recording/reproducing apparatus using holography comprises a signal generation unit that modulates input data, adds at least one control bit to each group of N bits, performs an NRZI-modulation on the modulated data, determines the at least one control bit such that a digital sum value of the NRZI-modulated data is 0, performs NRZI modulation on the data whose at least one control bit was determined, and rearranges the data to generate 2-dimensional data; a pickup that records the 2-dimensional data in a hologram disc and reproduces the 2-dimensional data from the hologram disc; and a signal processing unit that corrects the 2-dimensional data reproduced by the pickup, performs NRZI-modulation on the 2-dimensional data that has undergone a binarization operation, removes the at least one control bit added during the recording, and demodulates the data according to a modulation rule used during the recording.
US08339911B2 Method and device for retrieving information from an optical record carrier at various reading speeds
The present invention is related to a method and a reading device (1) for retrieving information from an optical record carrier (10) in which the read power level of a radiation beam (3) for scanning the optical record carrier is set in dependence on the read-out speed. The invention is also related to a record carrier for use with such a method and a reading device.
US08339910B2 Dubbing device for dubbing data
The present invention is a dubbing device for dubbing data from a portable first recording medium such as a CD-DA (compact disc digital audio) to a second recording medium such as a hard disk drive (HDD), in which dubbing to the second recording medium with a large capacity is automatically carried out when reproducing data from the first recording medium. When data is reproduced from the first recording medium, database means is searched on the basis of identification information for the first recording medium and execution control of dubbing is performed in accordance with the result of search for recording history information. For example, whether or not data to be reproduced from the first recording medium has been already recorded on the second recording medium is discriminated, and dubbing is carried out if the data to be reproduced data has not been recorded on the second recording medium.
US08339908B2 Optical recording-reading method and optical recording medium
An optical recording and reading method is provided in which the information necessary for recording and reading layers is quickly acquired to reduce the seek time during reading and recording. The optical recording and reading method is used for an optical recording medium that includes a plurality of recording and reading layers and a servo layer. Information is recorded on or read from the recording and reading layers by irradiating them with a recording and reading beam while the servo layer is irradiated with a servo beam to perform tracking control. When information is recorded on the recording and reading layers, control information necessary for subsequent recording and reading to be performed on the recording and reading layers is recorded on the servo layer 18. When the subsequent recording or reading is performed, the control information on the servo layer is consulted, and then the recording or reading is performed on the recording and reading layers.
US08339906B2 Transducer assembly for heat assisted magnetic recording light delivery
An apparatus includes a transducer assembly including a waveguide having a core layer and a cladding layer adjacent to the core layer, and a grating structured to couple electromagnetic radiation into the waveguide; and a light source mounted on the cladding to direct light onto the grating at an acute angle with respect to a plane containing the grating.
US08339904B2 Reinforced micro-mechanical part
The micro-mechanical part, for example a horological movement part, includes a silicon core (1) all or part of the surface (3) of which is coated with a thick amorphous material (2). This material is preferably silicon dioxide and has a thickness which is five times greater than the thickness of native silicon dioxide.
US08339903B2 Dual illumination watch face, and associated methods
Systems and methods for a dual illumination watch face having a tritium gas tube coupled with a dial, minute hand or hour hand of the watch face, and phosphorescent material disposed with at least one of the dial, minute hand and hour hand.
US08339900B2 Watch with time zone display
The analogue display watch includes two separate time displays (40, 44) for first and second time zones, and a time zone indicator (50), which includes a place ring (53) associated with two apertures (51, 52) shifted angularly by 1/24th of a revolution, and one of which is used in combination with winter time and the other with daylight saving time (DST). A first, manual, time-setting device (31) can simultaneously set the time of the first and second time displays (40, 44). A second, manual, time-setting device can rotate the second time display (44) and the time zone indicator (50) together, step-by-step, without changing the state of the first time display (40). A manual corrector (34, 63) rotates the place ring (53) step-by-step without changing the state of the first and second time displays (40, 44). The place symbols (54) are distributed over the circumference of the place ring (53) with a step of 1/96th of a revolution, so as to include symbols (54a, 54b) representing time zones that differ from UTC by a non-integer number of hours. With these features, simple manipulations can display the time in any place in the world and time zone changes can be performed easily while taking account of daylight saving time and a change in hemisphere, where necessary.
US08339899B2 Seismic data acquisition system comprising modules associated with units connected to sensors, the modules being autonomous with respect to power supply, synchronisation and storage
Described herein is a land seismic data acquisition system comprising a central processing unit; a cabled network connected to the central processing unit comprising a plurality of acquisition lines each comprising: electronic units assembled in series along a telemetry cable and each associated with at least one seismic sensor, the units processing signals transmitted by the sensor(s); intermediate modules assembled in series along the telemetry cable and each associated with at least one of the electronic units, each intermediate module providing power supply and synchronization of the electronic unit(s) wherewith it is associated; wherein each electronic unit is associated with at least two intermediate modules including at least one upstream and at least one downstream from the electronic unit along the telemetry cable, and comprises synchronization means independent from the cabled network, bidirectional and autonomous power supply means, bidirectional storage means of the signals processed by the electronic units.
US08339895B2 Signal calibration methods and apparatuses
In a signal calibration scheme, a desired phase relationship is maintained between a set of signals. For example, in some aspects the desired phase of a clock tree generated from a high speed reference clock signal may be maintained by detecting phase differences between a low speed reference clock signal and low speed clock signals associated with different phases of the clock tree. In some aspects, the desired phase of a clock tree may be maintained by detecting framing offsets that occur through the use of the clock tree.
US08339892B2 Semiconductor memory device
A semiconductor memory device pertaining to the present invention includes a plurality of memory macros having memory cells and memory peripheral circuits which drive the memory cells; first power supply switches which control power supply to the memory cells; and a second power supply switch which controls power supply to the memory peripheral circuits. The first power supply switches are located within the memory macros, respectively, and provided between a power supply line feeding power to the memory cells and the memory cells. The second power supply switch is located outside the memory macros and provided between the power supply line and a common power supply wiring for the memory peripheral circuits in the plurality of memory macros.
US08339887B2 Double line access to a FIFO
An apparatus comprising a write data buffer circuit, a memory, and a read data buffer circuit. The write data circuit may be configured to present data in a second format in response to data received in a first format. The memory may be configured to (i) receive the data in the second format and (ii) present the data in the second format. The read data buffer circuit may be configured to (i) receive data in the second format and (ii) present data in a third format. The memory may be configured to allow two reads or two writes during a single clock cycle of reference clock without encountering a data overflow condition.
US08339882B2 Dual bit line precharge architecture and method for low power dynamic random access memory (DRAM) integrated circuit devices and devices incorporating embedded DRAM
A dual bit line precharge architecture and method for low power DRAM which provides the low operating voltage of a non-half supply voltage (VCC/2) precharge with the low memory array current consumption and low memory array noise spike of VCC/2 precharge techniques. The architecture and technique of the present invention provides both reference voltage (VSS) precharged sub arrays and VCC precharged sub arrays on the same DRAM memory either with or without the novel charge sharing or charge recycling circuitry between these two different sub arrays as disclosed herein.
US08339880B2 Circuit for controlling redundancy in semiconductor memory apparatus
Disclosed are a circuit and a method for controlling redundancy in a semiconductor memory apparatus. The circuit includes a peripheral circuit redundancy control block and a memory bank redundancy control block. The peripheral circuit redundancy control block buffers and latches an external command to generate an internal command. The peripheral circuit redundancy control block also buffers and latches an external address to generate a global address by comparing the external address with a predetermined output signal of a fuse circuit. The memory bank redundancy control block receives the global address corresponding to the internal command to selectively activate a redundancy word line or a main word line, such that the fuse circuit is provided in the peripheral circuit redundancy control block.
US08339875B2 Method of reducing the occurrence of burn-in due to negative bias temperature instability
A method for alleviating burn-in effect and enabling performing a start-up process in respect of a device comprising a plurality of challengeable memory elements, wherein the memory elements are able to, upon start-up, generate a response pattern of start-up values useful for identification as the response pattern depends on physical characteristics of the memory elements, the method comprising the step of, after start-up of the memory elements, writing a data pattern to the memory elements which is inverse to a response pattern that was previously read from the same memory elements. Thus, degradation of the PMOS transistors due to NBTI can be alleviated.
US08339874B2 Sequence detection for flash memory with inter-cell interference
A memory integrated circuit (IC) includes a read module and a sequence detector module. The read module reads S memory cells (cells) located along one of a bit line and a word line and generates S read signals, where S is an integer greater than 1. The sequence detector module detects a data sequence based on the S read signals and reference signals. The data sequence includes data stored in the S cells. Each of the reference signals includes an interference-free signal associated with one of the S cells and an interference signal associated with another of the S cells that is adjacent to the one of the S cells.
US08339872B2 Semiconductor memory apparatus and method of driving bit-line sense amplifier
Disclosed is a semiconductor memory apparatus which improves the time to transmit write data to a memory cell and improves data retention time of the memory cell. To this end, the semiconductor memory apparatus includes a bit-line sense amplifier that senses and amplifies data of bit-line pairs by driving power supplied through a pull up power line and a pull down power line and transmits the amplified data to a memory cell. A bit-line sense amplification power supply unit supplies pull up driving voltage and pull down driving voltage to the pull up and pull down power lines in an active mode and supplies an over driving voltage and the pull down driving voltage having a higher voltage level than the pull up driving voltage to the pull up and pull down power lines until the memory cell is deactivated in a precharge mode.
US08339871B2 Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment
Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.
US08339869B2 Semiconductor device and data processor
To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption.In a data processor having a bus controller that performs timing control of access from the CPU operated in synchronization with a high-speed first clock signal to a peripheral circuit operated in synchronization with a low-speed second clock signal, a timing control circuit is provided between the peripheral circuit and the bus controller, and the bus controller causes, in response to a read instruction from the peripheral circuit, the timing control circuit to output data held by the peripheral circuit to the bus controller in synchronization with the cycle of the high-speed clock signal, causes the timing control circuit to start, in response to a write instruction directed to the peripheral circuit, writing into the peripheral circuit in synchronization with the cycle of the high-speed clock signal, and terminates the writing in synchronization with the cycle of the low-speed clock signal.
US08339868B2 Semiconductor device and write control method for semiconductor device
To include a memory cell array that stores therein data in a reversible manner, an antifuse circuit that stores therein data in a nonvolatile manner, a sense amplifier array that temporarily holds data that is read from the memory cell array of data to be written in the memory cell array, and a control circuit that performs a control for writing the data held in the sense amplifier array in the antifuse circuit. According to the present invention, it is not required to provide any dedicated latch circuit for each antifuse element. Therefore, a writing process of writing data in the antifuse circuit can be performed at high speed without causing an increase of the chip dimension due to a dedicated latch circuit.
US08339865B2 Non binary flash array architecture and method of operation
A Flash memory array comprises a plurality of Erase Sectors (Esecs) arranged in a plurality of Erase Sector Groups (ESGs), Physical Pages (slices), and Physical Sectors (PSecs), and there is a non-binary number of at least one of the Erase Sector Groups (ESGs), Physical Pages (slices), and Physical Sectors (PSecs). A user address is translated into a physical address using modular arithmetic to determine pointers (ysel, esg, psec) for specifying a given Erase Sector (ESec) within a given Erase Sector Group (ESG); a given Erase Sector Group (ESG) within a given Physical Sector (Psec); and a given Physical Sector (PSec) within the array.
US08339863B2 Operation method of memory device
One embodiment of the present invention provides an operation method of a memory device. The memory device includes a source, a drain, and a channel region between the source and the drain, a gate dielectric with a charge storage layer on the channel region, and a gate on the gate dielectric, wherein the source, the drain and the channel region are located in a substrate. The operation method includes the following steps: applying a reverse bias between the gate and the drain of the memory device to generate band-to-band hot holes in the substrate near the drain; injecting the band-to-band hot holes to a drain side of the charge storage layer; and performing a program/erase operation upon the memory device. The band-to-band hot holes in the drain side of the charge storage layer are not completely vanished by the program/erase operation.
US08339862B2 Nonvolatile semiconductor memory device
According to an aspect of the present invention, it is provided: a nonvolatile semiconductor memory device comprising: a plurality of bit lines arranged in a first direction; a plurality of source lines arranged in the first direction, the plurality of source lines being parallel to the plurality of bit lines, the plurality of source lines being distinct from the plurality of bit lines; a plurality of memory gate lines arranged in a second direction perpendicular to the first direction; a plurality of memory cells arranged in a matrix, each of the plurality of memory cells including a p type MIS nonvolatile transistor having a first terminal, a second terminal, a channel between the first terminal and the second terminal, a gate insulation film formed on the channel, a gate electrode connected to one corresponding memory gate line of the plurality of memory gate lines, and a carrier storage layer formed between the gate insulation film and the gate electrode, the first terminal being connected to one corresponding bit line of the plurality of bit lines and the second terminal being connected to one corresponding source line of the plurality of source lines.
US08339857B2 Nonvolatile semiconductor memory device and operation method thereof
A nonvolatile semiconductor memory device according to one embodiment includes: a memory cell array; word lines; bit lines; and a control circuit configured to write multi-value data in the memory cells. The control circuit sets either even-ordinal-number bit lines or odd-ordinal-number bit lines as selected bit lines while setting the other as unselected bit lines; applies a write inhibiting voltage to the unselected bit lines; applies a write voltage to the selected bit lines corresponding to unwritten memory cells to be given one of threshold voltage distributions representing different written states; and applies the write inhibiting voltage to the selected bit lines corresponding to unwritten memory cells to be given any other of the threshold voltage distributions representing the different written states, memory cells already written, and memory cells to be maintained in a threshold voltage distribution representing an erased state, thereby executing a write operation.
US08339855B2 Reverse order page writing in flash memories
To store, in a memory block whose word lines are written successively in a word line writing order, a plurality of data pages that are ordered by logical page address, the pages are written to the word lines so that every page that is written to any one of the word lines has a higher logical page address than any page that is written to a subsequently written word line, regardless of the sequence in which the pages are received for writing. Alternatively, the pages are written to the word lines so that for every pair of written word lines, the word line of the pair that is earlier in the writing order has written thereto a page having a higher logical page address than at least one page written to the other word line of the pair.
US08339847B2 Nonvolatile memory device and system, and method of programming a nonvolatile memory device
A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory cells includes executing first through (N−1)th page programming operations, using an incremental step pulse programming (ISPP) method, to program first through (N−1)th data pages in the MLC memory cells, where each of the first through (N−1)th page programming operations includes an erase programming of erase cells among the MLC memory cells. The method further includes executing an Nth page programming operation, using the ISPP method, to program an Nth data page in the MLC memory cells.
US08339846B2 Flash memory device, programming and reading methods performed in the same
The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through Nth bits of data in a memory cell array of the N-bit MLC flash memory device or reads the first through Nth bits of the data from the memory cell array in response to one of a program command and a read command. The bit level conversion control logic circuit, after the first through Nth bits of the data are completely programmed or read, programs or reads an (N+1)th bit of the data in response to a control signal. The bit level conversion control logic circuit converts voltage levels of voltages, which are used for programming or reading the first through Nth bits of the data, to program or read for 2N cell distributions of 2N+1 cell distributions corresponding to the (N+1)th bit of the data and then programs or reads for other 2N cell distributions.
US08339842B2 Non-volatile memory
Non-volatile memories can have data retention problems at high temperatures reducing the reliability of such devices. A non-volatile memory cell is described having a magnet, a ferromagnetic switching element and heating means. The non-volatile memory cell has a set position having a low resistance state and a reset position having a high resistance state. The non-volatile memory is set by applying a magnetic field to the switching element causing it to move to the set position. The non-volatile memory cell is reset by the heating means which causes the switching element to return to the reset position. The switching element is formed from a ferromagnetic material or a ferromagnetic shape memory alloy. This structure can have improved reliability at higher temperatures than previously described non-volatile memories.
US08339838B2 In-line register file bitcell
An SRAM bitcell architecture is described having a dedicated read port (N0/N1/N6, N3/N4/N7) with pull up transistors (N6, N7) that shares at least a first bit line pair (23, 24) and word line signal (25), thereby providing separate data access read paths to a 6T SRAM architecture such that the read port is connected to drive the cell read node without exposing the memory cell during read operations and to act as a write port during write operations.
US08339837B2 Driving method of semiconductor device
A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of electric charge is held in the node. In a holding period, the memory cell is brought into a selected state and a source electrode and a drain electrode of the reading transistor are set to the same potential, whereby the electric charge stored in the node is held.
US08339836B2 Semiconductor device
An object is to provide a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of times of writing operations. A semiconductor device includes a source-bit line, a first signal line, a second signal line, a word line, and a memory cell connected between the source-bit lines. The memory cell includes a first transistor, a second transistor, and a capacitor. The second transistor is formed including an oxide semiconductor material. A gate electrode of the first transistor, one of a source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another. The source-bit line and a source electrode of the first transistor are electrically connected to each other. Another source-bit line adjacent to the above source-bit line and a drain electrode of the first transistor are electrically connected to each other.
US08339834B2 Non-volatile semiconductor memory device including a variable resistance element
According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.
US08339833B2 Electrically rewritable nonvolatile semiconductor storage device including a variable resistive element
A nonvolatile semiconductor storage device includes a memory core that includes plural banks, the bank including plural memory cells and a data write circuit that supplies a bias voltage to the memory cell, the memory core being logically divided into plural pages, the page including a predetermined number of memory cells belonging to a predetermined number of banks; and a control circuit that controls the data write circuit to perform page write in each write unit including a predetermined number of memory cells, pieces of data being written in the page in the page write, the control circuit performing the page write by repeating a step including a program operation and a verify operation, the control circuit performing the program operation and the verify operation in a next step or later only to the write unit in which the data write is not completed in the verify operation.
US08339827B2 Memory device interface methods, apparatus, and systems
Apparatus and systems may include an interface chip, a first memory die having at least one memory array disposed on the interface chip, and a second memory die having at least one memory array disposed on the first memory die. The first memory die can include a plurality of vias configure allow a first plurality of through wafer interconnects (TWIs) to couple the interface chip with the second memory die, and the interface chip can be configured to communicatively couple the first memory die and the second memory die. Other apparatus, systems, and methods are disclosed.
US08339825B2 Nonvolatile memory device and operation method thereof
In a method of operating a nonvolatile memory device, at least one among memory cell blocks of the nonvolatile memory device is designated as a content addressable memory (CAM) block which includes a plurality of CAM cells coupled to respective word lines of the nonvolatile memory device. Chip information for operations of the nonvolatile memory device is stored in the CAM cells which are coupled to a selected word line, whereas the remaining CAM cells of the CAM block are in an erased state.
US08339820B2 Thirty-six pulse power transformer and power converter incorporating same
Embodiments of the present invention provide novel techniques for using multiple 18-pulse rectifier circuits in parallel. In particular, each rectifier circuit may include an autotransformer having 15 inductors coupled in series, joined by 15 nodes interposed between pairs of the inductors. The inductors may be represented as a hexagon in which alternating sides of the hexagon have two and three inductors, respectively. Each rectifier circuit may also include three inputs for three-phase AC power coupled to alternating vertices of the hexagonal representation and nine outputs for AC power coupled between each node that is not a vertex of the hexagonal representation and a respective diode bridge. Outputs of the diode bridges for the rectifier circuits may be coupled to a DC bus. In addition, a means for reducing circulating current between the parallel rectifier circuits and for promoting load sharing between the parallel rectifier circuits is also provided.
US08339816B2 Semiconductor device and switching power supply apparatus
A switching power supply apparatus includes: a turn-on control circuit which generates a turn-on signal; a feedback control circuit which generates a reference voltage VEAO indicating a limitation level for a current ID flowing into a switching element, by referring to a feedback signal IFB indicating an output current voltage VOUT, the limitation level which decreases as the output direct current voltage becomes greater; an overcurrent protection level setting circuit which generates a reference voltage VLR indicating an overcurrent protection level; a current detecting terminal; an offset current generating circuit which provides an offset current IIS from the current detecting terminal, the offset current IIS which is greater as the output current voltage VOUT is greater; and a turn-off control circuit which generates a turn-off signal by comparing a voltage applied to the current detecting terminal with each of the reference voltage VEAO, and the reference voltage VLR.
US08339812B2 Resonant power converter with current doubler rectifier and related method
A power converter is provided, which may include_a transformer having primary and secondary windings; a primary side switching bridge arrangement including at least two switches switcheable at a switching frequency to drive the primary winding of said transformer, said primary side switching bridge arrangement including at least one decoupling capacitor; and a secondary side rectifying and filtering stage coupled to the secondary winding of said transformer, wherein said secondary side rectifying and filtering stage includes a current doubler with at least one inductor, wherein said at least one decoupling capacitor and said at least one inductor in said current doubler comprise a resonant tank circuit having a resonant frequency range encompassing said switching frequency, whereby said converter exhibits a gain defined by the position of said switching frequency within said resonant frequency range.
US08339805B2 Circuit board holding member and image forming apparatus
A circuit board holding member includes a body portion, holding portions and first attachment portions. The body portion is made of resin, and is provided to hold a circuit board. The holding portions are made of resin. The holding portions are formed integrally with the body portion, and are provided to hold connection lines to be connected from electric modules of an apparatus to the circuit board. The first attachment portions are provided in the body portion and serve for removably attaching the circuit board to the apparatus.
US08339804B2 Programmable routing module
A programmable routing module is disclosed for interconnecting field wiring with a control system. The routing module includes a field connection to connect field signals from a controlled process to the routing module, an I/O connection to connect I/O signals from the control system to the routing module, and a configurable interconnection system that selectively couples particular field and I/O signals with one another.
US08339800B2 Circuit module
A circuit module includes a substrate, a component land provided on the substrate, an electronic component bonded to the component land, a case land provided on the substrate, and a case bonded to the case land so as to cover the electronic component. The case includes a top plate, and a leg that extends from a peripheral edge of the top plate in a direction substantially perpendicular to the top plate and that includes a groove in an end surface thereof that is bonded to the case land.
US08339792B1 Detachable adapter and handheld device
A detachable adapter is adapted to be disposed in a handheld device and adapted to accommodate a memory card. The handheld device includes a socket connector. The memory card has a memory card terminal set. The socket connector has a socket body and a socket terminal set disposed at the socket body. The adapter includes an adapter body, and first, second and third terminal sets. The detachable adapter has an accommodating cavity in which the first terminal set is disposed. The second and third terminal sets are disposed on the adapter body. When the memory card is accommodated in the accommodating cavity, the first terminal set contacts the memory card terminal set. When the adapter body is assembled to the socket body, the second terminal set contacts the socket terminal set. When the adapter body is inserted into an electronic apparatus, the third terminal set contacts an apparatus terminal set.
US08339788B2 Printed circuit board with heat sink
A printed circuit board includes a heat sink and a circuit board. The heat sink defines two fixing blind holes respectively arranged on adjacent opposite ends of the heat sink. The circuit board includes a heat-generating component and two fixing elements corresponding to the fixing blind holes. Each fixing elements includes a fixing portion fixed on the circuit board, a locking portion, and an elastic portion extending from a first end of the locking portion to be connected to the fixing portion. A second end of the locking portion of each fixing element is inserted into a corresponding fixing blind hole, to fix the heat sink on the heat-generating component.
US08339783B2 Slide and tilt mechanism for electronic device
An electronic device includes a first housing, a second housing covering the first housing, a slide mechanism, a hinge bar, and a resilient element. The slide mechanism slidably connects to the first housing to the second housing. A first end of the hinge bar rotatably connects to the slide mechanism, a second end of the hinge bar rotatably and slidably connects to the first housing. The resilient element is fixed on the slide mechanism and the hinge bar. When the second housing overlaps the first housing, the resilient element is compressed to generate an elastic potential energy by the hinge bar and the slide mechanism; when the second housing is open relative to the second housing, the elastic potential energy drives the hinge bar to tilt relative to the slide mechanism and supports the second housing.
US08339778B2 Rotating hard drive installation in a computer chassis
A system comprises a server chassis and first and second hard disk drive carriers, wherein each carrier supports a hard disk drive. A first hinge rotatably connects a distal end of the first hard disk drive carrier to a first side of the chassis, wherein the first hinge allows the carrier to rotate about a first hinge axis between an open position and a closed position. The first hard disk drive carrier rotates in a first plane between an open position extending beyond the front of the chassis and a closed position within the chassis. A second hinge rotatably connects a distal end of the second hard disk drive carrier to a second side of the chassis that opposite the first side of the chassis, wherein the hinge allows the carrier to rotate about a second hinge axis between an open position and a closed position. The second hard disk drive carrier rotates in a second plane between an open position extending beyond the front of the chassis and a closed position within the chassis, wherein the second plane is parallel to the first plane.
US08339772B2 Heat dissipation means for increasing power density in enclosed equipment
A thermally efficient electrical enclosure includes a busbar, a metallic heat sink, and an electrical insulator. The busbar is positioned entirely within the enclosure and electrically insulated from the enclosure. The metallic heat sink is attached to a wall of the enclosure. The electrical insulator physically contacts the busbar and is at least partially wrapped around at least two non-parallel surfaces of a portion of the metallic heat sink such that the metallic heat sink is electrically insulated from the busbar. The metallic heat sink is configured to transfer thermal energy or heat from the busbar to the enclosure such that the thermal energy is lost or transferred to the surrounding environment, which reduces the temperature of the busbar and the amount of copper needed for the busbar without reducing the rating of the enclosure.
US08339770B2 Capacitor and method for producing thereof
A capacitor having a high degree of electric strength, a high electrostatic capacity, and a low ESR, which can be readily downsized, is provided. The capacitor according to the present invention includes an anode made of porous valve metal, a dielectric layer formed by oxidizing the surface of the anode, and a solid electrolyte layer formed on the surface of the dielectric layer. The solid electrolyte layer includes a π conjugated conductive polymer, a polyanion, and an ion-conductive compound.
US08339768B2 Electrode for super-capacitor, super-capacitor including electrode, and method for preparing electrode
An electrode for a super-capacitor, a super-capacitor including the electrode, and a method of preparing the electrode in which the electrode includes a conductive substrate; metal nano structures formed on the conductive substrate; and a metal oxide coated on the metal nano structures. The electrode for the super-capacitor increases the capacitance of the super-capacitor.
US08339765B2 Capacitor
A capacitor includes a substrate, a plurality of first storage electrodes, a plurality of second storage electrodes, a first supporting layer pattern, a dielectric layer and a plate electrode. A plurality of contact pads is formed I the substrate. The first storage electrodes are arranged along lines parallel with a first direction and electrically connected to the contact pads, respectively. The second storage electrodes are respectively stacked on the first storage electrodes. The first supporting layer pattern extends in a direction parallel with the first direction between adjacent second storage electrodes and makes contact with the adjacent second storage electrodes to support the second storage electrodes. The dielectric layer is formed on the first and second storage electrodes. The plate electrode is formed on the dielectric layer.
US08339763B2 Electric discharge weapon for use as forend grip of rifles
A TASER® and a vertical grip are combined to be attached to the stud post under the forend or the barrel of a conventional long arm. A TASER® may also be combined with the forend or barrel of a conventional long arm itself. Stud posts come standard on certain long arms like the M-16 rifle. Stud posts can be installed on single shot and pump action shotgun forends as well. The TASER® power supply can serve as a power source for a strobe lamp, which may be sighted by rescuers either visually or with infrared night viewing or other special viewing equipment for miles. The optical signal could be produced in the infrared, visible light and ultraviolet light regions of the electromagnetic spectrum. The signal lamp is inserted into a TASER®'s firing chamber in lieu of an ammunition cartridge.
US08339762B2 Control valve coil temperature controller
A method of actuator coil temperature control for actuators that are not continuously operated, wherein when an actuation current is not being applied to the actuator coil, a) sensing a parameter indicative of the resistance of the actuator coil as an indication of the temperature of the actuator coil, b) if the sensed parameter indicates the temperature of the actuator coil is below a first predetermined limit, then initiating a series of successive actuation current pulses to the actuator coil, each actuation current pulse being terminated before actuation of the actuator occurs, and c) periodically repeating a) and b).
US08339756B2 Control circuit having a delay-reduced inverter
In some embodiments, a power supply clamp may include a switchable discharge device configured to discharge an electrostatic discharge; and a control circuit configured to generate a control voltage to turn off the discharge device at a shutoff time, with the shutoff time being long enough to allow the electrostatic discharge though the discharge device but short enough to reduce a duration of a power-up current transient through the discharge device. Other embodiments may be described and claimed.
US08339755B2 Electrical fault restricting system
Electrical fault restricting system for an electrical equipment and/or electrical system has a monitoring unit placed at location of interest to sense or measure electrical fault occurred with the help of sensing or measuring device which is further connected to signal processing and controlling unit which receives data collected by the monitoring unit that provides output for fault identification, alarming and controlling actions to alarming. An indication unit and command for trip signal to circuit breaking device where processed data of data collecting and processing unit are stored at data history storage. A display unit for back reference monitoring unit provides images to image receiver. A processor and controlling unit further provides processed images to an additional data history storage and display unit for future analysis of conditions where plurality of signal processing and controlling unit is inter connected with additional remote central controlling and data handling unit.
US08339751B2 Shield design for magnetic recording head
A method is disclosed for forming a magnetic shield in which all domain patterns and orientations are stable and which are consistently repeated each time said shield is exposed to an initialization field. The shield is given a shape which ensures that all closure domains can align themselves at a reduced angle relative to the initialization direction while still being roughly antiparallel to one another. Most, though not all, of these shapes are variations on trapezoids.
US08339745B2 Baseplate for disk drive suspension and method for manufacturing baseplate
A cylindrical boss portion is press-formed on a baseplate of a disk drive suspension. The boss portion is penetrated by a ball insertion hole relative to the thickness of the baseplate. The baseplate is formed of stainless steel. A chemically-polished surface is formed on an inner circumferential wall of the ball insertion hole by chemically polishing the baseplate after heat-treating it. The boss portion is inserted into a mounting hole of an actuator arm. A ball having a diameter larger than the inside diameter of the ball insertion hole is passed through the ball insertion hole. As the diameter of the boss portion is enlarged by the ball, the boss portion is fixed to the actuator arm.
US08339742B1 Slider with leading edge blend and conformal step features
A slider having an air bearing surface and a leading face is described. The slider comprises a leading edge blend comprising a first curved surface formed at an intersection of the air bearing surface and the leading face. The slider further comprises at least one step feature having a second surface with a first portion recessed from the air bearing surface and a second portion recessed from and conformal to the first curved surface of the leading edge blend.
US08339741B2 Write pole trailing edge partial side shield
A magnetic writer has at least a write pole with a first partial side shield and a second partial side shield. The write pole has a leading edge and a trailing edge along an air bearing surface (ABS) and a first side and a second side along an axis orthogonal to the ABS. The first partial side shield is separated from the first side of the write pole and extends from adjacent the write pole from the trailing edge to a location intermediate that trailing edge and the leading edge.
US08339736B2 Wire-assisted magnetic write device with low power consumption
A magnetic device includes a write element having a write element tip and a conductive coil that carries current to induce a first field in the write element. A first conductor is proximate a leading edge of the write pole tip for carrying current to generate a second field that augments the first field.
US08339735B2 Magnetic writer for patterned stack with increased write field
A magnetic writer writes to a magnetic medium including a plurality of tracks that each includes a plurality of isolated magnetic elements for storage of information. The magnetic writer includes a write element having a write element tip having a leading edge, a trailing edge, and first and second side edges extending between the leading edge and the trailing edge. A side shield is proximate the first side edge and no shield is proximate the second side edge.
US08339733B2 Method for manufacturing base member, method for manufacturing motor, method for manufacturing information apparatus, and base member, motor, and information apparatus
A base member on which a plurality of components are mounted includes a base main body, a coating formed on a surface of the base main body, and a display portion formed by a contrast between the coating and the surface of the base main body. The display portion displays a state by which it is determined whether or not the base main body has been machined in accordance with a corresponding machining program.
US08339732B2 Baseplate with recessed region in a hard-disk drive (HDD)
Approaches for a hard-disk drive (HDD) baseplate comprising a recessed region that provides additional clearance for a disk. The protective enclosure of the HDD comprises a baseplate. The surface of the baseplate, which opposes a magnetic-recording disk, comprises a recessed region near the outer diameter (OD) of the magnetic-recording disk. The recessed region prevents the disk from being damaged through inadvertent physical contact with the baseplate, which may arise when the HDD receives a mechanical shock. The recessed region may be designed to minimize the damage to the disk if physical contact between the disk and the baseplate does occur. The recessed region may have a variety of shapes, such as a circular indentation or one or more non-contiguous regions in the baseplate where physical contact between the disk and the baseplate is deemed likely to occur.
US08339731B2 Fluid dynamic bearing with non-linear damping
Thus, if a shock or other disturbance to a disc stack spindle bearing assembly occurs that tilts the bearing assembly, the resulting motion is both a tilting, and a motion which is axial. If a shock axially moves the hub assembly, only an axial motion occurs. Thus the system has a non-linear behavior. Pursuant to this invention, when a tilting disturbance occurs, and some of it is dissipated in a net axial movement at a different frequency, energy is subtracted out of the system with motion that is not linearly related to the disturbance was that created it.
US08339730B2 Two-step recess base
A base member including two-step recesses and a hard disk drive (HDD) including the same. The HDD includes a base member; a spindle motor installed in the base member; a data storage disk assembled to the spindle motor; and an actuator rotatably installed in the base member and for moving a read/write head to a desired position on the disk, wherein the base member includes: a first floor surface disposed in a region facing the disk and having a center portion in which the spindle motor is installed; a shroud formed on a circumference of the first floor surface and extending the exterior circumference of the disk; and two-step recesses formed in an operating region of the actuator, wherein the two-step recesses comprise a first step recess formed on the first floor surface and a second step recess formed on a floor surface of the first step recess. An extended shroud is formed in an upstream side of an operating region of the actuator of the base member, protrudes from the shroud, and extends along the exterior circumference of the disk. An air block is installed in a downstream side of the operating region of the actuator.
US08339721B2 Tape data assessment through medium auxiliary memory data comparison
Methods for certifying data retained by a tape cartridge in a tape library are shown. Error rates that are encountered when the tape cartridge is being read by a tape drive can be accounted for without actually reading data for data content retrieval. A record of the error rate can be stored in a medium auxiliary memory device associated with the tape cartridge. An older record containing a formerly accounted for error rate of read errors when the tape cartridge was formerly read can be accessed and compared with the record presently assessed. If there is a difference between the presently found error rate and the formerly found error rate an action can be executed if the difference exceeds a predetermined threshold.
US08339720B1 Hybrid defect detection for recording channels
Methods, systems and computer program products for performing hybrid defect detection are disclosed. A hybrid defect detection mechanism may be used to detect various classes of defects (e.g., long and shallow defects, and short and deep defects) while reducing the probability of a miss or false alarm. In some implementations, the hybrid defect detection mechanism may utilize defect detectors to each receive signal samples and apply a different set of parameters indicating a different respective window to the signal samples. Each defect detector may generate a corresponding output based on a count of signal samples within the corresponding window that are associated with abnormal signal quality.
US08339718B1 Image capturing optical lens system
This invention provides an optical lens system comprising: a first lens element with positive refractive power; a second lens element with negative refractive power; a third lens element with negative refractive power having a concave object-side surface and at least one of the object-side surface and the image-side surface thereof being aspheric; a plastic fourth lens element having at least one of the object-side surface and the image-side surface thereof being aspheric; a plastic fifth lens element having a concave image-side surface, at least one of the object-side surface and the image-side surface thereof being aspheric, and at least one inflection point is formed on at least one of the object-side surface and the image-side surface thereof. By such arrangement, photosensitivity and total track length of the system can be reduced, and the aberration and astigmatism of the system can be effectively corrected. Moreover, high image resolution can be obtained.
US08339716B2 Illumination lenses including light redistributing surfaces
Illumination lenses (1806, 1902, 2002, 2100, 2200, 2300, 2400, 2500, 2600, 2700, 2800, 3006, 3100) having surfaces shaped according to given differential equations in order to distribute light in a highly controlled manner with minimum reflection losses are provided. Both primary lenses and secondary lenses are provided. The secondary lenses include outer surfaces that are defined as loci of constant optical distance from an origin at which a light source is located. Versions are provided of both the primary and secondary lenses having Total Internal Reflection (TIR) wings. These are useful in the case that narrower distributions of light are required. A method of refining the shape of the lenses to obtain more obtain lenses that produce better fidelity ideal light distributions is also provided.
US08339712B2 Variable magnification optical system, optical apparatus with the same, and method for manufacturing variable magnification optical system
Provided are a variable magnification optical system for making it possible to properly set a variable magnification ratio of each lens group by properly setting a variable magnification ratio of a fifth lens group, and an optical apparatus with the variable magnification optical system, and a method for manufacturing the variable magnification optical system. The optical apparatus has first to sixth lens groups (G1) to (G6) in order from an object, wherein the fifth lens group (G5) satisfies the following conditional expression: 0.65<|β5T/β5W|<3.20, where β5T denotes the lateral magnification at the telephoto end state, and β5W denotes the lateral magnification at the wide-angle end state.
US08339709B1 Low numerical aperture (low-NA) solar lighting system
A low numerical aperture (low-NA) light concentration and transmission system collects, concentrates and transmits light for interior illumination. A solar tracker aligns a primary light concentrator to collect light and direct the light to a secondary light concentrator and a filter for removing ultraviolet and infrared radiation. On exiting the secondary light concentrator, the optical axis of the concentrated light is aligned to optimize the numerical aperture of the concentrated light with a numerical aperture (NA) optimizer having a light guide to direct the concentrated light to an interior luminaire. The method of the low numerical aperture transmission of light has the advantages of fewer reflections in the light guide, low loss, low cost, and easy installation and operation.
US08339708B2 Optical element and optical apparatus
An optical element including a first layer (011) made of a medium having optical anisotropy, wherein a difference between refractive indexes nh and nl (nh>nl) at a central wavelength λ for first and second polarized lights which enter the optical element and whose polarization directions are different from each other is at least 0.1, and wherein conditions (nt1−nl)·(nl−nt2)≦0 and nt1
US08339707B2 Anti-reflection multi-layer laminated film
A laminated film obtained by carrying out anti-reflection processing on the surface of a reflection polarizing film. This laminated film comprising (A) a monoaxially oriented laminated film consisting of 501 or more alternating first layers made of a first thermoplastic resin having a positive stress optical coefficient and a thickness of 0.05 to 0.5 μm and second layers made of a second thermoplastic resin different from the first thermoplastic resin and having a thickness of 0.05 to 0.5 μm, and a low-reflectance layer formed on at least one side of the monoaxially oriented laminated film and having a reflectance of the surface measured from the input side of 3% or less.
US08339706B2 Wire grid and manufacturing method thereof
A textile made by weaving while crossing stainless wires as warp yarn and silk yarns as weft yarn one by one alternately, and this textile is attached to a frame body to configure a wire grid. The pitch for the stainless wires is determined depending on a wavelength to be polarized and analyzed. Furthermore, the silk yarns are removed if necessary. This configuration avoids problems with cutting of metal wire or irregular intervals between metal wires because of long fine metal wires tightened parallel to each other in the frame body, and problems such as multiple reflection or interference on a substrate or a base material because of fine wire patterns made by etching or the like with the use of the substrate or base material, thereby obtaining an easily-manufactured, low-cost and high-precision wire grid for polarization and analysis of electromagnetic waves.
US08339705B2 Optical sheet for three-dimensional image and three-dimensional image display device using the same
An optical sheet for three-dimensional images and a three-dimensional image display device using the same, are discussed. According to an embodiment, the three-dimensional image display device includes a display unit to display two-dimensional images using unit pixels each including at least three colors of sub-pixels, and an optical sheet to convert the two-dimensional images into a plurality of different three-dimensional images, and the neighboring three-dimensional images are overlapped with each other by a predetermined range. With the above described configuration, the curved lenses are tilted to provide neighboring viewers with three-dimensional images overlapped with each other by 15% to 60%. As a result, a ratio of the horizontal and vertical display resolutions of the three-dimensional images can be equal to a ratio of the horizontal and vertical display resolutions of the two-dimensional images, and the quality of three-dimensional images can be improved.
US08339704B2 Photolithographed micro-mirror well for 3D tomogram imaging of individual cells
A micro-mirror well. In one embodiment the micro-mirror well includes a plurality of planar mirrors arranged around an axis of symmetry and inclined to form a pyramid well, where each of the plurality of planar mirrors is capable of reflecting light emitting from an object of interest placed inside the pyramid well.
US08339700B2 Infrared reflective laminate
The infrared reflective layered product can reflect infrared radiation with certain wavelengths to prevent heat accumulation while exhibiting excellent heat resistance. The product includes a base layer (B), a layer (A) layered on one side of the layer (B), and a layer (C) layered on the other side of the layer (B). Layer (A) is a colored resin layer which has an absorptance of a light with a wavelength of 800-1400 nm of not more than 10%. Layer (B) is a thermoplastic resin layer which shows a dimensional change (s) satisfying 1%≧s≧−1% when left at 150° C. for 30 min. Layer C is a colored resin layer having a reflectance of a light with a wavelength of 400-1400 nm of not less than 50%. The product may also include a water vapor barrier layer (D).
US08339693B2 Fabrication process for computer-generated holograms, computer-generated hologram fabricated by that process, and computer-generated hologram
The invention provides a fabrication process for a computer-generated hologram wherein amplitude information and phase information are recorded on a given recording surface by means of computation by a computer. The computer-generated hologram is characterized by having a first direction and a second direction orthogonal to the first direction, and parallax in the first direction X alone. The hologram 1 comprises unit areas B1, B2, B3, . . . , Bm, . . . BM, each one having a given width in the second direction Y. In each unit area B1, B2, B3, . . . , Bm, . . . BM, there is a diffraction pattern having a spatial frequency Cm1, Cm2, Cm3, . . . , Cmt, . . . CmT that varies in the second direction.
US08339689B1 Exposure correction for scanners
A method and apparatus for exposure correction in scanners are disclosed. In the method, exposure is corrected for pixels received in an image sensor array. Exposure time is tracked for the incoming pixel data and a calibration factor is determined for correcting the gain, and the calibration factor is adjusted based on the tracked exposure time. In the apparatus, a scanner includes an illumination source and a sensor for receiving pixel data. Using values stored in a memory, circuitry is provided for determining a calibration factor, for tracking exposure time for the pixel data and for adjusting the pixel data based on the calibration factor and exposure time.
US08339688B2 Image forming apparatus
Four mounting units are linearly disposed in a machine body of an image forming apparatus. First and second platen covers that differ from each other in weight also differ from each other in interval between support units. The first platen cover can be mounted on the machine body using the mounting units, and the second platen cover can be mounted on the machine body using the mounting units.
US08339683B2 Laptop computer with scanning capability
A laptop computer is comprised of a base portion, a display portion, and a scanning/illuminating mechanism. The scanning/illuminating mechanism illuminates a display of the display portion of the laptop computer and illuminates a document during scanning of the document.
US08339682B2 Lighting device for use in an optical scanning unit, of an image reader
In a lighting device, a light source emits light. A second sandwiching member includes a second opposed surface opposing a first opposed surface of a first sandwiching member. The first sandwiching member and the second sandwiching member sandwich the light source in such a manner that the light source is detachably attached to the first sandwiching member and the second sandwiching member. A reflection member is provided on the first opposed surface of the first sandwiching member and the second opposed surface of the second sandwiching member to reflect the light emitted by the light source toward an irradiation region on an original document sheet. A positioning member is provided in the first opposed surface of the first sandwiching member and the second opposed surface of the second sandwiching member to position the light source with respect to the reflection member.
US08339681B2 Image reading method for sheet media and a sheet media processing device
The first reading start point D of a front contact image sensor 21 and the second reading start point F of a back contact image sensor 22 are managed using a previously measured sensor-to-sensor distance L. As a result, even if there is a difference in the distance between the sensors, the first and second reading start points D and F will still be a first margin length L1 before the image reading positions A and B of the contact image sensors 21 and 22. Because the beginning of the front image information FD2 and the beginning of the back image information BD2 contained in the back-side image data BD1 in the images captured by the contact image sensors 21 and 22 match, the front image information FD2 can be extracted based on the coordinates of the back image information BD2 contained in the back-side image data BD1.
US08339679B2 Image processing apparatus, method, and medium storing program thereof for generating image data having a dot image used to suppress information leakage
A region of a latent image and that of a background image in a first dot image are converted into binary data so as to have different binary data, and a region of the latent image in the binary data is converted into dot data by expressing that region as dots. A second dot image is converted into outline data by removing dots of a region corresponding to the region of the latent image to form an outline region. The converted dot data and converted outline data are composited to generate a dot image including the outline data as a latent image and the dot data as a background image.
US08339677B2 Image processing system, image processing apparatus, and image processing method
An image processing system includes: an image input unit which reads an image printed on a medium and generates electronic data representing the image; and a processing unit which corrects the image represented by the electronic data. The processing unit implements the functions of: detecting, from the image represented by the electronic data, a first pattern having a first size and shape that is attached to the image; measuring a degree of degradation by measuring an amount of displacement of the size of the detected first pattern from the first size; and correcting the image represented by the electronic data to reduce the degree of degradation.
US08339676B2 Methods, systems and apparatus to compensate for distortions caused by fusing
This disclosure provides printing methods, systems and apparatus to compensate for distortions by fusing toner applied to a media substrate. According to one exemplary method, image data is processed according to media characterization data for a toner density value associated with the image. The processed image data compensates for media substrate distortions due to fusing of a printed image on the media substrate.
US08339667B2 Optimizing to-be printed objects during print job processing
Methods for processing print jobs in rendering devices include representing multiple to-be-printed objects with fewer such objects before processing of the objects occurs. In this manner, processing and memory requirements are optimized. Examples include utilizing a single raster operation function of one object for an entirety of objects; using fewer raster operation functions than originally required for the entirety of objects; creating a no processing (NOP) situation; and effectively creating a mask. Other aspects include modifying raster operation functions of one or more objects to have fewer variables than originally specified by the print job. Printers having stored or accessible computer executable instructions for performing the steps are also disclosed as are host devices that may direct or control the printer to perform the same.
US08339660B2 Tandem continuous paper printer
A tandem continuous paper printer includes: a first printer engine; a second printer engine; and a printer controller; and performing tandem printing by performing printing using the second printer engine on a paper that has been printed on by the first printer engine, the tandem continuous paper printer being arranged so that the first printer engine is made to print tandem check marks on the paper at check page intervals and the second printer engine is provided with a sensor detecting the tandem check marks.
US08339654B2 Document processing system, document processing method, and computer-readable storage medium
A document processing system includes a printing apparatus configured to perform printing and a post-processing apparatus configured to execute post-processing on a print product. The document processing system includes a setting unit configured to set a sheet-feeding direction of the print product to be fed to the post-processing apparatus, and a print control unit configured to control the printing apparatus to print on the print product a mark indicating the sheet-feeding direction set by the setting unit.
US08339652B2 Label creating apparatus, method for controlling label creating apparatus and computer program
Provided herein is a label creating apparatus including: a memory unit to associate and memory a first character or graphic with a second character or graphic that has a pairwise relationship with the first character or graphic; an input unit to allow inputting the first character or graphic; a display unit to display according to the first character or graphic input with the input unit the second character or graphic memory in the memory unit; and a printing unit to print the first character or graphic that has been input and the second character or graphic that has been displayed. The label creating apparatus creates a pair of labels on which the characters or graphics that have a pairwise relationship are respectively printed.
US08339650B2 Image forming apparatus, image forming method, and storage medium
An image forming apparatus, an image forming method, and a storage medium. The image forming apparatus includes a memory, a frame creator to create at least one rendering frame in the memory, a renderer to render rendering data on the at least one rendering frame based on print data, and a control device to arrange the rendering data according to a sequence of the print data in duplex printing.
US08339646B2 Systems and methods for the reliable transmission of facsimiles over packet networks
Described herein is a facsimile to voice over IP adapter for the real-time reliable transmission of audio messages using HTTP, the voice over IP adapter having audio adapter interfaces, the audio adapter interfaces capable of receiving a audio encoded facsimile data stream; ethernet adapter interfaces, the ethernet adapter interface capable of transmitting an HTTP encoded facsimile image; a fax processor, the real-time fax processor capable of receiving a one or more audio streams from the audio adapter interface and packetizing the one or more audio streams into an HTTP encode facsimile image; where the facsimile is capable of being transmitted from a source facsimile machine through an voice over IP adapter, and further transmitted to a destination facsimile machine.
US08339643B2 Image forming system that can reduce processing time by using a difference integration unit
An image forming system includes an image processing device and an image forming device. The image processing device includes a print job accepting unit, a job data creating unit, a differential job data creating unit, and a job data transmit unit. The image forming device includes a communication unit, and a print controller that forms images based on basic job data and diversion job data restored by the difference integration unit on a recording medium.
US08339633B2 Restricting print control until document data update
An image forming apparatus is equipped with a scanner for scanning a paper document to thereby convert it to document data; a document memory for storing the document data; and a history memory for holding a history of user operations on the document data in association with whether or not the user operations are being managed as an object of control processing. A user operation upon document data is accepted from a operating unit. If this user operation is being managed as an operation that is not an object of control processing in the history memory, then the document data is processed based upon this user operation.
US08339629B2 Data processing device, communication processing method, and computer program
To prevent a situation that an external device cannot confirm that a data processing device cannot execute data reception, the data processing device first notifies the external device of a first data size capable of being received by the data processing device and then notifies the external device a second data size larger than the first data size.
US08339626B2 Image forming apparatus and controlling method thereof
An image forming apparatus includes an engine unit to execute an image forming job, a determination unit to repeatedly determine whether the image forming apparatus is in a standby state or not, based on whether the standby state to wait for execution of the image forming job is maintained for a predetermined time or not, and a controller to control the image forming apparatus to operate in a first power saving mode if it is determined that the image forming apparatus is in the standby state, wherein, in the first power saving mode, information stored in a volatile memory is copied to an internal memory and operation frequencies of a CPU, the volatile memory, and an intellectual property are lowered. Accordingly, power consumption in the standby state is reduced in a stepwise manner.
US08339622B2 Image processing apparatus and integrated document generating method
An image processing apparatus includes a vectorizing unit configured to convert bitmap image data into vectorized data; an integrated document generating unit configured to generate an integrated document which includes the vectorized data and metadata; an accompanying information extraction unit configured to extract one or more of accompanying information relating to the bitmap image data from the bitmap image data; a selection unit configured to select accompanying information meeting conditions which have been defined beforehand out of one or more of accompanying information extracted by the accompanying information extraction unit; and a registration unit configured to register the accompanying information selected by the selection unit as the metadata of the integrated document.
US08339621B2 Multifunctional device with automatic switching mode
The multifunction device includes a first mode device, a second mode device, an operating unit, a detecting unit, and a switching unit. The first mode device provides a reading mode that reads image information with using a first type medium. The second mode device provides a writing mode that writes image information with using a second type medium. The operating unit provides each operating environment corresponding to each mode. The detecting unit detects either the first type medium or the second type medium used. The switching unit automatically switches the operating environment provided by the operating unit based on the type of the medium detected by the detecting unit.
US08339619B2 System and image processing method and apparatus for re-using and re-editing images
This invention provides an image processing system and image processing method, which can acquire a document such as a paper document or the like as data of a format that allows easy re-use and re-edit processes. Image information is acquired by scanning a document, and its features are recognized. The image information is converted into character codes, vector data, or a predetermined image format in accordance with the recognized features. In this case, parameters used upon recognizing the features of the image information are variably set, and the operations of the character process, vectorization, and image conversion are controlled in accordance with the set parameters.
US08339613B2 Making method of sample for evaluation of laser irradiation position and making apparatus thereof and evaluation method of stability of laser irradiation position and evaluation apparatus thereof
A method for making a sample for evaluation of laser irradiation position and evaluating the sample, and an apparatus which is switchable between a first mode of modification of semiconductor and a second mode of making and evaluating the sample. Specifically, a sample is made by irradiating a semiconductor substrate for evaluation with a pulse laser beam while the semiconductor substrate is moved for evaluation at an evaluation speed higher than a modifying treatment speed, each relative positional information between pulse-irradiated regions in the sample is extracted, and stability of the each relative positional information between pulse-irradiated regions is evaluated. The evaluation speed is such a speed that separates the pulse-irradiated regions on the sample from each other in a moving direction.
US08339609B2 Evaluation method of fouling, fouling evaluation apparatus, production method of optical member, optical layered body, and display product
The present invention provides a quantitative evaluation method of fouling of antifouling properties, a fouling evaluation apparatus, and a production method of optical members, which can be applied to various members, and haves high reproducibility and enable to detect a subtle difference between fouling, and an optical layered body having a property of preventing fingerprints from adhering, an anti-contamination property and a degree of recovery from fouling, and a display product including the optical layered body.The present invention pertains to an evaluation method of fouling, wherein light is radiated to a test sample and scattered light reflected off or passing through the test sample is detected to evaluate a degree of fouling of the surface of the test sample.
US08339604B2 Substrate including alignment marks, methods of aligning wafers and fabricating semiconductors
Provided is a substrate having an alignment mark, methods of aligning wafers and fabricating semiconductors. An alignment method of a wafer comprises providing a wafer on a wafer stage of a photolithography apparatus, irradiating light to the alignment mark, collecting reflected light from the alignment mark, analyzing optical information of the collected light, and determining a location of the wafer based on the analyzed optical information, wherein the wafer comprises a first surface having an alignment mark, the alignment mark including a first plurality of alignment patterns in a first row, and a second plurality of alignment patterns in a second row, the second plurality of alignment patterns being adjacent to the first plurality of alignment patterns, wherein the first plurality of alignment patterns are arranged in a row direction at a first pitch, and the second plurality of alignment patterns are arranged in the row direction at a second pitch different from the first pitch.
US08339600B2 Dual waveband compact catadioptric imaging spectrometer
A catadioptric dual waveband imaging spectrometer that covers the visible through short-wave infrared, and the midwave infrared spectral regions, dispersing the visible through shortwave infrared with a zinc selenide grating and midwave infrared with a sapphire prism. The grating and prism are at the cold stop position, enabling the pupil to be split between them. The spectra for both wavebands are focused onto the relevant sections of a single dual waveband detector. Spatial keystone distortion is controlled to less than one tenth of a pixel over the full wavelength range, facilitating the matching of the spectra in the midwave infrared with the shorter wavelength region.
US08339595B2 Diffraction based overlay metrology tool and method
Systems, methods, and apparatus are provided for determining overlay of a pattern on a substrate with a mask pattern defined in a resist layer on top of the pattern on the substrate. A first grating is provided under a second grating, each having substantially identical pitch to the other, together forming a composite grating. A first illumination beam is provided under an angle of incidence along a first horizontal direction. The intensity of a diffracted beam from the composite grating is measured. A second illumination beam is provided under the angle of incidence along a second horizontal direction. The second horizontal direction is opposite to the first horizontal direction. The intensity of the diffracted beam from the composite grating is measured. The difference between the diffracted beam from the first illumination beam and the diffracted beam from the second illumination beam, linearly scaled, results in the overlay error.
US08339594B2 Method for measuring semiconductor wafer profile and device for measuring the same used therefor
Disclosed is a method for measuring a profile using a device for measuring the profile in which included are: a distance measuring means 2 for measuring the distance to an edge region of a semiconductor wafer 12 in such a manner that light is emitted to be reflected at the edge region and to be detected; a first swing mechanism swingably supporting the distance measuring means 2; and a second swing mechanism swingably supporting the first swing mechanism, the method comprising the steps of: locating angles of the first swing mechanism each of which gives a maximum intensity of received light at each of predetermined angles of the second swing mechanism thereof; calculating contour points using coordinate transformation, thereby enabling points-related data to be acquired to represent a contour profile of the edge region. Thus, the method can be used for edge profile measurement of large-diameter wafers.
US08339593B2 System and method of two-stepped laser scattering defect inspection
A laser scattering defect inspection system includes: a stage unit that rotates a workpiece W and transports the workpiece W in one direction; a laser light source that emits a laser beam LB toward the workpiece W mounted on the stage unit; an optical deflector that scans the laser beam LB emitted from the laser light source on the workpiece W; an optical detector that detects the laser beam LB scattered from the surface of the workpiece W; a storage unit that stores defect inspection conditions for each inspection step of a manufacturing process of the workpiece W, where the conditions include the rotation speed and the moving speed of the workpiece W by the stage unit, the scan width on the workpiece W and the scan frequency by the optical deflector; and a control unit that reads the defect inspection conditions stored for each inspection step in the storage unit and controls the driving of the stage unit and the optical deflector under the conditions.
US08339591B2 Apparatus for interrogating fibre Bragg gratings
Apparatus for interrogating an optical fiber comprising a plurality of fiber Bragg gratings each having a resonant wavelength in a different discrete wavelength band. The apparatus comprises a delay arrangement interposed in use in an optical path for light supplied to and/or reflected from the fiber Bragg gratings. The delay arrangement is configured to apply a different time delay to light in each of the discrete wavelength bands, whereby the light reflected from each of the fiber Bragg gratings is received at an interrogator port of the apparatus in a different discrete time interval.
US08339590B2 Fiber cable distortion detection system and method
A fiber cable distortion detection system includes a broadband source, an optical source fiber disposed in optical communication with the broadband source, an optical fiber under test (FUT) disposed in optical communication with the optical source fiber and an optical spectrum analyzer disposed in optical communication with the optical source fiber. The system combines the refection of the distortion with the reflection from the source/FUT interface using a 1×2 fiber coupler, the location of the distortion is precisely determined with high resolution by the spectrum of the combined signal. The system is miniaturized to the size of a hand-held device suitable for use in airplane cable plant installation or in an environment where space is limited.
US08339579B2 Exposure method
An exposure method for exposing a pattern of a reticle which includes a first pattern and a second pattern by using a light from a light source and an optical system includes the steps of obtaining information relating to the first pattern and plural types of representative patterns that can be used for the second pattern, and setting, for the first pattern and the plural types of representative patterns, (i) at least one exposure parameter of the light source and the optical system or (ii) a size or shape of the first pattern and the plural types of representative patterns.
US08339577B2 Method and device for monitoring multiple mirror arrays in an illumination system of a microlithographic projection exposure apparatus
An illumination system of a microlithographic projection exposure apparatus has a pupil surface and an essentially flat arrangement of desirably individually drivable beam deviating elements for variable illumination of the pupil surface. Each beam deviating element allows deviation of a projection light beam incident on it to be achieved as a function of a control signal applied to the beam deviating element. A measurement illumination instrument directs a measurement light beam, independent of the projection light beams, onto a beam deviating element. A detector instrument records the measurement light beam after deviation by the beam deviating element. An evaluation unit determines the deviation of the projection light beam from measurement signals provided by the detector instrument.
US08339574B2 Lithographic apparatus and device manufacturing method
A lithographic apparatus includes a support structure configured to hold a patterning device, the patterning device configured to pattern a beam of radiation according to a desired pattern, a substrate table configured to hold a substrate and a projection system configured to project the beam as patterned onto a target portion of the substrate. The lithographic apparatus further includes a polarization modifier disposed in a path of the beam. The polarization modifier comprises a material having a linear polarization.
US08339573B2 Method and apparatus for photoimaging a substrate
A method includes providing a substrate having a layer of photosensitive material thereon and a mask having contiguous first, second, and third portions; and sequentially: i) scanning the first portion with a light beam at a first rate and subsequently impinges on the photosensitive material at an exposure zone; ii) fixing the scanning within the second portion; and iii) resuming scanning through the third portion. Throughout the process the substrate moves through the exposure zone. An apparatus for carrying out the process includes a light beam source, a mask mount, a mask stage, a conveyor assembly, and at least one optical element for manipulating the light beam into a rectangular light beam.
US08339568B2 Foreign particle inspection apparatus, exposure apparatus, and method of manufacturing device
A foreign particle inspection apparatus includes a light projecting unit, a photo-receiving unit which receives the scattered light, and a controller. The photo-receiving unit is arranged such that its optical axis is tilted by a first angle with respect to a plane including the optical axis and the normal axis to the surface. When the angle of the polarization axis of the projected light with respect to the plane is defined as a second angle, the controller controls at least one of the polarization axis and the arrangement of the photo-receiving unit so that the differences between the first angle and the second angle become a first state and a second state, thereby determining a foreign particle based on the outputs from the photo-receiving unit in the first state and the second state.
US08339564B2 Liquid crystal display and method of manufacturing the same
A liquid crystal display includes: a pair of substrates having display regions in positions facing each other and surrounding regions around the display regions, respectively, one of the pair of substrates including a wire made of a material blocking an ultraviolet ray in the surrounding region; a liquid crystal layer sandwiched between the pair of substrates; and a sealing layer arranged so as to overlap a part or the whole of the wire in a direction where the pair of substrates face each other, and sealing the liquid crystal layer, in which the sealing layer is made of a light-curable resin or a combination type resin and includes a photopolymerization initiator, and the content of the photopolymerization initiator is within a range of 0.01 wt % to 1 wt %, and the photopolymerization initiator has a wavelength peak of 320 nm to 420 nm.
US08339555B2 In-plane switching liquid crystal display device having improved brightness and aperture ratio
An in-plane switching liquid crystal display device includes a gate line and a data line on a substrate, the gate and data lines crossing each other to define a pixel region, a thin film transistor electrically connected to the gate and data lines, a pixel electrode connected to the thin film transistor, and a common electrode alternately arranged with the pixel electrode to form n blocks in the pixel region. Widths of some of the blocks are different than widths of other of the blocks.
US08339552B2 Array substrate for fringe field switching mode liquid crystal display device
An array substrate for a fringe field switching mode liquid crystal display device includes a substrate including a plurality of pixel regions each having a first domain, a second domain and a domain boundary area between the first and second domains; gate and data lines on the substrate and crossing each other to define the pixel region; a thin film transistor in each pixel region and connected to the gate and data lines; a pixel electrode in each pixel region and connected to the thin film transistor; and a common electrode overlapping the pixel electrode with an insulating layer interposed between the common and pixel electrode, wherein a plurality of openings are formed through the common electrode or the pixel electrode, and each opening has a first angle in the first and second domains with respect to a rubbing direction and a second angle larger than the first angle in the domain boundary area with respect to the rubbing direction.
US08339549B2 Liquid crystal display device and manufacturing method thereof
A liquid crystal display device has a liquid crystal display panel including pixels each having an active device, a pixel electrode, a common electrode and a liquid crystal layer arranged in a dot matrix array. The liquid crystal display panel has a first substrate, a second substrate, and a liquid crystal layer provided between the first substrate and the second substrate. The first substrate has the active device, the pixel electrode, the common electrode and a first alignment film. The second substrate has a second alignment film. The first alignment film and the second alignment film are respectively a photo alignment film formed by irradiating a photo decomposition type insulating film with light. The second alignment film has a thickness of at least 10 nm and no greater 50 nm and is thinner than the first alignment film.
US08339545B2 TFT-LCD array substrate and method of manufacturing the same
A thin film transistor liquid crystal display (TFT-LCD) array substrate, comprising a plurality of gate lines and a plurality of data lines formed on a substrate. The gate lines and the data lines define a plurality of pixel regions, and, in each of the pixel regions, a pixel electrode, a thin film transistor and a first light blocking bar are formed, and a second light blocking bar is formed over the first light blocking bar.
US08339543B2 Plasmonic device tuned using elastic and refractive modulation mechanisms
A plasmonic display device is provided having dual modulation mechanisms. The device has an electrically conductive bottom electrode that may be either transparent or reflective. A dielectric layer overlies the bottom electrode, made from an elastic polymer material having a refractive index responsive to an electric field. An electrically conductive top electrode, either transparent or reflective, overlies the dielectric layer. A plasmonic layer, including a plurality of discrete plasmonic particles, is interposed between the top and bottom electrodes and in contact with the dielectric layer. In one aspect, the plasmonic layer is embedded in the dielectric layer. Alternately, the plasmonic layer overlies the bottom (or top) electrode. Then, the dielectric layer overlies the plasmonic layer particles and exposed regions of the bottom electrode between the first plasmonic layer particles.
US08339541B2 Backlight unit including light emitting diodes and liquid crystal display device including the same
A backlight unit for a liquid crystal display device includes a plurality of white LEDs on a PCB, along a length direction of the PCB, and emitting white lights, the plurality of white LEDs including first and second LEDs alternately arranged; and a plurality of optical sheets on a path of the white lights from the plurality of white LEDs to a liquid crystal panel, wherein the white light from the first LED and the white light from the second LED are substantially complementary in color to each other with respect to a target white light.
US08339539B2 Illumination device and liquid crystal display device
A backlight (illumination device) 2 is disclosed including: light sources (5); light guide plates (7) for causing surface emission of light from the light sources (5); and a diffusing plate (8) for diffusing light from the light guide plates (7), the diffusing plate (8) facing a light-emitting surface (7a) of each of the light guide plates (7) at a predetermined distance. The illumination device further includes at least one maintaining section between the light-emitting surface (7a) of the light guide plate (7) and the diffusing plate (8), the maintaining section (10) maintaining the predetermined distance. The maintaining section (10) is provided on either of first and second end sections of the light-emitting surface (7a) of a light guide plate (7), the first end section being closer to a corresponding light source (5), the second end section being farther from the corresponding light source (5).
US08339538B2 Display device, terminal device, light source device, and optical member having a light-direction restricting element and a transparent/scattering state switching element
A display device comprising a light source and having an optical waveguide, a louver, an anisotropic scattering sheet, and a transmissive liquid crystal panel disposed along the path of light emitted from the light source. The light-restricting direction of the louver is tilted at an angle α from the Y-axis direction. The value of the angle α is set so that the arrangement direction of moiré created between the louver and the liquid crystal panel approaches the X-axis direction. A plurality of belt-shaped convex portions extending in the Y-axis direction are formed on the surface of the anisotropic scattering sheet, and are configured so that the scattering direction of the light has anisotropy. Specifically, scattering in the X-axis direction is increased, and scattering in the Y-axis direction is reduced. Moiré can thereby be reduced in a display device having increased directivity of the display.
US08339537B2 Display
A display includes an outer frame defining an circumferential opening in a center, a protective glass accommodated in the opening, an inner frame mounted to the outer frame below the glass, and a liquid crystal display panel mounted to the inner frame. The inner side of the outer frame bounding the opening defines a latching slot to receive sides of the protective glass. The protective glass protects the liquid crystal display panel from being scraped or scratched.
US08339536B2 Display module, display-module support structure and liquid crystal display apparatus
A display module is equipped with a display panel having a display screen for displaying images on a front side of the panel. A panel chassis is provided on a rear side of the display panel with respect to the display screen. The display module is assembled with a plurality of fixing members. Each fixing member has a panel holder to hold the display panel as covering a portion of a periphery of the display screen and a chassis coupling member coupled to the panel chassis so that the display panel is interposed between the panel holder and the panel chassis.
US08339526B2 Vehicle rearview mirror assembly including a high intensity display
An inventive rearview assembly for a vehicle may comprise a mirror element and a display including a light management subassembly. The subassembly may comprise an LCD placed behind a transflective layer of the mirror element. Despite a low transmittance through the transflective layer, the inventive display is capable of generating a viewable display image having an intensity of at least 250 cd/m2 and up to 3500 cd/m2. The display includes a novel backlighting subassembly and novel optical components including a magnifying system, a depolarizer, a reflector, and a reflective polarizer. The display may be configured to display an image having edges contoured to correspond to the edges of the mirror element.
US08339523B2 Television apparatus and electronic apparatus
According to one embodiment, a television apparatus includes a housing, a vibration module attached to the housing, a supporting portion which is secured to the housing and supports the vibration module for vibration, and an oscillation unit which causes the vibration module to vibrate. In addition, the television apparatus includes a plurality of first projections protruding from one of the vibration module and the housing toward the other, a sheet spanning between respective distal end portions of the first projections, and a plurality of second projections provided on the other of the vibration module and the housing and abutting the sheet at positions between the first projections.
US08339522B2 Liquid crystal panel, plasma display panel, and wide-screen liquid crystal television
There is provided a liquid crystal television and a plasma television that can adapt to various destinations and are resistant to noise in view of the difference of circuit configurations between a liquid crystal television and a plasma television. A video signal processing circuit is formed on a digital board, an input and output circuit is formed on a jack board, an audio signal processing circuit and a power supply circuit are formed on an analog board, and a rectifier circuit and an inverter circuit are formed on an inverter board. Further, on the back of the LCD, the inverter board is disposed in a vertically oriented shape in the left, the analog board is disposed in the lower center, the digital board is disposed in the upper center adjacent to the analog board, and the jack board is disposed in the upper right.
US08339519B2 Image processing apparatus and method and image display apparatus and method
An image processing apparatus, in which an interpolation frame is inserted between a current frame and a first delayed frame preceding the current frame by one frame, includes a motion vector detector, a motion vector converter, and an interpolation frame generator; wherein the motion vector detector includes a test interpolator outputting test interpolation data, an interpolation data evaluator evaluating a correlation of each of the test interpolation data with reference to the first-delayed-frame block data, thereby outputting evaluation data indicating results of the evaluating, and a motion vector determiner outputting a motion vector of an item of the evaluation data having highest correlation in the plurality of items of the evaluation data; and the first to third test interpolation data are obtained as the test interpolation data from a plurality of items of the second-delayed-frame block data and a plurality of items of the current-frame block data.
US08339517B2 Television broadcast receiving apparatus
A television broadcast receiving apparatus has a demodulating unit including a PLL part synchronizing a phase of an IF signal with a phase of an internally generated carrier signal and outputting an out-of-synchronization flag signal when the IF signal and the carrier signal are in an unsynchronized state, and a muting part muting a sound intermediate frequency signal and outputting a noise signal of a predetermined level when the out-of-synchronization flag signal is outputted from the PLL part. Therefore, even when an IF amplifier of a tuning unit amplifies a noise at the maximum gain when there is no signal, an abnormal sound can be prevented from being outputted from a speaker of a decode and output unit.
US08339512B2 Method and apparatus for enhancement of high-definition video content
The detail and clarity of high-definition video content may be enhanced by a display device or client-side device before being displayed. In certain embodiments, the high-definition video image frames may be upsampled by scaling the image's resolution. The now-upsampled HD video image frames may then be low pass filtered so as to concentrate the image's energy distribution into a tighter range of frequencies. The filtered HD video image frames may then be sub-sampled back down, such as to the original HD image's frame resolution, or other HD-level resolution, without compromising image detail. In this fashion, the clarity and detail level in video content, even though already considered of a high-definition quality, may be further improved.
US08339509B2 Electronic device and camera
The object of the present invention is to enable reliable supply of oxygen which is necessary for a fuel cell to generate electric power, to the fuel cell. In a bottom surface of a casing of a camera, a tripod socket for mounting a tripod is disposed in the vicinity of the right end portion, and air orifices for linking the space inside a cell compartment for accommodating a fuel cell with the outside of the casing is disposed in the vicinity of the left end portion, respectively. As a result, even when the tripod is connected to the camera, the air orifices are not closed by the pan head of the tripod, oxygen (air) can be constantly supplied to the fuel cell accommodated inside the cell compartment, and the fuel cell can continuously generate a sufficient quantity of electricity. The present invention can be employed in a camera.
US08339495B2 Solid-state image pickup apparatus and method for driving solid-state image pickup apparatus
A solid-state image pickup apparatus includes rows and columns of pixels, each column or each set of a plurality of columns being provided with an analog-to-digital converter. When an operation for holding analog electric signals performed by the analog-to-digital converters is performed simultaneously with an operation for outputting data from memories holding digital signals that are output from the analog-to-digital converters, “streaky noise” artifacts appear on an image obtained by such operations. To avoid this, the operation for holding the analog electric signals and the operation for outputting data from the memories holding the digital signals are set apart from each other by at least one data clock period of a scanning circuit.
US08339488B2 Solid-state image pickup device having laminated color filters, manufacturing method thereof, and electronic apparatus incorporating same
A solid-state image pickup device includes photoelectric conversion parts formed on an image pickup surface of a substrate, where each photoelectric conversion part generates a signal charge by receiving incident light on a light reception surface thereof, and color filters formed on an image-pickup surface of the substrate, where each color filter allows the incident light to be colored by passing through. The photoelectric conversion parts are aligned in first and second directions and include first to third color filters. A surface on which the first color filter and the second color filter are laminated in the first direction is larger than a surface on which the first color filter and the third color filter are laminated in the second direction.
US08339485B2 Apparatus, method and computer readable storage medium outputting a processed signal having corrected gamma values to a location based on a user indication
A video signal processing apparatus includes a user interface unit, a gamma correction value calculating unit, and a gamma correction value storage unit. The user interface unit receives a designation of values of at least three points that form a gamma curve used during gamma correction of a video signal. The gamma correction value calculating unit calculates gamma correction values by substituting coefficients, obtained by an approximation calculation carried out on the values of the at least three points, whose designation is received by the user interface unit, into an exponential function using the coefficients as parameters. The gamma correction value storage unit stores the gamma correction values calculated by the gamma correction value calculating unit and is operable when an indication confirming the gamma correction values has been received from the user, to output the gamma correction values to a gamma correction unit carrying out processing for gamma correction.
US08339482B2 Image capturing apparatus with correction using optical black areas, control method therefor and program
An image capturing apparatus comprises: an image sensor having an effective pixel area where plural pixels not shield from light are two-dimensionally arranged, and a first optical black area and a second optical black area including pixels shielded from light provided on the both sides of the effective pixel area; and a correction unit to, upon incident of high luminance light on the image sensor, correct an output signal of a pixel between a high luminance portion as a pixel part on which the high luminance light is incident in the effective pixel area and the first optical black area using an output signal of the first optical black area, and correct an output signal of a pixel between the high luminance portion and the second optical black area, using an output signal of the second optical black area.
US08339481B2 Image restoration devices adapted to remove artifacts from a restored image and associated image restoration methods
An image restoration method includes receiving an externally input image signal, generating a filtered image signal by filtering the input image signal, and generating a restored image signal by calculating a weighted average of the input image signal and the filtered image signal. Such a method may be implemented using an image restoration device including an image filtering unit adapted generated the filtered image signal, and an image mixing unit adapted to generate the restored image signal. More particularly, the restored image signal may be generated using weighting factors calculated based on the input image signal, by calculating a local variance of pixels in the input image signal, and calculating the weighting factor for each of the pixels based on the local variance of each of the pixels.
US08339479B2 Image capturing device and image synthesis method thereof
An image capturing device and an image synthesis method thereof are disclosed. The image capturing device includes an image capturing module, an exposure module, and a processing module. The image capturing module captures a scene image corresponding to a scene. The exposure module meters the light of scene to generate a plurality of histograms. The processing module calculates a plurality of discrete values of the scene image in different exposure conditions according to the histograms. Further, based upon at least two highest discrete values, the processing module processes the scene image to generate at least two temporary images in at least two different brightness conditions, and synthesizes the temporary images to generate a high dynamic range image.
US08339475B2 High dynamic range image combining
Systems and methods of high dynamic range image combining are disclosed. In a particular embodiment, a device includes a global mapping module configured to generate first globally mapped luminance values within a region of an image, a local mapping module configured to generate second locally mapped luminance values within the region of the image, and a combination module configured to determine luminance values within a corresponding region of an output image using a weighted sum of the first globally mapped luminance values and the second locally mapped luminance values. A weight of the weighted sum is at least partially based on a luminance variation within the region of the image.
US08339473B2 Video camera with flicker prevention
A video camera includes an image sensor. The image sensor repeatedly outputs an object scene image captured on an imaging surface. A CPU detects a luminance component of the object scene image outputted from the image sensor, i.e., an AE/AWB evaluation value, and also detects a high-frequency component of the object scene image outputted from the image sensor, i.e., an AF evaluation value. Moreover, the CPU executes a flicker determining process for determining whether or not a flicker is occurred based on the luminance component of the object scene image. However, prior to the flicker determining process, whether or not there is a dynamic object in the object scene is determined based on the high-frequency component of the object scene image. The flicker determining process is prohibited when there is the dynamic object while it is permitted when there is no dynamic object.
US08339469B2 Process for automatically determining a probability of image capture with a terminal using contextual data
A process for using a terminal capable of capturing images to determine a probability of capturing the images according to information taken from contextual data provided by the image capture means. The process uses a terminal such as a mobile terminal comprising a first image data sensor and at least one contextual data sensor to automatically determine at least one probability of capturing an image or a sequence of images taking place within a time interval, the capture probability being calculated based on at least one response provided by one of the activated image data and/or contextual data sensors.
US08339463B2 Camera lens calibration system
The invention is discloses a camera lens calibration system and method thereof, which comprise a calibration platform, the calibration platform comprise a calibration structure. A calibration camera lens to be calibrated is placed on the calibration platform. An image testing module is provided for capturing a target pattern from a target pattern display through the calibration camera lens to be calibrated for getting an image pattern. The image testing module provides a contrast parameter computation for calculating the contrast parameter of image pattern and showing results on a display.
US08339462B2 Methods and apparatuses for addressing chromatic abberations and purple fringing
Methods and systems for detecting and correcting chromatic aberration and purple fringing are disclosed. Chromatic aberration can be addressed by separating an image into color planes and then adjusting these to reduce chromatic aberration by using a specific calibration image (calibration chart) as an empirical method to calibrate the image acquisition device. Purple fringing can be corrected by initially addressing color aberration resulting from the lateral chromatic aberration (LCA). The LCA is first removed and then the correction is extended to purple fringing. A discovery is relied upon that the purple fringing is created in the direction of the chromatic aberration and is more pronounced in the direction of the chromatic aberration.
US08339458B2 Technique for allowing the modification of the audio characteristics of items appearing in an interactive video using RFID tags
The present solution can include a method for allowing the selective modification of audio characteristics of items appearing in a video. In this method, a RFID tag can be loaded with audio characteristics specific to a sound-producing element. The RFID tag can then be attached to an item that corresponds to the sound-producing element. The video and audio of the area including the item can be recorded. The audio characteristics can be automatically obtained by scanning the RFID tag. The audio characteristics can then be embedded within the video so that the audio characteristics are available when the item appears in the video.
US08339457B1 Systems and methods for time-shared memory access in a thermal imaging device
An imaging device for real-time display of image data on a local display and on a remote display is disclosed. In some embodiments, the imaging device can include an imaging engine, a memory device for storing image data, and a processor for receiving the image data from the imaging engine, storing the image data in the memory device, retrieving the image data from the memory device, and transmitting the image data to both a local display and remote display so that the image data can be viewed on both the remote display and local display simultaneously.
US08339456B2 Apparatus for intelligent and autonomous video content generation and streaming
A system for automatically capturing an event of interest in a venue is disclosed, comprising a plurality of cameras for capturing video images of the event; and at least one processor communicatively connected to said plurality of cameras and con figured to execute a plurality of modules, said modules comprising a rectification module for combining the video images to form a wide-angle view; at least one of a motion analysis module configured for tracking salient blobs that are not part of a background of the wide-angle view, an activity analysis module configured for extracting temporal and spatial patterns from the wide-angle view, and a shape and appearance module configured for selecting one or more objects in the wide-angle view based on descriptors that are scale and rotational invariant; and a region of interest selector for selecting a viewpoint from the wide-angle view based on output from at least one of the motion analysis module, the activity analysis module, and the shape and appearance module, wherein the region of interest selector outputs the selected viewpoint for display. The system further comprises at least one audio recording device for capturing audio from the event; and means for synchronizing the video images and audio.
US08339454B1 Vision-based car counting for multi-story carparks
Method and apparatus for counting vehicles at entrances, exits and transition zones of multi-story carparks, including particularly where the ceiling heights can be just marginally higher than the tallest expected vehicle, with a view to determine the carpark occupancy at different carpark levels by counting passing vehicles using a vision-based car counting system without relying on viewing test patterns or employing a blocking beam scheme and yet tolerating vehicles transgressing partially or fully into the wrong lane of a two-lane two-way road while ignoring vehicles moving opposite to the expected direction. Without imposing additional constraints to ambient carpark illumination, the methodology copes with highly specular vehicle surfaces, ignores non-vehicular objects and detects moving cast shadow or highlight, and adapts to daily and seasonal scene changes, and yet estimates vehicle speed.
US08339452B2 Monitor system for monitoring riverbed elevation change at bridge pier
A monitor system for monitoring riverbed elevation changes at bridge piers is revealed. The monitor system includes a container, a rail, a holder, a photographic unit, a processor and a transmission unit. The container is disposed at a pier under the water and the rail is mounted in the container. The holder is arranged at the rail and is moved on the rail. The photographic unit is disposed on the holder to capture a monitor image of a riverbed under the water. As to the processor, it processes the monitor image so as to learn elevation change of the riverbed under the water. By the transmission unit, the riverbed elevation change is sent to a remote monitor unit so as to get the riverbed elevation according to the riverbed elevation change. Thus the riverbed elevation change at the bridge pier is monitored in real time.
US08339451B2 Image navigation with multiple images
There is disclosed a method in a mobile communications device, wherein the method comprises displaying a main image, selecting an object in the main image, displaying a plurality of object images comprising the selected object, selecting a target object image from the plurality of object images, and displaying a target candidate image associated with the target object image.
US08339449B2 Defect monitoring in semiconductor device fabrication
A method of forming a device is presented. The method includes providing a substrate containing at least a partially formed device thereon. The device comprises at least one defect site. A pixilated image of the defect site is acquired, and each pixel comprises a grey level value (GLV). Surrounding noises of the defect site is eliminated. A point of the image is identified as the center of the defect. A plurality of iterations to exclude outer edge pixels surrounding the center of the defect image is performed. The defect is categorized as a killer or non-killer defect.
US08339447B2 Stereoscopic electronic microscope workstation
A stereoscopic microscope workstation providing high-resolution, real-time data to a display device. Various embodiments are disclosed including desktop and free-standing workstations. An image processing unit can be implemented, providing for natural orientation of the magnified image of the viewed object, also allowing rotation, cropping, filtering and other image manipulation features. Methods of performing a procedure utilizing the stereoscopic microscope workstation are disclosed, including a method of manipulating an object while viewing the object in a high-resolution real-time magnified image.
US08339443B2 Three-dimensional image display method and apparatus
A three-dimensional image display method, includes: displaying a three-dimensional image including a left eye image signal and a right eye image signal displayed at a display focus angle; determining whether to change a viewing focus angle with respect to the display focus angle; calculating a pixel distance between the left eye image signal and the right eye image signal if it is determined to change the viewing focus angle; and displaying indicator marks at positions spaced as much as a half of the pixel distance from a center of a screen in leftward and rightward directions.
US08339442B2 Image conversion method and image conversion apparatus
An image conversion apparatus includes an image signal input unit repeatedly inputting an odd-numbered frame of a first parallax, an odd-numbered frame of a second parallax, an even-numbered frame of the first parallax, and an even-numbered frame of the second parallax, in this order; a frame memory storing the first and second parallax data having been input; a memory control unit alternately reading as field data (m+1) pieces (m is an integer of one or larger than one) of identical odd-numbered frames of the first parallax and m pieces of identical odd-numbered frames of the second parallax, and subsequently alternately reading as field data m pieces of identical even-numbered frames of the first parallax and (m+1) pieces of identical even-numbered frames of the second parallax; and an image output unit outputting the field data having been read.
US08339436B2 Exposure unit containment mechanism and image-forming apparatus
An exposure unit containment mechanism includes an exposure unit and a frame that defines a space into which the exposure unit is inserted, the exposure unit including: first protrusions protruding in left and right directions at a position spaced apart from a center of gravity of the exposure unit in a direction of insertion; and a second protrusion protruding in a downward direction, and the frame including: a guide member that contacts the first protrusions from above to limit upward movement of the first protrusions during insertion of the exposure unit; a first limiting member that limits movement of the second protrusion in left and right directions; a second limiting member that contacts the first protrusions from underneath to limit downward movement of the same; and a first pressing member that presses the first protrusions from above when the first protrusions are in contact with the second limiting member.
US08339434B2 Light scanning unit and electrophotographic image forming apparatus employing the same
Provided are a light scanning unit and an electrophotographic image forming apparatus employing the same. A possible form deviation during fabrication of a cylindrical lens employed by the light scanning unit is reduced by intentionally giving a form deviation to the incident surface and the emission surface of the cylindrical lens in the main scanning direction.
US08339433B2 Alternate matrix drive method for a 1200dpi LED print-head
A print head, including: a plurality of chips disposed in a linear array; respective pluralities of first and second matrix drivers on each the chip connected to first and second channels, respectively; and for each chip, first groups of light-emitting diodes (LEDs). Each first group of LEDs includes: a second group of LEDs, with a first number of LEDs, connected to a respective first matrix driver; and a third group of LEDs, with the first number of LEDs, connected to a respective second matrix driver. LEDs in each first group of LEDs are disposed in a staggered arrangement; and the respective pluralities of first and second matrix drivers are for activating in sequence the LEDs in the second and third groups of LEDs, respectively.
US08339430B2 Single-chip display-driving circuit, display device and display system having the same
Display devices include a display driving circuit, which is configured to generate a source driving signal and a gate driving signal in response to image data and horizontal and vertical sync signals. This display driving circuit includes a resolution-type generator, a timing controller, a source driving circuit and a gate driving circuit. The resolution-type generator is configured to generate a resolution-type signal in response to a resolution selecting code and the timing controller is configured to generate first image data, a source driver control signal and a gate driver control signal in response to the resolution-type signal, the image data and the horizontal and vertical sync signals. The source driving circuit is configured to generate the source driving signal in response to grayscale voltages, the first image data and the source driver control signal. The gate driving circuit is configured to generate the gate driving signal in response to the gate driver control signal.
US08339429B2 Display monitor electric power consumption optimization
Controlling electrical power consumption of a display monitor screen involves grouping screen pixels into different resolution cells, detecting display of one or more windows on the screen, and selectively controlling the cells by providing power only to the pixels in cells corresponding to one or more windows of interest to the user, and reducing power to pixels in remaining cells.
US08339428B2 Asynchronous display driving scheme and display
A novel method for driving a display includes the steps of defining a modulation period during which a particular intensity value is asserted on a pixel of the display, dividing the modulation period into a plurality of coequal time intervals, receiving a data word, which includes a plurality of equally-weighted bits and is indicative of an intensity value to be displayed by the pixel, updating a signal asserted on the pixel during each of a plurality of consecutive time intervals during a first portion of the modulation period, and updating the signal asserted on the pixel every mth time interval during a second portion of the modulation period, where m is equal to the weight of each of the equally-weighted bits. The data word can either be composed of two groups of equally-weighed bits, or a combination of binary bits and equally-weighted. The invention also includes a novel display driver for executing the driving methods.
US08339426B2 Illuminator and display having same
A display apparatus can perform a high quality moving picture display and provides improved color purity, and includes an illumination device that prevents and minimizes light unevenness in the form of a lamp image. The display apparatus includes an illumination device in which a first scattering layer, a first light-condensing layer, a second scattering layer, and a second light-condensing layer are arranged so as to cover a light-radiating surface of a light source unit including a first light source that emits light of a first color and a second light source that emits light of a second color complementary to the first color, a gate driver arranged to sequentially select each one of scanning lines at a cycle of 0.5 frames, a source driver that, at a first half of one frame time period, writes a data signal into each in a group of pixels of the first color, and at a latter half thereof, writes a data signal into each in groups of pixels of other two colors, and a switch circuit that, at the first half of one frame time period, switches on the first light source while switching off the second light source, and at the latter half of the time period, switches on the second light source while switching off the first light source.
US08339425B2 Method of driving pixels and display apparatus for performing the method
A pixel is driven by first converted image data having a first polarity and being converted by an A-gamma curve during an (N)th frame where ‘N’ is a natural number. The pixel is driven by second converted image data having a second polarity opposite to the first polarity and being converted using the A-gamma curve during an (N+1)th frame. The pixel is driven by third converted image data having the first polarity and being converted using a B-gamma curve different from the A-gamma curve during an (N+2)th frame. The pixel is driven by fourth converted image data having the second polarity and being converted by the B-gamma curve during an (N+3)th frame.
US08339423B2 Display apparatus, display method, display monitor, and television receiver
An image display period of a first sub frame of an N-th frame is arranged to partly overlap the image display period of the second sub frame of the N-th frame and the image display period of a second sub frame of the (N−1)-th frame. Grayscale display voltages with which pixels that are horizontally or vertically neighbored are charged are arranged to have inverse polarities, and the polarity of the grayscale display voltage charging each pixel is reversed in each frame. Furthermore, neighboring data signal lines are short-circuited each time the polarity of the grayscale display voltage output to each data signal line is reversed.
US08339417B2 Open area maps based on vector graphics format images
Systems and methods corresponding to an open area map are disclosed. For example, one method includes receiving an image of a layout corresponding to a real-world area in which a person moves about. The image is in a vector graphics format. A reference region is determined using the image of the layout. A grid is combined with the reference region to generate a routable map. The routable map is configured to provide point-to-point routing within the layout.
US08339416B2 Image construction apparatus and computer-readable media
An image construction apparatus has functions of, based on an instruction from a user, creating a binary-coded program, creating a database, and associating the database with an image part. The use of those functions allows the user to easily construct an image including an image part associated with both the program and the database. Some embodiments enable easy association of information on an apparatus to be operated with image parts constructing an image displayed by a remote control apparatus. Some embodiments are suitable for constructing the screen of the remote control apparatus having a graphical user interface.
US08339414B2 Monitoring graphics processing
A graphics processing apparatus is provided with rendering circuitry which separately renders different areas of a frame of pixel values. Monitoring circuitry coupled to the rendering circuitry captures for each area rendered one or more parameters and stores these parameters to a parameter memory. A performance frame can be generated from the captured and stored parameters with performance-representing pixel values for each area within the performance frame corresponding to an area within the image frame and having a visual characteristic selected in dependence upon the performance parameter which was captured. The visual characteristic may be a grey-scale value, a pixel intensity or a pixel color.
US08339411B2 Assigning color values to pixels based on object structure
Systems and methods are provided for assigning color values to pixels based on object structure. For example, when rendering a writing system symbol on an electronic display, a non-color characteristic of the symbol can be measured and the measurement can be used to select a color value for a pixel associated with the symbol. Legibility of open and closed line-based graphical objects can be increased by inferring spatial depth and distance through application of a color assignment model.
US08339405B2 Programmable data processing circuit
A programmable data processing circuit has a memory for storing pixel values, or more generally data values as a function of position in a signal. The programmable data processing circuit supports instructions that include an indication of a selected parameter value set that indicates how a plurality of data values must be arranged for parallel output from a memory. Instructions that indicate different parameter value sets can be executed intermixed with one another. The programmable data processing circuit responds to instructions of this type by retrieving the selected parameter value sets from a parameter storage circuit (246), and controlling a switching circuit (22) between a memory port (21) of a memory circuit (20) and a data port (26) at least partly dependent on the selected parameter value set.
US08339404B2 System for improving utilization of GPU resources
A method, executable on a digital computer that includes a central processing unit (CPU) and a graphics processing unit (GPU), executes a series of instructions, in which a GPU data type is defined and at least one data unit is designated with the GPU data type. A series of instructions is executed on the central processing unit. The method determines that a first unit of instruction code, included in the series of instructions, will be scheduled to operate on a GPU data type-designated data unit within a predetermined number of cycles. The GPU data type-designated data unit is caused to be operated on by a second unit of instruction code, that functionally corresponds to the first unit of instruction code. The second unit of instruction code is executed on the graphics processing unit.
US08339403B2 Multi-layered slide transitions
Architecture that enhances the visual experience of a slide presentation by animating slide content as “actors” in the same background “scene”. This is provided by multi-layered transitions between slides, where a slide is first separated into “layers” (e.g., with a level of transparency). Each layer can then be transitioned independently. All layers are composited together to accomplish the end effect. The layers can comprise one or more content layers, and a background layer. The background layer can further be separated into a background graphics layer and a background fill layer. The transition phase can include a transition effect such as a fade, a wipe, a dissolve effect, and other desired effects. To provide the continuity and uniformity of presentation the content on the same background scene, a transition effect is not applied to the background layer.
US08339402B2 System and method of producing an animated performance utilizing multiple cameras
A real-time method for producing an animated performance is disclosed. The real-time method involves receiving animation data, the animation data used to animate a computer generated character. The animation data may comprise motion capture data, or puppetry data, or a combination thereof. A computer generated animated character is rendered in real-time with receiving the animation data. A body movement of the computer generated character may be based on the motion capture data, and a head and a facial movement are based on the puppetry data. A first view of the computer generated animated character is created from a first reference point. A second view of the computer generated animated character is created from a second reference point that is distinct from the first reference point. One or more of the first and second views of the computer generated animated character are displayed in real-time with receiving the animation data.
US08339396B2 Coarsening and splitting techniques
Disclosed herein are improved coarsening and splitting techniques for preparing grids for performing simulations. In some implementations, methods in accordance with the present disclosure may include providing a grid having a plurality of grid pillars; and performing one or more splitting operations on at least a portion of the grid to increase a grid density within the portion of the grid, the plurality of grid pillars within the portion of the grid being forced to remain fixed in position during the one or more splitting operations.
US08339392B2 Intelligent demand loading of regions for virtual universes
A computer implemented method, a computer program product, and a data processing system manage regions within a virtual universe. A current location of an avatar is identified within a virtual universe, the current location being within a currently populated region. A vectored movement of the avatar is identified. Any adjacent region that may probabilistically encounter a horizon of the avatar within a region activation time of the virtual universe is identified. If the adjacent region is deactivated, then the adjacent region is activated. An unpopulated region that is currently active is identified, wherein the unpopulated region is within an extended distance from the avatar's current location. The unpopulated region is then deactivated.
US08339390B2 Power supply circuit of display device and display device using the same
Provided are a power supply circuit and a display device which are capable of enhancing power efficiency even when applied to a display panel whose current consumption varies. The power supply circuit boosts and outputs an input voltage using a booster chopper circuit. A frequency control circuit changes a frequency of a clock signal, which controls a switch of the chopper circuit, in accordance with a load of the power supply circuit. The frequency control circuit divides an operation of the display device into a display effective period at a high load and a vertical retrace period at a low load, based on a vertical synchronizing signal and a horizontal synchronizing signal. The frequency control circuit sets the frequency of the clock signal in a high-load period to be higher than that in a low-load period.
US08339387B2 Display device and electronic apparatus
A display device able to amplify the same input as a power supply voltage of IC by using low temperature polysilicon having high threshold voltage and large variation and an electronic apparatus using the same, including MCK use level shifters 171-1 and 171-2 of a type where a reset operation is periodically necessary, a logic circuit 173 for using a level shift horizontal synchronization signal Hsync to input reset pulses for the MCK level shifters 171-1 and 171-2 having a period of N horizontal periods shifted in phase by M horizontal periods (note, M
US08339385B2 On demand calibration of imaging displays
A self calibrating imaging display system and machine-readable storage for such systems are provided, which perform various steps. The steps include forwarding a display test pattern, where the display test pattern including a measurement field comprising approximately 10% of a total number of pixels displayed by a screen and where the measurement field can be placed at different regions of the screen. The steps also include causing the measurement field to be stepped through a sequence of values. The steps further include receiving luminance and color values from photosensors to detect distinct luminance and color levels at the different regions of the screen. The steps also include determining luminance and color correction factors by comparing the detected luminance and color values to reference luminance and color data. The steps additionally include applying the determined luminance and color correction factors to the different regions of the screen.
US08339382B2 Stylus and electronic device using the same
A stylus includes a tube body, a touch end connected to the tube body, an inflatable balloon enwrapping the tube body such that the tube body and the balloon cooperatively define a sealed chamber, and an inflating mechanism for inserting gas into the sealed chamber to inflate the balloon and therefore, the size of the stylus is adjustable and convenient for using.
US08339381B2 Passive optical pen and user input system using the same
The present invention provides a passive optical pen for using with a display device, which comprises a handgrip for being held by a user, a reflector positioned on an end of the handgrip, and a transparent shield covering the reflector. The reflector reflects ambient light propagated from the display device toward the display device. The transparent shield keeps the reflector at a distance from the display device, and collects the ambient light.
US08339379B2 Light-based touch screen
A light-based touch screen, including a housing for a display screen, a plurality of infra-red light emitting diodes (LEDs), fastened on the housing, for generating light beams, at least one LED selector, fastened on the housing and connected with the plurality of LEDs, for controllably selecting and deselecting one or more of the plurality of LEDs, a plurality of photodiode (PD) receivers, fastened on the housing, for measuring light intensity, at least one PD selector, fastened on the housing and connected with the plurality of PD receivers, for controllably selecting and deselecting one or more of the plurality of PD receivers, an optical assembly, fastened on the housing, for projecting light beams emitted by the plurality of LEDs in substantially parallel planes over the housing, and a controller, fastened on the housing and coupled with the plurality of PD receivers, (i) for controlling the at least one LED selector, (ii) for controlling the at least one PD selector, and (iii) for determining therefrom position and velocity of an object crossing at least one of the substantially parallel planes, based on output currents of the plurality of PD receivers.
US08339376B2 Zooming techniques for touch screens
A device may include a touch-sensitive display, a memory to store a group of instructions, and a processor. The processor may execute the instructions in the memory to detect that a circular motion is being made on or near a surface of the touch-sensitive screen, detect a location on the touch-sensitive screen at which the circular motion is being made, and zoom in or zoom out on an item, being displayed on the touch-sensitive screen at the detected location, based on detecting that the circular motion is being made on or near the surface of the touch-sensitive screen.
US08339372B2 Inductive touch screen with integrated antenna for use in a communication device and methods for use therewith
A touch screen can be used in a communication device having a transceiver that communicates radio frequency (RF) signals with at least one remote station. The touch screen includes a display layer for displaying information. An inductor grid includes a plurality of inductive elements. A switch matrix selects a selected inductive element in response to a selection signal. A driver generates the selection signal and drives the selected inductive element to detect a touch object in proximity to the selected inductive element and generates touch screen data in response thereto. A plurality of coupling elements couple together a group of the plurality of inductive elements to form an antenna and further couple the antenna to the transceiver to send and receive the RF signals.
US08339370B2 Display device and method of sensing input point using magnetic fluid
A display device and method of sensing an input point using magnetic fluid, the display device including: a touch panel part to receive a user input through a touch at an input point and to calculate a coordinate value of the input point; an electromagnet arrangement part comprising a plurality of electromagnets to generate a magnetic force on one or more electromagnets in a portion corresponding to the coordinate value; and a magnetic fluid part to obtain magnetism at the portion corresponding to the coordinate vale and to project in accordance with the generated magnetic force.
US08339364B2 Spatially-correlated multi-display human-machine interface
A human-machine interface involves plural spatially-coherent visual presentation surfaces at least some of which are movable by a person. Plural windows or portholes into a virtual space, at least some of which are handheld and movable, are provided by using handheld and other display devices. Aspects of multi-dimensional spatiality of the moveable window (e.g., relative to another window) are determined and used to generate images. As one example, the moveable window can present a first person perspective “porthole” view into the virtual space, this porthole view changing based on aspects of the moveable window's spatiality in multi-dimensional space relative to a stationary window. A display can present an image of a virtual space, and an additional, moveable display can present an additional image of the same virtual space.
US08339360B2 Flexible display security CAPTCHA bends
An approach is provided that receives a request to perform an action by an information handling system that includes a processor. In response to the request, a captcha request that corresponds to a captcha is transmitted to a foldable display screen. A response is received from the foldable display screen with the response including one or more bends of the foldable display screen. The received one or more bends are compared to one or more expected bends included in the captcha. The requested action is performed in response to the comparison revealing that the received one or more bends match the one or more expected bends. On the other hand, performance of the requested action is inhibited in response to the comparison revealing that at least one of the received one or more bends fails to match at least one of the one or more expected bends.
US08339357B2 Character input system, character input method and character input program
The grouping unit assigns an m-digit value expressed by an n-ary notation to each input candidate character one-for-one to classify the respective input candidate characters into n groups on a basis of each of the m digits. The group displaying unit causes the display device to display, in the lump on a group basis, the input candidate characters classified on a digit basis. Among n selection keys corresponding to the respective groups, the input device has one key operated by a user to output information indicating which selection key is operated (information indicative of a selection key operated) to the character structuring unit. The character structuring unit determines a character according to information input from the input device.
US08339355B2 LED backlight drive
An LED backlight drive for driving an LED backlight having a plurality of LED lines L1-L3 connected in parallel to a power feed line S4, each of the LED lines having an arbitrary number of LEDs connected in series, the LED backlight drive including: an arithmetic section 12 for calculating a delay time from driving one of the plurality of LED lines L1-L3 to driving the next LED line; a signal generator 13 for generating a plurality of control signals successively at intervals corresponding to the delay time calculated by the arithmetic section; and a driver 14 for driving the plurality of LED lines successively in response to the plurality of control signals generated by the signal generator.
US08339352B2 Integrated circuit device and electronic instrument
An integrated circuit device includes first to Nth circuit blocks (N is an integer of two or more) disposed along the long side of the integrated circuit device. One circuit block of the first to Nth circuit blocks is a logic circuit block, and another circuit block of the first to Nth circuit blocks is a programmable ROM of which at least part of data stored therein can be programmed by a user. The logic circuit block and the programmable ROM block are adjacently disposed along a first direction. At least part of information stored in the programmable ROM block is supplied to the logic circuit block.
US08339350B2 Image display method and apparatus
An image display method and apparatus for generating display data from predetermined high-order bits of original image data, the display data reflecting an error of low-order bits in the original image data. The display data is used to drive each of pixels arranged in line and column directions. The high-order three bits of six-bit original image data are regarded as intra-frame process data. A process value is determined based on the low-order three bits of the original image data, on a frame number, on a line number and on a column number. That process value is added to the least significant bit of the intra-frame process value made of the high-order three bits, whereby three-bit display data is generated. The addition of the process value evenly distributes the gray level error of the low-order three bits within each frame and between frames for simulated high quality gray level display.
US08339348B2 Liquid crystal display and driving control circuit thereof
A liquid crystal display device and a driving control circuit thereof are provided. The driving control circuit includes a voltage switch unit and a selection unit. The selection unit selects the voltages in accordance with the control signal, while the voltage switch unit outputs the selected voltage to the common terminal of pixels according to the corresponding scan signal. The driving control circuit, controlled by the control signal and the scan signal, can reduce the modulation frequency and the voltage amplitude, so the power consumption of the liquid crystal display device can be reduced.
US08339346B2 Display panel driving voltage supply apparatus and method
A display panel driving voltage supply apparatus and method is disclosed. Said supply apparatus comprises: a timing controller for providing a voltage control signal and a switch control signal; a level shifter, receiving the voltage control signal for selecting a first specified voltage to be transmitted on a first driving voltage supply line as well as selecting a second specified voltage to be transmitted on a second driving voltage supply line according to the voltage control signal; and a first switch, wherein the first and the second driving voltage supply lines are electrically connected with each other to charge share between the first and the second specified voltages when the first switch is turned on under the control of the switch control signal. Said supply apparatus is capable of solving the problem of high power consumption and thereby reducing the electricity consumption.
US08339341B2 Image display system which performs overdrive processing
This invention provides an image display system that includes an image display device having an overdrive processing circuit and allows reduction in memory cost as a whole. The image display system according to this invention includes an image generation device that generates image data, and an image display device that receives the image data from the image generation device, performs overdrive processing based on the received image data, and displays an image. The image generation device includes a rendering circuit that generates image data to be outputted to the image display device for every frame, a memory unit that holds the plural pieces of image data corresponding to at least two frames among the plural pieces of image data generated by the rendering circuit, and a transfer circuit that transfers the plural pieces of image data corresponding to two frames among the plural pieces of image data held by the memory unit to the image display device within one frame period. The image display device receives the plural pieces of image data corresponding to the two frames from the transfer circuit and performs the overdrive processing based on the received image data.
US08339338B2 Display device and driving method thereof
A display device includes a display that includes display elements arranged in lines of a matrix. Each display element is configured to emit light based on a video signal that is received by the display. A proportion determiner is configured to determine, for each line, a proportion of a single frame period during which each display element of a corresponding line is not to emit the light. A signal converter is configured to convert an amplitude of the video signal for each line according to the proportion determined for each line. A signal output is configured to output the video signal converted by the signal converter to the display as a converted video signal. A scanner is configured to output a scanning signal to the display for each line for inputting the converted video signal to the display elements of each line based on the proportion determined for each line.
US08339335B2 Electroluminescence display apparatus and method of correcting display variation for electroluminescence display apparatus
By correcting a data signal based on a current flowing through an EL element when an element driving transistor which controls a drive current to be supplied to the EL element is operated in a saturation region and the EL element is set to an emission level, it is possible to realize a rapid display variation inspection and a high precision display variation correction. By providing a current measuring function on an EL display apparatus, a characteristic variation after the apparatus is shipped can be handled and corrected.
US08339332B2 Laminated glass for vehicle
In a windshield (11) of a vehicle equipped with a head up display formed from laminated glass, exterior glass (12), an intermediate layer (13), an image display layer (14) and interior glass (15) are laminated; since the image display layer (14) is interposed between the interior glass (15) and the intermediate layer (13) (or between the exterior glass 12 and the intermediate layer 13), and the thickness of the exterior glass (12) is made smaller than the thickness of the interior glass (15), a distance (T) from the image display layer (14) to the outer surface of the exterior glass (12) can be made small. It is therefore possible to reduce the displacement between a real image formed from light directly emitted toward a driver from an image (14a) on the image display layer (14) and a reflected image formed from light emitted from the image (14a) and reflected by the outer surface of the exterior glass (12), thus minimizing ghosting of the image and thereby enhancing visibility.
US08339331B2 Electro-optical device and electronic apparatus
An electro-optical device including: first display elements each divided into at least a first region and a second region, for displaying a first image, and second display elements each divided into at least a third region and a fourth region, for displaying a second image, the first and second display elements being arranged such that each third region is disposed between the first region and the second region of the adjacent first display element and each second region is disposed between the third region and the fourth region of the adjacent second display element; a parallax barrier layer provided on a side of the display elements adjacent to a viewer, the parallax barrier having light transmitting regions at positions thereof corresponding to boundaries between adjoining first and third regions as well as between adjoining second and fourth regions; and a spacer layer separating the display elements from the parallax barrier layer.
US08339330B2 Frequency selective surface structure for multi frequency bands
There is provided a frequency Selective Surface (FSS) structure for multi frequency bands configured with unit cells, each including a loop unit, arranged at regular intervals, wherein each unit cell includes: a dielectric layer; and the loop unit having a fixed width and formed on the dielectric layer, wherein the loop unit includes a first loop and a second loop formed inside the first loop with a predetermined space away from the first loop, each of the first loop and the second loop being formed sinuously in at least one portion.
US08339328B2 Reconfigurable multi-band antenna and method for operation of a reconfigurable multi-band antenna
A multi-band antenna is provided. The antenna includes a radiating element resonant for at least two resonant frequencies, and at least two matching elements that are electrically connectable to the radiating element to substantially match an input impedance of the antenna to a reference impedance for each one of the at least two resonant frequencies. A method for transmitting and receiving on one or more frequency bands is also provided that includes selecting at least one resonant frequency, selectively electrically connecting a matching element corresponding to the at least one selected resonant frequency to a radiating element resonant at the one or more frequency bands, and receiving or transmitting a wireless signal at the at least one selected resonant frequency with the radiating element.
US08339320B2 Tunable frequency selective surface
An apparatus and methods for operating a frequency selective surface are disclosed. The apparatus can be tuned to an on/off state or transmit/reflect electromagnetic energy in any frequency. The methods disclosed teach how to tune the frequency selective surface to an on/off state or transmit/reflect electromagnetic energy in any frequency.
US08339315B2 Positioning system
A positioning system (1) comprising one or more transmitters configured to transmit transmissions including positioning data, wherein the system is configured to synchronize the transmission with a reference time. The transmissions are formed using a repeating pseudorandom number (PRN) code comprising a plurality of chips. The system (1) is configured to determine a timing bias (44;54) between the first transmission and the reference time. The system (1) is configured to change the number of chips in one or more of said transmissions such that the timing bias of a subsequent pseudorandom number (PRN) code is reduced.
US08339310B2 Positioning method, positioning device, and program
A positioning method includes: executing a first positioning mode or a second positioning mode, a first positioning process that is performed using a least-square method based on a positioning signal and a second positioning process that is performed using a Kalman filter based on the positioning signal utilizing a positioning result obtained by the first positioning process as a base value being performed in the first positioning mode, and the second positioning process being further performed in the second positioning mode utilizing a positioning result obtained by the second positioning process as a base value; determining accuracy of a positioning result obtained by the second positioning process performed in the executed positioning mode; and changing the positioning mode to be executed to the first positioning mode or the second positioning mode corresponding to the accuracy.
US08339309B2 Global communication system
A global communication satellite system includes at least three communication satellites. Each communication satellite is disposed in a geostationary orbit about the Earth. Each communication satellite also includes a feed horn array having at least 4,000 feed horns with each feed horn capable of transmitting at least one radio frequency (RF) signal. The feed horn array produces a plurality of spot beams with each spot beam corresponding to a spot beam area on the surface of the Earth. Each spot beam area has a generally circular shape with a diameter less than 150 miles. Furthermore, each spot beam area overlaps with a plurality of other spot beams areas such that plurality of spot beams provide saturation coverage of all populated land areas of the Earth.
US08339308B2 Antenna beam forming systems, methods and devices using phase adjusted least squares beam forming
Methods of operating a transceiver including an antenna having a plurality of antenna feed elements include providing a plurality of gain constraint values associated with respective ones of the plurality of geographic constraint points within a geographic region, selecting initial phase constraint values associated with respective ones of the gain constraint values, generating antenna feed element weights based on the gain constraint values and based on the initial phase constraint values, and determining system response values in response to the antenna feed element weights. Phases of the system response values are compared to the initial phase constraint values, and an antenna beam is formed from the antenna to the geographic region using the antenna feed element weights in response to the comparison of the phases of the system response values to the initial phase constraint values. Related systems and devices are also disclosed.
US08339306B2 Detection system and method using gradient magnitude second moment spatial variance detection
A detection system includes a detection processor configured to receive a frame of image data that includes a range/Doppler matrix, perform a rate-of-change of variance calculation with respect to at least one pixel in the frame of image data, and compare the calculated rate-of-change of variance with a predetermined threshold to provide output data. The range/Doppler matrix may include N down-range samples and M cross-range samples. The detection processor may calculate a rate-of-change of variance over an N×M window within the range/Doppler matrix.
US08339305B2 Method for detecting an object with a frequency modulated continuous wave (FMCW) ranging system
In a method for detecting an object with an FMCW (frequency modulated continuous wave) ranging system a superior accuracy and resolution is obtained by determining the strongest sinusoidal component in the frequency spectrum and removing the determined component from the spectrum, repeating the preceding step at least once, adding one of the components determined in the two preceding steps to the spectrum, re-determining the then strongest sinusoidal component in the spectrum and removing the re-determined component from the spectrum, repeating the preceding step for each remaining of the determined sinusoidal components, and repeating the last two steps until a desired degree of convergence is reached.
US08339298B1 Synchronous demultiplexer circuit and method
A digital counting circuit with multiple outputs is used to clock interlaced 16-bit data words into separate digital-to-analog converters in the correct sequence for each of eight hydrophone channels. The circuit utilizes a programmable memory to detect a synchronizing bit pattern.
US08339296B2 Amplifying circuit and analog-digital converting circuit including same
An amplifying circuit includes a pair of MOS transistors; an amplifier that amplify a difference between potentials of differential output nodes coupled to drains of the pair of MOS transistors; cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current; and a controller that performs setting so that a potential of first one of the differential input signals is equal to a potential of another one of the differential input signals, that compares, before the inflow of the cancel current, potentials generated at differential output nodes when the difference between potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current.
US08339292B2 Key operation device and mobile terminal device
Disclosed is a key operation device for detecting an open/close state of key switches using row and column signal lines. The key switches include: 1st to 4th key switches each corresponding to a key for inputting a direction; and ten-key switches correspond one-to-one to keys of a ten-key pad. The 1st and 2nd key switches are both coupled to one of the row signal lines and each to a different one of two of the column signal lines. The 3rd and 4th key switches are both coupled to another one of the row signal lines and each coupled to a different one of the two column signal lines to which the 1st and 2nd key switches are respectively coupled. None of the ten-key switches is coupled to either of the two row signal lines to which the 1st and 2nd or 3rd and 4th key switches are coupled.
US08339285B2 Tactile pilot alerting system and method
A method of alerting an occupant of a seat assembly of the occurrence of a triggering event comprising the steps of monitoring for the occurrence of the triggering event, vibrating the seat assembly and/or probing the seat assembly.
US08339281B2 Data collection system for electronic parking meters
There is disclosed a single space parking meter that includes a low powered radio for communicating with a mobile access point. There is also provided a parking meter management system comprising a single space parking meter and a mobile access point. The mobile access point comprises a coin collection cart, and a mobile data collection terminal including a wireless radio for communicating with the wireless radio of the single space parking meter. Also disclosed is a method of managing single space parking meters comprising the steps of collecting and storing meter information in a single space parking meter, receiving at a main electronics board of the single space parking meter a transmit signal, and transmitting the meter information to a mobile access point using a low powered radio of the single space parking meter.
US08339267B2 RFID device having protective cap element and method of making
The present invention relates to a dynamic RFID device assembly which is able to withstand the additional stresses of using RFID devices in a non-planar arrangement. The invention includes the provision of a protective cap to prevent the fracturing or breakage of chip and antenna connection. The RFID device of the present invention can be included in a housing which may also be flexible thereby adding additional stability to the device.
US08339266B2 System and method for determining RFID tag placement
In systems and methods for determining the placement of radio-frequency identification (RFID) tags, a tag reader communicates with one or more RFID tags at different locations of a target object. The tag reader determines which of the different locations is a preferable location for placing an RFID tag by detecting the transmission power level or other value required to communicate with the RFID tag at each of the different locations.
US08339263B2 Security device for monitoring integrity of closed objects
A security device (20) is a compact and inexpensive device for monitoring the integrity of closed objects that indicates when the state of a monitored condition inside the closed object has changed. The device (20) is small-sized so that it can also be placed inside small closed objects, e.g. a briefcase, box, envelope or alike, and that it is inconspicuous to the observer if the closed object is opened. The device (20) is relocatable inside the closed object. The device (20) comprises a controller (4) and associated memory (8), a time counter (6) in connection with the controller (4), sensors (2) communicating with the controller (4) and arranged to sense changes in conditions inside the closed object and indicating means (12) communicating with the controller (4) and arranged to wirelessly indicate invasion against the integrity of the closed object. While the changes in conditions inside the closed object comply with certain predefined conditions the alarm indication can be blocked. The alarm indication of the security device (20) can also be activated and deactivated externally by means of a remote control or automatically.
US08339262B2 Patient identification system
The patient identification system of the preferred embodiments includes a transponder that is affixed to a patient and functions to communicate information that identifies the patient to a device or series of devices. The series of devices includes at least a first device that collects data from the patient and communicates with the transponder. The patient identification system is preferably designed to identify a patient, and more specifically to identify a patient to be associated with the data collected by the device. The patient identification system, however, may be alternatively used in any suitable environment and for any suitable reason.
US08339258B2 Dual band antenna and methods for use therewith
A dual band antenna includes a far field antenna structure for facilitating the communication of first data with a remote device via far field signaling in a millimeter wave band. A near field antenna structure facilitates the communication of second data with a remote device via near field signaling in a near field band. The far field antenna structure and the near field antenna structure share at least one common antenna element.
US08339254B2 User configured display system for motor vehicle
The present invention is directed toward a data acquisition and display system for vehicles that connects to the vehicle's on-board computer(s) via a data link connector (DLC). The system includes a display module suitable for permanent or temporary attachment within the interior of a vehicle. The display module preferably includes a full color monitor that also functions as a touch screen for inputting commands to the computer within the display module. The computer includes a suitable processor, operating system, software and tangible data storage media to allow multiple user configurable graphics. The display module collects information from the vehicle via multiple busses and senders through the data link connector and displays the information on the screen of the display module in a user configured graphics format. The software is constructed and arranged to allow user configuration of the displayed graphics by clicking or touching the graphics image.
US08339253B2 Methods and systems for displaying vehicle rear camera images in different modes
A method for displaying images of a camera associated with a vehicle includes the steps of displaying the images in a first mode if a first condition is satisfied, and displaying the images in a second mode if a second condition is satisfied.
US08339248B2 Automated audio operation support device and methods
A body-mounted electronic audio device playing prerecorded audio statements automatically issued as directed by wirelessly connected stationary computer decision-making using input from wearers and devices within the workplace environment to support to improve operational efficiency and effectiveness especially those in fast food stores.
US08339246B2 Systems, methods and apparatus for locating a lost remote control
Described herein are techniques for locating a lost remote control. The method includes receiving user input, at a controlled device, the user input requesting to locate a lost remote control for the controlled device. The method further includes lowering a volume of the output of content associated with the controlled device responsive to the user input and transmitting a message from the controlled device to the remote control, the message requesting the remote control to activate an indicator device (e.g., sound, visual, physical or the like) of the remote control.
US08339242B2 Communication apparatus, communication method, program, information management apparatus and communication system
An apparatus and method provide logic for managing positional information within a mobile communication network. In one implementation, an information management apparatus includes a history information registration unit, a registration determination unit, and a base station information registration unit. The history information registration unit may be configured to register first and second history information within a storage unit. The registration determination unit may determine whether a difference value between time information associated with the first and second history information is less than a threshold value. The base station information registration unit may subsequently register at least position information associated with a communications apparatus and a base station, when the difference value is less than the threshold value.
US08339240B2 Semiconductor element, biometric authentication method, biometric authentication system and mobile terminal
A semiconductor element or mobile terminal stores a user's biometric information pattern used for execution of a biometric authentication process and the residual number of trials indicating the number of allowed failures in the biometric authentication process, sends processing data to an external device so that the external device can use the processing data when the external device executes part of the biometric authentication process, and decreases the residual number of trials by a predetermined value while the processing data is output to the external device after start of communication with the external device.
US08339233B2 Three dimensional inductor
A three-dimensional inductor is provided. The three-dimensional inductor is disposed in a multi-layered substrate. The multi-layered substrate includes at least a dielectric layer and at least two metal layers. The three-dimensional inductor includes a first coil and a second coil. The second coil is electrically connected to the first coil. The first coil is on a first plane and formed on a first metal layer. The second coil is on a second plane and disposed in a variety of dielectric layers and metal layer. The first plane is not parallel to or is vertical to the second plane such that the magnetic field generated by the first coil and the magnetic field generated by the second coil are not parallel to each other or are vertical to each other.
US08339232B2 Micromagnetic device and method of forming the same
A micromagnetic device includes a first insulating layer formed above a substrate, a first seed layer formed above the first insulating layer, a first conductive winding layer selectively formed above the first seed layer, and a second insulating layer formed above the first conductive winding layer. The micromagnetic device also includes a first magnetic core layer formed above the second insulating layer, a third insulating layer formed above the first magnetic core layer, and a second magnetic core layer formed above the third insulating layer. The micromagnetic device still further includes a fourth insulating layer formed above the second magnetic core layer, a second seed layer formed above the fourth insulating layer, and a second conductive winding layer formed above the second seed layer and in vias to the first conductive winding layer. The first and second conductive winding layers form a winding for the micromagnetic device.
US08339229B2 Inductor
An inductor includes a first core, a conducting wire, a second core and a first lead frame. There is an accommodating space formed on a first side of the first core and there is a recess portion formed on a second side of the first core, wherein the first side is opposite to the second side. The first core has a first height. The conducting wire is disposed in the accommodating space. The second core is disposed on the first side of the first core and covers the accommodating space. The first lead frame has an embedded portion embedded in the recess portion. The embedded portion has a second height. After embedding the embedded portion in the recess portion of the first core, a total height of the embedded portion and the first core is smaller than the sum of the first height and the second height.
US08339226B2 Magnetic attachment system
A magnetic attachment system for attaching a first object to a second object. A first magnet structure is attached to the first object and a second magnet structure is attached to the second object. The first and second objects are attached by virtue of the magnetic attraction between the first magnet structure and second magnet structure. The magnet structures comprise magnetic elements arranged in accordance with patterns based on various codes. In one embodiment, the code has certain autocorrelation properties. In further embodiments the specific type of code is specified. In a further embodiment, an attachment and a release configuration may be achieved by a simple movement of the magnet structures. In a further embodiment, a magnetic attachment system may comprise one or more magnetic structures spaced from one another on a first support and configured for use with a complementary magnet system.
US08339221B2 Elastic wave filter device having narrow-pitch electrode finger portions
A 5-IDT longitudinally coupled resonator type elastic wave filter device includes a narrow-pitch electrode finger portion arranged to increase the steepness of the filter characteristic includes first to fifth IDTs. When the total number of electrode fingers in a first area and a fourth area is Nx and the total number of electrode fingers in a second area and a third area is Ny, an average period of electrode fingers in one of the areas including larger total numbers of the electrode fingers Nx and Ny is greater than that in the area including smaller total numbers of the electrode fingers Nx and Ny. Among the first IDT electrode, the third IDT electrode, and the fifth IDT electrode, the period of electrode fingers in a portion other than the narrow-pitch electrode finger portion of the IDT electrode in the area including the larger numbers of electrode fingers is less than the period of electrode fingers in a portion other than the narrow-pitch electrode finger portion of the IDT electrode in the area including the smaller numbers of electrode fingers.
US08339219B1 Passive hybrid sensing tag with flexible substrate saw device
The integration of surface acoustic wave (SAW) filters, microfabricated transmission lines, and sensors onto polymer substrates in order to enable a passive wireless sensor platform is described herein. Incident microwave pulses on an integrated antenna are converted to an acoustic wave via a SAW filter and transmitted to an impedance based sensor, which for this work is a photodiode. Changes in the sensor state induce a corresponding change in the impedance of the sensor resulting in a reflectance profile. Data collected at a calibrated receiver is used to infer the state of the sensor. Based on this principal, light levels were passively and wirelessly demonstrated to be sensed at distances of up to about 12 feet.
US08339218B2 Single-to-balanced band pass filter
By having stages of a single-to-balanced band pass filter, except for a stage which receives a single-terminal signal, to not be coupled to ground, noises cannot have an available path to enter the single-to-balanced band pass filter so that common-mode signals may be reduced in magnitude.
US08339216B2 Duplexer and method for separating a transmit signal and a receive signal
The present disclosure provides a duplexer for separating a transmit signal and a receive signal. The duplexer comprises a transmit filter, a receive filter and an analogue quadrature splitter, a first filtering element and a second filtering element. By choosing the first filtering element and the second filtering element substantially identical, it is possible to transform filtering characteristics of the first and second filtering element such that stop bands are substantially transformed into an effective pass band, and vice versa. The analogue quadrature splitter is adapted to increase an attenuation of the transmit signals outside the transmit band, such as in the receive band. Therefore out-of-band emissions by the transmitter will be substantially reduced. The present disclosure further provides a method for separating a transmit signal and a receive signal, and computer program products for the manufacture for carrying out the method of separating transmit signals and receive signals.
US08339214B2 Equalization system
An equalization system includes an adjustable equalization unit, a common-mode feedback unit connected with the equalization unit, a current balance driving unit connected with the feedback and equalization units, a first high-pass filter unit connected with the equalization unit, a second high-pass filter unit connected with the driving unit, a first low-pass filter unit connected with the equalization unit, a second low-pass filter unit connected with the driving unit, a first energy detection unit connected with two high-pass filter units, a second energy detection unit connected with two low-pass filter units, a first analog-to-digital converter unit connected with the first energy detection unit, a second analog-to-digital converter unit connected with the second energy detection unit and a state decision unit connected with two analog-to-digital converter units outputs a control signal for adjusting the equalization unit. It improves the signal quality of the receiver of the high-speed signal transmission system.
US08339209B2 Method for selecting natural frequency in resonant clock distribution networks with no inductor overhead
An inductor architecture for resonant clock distribution networks is described. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture exhibits no inductor overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.
US08339208B2 Method and apparatus for tuning frequency of LC-oscillators based on phase-tuning technique
A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.
US08339206B2 PLL
A PLL includes: a charge-pump equalizer which has a plurality of charge pumps generating charge currents according to phase-difference signals, each being generated by delaying the phase-difference signal by different times, adds and outputs the charge currents generated by the charge pumps; a replica circuit, having ideal characteristics of a loop filter and a voltage controlled oscillator, which input a digital value having phase difference of the phase-difference signals, and generates a replica output according to the ideal characteristics; and a coefficient generating circuit which smoothes correlation values of the difference signals and the phase-difference signals to generate charge pump coefficients, and negatively feeds back the same to the plurality of charge pumps. The charge pumps generate the charge currents each having current values corresponding to the charge pump coefficients.
US08339205B1 Low power wide-band amplifier with reused current
In one embodiment, an apparatus includes a first amplification block configured to receive a signal and a second amplification block configured to output the signal. The outputted signal is an amplified version of the signal. A circuit allows reuse of a second current flowing through the second amplification block by coupling the second current to pass through the first amplification block to increase a first current that flows through the first amplification block. Amplification of the signal is based on the increased first current that flows through the first amplification block.
US08339204B2 Semiconductor device
Power amplifier circuits which constitute an RF power module used for a digital device capable of handling high frequency signals in two frequency bands are disposed over the same IC chip. The power amplifier circuits are disposed around the IC chip, and a secondary circuit is disposed between the power amplifier circuits. Thus, the power amplifier circuits are provided within the same IC chip to enable a size reduction. Further, the distance between the power amplifier circuits is ensured even if the power amplifier circuits are provided within the same IC chip. It is therefore possible to suppress the coupling between the power amplifier circuits and restrain crosstalk between the power amplifier circuits.
US08339201B1 Wideband doherty amplifier circuit having a constant impedance combiner
A three way wideband Doherty amplifier circuit includes a first peaking amplifier operable to turn on at a first power level, a second peaking amplifier operable to turn on at a second power level below the first power level and a main power amplifier operable to turn on at all power levels. The main power amplifier has a high impedance load modulated state when the first and second peaking amplifiers are turned off. The three way wideband Doherty amplifier circuit further includes a constant impedance combiner connected to an output of each amplifier. The constant impedance combiner has a characteristic impedance which matches the impedance of the main amplifier in the high impedance load modulated state with or without an output matching device connecting the main amplifier output to the constant impedance combiner, as viewed from the output of the main amplifier.
US08339199B2 Pre-amplifier
A pre-amplifier comprises at least two PMOS transistors operated as source followers and two NMOS transistors operated as amplifiers, or, two NMOS transistors operated as source followers and two PMOS transistors operated as amplifiers to raise or reduce the voltage of input signals and at least four current sources with the same current value which can be adjusted according to the output load of the pre-amplifier. The MOS transistors have the same transconductance so that the minimum differential voltage can be attained. Since the differential signals change alternately, MOS transistors will switch among the three working status: cut-off, saturation and linear region. Because of the cut-off and linear region, the present invention can achieve the very low power consumption less than one third of the conventional one.
US08339198B2 Negative capacitance synthesis for use with differential circuits
Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.
US08339197B2 Circuitry including matched transistor pairs
Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
US08339194B2 Demodulator, a method for demodulating an ask signal and an on-board unit including the demodulator
A new demodulator with low power consumption and high gain which is suitable for CMOS integration is provided. The demodulator makes use of a MOS configured in a “common-source” status so as to achieve a desirable gain.
US08339189B2 High voltage current source and voltage expander in low voltage process
A high voltage current source and a voltage expander implemented in a low voltage semiconductor process. The voltage expander extends the operating voltage range of a stack of transistors to multiple times a supply voltage Vdd at the output node of the stack without exceeding the breakdown voltage of any of the transistors in the stack. The voltage expander uses a diode and a voltage divider to detect the output node voltage changes and generates a plurality of voltages that control the gate voltages for the stack of transistors. A high voltage wide swing current source utilizes a transistor to set the output current and the voltage expander to extend the output voltage range of the current setting transistor. An additional transistor and another current source ensure that the output current is constant throughout the entire output voltage range between about 0V and multiple times the supply voltage Vdd.
US08339188B1 Floating gate reference for sleep/hibernate regulator
A system includes power saving circuitry to revive a system controller from a sleep mode for performance of operations in an active mode. The system also includes a regulator including a floating gate reference device to generate output voltage and current capable of powering the power saving circuitry during the sleep mode. A method includes generating a reference voltage and current with a float gate device, and powering wake-up circuitry with the reference voltage and current while in a power saving mode. The wake-up circuitry is configured to activate a main system controller from the power saving mode.
US08339187B2 Charge pump systems and methods
Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry.
US08339184B2 Gate voltage boosting element for charge pump
Systems, methods, and devices that generate a desired boosted gate voltage to facilitate controlling a charge pump are presented. A multi-phase charge pump (e.g., two-phase CMOS charge pump) can comprise a desired number of switch cells (SCs), wherein each SC can include a gate boost switch control component, which employs two transistors (without the need for external circuitry), and generates a desired gate voltage, based at least in part on a desired clock signal, wherein the desired gate voltage is applied to a charge transfer switch, Mc, of the SC to facilitate transferring a voltage across the Mc to a node on the other side of the Mc, in each stage of the charge pump, wherein the SCs are associated with a desired number of flying capacitors to facilitate increasing the input voltage to a desired output voltage.
US08339183B2 Charge pump with reduced energy consumption through charge sharing and clock boosting suitable for high voltage word line in flash memories
A charge pump circuit for generating an output voltage is described. Charge pump circuits typically have two branches. As the clocks supplying the branches of a charge pump circuit alternate, the output of each branch will alternately provide an output voltage, which are then combined to form the pump output. The techniques described here allow charge to be transferred between the two branches, so that as the capacitor of one branch discharges, it is used to charge up the capacitor in the other branch. An exemplary embodiment using a voltage doubler-type of circuit, with the charge transfer between the branches accomplished using a switch controller by a boosted version of the clock signal, which is provided by a one-sided voltage doubler.
US08339182B2 Semiconductor device
A semiconductor device includes a signal output unit, and a decision unit. The signal output unit includes m (≧2) pieces of fuses, a NAND gate, resistance elements, and an output terminal. The decision unit decides whether n or more pieces (m≧n≧2) of fuses are disconnected out of the m pieces of fuses included in the signal output unit, and outputs the result of a decision. When m=n=2, the decision unit is constituted of a NOR gate having two input terminals connected to a respective end of the fuses. Thus, a H-level potential signal is output at an output terminal of the NOR gate when the decision result is affirmative. On the other hand, when the decision result is negative, a L-level potential signal is output at the output terminal.
US08339181B2 Low-side driver high-voltage transient protection circuit
A low-side driver circuit includes a low-side driver integrated circuit and a controllable switch. The low-side driver integrated circuit is responsive to an on-off command input signal to selectively operate in an ON mode and an OFF mode. The controllable switch is responsive to the on-off command signal to selectively operate in a CLOSED mode and an OPEN mode. The low-side driver integrated circuit and the controllable switch are configured to simultaneously operate in the ON mode and the CLOSED mode, respectively, and in the OFF mode and the OPEN mode, respectively. During a voltage transient the potential will be realized across the controllable switch, thus protecting the lower voltage rated low-side integrated circuit.
US08339179B2 Radio frequency (RF) power detector suitable for use in automatic gain control (AGC)
In one form, a power converter for a power detector or the like includes first and third transistors of a first conductivity type, and second and fourth transistors of a second conductivity type. A control electrode of the first transistor receives a first bias voltage plus a positive component of a differential input signal. The second transistor is coupled in series with the first transistor and has a control electrode receiving a second bias voltage plus a negative component of the differential input signal. The third transistor is biased using the first bias voltage plus the negative component. The fourth transistor is coupled in series with the third transistor and is biased using the second bias voltage plus the positive component. A common interconnection point of the first and third transistors forms an output node.
US08339176B2 System and method for providing a low-power self-adjusting reference current for floating supply stages
A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits.
US08339169B2 Device for capturing and transferring a measured value, series connection, system for capturing and transferring measured values, and household appliance
A device includes a logic circuit having first, second, and third input ports, a first output port, and a feedback path between the first output port and the third input port. In a first operating state, a logic state change at the first input port triggers a logic state change at the first output port, but a logic state change at the third input port does not trigger a logic state change at the first output port. This allows signals to be routed through the device. In a second operating state, a logic state change of the third input port triggers a logic state change of the first output port. This change is fed back, delayed by a time value, to the third input to maintain an oscillation with at least two edges. The frequency of this oscillation is used to determine a value of a measurement variable.
US08339168B2 Pulse-width modulation circuit, a device including the same and a method for pulse-width modulation
A PWM circuit comprises: a charge and discharge circuit to receive a initial signal and, according to the initial signal, increase a voltage at an output end of thereof linearly or decrease the voltage; a comparator with a positive input end to receive a control signal and a negative input end connected to the output end of the charge and discharge circuit; a voltage transmission circuit with a first input end to receive the initial signal and a second input end to receive an output of the comparator, the voltage transmission circuit is configured to transmit the initial signal to an output end of the voltage transmission circuit when the output of the comparator is digital 1, and output digital 0 when the output of the comparator is digital 0.
US08339167B2 Apparatus and method for trimming static delay of a synchronizing circuit
A system and method for trimming an unadjusted forward delay of a delay-locked loop (DLL) and trimming a duty cycle of first and second output clock signals provided by a DLL. For trimming an unadjusted forward delay, delay is added to one of a feedback clock signal path and an input clock signal path and a feedback clock signal is provided from the feedback clock signal path and an input clock signal is provided from the input clock signal path for phase comparison. For trimming a duty cycle of first and second output clock signals, one of a first delayed input clock signal and a second delayed input clock signal is delayed. The first and second delayed input clock signals are complementary. The delayed clock signal and the other clock signal are provided as the first and second output clock signals.
US08339165B2 Configurable digital-analog phase locked loop
A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.
US08339164B2 Antenna driving device
The antenna driving device of the present invention is composed of a trapezoidal-wave signal generating circuit for generating a trapezoidal-wave signal from a reculangular-wave signal having a predetermined frequency; and a trapezoidal-wave signal amplifying circuit for amplifying the trapezoidal-wave signal and feeding the amplified signal to an antenna load.
US08339160B2 Clock generating device and jitter reducing method in the clock generating device
A clock generating device includes: a DDS circuit that generates a periodic signal; and a comparator that compares an input signal and a reference signal and outputs a binary signal. The clock generating device includes a rate-of-change correcting unit that applies correction for increasing a rate of change at a crossing point with the reference signal to the periodic signal generated by the DDS circuit.
US08339159B2 Input buffer circuit of semiconductor apparatus
The input buffer circuit of a semiconductor apparatus includes a first buffering unit that that is activated by a voltage level difference between a first voltage terminal and a second voltage terminal, and generates a first compare signal and a second compare signal by comparing the voltage levels of reference voltage and an input signal; a control unit that controls the amount of current flowing between the second voltage terminal and a ground terminal by comparing the voltage levels of the reference voltage and the second compare signal; and a second buffering unit that generates an output signal by comparing the voltage levels of the input signal and the first compare signal.
US08339158B2 High speed dynamic comparative latch
A dynamic high-speed comparative latch comprises a pre-amplifier unit for enlarging input differential signals, a regenerating latch unit for latching outputted differential signals from the pre-amplifier unit by using a positive feedback, specifically, converting the output of the pre-amplifier unit into a latched result at a first state of a clock cycle, and then retaining the latched result and simultaneously resetting relevant nodes at a second state opposite to the first state of the clock cycle, and a latch unit for outputting the effective outputted value of the regenerating latch unit when the regenerating latch unit being in a retaining state. The pre-amplifier unit is connected with the regenerating latch unit, and the regenerating latch unit is connected with the latch unit. The pre-amplifier unit comprises only one input clock signal. The present invention has a simple structure, and ensures the correctness of the output result of the latch.
US08339156B2 Method and apparatus for high resolution ZQ calibration
A method is disclosed for controlling an output impedance of an electronic device of the type having an impedance control terminal to which an external load is to be connected such that a predetermined value of the voltage at the impedance control terminal controls the output impedance of the device. The method is comprised of comparing a reference voltage to a voltage at the impedance control terminal. A variable count signal representing a count value is produced in response to the comparing. The impedance of a variable impedance circuit is varied in response to the count signal, wherein the impedance of the variable impedance circuit controls the voltage at the impedance control terminal. A device connected in parallel with the variable impedance circuit is periodically operated to change (increase/decrease) the impedance of the variable impedance circuit. An apparatus for performing the method is also disclosed. Because of the rules governing abstracts, this abstract should not be used to construe the claims.
US08339147B2 Arrangement for producing an electric field and sensor device including same
A circuit arrangement has a field producing electrode device which is connected in an LC network and exposed to a spatial area of the field such that the capacity of the capacitor system with the electrode device alters according to dielectric properties of material present in the spatial area, an insulating layer extending on a rear side of the field electrode device which is oriented away from the spatial area, a screening electrode device which extends on the rear side of the insulating layer which is oriented away from the field electrode device and a field extinction electrode device which has an electrode surface which is oriented towards an extinction area. The field expansion electrode device and the field extinction electrode device are arranged such and impinged upon by a voltage that the spatial area of the field and the extinction area are superimposed on each other in sections.
US08339144B2 Test fixture for testing positioning of connector
A test fixture for testing positioning of a connector includes a support, a housing mounted on the support, a movable block received within in the housing, a power module set inside of the movable block, a conductive block mounted on the power module, a probe element aligned with the conductive block, and a light-emitting element electrically connected to the power module and the probe element. The movable block is movably mounted on the support, and includes an extending portion. When the connector is precisely positioned in a slot of an electronic device and the extending portion is inserted into the slot of the electronic device, the movable block is resisted by the connector to be driven to move such that the conductive block contacts the probe element, thereby turning on the light-emitting element.
US08339139B2 System and method for testing a circuit
In one embodiment, a sensor for circuit testing has a first terminal and a second terminal. The first terminal is configured to be coupled to a first node of a first circuit via a first capacitor, and the second terminal is configured to be coupled to a second node of the first circuit. The sensor also has at least one transmitter and at least one receiver that measures a first transmission factor between the first terminal and the second terminal. The sensor determines that the first circuit is in a first state if the first transmission factor is above a first threshold, and determines that the first circuit is in a second state if the first transmission factor is below the first threshold.
US08339133B2 Thin film fluxgate sensor
A fluxgate magnetic field sensor including an excitation current conductor (4) and a layer of saturable magnetic material cladding (6) having a plurality of feed-through channels (16) extending between opposed faces of the cladding layer, the excitation current conductor weaving through a plurality of said feed-through channels.
US08339132B2 Magnetic detection device
A magnetic detection device of the present invention includes at least one pair of first magnetosensitive bodies each comprising a soft magnetic material extending in a first axis direction and being sensitive to an external magnetic field oriented in the first axis direction; and a magnetic field direction changer comprising a soft magnetic material and changing an external magnetic field oriented in a different axis direction from the first axis direction into a measurement magnetic field having a component in the first axis direction which can be detected by the at least one pair of first magnetosensitive bodies. With this magnetic detection device, the external magnetic field oriented in the different axis direction can be detected by way of the first magnetosensitive bodies. As a result, while attaining magnetic detection with high accuracy, the magnetic detection device can be reduced in size or thickness by omitting a magnetosensitive body extending long in the different axis direction.
US08339131B2 Electric field sensor with electrode interleaving vibration
An electric field sensor comprising: a substrate having a hole; a shielding electrode and a sensing electrode, disposed in the hole of the substrate; a piezoelectric bar having one end connected to the center of the shielding electrode, the other end fixed on the substrate. Present invention provides several electric field sensors, which have the same feature of utilizing electrodes interleaving vibration to modulate external electric field. They have IC-compatible operation voltage and small volume.
US08339130B2 Method and apparatus for evaluating length of defect in eddy current testing
The surface length of a metal subject to be inspected is evaluated by detecting an eddy current without using a combination of a scale and visual or liquid penetrant inspection. An exciting coil and a detecting coil are scanned above the subject in a length direction. An eddy current detector measures an output voltage corresponding to scanning positions based on an output from the detecting coil. Based on an output voltage distribution curve indicating a distribution of output voltages corresponding to the scanning positions, position information is extracted corresponding to values which are within a differential voltage range and lower by 12 dB than a maximum value of the output voltages on the left and right sides of the distribution. A distance between the positions included in the extracted information is calculated to evaluate the length of a slit which is a defect present on the subject surface.
US08339128B2 Magnetic-disturber detection method and detector, object-localizing method and system, recording medium for these methods
This method for detecting a magnetic disturber method comprises: the measurement (52) of the magnetic field emitted by the emitter by at least two triaxial sensors placed at different known positions, for each sensor, the determining, (54) from the magnetic field measured by this sensor, of the coordinates of a direction vector collinear with an axis passing through the geometrical center of the emitter and the geometrical center of this sensor, the geometrical center of the emitter being the point at which there is located a magnetic field point source which models this emitter and the sensor being capable of being modeled by a point transducer situated at a point where the magnetic field is measured and constituting the geometrical center of this sensor, verification (56;70) that the smallest distance between the axes, each collinear each with one of the direction vectors, is smaller than a predetermined limit, and if this is not the case, the reporting (64) of the presence of a magnetic disturber and, in the contrary situation, not making this report.
US08339127B2 Rotation sensor unit
In a rotation sensor unit, a lid 6 is pressed against a housing 2 to push an outer race 11 of a rolling bearing 1, thereby applying a preload to the bearing 1 and increasing the rigidity of the bearing 1, so as to prevent run-out of a shaft 3. An encoder 42 is supported on this shaft 3, and a magnetic sensor element 41 is supported on the lid 6, which is pressed against the housing 2. Thus, it is possible to prevent displacement of the magnetic sensor element 41 and the encoder 42 relative to each other. The shaft 3, lid 6 and outer race 11, etc. are made of a soft magnetic material to define a magnetically shielded space between one axial end surface of the shaft 3 and the lid 6, with the magnetic sensor element 41 mounted in the magnetically shielded space.
US08339125B2 Magnetic pole position detecting device and method
A magnetic pole position detecting device correctly acquires magnetic pole position even if two magnetic sensors are arranged at an arbitrary interval. The magnetic pole position detecting device receives the input of sensor outputs “a” and “b” of two magnetic sensors arranged at a predetermined interval L along a magnetic pole arraying direction and a phase difference φ between the two sensor outputs “a” and “b”. When sin φ>δ, the magnetic pole position detecting device divides a·sin φ by b−a·cos φ to calculate tan θ and outputs a magnetic pole position θ=tan−1 {a·sin φ/(b−a·cos φ)}. When sin φ≦δ, because a=sin θ and b=cos(θ+φ), the magnetic pole position detecting device outputs magnetic pole position θ={sin−1(a)+sin−1(b)−φ}/2. Because φ=2π×L/(a magnetic pole pitch or the number of poles), by using φ as a correction coefficient for the two sensor outputs “a” and “b”, magnetic pole position error can be canceled even when the interval L is different from a theoretical value.
US08339123B2 Portable electronic device with electronic compass and method for calibrating compass
A calibrating method for a portable electronic device having azimuth device such as an electronic compass is disclosed. The calibrating method can be achieved by checking at least one sensor in the portable device incorporating the electronic compass configured in the portable device, so as to effectively detect and verify a temporary abnormal magnetic field caused by a stylus movement. When the electronic compass detects an abnormal magnetic field, the operation status of the sensor is checked for any change existence. If the operation status of the sensors changes, the abnormal magnetic field is verified as a temporary magnetic filed due to the movement of the stylus, in which case the electronic compass passes the calibration and goes on detecting the geomagnetic field according to its default setting value.
US08339120B2 Measurement apparatus, reproduction apparatus, and measurement method
A measurement apparatus includes a moving average calculation section and a convergence judgment section. The moving average calculation section calculates a moving average by inputting a phase error between a phase of an input signal and a target phase, that is detected by a phase-locked loop circuit. The convergence judgment section judges that the phase-locked loop circuit is not converged when an absolute value of the moving average is equal to or larger than a first threshold value and judges that the phase-locked loop circuit is converged when the absolute value of the moving average is smaller than the first threshold value.
US08339119B2 Output voltage adjustment circuit for buck circuits
An output voltage adjustment circuit for buck circuits includes a microcontroller, first to eighth keys, and a display unit. The first to eighth keys input voltage adjustment signals to the microcontroller. A first input pin of the microcontroller is connected to a voltage output terminal. A second resistor is connected between the first input pin of the microcontroller and ground. A first to a sixth input/output pin of the microcontroller are connected to the display unit. A first to an eighth output pin of the microcontroller are connected to a pulse width modulation (PWM) controller. The first to eighth keys are selectively activated to provide voltage adjustment signals to the microcontroller, sampling output voltages of the voltage output terminal, comparing with a predetermined voltage, controlling the PWM controller to fine tune the duty cycle to output a stable voltage from the voltage output terminal. The display unit displays the voltages on the voltage output terminal.
US08339118B2 Adaptive bias current generator methods and apparatus
In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.
US08339117B2 Start-up circuit element for a controlled electrical supply
Electrical supply apparatus comprising a start-up circuit element coupled to an output element for ensuring reliable start-up when first connected to a source of power. The start-up circuit element comprises first and second branches with current mirror coupling therebetween. The first branch comprises first and second transistors of opposite polarities for connection in series between the source of power and ground and a leakage path to ground in parallel with the second transistor for start-up current for the first transistor of the first branch in response to application of voltage from the source of power. The current mirror coupling between the first and second branches responds to start-up of the first transistor of the first branch to start up a first transistor of the second branch and provide start-up current to the output element. The second branch may comprise a control element connected to turn off the second transistor of the first branch on start up of the output element and turn off the first transistors. Alternatively, the start-up circuit may have elements common with the output circuit and remain conductive after the output circuit starts.
US08339116B2 DC/DC converter including ultrasonic feature for use with low quiescent currents
A buck voltage converter comprises an upper switching transistor connected between an input voltage node and a phase node. The upper switching transistor turns on and off responsive to a first drive signal. A lower switching transistor is connected between the phase node and ground. The lower switching transistor turns on and off responsive to a second drive signal. An inductor is connected the phase node and an output voltage node. Control circuitry generates the first drive signal and the second drive signal responsive to a feedback voltage monitored at the output voltage node and a phase at the phase node. In a pulse frequency mode voltage of operation the control circuitry turns off the upper switching transistor and turns on the lower switching transistor responsive to a determination that a predetermined period of time has occurred since a detection of a phase switch at the phase node and turns off both the upper switching transistors and the lower switching after the lower switching transistor has been turned on for a second predetermined period of time.
US08339113B2 Buck switch-mode power converter large signal transient response optimizer
A switch mode power supply (SMPS) response to a disturbance is improved by using a hysteretic control in combination with a fixed frequency, pulse-width modulated (PWM) controller for providing robust control and optimizing the response to disturbances in buck or buck derived switch mode power supply (SMPS) system topologies.
US08339105B2 Power management arrangement for a mobile device
A power management arrangement for a mobile device comprising a digital circuit block and an analog circuit block, the power management arrangement being arranged to supply a first voltage to the analog circuit and a second voltage to the digital circuit, the power management arrangement comprising: an input unit adapted to receive input voltages from a plurality of power sources; a first voltage regulator coupled to the input unit and for supplying the first voltage; a second voltage regulator for supplying the second voltage and arranged to be selectively coupled to one of the first voltage regulator and input unit; and control logic adapted to select which of the received input voltages from the plurality of power sources provides power to the first and second voltage regulators, and to determine the magnitude of the first and second voltages supplied by the first and second voltage regulators.
US08339100B2 Systems and methods for cell balancing
A method for balancing multiple battery cells which are grouped into multiple battery modules includes: obtaining cell parameters of the battery cells, respectively; calculating an average cell parameter for each of the battery modules according to the cell parameters; identifying a donator module and a receiver module from the battery modules based upon the average cell parameter; and transferring energy from the donator module to the receiver module to balance the battery cells.
US08339097B2 Non-contact power transfer apparatus
A non-contact power transfer apparatus includes a power transmission unit including a power transmission coil, a power transmission circuit, a current detection circuit, and a unit detection means and a first microcomputer with a control circuit for controlling each of the circuits. The non-contact power transfer apparatus also includes a power reception unit having a power reception coil, a rectification smoothing circuit, a series regulator, a charge battery unit with a rechargeable battery, a switching element for pulse-charging and a second microcomputer with a control circuit for controlling the series regulator and the switching element. As such, the power reception unit receives power via the power reception coil, while the rectification smoothing circuit and series regulator generate a set voltage. The set voltage is used to start the second microcomputer to apply an initial reset and a pulse pattern as an ID authentication pattern to the switching element.
US08339096B2 Wireless power receiving device
To provide a wireless power receiving device and an electronic device having the wireless power receiving device whose production costs do not increase even when frequency of electromagnetic waves received for power supply varies. Further, to provide a wireless power receiving device capable of power transmission without disconnection or poor connection when a load supplied with electricity and a battery connected to an antenna are manufactured in different steps. A power transmitter and receiver portion having first and second antenna circuits and a battery portion and a load portion having a third antenna circuit are provided to charge a battery of the battery portion with a first radio signal received at the first antenna circuit and transmit electricity stored in the battery portion as a second radio signal from the second antenna circuit to the third antenna circuit so that the third antenna circuit supplies electricity to the load.
US08339095B2 Battery pack, charging device, and electronic device
A charging device capable of appropriately grasping the charged state of a battery pack using data stored in a memory of the battery pack even when the battery pack becomes commercial as a new product. A charging device determines charged state data indicative of a charged state of a battery pack mounted thereon based on a charging current supplied and/or a charging voltage applied to the battery pack. A charge control microcomputer reads charging characteristics data from a memory of the battery pack, and generates a data table associating at least one of the charging current supplied and the charging voltage applied to the battery pack and the charged state data with each other, based on the charging characteristics data read out. The microcomputer determines charged state data indicative of a charged state of the battery pack, based on the generated data table.
US08339094B2 Methods, systems and apparatus for overmodulation of a five-phase machine
Methods, system and apparatus are provided for overmodulation of a five-phase machine in a vector controlled motor drive system that includes a five-phase PWM controlled inverter module that drives the five-phase machine. Techniques for overmodulating a reference voltage vector are provided to optimize voltage command signals that control a five-phase inverter module to increase output voltages generated by the five-phase inverter module.
US08339093B2 System and method of dynamic regulation of real power to a load
A system and method for controlling an AC motor drive includes a control system programmed with an energy algorithm configured to optimize operation of the motor drive. Specifically, the control system receives input of an initial voltage-frequency command to the AC motor drive, receives a real-time output of the AC motor drive generated according to the initial voltage-frequency command, and determines a real-time value of a motor parameter based on the real-time output of the AC motor drive. The control system also inputs a plurality of modified voltage-frequency commands to the AC motor drive, determines the real-time value of the motor parameter corresponding to each of the plurality of modified voltage-frequency commands, and identifies an optimal value of the motor parameter based on the real-time values of the motor parameter. The control system maintains an input of a current modified voltage-frequency command when the real-time value of the motor parameter corresponds to the optimal value of the motor parameter.
US08339082B2 Methods and systems for induction motor control
A method is provided for controlling an induction motor having a rotor. The method includes receiving a torque command; comparing the torque command to a threshold torque value; generating, with a first estimation module, a first estimated rotor resistance when the torque command is less than or equal to the threshold torque value; generating, with a second estimation module, a second estimated rotor resistance when the torque command is greater than the threshold torque value; and generating control signals for the induction motor based on the first estimated rotor resistance or the second estimated rotor resistance.
US08339080B2 Motor control apparatus and electric power steering system using the same
A motor control apparatus has an inverter circuit, which includes FETs for converting electric power supplied to a motor. A capacitor is provided between a battery and the inverter circuit. A pull-up resistor connects a V-phase of the motor to a high potential side of the battery. A power supply relay permits or interrupts current flow from the battery to the capacitor and the motor. A microcomputer controls the power supply relay and the motor. The microcomputer turns on a low-side FET of a V-phase under a condition that the power supply relay is interrupting the current flow before the motor is started. Electric charge stored in the capacitor is discharged to a low potential side of the battery through the pull-up resistor.
US08339076B2 Electric motor drive control apparatus
An electric motor drive control apparatus includes a detection angle obtaining section that obtains the detection angle of the resolver; a correction information storage section that stores correction information for correcting the detection angle, in association with a modulation ratio that is a ratio of an effective value of a fundamental wave component of the AC voltage to the system voltage; and a detection angle correcting section that obtains the correction information from the correction information storage section, based on the modulation ratio at the time the detection angle obtaining section obtains the detection.
US08339075B2 Method for controlling a deceleration process of a DC motor and controller
Consistent with an example embodiment there is a method for controlling a deceleration process of a DC motor, wherein the DC motor is driven by a bridge driver coupled to a power supply intended to provide a supply voltage VDD at a power supply output. The method comprises applying a deceleration PWM signal to the bridge driver for decelerating the DC motor, and controlling the bridge driver such that a motor-induced back current is reduced, if the voltage at the power supply output exceeds a first voltage threshold which is higher than VDD. In accordance with the example embodiment, the method includes the following: if the voltage at the power supply output falls below a second voltage threshold which is lower than the first voltage threshold, control of the bridge driver is terminated such that the motor-induced back current is reduced.
US08339066B2 Energy saving lighting systems and units providing coordinated operation of holding current units
Holding current circuits in light sources controlled by a dimmer are operated in a coordinated manner to maintain proper operation of the dimmer without wasting energy. A plurality of light sources each including a separate holding current circuit may be controlled by a dimmer. The holding current units are selectively disabled and/or a maximum holding current drawn by the holding current units are selectively adjusted to maintain a desired current draw.
US08339065B2 Driving circuit and illumination apparatus using the same
An illumination apparatus including an LED comprises a battery holder, an AC/DC adapter interface, an LED unit, and a switch unit. The battery holder is configured to receive a battery. The AC/DC adapter interface is connected to an AC/DC adapter. When the AC/DC adapter is not connected to the AC/DC adapter interface, the switch unit is turned on to allow the driving unit to receive power from the battery. When the AC/DC adapter is connected to the AC/DC adapter interface, the switch unit is turned off to allow the driving unit to receive power from the AC/DC adapter. A driving circuit applied in an illumination apparatus is also provided.
US08339063B2 Circuits and methods for driving light sources
A driving circuit includes a first inductor coupled in series with a light source for providing power to the light source. A controller coupled to the first inductor can control a switch coupled to the first inductor, thereby controlling a current flowing through the first inductor. A current sensor coupled to the first inductor can provide a first signal indicative of the current flowing through the first inductor, regardless of whether the switch is on or off. The switch is controlled according to the first signal. A second inductor magnetically coupled to the first inductor is also electrically coupled to the first inductor via a common node between the switch and the first inductor for providing a reference ground for the controller. The reference ground is different from the ground of the driving circuit.
US08339061B2 Illuminating system having sequential color filtering and a high-pressure discharge lamp
The invention relates to a novel operating method and corresponding ballast for illuminating systems having temporally sequential color filtering and a high-pressure discharge lamp operated by alternating current. In this case, at least three commutations of the lamp current are used within a color filtering sequence, in order to be able to operate the lamp advantageously without an excessive increase in the operating frequency of the color filter system.
US08339057B2 Circuit arrangement, and method for the operation of a high-pressure discharge lamp
A circuit arrangement for operating a high-pressure discharge lamp with an electronic ballast, which is designed to provide an AC feed signal for the high-pressure discharge lamp, the frequency of the AC feed signal being at least 1 MHz, wherein the electronic ballast is adapted to modulate the amplitude of the AC feed signal.
US08339056B1 Lamp ballast with protection circuit for input arcing and line interruption
An electronic lamp ballast is provided with first and second protection circuits responsive to mains input fault conditions. A controller includes a first input terminal coupled to a power supply circuit and effective to receive a power supply input voltage provided thereby, and a second input terminal coupled to an output sensing circuit and effective to receive a feedback voltage provided thereby. The first protection circuit includes circuitry to sense a fault condition in a mains power input to the ballast and to discharge the power supply input voltage in response to a sensed fault condition. The second protection circuit includes circuitry to sense a discharge of the power supply input voltage to the controller and to discharge the feedback voltage in response to the sensed discharge of the power supply input voltage.
US08339053B2 LED dimming apparatus
An LED dimming includes: current adjusting means (constant current circuit) for variably controlling a magnitude of a current flowing through an LED load; switching means (transistor) for intermittently controlling the current flowing through the LED load; and dimming controlling means (microcomputer) for controlling the current adjusting means and the switching means upon receiving a dimming signal outputted from a dimmer. In a case where the dimming signal outputted from the dimmer is on a higher brightness side than a predetermined level, the dimming controlling means flows a continuous current though the LED load, and dims the LED load based on a magnitude of the flowing current, and in a case where the dimming signal outputted from the dimmer is on a lower brightness side than the predetermined level, the dimming controlling means flows a pulse current through the LED load, and changes a mean value of waveforms of the pulse current, thereby dims the LED load. In this LED dimming apparatus, noise is less likely to occur even in a case where such an LED current is large, and brightness is less likely to vary even in a case where a dimming degree is increased.
US08339050B2 Light emitting diode driving circuit and light emitting diode array device
There is provided an LED driving circuit including: at least one ladder network circuit including: (n+1) number of first branches connected in parallel with one another by n number of first middle junction points between a first junction point and a second junction point, where n denotes an integer satisfying n≧2, (n+1) number of second branches connected in parallel with one another by n number of second middle junction points between the first junction point and the second junction point, the (n+1) number of second branches connected in parallel with the first branches; and n number of middle branches connecting the first and second middle junction points of an identical m sequence to each other, respectively, wherein each of the first and second, and middle branches comprises at least one LED device.
US08339045B2 Lighting structure
The lighting structure of the present invention can be installed in a cupboard, a wardrobe, a filing cabinet or another structural object requiring an auxiliary light source. The lighting structure comprises: a body provided with a lamp and an electrical circuit; and a base adapted to be installed on the structural object and joined with the body. The electrical circuit comprises a vibration sensing element, a control element and an electric power supplying portion. The electric power supplying portion is configured to supply electric power necessary for operation of the electrical circuit. When the lighting structure is vibrated, the vibration sensing element outputs an electrical signal to the control element so that the control element chooses to turn on or off the lamp correspondingly.
US08339038B2 Light-emitting device
To provide a bright and highly reliable light-emitting device. An anode (102), an EL layer (103), a cathode (104), and an auxiliary electrode (105) are formed sequentially in lamination on a reflecting electrode (101). Further, the anode (102), the cathode (104), and the auxiliary electrode (105) are either transparent or semi-transparent with respect to visible radiation. In such a structure, lights generated in the EL layer (103) are almost all irradiated to the side of the cathode (104), whereby an effect light emitting area of a pixel is drastically enhanced.
US08339033B2 Light emitting element and display device
A light emitting element includes a resonator structure which has a first reflecting member, a second reflecting member, and a light emission layer placed between the first reflecting member and the second reflecting member, and part of light resonated between the first reflecting member and the second reflecting member is transmitted through the first reflecting member or the second reflecting member in the resonator structure. A wavelength at which a resonator output spectrum from the resonator structure has a maximum value is located between a wavelength at which an inner light emission spectrum of the light emission layer has a maximum value and a wavelength at which relative luminous efficiency has a maximum value.
US08339031B2 Substrate for an organic light-emitting device, use and process for manufacturing this substrate, and organic light-emitting device
A substrate for an organic light-emitting device, especially a transparent glass substrate, which includes, on a first main face, a bottom electrode film, the electrode film being formed from a thin-film multilayer coating comprising, in succession, at least: a contact layer based on a metal oxide and/or a metal nitride; a metallic functional layer having an intrinsic electrical conductivity property; an overlayer based on the metal oxide and/or a metal nitride, especially for matching the work function of said electrode film, said substrate including a base layer, said base layer covering said main face.
US08339028B2 Multicolor light emitting diodes
A device such as a multicolor light emitting diode that emits different colors of light and that may combine the different colors emitted by individual light emitting diodes. The multicolor LED may include a common anode terminal that may be connected to each anode of the individual light emitting diodes. The multicolor LED may be a five terminal multicolor LED. Additionally, the multicolor LED may include two anode terminals, in which the first anode terminal may be a common anode terminal connected to three of the individual color LEDs and the second anode terminal may be connected to an anode of a white LED. In this embodiment, the multicolor LED may be a six terminal multicolor LED.
US08339027B2 Field emission device with electron emission unit at intersection and field emission display using the same
A field emission display includes an insulating substrate, a number of first electrode down-leads, a number of second electrode down-leads, and a number of electron emission units. The first electrode down-leads are set an angle relative to the second electrode down-leads to define a number of cells and a number of intersections. Each electron emission unit is located at one of the plurality of intersections and in at least two adjacent cells. The electron emission unit includes a first electrode, a second electrode, and a plurality of electron emitters. The second electrode extends surrounding the first electrode. The plurality of electron emitters located on and electrically connected to at least one of the first electrode and the second electrode. A field emission display is also provided.
US08339018B2 Laminated piezoelectric element, ejection device, fuel ejection system, and method for manufacturing laminated piezoelectric element
Provided is a highly durable laminated piezoelectric element wherein a stress generated at a portion, i.e., the boundary between an active region and inactive region, is reduced. A method for manufacturing such laminated piezoelectric element is also provided. The laminated piezoelectric element has a laminated structure (15) wherein a plurality of piezoelectric layers (11) and internal electrode layers (13) are alternately laminated. The piezoelectric layer (11) contains a metal element other than those elements constituting piezoelectric ceramic, i.e., the main component of the piezoelectric layer (11), and at a portion (11a) of the piezoelectric layer (11) at the vicinity of an end of the internal electrode layer (13), metal particles having a metal element as a main component exist. The content of the metal at the portion (11a) at the vicinity of the end is higher than the content of a compound of the metal element and a nonmetal element.
US08339016B2 Vibration wave driving device
A vibration wave driving device comprises a vibrator having an electromechanical conversion device, a supporting member for supporting the vibrator, and a driven member brought into contact with a part of the vibrator driven frictionally by vibration excited in the vibrator: the supporting member comprising a vibration portion vibrating together with the vibrator, a fixation portion for fixing the supporting member, and a support portion for connecting the vibration portion with the fixation portion and supporting the vibrator; and the support portion being comprised of a laminate of sheets.
US08339015B2 Elastic wave device and method for manufacturing the same
An elastic wave device includes a piezoelectric thin film formed from a piezoelectric single crystal substrate by peeling, an inorganic layer formed on a rear surface of the piezoelectric thin film, an elastic layer disposed on a surface of the inorganic layer opposite to the piezoelectric thin film, and a support member adhered to a surface of the elastic layer opposite to the inorganic layer. The elastic layer reduces stress generated when the piezoelectric thin film provided with the inorganic layer and the support member are adhered to each other and has a predetermined elastic modulus. The inorganic layer is formed of a material having a higher elastic modulus than that of the elastic layer and prevents damping generated when the elastic layer is provided.
US08339012B2 Electret and electrostatic induction conversion device comprising the same
To provide an electret whose surface potential is improved and an electrostatic induction conversion device comprising the same, an electret is formed by spin-coating a fluorine-containing polymer composition for coating which contains a fluorine-containing polymer having a ring structure in its main chain, a silane coupling agent, an aprotic fluorine-containing solvent, and a fluorine-containing alcohol as a protic fluorine-containing solvent on a copper substrate and baking it.
US08339007B2 Magnetic control circuit separation slit
An electric alternator/motor having a stator with at least two non-overlapping sectors is provided. Each sector includes a first winding, first and second magnetic circuits and a saturation control assembly. A cross-talk reduction feature, such as a peripheral slit is provided between each sector of the stator for impeding magnetic flux crossing between the sectors.
US08339003B2 Gear motor including a compact multiple-phase electric motor
The invention relates to a gear motor including a multiple-phase electric motor formed by a stator portion excited by electric coils and by a rotor having N pairs of poles radially magnetised in alternating directions, the stator portion including two angular sectors alpha-1 and alpha-2 with respective radii R1 and R2, and wide teeth and narrow teeth radially extending from an annular crown, characterized in that the wide teeth have a width higher than or equal to twice the width of the narrow teeth, in that the notch width is higher than the width of a narrow tooth, in that the angular sector alpha-1 is lower than 220° and includes all the coils, and in that the ratio R1/R2 ranges from 1.2 to 2.
US08339000B2 Electric machine with isolated ground electronics
An electrical system for a vehicle comprises a battery including a positive terminal and a negative terminal, and an alternator. The alternator includes a metal housing with a rotor and a stator positioned within the housing. The alternator further includes an electronics package positioned on the alternator housing. The electronics package includes a regulator and a rectifier, the rectifier including a plurality of negative diodes and a plurality of positive diodes. The plurality of positive diodes are positioned on a first diode carrier that is electrically connected to the negative terminal of the battery. The plurality of positive diodes are positioned on a second diode carrier that is electrically connected to the positive terminal of the battery. The first diode carrier is separated from the housing by an electrical insulation member positioned between the first diode carrier and the housing.
US08338999B2 Brushless motor
The brushless motor includes a stator having a electromagnetic coil and a position sensor; an axis fixed to the stator; and a rotor having a permanent magnet. The rotor rotates around the axis. The rotor is linked to a driven member that is driven by the brushless motor.
US08338997B2 Power tool
According to an aspect of the present invention, there is provided a power tool including: a motor that generates a rotational force; a power transmission mechanism that is driven by the motor to transmit the rotational force and that is connected to a bit; and a housing that houses the motor and the power transmission mechanism therein, wherein an electric fan for cooling the power transmission mechanism or the motor is provided inside the housing, wherein the power transmission mechanism, the motor and the electric fan are arranged in this order from front, and wherein the electric fan is disposed at a rear side so as to be interposed between the motor and a back wall of the housing.
US08338986B2 System and method for employing an on-machine power supply with monitoring and control capability
A method for providing power to devices in a network and coordinating actions of multiple power supplies on the network is described. The method may include maintaining connectivity of communication signals and ground between upstream and downstream portions of the network relative to a power supply, while terminating power from an upstream power supply and taking over power supply functions for downstream devices. This may be achieved by including a logic feature within one or more of the multiple power supplies that monitors a power status of an upstream power supply and/or the power status of the associated power supply. When the logic feature detects a power cycle, it initiates a coordinated power cycle of the associated power supply and/or other networked power supplies.
US08338985B2 Intelligent battery system
An intelligent battery system for powering a mobile workstation includes a mounting block having a first battery interface bracket for the releasable attachment of a first battery, a second battery interface bracket for the releasable attachment of a second battery and a third battery interface bracket for the releasable attachment of a backup battery, and a power control circuit functionally integrated with the mounting block and being capable of detecting a change in status of at least one of the first and second batteries and routing the flow of electrical power from the first, second and backup batteries in dependence thereon.
US08338984B2 Uninterruptible power supply supporting active loads
An uninterruptible power supply supporting active loads includes a charge and discharge module having a battery set and a charger charging the battery set with an input power, a switch circuit having at least two active switches connected to the battery set, a dynamic PWM control module connected with each of the active switches of the switch circuit, alternately outputting duty cycles composed of low-frequency square wave and high-frequency square wave and alternately controlling each of the active switches to turn on or off, and a transformer having a primary side connected with the switch circuit and a secondary side whose two terminals are connected with an output capacitor generating a filtering function in collaboration with an leakage inductor in the secondary side of the transformer. The uninterruptible power supply generates a quasi-continuous output satisfying the hold-up time demanded by an active load.
US08338980B2 Wind turbine with single-stage compact drive train
A drive train for a wind turbine includes individual rotor blades connected to a rotor hub. The drive train includes a gearbox, with the rotor hub mounted directly to the gearbox. The gearbox further includes a stationary gear carrier mounted to a mainframe of the wind turbine such that the gearbox substantially supports the weight of the rotor hub. A generator includes a rotor and stationary stator, with the gearbox comprising an output shaft coupled to the rotor such that the gearbox substantially supports the weight of the rotor.
US08338976B2 Magnetically-levitated wind turbine
A novel wind turbine configuration utilizes a permanent magnetic male and female levitation support for magnetic levitation. The novel wind turbine has a female part attached to a payload which is magnetically levitated above a male part of the levitation support. The female part and the payload are further operatively attached to a vertical axle structure which is held stationary by a point of contact. The point of contact and the vertical axle structure provide a stable axis of rotation for the payload and the female part, which can be rotated with near-zero friction due to the magnetic repulsion provided by same polarity of the female part and the male part within a conical region of the female part. In one embodiment of the invention, an alternator structure is uniquely arranged to enable the novel wind turbine to generate electricity with a high level of efficiency and durability.
US08338962B2 Semiconductor package substrate and semiconductor package having the same
A semiconductor package may include a package substrate having a first surface and a boundary that may be defined by edges of the package substrate. The package further includes a first semiconductor chip having a front surface and a back surface. The back surface of a first portion of the first semiconductor chip may be disposed on the first surface of the package substrate with the back surface of a second portion of the first semiconductor chip extending beyond of the defined boundary of the package substrate. The semiconductor package may also include a second semiconductor chip disposed on the back surface of the second portion of the first semiconductor chip that extends beyond the defined boundary of the package substrate.
US08338961B2 Semiconductor chip with reinforcing through-silicon-vias
A method of manufacturing includes connecting a first end of a first through-silicon-via to a first die seal proximate a first side of a first semiconductor chip. A second end of the first thu-silicon-via is connected to a second die seal proximate a second side of the first semiconductor chip opposite the first side.
US08338952B2 Interconnect structures with ternary patterned features generated from two lithographic processes
A method for fabricating an interconnect structure for interconnecting a semiconductor substrate to have three distinct patterned structures such that the interconnect structure provides both a low k and high structural integrity. The method includes depositing an interlayer dielectric onto the semiconductor substrate, forming a first pattern within the interlayer dielectric material by a first lithographic process that results in both via features and ternary features being formed in the interconnect structure. The method further includes forming a second pattern within the interlayer dielectric material by a second lithographic process to form line features within the interconnect structure. Hence the method forms the three separate distinct patterned structures using only two lithographic processes for each interconnect level.
US08338948B2 Ball grid array with improved single-ended and differential signal performance
An improved system and method for assigning power and ground pins and single ended or differential signal pairs for a ball grid array semiconductor package. In certain embodiments, the system uses a hexagonal pattern where the grid may be represented by a multiplicity of nested hexagonal patterns.
US08338946B2 Semiconductor module, method of manufacturing semiconductor module, and mobile device
An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area. The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.
US08338945B2 Molded chip interposer structure and methods
Apparatus and methods for providing a molded chip interposer structure and assembly. A molded chip structure having at least two integrated circuit dies disposed within a mold compound is provided having the die bond pads on the bottom surface; and solder bumps are formed in the openings of a dielectric layer on the bottom surface, the solder bumps forming connections to the bond pads. An interposer having a die side surface and a board side surface is provided having bump lands receiving the solder bumps of the molded chip structure on the die side of the interposer. An underfill layer is formed between the die side of the interposer and the bottom surface of the molded chip structure surrounding the solder bumps. Methods for forming the molded chip interposer structure are disclosed.
US08338943B2 Semiconductor package with thermal heat spreader
A semiconductor package includes a substrate, a stiffener ring coupled to the substrate and configured to form a well with the substrate, and a die positioned in the well. A thermal interface is positioned on the die. A heat spreader is coupled to the stiffener ring so that a portion of the heat spreader is positioned in the well and the thermal interface thermally couples the heat spreader to the die. The portion of the heat spreader positioned in the well adds rigidity to the semiconductor package and facilitates the use of thin dies.
US08338942B2 Power semiconductor module with connection elements electrically insulated from one another
A power semiconductor module, for placement on a cooling component. The module includes a substrate, at least two power semiconductor components arranged on the substrate, a housing and outwardly routed load and control connections. The substrate has an insulator body with a first main area that faces the interior of the power semiconductor module, and has interconnects at load potential arranged thereon. Each load connection is formed as a shaped metal body with outer contacts, a strip-like section and with inner contacts extending from the strip-like section to the substrate and making circuit-compliant contact therewith. In addition, the load connections are substantially completely encased by insulation except in the vicinity of the outer and inner contacts and accordingly are electrically insulated from one another.
US08338938B2 Chip package device and manufacturing method thereof
A chip package device includes a substrate having a chip bonding area and at least one contact pad, a chip having an active surface and an inactive surface, at least one wire, an adhesive layer, a heat dissipation element, and an encapsulation. The chip is disposed on the chip bonding area with its inactive surface facing the substrate. The chip includes at least one bonding pad disposed on the active surface. The wire correspondingly connects the at least one bonding pad and the at least one contact pad. The adhesive layer covers the active surface of the chip and encloses a portion of the wire extending over the bonding pad. The heat dissipation element is attached to the adhesive layer and covers the chip. The encapsulation partially encloses the periphery of the assembly including the chip, the adhesive and the heat dissipation element, and has an indented opening to expose the surface of the heat dissipation element.
US08338934B2 Embedded die with protective interposer
Embodiments of the present disclosure provide a substrate having (i) a first laminate layer, (ii) a second laminate layer, and (iii) a core material that is disposed between the first laminate layer and the second laminate layer; and a die attached to the first laminate layer, the die having an interposer bonded to a surface of an active side of the die, the surface comprising (i) a dielectric material and (ii) a bond pad to route electrical signals of the die, the interposer having a via formed therein, the via being electrically coupled to the bond pad to further route the electrical signals of the die, wherein the die and the interposer are embedded in the core material of the substrate. Other embodiments may be described and/or claimed.
US08338925B2 Microelectronic assemblies having compliant layers
A compliant semiconductor chip package assembly includes a semiconductor chip having a plurality of chip contacts, and a compliant layer having a top surface, a bottom surface and sloping peripheral edges, whereby the bottom surface of the compliant layer overlies a surface of the semiconductor chip. The assembly also includes a plurality of electrically conductive traces connected to the chip contacts of the semiconductor chip, the traces extending along the sloping edges to the top surface of the compliant layer. The assembly may include conductive terminals overlying the semiconductor chip, with the compliant layer supporting the conductive terminals over the semiconductor chip. The conductive traces have first ends electrically connected with the contacts of the semiconductor chip and second ends electrically connected with the conductive terminals. The conductive terminals are movable relative to the semiconductor chip.
US08338924B2 Substrate for integrated circuit package with selective exposure of bonding compound and method of making thereof
A substrate for integrated circuit package is disclosed. The substrate comprises an electrically conductive leadframe having a first side and an opposing second side. The substrate has a first bonding compound disposed in a first recessed portion of the first side and a second bonding compound disposed in at least a portion of a second recessed portion of the leadframe, selectively exposing a selected area of the leadframe on the second side. In an exemplary embodiment, the second bonding compound is a photolithographic material. A method of manufacturing a substrate for integrated circuit package is also disclosed.
US08338922B1 Molded leadframe substrate semiconductor package
A process for forming semiconductor packages includes partially etching a leadframe matrix, encapsulating it with mold compound, placing a semiconductor die in a leadframe unit and singulating the leadframe matrix. A system for forming semiconductor packages includes means for partially etching a leadframe matrix, means for encapsulating it with mold compound, means for placing a semiconductor die in a leadframe unit and means for singulating the leadframe matrix.
US08338920B2 Package integrated soft magnetic film for improvement in on-chip inductor performance
An integrated circuit package includes an integrated circuit with one or more on-chip inductors. A package cover covers the integrated circuit. A magnetic material is provided between the integrated circuit and the package cover. The magnetic material may be a soft magnetic thin film. The magnetic material may be affixed to the package cover by an adhesive. The magnetic material may be formed directly on the package cover by one of deposition, sputtering or spraying. The magnetic material may be affixed to the integrated circuit.
US08338919B2 Semiconductor device with strain
A semiconductor device includes: a semiconductor substrate having a p-MOS region; an element isolation region formed in a surface portion of the semiconductor substrate and defining p-MOS active regions in the p-MOS region; a p-MOS gate electrode structure formed above the semiconductor substrate, traversing the p-MOS active region and defining a p-MOS channel region under the p-MOS gate electrode structure; a compressive stress film selectively formed above the p-MOS active region and covering the p-MOS gate electrode structure; and a stress released region selectively formed above the element isolation region in the p-MOS region and releasing stress in the compressive stress film, wherein a compressive stress along the gate length direction and a tensile stress along the gate width direction are exerted on the p-MOS channel region. The performance of the semiconductor device can be improved by controlling the stress separately for the active region and element isolation region.
US08338918B2 Method for manufacturing a semiconductor device, method for detecting a semiconductor substrate and semiconductor chip package
A method for manufacturing a semiconductor device, includes: preparing a semiconductor substrate with a first notch; preparing a supporting substrate with a second notch; laminating the semiconductor substrate with the supporting substrate so that the first notch can be matched with the second notch; and processing a second main surface of the semiconductor substrate opposite to a first main surface thereof facing to the supporting substrate to reduce a thickness of the semiconductor substrate to a predetermined thickness.
US08338915B2 Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter
A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.
US08338913B2 Semiconductor inductor with a serpentine shaped conductive wire interlaced with a serpentine shaped ferromagnetic core
The inductance of an inductor is increased by forming a conductive wire to have a serpentine shape that weaves through a ferromagnetic core that has a number of segments that are connected together in a serpentine shape where each segment of the ferromagnetic core also has a number of sections that are connected together in a serpentine shape.
US08338902B2 Uncooled infrared image sensor
An uncooled infrared image sensor according to an embodiments includes: a plurality of pixel cells formed in a first region on a semiconductor substrate; a reference pixel cell formed in a second region on the semiconductor substrate and corresponding to each row or each column of the pixel cells; a supporting unit formed for each of the pixel cell and supporting a corresponding pixel cell; and an interconnect unit formed for each reference pixel cell. Each of the pixel cells includes: a first infrared absorption film and a first heat sensitive element. The reference pixel cell includes: a second infrared absorption film and a second heat sensitive element, the second heat sensitive element having the same characteristics as characteristics of the first heat sensitive element. The third and fourth interconnects of the interconnect unit have the same electrical resistance as electrical resistance of the first and second interconnects of the supporting unit.
US08338892B2 Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrode
In MOS transistor elements, a strain-inducing semiconductor alloy may be embedded in the active region with a reduced offset from the channel region by applying a spacer structure of reduced width. In order to reduce the probability of creating semiconductor residues at the top area of the gate electrode structure, a certain degree of corner rounding of the semiconductor material may be introduced, which may be accomplished by ion implantation prior to epitaxially growing the strain-inducing semiconductor material. This concept may be advantageously combined with the provision of sophisticated high-k metal gate electrodes that are provided in an early manufacturing stage.
US08338889B2 Semiconductor device and method of manufacturing semiconductor device
The disclosure concerns a method of manufacturing a semiconductor device including forming a plurality of fins made of a semiconductor material on an insulating layer; forming a gate insulating film on side surfaces of the plurality of fins; and forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface.
US08338884B2 Selective epitaxial growth of semiconductor materials with reduced defects
A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls. The semiconductor region is formed of a second semiconductor material different from the first semiconductor material.
US08338883B2 Semiconductor device
A semiconductor device comprises a transistor comprising a gate, a source, a drain, and a gate insulating layer, and an auxiliary line formed over the drain and electrically insulated from the drain. During a turn-off operation of the transistor, voltage to increase a resistance of the drain is supplied to the auxiliary line.
US08338882B2 Semiconductor memory device and method for manufacturing same
According to one embodiment, a semiconductor memory device includes a base, a stacked body, a memory film, a channel body, an interconnection, and a contact plug. The base includes a substrate and a peripheral circuit formed on a surface of the substrate. The stacked body includes a plurality of conductive layers and a plurality of insulating layers alternately stacked above the base. The memory film is provided on an inner wall of a memory hole punched through the stacked body to reach a lowermost layer of the conductive layers. The memory film includes a charge storage film. The interconnection is provided below the stacked body. The interconnection electrically connects the lowermost layer of the conductive layers in an interconnection region laid out on an outside of a memory cell array region and the peripheral circuit. The contact plug pierces the stacked body in the interconnection region to reach the lowermost layer of the conductive layers in the interconnection region.
US08338881B2 Flash memory device and method for fabricating the same
A flash memory device includes a source region formed in an active region of a semiconductor substrate; a recessed region formed in the active region on either side of the source region, the recessed region including a recess surface having sidewalls; floating gates formed at the sidewalls of the recess surface by interposing a tunnel insulating film; a source line formed on the source region across the active region; and control gate electrodes formed at sidewalls of the source line across a portion of the active region where the floating gates are formed. The floating gates and the control gate electrodes are formed by anisotropically etching a conformal conductive film to have a spacer structure. Cell transistor size can be reduced by forming a deposition gate structure at both sides of the source line, and short channel effects can be minimized by forming the channel between the sidewalls of a recess surface.
US08338878B2 Flash memory device with isolation structure
A flash memory device includes trenches that are formed at regions on a semiconductor substrate spaced apart from one another at predetermined distances, buried floating gates buried into the trenches, a plurality of isolation structures formed between the buried floating gates, and a dielectric film and a control gate formed on the buried floating gates.
US08338874B2 Flash memory device with an array of gate columns penetrating through a cell stack
A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.
US08338865B2 Liquid crystal display device and semiconductor device
By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.
US08338864B2 Semiconductor device
A semiconductor device in a continuous diffusion region formed on a semiconductor substrate and having either a P-type or N-type polarity includes: a first transistor formed within the continuous diffusion region; a second transistor formed within the continuous diffusion region and in an area that is different from an area where the first transistor is formed; a third transistor formed within the continuous diffusion region and in an area between the first and second transistors, and having a gate electrode to which a fixed potential is applied; and a fourth transistor formed within the continuous diffusion region and in an area between the second and third transistors, and having a gate electrode to which a fixed potential is applied.
US08338863B2 Vertical heterojunction bipolar transistors with reduced base-collector junction capacitance
Vertical heterojunction bipolar transistors with reduced base-collector junction capacitance, as well as fabrication methods for vertical heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The vertical heterojunction bipolar transistor includes a barrier layer between the intrinsic base and the extrinsic base that blocks or reduces diffusion of a dopant from the extrinsic base to the intrinsic base. The barrier layer has at least one opening that permits direct contact between the intrinsic base and a portion of the extrinsic base disposed in the opening.
US08338859B2 Semiconductor electronic device having reduced threading dislocation and method of manufacturing the same
A semiconductor electronic device comprises a substrate; a buffer layer formed on said substrate, having two or more layers of composite layers in which a first semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the substrate and a second semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and smaller coefficient of thermal expansion than the first semiconductor layer are alternately laminated; a semiconductor operating layer comprising nitride based compound semiconductor formed on said buffer layer; a dislocation reducing layer comprising nitride based compound semiconductor, formed in a location between a location directly under said buffer layer and inner area of said semiconductor operating layer, and comprising a lower layer area and an upper layer area each having an uneven boundary surface, wherein threading dislocation extending from the lower layer area to the upper layer area is bent at said boundary surface.
US08338858B1 Time correlation system and method
A time correlated single photon counting system having a programmable delay generator triggered by a laser fire event detector. The system may be used for chemical agent detection based on Rayleigh scattering using optical time domain reflectometry techniques. The system may also be used for Raman detection using frequency to time transformations.
US08338857B2 Germanium/silicon avalanche photodetector with separate absorption and multiplication regions
A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of wavelengths and the second type of semiconductor to absorb light in a second range of wavelengths. A multiplication region is defined proximate to and separate from the absorption region. The multiplication region includes an intrinsic semiconductor region in which there is an electric field to multiply the electrons created in the absorption region.
US08338856B2 Backside illuminated image sensor with stressed film
A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.
US08338847B2 Light emitting device, method of manufacturing the same, light emitting device package and lighting system
A light emitting device according to the embodiment includes a first semiconductor layer; an active layer to generate a light on the first semiconductor layer; a second conductive semiconductor layer on the active layer; a transparent electrode layer on the second conductive semiconductor layer; and a multiple thin film mirror on the transparent electrode layer, the multiple thin film mirror being formed by repeatedly stacking a first thin film layer having a first refractive index and a second thin film layer having a second refractive index different from the first refractive index by at least one time, wherein the second conductive semiconductor layer has a thickness satisfying: 2·Φ1+Φ2=N·2π±Δ, (0≦Δ≦π/2) in which, Φ1 is a phase shift occurring when a light, which travels in a vertical direction, passes through the second conductive semiconductor layer and is expressed as Φ1=2πnd/λ (n is a refractive index of the light, λ is a wavelength of the light, and d is a thickness of the second conductive semiconductor layer), Φ2 is a phase shift occurring when the light is reflected from one of the transparent electrode layer and the multiple thin film mirror, and N is a natural number.
US08338845B2 LED package and method for manufacturing the same
According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are made of a metal material, and disposed to be apart from each other. The LED chip is provided above the first and second lead frames, the LED chip having one terminal connected to the first lead frame and another terminal connected to the second lead frame. The resin body is made of a resin material having a shore D hardness of 25 or higher. In addition, the resin body covers the first and second lead frames and the LED chip. And, an appearance of the resin body is an appearance of the LED package.
US08338842B2 Solid state light sheet or strip having cavities formed in top substrate
A solid state light sheet and method of fabricating the sheet are disclosed. In one embodiment, bare LED chips have top and bottom electrodes, where the bottom electrode is a large reflective electrode. The bottom electrodes of an array of LEDs (e.g., 500 LEDs) are bonded to an array of electrodes formed on a flexible bottom substrate. Conductive traces are formed on the bottom substrate connected to the electrodes. A transparent top substrate is then formed over the bottom substrate. Various ways to connect the LEDs in series are described along with many embodiments. In one method, the top substrate contains a conductor pattern that connects to LED electrodes and conductors on the bottom substrate.
US08338839B2 Solid state light sheet for general illumination having substrates for creating series connection of dies
A solid state light sheet and method of fabricating the sheet are disclosed. In one embodiment, bare LED chips have top and bottom electrodes, where the bottom electrode is a large reflective electrode. The bottom electrodes of an array of LEDs (e.g., 500 LEDs) are bonded to an array of electrodes formed on a flexible bottom substrate. Conductive traces are formed on the bottom substrate connected to the electrodes. A transparent top substrate is then formed over the bottom substrate. Various ways to connect the LEDs in series are described along with many embodiments. In one method, the top substrate contains a conductor pattern that connects to LED electrodes and conductors on the bottom substrate.
US08338836B2 Light emitting device for AC operation
An AC light emitting device, in which a plurality of light emitting cells formed on a substrate are flip-bonded to a submount to be driven under an AC power source is disclosed. The light emitting device comprises a first serial array of light emitting cells, and a second serial array of light emitting cells, wherein the second serial array is connected in reverse parallel to the first serial array. Meanwhile, bonding patterns are formed on a submount substrate, and the light emitting cells of the first and second serial arrays are flip-bonded to the bonding patterns. Further, node connecting patterns are formed on the submount substrate, and connect the bonding patterns such that nodes corresponding to each other provided in the first and second serial arrays are electrically connected to each other. Accordingly, it is possible to provide an AC light emitting device which can prevent overvoltage from being applied to light emitting cells in the array to which reverse voltage is applied by bonding patterns and node connecting patterns formed on a submount substrate, thereby protecting the light emitting cells.
US08338835B2 Display device and driving method thereof
A display device in which not only a variation in a current value due to a threshold voltage but also a variation in a current value due to mobility are prevented from influencing luminance with respect to all the levels of grayscale to be displayed. After applying an initial potential for correction to a gate and a drain of a driving transistor, the gate and the drain of the driving transistor is kept connected in a floating state, and a voltage is held in a capacitor before a voltage between the gate and a source of the driving transistor becomes equal to a threshold voltage. When a voltage obtained by subtracting the voltage held in the capacitor from a voltage of a video signal is applied to the gate and the source of the driving transistor, a current is supplied to a light-emitting element. A value of an initial voltage for correction differs in accordance with the voltage of the video signal.
US08338833B2 Method of producing silicon carbide semiconductor substrate, silicon carbide semiconductor substrate obtained thereby and silicon carbide semiconductor using the same
The present invention provides a method of producing a silicon carbide semiconductor substrate in which a silicon carbide buffer layer doped with germanium and a semiconductor device layer are sequentially laminated on the buffer layer, a silicon carbide semiconductor substrate obtained by the method and a silicon carbide semiconductor in which electrodes are disposed on the silicon carbide semiconductor substrate.
US08338829B2 Semiconductor device
Electrode pads respectively have a probe region permitting probe contact and a non-probe region. In each of the electrode pads arranged zigzag in two or more rows, a lead interconnect for connecting another electrode pad with an internal circuit is not placed directly under the probe region but placed directly under the non-probe region.
US08338825B2 Graphene/(multilayer) boron nitride heteroepitaxy for electronic device applications
Disclosed is a substrate-mediated assembly for graphene structures. According to an embodiment, long-range ordered, multilayer BN(111) films can be formed by atomic layer deposition (ALD) onto a substrate. The subject BN(111) films can then be used to order carbon atoms into a graphene sheet during a carbon deposition process.
US08338824B2 Light emitting device
By doping an organic compound functioning as an electron donor (hereinafter referred to as donor molecules) into an organic compound layer contacting a cathode, donor levels can be formed between respective LUMO (lowest unoccupied molecular orbital) levels between the cathode and the organic compound layer, and therefore electrons can be injected from the cathode, and transmission of the injected electrons can be performed with good efficiency. Further, there are no problems such as excessive energy loss, deterioration of the organic compound layer itself, and the like accompanying electron movement, and therefore an increase in the electron injecting characteristics and a decrease in the driver voltage can both be achieved without depending on the work function of the cathode material.
US08338822B2 Electrical connection structure having elongated carbon structures with fine catalyst particle layer
An electrical connection structure having elongated carbon structures electrically connected to an electroconductive body is obtained by successively layering an electroconductive catalyst support layer, a fine catalyst particle layer for producing the elongated carbon structures and the elongated carbon structures on the electroconductive body. A low-resistance electrical connection structure is provided.
US08338814B2 Resistive random access memory, nonvolatile memory, and method of manufacturing resistive random access memory
A resistive random access memory includes a lower electrode; a metal oxide film formed on the lower electrode and having a variable resistance, the metal oxide film having a first portion containing a metal element forming the metal oxide film and a second portion richer in oxygen than the first portion; and an upper electrode formed on the metal oxide film.
US08338811B2 Optical level detector for a beverage machine
A level detection device for detecting an upper surface of a liquid at a reference level. The device includes a reservoir having a bottom wall and one or more side walls that delimit a cavity for containing the liquid; a light emitter for emitting a light beam towards this cavity; at least one reflection surface for reflecting the light beam; and a light detector for detecting the emitted light beam upon reflection. The emitter and detector are so arranged that, when the surface of the liquid passes the reference level, a state of detection of the light beam by the detector is changed. The emitter, detector and reflection surface(s) are so located and oriented relative to the cavity that the emitted light beam is: detectable by the detector upon travelling through the liquid in the cavity; and refractable at the surface of the liquid towards or away from the detector so that the state of detection is a function of such refraction.
US08338810B2 Radiation protection wall for mammography systems with integrated user interface
In a mammography system with a radiation protection wall, a production method for a radiation protection wall, and a method to operate a mammography system, the radiation protection wall has a further function in addition to the radiation protection. The radiation protection wall additionally serves to present a user interface of a control program to control the mammography apparatus, and can still display the images acquired by the mammography apparatus. The display region of the radiation protection wall is provided in the upper region of said radiation protection wall and can be fashioned as a touchscreen in order to control the mammography apparatus with the detected touch signals.
US08338802B2 Terahertz radiation anti-reflection devices and methods for handling terahertz radiation
A terahertz (THz) anti-reflection device, for example, a broadband tunable THz anti-reflection device, includes a silicon substrate having a plurality of recesses, each of the plurality of recesses having a plurality of cavities of decreasing dimension. The cavities may be nested polygonal cavities, for example, having a square or rectangular cross section. The recesses having the cavities may be positioned at regular periods, for example, periods ranging from 10 μm to 20 μm. The devices may be fabricated by conventional lithographic methods. Also disclosed are methods for modifying terahertz radiation and methods for fabricating anti-reflection devices.
US08338793B2 Identification and localization of explosives and other material
A neutron source illuminates suspect material leading to emission of gamma rays characteristic of the isotopes present. The system measures Compton scattering of emitted gamma rays using detectors with three dimension event localization capability. Detection does not require full energy deposition. A spatial correlation of projection vectors is computed by a reconstruction that searches for solutions that generate spatial correlation. Identification and location for contraband material is determined from solutions that generate spatial correlation.
US08338791B2 Digital pulse processing for multi-spectral photon counting readout circuits
An apparatus includes a local minimum identifier (408) that identifies a local minimum between overlapping pulses in a signal, wherein the pulses have amplitudes that are indicative of the energy of successively detected photons from a multi-energetic radiation beam by a radiation sensitive detector, and a pulse pile-up error corrector (232) that corrects, based on the local minimum, for a pulse pile-up energy-discrimination error when energy-discriminating the pulses using at least two thresholds corresponding to different energy levels. This technique may reduce spectral error when counting photons at a high count rate.
US08338783B2 Dosimetry device for verification of a radiation therapy apparatus
The present invention relates to a dosimetry device for verification of quality of a radiation beam in standard and conformal radiation therapy, and for IMRT (Intensity Modulated Radiation Therapy) applications. The device includes an active area comprising individual radiation detectors. The active area comprises a limited number of lines of radiation detectors, and a number of extra radiation detectors dedicated to the energy measurement of electrons or photons. It also comprises a build-up plate with energy degraders. The energy degraders are located upstream from the extra radiation detectors in the path of the radiation beam.
US08338782B2 Detector system for transmission electron microscope
In a transmission electron microscope detector system, image data is read out from the pixels and analyzed during an image acquisition period. The image acquisition process is modified depending on the results of the analysis. For example, the analyses may indicate the inclusion in the data of an image artifact, such as charging or bubbling, and data including the artifact may be eliminated form the final image. CMOS detectors provide for selective read out of pixels at high data rates, allowing for real-time adaptive imaging.
US08338781B2 Charged particle beam scanning method and charged particle beam apparatus
In a method of scanning a charged particle beam which can position the scan position to a proper location inside a deflectable range of the scan position of charged particle beam, the scan position of charged particle beam is deflected to a plurality of target objects inside a scan position deflectable region and on the basis of a shift of a target object at a scan location after deflection, the deflection amount at the scan location is corrected.
US08338780B2 Ambient pressure matrix-assisted laser desorption ionization (MALDI) apparatus and method of analysis
A mass spectrometer having a matrix-assisted laser desorption ionization (MALDI) source which operates at ambient pressure is disclosed. The apparatus and method are disclosed to analyze at least one sample which contains at least one analyte using matrix-assisted laser desorption ionization (MALDI), which apparatus comprises:The present invention relates to an apparatus and a method for ionizing at least one analyte in a sample for delivery to a mass analysis device, comprising: (a) an ionization enclosure including a passageway configured for delivery of ions to the mass analysis device; (b) means to maintain said ionization enclosure at an ambient pressure of greater than 100 mTorr; (c) a holder configured for maintaining a matrix containing said sample in the ionization enclosure at said ambient pressure; (d) a source of laser energy including means associated with the ionization enclosure for directing the laser energy onto said matrix maintained by the holder at the ambient pressure to desorb and ionize at least a portion of the analyte in the sample, and (e) means for directing at least a portion of the at least one ionized analyte into the passageway. The ambient pressure (AP-MALDI) source is compatible with various mass analyzers, particularly with mass spectrometers and solves many problems associated with conventional MALDI sources operating under vacuum. Atmospheric pressure MALDI is described. The analysis of organic molecules or fragments thereof, particularly biomolecules, e.g., biopolymers and organisms, is described.
US08338779B2 Optimization of excitation voltage amplitude for collision induced dissociation of ions in an ion trap
Collision induced dissociation of precursor ions in an ion trap is performed by determining a predicted fragmentation-optimized excitation voltage amplitude based on an indicator of damping gas pressure, such as a damping gas flow rate, and optionally other parameters including precursor ion m/z and an indicator of the Mathieu parameter q. The excitation voltage may then be applied to electrodes of the ion trap in steps of increasing amplitude, wherein at least one of the amplitudes corresponds to the predicted optimum value. Application of the excitation voltage in this manner produces favorable fragmentation efficiencies over a range of operating parameters and for ions of differing chemical properties.
US08338778B2 Methods for detecting vitamin C by mass spectrometry
Provided are methods for determining the amount of vitamin C in a sample using mass spectrometry. The methods generally involve ionizing vitamin C in a sample and detecting and quantifying the amount of the ion to determine the amount of vitamin C in the sample.
US08338776B2 Optical array device and methods of use thereof for screening, analysis and manipulation of particles
Methods and devices are provided for the trapping, including optical trapping; analysis; and selective manipulation of particles on an optical array. A device parcels a light source into many points of light transmitted through a microlens optical array and an Offner relay to an objective, where particles may be trapped. Preferably the individual points of light are individually controllable through a light controlling device. Optical properties of the particles may be determined by interrogation with light focused through the optical array. The particles may be manipulated by immobilizing or releasing specific particles, separating types of particles, etc.
US08338773B2 High-speed analog photon counter and method
A high speed analog photon counter and method is provided. In one aspect, the method includes delivering an electric charge to a circuit of the high speed analog photon counter through a current source of the circuit. The method also includes accumulating the electric charge in a capacitor of the circuit electrically coupled to the current source. The method further includes comparing the electric charge accumulated in the capacitor of the circuit with a reference voltage through a comparator of the circuit electrically coupled to an output of the capacitor. The output of the capacitor of the circuit is coupled to an input of the comparator of the circuit, and the reference voltage is coupled to another input of the comparator of the circuit. The method furthermore includes resetting the capacitor of the circuit when the electric charge accumulated in the capacitor of the circuit matches the reference voltage.
US08338769B1 Pyrotechnic fin deployment and retention mechanism
A fin retention and deployment mechanism includes a detent in each of a plurality of fins, a mechanism that engages the detent, and at least one spring clip that maintains each of the fins in a non-deployed position. The mechanism also includes a gas generator, a manifold, coupled to the gas generator and having a plurality of cylinders in fluid communication with gas from the gas generator, and a plurality of pistons disposed in the cylinders. A bottom of each of the pistons is coupled to each of the fins to provide deployment thereof when a corresponding top of each of the pistons is acted upon by gas from the gas generator. In response to the gas generator expelling gas, the pistons may move the fins to a deployed position.
US08338763B2 Microwave oven with a regulation system using field sensors
A microwave heating device and a method for heating a load using microwaves are provided. The microwave heating device comprises a cavity adapted to receive a load and at least two microwave sources for feeding microwave energy into the cavity through at least two feeding ports respectively. The microwave heating device further comprises at least two field sensors adapted to measure field strengths of the microwave energy in the cavity. A first field sensor is arranged at a first location for measuring the field strength representative of a mode fed from a first feeding port and a second field sensor is arranged at a second location for measuring the field strength representative of a mode fed from a second feeding port. The microwave heating device further comprises a control unit connected to the microwave sources and the field sensors for regulating the microwave sources based on the measured field strengths. The present invention is advantageous in that it enables uniform heating of the load in the cavity.
US08338757B2 Cooking device
A cooking device includes a control mode switch selecting a control mode for controlling a heating operation; a setting switch for selecting a set value in each control mode; a heating control unit for controlling a heating unit based on the control mode and the set value inputted through the control mode switch and the setting switch; and a selection switch for selecting the operation mode. The operation modes include a first operation mode in which all of the plurality of control modes are set to be selectable and a second operation mode in which only part of the control modes are set to be selectable. The heating control unit disables at least one control mode switch when the second operation mode is selected by the selection switch.
US08338754B2 Common tool center point consumables
A consumable is configured to operate in a robotic welding torch. The robotic welding torch includes a torch body and a tube. The tube has an elongated body extending from a supply end to a discharge end. The tube is operably connected substantially at the supply end to the torch body. The tube is configured to operably connect at the discharge end to a first set of consumables in a first configuration and to a second set of consumables in a second configuration. The first set of consumables has a first amperage capacity and the second set of consumables has a second amperage capacity substantially larger than the first amperage capacity. The tool center point of the robotic welding torch is substantially constant between the first configuration and the second configuration.
US08338752B2 Wire feeder having changeable housing
A modular portable welding wire feeder housed in a easily removable and interchangeable housing. The wire feeder includes a wire feeding module conveniently mounted inside of the housing. The housing is configured so that it may easily be removed from the wire feeing module, thereby allowing the housing to be easily replaced or exchanged as needed by the user.
US08338750B2 AC pulse arc welding control method
A control method for AC pulse arc welding performed upon application of cyclic AC welding current is provided. The welding current has a cycle including an electrode negative polarity period and an electrode positive polarity period subsequent to the electrode negative polarity period. In the control method, an electrode negative polarity base current and a subsequent electrode negative polarity peak current are applied during the electrode negative polarity period. The electrode negative polarity base current has an absolute value smaller than a first critical value, and the electrode negative polarity peak current has an absolute value greater than the first critical value. Then, an electrode positive polarity peak current is applied during the electrode positive polarity period. The electrode positive polarity peak current has a value greater than a second critical value.
US08338746B2 Method for processing a memory link with a set of at least two laser pulses
A set (50) of laser pulses (52) is employed to sever a conductive link (22) in a memory or other IC chip. The duration of the set (50) is preferably shorter than 1,000 ns; and the pulse width of each laser pulse (52) within the set (50) is preferably within a range of about 0.1 ps to 30 ns. The set (50) can be treated as a single “pulse” by conventional laser positioning systems (62) to perform on-the-fly link removal without stopping whenever the laser system (60) fires a set (50) of laser pulses (52) at each link (22). Conventional IR wavelengths or their harmonics can be employed.
US08338745B2 Apparatus and methods for drilling holes with no taper or reverse taper
Apparatus and methods for drilling holes in a material with a laser are disclosed. An apparatus for drilling holes in a material with a laser includes a first steering element, a second steering element, and a lens. The first steering element is positioned to steer a beam from the laser. The second steering element is positioned to steer the beam from the first steering element. The lens focuses the beam from the second steering element. The first and second steering elements are configured to move with respect to the beam. Moving the first and second steering elements changes an angle of the beam where it contacts the material. The apparatus is operable to drill holes having no taper or reverse taper.
US08338744B2 Condensing optical system, laser processing method and apparatus, and manufacturing method of brittle material blank
A condensing optical system having a condensed light spot with a small size and a large focal depth without causing a problem of a decrease in intensity of the condensed light spot or discontinuity of an intensity distribution in front and rear areas of a focal position is provided. The condensing optical system that condenses a laser beam generated by a laser source at a predetermined focal length is designed to satisfy Expressions (a) to (d), thereby producing 3rd and 5th spherical aberrations: |Z8|≧0.1λ or |Z15|≧0.05λ,  (a) Z8/Z15≧3 or Z8/Z15<1,  (b) |Z8|<1.4λ, and  (c) |Z15|<0.5λ,  (d) where λ is a wavelength, Z8 is an 8th coefficient of coefficients of the Zernike fringe polynomial of wavefront aberration corresponding to a 3rd order spherical aberration, and Z15 is a 15th coefficient of the coefficients of the Zernike fringe polynomial of wavefront aberration corresponding to a 5th spherical aberration.
US08338742B2 Dynamic test glide head calibration using laser adjustment
Methods and apparatus for the calibration and use of test glide head gimbal assemblies are disclosed. Calibration is performed by pulse laser adjustment of the flexure mounted to the glide head, while the head is flying above a media test disk having asperities of known dimensions. The calibration process normalizes the fly heights of glide heads used to measure defects on both upper and lower surfaces of disk drive media, allowing upper and lower surfaces to be scanned simultaneously.
US08338740B2 Nozzle with exposed vent passage
A nozzle for a plasma torch can include a body that has an inner surface, an outer surface, a proximal end, and an exit orifice at a distal end. The nozzle can also include a liner surrounded by the inner surface of the body. The liner can include a proximal end and an exit orifice at a distal end adjacent the exit orifice of the body. The nozzle can include at least one vent passage formed in the body. The vent passage can have an inlet formed in the inner surface of the body and an outlet formed in the outer surface of the body. The vent passage can be disposed between the proximal end of the body and the proximal end of the liner. The plasma arc torch can include a configuration that allows for increased electrode life and nozzle life for a vented high current plasma process.
US08338739B2 Method and apparatus for cutting high quality internal features and contours
An automated method for cutting a plurality of hole features using a plasma arc torch system can be implemented on a computer numerical controller. The automated method can include the steps of: a) cutting a lead-in for a hole feature using a lead-in command speed based on a diameter of that hole feature and b) cutting a perimeter for the hole feature using a perimeter command speed greater than the corresponding lead-in command speed for the hole feature. The automated method can also include the step c) of repeating steps a) and b) for each additional hole feature having a same diameter or a different diameter.
US08338735B2 Electrode wire for spark erosion
The electrode wire according to the invention comprises a brass core (1) covered with a γ phase brass coating (2) having a structure fragmented into blocks (2a) between which the core (1) is exposed. The blocks (2a) have a thickness (E2) with a narrow distribution and produce a coverage of the core (1) according to a coverage rate greater than 50%. This produces a regular fragmentation of the coating, which improves the finish state of the machined parts.
US08338733B2 Sliding key within a portable electronic device
A key assembly comprises a base plate, two elastic elements and a key body. The elastic elements are both mounted to the base plate, and the elastic elements are spaced from and opposite to each other. The key body is slidably mounted to the base plate between the two elastic elements, the key body includes a first key section and a second key section connected with the first key section. The first key section has a first arcuate contacting portion formed thereon, the second key section has a second arcuate contacting portion formed thereon. One of the elastic elements is mounted to the first key section, another one of the elastic elements is mounted to the second key section. When the first key section slides toward and compresses said one of the elastic elements, the second key section slide away from and stretches said another one of the elastic elements.
US08338732B2 Spring operated actuator for an electrical switching apparatus
A spring operated actuator for an electrical switching apparatus. It has an opening spring and a closing spring, one of them including a torsion spring. The torsion spring is charged in the unwinding direction and discharged in the winding direction.
US08338727B2 Interpole coupling system
A circuit breaker includes a plurality of pole assemblies, each having a movable contact and a stationary contact. A bellcrank assembly is associated with each pole assembly. Each bellcrank assembly includes a bellcrank lever including a cylindrical body and at least one radially extending arm. The radially extending arm is mechanically interrelated with the movable contact so that rotation of the bellcrank lever selectively causes the movable contact to engage or disengage the stationary contact. At least one of the bellcrank lever radially extending arms is relatively more flexible than the other bellcrank lever radially extending arms.
US08338725B2 Camera based touch system
One aspect of the present invention relates to an apparatus for touch detection. In one embodiment, the apparatus includes a touch panel, an imaging device mounted to the touch panel and configured such that when a pointer touches the touch panel, the imaging device acquires an image of the pointer touching the touch panel, and a processor in communication with the imaging device for receiving and processing the acquired image to obtain its width and its angle relative to the touch panel so as to determine the location of the pointer in the touch panel.
US08338721B2 Cover with improved vibrational characteristics for an electronic device
A cover or housing member for an electronic device comprises a central region and a perimeter region surrounding the central region. The central region comprises an elevated pattern of radial ribs and elliptical elevations elevated above a generally planar lower surface, such that the cover has multiple vibrational modes of natural resonance in which a maximum deflection of the cover occurs in a first mode at a central point of the cover.
US08338720B2 Enclosure for a vehicle
An enclosure is provided for a vehicle. The enclosure comprises (a) a housing and (b) a cover for the housing. At least one of the housing and the cover includes a mounting portion for attaching the at least one of the housing and the cover to a vehicle and a compliant portion connected to the mounting portion. The compliant portion is plastically deformable.
US08338718B2 Wiring board and method of manufacturing the same
A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to each other through vias formed in the insulating layers. In the peripheral region around the chip mounting area of the outermost insulating layer on one of both surfaces of the board, a pad is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude, and a pad whose surface is exposed from the insulating layer is arranged in the chip mounting area. A chip is flip-chip bonded to the pad of the package, and another package is bonded to the bump shaped pad in a peripheral region around the chip (package-on-package bonding).
US08338711B2 Display device and manufacturing method thereof
Provided is a display panel comprising a first panel comprising a first lower substrate and a first upper substrate; a first alignment key formed in the first lower substrate; a second alignment key formed in the first upper substrate, the second alignment key is disposed in a position corresponding to the first alignment key; a second panel attached to the first panel; and a third alignment key formed in the second panel, the third alignment key is disposed in a position corresponding to the first and the second alignment keys and formed such that the first and the second alignment keys are identified.
US08338708B2 Electric junction box joint structure
An electric junction box is provided having a receiving portion enabling a joint to be securely press-fitted into a joint, even if the outer diameter of the joint varies within a wide range. An electric junction box is comprised of a joint having electrical conduits that are electrically connected to each other at their terminals, and a cap disposed on the terminals, and a receiving portion which the joint is press-fitted into. The receiving portion comprises a recess having an inner surface facing an outer surface of the joint, and a rib projection disposed on the inner surface of the recess. The rib projection has a tapered portion inclined toward the bottom of the recess thus approximating the center portion of the bottom.
US08338703B2 Housing for an electronic device, device comprising such a housing and method for manufacturing such a housing
A housing (1) for an electronic device, includes at least a front part (2) and a back part (3) adapted to be assembled together, defining an internal volume (5) capable of receiving functional components of the device. At least one of the front (2) and/or back (3) parts contains at least one insert (7; 7′; 8) produced from a first material, in particular sheet metal, integrated by overmoulding, into a frame (9; 10) produced from a second material, in particular plastic material or injectable metal. The housing is applicable to the field of electronic devices, such as telephones, multimedia players/recorders, portable computers, “tablet” type computers, external computer screens, television sets, etc.
US08338701B2 Dye-sensitized photoelectric conversion device
A photoelectric conversion device using a semiconductor fine material such as a semiconductor fine particle sensitized with a dye carried thereon, characterized in that the dye is a methine type dye having a specific partial structure, for example, a methine type dye having a specific carboxyl-substituted hetero ring on one side of a methine group and an aromatic residue substituted with a dialkylamino group or an organic metal complex residue on the other side of the methine group, or a methine type dye having a carboxyl-substituted aromatic ring on one side of a methine group and a heteroaromatic ring having a dialkylamino group or an organic metal complex residue on the other side of the methine group; and a solar cell using the photoelectric conversion element. The photoelectric conversion element exhibits a conversion efficiency comparable or superior to that of a conventionally known photoelectric conversion element sensitized with a methine type dye.
US08338699B2 Poly(vinyl butyral) encapsulant comprising chelating agents for solar cell modules
Provided is a solar cell module that comprises a solar cell assembly. The solar cell assembly is encapsulated by a poly(vinyl butyral) encapsulant and contains an oxidizable metal component that is at least partially in contact with the poly(vinyl butyral) encapsulant. The poly(vinyl butyral) encapsulant comprises poly(vinyl butyral), about 15 to about 45 wt % of one or more plasticizers, and about 0.5 to about 2 wt % of one or more chelating agent, based on the total weight of the poly(vinyl butyral) encapsulant. Further provided are an assembly for preparing the solar cell module; a process for preventing or reducing the discoloration of a poly(vinyl butyral) encapsulant in contact with an oxidizable metal component in the solar cell module; and the use of the solar cell module to convert solar energy to electricity.
US08338697B2 Propylene resin composition and use thereof
The thermoplastic resin composition (X1) of the present invention comprises (A1), (B1), (C1), and optionally (D1) below: 1 to 90 wt % of an isotactic polypropylene (A1); 9 to 98 wt % of a propylene/ethylene/α-olefin copolymer (B1) containing 45 to 89 mol % of propylene-derived structural units, 10 to 25 mol % of ethylene-derived structural units, and optionally, 0 to 30 mol % of C4-C20 α-olefin-derived structural units (a1); 1 to 80 wt % of a styrene-based elastomer (C1); and 0 to 70 wt % of an ethylene/α-olefin copolymer (D1) whose density is in the range of 0.850 to 0.910 g/cm3, wherein (A1)+(B1)+(C1)+(D1)=100 wt %.
US08338695B2 Iterative adaptive solar tracking having variable step size
A system controller for position controlling a photovoltaic (PV) panel in a PV system including a power sensor sensing output power (P), and a motor for positioning the PV panel. The system controller includes a computing device having memory that provides motor control signals and implements an iterative adaptive control (IAC) algorithm stored in the memory for adjusting an angle of the PV panel. The IAC algorithm includes an iterative relation that relates P at current time k (P(k)), its elevation angle at k (θs (k)), P after a next step (P(k+1)) and its elevation angle at k+1 (θs (k+1)). The IAC algorithm generates a perturbed power value P(k+1) to provide a power perturbation to P(k), and calculates a position angle θS (k+1) of the PV panel using the perturbed power value. The motor control signals from the computing device cause the motor to position the PV panel to achieve θS (k+1).
US08338688B2 Electronic keyboard instrument
An electronic keyboard instrument with a hammer action, in which a circuit board for generating electronic musical tones can be disposed at a location for easy maintenance and for effective space utilization. Front and rear bars are bridged between side plates of an instrument main body so as to extend parallel to each other in the left-right direction and reinforce the instrument main body. A hammer action mechanism having hammers for respective keys is disposed rearward of a key-depression part of a keyboard and upward of a rear end portion of the keyboard, and a board tray is bridged between the front and rear bars. The board tray and the circuit board are located upward of the hammer action mechanism.
US08338685B2 Method and system for video and film recommendation
An artificial intelligence video analysis recommendation system and method is provided that allows video viewers to discover new videos and video producers to evaluate the potential success of a new project as well as to understand the perceptual factors beneath audience ratings. The system and method accomplish these tasks by analyzing a database of video in order to identify key similarities between different pieces of video, and then recommends pieces of video to a user depending upon their video preferences. An embodiment enables a user to evaluate a new video's similarity to videos already established as commercially valuable.
US08338681B2 Internal microphone support system for percussion instruments
An internal support device comprising horizontal and vertical straps and a plurality of mounting devices for positioning and isolating acoustic microphones interior to a percussion instrument. The vertical straps are rubber or similar shock absorbing material, arranged in a rectangular pattern and secured at their ends to a percussion instrument shell using a series of isolating lug attachments. Horizontal straps of similar material span opposing vertical straps to form two H-shaped frames for one or a plurality of microphone stand devices. Embodiments of the stand devices include a flat plane attached between the vertical straps, a modified flat plate with an internal wire harness for suspending a microphone, and a flat plane with microphone arm extensions therefrom. An alternate embodiment of the overall device includes a motorized adjustment means and a conveyor means for positioning and refining a microphone position within the drum interior without entering the drum cavity. The disclosed invention provides for modular placement and support for different types of microphones within a percussion instrument, as well as improved microphone isolation for better sound quality in a sound studio or recording environment.
US08338675B1 Maize variety hybrid X18A636
A novel maize variety designated X18A636 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing hybrid maize variety X18A636 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X18A636 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X18A636, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X18A636. This invention further relates to methods for producing maize varieties derived from maize variety X18A636.
US08338672B2 Pepper hybrid E42.2346
A hybrid pepper designated E42.2346 is disclosed. The invention relates to the seeds of hybrid pepper E42.2346 to the plants of hybrid pepper E42.2346 and to methods for producing a hybrid plant, either inbred or hybrid, by crossing the hybrid E42.2346 with itself or another pepper plant. The invention further relates to methods for producing a pepper plant containing in its genetic material one or more transgenes and to the transgenic plants produced by that method and to methods for producing other pepper lines, cultivars or hybrids derived from the hybrid pepper E42.2346.
US08338671B2 Soybean variety XB31E11
A novel soybean variety, designated XB31E11 is provided. Also provided are the seeds of soybean variety XB31E11, cells from soybean variety XB31E11, plants of soybean XB31E11, and plant parts of soybean variety XB31E11. Methods provided include producing a soybean plant by crossing soybean variety XB31E11 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XB31E11, methods for producing other soybean varieties or plant parts derived from soybean variety XB31E11, and methods of characterizing soybean variety XB31E11. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XB31E11 are further provided.
US08338669B2 Soybean cultivar S080101
A soybean cultivar designated S080101 is disclosed. The invention relates to the seeds of soybean cultivar S080101, to the plants of soybean S080101, to plant parts of soybean cultivar S080101, and to methods for producing a soybean plant produced by crossing soybean cultivar S080101 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars, or breeding cultivars, and plant parts derived from soybean variety S080101, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar S080101, and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants, and plant parts produced by crossing the cultivar S080101 with another soybean cultivar.
US08338668B2 Soybean cultivar S080135
A soybean cultivar designated S080135 is disclosed. The invention relates to the seeds of soybean cultivar S080135, to the plants of soybean S080135, to plant parts of soybean cultivar S080135, and to methods for producing a soybean plant produced by crossing soybean cultivar S080135 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars, or breeding cultivars, and plant parts derived from soybean variety S080135, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar S080135, and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants, and plant parts produced by crossing the cultivar S080135 with another soybean cultivar.
US08338667B2 Environmental stress-inducible 972 promoter isolated from rice and uses thereof
The present invention relates to environmental stress-inducible 972 promoter isolated from rice, a recombinant plant expression vector comprising said promoter, a method of producing a target protein by using said recombinant plant expression vector, a method of producing a transgenic plant using said recombinant plant expression vector, a transgenic plant produced by said method, a method of improving resistance of a plant to environmental stress by using said promoter, and a primer set for amplification of said promoter.
US08338665B2 Methods and vectors for producing transgenic plants
Methods of, and compositions for, assembling one or more transcription units in a genome without a linked selectable marker or other unwanted transcription unit are provided. Also provided methods of, and compositions for, assembling one or more transcription units in a genome with a reduced frequency of vector backbone.
US08338661B2 Transgenic plants with increased stress tolerance and yield
Polynucleotides are disclosed which are capable of enhancing a growth, yield under water-limited conditions, and/or increased tolerance to an environmental stress of a plant transformed to contain such polynucleotides. Also provided are methods of using such polynucleotides and transgenic plants and agricultural products, including seeds, containing such polynucleotides as transgenes.
US08338659B2 Absorbent article featuring leakage warning
Disclosed is an absorbent article for preventing leakage, the article including an absorbent assembly having an absorbent assembly perimeter and a leakage warning element disposed adjacent a portion of the perimeter, wherein the leakage warning element is adapted to provide a physical sensation indicating a fullness level of the absorbent assembly. Also disclosed is an absorbent article for providing a wearer with a warning of potential leakage, the article including an absorbent assembly and a leakage warning element disposed adjacent the absorbent assembly, wherein the leakage warning element is adapted to impart a physical sensation to the wearer.
US08338654B2 Hydrogenation process using catalyst comprising ordered intermetallic compound
Selective hydrogenation of unsaturated hydrocarbon compounds, e.g. of acetylene to ethylene, uses a hydrogenation catalyst comprising an ordered intermetallic compound. The ordered intermetallic compound comprises at least one metal of type A capable of activating hydrogen, and at least one metal of type B not capable of activating hydrogen. The structure of the ordered intermetallic compound is such that the type A metal is mainly surrounded by atoms of the type B metal.
US08338645B2 Method for producing a β-alkoxypropionamide
A method for producing a β-alkoxypropionamide shown by the following formula (I) including the step of reacting a β-alkoxypropionic acid ester with an amine in the presence of a basic catalyst or in the presence of a basic catalyst and a polyol: wherein R1 is an alkyl group having 1 to 8 carbon atoms, and R2 and R3 are independently hydrogen, a methyl group, an ethyl group, a methoxy group, an ethoxy group, a methoxymethyl group or a glycidyl group.
US08338637B2 Therapeutic compounds
Disclosed herein are compounds of the formula or salts or bioisosteres thereof. Therapeutic methods, medicaments, and compositions related thereto are also disclosed.
US08338635B2 Synthesis of half esters
A method for hydrolyzing an ester is provided. In accordance with the method, a compound A is provided which has first and second ester moieties. The compound is reacted in a liquid medium with a base having the formula MaXb, such that the first ester moiety is converted to a carboxyl moiety and the second ester moiety remains, wherein the ratio [Xk−]:[A] in the liquid medium is no greater than 1.6, and wherein k>0.
US08338633B2 Method of processing tall oil
A method of processing wood oil which is generated during pulping. In the method, low molecular weight carboxyl acid that is approximately 0.5-5.0% of the wood oil quantity (weight) is added to that wood oil early in its separation stage, in order to esterify the alcohol groups present in the wood oil, by the said acid. The protective esterification according to the present invention prevents the esterification of the alcohol groups by the fatty acids naturally present in the wood oil.
US08338629B2 Organometallic precursor for metal film or pattern and metal film or pattern using the precursor
Provided are an organometallic precursor, wherein a carboxyhydrazide compound is coordinated to a central metal, and a metal film or pattern using the precursor. By using the organometallic precursor, highly pure metal films or patterns can be obtained through a simple low-temperature process.
US08338628B2 Method of synthesizing alkylated bile acid derivatives
A novel, improved method of synthesizing alkylated bile acid derivatives is provided. Such derivatives include, but are not limited to the active, potent, and selective FXR receptor agonist such as 6-ECDCA and other CA, DCA and CDCA derivatives. The first step of the synthesis selectively oxidates CDCA, CD, or DCA related starting material. An efficient combined deprotonation, trapping, ethylation, deprotection and reduction system is used to produce the desired alkylated bile acid derivatives. This practical synthesis offers a simple and economical pathway suitable for a large-scale manufacturing of alkylated bile acid derivatives including, but not limited to, 6-ECDCA.
US08338627B2 Process for producing epoxides
A process for producing epoxide, the process including contacting an organic phase including at least one halohydrin(s) with at least one aqueous phase including a base in a plug-flow mixer/reactor system to disperse the organic phase in the aqueous phase via a mixing device imparting a power-to-mass ratio of at least 0.2 W/kg to convert at least a portion of the at least one halohydrin to an epoxide.
US08338623B2 Compounds as cannabinoid receptor ligands
The present application relates to cannabinoid receptor ligands containing compounds of formula (I) wherein A, R1, R2, and R3 are as defined in the specification. The present application also relates to compositions comprising such compounds, and methods of treating conditions and disorders using such compounds and compositions.
US08338621B2 Process for the preparation of 2-oxo-1-pyrrolidine derivatives
The present invention relates to alternative processes for the preparation of 2-oxo-1-pyrrolidine derivatives of formula (I) Particularly, the present invention relates to alternative processes for the synthesis of levetiracetam, brivaracetam and seletracetam.
US08338618B2 Antioxidant inflammation modulators: novel derivatives of oleanolic acid
Disclosed herein are novel oleanolic acid derivatives. Methods of preparing these compounds are also disclosed. The oleanolic acid derivatives of this invention may be used for the treatment and prevention of many diseases, including cancer, neurological disorders, inflammation, and pathologies involving oxidative stress.
US08338617B2 Process for preparing oxazolidine derivatives
A process for preparing (4S,5R)-5-carboxymethyl-2,2-dimethyl-4-phenyl-oxazolidine-3-carboxylic acid t-butyl ester, an intermediate in the preparation of anticancer compounds having a taxane skeleton, such as paclitaxel, docetaxol, etc.
US08338615B2 Human protein tyrosine phosphatase inhibitors and methods of use
The present disclosure relates to compounds effective as human protein tyrosine phosphatase beta (HPTP-β) inhibitors thereby regulating angiogenesis. The present disclosure further relates to compositions comprising one or more human protein tyrosine phosphatase beta (HPTP-β) inhibitors, and to methods for regulating angiogenesis.
US08338614B2 Tertiary carbinamines having substituted heterocycles which are active as β-secretase inhibitors for the treatment of alzheimer's disease
The present invention is directed to tertiary carbinamine compounds having substituted heterocycles, which are inhibitors of the beta-secretase enzyme, and are useful in the treatment of diseases in which the beta-secretase enzyme is involved, such as Alzheimer's disease. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the treatment of such diseases in which the beta-secretase enzyme is involved.
US08338612B2 Process for producing toluidine compound
Because fluazinam is excellent as an active ingredient of pesticides and highly useful, it is desired to produce it efficiently in a proper form with simple operations at low cost in an environmentally friendly manner. The desired product is obtained in good yields with simple operations by using industrially advantageous reaction systems by a process comprising (1) a step of reacting ACTF and DCDNBTF in the presence of an alkali component, a solvent selected from the group consisting of ketones, nitriles, ethers and esters and a sufficient amount of water to substantially dissolve the alkali component, (2) a step of neutralizing or acidifying the reaction mixture with an acid and (3) a step of removing the solvent by distillation from the mixture containing fluazinam as the reaction product and the reaction solvent to precipitate crystals the product.
US08338600B2 Copper-oxygen adduct complexes, and methods of making and use
The invention at hand describes Cu-(II)-oxygen adduct complexes, which are stable at room temperature, as well as methods for their production. In this, compounds of the general formula [L-Cu—O—O—Cu-L](BAr4)2 are concerned. Here, BAr4− is a tetraarylborate anion, selected from tetraphenylborate and tetrakis(3,5-trifluoromethyl)phenylborate. L represents a tripodal tetradentate ligand, wherein, each of the four binding sites of the tripodal tetradentate ligand is a nitrogen atom. Each of the three podal ligands is suitable for comprising an aliphatic amine or a nitrogen-containing heteroaromatic compound independently of one another. A bridge of one to four carbon atoms is located between the central nitrogen atom and the nitrogen atom of each of the podal ligands.The Cu-(II)-oxygen adduct complexes according to the present invention are produced, by initially reacting the ligand L with a Cu-(I) salt to [Cu-L]X. Subsequently, the anion X of the Cu-(I) complex [Cu-L]X is replaced with tetraarylborate and the compound [Cu-L]BAr4 obtained in this way is finally exposed to an oxygen-containing atmosphere. Hereby, [L-Cu—O—O—Cu-L](BAr4)2 is formed.The Cu-(II)-oxygen adduct complexes are suitable for being used as oxidation catalysts, for example for the oxidation of benzene to phenol or methane to methanol, for the oxidation of hydrogen, aromatic and aliphatic, saturated and unsaturated hydrocarbons, as well as alcohols and amines.Furthermore, detection of the Cu-(II)-oxygen adduct complexes according to the present invention is suitable for being used for the detection of oxygen.