Document Document Title
US08116179B2 Simultaneous viewing of multiple tool execution results
Facilitating analysis is disclosed. A master track comprising one or more previously recorded inputs to one or more computer system components is played. Two or more sets of instrument output are received, each set generated during at least a corresponding portion of the playback of the master track. At least a selected portion of the instrument output is displayed in a manner that allows visual correlation of the displayed instrument output.
US08116177B2 Optical pickup and disc drive apparatus
An objective-lens driving device includes a fixed block fixed to a moving base, a movable block having a lens holder configured to hold objective lenses, support springs configured to connect the fixed block and the movable block to each other, a focusing magnetic circuit including a first focusing coil, a second focusing coil, a first focusing magnet, and a second focusing magnet, and a tracking magnetic circuit. The first focusing coil is attached to the lens holder such that a first thrust-generating portion and a second thrust-generating portion are spaced from each other in a tangential direction. The second focusing coil is attached to the lens holder such that an axial direction of the second focusing coil coincides with the tangential direction. The first focusing magnet and the second focusing magnet are arranged in the tangential direction with the movable block disposed therebetween.
US08116176B2 Thermally assisted magnetic head-slider and head-gimbal assembly
A thermally assisted magnetic head-slider includes an air-bearing slider, a metal film, and a semiconductor laser unit. The metal film having an aperture in a part through which light from the semiconductor laser unit passes is disposed between a surface opposite to an air-bearing surface of the air-bearing slider and the semiconductor laser unit, and a material to adjust refractive index is provided in the aperture. A bottom surface of the metal film including the material to adjust refractive index is disposed to be in close contact with a surface opposite to the air-bearing surface side of the air-bearing slider, and the semiconductor laser unit is disposed to be in close contact with a top surface of the metal film including the material to adjust refractive index.
US08116175B2 Heat-assisted magnetic recording head including plasmon generator
A plasmon generator has a near-field light generating part located in a medium facing surface. The plasmon generator has an outer surface including a plasmon exciting surface and a plasmon propagating surface that face toward opposite directions. The plasmon exciting surface is substantially in contact with an evanescent light generating surface of a waveguide's core. The plasmon propagating surface is in contact with a dielectric layer that has a refractive index lower than that of the core. The plasmon exciting surface includes a first width changing portion. The plasmon propagating surface includes a second width changing portion. Each of the first and second width changing portions has a width that decreases with decreasing distance to the medium facing surface, the width being in a direction parallel to the medium facing surface and the evanescent light generating surface.
US08116172B2 Near-field light generating device including surface plasmon generating element
A near-field light generating device includes: a base having a top surface; a waveguide that allows laser light to propagate therethrough and is disposed above the top surface of the base; and a surface plasmon generating element that is disposed above the top surface of the base so as to adjoin the waveguide in a direction parallel to the top surface of the base. The waveguide has a side surface that faces the surface plasmon generating element. The surface plasmon generating element includes: a coupling part that is opposed to a part of the side surface of the waveguide with spacing therebetween and causes excitation of a surface plasmon by coupling with evanescent light occurring from the part of the side surface; and a near-field light generating part that generates near-field light based on the surface plasmon excited at the coupling part.
US08116170B2 Timekeeping device and satellite signal reception method for a timekeeping device
A timekeeping device has a reception unit that captures a positioning information satellite and receives satellite signals transmitted from the captured positioning information satellite, a time information generating unit that generates time information based on the satellite signal received by the reception unit, a time display unit that displays time information, and a reception control unit that controls the reception unit. The reception control unit includes a satellite capture control unit that controls the reception unit to run the positioning information satellite capture process, a signal condition detection unit that detects the signal condition of the captured positioning information satellite, a decoding control unit that controls the reception unit to apply a decoding process to the satellite signal transmitted from the captured positioning information satellite, and a reception channel setting unit that sets the reception unit to a single satellite mode or a multi-channel mode based on the signal condition detected by the signal condition detection unit, and the reception unit sets the number of positioning information satellites that can be simultaneously captured and decoded to 1 when set to the single satellite mode, and sets the number of positioning information satellites that can be simultaneously captured and decoded to more than 1 when set to the multi-channel mode.
US08116169B2 Active sonar system and active sonar method using noise reduction techniques and advanced signal processing techniques
An active sonar system and associated method combine signals from a plurality of receive beams in order to reduce a noise in a reference one of the signals from the plurality of receive beams.
US08116168B1 Hybrid one-way and full-way wave equation migration
A migration method using hybrid one-way and full-way (HOF) wave equation propagation. The HOF method extrapolates seismic wavefields in less complex media with a one-way wave equation propagator and extrapolates seismic wavefields in extremely complex media with a full-way wave equation propagator. For prestack depth migration, the HOF extrapolates source-side and receiver-side wavefields independently. Frequency-space domain and time-space domain imaging conditions are applied to the one-way and the full-way extrapolated wavefields, respectively. A suitable amplitude matching factor is introduced to combine the one-way and full-way images. The HOF method is a cost-effective migration that produces superior image quality with less noises and less computational resources.
US08116167B2 Method and system for generating a beam of acoustic energy from a borehole, and applications thereof
A compact array of transducers is employed as a downhole instrument for acoustic investigation of the surrounding rock formation. The array is operable to generate simultaneously a first acoustic beam signal at a first frequency and a second acoustic beam signal at a second frequency different than the first frequency. These two signals can be oriented through an azimuthal rotation of the array and an inclination rotation using control of the relative phases of the signals from the transmitter elements or electromechanical linkage. Due to the non-linearity of the formation, the first and the second acoustic beam signal mix into the rock formation where they combine into a collimated third signal that propagates in the formation along the same direction than the first and second signals and has a frequency equal to the difference of the first and the second acoustic signals. The third signal is received either within the same borehole, after reflection, or another borehole, after transmission, and analyzed to determine information about rock formation. Recording of the third signal generated along several azimuthal and inclination directions also provides 3D images of the formation, information about 3D distribution of rock formation and fluid properties and an indication of the dynamic acoustic non-linearity of the formation.
US08116166B2 3D deghosting of multicomponent or over / under streamer recordings using cross-line wavenumber spectra of hydrophone data
A technique includes obtaining pressure data that was acquired by seismic sensors towed as part of a three-dimensional spread of streamers and obtaining particle motion data, which are indicative of particle motion at locations of the sensors. The technique includes estimating cross-line spectra of the pressure data based at least in part on the pressure data, and the technique includes deghosting the particle motion data based at least in part on the estimated cross-line spectra.
US08116161B2 System and method for refreshing a DRAM device
The present invention provides a system and method for refreshing a DRAM device without interrupting or inhibiting read and write operations of the DRAM device. The system may includes refresh control circuitry that selectively generates requests to perform refresh operations and a refresh address counter that is coupled to the refresh control circuitry and that generates a refresh address in response to receiving a refresh request. The refresh address corresponds to a word line of the DRAM array to be refreshed. Address control and switching circuitry may be coupled to the refresh control circuitry. The address control and switching circuitry selectively transmits read/write addresses and refresh addresses to the DRAM array, in order to perform refresh operations on the DRAM array without inhibiting read and write operations.
US08116160B2 Methods of detecting a shift in the threshold voltage for a nonvolatile memory cell
A nonvolatile memory device is operated by programming sample data in the memory device for verification using verify voltage levels derived from an ideal verify voltage Vv associated with a particular temperature range, performing read verify operations on the sample data using the verify voltage Vv associated with the temperature range; and determining a temperature compensation parameter Nc based on results of the read verify operations.
US08116148B2 Low power shift register and semiconductor memory device including the same
A shift register includes a shift circuit configured to shift an input signal in synchronization with a shift dock to output an output signal of the shift register, and a clock control circuit configured to enable the shift clock in response to the input signal and disable the shift clock in response to the output signal of the shift register.
US08116147B1 Methods and structures for testing SAS-2 speed options in speed negotiation windows
Method and structures provide for testing a SAS link during speed negotiation windows to determine success/failure in using a negotiated speed at one or more configured sets of speed options. For each device linked to a master SAS device, each possible set of speed options is configured; the device participates in a speed negotiation window operation with the current speed options configured. One or more SCSI requests are forwarded from the master device to the attached device. The SCSI requests may be non-destructive of data stored on the attached device. Results of the tests may be used to select a preferred speed for communication between the master device and that attached device. The speed options to be varied and tested may include: link speed; spread spectrum clocking for each SAS speed; type of supported spread spectrum clocking; and logical link rate in support of multiplexing.
US08116139B2 Bit line stability detection
A power supply and monitoring apparatus such as in a nonvolatile memory system. A power supply circuit provides power to a large number of sense modules, each of which is associated with a bit line and a string of non-volatile storage elements. During a sensing operation, such as a read or verify operation, a discharge period is set in which a sense node of each sense module discharges into the associated bit line and string of non-volatile storage elements, when the string of non-volatile storage elements, is conductive. This discharge sinks current from the power supply, causing a perturbation. By sampling the power supply, a steady state condition can be detected from a rate of change. The steady state condition signals that the discharge period can be concluded and data can be latched from the sense node. The discharge period automatically adapts to different memory devices and environmental conditions.
US08116134B2 Semiconductor memory device with improved ECC efficiency
Memory cells store k bits of data (k is a natural number not less than 2) into a single cell. A number n of data storage circuits store externally supplied k bits of data to write data into the memory cells. A control circuit inputs the data on a first page, a second page, . . . , a k-th page to every h (h≦n) of the data storage circuits and then writes the data in the n data storage circuits into the memory cells.
US08116131B2 Programming method for non-volatile memory device
Provided is a method of programming a non-volatile memory device. The method includes applying a first programming pulse to a corresponding wordline of the non-volatile memory device, applying a second programming pulse to the wordline, wherein a voltage of the second programming pulse is different from that of the first programming pulse, and applying voltages to each bitline connected to the wordline, the voltages applied to each of the bitlines are different from each other according to a plurality of bit values to be programmed to corresponding memory cells in response to the first programming pulse or the second programming pulse.
US08116130B1 Integrated circuits with nonvolatile memory elements
Nonvolatile memory element circuitry is provided that is based on metal-oxide-semiconductor transistor structures. A nonvolatile memory element may be based on a metal-oxide-semiconductor transistor structure that has a gate, a drain, a source, and a body. During programming operations, control circuitry floats the body while applying a positive voltage to the drain and a negative voltage to the source. This causes the drain and source, which serve as the collector and emitter in a parasitic bipolar transistor, to break down. The drain-to-source (collector-to-emitter) breakdown causes sufficient current to flow through the source to alter the source electrode and thereby increase the resistance of the source significantly. During sensing operations, control circuitry may apply a voltage across the drain and source while grounding the body to determine whether the memory element has been programmed.
US08116128B2 Semiconductor device
For example, one memory cell is configured using two memory cell transistors and one phase change element by disposing a plurality of diffusion layers in parallel to a bit-line, disposing gates between the diffusion layers so as to cross the bit-line, disposing bit-line contacts and source contacts alternately to the plurality of diffusion layers arranged in a bit-line direction for each diffusion layer, and providing a phase change element on the source contact. Also, the phase change element can be provided on the bit-line contact instead of the source contact. By this means, for example, increase in drivability of the memory cell transistors and reduction in area can be realized.
US08116127B2 Phase change memory devices and systems, and related programming methods
A method of writing data in a phase change memory includes receiving write data to be written to a selected phase change memory cell in the plurality of phase change memory cells, sensing data stored in the selected phase change memory cell, determining whether or not the sensed data is equal to the write data, and if the sensed data is not equal to the write data, iteratively applying a write current to the selected phase change memory cell, wherein a resistance state of the phase change memory cell is changed by heat corresponding to a level of the write current, and the level of the write current is changed between successive iterative applications.
US08116119B1 Desensitizing static random access memory (SRAM) to process variations
A static random access memory (SRAM) can include a plurality of columns forming a memory array, wherein each column comprises a plurality of memory cells coupled to bitlines and wordlines, and a write replica circuit generating a signal when data has been written to the write replica circuit. A wordline of the memory array is turned off responsive to the signal. The write replica circuit can include an additional column comprising at least one dual port dummy memory cell, and write detection circuitry coupled to the dual port dummy memory cell detecting when data has been written to the dual port dummy memory cell and responsively generating the signal. The signal generated by the write detection circuitry indicates a successful write operation to the dual port dummy memory cell.
US08116118B2 Memory cell provided with dual-gate transistors, with independent asymmetric gates
The invention concerns a random access memory cell comprising: at least one first plurality of symmetrical dual-gate transistors (TL1T, TL1F, TD1T, TD1F, TL2T, TL2F) forming a flip-flop, at least a first asymmetric dual-gate access transistor (TA1T, TAW1T) and at least a second asymmetric dual-gate access transistor (TA1F, TAW1F) disposed respectively between a first bit line (BLT, WBLT) and a first storage node (T), and between a second bit line (BLF, WBLF) and a second storage node (F), a first gate of the first access transistor (TA1T, TAW1T) and a first gate of the second access transistor (TA1F, TAW1F) being connected to a first word line (WL, WWL) able to route a biasing signal, a second gate (TA1F, TAW1F) of the first access transistor connected to the second storage node (F) and a second gate of the second access transistor connected to the first storage node (T).
US08116113B2 Cross-point semiconductor memory device and method of manufacturing the same
A cross-point semiconductor memory device includes: a plurality of first wirings extending in a first direction; a plurality of second wirings positioned on a layer different from the first wirings to extend in a second direction different from the first direction; and memory parts provided in overlap areas of the first wirings and the second wirings, wherein the odd-numbered first wirings and the even-numbered first wirings are arranged on different insulating interlayers in an up-down direction.
US08116111B2 Nonvolatile memory devices having electromagnetically shielding source plates
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a semiconductor substrate including a cell array region, memory cell transistors disposed at the cell array region, bitlines disposed on the memory cell transistors, and a source plate disposed between the memory cell transistors and the bitlines to veil the memory cell transistors thereunder.
US08116109B2 Low-cost high-density rectifier matrix memory
A high-density memory device is fabricated three-dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
US08116108B2 Method for operating a converter and corresponding apparatus
A method for operating a line-side fundamental-frequency-clocked converter is disclosed. The converters has a bridge circuit with, for example three, upper and, for example three, lower semiconductor switches, which are connected to respective positive and negative terminals of a DC link circuit. Center taps of connected pairs of the upper and lower semiconductor switches are connected to the line voltage phases. Two upper or two lower semiconductor switches are simultaneously activated during fundamental frequency operation for a predetermined time period before or after a natural trigger instant of the semiconductor switches caused by a line voltage angle. An estimated line voltage angle for clocking the semiconductor switches is tracked based on two phase currents measured while the two upper or two lower semiconductor switches are simultaneously active.
US08116105B2 Systems and methods for uninterruptible power supply control
Systems and methods are provided for distributing power to a load by controlling an uninterruptible power supply that has an inverter and a filter, where the filter has an inductor and a capacitor. The systems and methods apply a pulse width modulation control signal to the inverter, sample inverter inductor current and compare the inductor current to a reference current. A duty cycle of the pulse width modulation control signal is adjusted to drive the inductor current at a second sampling time to a value substantially equal to a reference current at a first sampling time. The systems and methods can filter harmonic distortion from output signals and control uninterruptible power supply output.
US08116100B2 Semiconductor device
Traffic between logic LSIs and memory is increasing year by year and there is demand for increase of capacity of communication between them and reduction of power consumption in the communication. Communication distances between LSIs can be reduced by stacking the LSIs. However, in a simple stack of logic LSIs and memory LSIs, it is difficult to ensure heat dissipation to cope with increasing heat densities and ensure transmission characteristics for fast communication with the outside of the stacked package. Also required is a connection topology that improves the performance of communication among the stacked LSIs while ensuring the versatility of the LSIs. An external-communication LSI, a memory LSI, and a logic LSI are stacked in this order in a semiconductor package and are interconnected by through silicon vias. Output terminals of multiple stacked LSIs are connected to an input terminal of a through silicon via of the stacked memory LSI and input terminals of multiple stacked LSIs are connected to an output terminal of a through silicon via of the stacked memory LSI, thereby directly connecting both of the external-communication LSI and the logic LSI to a wiring line of the memory LSI.
US08116099B2 Circuit board device, electronic device provided with the same, and GND connecting method
Provided is a circuit board device, wherein degrees of freedom are provided for a GND connecting position among plural printed boards, and noise shield and/or heat sink effects are provided. An electronic device provided with the circuit board device and a GND connecting method are also provided. Circuit board device (100) includes a pair of printed boards (110, 120), noise generating component (112) and/or heat generating component (122), and metal plate (140). Printed boards (110, 120) include mounting surfaces and GND connecting terminals (111, 121) arranged on the respective mounting surfaces, and the mounting surfaces are arranged to face each other. Noise generating component (112) and/or heat generating component (122) is mounted on the mounting surface of at least one of a pair of printed boards (110, 120). Metal plate (140) is arranged between the mounting surfaces of the pair of printed boards (110, 120), and is located at a distance from at least one of noise generating component (112) and heat generating component (122) so as to overlap with the noise generating component and/or the heat generating component. Furthermore, metal plate (140) is in contact with each of GND connecting terminals (111, 121) so that GND connecting terminals (111, 121) are electrically connected to each other.
US08116098B2 Base element, base system and method for manufacturing another base system
A base element having a first and a second surface, the first surface being designed to receive a module housing and the second surface being designed to be mounted on a carrier element, and in addition an angle between 0 and 90 degrees being provided between a first face normal of the first surface and a second face normal of the second surface.
US08116096B2 Surface contact card retention assembly and portable electronic device using the same
A retention assembly for securing a surface contact card in a portable electronic device includes a main body and a locking member. The main body defines a receiving groove in the main body. The locking member includes a fixing portion fixed on the main body adjacent to the receiving groove, and a pressing portion connected to the fixing portion. When the pressing portion is pressed by an external force, the pressing portion is moved close to the fixing portion. When the external force is released, the pressing portion is moved away from the fixing portion.
US08116090B2 Low temperature co-fired ceramic (LTCC) transmit/receive (T/R) assembly utilizing ball grid array (BGA) technology
A system is provided for the integration of microwave components in a low temperature co-fired ceramic, the system includes a low temperature co-fired ceramic body having a top surface, into which is disposed a plurality of cavities; a plurality of microwave devices, each device being disposed within a cavity such that the cavities provide radio isolation to the devices; and a coaxial connection disposed within the body configured to connect the devices to external components the coaxial components comprising vias disposed within the co-fired ceramic body.
US08116088B2 Semiconductor package and method of forming the same, and printed circuit board
Provided are a semiconductor package, a method of forming the semiconductor package, and a printed circuit board (PCB). The semiconductor package includes: a PCB including at least two parts divided by an isolation region; a semiconductor chip mounted on the PCB; and a molding layer disposed in the isolation region. The method includes: preparing a PCB, the PCB including a plurality of chip regions and a scribe region; forming isolation regions dividing each of the chip regions into two parts, the isolation regions including inner isolation regions and outer isolation regions, the inner isolation regions being provided in the chip regions, the outer isolation regions being provided at both ends of the inner isolation regions so as to extend toward the scribe region; mounting semiconductor chips on the chip regions; and cutting the PCB along the scribe region to divide the chip regions into at least two parts.
US08116083B2 Lipstick-type USB device with tubular housing
A USB device including a tubular housing and a rear cap assembly including a handle structure that is rotatably connected to the tubular housing to facilitate deploying and retracting a plug connector through a front opening of the housing. The plug connector is fixedly connected onto the front end of a sliding rack assembly that is disposed in housing such that the sliding rack assembly is slidable along a longitudinal axis. The sliding rack assembly includes a carrier including a carrier tray for supporting electronic devices and an elongated positioning rod extending from a rear portion of the carrier tray. The positioning rod is operably engaged with an actuator portion such that manual rotation of the rear cap handle structure relative to the housing around the longitudinal axis causes the sliding rack assembly to slide inside the housing between retracted and deployed positions.
US08116079B2 Storage device testing system cooling
A storage device transporter includes a transporter body having first and second body portions. The first body portion is configured to be engaged by automated machinery for manipulation of the storage device transporter. The second body portion is configured to receive and support a storage device. The first body portion is configured to receive and direct an air flow over one or more surfaces of a storage device supported in the second body portion.
US08116071B2 Utility pit meter AMR device with multiple mounting provisions
An automatic meter reading (AMR) system device is adapted to be mounted in a utility meter pit. The device includes a housing constructed to at least partially enclose at least one portion of an AMR system device. The housing is integrally formed with at least two different mounting members selected from among: a rod mounting member that includes a port sized and shaped to receive a rod to facilitate mounting of the device in the pit, a wall mounting member that includes a wall-mount provision that facilitates mounting of the device to a wall of the pit, a tie mounting member constructed to receive at least one tie fastener that facilitates mounting of the device to a structure in the pit, and a lid mounting portion constructed to facilitate mounting of the device to a lid of the pit.
US08116070B2 Control and switchgear cabinet
The disclosure relates to a control and switchgear for a medium or high-voltage substation. In order to improve a generic control and switchgear by means of a given number of prefabricated wiring elements, the function-related wiring is combined in a uniform control device which is incorporated into a segment of the switchgear door and is provided with the operator panel on the outside and a series of interfaces on the inside.
US08116068B2 Solid electrolytic capacitor
A solid electrolytic capacitor includes an anode 2 made of a valve metal or an alloy thereof, a dielectric layer 3 provided on the surface of the anode 2, a conductive polymer layer 5 provided on the dielectric layer 3, and a cathode layer 6 provided on the conductive polymer layer 5. A fullerene layer 4 made of an insulating fullerene is provided between the dielectric layer 3 and the conductive polymer layer 5.
US08116065B2 Dielectric ceramic material and monolithic ceramic capacitor
A dielectric ceramic material is composed of a perovskite compound represented by ABO3 as a main component. In the case where ABO3 is, for example, BaTiO3, the crystal grains include BaTiO3 crystal grains composed of the main component and, as secondary phases, Mg—Ni—Ti-containing crystalline grains composed of a crystalline oxide containing at least Mg, Ni, and Ti and Ba—Si-containing crystalline grains composed of a crystalline oxide containing at least Ba and Si.
US08116063B2 Semiconductor capacitor structure and layout pattern thereof
The present invention provides a metal-oxide-metal (MOM) capacitor structure composed of a first capacitor and a second capacitor. The MOM capacitor structure has a plurality of symmetrical branch sections, which form an interdigitated structure along a plurality of ring contours. The MOM capacitor structure has an optimal geometrical symmetry, and therefore a better capacitance matching effect can be obtained, and the MOM capacitor structure has a higher unit capacitance. In addition, a capacitance value ratio between the first capacitor and the second capacitor can be adjusted according to different requirements in the MOM capacitor structure. Furthermore, the MOM capacitor structure of the present invention does not need additional masks, and the process cost is cheaper. In addition, due to the semiconductor process improvement, a large amount of metal layers can be stacked, and since the distance between the metal layers becomes smaller, the unit capacitance becomes higher.
US08116061B2 Solid electrolytic capacitor having current breaking function
A solid electrolytic capacitor that can be miniaturized while maintaining the function for breaking current when excessive short-circuit current flows to a capacitor element. The solid electrolytic capacitor includes an anode body, a dielectric layer formed on the anode body, a conductive polymer layer formed on the dielectric layer, and a cathode layer formed on the conductive polymer layer. The conductive polymer layer contains thermally expandable graphite.
US08116060B2 Ionizer
An ionizer includes a fan for blowing air, the fan being provided in an air blowing port which opens in a case, and a plurality of discharge electrodes for generating positive and negative ions by corona discharge, the discharge electrodes being provided in the case at positions facing the air blowing port. The ionizer also includes a plurality of discharge electrode pairs each constituted by two discharge electrodes for generating ions of different polarities. When a tip-center distance denotes a distance from the electrode tip to the center of the air blowing port, the tip-center distances of the two discharge electrodes in the discharge electrode pairs are different from each other.
US08116057B2 Data port transient protection apparatus and methods
Methods and apparatus for protecting data bus ports and their corresponding PHY devices from taking damage associated with excess voltage across one or more signal pairs during an intermittent connection. Such connections cause the signal pins to carry external device current which raises the signal voltage above the power rails, exceeding the PHY device ratings and causing PHY degradation or destruction. In an exemplary embodiment, an RC circuit is used to detect the voltage level across a signal pair. If this voltage level exceeds a certain preset voltage level, power to the outgoing serial bus port is shut off and return power is abated. While the circuit is responding, the exemplary embodiment uses a 3.6V Zener diode to bleed excess voltage to ground. A current monitor/limiter is also used for limiting current if the voltage level detected exceeds a certain threshold.
US08116055B2 Methods and apparatuses for performing common mode pulse compensation in an opto-isolator
In an opto-isolator, a common mode pulse compensation circuit is provided that senses when a common mode pulse event occurs and that adds current to the LED drive current to compensate for a decrease in the LED drive current caused by the occurrence of the event. The common mode pulse compensation circuit is capable of operating effectively over a very wide range of common mode pulse slopes by automatically adjusting the amount of current that is added to the LED drive current based at least in part on the slope of the sensed common mode pulse. In addition, the common mode pulse compensation circuit is capable of being implemented with LEDs that operate at very low drive currents, which allows the power consumption requirements of the opto-isolator to be reduced.
US08116054B2 Universal rating plug for electronic trip unit
A rating plug for an electronic trip unit is disclosed. The rating plug has a housing with a plurality of switches disposed within the housing, each of the switches positionable in one of two positions. The settings of the switches establish a digital signature associated with the rating plug, providing for a universal rating plug that can be used on any circuit breaker that is accepting of the rating plug and that has a sensor value equal to or greater than the rating plug current rating. For instance, a rating plug having a 1000 Amp rating can be used on any circuit breaker sensor for use at or above 1000 A.
US08116053B2 Isolating device for a power semiconductor and method for its operation, power module and system installation
An isolating device for a power semiconductor comprising n power terminals for a power grid comprises n module terminals, n grid terminals, n connecting lines which connect the module terminals and grid terminals and have overcurrent fuses, and a tripping controller. The tripping controller includes a detector for detecting the rupture of an overcurrent fuse and a tripping unit for tripping an overcurrent fuse. A power module contains a power semiconductor and an isolating device. A system installation contains at least two power modules connected in parallel. In a method for operating an isolating device, at least one of the overcurrent fuses is tripped upon a predetermined tripping criterion being met.
US08116050B2 Semiconductor integrated circuit
To provide a semiconductor integrated circuit including: a detection circuit that detects an occurrence of latch up and can be configured while adopting a layout configuration that suppresses the occurrence of latch up; and a recovery unit that enables a recovery from the latch up without cutting off a positive potential. The semiconductor integrated circuit includes: a n-channel MOS transistor 7 that is formed on a P-type region 3 on a semiconductor substrate; and a latch up detection circuit that detects an occurrence of latch up in the n-channel MOS transistor 7. The latch up detection circuit includes: a n-MOS transistor structure 12 in which a source 10 and a back gate 8 are connected in common with a source 5 and the back gate 8 of the n-channel MOS transistor 7; and an electric current detection unit 15 that detects an electric current flowing to a drain 9 of the n-MOS transistor structure 12.
US08116049B2 Transient voltage detection circuit
The invention discloses a transient voltage detection circuit suitable for an electronic system. The electronic system includes a high voltage line and a low voltage line. The transient voltage detection circuit includes at least one detection circuit and a judge module. Each detection circuit includes a P-typed transistor and/or an N-typed transistor, a capacitor and a detection node. The transistor is coupled with the capacitor, and the detection node is located between the transistor and the capacitor. The judge module is coupled to each of the detection nodes. The judge module generates a judgment according to voltage levels of the detection nodes. Accordingly, the transient voltage detection circuit is formed. The electronic system may selectively execute a protective action according to the judgment.
US08116042B2 Magnetoresistance device
A device capable of exhibiting the extraordinary magnetoresistance (EMR) effect includes an elongate channel formed of silicon. A conductor comprising heavily doped silicon is connected to the channel along one side of the channel so as to provide a shunt. A gate arrangement including a gate electrode is provided on the channel. Applying a bias of appropriate polarity and sufficient magnitude to the gate electrode results in the formation of an inversion layer in the channel.
US08116035B2 Magnetic recording medium having a secondary recording layer made of a material having a negative crystal magnetic anisotropy and magnetic recording and reproducing apparatus
The invention provides a magnetic recording medium, and a magnetic recording and reproducing apparatus. The magnetic recording medium includes a substrate 11, an under layer 12 formed on the substrate 11, a magnetic recording layer 13 formed on the under layer 12, and a protective layer 14 formed on the magnetic recording layer 13. The magnetic recording layer 13 is composed of a primary recording layer 14 and a secondary recording layer 15 which are mutually exchange-coupled. The primary recording layer 14 has magnetic grains and a nonmagnetic material that surrounds the magnetic grains, and has a perpendicular magnetic anisotropy. The secondary recording layer 15 is made of a material having a negative crystal magnetic anisotropy and its easy plane of the magnetization is a plane of the medium.
US08116031B2 Perpendicular magnetic recording system with helical write coil and auxiliary coil for fast switching of write pole magnetization
A perpendicular magnetic recording system has a write head having a main helical coil (the write coil) and main pole (the write pole) that directs write flux in a direction perpendicular to the recording layer in the magnetic recording medium, and an auxiliary coil and auxiliary pole that injects magnetic flux into the write pole at an angle to the primary or perpendicular axis of the write pole. The auxiliary coil is preferably a helical coil wrapped around the auxiliary pole. The additional flux from the auxiliary pole, which is injected non-parallel to the primary magnetization of the write pole, exerts a relatively large torque on the magnetization of the write pole, thereby facilitating magnetization reversal of the write pole. Electrical circuitry is connected to the main coil and the auxiliary coil to generate the auxiliary flux simultaneous with the switching of the magnetization of the write pole.
US08116029B2 Contaminant-control material for use in an electronic enclosure
A filter material for use in an electronic enclosure. The filter material includes a mixture of carbon and calcium chloride. In some embodiments, the filter material further includes a polyolefin binder, and optionally other ingredients. In one embodiment, the filter material includes 5 to 15 percent calcium chloride, and in another embodiment, the filter material includes 10 percent calcium chloride.
US08116026B2 Method and system for head position control in embedded disk drive controllers
A track follow controller includes a burst selector selecting at least one burst pair based on burst pair selection data. A linear position calculator calculates a primary head position and a secondary head position based on the at least one burst pair, and calculates a head linear position based on the primary head position and the secondary head position.
US08116023B1 Disk drive comprising preamble aligned zoned servo sectors
A disk drive is disclosed comprising a disk comprising a plurality of servo sectors defining a plurality of servo tracks, and a head actuated radially over the disk for generating a read signal. Each servo sector comprises a preamble comprising a first end and a second end, and each servo sector comprises a servo sync mark after the second end of the preamble. The servo tracks form a plurality of servo zones, wherein a servo data rate of the servo sectors in a first servo zone is different than a servo data rate of the servo sectors in a second servo zone. The first end of the preambles in the servo sectors are aligned along a radius of the disk across at least the first servo zone and the second servo zone.
US08116015B2 Monocular with attachment points
A monocular with attachment points has a tubular frame with a hard point attached to its exterior an optical axis defined by its center axis. A clip may have one end connected to the hard point. There may be two hard points attached to the frame's exterior, and the clip may be operable to detach from and reattach to either of the hard points. The hard points may be arranged in pairs on opposite sides of the frame's exterior. There may be a hand strap operable to detach from and reattach to any of the pairs of hard points. There may be a mounting surface rigidly connected to the frame's exterior. The mounting surface may be parallel to the optical axis and operable to receive a tripod mount and a picatinny rail mounting plate.
US08116014B2 Imaging lens, camera module, and imaging apparatus
Disclosed are an imaging lens having a small size and high imaging performance, a camera module that is provided with the imaging lens and can obtain a high-resolution image signal, and an imaging apparatus. An imaging lens includes a first lens having a positive power, a second lens having a negative power, a third lens that has a positive power and includes a convex image-side surface, and a fourth lens that has a negative power and includes an object-side surface which is concave or flat near an optical axis. The first to fourth lenses are arranged in this order from an object side, and the imaging lens satisfies Conditional expression.
US08116006B2 Image display apparatus and head mount display
The light directed from a light source to a concave mirror and the light directed from a display device to an eyepiece optical system are intersected by each other in a layout. This allows the light source, the concave mirror, and the display device to be arranged in compactness adjacent to the eyepiece optical system without increasing the optical power of an illumination optical system. As the result, the apparatus can easily be minimized in the thickness or the overall size. A hologram optical element is provided where the relationship between the wavelength range Δλ1 at half of the diffraction efficiency of each of the three primary colors of the light in the hologram optical element and the wavelength range Δλ2 at half of the intensity of each of the three primary colors of the light emitted from the light source is defined by Δλ1 <Δλ2. Accordingly, a component at desired wavelengths of each of the R, G, and B colors of the light emitted from the light source can be diffracted by the action of the hologram optical element and then directed to the pupil of the viewer. This allows the image to be increased in the color reproduction area and improved in the quality regardless of the display device actuated in a time-division mode.
US08116004B2 Reflective light shelf, system and method
A reflective light shelf includes a first wall including an outer surface exhibiting a combination of diffuse and spectral reflectivity adapted to reflect light into the associated building structure and an inner surface disposed opposite the outer surface. A second wall includes an inner surface disposed in facing relation to the inner surface of the first wall and an outer surface opposite the inner surface. The second wall is disposed in spaced relation to the first wall such that a shelf height is defined between the outer surfaces of the first and second walls. An inner-core structure is operatively connected between the inner surfaces of the first and second walls. A reflective light shelf system and method are also included.
US08116002B2 Grating device with adjusting layer
A reflection grating device with a continuous non-reflecting dielectric adjusting layer disposed between a grating structure and one or more continuous reflecting layers is disclosed that operates in an order of interest, such as the 1st order or 3rd order of diffraction, with high efficiency and near-exclusion of unwanted orders. Such devices can be employed, for example, in telecommunication and laser applications.
US08115998B2 In-line optical isolator
In an in-line optical isolator, a first polarization separation element 91, a Faraday rotator 6 made of a BIG film, and a second polarization separation element 92 are placed in that order. The isolator further includes a first optical fiber collimator 1a being placed at the forward-beam incident side of the first polarization separation element 91 and including a collimating lens 101 and a first optical fiber 31, and a second optical fiber collimator 2a being placed at the forward-beam exit side of the second polarization separation element 92 and including a collimating lens 102 and a second optical fiber 32 connected to a fiber amplifier. Also, an edge filter 100, which transmits light emitted from the first optical fiber 31 and having a wavelength equal to an oscillation wavelength and which reflects light emitted from the first optical fiber 31 and having wavelengths shorter than this wavelength, is placed between the second optical fiber collimator 2a and the second polarization separation element 92.
US08115997B1 Projection screen
A projection screen includes: a lenticular layer including rear and front surfaces, the front surface being formed with a plurality of convex microstructures; a reflecting layer formed on the front surface of the lenticular layer and having a plurality of convex surfaces in conformity to surfaces of the convex microstructures; and a diffusion layer disposed on the reflecting layer oppositely of the lenticular layer, and including a plurality of black nanoparticles dispersed therein.
US08115991B2 Switchable infrared filter
A switchable infrared filter, consisting of a diamond carrier material (1), whereon a filter material (6), which is made of a thermochromic material, is disposed on one side and which can be connected to a heating device (2, 3).
US08115989B2 Anti-stiction electrode
Anti-stiction systems may include one or more anti-stiction electrodes driven to provide an electrical force that counteracts a stiction force acting upon a moveable portion of an interferometric modulator. The anti-stiction electrode(s) may be disposed on a back glass or on another such substrate. The anti-stiction electrode(s) may be configured to apply an electrical force to substantially all of the interferometric modulators in a display device at once and/or may be configured to apply an electrical force only to a selected area. In some embodiments, the sum of an anti-stiction electrical force and a mechanical restoring force of a moveable part of an interferometric modulator is sufficient to counteract a stiction force.
US08115987B2 Modulating the intensity of light from an interferometric reflector
An optical device for modulating the intensity of light from an interferometric reflector. In one embodiment, the optical device can include an optical stack having a reflective layer and a partially reflective, partially transmissive layer for reflecting light. The optical device can also include a fluid cell comprising an absorptive fluid and a transmissive fluid. The optical device can also include a mechanism for controlling the portion of the reflector which is shadowed by the absorptive fluid.
US08115986B2 Mirror device comprising drive electrode equipped with stopper function
The present invention provides a mirror device, comprising: a plurality of deflectable mirrors; an elastic member for supporting the mirror and to deflect the mirror to a range of deflecting angles; a drive electrode for driving the mirror; a control circuit for giving electric charge to the drive electrode and controlling the deflecting direction of the mirror; and a substrate on which the drive electrode and the elastic member, wherein the drive electrode is placed within an area on the substrate the mirror is projected on, has an outer form constituted by sides approximately in parallel to the outer peripheral lines of the present mirror and by sides approximately parallel to the deflection axis of the present mirror, or a form obtained by dividing the aforementioned outer form into a plurality thereof, and also fills the role of a stopper for regulating the deflection angle of the mirror.
US08115979B2 Ink minimizing profile making tool
An International Color Consortium (ICC) profile making tool includes a regression module to establish a dependency between a profile connection space (PCS) and a device color space and an optimization module to generate a first output profile based on an ink minimization mode and a second output profile based on a high accuracy mode.
US08115974B2 Device to transfer photo images into digital data
A kind of device to transfer photo images into digital data includes a body wherein photo taking mechanisms are set inside and insert-fit grooves and positioning mechanisms are set with internal lighting assembling plates at the other side. The integrated photo clamps for clamping photos are put in the interior of the body through insert-fit grooves. By usage of simple operations, the images on the taken photos by photo taking mechanisms can be transferred into digital data for convenient storage, modification, or copying then printing the new photos. Thus, the present invention is rich of convenience and advancement.
US08115973B2 Imaging apparatus for fully automatic screen printer
An imaging apparatus for fully automatic screen printer including two stacked light sources, two stacked beamsplitters, two stacked optical reflectors, two stacked imaging lens and two stacked image sensors, wherein the two stacked optical reflectors and the two stacked light sources are correspondingly disposed on two different sides of the two beamsplitters, the two stacked imaging lens are disposed on another side of the beamsplitters different from that of the optical reflectors and the light sources, the two stacked image sensors are disposed behind the imaging lens; the optical reflectors are provided with an upward reflection plane and a downward reflection plane, the optical axes of the imaging lenses are orthogonal to that of the light sources. The imaging apparatus is of two independent optical paths which capture the image of the printed circuit board and that of the screen respectively. Furthermore, the imaging apparatus is of compact structure, high acquiring speed and optical paths easy to be adjusted.
US08115972B2 Color scanning
Among various embodiments of the present disclosure, image scanning can be performed by scanning an object in a forward direction and capturing a first image of the object, scanning the object in a reverse direction and capturing a second image of the object, and combining the first image and the second image to produce a single image.
US08115969B2 Systems and methods of accessing random access cache for rescanning
An efficient method and system to enhance digital acquisition devices for analog data is presented. The enhancements offered by the method and system are available to the user in local as well as in remote deployments yielding efficiency gains for a large variety of business processes. The quality enhancements of the acquired digital data are achieved efficiently by employing virtual reacquisition. The method of virtual reacquisition renders unnecessary the physical reacquisition of the analog data in case the digital data obtained by the acquisition device are of insufficient quality. The method and system allows multiple users to access the same acquisition device for analog data. In some embodiments, one or more users can virtually reacquire data provided by multiple analog or digital sources. The acquired raw data can be processed by each user according to his personal preferences and/or requirements. The preferred processing settings and attributes are determined interactively in real time as well as non real time, automatically and a combination thereof.
US08115966B2 Method of embedding a plurality of different two-dimensional codes in an image
The purpose of the present invention is to prevent a two-dimensional code to be additionally embedded from corrupting a two-dimensional code which has been embedded when a document in which the two-dimensional code has been embedded is copied or when a document in which the two-dimensional code has been embedded is overlaid on form data in which the two-dimensional code has been embedded. In the present invention, when it is detected that a second two-dimensional code is embedded in an input image, the input image is printed without overlay of a first two-dimensional code thereon. Furthermore, when form data for overlaying is stored, when it is detected that a third two-dimensional code is embedded in the form data or when it is detected that a second two-dimensional code is embedded in an input image, the input image is output without overlay of a first two-dimensional code thereon.
US08115963B2 Image processing apparatus, image processing method, and computer program product
An image processing apparatus includes a receiving unit that receives a display request for displaying a preview image of gradation-processed image data, and a preview magnification indicative of a display magnification of the preview image. An image processing unit performs a first magnification-altering process on the gradation-processed image data performs the gradation process based on the image quality mode if the preview magnification is lower than a present magnification and the gradation process based on the image quality mode is such that the gradation-processed image data does not express halftone, as well as if the preview magnification is higher than the present magnification thereby obtaining processed image data. A display unit creates and displays the preview image based on the processed image data.
US08115959B2 Image processing device
An image scanning device to which an external storage is detachably connected. The image scanning device is provided with an image scanning unit configured to scan an image formed on an original document and generate data representing the scanned image, a data storing unit configured to store the data generated by the image scanning unit in the external storage connected to the image scanning device, a capacity presuming unit configured to presume a necessary capacity which should be available in the external storage for storing the data generated by the image scanning unit prior to storing the data, a comparing unit configured to detect a remaining capacity of the external storage and compare the remaining storage with the necessary capacity presumed by the capacity presuming unit, and a warning unit configured to issue warning if the remaining capacity is less than the necessary capacity.
US08115955B2 Communication device
A communication device has a reading unit, a wireless tag reading unit, and a transmitting unit. The reading unit reads image data from an original document. The original document has a first wireless tag including wireless tag data. The wireless tag data has data size. The wireless tag reading unit reads the wireless tag data from the wireless tag. The transmitting unit associates the image data with the wireless tag data to transmit the associated image data and wireless tag data to another device.
US08115951B2 Approach for implementing locked printing with unlock via a user input device
An approach is provided for implementing locked printing on a printing device with unlock via a keypad attached to the printing device via an interface. A user may specify for printing print jobs stored at a printing device using a keypad device to enter a job ID associated with a particular print job or a general ID associated with users to release all print jobs associated with a particular user, all print jobs not yet printed, or all print jobs. Print jobs may alternatively be identified by date. The approach may also include a user viewing a list of available locked print jobs on a user interface of the printing device, along with the associated job IDs. The approach may further include the use of a Web server on the printing device to generate and provide a Web page that lists stored print jobs and their associated job IDs.
US08115948B2 Interactive paper system
A printer, scanner device and methods for using same are described herein. A printer device may include a dedicated input that, when actuated, generates and sends a request to a computer for known data or a predetermined print job, e.g., schedule information from a personal information management (PIM) application. A scanner device may include another dedicated input that, when actuated, automatically scans a document fed to the device by the user and sends the scanned image to IM (or other) software on a computer, bypassing the need to manipulate the scanned image using scanner software. The device may be used with printed metapaper, which includes a barcode or other indicia identifying the metapaper and corresponds to a stored template image of the metapaper. When the metapaper is rescanned, the scan can be compared to the stored template information to identify changes and synchronize the changes with the IM software.
US08115944B2 Methods and systems for local configuration-based imaging device accounting
Aspects of the present invention relate to systems, methods and devices for receiving job configuration data, deriving detailed job parameters and calculating job costs in relation to an imaging device job. Some aspects relate to the receiving display content for use as a prompt to obtain job configuration data. Some aspects relate to display of display content for prompting a user to input the job configuration data.
US08115935B2 Method of motion correction in optical coherence tomography imaging
An image data set acquired by an optical coherence tomography (OCT) system is corrected for effects due to motion of the sample. A first set of A-scans is acquired within a time short enough to avoid any significant motion of the sample. A second more extensive set of A-scans is acquired over an overlapping region on the sample. Significant sample motion may occur during acquisition of the second set. A-scans from the first set are matched with A-scans from the second set, based on similarity between the longitudinal optical scattering profiles they contain. Such matched pairs of A-scans are likely to correspond to the same region in the sample. Comparison of the OCT scanner coordinates that produced each A-scan in a matching pair, in conjunction with any shift in the longitudinal scattering profiles between the pair of A-scans, reveals the displacement of the sample between acquisition of the first and second A-scans in the pair. Estimates of the sample displacement are used to correct the transverse and longitudinal coordinates of the A-scans in the second set, to form a motion-corrected OCT data set.
US08115931B2 Photoacoustic detector for measuring fine dust
A photoacoustic detector for measuring a concentration of fine dust particles in gas. The detector includes at least one acoustic sensor for detecting an acoustic signal. Additionally, the detector includes a pulsed light source for providing excitation light having a configurable pulse length and a configurable pulse repetition rate, wherein by changing the pulse length and/or the pulse repetition rate, a size distribution of the fine dust particles can be determined.
US08115928B2 Box inspector
A box inspector for detecting at an inspection station an unacceptable skew in, an item missing from, and/or an unacceptable gap in a box. The box inspector has pairs of aligned emitters and receivers generating a signal when an unacceptable skew is detected, at least two item present sensors corresponding to the number of items adapted to be located in a single row within the box and generating an item absent signal when an item is missing from the box, a gap detect sensor generating an unacceptable gap signal when the gap is larger than a predetermined gap size, and a box present sensor generating a box present signal when a box arrives at the inspection station. A controller receives signals from these components and generates indications when the box is unacceptably skewed, an item is missing from the box, and/or an unacceptable gap exists in the box.
US08115924B2 Optical characteristic measuring apparatus
An optical characteristic measuring apparatus of the invention includes a sequentially-readable charge storage sensor array having a plurality of light receiving elements. Irradiation of first illumination light and second illumination light is controlled in such a manner that a period for irradiating the second illumination light onto a sample containing a fluorescent material is included in an integration period of each of the light receiving elements for receiving a wavelength component of fluoresced light from the sample in measuring an optical characteristic of the sample. The optical characteristic measuring apparatus having the above arrangement enables to accurately measure the optical characteristics of samples containing a fluorescent material in a short time by scanning the samples.
US08115920B2 Method of making microarrays
Provided is a method of making microarrays that includes providing a substrate with discrete first microfeatures that have a first profile, and depositing vapor-coated materials onto the first microfeatures to form second microfeatures having a second profile that is substantially different from the first profile. Also provided is a method of adding a replication material to the vapor-coated microfeatures to form a mold. Microarrays made by this method can be used as substrates for surface-enhanced Raman spectroscopy (SERS).
US08115918B2 Imaging of surgical biopsies
Encapsulated tissue is contained in an optically transparent cassette (34). The cassette (34) or an endcap (38) enclosing the cassette is marked with a fiducial (40) indicating and corresponding to the location of the excision on the patient's body. An image, which is preferably a representation of a surface of the tissue specimen and the vertical section(s) area of the tissue internal of the specimen and adjacent to a surface thereof, is obtained by an imaging system (10). The cassette is moved, preferably in a stage (22) which rotates the cassette while translating it, so that the head (12) of the imaging system provides a linear scan in a direction perpendicular to the wall of the cassette (also perpendicular to the surface of the tissue encapsulated in the cassette). The imaging system's display (28) indicates the morphology at and in proximity to the surface of the specimen as well as the location thereof.
US08115916B2 Surface inspecting method and surface inspecting apparatus
Provided is a surface inspecting method for inspecting a surface of a semiconductor substrate having linear line patterns repeatedly arranged and hole-shaped hole patterns formed on the line patterns. The surface inspecting method includes setting inspecting conditions; irradiating the surface of the semiconductor substrate with illumination light under the set inspecting conditions; detecting diffracted light from the semiconductor substrate irradiated with illumination light; and judging existence/nonexistence of a defect in the hole patterns, based on the detected diffracted light. The inspecting conditions are to be set so that the irradiating direction of the illumination light on the surface of the semiconductor substrate is different from the repeated arrangement direction of the line patterns and substantially matches the repeated arrangement direction of the hole patterns.
US08115915B2 Defect inspection method and apparatus
A method and apparatus for inspecting a defect of a surface of a sample in which a laser beam is irradiated on a sample surface so that at least a part of an illumination field of the laser beam illuminates a first area of the sample surface, a plurality of scattered light rays from the first area caused by the irradiation in the irradiating is detected, errors of inclination of an illumination apparatus and a sensor for the plurality of scattered light rays detected are corrected, the plurality of scattered light rays corrected is at least one of added and averaged, a defect on the sample surface based on the plurality of scattered light rays in accordance with the correcting of errors of inclination of the illumination apparatus and the sensor is determined.
US08115914B2 Multi-optical axis photoelectronic sensor
This invention enables a worker, who performs a work for optical axis adjustment, to easily grasp whether adjustment for further increasing the light receiving quantity is possible. In a multi-optical axis photoelectronic sensor, a minimum value of the light receiving quantities obtained for every optical axis is detected every time a process of measuring, while lighting each light emitting element 10 by turns, the light receiving quantity of a light receiving element corresponding to a lighted light emitting element 10 is repeated for one cycle, and a peak value of the minimum light receiving quantities detected in the past is detected. A bar graph based on specific values of the most recent minimum light receiving quantity and the peak value, or a bar graph showing a proportion of the most recent minimum light receiving quantity with respect to the peak value is displayed using a plurality of indication lights 100, each arranged on the front surfaces of a light projector 1 and a light receiver 2. The bar graph changes according to the update of the peak value and the fluctuation in the value of the minimum light receiving quantity of every hour.
US08115911B2 Image pickup apparatus
In one example embodiment, an authentication apparatus determines whether to emit an imaging light to a target of authentication based on a detected position of the target of authentication. In one example embodiment, when the imaging light is emitted, the imaging light permeates a display plane. In one example embodiment, the authentication apparatus authenticates based on data obtained from the emitted imaging light.
US08115902B2 Exposure apparatus, device manufacturing method, maintenance method, and exposure method
An exposure apparatus can prevent disadvantages of supplying liquid of reduced cleanliness and formation of watermarks. The exposure apparatus exposes a substrate by irradiating exposure light onto the substrate via a projection optical system and a liquid, and includes a liquid supply mechanism for supplying the liquid, and a measuring device which measures a time during which the supply of the liquid from the liquid supply mechanism is stopped.
US08115898B2 Liquid crystal display
A liquid crystal display (LCD) which can be driven at a low voltage and has a fast response time. The LCD includes a liquid crystal composition interposed between a first substrate and a second substrate, wherein the liquid crystal composition includes a first polar liquid crystal compound and a second polar liquid crystal compound, each in an amount of 20% or less by weight based on a weight of the liquid crystal composition, wherein the first polar liquid crystal compound is represented by and the second polar liquid crystal compound is represented by at least one of where each of R1, R2, and R3, and R4 independently is an alkyl group, an alkoxy group, or an alkenyl group having about 2 to about 15 carbon atoms.
US08115894B2 Transflective liquid crystal display device and method for manufacturing the same
A transflective type LCD device and a method for manufacturing the same is disclosed, in which an aperture ratio of a reflective part is improved, and manufacturing process is simplified by decreasing the number of masks for forming contact holes. The transflective type LCD device includes a plurality of gate and data lines crossing each other, defining a plurality of pixel regions; a thin film transistor at a crossing point of the gate and data lines; a lower storage electrode formed by one portion of a preceding gate line, and an upper storage electrode above the lower storage electrode having a gate insulating layer in between; a transmitting electrode in contact the upper storage electrode; and a reflective electrode in contact with the transmitting electrode in the reflective part of the pixel region wherein the transmitting electrode is in between the reflective electrode and the substrate.
US08115893B2 Liquid crystal display device with reflection and transmission regions
A liquid crystal display device includes a first substrate, a second substrate and a liquid crystal layer between the first and second substrates. The liquid crystal display device further includes a gate line on the first substrate, a first insulation film on the gate line, a data line crossing the gate line such that the data line and the gate line define a pixel region with a transmission area and a reflection area, a thin film transistor connected to the gate line and the data line, a storage capacitor including a storage line crossing the data line and an upper storage electrode connected to the thin film transistor, a second insulation film on the thin film transistor with a transmission hole defined through the second insulation film, a reflection electrode disposed on the second insulation film in the reflection area and connected to a portion of the upper storage electrode through the transmission hole, and a pixel electrode disposed in the pixel region and connected to the reflection electrode.
US08115887B2 Liquid crystal panel assembly and liquid crystal display apparatus having the same
A liquid crystal panel assembly includes a liquid crystal panel, a backlight module having at least one light emitting diode (LED) light source to irradiate light to the liquid crystal panel, and a housing which surrounds the liquid crystal panel and the backlight module. At least a portion of the housing adjacent to the at least one LED light source is formed of a thermal-conductive material.
US08115886B2 Flexible display apparatus
A flexible display apparatus includes a flexible display panel and a flexible printed circuit board (FPCB). The flexible display panel includes a display body and a peripheral circuit. The peripheral circuit is adjacent to the display body, and the FPCB is connected to the peripheral circuit. The FPCB includes a first portion and a second portion, wherein the first portion is connected between the peripheral circuit and the second portion. Bending modulus of the first portion is lower than that of the second portion. The flexible display apparatus has better reliability. Another flexible display apparatus is also provided.
US08115884B2 Liquid crystal display device and method for fabricating the same
A liquid crystal display (LCD) device partially or substantially blocks light from a light source from exciting a semiconductor layer. The LCD device includes a substrate, a semiconductor layer, a light-shielding layer, and a light source. The light source directs light toward a lower surface of the substrate. The light-shielding layer is formed between the substrate and the semiconductor layer. Some or all of the light directed towards the semiconductor layer by the light source is blocked by the light-shielding layer.
US08115883B2 Display device and method for manufacturing the same
An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.
US08115882B2 Liquid crystal display device and manufacturing method thereof
A liquid crystal display includes an interlayer resin film covering a surface of the display area including thin film transistors, first electrodes formed of transparent conductive material on the surface of the interlayer resin film in regions defined by scan and signal lines and electrically connected to the thin film transistors. A second insulating film formed on the surface of the interlayer resin film includes the first electrodes and second electrodes formed of transparent conductive material on the second insulating film, the second electrodes having slits defined at the scan lines and signal lines. A circuit including thin film transistors with exposed channel regions is on the display area's periphery. The interlayer resin film directly covers the thin film transistors' channel regions in the display area and the peripheral area; and the surface of the display area's and peripheral circuit's interlayer resin films are covered with the second insulating film.
US08115880B2 Liquid crystal display panel and display apparatus
A liquid crystal display (LCD) panel includes a first substrate, a second substrate, a common electrode driving circuit and a reverse gain circuit. A storage capacitor electrode is disposed on the first substrate. A common electrode is disposed on the second substrate which is disposed oppositely to the first substrate. The common electrode driving circuit is electrically connected with the common electrode and outputs a common voltage level signal to the common electrode. The reverse gain circuit is electrically connected to the storage capacitor electrode through a connecting terminal and outputs a reverse gain voltage signal to the common electrode according to a voltage signal of the storage capacitor electrode.
US08115876B2 Apparatus and method for receiving digital broadcasting
Disclosed is an apparatus and a method for receiving digital broadcasting. The method includes receiving and outputting digital broadcasting data through a selected channel based on a user request, storing channel information about the selected channel, re-selecting a channel using the stored channel information if synchronization of the received digital broadcasting data is not achieved and receiving digital broadcasting data through the re-selected channel. Accordingly, it is possible to reduce unnecessary power consumption of the apparatus for receiving digital broadcasting and prevent the apparatus for receiving digital broadcasting from being down or inoperative in a weak electric field and other specific environments.
US08115873B2 Object-based audio-visual terminal and bitstream structure
As information to be processed at an object-based video or audio-visual (AV) terminal, an object-oriented bitstream includes objects, composition information, and scene demarcation information. Such bitstream structure allows on-line editing, e.g. cut and paste, insertion/deletion, grouping, and special effects. In the interest of ease of editing, AV objects and their composition information are transmitted or accessed on separate logical channels (LCs). Objects which have a lifetime in the decoder beyond their initial presentation time are cached for reuse until a selected expiration time. The system includes a de-multiplexer, a controller which controls the operation of the AV terminal, input buffers, AV objects decoders, buffers for decoded data, a composer, a display, and an object cache.
US08115871B2 Video top-of-frame signal generator for multiple video formats
A signal generator for use in producing a video top-of-frame signal based upon an input video signal with an input video frame including one or more input video fields and having an input video frame rate for an output video signal with an output video frame having a plurality of output video frame lines, each with a plurality of output video pixels, and an output video frame rate.
US08115870B2 Content reproducing system and content reproducing method
A content reproducing system having a first device and a second device connected to each other through a transmission path for transmitting content data is provided. The first device includes an outputting unit and an output controlling unit configured to output the content data output from the outputting unit a transmission rate. The second device includes an inputting unit, a storage unit configured to store the content data input by the inputting unit, a transmission rate controlling unit configured to control the transmission rate in accordance with the amount of content data stored in the storage unit, a reproduction clock generating units configured to generate a reproduction clock for reproducing the content data, and a reproducing units configured to read out the content data from the storage unit on the basis of the reproduction clock generated by the reproduction clock generating unit and reproduce the content data.
US08115857B2 Digital camera and image processing computer program product
A digital camera includes: a photometering unit that measures brightness of a photographic field by dividing the field into a plurality of areas; a reference value calculation unit that calculates, a first value to be used to determine exposure conditions for a photographing operation based upon photometering results provided by the photometering unit and also calculates a second value to be used to set gradation conversion characteristics in conformance to which gradation correction is to be executed on a photographic image photographed based upon the results; an exposure condition determining unit that determines the conditions for the operation based upon the first value; a gradation conversion characteristics setting unit that sets the characteristics based upon the second reference value; and an image processing unit that executes image processing including gradation conversion executed by using the gradation conversion characteristics on the photographic image obtained under the conditions via an imaging unit.
US08115855B2 Method, an apparatus and a computer readable storage medium for controlling an assist light during image capturing process
Digital photographing devices traditionally comprise an assist light that illuminates the object being photographed in low light conditions The solution concerns a method comprising exposing an image frame comprising a window of interest; performing an autofocus for the window of interest; and controlling an assist light for the autofocus according to an exposure of the window of interest. The solutions is also targeted to an apparatus and a computer-readable storage means.
US08115854B2 Imager method and apparatus employing photonic crystals
An image sensor and a method of forming an image sensor. The image sensor includes an array of pixel cells at a surface of a substrate. Each pixel cell has a photo-conversion device. At least one a micro-electro-mechanical system (MEMS) element including a photonic crystal structure is provided over at least one of the pixel cells. The MEMS-based photonic crystal element is supported by a support structure and configured to selectively permit electromagnetic wavelengths to reach the photo-conversion device upon application of a voltage. As such, the MEMS-based photonic crystal element of the invention can replace or compliment conventional filters, e.g., color filter arrays.
US08115853B2 Digital camera having input devices and a display capable of displaying a plurality of set information items
An LCD (21) for displaying a plurality of set information items is provided for a digital camera (10). When a plurality of input keys disposed around the LCD (21) are depressed, set information which is displayed adjacent to the input key can be changed. A control portion of the digital camera (10) performs a variety of control operations of the digital camera (10) in accordance with set information. Therefore, the position of the input portion which is used when the setting of the digital camera (10) can easily be understood. Thus, the setting can be changed by performing only a simple operation.
US08115848B2 Driving method of solid-state imaging apparatus and solid-state imaging apparatus
A solid-state imaging apparatus comprises a pixel portion including a plurality of pixels, wherein each pixel including a photoelectric conversion portion, an accumulation portion for accumulating the charge, a first transfer portion connecting the photoelectric conversion portion to the accumulation portion, a second transfer portion connecting the accumulation portion to a floating diffusion portion, and a third transfer portion connecting the photoelectric conversion portion to a power source, and wherein, from a state where no potential barrier is formed in the second transfer portion, a potential barrier is formed in the second transfer portion under a condition that a potential barrier is formed in the first transfer portion and no potential barrier is formed in the third transfer portion, and then a potential barrier is formed in the third transfer portion, thereby the operation of accumulating charges in the pixels is started.
US08115841B2 Method, apparatus and system providing an image sensor having pixels with multiple exposures, diodes and gain readouts
A method, apparatus and system are described providing a high dynamic range pixel. Operating conditions, including integration time and sensitivity of different photosensors, and signal processing, including gain settings, are selected to provide multiple possible response curves. An output is selected from the possible response curves and used to provide an overall pixel response curve to increase the pixel dynamic range.
US08115833B2 Image-acquisition apparatus
The object is to provide a uniform impression of noise for an entire image signal by performing grayscale conversion and noise reduction in a balanced manner. The signal processing unit performs first signal conversion on an image signal from an image-acquisition device and transfers the processed image signal to a correction-coefficient calculation unit. The correction-coefficient calculation unit calculates, on the basis of the image signal from the signal processing unit, an area correction coefficient for each area used for grayscale conversion of each area. A noise reducing unit uses the area correction coefficients calculated by the correction-coefficient calculation unit to perform noise reduction on the image signal from the image-acquisition device and transfers the processed signal to the signal processing unit. The signal processing unit performs grayscale conversion on the areas of the noise-reduced image signal and transfers the signal to the compressing unit using the area correction coefficients.
US08115829B2 Apparatus and method for controlling auto exposure
An apparatus and method for controlling auto exposure (AE) that is used in digital imaging devices. The apparatus controlling the luminance of an image being outputted from an image sensor by controlling exposure time and analog gain of the image sensor includes: a luminance operation unit operating and outputting a mean luminance of the image outputted from the image sensor; a shutter index determination unit comparing a predetermined target luminance with the mean luminance of the outputted image and determining a shutter index in different manners according to the magnitude of the difference between the target luminance and the mean luminance of the outputted image; and an exposure time/analog gain determination unit generating exposure time and analog gain corresponding to the shutter index determined in the shutter index determination unit and applying the generated exposure time and analog gain to the image sensor.
US08115828B2 Image processing apparatus, flicker reduction method, imaging apparatus, and flicker reduction program
An image processing apparatus includes: an integrating unit integrating an input image signal over a time interval equal to one horizontal period or longer; a normalizing unit normalizing an integrated value obtained by the integrating unit, or a difference value in the integrated value between adjacent fields or frames; an extracting unit extracting a spectrum of the normalized integrated value or difference value; an estimating unit estimating a flicker component on a field-by-field basis or frame-by-frame basis from the extracted spectrum; a detecting unit detecting a deviation of the latest flicker component, from the estimated latest flicker component and one or more flicker components estimated in the past; a correcting unit correcting the latest flicker component on the basis of the detected deviation of the flicker component; and a computing unit computing a corrected flicker component and the input image signal so as to cancel out the corrected flicker component.
US08115827B2 Color processing apparatus and color processing method
A color processing apparatus for evaluating the gradation characteristic of a color conversion table that is used to convert signal values in input color space into signal values in output color space and has a plurality of grid points includes an acquisition unit configured to acquire signal values in the output color space corresponding to four adjacent grid points in the input color space through the color conversion table, a calculation unit configured to calculate a property of a tetrahedron formed by the signal values in the output color space, and an evaluation unit configured to evaluate a gradation characteristic of the color conversion table based on the property of the tetrahedron. The property of the tetrahedron may be the volume of the tetrahedron or the surface area of the tetrahedron.
US08115824B2 Active pixel sensor apparatus for use in a star tracker device
The invention relates to an active-pixel-sensor (APS) apparatus for use in a star tracker device including an imager chip, said imager chip comprising an array of photo-diodes operating as optical pixels, and a logic circuit. The logic circuit is configured for reading out a pixel signal depending on an amount of light irradiated during a predetermined integration time and resetting the optical pixel upon termination of the predetermined integration time processing the pixel signals and to output the modified signals and for performing a non-destructive readout of the pixel signal during the integration time. In order to distinguish Single-Event-Upset (SEU) contributions to the signal from star signal contributions, it is proposed to further configure the logic circuit to detect whether or not a discontinuity has occurred in the pixel signal during the integration time, and to modify the signal depending on the result of this detection.
US08115822B2 Image capturing apparatus, for determining a subject scene included in a captured image, method for controlling the same, and program therefor
An image capturing apparatus includes an image capturing unit configured to capture an image of a subject and generate a captured image of the subject, a feature value extracting unit configured to extract a feature value of the captured image, a scene candidate determining unit configured to determine a scene candidate of a subject scene included in the captured image on the basis of the extracted feature value, and a scene determining unit configured to determine that the scene candidate is the subject scene included in the captured image when the scene candidate determining unit continuously determines scene candidates of an identical kind for a scene determining period taken for determining the subject scene included in the captured image.
US08115813B2 Optical system for capturing images
An optical system includes a first set of cameras and a second set of cameras, and an optical assembly. The first set of cameras receive first light originating from each of a set of first portions of a printed circuit board. The first light transmits along a first optical path defined between each of the set of first portions and each of the first set of cameras. The second set of cameras receive second light originating from each of a set of second portions of the printed circuit board. The second light travels along a second optical path defined between each of the set of second portions and each of the second set of cameras. The optical assembly is capable of directing the first light and the second light toward the first set of cameras and the second between the printed circuit board respectively.
US08115804B2 Processing multiview video
Decoding a multiview video signal comprises: receiving a bitstream comprising encodings of multiple views of the multiview video signal, each view comprising multiple pictures segmented into multiple segments; and obtaining a predictor for illumination compensation of a first segment with respect to a reference picture using an offset value for illumination compensation of at least one neighboring segment adjacent to the first segment according whether the reference picture associated with the first segment is the same as a reference picture associated with the neighboring segment.
US08115801B2 Method of automatic photographs stitching
A method of automatic photographs stitching in a photograph capturing electronic apparatus by capturing a photograph; on a viewfinder or display screen of said photograph capturing electronic apparatus, displaying at least one four-way guiding arrow for advising user the direction to move the photograph capturing electronic apparatus for capturing the next photograph which is suitable for stitching, the next suitable photograph having at a predetermined region, an area overlapped and aligned to the captured photograph with the overlapped and aligned area reaching a predetermined proportion; capturing the next suitable photograph; and stitching the consecutively captured photographs into a panoramic photograph.
US08115799B2 Method and apparatus for obtaining acoustic source location information and a multimedia communication system
A method and an apparatus for obtaining the acoustic source location information and a multimedia communication system are provided. In the method, the acoustic source location information corresponding to the original location of lens and the lens controlling information are obtained, and the current acoustic source location information is obtained according to the acoustic location information corresponding to the original location of lens and the controlling information of lens.
US08115798B2 Mobile communication device with enhanced image communication capability
A mobile communication device includes a first body, a folder portion rotatably coupled with the first body and positionable between open and closed positions, a first display unit coupled to the folder portion and configured to display first information, and a second display unit coupled to a first side of the first body and configured to receive input and display second information, wherein at least one of text information and graphic information received through the second display unit is displayed on the first display unit.
US08115797B2 Network-enabled peer-to-peer video calling systems, methods, and storage medium
Systems, methods, and a storage medium for peer-to-peer video calling between first and second devices is provided. The method includes determining a predetermined data communication rate by querying a communication network operably associated with the first and second devices. The method further includes transmitting video calling data from the first device through the communication network to the second device at substantially the predetermined data communication rate.
US08115792B2 Laser marking method, laser marking apparatus and optical element
In a method for producing a permanent mark in an optical element which consists essentially of a material that is transparent in the visible spectral region, a marking region of the optical element is irradiated with laser radiation in order to generate local, near-surface material changes in such a way that a mark of prescribed shape and size is generated. The laser radiation has an operating wavelength λ from the wavelength region between 1.1 μm and 9.2 μm. A thulium-doped fiber laser is preferably used as laser radiation source. The operating wavelength is selected in dependence from the material of the optical element such that the material exhibits a partial absorption with a transmittance between 60% and 98%. The method can be used, in particular, to provide spectacle lenses, contact lenses or intraocular lenses with marks.
US08115791B2 Tape printing apparatus
A printing apparatus that receives a supply of an image receiving medium and includes a platen arranged to feed the image receiving medium selectively in one of a forward and reverse direction. A print head arranged to print an image on the image receiving medium while the medium is fed in the forward direction and an arcuate guide portion partially encasing the platen and movable relative to the surface of the platen. The guide portion having an inoperative position in which it is spaced from the print head to permit a supply of image receiving medium to be received and an operative position wherein the guide portion is moved to be proximate to the print head whereby the guide portion in the operative position restricts movement of the image receiving medium in a direction perpendicular to the forward and reverse direction.
US08115790B2 Medium detecting apparatus and image forming apparatus
A medium detecting apparatus and an image forming apparatus are supplied capable of making medium move without hitting sensor lever while skew adjustment or medium setting operation. In the image forming apparatus, a medium hit surface of the sensor lever to detect skew holds inclinations in plural directions and a guider to limit the medium is furnished on the inclined side; or a medium hit surface of the sensor lever to detect skew holds inclinations in plural directions and position detections in movement direction of carriage and in conveyance direction of medium are performed by one sensor; or a sheet guider is further furnished and the sensor lever whose medium hit surface holds inclinations in plural directions is used as a sensor to detect a paper setting; or a hand-operated adjustment print function is further furnished and the sensor lever whose medium hit surface holds inclinations in plural directions is used as a sensor to detect a paper setting.
US08115788B2 Display device, driving method of display device, and electronic appliance
An object is to reduce a pseudo contour occurring in time gray scale method display. One pixel is divided into m subpixels (m is an integer of m≧2), and the area of the (s+1)th subpixel (1≦s≦m−1) is twice the area of the s-th subpixel. Further, one frame is divided into n subframes (n is an integer of n≧2), and a lighting period of the (p+1)th subframe (1≦p≦n−1) is 2m times longer than a lighting period of a p-th subframe. Then, at least one subframe of the n subframes is divided into a plurality of subpixels each having a lighting period shorter than that of the subframe so that the n subframes are increased to t subframes (t>n). In at least one subframe of the t subframes, lighting periods of the subframes in a lighting state are sequentially added by the m subpixels, so that a gray scale of the pixel is expressed.
US08115785B2 Method for driving liquid crystal display device, liquid crystal display device, and electronic device
An object of the present invention is to provide a driving method of a liquid crystal display device for improvement of image quality and a liquid crystal display device in which the driving method is used. One frame period is divided up into an n (n: integer, n≧3) number of periods (hereinafter referred to as subframe periods). Furthermore, a voltage is applied to a liquid crystal so as to correct for a loss in luminance resulting from response speed of the liquid crystal. The voltage for correction is applied during subframe periods other than the first subframe period.
US08115780B2 Image generator
A system and method for generating an image on a display. The display includes a plurality of pixels from a vector description of a scene. The data is sampled from the vector description to provide data samples at locations defined in relation to the pixels. For example, the locations may include a first and second locations at the edges of the pixels, a third location at the corner of the pixels and a fourth location at the center of the pixels. The data samples are stored in a buffer and processed for each of the pixels to give an averaged data value. The image is then generated the image on the display by applying the averaged data value to each of the pixels. The calculation of the weighted averaged color value is repeated for each of the fragments in the buffer until all of the samples have been averaged.
US08115774B2 Application of selective regions of a normal map based on joint position in a three-dimensional model
A method. for use in animation includes the steps of establishing a model having a plurality of joints, exposing a region of a first normal map based on a position of one or more of the joints, and applying the exposed region of the first normal map to the model. A system for use in animation is configured to accomplish these steps.
US08115769B1 System, method, and computer program product for conveying a status of a plurality of security applications
A system, method and computer program product are provided for displaying a status of a security application. A status of at least one security application is initially identified. An index is calculated that is representative of a degree of risk associated with the status of the at least one security application. The index is then displayed.
US08115768B2 Methods and system for communication and displaying points-of-interest
A method for displaying point-of-interest coordinate locations in perspective images and for coordinate-based information transfer between perspective images on different platforms includes providing a shared reference image of a region overlapping the field of view of the perspective view. The perspective view is then correlated with the shared reference image so as to generate a mapping between the two views. This mapping is then used to derive a location of a given coordinate from the shared reference image within the perspective view and the location is indicated in the context of the perspective view on a display.
US08115765B2 Rule-based procedural terrain generation
Disclosed are systems and methods for rule-based procedural generation of terrain in real time for a virtual world. Using the terrain editor tool, the terrain system allows defining and modifying the terrain height, color, shaders, textures, flora, and environment, for example. Additionally, generating the terrain procedurally allows for detail by changing the parameters used to create the terrain geometry. These rules can also be added and removed dynamically, leading to terrain modification in real time. In addition, resources are managed for the terrain generation system, such as memory allocation and deallocation.
US08115762B1 Locking geometric and camera parameters in image-based three-dimensional modeling, and applications thereof
Embodiments relate to locking geometric and camera parameters in image-based three-dimensional modeling. In a first embodiment, a computer-implemented method modifies a three-dimensional model using a set of two-dimensional photographic images. In the method, at least one constraint, input by a user, for a two-dimensional photographic image from the set of two-dimensional photographic images are received. Each constraint indicates that a position on the two-dimensional photographic image corresponds to a position on the three-dimensional model. When the number of constraints received for the two-dimensional photographic image is less than or equal to a first threshold value, camera parameters representing a camera that took the constrained photographic image. Finally, a photogrammetry algorithm is applied to at least the set of parameters to determine at least one unlocked parameter in the set of parameters and to modify the three-dimensional model based on the constraints.
US08115761B1 Locking geometric and camera parameters in image-based three-dimensional modeling, and applications thereof
Embodiments relate to locking geometric and camera parameters in image-based three-dimensional modeling. In a first embodiment, a computer-implemented method modifies a three-dimensional model using a set of two-dimensional photographic images. In the method, at least one constraint, input by a user, for a two-dimensional photographic image from the set of two-dimensional photographic images are received. Each constraint indicates that a position on the two-dimensional photographic image corresponds to a position on the three-dimensional model. When the number of constraints received for the two-dimensional photographic image is less than or equal to a first threshold value, camera parameters representing a camera that took the constrained photographic image. Finally, a photogrammetry algorithm is applied to at least the set of parameters to determine at least one unlocked parameter in the set of parameters and to modify the three-dimensional model based on the constraints.
US08115755B2 Reducing power consumption associated with high bias currents in systems that drive or otherwise control displays
Provided herein are methods and configurations for use with systems that drive or otherwise control displays (e.g., LCD displays). Such systems often include devices (e.g., buffers, DACs, ADCs, etc.) that require a sufficiently high bias current to enable the device to have a sufficiently fast slew rate and settling time, which may consume an undesirable high amount of power. Embodiments of the present invention adjust such bias current to reduce power consumption. A first bias current level is provided to the device when an input to, and a corresponding output from, the device are to transition from one level to another. A second bias current level is provided to the device when the input to, and the corresponding output from, the device are not to transition from one level to another, where the second bias current level is lower than the first bias current level.
US08115754B2 Data line driving method
A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.
US08115753B2 Touch screen system with hover and click input methods
A touch screen system that can approximate tracking and dragging states regardless of the user's orientation and without reliance on direct sensing of touch pressure or area. A first detector generates a signal representing a first image of an object interacting with the touch screen. A second detector generates a signal representing a second image of the object. A signal processor processes the first signal to determine approximated coordinates of a first pair of outer edges of the object and processes the second signal to determine approximated coordinates of a second pair of outer edges of the object. The signal processor then calculates an approximated touch area based on the approximated coordinates of the first pair of outer edges and the approximated coordinates of the second pair of outer edges of the object. If the approximated touch area is less than or equal to a threshold touch area, the signal processor determines that the object interacting with the touch screen indicates a tracking state. If the approximated touch area is greater than the threshold touch area, the signal processor determines that the object interacting with the touch screen indicates a selection state. The threshold touch area may be established by calibrating the touch screen system when the object interacting with the touch screen is known to indicate the tracking state.
US08115751B2 Capacitive touch sensing assembly
A capacitive touch sensing assembly is a plate body assembled by a first and second substrate glued by a gluing layer. The first and second substrates are insulated transparent thin plates, and the gluing layer is an insulated transparent adhesive. On an upper surface of the first substrate, a capacitive sensing layer including a plurality of transparent first and second axis traces intersecting to each other. Induction-spots formed on each first axis trace are connected one by one, and induction-spots formed on each second axis trace are formed separately with gaps. An inducting layer has a plurality of conducting wires formed along the direction of the second axis traces. Electrical joints formed on two ends of the conducting wires contact the two adjacent induction-spots of the second axis traces respectively so as to electrically connect all induction-spots on each second axis trace.
US08115740B2 Electronic device capable of executing commands therein and method for executing commands in the same
The present invention provides a method for executing commands in an electronic device having a touch sensing element. A stylus or finger is used to touch the touch sensing element and move through several sensing areas on the touch sensing element. A responsive signal is generated by the touch sensing element according to the touched sensing areas. A processor then executes a corresponding command in accordance with the responsive signal.
US08115734B2 Moveable desktop
There is disclosed an interactive display system comprising an interactive surface for displaying an image and for receiving inputs from remote devices, the system being adapted to detect the presence of at least two remote devices proximate the interactive surface.
US08115733B2 Dual pen: OS/application pens
There is disclosed an interactive display system comprising an interactive surface for displaying an image and for receiving inputs from remote devices, the system being adapted to detect the presence of at least two remote devices proximate the interactive surface.
US08115728B2 Image display device with reduced flickering and blur
A backlit display with improved display characteristics.
US08115726B2 Liquid crystal display image presentation
A display device comprises a liquid crystal module comprising a matrix of pixels, a backlight assembly, and a controller comprising logic to receive an image comprising at least a first stationary portion and a second moving portion, separate the first stationary portion from the second moving portion, present the first stationary portion at a first refresh rate and present the second moving portion at a second refresh rate, different from the first refresh rate.
US08115723B2 Driving circuit for display panel
The present invention relates to a driving circuit for a display panel, which comprises a pre-charge power supply, a pre-charge switch, a buffer circuit, and a plurality of resistive devices. The pre-charge switch is coupled between the pre-charge power supply and a capacitor of the display panel. The buffer circuit is used for buffering a data signal and producing a buffer signal. The plurality of resistive devices is connected in series and coupled to the buffer circuit, and produces a plurality of driving signals therebetween according to the buffer signal. The driving circuit first closes the pre-charge switch to make the pre-charge power supply charge the capacitor. Then, one of the plurality of driving signals charges the capacitor. Thereby, the driving time can be shortened, and power of the display can be saved by avoiding power consumption on resistors.
US08115721B2 Display data receiving circuit and display panel driver having changeable internal clock and sychronization mechanisms
A display data receiving circuit of the present invention includes a PLL circuit 25 which generates internal clock signal ICLK having an integral multiple of the frequency of differential clock signals CLK and /CLK in response to differential clock signals CLK and /CLK, and a serial/parallel conversion circuit 23 which receives serial data signal transmitting display data in synchronization with the internal clock signal ICLK, and generates parallel data signal by executing serial/parallel conversion for the serial data signal. The serial/parallel conversion circuit 23 is configured to be able to execute either a single edge operation, which receives serial data signals in response to one of a rising edge and a falling edge of the internal clock signal ICLK, or a double edge operation, which receives serial data signals in response to both of a rising edge and a falling edge of the internal clock signal ICLK. Further, the PLL circuit 25 is configured to be able to change the frequency of the internal clock signal ICLK.
US08115720B2 Liquid crystal display device and method for driving the same
A liquid crystal display device including a liquid crystal panel, a first printed circuit board attached to one side of the liquid crystal panel and including a mounted drive circuit configured to drive the liquid crystal display panel, a second printed circuit board including a mounted timing controller configured to supply a predetermined control signal and a predetermined data signal to the drive circuit and a mounted power supplying section configured to supply a predetermined voltage to the drive circuit, a flexible circuit board configured to supply the predetermined control signal, the predetermined data signal, and the predetermined voltage supplied from the second printed circuit board to the first printed circuit board, and a memory device mounted to the second printed circuit board. Further, the memory device is configured to perform a write protection function in response to a predetermined voltage supplied from an electrical passage via at least one of the flexible circuit board and the first printed circuit board.
US08115717B2 Method and system for line by line addressing of RMS responding display matrix with wavelets
A method for line-by-line addressing of RMS responding display matrix with wavelets, said method comprises steps of: selecting the wavelets such that energy of them is proportional to an integer power of two to form a wavelet matrix; obtaining select waveform profile by summing elements of column in the wavelet matrix; obtaining column waveforms by dot product of data with column of the wavelet matrix; and applying the select waveform and the corresponding column waveforms by selecting one row of the display matrix at a time.
US08115715B2 Liquid crystal display device and method of driving the same
A liquid crystal display device includes a liquid crystal panel including a liquid crystal layer; and a driving circuit including a data driver supplying a data voltage to the liquid crystal panel, wherein the liquid crystal panel displays white at a first data voltage and black at a second data voltage, and wherein a level of the first data voltage is higher than 0V and a level of the second data voltage is higher than the level of the first data voltage.
US08115712B2 Method for reducing audio noise of display and driving device thereof
A method for reducing audio noise of a display is provided. A horizontal synchronization signal, a reference signal and a substrate voltage signal are generated. The reference signal has a preset width at high level status. The status transition of the substrate voltage signal is based on each scan line corresponding to the horizontal synchronization signal. In each period of the substrate voltage signal, the status transition of the raising and falling edges is based on the high level status of the reference signal, and the transition timings of the raising edges and the falling edges are advanced or delayed based on a reference value of the high level status of the reference signal.
US08115710B2 Liquid crystal display control circuit for reducing memory size by detecting image edges and saving edge data and method thereof
A liquid crystal display (LCD) control circuit is disclosed. The control circuit includes an edge detecting circuit for detecting image edges in each frame of an image data, and outputting an edge data and a non-edge data; a memory for saving the edge data of the frame; a driving decision circuit for generating a driving voltage setting according to the non-edge data of a current frame, and generating an overdriving voltage setting according to the edge data of a previous frame saved in the memory and the edge data of the current frame outputted by the edge detecting circuit; and an output device for outputting the driving voltage setting and the overdriving voltage setting.
US08115709B2 Electro-wetting display device
An exemplary electro-wetting display (EWD) device includes an upper substrate, a lower substrate opposite to the upper substrate, a plurality of side walls interposed between the upper and lower substrates and cooperating with the upper and lower substrates to form a plurality of pixel units, a first polar liquid disposed in the pixel units, a second, colored, non-polar liquid disposed in the pixel units and being immiscible with the first liquid, and a plurality of scanning lines disposed on the lower substrate and parallel to and spaced apart from each other for providing scanning signals to the pixel units. Each of the pixel units corresponds to at least part of a corresponding previous scanning line.
US08115707B2 Voltage-programming scheme for current-driven AMOLED displays
A system and method for driving an AMOLED display is provided. The AMOLED display includes a plurality of pixel circuits. A voltage-programming scheme, a current-programming scheme or a combination thereof is applied to drive the display. Threshold shift information, and/or voltage necessary to obtain hybrid driving circuit may be acquired. A data sampling may be implemented to acquire a current/voltage relationship. A feedback operation may be implemented to correct the brightness of the pixel.
US08115701B2 Sustain device for plasma panel
The present invention concerns a device for generating a rectangular sustain voltage between the line scanning electrodes and the line common electrodes of luminous cells in a plasma panel. The device includes a first sustain amplifier connected to the line scanning electrode of the cells to produce the transitions of the first sustain voltage signal, and a second sustain amplifier connected to the line common electrode of the cells to produce the transitions of the second sustain voltage signal. It also includes an insulated voltage supply circuit which is connected directly to the line scanning electrodes and to the line common electrodes of the cells in order to hold the end-of-transition voltage on said line scanning electrodes and said line common electrodes.
US08115699B2 Position detecting system and position detecting program
A plurality of positional information transmitters 100, each of which transmits positional information to which a plurality of unit spaces are each uniquely assigned, are disposed on a ceiling. A mobile terminal 10 receives the positional information transmitted from each of the positional information transmitters 100 and changes a terminal-side image in accordance with the received positional information. Furthermore, the mobile terminal 10 transmits to a server 300 current positional information and operation information indicating an instruction inputted by a user. The server 300 changes, in accordance with the current positional information and the operation information received by the mobile terminal 10, a floor image displayed on a plurality of floor displays 200 disposed on a floor. Thus, it becomes possible to provide a highly interesting and novel position detecting system.
US08115697B2 System and method for highly directional electronic identification and communication and combat identification system employing the same
An antenna for directional electronic communication and a directional communication system are provided. In one embodiment, the antenna includes: (1) a conductive shield having an opening at an end thereof and a radio frequency absorptive material located on an inner surface thereof, (2) a Luneberg lens located within said conductive shield and (3) a radio frequency signal conveyor located proximate a portion of said Luneberg lens that is distal from said opening.
US08115692B2 Electronic apparatus
According to one embodiment, an electronic apparatus is provided with a housing and a communication module mounted in the housing. The communication module includes an element section and a ground section, and is arranged so that the element section is opposed to an inner surface of the housing to enable the communication module to communicate with another communication module opposed thereto from outside the housing. The housing is provided with a holder section which contains the communication module. The holder section includes a conductive section which surrounds a periphery of the communication module in all directions except a direction from the element section toward the inner surface of the housing.
US08115691B2 Electronic apparatus and antenna unit
According to one embodiment, an electronic apparatus includes a housing, a first board contained in the housing, a second board contained in the housing on the inner side of the first board, a first antenna part, and a second antenna part. The first antenna part includes a loop antenna provided on the first board, and configured to communicate with a communication module opposed to the loop antenna. The second antenna part includes an element part provided in an area surrounded by the loop antenna, and positioned in the same plane as the loop antenna, and a ground part provided on the second board, and configured to communicate with a communication module opposed to the element part.
US08115681B2 Ultra-wideband antenna having a band notch characteristic
The present invention discloses an antenna for ultra-wideband (UWB) communication having a band-stop characteristic. According to an embodiment of the present invention, the UWB antenna is a patch antenna employing microstrip feeding. In order to expand a bandwidth at a low frequency band, a stub is formed in a radiating element. Furthermore, since steps are formed in a ground plane, an antenna characteristic at an intermediate frequency band can be improved and a UWB characteristic can be obtained. According to another embodiment of the present invention, the UWB antenna is a patch antenna employing microstrip feeding and has a recess formed in the ground plane, thereby implementing the UWB characteristic. The antenna of the present invention has an inverse U-shaped slot formed in the radiating element, thus implementing the band-stop characteristic at the UNII band. In addition, the antenna of the present invention has includes a ground plane having a small area and has omnidirectional radiating patterns accordingly.
US08115679B2 Side lobe suppression
Embodiments include a method to suppress side lobes of a main antenna by creating cancellation directions using a Side Lobe Canceller (SLC). Various embodiments also provide the Side Lobe Canceller.
US08115672B2 Method of measuring distance, notably for short-range radar
The present invention relates to a procedure for measuring distance. It applies notably in respect of short-range radars, but not exclusively. The method uses an electromagnetic wave comprising at least one emission sequence (31, 32, 33, 34, 35) of the FSK type, at least two emission frequencies (F1, F2), emitted successively towards the said target a given number p of times inside the sequence. The gap δF between the emission frequencies (F1, F2) is substantially equal to an integer number k of times the repetition frequency (SPRF) of the cycle of frequencies, the distance measurement being obtained on the basis of the measurement of difference of phases Δφ between the signals received corresponding respectively to a first frequency (F1) and to a second frequency (F2).
US08115671B2 Precision method for aligning radio frequency pulse timing characteristics
A system and method for correlating first pulsed signals with second pulsed signals includes a first receiving unit, a second receiving unit and a correlation device. The first receiving unit is disposed to receive from a first device one or more first pulsed signals. The first device may include a plurality of pulsed radio frequency source under test signal sources. The second receiving unit is disposed to receive from a second device one or more second pulsed signals. The second device may include a local oscillator pulsed signal source. The correlation device can correlate the first pulsed signals with the second pulsed signals to align a timing characteristic of the first pulsed signals to the equivalent timing characteristic of the second pulsed signals.
US08115668B2 Object detecting apparatus for vehicle
An object candidate position detecting apparatus which detects a position of an object candidate includes a unifying mechanism which unifies a plurality of object candidates detected within a predetermined unified range into a single group. Where the relative positions of the object candidates stored in a unified information storage device changes such that the single group splits into a plurality of groups, a tracking mechanism judges whether any object candidate forming the group before the split continuously remains to be detected in a running lane in which a subject vehicle runs and which is estimated by a running lane estimator. Where any object candidate forming the group before the split is determined as continuously remaining to be detected in the running lane, the tracking mechanism determines that there is continuity between a group after the split including the thus-determined object candidate and the group before the split.
US08115667B2 Highway speed ground penetrating radar system utilizing air-launched antenna and method of use
Embodiments of the disclosed technology comprise an air-launched antenna system with interference-rejection technology that operates in analog hardware as well as by way of a digital filtering technique. Using an inline analog hardware filter combined with a digital filter, to determine transversal (and/or recursive) coefficients, in a calibration phase, a measurement system may be configured to remove interference and the effects (such as a delay or temperature variation) which result from use of an analog filter. In this manner, the resulting measurements of a composition of road surface are more accurate and useful.
US08115663B2 Mismatch-immune digital-to-analog converter
In an embodiment, a digital-to-analog converter (DAC) includes inputs for receiving first and second signals encoded as a digital signal pair including overlapping low value portions that are substantially equal in duration to overlapping high value portions, within a frame. The DAC further includes an output terminal for providing an analog signal and includes first and second switches responsive to the first and second signals alter a level of the analog signal based on values of the first and second signals to provide a mismatch-immune DAC functionality. In one instance, the switches couple current sources to a common node. In another instance, the switches configure a resistive network to alter a resistance at an input to an amplifier.
US08115660B2 Compression of stream data using a hierarchically-indexed database
The present invention, in particular embodiments, is directed to methods, apparatuses and systems that provide an efficient compression technique for data streams transmitted to storage devices or over networks to remote hosts. Local storage as well as network transmission of streams is made more efficient by awareness and utilization of repeated sequences of data blocks. Such data blocks can be placed in a dictionary on persistent storage and shared across all streams. The dictionary is hierarchically indexed (two or more levels of indexing) to combine high efficiency search with efficient access to the stored data blocks. Additionally, data blocks, in particular implementations, are stored sequentially in order to improve overall performance.
US08115657B2 Remote device for controlling a computer by a physically limited person
The invention relates to medicine and can be used for persons with paralysis of upper and lower limbs. The inventive device comprises a signal processing and transmitting module (1), a coordinate unit (2), functional contacts (3), control contacts (4) and an elastic base plate (5) which is symmetrical with respect to a longitudinal axis and is provided with an unbendable projection (6) on the front part thereof. The plate consists of a central circle (7), peripheral circles (8) which are radially spaced away from the central circle, connecting straps (9) mating with the central circle (7) by one end thereof, whilst the other end is coupled with the respective peripheral circle (8). The unbendable projection is made in a shape of an equilateral trapezoid adjacent to the central circle by the larger base thereof and is upwardly bent at about 20 to 60° angle with respect to the plate plane. The signal processing and transmitting module is arranged on the top surface of the central circle of the plate. The coordinate unit is arranged on the lower surface of the central circle. Each functional contact is fixed to the lower surface of the respective peripheral circle. The control contacts are fixed to the lower surface of the unbendable projection. The plate together with operating elements fixed thereto is enveloped with a waterproof film (10). The shape of the film matches the external outlines of the plate with edge allowance (11) and the edge thereof is provided with V-shaped notches (12). Said invention makes it possible to improve the operational characteristics, to simplify the production of the device and to reduce the costs thereof.
US08115656B2 Vehicle security and monitoring system
A vehicle monitoring system includes a communication subsystem configured to provide two-way wireless communication, and a controller mounted in a vehicle and configured to receive data indicative of a location of the vehicle and to control the communication subsystem to transmit the data indicative of the vehicle location toward a remote communication center and receive operational information transmitted from the remote communication center. The controller receives a mode change command included in the operational information and in response changes operating mode between an authorization mode, in which the controller transmits an alert signal to the remote communication center, and a tracking mode, in which the controller transmits the data indicative of vehicle location continuously at predetermined intervals regardless of the authorization signal.
US08115649B2 Slat skew detection system
An apparatus comprises a sensor system, a flexible line, and a sensor. The sensor system is capable of detecting skew in at least some of a plurality of control surfaces for a vehicle. The flexible line extends across a number of interfaces for a portion of the plurality of control surfaces. The sensor is connected to the flexible line and is capable of detecting the skew in the portion of the plurality of control surfaces in response to a selected amount of movement of the flexible line.
US08115648B2 Seat occupancy sensor
The invention relates to a seat occupancy sensor (10) comprising at least two switch elements (12, 14) which can be activated by pressure. Said elements can be associated with the surface of a seat and are arranged at a certain distance from each other in such a manner that a first switch element (12) is associated with a first area of the seat and a second switch element (14) is associated with a second area of the seat. According to the invention, the first and second switch elements (12, 14) are connected to each other in such a manner that a logical AND-linkage is produced. The first and second switch elements are, for example, serially connected in a particularly simple embodiment of the invention.
US08115646B2 Environmental sensor system
In one embodiment, a system to detect one or more environmental conditions in proximity to a surface comprises a first metamaterial environmental sensor module proximate the surface. The environmental sensor comprises a metamaterial-based electrically resonant structure having a resonance frequency which varies in response to changes in at least one of a humidity proximate the sensor module, a temperature proximate the sensor module, or the presence of a chemical or biological agent proximate the sensor module. The system further comprises a remote receiver to receive an electromagnetic signal comprising the signal generated by the electrically resonant structure and a signal analysis module to determine an environmental condition such as humidity, temperature, pre-ice conditions, ice, chemicals or biological species from the at least one environmental condition signal. Other embodiments may be described.
US08115639B2 Laundry tag
A laundry tag is described comprising a first male portion (1) having at least one projecting member (3), and a second female portion (2) defining a recessed region (4) to receive the projecting member and fixedly engage thereupon to hold the two portions together, wherein one of the said portions comprises a passive RFID transponder (7). A laundry tagging kit and laundry management system and a method of tagging laundry to operate such a system are also described.
US08115638B2 RFID thread, sheet with RFID thread, and printing machine for sheet with RFID thread
An RFID thread which is mounted on a sheet and whose predetermined information can be read wirelessly from outside, the RFID thread includes: an IC chip recording the predetermined information; a first antenna consisting of an electrically continuous conductor which has a length corresponding to a size of the sheet and on which one or a plurality of the IC chips are mounted; and a base film made of resin for supporting the first antenna.
US08115631B2 Determining endpoint connectivity of cabling interconnects
In a communication network or system, cables that interconnect systems or subsystems are provided with RFID tags embedded or affixed at least at one endpoint of each cable. An installed or portable RFID reader in the proximity of an RFID tag of a given cable enables a unique cable endpoint identifier contained in the RFID tag to be read. The identifier is combined with a unique port identifier of the port to which the cable endpoint is attached at the message is sent to a far-end system or subsystem connected to the other end of the cable. That system reads the message and the information contained therein along with a unique port identifier of its own port connected to the given cable, enables positive confirmation of the communicative connection between the two ports and also the cable providing the connection. It also enables communication of the physical routing information to an operations support system for cable management.
US08115630B2 Coherent multichip RFID tag and method and apparatus for creating such coherence
An RFID tag (10), containing at least two independent microscopic RFID chips (16) or microradios is programmed with the same unique identifier for each chip. The unique identifier is used in the RFID chips (16) to key the RFID chip (16) transmitting to produce outputs in the same time slot so that the outputs add coherently, thus to create an output that is identical to that of a conventional tag containing only one such chip.
US08115624B2 System, method, and kit for remotely monitoring an individual with a sensor-integrated picture frame
In embodiments of the present invention, systems and methods for remotely monitoring an individual may include providing a sensor integrated in a monitoring object at a first location where the monitoring object may be configured as a picture frame. A sensor may be associated with an environment of an individual at the first location. The sensor may be associated with a network. Sensor data may be processed to obtain monitoring information for the activity of the individual in the environment. The monitoring information may be transmitted over the network from the first location to a receiving object at a second location, where the receiving object may be configured as a picture frame.
US08115622B2 Underground radio communications and personnel tracking system
An underground radio communications and personnel tracking system uses a portable communications device worn by a miner when underground in a mine. A cap-lamp transceiver provides voice and text communication on ultra-low frequency (ULF) to ultra-high frequency (UHF) carrier frequencies and modulation adapted by programming of a software defined radio to making selective and agile radio contacts via through-the-earth, conductor/lifeline, coal seam, tunnel, and ionosphere/earth-surface waveguides for transmission of electromagnetic waves. These waveguides comprise layered earth coal and mineral deposits, and manmade mining complex infrastructures which serendipitously form efficient waveguides. Ultra-Low Frequency F1/F1 repeaters are placed underground in the mine, and providing for extended range of communication of the cap-lamp transceiver with radios and tracking devices above ground of the mine.
US08115620B2 Asset monitoring using micropower impulse radar
Arrangement and method for monitoring inanimate objects in an interior thereof includes a sensor system arranged to obtain data about the object by applying micropower impulse radar (MIR) transmissions into the interior of the asset, i.e., container volume monitoring using MIR, a location determining system arranged on the asset to monitor the location of the asset, and a communication system arranged on the asset and coupled to the sensor system and the location determining system. The communication system transmits the data about each object obtained by the sensor system and the location of the asset provided by the location determining system to one or more remote facilities, these remote facilities being those interested in the information about the objects in the asset being monitored.
US08115619B2 Information processing apparatus, document management system and method, and computer program
An information processing apparatus includes an input section, a position calculation section, a storage section, a log information record section, a display data generation section and a display section. The input section receives document identification information, which are output as output signals from respective transmission portions set to correspond to respective documents, and user identification information, which are output as output signals from respective transmission portions set to correspond to users. The position calculation section calculates document positions and user positions based on the document identification information and the user identification information. The storage section stores the calculated document positions and the calculated user positions. The log information record section records document use histories of the users based on the stored document positions and the stored user positions. The display data generation section generates display data indicating a document position of a document, which was used by a particular user.
US08115614B2 Tire information management system
In a tire information management system 10 of the present invention, a vehicle side module 5 includes a receiving electromagnetic wave strength measuring means 12 for measuring, for each sensor module 3, receiving electromagnetic wave strength of data signals transmitted from the sensor module 3 and is adapted to generate a transmitting electromagnetic wave strength set value to be employed in the next data transmission by the sensor module in accordance with the receiving electromagnetic wave strength of the data signals transmitted from the sensor module and add the transmitting electromagnetic wave strength set value to a command to the sensor module at the next request of data transmission thereto. The sensor module 3 includes a transmitting electromagnetic wave strength control means 16 for controlling transmitting electromagnetic wave strength in data transmission. The transmitting electromagnetic wave strength control means 16 is adapted to control transmitting electromagnetic wave strength during next data transmission on the basis of a transmitting electromagnetic wave strength set value received from the vehicle side module. As a result, the present invention provides a tire information management system that allows electricity consumption at the sensor module to be significantly reduced, whereby the product life of the sensor module is significantly improved.
US08115607B2 Microphone diagnostic inside system with voip alerting and monitoring
A computer implemented method, computer program product and a data processing system acoustically monitor an internal data processing system component. The internal data processing system component is selected for diagnosis. The internal data processing system component is within the data processing system and has an associated microphone located proximate to the component. The microphone associated with the internal data processing system component is enabled, and an acoustic signal for the internal data processing system component is identified. An exemplar fingerprint for the internal data processing system component is then identified from storage. A determination is then made as to whether the acoustic signal deviates from the exemplar fingerprint by more than a defined statistical variance. If the acoustic signal deviates from the exemplar fingerprint by more than a defined statistical variance, the acoustic signal and an identity of the internal data processing system component is stored in a failure log and a failure notification is triggered.
US08115599B2 Methods and systems for locating and identifying labware radio-frequency identification tags
Methods and systems for automatically locating and identifying labware using radio-frequency identification (RFID) tags are described herein. The methods and systems include a plurality of RFID tags (pre-programmed with unique data codes) that are associated with labware (or labware holders). For example, the RFID tags can be embedded within the locating pegs of the labware (or labware holders). The methods and systems also include a plurality of RFID tag readers that mount near known locations of an instrument deck which receives the labware. The RFID tag readers automatically scan for the presence of RFID tags such that when a piece of labware is added to the instrument deck, and then report to a processing device the specific known location on deck where each tag was found, as well as the unique data code of each tag. Using this information, the methods and systems determine one or more of the location, orientation, and identity of the received labware.
US08115598B2 Near field communication front-end
A near field communication front-end includes an up conversion module, a plurality of coils, and a down conversion module. The up conversion module is coupled to convert an outbound symbol stream into a plurality of outbound signals based on a frequency-space encoding scheme. The plurality of coils is coupled to electromagnetically transmit the plurality of outbound signals and to electromagnetically receive a plurality of inbound signals in accordance with the frequency-space encoding scheme. The down conversion module is coupled to convert the plurality of inbound signals into an inbound symbol stream in accordance with the frequency-space encoding scheme.
US08115596B2 Method and system for controlling distant equipment
A method and system for controlling distant equipment. A passive radio frequency identification (RFID) tag within a Programmable Secure Remote Controller (PSRC) receives a radio frequency (RF) signal from a transmitter integrated in the distant equipment. The distant equipment is external to and remote from the PSRC. The PRSC does not include an internal source of energy and requires energy from an external source to operate. The PSRC is configured to distribute sufficient energy from the RF signal to components of the PSRC to enable the components to operate. The RFID tag is activated to generate information and the information is decoded to identify the distant equipment. A request to perform an operation that controls the distant equipment is received. After the request is received, a first predefined scenario is activated for performing the operation that controls the distant equipment.
US08115590B1 RFID readers limiting theft of confidential information
RFID reader and methods of operating an RFID reader are provided to limit or prevent the issuing of confidential information such as encryption keys, passwords, shared secrets, and the like to RFID tags if a reader is not authorized. The reader may determine its authorization status based on a self-check, information from another reader, or information from a controller, and limit an operational aspect of itself or for communication with the tags.
US08115589B2 Method for producing an electrical resistor on a substrate
A method for producing an electrical resistor, in particular a current sensing resistor, on a substrate, a resistor blank being placed on the substrate and then being heat-treated to form the resistor. To form the resistor blank, a palladium layer is applied to the substrate and a silver layer is applied to the palladium layer, or a silver layer is applied to the substrate and a palladium layer is applied to the silver layer, and the palladium of the palladium layer is then completely alloyed with the silver of the silver layer by heat treatment.
US08115588B2 Operating device and game controller
A novel game controller is provided. The game controller includes: a lower operation button supported by a rotation shaft so as to be capable of a rotating operation; a resistor arranged on an internal substrate; and a conductive member to be pressed against the resistor by a rotating operation on the lower operation button, the conductive member having elasticity. The resistor outputs an analog signal in accordance with a contact area of the conductive member, thereby realizing an analog input.
US08115585B2 Variable resistance element
In a variable resistance element having a variable resistor between first and second electrodes and changing its electric resistance when a voltage pulse is applied between both electrodes, data holding characteristics can be improved by increasing a programming voltage and programming in a high current density. Therefore, a booster circuit for supplying a high voltage is needed when the variable resistance element is applied to a nonvolatile memory. When the smaller of the areas of the contact regions between the first electrode and variable resistor and between the second electrode and variable resistor is set to the electrode area of the variable resistance element, it is set within a specific range not larger than the predetermined electrode area. Thereby the programming current density can be increased without raising the programming voltage, and the variable resistance element having preferable data holding characteristics even at a high temperature can be provided.
US08115582B2 Inductor topologies with substantial common-mode and differential-mode inductance
An inductor includes a core that has a window (164). The core includes a first core member and a second core member. A first winding is coupled to the first core member and a second winding is coupled to the second core member. A shell surrounds the core. Pairs of gaps between the core and the shell provide flux paths.
US08115579B2 MEMS actuators with stress releasing design
The micro-electromechanical (MEMS) actuator comprises a hot arm member and a cold arm member. The cold arm member comprises at least two longitudinally spaced-apart flexors. The actuators may also be constructed with at least one among the hot arm member and the cold arm member comprising at least one spring section. The stress in this improved MEMS actuator is more uniformly distributed, thereby reducing the mechanical creep and improving its reliability as well as its operation life.
US08115576B2 MEMS actuators and switches
MEMS structures employing movable conductive member and a number of current-carrying stationary contact terminals which advantageously permit higher current carrying capability that prior art devices in which currents flowed through movable conductive members. Current carrying capability in excess of 1.0 amp without the need for additional current limiting devices is realized thereby lowering overall system manufacturing costs for systems employing our structures.
US08115569B2 Monoblock dielectric multiplexer capable of processing multi-band signals
Disclosed herein is a monoblock dielectric multiplexer capable of processing multi-band signals. The monoblock dielectric multiplexer includes a dielectric block implemented as a hexahedral dielectric forming a body of the monoblock dielectric multiplexer. An external electrode is applied to an external surface of the dielectric block except for to a top surface. Resonant holes are each formed in a cylindrical shape and formed through the top surface and a bottom surface of the dielectric block. Internal electrodes are respectively formed on inner walls of the resonant holes. A plurality of capacitance patterns is formed on the top surface of the dielectric block and is configured to surround corresponding resonant holes. Input/output electrode units are formed and spaced apart from the capacitance patterns and configured to form capacitance coupling to the capacitance patterns. A common antenna stage is formed in a center portion of the dielectric block.
US08115568B2 Layout of a circuit board with stacked signal and reference layers and an opening in the reference layer
A layout of a circuit board includes a first signal layer, a second signal layer, and a third signal layer. The first signal layer has a transmission line. The second signal layer is stacked below the first signal layer, and has an opening. The third signal layer is stacked below the first and second signal layers with the second signal layer sandwiched between the first and third signal layers. The third signal layer is electrically connected to the second signal layer, and both of the second and third signal layers are ground layers or power layers. An orthogonal projection of a segment of the transmission line on the third signal layer is overlapped with that of the opening on the third signal layer. Therefore, an equivalent impedance of the segment of the transmission line with respect to the second and third signal layers can be increased or decreased.
US08115567B2 Method and system for matching networks embedded in an integrated circuit package
Methods and systems for matching networks embedded in an integrated circuit package are disclosed and may include controlling impedance within an integrated circuit via one or more impedance matching networks. The impedance matching networks may be embedded within a multi-layer package bonded to the integrated circuit. The impedance of one or more devices within the integrated circuit may be configured utilizing the impedance matching networks. The multi-layer package may include one or more impedance matching networks. The impedance matching networks may provide impedance matching between devices internal to the integrated circuit and external devices. The impedance matching networks may be embedded within the multi-layer package, and may include transmission lines, inductors, capacitors, transformers and/or surface mount devices. The impedance matching networks may be deposited on top of and/or on bottom of the multi-layer package. The integrated circuit may be flip-chip bonded to the multi-layer package.
US08115564B2 Systems and methods to minimize startup transients in class-D amplifiers
Systems and methods for minimizing startup transients in digital audio controllers that may result in audible artifacts in the output of an audio amplification system. One embodiment comprises a digital PWM amplifier that includes a mechanism for controlling the amount of dead time in the audio output signal. When the amplifier starts up, the PWM signals provided to the output stage are simultaneously deasserted (i.e., there is dead time) for most of each switch period. The amount of dead time is gradually reduced over a series of switch periods until a nominal operating amount of dead time in each switch period is reached. Thus, the PWM signals are slowly ramped up from having a very large percentage of dead time (e.g., nearly 100%) to having a very small percentage of dead time (e.g., 1-2% to prevent shoot-through.)
US08115559B2 Oscillator for providing a constant oscillation signal, and a signal processing device including the oscillator
An oscillator including a current bias circuit and a ring oscillator. The current bias circuit tracks a temperature change of the oscillator by using a control voltage and generates a plurality of bias voltages to supply a bias current according to the temperature change. The ring oscillator compares differential output signals generated according to the bias voltages and generates an oscillation signal as a result of the comparison.
US08115556B2 Resonant device with improved features
The device resonant comprises a plurality of synchronized oscillators. Each oscillator comprises a resonator which comprises detection means providing detection signals representative of oscillation of the resonator to a feedback loop connected to an excitation input of the resonator. The detection signals control the conductivity of the feedback loop of the oscillator. The excitation inputs of all the resonators are connected to a common point which constitutes the output of the resonant device. A capacitive load is connected between said common point and a reference voltage.
US08115555B2 Balun function with reference enhancement in single-ended port
Systems and methods are provided for a transformer or balun function with reference enhancement. The systems and methods may include a transformer having at least a primary winding and a secondary winding for reference enhancement, where the primary winding includes a center tap, where the secondary winding includes a first port and a second port, and an electrical connection that electrically connects the second port and the center tap of the primary winding to provide a common reference for the primary winding and the secondary winding. The primary winding of the transformer may be configured to receive differential outputs of a power amplifier, and the transformer may be configured to convert the differential outputs from a balanced signal to an unbalanced signal available at the first port of the secondary winding.
US08115554B2 Semiconductor device
According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.
US08115552B2 Amplifier circuit with step gain
A step gain amplifier has an amplifier with an input and an output, and a bias circuit connected to the input and to a bias node. A passive feedback circuit using only passive elements connects the output to the input. A control circuit is connected to the bias circuit at the bias node.
US08115548B2 Apparatus and method for controlling distortions of amplifier
Disclosed are an apparatus and method for controlling output distortions of an amplifier. The apparatus for controlling output distortions of an amplifier, includes a compensation signal generator to predict a fluctuation of a supply voltage of a power supply using a prediction model which reflects fluctuations characteristics of the supply voltage, and to generate a compensation signal based on the prediction, and a compensator to transform an input signal using the compensating signal to control the output distortions.
US08115546B2 Apparatus and method for maximizing performance of peaking amplifier in doherty amplifier
An apparatus and method for maximizing the performance of a peaking amplifier in a Doherty amplifier are provided. The apparatus includes a splitter, a carrier amplifier, an (N−1) number of peaking amplifiers, a Doherty combiner, and an output load. The splitter splits an input signal into an ‘N’ number of power signals. The carrier amplifier amplifies the signal provided from the splitter using a first Direct Current (DC) bias. The peaking amplifiers amplify the signals provided from the splitter using a second DC bias, which is lower than the first DC bias. When the carrier amplifier and the peaking amplifiers are all operating, the Doherty combiner forms a load impedance of the respective amplifiers such that the load impedance of the peaking amplifiers are less than the load impedance of the carrier amplifier. The output load outputs the signals amplified by the carrier amplifier and the peaking amplifiers.
US08115543B2 Mixed-signal transmission circuit for switching power amplifiers
The invention relates to an upstream unit (1) for a switched power amplifier (2) for a high-frequency transmission circuit (16). The upstream unit (1) supplies a pulse-length modulated HF pulse signal (22) to the switched power amplifier (2), wherein the linearity of the pulse length modulation and of the high-frequency transmission circuit is improved. The upstream unit (1) according to the invention has a first signal input (3) for a high-frequency, phase-modulated first input signal (18), a second signal input (4) for a second input signal (19) having a low frequency in comparison with the first input signal, a controllable first delay unit (5), a controllable second delay unit (7), a pulse generator (9) and a control unit (10).
US08115538B2 Modulation and demodulation circuit
The invention relates to the field of modulation and demodulation circuits, such as envelope detectors used to demodulate amplitude-modulated (AM) signals. By coupling an analog circuit to a port of a digital component, an envelope detector can be obtained, which achieves demodulation of AM signals for direct coupling into a digital input port. Accordingly, an envelope detector may be used in the data receiving part of a sealed device requiring post-manufacturing data transfer, in combination with additional components that provide electromagnetic coupling, such as inductive coupling, capacitive coupling, or radiative coupling. An example of such a device is a credit card sized authentication token.
US08115526B2 PLL oscillator circuit
Disclosed is a PLL oscillator circuit capable of examining an unlock state while being equipped with an auto retry function enabling automatic relock. In the PLL oscillator circuit, a MPU receives a lock detection signal from the PLL-IC that receives an external reference signal and an output signal from a VCXO and outputs a control voltage to the VCXO, sets data for unlock alarm test at the PLL-IC, the data turning a lock state into an unlock state, when determining an unlock state with the lock detection signal from the PLL-IC, outputs an unlock alarm output signal to the outside, determines whether the unlock state continues for a first time period, and when the unlock state continues for the first time period, executes retry to set data for relock at the PLL-IC.
US08115525B2 Frequency synthesizer
There is provided a frequency synthesizer. The frequency synthesizer includes a frequency oscillator adjusting an output frequency according to a control bit; a programmable divider having a preset minimum division ratio, the programming divider dividing the output frequency of the frequency oscillator at a variable division ratio; a counter unit receiving an output signal of the programmable divider and a reference frequency to generate a count value by counting rising edges of the output signal of the programmable divider during one cycle of the reference frequency, and outputting a first hit signal when the count value is 1, and outputting a second hit signal when the count value is 2; and a phase detection unit outputting a control bit obtained by subtracting a fractional error of the output signal of the programmable divider from a fractional error at a locked phase obtained from the count value and the reference frequency.
US08115520B2 Driver circuit
A driver circuit includes a main driver which receives an input signal and outputs a first signal corresponding to the input signal, a sub driver which receives the input signal and outputs a non-inverted signal and an inverted signal corresponding to the input signal, a differentiating circuit including resistors and a variable capacity condenser, which outputs signals by differentiating the non-inverted signal and the inverted signal, respectively, and an addition unit which outputs a high frequency emphasized signal given by adding the output signal of the main driver and the signal given by differentiating the non-inverted signal, or a low frequency emphasized signal given by adding the output signal of the main driver and the signal given by differentiating the inverted signal.
US08115519B2 Phase accumulator generating reference phase for phase coherent direct digital synthesis outputs
A phase accumulator generates phase data for a direct digital synthesis (DDS) device based on a reference phase to provide analog sinusoidal outputs that are locked to the reference phase and thus phase coherent. The frequency of a sinusoidal DDS output may be controlled by changing a frequency control word (FCW) provided to the phase accumulator without affecting the incrementing reference phase. The sinusoidal DDS output is based on a multiple of the FCW and the reference phase and thus remains locked to the reference phase, providing phase coherency even when the FCW changes to change the frequency.
US08115515B2 Radiation hardened differential output buffer
A radiation hardened differential output buffer is partitioned into multiple stages, each including at least one current source and a bridge circuit. Each stage receives substantially the same inputs at substantially the same time, and provides substantially the same output. The outputs of each stage are connected together. As a result, if one of the stages is disrupted by SEE, the disrupted stage does not contribute enough current to the output of the differential output buffer to disrupt the output signal.
US08115513B2 Circuits for soft logical functions
A circuit implementing a soft logical processing network includes an interconnection of analog processing elements, which can include soft logic gates, the soft logic gates including one or more soft logic gates. In some examples, each of the soft logic gates include multiple circuit parts, with each part including an input configured to accept a voltage signal representation of a soft logical quantity, and a conversion section configured to use the accepted voltage representation to form a corresponding current signal. The current signals are combined to form a signal representation of the output of the gate.
US08115508B2 Structure for time based driver output transition (slew) rate compensation
A design structure and more particularly to a design structure to minimize driver output slew rate variation. The design structure is embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit. The design structure includes a driver circuit having an input signal and an output signal, where the driver circuit is structured and arranged to control the slew rate of the output signal. A delay circuit is coupled to an output of the driver circuit, where the delay circuit has a delay proportional to a desired target slew rate of the driver output signal. A first comparator for detecting when the driver output signal rises through a specified level, and a second comparator for detecting when the driver output falls through a second specified level are included. A phase detector is coupled to outputs of the first and second comparators and an output of the delay circuit for aligning the phases (voltage-time relationships) of the comparator outputs and the delayed comparator outputs by adjusting the driver output slew rate.
US08115502B2 Fluid measuring apparatus
The invention provides a fluid measuring apparatus, which includes a collector, a sensing circuit, and an electrochromic device electrically connected to the sensing circuit. When the concentration of a fluid flowing through the collector and between the sensing circuit varies, the color of the electrochromic device changes accordingly. Further, the electrochromic device includes an electrochromic material, and the sensing circuit includes a first electrode and a second electrode, wherein the first and the second electrodes are disposed in the collector and the electrochromic material is disposed on the first electrode. When the concentration of an electrolytic solution flowing between the first electrode and the second electrode varies, the color of the electrochromic material changes accordingly.
US08115500B2 Accurate capacitance measurement for ultra large scale integrated circuits
Test structures and methods for measuring contact and via parasitic capacitance in an integrated circuit are provided. The accuracy of contact and via capacitance measurements are improved by eliminating not-to-be-measured capacitance from the measurement results. The capacitance is measured on a target test structure that has to-be-measured contact or via capacitance. Measurements are then repeated on a substantially similar reference test structure that is free of to-be-measured contact or via capacitances. By using the capacitance measurements of the two test structures, the to-be-measured contact and via capacitance can be calculated.
US08115498B1 Proximity sensor interface device and method for its use
A device for determining a position of a proximity sensor with respect to a target mechanism is described. The device includes a frequency generator, a processing device, and an RC circuit. An output of the frequency generator is operable for application to a proximity sensor whose position relative to a target is to be verified. The RC circuit is chargeable via voltage applied to the proximity sensor by the frequency generator. The processing device is programmed to turn off the output of the frequency generator after a prescribed amount of time, and further programmed to measure a discharge time of the RC circuit after turning off the output of the frequency generator. The discharge time of the RC circuit is directly proportional to a perceived gap between a face of the proximity sensor and the target mechanism.
US08115495B2 Wired pipe signal transmission testing apparatus and method
A wired pipe signal transmission testing apparatus is provided. The apparatus includes a core having a plurality of threads formed on a surface thereof and a plurality of slots cutting through crests and roots of at least a portion of the threads, thereby creating an escape route for debris that may enter in between the threads. The apparatus includes an inductive transducer coupled to the core.
US08115492B2 Fuel gauging system and method thereof
A lighting system is provided that includes at least one lighting device, at least one connector, and a plurality of external power sources. The at least one lighting device includes at least one lighting source, and an internal power source applying a first electrical current to illuminate the at least one lighting element, wherein the internal power source supplies the first electrical current. The at least one connector electrically connects to the at least one lighting device. The plurality of external power sources include at least first and second external power sources that are adapted to be electrically connected to the at least one lighting device by the at least one connector. Further, a fuel gauging system and method detects an electrochemical composition of a power source, which can be at least one of the internal power source and the external power source, and then determines a state of charge of the power source based upon the determined electrochemical composition of the power source.
US08115480B2 Magnetic body detector
To provide a magnetic body detector as a means for warning that a magnetic body enters into a room where a strong magnet, such as an MRI diagnostic system, is installed, wherein a magnetic sensor can detect even a small magnetic body without being saturated even in an environment with strong magnetic flux density; and appropriate notification is provided to a user by arithmetic processing for inhibiting the detected value of a magnetic body that does not pass through a gate. By adjusting a solid angle formed with a detection axis of the magnetic sensor and a vertical axis or a horizontal axis to be within 15 degrees, a strong direct-current magnetic flux density to be applied to the detection axis is reduced; a small change in magnetic flux density due to the entry of a small magnetic body is detectable without saturation; the characteristics of a magnetic body that will not pass through the gate is extracted by the magnetic sensors arranged in the front, rear, left and right of the gate; and only a magnetic body in the vicinity that passes through the gate is regarded as a target for detection by inhibiting magnetic bodies that will not pass through the gate by calculation.
US08115476B1 Apparatus for providing energy usage and energy cost data for an electrical device
A power meter has a connector block with prongs for plugging the connector block into a wall socket and also has a socket for receiving the plug of a power cord of an electrical device. A display unit is tethered to the connector block such that values associated with energy usage of the electrical device may be shown on the display but remote from the wall socket. The power meter may calculate a cost associated with the energy usage of the device and display the cost information on the remote display.
US08115474B2 Multi-range electrical current measurement
An electrical current measurement system. A first low-range current gauge receives a current to be measured and provides a first intermediate value indicative of the amplitude of the current up to a first maximum current. A second low-range current gauge receives any portion of the current having a magnitude that exceeds the first maximum current and provides a second preliminary value indicative of the amplitude of the portion of the current having a magnitude that exceeds the first maximum current up to a second maximum current. An arithmetic unit or a digital processor receives the first intermediate value and the second preliminary value and provides a second intermediate value indicative of the amplitude of the current. A full-range current gauge may also be provided. A selector or the digital processor selects one of the values for display or other output.
US08115472B2 System and method for space control and remote monitoring
A system and method for space control and remote monitoring is disclosed. According to one embodiment, a frequency modulated signal is emitted from a radioscopic device having an antenna. The frequency of the reflected signal from a target is compared with the emitted frequency modulated signal to obtain a low-frequency signal. The low-frequency signal is processed to form signal pulsations spectrum using a fast Fourier transform. Each spectrum frequency represents a distance to the target.
US08115470B1 Broadband isotropic antenna
Broadband isotropic (omnidirectional) antenna typically comprising three orthogonal small size monopole antennas protruding through the centers of three adjacent sides of the small metal cube. Each antenna has the frequency correcting network and RF amplifier. Signals from all three antennas are commutated by the RF switch (multiplexer) and the output can be applied to any RF spectrum analyzer. It is shown that if spectrum analyzer sweeps at relatively slow rate or is used in max/hold mode, the resulting display is proportional to the magnitude of the electromagnetic field vector independent of the orientation of the monopole antennas with respect to the E-field direction. Another embodiment improves the circuit accuracy in case when one dominant RF signal is present. Also there is a disclosure of the technical details of the RF design that allow improved low noise antenna performance (signal blanker, synchronized with multiplexer control), and mechanical design of the PCB—triangle shape that coincides with diagonal plane of the antenna metal cube body which connects to the feed points of each of the 3 antennas yet is different from the plane of each of the 3 antennas, thus allowing all three antenna related circuits to be in one plane while being directly connected to the antenna feed points.
US08115467B2 DC-DC converter
A DC-DC converter has an error amplifier that amplifies a potential difference between a first voltage based on an output voltage at the output terminal and a reference voltage, and outputs a resultant error amplified signal; a differential detecting circuit that senses an inclination of a temporal change of the output voltage by differentiating the first voltage, outputs a control signal according to a result of the sensing; and a PWM generating circuit that compares a synthetic signal obtained by conducting computation on the amplified error signal and the control signal with a periodically changing comparison signal, and outputs a PWM signal having a duty ratio controlled according to a result of the comparison.
US08115463B2 Compensation of LDO regulator using parallel signal path with fractional frequency response
A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.
US08115460B2 Power conversion with zero voltage switching
A power converter constituted of: a control circuitry; a first electric coil; a first electronically controlled switch associated with the first electric coil and responsive to the control circuitry, the first electronically controlled switch arranged to charge the first electric coil responsive to a closed state of the first electronically switch; and a second electronically controlled switch arranged to present a substantially short circuit across the first electric coil when the second electronically controlled switch is closed, the second electronically controlled switch responsive to the control circuitry and not arranged to either charge or discharge the first electric coil.
US08115459B2 ESR zero estimation and auto-compensation in digitally controlled buck converters
One embodiment of the present invention is a digitally controlled DC-DC converter comprising of a power stage including at least one switch and an output capacitor. A digital controller can control the switching of the at least one switch. The digital controller can include logic to produce an indication related to a zero resulting from the equivalent series resistance (ESR) of the output capacitor and to update the control of the switching of the switch in the power stage based on the estimate.
US08115457B2 Method and apparatus for implementing a power converter input terminal voltage discharge circuit
A circuit to discharge a capacitance between input terminals of a power system is disclosed. An example circuit includes a control circuit coupled to an input of a power system. The control circuit is coupled to detect whether an electrical energy source is coupled to an input of the power system. A switch is also included and is coupled to the control circuit and to the input of the power system. The control circuit is coupled to drive the switch in a first operating mode when the electrical energy source is coupled to the input of the power system. The control circuit is coupled to drive the switch in a second operating mode when the electrical energy source is uncoupled from the input of the power system. A capacitance coupled between input terminals of the input of the power system is discharged through the switch to a threshold voltage in less than a maximum period of time from when the electrical power source is uncoupled from the input terminals of the power system.
US08115456B2 Circuit for a power supply unit for generating a DC voltage
A circuit is disclosed for a power supply unit for generating a DC voltage, the power supply unit having a current transformer, a rectifier, a series circuit including a first blocking diode and a charging capacitor, an electronic switch which is in parallel with the current transformer, a comparator, a voltage reference circuit for the comparator. In at least one embodiment, the circuit includes a circuit for monitoring the voltage across the charging capacitor. The comparator is used to control the electronic switch on the basis of the voltage across the charging capacitor in relation to the voltage which is generated by the voltage reference circuit and is applied to the comparator. In at least one embodiment, provision is made of a tap which is located between the rectifier and the first blocking diode and at which the circuit for monitoring the voltage across the charging capacitor is located. The circuit is in the form of an RC combination having a second blocking diode connected in series.
US08115454B2 Battery with an integrated voltage converter having a bypass circuit
Disclosed is a battery having an internally integrated voltage converter module. The battery includes at least one electrochemical cell having an internal bore, a voltage converter module electrically coupled to the at least one electrochemical cell and disposed within a portion of the internal bore, the voltage converter configured to convert a first voltage produced by the at least one electrochemical cell into a second, different voltage, a set of terminals being electrically coupled to the voltage converter, and a bypass circuit coupled between one of the terminals of the set of terminals and the at least one electrochemical cell to direct charging current applied from an external source to the at least one electrochemical cell.
US08115452B2 Bicycle battery connection system capacle of connecting different types of battery
A bicycle battery connection system includes a battery data determination circuit, a battery data processing circuit and an adapter. The battery data determination circuit is electrically connected to one of the first-type battery having an MCU and a second-type battery without an MCU through the adapter for enabling battery data of the connected battery to be processed by the battery data processing circuit and outputted as battery status for display on a display device in front of the user and for further battery output control. Thus, either a first-type battery or a second-type battery can be used and detected for automatic matching, and therefore the battery connection system allows a bicycle to use any of different types of batteries.
US08115441B2 On-line measurement of an induction machine's rotor time constant by small signal d-axis current injection
A controller continually updates rotor time constant estimation of an induction machine by interrogating the induction machine with a small signal oscillation and monitoring the response. The small signal oscillation is injected onto the d-axis current command signal, and is generated at a frequency that represents the most recent estimate of the rotor time constant (i.e., rotor time constant equal the inverse of the frequency). The controller monitors rotor flux generated in response to the small signal oscillation, and updates the most recent estimate of the rotor time constant based on the monitored rotor flux. This process is repeated continuously to allow for the continuous updating of the rotor time constant.
US08115435B2 Device for controlling a polyphase synchronous rotary electrical machine and polyphase synchronous rotary electrical machine containing such a device
A control device (2′″) for an AC-DC current converter associated with a polyphase synchronous rotary electrical machine. The AC-DC current converter contains, for each phase, a branch of two power switches in series, known as high and low (25). The control device (2′″) contains means of generating a signal (θ(t)) representing the angular position of the rotor. The control device contains one or more digital tables (20 H, 20 B) addressed by the signal of the angular position of the rotor (θ(t)) and delivering at their outputs binary control signals (200 H- 202 H, 200 B- 202 B), each controlling one branch of power switches (25).
US08115434B2 High-speed self-cascaded electric machine
An electric machine is disclosed comprising a first energy source, a second energy source, and a stator which comprises a first set of windings and a second set of windings. The electric machine has a rotor and a controller, the controller configured to control the first energy source to supply a first current to the first set of windings and control the second energy source to supply a second current to the second set of windings. The controller also detects an angular position of the rotor, detects the first current, detects the second current, and determines an optimum phase shift angle of the first current based on the angular position of the rotor, the first current, and the second current. The controller controls the first energy source based on the optimum phase shift angle to modify the first current supplied to the first set of windings.
US08115433B2 Electrical system for pulse-width modulated control of a power inverter using phase-shifted carrier signals and related operating methods
Systems and methods are provided for pulse-width modulated control of power inverter using phase-shifted carrier signals. An electrical system comprises an energy source and a motor. The motor has a first set of windings and a second set of windings, which are electrically isolated from each other. An inverter module is coupled between the energy source and the motor and comprises a first set of phase legs coupled to the first set of windings and a second set of phase legs coupled to the second set of windings. A controller is coupled to the inverter module and is configured to achieve a desired power flow between the energy source and the motor by modulating the first set of phase legs using a first carrier signal and modulating the second set of phase legs using a second carrier signal. The second carrier signal is phase-shifted relative to the first carrier signal.
US08115432B2 Triphase rotating electrical machine
A triphase rotating electric machine includes three coils evenly distributed around a rotational axes of the machine, and at least one first sensor, capable of generating a periodic signal to represent the position of the machine around the axle and a control circuit capable of controlling, when in the first mode, the conduction of a switch (KUH), linked to at least one of the three coils based on the periodic signal generated by the first sensor (U), such that the conduction phases of the switch (KUH) have a duration in the order of half the signal period (U). The control circuit is capable of controlling switch (KUH), based on a second mode in which the conduction phases of the switch (KUH) have a duration in the order of a third of the signal period (U).
US08115431B2 Inverter control apparatus and motor drive system
An inverter control apparatus that controls a three-phase inverter which transforms a direct-current voltage into an alternating three-phase voltage, the inverter control apparatus includes: a voltage command vector generation portion that generates a first voltage command vector for specifying a vector of a voltage to be applied to a three-phase load that is connected to the inverter; a voltage command vector correction portion that in performing overmodulation with the inverter, corrects the first voltage command vector by setting a limit onto a coordinate-axis component of the first voltage command vector on an ab coordinate system to generate a second voltage command vector, wherein the inverter is so controlled that a voltage depending on the second voltage command vector is applied to the load, and the ab coordinate system is a coordinated system that depending on a phase of the first voltage command vector with respect to a predetermined fixed axis on a two-dimensional fixed coordinate system, rotates in stepwise fashion for every 60 degrees in electrical angle with respect to the fixed coordinate system.
US08115428B2 Electric motor control
A control system for an electric motor is arranged to determine the position of the motor from at least one electrical parameter by means of a position determining algorithm. It is further arranged to monitor at least one algorithm parameter defined by the algorithm and if the monitored parameter meets a predetermined fault condition to generate a fault indication.
US08115427B2 Methods, systems, and devices for a motor control system
Systems, devices, and methods for controlling a motor are disclosed. A method may include determining a rotational direction of a motor from a pair of quadrature signals sent to a microprocessor. The method further includes adjusting an internal count stored in the microprocessor at each edge of each of the pair of quadrature signals. The method further includes adjusting an external count stored in the microprocessor and transmitting an interrupt to a main controller after a first phase signal and a second phase signal have transitioned through each combinational logic state in one of a forward rotational direction and a reverse rotational direction. The method further includes transmitting a signal comprising the rotational direction of the motor and the external count from the microprocessor to a main controller.
US08115426B2 Method and apparatus for connecting a photovoltaic system to a power grid
An apparatus and a method for preparing connection of a photovoltaic system (Q1) as a first energy source to a power grid (13) by way of a motor generator set (5, 6, 7) is presented. The DC motor (5) is coupled to a three-phase generator (7) by way of a shaft (6), wherein the three-phase generator (7) can be connected to the power grid (13). It has been observed that connecting this type of apparatus to the small or varying power output of the photovoltaic system (Q1) can be difficult and time-consuming. To enable a clean and quick connection, the DC motor (5) is powered with electric DC current from a second DC current source (Q2), wherein the operation of the three-phase generator (7) is matched to the conditions in the power grid (13) with the help of the second DC current source (Q2), and wherein the photovoltaic system (Q1) is connected to the DC motor (5) and the second DC current source (Q2) is disconnected from the DC motor (5) only after a complete match has been attained. This enables a quick and precise connection of the photovoltaic system (Q1) to the power grid (13) with defined parameters using the three-phase generator (7).
US08115424B2 Method and device for controlling the rotation speed of a piezoelectric motor rotor
The present invention relates to a method of controlling the speed of rotation of a piezoelectric motor comprising at least one step of determining the variation of the speed of rotation as a function of the frequency of the excitation voltages of the piezoelectric motor for the actual temperature of the piezoelectric material.
US08115423B2 Motor driving system and controlling method of the same
A plurality of current sensors are provided to correspond to a plurality of inverter circuits for driving a plurality of motor generators, respectively. Zero point adjustment of each current sensor is executed in a non-energized state recognized based on a stop of operation of the corresponding inverter circuit and when noise influence is determined to be small based on stops of operations of the other inverter circuits in the same casing. As a result, it is possible to avoid a risk of performing the zero point adjustment in a state in which an output of the current sensor is not exactly a value corresponding to zero current due to the noise influence from the other inverter circuits. In this way, it is possible to highly accurately execute the zero point adjustment of the current sensor for measuring motor driving current.
US08115420B2 Filament power supply circuit for vacuum fluorescent display
In a filament power supply circuit of a vacuum fluorescent display, an integration circuit is connected to a signal input terminal which receives a pulse signal having a magnitude corresponding to a DC power supply voltage. A comparison circuit compares an output voltage from the integration circuit with a reference voltage, and outputs a result. A first filament cathode connection terminal is connected to one terminal of the filament cathode of a vacuum fluorescent display and applies the DC power supply voltage to the one terminal. A second filament cathode connection terminal is connected to the other terminal of the filament cathode to ground the other terminal via a capacitive element. A three-terminal element includes first, second, and third terminals. The first terminal is connected to the first filament cathode connection terminal. The second terminal is grounded. The third terminal receives the output from the comparison circuit so that the path between the first terminal and the second terminal is switched in accordance with it.
US08115417B2 Color management system and method for LED backlights
Disclosed herein are embodiments of color management systems and methods for LED backlights. One exemplary system comprises: a collection device adapted to collect optical signals of the LED array, transform the optical signals into electric signals and send the electric signals; a control device connected with the collection device adapted to process the electric signals, compare processing results with calibration values and output brightness control signals according to comparison results; and a driver device connected with the control device adapted to adjust brightness of the LED array according to the brightness control signals. Embodiments of the disclosed technology can be used to effectively adjust the brightness of LED backlights and/or keep the color coordinate values of the backlights constant in order to help ensure display quality.
US08115413B2 Module for controlling light emitting diode current for selective feedback, apparatus and method for driving light emitting diodes using the same
The present invention provides a module for controlling an LED current for selective feedback, an apparatus and a method for driving LEDs using the same. The module for controlling the LED current, which is connected to a plurality of LED channels receiving driving powers supplied from at least one DC/DC converter and controls currents of the LED channels through a constant current, the LED current controlling module includes: an operation mode selector for selecting an operation mode according to an inputted enable signal level; a channel divider for dividing a plurality of LED channels into at least one group according to the selected operation mode; and a minimum voltage selector for selecting an LED channel with a minimum voltage, obtained by comparing voltages detected from each of lower ends of the LED channels included in each of one or more divided groups.
US08115411B2 LED lighting system
A light emitting diode lighting device and system that can be used for illuminating the interior and/or exterior of vehicles, aircraft, watercraft, signage or buildings is provided. It includes a voltage feedback constant current power supply circuitry and high power LEDs. The printed circuit assemblies are firmly mounted onto a continuous or semi-continuous mounting channel case that also works as a heat sink. By this means, it not only increases the reliability of the LED lighting tube but also it provides sufficient heat dissipation capability for the heat generated by the LEDs. Since the operating temperature of the LEDs is controlled and stays in cool condition, it dramatically increases the LED's lifetime and efficiency. The end caps of this LED lighting device are fully compatible with existing conventional fluorescent light fixtures and can directly replace those fluorescent lighting tubes in vehicles, mass-transit, watercrafts, aircrafts, signage, furniture, equipment or buildings with minimal modifications.
US08115409B2 Driving circuit and method of backlight module
A driving circuit includes a signal generator, a resonant circuit, a control circuit and an adjusting circuit. The signal generator is utilized for generating an alternating current (AC) signal having a fixed frequency. The resonant circuit is coupled to the signal generator, and is utilized for generating an oscillation signal to drive a backlight source according to the alternating current signal. The control circuit is utilized for providing a control signal. The adjusting circuit is coupled to the control circuit, the resonant circuit and the backlight source, and is utilized for providing an impedance according to the control signal to thereby adjust a current value of the backlight source.
US08115406B2 Fluorescent lamp driver circuit
A fluorescent lamp driver circuit is provided. The fluorescent lamp driver circuit uses reversed current detecting signal to achieve feedback control and circuit protection so as to simplify the driver circuit and reduces the number of the required electronic components. The driver circuit needs a single control unit to control the whole circuit, which not only reduces cost, but also simplifies circuit design.
US08115405B2 High pressure discharge lamp lighting device and luminaire using same
A high pressure discharge lamp lighting device includes a DC power source circuit; a power supply circuit for converting an output from the DC power source circuit into a square wave AC output to be supplied to a high pressure discharge lamp; a starting circuit for applying a high voltage output for lamp startup to the high pressure discharge lamp; a control circuit; and a half-wave discharge detection circuit for detecting a half-wave discharge. The detection circuit detects the half-wave discharge at an initial stage of the lamp startup and the control circuit controls the magnitude of a voltage of a square wave half period of one polarity having a load voltage of a larger magnitude and that of a square wave half period of the other polarity having a load voltage of a smaller magnitude to approximate to each other.
US08115401B2 Safety starter device
A safety starter circuit for a gas discharge lamp includes a series arrangement of a glow switch starter, a resistive element, and a thermally controlled switching element. The thermally controlled switching element is in a heat transfer relationship with the resistive element so that the thermally controlled switching element is effectively heated by heat generated in the resistive element. The thermally controlled switching element is designed to make a transition from a conductive state to a non-conductive state when its temperature exceeds a predetermined cut-off temperature. The thermally controlled switching element is arranged in a gas-tight casing.
US08115394B2 Headlamp controller
A headlamp controller includes: a headlamp unit configured to illuminate a front area of a vehicle with a light distribution pattern; an image capturing camera configured to capture an image of the front area; and a light distribution controller including: a road shape detecting unit configured to detect a road shape based on the captured image; a reference optical flow generating unit configured to generate a reference optical flow for a target object belonging to one of attributes based on the road shape; a bright point optical flow measuring unit configured to measure an optical flow of a bright point defined as a target in the captured image; and an attribute determining unit configured to compare the reference optical flow with the optical flow of the bright point and determine which one of the attributes the optical flow of the bright point belongs.
US08115392B1 Device for generation of microwaves
The invention relates to a device for generation of microwaves comprising a coaxial virtual cathode oscillator (1) with an outer cylindrical tube forming a cathode (2) and connected to a transmission line (8) for feeding the cathode (2) with voltage pulses, and an inner cylindrical tube, at least partially transparent for electrons, forming an anode (3) and connected to a transmission device (8) for outputting microwave radiation generated by the formation of a virtual cathode (4) inside an area enclosed by the anode. Through the introduction of a centre conductor (5) arranged to coincide with the centre axle (19) for the cathode's (2) outer cylindrical tube and in electrical connection with the tube a device for generation of microwaves is obtained having improved energy efficiency and better broadband performance.
US08115389B2 High pressure discharge lamp
To provide a high pressure discharge lamp in which no fusing of the metal foil occurs even if the high pressure discharge lamp is switched on for a certain time a high pressure discharge lamp is provided having a discharge vessel comprised of a light emission part and sealing parts made of glass connected to opposite ends of said light emission part; metal foils buried in a respective one of said sealing parts; a pair of electrodes comprised of core rods and tip end parts, said tip end parts being arranged oppositely to each other in the light emission part; and said core rods being melted and fused together with a respective one of the metals foils; wherein cavities are formed which reach from a surface of a respective one of the metal foils to an interior of the core rod, and the glass constituting said sealing part has entered into said cavities.
US08115387B2 Plasma display panel
A plasma display panel includes a first and a second plate facing each other via a discharge space. On the first plate, a first and a second bus electrode are provided which extend in a first direction and are disposed at intervals. In a cell, a first and a second display electrode are provided and coupled to the first and the second bus electrode respectively, and facing each other. In addition, on a dielectric layer covering the first and the second bus electrode and the first and the second display electrode, a plurality of address electrodes are provided which are disposed at respective positions facing first barrier ribs. Then, a protective layer is formed directly on the address electrodes and the dielectric layer, covering a surface of the dielectric layer and the address electrodes, and being exposed to the discharge space of the cell.
US08115384B2 LED source with hollow collection lens
A light source, includes an LED emitter and a meniscus lens having a hollow cavity in which the LED emitter is disposed. The meniscus lens is in exemplary embodiments hyperhemispheric, and it produces a high quality optical image of the LED emitter. The cavity of the lens is filled with air, such as terrestrial atmosphere, inert gas, or vacuum.
US08115381B2 Top-emission active matrix electroluminecient device
This invention provides a top-emission active matrix electroluminescent device including a substrate and a plurality of pixel areas formed within a display area of the substrate. Each of the pixel areas includes at least one sub-pixel area comprising at least, from top to bottom: a first conductive electrode layer, an electroluminescent layer, a second conductive electrode layer, a first reflective layer region, and a second reflective layer region. The first reflective layer region and second reflective layer region overlap each other in part. Some of the light rays emitted from the electroluminescent layer are reflected by the first reflective layer region and second reflective layer region, respectively, and are then directed upwards. The reflected light rays compensate the top-emitting light rays also emitted from the electroluminescent layer, reducing color shifts at different viewing angles due to the micro-cavity effect.
US08115380B2 Display device with chiplets
A display device includes: a substrate; one or more pixels arranged on the substrate, each pixel including a control electrode; a wiring layer located over the substrate, the wiring layer having a continuous line and a discontinuous pass-thru line formed therein. The active-matrix device includes at least one chiplet located over the substrate and including first, second, third, and control connection pads including; a control line electrically connecting the control connection pad to the control electrode; a first end of the discontinuous pass-thru line connected to the first connection pad and a second end of the discontinuous pass-thru line connected to the second connection pad; circuitry electrically connecting the first and second connection pads; and the continuous line electrically connected to the third connection pad, wherein the continuous line extends to opposite sides of the chiplet.
US08115379B2 Use of metal complexes as emitter in an organic light-emitting component and such a component
Electronic components are provided that include a metal complex containing 2-(3-thienyl)-pyridine ligands. The metal complex may be used as a triplet emitter, and the electronic components include organic light-emitting diodes (OLEDs). The OLEDs may contain 2-20% of the metal complex, by weight.
US08115378B2 Tetra-substituted chrysenes for luminescent applications
This invention relates to electroluminescent 3,6,9,12-tetrasubstituted chrysenes that are useful in electroluminescent applications. It also relates to electronic devices in which the active layer includes such a chrysene composition.
US08115373B2 Self-regenerating particulate trap systems for emissions and methods thereof
A method and system for treating emissions includes charging particles in an exhaust stream, producing one or more radicals, and oxidizing at least a portion of the charged particles with at least a portion of the produced radicals. At least a portion of the charged particles in the exhaust stream are then attracted on at least one attraction surface which is one of oppositely charged from the charged particles and grounded. The attracted particles are oxidized with another portion of the one or more produced radicals to self regenerate the at least one attraction surface. Downstream from where the attracted particles are oxidized, at least a portion of one or more first compounds in the exhaust stream are converted to one or more second compounds downstream from the attracting. Additionally, at least a portion of any remaining charged particles are oxidized into one or more gases.
US08115369B2 Lighting device
Disclosed is a lighting device. The lighting device includes: a substrate; a light emitting device disposed on the substrate; a heat radiating body radiating heat from the light emitting device; and a pad being interposed between the substrate and the heat radiating body and transferring heat generated from the light emitting device to the heat radiating body and comprising silicon of 10 to 30 wt %, a filler of 70 to 90 wt %, glass fiber of 2 to 7 wt % in terms of weight percent (wt %).
US08115364B2 Permanent magnet generator and wind power generator having a multi-stage rotor and stator
A permanent magnet power generator which, when used at an electric power generating facility such as a wind power plant, etc., would not be bulky and would not impede wind capture by a wind turbine; instead, it can raise the generated voltage without impeding wind capture has a generator shaft; at least three rotors, which are secured with the generator shaft, constituted by a plurality of plate-shaped structures having a permanent magnet attached thereto, and each disposed in the longitudinal direction of the generator shaft; and a stator, which is plate-shaped with a stator coil disposed in at least two gaps formed by the rotors, evenly-spaced apart from the generator shaft. The rotors and stators are disposed alternately in the longitudinal direction of the generator shaft, with a total of at least five stages. Also a wind power generator with a propeller on the shaft of this permanent magnet generator.
US08115359B2 Modular life extension kit for a wind turbine generator support frame
A modular life extension kit is configured to extend a useful life of a support frame for a wind turbine generator. The support frame includes a support member coupled to a support cross-member. The support member has a first length, and the support cross-member has a second length. The modular life extension kit includes a plurality of plates configured to be coupled to the support frame. At least a first plate of the plurality of plates has a first side configured to be coupled to the support member and a second side configured to be coupled to the support cross-member. The first side extends at least five percent of the first length and the second side extends at least five percent of the second length.
US08115356B2 Fluid dynamic bearing system
The invention relates to a fluid dynamic bearing system having a first conical bearing and a second conical bearing working in opposition to the first conical bearing, the conical bearings being disposed along a stationary shaft. The first conical bearing has a first bearing cone disposed on the shaft having bearing surfaces extending at an angle α to the rotational axis, and a first bearing bush having a tapered bearing bore and bearing surfaces that are separated by a first bearing gap filled with bearing fluid from the bearing surfaces of the first bearing cone. The second conical bearing has a second bearing cone disposed on the shaft having bearing surfaces extending at an angle β to the rotational axis, and a second bearing bush having a tapered bearing bore and bearing surfaces that are separated by a second bearing gap filled with bearing fluid from the bearing surfaces of the second bearing cone. According to the invention, the bearing surfaces of the first conical bearing are smaller in surface area than the bearing surfaces of the second conical bearing and the angle α is greater than the angle β.
US08115355B2 Polygon mirror scanner motor and method of manufacturing the same
The rotor of this polygon mirror scanner motor is composed of a rotor magnet provided in the inner wall of a rotor frame, a rotor boss having a circular tube part and provided in the rotor frame, and a polygon mirror mounted on the rotor boss. The stator is composed of a stator core formed by laminating magnetic members and disposed oppositely to the rotor magnet, a stator coil wound in the stator core, and an iron plate circuit board having a through-hole. A dynamic pressure bearing is composed by forming a dynamic pressure groove in either one of the shaft fixed in the through-hole by laser welding, and the circular tube part of the rotor boss, and the circular tube part of the rotor boss is supported by the shaft.
US08115348B2 Unit coil, coil assembly and coreless type linear motor
The present invention discloses a unit coil, a coil assembly and a coreless type linear motor. The unit coil includes bent subcoils arranged adjacent to one another and disposed on a non-acting side axially. The coil assembly includes tri-phase unit coil modules arranged in an operating direction, and the tri-phase unit coil module is composed of three identical unit coils alternately stacked and sealed by a resin layer, and the unit coil is formed by bending and stacking sub-coils. The bent sub-coils are stacked to a sufficient thickness or arranged to a sufficient width to achieve the desired driving force, and then a magnetic rail is provided to form a coreless type linear motor. In the aforementioned structure, the unit coil composed by an alternately overlapping layout method effectively reduces the required space of the coil assembly, and the sub-coils can be manufactured easily and will not be damaged easily.
US08115341B2 Power converter having airplane power source frequency detector
A power converter having an aircraft power source detector configured to limit the amount of power that can be drawn by the power converter when utilized in an aircraft. The power converter may detect an artifact of the aircraft power source, such as the 400 Hz ripple noise on an aircraft power line, or existing in the aircraft cabin, such EMI or aircraft lighting.
US08115340B2 System for controlling power from a photovoltaic array by selectively configurating connections between photovoltaic panels
A system for maximizing power output from a photovoltaic array includes a configurable photovoltaic panel having a series-parallel selector and a bypass selector electrically controlled by a node controller. Some embodiments further include a plurality of configurable photovoltaic modules. A configurable photovoltaic panel may selectively be electrically connected to other configurable photovoltaic panels in a series circuit, a parallel circuit, or a combination of series and parallel circuits according to switching states set by the node controller for the bypass selector and series-parallel selector. A number of configurable photovoltaic panels connected in series and a number connected in parallel may optionally be selected in response to a change in an output voltage from a photovoltaic array, for example a voltage change resulting from a change in illumination, thereby causing the output voltage from the photovoltaic array to be greater than or equal to a minimum input voltage for an inverter.
US08115339B2 Isolation control high speed transfer switch for uninterruptible power supply, power supply system using the switch and isolation control high speed transfer switching method
Disclosed is a UPS isolation control high speed transfer switch for switching a power supply path of a UPS to a bypass line and a power supply system equipped with the high speed transfer switch. The switch is isolated from the UPS and detects the output power of UPS, and switches a power supply path from a normal power line to the bypass line, by turning off the transfer switch of the bypass line after turning off an output breaker of a normal power line when the output power is deviated from a preset normal range. Furthermore, the switch performs a switching to the bypass line only when the output breaker of the UPS is actually turned off, after confirming the turn-off of the output breaker when switching the power supply path to the bypass line.
US08115336B1 Power saving circuit
A power saving circuit (PSC) may include a first circuit and a second circuit electrically coupled in series in a power sharing configuration. The PSC may further include a regulator that is electrically coupled to a first node between the first and second circuits. The regulator can supply current to the first node when the first circuit requires less current or the second circuit requires more current, and the regulator can remove current from the first node when the first circuit requires more current or the second circuit requires less current.
US08115334B2 Electrically driven power take-off system and method of manufacturing same
A system and method for operating power take-off (PTO) systems aboard hybrid and electric systems and vehicles is disclosed. The PTO system includes an energy storage device configured to supply electrical power and at least one electrical drive system electrically connected to the energy storage device to receive the electrical power, with each of the at least one electrical drive systems configured to convert the electrical power to a desired mechanical power. The PTO system also includes at least one PTO shaft mechanically connected to each of the at least one electrical drive systems that is driven by the mechanical power to generate a mechanical output, with the mechanical output of each of the at least one PTO shafts being independently controllable from the mechanical output of other PTO shafts.
US08115333B2 Wind turbine providing reduced radio frequency interaction and related methods
A wind turbine electrical generator may include a monopole tower extending upwardly from ground level. The wind turbine electrical generator may also include an electrical power generator carried by an upper end of the monopole tower and may include a horizontally extending drive shaft. The wind turbine electrical generator may further include a plurality of wind-driven blades carried by the horizontally extending drive shaft. The monopole tower may have an outer surface with a vertically extending outer corner therein defining a pair of adjacent vertical facets. The monopole tower may be positioned with the vertically extending outer corner aligned with the land-based radar site so that the pair of adjacent vertical facets reflects radar illumination away from the radar site to reduce an amount of the radar illumination reflected back to the land-based radar site.
US08115331B2 Wind turbine generator, active damping method thereof, and windmill tower
A wind turbine generator, an active damping method thereof, and a windmill tower in which vibrations of the wind turbine generator itself or the windmill tower can be reduced at low cost are provided. The acceleration due to vibrations of a nacelle is detected with an accelerometer attached to the nacelle. In an active damping unit, a pitch angle of windmill blades for generating a thrust on the windmill blades so as to cancel out the vibrations of the nacelle is calculated on the basis of the acceleration, and the pitch angle is output as a blade-pitch-angle command δθ* for damping. On the other hand, in a pitch-angle control unit, a pitch angle of the windmill blades for controlling the output to be a predetermined value is calculated, and the pitch angle is output as a blade-pitch-angle command θ* for output control. The blade-pitch-angle command δθ* for damping is combined with the blade-pitch-angle command θ* for output control using a subtracter. The pitch angle of the windmill blades is controlled on the basis of the resulting blade-pitch-angle command after combining.
US08115330B2 Wind turbine and method for operating a wind turbine
The present disclosure relates to a method for operating a wind turbine, the wind turbine comprising a wind rotor having at least one rotor blade and a generator connected to the wind rotor, wherein the generator is adapted to be connected to a grid, wherein the method comprises: adjusting at least one wind turbine parameter to increase the rotational speed of the wind rotor; increasing the rotational speed of the wind rotor; during increasing of the rotational speed of the wind rotor determining if the wind turbine would exceed a predetermined amount of energy to be fed into the grid at the actual wind rotor rotational speed; and during increasing of the rotational speed of the wind rotor connecting the wind turbine to the grid if determining that the wind turbine would exceed the predetermined amount of energy to be fed into the grid. Further, the present disclosure relates to a wind turbine comprising a wind rotor, wherein the wind rotor is mechanically connected to a generator for transmitting the rotational power of the wind rotor having at least one rotor blade to the rotor of the generator, wherein the output current of the generator is adapted to be selectively connected to a grid by a circuit breaker, the wind turbine further comprising a control device adapted to close or to trip the circuit breaker, wherein the control device is adapted to perform the method disclosed herein.
US08115328B2 Weld setting based engine-driven generator control system and method
A system and method are provided for controlling an internal combustion engine driving a generator/welder or a stand-alone generator. The engine and/or the generator is controlled based upon settings for welding. Controlling the engine may include altering the engine speed based upon a detected demand on the generator and/or operating parameters of a welder.
US08115327B2 Adjusting voltage provided by battery within portable electronic device
There is provided a portable electronic device capable of being immediately operated without the use of a battery even when the battery reaches exhaustion. An electricity generating unit 131 is embedded in the portable electronic device. The electricity generating unit 131 has a mechanism to pull out a pull line 113 wound around a pulley 135 to wind up a spiral spring 133 and a mechanism to transfer torque occurring when the spiral spring 133 is released and to rotate the motor at high speed. An output voltage from the motor 142 is adjusted and smoothed by a constant voltage circuit and is directly supplied as power to power consuming components. The portable electronic device connecting two flips can wind up the spiral spring 133 by opening and closing the two flips.
US08115326B2 Flexible substrates having a thin-film barrier
Methods and apparatus provide for: applying an inorganic barrier layer to at least a portion of a flexible substrate, the barrier layer being formed from a low liquidus temperature (LLT) material; and sintering the inorganic barrier layer while maintaining the flexible substrate below a critical temperature.
US08115323B2 Semiconductor package and method of manufacturing the semiconductor package
A semiconductor package and a method of manufacturing the package are provided. The semiconductor package comprises: a mounting substrate including a bond finger; at least one semiconductor chip disposed on the mounting substrate, the semiconductor chip including a bonding pad; a first molding member disposed on the mounting substrate so as to cover the bond finger and the bonding pad, the first molding member including an interconnection path disposed inside the first molding member so as to connect the bond finger to the bonding pad; a conductive element disposed in the interconnection path; and a second molding member overlying the first molding member. The interconnection path can be formed by a laser process. The conductive element can be formed by conductive nanoparticles or metal wires.
US08115319B2 Flip chip package maintaining alignment during soldering
Disclosed is a flip chip package maintaining alignment during soldering, primarily comprising a chip and a substrate. A plurality of bumps and at least an extruded alignment key are disposed on the active surface of the chip. The substrate has a plurality of bonding pads and at least an alignment base where the alignment base has a concaved alignment pattern corresponding to the extruded alignment key. When the chip is disposed on the substrate, the extruded alignment key is embedded into the concaved alignment pattern to achieve accurately align the bumps to the corresponding bonding pads. Therefore, even with the mechanical misalignment due to the accuracy of flip-chip die bonders and the transportation during reflow processes, the bumps of a chip still can accurately align to the bonding pads of the substrate to achieve accurate soldering which is especially beneficial to the mass production of MPS-C2 products.
US08115318B2 Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method
In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.
US08115312B2 Semiconductor device having a through electrode
A semiconductor device 1 has a semiconductor chip 10. The semiconductor chip 10 is constituted as having a semiconductor substrate 12 and an interlayer insulating film 14 on the semiconductor substrate 12. The semiconductor substrate 12 has a plurality of through electrodes 22 (first through electrodes) and a plurality of through electrodes 24 (second through electrodes) formed therein. On the top surface S1 (first surface) of the semiconductor chip 10, there are provided connection terminals 32 (first connection terminals) and connection terminals 34 (second connection terminals). The connection terminals 32, 34 are connected to the through electrodes 22, 24, respectively. The connection terminals 32 herein are disposed at positions overlapping the through electrodes 22 in a plan view. On the other hand, the connection terminals 34 are disposed at positions not overlapping the through electrodes 24 in a plan view.
US08115309B2 Semiconductor device
A semiconductor device including: a semiconductor chip having a rectangular surface on which a plurality of electrodes are formed; a plurality of resin protrusions formed on the surface of the semiconductor chip; and a plurality of interconnects each of which is electrically connected to one of the electrodes and includes an electrical connection section disposed on one of the resin protrusions. At least part of the resin protrusions are disposed in a region near a short side of the surface and extend in a direction which intersects the short side.
US08115307B2 Embedding device in substrate cavity
An embodiment of the present invention is a technique to reduce interconnect length between devices. A cavity is formed in a substrate having a substrate surface. The cavity has a depth. A first device having a device surface and a thickness is placed into the cavity. The thickness matches the depth such that the device surface is approximately planar with the substrate surface. The first device is attached to a second device via bumps on the second device.
US08115305B2 Integrated circuit package system with thin profile
An integrated circuit package system is provided including attaching an external interconnect on a tape; attaching a backside element on the tape adjacent to the external interconnect; attaching an integrated circuit die with the backside element, the backside element is on a first passive side of the integrated circuit die; connecting a first active side of the integrated circuit die and the external interconnect; and forming a first encapsulation over the integrated circuit die with the backside element exposed.
US08115303B2 Semiconductor package structures having liquid coolers integrated with first level chip package modules
Semiconductor package structures are provided which are designed to have liquid coolers integrally packaged with first level chip modules. In particular, apparatus for integrally packaging a liquid cooler device within a first level chip package structure include structures in which a liquid cooler device is thermally coupled directly to the back side of an integrated circuit chip flip-chip mounted on flexible chip carrier substrate. The liquid cooler device is mechanically coupled to the package substrate through a metallic stiffener structure that is bonded to the flexible package substrate to provide mechanical rigidity to the flexible package substrate.
US08115300B2 Wiring substrate and manufacturing method thereof, and semiconductor apparatus
In a semiconductor apparatus, a semiconductor element is mounted on a wiring substrate. Wiring patterns and protrusions are formed on a surface of a substrate with the wiring patterns extending on tops of the protrusions. The surface of the substrate on which the wiring patterns are formed are covered with an insulating layer. Surfaces of connection parts of the wiring patterns formed on the tops of the protrusions are formed with the surfaces of the connection parts exposed to a surface of the insulating layer on a level with the surface of the insulating layer or in a position lower than the surface of the insulating layer. The connection parts are formed as pads for connection formed in alignment with connection electrodes of the semiconductor element. The semiconductor element is mounted by making electrical connection to the connection parts by flip chip bonding.
US08115297B2 Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same
The present invention comprises a first substrate with a die formed on a die metal pad, a first and a second wiring circuits formed on the surfaces of the first substrate. A second substrate has a die opening window for receiving the die, a third wiring circuit is formed on top surface of the second substrate and a fourth wiring circuit on bottom surface of the second substrate. An adhesive material is filled into the gap between back side of the die and top surface of the first substrate and between the side wall of the die and the side wall of the die receiving through hole and the bottom side of the second substrate. During the formation, laser is introduced to cut the backside of the first substrate and an opening hole is formed in the first substrate to expose a part of the backside of the Au or Au/Ag metal layer of chip/die.
US08115291B2 Semiconductor package
Provided is a semiconductor package including a first substrate including a first substrate pad and a second substrate pad spaced apart from each other, first semiconductor chips stacked on the first substrate and having a first side surface and a second side surface, first chip pads disposed on the first substrate pad and adjacent to the first side surface and provided to the respective first semiconductor chips in the peripheral circuit region and electrically connected to the first substrate pad, and a second semiconductor chip disposed toward the second side surface and including a second chip pad spaced apart from the first chip pad and electrically connected to the second substrate pad, and a heat insulation member provided to the first substrate between the at least one first substrate pad and the at least one second substrate pad.
US08115288B2 Lead frame for semiconductor device
A lead frame for reducing detrimental effects of burr formation includes a lead frame that has leads where a portion of a top surface is removed from a first lead and a portion of a bottom surface is removed from a second lead adjacent to the first lead to reduce spacing between leads while reducing the detrimental effects of burr formation, such as shorting and the like, caused during singulation of a semiconductor device manufactured with the lead frame.
US08115277B2 Integrated circuit having a material structured by a projection
A method of making an integrated circuit including structuring a material. The method includes providing an arrangement of three-dimensional bodies. The material is arranged between the bodies and structured directed radiation. The projection pattern of the three-dimensional bodies is transferred into the material. The structured material connects at least two of the three-dimensional bodies.
US08115276B2 Integrated circuit system employing back end of line via techniques
An integrated circuit system that includes: providing a substrate including front-end-of-line circuitry; forming a first metallization layer over the substrate and electrically connected to the substrate; forming a viabar or a via group over the first metallization layer; and forming a second metallization layer over the first metallization layer and electrically connected to the first metallization layer through either the viabar or the via group.
US08115274B2 Fuse structure and method for manufacturing same
A fuse structure includes a substrate, a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface, a metallization layer on the substrate disposed on a side of the fuse conductive trace facing away from the first chip surface, and a planar barrier multilayer assembly disposed between the fuse conductive trace and the metallization layer and including multiple barrier layers of different materials, wherein the fuse conductive trace, the metallization layer and the barrier multilayer assembly are arranged such that when cutting the fuse conductive trace and the barrier multilayer assembly, a first area of the metallization layer is electrically isolated from a second area of the metallization layer.
US08115270B2 Electrostatic discharge protection method and device for semiconductor device including an electrostatic discharge protection element providing a discharge path of a surge current
An electrostatic discharge protection device includes a first bipolar transistor having a collector terminal connected with a first power supply terminal, an emitter terminal connected with the input/output terminal, and a base terminal connected with a second power supply terminal, a second bipolar transistor having a collector terminal connected with the second power supply terminal, an emitter terminal connected with the input/output terminal, and a base terminal connected with the first power supply terminal, one of the first and second bipolar transistors ensuring a continuity between the collector terminal and emitter terminal under such conditions that a potential difference between the first or second power supply terminal and the input/output terminal is lower than a breakdown voltage at a PN junction between the emitter terminal and the base terminal of the other bipolar transistor.
US08115268B2 Solid-state imaging device with channel stop region with multiple impurity regions in depth direction and method for manufacturing the same
Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
US08115267B2 Semiconductor device and fabrication method of the same
A semiconductor device which comprises an SOI substrate having an insulating layer between a semiconductor substrate layer and a semiconductor layer in a surface of which a semiconductor element is formed, and at least one external terminal provided, via an insulating film, on a surface of the semiconductor substrate layer and electrically connected to the semiconductor element. The semiconductor device further comprises a contact portion constituted by a conductive film reaching through the insulating film to electrically connect to the semiconductor substrate layer; and a potential fixing electrode provided, via the insulating film, on the surface of the semiconductor substrate layer and connected to the contact portion.
US08115258B2 Memory devices having diodes and resistors electrically connected in series
A non-volatile memory devices includes: a substrate including a circuit device and a metal line electrically connected with the circuit device; a diode connected with the metal line in a vertical direction with respect to a surface of the substrate, and including a metal layer disposed on a lower part of the diode facing the surface of the substrate; and a resistor electrically connected with the diode in series.
US08115254B2 Semiconductor-on-insulator structures including a trench containing an insulator stressor plug and method of fabricating same
A stack pad layers including a first pad oxide layer, a pad nitride layer, and a second pad oxide layer are formed on a semiconductor-on-insulator (SOI) substrate. A deep trench extending below a top surface or a bottom surface of a buried insulator layer of the SOI substrate and enclosing at least one top semiconductor region is formed by lithographic methods and etching. A stress-generating insulator material is deposited in the deep trench and recessed below a top surface of the SOI substrate to form a stress-generating buried insulator plug in the deep trench. A silicon oxide material is deposited in the deep trench, planarized, and recessed. The stack of pad layer is removed to expose substantially coplanar top surfaces of the top semiconductor layer and of silicon oxide plugs. The stress-generating buried insulator plug encloses, and generates a stress to, the at least one top semiconductor region.
US08115253B2 Ultra high voltage MOS transistor device
An ultra high voltage MOS transistor device includes a substrate having a first conductive type, a first well having a second conductive type and a second well having the first conductive type formed in the substrate, a drain region having the second conductive type formed in the first well, a source region having the second conductive type formed in the second well, a first doped region having the first conductive type formed between the second well and the substrate, an insulating layer formed in a first recess in the first well, a gate formed on the substrate between the source region and the first well, and a recessed channel region formed in the substrate underneath the gate.
US08115252B2 Elimination of gate oxide weak spot in deep trench
A MOSFET with a 0.7˜2.0 micrometers deep trench is formed by first carrying out a processing step of opening a trench in a semiconductor substrate. A thick insulator layer is then deposited in the trench such that the film at the bottom of the trench is much thicker than the sidewall of the trench. The insulator layer at the sidewall is then removed followed by the creation of composite dual layers that form the Gate Oxide. Another embodiment has the insulator layer deposited after Gate Oxide growth and stop at a thin Nitride layer which serves as stop layer during insulator pullback at trench sidewall and during Polysilicon CMP. Embodiments of the present invention eliminates weak spot at trench bottom corner encountered when Gate Oxide is grown in a 0.2 micrometers deep trench with thick bottom oxide. The present invention also maintains good control of the shape of the trench and the thickness profile of the Gate Oxide
US08115250B2 Semiconductor device and manufacturing method of the same
Disclosed herein is a semiconductor device including: a first conductivity type semiconductor base body; a first conductivity type pillar region; second conductivity type pillar regions; element and termination regions provided in the first and second conductivity type pillar regions, transistors being formed in the element region, and no transistors being formed in the termination region; body regions; a gate insulating film; gate electrodes; source regions; and body potential extraction regions, wherein voids are formed in the second conductivity type pillar regions of the termination region.
US08115249B2 Nonvolatile semiconductor memory device and method for manufacturing the same
In a nonvolatile semiconductor memory device, a tunnel insulating layer, a charge storage layer and a charge block layer are formed on a silicon substrate in this order, and a plurality of control gate electrodes are provided above the charge block layer. Moreover, a cap layer made of silicon nitride is formed between the charge block layer and each of the control gate electrode, the cap layer being divided for each gate control electrode.
US08115248B2 Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, and a nonvolatile memory cell provided on the semiconductor substrate, the nonvolatile memory cell including a tunnel insulating film provided on a surface of the semiconductor substrate, the tunnel insulating film including semiconductor grains, the semiconductor grains included in both end portions of the tunnel insulating film having smaller grain size than the semiconductor grains included in other portions of the tunnel insulating film, a charge storage layer provided on the tunnel insulating film, an insulating film provided on the charge storage layer, and a control gate electrode provided on the insulating film.
US08115247B2 Non-volatile semiconductor memory device having an erasing gate
A non-volatile semiconductor memory device includes a floating gate formed above a semiconductor substrate; an erasing gate formed above the floating gate; a control gate formed above a channel region of a surface layer of the semiconductor substrate at a position corresponding to one lateral side of the floating gate and the erasing gate; a first diffusion layer formed on the semiconductor substrate at a position corresponding to another lateral side of the floating gate and the erasing gate; a plug formed above the first diffusion layer, the plug coupled to the first diffusion layer; and a second diffusion layer formed on the semiconductor substrate at a position adjacent to the control gate.
US08115241B2 Solid state imaging apparatus and method for fabricating the same
A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.
US08115237B2 Solid-state image pickup element and solid-state image pickup device having a transfer electrode formed on the entire sidewall of a hole
A solid-state image pickup element comprises a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer, a hole portion formed in the first-conductive type planar semiconductor layer to define a hole therein, and a first-conductive type high-concentration impurity region formed in a bottom wall of the hole portion. The solid-state image pickup element also includes a first-conductive type high-concentration impurity-doped element isolation region, a second-conductive type photoelectric conversion region, a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film, a second-conductive type CCD channel region, and a read channel formed in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.
US08115235B2 Modulation-doped halo in quantum well field-effect transistors, apparatus made therewith, and methods of using same
A quantum well (QW) layer is provided in a semiconductive device. The QW layer is provided with a beryllium-doped halo layer in a barrier structure below the QW layer. The semiconductive device includes InGaAs bottom and top barrier layers respectively below and above the QW layer. The semiconductive device also includes a high-k gate dielectric layer that sits on the InP spacer first layer in a gate recess. A process of forming the QW layer includes using an off-cut semiconductive substrate.
US08115231B2 Semiconductor device
A semiconductor device includes an insulating film formed over a semiconductor substrate, a Zener diode formed above the insulating film, an interlayer film formed above the Zener diode, and a gate aluminum and a source aluminum formed above the interlayer film. The Zener diode is connected between the gate aluminum and the source aluminum. The Zener diode is formed by alternately joining an N type region and a P type region concentrically. The gate electrode includes a gate pad section. A planar shape of the Zener diode is substantially similar to a planer shape of the gate pad section. The gate pad section extends for a predetermined distance from an outermost edge of the P type region of the Zener diode to outside.
US08115226B2 Low optical loss electrode structures for LEDs
An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an dielectric material formed intermediate the electrode and a light emitting semiconductor material. Electrical continuity between the semiconductor material and the metal electrode is provided by an optically transmissive ohmic contact layer, such as a layer of Indium Tin Oxide. The metal electrode thus can be physically separated from the semiconductor material by one or more of the dielectric material and the ohmic contact layer. The dielectric layer can increase total internal reflection of light at the interface between the semiconductor and the dielectric layer, which can reduce absorption of light by the electrode. Such LED can have enhanced utility and can be suitable for uses such as general illumination.
US08115221B2 Single crystal nitride semiconductor material on conductive substrate using substrate decomposition prevention layer for nitride light emitting device
A light-emitting device is provided with a substrate decomposition prevention layer using as a matrix at least one selected from the group consisting of boron nitride (B—N), silicon carbide (Si—C), and silicon carbon nitride (Si—C—N), and patterned into a predetermined shape; an n-type nitride clad layer formed on the substrate decomposition prevention layer; a nitride active layer formed on the n-type nitride clad layer; a p-type nitride clad layer formed on the nitride active layer; a p-type ohmic contact layer formed on the p-type nitride clad layer; a p-type electrode pad formed on the p-type ohmic contact layer; an n-type ohmic contact layer electrically connected to the n-type nitride clad layer by means of a patterned region of the substrate decomposition prevention layer; and an n-type electrode pad formed beneath the n-type ohmic contact layer.
US08115220B2 Vertical light emitting diode and method of manufacturing the same
Provided is a vertical LED including an n-electrode; an n-type GaN layer formed under the n-electrode, the n-type GaN layer having a surface coming in contact with the n-electrode, the surface having a Ga+N layer containing a larger amount of Ga than that of N; an active layer formed under the n-type GaN layer; a p-type GaN layer formed under the active layer; a p-electrode formed under the p-type GaN layer; and a structure support layer formed under the p-electrode.
US08115218B2 Light emitting diode package structure and method for fabricating the same
A light emitting diode (LED) package structure includes a carrier, a first protrusion, a LED chip, and an adhesion layer. The first protrusion is disposed on the carrier and has a first opening to expose the carrier. The LED chip is disposed in the first opening on the carrier, and a ratio between a width of the first opening and a width of the LED chip is 1˜1.5. The adhesion layer is disposed between the LED chip and the carrier to bond the LED chip to the carrier.
US08115217B2 Systems and methods for packaging light-emitting diode devices
Embodiments disclosed herein provide packaged LED devices in which the majority of the emitted light comes out the top of each LED chip with very little side emissions. Because light only comes out from the top, phosphor deposition and color temperature control can be significantly simplified. A package LED may include a housing positioned on a supporting submount, sized and dimensioned to accommodate a single LED chip or an array of LED chips. The LED chip(s) may be attached to the submount utilizing the Gold-to-Gold Interconnect (GGI) process or solder-based approaches. In some embodiments, phosphor may be deposited on top of the LED chip(s) or sandwiched between glass plates on top of the LED chip(s). The phosphor layer may be inside or on top of the housing and be secured to the housing utilizing an adhesive. The housing may be adhered to the submount utilizing a thermal epoxy.
US08115215B2 Array substrate and method for manufacturing the same
An array substrate is disclosed. The array substrate comprises a substrate, a gate metal layer, a gate insulation layer, a semiconductor layer, a patterned metal layer, a flat layer, and a pixel electrode. The patterned metal layer is disposed on the surface of the semiconductor layer comprising a source and a drain, and on the surface of the gate insulation layer comprising a storage capacitor line and a data line. The storage capacitor line has an extending portion parallel to a scan line. The pixel electrode overlaps parts of the scan line, parts of the data line, parts of the storage capacitor line, and parts of the extending portion. A method for manufacturing the array substrate is also provided.
US08115214B2 Light emitting diode package and method of manufacturing the same
Provided is a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes a package main body with a cavity, a plurality of light emitting diode chips, a wire, and a plurality of lead frames. The plurality of light emitting diode chips are mounted in the cavity. The wire is connected to an electrode of at least one light emitting diode chip. The plurality of lead frames are formed in the cavity, and at least one lead frame is electrically connected to the light emitting diode chip or a plurality of wires.
US08115211B2 Silicon carbide semiconductor device and manufacturing method thereof
An objective is to provide a manufacturing method of a silicon carbide semiconductor device in which an electric field applied to a gate oxide film can be relaxed and thereby reliability can be ensured, and by the manufacturing method increase of the manufacturing cost can also be prevented as much as possible. Well regions, channel regions, and gate electrodes are formed so that, given that extending lengths, with respect to the inner sides of source regions, of each of the well regions, the channel regions, and the gate electrodes are Lwell, Lch, and Lg, respectively, a relationship of Lch
US08115210B2 Semiconductor display device
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from escaping into a film or electrode adjacent to the interlayer insulating film. A TFT is formed and then a nitrogen-containing inorganic insulating film that transmits less moisture compared to organic resin film is formed so as to cover the TFT. Next, organic resin including photosensitive acrylic resin is applied and an opening is formed by partially exposing the organic resin film to light. The organic resin film where the opening is foamed, is then covered with a nitrogen-containing inorganic insulating film which transmits less moisture than organic resin film does. Thereafter, the gate insulating film and the two layers of the nitrogen-containing inorganic insulating films are partially etched away in the opening of the organic resin film to expose the active layer of the TFT.
US08115209B2 Dual gate layout for thin film transistor
A dual gate layout of a thin film transistor of liquid crystal display to alleviate dark current leakage is disclosed. The layout includes (1) a polysilicon on a substrate having a L-shaped or a snake shaped from top-view, which has a heavily doped source region, a first lightly doped region, a first gate channel, a second lightly doped region, a second gate channel, a third lightly doped region and a heavily doped drain region formed in order therein; (2) a gate oxide layer formed on the polysilicon layer and the substrate, (3) a gate metal layer then formed on the gate oxide layer having a scanning line and an extension portion with a L-shaped or an I-shaped. The gate metal intersects with the polysilicon layer thereto define the forgoing gate channels. Among of gate channels, at least one is along the signal line, which is connected to the source region through a source contact.
US08115208B2 Image display system and manufacturing method thereof
An image display system and manufacturing method are disclosed. According to the present invention, the image display system comprises a substrate, a switching TFT, a driving TFT, a photo sensor and a capacitor. A buffer layer is formed on a substrate. A separation layer is formed in a first area for forming a switching TFT, but no heat sink layer is formed thereon. A heat sink layer is formed on a second area for forming the driving TFT, the photo sensor and the capacitor, and then, the separation layer is formed thereafter. The present invention can form poly silicon layers with different crystal grain sizes on the first area and on the second area in a single laser crystallization process by utilizing the heat sink phenomenon of ELA with or without the heat sink layer. Therefore, the image display system of the present invention can operate with good luminance uniformity.
US08115204B2 Photo elements and image displays
An exemplary embodiment of a photo element comprises a first line, a second line, a switch transistor, and a photo transistor. The switch transistor has a first electrode, a second electrode, and a first gate. One of the first electrode and the second electrode is electrically coupled to the first line, and the first gate is electrically coupled to the second line. The photo transistor is electrically coupled to the switch transistor and arranged to detect light. The photo transistor has a third electrode, a fourth electrode, and a second gate. At least one of the switch transistor and the photo transistor is an asymmetric transistor.
US08115201B2 Semiconductor device with oxide semiconductor formed within
One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.
US08115198B2 Array of differentiated FETS having a nanotube or nanowire channel and corresponding electronic device, for the detection of analytes
In an array R of field-effect transistors for detecting analytes, each transistor of the array comprises a gate G, a semiconductor nanotube or nanowire element NT connected at one end to a source electrode S and at another end to a drain electrode D, in order to form, at each end, a junction J1, J2 with the channel. At least transistors FET1,1, FET1,2 of the array are differentiated by a different conducting material (m1, m2) of the source electrode S and/or drain electrode D.
US08115196B2 High performance SiGe:C HBT with phosphorous atomic layer doping
A base structure for high performance Silicon Germanium:Carbon (SiGe:C) based heterojunction bipolar transistors (HBTs) with phosphorus atomic layer doping (ALD) is disclosed. The ALD process subjects the base substrate to nitrogen gas (in ambient temperature approximately equal to 500 degrees Celsius) and provides an additional SiGe:C spacer layer. During the ALD process, the percent concentrations of Germanium (Ge) and carbon (C) are substantially matched and phosphorus is a preferred dopant. The improved SiGe:C HBT is less sensitive to process temperature and exposure times, and exhibits lower dopant segregation and sharper base profiles.
US08115194B2 Semiconductor device capable of providing identical strains to each channel region of the transistors
A semiconductor device including transistors and strain layers is provided. Each transistor includes a source region and a drain region on a substrate and a gate structure on a channel region between the source region and the drain region. Lengths of the channel regions of these transistors are the same, but at least one source or drain region has a width along a channel length direction and the width is different from widths of other source or drain regions. The strain layers include first and second strain layers embedded separately at two sides of each gate structure in the substrate. A first width of each first strain layer along the channel length direction is the same, and a second width of each second strain layer along the channel length direction is the same.
US08115193B2 Vertical resonator type light emitting diode
A novel vertical resonator type light emitting diode of which has a simplified structure of the reflector layer of its light emitting side an which is resistant to declination of its emission output power towards a high temperature range, has an active layer 5, and a first reflector layer 3 at its light reflecting side and a second reflector layer 9 at its light emitting side which are formed to sandwich the active later 5 between them, wherein each of the first reflector layer 3 and the second reflector layer 9 is structured to comprise a plurality of pairs of two alternate semiconductor layers formed which are different from each other in refractive index, and the second reflector layer 9 has a number of such pairs which is not less than 1/10 and not more than ⅓ of that which said first reflector layer 3 has. The emission output power can be enhanced when the first reflector layer has a number of such pairs which is not less than 11 and not more than 41.
US08115190B2 Nanowires
An apparatus and a method of manufacturing the apparatus. The apparatus includes a main nanowire and branch nanowires emanating from the main nanowire. The main nanowire may have a first portion and a second portion. The first portion may have a first carrier concentration and the second portion may have a second carrier concentration, different to the first carrier concentration. Each branch nanowire may emanate from the first portion of the main nanowire. Each branch nanowire may emanate from the main nanowire at a substantially fixed distance along a length of the main nanowire.
US08115180B2 Processing system
A processing system includes a particle beam column for generating a particle beam directed to a first processing location; a laser system for generating a laser beam directed to a second processing location located at a distance from the first processing location; and a protector including an actuator and a plate connected to the actuator. The actuator is configured to move the plate between a first position in which it protects a component of the particle beam column from particles released from the object by the laser beam and a second position in which the component of the particle beam column is not protected from particles released from the object by the laser beam.
US08115177B2 Radiation detection apparatus and radiation imaging system
A radiation detection apparatus has a sensor panel including a photoelectric conversion unit with a plurality of photoelectric conversion elements over a substrate, a wavelength converter, disposed over the photoelectric conversion unit of the sensor panel, for converting a radiation into light detectable by the photoelectric conversion element, a plane shaped light emitting body for emitting light to the photoelectric conversion unit of the sensor panel, disposed over the wavelength converter, and a protective layer disposed on the plane shaped light emitting body.
US08115174B2 Edge-on SAR scintillator devices and systems for enhanced SPECT, PET, and compton gamma cameras
The invention provides methods and apparatus for detecting radiation including x-ray, gamma ray, and particle radiation for nuclear medicine, radiographic imaging, material composition analysis, high energy physics, container inspection, mine detection and astronomy. The invention provides detection systems employing one or more detector modules comprising edge-on scintillator detectors with sub-aperture resolution (SAR) capability employed, e.g., in nuclear medicine, such as radiation therapy portal imaging, nuclear remediation, mine detection, container inspection, and high energy physics and astronomy. The invention also provides edge-on imaging probe detectors for use in nuclear medicine, such as radiation therapy portal imaging, or for use in nuclear remediation, mine detection, container inspection, and high energy physics and astronomy.
US08115166B2 Method of controlling mass spectrometer and mass spectrometer
A method of controlling a mass spectrometer comprises the steps of: supplying a current to a cathode electrode of an ion source having the cathode electrode and an anode electrode, and ionizing a molecules of a gas to be measured; selecting ions generated in the ion source by mass-to-charge ratio; and detecting an ion current value of the selected ions. When a partial pressure of the gas to be measured is measured based on a detection result of the ion current value, a cathode current is supplied to the cathode electrode such that an emission current flowing between the cathode electrode and the anode electrode becomes constant. When a partial pressure of the gas to be measured is not measured, a constant current having a current value less than that of the cathode current is supplied to the cathode electrode.
US08115163B2 Encoder having oil mist prevention structure
An encoder having an oil mist prevention structure includes: an encoding body including a cylindrical base, a light emitter and a secondary encoding piece; an oil-containing bearing received and fixed in the cylindrical base; a shaft penetrating the oil-containing bearing to protrude beyond an end surface of the bearing; a rotary disk fixed onto the shaft to cover one side of the secondary encoding piece; a light acceptor fixed to the cylindrical base to correspond to the light emitter and the secondary encoding piece, thereby receiving the signals emitted by the light emitter; and an oil mist prevention structure including a mask integrally formed with the shaft and exposed beyond an end surface of the bearing and a ring extending from the mask for covering an outer periphery of the bearing.
US08115162B2 Sliding door apparatus and elevator including an obstruction detection system
In a sliding door apparatus, a first entrance is opened and closed by a first door, and a second entrance that faces the first entrance is opened and closed by a second door. Imaging means that captures images across a space between the first entrance and the second entrance is disposed beside the space. An image processing and determining portion determines presence or absence of an obstruction inside the space based on image data from the imaging means.
US08115160B2 Protection circuit and photoelectric conversion device
A protection circuit and a photoelectric conversion device are provided, each of which includes a first wiring, a second wiring, a first switch, a second switch, a capacitor, and a comparing circuit configured to generate a signal corresponding to a potential of the first wiring and a potential of the second wiring, and supply the signal to the first switch and the second switch. The first wiring is electrically connected to a first terminal of the first switch, and the second wiring is electrically connected to a first terminal of the second switch. A second terminal of the first switch is electrically connected to a first electrode of the capacitor, and a second terminal of the second switch is electrically connected to a second electrode of the capacitor.
US08115157B2 Row driven imager pixel
An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
US08115156B2 Optical condition design method for a compound-eye imaging device
An imaginary object plane is set in front of an imaging device body (plane setting step). A part of optical conditions of optical lenses are changed as variables, and positions of points (pixel observation points) on the imaginary object plane where lights coming from pixels of a solid-state imaging element and back-projected through the optical lenses are calculated (pixel observation point calculating step). The dispersion in position of the calculated pixel observation points is evaluated (evaluating step). Finally, a set of values of the variables giving maximum evaluated dispersion of the calculated pixel observation points is determined as optimum optical condition of the optical lenses (condition determining step). This reduces the number of pixels which image the same portions of the target object, making it possible to reduce portions of the same image information in multiple unit images, and to stably obtain a reconstructed image having a high definition.
US08115151B2 Light tracking sensor and sunlight tracking system thereof
A light tracking sensor and a sunlight tracking system including the same, the light tracking sensor comprises two or more light tunnel devices. One end of the respective light tunnel devices form a common single-point micro-hole acting as an input port for directional light, the other ends of the light tunnel devices act as output ports for directional light and is provided with light-sensing units respectively. A sunlight tracking system is constituted of said light tracking sensor, a differential processing unit, an A/D converting unit, a microprocessor unit, a driving unit and an executive unit driven by the output end of the driving unit. Since one ends of the light tunnel devices form a common single-point micro-hole and the surface around the micro-hole is a curved surface, the sunlight tracking system, compared with the prior art, has a simpler structure, and a higher integration. Meanwhile, when in combination with certain software, a fast, accurate sunlight racking can be achieved, and its tracking precision is less influenced by the outdoor environment.
US08115150B2 Optical substrate for reduced background fluorescence
A new optical substrate design allows a target to be illuminated with minimal illumination of undesired surfaces within the image collection ray path. The non rectangular substrate provide different surfaces through which a target is illuminated and imaged and thereby prevents illumination rays from crossing the substrate surface through which the target is imaged
US08115149B1 Gun launched hybrid projectile
A Hybrid Projectile is provided for delivering an explosive payload to a target wherein the Hybrid Projectile may be steered in flight using relatively inexpensive means. The Hybrid Projectile is exteriorly configured in the same physical exterior configuration of conventional ammunition of various standard types so it can be launched in conventional manner from the same weapon systems. However, internal features allow the Hybrid Projectile to be transformed in flight from a command signal to deploy wings and fins, and in some projectiles to telescope open to deploy such wings and fins. An inexpensive televisual means is activated in the fore region of the round which through RF uplink command can be used to select a path, while motors on the wings can then be used to more precisely glide the projectile to a target, or otherwise to abort the target run.
US08115146B2 Positive temperature coefficient heater
A positive temperature coefficient heater may include at least one positive temperature coefficient rod having a heating module inserted into a rod case made of brass and plated with tin, at least one heat-radiating fin made of brass, plated with tin, and contacted and coupled with each of opposite outer faces of the positive temperature coefficient rod, and upper and lower housings coupled to opposite longitudinal ends of the positive temperature coefficient rod, wherein the positive temperature coefficient rod and the heat-radiating fin are joined together by soldered portions.
US08115145B2 Systems and methods for base station enclosures
A technique for climate control of, for example, base station circuitry within an enclosure involves placing base station circuitry within the enclosure and controlling the climate therein. A system according to this technique includes an enclosure suitable for use outside in a wide range of extreme weather conditions. A controller may, for example, control a fan tray with a heater to pull ambient air through a filtration unit, through the fan tray where the air is heated, and through cold start recirculation dampers.
US08115133B2 Gas-insulated circuit breaker
A gas-insulated circuit breaker has a sealed container filled with gas; a pair of contacts so constructed as to be connected and separated each other in the sealed container; gas flow generation means for blasting the gas on an arc generated when the contacts are separated, the gas flow generation means including: an accumulation space, pressure increasing means for increasing the pressure of the pressure accumulation space, a gas passage connecting the pressure accumulation space to the arc, and an insulating nozzle that controls the flow of the gas from the pressure accumulation space to the arc; an inside-nozzle insulating member disposed co-axially with the insulating nozzle. The arc is generated in a space between an inner wall section of the insulating nozzle and an outer wall section of the inside-nozzle insulating member, and the gas flows in the space.
US08115126B2 Self-sealing control arrangement for a medical instrument
A control arrangement for use in a medical or surgical instrument, which arrangement includes a keypad for providing manual control functions to a user of the instrument, a retainer clip and a sealing member. The keypad and retainer clip are located within an opening formed in the instrument housing, whereby when the retainer clip is assembled to the housing, the retainer clip automatically causes the sealing member to sealingly engage with a corresponding sealing surface defined adjacent the housing opening, without the need for the use of additional sealing agents.
US08115125B2 Cord switch
A cord switch includes a hollow insulation having a restoring force, a plurality of inner electrode wires provided along an inner surface of the hollow insulation, and an outer electrode provided on an outer surface of the hollow insulation. The outer electrode includes a plurality of outer electrode wires wounded on the outer surface of the hollow insulation, the outer electrode wires each including a copper wire and a plated layer formed on a surface of the copper wire, and the plated layer includes a transition metal except cobalt, manganese, copper, iron and vanadium, or a typical metal.
US08115122B2 Push button switch
An operation portion and a switch portion of a push button switch are removably coupled. The switch portion includes a contact opening mechanism having a rotatably supported lever and a spring. The lever has one end acting on a part of the operation portion coupled with the switch portion, and the other end acting on a contact switching mechanism of the switching contact unit in the switch portion to open/close the contacts. The spring urges the lever in a fixed rotation direction. The contact switching mechanism is urged to move a movable contact from a standby state position toward an operating state position by the contact opening mechanism when the switch portion is separated from the operation portion. The contact switching mechanism is released from the urging when the switch portion is coupled with the operation portion.
US08115121B2 Timer switch
A timer includes a case, a shaft, a cam wheel, a drive mechanism, and a plurality of switch blades disposed within the case. The shaft is rotatably and reciprocally movably disposed in the case. The cam wheel is pivoted on the shaft and rotates together with the shaft when setting, or rotates independently by the drive mechanism. The cam wheel includes a plurality of cam tracks on one side surface thereof and a plurality of ratchets and grooves on a circular rim thereof. The drive mechanism contacts the ratchets to drive the cam wheel to rotate relative to the shaft. The switch blades respectively contact the cam tracks of the cam wheel, and correspondingly generate an electrical connection/disconnection. When the shaft moves to the setting position and the cam wheel being rotated by the user, a flexible element touches the grooves formed on the circular rim results a tactile feedback.
US08115120B2 Electrical switch with multiple switching channels
An electrical switch with multiple switching channels may include a frame, a panel with which a pointing element comes into contact. The electrical switch may have a location element which locates the point of contact of the pointing element on the panel which may include a plurality of switching elements. The electrical switch may have a detection element which detects at least one control action independent of the position of the point of contact with the panel. The electrical switch may have an intermediate plate on which the panel acts in order to cause the change in state of the switching elements. The intermediate plate may be configured to cause the change in state of switching elements and detection element. The plate can be at least in part deformed in order to actuate the detection element after changing the state of the switching elements.
US08115117B2 System and method of forming isolated conformal shielding areas
A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating positioned on an electrical system having circuit components mounted thereon, the dielectric coating shaped to conform to a surface of the electrical system and having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the conductive coating and the contact pads. The dielectric coating and the conductive coating have a plurality of overlapping pathway openings formed therethrough to isolate a respective shielding area of the conformal structure over desired circuit components or groups of circuit components.
US08115114B2 Ceramic substrate manufacturing method and ceramic substrate
A method for manufacturing a ceramic substrate having a via hole(s) and a surface wiring pattern electrically connected to the via hole(s). The method includes: preparing a sintered ceramic substrate having a via hole(s); forming over the sintered ceramic substrate a sintered ceramic layer having a hole(s) or opening(s) whose bottom is configured to be at least a part of an exposed end surface of the via hole(s) by post-firing method; forming inside the hole(s) or opening(s) a conductive portion which electrically connects the surface of the sintered ceramic layer and the via hole(s); and forming over the surface of the sintered ceramic layer a surface wiring pattern electrically connected to the conductive portion.
US08115112B2 Interposer substrates and semiconductor device assemblies and electronic systems including such interposer substrates
Chip-scale packages and assemblies thereof are disclosed. The chip-scale package includes a core member of a metal or alloy having a recess for at least partially receiving a die therein and includes at least one flange member partially folded over another portion of the core member. Conductive traces extend from one side of the package over the at least one flange member to an opposing side of the package. Systems including the chip-scale packages and assemblies are also disclosed.
US08115110B2 Printed circuit board minimizing undesirable signal reflections in a via and methods therefor
What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
US08115104B2 Circuit board with buried conductive trace formed thereon and method for manufacturing the same
A circuit board with a buried conductive trace formed thereon according to the present invention is provided. A buried conductive trace layer is formed on the surface of a substrate and the pads and fingers of the conductive trace layer are heightened to facilitate the subsequent process of molding.
US08115102B2 Wildlife guard assemblies and methods for using the same
A wildlife guard assembly for use with an electrical insulator body includes first and second guard members and an actuator member. The first and second guard members define a seat to receive the insulator body and are connected to one another to permit relative movement between an open position. The first and second guard members define a sideward opening to laterally receive the insulator body into the seat, and a closed position, wherein the first and second guard members at least partially encircle the insulator body to capture the insulator body in the seat. The actuator member is configured to be inserted between the first and second guard members in the open position and, when forcibly displaced radially to an installed position, to force the first and second guard members to move from the open position to the closed position.
US08115098B2 Hinge system and method
Embodiments of the invention provide a hinge system and method for use with an electrical enclosure. The hinge system can include a first mounting plate having a bushing and a second mounting plate having an aperture. The hinge system can include a pin having a first portion received by the bushing and a second portion selectively received by the aperture. The hinge system can include a cam lever, which can extend from the first mounting plate at an angle. The cam lever can be moveable between a first position to retract the pin from the aperture and a second position to lock the pin in the aperture. The cam lever can be operable in a substantially single plane of motion.
US08115093B2 Layer-to-layer interconnects for photoelectric devices and methods of fabricating the same
Interconnects for electronic devices. More specifically, stacked photoelectric devices, such as parallel tandem photovoltaic devices are provided. Each of the photovoltaic devices comprises photovoltaic cells formed between two substrates. Each of the substrates may include one or more interconnects to route a voltage from one side of the substrate to another. Each substrate includes an edge portion extending beyond the edge portion of an immediately adjacent substrate. All interconnects are exposed to one side of the device for easy and flexible electric connectivity and fabrication. The interconnects, which may include conductive vias or conductive edge wraps, are formed in the edge portion of the substrates.
US08115080B2 Plants and seeds of hybrid corn variety CH997005
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH997005. The invention thus relates to the plants, seeds and tissue cultures of the variety CH997005, and to methods for producing a corn plant produced by crossing a corn plant of variety CH997005 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH997005.
US08115079B2 Plants and seeds of corn variety CV356957
According to the invention, there is provided seed and plants of the corn variety designated CV356957. The invention thus relates to the plants, seeds and tissue cultures of the variety CV356957, and to methods for producing a corn plant produced by crossing a corn plant of variety CV356957 with itself or with another corn plant, such as a plant of another variety. The invention further relates to corn seeds and plants produced by crossing plants of variety CV356957 with plants of another variety, such as another inbred line. The invention further relates to the inbred and hybrid genetic complements of plants of variety CV356957.
US08115075B2 Soybean variety A1016273
The invention relates to the soybean variety designated A1016273. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1016273. Also provided by the invention are tissue cultures of the soybean variety A1016273 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1016273 with itself or another soybean variety and plants produced by such methods.
US08115071B2 Soybean variety A1016137
The invention relates to the soybean variety designated A1016137. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1016137. Also provided by the invention are tissue cultures of the soybean variety A1016137 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1016137 with itself or another soybean variety and plants produced by such methods.
US08115070B2 Soybean variety A1016053
The invention relates to the soybean variety designated A1016053. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1016053. Also provided by the invention are tissue cultures of the soybean variety A1016053 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1016053 with itself or another soybean variety and plants produced by such methods.
US08115069B2 Soybean variety A1016124
The invention relates to the soybean variety designated A1016124. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1016124. Also provided by the invention are tissue cultures of the soybean variety A1016124 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1016124 with itself or another soybean variety and plants produced by such methods.
US08115067B1 Soybean cultivar 05KG030123
The present invention is in the field of soybean cultivar 05KG030123 breeding and development. The present invention particularly relates to the soybean cultivar 05KG030123 and its progeny, and methods of making 05KG030123.
US08115066B2 Soybean variety 0384531
The invention relates to the soybean variety designated 0384531. Provided by the invention are the seeds, plants and derivatives of the soybean variety 0384531. Also provided by the invention are tissue cultures of the soybean variety 0384531 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety 0384531 with itself or another soybean variety and plants produced by such methods.
US08115065B2 Squash line YCN 130-1053T
The invention provides seed and plants of the squash line designated YCN 130-1053T. The invention thus relates to the plants, seeds and tissue cultures of squash line YCN 130-1053T, and to methods for producing a squash plant produced by crossing a plant of squash line YCN 130-1053T with itself or with another squash plant, such as a plant of another line. The invention further relates to seeds and plants produced by such crossing. The invention further relates to parts of a plant of squash line YCN 130-1053T, including the fruit and gametes of such plants.
US08115062B2 Transgenic plants expressing recombinant barley alanine aminotransferase
Transgenic plants containing recombinant barley alanine aminotransferase are described. Also provided are methods for generating transgenic plants containing recombinant barley alanine aminotransferase.
US08115061B2 Plant transformation method
The invention provides a transformation method comprising inoculation and co-cultivation of a target tissue, from a target plant, with Agrobacterium, at a time when the target tissue is in its natural plant environment, followed by generation of a transgenic plant via dedifferentiation and regeneration of the target tissue.
US08115058B2 Rice promoters for regulation of plant expression
The present invention provides promoters from plants capable of driving gene expression in plant cells. The promoters vary in strength and in tissue specificity, and can be used to facilitate the development of transgenic plants in which tissue preferred expression, constitutive expression, and the strength of transgene expression is either more or less critical.
US08115057B2 Root-specific phosphate transporter promoters
The current invention provides plant promoter sequences. Compositions comprising the promoter sequence are described, as are methods for the expression of transgenes in plants comprising the use of these sequences. The methods of the invention include the direct creation of transgenic plants with the promoters by genetic transformation, as well as by plant breeding methods.
US08115056B2 Root-specific phosphate transporter promoters
The current invention provides plant promoter sequences. Compositions comprising the promoter sequence are described, as are methods for the expression of transgenes in plants comprising the use of these sequences. The methods of the invention include the direct creation of transgenic plants with the promoters by genetic transformation, as well as by plant breeding methods.
US08115053B2 Plant protection
The invention provides seed treatment compositions as well as their use, methods for treating seeds, methods of protecting plants against pests and also treated seeds and plants. In one embodiment there is provided a method of treating a seed with a seed treatment composition to induce a plant resistance mechanism against one or more pests in a plant grown from said seed.
US08115052B2 Modulation of abscisic acid
Compositions and methods for modulating abscisic acid (ABA) perception and signal transduction in developing seed are provided. The methods and compositions find use in increasing yield in plants. Compositions comprise genetic constructs known to affect ABA sensitivity, particularly ABA biosynthetic mutants and fragments and variants thereof. Such compositions can be expressed with seed-preferred promoters.
US08115039B2 Catalytic distillation process for primary haloalkanes
A process for making primary haloalkanes by catalytic distillation of internal haloalkanes which comprises a) introducing an internal haloalkane feed into a catalytic distillation column; b) isomerizing at least a portion of the internal haloalkane feed in the presence of an internal haloalkane isomerization catalyst at a temperature at or above the boiling point of the internal haloalkanes and below the temperature and pressure at which hydrogen halide is formed to form primary haloalkanes; and removing the primary haloalkanes from the catalytic distillation column.
US08115034B2 Polyketone plasticizers
The invention relates to polyketone compounds and the at least partially hydrogenated products thereof, the use of said polyketone compounds and/or the at least partially hydrogenated products thereof as plasticizers, processes of making polyketone compounds and the at least partially hydrogenated products thereof, compositions comprising the polyketone compounds and/or the at least partially hydrogenated products thereof, and to articles formed from products of the invention.
US08115033B2 3-(4-hydroxy-3-methoxyphenyl)-1-(4-hydroxyphenyl)-1-propanone and use thereof as an antimicrobial active ingredient
Antimicrobially active 3-(4-hydroxy-3-methoxyphenyl)-1-(4-hydroxyphenyl)-1-propanone of the following formula 1 is described, as is a method for producing this compound and the use thereof as an antimicrobial active ingredient.
US08115032B2 Process for the synthesis of a propargylic alcohol
A process for the preparation of the compound of formula
US08115027B2 NPY Y5 antagonist
The present invention provides a pharmaceutical composition for use as an NPY Y5 receptor antagonist comprising a compound or the formula (I): wherein R1 is lower alkyl, cycloalkyl or the like, R2 is hydrogen, lower alkyl or the like, n is 1 or 2, X is lower alkylene, lower alkenylene, arylene, cycloalkylene or the like, Y is CONR7, CSNR7, NR7CO, NR7CS or the like, Z is lower alkyl, optionally substituted carbocyclyl, optionally substituted heterocyclyl or the like and R7 is hydrogen or lower alkyl, prodrug, pharmaceutically acceptable salt or solvate thereof.
US08115026B2 Boron-containing small molecules
This invention relates to compounds useful for treating fungal infections, more specifically topical treatment of onychomycosis and/or cutaneous fungal infections. This invention is directed to compounds that are active against fungi and have properties that allow the compound, when placed in contact with a patient, to reach the particular part of the skin, nail, hair, claw or hoof infected by the fungus. In particular the present compounds have physiochemical properties that facilitate penetration of the nail plate.
US08115025B2 Method for the production of β-ketocarbonyl-functional organosilicon compounds
β-ketocarbonyl-functional organosilicon compounds are prepared by reacting an organosilicon compound containing at least one primary amino group with a compound which liberates a diketene, the reaction taking place in the presence of an organic compound which inhibits or prevents the reaction of diketenes with primary or secondary amino groups. The products are different from those produced merely by the reaction of a diketene with an amino-group-containing organosilicon compound.
US08115019B2 Cis-2, 6-disubstituted tetrahydropyran derivatives and preparation method thereof
Disclosed are cis-2,6-disubstituted tetrahydropyran derivatives represented by Chemical Formula 1 and a preparation method thereof. The tetrahydropyran derivatives can be prepared by Prins-reacting tetrahydropyran derivatives with homopargylicalcohol derivatives in the presence of trimethylsilyltriflate. The tetrahydropyran derivatives with cis-substituents at both C2 and C6 positions of the tetrahydropyran ring are useful as intermediates for use in the synthesis and development of therapeutically effective, naturally occurring compounds. (wherein, R1, R2 and R3 are as defined in the specification.).
US08115014B2 Ethynylindole compounds
As a compound having a potent oral activity and a long-lasting cysLT1/cysLT2 receptor antagonistic activity, the compound of the formula (I): which exhibits potent antagonistic activity against the cysLT1/cysLT2 receptor, and have long-lasting effects even in case of oral administration, and therefore is useful as an oral agent for preventing and/or treating a variety of diseases, for example, respiratory disease (for example, asthma (bronchial asthma, etc.), chronic obstructive pulmonary disease (COPD), pulmonary emphysema, chronic bronchitis, pneumonia (interstitial pneumonia, etc.), severe acute respiratory syndrome (SARS), acute respiratory distress syndrome (ARDS), apnea syndrome, allergic rhinitis, sinusitis (acute sinusitis, chronic sinusitis, etc.), pulmonary fibrosis, coughing (chronic coughing, etc.), and the like) was developed.
US08115010B2 Furanose derivatives
The invention relates to a process for preparing furanose derivatives, to furanose intermediates used in said process and to the use of said derivatives in the manufacture of atorvastatin.
US08115009B2 UV-absorbers for ophthalmic lens materials
1,4-disubstituted-1,2,3-triazole UV absorbing monomers are disclosed. The UV absorbers are particularly suitable for use in intraocular lens materials.
US08115006B2 Process for producing anthranilamide compound
To provide a process for producing a specific anthranilamide compound or its salt.To provide a process for producing an anthranilamide compound represented by the formula (I) or its salt: wherein each of R1a and R3 which are independent of each other, is halogen or haloalkyl; R2 is cyclopropyl alkyl or cyclobutyl alkyl; and Hal is a chlorine atom or a bromine atom, which comprises a step of selectively halogenating a compound represented by the formula (II): wherein R1a, R2 and R3 are as defined above.
US08115005B2 Pyrazolylphenyl and pyrrolylphenyl inhibitors of LTA4H for treating inflammation
Two chemical genera of pyrazolylphenyl and pyrrolylphenyl derivatives are disclosed. They have the general formula: In these compounds ring (a) is a pyrazole or pyrrole; Q is selected from the group consisting of a direct bond, O, S, SO, SO2, NR1, CH2, CF2, and C(O); HET is a 4-7-membered saturated nitrogenous heterocycle; and taken together ZW is H or Z is (CH2)1-10 in which one or two (CH2) may optionally be replaced by —O—, —NR1—, —SO—, —S(O)2—, —C(═O)— or —C═O(NH)—; and W is hydrogen, acyl, hydroxyl, carboxyl, amino, carboxamido, aminoacyl, —COOalkyl, —CHO, heterocyclyl, substituted aryl or substituted heterocyclyl. The compounds are inhibitors of LTA4H (leukotriene A4 hydrolase). They are useful for the treatment and prevention and prophylaxis of inflammatory diseases and disorders.
US08115003B2 Pyrido[3,2-h]quinazolines and/or 5,6-dihydro derivatives thereof, a method for the production thereof and doped organic semiconductor material containing these
The present invention relates to pyrido[3,2-h]quinazolines and/or 5,6-dihydro derivatives thereof, methods for their production and doped organic semiconductor material which use such quinazolines.
US08114996B2 Reduction of 5-(aryl-diazenyl)-4,6-dihalo-pyrimidine
Method of synthesizing a compound of formula (I), wherein R1, R2 are, independently, chloro or fluoro, and wherein R3 is H, alkyl, aralkyl or is an alkylether or alkylthioether comprising the steps of firstly reducing a diazeny compound of formula (II) non-catalytically or with a catalytic amount of an homogenous organic, non-metal catalyst to the corresponding hydrazo compound of formula (III) and in a second step catalytically hydrogenating said hydrazo compound in with a heterogeneous Ni-catalyst to the compound of formula (I).
US08114991B2 Amino-1,3,5-triazines N-substituted with chiral bicyclic radicals, process for their preparation, compositions thereof, and their use as herbicides and plant growth regulators
Amino-1,3,5-triazines N-substituted with chiral bicyclic radicals, process for their preparation, compositions thereof, and their use as herbicides and plant growth regulators.The invention relates to an optically active compound of formula (I) or a salt thereof: wherein the various symbols are as defined in the description, to processes for their preparation, to compositions thereof, and to their use as herbicides or plant growth regulators. The invention also relates to novel intermediates of formula (III), (V) and (XIII) as defined in the description.
US08114989B2 Pyrazolylaminopyrimidine derivatives useful as tyrosine kinase inhibitors
This invention relates to novel compounds having the formula (I): and to their pharmaceutical compositions and to their methods of use. These novel compounds provide a treatment for cancer.
US08114987B2 Preparation method of 2-deoxy-L-ribose
A method of preparing 2-deoxy-L-ribose represented by the following formula I is disclosed. The preparation method includes the steps of: treating L-arabinose with an alcohol solvent in the presence of an acid to prepare 1-alkoxy-L-arabinopyranose; allowing the prepared 1-alkoxy-L-arabinopyranose to react with acyl chloride so as to prepare 1-alkoxy-2,3,4-triacyl-L-arabinopyranose; brominating the alkoxy group of the prepared 1-alkoxy-2,3,4-triacyl-L-arabinopyranose to prepare a 1-bromo-2,3,4-triacyl compound; allowing the prepared compound to react with zinc in the presence of ethyl acetate and an organic base so as to prepare glycal; treating the glycal with an alcohol solvent in the presence of an acid to prepare 1-alkoxy-2-deoxy-3,4-diacyl-L-ribopyranose; treating the prepared 1-alkoxy-2-deoxy-3,4-diacyl-L-ribopyranose with a base to prepare 1-alkoxy-2-deoxy-L-ribopyranose; and hydrolyzing the prepared 1-alkoxy-2-deoxy-L-ribopyranose in the presence of an acid catalyst.
US08114985B2 Anti-MicroRNA oligonucleotide molecules
The invention relates to isolated anti-microRNA molecules. In another embodiment, the invention relates to an isolated microRNA molecule. In yet another embodiment, the invention provides a method for inhibiting microRNP activity in a cell.
US08114982B2 Multi-microRNA methods and compositions
Provided are DNAs comprising a polynucleotide that encodes at least a first modified miR-30 precursor and a second modified miR-30 precursor. Also provided are vectors comprising the the DNAs, where the vector can replicate in a host cell. Additionally, specific lentiviral vectors comprising the above-described DNA are provided, as are methods of inhibiting expression of a target gene in a eukaryotic cell.
US08114981B2 Method and medicament for inhibiting the expression of a given gene
The invention relates to an isolated RNA that mediates RNA interference of an mRNA to which it corresponds and a method of mediating RNA interference of mRNA of a gene in a cell or organism using the isolated RNA.
US08114980B2 Characterisation of gene function using double stranded RNA inhibition
There is provided a method of identifying DNA responsible for conferring a particular phenotype in a cell which method comprises a) constructing a cDNA or genomic library of the DNA of the cell in a suitable vector in an orientation relative to a promoter(s) capable of initiating transcription of the cDNA or DNA to double stranded (ds) RNA upon binding of an appropriate transcription factor to the promoter(s), b) introducing the library into one or more of the cells comprising the transcription factor, and c) identifying and isolating a particular phenotype of the cell comprising the library and identifying the DNA or cDNA fragment from the library responsible for conferring the phenotype. Using this technique it is also possible to assign function to a known DNA sequence by a) identifying a homologue(s) of the DNA sequence in a cell, b) isolating the relevant DNA homologue(s) or a fragment thereof from the cell, c) cloning the homologue or fragment thereof into an appropriate vector in an orientation relative to a suitable promoter(s) capable of initiating transcription of dsRNA from the DNA homologue or fragment upon binding of an appropriate transcription factor to the promoter(s) and d) introducing the vector into the cell from step a) comprising the transcription factor.
US08114979B2 Di-alpha amino anthraquinone compositions
The invention provides novel anthraquinone compositions that are useful as broad-spectrum quenchers of fluorescence and provides methods for making and using them. The anthraquinone quenchers can be conjugated to a variety of biologically relevant compounds, including lipids, nucleic acids, polypeptides, and more specifically antigens, steroids, vitamins, drugs, haptens, metabolites, toxins, environmental pollutants, amino acids, peptides, proteins, nucleotides, oligonucleotides, polynucleotides, carbohydrates, and their analogs. The invention also provides kits comprising, in one or more containers, at least one anthraquinone quencher dye composition of the present invention, and instructions for using that composition.
US08114977B2 Proteins derived from white spot syndrome virus and uses thereof
Embodiments of the present invention generally relate to proteins derived from white spot syndrome virus, nucleic acid sequences encoding them, and their use in the manufacture of a vaccine for prophylaxis and/or treatment of white spot syndrome in crustaceans.
US08114975B2 Protein tyrosine kinase substrate LAT and its use in the identification of (ANT) agonists of the kinase
The invention generally relates to compositions and methods for identifying and testing tyrosine kinase signaling pathway agonists and antagonists, and more particularly, methods and compositions for screening compounds and identifying compounds that will modulate the interaction of protein tyrosine kinase substrates with their intracellular ligands, as well as between their intracellular ligands and other members of the signaling pathway.
US08114969B2 Immunotoxin derived from a recombinant human autoantibody and method of using thereof
The invention is directed to an immunotoxin directed at fetal AchR, wherein the immunotoxin may comprises a human Fab fragment based on a human autoantibody or human combinatorial CDNA library and may be a pseudomonas exotoxin A-based single chain Fv IT (35-scFV-ETA). The invention is further directed to method of treating a patient with soft tissue tumor comprising the step of exposing the patient to the immunotoxin of the invention.
US08114968B2 Metalloproteinase-12 specific monoclonal antibody
Proteins that bind to matrix metalloproteinase 12 and methods of using such proteins are described.
US08114967B2 Constructs and libraries comprising antibody surrogate light chain sequences
The invention concerns constructs and libraries comprising antibody surrogate light chain sequences. In particular, the invention concerns constructs comprising VpreB sequences, optionally partnered with another polypeptide, such as, for example, antibody heavy chain variable domain sequences, and libraries containing the same.
US08114965B2 Compositions of PSMA antibodies
The invention includes antibodies or antigen-binding fragments thereof which bind specifically to conformational epitopes on the extracellular domain of PSMA, compositions containing one or a combination of such antibodies or antigen-binding fragments thereof, hybridoma cell lines that produce the antibodies, and methods of using the antibodies or antigen-binding fragments thereof for cancer diagnosis and treatment. The invention also includes oligomeric forms of PSMA proteins, compositions comprising the multimers, and antibodies that selectively bind to the multimers.
US08114964B2 Anti-MCP-1 antibodies, compositions, methods and uses
The present invention relates to at least one novel anti-MCP-1 antibody, including isolated nucleic acids that encode at least one anti-MCP-1 antibody, MCP-1, vectors, host cells, transgenic animals or plants, and methods of making and using thereof, including therapeutic compositions, methods and devices.
US08114956B2 Polymer having unit obtained by condensation of difluorocyclopentanedione ring and aromatic ring, organic thin film using the same, and organic thin film device
A polymer having a repeating unit represented by the following general formula (I) and a ferrocene-based reduction potential of −1.5 to −0.5 V as measured by a cyclic voltammetry method wherein Ar1 represents a divalent aromatic hydrocarbon group or a divalent heterocyclic group, and these groups may be substituted by a substituent.
US08114951B2 Preparation and uses of polyarylates
The present invention is directed to polyarylates comprising repeating units having the structure: as well as their preparation and use as cell growth substrates.
US08114948B2 Photosensitive compositions based on polycyclic polymers
A copolymer composition including a copolymer having repeat units of structural formula I: where X is selected from —CH2—, —CH2—CH2— and O; m is an integer from 0 to 5; and each occurrence of R1-R4 are independently selected from H; C1 to C25 linear, branched, and cyclic alkyl, aryl, aralkyl, alkaryl, alkenyl and alkynyl that can include one or more hetero atoms selected from O, N, and Si; a group that contains an epoxy functionality; —(CH2)nC(O)OR5; —(CH2)nC(O)OR6; —(CH2)nOR6; —(CH2)nOC(O)R6; —(CH2)nC(O)R6; —(CH2)nOC(O)OR6; and any combination of two of R1, R2, R3, and R4 linked together by a linking group. A portion of the repeat units having structural formula I contain at least one epoxy functional pendant group. The copolymer composition can be included with a material that photonically forms a catalyst in a photodefinable dielectric composition, which can be used to form a photodefinable layer on a substrate.
US08114946B2 Process for producing broader molecular weight distribution polymers with a reverse comonomer distribution and low levels of long chain branches
The present invention provides a polymerization process which is conducted by contacting an olefin monomer and at least one olefin comonomer in the presence of hydrogen and a metallocene-based catalyst composition. Polymers produced from the polymerization process are also provided, and these polymers have a reverse comonomer distribution, low levels of long chain branches, and a ratio of Mw/Mn from about 3 to about 6.
US08114945B2 Process control for the (co)-polymerisation of olefins
Process for controlling the (co)polymerization of olefins in a continuous polymerization reactor wherein the olefin (co)polymerization is performed in an industrial plant reactor in the presence of a polymerization catalyst characterized in that at least one operating parameter of the plant is controlled by means of a measurement of the chain branching level (CBL) of the produced polymer.
US08114941B2 Polyamide resin composition
The present invention provides a polyamide resin composition comprising a resin of polyamide and polyacrylate mixed with a compatibilizer, an inorganic nucleating agent, a glass fiber, an antioxidant, an anti-hydrolysis agent and a lubricant in a predetermined ratio, which shows superior mechanical strength and heat resistance and improved glycol resistance and visibility maintenance, thus being useful in such a field that requires the aforementioned properties, for example in an automobile coolant reservoir tank.
US08114940B2 Rubber-modified polyamide resin, epoxy resin composition and cured product thereof
The present invention relates to a phenolic hydroxy group-containing rubber-modified polyamide resin which has, in the molecule, a phenolic hydroxy group-containing aromatic polyamide segment having a structure represented by the following formula (A) (wherein, m and n are average values and Ar represents a divalent aromatic group) and a butadiene (co)polymer segment selected from the following formula (B-1) or (B-2), —(CH2—CH═CH—CH2)X—  (B-1) —(CH2—CH═CH—CH2)Y—(CH2—CH(CN))Z—  (B-2) (wherein, each of x, y and z is an average value and 0.01≦z/(y+z)≦0.13, x represents a positive number of 5 to 200, and also y+z is a positive number of 10 to 200), and a resin composition containing said resin, in particular an epoxy resin composition; a cured product of said epoxy resin composition is excellent in flexibility, heat resistance and electrical properties especially at high temperature and high humidity.
US08114939B2 Method for stabilizing polymers containing repeating lactic acid units, and stabilized polymers so made
Metal catalyst residues in resins containing polymerized lactic acid units, such as polylactides, are deactivated by treatment with a polymer or copolymer that contain pendant acid groups and pendant ester groups, with an acid-containing PLA resin, or with a polymer or copolymer having at least one acid groups per 250 atomic mass units and which has pendant lactic acid or poly(lactic acid) groups. The deactivating agent is effective at deactivating the catalyst, and has little effect on the optical clarity of the resin.
US08114935B2 Microporous precipitated silica
Described herein is microporous precipitated silica having the following physico-chemical parameters: a CTAB surface area of 50 to 300 square meters/gram, a BET/CTAB ratio of ≧1.3, and a relative breadth γ of pore size distribution of ≦3.5. The precipitated silica can also have a Sears number of from 10 to 28 and a Sears number/CTAB ratio of ≦0.16. Also described herein are vulcanizable and vulcanized elastomer compositions, e.g., tires, containing the microporous precipitated silica.
US08114933B2 Thermoplastic resin composition with low coefficient of linear thermal expansion
The thermoplastic rubber grafted copolymer resin composition comprising (A) about 100 parts by weight of a rubber grafted copolymer prepared by (a1) about 10 to 100 parts by weight of a rubber-modified grafted copolymer and (a2) about 0 to 90 parts by weight of copolymer prepared by vinyl cyanide compound/aromatic vinyl compound or methyl methacrylate or N-phenyl maleimide/vinyl cyanide monomer or aromatic vinyl monomer/methyl methacrylate or N-phenyl maleimide; (B) about 1 to 30 parts by weight of a maleic anhydride copolymer; and (C) about 1 to 20 parts by weight of a clay treated with a compound containing reactive functional groups; wherein said compound containing functional groups has a radical-polymerizable group and an onium ion that can ion-exchange with said clay.
US08114930B2 Anti-adhesion agent composition for asphalt
An anti-adhesion agent composition for asphalt contains a specific polycarboxylic acid compound (A); a surfactant (B) that is at least one selected from a betaine amphoteric surfactant, an amino acid amphoteric surfactant, a polyoxyethylene alkylamine surfactant, an alkanolamide surfactant, and an amine oxide surfactant; and a water-soluble polyhydric alcohol (C).
US08114929B2 Transparent polycarbonate-polyester blends with improved performance under caustic aqueous environments
A composition comprising a clear thermoplastic blend comprising: (a) a polycarbonate component; and (b) a polyester component comprising (i) a polyester based substantially on 1,4 cyclohexane dimethanol and terephthalic acid monomer units, (ii) copolymers polyester based substantially on 1,4 cyclohexane dimethanol and terephthalic acid monomer units and modified with up to 25 mol % of copolymerizable acid and/or diol monomers, and (iii) combinations thereof. The polycarbonate component and the polyester component are present in sufficient proportions to form a molding composition capable of being molded into an article that exhibits transparency and structural integrity after the article is exposed to a caustic aqueous environment for at least 70 hours. The invention also relates to articles made from the composition, methods for making the compositions, and methods for using articles.
US08114924B2 Pearlescent slurry concentrate for acrylic sheet
The disclosure provides a highly loaded pearlescent pigment acrylic polymer slurry concentrate for use as a pearlescent pigment additive for an acrylic polymer sheet, comprising: (a) about 35 to about 45 wt. % of a pearlescent pigment based on the weight of the slurry concentrate; (b) about 1.0 to about 5.0 wt. % of a copolymer dispersant comprising a pigment functional component derived from a monomer selected from the group consisting of urethane or urea, epoxy-containing methacrylate esterified with aromatic carboxylic acids, aliphatic carboxylic acids, ammonia and primary, secondary and tertiary aliphatic amines, primary aromatic amines, and alkyl methacrylate; and a solvent functional component derived from a monomer selected from the group consisting of methyl methacrylate, butyl methacrylate, ethyl hexyl methacrylate, lauryl methacrylate, 1,2-propane diol, 6, hydroxyhexanoic acid, and 2-phenoxyethanol; (c) about 15 to about 45 wt. % of a (C1-C22) alkyl ((C1-C10)alk) acrylate; and (d) about 0.1 to about 1.5 wt. % of a thixotropic agent.
US08114922B2 Ink and laminated sheet
An ink comprises metal thin film fragments having an average thickness of 0.01 to 0.1 μm and an average particle diameter of 5 to 25 μm, and a binder resin having at least one selected from the group consisting of a carboxyl group, a phosphoric acid group, a sulfonic acid group, metal salts thereof and an amino group. A laminated sheet comprises multilaminated at least two synthetic resin films for molding, and a decorative layer having mirror-like metallic luster formed at any laminate interface of the synthetic resin films, the decorative layer being an ink film made of the ink, the ink film having a thickness of 0.05 to 2.0 μm.
US08114912B2 Bronchodilating β-agonist compositions and methods
Bronchodilating compositions and methods are provided. The compositions are intended for administration as a nebulized aerosol. In certain embodiments, the compositions contain formoterol, or a derivative thereof. Methods for treatment, prevention, or amelioration of one or more symptoms of bronchoconstrictive disorders using the compositions provided herein are also provided.
US08114909B2 Treating or preventing restless legs syndrome using prodrugs of GABA analogs
Disclosed herein are methods of using prodrugs of gamma aminobutyric acid (GABA) analogs and pharmaceutical compositions thereof to treat or prevent restless legs syndrome in humans, and pharmaceutical compositions of prodrugs of GABA analogs useful in treating or preventing restless legs syndrome.
US08114908B2 Production of peracids using an enzyme having perhydrolysis activity
A process is provided for producing peroxycarboxylic acids from carboxylic acid esters. More specifically, carboxylic acid esters are reacted with an inorganic peroxide, such as hydrogen peroxide, in the presence of an enzyme catalyst having perhydrolysis activity. The present perhydrolase catalysts are classified as members of the carbohydrate esterase family 7 (CE-7) based on the conserved structural features. Further, disinfectant formulations comprising the peracids produced by the processes described herein are provided.
US08114907B2 Method for treating a pulmonary disease state in mammals by up regulating indigenous in vivo levels of inflammatory agents in mammalian cells
The present invention provides novel methods for treating a pulmonary disease state in mammals by up or down regulating indigenous in vivo levels of an inflammatory agent in mammalian cells comprising contacting the mammalian cells with a therapeutically effective amount of an inflammatory regulator, wherein the inflammatory agent is selected from the group consisting of cytokines, transforming growth factor-β, elastase, and white blood cells, and wherein the inflammatory regulator is selected from the group consisting of pyruvates and pyruvate precursors.
US08114905B2 Compacted 2,2-dibromo-3-nitrilopropionamide
The present invention provides an essentially pure compacted 2,2-Dibromo-3-nitrilopropionamide (DBNPA) in a granular and/or tablet and/or briquette and/or pellet form. The present invention further provides a process for preparing the same essentially pure compacted DBNPA.
US08114904B2 Luminescence quenchers and fluorogenic probes for detection of reactive species
Provided herein are compounds or fluorogenic probes which can be used as reagents for measuring, detecting and/or screening ROS or RNS such as peroxynitrite or hypochlorite. Provided also herein are methods that can be used to measure, directly or indirectly, the amount of peroxynitrite or hypochlorite in chemical samples and biological samples such as cells and tissues in living organisms. Specifically, the methods include the steps of contacting the fluorogenic probes disclosed herein with the samples to form one or more fluorescent compounds, and measuring fluorescence properties of the fluorescent compounds. Provided also herein are high-throughput screening fluorescent methods for detecting or screening peroxynitrite or compounds that can increase or decrease the level of peroxynitrite or hypochlorite in chemical and biological samples.
US08114902B2 2-aminobutanol compound and use thereof for medical purposes
Disclosed is a 2-aminobutanol compound represented by the following formula (I) or a pharmaceutically acceptable acid addition salt thereof, or a hydrate thereof, or a solvate thereof, as well as a production method of the 2-aminobutanol compound of formula (I). The 2-aminobutanol compounds of formula (I) have few side effects including bradycardia and have superior peripheral blood lymphocyte-decreasing effects.
US08114900B2 Amorphous carvedilol dihydrogen phosphate
The invention encompasses novel amorphous and crystalline forms of carvedilol phosphate, carvedilol hydrogen phosphate, and carvedilol dihydrogen phosphate as well as methods of making the novel amorphous and crystalline forms. Also disclosed are pharmaceutical compositions comprising the novel amorphous and crystalline forms and uses thereof.
US08114897B2 Pesticidal composition and method for controlling a pest
A pesticidal composition containing 4-methoxymethyl-2,3,5,6-tetrafluorobenzyl 3-(2-cyano-1-propenyl)-2,2-dimethylcyclopropanecarboxylate and 1-(2-chloro-1,3-thiazolyl)methyl-3-methyl-2-nitroguanidine has a high pesticidal activity.
US08114896B2 Method and composition for potentiating an opiate analgesic
Composition and methods of treating pain and reducing or reversing tolerance to opiate analgesics are disclosed. The composition and method utilize an opiate analgesic and an endothelin antagonist as active agents to treat pain in mammals, including humans.
US08114895B2 Use of bipyridine compound ‘Caerulomycin A’ derivatives and analogs thereof as immunosuppressive agents
The present invention relates to an isolated bioactive molecule Caerulomycin A, derivatives and analogs thereof as effective immunosuppressive agents. The immunosuppressive property of the compound is targeted in particular against the lymphocytes, CD4+ T cells, CD8+ T cells and B cells and in the production of IL-4 and IFN-γ and antibodies. The compound operates through a mechanism by downregulating the expression of activation marker CD28 and upregulating the immunosuppressive marker CTLA-4. Caerulomycin A has previously been isolated from Streptomyces caeruleus and found to have useful antifungal activity. Prior to the present invention however, this compound had not been determined to have immunomodulatory activity.
US08114892B2 Methods and compositions for the treatment of Parkinson's Disease
The invention features methods and kits for treating or inhibiting the development of Parkinson's Disease by administering 7-chloro-4-aminoquinoline compounds, e.g., amodiaquine or glafenine. Stem cells are also useful in the methods of the invention and may be administered separately from or together with 7-chloro-4-aminoquinoline compounds. The invention further features methods of identifying additional chemical compounds that are useful in the treatment or inhibition of the development of Parkinson's Disease.
US08114891B2 4-substituted quinuclidine derivatives, methods of production, pharmaceutical uses thereof
The present invention relates to compounds and formulations capable of affecting nicotinic acetylcholine receptors (nAChRs), for example, as modulators of specific nicotinic receptor subtypes (specifically, the alpha7 nAChR subtype). The present invention also relates to methods for treating a wide variety of conditions and disorders, particularly those associated with dysfunction of the central and autonomic nervous systems.
US08114888B2 Isothiazoloquinolones and related compounds as anti-infective agents
The invention provides certain compounds and salts of Formula I and Formula II: which possess antimicrobial activity. The invention also provides novel synthetic intermediates useful in making compounds of Formula I and Formula II. The variables A1, R2, R3, R5, R6, R7, A8 and R9 are defined herein.
US08114875B2 Substituted N-heterocyclic compounds and their use as dopamine D3 receptor ligands
The invention relates to substituted N-heterocyclic compounds of general formula (I.A) and to the tautomers of the compounds the physiologically acceptable salts of the compounds and the physiologically acceptable salts of the tautomers of the compounds. The invention also relates to the use of these compounds and their pharmacologically acceptable salts in the production of a pharmaceutical agent for treating diseases that respond to the influence exerted by dopamine D3 receptor ligands, especially for treating diseases of the central nervous system, especially schizophrenia and/or depression.
US08114873B2 1,4-disubstituted naphthalenes as inhibitors of p38 map kinase
Naphthalene-based compounds having linked heterocyclic and aromatic rings capable of inhibiting P38, methods for inhibiting P38 in vivo or in vitro, diagnostics for determining activity in the treatment of P38 and/or cytokine-associated conditions and methods for treating conditions associated with P38 activity or cytokine activity; more particularly naphthalene-based compounds of Formula (I) having a morpholine heterocyclic ring, and methods of use thereof
US08114868B2 Cyclic inhibitors of 11β-hydroxysteroid dehydrogenase 1
Disclosed is a compound represented by Formula (Im1) or a pharmaceutically acceptable salt, enantiomer or diastereomer thereof. Also disclosed are pharmaceutical compositions comprising the compound of Formula (Im1) or a pharmaceutically acceptable salt, enantiomer or diastereomer thereof and methods of inhibiting 11β-HSD1 activity comprising the step of administering to a mammal in need of such treatment an effective amount of a compound of Formulas (Im1), or a pharmaceutically acceptable salt, enantiomer or diastereomer thereof.
US08114858B2 Derivatives of 4- or 5-aminosalicylic acid
The present invention provides new derivatives of 4- or 5-aminosalicylic acid, and a pharmaceutical composition containing these derivatives of 4- or 5-aminosalicylic acid as active ingredients, useful for the treatment of intestinal diseases such as inflammatory bowel disease (IBD) and irritable bowel syndrome (IBS) and for the prevention/treatment of colon cancer. More particularly, these derivatives comprise a hydrogen sulfide releasing moiety linked via an azo, an ester, an anhydride, a thioester or an amide linkage to a molecule of 4- or 5-aminosalicylic acid. Furthermore, the present invention provides a process for preparing these compounds and their use for treating IBD and IBS and the prevention/treatment of colon cancer.
US08114857B2 Derivatives of 4- or 5-aminosalicylic acid
The present invention provides new derivatives of 4- or 5-aminosalicylic acid, and a pharmaceutical composition containing these derivatives of 4- or 5-aminosalicylic acid as active ingredients, useful for the treatment of intestinal diseases such as inflammatory bowel disease (IBD) and irritable bowel syndrome (IBS) and for the prevention/treatment of colon cancer. More particularly, these derivatives comprise a hydrogen sulfide releasing moiety linked via an azo, an ester, an anhydride, a thioester or an amide linkage to a molecule of 4- or 5-aminosalicylic acid. Furthermore, the present invention provides a process for preparing these compounds and their use for treating IBD and IBS and the prevention/treatment of colon cancer.
US08114855B2 Low density cosmetic formulations, cosmetic products containing the same and methods of treating hair, nails and/or skin using the same
Low density cosmetic formulations which comprise: (a) a cosmetic mixture; and (b) a gas incorporated in the cosmetic mixture; wherein the cosmetic mixture comprises (i) an alk(en)ylpolyglycoside, (ii) a quaternary ammonium polymer, and (iii) a thickener, are described along with suitable cosmetic mixtures for forming such low density formulations, methods of forming such formulations and methods of treating skin, hair, nails and/or combinations thereof by contacting the skin, hair and/or nails with such formulations and/or products containing such formulations.
US08114854B2 Crystalline forms of gemcitabine amide prodrug, compositions and use thereof
The present invention relates to novel crystal forms of an amide prodrug of gemcitabine, compositions thereof and methods for using.
US08114853B2 Methods of treating smooth muscle cell disorders
The present invention provides methods of detecting cells showing smooth muscle differentiation. The present invention further provides methods of detecting tumor cells. The present invention further provides compositions and methods for treating smooth muscle cell disorders.
US08114852B2 N-linked glycosylation alteration in E1 glycoprotein of classical swine fever virus and novel classical swine fever virus vaccine
E1, along with Erns and E2 is one of the three envelope glycoproteins of Classical Swine Fever Virus (CSFV). Our previous studies indicated that glycosylation status of either E2 or Erns strongly influence viral virulence in swine. Here, we have investigated the role of E1 glycosylation of highly virulent CSFV strain Brescia during infection in the natural host. The three putative glycosylation sites in E1 were modified by site directed mutagenesis of a CSFV Brescia infectious clone (BICv). A panel of virus mutants was obtained and used to investigate whether the removal of putative glycosylation sites in the E1 glycoprotein would affect viral virulence/pathogenesis in swine. We observed that rescue of viable virus was completely impaired by removal of all three putative glycosylation sites in E1. Single mutations of each of the E1 glycosylation sites showed that CSFV amino acid N594 (E1.N3 virus), as well the combined mutation of N500 and N513 (E1.N1N2 virus) resulted in BICv attenuation. Infection of either E1.N1N2 or E1.N3 viruses were able to efficiently protected swine from challenge with virulent BICv at 3 and 28 days post-infection. These results, along with those demonstrating the role of glycosylation of Erns and E2, suggest that manipulation of the pattern of glycosylation could be a useful tool for development of CSF live-attenuated vaccines.
US08114841B2 Maxillofacial bone augmentation using rhPDGF-BB and a biocompatible matrix
The present invention provides effective new methods and materials for maxillofacial bone augmentation, particularly alveolar ridge augmentation, that are free of problems associated with prior art methods. In one embodiment, these materials include human recombinant platelet derived growth factor (rhPDGF-BB) and a biocompatible matrix. In another embodiment, these materials include rhPDGF-BB, a deproteinized bone block or calcium phosphate, and a bioresorbable membrane. The use of these materials in the present method is effective in regenerating maxillofacial bones and facilitating achievement of stable osseointegrated implants. The mandible and maxilla are preferred bones for augmentation, and enhancement of the alveolar ridge is a preferred embodiment of the present invention.
US08114839B2 Protease resistant modified erythropoietin polypeptides
Modified erythropoietin polypeptides that include the mutation R131Q, and uses thereof are provided. Also provided are pharmaceutical compositions, including compositions formulated for oral administration, that contain the modified erythropoietin polypeptides and uses of the compositions to treat diseases and conditions treated by erythropoietin.
US08114832B2 Method for detecting and/or removing a protein comprising a cross-beta structure from a pharmaceutical composition
The invention relates to the detection and/or removal of conformationally altered proteins and/or molecules comprising a cross-β structure from a pharmaceutical composition. Disclosed is that unwanted and/or toxic side effects of pharmaceuticals are caused by proteins present in the pharmaceutical and adopting a cross-β structure conformation. Further disclosed is a method for detecting a protein in a pharmaceutical composition, the method comprising: contacting the pharmaceutical composition or any of its constituents comprising a protein with at least one cross-β structure-binding compound resulting in a bound protein and/or peptide comprising a cross-β structure and; detecting whether bound protein and/or peptide comprising a cross-β structure are present in the pharmaceutical composition or any of its constituents comprising a protein. Further described are methods for removing cross-β structures from a pharmaceutical composition and controlling the manufacture of a pharmaceutical composition.
US08114827B2 Paste-like detergent formulation comprising branched alkoxylated fatty alcohols as non-ionic surfactants
The invention relates to a hydrous, paste-like cleaning or detergent composition comprising an emulsion having an aqueous phase and an oil phase, the composition comprises based on the whole concentrate 1 to 50 wt-% of one or more alkalinity source, 1 to 60 wt-% of a guerbet alcohol ethoxylate of the formula R1—(OC2H4)n—OH, wherein R1 is a branched C9 to C20 alkyl group and n is from 2 to 10, 1 to 30 wt-% of a linear alkoxylated fatty alcohol of the formula R2—(OC2H4)x—(OC3H6)y—OH, wherein R2 is a linear C10 to C16 group and n is from 3 to 7 and m is from 3 to 7, 0.01-10 wt-% of one or more crosslinked or partly crosslinked polyacrylic acid or polymethacrylic acid or mixtures thereof, 1-10 wt-% of a thickener system comprising the following components: 1-5 wt-% of a polyacrylate, 0-5 wt-% of a swellable phyllosilicate, 0-2 wt-% of a polyethylene glycol with the provision that the thickener system comprises at least two of these components, and the rest up to 100 wt-% is water.
US08114823B2 Isomers of bicyclo[2.2.1]hept-5-ene-2-carboxylic acid, ethyl ester and their use in perfume compositions
The present invention is directed to a fragrance compound of bicyclo[2.2.1]hept-5-ene-2-carboxylic acid, ethyl ester: and its isomeric compounds.
US08114822B2 Soluble oil containing overbased sulfonate additives
The present invention is directed to a soluble oil composition capable of forming stable emulsions exhibiting superior performance and possessing excellent utility as cutting oil for machines. The composition comprises an overbased alkaline earth metal sulfonate possessing anti-wear properties.
US08114821B2 Method for producing composite material for coating applications
The production of solid lubricant agglomerates by combining solid lubricant powder, an inorganic binder, other fillers if optionally desired, and a liquid to form a mixture, and driving off the liquid to form dry agglomerates which are subsequently classified by size or milled and classified by size to yield agglomerates of a desired size range. These agglomerates are then treated to stabilize the binder, thereby strengthening the binder and rendering it nondispersible in the liquid. The undesired size ranges can be readily recycled because the agglomerates with untreated binder can be reprocessed, thereby promoting high recovery rates.
US08114818B2 Methods and compositions for altering the viscosity of treatment fluids used in subterranean operations
An embodiment of the present invention includes a method comprising introducing a cyclodextrin modifier into a well bore penetrating a subterranean formation. Another embodiment of the present invention includes a method of reducing viscosity of a treatment fluid comprising contacting a treatment fluid comprising a base fluid and a viscosifying agent with at least a cyclodextrin modifier wherein the cyclodextrin modifier interacts with the viscosifying agent to reduce viscosity of the treatment fluid. Another embodiment of the present invention includes a method of increasing viscosity of an aqueous fluid comprising contacting at least a hydrophobically modified polymer and a cyclodextrin modifier in the presence of at least the aqueous fluid, wherein the cyclodextrin modifier interacts with the hydrophobically modified polymer to viscosify the aqueous fluid. Another embodiment of the present invention includes a subterranean treatment fluid comprising a base fluid and a cyclodextrin modifier.
US08114816B2 Herbicidally active 4-(3-alkylsulfinylbenzoyl)pyrazoles
4-(3-Alkylsulfinylbenzoyl)pyrazoles of the formula (I) are described as herbicides. In this formula (I), R1 to R4, X and Y are radicals such as hydrogen, organic radicals such as alkyl, and other radicals such as halogen.
US08114812B2 Two-sided thermal paper
Imaging elements for dual-sided direct thermal printing are described, generally comprising a substrate and a thermally sensitive coating on each side. Calendering is provided to produce a smoothness of 75 Bekk or greater on each side of the media product. A subcoat or base coat, e.g., of calcium carbonate or clay, may be provided on paper substrates to enhance smoothness of finish and the quality of thermal printing.
US08114805B2 Method of preparing heteropoly acid catalyst
The present invention relates to a method of preparing a heteropoly acid catalyst used for the production of methacrylic acid by gas phase oxidation of methacrolein, more precisely a method of preparing a heteropoly acid catalyst comprising the steps of preparing a slurry by adding metal precursors and ammonium salt to protonic acid Keggin-type heteropoly acid aqueous solution and stirring thereof; and drying, molding and firing the slurry to give a catalyst. The present invention provides a method of preparing a heteropoly acid catalyst exhibiting high methacrolein conversion rate and methacrylic acid selectivity without pre-firing process by using high purity protonic acid Keggin-type heteropoly acid and ammonium salt.
US08114800B2 Ceramic powder, ceramic layer and layer system having gadolinium/mixed crystal pyrochlore phases and oxides
There is described a ceramic powder, ceramic layer and layer system having gadolinium/mixed crystal pyrochlore phases and oxides. Besides a good thermal insulation property, thermal insulation layer systems must also have a long lifetime of the thermal insulation layer. The layer system according to the invention has an outer ceramic layer, which comprises a mixed crystal of gadolinium zirconate and gadolinium hafnate.
US08114799B2 Functionally gradient SiC/SiC ceramic matrix composites with tailored properties for turbine engine applications
A ceramic matrix composite with a ceramic matrix and a gradient layering of coating on ceramic fibers. The coating typically improves the performance of the composite in one direction while degrading it in another direction. For a SiC-SiC ceramic matrix composite, a BN coating is layered in a gradient fashion or in a step-wise fashion in different regions of the article comprising the ceramic. The BN coating thickness is applied over the ceramic fibers to produce varying desired physical properties by varying the coating thickness within differing regions of the composite, thereby tailoring the strength of the composite in the different regions. The coating may be applied as a single layer as a multi-layer coating to enhance the performance of the coating as the ceramic matrix is formed or infiltrated from precursor materials into a preform of the ceramic fibers.
US08114791B2 Static dissipative textile
The present invention relates generally to a static dissipative textile having an electrically conductive surface achieved by coating the textile with an electrically conductive coating in a variety of patterns. The electrically conductive coating is comprised of a conducting agent and a binding agent, and optionally a dispersing agent and/or a thickening agent. The static dissipative textile generally comprises a fabric which may be screen printed or otherwise coated with a conductive coating on the backside of the fabric so that the conductive coating does not interfere with the appearance of the face of the fabric. The economically produced fabric exhibits relatively permanent static dissipation properties and conducts electric charge at virtually any humidity, while the conductive coating does not detrimentally affect the overall appearance or tactile properties of the fabric. Also encompassed within this invention is a method for producing a static dissipative textile having an electrically conductive surface.
US08114790B2 Plasma CVD method, silicon nitride film formation method, semiconductor device manufacturing method, and plasma CVD apparatus
A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave generation source through the slots into the process chamber; a gas supply mechanism configured to supply a film formation source gas into the process chamber; and an RF power supply configured to apply an RF power to the worktable. The apparatus is preset to turn a nitrogen-containing gas and a silicon-containing gas supplied in the process chamber into plasma by the microwaves, and to deposit a silicon nitride film on a surface of the target substrate by use of the plasma, while applying the RF power to the worktable.
US08114788B2 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device. The method includes forming an energy cured resin layer on a semiconductor substrate having an electrode pad and a passivation film; fusing the resin layer so that fusion of a surface section is progressed more than of a central section by a first energy supply processing; forming a resin boss by curing and shrinking the resin layer by a second energy supply processing; and forming an electrical conducting layer which is electrically connected to the electrode pad and passes over the resin boss.
US08114782B2 Method for etching organic hardmasks
A method of etching or removing an amorphous carbon organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an amorphous carbon organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the amorphous carbon organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture to create a plasma of the mixture. The method further includes contacting the amorphous carbon organic hardmask with the plasma, with the amorphous carbon organic hardmask being at a temperature in excess of 200° C., to remove the amorphous carbon organic hardmask without substantially harming the underlying substrate.
US08114780B2 Method for dielectric material removal between conductive lines
A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts.
US08114777B2 Horizontal nanotube/nanofiber growth method
A method for forming a nanotube/nanofiber growth catalyst on the sides of portions of a layer of a first material, comprising the steps of depositing a thin layer of a second material; opening this layer at given locations; depositing a very thin catalyst layer; depositing a layer of the first material over a thickness greater than that of the layer of the second material; eliminating by chem./mech. polishing the upper portion of the structure up to the high level of the layer of the second material; and eliminating the second material facing selected sides of the layer portions of the first material.
US08114775B2 Dihydroxy enol compounds used in chemical mechanical polishing compositions having metal ion oxidizers
A chemical mechanical polishing composition contains 1) water, 2) optionally an abrasive material, 3) an oxidizer, preferably a per-type oxidizer, 4) a small amount of soluble metal-ion oxidizer/polishing accelerator, a metal-ion polishing accelerator bound to particles such as to abrasive particles, or both; and 5) at least one of the group selected from a) a small amount of a chelator, b) a small amount of a dihydroxy enolic compound, and c) a small amount of an organic accelerator. Ascorbic acid in an amount less than 800 ppm, preferably between about 100 ppm and 500 ppm, is the preferred dihydroxy enolic compound. The polishing compositions and processes are useful for substantially all metals and metallic compounds found in integrated circuits, but is particularly useful for tungsten. The present invention also pertains to surface-modified colloidal abrasive polishing compositions and associated methods of using these compositions, particularly for chemical mechanical planarization, wherein the slurry comprises low levels of chelating free radical quenchers, non-chelating free radical quenchers, or both.
US08114773B2 Cleaning solution, cleaning method and damascene process using the same
A cleaning solution is provided. The cleaning solution includes (a) 0.01-0.1 wt % of hydrofluoric acid (HF); (b) 1-5 wt % of a strong acid, wherein the strong acid is an inorganic acid; (c) 0.05-0.5 wt % of ammonium fluoride (NH4F); (d) a chelating agent containing a carboxylic group; (e) triethanolamine (TEA); (f) ethylenediaminetetraacetic acid (EDTA); and (g) water for balance.
US08114771B2 Semiconductor wafer scale package system
A semiconductor wafer scale package system is provided including providing a semiconductor substrate having a through-hole via with a conductive coating, forming a filled via by filling the through-hole via with a conductive material, coupling a package substrate to the filled via, and singulating a chip scale package from the semiconductor substrate and the package substrate.
US08114770B2 Pre-treatment method to increase copper island density of CU on barrier layers
A method for producing on-chip interconnect structures on a substrate is provided, comprising at least the steps of providing a substrate and depositing a ruthenium-comprising layer on top of said substrate, and then performing a pre-treatment of the Ru-comprising layer electrochemically with an HBF4-based electrolyte, and then performing electrochemical deposition of copper onto the pre-treated Ru-comprising layer.
US08114769B1 Methods and structures to enable self-aligned via etch for Cu damascene structure using trench first metal hard mask (TFMHM) scheme
A method for semiconductor fabrication using a trench first metal hard mask (TFMHM) process for damascene structures includes forming a secondary metal hard mask layer above a first metal hard mask layer after trench opening for the via (and trench) etching. The secondary metal hard mask layer is formed of metal material substantially resistant to the etching process which enables via etching to self-align (using an edge of the secondary metal mask layer). In one embodiment, the secondary metal mask layer is formed using an electroless deposition process, and may include nickel (Ni), cobalt (Co), gold, (Au), palladium (Pd), cadmium (Cd) silver (Ag), ruthenium (Ru), and alloys and/or combinations thereof. Because the first metal hard mask is usually formed of TiN, the trench and via etching process removes a significant amount of the TiN layer. Utilization of the secondary metal hard mask to protect the first metal hard mask layer further enables a reduction in the thickness of the first metal hard mask layer.
US08114767B2 Structure, semiconductor structure and method of manufacturing a semiconductor structure and packaging thereof
A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a dielectric material formed between a design sensitive structure and a passivation layer. The design sensitive structure comprising a lower wiring layer electrically and mechanically connected to a higher wiring level by a via farm. A method and structure is also provided.
US08114766B1 Method for manufacturing semiconductor device
Method of manufacturing a semiconductor device, which achieves a reduction in manufacturing cost and prevents, a damage on the interconnect layer by an influence of the etchant solution, since the support substrate can be easily stripped from the interconnect layer. The method of manufacturing a semiconductor device includes: forming an interconnect film, by forming a seed metal layer on a support substrate and a protective film contacting with an end of an interface between the support substrate and the seed metal layer, and by growing a plated material from a surface of the seed metal layer; mounting a semiconductor chip on the interconnect film; removing at least a portion of the protective film to form a region where the support substrate and the seed metal layer are exposed; and stripping the support substrate from the region as a starting point to remove thereof from the seed metal layer.
US08114765B2 Methods for increased array feature density
The embodiments generally relate to methods of making semiconductor devices, and more particularly, to methods for making semiconductor pillar structures and increasing array feature pattern density using selective or directional gap fill. The technique has application to a variety of materials and can be applied to making monolithic two or three-dimensional memory arrays.
US08114761B2 Method for doping non-planar transistors
Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.
US08114754B2 Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods
Methods of fabricating semiconductor structures and devices include bonding a seed structure to a substrate using a glass. The seed structure may comprise a crystal of semiconductor material. Thermal treatment of the seed structure bonded to the substrate using the glass may be utilized to control a strain state within the seed structure. The seed structure may be placed in a state of compressive strain at room temperature. The seed structure bonded to the substrate using the glass may be used for growth of semiconductor material, or, in additional methods, a seed structure may be bonded to a first substrate using a glass, thermally treated to control a strain state within the seed structure and a second substrate may be bonded to an opposite side of the seed structure using a non-glassy material.
US08114753B2 Buried decoupling capacitors, devices and systems including same, and methods of fabrication
A buried decoupling capacitor apparatus and method are provided. According to various embodiments, a buried decoupling capacitor apparatus includes a semiconductor-on-insulator substrate having a buried insulator region and top semiconductor region on the buried insulator region. The apparatus embodiment also includes a first capacitor plate having a doped region in the top semiconductor region in the semiconductor-on-insulator substrate. The apparatus embodiment further includes a dielectric material on the first capacitor plate, and a second capacitor plate on the dielectric material. According to various embodiments, the first capacitor plate, the dielectric material and the second capacitor plate form a decoupling capacitor for use in an integrated circuit.
US08114750B2 Lateral diffusion field effect transistor with drain region self-aligned to gate electrode
A disposable structure displaced from an edge of a gate electrode and a drain region aligned to the disposable structure is formed. Thus, the drain region is self-aligned to the edge of the gate electrode. The disposable structure may be a disposable spacer, or alternately, the disposable structure may be formed simultaneously with, and comprise the same material as, a gate electrode. After formation of the drain regions, the disposable structure is removed. The self-alignment of the drain region to the edge of the gate electrode provides a substantially constant drift distance that is independent of any overlay variation of lithographic processes.
US08114749B2 Method of fabricating high voltage device
A device for protecting a semiconductor device from electrostatic discharge may include a high voltage first conductivity type well formed in a semiconductor substrate. A first stack region may have a first conductivity type drift region, and a first conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A second stack region may have a second conductivity type drift region, and a second conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A device isolating film formed between the first stack region and the second stack region for isolating the first stack region from the second stack region.
US08114747B2 Method for creating 3-D single gate inverter
A 3-D (Three Dimensional) inverter having a single gate electrode. The single gate electrode has a first gate dielectric between the gate electrode and a body of a first FET (Field Effect transistor) of a first doping type, the first FET having first source/drain regions in a semiconductor substrate, or in a well in the semiconductor substrate. The single gate electrode has a second gate dielectric between the gate electrode and a body of a second FET of opposite doping to the first FET. Second source/drain regions of the second FET are formed from epitaxial layers grown over the first source/drain regions.
US08114745B2 High voltage CMOS devices
A transistor suitable for high-voltage applications is provided. The transistor is formed on a substrate having a deep well of a first conductivity type. A first well of the first conductivity type and a second well of a second conductivity type are formed such that they are not immediately adjacent each other. The well of the first conductivity type and the second conductivity type may be formed simultaneously as respective wells for low-voltage devices. In this manner, the high-voltage devices may be formed on the same wafer as low-voltage devices with fewer process steps, thereby reducing costs and process time. A doped isolation well may be formed adjacent the first well on an opposing side from the second well to provide further device isolation.
US08114743B2 Integrated circuit device with a semiconductor body and method for the production of an integrated circuit device
An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.
US08114742B2 Nonvolatile semiconductor memory and method of manufacturing the same
A method of forming a nonvolatile memory device which includes forming a first gate electrode on a gate insulating film formed on a semiconductor substrate. The first gate electrode having a lower portion formed on the gate insulating film and an upper portion having a gate length less than that of the lower portion formed on the lower portion. A spacer is formed contacting surfaces of the upper and lower portions, wherein a length of the spacer and the upper portion equals the length of the lower portion. An electric charge trapping film covers a portion of the semiconductor substrate, a surface of the lower portion, and a surface of the spacer. A second gate electrode is then formed in a side direction of the first gate electrode and electrically insulated from the first gate electrode by the electric charge trapping film. The second gate electrode has a distance between the upper portion of the first gate electrode thai is greater than a distance between the lower portion and is separated from the upper portion of the first gate electrode by the electric charge trapping film and the spacer.
US08114741B2 Oxygen-rich layers underlying BPSG
An integrated circuit structure and a method of forming the same are provided. The method includes providing a surface; performing an ionized oxygen treatment to the surface; forming an initial layer comprising silicon oxide using first process gases comprising a first oxygen-containing gas and tetraethoxysilane (TEOS); and forming a silicate glass over the initial layer. The method may further include forming a buffer layer using second process gases comprising a second oxygen-containing gas and TEOS, wherein the first and the second process gases have different oxygen-to-TEOS ratio.
US08114740B2 Profile of flash memory cells
A semiconductor structure includes a semiconductor substrate; a tunneling layer on the semiconductor substrate; a source region adjacent the tunneling layer; and a floating gate on the tunneling layer. The floating gate comprises a first edge having an upper portion and a lower portion, wherein the lower portion is recessed from the upper portion. The semiconductor structure further includes a blocking layer on the floating gate, wherein the blocking layer has a first edge facing a same direction as the first edge of the floating gate.
US08114739B2 Semiconductor device with oxygen-diffusion barrier layer and method for fabricating same
Methods are provided for fabricating a transistor. An exemplary method involves depositing an oxide layer overlying a layer of semiconductor material, forming an oxygen-diffusion barrier layer overlying the oxide layer, forming a layer of high-k dielectric material overlying the oxygen-diffusion barrier layer, forming a layer of conductive material overlying the layer of high-k dielectric material, selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer to form a gate stack, and forming source and drain regions about the gate stack. When the conductive material is an oxygen-gettering conductive material, the oxygen-diffusion barrier layer prevents diffusion of oxygen from the deposited oxide layer to the oxygen-gettering conductive material.
US08114738B2 System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory
A system and method are disclosed for increasing the reliability of a channel erase procedure in an electrically erasable programmable read only memory (EEPROM) memory cell. A memory cell of the present invention comprises a program gate, a control gate, and a floating gate that erase data using a channel erase procedure. An erase capacitor is coupled to the floating gate to provide a low voltage bias that decreases the voltage that is required to perform a Fowler-Nordheim erase process in the memory cell. The erase capacitor of the present invention is formed without adding a step in the manufacturing process of the memory cell. Memory cells of the present invention are low cost, high endurance, low voltage memory cells.
US08114737B2 Methods of forming memory cells on pillars and memories with memory cells on pillars
Methods of fabricating memory are disclosed. For example, a method includes fabricating rows of memory cells on pillars separated by isolation regions therebetween. Each pillar has a pair of memory cells, each on an opposite side thereof. The method also includes fabricating control gates substantially between the rows of memory cells, each control gate to control half the cells of each of its adjacent rows of memory cells, and fabricating word lines for the array, the word lines extending substantially parallel to the control gates for the cells.
US08114732B2 Method for manufacturing twin bit structure cell with Al2O3/nano-crystalline Si layer
A method and system for forming a non-volatile memory structure. The method includes providing a semiconductor substrate and forming a gate dielectric layer overlying a surface region of the semiconductor substrate. A polysilicon gate structure is formed overlying the gate dielectric layer. The method subjects the polysilicon gate structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying the polysilicon gate structure and formation of an undercut region underneath the polysilicon gate structure. An aluminum oxide material is formed overlying the polysilicon gate structure filling the undercut region. In a specific embodiment, the aluminum oxide material has a nanocrystalline silicon material sandwiched between a first aluminum oxide layer and a second aluminum oxide layer. The aluminum oxide material is subjected to a selective etching process while maintaining the aluminum oxide material in an insert region in a portion of the undercut region. The method forms a sidewall structure overlying a side region of the polysilicon gate structure.
US08114729B2 Differential poly doping and circuits therefrom
A method of fabricating a CMOS integrated circuit and integrated circuits therefrom includes the steps of providing a substrate having a semiconductor surface, forming a gate dielectric layer on the semiconductor surface and a polysilicon including layer on the gate dielectric. A portion of the polysilicon layer is masked, and pre-gate etch implant of a first dopant type into an unmasked portion of the polysilicon layer is performed, wherein masked portions of the polysilicon layer are protected from the first dopant. The polysilicon layer is patterned to form a plurality of polysilicon gates and a plurality of polysilicon lines, wherein the masked portion includes at least one of the polysilicon lines which couple a polysilicon gate of a PMOS device to a polysilicon gate of an NMOS device. Fabrication of the integrated circuit is then completed, wherein the integrated circuit includes at least one first region formed in the masked portion lacking the first dopant in the polysilicon gates from the pre-gate etch implant and at least one second region formed in the unmasked portion having the first dopant in the polysilicon gates from the pre-gate etch implant.
US08114725B1 Method of manufacturing MOS device having lightly doped drain structure
The present invention discloses a method of manufacturing MOS device having a lightly doped drain (LDD) structure. The method includes: providing a first conductive type substrate; forming an isolation region in the substrate to define a device area; forming a gate structure in the device area, the gate structure having a dielectric layer, a stack layer, and a spacer layer on the sidewalls of the stack layer; implanting second conductive type impurities into the substrate with a tilt angle to form an LDD structure, wherein at least some of the impurities are implanted into the substrate through the spacer to form part of the LDD structure below the spacer layer; and implanting second conductive type impurities into the substrate to form source and drain.
US08114723B2 Method of forming multi-high-density memory devices and architectures
A structure, memory devices using the structure, and methods of fabricating the structure. The structure includes: an array of nano-fins, each nano-fin comprising an elongated block of semiconductor material extending axially along a first direction, the nano-fins arranged in groups of at least two nano-fins each, wherein ends of nano-fins of each adjacent group of nano-fins are staggered with respect to each other on both a first and a second side of the array; wherein nano-fins of each group of nano-fins are electrically connected to a common contact that is specific to each group of nano-fins such that the common contacts comprise a first common contact on the first side of the array and a second common contact on the second side of the array; and wherein each group of nano-fins has at least two gates that electrically control the conductance of nano-fins of the each group of nano-fins.
US08114718B2 Antiblooming imaging apparatus, systems, and methods
Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct charge carriers away from the photosensitive region during an integration time.
US08114716B2 Deletable nanotube circuit
Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.
US08114711B2 Method of electrically connecting a microelectronic component
A method of treating a component can include providing a component including a plurality of metallic posts extending generally parallel to one another. The providing step can be performed so that the posts have solder on the tips of the posts but not covering other portions of the posts. The method can include reflowing the solder provided on the posts so that the solder coats the posts. The providing step may be performed so that, prior to the reflowing step, the solder covers only the tips of the posts. The providing step can include depositing portions of the solder on a surface of a metallic sheet and etching the sheet from the surface. The plurality of posts may comprise elongated posts.
US08114710B2 Manufacturing method of resin-sealed semiconductor device
The radiation performance of a resin sealed semiconductor package is enhanced and further the fabrication yield thereof is enhanced. A drain terminal coupled to the back surface drain electrode of a semiconductor chip is exposed at the back surface of an encapsulation resin section. Part of the following portion and terminal is exposed at the top surface of the encapsulation resin section: the first portion of a source terminal coupled to the source pad electrode of the semiconductor chip and a gate terminal coupled to the gate pad electrode of the semiconductor chip. The remaining part of the second portion of the source terminal and the gate terminal is exposed at the back surface of the encapsulation resin section. When this semiconductor device is manufactured, bonding material and a film member are placed between the drain terminal and the semiconductor chip. At the same time, paste-like bonding material and a film member are placed between the source terminal 3 and gate terminal and the semiconductor chip. The paste-like bonding material is cured and turned into bonding material. As the result of use of the film members, variation in the thickness of the bonding material is suppressed.
US08114706B2 Selective removal of gold from a lead frame
A method of packaging an integrated circuit, including providing a lead frame having lead fingers, where the lead frame has a gold layer thereon on a top surface and a bottom surface. An integrated circuit die is attached to the lead frame. The gold layer is substantially removed from portions of the top surface of the lead frame. The integrated circuit die is wire bonded to the lead fingers with a plurality of wire stitches subsequent to substantially removing the gold. The die is encapsulated in a mold compound to form a packaged integrated circuit.
US08114699B2 Integration manufacturing process for MEMS device
A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting a conducting element in the connecting area and the actuating area, e) forming an insulating layer on the conducting element and f) connecting the first substrate to the connecting area to form the MEMS device. The concavity contains the plural microstructures.
US08114696B2 CMOS image sensor with asymmetric well structure of source follower
Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.
US08114695B2 Solid-state image pickup element, solid-state image pickup device and production method therefor
A method of producing a solid-state image pickup element includes forming a hole portion, forming a first-conductive type high-concentration impurity region in a bottom wall of the hole portion, and forming a first-conductive type high-concentration impurity-doped element isolation region in a part of a sidewall of the hole portion and connected to the first-conductive type high-concentration impurity region. The method also includes forming a second-conductive type photoelectric conversion region beneath the first-conductive type high-concentration impurity region and adapted to undergo a change in charge amount upon receiving light, and forming a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film. The method further includes forming a second-conductive type CCD channel region in a top surface of the first-conductive type planar semiconductor layer, and forming a read channel sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.
US08114693B1 Method of fabricating solid state gas dissociating device by laser doping
A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. A first and a second Ohmic contact are applied to the first and the second doped regions of the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device to produce electromagnetic radiation upon the application of electrical power to the first and second Ohmic contacts. In another embodiment, the solid state energy conversion device operates as a photovoltaic device to produce electrical power between the first and second Ohmic contacts upon the application of electromagnetic radiation.
US08114692B2 Light source including a wavelength-converted semiconductor light emitting device and a filter
A semiconductor light emitting device comprises a light emitting layer disposed between an n-type region and a p-type region. The light emitting layer is adapted to emit first light having a first peak wavelength. A first wavelength converting material is adapted to absorb the first light and emit second light having a second peak wavelength. A second wavelength converting material is adapted to absorb either the first light or the second light and emit third light having a third peak wavelength. A filter is adapted to reflect fourth light having a fourth peak wavelength. The fourth light is either a portion of the second light or a portion of the third light. The filter is configured to transmit light having a peak wavelength longer or shorter than the fourth peak wavelength. The filter is disposed over the light emitting device in the path of at least a portion of the first, second, and third light.
US08114691B2 Semiconductor light emitting device having textured structure and method of manufacturing the same
A semiconductor light emitting diode having a textured structure and a method of manufacturing the same are provided. The semiconductor light emitting diode includes a first semiconductor layer formed into a textured structure, an intermediate layer formed between the textured structures of the patterned first semiconductor layer, and a second semiconductor layer, an active layer, and a third semiconductor layer sequentially formed on the first semiconductor layer and the intermediate layer.
US08114686B2 Phase change material based temperature sensor
A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in a digital output format. Depending on the ambient temperature, the resistance of the block of phase change material changes. By measuring a fractional resistance change compared to the resistance of the phase change material at a calibration temperature, the temperature of the region around the phase change material can be accurately measured. A logic decoder and an input/output circuit may be employed between the internal resistance measurement circuit and the input/output pads. A plurality of temperature sensing circuits containing phase change material blocks may be employed in the semiconductor chip to enable an accurate temperature profiling during chip operation.
US08114685B2 Method of manufacturing material to be etched
A method is provided, of manufacturing a material to be etched that can more preferably prevent a region to be etched from remaining as an un-etched region and reduce deviation of etched/un-etched regions. Patterning (a method of manufacturing a material to be etched) of a substrate 100, which is manufactured by performing etching through an opened region 10 by an etching mask M1, is performed by a first etching process and a second etching process that is performed after the first etching process. The second etching process is a process for etching a region including a region that is not etched by the first etching process. An un-etched region, which is the same as etched using a virtual etching mask M1′, is formed on the surface of an object to be etched by the first and second etching processes.
US08114684B2 Vertical hall effect sensor with current focus
A complementary metal oxide semiconductor (CMOS) sensor system in one embodiment includes a doped substrate, a doped central island extending downwardly within the doped substrate from an upper surface of the doped substrate, and a first doped outer island extending downwardly within the doped substrate from the upper surface of the doped substrate, the first outer island electrically isolated from the central island within an upper portion of the substrate, and electrically coupled to the central island within a lower portion of the substrate.
US08114682B2 Method for the quantitative evaluation of sex hormones in a serum sample
This invention discloses using SPR technology to simultaneously and quantitatively measure the concentrations of different sex hormones in a serum sample, which can be used to evaluate different clinical situations. It also discloses an efficient formula to make a mixed SAM that can greatly enhance the immobilization ability of the metal surface in SPR based techniques, which is good for the immobilization of relevant antibodies used for the detection of representative sex hormones in a serum sample.
US08114681B2 Highly multiplexed particle-based assays
Methods are provided for detecting and optionally quantitating multiple analytes, including nucleic acid and/or polypeptide analytes, in particle-based assays that can be highly multiplexed. Compositions, systems, and kits related to the methods are also featured.
US08114680B2 Buffy coat separator float system and method
A tube and float system for use in separation and axial expansion of the buffy coat includes a transparent or semi-transparent, flexible sample tube and a rigid separator float having a specific gravity intermediate that of red blood cells and plasma. The float includes a main body portion of reduced diameter to provide a clearance gap between the inner wall of the sample tube and the float. One or more protrusions on the main body portion serve to support the flexible tube. During centrifugation, the centrifugal force causes the diameter of the flexible tube to expand and permit density-based axial movement of the float in the tube. The float further includes a pressure relief system to alleviate pressure build up in the trapped red blood cell blood fraction below the float, thereby preventing red blood cells from being forced into the annular gap containing the buffy coat layers.
US08114678B2 Multi-dimensional high performance liquid chromatographic separation technique (STAR7) for quantitative determinations of 7 fractions in heavy petroleum streams boiling above 550 degrees F
The present invention provides quantitation of seven classes of compounds (saturates, 1-4+ ring aromatics, sulfides, and polars) present in petroleum streams boiling from 550-1050° F. Operating the present invention in the preparative mode will allow us to load and collect multi-milligram amounts of material. In the present invention, all seven fractions are produced in a single run, whereas the most commonly used preparative liquid chromatographic separations requires two or more large scale separations to generate similar fractions. The present invention uses 100 times less solvent. The present invention protocol provides a quicker and cheaper alternative to most commonly used preparative liquid chromatographic separations and is flexible enough to target many refining and chemicals problems.
US08114673B2 Sensor for oxidising agents
This invention relates to an irreversible indicator for detecting oxidizing agents, or in particular an oxygen indicator, comprising at least one redox-sensitive dyestuff, at least one semiconductor material and at least one electron donor. This indicator is activated by exposure to light of about 200-400 nm. The invention also relates to UV light detector.
US08114672B2 Method for analyzing antimony contained in glass
According to one embodiment, there is provided a method of analyzing antimony contained in glass according to its valency. This method includes milling glass containing antimony into a glass powder, weighing the glass powder and dissolving the glass powder by using hydrofluoric acid and hydrochloric acid to obtain a glass solution, masking hydrofluoric acid by adding aluminum ions to the glass solution, adding sodium borohydride and hydrochloric acid to the glass solution in which hydrofluoric acid is masked to generate a hydride of antimony (III), determining a concentration of antimony (III) contained in the glass solution based on the hydride, determining a total concentration of antimony contained in the glass solution and calculating a difference between the concentration of antimony (III) and the total concentration of antimony to obtain a concentration of antimony (V) from the difference.
US08114670B2 Skin equivalent culture
Methods of forming soft connective tissue compositions such as skin equivalents, compositions made by the methods and their uses. In particular, a method of forming a connective tissue equivalent, comprising the steps of: (i) incubating collagen-producing cells in or on a support matrix; (ii) inducing and/or enhancing collagen production by the collagen-producing cells to form a collagenous construct and degradation and replacement of the support matrix; (iii) freeze-drying the construct; and (iv) re-populating the freeze-dried construct with collagen-producing cells and/or epithelial cells and/or endothelial cells and/or mesenchymal cells, thereby forming a connective tissue equivalent, wherein: (a) the collagen-producing cells are substantially fibroblasts; for example human neonatal dermal fibroblasts; (b) the support matrix is a provisional support matrix in which the support matrix is a fibrin matrix, for example formed by thrombin-mediated polymerisation of fibrinogen; and (c) as a result of the collagen production by the collagen-producing cells the provisional fibrin support matrix is digested by the cells and is replaced by collagen, thereby essentially replacing the provisional fibrin matrix with a collagen matrix synthesised in situ by the cells.
US08114668B2 Composition for cold storage of stem cells
The invention provides a composition for cold storage of cells which includes a population of isolated stem cells, a cell medium, and isolated trophic factors, as well as devices having a plurality of the trophic factors.
US08114664B2 Scalable wall bioreactor for culture of plant and animal tissues
A flexible wall bioreactor is described that uses a small droplet size mist unit, a lower rate ambient air flow rate, and a flexible wall culture chamber to provide an environment that allows for the growth of dense root matrix, shoot cultures, and 2 and 3 dimensional animal tissues.
US08114663B1 Method for consolidated waste management and resource recovery
A waste management and resource recovery system that uses the different waste streams from typical waste sources as fuel or feedstock for its subsystems that, in turn, produce fuel, feedstock or energy for other subsystems such that all the different waste streams are effectively managed. The subsystems include a gas burner for solid and fuel wastes that supplies heat to a hydrothermal processor for saccharification of paper and cardboard. The resulting saccharification broth, along with kitchen wastes and blackwater, are supplied to a bioreactor using dark fermentation to produce hydrogen and volatile fatty acids. The hydrogen and volatile fatty acids are supplied to hydrogen and microbial fuel cells to produce electrical energy for operating the system and potable water. A steam accumulator is added to provide sufficient temperatures and pressures to reach the necessary thermodynamic states for the saccharification process. An enzymatic saccharification processor may also improve the saccharification process.
US08114656B2 Thermostable neutral metalloproteases
The present invention provides methods and compositions comprising at least one neutral metalloprotease enzyme that has improved storage stability. In some embodiments, the neutral metalloprotease finds use in cleaning and other applications. In some particularly preferred embodiments, the present invention provides methods and compositions comprising neutral metalloprotease(s) obtained from Bacillus sp. In some more particularly preferred embodiments, the neutral metalloprotease is obtained from B. amyloliquefaciens. In still further preferred embodiments, the neutral metalloprotease is a variant of the B. amyloliquefaciens neutral metalloprotease. In yet additional embodiments, the neutral metalloprotease is a homolog of the B. amyloliquefaciens neutral metalloprotease. The present invention finds particular use in applications including, but not limited to cleaning, bleaching and disinfecting.