| Document | Document Title |
|---|---|
| US08054857B2 |
Task queuing methods and systems for transmitting frame information over an I/O interface
Data-processing systems and methods are disclosed, including an I/O interface for managing the transfer of data between a processor and at least one memory. A processor can be associated with the I/O interface, such that the processor generically assembles a first or prior frame from among a plurality of frames, transmits the first or prior frame from among the plurality of frames over the I/O interface and thereafter processes and assembles a subsequent or second frame from among the plurality of frames while the first frame is transmitting, thereby providing enhanced flexibility and speed for the assembly and transmission of the plurality of frames across the I/O interface. The methods and systems disclosed also permit processor (i.e., software control) flexibility in managing the overall order and priority of frame transmission and protocol management, while enhancing hardware performance with respect to the sending of frames and control sequences without requiring real time interaction from the processor. |
| US08054856B2 |
Method for synchronizing voice traffic with minimum latency in a communications network
A supervisory communications node monitors and controls communications with a plurality of remote devices throughout a widely distributed network. A method is provided to convey and maintain information used to synchronize the packetization and burst operations within the network. During session setup, jitter constraints indirectly are used to explicitly communicate a synchronization timing reference. The timing reference is set at the beginning of a phase/period boundary used to service the session. In an embodiment, the announcement of the first grant is used as an explicit indication of the synchronization timing reference value. In another embodiment, the synchronization timing reference value is inferred if a remote device receives contiguous voice grants meeting certain conditions. In an embodiment implementing periodic scheduling, the actual arrival of the first grant is used to infer the synchronization timing reference value. In an embodiment, the present invention enables the synchronization timing reference value and/or the periodicity to be modified if network conditions indicate that packetization and burst operations are out-of-synchronization. |
| US08054849B2 |
System and method of managing video content streams
A system and method for managing video content streams are disclosed. The method includes receiving a plurality of multicast video streams at a server and buffering each video stream within a memory at the server. The method also includes generating a multicast video output at the server and a unicast video output at the server. |
| US08054848B2 |
Single DMA transfers from device drivers to network adapters
Methods and arrangements of data communications are discussed. Embodiments include transformations, code, state machines or other logic to provide data communications. An embodiment may involve receiving from a protocol stack a request for a buffer to hold data. The data may consist of all or part of a payload of a packet. The embodiment may also involve allocating space in a buffer for the data and for a header of a packet. The protocol stack may store the data in a portion of the buffer and hand down the buffer to a network device driver. The embodiment may also involve the network device driver transferring the entire packet from the buffer to a communications adapter in a single direct memory access (DMA) operation. |
| US08054836B2 |
Downlink packet data convergence protocol behavior during handover
The present invention relates to maintaining an order of received data units during a handover procedure in a wireless communication system. The present invention includes receiving a plurality of data units from a source station according to a sequence prior to handover to a target base station, wherein each data unit includes a sequence number, receiving at least one data unit having a sequence number after handover from a target base station, and delivering to a higher layer all data units received from the source base station prior to handover and having sequence numbers smaller than a sequence number of the at least one data unit received from the target base station after handover. |
| US08054834B2 |
Method and equipment for demultiplexing variable size protocol data units
The present invention relates to a method for demultiplexing MAC service data units encapsulated into MAC protocol data units, said MAC service data units comprising IP protocol data unit wherein said method comprises the following steps: receiving MAC protocol data units, demultiplexing the received MAC service data units by: detecting the beginning of a MAC service data unit by detecting a MAC layer service primitive, recursively demultiplexing said at least one IP protocol data unit contained in said MAC service data unit, detecting the end of said MAC service data unit by detecting MAC layer service primitives. |
| US08054829B2 |
Communication system and method
Embodiments of the present invention relate to a communication arrangement for distinguishing between network entities having the same address by translating between the same addresses and surrogate addresses using an intermediary network entity. |
| US08054823B2 |
Mapping schemes for secondary synchronization signal scrambling
Embodiments of the present disclosure provide a transmitter, a receiver and methods of operating a transmitter and a receiver. In one embodiment, the transmitter includes a synchronization unit configured to provide a primary synchronization signal and a secondary synchronization signal having first and second segments. The transmitter also includes a secondary scrambling unit configured to provide a scrambled secondary synchronization signal, wherein scrambling agents for the first and second segments are derived from a primary synchronization sequence of the primary synchronization signal. The secondary scrambling unit is further configured to provide an additional scrambling of one of the first and second segments, wherein a second scrambling agent is derived from the remaining segment of a secondary synchronization sequence of the secondary synchronization signal. The transmitter further includes a transmit unit configured to transmit the primary synchronization signal and the scrambled secondary synchronization signal. |
| US08054821B2 |
Beacon requests and RS bit resolving circular routes
The present technology relates to protocols relative to utility meters associated with an open operational framework. More particularly, the present subject matter relates to protocol subject matter for advanced metering infrastructure, adaptable to various international standards, while economically supporting a 2-way mesh network solution in a wireless environment, such as for operating in a residential electricity meter field. The present subject matter supports meters within an ANSI standard C12.22/C12.19 system while economically supporting a 2-way mesh network solution in a wireless environment, such as for operating in a residential electricity meter field, all to permit cell-based adaptive insertion of C12.22 meters within an open framework. Cell isolation is provided through quasi-orthogonal sequences in a frequency hopping network. Additional features relate to apparatus and methodology subject matters concerning the handling of Beacon Requests and Registered State bit resolving to avoid circular routes. |
| US08054816B2 |
Method for hopping frequency of orthogonal-frequency-division-multiplexing symbol
Provided is a method for hopping frequencies of an OFDM (orthogonal-frequency-division-multiplexing) symbol, including: receiving an OFDM symbol comprising mapping information as to a type of disposing sub-carriers of the OFDM symbol, a frequency hopping pattern, and positions of pilots; and mapping the type, the frequency hopping pattern, and the positions of the pilots based on the mapping information. |
| US08054809B2 |
Retransmission method for multiple antenna system
A packet retransmission method for use in a communication system transmitting a signal via at least two antennas is disclosed. The packet retransmission method includes the steps of: a) receiving a signal corresponding to a specific packet, and independently transmitting a signal via the at least two antennas corresponding to the received signal; b) receiving a NACK signal associated with the packet; and c) independently applying an STTD to a real part and an imaginary part of each signal transmitted at step (a), and transmitting the STTD-resultant signal. Therefore, the method separates a real part and an imaginary part from each other, obtains a STTD gain, and can efficiently transmit a packet. |
| US08054808B2 |
Controlling interference in a wireless communication system
A method and apparatus for controlling interference in a wireless communication system includes a first step of performing 500 a handoff measurement of a signal parameter for a current site and for nearby sites, and performing 502 a comparison of the signal parameters to select the nearby site having the strongest signal parameter. A next step 504 includes defining a target maximum allowable noise rise for the selected nearby site. A next step 506 includes calculating an upper bound for at least one operating parameter in the current site. A next step 508 includes determining whether a maximum for the at least one operating parameter exceeds 510 the upper bound. A next step 514 includes constraining the at least one operating parameter to no more than the upper bound if the maximum for the at least one operating parameter exceeds the upper bound. |
| US08054803B2 |
Method and apparatus for optimizing neighbor list automatically in synchronous CDMA network
A method for automatically optimizing a neighbor list for processing handover in a synchronous CDMA (Code Division Multiple Access) network includes the steps of: collecting neighbor list data, call fault data, handover statistical data, base station location data and PN information data of each base station sector in a nationwide network; extracting all target sectors available for handover by analyzing the collected data; endowing a weighting factor to the extracted target sectors according to importance and then sorting the target sectors according to calculated results so as to determine priorities; and subsequently inputting the target sector information to the neighbor list according to the priorities. |
| US08054802B2 |
Hand-off trigger at access technology borders
A method for hand-off trigger at access technology borders may include triggering a mobile station in communication with a first carrier having a first technology type to acquire synchronization with a second carrier having a second technology type if the mobile station enters a border area, the border area including at least one sector covered by at least two carriers having different Radio Access Technologies (RATs) including the first technology type and the second technology type. |
| US08054801B2 |
Method and system for implementing inter-access network handoff in active state in HRPD network
A method and system for implementing an inter-Access Network (AN) handoff in an active state in a High Rate Packet Data (HRPD) Network. The method mainly includes determining that an inter-AN handoff operation is necessary and initiating a handoff procedure to perform the inter-AN handoff, sending data to be transmitted to an access terminal to the destination AN in advance in the handoff procedure, and then sending the access terminal the data to be transmitted to the access terminal by the source AN or the destination AN according to the result of the handoff procedure. With the method according to the present invention, the continuity of a service may be improved. Even if the inter-AN handoff procedure fails, the source PCF may send data information obtained upon the start of the handoff to the access terminal when the access terminal returns to the source AN since the source PCF may receive data from the PDSN throughout the handoff procedure. As a result, the continuity of a service may be improved. |
| US08054793B2 |
Equipment and method for improving worldwide interoperability for microwave access (WIMAX) network capacity
The invention relates to a Worldwide Interoperability for Microwave Access (WIMAX) network comprising at least one base station and at least one terminal. Said at least one base station, to send a signal to said at least one terminal, is able to split said signal into a plurality of WIMAX signals and send simultaneously said WIMAX signals through a plurality of channels with different frequency frames and wherein said at least one terminal is able to receive and process simultaneously said plurality of WIMAX signals. |
| US08054792B2 |
Transmitting apparatus, receiving apparatus, and paging information reception method
A disclosed transmitting apparatus includes a paging indicator information generating unit generating paging indicator information including a group ID of users who are to receive a paging channel and information indicating a radio resource in which the paging channel is transmitted; and a multiplexing unit multiplexing the paging indicator information. |
| US08054790B2 |
Frequency mapping for a wireless communication system
Example embodiments are directed to frequency mapping for a wireless communication system. An example embodiment provides a method frequency reuse method. The frequency reuse method includes assigning frequencies for use and reuse to sectors of a cell of a wireless communication system; and communicating with a mobile station using the assigned frequency. Each of the sectors includes sub-sectors, and each of the sub-sectors have an assigned frequency for communicating with a mobile station within the sub-sector. The frequency assignments for each sector of the cell are different. |
| US08054789B2 |
Aggregated harq report
A system and method include a base station configured to provide centralized data transmission scheduling for at least one relay operatively connected to the base station configured to provide centralized data transmission scheduling for at least one relay operatively connected to the base station in a point-to-point connection and configured to provide centralized data transmission scheduling for at least one mobile station operatively connected to the relay in a point-to-multipoint connection. The method efficiently reports ACKs/NAKs for a centralized scheduler wireless system that uses tunneling for data transmission and, in order to reduce a usage of bandwidth for reporting. The system and method also perform an aggregation via coding of ACK/NAK channels. |
| US08054788B2 |
Method of configuring and searching high speed shared control channel of multi-carrier cell
The present invention relates to a method for configuring and searching HS-SCCHs of a multi-carrier cell in a TD-SCDMA system. The network side configures the configuration information of a HS-SCCH set for a UE and notifies the UE through high layer signaling, wherein each HS-SCCH corresponds to a frequency point of high speed shared resources; the UE divides the HS-SCCH set into several subsets, and HS-SCCHs of the same subset correspond to the same frequency points; the UE selects the minimum value N from the number of carriers supported by itself, the number of the frequency points, and the number of the HS-SCCH subsets; the UE searches each HS-SCCH subset to be searched in turn, and if a consistent HS-SCCH is found, then the UE stops searching the other HS-SCCHs of the subset, the UE moves said subset out of the group of the HS-SCCH subsets to be searched, and adds the found HS-SCCH into a valid HS-SCCH set to be monitored; if the number of the HS-SCCHs of the valid HS-SCCH set equals to N, then stop searching. The present invention can increase the efficiency of searching the HS-SCCHs by the UE with satisfying normal communication requires. |
| US08054783B2 |
System and method for dividing subchannels in a OFDMA network
A system and method for multiplexing subchannels in an OFDMA network is provided. The subchannels can be multiplexed by splitting the subchannels in the frequency domain. Alternatively, the subchannels can be code division multiplexed using N orthogonal spreading codes. The subchannel multiplexing increases system capacity for low-rate services, such as voice-based services. |
| US08054774B2 |
Multi-slot packet data transfer method
A multislot packet data transfer method (300) for a mobile station alters a transmission (370) of a radio block on a last transmission timeslot in a block period (320) immediately preceding an idle frame when the mobile station is in an allowed multislot configuration yet not able to perform normal Base Station Identification Code (BSIC) decoding. The method (300) also skips a last transmission burst in a frame immediately preceding an idle frame (330) in accordance with known extended search window techniques. The method contemplates various criteria (340) for determining when to alter the radio block, which include: whether an unacknowledged radio link control mode is used (350) and whether a robust coding scheme is used (360). The transmission can be altered (370) by completely skipping transmission of the radio block, by replacing the radio block on the last transmission timeslot with at least one dummy burst, by changing a transmission power level of that radio block, and/or by using a different coding scheme for that radio block. |
| US08054763B2 |
Migration of switch in a storage area network
A method, system and computer program product for migrating at least one switch in a storage area network is disclosed. The migration is done by analysing the I/O traffic to identify patterns in the I/O traffic of the switch; forecasting future I/O workload of the switch based on one or more identified patterns in the I/O traffic, determining appropriate timing for migration based on the identified patterns and administrator inputs; processing the storage area network configuration data to identify the storage network physical and logical access paths to the or each selected switch to create a first connectivity map; generating a second connectivity map based on the first connectivity map and administrator inputs; and migrating the or each switch migration based on the second connectivity map and the appropriate timing. The migration may comprise routing the I/O traffic from the switch to be migrated to the alternate switches in the storage area network. The migration may further comprising transforming zones on the switch to be migrated and deploying the transformed zones to the new switch. |
| US08054759B2 |
Method for transitioning between multiple reception levels
There is provided a method for enabling a user equipment (UE) to transition between a non-discontinuous reception (Non-DRX) level and at least one discontinuous reception (DRX) level. The UE in a DRX level wakes up periodically to monitor a scheduling channel. The method includes receiving a DRX indicator in a Non-DRX level with continuously monitoring the scheduling channel and transitioning from the Non-DRX level to a DRX level indicated by the DRX indicator. The UE can transition between multiple DRX levels by an explicit command/signaling. |
| US08054754B1 |
Method and system for service interruption notification
Exemplary methods and systems may provide a soft-inactivity notification during a VoIP call, which according to an exemplary embodiment involves a SIP session and packet-data communications between participants in the VoIP call. The method comprises (a) detecting that packet-data communications in the VoIP call have been interrupted; (b) in response to determining that the packet-data communications have been interrupted, making a determination as to whether or not the SIP session is active; (c) if the SIP session is active, then initiating a soft-inactivity notification procedure; and (d) otherwise, if the SIP session is inactive, refraining from initiating the soft-inactivity notification procedure. The soft-inactivity notification thus notifies a user that while the call has been interrupted, the call may be re-established without requiring the user to reconnect. |
| US08054748B2 |
Home-network and method for allocating channel thereof
A home-network and a method for allocating channels are provided. The home-network includes a buffer having queues and temporarily storing a data to be transmitted to each device, a priority sense part determining if the data of a packet unit transmitted from an outer server has a high priority for transmission and first inputting the data with a high priority into the queue of the buffer, a frame sense part sensing how many packets are included in one frame of the data stored in the buffer, and a channel allocation part allocating channels if enough channels are available for the transmission of a whole frame according to the number of packets sensed by the frame sense part. Accordingly, it is possible to reduce a delay time of wireless data, and channels are allocated according to the order of receipt of the data such that all devices perform equally. |
| US08054742B2 |
System and method for sidelobe suppression in communications systems
A system and method for sidelobe suppression in OFDM communications systems is provided. A method for transmitting an information symbol having a plurality of information sub-carriers and a plurality of active interference cancellation (AIC) sub-carriers includes generating AIC sub-carrier data based on the information to be transmitted, populating the plurality of information sub-carriers with the information, populating the plurality of AIC sub-carriers with the AIC sub-carrier data, applying baseband processing to the information symbol, thereby producing a processed symbol, and transmitting the processed symbol. |
| US08054740B2 |
Method for encoding data blocks
Prior to transferring to a radio communication system, at least one data block is encoded according to predetermined quality-of-service requirements with the aid of a first code. Subsequently, the data block, encoded by the first code, is further encoded according to the radio transmission properties of a usable radio transmission source with the aid of a second code. |
| US08054739B2 |
Method and apparatus for transmitting signals, and method and apparatus for receiving the signals
A storage unit stores a preamble signal defined in a legacy system and a preamble signal defined in a MIMO system. A monitoring unit in a transmitting apparatus monitors the existence of any communication apparatus which is not compatible with the MIMO system but accepts the legacy system. A channel characteristics acquiring unit derives the characteristics of a radio channel between the transmitting apparatus and a receiving apparatus. A selector selects a packet format based on a monitoring result obtained by the monitoring unit. The selector also selects where to place LTS, based on the characteristics of wireless channel derived by the channel characteristics acquiring unit. |
| US08054738B2 |
Touch panel, method for driving same, and display device using the same
A touch panel includes a first conductive coating (23), a second conductive coating (24), a first wire (L1), a second wire (L2), a third wire (L3), a first switch element (233), and a second switch element (243). The first and second conductive coatings are opposite to each other. The first wire is electrically connected to a left edge of the first conductive coating. The second wire is electrically connected to a right edge of the first conductive coating via the first switch element, and is connected to a lower edge of the second conductive coating via the second switch element. The third wire is electrically connected to an upper edge of the second conductive coating. A method of driving the touch panel and a display utilizing the touch panel are also provided. |
| US08054737B2 |
Information storage apparatus and information recording method in which recording is carried out by propagating plasmons along a network of metal rods provided in a recording medium
Provided is a medium capable of implementing a large-capacity recording at low cost per bit. A medium including a network of metal wires and recording materials each provided at an intersection of the metal wires. Surface plasmons are made to propagate along the metal wires. Two surface plasmons are made to propagate in two different directions and to collide with each other at a certain position. Multiple-layer recording is carried out by changing the recording materials at the certain position. |
| US08054729B2 |
Optical recording medium, and optical information device
An optical recording medium and an optical information device that improve the quality of a servo signal and a reproduction signal. In the optical recording medium, when shape-wise thicknesses tr1, tr2, tr3, and tr4 of a cover layer (42), a first intermediate layer (43), a second intermediate layer (44), and a third intermediate layer (45) are respectively converted into thicknesses t1, t2, t3, and t4 of the respective corresponding layers each having a predetermined refractive index “no”, a defocus amount with respect to a layer having a refractive index nrα and a thickness trα (satisfying: 1≦α≦n (where α is a positive integer and n is an integer of 4 or more)), and a defocus amount with respect to a layer having the refractive index “no” and a thickness tα (satisfying: 1≦α≦n (where α is a positive integer and n is an integer of 4 or more)) are equal to each other. Further, the thicknesses t1, t2, t3, and t4 satisfy |t1−(t2+t3+t4)|≧1 μm, a difference between any two values of the thicknesses t1, t2, t3, and t4 is set to 1 μm or more, and |(t1+t2)−(t3+t4)|≧1 μm. |
| US08054728B2 |
Multilayer optical disk, multilayer optical disk recording apparatus and multilayer optical disk reproducing apparatus
A multilayer optical disk apparatus comprises an optical pickup that emits N (N represents an integer of two or more) laser beams of the same wavelength. The optical pickup emits the N laser beams at the same time, focuses the N laser beams on a first recording layer group alternately configured by N recording layers of the multilayer optical disk and performs a recording operation on the N recording layers at the same time. When changing the recording layers the optical pickup focuses the N laser beams on a second recording layer group configured by recording layers adjacent to the respective recording layers configuring the first recording layer group and performs a recording operation on the N recording layers at the same time. |
| US08054727B2 |
Information recording medium and method for manufacturing the same, and optical information recording/reproducing device
An information recording medium of the present invention is an information recording medium characterized by and including a substrate; and a recording unit capable of recording three-dimensionally a recording pit on the substrate; in which the recording unit has n number of recording layers (n is an integer equal to or larger than 4) and a plurality of intermediate layers laminated with the recording layers one on another; the recording is performed by the condensed recording light using a two photon absorption phenomenon; each of the plurality of intermediate layers is substantially transparent at a wavelength λ1 of the recording light and at a wavelength λ2 of the reproduction light, respectively; the light intensity of the recording light incident into the recording layer nearest to the substrate is more than 0.707 fold as much as the light intensity of the recording light incident into the recording layer farthest from the substrate. The information recording medium is an information recording medium capable of maintaining a precise and good recording accuracy at the recording layer positioned lower away from the objective lens while it secures the focus servo reflected light. |
| US08054723B2 |
Method and apparatus for controlling record and reproduction of optical record medium
Disclosed is a method and apparatus for controlling the record and reproduction of optical record medium in which plural nonrecord regions having different phase are arranged between recordable data regions for the distinction in the shape of the data region. The method and apparatus performs the servo using focus error signal and tracking error signal averaged by the low pass filter at the header region of the optical disc. Especially, the tracking servo is performed by holding a fixed DC off-set value at the header region existing on the L/G switching or holding the tracking error value of the previous same track region. As a result, the exact header region is detected, the track sliding phenomenon is removed, and the tracking servo is stabilized, resulting in preventing the degeneration of the record and reproduction characteristics. |
| US08054721B2 |
Method and apparatus for determining writing power for recording data
A method and apparatus for determining an optimal writing power for recording data on a recording medium such as an optical disk, are discussed. The method according to an aspect of the present invention includes (a) performing a plurality of OPC operations on a plurality of areas of the recording medium, the plurality of OPC operations being performed in mutually different manners, the plurality of areas being areas within a power calibration area (PCA) allocated in the recording medium; and (b) determining an optimal writing power for recording data on the recording medium based on writing powers detected via the plurality of OPC operations. |
| US08054719B2 |
Comparator and optical-disc recording/reproduction apparatus
A comparator includes a variable-gain amplifier circuit configured to vary an amplitude of an input signal by changing a gain in accordance with a control signal, and a comparison section configured to compare a slice level interlocked with a signal level received from the variable-gain amplifier circuit with an output signal received from the variable-gain amplifier circuit and generate an output signal in accordance with a comparison result. |
| US08054716B2 |
Optical disc apparatus and defocus control method
A defocus adjustment method includes a step of storing in a memory a range of defocus values for smooth operation of an optical disc apparatus, a step of measuring the defocus value of the optical disc loaded in the optical disc apparatus, a step of comparing the defocus value and the range of defocus values, a step of determining the optimal defocus value, and a step of using the optimal defocus value as a focusing bias value. This helps easily and quickly perform defocus adjustment that suits the loaded optical disc. Using as a focus bias value the defocus value determined through the defocus adjustment helps enhance the quality with which data is read from and data is written to the optical disc. |
| US08054710B2 |
Integrated circuit device and electronic instrument
An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line. |
| US08054706B2 |
Sensor protection using a non-volatile memory cell
A method and apparatus for protecting an electrical device using a non-volatile memory cell, such as an STRAM or RRAM memory cell. In some embodiments, a memory element is connected in parallel with a sensor element, where the memory element is configured to be repetitively reprogrammable between a high resistance state and a low resistance state. The memory element is programmed to the low resistance state when the sensor element is in a non-operational state and reprogrammed to the high resistance state when the sensor element is in an operational state. |
| US08054701B2 |
Delay locked loop and semiconductor memory device with the same
A semiconductor memory device is capable of controlling a delay locked loop appropriately based on operation modes, particularly in a fast power-down mode to reduce an amount of current maximumly. The semiconductor memory device includes a delay-locked clock signal generating unit, a mode signal generating unit, and a delay locking control unit. The delay-locked clock signal generating unit performs a delay locking operation on a clock signal, thereby generating a delay-locked clock signal. The mode signal generating unit enables a fast precharge power-down mode signal in a fast precharge power-down mode. The delay locking control unit controls the delay-locked clock signal generating unit to be activated in a predetermined cycle in response to the fast precharge power-down mode signal. |
| US08054700B2 |
Semiconductor memory device and read wait time adjustment method thereof, memory system, and semiconductor device
A semiconductor memory device operates in synchronization with a system clock, without using a synchronous circuit such as a DLL or a PLL. The semiconductor memory device includes a synchronous circuit for generating output signals phase aligned with the system clock, a synchronous circuit selection circuit that performs switching between a synchronous circuit selection mode and a synchronous circuit non-selection mode, and a reference edge specifying register that specifies an edge of an internal clock which serves as a reference for outputting read data in the synchronous circuit non-selection mode. In the synchronous circuit selection mode, the read data is output by adjusting a phase deviation of the internal clock with respect to the system clock, using the synchronous circuit. In the synchronous circuit non-selection mode, the read data is output in synchronization with the internal clock, without using the synchronous circuit. For a delay of the internal clock with respect to the system clock, the edge of the internal clock used as the reference is adjusted by the reference edge specifying register. Then, even if the synchronous circuit is not used, a large timing deviation does not thereby occur. |
| US08054695B2 |
Semiconductor memory apparatus
A reference voltage selecting unit selectively outputs a first external reference voltage and a second external reference voltage as a selection reference voltage in accordance with whether to perform a wafer test. An address buffer generates an internal address by buffering an external address in accordance with the selection reference voltage. A command buffer generates an internal command by buffering an external command in accordance with the selection reference voltage. A data buffer generates internal data by buffering an external data in accordance with the second external reference voltage. |
| US08054694B2 |
Voltage generator for memory array
A high voltage may be generated for programming memory cells in a memory array. A middle voltage may also be generated for reading memory cells in the memory array. Control logic and switches may be used to select between the high voltage and the middle voltage. A first oscillator generates clock signals at a high frequency for generating the voltages, and a low frequency oscillator may be used to generate pulses at a lower frequency than the first oscillator to allow the first oscillator to operate only during such pulses to conserve power during a stand-by mode of operation to maintain the middle or medium voltage. |
| US08054693B2 |
Capacitorless dynamic memory device capable of performing data read/restoration and method for operating the same
In example embodiments, the semiconductor memory device, and the method for operating the semiconductor memory device, includes a memory cell array having a plurality of memory cells each formed of a transistor having a floating body. The transistors are coupled between a plurality of word lines, a plurality of source lines and a plurality of bit lines. Additionally, the memory cell array includes a controller configured to read data from at least one of the memory cells and restore data to the memory cell storing a first data state through a bit operation of the memory cell. The controller restores data to the memory cell by applying a first source-line control voltage to a selected source line and applying a first word-line control voltage to a selected word line in a first period of a read operation. Also, the controller is configured to restore data to the memory cell, which is storing a second data state, by applying a second source-line control voltage to the selected source line and applying a second word-line control voltage to the selected word line in a second period of the read operation. |
| US08054692B2 |
Flash memory device reducing noise of common source line, program verify method thereof, and memory system including the same
A flash memory device controls a common source line voltage and performs a program verify method. A plurality of memory cells is connected between a bit line and the common source line. A data input/output circuit is connected to the bit line and is configured to store data to be programmed in a selected memory cell of the plurality of memory cells. The data input/output circuit maintains data to be programmed within the data input/output circuit during a program verify operation, and decreases noise in the common source line by selectively precharging the bit line based on the data to be programmed. |
| US08054691B2 |
Detecting the completion of programming for non-volatile storage
A set of non-volatile storage elements are subjected to a programming process in order to store data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target condition to store the appropriate data. Programming can be stopped when all non-volatile storage elements have reached their target level or when the number of non-volatile storage elements that have not reached their target level is less than a number or memory cells that can be corrected using an error correction process during a read operation (or other operation). The number of non-volatile storage elements that have not reached their target level can be estimated by counting the number of non-volatile storage elements that have not reached a condition that is different (e.g., lower) than the target level. |
| US08054688B2 |
Non-volatile memory device and erase method
Provided is a non-volatile memory device including first and second, vertically stacked semiconductor substrates, a plurality of non-volatile memory cell transistors formed in a row on the first and second semiconductor substrates, and a plurality of word lines connected to gates of the plurality of non-volatile memory cell transistors. The plurality of non-volatile memory cell transistors are grouped into two or more memory cell blocks, such that a first voltage is applied to the first semiconductor substrate including a first memory cell block to be erased, and either (1) a second voltage less than the first voltage and greater than 0V is applied to the second semiconductor substrate not including the first memory cell block, or (2) the second semiconductor substrate not including the first memory cell block is allowed to electrically float. |
| US08054687B2 |
Systems and methods of providing programmable voltage and current reference devices
The present invention describes systems and methods to for providing stable and programmable voltage and current reference devices. An exemplary embodiment of the present invention provides a voltage reference device having a first floating-gate transistor with a first source, a first drain, and a first gate. The first gate is provided coupled to a first programming capacitor and a first input capacitor. Furthermore, the voltage reference device includes a second floating-gate transistor having a second source, a second drain, and a second gate. The second gate is provided coupled to a second programming capacitor and a second input capacitor. Additionally, the charge difference between the first floating-gate transistor and the second floating-gate transistor is a reference voltage. |
| US08054686B2 |
Flash memory storage apparatus, flash memory controller, and switching method thereof
A flash memory storage apparatus including a multi level cell (MLC) NAND flash memory, a flash memory controller, and a host transmission bus is provided. The MLC NAND flash memory includes a plurality of blocks for storing data, wherein each of the blocks has an upper page and a lower page, and the writing speed of the lower page is faster than that of the upper page. The flash memory controller is electrically connected to the MLC NAND flash memory and is used for executing storage mode switching steps. The host transmission bus is electrically connected to the flash memory controller and is used for communicating with a host. The flash memory storage apparatus provided by the present invention can provide multiple storage modes in order to store different data. |
| US08054685B2 |
Method of programming nonvolatile memory device
A method of sequentially performing a LSB program operation and an MSB program operation of a nonvolatile memory device, wherein the nonvolatile memory device comprises multi-level memory cells each configured to store two pieces of bit information and page buffers each coupled to a bit line coupled with the memory cells and configured to comprise a first latch coupled to first and second nodes and a second latch coupled to third and fourth nodes, the method including inputting data of MSBs to the second and fourth nodes and setting data of the second and fourth nodes according to a state of data of LSBs stored in the memory cells, and precharging the bit line according to a combination of data stored in the first and second latches and performing the MSB program operation according to a state of a LSB program operation stored in the memory cells. |
| US08054681B2 |
Read, verify word line reference voltage to track source level
A non-volatile memory device has individual pages of memory cells to be sensed in parallel. The memory device includes a source level tracking circuit coupled to receive a predetermined word line voltage from a word line voltage supply and the voltage level at the aggregate source node of one or more pages and coupled to provide to word lines of the memory an output voltage during the sensing operation, where the source level tracking circuit includes an op amp whereby the output voltage is the word line voltage offset by an amount to track the voltage level at the aggregate node and compensate for source bias errors due to a finite resistance in the ground loop. |
| US08054680B2 |
Semiconductor device
Memory cells in which an erase and write operation is performed by injecting electrons from a substrate and extracting the electrons into a gate electrode constitute a semiconductor nonvolatile memory device. That is a gate extraction semiconductor nonvolatile memory device. In that device, if an erase bias is applied in a first process of an erase and write operation, memory cells in an overerase condition occur and the charge retention characteristics of such memory cells are degraded. The present invention provides a semiconductor nonvolatile memory device using means for writing all the memory cells in an erase unit before applying the erase bias, and then applying the erase bias. |
| US08054679B2 |
Phase change memory device
A phase change memory device comprises: a phase change element for rewritably storing data by changing a resistance state; a memory cell arranged at an intersection of a word line and a bit line and formed of the phase change element and a diode connected in series; a select transistor formed in a diffusion layer below the memory cell, for selectively controlling electric connection between an anode of the diode and a ground line in response to a potential of the word line connected to a gate; and a precharge circuit for precharging the diffusion layer below the memory cell corresponding to a non-selected word line to a predetermined voltage and for disconnecting the diffusion layer below the memory cell corresponding to a selected word line from the predetermined voltage. |
| US08054677B2 |
Magnetic memory with strain-assisted exchange coupling switch
A magnetic tunnel junction cell having a free layer and first pinned layer with perpendicular anisotropy, the cell including a coupling layer between the free layer and a second pinned layer, the coupling layer comprising a phase change material switchable from an antiferromagnetic state to a ferromagnetic state. In some embodiments, at least one actuator electrode proximate the coupling layer transfers a strain from the electrode to the coupling layer to switch the coupling layer from the antiferromagnetic state to the ferromagnetic state. Memory devices and methods are also described. |
| US08054676B2 |
Memory system such as a dual-inline memory module (DIMM) and computer system using the memory system
A memory system (250) includes a plurality of memory devices (260) adapted to be coupled to an interface (140), an indicator (272) for indicating a type of the plurality of memory devices (260), and an override circuit (280) having a first terminal adapted to be coupled to the interface (140), a second terminal coupled to the plurality of the memory devices (260), and a control input for receiving a control signal. The override circuit (280) is responsive to the control signal to alter an operation of the memory system (250). |
| US08054675B2 |
Variable write and read methods for resistive random access memory
Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell. |
| US08054674B2 |
Variable resistive element, manufacturing method for same, and non-volatile semiconductor memory device
Provided is a variable resistive element which performs high speed and low power consumption operation. The variable resistive element comprises a metal oxide layer between first and second electrodes wherein electrical resistance between the first and second electrodes reversibly changes in accordance with application of electrical stress across the first and second electrodes. The metal oxide layer has a filament, which is a current path where the density of a current flowing between the first and second electrodes locally increases. A portion including at least the vicinity of an interface between the certain electrode, which is one or both of the first and second electrodes, and the filament, on an interface between the certain electrode and the metal oxide layer is provided with an interface oxide which is an oxide of at least one element included in the certain electrode and different from the oxide of the metal oxide layer. |
| US08054673B2 |
Three dimensionally stacked non volatile memory units
A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region. |
| US08054669B2 |
Non-volatile programmable optical element employing F-centers
A non-volatile programmable electro-optical element alters absorption characteristics of an optical medium that comprises a doped transition metal oxide material including F-centers. The F-centers are electrostatically moved into or out of the regions containing a wavefunction of an optical beam. A specific F-center profile in the transition metal oxide material may be programmed into the optical medium. The F-center profile alters an absorption profile within the optical medium. The spectral range for transmission of electromagnetic radiation in the optical medium may be tailored by the F-centers. Once the absorption profile is set by an electrical signal, the optical element maintains its state even when the electrical signal is turned off. Thus, the programming node may be disconnected from a power supply network, thereby enabling a low power operation of the electro-optical element. The inventive electro-optical element may be employed for both the visible and the infrared wavelength spectrum. |
| US08054668B2 |
Method and apparatus for storing data in a write-once non-volatile memory
In an illustrative embodiment, a memory cell comprises a first and a second MOSFET, wherein the first MOSFET undergoes a process to modify the threshold voltage such that a modified threshold voltage represents a first stored logic value. By determining which one of the first and the second MOSFETs has an altered threshold voltage, the stored logic value is determinable. The threshold voltage of the first MOSFET is altered by supplying current through a MOSFET gate, causing a gate heating effect that results in a threshold voltage shift. |
| US08054662B2 |
Content addressable memory array
A memory device for storing one or more addresses includes a match line and first and second memory cells that form a 2-bit memory cell. Each memory cell includes two memory elements coupled to a match line and selection lines coupled thereto. The selection lines provide a signal representative of a logical combination of at least two different inputs. |
| US08054659B2 |
Power supply with reduced switching losses by blocking a feedback comparator's control signal
A power supply device includes a first switching element, a second switching element, a transformer having a primary coil, a low-pass filter including an input port connected to the secondary coil, an output terminal connected to an output port of the low-pass filter, a detector for outputting a voltage that follows a voltage at the output terminal, a reference signal generator for generating a reference voltage, a comparator unit for outputting a signal based on a result of comparison between the voltage supplied from the detector and the reference voltage, and an operation pause circuit controlling the first and second switching elements. The operation pause circuit is operable to drive the first and second switching elements according to the signal output from the comparator unit, and to cause the first and second switching elements not to conduct regardless of the signal output from the comparator unit. |
| US08054656B2 |
Switching control circuit for a switching power converter
A switching control circuit is coupled to a switching device and an auxiliary winding of a transformer, wherein a primary winding of the transformer is coupled to the switching device. The switching control circuit includes a voltage receiver, a comparing unit and a propagation delay circuit, wherein the voltage receiver is coupled to the auxiliary winding of the transformer for receiving a reflected voltage signal and transforming the reflected voltage signal into a peak voltage signal, while the switching device is turned off. The comparing unit is coupled to the voltage receiver for receiving the peak voltage signal and a first threshold voltage, and outputting a comparison result. The propagation delay circuit is coupled to the comparing unit for receiving the comparison result, and outputting a PWM signal to turn on the switching device after a delay time. |
| US08054651B2 |
Simple and effective self regulating inductive power transfer system
An inductive power transfer system for coupling a power source to a load across an air gap is provided, including a primary unit and a secondary unit separable from the primary unit and arranged to receive power inductively from the primary unit when placed proximate thereto. The system includes a multi stage comparator for monitoring operating conditions within the secondary unit and feedback loop for transmitting a feedback signal to the primary unit when predetermined operating conditions are detected within the secondary unit. The primary unit is arranged to operate in a low power mode where power is applied to the primary winding for a minimal period during each switching cycle when no feedback signal is received and a high power mode where power is applied to the primary winding for the majority of each switching cycle when a feedback signal is received. The power transfer system functions by applying bursts of power from the primary to the secondary unit, the bursts becoming more frequent and of longer duration as the load on the secondary unit increases or the air gap increases, so as to transfer more power or maintain power as air gap losses increase. The bursts of power will also change their duration and frequency in correspondence with variations of the input power supply to the primary unit, so as to maintain the voltage regulation of the power delivered to the secondary unit. |
| US08054648B2 |
Battery cover and portable electronic device having same
A battery cover includes an outer panel, an inner panel, a resilient member and a chassis. The inner panel is disposed on the outer panel. The resilient member is located on the inner panel and includes two elongated arms. Each elongated arm includes a contact at the distal end thereof. The chassis is disposed on the resilient member and the inner panel, and is fastened to the outer panel. The chassis defines two openings configured for the two contacts to extend out correspondingly. |
| US08054647B2 |
Electronic device mounting structure for busbar
An electronic device mounting structure includes an electronic device, a busbar, and a solder. The electronic device has a body and a lead protruding from the body. The busbar has a flat portion and a wall portion rising from a periphery of the flat portion. The flat portion of the busbar extends parallel to a tip portion of the lead and is in contact with a back surface of the tip portion. The wall portion of the busbar faces a side surface of the tip portion with a predetermined space. The solder is located in the space and joins the side surface of the tip portion and the wall portion of the busbar. |
| US08054643B2 |
Semiconductor module, wiring board, and wiring method
A semiconductor module includes a plurality of rectangular shaped semiconductor devices which are arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other. A plurality of wirings connect the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are connected to each other. |
| US08054639B2 |
Image-sensing module for reducing overall thickness thereof and preventing EMI
An image-sensing module for reducing its overall thickness and preventing electromagnetic interference (EMI) includes a flexible substrate, an image sensor, and a plurality of electronic elements. The flexible substrate has a first PCB (Printed Circuit Board), a flexible bending board bent upwards from one side of the first PCB, and a second PCB extending forwards from the flexible bending board and disposed above the first PCB. The second PCB has at least one first opening. The image sensor is electrically disposed on the first PCB, and the image sensor is exposed by the first opening of the second PCB. The electronic elements are selectively electrically disposed on the first PCB and/or on the second PCB so that the electronic elements are disposed between the first PCB and the second PCB. |
| US08054636B2 |
Mounting structure for data storage device
A mounting structure is used for mounting a first data storage device or a second data storage device. A first guiding tab is formed on a side surface of the second data storage device. A second guiding tab is formed on a side surface of the second data storage device. A height of the first guiding tab from a bottom surface of the first data storage device is different than a height of the second guiding tab from a bottom surface of the second data storage device. The mounting structure includes a bracket and a sliding member. The bracket includes a side wall. A flange is formed on an edge of the side wall. A first guiding slot is defined in the side wall and extends to the flange to define a first guiding entry. A second guiding slot is defined in the side wall and extends to the flange to define a second guiding entry. The sliding member is slidably attached to the flange. |
| US08054635B2 |
Tool-less modular expansion card carrier
A carrier for supporting an expansion card is disclosed herein. The expansion card is configured for connection to a server. The carrier includes a module that is configured to receive and removably retain the expansion card. The module is further configured to support the expansion card in a position that aligns the expansion card with a receiver in the server. The module is further configured to move with respect to the receiver to facilitate connection of the expansion card to the receiver. |
| US08054629B2 |
Microfins for cooling an ultramobile device
The present invention discloses a method of cooling an ultramobile device with microfins attached to an external wall of an enclosure surrounding the ultramobile device. |
| US08054624B2 |
Mounting apparatus for storage device
A mounting apparatus, for storage device defining a securing hole, including a bracket configured to receive the storage device. Two securing members are attached to the bracket sidewall. Each of the securing members includes an actuating end, a securing end engaged with the storage device securing hole, and a pivot portion formed between the actuating end and the securing end that is pivotally attached to the bracket sidewall. A spring member is secured to the sidewall of the bracket between the two securing members. The spring member includes two resilient arms biased against the two securing members respectively. |
| US08054620B2 |
Stacked drives for a blade system
A blade assembly is disclosed. The blade assembly comprises a printed circuit (PC) board, and a disk drive drawer. The disk drive drawer is configured to move from a closed position into an open position, wherein the disk drive drawer is adjacent to the PC board when in the closed position and is positioned away from the PC board when in the open position. The blade assembly also comprises at least one stack of internal drives attached to the disk drive drawer. Each stack of internal drives comprise: a base bracket attached to the disk drive drawer, at least one drive cage pivotally mounted to the base bracket and configured to rotate between an open position and a closed position. In the closed position the drive cage is parallel with the disk drive drawer and in the open position the drive cage makes an angle a with the disk drive drawer. The drive cage is configured to hold a disk drive. Each stack of internal drives are located inside a blade enclosure when the blade assembly is mounted in the blade enclosure and the disk drive drawer is in the closed position. Each stack of internal drives are located outside the blade enclosure when the blade assembly is mounted in the blade enclosure and the disk drive drawer is in the open position. |
| US08054617B2 |
Desktop computer and method for manufacturing the same
This invention discloses a desktop computer and a method for manufacturing the same. The desktop computer includes a display device and a main body. The display device has a display side and a back side. One end of the main body is connected to the back side of the display device. The other end of the main body and the display device contact a surface where the desktop computer is disposed. The angle between the main body and the display device is adjustable. |
| US08054615B2 |
Foldable electronic device and pivot apparatus thereof
A pivot apparatus adapted to connect a host and a display includes a rotary base having a first part and a second part, a connecting plate, a pivot component, a first connecting rod and a hook. The first part is embedded at the host. The second part has a rotary shaft embedded at a first edge of the connecting plate. The pivot component is pivotally connected between a rear surface of the display and a second edge of the connecting plate. The first connecting rod is slidably disposed at the connecting plate and has at least a locking hole. The hook is disposed at the rear surface and passes through the connecting plate to be slidably disposed in the locking hole. The hook is used to interfere with the first connecting rod to restrict the rotation of the display by the pivot component relative to the connecting plate. |
| US08054614B2 |
Cover for device
A cover for a device is disclosed. The cover may include a first portion operable to protect a button of a device from inadvertent actuation, wherein the first portion enables viewing of the button while the cover overlaps the device. The cover may also include an opening operable to afford access to an interface component of the device, wherein the opening is operable to enable a user to reach through and physically interact with the interface component while the cover overlaps the device. The cover may further include a second portion enclosing the opening on all sides. |
| US08054613B2 |
Supporting device and a portable electronic device
A supporting device of the invention comprises a main body, a shaft, and a rotating component. The main body comprises a sliding path and an opening. The shaft and the rotating component can slide along the sliding path. The rotating component is connected to the shaft. The shaft and at least a part of the rotating component can then be extended beyond the main body through the opening. Through the aforementioned configuration, the shaft can rotate with respect to the main body when the shaft and at least a part of the rotating component are extended beyond the main body. |
| US08054612B2 |
Plug-in unit including a breaker and an electric device
A plug-in unit includes a breaker electrically connected with a busbar at a power supply side and an electric device electrically connected with the breaker. Joint surfaces making contact with each other are formed at the breaker and the electric device, respectively. The breaker includes a terminal metal fitting connecting the busbar thereto and a plug-in terminal metal fitting installed at the joint surface of the breaker, and the electric device includes a plug terminal, which is installed at the joint surface thereof and capable of being connected with the plug-in terminal metal fitting. The breaker is detachably joined with the electric device by an engaging member including an engaging unit and an engagement receiving unit. The engaging unit and the engagement receiving unit are installed at the joint surfaces of the breaker and the electric device, respectively, and detachably engaged with each other. |
| US08054611B2 |
Porous metal thin film, method for manufacturing the same, and capacitor
A porous metal thin film formed from aluminum has a film structure in which domains having an average diameter of 200 nm or more, and 500 nm or less and being formed through aggregation of a plurality of grains having an average grain diameter of 50 nm or more, and 160 nm or less are distributed discretely at an average distance of 5 nm or more, and 40 nm or less, wherein the area occupied by the above-described domains is 60% or more, and 90% or less in a cross-section in any direction of the porous metal thin film. |
| US08054610B2 |
Radial lead aluminum electrolytic capacitor
A radial lead aluminum electrolytic capacitor includes a wound unit, a case provided with an opening and containing the wound unit impregnated by electrolyte and a seal for sealing up the opening of the case. The wound unit includes a cathode formed foil; an anode foil; a first separator; a second separator; a first lead wire stitched to the cathode foil; and a second lead wire stitched to the anode foil. The wound unit is formed by winding a lamination made by those elements. Gasket formed foils may be arranged at the stitching places of the first lead wire and the second lead wire or a gasket formed foil is arranged only at a stitching place of the first lead wire. |
| US08054607B2 |
Multilayer chip capacitor and circuit board device
There are provided a multilayer chip capacitor and a circuit board device. The multilayer chip capacitor includes a capacitor body including a plurality of dielectric layers that are stacked, first and second outer electrodes formed on an outer surface of the capacitor body and having opposite polarity, first and second inner electrodes opposing each other, interleaved with the dielectric layers in the capacitor body, and each including an electrode plate forming capacitance and a lead extending from the electrode plate, the lead of the first inner electrode and the lead of the second electrode being respectively connected to the first and second outer electrodes, and third inner electrodes interposed between the first and second inner electrodes. At least one of the third inner electrodes adjacent to the first inner electrode includes a conductive pattern having the same shape as the lead of the first inner electrode and is connected to the first outer electrode. At least one of the third inner electrodes adjacent to the second inner electrode includes a conductive pattern having the same shape as the lead of the second inner electrode and is connected to the second outer electrode. |
| US08054604B2 |
Device and method of reducing inrush current
This disclosure provides a method and apparatus for reducing an inrush current inflowing from an external power source during an initial transient state. The method may include generating a first signal based on a level of internal voltage. The first signal may linearly increase or decrease, wherein the slope of the first signal may be fixed. The method may further include comparing the first signal with the reference voltage, and controlling an overcurrent prevention function based on the comparison results. An inrush current reducing device may include a reference voltage generating unit configured to compare a first signal and the reference voltage to control an overcurrent sensing gain, a gain unit configured to compare a first signal and the reference voltage to control an overcurrent sensing gain, and an overcurrent prevention signal generating unit configured to control an overcurrent prevention function based on the comparison results. |
| US08054602B2 |
Power supply controller
A comparator receives, on its second input terminal, a third anomaly threshold voltage from a threshold voltage generator, and outputs a low-level breaking indication signal to a control logic portion when a terminal voltage falls below the third anomaly threshold voltage. Three threshold setting resistors are serially connected between the source of a power MOSFET and a ground terminal. A divided voltage at the connecting point between the threshold setting resistors and is outputted as the third anomaly threshold voltage. |
| US08054599B2 |
Apparatus, system, and method for detecting a power system component failure
An apparatus, system, and method are disclosed for detecting a power system component failure. The invention includes detecting an amount of input power provided on a power supply side of a connector, where the connector is configured to connect a switching power supply to a load such that power flows from the switching power supply to the load through the connector; detecting an amount of output power provided on a load side of the connector; determining if the amount of input power detected on the power supply side of the connector is more than a predefined threshold amount greater than the amount of output power detected on the load side of the connector; and shutting down the switching power supply the amount of detected input power is more than the predefined threshold amount greater than the amount of detected output power. |
| US08054598B1 |
Negotiating capacity allocation among distributed current protection devices
Exemplary systems, apparatus, and methods relate to a current limiting device on each of two or more load branches that limits the current drawn by each load branch to a branch current allocation for that branch, where each of the current limiting devices is configured to automatically communicate messages to negotiate adjustments to the branch current allocations among each of the load branches while maintaining the sum of the branch allocations substantially at or below an available capacity of the supply branch. In an exemplary embodiment, a system of intelligent power modules (IPMs) may operate together to automatically negotiate capacity sharing among a number of load branches by adapting to the dynamic load conditions in order to takes improved advantage of infrastructure power handling capability without exceeding a predetermined capacity of the supply branch. |
| US08054591B2 |
Arc detection using discrete wavelet transforms
An apparatus to perform series and parallel arc fault current interruption (AFCI). The apparatus includes a resistive element configured to sense a load from which a current signal is generated, a first detection unit configured to output a first signal based on the current signal, and a microcontroller configured to decompose at least the first signal via discrete wavelet transforms to thereby obtain discrete wavelet coefficients, and to generate a trip signal when the discrete wavelet coefficients indicate that a threshold condition for trip signal generation are satisfied. |
| US08054589B2 |
Switch structure and associated circuit
An apparatus, such as a switch module, is provided. The apparatus can include an electromechanical switch structure configured to move between an open configuration and a fully-closed configuration (associated with a minimum characteristic resistance) over a characteristic time. A commutation circuit can be connected in parallel with the electromechanical switch structure, and can include a balanced diode bridge configured to suppress arc formation between contacts of the electromechanical switch structure and a pulse circuit including a pulse capacitor configured to form a pulse signal (in connection with a switching event of the electromechanical switch structure) for causing flow of a pulse current through the balanced diode bridge. The electromechanical switch structure and the balanced diode bridge can be disposed such that a total inductance associated with the commutation circuit is less than or equal to a product of the characteristic time and the minimum characteristic resistance. |
| US08054588B2 |
Tunneling magnetoresistive element including multilayer free magnetic layer having inserted nonmagnetic metal sublayer
A tunnel magnetoresistive element includes a laminate including a pinned magnetic layer, an insulating barrier layer, and a free magnetic layer. The insulating barrier layer is composed of Ti—Mg—O or Ti—O. The free magnetic layer includes an enhancement sublayer, a first soft magnetic sublayer, a nonmagnetic metal sublayer, and a second soft magnetic sublayer. For example, the enhancement sublayer is composed of Co—Fe, the first soft magnetic sublayer and the second soft magnetic sublayer are composed of Ni—Fe, and the nonmagnetic metal sublayer is composed of Ta. The total thickness of the average thickness of the enhancement sublayer and the average thickness of the first soft magnetic sublayer is in the range of 25 to 80 angstroms. Accordingly, the tunneling magnetoresistive element can consistently have a higher rate of resistance change than before. |
| US08054585B2 |
Gimbal with assymmetric dynamic stiffness
In a suspension in a hard disk drive, a gimbal with asymmetric dynamic properties, in which the two halves of the gimbal may have different stiffness distribution or inertia distribution. Structural difference between the two halves, or materials with different stiffness, may cause the different stiffness distribution or inertia distribution. When the suspension vibrates, the different stiffness and/or inertia distribution increase the friction between the gimbal and a load beam of the suspension, and increase the damping of the suspension. |
| US08054584B2 |
Top bond pad bias and variation control
An assembly includes a slider and a suspension assembly. The slider includes an air bearing surface and a slider mounting surface opposite the air bearing surface. There are a plurality of slider pads on the slider mounting surface. The suspension assembly includes a plurality of suspension pads on a suspension mounting surface. Each of the suspension pads is connected to one of the slider pads with a solder joint so that the slider mounting surface has at least one of a pitch, roll, or yaw angle with respect to the suspension mounting. |
| US08054583B2 |
Ta/W film as heating device for dynamic fly height adjustment
A dynamic fly heater (DFH) for improved lifetime and better film uniformity is disclosed for a magnetic head. The heater has a lower amorphous Ta layer and an upper W layer to promote small grain size and reduced electro-migration. The composite film is especially advantageous for heaters greater than 1000 Angstroms thick where dR/R is difficult to control in the prior art. The DFH may be a (Ta/W)n laminate in which the Ta layers are about 30 Angstroms thick and the combined thickness of the W layers is from 400 to 1200 Angstroms. A Ta film is preferably sputter deposited with an Ar pressure of 3 to 5 mTorr and the W film is sputter deposited in the same chamber with a 3 to 20 mTorr Ar pressure. In one embodiment, a merged read/write head has one DFH in the read head and a second DFH in the write head. |
| US08054575B2 |
Position signal processor
In one embodiment a tape drive system comprises a reel adapted to engage a tape cartridge, the tape cartridge comprising a tape media having a servo code written along a length of the tape media, a tape head comprising at least one servo element to detect the servo code, a drive assembly to induce relative motion between the tape and the tape drive, a servo system to control the lateral and longitudinal motion between the tape and the tape head, the servo system comprising a sampling circuit assembly to sample servo data from the tape media, wherein the sampling circuit assembly samples both positive readback waveforms and negative readback waveforms generated by servo code on the tape, a pulse time demodulator circuit module to generate timestamped, digital signals from signals generated by the sampling circuit assembly, and a position signal processor to calculate a position signal using the servo data from the pulse time demodulator circuit module. |
| US08054573B2 |
Systems and methods for fly-height control using servo address mark data
Various embodiments of the present invention provide systems and methods for determining fly-height adjustments. For example, various embodiments of the present invention provide storage devices that include a storage medium, a read/write head assembly disposed in relation to the storage medium (278), and a SAM based fly-height adjustment circuit (214). The storage medium (278) includes a plurality of servo data regions (110) that each include a servo address mark (154). The SAM based fly-height adjustment circuit (214) receives the servo address mark (154) from the plurality of servo data regions (110) via the read/write head assembly (276), and calculates a first harmonics ratio (445) based on the received data. The first harmonics ratio (445) is compared with a second harmonics ratio (450) to determine an error (365) in the distance (295) between the read/write head assembly (276) and the storage medium (278). |
| US08054568B2 |
Synchronization of symmetric timing based servo bursts
Timing based servo bursts of servo frames, in which the frames are arranged to be symmetric with the same number of servo stripes in each burst of a frame, are synchronized by shifting selected bits. For example, servo frames are arranged with four servo bursts with an equal number of servo stripes in each burst, the servo frames comprising two symmetric sub-frames, each sub-frame comprising two bursts of servo stripes that are parallel to each other within a burst, and the bursts are non-parallel with respect to each other; each servo burst is arranged to comprise at least one reference servo stripe; and each servo burst is arranged to comprise at least one shifted servo stripe, wherein the shift is in the same longitudinal direction with respect to at least one reference servo stripe for each burst of a frame and the opposite longitudinal direction for bursts of sequentially adjacent frames. |
| US08054566B2 |
Optical lens displacement systems
The present invention provides optical systems, devices and methods which utilize one or more electroactive polymer actuators to adjust an optical parameter of the optical device or system. |
| US08054565B2 |
Lens optical system and photoelectric encoder
The present invention provides: a lens optical system having: a plastic lens; and a lens restraining member for mechanically restraining a thermal expansion of the plastic lens to control a variation of a curvature of lens due to a temperature change so as to suppress a variation of a focal position due to a temperature change; and a photoelectric encoder including the lens optical system. |
| US08054564B1 |
Optical device and associated methods
An optical device includes a transparent substrate, a first replicated refractive surface on a first surface of the substrate in a first material, and a second replicated refractive surface on a second surface, opposite the first surface, and made of a second material, different from the first material. The material and curvature of the first replicated surface and the material and curvature of the second replicated surface may be configured to substantially reduce the chromatic dispersion and/or the thermal sensitivity of the optical device. |
| US08054563B2 |
Wide angle lens system
The present disclosure relates to a wide angle lens system. The wide angle lens system includes, in order from the object side to the image side thereof, a first lens of positive refraction power, a second lens of positive refraction power, and a third lens of negative refraction power. The wide angle lens system satisfies the following condition: 0.45 |
| US08054562B2 |
Imaging lens and imaging apparatus
Disclosed is an imaging lens having a small F number, a wide angle of view, and a low manufacturing cost and capable of obtaining a high-quality image. An imaging lens includes a first lens having a negative power and including a concave surface facing an image side, a second lens having a positive power, an aperture diaphragm, a third lens having a negative power, an aperture diaphragm, a fourth lens having a positive power, a fifth lens having a positive power and including a convex surface facing the image side, and a sixth lens having a negative power arranged in this order from an object side. When the curvature radius of an image-side surface of the third lens is R3r and the curvature radius of an object-side surface of the fourth lens is R4f, the imaging lens satisfies the following Conditional expression: |R3r/R4f|<1.0. |
| US08054558B2 |
Multiple magnification optical system with single objective lens
A multiple magnification optical system has a single objective focused upon a specimen at a given working distance. A graded-index lens receives light passing through the objective from the specimen. A beam splitter splits the light exiting the gradient-index lens into a first optical axis and a second optical axis. A first lens is aligned in the first optical axis between the beam splitter and a first camera to focus a magnified image at the first camera. A second camera is situated along the second optical axis from the rear principal plane of the objective so as to obtain unity magnification when the working distance of the objective is set at twice its focal length. Multiple magnifications can be obtained with a single objective by moving the optical system axially to set different working distances from a specimen, and by using multiple beam splitters, or combinations thereof. |
| US08054557B2 |
Lithography projection objective, and a method for correcting image defects of the same
Projection objectives, as well as related components, systems and methods, are disclosed. In general, a projection objective is configured to image radiation from an object plane to an image plane. A projection objective can include a plurality of optical elements along the optical axis. The plurality of optical elements can include a group of optical elements and a last optical element which is closest to the image plane, and a positioning device configured to move the last optical element relative to the image plane. Typically, a projection objective is configured to be used in a microlithography projection exposure machine. |
| US08054549B2 |
Zoom lens and image pickup apparatus
A zoom lens includes, in order from an object side to an image side, a positive refractive, fixed first lens unit; a negative refractive second lens unit movable mainly for zooming; a positive refractive, fixed third lens unit; a positive refractive fourth lens unit movable for focal-position correction and focusing performed in response to zooming; and a positive refractive fifth lens unit. The fifth lens unit includes, in order from the object side to the image side, a negative refractive, fixed sub-unit; and a positive refractive sub-unit movable substantially perpendicularly to an optical axis. An image formed on an image surface is movable substantially perpendicularly to the optical axis by moving the movable sub-unit substantially perpendicularly to the optical axis. An aperture stop is provided on the object side of the third lens unit. The third lens unit includes a positive refractive sub-unit and a negative refractive sub-unit. |
| US08054545B2 |
Lens hood for a camera lens
A lens hood for a camera lens has a mounting barrel and a holding ring. The mounting barrel is hollow, is movably mounted around the camera lens and has an internal surface, a front end, a rear end, a sliding recess and at least one detent. The sliding recess if formed in the internal surface of the mounting barrel and has two ends. The at least one detent is formed adjacent to, communicating with and deeper than the sliding recess; two detents may be formed respectively at the ends of the sliding recess. The holding ring is resilient, is mounted securely around the cameras lens, is mounted in and presses the sliding recess and is selectively mounted in the at least one detent to allow the holding ring to relax and prolong usage lifetime. |
| US08054543B2 |
Microscopy system
The invention relates to a microscopy system for representing an object that can be placed on an object plane (1) of the microscopy system, the latter comprising a representation system (26) containing several optical elements for providing at least one optical representation path (2a, 2b, 2c, 2d). According to one embodiment of the invention, the optical elements comprise a plurality of optical lenses (4-8, 11, 13, 14), through which the optical representation path(s) (2a-2d) pass(es) in sequence and which represent the object plane (1) in an intermediate image (P). The optical lenses (4-8, 11) are configured in such a way that the representation of the object plane (1) in the intermediate image (P) is reduced a maximum 0.9 times, preferably a maximum 0.8 times, preferably a maximum 0.6 times, with 0.5 times being the preferred maximum reduction. |
| US08054540B2 |
Optical waveguide amplifier using high quantum efficiency silicon nanocrystal embedded silicon oxide
A method is provided for optical amplification using a silicon (Si) nanocrystal embedded silicon oxide (SiOx) waveguide. The method provides a Si nanocrystal embedded SiOx waveguide, where x is less than 2, having a quantum efficiency of greater than 10%. An optical input signal is supplied to the Si nanocrystal embedded SiOx waveguide, having a first power at a first wavelength in the range of 700 to 950 nm. The Si nanocrystal embedded SiOx waveguide is pumped with an optical source having a second power at a second wavelength in a range of 250 to 550 nm. As a result, an optical output signal having a third power is generated, greater than the first power, at the first wavelength. In one aspect, the third power increases in response to the length of the waveguide strip. |
| US08054539B2 |
Optical system for reducing stimulated Brillouin scattering by controllably changing polarization direction of an optical signal
An optical system having an input surface configured to receive an input optical signal having a polarization, and a polarization changer comprising the input surface and configured to generate two orthogonal polarization components from the input optical signal. The polarization changer also changes a direction of the polarization of the input optical signal in a controlled manner while maintaining coherence of the two orthogonal polarization components in order to reduce stimulated Brillion scattering. |
| US08054529B2 |
System and method for displaying images
System and method for simultaneous display of multiple images using a single light modulator array. A preferred embodiment comprises a light source that produces a light with desired spectral characteristics, a color filter optically coupled to the light source, and an array of light modulators optically coupled to the color filter. The color filter filters light from the light source to produce light of desired wavelengths and the array of light modulators simultaneously displays multiple images onto a display plane. Portions of the array of light modulators are designed so that each portion can independently display an image and the light source provides needed light to display the image. |
| US08054522B2 |
Oscillating mirror having a plurality of eigenmodes
Geometric-waveform oscillator for processing light, the geometric waveform oscillator including a plurality of masses, at least one force producing element, and a plurality of elastic elements, each of the force producing elements being coupled with a respective one of the masses, at least one of the masses including a light processing module, each of the force producing elements applying a force to the masses, the elastic elements coupling the masses together, the elastic elements coupling the masses with a respective support, wherein the mass values of the masses, the force values of the forces, and the stiffness coefficients of the elastic elements, are selected such that the light processing module oscillates according to the geometric-waveform. |
| US08054521B2 |
Method for adjusting galvano scanner system
In a galvano scanner system (1), a light position detection unit (30) is mounted so as to match the scanning center of the workpiece surface (7), the light position detection unit being provided with a two-dimensional light position sensor (32) disposed in the center and four one-dimensional light position sensors (33(1)) to (33(4)) concyclically disposed at equal angles about the center of the two-dimensional light position sensor. An origin position command is given to galvano scanners (3, 4), laser light is irradiated at low output, and the offset adjustment value is calculated based on the detection output of the two-dimensional light position sensor (32). Next, the galvano scanners (3, 4) are pivoted left, right, up, and down; the perpendicularity in relation to the workpiece surface (7) is determined and the distance from the workpiece surface (7) is calculated based on the detection output of each one-dimensional light position sensor (33); and the scale adjustment value is calculated on the basis thereof. Adjustment can be carried out with good accuracy in a simple manner in comparison with the case in which such an adjustment is made in alignment with a scale on a workpiece surface while visually observing visible laser light. |
| US08054519B2 |
Wavelength-multiplex and space-multiplex holographic storage device
The present invention discloses a wavelength-multiplex and space-multiplex holographic storage device, which comprises a storage medium, a plurality of signal light beams and at least one reference light beam. The signal light beams have different wavelengths and illuminate the storage medium. The reference light beam illuminates the storage medium and interferes with the signal light beams to form a plurality of interference patterns. The interference patterns are respectively stored on different-depth storage layers of the storage medium. The present invention not only has a high access rate but also has a large storage capacity. |
| US08054518B2 |
Color imaging devices, color imaging methods, and color separation methods
Color imaging devices, color imaging methods, and color separation methods are described. According to one embodiment, a color imaging device includes interface circuitry configured to access color image data of an initial color space for a plurality of pixels, color space conversion circuitry coupled with the interface circuitry and configured to convert the color image data for some of the pixels from the initial color space to a first output color space representation and to convert the color image data for others of the pixels from the initial color space to a second output color space representation different than the first output color space representation, and an image engine coupled with the color space conversion circuitry and configured to form a color image using the color image data of the first and the second output color space representations. |
| US08054517B2 |
Image processing apparatus and image processing method
An image processing method and apparatus includes a color space conversion unit arranged to convert pixel data scanned by a line sensor of each color component into first chromaticity data and second chromaticity data, and an achromatic color determining unit arranged to determine whether or not the pixel data is achromatic. The achromatic color determining unit includes a comparison unit arranged to compare an achromatic color determination area with the pixel data in a color space defined by orthogonal coordinates having each chromaticity data as a coordinate axis. The achromatic color determination area is an elongated area that includes a coordinate origin of the color space, that is set based on a coordinate position of a false color acquired by using a size and position of displacement of the scanning position of each color component generated in accordance with the scanning speed, and that extends in an opposite direction from the coordinate origin. |
| US08054516B2 |
Device for scanning and verifying a plurality of paper fingerprints
A document scanning device is provided that is able to accurately and easily scan paper fingerprint information, even if particulate rubbish such as paper powder or dust is adhering to the surface of a document platen glass. In an image scanning device able to scan using both a stationary document scanning method as well as document feed scanning method, paper fingerprint information is scanned using either of the above methods. Subsequently, a conveying unit and a scanning unit are moved so as to re-scan the paper fingerprint information in the same fingerprint acquisition region. The above operation is repeated until both sets of paper fingerprint information are coincident. |
| US08054510B2 |
Document reading method, document reader, image forming device, and image scanner
A document reader comprises line sensors that are staggeredly arranged and read a white reference plate to obtain a white reference read value A, and a white reference average value AA is determined from value A for each line sensor. The line sensors read another white reference plate placed on a document support plate to obtain a white reference read value B, and a white reference read average value BB is determined from value B for each line sensor. A sensitivity effect coefficient C for each line sensor is determined by dividing BB by AA. Using the line sensors, there are obtained a document read value E for each line sensor by reading an illuminated document on the document support plate, a white reference read value Aa by reading with the white reference plate before reading the document, and a black reference read value D by reading the white reference plate under a condition that an illumination is turned off before reading of the document. Shading for the line sensors is corrected using the coefficient C, the values Aa, D and E, and a number of gradation levels for image regions corresponding to read areas of the document. |
| US08054503B2 |
System and a program product
An apparatus is operable to cause a print unit to generate first printed matter based on a first setting designated by a first designator. The apparatus includes an identifier adapted to identify a second setting that can be utilized in substitution for the first setting, a notifier adapted to notify an operator of information about the second setting identified by the identifier, and a producer adapted to cause the print unit to generate second printed matter based on the second setting designated by a second designator, after notifying the operator of the information. |
| US08054502B2 |
Scanning optical apparatus, image forming apparatus and image clock correction method
A scanning optical apparatus includes, for example, a determination unit, a correction unit, a creating unit, and a drive control unit. The determination unit determines an amount of correction of an image clock for controlling an output timing of a beam for each pixel constituting one line in a main scanning direction of the beam. The correction unit corrects the image clock in accordance with the amount of correction that is determined. The creating unit creates an image signal that is utilized for driving a light source in accordance with the image clock that is corrected. The drive control unit controls driving of the light source in accordance with the image signal. |
| US08054496B1 |
Previewing a compound document
Providing a preview is disclosed. A first document associated with a first application is accessed. The first document is referenced by a second document. A preview is generated in a format capable of being displayed by the first application. The preview is provided for display by the first application. |
| US08054495B2 |
Digital documents, apparatus, methods and software relating to associating an identity of paper printed with digital pattern with equivalent digital documents
A method is provided of associating in computer memory (i) a digital electronic version of printed human-discernible content of a printed document comprising a sheet having a machine-readable pattern adapted to enable the position of a digital pattern reading device to be determined and said human-discernible content with (ii) the identity of a sheet upon which the content is printed, the method comprising: printing the content onto a sheet using a printer, said sheet comprising a pre-patterned sheet that has been pre-printed with said pattern; transferring a machine-readable identity code between said printer and said sheet at around the time of printing said content; and storing a correlation between said identity code and said digital electronic version in computer memory. |
| US08054492B2 |
Image sending apparatus, image sending system and image sending method
An image sending system including a server and a plurality of image sending apparatuses. The server (i) receives sending method specification information specified by a receiver and indicating a sending method for image data addressed to the receiver, (ii) records the sending method specification information and an identifier of the receiver in association with each other, (iii) and receives updated sending method specification information and rewrites the recorded sending method specification information with the updated sending method specification information. Each image sending apparatus (i) receives a selection of an identifier of a receiver of image data to be sent, (ii) obtains from the server the recorded sending method specification information and identification of the receiver, and (iii) when the identifier of receiver in the received selection matches the obtained identifier of receiver, sends the image data 505 by the sending method indicated by the obtained sending method specification information. |
| US08054491B2 |
Communication apparatus that prevents the wasteful printing of error reports
A communication apparatus preventing output of wasteful error reports is provided. To this end, first, the communication apparatus comprises a display means displaying an error report regarding a communication error and a print means printing an error report regarding a communication error. The communication apparatus further comprises a control means allowing the display means to display an error report regarding a communication error in the case the occurrence of the communication error is detected while the user is authenticated by an authentication means. The control means allows the print means to print an error report regarding a communication error where the occurrence of a communication error is detected and when the user is not authenticated by the authentication means. |
| US08054484B2 |
Image forming device
There is provided an image forming device, comprising: a print unit configured to form an image on a recording medium in which a memory device is embedded; a detection unit configured to detect a condition of the memory device embedded in the recording medium, the detection unit being positioned on a downstream side in a feeding direction with respect to the print unit; and a notification control unit configured to provide notification concerning the condition of the memory device, in response to a fact that the detection unit detects that the memory device embedded in the recording medium is defective. |
| US08054476B2 |
Asymmetric IDZ precession in a multi-pass direct marking system
What is disclosed is a system and method for minimizing the Inter-Document Zone (IDZ) in printing system architectures with print engines running at constant speed. The asymmetric IDZ precession disclosed herein is intended for those multi-pass systems where there is a difference in required start and stop durations of various transition subsystems such as transfer engagement and disengagement processes. This mode reduces the required inter-document zone region by shifting the zone in accordance with asymmetric timing of start and stop times of processes that must occur during this time. Advantageously, productivity gains are effectuated without altering process speeds. |
| US08054475B2 |
Image forming system and printing-medium feeding device
Provided is an image forming system that suppresses an increase in number of signal lines between an image forming apparatus and optional units, curtails communication time period and alleviates communication load. To accomplish this, an image forming system includes an image forming apparatus and one or more optional units removably attached to the image forming apparatus. The image forming apparatus transmits a specifying command and an instruction command to all of the optional units by outputting the commands on a single common signal line. Each optional unit outputs acknowledgement status on a single common signal line in a case where an identifier appended to the instruction command is the same as an acquired identifier. If the identifiers are different, on the other hand, each optional unit outputs a value indicating whether it itself is currently performing an operation in response to acknowledgement status transmitted by another optional unit. |
| US08054473B2 |
Measurement method for determining dimensions of features resulting from enhanced patterning methods
A measurement mark on a substrate has a first section with first primary and first secondary lines. The first primary lines have a first width and are arranged at a first pitch and in alternating order with the first secondary lines. A second section comprises second primary and second secondary lines arranged in alternating order. The second primary lines have a second width that is different from the first width. The pitch of the primary lines and the distance between the primary and the secondary lines is the same in each case. The spectral response of both sections of the measurement mark is determined by an analyzer unit of a measurement apparatus, and a sign of a difference between target and actual widths of the lines is determined by comparing a first spectrum derived from the first section with a second spectrum derived from the second section. |
| US08054468B2 |
Apparatus and method for ranging and noise reduction of low coherence interferometry LCI and optical coherence tomography OCT signals by parallel detection of spectral bands
Apparatus and method for increasing the sensitivity in the detection of optical coherence tomography and low coherence interferometry (“LCI”) signals by detecting a parallel set of spectral bands, each band being a unique combination of optical frequencies. The LCI broad bandwidth source is split into N spectral bands. The N spectral bands are individually detected and processed to provide an increase in the signal-to-noise ratio by a factor of N. Each spectral band is detected by a separate photo detector and amplified. For each spectral band the signal is band pass filtered around the signal band by analog electronics and digitized, or, alternatively, the signal may be digitized and band pass filtered in software. As a consequence, the shot noise contribution to the signal is reduced by a factor equal to the number of spectral bands. The signal remains the same. The reduction of the shot noise increases the dynamic range and sensitivity of the system. |
| US08054467B2 |
Method and apparatus for angular-resolved spectroscopic lithography characterization
An apparatus and method to determine a property of a substrate by measuring, in the pupil plane of a high numerical aperture lens, an angle-resolved spectrum as a result of radiation being reflected off the substrate. The property may be angle and wavelength dependent and may include the intensity of TM- and TE-polarized radiation and their relative phase difference. |
| US08054466B1 |
Spectroscopy wavelength and amplitude referencing system and method
A spectroscopy wavelength and amplitude referencing system comprises an optical bench receiving a tunable optical signal from a tunable signal source, a wavelength reference detector on the bench for determining a wavelength of the tunable optical signal, an amplitude reference detector on the bench for determining an amplitude of the tunable optical signal and an output optical signal fiber for transmitting the tunable optical signal to a sample. Also, spectroscopy system controller determines a spectral response of the sample to the tunable optical signal by determining an instantaneous wavelength of the tunable optical signal by reference to the wavelength reference detector. |
| US08054462B2 |
Quantum efficiency enhancement device for array detectors
Systems and methods for increasing the quantum efficiency of a photocathode used in an intensified an intensified array detector with a photocathode, such as a charge-coupled device (ICCD) are presented. A quantum efficiency enhancement device is disposed in front of an ICCD and is configured to enable or facilitate an increase in the angle of incidence of incoming rays incident on the photocathode. The ICCD itself may be tilted to achieve an increased angle of incidence, and such tilting is preferably only in a direction in which pixel columns of the ICCD extend such that a plane of incidence of incoming light to the ICCD is perpendicular to a direction of wavelength dispersion. The quantum efficiency enhancement device may include re-imaging optics, an optical tilt compensator and optical coupler. |
| US08054460B2 |
Methodology for evaluating the start and profile of a thread with a vision-based system
A system and method for identifying the start location of the lead thread and the thread profile and quality in a threaded bore in a part, where the system and method can be used for determining the location of the lead thread in a threaded bore in a cylinder head for a spark plug in one non-limiting embodiment. The system includes a moveable table on which the part is mounted. The system also includes a probe having an optical assembly that is inserted in the threaded bore. A camera uses the optical assembly to generate images of the thread bore, where the images are image slices as the probe moves through the threaded bore. The image slices are unwrapped and then joined together to form a planer image to determine a start location of the lead thread, thread count, defects in the threaded bore and thread profile parameters. |
| US08054457B2 |
Light intensity detecting methods and devices, display devices and storage media
A light intensity detecting device is provided to detect a light intensity according to pulse duration of a pulse signal without being affected by noise, including: a time measuring unit for measuring an elapsed time period of the pulse signal that has been raised; a signal state discriminating unit for obtaining a state of the pulse signal; a sampling unit for directing the signal state discriminating unit to obtain the state at a sampling interval corresponding to the elapsed time period; and a falling detecting unit for detecting the pulse signal that has been fallen when a fallen state of the pulse signal is successively obtained for two times. When the fallen pulse signal is detected, the sampling unit directs the signal state discriminating unit to obtain the state of the pulse signal at a time point, which is output as the pulse duration of the pulse signal. |
| US08054456B2 |
Method and system for detecting retroreflectors
An optical device that may include a sighting portion including an optical axis; an electromagnetic beam source coupled to said sighting portion, electromagnetic beam source facilitates generating a source beam including an axis that is substantially parallel to said optical axis; an optical surface coupled to said electromagnetic beam source; and a frequency filter coupled within said sighting portion. |
| US08054443B2 |
Developing method and developing apparatus
A developing method is used for subjecting a light-exposed resist film disposed on a wafer W to a developing process by a developing solution and a rinsing process by a rinsing liquid. In a state where the resist film on the wafer W is wet with the developing solution or rinsing liquid before a drying process is performed on the wafer W, a chemical liquid (curing chemical liquid), which contains a resist curing aid contributory to curing of a resist film remaining on the wafer W, is supplied onto a surface of the wafer W. Then, ultraviolet rays are radiated onto a surface of the wafer to cure a resist film remaining on the wafer W by a synergistic effect of the resist curing aid and the ultraviolet rays thus radiated, so as to prevent pattern fall. |
| US08054438B2 |
Display apparatus comprising a seal line having a first protrusion including a cross point on a first side of the substrate and a second protrusion comprising an opening of the seal line on a second side
A liquid crystal display (LCD) apparatus and a method of manufacturing the same include a seal line having two protrusions, one of the protrusions having a liquid crystal (LC) injection hole. Moreover, the LCD apparatus having the seal line constitutes a closed loop. The display apparatus and the manufacturing method thereof increase production yields because the number of apparatus substrates for the display apparatus obtained from a mother substrate is increased by minimizing a distance between two adjacent apparatus substrates on the mother substrate. The method of manufacturing an exemplary LCD apparatus includes a one drop filling method or a vacuum injection method. |
| US08054437B2 |
Large substrate, method of manufacturing liquid crystal device from the same, and liquid crystal device obtained
A plurality of panels (40) are cut from a large substrate (mother substrate) including a lower large substrate (41A) and an upper large substrate (42A). For each panel (40), a frame-shaped seal (47) and a connection electrode forming section (C) are formed in the large substrate. Since the left side (47c) of the frame of a panel (40) is close to the right side (47b) of the frame of the left-adjacent panel, these sides of the seals are formed from a sealing material containing a lower density of spacers. Since the upper side (47a) of the frame of a panel (40) is separated from the lower side (47d) of the frame of the upper adjacent panel (40) by an extension (C′) for the connection electrodes, these seal members are formed from a sealing material containing a higher density of spacers. |
| US08054433B2 |
Viewing angle control device and display provided with the same
There are provided a viewing angle control device that can provide a black display without coloring and achieve a significantly improved shielding ability during a narrow viewing angle state, and a display using the same. In order to adjust VT (voltage-transmittance) characteristics of a viewing angle control liquid crystal panel (2) that switches a viewing angle between a wide viewing angle state and a narrow viewing angle state by using birefringence of liquid crystal, the viewing angle control liquid crystal panel (2) includes a translucent dielectric film (206g, 206r) for adjusting the voltage-transmittance characteristics of the liquid crystal at a position corresponding to a picture element of at least one color in a display liquid crystal panel (1) on at least one of a pair of translucent substrates (201, 202) that sandwich the liquid crystal therebetween. |
| US08054432B2 |
Liquid crystal display device and method of fabricating the same
A method of fabricating a liquid crystal display device, includes applying an alignment film to a substrate surface, provisionally drying the alignment film, baking the alignment film; rubbing; and rubbing washing, which are performed in this sequence, wherein, in applying the alignment film, the alignment film is formed so as to cover at least a display region, and a portion of the alignment film which extends in a region outside the display region is imparted with an adsorptive property by modification during a process from the provisional drying to the rubbing washing. |
| US08054429B2 |
Liquid crystal display device
A liquid crystal display device including first and second substrates, with a liquid crystal layer including liquid crystal molecules between the first and second substrates. A first electrode formed on the first substrate and a second electrode formed on the second substrate. An alignment layer is formed on at least one of the substrates, and a polymer is formed on the alignment layer. The liquid crystal molecules are tilted when no voltage is applied to the liquid crystal molecules. The first electrode has a plurality of stripe-like electrode patterns, and the stripe-like electrode patterns have a width that is wider than a width of a space between adjacent strip-like electrode patterns. |
| US08054428B2 |
Liquid crystal display having openings in the protective layer and gate insulating layer and method for fabricating the display
The present invention relates to a liquid crystal display and a fabricating method thereof. The cell gaps for the red, green and blue pixel areas are formed in a separate manner for correcting the color shift to enhance image quality. Openings for controlling the cell gaps are provided in the protective layer and the gate insulating layer and have a zigzag-shaped boundary. In this way, the light leakage near the boundary of the openings can be prevented. |
| US08054422B2 |
Liquid crystal display device
To improve a patterning accuracy of pixel electrodes and common electrodes. The liquid crystal display device includes a reflective display area and a transmissive display area within a pixel that is configured with a pair of opposing substrates and a liquid crystal layer provided between the substrates. The reflective display area achieves display by reflection of light, and the transmissive display area achieves display by transmission of light. A laminated body including a reflective plate, an insulating layer, and a metal electrode for rotating liquid crystal molecules of the liquid crystal layer within a surface thereof is provided within the reflective display area. |
| US08054421B2 |
Reflective display panel and method for manufacturing such a display panel
The invention relates to a reflective display panel (9), comprising a plurality of pixels (10, 11a b), each having a modulative portion (15, 16a-b) which is controllable between light-modulation states, and a non-modulative portion (17, 18). The reflective display panel (9) comprises a redirection sheet (14) having a plurality of redirecting structures (19, 20) each being configured to redirect ambient light incident thereon towards an adjacent modulative portion (15, 16a-b). Through the invention, the portion of the light which would otherwise have hit the non-modulative portion of the pixel and would not have contributed constructively to the image forming of the display panel is instead directed towards the modulative portion of the pixel and can thereby contribute to the brightness as well as to the contrast of the reflective display panel. |
| US08054419B2 |
Display device and display panel and color filter thereof
A display device and a display panel and a color filter thereof are provided. The color filter includes a transparent substrate, at least a red filter film, at least a green filter film, at least a plurality of blue filter film and at least a white filter film. The red filter films, the green filter films, the blue filter films and the white filter films are disposed on the transparent substrate. The blue filter films have a first largest transmittance when a light with first wavelength transmits it. The green filter films have a second largest transmittance when a light with second wavelength transmits it. The white filter films have a third largest transmittance when a light with third wavelength transmits it. The third largest transmittance is larger than the first largest transmittance and the second largest transmittance. The third wavelength is between the first wavelength and the second wavelength. Therefore, the images displayed by the display device with the color filter may have accurate color-level and high brightness. |
| US08054416B2 |
Light polarizer
A polarizer is provided comprising a subwavelength optical microstructure wherein the microstructure is partially covered with a light-transmissive inhibiting surface for polarizing light. The inhibiting surface can include a reflective surface, such as a metalized coating. The subwavelength optical microstructure can include moth-eye structures, linear prisms, or modified structures thereof. A polarizing structure is further provided comprising a plurality of moth-eye structures stacked on one another for polarizing light. |
| US08054414B2 |
Liquid crystal display device
A liquid crystal display (LCD) device including upper and lower substrates facing each other with a liquid crystal layer interposed therebetween, upper and lower polarization plates positioned on outer surfaces of the upper and lower substrates, respectively, and a beam steering film positioned on the upper polarization plate and including a plurality of curved-lenses formed on a surface of the beam steering film facing the upper polarization plate. |
| US08054406B2 |
Backlight module with heat dispersing member and liquid crystal display device using same
An exemplary backlight module (200) used for liquid crystal display device (20) includes a first frame (261), a light source (240), a heat dispersing member (280) disposed along the light source, and a second frame (270) defining a window at a middle portion thereof. The second frame cooperative with the first frame to form a space receiving the light source and the heat dispersing member therein. |
| US08054405B2 |
Lighting device for display device, display device and television receiver
A lighting device for a display device includes a display panel, a light source, and an optical member to be arranged between the light source and the display panel. The optical member has light reflectivity that is higher at an end of the plane of the optical member than at the center thereof. |
| US08054400B2 |
Display device with waterproof sheet and recessed portion or through hole formed in a surface of the frame member which faces the waterproof sheet
The present invention prevents the corrosion of a printed circuit board which is connected to a lower side of a display panel in a liquid crystal display panel. In a display device which includes a display panel and a frame member which supports an outer peripheral portion of a display screen of a display panel, a water absorbing member is adhered to a surface of the frame member which faces the display panel in an opposed manner. |
| US08054396B2 |
Display substrate with dual transistor and connection transistor, method of manufacturing the display substrate and display device having the display substrate
A display substrate includes a gate line, a data line, a pixel electrode, a storage line, a dual transistor, a connection transistor, a voltage-decreasing electrode, a first contact electrode and a second contact electrode. The voltage-decreasing electrode is disposed on the storage line. The voltage-decreasing electrode is connected to a connection drain electrode of the connection transistor. The first contact electrode overlaps with the first pixel part and is electrically connected to the first pixel part. The first contact electrode is connected to a first drain electrode of the dual transistor and a connection source electrode of the connection transistor. The second contact electrode overlaps with the second pixel part and is electrically connected to the second pixel part. The second contact electrode is connected to a second drain electrode of the dual transistor. Therefore, the aperture ratio of the display device may be increased. |
| US08054392B2 |
Transparent composite material having ridge portion formed in transparent resistance film for transparent coordinate input device
A transparent composite material is able to promote visibility in a transparent coordinate input device due to the reflection of display light while the generation of an interference fringe at an input operating time is restrained. Many ridge portions extending in one direction are formed on the surface of a first transparent resistance film. Such ridge portions are projected stripes formed in a triangular shape in section, and are constructed by alternately forming one set of slanting faces on the surface of the first transparent resistance film. |
| US08054391B2 |
Semi-transparent display apparatus
A semitransparent display (100), suitable for use with an electronic device (700), is provided. The semitransparent display (100), in one embodiment, includes a cholesteric liquid crystal display layer (101) and a translucent electroluminescent layer (102), such as an organic light emitting diode device. Control circuitry (109) is coupled to each layer, and is configured to selectively actuate each layer. The cholesteric liquid crystal display layer (101) can be operated in any of a planar mode (201), a focal conic mode (202), or a homeotropic mode (203). Segments of the cholesteric liquid crystal display layer (101) can be selectively actuated so as to hide and reveal user actuation targets. Capacitive sensors (620,621) can be included so that the semitransparent display (100) works as a touch sensitive user interface. A user can see an object, such as a hand (105) or stylus, from above the semitransparent display (100) when the hand (105) or stylus is placed beneath the semitransparent display (100). |
| US08054389B2 |
Liquid crystal display apparatus having particular optical compensation layers
A liquid crystal display apparatus which includes an optical compensation layer in addition to a liquid crystal panel and which is capable of preventing degradation of the optical compensation layer, thereby providing high long-term reliability in display characteristics, is provided. The liquid crystal display apparatus includes a liquid crystal panel 1 in which a liquid crystal layer 30 is interposed between a first substrate 10 and a second substrate 20; a protection substrate 3 disposed at least one side of the liquid crystal panel 1 so as to face the liquid crystal panel 1; and an optical compensation layer 5 interposed between the liquid crystal panel 1 and the protection substrate 3. In addition, the liquid crystal display apparatus further includes polarizing plates 110 and 110 disposed at either side of the liquid crystal panel 1 on which the protection substrate 3 is provided; an illumination optical system irradiating the liquid crystal panel 1 with light h through one of the polarizing plates 110 and 110, and a projector lens projecting the light h that passes through the liquid crystal panel 1. |
| US08054386B2 |
Display system and operation method thereof
A display system includes a display device and a remote controller. Remote controller makes RF communication with the display device so as to obtain device information and includes a display panel that displays the device information. Remote controller adjusts the device information and sends the adjusted device information to the display device. In the display system, characteristics of the display device are monitored and adjusted by means of remote controller. |
| US08054385B2 |
Digital television transmitter and method of coding data in digital television transmitter
A pre-processor pre-processes enhanced data packets by coding the enhanced data packets for forward error correction (FEC) and expanding the FEC-coded data packets. A data formatter adds first null data into first place holders within each pre-processed enhanced data packet. A first multiplexer multiplexes the main data packets with the enhanced data packets having the first null data. A holder inserter inserts second null data into second place holders within an enhanced data packet outputted from the first multiplexer. A data interleaver replaces the second null data with parity data. A data generator generates at least one known data sequence. A symbol processor replaces the first null data included in an output of the data interleaver with the known data sequence(s). A non-systematic RS encoder generates the parity data by performing non-systematic RS-coding on an output of the symbol processor, and provides the parity data to the data interleaver. |
| US08054381B2 |
Apparatus and method for frame rate up conversion
An apparatus for frame rate up conversion comprises a motion-compensated frame rate converter, a primitive frame rate converter and a determination circuit. The determination circuit designates either the motion-compensated frame rate converter or the primitive frame rate converter to output an interpolated frame according to an index that estimates an output quality of the motion-compensated frame rate converter. |
| US08054378B2 |
Webcam module having a clamping device
A webcam module having a clamping device includes a body portion, a first sliding unit, a second sliding unit, a first torsion element and a second torsion element. The first sliding unit and the second sliding unit are provided on the body portion. The first sliding unit is able to slide by means of the cooperation between the sliding block and the guiding though-groove. The torsion elements are used to generate a force for clamping an article. Via the above arrangement, a user can turn a first turning portion of the first sliding unit and a second turning portion of the second sliding unit, thereby opening a first clip and a second clip to a predetermined angle. The torsion elements allow the first clip and the second clip to be clamped at a predetermined position. |
| US08054376B2 |
Image sensor holder
An image sensor holder a frame, a first slidable holder, a second slidable holder, a first and a second driving arms, a first and a second driving device and at least two restoration devices. The first slidable holder is slidably mounted on the frame. The second slidable holder is slidably mounted on the first slidable holder. The first and second driving devices are separately mounted on the frame. The first driving arm rotatably is mounted on the frame and contacts the first slidable holder and the first driving device by both opposite ends thereof. The second driving arm slidably is mounted on the frame and contacts the second slidable holder and the second driving device respectively by both opposite ends thereof. The restoration devices are respectively positioned on the frame and the first holder for restoring the first and second holders back to original positions. |
| US08054375B2 |
Physical quantity detecting device, method of driving the physical quantity detecting device and imaging apparatus
A physical quantity detecting device includes: a pixel array that has pixels two-dimensionally arranged in a matrix, each converting a physical quantity supplied from the outside into an electric signal; a driving circuit that scans, as read rows, N rows of pixels (N is an integer equal to or larger than 3) in the pixel array at the same time and reads out signals corresponding to the pixels in the read rows; and M signal processing circuit groups (1 |
| US08054368B2 |
Imaging system, imaging apparatus, portable terminal apparatus, onboard apparatus, and medical apparatus
There is provided an imaging system configured to include an imaging lens and an imaging device such that the maximum diameter of an effective region of a point image is a size covering three or more pixels of light receiving pixels, the point image being projected onto a light receiving surface through the imaging lens from an intended position. A signal processing unit executes restoration processing on first image data output from the imaging device that images an optical image of a subject through the imaging lens, the restoration processing being executed to generate second image data equivalent to the first image data output from the imaging device when the resolving power of the imaging lens is higher. The imaging lens includes a first lens group, which includes at least one lens and has a positive power, and a second lens group, which includes at least one lens and in which a lens positioned closest to the image side has a negative power, in order from the object side. |
| US08054365B2 |
Solid-state image pickup device having a signal separation part for separating and providing vertical and horizontal signals and drive method thereof
A solid-state image pickup device relating to the present invention comprises a pixel area where multiple pixels used for photoelectric conversion of incident light are two-dimensionally arranged. Vertical signal input lines to which vertical transfer signals for transferring signal charges generated at the pixels vertically in the pixel area are applied are connected to the pixel area. Furthermore, horizontal signal input lines to which horizontal transfer signals for horizontally transferring the signal charges are applied are connected to a horizontal transfer part for horizontally transferring the signal charges transferred vertically in the pixel area. A signal separation part separates vertical and horizontal transfer signals from a pulse signal supplied via a complex signal input terminal and supplies the separated signals to the vertical signal input line and the horizontal signal input line, respectively. |
| US08054363B2 |
Determining the multiplication of EMCCD sensor
A method and device having a CCD in which charge multiplication is obtained by applying drive voltages to clocking elements and is arranged to derive the gain provided by the multiplication elements from at least first and second output signals. The CCD is operated at a first voltage or temperature setting, and then a second voltage or temperature setting and the output signals derived with the CCD imaging a substantially constant scene. The gain at a given voltage or temperature setting can then be derived as a function of the different operational voltage of temperature setting. The method and device can also derive the gain as a function of the rate of change of output signal with an operational parameter such as voltage or temperature. |
| US08054362B2 |
Increasing readout speed in CMOS APS sensors through block readout
A method and associated architecture for dividing column readout circuitry in an active pixel sensor in a manner which reduces the parasitic capacitance on the readout line. In a preferred implementation, column readout circuits are grouped in blocks and provided with block signaling. Accordingly, only column output circuits in a selected block significantly impart a parasitic capacitance effect on shared column readout lines. Block signaling allows increasing pixel readout rate while maintaining a constant frame rate for utility in large format high-speed imaging applications. |
| US08054359B2 |
Image sensor with sensing transistor having two gates and method of operating the same
Provided is an image sensor including a sensing transistor having two gates and a method of operating the image sensor. The image sensor may include a photoelectric conversion device, a sensing transistor which may have a first gate connected to a floating diffusion region in which charges generated from the photoelectric conversion region are stored and a second gate separated from the first gate, a reset transistor that may be connected to the floating diffusion region and may reset a potential of the floating diffusion region, a control voltage source that may supply a control applied to the second gate, and a column output line which may be connected to a source of the sensing transistor. |
| US08054358B2 |
Solid state image pickup device
This invention improves linearity of a solid-state image pickup device beyond that of the prior art source follower to improve image quality. The image pickup device has plural pixels disposed in an array. Each pixel includes: a photodiode (PD); a transfer transistor (Tr1); a floating diffusion (FD); and an amplification transistor (Tr4). A compensating circuit has an amplifier (AP) receiving the output of the amplification transistor (Tr4), and a compensating transistor (M2) matched to the pixel amplification transistor (Tr4). Compensation is provided using negative feedback in the amplifier (AP). |
| US08054357B2 |
Image sensor with time overlapping image output
An image sensor system with an image sensor that generates a first image and a second image. The first and second images are transmitted to a processor in a time overlapping manner. By way of example, the images may be transferred to the processor in an interleaving manner or provided on separate dedicated busses. |
| US08054356B2 |
Image pickup apparatus having a charge storage section and charge sweeping section
A lower electrode, a photoelectric conversion layer, and an upper electrode are stacked in order above a semiconductor substrate, and a charge storage section that stores charge generated in the photoelectric conversion layer is connected to the lower electrode. The charge stored in the charge storage section is swept away by a charge sweeping away section for a given time from the endpoint of exposure. The given time is a time taken until the residual image charge existing in the photoelectric conversion layer at the exposure end point time is sufficiently discharged to the outside of the photoelectric conversion layer in a state in which the same bias as that at the exposure start time point is applied to the photoelectric conversion layer. |
| US08054355B2 |
Image sensor having multiple sensing layers
An image sensor includes a first sensor layer having a first array of pixels and a second sensor layer having a second array of pixels. Each of the pixels has an optical center. The first sensor layer is stacked over the second sensor layer such that the optical centers of the first array of pixels are offset from the optical centers of the second array to form a predetermined pattern. |
| US08054354B2 |
Solid state imaging device having built in signal transfer test circuitry
A data transfer circuit includes at least one data transfer line that transfers digital data, at least one data detecting circuit connected to the transfer line, holding circuits that hold digital values corresponding to input levels and that transfer the digital values to the transfer line, a scanning circuit that selects a holding circuit from among the holding circuits, at least one test-pattern generating circuit that generates a predetermined digital value, the test-pattern generating circuit being connected to the transfer line, at least one test-column scanning circuit that selects the test-pattern generating circuit, and a start-pulse selecting circuit that controls starting of the scanning circuit and starting of the test-column scanning circuit. The start-pulse selecting circuit has a function of transferring the predetermined digital value to the data transfer line by activating the test-pattern generating circuit via the test-column scanning circuit. |
| US08054352B2 |
Color filter array with reduced crosstalk effect and image sensor and image pickup apparatus having the same
An image sensor includes a color filter array including a primary color pixel such as a green filter pixel for sensing a predetermined primary color, a first secondary color pixel such as a yellow filter pixel, and a second secondary color pixel such as a cyan filter pixel. The primary color pixel, the first secondary color pixel, and the second secondary color pixel form different area ratios in the color filter array. For example, the area ratio of the yellow filter pixel to the cyan filter pixel and the green filter pixel is 2:1:1 in the color filter array. In addition, the color filters of the pixels are compensated for crosstalk effect. Such an image sensor has enhanced color reproducibility and sensitivity. |
| US08054338B2 |
Method for determining luminance threshold value of video region and related apparatus
A method for determining a luminance threshold value of a video region includes: performing a plurality of luminance threshold value generation operations on the video region included in a plurality of video frames, respectively. Each luminance threshold value generation operation includes: generating a total luminance value according to a plurality of luminance values of a plurality of pixels in the video region; subtracting a current luminance threshold value temporarily stored in a register from the total luminance value to generate a luminance error value; performing a specific filtering operation on the luminance error value to generate a filtered luminous error value; accumulating the filtered luminance error value to generate an accumulation result; and updating the current luminance value in the register according to the accumulation result and a luminance approximative value. |
| US08054337B2 |
Methods and apparatuses for serializing and/or deserializing video timing signals and parallel image data output from an image sensor
A signal processing method and apparatus are provided. A method of serializing signals output from an image sensor is provided which includes sampling a vertical synchronization signal, a horizontal synchronization signal, and parallel image data output from the image sensor, at a first edge of a clock signal, for n cycles of the clock signal, where n is an integer. The method further includes generating a packet including information regarding timing parameters and valid image data based on the sampling result. |
| US08054334B2 |
Imaging apparatus and imaging method
An imaging apparatus and an imaging method supply an optimum amount of image data to another apparatus. When a PDA has a maximum transfer rate of 1.5 Mbps, a mobile phone determines that the maximum speed of communication with the PDA is low, reduces the amount of moving image data captured by a CCD of the mobile phone accordingly, and supplies the captured moving image data to the PDA. The PDA therefore displays a low-quality moving image on its display unit. When the PDA has a maximum transfer rate of 480 Mbps, the CPU of the mobile phone leaves unchanged the amount of moving picture data captured by the CCD and supplies the captured moving image data to the PDA. The PDA then displays a high-quality moving image on its display unit. The foregoing may be advantageously applied to digital cameras. |
| US08054331B2 |
Systems and methods for generating video test sequences based upon captured video data
A video test system is provided with a circular buffer to capture a video input sequence in response to a trigger, and a test generator output to generate a video test sequence based upon the captured video test sequence. The system may be implemented using a single instrument, or a combination of instruments, such as video waveform monitors and video signal generators. A method is also provided for generating video test sequences based upon captured video sequences. |
| US08054320B1 |
Horizontal strip column-first two-dimensional scaling
A system is provided for scaling image data comprising a Direct Memory Access (DMA) engine adapted to read the image data from a horizontal pixel strip in a column-by-column format, a scaling block adapted to scale the image data read by the read DMA engine into scaled column output data, and a buffer memory for storing the scaled column output data for the horizontal pixel strip. A method is also provided for scaling an image comprising reading pixel values from a pixel strip in a column-by-column manner across the pixel strip and scaling the pixel values for each column to produce scaled column output data. The scaled column output data for a plurality of columns is then read and the scaled column output data is scaled from the plurality of columns to produce scaled row output data for a row of pixels. |
| US08054318B2 |
Image display device and a method for adjusting color thereof
An image displaying device and a method for controlling color thereof. The image displaying device includes a lattice selection unit which selects a lattice of a look-up table (LUT) for reference of each pixel of an input image, a lattice control unit which determines whether the selected lattice requires to be changed for color adjustment and calculates a change degree of the lattice, an LUT conversion unit which converts the LUT by changing the lattice based on the calculated change degree, and a lattice reference/interpolation unit which refers to or interpolates the lattice based on the converted LUT. Accordingly, the LUT can be updated real time, thereby realizing more accurate adjustment of color. |
| US08054315B2 |
Electronic system and method for selectively allowing access to a shared memory
An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image. |
| US08054309B2 |
Game machine, game machine control method, and information storage medium for shadow rendering
To provide a game machine for displaying a picture in which light from a light source causes the shadow of an object, and the shadow varies according to a change in the position of the light source, the shape (posture) of the object, and so forth, while reducing a processing load. The present invention relates to a game machine for showing a picture obtained by viewing, from a predetermined viewpoint, a virtual three dimensional space where a light source and an object are placed. According to the present invention, a shadow rendering object for rendering a shadow of the object is placed. The permeability of each of the vertexes of polygons forming the shadow rendering object is determined based on the position of the light source and the position and shape data of the object, and the game screen image is produced based on the permeability determined. The number of polygons forming the shadow rendering object is controlled based on the distance between the viewpoint and the object. |
| US08054308B2 |
Liquid crystal display device and driving method thereof
A driving method of an LCD device adapted to improve the quality of pictures is disclosed. The driving method includes: deriving a frame detection signal from a data enable signal and a data clock signal; simultaneously deriving a start signal and a first gate clock signal from the frame detection signal and the data clock signal; and deriving a second gate clock signal from the first gate clock signal and the data clock signal. The first gate clock signal is identical with the start signal in a start time point of enable interval. |
| US08054305B2 |
Image display apparatus, correction circuit thereof and method for driving image display apparatus
A correction circuit includes a timing control circuit for dividing a drive period assigned for drive of display devices into plural calculation slots, a luminance calculation circuit for calculating luminance including an effect of a voltage drop for each calculation slot, an accumulation circuit for temporally accumulating the luminance for each calculation slot, a corrected data determination circuit for outputting, as a corrected data, the value determined in accordance with the calculation slot at the time point when the accumulated luminance reaches a target luminance value, and a conversion circuit for converting the corrected data into modulation data to be applied to a modulation circuit. The width of the calculation slot is shorter than the width of the slot for pulse width modulation in at least a part of the drive period. The conversion circuit reduces the bit width of the corrected data by pseudo-gradation processing. |
| US08054304B2 |
Photo detector and method for fabricating the same
A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer with a first state, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer with a second state, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region of the substrate. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer. |
| US08054303B2 |
Transmitter and receiver capable of reducing current consumption and signal lines for data transfer
A transmitter includes a pair of output terminals which output an image data, and a transmitting unit. When the transmitting unit outputs the image data, a first output terminal of the pair is connected to a reference electric potential and a second output terminal of the pair is to a floating state, based on the image data. When the transmitting unit does not output an image data, the first and second output terminals of the pair become to a floating state. |
| US08054301B2 |
Dual pen system
There is disclosed an interactive display system comprising an interactive surface for displaying an image and for receiving inputs from remote devices, the system being adapted to detect the presence of at least two remote devices proximate the interactive surface. |
| US08054298B2 |
Image displaying apparatus and image displaying method
An image displaying apparatus is configured to display a desired image on an image displaying section employed in the image displaying apparatus by making use of a signal-line driving circuit and a scan-line driving circuit to drive pixel circuits. Each of the pixel circuits employs at least a light emitting device, a signal-level holding capacitor, a driving transistor for driving the light emitting device and a signal writing transistor. The signal-line driving circuit and the scan-line driving circuit drive each of the pixel circuits so as to put the light emitting device employed in the pixel circuit in a no-light emission state of emitting no light in a no-light emission period and a light emission state of emitting light in a light emission period repeatedly. |
| US08054294B2 |
Touch screen remote control system for use in controlling one or more devices
The present embodiments provide systems and methods for use in remote controlling devices including consumer electronic devices. Some embodiments provide a remote control system that comprises a processor, a display driver coupled with the processor, a touch screen display coupled with and receiving display control signals from the display driver such that the touch screen display displays one of a plurality of control views with a fixed number of function buttons displayed in each of the plurality of control views, a tactile screen cover extending over and covering the touch screen display through which selections of one or more of the function buttons is detected, and a wireless transmitter coupled with the processor that wirelessly transmits function signals in response to a detection of a selection of one of the function buttons. |
| US08054292B1 |
Mouse having an exchangeable palm rest
A mouse having an adjustable body size includes a mouse body having a first side and a second side; and a palm rest coupled to the mouse body, wherein the palm rest has a first size and the palm rest is configured to be removed from the mouse body to fit another palm rest to the mouse body having a second size that is different from the first size. The palm rest includes a first arm, a second arm, and a body portion that couples the first arm and the second arm. The first arm and the second arm are respectively coupled to the first side and second side of the mouse body. |
| US08054291B2 |
Pointing device
A pointing device is provided which can reduce its size and height, reduce leakage magnetic flux density to the outside. Magnetic sensors are disposed symmetrically two by two on X and Y axes on a printed circuit board. A silicone resin is placed on the printed circuit board, and an internally and externally unipolarly magnetized ring-like magnet is placed near the center of the magnetic sensors. The printed circuit board and silicone resin are not bonded. The silicone resin is easily deformed by applying external force, and returns to its initial state without the external force as soon as the external force is removed. The ring-like magnet is configured to move approximately in parallel to the surface of the printed circuit board. The variations in the ambient magnetic flux density produced by the movement of the ring-like magnet are detected by the magnetic sensors. |
| US08054286B2 |
Liquid crystal display capable of adjusting brightness of backlight thereof and method for driving same
An exemplary liquid crystal display (20) includes a liquid crystal panel (27) having at least one pixel block, a source driver (26) configured to drive the at least one pixel block, a backlight module having at least one light source block, a backlight driver (23) configured to drive the light source blocks, and a data processor (21) configured to provide gray level values and provide backlight control signals. The data processor receives display signals, converts the display signals to a plurality of primary gray level values, and averages the primary gray level values to obtain an average gray level value. The source driver and the backlight driver respectively generate data voltages and driving voltages to drive the at least one pixel block and the at least one pixel block according to the average gray level value. A related method for driving the liquid crystal display is also provided. |
| US08054284B2 |
Back light module and driving method thereof
A back light module and a method for driving the back light module are disclosed. The back light module includes a plurality of light emitting units and a driving unit. The driving unit is electrically connected to the light emitting units and utilized for driving the light emitting units according to a switched-on number of the light emitting units and a dithering scheme. |
| US08054281B2 |
Level shifter and flat panel display using the same
A level shifter for a flat panel display device includes: first and second transistors that are different type transistors and serially coupled between first and second power supplies, the second power supply for supplying a lower voltage power than the first power supply; a first capacitor between gate electrodes of the first and second transistors; an input line for a first input signal coupled to the gate electrode of the first or second transistor; a third transistor between a second electrode of the first capacitor and a third power supply, the third transistor having a gate electrode coupled to an input line of a second input signal; and a fourth transistor between the second electrode of the first capacitor and the third transistor, the fourth transistor having first and gate electrodes that are coupled to the second electrode of the first capacitor, such that the fourth transistor is diode-connected. |
| US08054278B2 |
Display apparatus
There is a need for decreasing a variation in times for writing to TFT elements for pixels in a direction along the extension of a gate line in a liquid crystal display apparatus. A display apparatus includes a display panel having multiple gate lines and multiple drain lines arranged in a matrix and a data driver for outputting a display data signal to each drain line. The data driver includes: an internal control signal generation circuit for generating an internal control signal for setting a timing to output a data signal to a drain line of each block on a block basis by dividing the plurality of drain lines into multiple blocks; and a register circuit for recording a setting for division of the block, a setting for a delay direction and a delay width of a timing to output the data signal, and a setting for rising and falling of an internal control signal. |
| US08054277B2 |
Liquid crystal display having polarity analyzing unit for determining polarities pixels thereof
A liquid crystal display (300) includes a liquid crystal panel (310) having a plurality of pixels P(i,j) arranged in a matrix, a brightness identification unit (343) configured for identifying a brightness of an image element to be displayed by at least one pixel, a polarity analyzing unit (344) configured for analyzing a result of the identification, and a data circuit (330). The polarity analyzing unit is also configured for generating a composed binary signal having a first binary portion the same as the primary display signal and an additive second binary portion. The data circuit is configured to provide a data voltage to drive the pixel according to the signal. A value of the data voltage is determined by a first binary portion of the composed binary signal, and a polarity of the pixel is determined by the second binary portion of the composed binary signal. |
| US08054272B2 |
Display apparatus
A display apparatus includes a gate driver, a data driver, a display panel, a power supply and a common voltage line. The gate driver outputs a gate signal, and the data driver outputs a data signal. The display panel includes a display area displaying images in response to the gate signal and the data signal, and a peripheral area surrounding the display area. The power supply generates a common voltage and supplies the common voltage to the display panel. The common voltage line is disposed in the peripheral area surrounding the display area. and the common voltage line has two ends adjacent to the power supply. One of the two ends, which is disposed farther away from the gate driver, is connected to the power supply to receive the common voltage. Accordingly, the common voltage is differentially applied according to a length of the common voltage line. |
| US08054269B2 |
Electronic device for enhancing voltage driving efficiency for a source driver and LCD monitor thereof
An electronic device for enhancing voltage driving efficiency for a source driver and a liquid crystal display (LCD) monitor is disclosed. The electronic device includes a reference voltage generator, a plurality of first coupling lines, a second coupling line wider than the first coupling lines, a data statistical unit and a reference voltage modulating module. The reference voltage generator generates a plurality of grayscale reference voltages. Each first coupling line and the second coupling line are utilized for transmitting one of the grayscale reference voltages. The data statistic unit statistically calculates a plurality of grayscale data values to generate a statistical result indicating a grayscale reference voltage corresponding to the most of the grayscale data values among the grayscale reference voltages. The reference voltage modulating module adjusts transmission relationship between the grayscale reference voltages and the first coupling lines and the second coupling line according to the statistic result. |
| US08054265B2 |
Liquid crystal display apparatus and driving method thereof
This invention relates to a liquid crystal display device that minimizes picture quality deterioration caused by signal distortion. The present invention selects an area within an image, which has a rapidly increasing or decreasing gamma voltage, identifies a border delineating two different intensity regions within the area, computes an average intensity within the area, and weights the gamma voltage for each pixel within the area based on the average intensity. A liquid crystal display device according to the present invention includes: a liquid crystal display panel; an analyzer analyzing a brightness characteristic of data in an area within an image; an average video signal voltage generator calculating an average brightness value in the area; a bordering value processing part calculating a bordering brightness value in the area; and a weighting part adjusting a pixel voltage according to the average brightness value and the bordering brightness value. |
| US08054262B2 |
Circuit for stabilizing common voltage of a liquid crystal display device
A circuit for stabilizing a common voltage of a liquid crystal display device includes a data driving unit for providing video data to a liquid crystal display panel and a gate driving unit for providing scan pulses to the liquid crystal display panel, a timing controller for outputting various control signals for controlling the data driving unit and the gate driving unit, and outputting the video data, and a common voltage output unit for controlling outputting of a common voltage provided to the liquid crystal display panel according to a gate output enable signal inputted from the timing controller to thereby minimize the common voltage from being unstable. |
| US08054259B2 |
Pixel and organic light emitting display device using the same
A pixel for compensating for the threshold voltage of a drive transistor and the voltage drop of a first power source is provided. The pixel includes an organic light emitting diode; a driving transistor coupled between a first power source and the organic light emitting diode for controlling the current supplied to the organic light emitting diode; an emission control transistor coupled between a first electrode of the driving transistor and the first power source and configured to be turned off when a high light emission control signal is applied; a switching transistor coupled between a gate electrode of the driving transistor and a data line and configured to be turned on when a low scan signal is applied; a first capacitor coupled between the gate electrode of the driving transistor and the first electrode of the driving transistor; and a second capacitor coupled between the first electrode of the driving transistor and the first power source. |
| US08054258B2 |
Pixel, organic light emitting display device and driving method thereof
A pixel includes an organic light emitting diode, a first transistor coupled to a scan line and a data line, the first transistor being configured to receive a data signal via the data line when a scan signal is supplied to the scan line, a storage capacitor configured to store voltage corresponding to the data signal received by the first transistor, a second transistor configured to control an electric current from the first power source to the second power source via the organic light emitting diode with respect to the voltage stored in the storage capacitor, and compensation unit configured to adjust voltage at a gate electrode of the second transistor, the voltage adjustment being sufficient to compensate for a deterioration degree of the organic light emitting diode. |
| US08054254B2 |
Organic light emitting display device and driving method thereof
An organic light emitting display device including: an optical sensor for generating an optical sensor signal corresponding to brightness of ambient light; a first luminance control unit for generating a pulse width (EW1) of a brightness control signal in accordance with the optical sensor signal (Ssel) and supplying a selection signal; a second luminance control unit for generating a fluctuated value (EW2) for the pulse width of the brightness control signal in accordance with data of one frame; and a luminance control signal generation unit for generating a luminance control signal (Vc) for controlling a scan driver in accordance with the pulse width of the brightness control signal and the fluctuated value. Here, the second luminance control unit is turned on/off according to the selection signal from the first luminance control unit. |
| US08054250B2 |
Pixel, organic light emitting display, and driving method thereof
A pixel, an organic light emitting display, and a method for driving an organic light emitting display using the pixel, which can display an image with substantially uniform luminance. In one embodiment, the method for driving an organic light emitting display having a pixel disposed at an i-th horizontal line, the pixel having a drive transistor for enabling the flow of current to an organic light emitting diode, the method including providing a reference voltage to a gate electrode of the drive transistor, charging a second capacitor with a threshold voltage of the drive transistor, charging a first capacitor with a voltage corresponding to a data signal, and providing a current corresponding to the voltages in the first and second capacitors to the organic light emitting diode. |
| US08054249B2 |
Active-matrix field emission pixel and active-matrix field emission display
Provided is a field emission display (FED) capable of driving on the basis of current and preventing leakage current caused by thin film transistors (TFTs). The FED includes: a plurality of unit pixels including an emission element in which cathode luminescence of a phosphor occurs and a TFT for driving the emission element; a current source for applying a scan signal to each unit pixel; and a voltage source for applying a data signal to each unit pixel. Here, the on-current of the current source is high enough to take care of the load resistance and capacitance of a scan row within a given writing time, and the off-current of the current source is so low that the electron emission of each pixel can be ignored. In addition, the pulse amplitude or pulse width of the data signal applied from the voltage source is changed, and thereby the gray scale of the display is represented. |
| US08054248B2 |
Method and apparatus for driving plasma display panel
A driving method of a plasma display panel may be provided such that the plasma display panel may be driven stably under a high temperature environment. The method may include applying a scan pulse to the scan electrode during an address period, applying a first DC voltage to the sustain electrode during the set-down period, applying a second DC voltage to the sustain electrode during the first address period after applying the falling waveform to the scan electrode, and applying a third DC voltage to the sustain electrode during the second address period after applying the second DC voltage to the sustain electrode. A difference between the second DC voltage and a lowest voltage of the scan pulse applied during the first address period is lower than a difference between the third DC voltage and a lowest voltage of the scan pulse applied during the second address period. |
| US08054246B2 |
Plasma display apparatus comprising data driver having data arranging unit
A plasma display apparatus comprises a controller, data transmitting unit, data driver, and plasma display panel. The controller outputs m channels of image data and the data transmitting unit transmits the image data through the m channels. The data driver includes a data arranging unit which receives the m channels of image data and outputs n channels of addressing data. The number n may be greater than m. Also, the data arranging unit may include a memory for storing image data corresponding to one frame, so that a driver of the data arranging unit can receive image data from the controller in any input period of one frame period. |
| US08054245B2 |
Plasma display apparatus and method of driving plasma display apparatus
A plasma display apparatus and a method of driving the plasma display apparatus are provided. A maintenance period of a sustain signal changes depending on a temperature of a plasma display panel or an ambient temperature of the plasma display panel. |
| US08054240B2 |
Electronic apparatus
An electronic apparatus includes: a housing provided with a first conductive pattern; a substrate provided with a first wiring layer in a surface thereof and fixed to the housing; and a first conductive member connecting the first conductive pattern and the first wiring layer. The first conductive pattern extends onto an outer surface and an inner surface of the housing. The first conductive member is in contact with each of at least a part of the first conductive pattern extending onto the inner surface and an end of the first wiring layer. Alternatively, an electronic apparatus includes: a housing provided with a conductive pattern and having a through part in a frame portion thereof; and a substrate provided with a wiring layer on a surface thereof and having a protruding part and fixed to the housing. The protruding part and the through part are fit. The conductive pattern extends onto an outer surface of the housing and onto an inner surface of the through part. At least some of the conductive pattern extending onto the inner surface is in contact with an end of the wiring layer. |
| US08054238B2 |
Balanced PIFA and method for manufacturing the same
A balanced patched inverse F antenna comprises a radiation conductor and a balun circuit. The radiation conductor includes a main body, a first branch and a second branch. The balun circuit includes an unbalanced port, a balanced port, and first, second, third and fourth components, with the first, second, third and fourth components being serially connected. A feeding input of the unbalanced port is connected to the second and third components, a grounding wire of the unbalanced port is connected to the first and fourth components, an inverting terminal of the balanced port is connected to the first and second components, a non-inverting terminal of the balanced port is connected to the third and fourth components, and the inverting and non-inverting terminals are respectively connected to the first and second branches. |
| US08054236B2 |
Broadband lossless dipole antenna
A lossless broadband dipole antenna of length L having three collinear parts including a central part and two external parts. The parts are separated by slits, with a first feeding point for the antenna being located at a first end of one of the external parts nearest the slits, and a second feeding point being located at a second end of the other external part nearest the slits. The two feeding points of the antenna at the slits are arranged at a distance d from each other along the length L of the antenna, d/L being chosen such that d L = 0.37 ± 0.04 . |
| US08054235B2 |
Active magnetic antenna with ferrite core
An active magnetic antenna with a ferrite core having a winding is provided, forming a frame magnetic antenna which is connected with a low-noise transistor, to amplify a signal of the frame magnetic antenna. A base of the transistor is connected directly to one contact of the winding, and a second contact of the winding is capable of shifting a voltage of the base of the transistor. The impedance of the frame magnetic antenna is adjusted as a complex conjugate with an impedance of the base of the transistor of the low-noise amplifier, and the winding eliminates its own resonances. |
| US08054231B2 |
Mobile terminal having metal case and antenna structure
A mobile terminal including a metal case and an antenna structure that can exhibit optimum radiation performance is provided. The antenna structure includes an antenna having a radiation unit for transmitting and for receiving electric waves, a Printed Circuit Board (PCB) to which the antenna is mechanically coupled at one surface thereof and having a power supply unit electrically coupled to the radiation unit, and a case constructed using a metal material within which the PCB is disposed, wherein the case has at least one slot formed in a surface thereof opposite to the surface to which the PCB is fastened and adjacent to the radiation unit. |
| US08054230B2 |
Multi-band antenna
A multi-band antenna includes a grounding element having a first side, a radiating element separated form the first side of the grounding element, and a connecting element. The connecting element connects the grounding element to the radiating element and includes a first end slantwise extending from the grounding to form a first angle except a right angle between the connecting element and the grounding element. |
| US08054229B2 |
Antenna and portable wireless device
A dual-band antenna with little limitation on the mounting space, which allows two antenna elements coping with different frequency bands to be laid out at a narrow space, and a portable wireless device having the same are provided. A band-like first antenna element, a sheet-like dielectric element, and a band-like second antenna element are fitted in a groove of a support member. The end portion of the second antenna element overlaps with the end portion of the first antenna element, and the dielectric element is sandwiched therebetween. The sandwiched dielectric element constitutes a capacitor, and first antenna element, the capacitor and the second antenna element are connected in series. The other end portion of the second antenna element is connected to a circuit in a bottom casing, and power is supplied through the other end portion thereof. |
| US08054228B2 |
Antenna structure for a magnetic resonance device
An antenna structure for a magnetic resonance device constructed as a radiating or transmitting antenna of the magnetic resonance device, has a non-metallic antenna conductor containing a discharge gas. When energy is imparted to the discharge gas, the antenna conductor forms an electrically conducting gas discharge column and can be used as an electrically conducting antenna element. |
| US08054227B2 |
Chip antenna
There is provided a chip antenna including: a dielectric block; a first conductive pattern formed on at least one surface of the dielectric block to connect to an external feeding part; a second conductive pattern spaced apart from the first conductive pattern at a certain distance so as to be capacitively coupled to the first conductive pattern to act as a radiator, the second conductive pattern having one end connected to an external ground part; and a third conductive pattern spaced apart from the first conductive pattern at a certain distance so as to be capacitively coupled to the first conductive pattern to enable impedance matching of the antenna, the third conductive pattern having one end connected to the external ground part. |
| US08054226B2 |
Method for estimating location of nodes in wireless networks
A method localizes a set of nodes in a wireless network that includes a target node having unknown location and a set of anchor nodes having known locations. The set of anchor nodes is partitioned into subsets of anchor nodes, wherein each subset has at least three anchor nodes. A distance from the target node to each of anchor nodes in each subset is measured, to estimate possible locations of the target node. A geometric constraint is applied to each estimated location to determine valid locations, which are then filtered to determine filtered locations. The filtered locations are averaged to determine an initial estimate of the location. |
| US08054224B1 |
Phased array antenna using identical antenna cells
A method and apparatus for creating an antenna system. A configuration for a plurality of antenna cells is selected for an antenna in the antenna system. Each antenna cell in the plurality of antenna cells comprises a plurality of antenna elements having a symmetric arrangement. A portion of antenna elements in the plurality of antenna elements for each antenna cell in the plurality of antenna cells on a substrate is selected to transmit electromagnetic waves. |
| US08054223B2 |
Quasi-omni training in channel time allocation period
Certain aspects of the present disclosure relate to a method for association in contention access periods and to a method for multi-cycle training in channel time allocation periods. |
| US08054222B2 |
Method and apparatus for combining measurements and determining clock offsets between different global navigation satellite systems
Method and apparatus for processing satellite signals from a first satellite navigation system and a second satellite navigation system is described. In one example, at least one first pseudorange between a satellite signal receiver and at least one satellite of the first satellite navigation system is measured. At least one second pseudorange between the satellite signal receiver and at least one satellite of the second satellite navigation system is measured. A first difference between a first time reference frame of the first satellite navigation system and a time reference and a second difference between a second time reference frame of the second satellite navigation system and the time reference are obtained. The at least one first pseudorange and the at least one second pseudorange are combined using the first and second differences in time references. |
| US08054221B1 |
Methods for testing satellite navigation system receivers in wireless electronic devices
A portable user device may provide Global Positioning System (GPS) services. The device may include a GPS receiver. The GPS receiver may provide accurate information about the current location of the device. A user may use the device to perform tasks. Certain tasks may generate excess heat or de-generate heat that causes the GPS receiver to perform unsatisfactorily. Methods are provided that can test GPS receiver performance during acquisition mode and during tracking mode. During testing, the GPS receiver may be given a predetermined amount of time to acquire a GPS fix. The GPS receiver may be tested repeatedly to acquire successive GPS fixes. After a desired number of tests are performed, a success rate may be calculated. If the success rate is satisfactory, the GPS receiver satisfies design criteria. If the success rate is not satisfactory, the GPS receiver may be reconfigured with new settings. |
| US08054220B1 |
Variable measurement rate method for positioning systems
A method of variable rate measurements in a device. The method generally includes the steps of (A) generating an intermediate signal conveying both a position of the device and a velocity of the device in response to a plurality of navigation signals received from external the device, (B) calculating an extrapolated position of the device at a second time based on the position and the velocity both measured at a first time, (C) adjusting an interval between the second time and a third time in response to a difference between the extrapolated position and the position measured at the second time and (D) generating a position signal conveying the position and the velocity, wherein the third time occurs after the second time and the second time occurs after the first time. |
| US08054218B2 |
Remotely-alterable electronic-ink based display device employing an integrated circuit structure having a GPS signal receiver and programmed processor for locally determining display device position and transmitting determined position information to a remote activator module
A remotely-alterable electronic-ink based display device for displaying graphical indicia within a GPS system transmitting a plurality of GPS signals to the device display device. The device employs an addressable display assembly including a layer of electronic ink including a bi-stable non-volatile imaging material. The device includes an integrated circuit structure having a GPS signal receiver, a storage element for storing instructions, programs and data, and a programmed processor in electrical communication with the addressable display assembly and an antenna structure. A signal transmitting structure transmits signals from the antenna structure to the remote activator module. A signal receiving structure receives electromagnetic signals from the remote activator module, using the antenna structure. An on-board battery power structure, operably connected to the integrated circuit structure, supplies electrical power the integrated circuit structure. The GPS signal receiver receives GPS signals, and the programmed processor locally processes received GPS signals, determines the position of the display device, and transmits the same to the remote activation module. |
| US08054216B2 |
Radar device and target angle detection method
A radar device has a plurality of receiving antennas which receive, as a reception wave, a radar wave sent in a predetermined reference direction and reflected by a target; a phase difference detection unit which detects a first phase difference of the reception wave received by a first receiving antenna pair that is spaced by a first gap, and a second phase difference of the reception wave received by a second receiving antenna pair that is spaced by a second gap smaller than the first gap; and an angle detection unit which performs a first process of determining, as a detection angle, an angle of the target relative to the reference direction being a mutually coincident angle from among a plurality of first angles corresponding to the first phase difference and a plurality of second angles corresponding to the second phase difference. The radar device allows expanding an angle detection range without reducing the resolution of the angle corresponding to the second phase difference. |
| US08054212B1 |
Multi-band receiver using harmonic synchronous detection
An apparatus comprises a transmitter system, a receiver system, and a processor unit. The transmitter system transmits first and second collimated beams having a first and second frequency. The receiver system monitors for a fundamental difference frequency signal having a difference frequency equal to a difference between the first and second frequency and a number of harmonics of the fundamental difference frequency signal. These signals are generated by an object having non-linear electrical characteristics in response to the collimated beams. The processor unit is connected to the transmitter system and the receiver system. The processor unit controls the transmitter and receiver systems to change at least one of the first and second frequencies through a range of frequencies and detect a range of fundamental difference frequency signals and the number of harmonics of the fundamental difference frequency signal in response to transmitting the collimated beams using the range of frequencies. |
| US08054210B2 |
Analog to digital converter
An image sensor includes a pixel array, and a correlated double sample circuit coupled to one of the pixels in the pixel array. The correlated double sample circuit includes first and second inputs, and first and second sample capacitors respectively coupled to the first and second inputs. The first input is for receiving an analog signal from a pixel, and the second input is for receiving a time varying reference signal. The analog signal varies during a pixel readout period, and has a first level during a first reset period and a second-level during a second read period. A comparator circuit compares the time varying reference signal and the analog signal. The analog signal and the time varying reference signal are constantly read onto one of the first and second sample capacitors during both the first reset period and the second read period. |
| US08054206B2 |
Decoding device and decoding method
A decoding method includes: inputting control information including first and second codec identifiers identifying first and second codecs corresponding to first and second material data, respectively, and first and second time information representing start times of decoding of the first and second material data, respectively; loading corresponding to the first codec identifier the first codec into the first decode processing unit; starting in the first decode processing unit corresponding to the first time information decoding of the first material data; and loading corresponding to the second codec identifier the second codec into the second decode processing unit. |
| US08054205B2 |
Method of composing and operating data input key array and apparatus employing the same
An apparatus and method are provided for composing a data input key array with a plurality of keys wherein multiple character groups are assigned to respective ones of the plurality of keys, each of the multiple character groups comprising multiple characters. The multiple characters of each character group are arranged on the corresponding key in the same pattern as the multiple character groups on the data input key array. The data input key array may operate by selecting a particular key assigned with a desired character, and selecting a key disposed to correspond with the position of the desired character on the particular key, thereby displaying the desired character. The data input key array may also be operated by selecting a particular key assigned to a desired character by inputting one of the directional keys, the directional key being disposed to correspond with the position of the particular key. |
| US08054204B2 |
Method for remotely updating wireless sensors
A method and system is provided for updating a sensor disposed within a mobile unit. The method includes the steps of: a) providing a remote server and at least one sensor, which remote server and sensor are located in the mobile unit and are in communications with one another through a first wireless network, and wherein the sensor has a first functionality; b) receiving an update signal transmitted from a base server to the remote server over a second wireless network; c) transmitting the received update signal from the remote server to the sensor over the first wireless network; and d) reconfiguring the sensor from the first functionality to a second functionality based upon the transmitted update signal. |
| US08054201B2 |
Surroundings monitoring device for vehicle
A real-image picking-up means picks up a real image of a blind area. A moving object detecting means recognizes a moving object from the real image and detects a moving state of the moving object. An imaginary-image specifying means specifies an indication manner of an imaginary image which is to be indicated for showing the moving state of the moving object. An indicating means indicates the imaginary image of the moving object in the indication manner which is specified by the imaginary-image specifying means such that the imaginary image of the moving object indicated by the indicating means overlaps the real image picked up by the real-image picking-up means. There can be provided a surroundings monitoring device for a vehicle which can easily recognize the state of the moving object in the image of the blind area. |
| US08054200B1 |
Control apparatus, method, and algorithm for turning on warning in response to strobe
A right of way vehicle throws out a strobe light having pulses. The strobe light is picked up by the present control apparatus, which analyzes the pulses of the strobe light via an algorithm, and then sets off an alarm or warning device if the strobe light meets the conditions of the algorithm. The control apparatus includes a sensor component, a signal conditioner component, a microcontroller component, and an alarm or warning device component. The components may be housed as a package and located in the interior of a vehicle. The components may be housed separately or in separate packages. The separately housed components or separately housed packages may be located at various locations on or in the vehicle. |
| US08054199B2 |
Alarm reporting through utility meter reading infrastructure
A system is provided that includes a utility meter of a utility company that measures consumption of a utility within a space occupied by a user, a wireless fault detector associated with the utility located within the space and a wireless transmitter of the utility meter that receives a fault message from the fault detector, confirms consumption of the utility within the space and transmits a fault message that identifies the space to the utility company. |
| US08054198B2 |
Spherical sensor and data collection vehicles
An inexpensive unmanned mobile sensor and data collection rolling rover (“rollver) for exploring remote, inaccessible locations, such as deep craters and canyons, includes a hollow enclosure having a flexible wall that is expandable into the shape of a sphere, an apparatus for selectably expanding the wall of the enclosure, a sensor and instrumentation payload disposed within the enclosure and coupled to an inner surface of the wall of the enclosure, and a power supply for powering the payload at its destination. The rollver is adapted to roll to a target destination at least partially in response to at least one of an initial impetus imparted to the vehicle and gravitational forces acting thereon, and due to its relatively low cost, can be simultaneously deployed and used in an area of interest in relatively large numbers. |
| US08054197B1 |
Speedometer for train crossings
An apparatus that indicates the speed of oncoming trains at train crossings comprises a large digital display attached to a drop gate or alternately on a side gate crossing sign for those crossings without a gate. The digital display is surrounded by a large sign indicating the speed of an oncoming train. A speed detection device aimed in either direction on the track to determine train speed. An interface converts the detected speed into a digital display. It is envisioned that motorists knowing the speed of an oncoming train will be less likely to try to beat the train through the crossing. |
| US08054193B1 |
Method for controlling output of a classification algorithm
Method for controlling output of a classification algorithm which classifies an occupant of a seat in a vehicle in which a bladder or other type of weight sensor is arranged in a bottom cushion of the seat, data relating to the pressure exerted by the occupant on the bottom cushion is obtained from the weight sensor, the occupant is initially classified, a current classification is output using data from the weight sensor, the occupant is periodically re-classified using data from the weight sensor, and a classification change is allowed only upon obtaining evidence of a new classification which is greater than evidence of the current classification. The classification change may be enabled by determining a substantially consecutive period of time when the re-classification is unchanged and different from the current classification, and enabling the classification change upon when the consecutive period of time is greater than a threshold. |
| US08054189B2 |
Life safety device with automatic battery discharge at the end of life
When a rechargeable battery of a life safety device reaches its end of life, the life safety device provides an audible signal indicating that replacement is required. When the device is disconnected from line power, the rechargeable battery still contains a significant amount of energy. The device automatically begins controlled discharge the battery until the stored energy has been reduced to a safe level for disposal of the life safety device and its battery. |
| US08054181B2 |
Terrestial-signal based exclusion zone compliance
An exclusion zone compliance circuit comprises a terrestrial radio signal reception component for receiving a terrestrial radio signal comprising a unique identification of a transmission source. A non-volatile memory component of the circuit stores an encrypted data set describing boundaries of an exclusion zone. A navigation data deriving component of the circuit accesses a data set and compares the unique identification with a station identification of the transmission source and the geographic position of the transmission source. The navigation data deriving component derives a geographic position of the exclusion zone compliance circuit and determines whether the exclusion zone compliance circuit is located within an exclusion zone. A data blocking component of the circuit accesses the encrypted data set. A data control component of the exclusion zone compliance circuit blocks output of a signal in response to an indication that the circuit is located within an exclusion zone. |
| US08054178B2 |
System and method for correlating biometric trends with a related temporal event
Systems and methods for correlating biometric trends with a related temporal event are disclosed. A preferred embodiment utilizes an implantable medical device comprising at least one sensor in electronic communication with a patient management system adapted to temporally analyze and correlate biometric data. Some embodiments of a system disclosed herein also can be configured as an Advanced Patient Management system that helps better monitor, predict and manage chronic diseases. |
| US08054177B2 |
Systems and methods for facilitating a first response mission at an incident scene using patient monitoring
Systems and methods for facilitating a first response mission at an incident scene, such as an accident site, a natural or human-made disaster site, or any other first response site. One system comprises a portable patient module to be associated with a patient at the incident scene and configured to transmit wireless signals. The system also comprises a processing system comprising at least one receiver to receive the wireless signals and a processing entity configured to process data derived from the wireless signals to determine an action to be performed with respect to the patient, such as transmission of a message conveying information regarding the patient to a first responder at the incident scene, establishment of communication between a first responder at the incident scene and a clinician remote from the incident scene to discuss the patient, or transmission of a message to initiate preparation of resources at a healthcare facility remote from the incident scene for arrival of the patient. |
| US08054173B2 |
Alarm management device
An alarm management device capable of constructing logics for suppressing tailgate alarm without depending on controllers, and of managing engineering and management thereof with concentration. The invention relates to an alarm management device for managing alarms issued in a plant. The alarm management device is provided with alarm state management apparatus for managing issuance states of acquired alarms, alarm engineering apparatus for setting alarm issuance patterns, alarm suppression judgment apparatus for judging suppression target alarms from the alarm issuance states and alarm issuance patterns, and alarm processing apparatus for executing suppression of the suppression target alarms among the acquired alarms in response to an instruction of the alarm suppression judgment apparatus. |
| US08054172B2 |
Apparatus with reconfiguration function and signal gathering function
The present invention relates to an apparatus with reconfiguration function and signal gathering function. The apparatus with reconfiguration function and signal gathering function according to the present invention comprises a signal gathering unit which gathers at least one alarm digital alarm signal, an alarm signal address setting unit where the address of the alarm signal gathering unit is setup; and an alarm signal collection controller which outputs the at least one digital alarm signal through serial bus. Therefore, address is allocated to a plurality of digital signals and thus the number of necessary components decreases and the embodiment area decreases, as well. |
| US08054169B2 |
Method of detecting a pressure loss of a tire, tire pressure monitoring system in a vehicle
A method for detecting a pressure loss of a tire in a vehicle equipped with a tire pressure monitoring system. The method includes the following steps carried out in the parked state of the vehicle: deactivate the tire pressure monitoring system, which contains at least one electronic wheel device disposed in a vehicle wheel, activate the tire pressure monitoring system after a first defined period of time or upon a vehicle-side request, determine tire-related information of the vehicle wheels associated with the electronic wheel devices by the respective electronic wheel device and generate status signals containing the tire-related information, communicate the status signals to an evaluation device, return to the first method step at the latest after a second period of time. |
| US08054166B2 |
Method and apparatus for telephonically accessing and navigating the internet
A method for accessing and browsing the internet through the use of a telephone and the associated DTMF signals is disclosed. The preferred embodiment provides a system that converts the information content of a web page from text to speech (voice signals), signals the hyperlink selections of a web page in an audio manner, and allows selection of the hyperlinks through the use of DTMF signals generated from a telephone keypad. Upon receiving a DTMF signal corresponding to a hyperlink, the corresponding web page is fetched and again delivered to the user via one of the available delivery methods such as voice, fax-on-demand, electronic mail, or regular mail. |
| US08054162B2 |
Communication method in RFID or remote sensor systems
A method for communicating between a control unit and a plurality of remote units located in the response area of the control unit is provided. The remote units are prompted to transmit a data sequence to the control unit upon receipt of a command sent by the control unit. The control unit transmits a control signal to the remote units substantially simultaneously with the transmission of the data sequence as a function of a communication state, such as the absence of a transmission of the data sequence by at least one remote unit or an at least partially simultaneous transmission of the data sequence by more than one remote unit. In this way, communication methods can be shortened, in particular in terms of time, without adversely affecting communication reliability. |
| US08054157B2 |
RF terminating resistor of flanged construction
An RF terminating resistor with a flange body, a planar layer structure, an upper face of a substrate, a resistance layer, an input conductor track, and an earth connection conductor track. The input conductor track electrically connected to opposite ends of the resistance layer. The substrate having a contact face, facing away from the layer structure. The flange body being bent around in a direction parallel to a first edge facing the earth conductor track, and a predetermined section bent around in a direction at right angles to this edge. The bent-around section extending in a space between a first plane, defined by the contact face, and a second plane, defined by the upper face, with the substrate abutting on the bent-around section connecting the contact face to the upper face and facing the earth connection conductor track on the upper face. |
| US08054156B2 |
Low variation resistor
This document discloses low variation resistor devices, methods, systems, and methods of manufacturing the same. In some implementations, a low-variation resistor can be implemented with a metal-oxide-semiconductor field-effect-transistor (“MOSFET”) operating in the triode (e.g., ohmic) region. The MOSFET can have a source that is connected to a reference voltage (e.g., ground) and a gate connected to a gate voltage source. The gate voltage source can generate a gate voltage that varies in proportion to changes in the temperature of an operating environment. The gate voltage variation can, for example, be controlled so that it offsets the changes in MOSFET resistance that are caused by changes in temperature. In some implementations, the gate voltage variation offsets the resistance variance by offsetting changes in transistor mobility that are caused by changes in temperature. |
| US08054154B2 |
Planar transformer and method of manufacturing
A planar transformer includes first and second windings that may be comprised of electrically conductive traces etched onto one or more printed circuit boards. The printed circuit boards may be arranged in various orientations so as to change the turns ratio of the planar transformer. In one embodiment, the printed circuit boards are substantially similar and may be electrically connected via connectors that separate the circuit boards. Insulating sleeves may be inserted between the printed circuit boards in an interleaved configuration. |
| US08054146B2 |
Structures with negative index of refraction
The invention provides simplified negative index materials (NIMs) using wire-pair structures, 4-gap single ring split-ring resonator (SRR), fishnet structures and overleaf capacitor SRR. In the wire-pair arrangement, a pair of short parallel wires and continuous wires are used. In the 4-gap single-ring SRR, the SRRs are centered on the faces of a cubic unit cell combined with a continuous wire type resonator. Combining both elements creates a frequency band where the metamaterial is transparent with simultaneously negative ∈ and μ. In the fishnet structure, a metallic mesh on both sides of the dielectric spacer is used. The overleaf capacitor SRR changes the gap capacities to small plate capacitors by making the sections of the SRR ring overlap at the gaps separated by a thin dielectric film. This technique is applicable to conventional SRR gaps but it best deploys for the 4-gap single-ring structures. |
| US08054145B2 |
Phononic crystal wave structures
Phononic crystal wave structures and methods of making same are discussed in this application. According to some embodiments, an acoustic structure can generally comprise a phononic crystal slab configured as a micro/nano-acoustic wave medium. The phononic crystal slab can define an exterior surface that bounds an interior volume, and the phononic crystal slab can be sized and shaped to contain acoustic waves within the interior volume of the phononic crystal slab. The phononic crystal slab can comprise at least one defect portion. The defect portion can affect periodicity characteristics of the phononic crystal slab. The defect portion can be shaped and arranged to enable confinement and manipulation of acoustic waves through the defect portion(s) of phononic crystal slab. Other aspects, features, and embodiments are also claimed and described. |
| US08054136B2 |
Electronic circuit
An electronic circuit includes a transimpedance amplifier, a bypass circuit that allows a part of an input signal to be applied to the transimpedance amplifier to flow through the bypass circuit so as to bypass the transimpedance amplifier on the basis of a control signal, and a control signal circuit that includes a hold circuit having a time constant that is variable on the basis of a time constant control signal and generates the control signal. |
| US08054135B2 |
Class-E amplifier and lighting ballast using the amplifier
An amplifier comprises a power source, a load network comprising a load and a resonance circuit, an input branch having a first end electrically coupled to the power source and a second end electrically coupled to the load network, and an active switch having one terminal electrically coupled to the second end of the input branch. The input branch including at least one parallel-LC-circuit configured to provide an infinitely large impedance at harmonics of a determined order. |
| US08054134B2 |
Coupling isolation method and operational amplifier using the same
A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result. |
| US08054130B2 |
Method for measuring the saturation rate of an audio amplifier
A method and corresponding circuit that adjusts the gain of an audio output stage having a class D amplifier, this method including the steps of setting the gain to a nominal value, analyzing an output signal during successive clock periods, counting the number of clock periods during which the signal is in a state corresponding to a saturation, decreasing the gain if the number reaches, before the end of a first time interval, a value corresponding to a first percentage, maintaining the gain constant if, at the end of a second time interval, different from the first interval, the number corresponds to a second percentage being comprised between the first percentage and a third percentage, and increasing the gain if, at the end of the second time interval, the number corresponds to a fourth percentage, lower than the third percentage. |
| US08054129B2 |
Class D amplifier
A class D amplifier includes: an amplifier that generates a digital signal for driving a load based on an input signal; an attenuator that attenuates the input signal according to an attenuation command signal; and a clip prevention controller that outputs the attenuation command signal to intermittently attenuate the input signal when the digital signal is brought into a clip state or a near-clip state. |
| US08054119B2 |
System and method for on/off-chip characterization of pulse-width limiter outputs
The present invention provides for a method for characterization of pulse-width limiter outputs. A known clock signal is received. A pulse width of the received known clock signal is limited through a first pulse-width limiter to generate a first intermediate signal. The first intermediate signal is delayed by a known amount to generate a first delayed signal. The first intermediate signal is inverted to generate a first inverted signal. A pulse width of the first inverted signal is limited through a second pulse-width limiter to generate a second intermediate signal. The second intermediate signal is delayed by a known amount to generate a second delayed signal. A logic OR operation is performed on the first delayed signal and the second delayed signal to generate a clock out signal. |
| US08054118B2 |
System and method
System and method, including path sections, each path section including a supply line into which a medium-frequency current is able to be injected by an infeed assigned to the particular path section, each infeed encompassing a control circuit, a first one of the control circuits transmitting a clock signal for the synchronization of the additional infeeds thereto. |
| US08054117B2 |
Wideband delay-locked loop (DLL) circuit
A wideband delay-locked loop (DLL) circuit includes an internal clock signal generating unit providing an internal control signal by selecting and interpolating between two clock delay signals during a primary phase locking operation. The internal clock signal may be modified by a secondary phase locking operation if more delay is required to phase lock the internal clock signal to an external clock signal. A phase detection/control circuit generates various control signals based on a phase comparison of the internal clock signal and the external clock signal. |
| US08054110B2 |
Driver circuit for gallium nitride (GaN) heterojunction field effect transistors (HFETs)
A driver circuit and integrated circuit implementation of a driver circuit for driving a GaN HFET device is disclosed. The driver circuit includes a resonant drive circuit having an LC circuit with an inductance and a capacitance. The capacitance of the LC circuit includes the gate-source capacitance of the GaN HFET device. The driver circuit further includes a level shifter circuit configured to receive a first signal and to amplify the first signal to a second signal suitable for driving a GaN HFET device. The resonant drive circuit is controlled based at least in part on the second signal such that the resonant drive circuit provides a first voltage to the GaN HFET device to control the GaN HFET device to operate in a conducting state and to provide a second voltage to the GaN HFET device to control the GaN HFET device to operate in a non-conducting state. |
| US08054109B2 |
Input buffer and method of operation
A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages. |
| US08054108B2 |
Transmission device having emphasis function
A transmission driver including a main driving stage and a sub-driving stage is provided. The main driving stage has a main current source, and is adapted for receiving a first differential input data stream and outputting a differential output data stream by using the main current source. The sub-driving stage has two sub-current sources, and is adapted for receiving a second differential input data stream and counteracting/reducing the attenuation or distortion of the differential output data stream caused by a long transmission distance by using the sub-current sources. There is a delay of a specific bit length between the first and the second differential input data streams. |
| US08054107B2 |
Operational circuit having protection circuit for detecting driving current to adjust control signal and related control method
An operational circuit includes: a first stage having a first input terminal for receiving an input signal and a second input terminal for receiving an output signal of the operational circuit, for outputting a first control signal at a first output terminal and a second control signal at a second output terminal according to the input signal and the output signal; a second stage coupled to the first stage, for generating the output signal according to a first driving current controlled by the first control signal and a second driving current controlled by the second control signal; and a protection circuit coupled between the first stage and the second stage, for detecting the first driving current to selectively adjust the first control signal. |
| US08054100B1 |
Line transceiver apparatus for multiple transmission standards
A line transceiver apparatus for multiple transmission standards including a operational amplifier (OP-AMP), a transformer unit, a first variable resistor unit to a sixth variable resistor unit, and a variable resistor control unit is provided. The first resistor and the second resistor are coupled between transmission nodes of the line transceiver apparatus and input nodes of the OP-AMP, and the load nodes of the transformer unit are receiving nodes of the line transceiver apparatus. The variable resistor control unit adjusts the impedances of the first variable resistor unit to the sixth variable resistor unit according to a transmission standard selection signal so as to enable the line transceiver apparatus to support multiple transmission standards. |
| US08054093B2 |
Sensor threshold circuit
There is provided a sensor threshold circuit that makes available a hysteresis width that is not dependent on the change in a threshold point. Since a bias current IB is generated by a threshold current IT and a threshold adjusting current ICONT, the threshold point is given by a coefficient A and a coefficient K and the hysteresis width |BH| is given by the coefficient K. Accordingly, when the coefficient K is determined, the hysteresis width |BH| is not dependent on the coefficient A and keeps a constant value. In addition, since the coefficient A depends on the resistance ratio, the threshold point is variable by changing a single resistor. Further, when the coefficient K is determined, the hysteresis width |BH| is also determined to be a single value with no variations in its value, no changes according to temperature, and no changes over time. |
| US08054092B2 |
Corrosion detecting structural health sensor
A sensor device for monitoring and testing for potential corrosion of structural elements is disclosed. A membrane including a thin conductor sense loop within it may be disposed near a structural element to be monitored. Measured changes in the electrical properties of the conductor sense loop reveal corrosion of the conductor and can indicate potential corrosion in the structural element. The sensor may also be implemented as a gasket. Connection to the sensor device may be through a connector or using a wireless reader which remotely energizes the sensor device. |
| US08054090B2 |
Noise handling in capacitive touch sensors
In a capacitive sensor of the type having X electrodes which are driven and Y electrodes that are used as sense channels connected to charge measurement capacitors, signal measurements are made conventionally by driving the X electrodes to transfer successive packets of charge to the charge measurement capacitors. However, an additional noise measurement is made by emulating or mimicking the signal measurement, but without driving the X electrodes. The packets of charge transferred to the charge accumulation capacitor are then indicative of noise induced on the XY sensing nodes. These noise measurements can be used to configure post-processing of the signal measurements. |
| US08054089B2 |
Capacitance measuring circuit
The present invention is based on the finding that a capacitance can be measured precisely and efficiently when, in a delta-sigma modulator having an operational amplifier, a first capacitor connectable to an input of the operational amplifier, and a second capacitor in a feedback branch of the operational amplifier, a reference signal source is connectable to the first capacitor, wherein the first or second capacitor may represent a capacitance to be measured. Due to the fact that, in contrast to what is conventional, no input quantity is measured and digitalized at the input of the delta-sigma modulator, but instead a defined reference signal source is coupled at the input and a device of the delta-sigma modulator itself represents the measuring quantity, an extremely compact circuit is provided allowing capacitances to be measured quickly and reliably, the measuring result being additionally made available in a digital form. |
| US08054086B2 |
Apparatus for dispensing and detecting solid pharmaceutical articles and related methods of operation
A method for dispensing and detecting solid pharmaceutical articles includes: forcing an article through a dispensing channel and past a sensor configured and positioned to detect the article passing through the dispensing channel, wherein the article includes one of the solid pharmaceutical articles; generating a detection signal using the sensor responsive to the article passing through the dispensing channel, wherein the detection signal indicates a time that the article takes to traverse the sensor; and determining whether the article is a complete article or an article fragment responsive to a comparison of the time indicated by the detection signal and an article fragment travel time representing an expected travel time for a complete article to traverse the sensor that is determined independent of physical attributes of the solid pharmaceutical articles. |
| US08054083B2 |
Method and apparatus for diagnosing a motor control circuit in a hybrid vehicle
A hybrid electric vehicle (HEV) has an algorithm for executing a method for diagnosing a high-voltage (HV) fault condition aboard the HEV. The HEV includes a high-voltage (HV) battery, an auxiliary power module (APM), a power inverter module (PIM), and a three-phase motor/generator unit (MGU). A controller executes the method to thereby measure a DC output current from the HV battery, a DC inlet current into the APM, and a pair of AC phase currents in the MGU. The method further includes calculating a DC inlet current into the PIM using the AC phase currents, diagnosing the HV fault condition using the DC output currents and the DC inlet currents, and executing a control action in response to the diagnosed condition. The method can include shutting off the APM to determine whether the APM is the root cause of the HV fault condition. |
| US08054079B2 |
Method for processing a distortion-corrected 2D or 3D reconstruction image recorded by a magnetic resonance device
In one embodiment a method for processing a reconstruction image is disclosed. The method includes recording the reconstruction image by a magnetic resonance device having a gradient coil to generate a gradient field. The method further includes distortion-correcting the reconstruction image. The method further includes back-transforming the distortion-corrected reconstruction image, by an image processing device, into a distortion-uncorrected reconstruction image, the back-transforming uses an algorithm having a first input value describing a real gradient field given at a real measuring point of the signal. |
| US08054067B2 |
Magnetic sensor and rotation-angle-detecting apparatus with a bridge circuit
A magnetic sensor comprising a bridge circuit in which four magnetoresistive devices are connected, the magnetoresistive device comprising a spin-valve, giant-magnetoresistive film comprising a pinned layer having unidirectional magnetic anisotropy, a free layer whose magnetization direction is rotated in alignment with an external magnetic field direction, and an intermediate layer sandwiched by the pinned layer and the free layer, and at least one of the magnetoresistive devices meeting the condition of 36°≦θ<45°, wherein θ is an acute angle between its longitudinal direction and the magnetization direction of the pinned layer. |
| US08054064B2 |
Sensor holder with a wheel bearing apparatus incorporated with a wheel speed detecting apparatus including an annular fitting member in the sensor holder and a seal positioned between the annular fitting member and an outer circumference of an inner ring
A sensor holder has an encoder and a wheel speed sensor arranged opposite to the encoder, via a predetermined air gap. An annular fitting member is formed by pressing an anti-corrosive steel plate. A holding portion is formed of injection moldable synthetic resin and is integrally formed with the annular fitting member. The annular fitting member includes a cylindrical portion axially extending from an incline portion. A seal is arranged inboard of the sensor and fit between the inner circumference of the cylindrical portion of the annular fitting member and the outer circumference of the inner ring. The wheel speed sensor is embedded in the holding portion. At least a surface of the annular fitting member contacting the holding portion is roughened by shot blasting to have a surface roughness Ra of 0.8 or more. |
| US08054062B2 |
Method and apparatus for amplified variable reluctance speed sensor
A method and system for measuring a characteristic of a machine is provided. The system includes a speed sensor including a housing, a variable reluctance sensor (VRS) mounted at least partially within the housing, and a digitization circuit electrically coupled to an output of the VRS. The digitization circuit is also mounted within the housing and is configured to convert a substantially sinusoidal output of the VRS into a digital output signal. |
| US08054058B2 |
DC-DC converter with improved dynamic response
The invention relates to a control method and a controller for a DC-DC converter, such as a synchronous Buck converter, which exploits the principle of capacitor charge balance to allow the converter to recover from a positive and/or negative load current step in the shortest achievable time, with the lowest possible voltage undershoot/overshoot. The control method may be implemented by either an analog or a digital circuit. The controller may be integrated with existing controller schemes (such as voltage-mode controllers) to provide superior dynamic performance during large-signal transient conditions while providing stable operation during steady state conditions. The invention also relates to a method and a modification of a DC-DC converter topology that comprises connecting a controlled current source between an input terminal and an output terminal of the DC-DC converter; detecting a load current step to a new load current; modifying a duty cycle of the DC-DC converter; and modifying current through a parallel output capacitor of the DC-DC converter by controlling current of the current source. The methods and circuits provided herein are applicable to Buck converters and Buck-derived converters such as forward, push-pull, half-bridge, and full-bridge converters. |
| US08054055B2 |
Fully integrated on-chip low dropout voltage regulator
A low dropout voltage regulator (LDO) includes a bias voltage generator, a differential error amplifier, an output driver, a controlled active load, a Double Ended Cascode Miller compensation block. The bias voltage generator produces a plurality of bias voltages. The differential error amplifier produces a differential output voltage based on the difference between a reference voltage and a function of the output voltage. The input terminal of the output driver is coupled to one output of the differential error amplifier. The substrate terminal of the output driver is capacitively coupled to the output node and resistively coupled to the input supply node. The controlled active load is coupled to the output of the output driver, and its control terminal is coupled to a function of the second output of the differential error amplifier. The inputs of the Double Ended Cascode Miller compensation block are capacitively coupled to the output node and its output is coupled to the input terminal of the output driver. |
| US08054049B1 |
Using battery orientation to control mode of operation
Electrical contacts in the battery compartment of a device will permit a battery to be inserted with the “+” pole of the battery against either one of the two contacts, with the “−” pole of the battery positioned against the other contact. A polarity-sensing circuit detects the battery's orientation. If a first orientation is detected, i.e., the “+” pole of the battery is touching Contact “A” and the “−” pole of the battery is touching Contact “B”, the polarity-sensing circuit mode-of-operation 1 will be selected. If the second orientation is detected, i.e., the “+” pole of the battery is touching Contact “B” and the “−” pole of the battery is touching Contact “A”, mode-of-operation 2 will be selected. A bridge rectifier, downstream from the polarity sensor, can ensure that the other circuits in the device receive power that is polarized correctly regardless of battery orientation. |
| US08054048B2 |
Power grid load management for plug-in vehicles
Methods and systems are provided for controlling the charging of an onboard energy storage system of a plug-in vehicle using a remote command center, such as a vehicle telematics service. An embodiment of such a method involves the transmission of a charge request for the onboard energy storage system to a remote command center associated with the plug-in vehicle. In response to the charge request, a charge command is received from the remote command center. The charging of the onboard energy storage system is regulated in accordance with the received charge command, which may be a charge enable command or a charge disable command. |
| US08054039B2 |
System and method for charging a plug-in electric vehicle
A battery charging system and method for charging a plug-in electric vehicle with power from an external power source, such as a standard 110 volt or 220 volt AC wall outlet. The method senses various internal and external conditions and uses this information to charge the plug-in electric vehicle in an optimum fashion that reduces charging time yet avoids damage to components of the charging system. In one embodiment, the battery charging system includes an external power source, a battery charger with sensors for monitoring the external power source and the charger, a battery unit with sensors for monitoring the battery, a battery charging control module for processing the information, and a user interface that allows user-specified custom charging constraints. All of these components, with the exception of external power source, may be located on the vehicle. |
| US08054037B2 |
Electronic device
An electric power charge and discharge system for an electronic device having a battery, by which the electronic device can be used for a long period of time. In a wireless communication device including a wireless driving portion including a first battery and a wireless charging portion including a second battery, the first battery is charged by electric power from a fixed power supply and the second battery is charged by using electromagnetic waves existing in an external space. Further, the first battery and the second battery are discharged alternately, and during a period in which the first battery is discharged, the second battery is charged. |
| US08054033B2 |
Brushless, three phase motor drive
A control method for a sensor-less, brushless, three-phase DC motor. A pulse-width modulation (PWM) duty cycle may be calculated. A voltage induced by rotation of a rotor may be sampled at a first expected zero crossing value to produce a first sampled voltage value. An average of a plurality of sampled voltage values, including voltage values sampled at a plurality of prior expected zero crossing values and the first sampled voltage value, may be calculated. The first sampled voltage value may be subtracted from the calculated average to produce a delta zero crossing error. The delta zero crossing error may be multiplied by a first constant representing electromechanical properties of the motor to produce a representation of an angular velocity. One or more time values may be generated based on the representation of the angular velocity. Operation of the motor may be controlled based on the one or more time values and the PWM duty cycle. |
| US08054029B2 |
Calibration method for servo
A calibration method for servo is provided, wherein a motor of the servo is activated at a low-speed mode to drive a moved member of the servo moving to a first limit position and a second limit positions. During the movement of the moved member, a motor control power of the motor is monitored continuously to determine whether the motor control power exceeds a threshold value. When the moved member reaches the first or the second limit position, the motor control power is raised to exceed the threshold value and a motor coordinate value corresponding to the first or second limit position is determined simultaneously. Finally, a conservation relation for determining the actual coordinate by the motor value can be derived according to the values of actual coordinate of the first and second limit positions, and the values of the corresponding motor coordinate. |
| US08054026B2 |
Short circuit phase identification method
A vehicle drive apparatus includes a battery that is a direct current power source, a converter that increases the voltage of the battery, an inverter connected to a motor that drives the vehicle, an inverter connected to a motor generator that functions as a motor or generator, and a motor control device that controls the motor. The vehicle drive device is also provided with a voltmeter, non-energized state determination devices that determine a non-energized state of the inverters, and ammeters that detect currents applied to a motor from each phase arm of the inverters. Signals of these devices and a signal from the non-energized state determination device are sent to the motor control device. |
| US08054021B2 |
Programmable motor drive
A system comprises host logic and a programmable motor drive coupled to the host logic and configured to drive a motor. The programmable motor drive comprises a plurality of H-bridge circuits and the programmable motor drive is programmable to cause any two or more H-bridge circuits to be operated in parallel. |
| US08054016B2 |
Retarding energy calculator for an electric drive machine
A cooling system for a retarding system of an electric drive machine (100) includes a direct current (DC) link having first and second rails. A first resistor grid (214) is selectively placed in circuit between the rails by an automatic switch (216) in response to a switch (216) signal. A second resistor grid (218) is selectively placed in circuit between the rails by a chopper circuit (220) connected in series with the second resistor grid (218). The chopper modulates a current passing therethrough based on a duty cycle. A motor (336) is in parallel electrical connection across a portion of the first resistor grid (214) and operates in response to a motor (336) signal. An electronic controller (400) calculates a net energy during operation and adjusts the switch (216) signal, the duty cycle, and the motor (336) signal to close the automatic electrical switch (216) and operate the motor (336) when the net energy exceeds a threshold value. |
| US08054014B2 |
Control system for an electrical machine
In a control system and a method for operating a permanent-magnet electrical machine, when the electrical machine is switched off after one of a functional computer and a monitoring computer of the control system has identified a fault, in order to reduce the braking torque of the electrical machine, which is switched-off but still rotating an output stage of the control system is subjected to a three-phase short circuit if the rotation speed D1 does not fall below a definable limit value GR1 or if a voltage U_DC of the output stage (2) exceeds a limit value Umax, and when the rotation speed D1 is below the definable limit value GR1 and a voltage U_DC of the output stage does not exceed a limit value Umax, all the circuits breakers (2o1, 2o2, 2o3, 2u1, 2u2, 2u3) of the output stage (2) are opened in order to fully disconnect the electrical machine from the output stage. |
| US08054013B2 |
Electric power control device and vehicle with the same
Power lines are connected to neutral points of motor generators, respectively, and an electric power is transmitted and received between a vehicle and a load outside the vehicle via the power lines. In this transmission, an ECU simultaneously PWM-controls all phases of one of inverters, and controls the other inverter to keep continuously the conducting state. |
| US08054007B2 |
Bi-directional light emitting diode drive circuit in bi-directional power series resonance
The present invention uses the capacitive impedance component to constituted the first impedance and the inductive impedance component to constituted the second impedance, which is characterized as that the first and second impedances in series connection is configured to appear series resonance with the inputting bi-directional power to form a bi-directional divided power, thereby using the bi-directional divided power to drive the bi-directional conducting light emitting diode in parallel connection with the first impedance and second impedance. |
| US08054006B2 |
Power supply of luminous sources
A power supply of luminous sources is disclosed comprising a first circuit configured to generate a direct voltage signal from an alternating input voltage and a second circuit having in input the direct voltage signal and configured to generate an alternating voltage signal of rectangular wave shape and null average value. The power supply comprises: a third circuit configured to generate a current signal of triangular wave shape from the alternating voltage signal, a fourth circuit configured to extract from the current signal a voltage signal of triangular wave shape and non-null average value, a fifth circuit configured to control the frequency of the alternating voltage signal based on the average value of the voltage signal extracted by the fourth circuit, a sixth circuit configured to rectify said current signal and supply the luminous sources. |
| US08054001B2 |
Circuit structure for LCD backlight
A circuit structure for LCD backlight is disclosed in the present invention. The circuit structure includes an inverter topology, a current balance circuit, and a plurality of loads. The current balance circuit is coupled to the plurality of loads and capable of balancing current of N loads by using N/2−1 balance chokes. The circuit structure may further include a protection circuit which is coupled to the low voltage sides of the plurality of loads. The protection circuit is capable of sensing lamp voltages and providing a feedback signal to a controller. Furthermore, the protection circuit is composed of count-reduced and cost-competitive electronic elements. |
| US08053997B2 |
Load control device having a trigger circuit characterized by a variable voltage threshold
A two-wire load control device, such as a dimmer, is operable to control the amount of power delivered to an electrical load, such as a magnetic low-voltage (MLV) load, and comprises a bidirectional semiconductor switch, a timing circuit, a trigger circuit having a variable voltage threshold, and a clamp circuit. When a timing voltage signal of the timing circuit exceeds an initial magnitude of the variable voltage threshold, the trigger circuit is operable to render the semiconductor switch conductive, reduce the timing voltage signal to a predetermined magnitude less than the initial magnitude, and to increase the variable voltage threshold to a second magnitude greater than the first magnitude. The clamp circuit limits the magnitude of the timing voltage signal to a clamp magnitude between the initial magnitude and the second magnitude, thereby preventing the timing voltage signal from exceeding the second magnitude. Accordingly, multiple attempted firings of the semiconductor switch are avoided, and the MLV dimmer is prevented from conducting asymmetric current when an MLV transformer of the MLV load is unloaded. |
| US08053996B2 |
Light emitting device for transmission of communications information
A light emitting device 1 is adapted, with a distributed power supply voltage, to turn on a light emitter 7, while timing a continuous conduction time with a pulse generating circuit 2, a frequency dividing circuit 3, and a counting memory circuit 4, to flash the light emitter 7 on and off with an on-off pattern depending on a result of the timing, signaling out information on the continuous conduction time. |
| US08053992B2 |
Plasma reactor and plasma reaction apparatus
A plasma reactor includes a honeycomb electrode in which a plurality of cells that function as gas passages are partitioned by a partition wall, and a discharge electrode. The honeycomb electrode includes a first gas circulation section that allows a first gas to pass through, and a second gas circulation section that allows a second gas to pass through. The plasma reactor causes the first gas introduced into the first gas circulation section of the honeycomb electrode through the space between the electrodes to undergo a reaction while causing a plasma discharge between the honeycomb electrode and the discharge electrode, and allows the second gas to be introduced into the second gas circulation section of the honeycomb electrode to transfer heat of the second gas to the first gas circulation section to promote the reaction of the first gas. |
| US08053991B2 |
Impedance matching methods and systems performing the same
Provided are an impedance matching method and a matching system performing the same. The method includes: measuring an electrical characteristic of the power transmission line including the matching system and the load; extracting a control parameter for impedance matching from the electrical characteristic of the power transmission line; and controlling the matching system by using the control parameter. The extracting of the control parameter comprises utilizing an analytic coordinate system that quantitatively relates the electrical characteristic of the matching system to the electrical characteristic of the power transmission line. |
| US08053990B2 |
High intensity discharge lamp having composite leg
A system, in certain embodiments, includes a high intensity discharge lamp having a composite leg. The composite leg includes a plurality of leg sections coupled together in series. The plurality of leg sections includes different materials, coefficients of thermal expansion, Poisson's ratios, or elastic moduli, or a combination thereof. A method, in certain embodiments, includes enclosing a high intensity discharge within a ceramic arc envelope. The method also includes reducing thermal stresses associated with the high intensity discharge via a composite leg extending outwardly from the ceramic arc envelope. The composite leg includes a plurality of leg sections coupled together in series. The plurality of leg sections includes different materials, coefficients of thermal expansion, Poisson's ratios, or elastic moduli, or a combination thereof. |
| US08053981B2 |
Organic light-emitting device, and methods of forming the same and electronic devices having the same
An organic light-emitting device and methods of forming the same are provided. The organic light-emitting device includes: a substrate having a pixel area and a peripheral circuit area; a reflective layer on the substrate, the reflective layer having a first reflective part in the pixel area and a second reflective part in the peripheral circuit area; a first electrode layer having a first part on the first reflective part; a pixel definition layer on the substrate, the pixel definition layer forming a plurality of pixel openings to expose a portion of the first part of the first electrode layer and at least one electrode contact hole to expose the second reflective part; an organic light-emitting layer on the first electrode layer; and a second electrode layer on the organic light-emitting layer, the second electrode layer extending to the peripheral circuit area to electrically couple with the exposed area of the second reflective part. |
| US08053980B2 |
Light-emitting device and electronic device
The present invention provides a light-emitting device includes first, second and third light-emitting elements, emitting light having different color. The first light-emitting element includes a first anode; a first cathode; and first and second light-emitting layers therebetween, wherein the first light-emitting layer includes a first high light-emitting substance and a first organic compound, and the second light-emitting layer includes the first high light-emitting substance and a second organic compound. The second light-emitting element includes a second anode; a second cathode; and a third light-emitting layer and a layer for controlling carrier transfer therebetween, wherein the third light-emitting layer includes a second high light-emitting substance, wherein the layer for controlling carrier transfer includes third and fourth organic compounds. The third light-emitting element includes a third anode; a third cathode; and a fourth light-emitting layer, wherein the fourth light-emitting layer includes fifth and sixth organic compounds, and a third high light-emitting substance. |
| US08053978B2 |
Organic light emitting diode displays with transflective members
An organic light emitting device comprises: one or more first transflective members disposed on the substrate; one or more pixel electrodes disposed on the respective one or more first transflective members; one or more first organic light emitting members disposed on the respective one or more pixel electrodes; one or more second transflective members disposed on the respective one or more first organic light emitting members; one or more second organic light emitting members disposed on the respective second transflective members; and a common electrode disposed on the one or more second organic light emitting members. Other embodiments are also provided. |
| US08053970B2 |
Light emitting device and illumination device
An LED with a semiconductor light emitting element that emits a blue or a blue-violet light, and a fluorescent material that absorbs some or all of the light emitted from the element and emits a fluorescent light of a wavelength different from the absorbed light. The fluorescent material is a mixed fluorescent material obtained by mixing a first fluorescent material that emits a blue-green or a green light, a second fluorescent material that has a peak emission wavelength longer than that of the first fluorescent material and emits a green or a yellow-green light, a third fluorescent material that has a 1 peak emission wavelength longer than that of the second fluorescent material and emits a yellow-green, a yellow or a yellow-red light, and a fourth fluorescent material that has a peak emission wavelength longer than that of the third fluorescent material and emits a yellow-red or a red light. |
| US08053969B2 |
LED package structure for increasing light-emitting efficiency
An LED package structure for increasing light-emitting efficiency includes a heat-dissipating unit, an insulating unit, a light-emitting unit and a conductive unit. The heat-dissipating unit has a heat-dissipating substrate. The insulating unit has an insulating layer formed on the heat-dissipating substrate and at least one receiving groove passing through the insulating layer and formed above the heat-dissipating substrate. The insulating layer has a top surface on a top side thereof and an inner surface, and the inner surface of the insulating layer is an annular inclined surface in the receiving groove. The light-emitting unit has at least one light-emitting element received in the receiving groove and disposed on the heat-dissipating substrate. The conductive unit has at least two conductive structures disposed on the insulating layer and separated from each other, and the light-emitting element has two electrodes respectively electrically connected to the two conductive structures via two conductive wires. |
| US08053967B2 |
Electron emission device and display device using the same
An electron emission device includes a cathode electrode and a gate electrode, the gate electrode is separated and insulated from the cathode electrode, the gate electrode is a carbon nanotube layer, and the carbon nanotube layer includes a plurality of carbon nanotube wire-like structures. A display device that includes the electron emission device is also disclosed. |
| US08053965B2 |
Combination igniter and sensor for an internal combustion engine
An igniter for an internal combustion engine, the igniter comprising: a center electrode; an insulator disposed about the center electrode; a ground shield disposed about the insulator, the insulator having a tip portion extending past an end portion of the ground shield and a tip portion of the center electrode extending through and away from the tip portion of the insulator; and a spark gap disposed between the tip portion of the center electrode and the end portion of the ground shield. |
| US08053964B2 |
Spark plug with increased pressure resistance
The invention relates to a spark plug for igniting a combustible gas mixture in an internal combustion engine, comprising an ignition electrode (4), an electrical supply line (5), to which the ignition electrode (4) is connected, an insulator body (6), through which the supply line (5) is passed, a housing head (2), which rests in sealing fashion on the insulator body (6) and bears an outer thread (3) for the purpose of screwing it into an internal combustion engine, a tube housing (9), which is fixed on the housing head (2), surrounds the insulator body (6) and has a hexagon head (13). The invention provides that the tube housing (9) surrounds an insulator body holder (7), which is welded to the housing head (2) and presses the insulator body (6) with a prestress against the housing head (2). |
| US08053958B2 |
Piezoelectric resonator element, piezoelectric resonator, and acceleration sensor
A piezoelectric resonator element includes: a resonating arm extending in a first direction and cantilever-supported; a base portion cantilever-supporting the resonating arm; and an excitation electrode allowing the resonating arm to perform flexural vibration in a second direction that is orthogonal to the first direction. In the piezoelectric resonator element, the resonating arm includes an adjusting part adjusting rigidity with respect to a bend in a third direction that is orthogonal to the first and second directions. |
| US08053956B2 |
Piezoelectric actuators
Microelectromechanical systems with structures having piezoelectric actuators are described. The structures each have a body that supports piezoelectric islands. The piezoelectric islands have a first surface and a second opposite surface. The piezoelectric islands can be formed, in part, by forming cuts into a thick layer of piezoelectric material, attaching the cut piezoelectric layer to a body having etched features and grinding the piezoelectric layer to a thickness that is less than the depths of the cuts. Conductive material can be formed on the piezoelectric layer to form electrodes. |
| US08053954B2 |
Piezoelectric speaker
A piezoelectric speaker includes a cabinet, piezoelectric vibrators horizontally mounted inside the cabinet at different elevations each having two eyed lugs respectively coupled to respective posts in the cabinet, a shock absorber coupled to the piezoelectric material of the piezoelectric vibrators, two conducting terminals accommodated inside the cabinet and clamped on the piezoelectric vibrators, and two clamps fastened to the conducting terminals to secure a respective signal line. |
| US08053953B2 |
Electronic component for surface mounting
An electronic component, which is surface-mounted on a wiring board by soldering, and in which the occurrence of cracks in the solder after surface-mounting is suppressed, may include: a member constituting at least part of a container and made of ceramic; and an external terminal provided on the outer surface of the member and used in surface-mounting the electronic component on the wiring board by solder. The film thickness of a layer constituting the external terminal is designed so that when the thermal expansion coefficient of the ceramic constituting the member is α1, combined expansion coefficient αk of the member and the external terminal satisfies a relation of 1.029≦αk/α1≦1.216. The external terminal preferably comprises a nickel layer as an electrode body. |
| US08053951B2 |
Thin film piezoelectric actuators
A MEMS device with a thin piezoelectric actuator is described. A substrate with a first surface has a crystalline orientation prompting layer on the first surface. A piezoelectric portion contacts the crystalline orientation prompting layer and has an orientation corresponding to the orientation of the crystalline orientation prompting layer. A dielectric material surrounds the piezoelectric portion. The dielectric material is formed of an inorganic material. |
| US08053949B2 |
Electronic control device for a piezo-ceramic bending transducer designed as a trimorph
An electronic control device for a piezo-ceramic bending transducer designed as a trimorph, wherein a first voltage divider consisting of two resistor branches and powered by a first voltage source (Ust1) is provided, whose first resistor branch connects the first piezo-ceramic plate of the trimorph to its spacer layer. In addition, a second voltage divider is provided that consists of two resistor branches and the first resistor branch thereof connects the second piezo-ceramic plate of the trimorph to its spacer layer. The second resistor branch of the first voltage divider also forms the second resistor branch of the second voltage divider. Thus, by means of one voltage source, the one piezo-ceramic plate has an applied tensile stress and the other piezo-ceramic plate has an applied compressive stress, so that the flexural motion is reinforced by the two piezo-ceramic plates and thus only a small voltage has to be applied. |
| US08053948B2 |
Electrostatic induction conversion device
There is provided an electrostatic induction conversion device which is small, has high conversion efficiency between electric energy and kinetic energy, and can prevent degradation of an electret. The electret is formed by injecting an electric charge into the vicinity of the surface of an insulating material, is disposed between two conductors, and is constructed so that it moves relatively to at least one of the conductors opposite to the electret and converts between electric energy and kinetic energy. As the insulating material forming the electret, it is preferable to use a polymer having a fluorine-containing aliphatic cyclic structure. |
| US08053946B2 |
Coreless and brushless direct-current motor, Gifford McMahon (GM) cryogenic cooler, pulse tube cryogenic cooler, cryopump, magnetic resonance imaging (MRI) apparatus, superconducting magnet (SCM) apparatus, nuclear magnetic resonance (NMR) apparatus, and cryogenic cooler for cooling semiconductor
A coreless and brushless direct-current motor includes an armature coil wound without core and formed in the shape of a saddle; an outside rotor magnet formed by a permanent magnet, the outside rotor magnet being provided at an outside of the armature coil in the shape of a cylinder so as to face the armature coil, the outside rotor magnet being rotated by the magnetic field; an inside rotor magnet formed by a permanent magnet, the inside rotor magnet being provided in the shape of a cylinder at an inside of the armature coil so that the inside rotor magnet has a pole opposite to the outside rotor magnet and a rotational shaft is independently provided; an output shaft connected to the inside rotor magnet; and a sealing part of a barrier structure which sealing part partitions the armature coil and the outside rotor magnet to an outside of the inside rotor magnet and seals the armature coil and the outside rotor magnet. |
| US08053944B2 |
Transverse and/or commutated flux systems configured to provide reduced flux leakage, hysteresis loss reduction, and phase matching
Electrical machines, for example transverse flux machines and/or commutated flux machines, may be configured to achieve increased efficiency, increased output torque, and/or reduced operating losses via use of extended magnets, overhung rotors, and/or stator tooth overlap. Extended magnets may reduce flux leakage between adjacent flux concentrators. Overhung rotors may reduce flux leakage, and may also facilitate voltage balancing in polyphase devices. Stator tooth overlap may reduce hysteresis losses, for example losses in flux concentrating portions of an electrical machine. |
| US08053943B2 |
Linear material and stator structure
A stator structure includes: a stator core (104) having a large number of concave slots (105) and a large number of convex magnetic poles (106) circumferentially alternately arranged; and magnet wires (101) of rectangular cross section in each of which an insulating coating (103) is formed on the outer surface of a metal wire (102), wherein each of the slots (105) is formed so that the distance (W2) between both the side surfaces (109, 109) of the slot (105) gradually decreases from the bottom (107) to a distal opening (108) of the slot (105), each of the magnet wires (101) is wound around the associated magnetic pole (106) and inserted in tiers in the associated slot (105), and the magnet wire (101) is placed in the slot (105) so that the width (W1) thereof continuously or stepwise decreases from the bottom (107) to the distal opening (108) of the slot (105). |
| US08053938B2 |
Enhanced motor cooling system
A core assembly for an electric motor includes a heat exchanger comprising a plurality of fins. The fins define a plurality of cooling air passages that include offset fins that disrupt cooling air flow to reduce the formation of boundary layers and improve heat transfer capacity. |
| US08053932B2 |
Connection apparatus for parallel running generators
An apparatus for connecting two generators to run in parallel including a conductive path that connects the generators to an electrical load, a switching circuit that opens/closes the conductive path, a current sensor that detects current flowing the conductive path and an electronic control unit comprising a microcomputer. The control unit functions as a generator model identifier that inputs a signal indicating a model ID from each generator and determines whether the model ID corresponds to data stored in memory, and a switching circuit operator that operates the circuit to close the conductive path to connect the generators to the electrical load when the model ID corresponds to the data, while operates it to open the conductive path when the current is not detected by the current sensor after the conductive path was closed, thereby preventing the outputs of other generators from appearing at the terminals of a disconnected plug and damage to the generators. |
| US08053928B2 |
Power conversion circuit for reducing power loss and electronic device having such power conversion circuit
A power conversion circuit includes a driving circuit, an activating circuit, a converter and an auxiliary power source. The activating circuit receives a first power signal. The converter is used for converting the first power signal into a second power signal. The auxiliary power source is electrically connected to the activating circuit and the driving circuit. The auxiliary power source is driven by the driving circuit to issue either a first control signal to the activating circuit if the load is connected with the power conversion circuit or a second control signal to the activating circuit if the load is disconnected from the power conversion circuit. In response to the first control signal, the first power signal is converted into the second power signal and the second power signal is transmitted to the load. In response to the second control signal, the converter is disenabled. |
| US08053927B2 |
Method and apparatus for providing uninterruptible power
Methods and apparatus for providing uninterruptible power are provided by aspects of the invention. One aspect is more particularly directed to an uninterruptible power supply for providing power to a load. The uninterruptible power supply includes an input to receive input power, an output to provide output power, a plurality of battery modules that provide backup power, a power circuit coupled to the input, coupled to the plurality of battery modules and coupled to the output to provide power derived from at least one of the input power and the backup power to the output, a controller, a return line coupled to the controller and coupled to each of the battery modules, and a first sense line coupled to the controller and coupled to the plurality of battery modules. The controller and each of the battery modules are configured and arranged such that at least one characteristic of the battery modules is determined by the controller based on signals detected by the controller on the first sense line. |
| US08053925B2 |
Modulation monitor and control
A system and method are provided for monitoring and controlling voltage modulation on a power grid, in order to maintain closed-loop control of the grid. The power grid has a plurality of connections including used and unused connections. A detector is configured to detect a modulation voltage on the power grid. A controller is configured to receive signals from the detector, and to control connections to the power grid. The controller disables power to unused connections in accordance with the modulation voltage exceeding a first threshold and disables power to used connections in accordance with the modulation voltage exceeding a second threshold; used connections are disabled one at a time at a first time interval each for a period given by a second time interval. The controller also restores power to the connections in accordance with the detected modulation voltage being less than a third threshold. |
| US08053924B2 |
Structure of serial synchronous chopper
An improved structure of serial synchronous chopper mainly includes an external synchronous rectifier power supply unit, an internal synchronous rectifier power supply unit, a synchronous voltage-stabilized control unit, an integrated driving circuit unit, a synchronous load feedback control unit, and a synchronous integrated chopping unit. While operating, the structure is serially connected to a live wire of a power supply to periodically perform synchronous chopping so as to provide a synchronous DC voltage-stabilized output as a fundamental power supply in connection with an external circuit. The structure entirely adopts a linear synchronous integral based design to greatly enhance the chopping efficiency and provide a more stable phase current reference point so that the overload protection response in a high-load operating environment is fast and secure, the loop interference and the power consumption of the chopping element can be simultaneously alleviated, the operating voltage is comparatively stable and the faulty rate is lower. |
| US08053923B2 |
Light-emitting diode lighting apparatus and vehicle light lighting apparatus using the same
A light emitting diode apparatus that includes a single DC/DC converter section that has two circuits connected in parallel: a flyback type boosting circuit and a boosting circuit. The former includes a transformer and a switching device and the like to boost DC voltage of a DC power supply, and the latter includes a transformer and a switching device and the like to do likewise. A control section carries out switching control of the switching devices and in such a manner that shifts from each other the phases of current Ida and current Idb to be supplied from the two boosting circuits and to a plurality of LED and the like connected in series in a light emitting section. |
| US08053922B2 |
Closing system for motor vehicles
The invention relates to a closing system for motor vehicles involving access authorization and driving authorization by means of a control unit provided with means of communication. Said communication means comprise a stationary transmitter-receiver unit in the vehicle and a mobile transmitter-receiver unit in a wireless hand telephone (10). The control unit monitors the data transferred during said communication for access or driving authorization and activates or deactivates the corresponding systems if authorization is valid. The hand telephone (10) contains an SIM card (15) for telephonic network operation. In order to use the closing system in a quick and comfortable manner, the SIM card (15) is also a carrier for the access and driving authorization data. (16). A bi-directional local communication hands-free system operating in the GHz range is also used in the motor vehicle. Said telephonic local communication is also used for transmitting access and/or driving authorization data (16). |
| US08053918B2 |
Wind turbine comprising a generator cooling system
A wind power installation is provided having a pylon, a pod mounted rotatably on the pylon, a generator arranged within the pod and having a rotor and a stator, and at least one fan in the region of the pod. In order to reduce the entry of moisture, sand and other foreign substances into the pod and also to reduce the fan noise which reaches the exterior, the fan may suck in outside air through a downwardly open first air gap, in particular between the pylon and the pod. The fan may be adapted to blow air out of a rear part of the pod, through an air gap between the stator and the rotor and into a front part of the pod. A seal structure may be positioned in the pod in such a way that an air flow that bypasses the air gap between the stator and the rotor is substantially prevented. |
| US08053914B1 |
Method and apparatus for energy harvesting using microfluidics
An apparatus comprising a mechanical-to-electrical energy converting device having a plurality of electrodes and a fluidic body which comprises spatially separated conductive and dielectric liquid regions. Said fluidic body is configured to reversibly move as a whole with respect to said plurality of electrodes under the influence of a mechanical force. Each cycle of said reversible motion of said fluidic body causes multiple alternations of the amount of electrical charge accumulated by the electrodes, whereby generating electrical current flow between said electrodes. |
| US08053910B2 |
Substrate including alignment columnar member and plural protection columnar members, and method of making the same
To provide a semiconductor substrate whose columnar member for alignment is difficult to fall off and a manufacturing method thereof. An alignment mark 24 (columnar member for alignment) and protection posts 26 surrounding the alignment mark 24 to protect the alignment mark are disposed in an alignment mark forming region 14 of a semiconductor wafer 101 (semiconductor substrate). Each of the protection posts has a diameter (maximum diameter) of, for example, 0.6 μm. The protection posts 26 are arranged such that the diameter of each of the columnar protection posts 26 is greater than a diameter (for example, 0.2 μm) of the alignment mark 24. That is, the protection posts 26 are arranged such that the contact area between each of the protection posts 26 and an underlayer thereof (dummy wire layer 22) is greater than the contact area between the alignment mark 24 and an underlayer thereof (dummy wire layer 22). |
| US08053908B2 |
Semiconductor device
A novel structure capable of reducing the stress in the insulating layer in the semiconductor element and thereby securing reliability is provided. When the semiconductor element and the substrate are connected with a solder, the stress generated in the insulating layer is reduced by placing a spherical core made of a material having a greater rigidity inside the solder and satisfying the following inequalities: 1 GPa<(Young's modulus of a encapsulation resin)<30 GPa, 20 ppm/k<(linear coefficient of expansion of the encapsulation resin)<200 ppm/k, and 10 MPa<(yield stress of the solder at room temperature)<30 MPa. At the time of connection, the thickness of the solder to be placed between the land on the surface of the semiconductor element and the core is adjusted to 1/10 or less of the terminal pitch. |
| US08053907B2 |
Method and system for forming conductive bumping with copper interconnection
An integrated circuit system with one or more copper interconnects is provided. The one or more copper interconnects are in conductive contact with a substrate. The integrated circuit system includes a first dielectric layer, a copper material filling a first via through the first dielectric layer, a second dielectric layer in contact with the first dielectric layer, and a diffusion barrier layer. The diffusion barrier layer at least partially fills a second via through the second dielectric layer. At least a first part of the diffusion barrier layer is in direct contact with the copper material, and at least a second part of the diffusion barrier layer is in direct contact with the second dielectric layer. The integrated circuit system further includes a gold material at least partially filling the second via. The gold material is conductively connected with the copper material through the diffusion barrier layer and conductively connected with a substrate. Additionally, a method for making such an integrated circuit system with one or more copper interconnects is provided. |
| US08053906B2 |
Semiconductor package and method for processing and bonding a wire
A copper bonding wire includes a line portion and a non-spherical block portion. The non-spherical block portion is physically connected to the line portion, and the cross-sectional area of the non-spherical block portion is bigger than that of the line portion. |
| US08053900B2 |
Through-substrate vias (TSVs) electrically connected to a bond pad design with reduced dishing effect
An integrated circuit structure includes a semiconductor chip, which further includes a first surface; and a patterned bond pad exposed through the first surface. The patterned bond pad includes a plurality of portions electrically connected to each other, and at least one opening therein. The integrated circuit further includes a dielectric material filled into at least a portion of the at least one opening. |
| US08053899B2 |
Semiconductor devices including damascene trenches with conductive structures
A method and apparatus for providing a conductive structure adjacent to a damascene conductive structure in a semiconductor device structure. The semiconductor device structure includes an insulation layer with at least one damascene conductive structure formed therein, wherein the at least one damascene conductive structure includes an insulative, protective layer disposed thereon. The insulative material of the protective layer is able to resist removal by at least some suitable etchants for the insulative material of the insulation layer adjacent to the at least one damascene conductive structure. A self-aligned opening is formed by removing a portion of an insulation layer adjacent the at least one damascene conductive structure. The self-aligned opening is then filled with a conductive material to thereby provide another conductive structure adjacent to the at least one damascene conductive structure. |
| US08053893B2 |
Semiconductor device and manufacturing method thereof
The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed. |
| US08053892B2 |
Low resistance and reliable copper interconnects by variable doping
A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity. |
| US08053890B2 |
Microchip assembly including an inductor and fabrication method
An assembly includes a substrate, a chip mounted on the substrate, a voltage controlled oscillator circuit including an inductor and further circuit elements. The inductor is mounted on or in the substrate, and the further circuit elements are mounted on or in the chip. An assembly is disclosed that includes a substrate including a first metallization plane and a second metallization plane, a chip mounted on the substrate, and an inductor mounted on or in the substrate. The inductor includes a first inductor portion in the first metallization plane and a second inductor portion in the second metallization plane. An assembly is also disclosed including a substrate, a chip mounted onto the substrate, and a transformer formed at least in part on or in the substrate. |
| US08053886B2 |
Semiconductor package and manufacturing method thereof
A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. At least one penetration hole extends from one surface of the semiconductor chip to an opposite surface of the semiconductor chip. A penetration electrode is situated inside the penetration hole without contacting a wall of the penetration hole. The penetration electrode has one end fixed to the one surface of the semiconductor chip and an opposite end protruding from the opposite surface of the semiconductor chip. A connection terminal is formed on the opposite end of the penetration electrode and electrically connected to the wiring board. |
| US08053885B2 |
Wafer level vertical diode package structure and method for making the same
A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer. |
| US08053883B2 |
Isolated stacked die semiconductor packages
Semiconductor packages that contain isolated, stacked dies and methods for making such devices are described. The semiconductor package contains both a first die with a first integrated circuit and a second die with a second integrated circuit that is stacked onto the first die while also being isolated from the first die. The first and second dies are connected using an array of metal connectors containing both a base segment and a beam segment extending over the first die and supporting the second die. This configuration can provide a thinner semiconductor package since wire-bonding is not used. As well, since the integrated circuit devices in the first and second dies are isolated from each other, local heating and/or hot spots are diminished or prevented in the semiconductor package. Other embodiments are also described. |
| US08053882B2 |
Stacked semiconductor devices and signal distribution methods thereof
A stacked semiconductor device includes a plurality of stacked chips, each having a plurality of elements to receive a signal. At least one first ladder main signal line for receiving the signal is arranged to pass through the chips. At least one second ladder main signal line is arranged to pass through the chips. A plurality of ladder buffers buffer the signal applied from the first ladder main signal line to the second ladder main signal line. The signal is uniformly distributed to the stacked chips using a ladder type circuit network technique. |
| US08053880B2 |
Stacked, interconnected semiconductor package
An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages. |
| US08053872B1 |
Integrated shield for a no-lead semiconductor device package
The present invention integrates a shield on a flat, no-lead (FN) semiconductor package, which has multiple rows of contact pads along any side. The FN semiconductor package will have at least one inner row and one outer row of contact pads on at least one side. The inner and outer rows of contact pads and a die attach pad form the foundation for the FN semiconductor package. A die is mounted on the die attach pad and connected by wirebonds to certain contact pads of the inner rows of contact pads. An overmold body is formed over the die, die attach pad, wirebonds, and inner row of contact pads, and substantially encompasses each contact pad of the outer row of contact pads. A conformal coating is applied over the overmold body, including the exposed surfaces of the contact pads of the outer row of contact pads, providing a shield. |
| US08053869B2 |
Package having exposed integrated circuit device
A package (10) includes an integrated circuit device (12) having an electrically active surface (16) and an opposing backside surface (14). A dielectric molding resin (26) at least partially encapsulates the integrated circuit die and the plurality of electrically conductive leads (20) with the backside surface (14) and the plurality of electrical contacts (24) being exposed on opposing sides of the package (10). Features (30) are formed into electrically inactive portions of the integrated circuit die (12) to seal moisture paths and relieve packaging stress. The features (30) are formed by forming a trough (54) partially through the backside (56) of the wafer (40) in alignment with a saw street (48), the trough (54) having a first width; and forming a channel (62) extending from the trough (54) to the electrically active face (42) to thereby singulate the integrated circuit device member, the channel (62) having a second width that is less than the first width. |
| US08053858B2 |
Integrated latch-up free insulated gate bipolar transistor
A lateral Insulated Gate Bipolar Transistor (LIGBT) includes a semiconductor substrate and an anode region in the semiconductor substrate. A cathode region of a first conductivity type in the substrate is laterally spaced from the anode region, and a cathode region of a second conductivity type in the substrate is located proximate to and on a side of the cathode region of the first conductivity type opposite from the anode region. A drift region in the semiconductor substrate extends between the anode region and the cathode region of the first conductivity type. An insulated gate is operatively coupled to the cathode region of the first conductivity type and is located on a side of the cathode region of the first conductivity type opposite from the anode region. An insulating spacer overlies the cathode region of the second conductivity type. The lateral dimensions of the insulating spacer and the cathode region of the second conductivity type are substantially equal and substantially smaller than the lateral dimension of the cathode region of the first conductivity type. |
| US08053857B2 |
Packaged microelectronic imagers and methods of packaging microelectronic imagers
Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad. |
| US08053851B2 |
Spin transistor using epitaxial ferromagnet-semiconductor junction
A spin transistor conducive to the miniaturization and large scale integration of devices, because a magnetization direction of a source and a drain is determined by a direction of the epitaxial growth of a ferromagnet. The spin transistor includes a semiconductor substrate having a channel layer formed thereinside; ferromagnetic source and drain epitaxially grown on the semiconductor substrate and magnetized in a longitudinal direction of the channel layer due to magnetocrystalline anisotropy—the source and drain being disposed spaced apart from each other in a channel direction and magnetized in the same direction—; and a gate disposed between the source and the drain to be insulated with the semiconductor substrate and formed on the semiconductor substrate to control the spin of electrons that are passed through the channel layer. |
| US08053847B2 |
Method for fabricating metal-oxide semiconductor transistors
A method for fabricating a metal-oxide semiconductor transistor is disclosed. First, a semiconductor substrate having a gate structure thereon is provided, and a spacer is formed around the gate structure. An ion implantation process is performed to implant a molecular cluster containing carbon, boron, and hydrogen into the semiconductor substrate at two sides of the spacer for forming a doped region. The molecular weight of the molecular cluster is preferably greater than 100. Thereafter, a millisecond annealing process is performed to activate the molecular cluster within the doped region. |
| US08053846B2 |
Field effect transistor (FET) having nano tube and method of manufacturing the FET
A transistor includes: a semiconductor substrate; a channel region arranged on the semiconductor substrate; a source and a drain respectively arranged on either side of the channel region; and a conductive nano tube gate arranged on the semiconductor substrate to transverse the channel region between the source and the drain. Its method of manufacture includes: arranging a conductive nano tube on a surface of a semiconductor substrate; defining source and drain regions having predetermined sizes and traversing the nano tube; forming a metal layer on the source and drain regions; removing a portion of the metal layer formed on the nano tube to respectively form source and drain electrodes separated from the metal layer on either side of the nano tube; and doping a channel region below the nano tube arranged between the source and drain electrodes by ion-implanting. |
| US08053843B2 |
Integrated electrostatic discharge (ESD) device
A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well region is characterized by a first depth. The device includes an MOS transistor, a first bipolar transistor, and a second bipolar transistor. The MOS transistor includes a first lightly doped drain (LDD) region of a second depth within the well region, and a drain region and an emitter region within in the first LDD region. The emitter region is characterized by a second conductivity type. The first bipolar transistor is associated with the emitter region, the first LDD region, and the well region, and is characterized by a first trigger voltage. The second bipolar transistor is associated with the first LDD region, the well region, and the substrate, and is characterized by a second trigger voltage. |
| US08053842B2 |
Semiconductor storage device
It is intended to achieve a sufficiently-small SRAM cell area and a stable operation margin in a Loadless 4T-SRAM comprising a vertical transistor SGT. In a static type memory cell made up using four MOS transistors, each of the MOS transistor constituting the memory cell is formed on a planar silicon layer formed on a buried oxide film, to have a structure where a drain, a gate and a source are arranged in a vertical direction, wherein the gate is formed to surround a pillar-shaped semiconductor layer. The planar silicon layer comprises a first active region having a first conductive type, and a second active region having a second conductive type. The first and second active regions are connected to each other through a silicide layer formed in a surface of the planar silicon layer to achieve an SRAM cell having a sufficiently-small area. |
| US08053834B2 |
Inverted-trench grounded-source FET structure using conductive substrates, with highly doped substrates
This invention discloses an inverted field-effect-transistor (iT-FET) semiconductor device that includes a source disposed on a bottom and a drain disposed on a top of a semiconductor substrate. The semiconductor power device further comprises a trench-sidewall gate placed on sidewalls at a lower portion of a vertical trench surrounded by a body region encompassing a source region with a low resistivity body-source structure connected to a bottom source electrode and a drain link region disposed on top of said body regions thus constituting a drift region. The drift region is operated with a floating potential said iT-FET device achieving a self-termination. |
| US08053832B2 |
Capacitor-less DRAM device
Provided is a capacitor-less DRAM device including: an insulating layer formed on a semiconductor substrate; a silicon layer formed on the insulating layer, wherein a trench is formed inside the silicon layer; and an offset spacer formed on both sidewalls of the trench and protruded upward through the silicon layer. A gate insulating layer is formed on a bottom of the trench, and a gate electrode is formed to be buried in the gate insulating layer and in the trench and the offset spacer. A source region and a drain region are formed in the silicon layer on both sides of the offset spacer so as not to overlap with the gate electrode. A channel region is formed in the silicon layer below the gate insulating layer to be self-aligned with the gate electrode. |
| US08053830B2 |
Semiconductor device
A semiconductor device including a semiconductor section including a semiconductor element and a recess formed in one of main surfaces and a metallic member at least a part of which is embedded in the recess. A void is formed in a region of the metallic member corresponding to the recess. |
| US08053828B2 |
Nonvolatile semiconductor memory device and manufacturing method thereof
First and second memory cells have first and second channels, first and second tunnel insulating films, first and second charge storage layers formed of an insulating film, first and second block insulating films, and first and second gate electrodes. A first select transistor has a third channel, a first gate insulating film, and a first gate electrode. The first channel includes a first-conductivity-type region and a second-conductivity-type region which is formed on at least a part of the first-conductivity-type region and whose conductivity type is opposite to the first conductivity type. The third channel includes the first-conductivity-type region and the second-conductivity-type region formed on the first-conductivity-type region. The number of data stored in the first memory cell is smaller than that of data stored in the second memory cell. |
| US08053827B2 |
Semiconductor device and method for manufacturing the same
It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto. |
| US08053825B2 |
Stacked gate nonvolatile semiconductor memory and method for manufacturing the same
A stacked gate nonvolatile semiconductor memory includes at least a memory cell transistor and a selective gate transistor which are formed on a semiconductor substrate. The memory cell transistor includes a floating gate made of a semiconductor material below an interlayer insulating layer and a control gate made of a silicide above the interlayer insulating layer. The selective gate transistor includes a semiconductor layer made of the semiconductor material, a silicide layer made of the silicide and a conductive layer made of a conductive material not subject to silicide process which is formed through the interlayer insulating film so as to electrically connect the semiconductor layer and the silicide layer. |
| US08053822B2 |
Capacitorless DRAM and methods of manufacturing and operating the same
Example embodiments provide a capacitorless dynamic random access memory (DRAM), and methods of manufacturing and operating the same. The capacitorless DRAM according to example embodiments may include a semiconductor layer separated from a top surface of a substrate and that contains a source region, a drain region, and a channel region, a charge reserving layer formed on the channel region, and a gate formed on the substrate to contact the channel region and the charge reserving layer. |
| US08053817B2 |
Vertical transistor and method for forming the same
A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls of the first junction regions; second junction regions formed on upper surfaces of the active patterns; and gates formed on sidewalls of the active patterns including the second junction regions to overlap with at least portions of the first junction regions. |
| US08053806B2 |
Group III nitride semiconductor device and epitaxial substrate
A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon. A GaN based semiconductor layer 23 of an oxygen concentration of 5×1016 cm−3 or more provides an active layer 17 with an excellent crystal quality, and the active layer 17 is grown on the primary surface of the GaN based semiconductor layer 23. |
| US08053805B2 |
Light emitting device, light emitting device and package, and lighting system
Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a light emitting structure layer comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and an electrode comprising a pad part and a finger part on the light emitting structure layer. The pad part comprises a pattern in which at least one opening is defined, and the finger part comprises a pattern electrically connected to the pad part and linearly extending from the pad part. |
| US08053800B2 |
Reflection-type photointerrupter
A reflection-type photointerrupter of the present invention includes a substrate, a light emitting element and a light receiving element. The substrate includes a first surface, a second surface opposite the first surface, and a first and a second recesses that are open in the first surface side. The light emitting element is arranged in the first recess, while the light receiving element is arranged in the second recess. The light emitting element is capable of emitting light. The light receiving element is capable of receiving the light emitted from the light emitting element and reflected by an object to be detected. |
| US08053794B2 |
Nitride semiconductor light emitting device and fabrication method thereof
A nitride semiconductor light-emitting device according to the present invention comprises a first nitride semiconductor layer; an active layer formed on the first nitride semiconductor layer; a second nitride semiconductor layer formed on the active layer; and a third nitride semiconductor layer having AlIn, which is formed on the second nitride semiconductor layer. And a nitride semiconductor light-emitting device comprises a first nitride semiconductor layer; an n-AlInN cladding layer formed on the first nitride semiconductor layer; an n-InGaN layer formed on the n-AlInN cladding layer; an active layer formed on the n-InGaN layer; a p-InGaN layer formed on the active layer; a p-AlInN cladding layer formed on the p-InGaN layer; and a second nitride semiconductor layer formed on the p-AlInN cladding layer. |
| US08053792B2 |
Semiconductor light emitting device and method for manufacturing the same
Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first semiconductor layer; a light emitting structure on one sided portion of the first semiconductor layer; a protection device structure on the other sided portion of the first semiconductor layer; and a first electrode layer on the protection device structure. |
| US08053791B2 |
Structure of AC light-emitting diode dies
A structure of light-emitting diode (LED) dies having an AC loop (a structure of AC LED dies), which is formed with at least one unit of AC LED micro-dies disposed on a chip. The unit of AC LED micro-dies comprises two LED micro-dies arranged in mutually reverse orientations and connected with each other in parallel, to which an AC power supply may be applied so that the LED unit may continuously emit light in response to a positive-half wave voltage and a negative-half wave voltage in the AC power supply. Since each AC LED micro-die is operated forwardly, the structure of AC LED dies also provides protection from electrical static charge (ESD) and may operate under a high voltage. |
| US08053789B2 |
Light emitting device and fabrication method thereof
There is provided a method of fabricating a vertical light emitting diode. The method comprises the steps of: growing a low doped first conductive semiconductor layer on a sacrificial substrate; forming an aluminum layer on the low doped first conductive semiconductor layer; forming an AAO layer having a large number of holes formed therein by performing anodizing treatment of the aluminum layer; etching and patterning the low doped first conductive semiconductor layer using the aluminum layer with a large number of the holes as a shadow mask to expose a portion of the low doped first conductive semiconductor layer, thereby forming a large number of grooves; removing the aluminum layer remaining on the low doped first conductive semiconductor layer; sequentially forming a high doped first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on the low doped first conductive semiconductor layer with a large number of the grooves; forming a metal reflective layer and a conductive substrate on the second conductive semiconductor layer; separating the sacrificial substrate; and forming an electrode pad on the other surface of the low doped first conductive semiconductor layer, the electrode pad being filled in a large number of the grooves to be in ohmic contact with the high doped first conductive semiconductor layer. |
| US08053788B2 |
Rod-shaped semiconductor device
A rod-shaped semiconductor device having a light-receiving or light-emitting function is equipped with a rod-shaped substrate made of p-type or n-type semiconductor crystal, a separate conductive layer which is formed on a part of the surface of the substrate excluding a band-shaped part parallel to the axis of the substrate and has a different conduction type from the conduction type of the substrate, a pn-junction formed with the substrate and separate conductive layer, a band-shaped first electrode which is formed on the surface of the band-shaped part on the substrate and ohmic-connected to the substrate, and a band-shaped second electrode which is formed on the opposite side of the first electrode across the shaft of said substrate and ohmic-connected to the separate conductive layer. |
| US08053786B2 |
Top-emitting light emitting diodes and methods of manufacturing thereof
Provided are a top-emitting nitride based light emitting device having an n-type clad layer, an active layer and a p-type clad layer sequentially stacked thereon, comprising an interface modification layer formed on the p-type clad layer and a transparent conductive thin film layer made up of a transparent conductive material formed on the interface modification layer; and a process for preparing the same. In accordance with the top-emitting nitride-based light emitting device of the present invention and a process for preparing the same, there are provided advantages such as improved ohmic contact with the p-type clad layer, leading to increased wire bonding efficiency and yield upon packaging the light emitting device, capability to improve luminous efficiency and life span of the device due to low specific contact resistance and excellent current-voltage properties. |
| US08053782B2 |
Single and few-layer graphene based photodetecting devices
A photodetector which uses single or multi-layer graphene as the photon detecting layer is disclosed. Multiple embodiments are disclosed with different configurations of electrodes. In addition, a photodetector array comprising multiple photodetecting elements is disclosed for applications such as imaging and monitoring. |
| US08053774B2 |
Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis
A wafer having a plurality of dies (also called array chips) on the wafer, the die having an electrode to generate a deprotecting reagent, a working electrode to electrochemically synthesize a material, a confinement electrode adjacent to the working electrode to confine reactive reagents, and a die pad, wherein die pads of the plurality of dies are interconnected on the wafer to electrochemically synthesize the material in parallel on a plurality of working electrodes is disclosed. Also, a method for wafer-scale manufacturing of a plurality of dies and a method for electrochemically synthesizing a material in parallel on a plurality of dies on a wafer are disclosed. |
| US08053773B2 |
Thin film transistor, flat panel display device having the same, and associated methods
A thin film transistor includes a gate electrode, a first insulating layer on the gate electrode, a semiconductor layer on the gate electrode and separated from the gate electrode by the first insulating layer, the semiconductor layer including a channel region corresponding to the gate electrode, a source region, and a drain region, a hydrogen diffusion barrier layer on the semiconductor layer, the hydrogen diffusion barrier layer covering the channel region and exposing the source and drain regions, and a second insulation layer on the source and drain regions and on the hydrogen diffusion barrier layer, such that the hydrogen diffusion barrier layer is between the second insulation layer and the channel region. |
| US08053772B2 |
Hydrazine-free solution deposition of chalcogenide films
A method of depositing a film of a metal chalcogenide including the steps of: contacting an isolated hydrazinium-based precursor of a metal chalcogenide and a solvent having therein a solubilizing additive to form a solution of a complex thereof; applying the solution of the complex onto a substrate to produce a coating of the solution on the substrate; removing the solvent from the coating to produce a film of the complex on the substrate; and thereafter annealing the film of the complex to produce a metal chalcogenide film on the substrate. Also provided is a process for preparing an isolated hydrazinium-based precursor of a metal chalcogenide as well as a thin-film field-effect transistor device using the metal chalcogenides as the channel layer. |
| US08053768B2 |
Silicon-containing compound and organic electroluminescent device employing the same
Provided are a silicon-containing compound having carbazole and fluorene in its molecule and an organic electroluminescent device including an organic layer employing the same. The silicon-containing compound is represented by the following formula: The silicon-containing compound has excellent electrical characteristics and a charge transporting capability, the silicon-containing compound can be used as a hole injecting material, a hole transporting material, and/or a light emitting material that are suitable for all-color fluorescent and phosphorescent organic light emitting devices such as red, green, blue, and white fluorescent and phosphorescent organic light emitting devices. When the silicon-containing compound is used to manufacture an organic electroluminescent device, the organic electroluminescent device has a high efficiency, a low driving voltage, high luminosity, and a long lifetime. |
| US08053767B2 |
Carbon nano tube thin film transistor and display adopting the same
Provided are a flexible and transparent carbon nano tube (CNT) thin film transistor using a degradable polymer substrate, and a display adapting the CNT thin film transistor. The polymer substrate is formed of a polymer material that is naturally degraded, and a CNT channel, where a semiconductive CNT is dispersed on a transparent organic material, is prepared on the polymer substrate. Source and drain electrodes, where a conductive CNT is ejected on a transparent organic material, are connected to both sides of the CNT channel. A gate, where a conductive CNT is dispersed on a transparent organic material, is disposed on or below the CNT channel, and a gate insulation layer including a transparent organic material is disposed between the CNT channel and the gate. |
| US08053764B2 |
Organic semiconductor copolymers containing oligothiophene and η-type heteroaromatic units
An exemplary organic semiconductor copolymer includes a polymeric repeat structure having a polythiophene structure and an electron accepting unit. The electron accepting unit has at least one electron-accepting heteroaromatic structure with at least one electron-withdrawing imine nitrogen in the heteroaromatic structure or a thiophene-arylene comprising a C2-30 heteroaromatic structure. Methods of synthesis and electronic devices incorporating the disclosed organic semiconductors, e.g., as a channel layer, are also disclosed. |
| US08053760B2 |
Thin film transistor
A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, and a gate electrode. The drain electrode is spaced from the source electrode. The semiconducting layer includes a carbon nanotube structure comprised of carbon nanotubes. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconducting layer by an insulating layer. The carbon nanotube structure is connected to both the source electrode and the drain electrode, and an angle exist between each carbon nanotube of the carbon nanotube structure and a surface of the semiconductor layer, and the angle ranges from about 0 degrees to about 15 degrees. |
| US08053759B2 |
Ion implantation for suppression of defects in annealed SiGe layers
A substrate material including a Si-containing substrate and an insulating region that is resistant to Ge diffusion present atop the Si-containing substrate. The substrate material further includes a substantially relaxed SiGe alloy layer present atop the insulating region, wherein the substantially relaxed SiGe alloy layer has a planar defect density from about 5000 defects/cm−2 or less. The substrate material may be employed in a heterostructure, in which a strained Si layer is present atop the substantially relaxed SiGe alloy layer of the substrate material. |
| US08053757B2 |
Gallium nitride light-emitting device with ultra-high reverse breakdown voltage
One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts. |
| US08053755B2 |
Semiconductor heterostructure
A strained semiconductor heterostructure (10) comprises an injection region comprising a first emitter layer (11) having p-type conductivity and a second emitter layer (12) having n-type conductivity, and a light generation layer (13) positioned between the first emitter layer (11) and the second emitter layer (12). An electron capture region (14) is positioned between the light generation layer (13) and the second emitter layer (12), said electron capture region comprising a capture layer (16) adjacent to the second emitter layer, and a confining layer (15) adjacent to said electron capture layer. According to the present invention, the widths and materials of the confining and capture layers (15, 16) are selected to provide energy difference between one of localized energy levels for electrons in the capture layer (16) and the conduction band bottom of the second emitter layer (12) equal to the energy of the optical phonon. |
| US08053751B2 |
Phase-change semiconductor device and methods of manufacturing the same
In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate. |
| US08053749B2 |
Mirrored-gate cell for non-volatile memory
A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate. |
| US08053746B2 |
Irradiation device
The present invention relates to an irradiation device for irradiating an irradiation object with heavy charged particles at an irradiation station, comprising a particle accelerator for providing a particle beam and a swivelling device for swivelling the particle beam impinging on the irradiation object, wherein the swivelling device comprises a carrier pivotable about an axis. In accordance with the invention, the irradiation device is characterized in that the particle accelerator is mounted on the pivotable carrier. |
| US08053745B2 |
Device and method for administering particle beam therapy
A device for circumscribing a target site with a beam. The target site is located within a target body. The path of the beam is varied rotationally so as to form a cone with an isocenter at the cone's apex. The isocenter is fixed on the approximate center of the target site. The target body is rotated about a vertical axis passing approximately through the center of the target site, and the rates of rotation of the beam path and body, respectively correspond so that the beam intersects an axis passing through the target site at an approximately constant angle. |
| US08053742B2 |
Substrates, systems and methods for analyzing materials
Substrates, systems and methods for analyzing materials that include waveguide arrays disposed upon or within the substrate such that evanescent fields emanating from the waveguides illuminate materials disposed upon or proximal to the surface of the substrate, permitting analysis of such materials. The substrates, systems and methods are used in a variety of analytical operations, including, inter alia, nucleic acid analysis, including hybridization and sequencing analyses, cellular analyses and other molecular analyses. |
| US08053741B2 |
Ion-generating device and electrical apparatus
An outer casing is partitioned, in a plan view, into a high-voltage transformer drive circuit block for disposing at least a high-voltage transformer drive circuit, a high-voltage transformer block for disposing at least a secondary side of a high-voltage transformer, and an ion-generating element block for disposing an ion-generating element. It is thereby possible to obtain an ion-generating device suitable for reduction in size and thickness, and an electrical apparatus mounted with the same. |
| US08053739B2 |
Particle beam generating system and method with measurement of the beam spot of the particle beam
A device to measure the beam spot of a particle beam, has a device that records the projections of the beam spot in many directions that are essentially perpendicular to the direction of the particle beam, and an analysis device that reconstructs a two-dimensional cross section profile of the particle beam from the recorded projections. |
| US08053734B2 |
Nano-antenna for wideband coherent conformal IR detector arrays
A conformal coherent wideband antenna coupled IR detector array included a plurality of unit cells each having a dimension that includes an antenna for focusing radiation onto an absorber element sized less than the dimension. In one embodiment, the absorber element may be formed of a mercury cadmium telluride alloy. According to a further embodiment, the antenna array may be fabricated using sub-wavelength fabrication processes. |
| US08053732B2 |
Terahertz wave TX/RX module package and method of manufacturing the same
Provided are a terahertz wave transmission and reception (Tx/Rx) module package and method of manufacturing the same. The complete and separate terahertz wave Tx/Rx module package is implemented by simply aligning a silicon ball lens, a photoconductive antenna and a focusing lens, and thus facilitates generation or measurement of a terahertz wave. The terahertz wave Tx/Rx module package and method can remarkably reduce time and cost required to build a terahertz wave generation and measurement system, and simplify and miniaturize the terahertz wave generation and measurement system. In addition, characteristics of a terahertz wave generated by the photoconductive antenna can be simply measured. Furthermore, the terahertz wave Tx/Rx module package can be stored and transported with a photoconductive antenna, a silicon ball lens and a focusing lens kept aligned as they are, and also it is possible to minimize pollution of terahertz wave devices caused by surroundings. |
| US08053731B2 |
Image forming apparatus and image forming method
Provided are an image forming apparatus and an image forming method which are capable of obtaining an image of a measured object using a relatively simple structure in a short time. In the image forming apparatus, an electromagnetic wave generated by an electromagnetic wave generator is emitted to the measured object through a spatial modulation unit for spatially modulating a signal intensity. An electromagnetic wave that has passed through the measured object is measured by an electromagnetic wave detecting unit. A measurement signal is processed by a signal processing section based on a reference signal synchronized with the signal intensity modulated by the spatial modulation unit. The image is formed by an image acquisition section. |
| US08053725B2 |
Beam quality in FIB systems
Applicants have found that the asymmetrical energy distribution of ions from an ion source allow chromatic aberration to be reduced by filtering ions in the low energy beam tail without significantly reducing processing time. A preferred embodiment includes within an ion beam column a filter that removes the low energy ions from the beam. |
| US08053722B1 |
Detector having tuned resistors
A method of forming a light sensor array includes tuning a resistance level of a plurality of resistors. The resistors are included in a light sensor array for use with a positron emissision tomography (PET) scanner system. The light sensor array includes detection circuits that each includes one of the resistors connected in series with an avalanche photodiode. |
| US08053720B2 |
Multi-frequency millimeter-wave VLBI receiving system and method of designing quasi optical circuit for the same
Provided are a multi-frequency millimeter-wave very long baseline interferometry (VLBI) receiving system and a method of designing a quasi optical circuit for the multi-frequency millimeter-wave VLBI receiving system. The multi-frequency millimeter-wave VLBI receiving system includes a plurality of low pass filters, offset ellipsoidal mirrors, and flat mirrors for dividing a cosmic radio wave signal incident through the troposphere. A beam propagated from a celestial point is introduced into a receiver room via a 45-degree flat mirror and is divided into a plurality of beams by using a plurality of low pass filters having different bandwidths and mirrors, and the divided beams are transmitted to corresponding quasi-optical receivers having different bandwidths via a plurality of mirrors. Therefore, radio astronomic observations can be simultaneously performed in 22 GHz, 43 GHz, 86 GHz, and 129 GHz bands, and phase variations of electromagnetic waves in the bands can be compensated for. |
| US08053719B2 |
Image sensor using photo-detecting molecule and method of operating the same
Provided is an image sensor using a photo-detecting molecule and a method of operating the image sensor. The image sensor may include a plurality of first electrodes disposed parallel to each other and a plurality of second electrodes disposed parallel to each other in a direction perpendicular to the first electrodes and above the first electrodes, and a plurality of subpixels formed in regions where the first electrodes cross the second electrodes. Each of the subpixels may comprise a photo-detecting molecule layer that may generate charges by absorbing light having a certain wavelength, a charge generation layer that may form a plurality of secondary electrons by receiving the charges from the photo-detecting molecule layer when a known voltage is applied between the first electrodes and the second electrodes, and a variable resistance layer, an electrical state of which is changed by receiving the secondary electrons generated from the charge generation layer. |
| US08053718B2 |
Method for driving a photoelectric conversion apparatus having a reset unit for controlling a connection between signal lines
A photoelectric conversion apparatus includes a first block line through which an optical signal is output and a second block line through which a noise signal superimposed on the optical signal is output. The photoelectric conversion apparatus also includes a switch used to control a connection between the first block line and the second block line. |
| US08053710B2 |
Method of making a heating element of the molybdenum silicide type and a heating element
A molybdenum silicide type-heating element and a method of manufacturing a heating element of the molybdenum silicide type. The heating element contains substantially Mo(Si1-x Alx)2 and Al2O3 and is prepared by mixing a molybdenum aluminum silicide-type material Mo(Si1-yAly)2 with SiO2, wherein the SiO2 has a purity of at least 98%. |
| US08053709B2 |
Heat and/or light producing unit powered by a lithium secondary cell battery with high charge and discharge rate capability
A portable heating or lighting unit may comprise a housing, a handle, a shield or grid, a source of electric energy, a rectifier, an electrical device adapted to use electrical energy from the source of electric energy, and a control system comprising control hardware and embedded software, where the control system may be adapted to automatically control the electric heating element. A source of electric energy may comprise a battery adapted to store energy and to output stored energy as electrical energy, a fuel cell, a thermoelectric component, or a plug adapted to draw electrical energy from a wall outlet or other source of electrical energy. A battery may be at least partially enclosed by the housing. A thermoelectric component may comprise a thermoelectric material or a thermoelectric generator. An electrical device may comprise a resistive heating element adapted to emit thermal energy. |
| US08053708B2 |
User-configurable interface for a cooking appliance
A cooking appliance includes a plurality of heating elements and a plurality of user interface devices for receiving heating element settings. An input device for allows a user to arbitrarily selectively associate any one or more of the heating elements with any one or more of the user interface devices. |
| US08053704B2 |
Scoring of non-flat materials
Disclosed are systems for scoring non-flat materials including non-flat glass sheets (1000). In one embodiment, a laser scoring system is described. The laser scoring system includes a laser (102) and an optical head (106). The optical head (106) is configured to receive output from the laser (102) and focus the output into an elongated laser beam having a beam waist and an extended focal depth of greater than +/−5 mm relative to the center of the beam waist with a power density sufficient for scoring a material having at least a portion within the extended focal depth. In one aspect the system can include a beam expander (104). The beam expander (104) receives the output from the laser (102), expands the output from the laser to an expanded laser beam, and transmits the expanded laser beam to the optical head (106). |
| US08053703B2 |
Laser cutting device
An exemplary laser cutting device (300) includes a laser source (40), a lens module (51), a sprayer (60), a first rotating subassembly (52), and a second rotating subassembly (53). The lens module is configured for focusing a laser beam emitting from the laser source. The first rotating subassembly is connected to the lens module and configured for driving the lens module to rotate relative to the laser source. The second rotating subassembly is rotatably connected to the lens module. The sprayer is connected to the second rotating subassembly and driven to rotate relative to the laser source by the second rotating subassembly. |
| US08053695B2 |
Time delay output apparatus for circuit breaker
A time delay output apparatus for a circuit breaker includes a switch disposed at one side of a main shaft rotatable in directions to open/close a fixed contactor and a movable contactor, and a delay member disposed between the main shaft and the switch so as to operate the switch with a preset time delay, thereby simplifying the construction and reducing the size as well as enhancing operational reliability by stably obtaining a time delay. |
| US08053692B2 |
Seating detection switch
A thin, film-form seating switch able to detect whether an occupant sits on the seat or not, wherein, with a spacer (5) in-between, a film-form substrate (3) is disposed on one surface of the spacer and a film-form member (7) on the other surface, a first conductor (13) equipped with a first terminal (9) and a first electrode (11A) conductive with this and a second conductor (19) equipped with a second terminal (15) and a second electrode (17A) conductive with this are fixed to one surface of the film-form substrate, and a third conductor (21A) for letting the first electrode conduct with the second electrode when an occupant is seated is fixed to the film-form member (7). The above arrangement solves a conventional problem that it is troublesome to connect the connection terminals of wires or the like provided on a wiring harness or the like to respective terminals that are separately provided on a film-form substrate and a film-form member. |
| US08053691B2 |
Park inhibition solenoid assembly
A Park inhibition solenoid assembly for preventing the undesirable shifting of a transmission from an out-of-Park mode to a Park mode includes a follower and an armature slidably disposed within a valve body/housing and within a solenoid. The follower is moveable between an out-of-Park position and a Park position and the armature is moveable between an unlocked position and a locked position. The follower and armature include detents for supporting a bearing. The armature and bearing prevent the follower from moving from the out-of-Park position to the Park position when the armature is held in place in the lock position by the solenoid. |
| US08053689B2 |
Communication terminal having housing with key buttons coupled thereto
A communication terminal including a housing having elastic key buttons integrally coupled thereto is provided. The housing is configured to define an external appearance of the communication terminal. Each of the key buttons may have one end thereof integrally coupled to the housing and a free end at an opposite end thereof. A plurality of key-input switches may be respectively positioned beneath each key button. Each of the key-input switches may detect a corresponding key-input when the free end of the key button is brought into contact with the key-input switch. |
| US08053685B2 |
Metal wiring plate
A metal wiring plate includes a soldering portion to which an electronic device is soldered and a wiring portion extending from the soldering portion and configured to electrically connect the electronic device to other device. The wiring portion includes a narrow portion located adjacent to the soldering portion. The width of the narrow portion is less than the width of the soldering portion so that the narrow portion helps prevent melted solder applied to the soldering portion from spreading to areas outside the soldering portion. The narrow portion allows the electronic apparatus to be surely soldered to the soldering portion without using solder resist. |
| US08053684B2 |
Mounting structure and method for mounting electronic component onto circuit board
An electronic component mounting structure includes a flexible circuit board having terminal connection patterns formed thereon and a light-emitting component provided with electrodes. The light-emitting component is placed on the flexible circuit board, and a synthetic resin casing is injection-molded to cover the light-emitting component and a portion of the flexible circuit board surrounding the light-emitting component placed thereon, whereby the electrodes of the light-emitting component and the terminal connection patterns of the flexible circuit board are connected in abutting contact with each other. |
| US08053683B2 |
Equipment container retention and bonding system and method
An equipment container retention and bonding system including a dagger pin block assembly that includes a mounting dagger pin and a bonding member formed of a compressive electrically conductive material that is retained on a surface of the dagger pin block assembly wherein the bonding member is compressed between the contact surface on the equipment container and the dagger pin block assembly when the fastening mechanism secures the equipment container in the mounting tray to form an EMI/EMC bonding connection between the mounting tray and the equipment container having an electrical resistance of less than 2.5 milli-ohms under vibration and other loading conditions encountered during use of the system. |
| US08053682B2 |
Multilayer ceramic substrate
There is provided a multilayer ceramic substrate including a conductive via of a dual-layer structure capable of preventing loss in electrical conductivity and signal. The multilayer ceramic substrate includes: a plurality of dielectric layers; and a circuit pattern part formed on at least a portion of the dielectric layers, the circuit pattern part including at least one conductive via and conductive pattern, wherein the at least one conductive via comprises an outer peripheral portion and an inner peripheral portion, the outer peripheral portion formed along an inner wall of a via hole extending through the dielectric layers and formed of a first conductive material containing a metal, and the inner peripheral portion filled in the outer peripheral portion and formed of a second conductive material having a shrinkage initiation temperature higher than a shrinkage initiation temperature of the first conductive material. |
| US08053681B2 |
Integrated circuit package and manufacturing method thereof
An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole. |
| US08053678B2 |
Interconnection, electronic device and method for manufacturing an electronic device
An interconnection includes a bundle of conductive members, each of the conductive members being made of carbon nanotube having an end connected to a first conductive film, and another end connected to a second conductive film separated from the first conductive film; and carbon particles each having a diamond crystal structure, dispersed between the conductive members. |
| US08053676B2 |
Substrate panel having a plurality of substrate strips for semiconductor packages
A substrate panel primarily comprises a plurality of substrate strips arranged in an array, one or more current input lines, a plurality of cascaded lines connecting between the substrate strips, and a current input buffer gate. Current input lines connect a current input side of the substrate panel to the adjacent substrate strips. The current input buffer gate has a frame around the substrate strips and a plurality of meshes where the frame intersects with the current input lines and the meshes intersect with the cascaded lines with both ends of the meshes connecting to the frame. Therefore, the current can be evenly distributed to each substrate strip during plating processes to improve the issues of different plating thicknesses and different plating roughness caused by different current densities and to protect the internal circuits inside the substrate strips from the damages due to current surges and unstable voltages. |
| US08053675B2 |
Apparatus for balancing power plane pin currents in a printed wiring board using collinear slots
Printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. Multiple collinear slots in the form of a dashed line are introduced in the metal layer implementing the power plane that alter the current distribution in the power plane and improve the strength of the PWB. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots are dashed and may be made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements. |
| US08053673B2 |
Capacitor embedded printed circuit board
A capacitor embedded printed circuit board (PCB) includes a multilayer polymer capacitor layer with a plurality of polymer sheets. One or more first inner electrodes and second inner electrodes, separated by one or more of the plurality of polymer sheets, are alternately disposed to form a pair. A plurality of first extended electrodes and second extended electrodes protrude from the first inner electrodes and second inner electrodes, respectively. One or more insulating layers are laminated on one or both surfaces of the multilayer polymer capacitor. A plurality of first via holes for capacitor, and a plurality of second via holes for capacitor, penetrating the multilayer polymer capacitor layer are connected to the first extended electrodes and the second extended electrodes, respectively. The plurality of the first and second extended electrodes are alternately disposed to be opposite to each other. |
| US08053672B2 |
Method and apparatus for high-density power distribution unit with integrated cable management
A cable management unit having a base section and a top section, the base section and the top section defining a space therebetween, a plurality of distribution walls coupled between the base section and the top section and having a front surface facing the space and a back surface facing away from the space, an electronic device disposed within the space, and a plurality of ports disposed on the back surface of the contiguous section of the plurality of distribution walls and each having a port surface extending beyond the back surface of the contiguous section. |
| US08053667B2 |
Housing of quad small form-factor pluggable transceiver module
A housing of a Quad Small Form-Factor Pluggable transceiver module includes a metallic casing and a plurality of elastic grounding assemblies. The metallic casing has a lower casing, a plurality of partitions and an upper casing. The lower casing is connected to the upper casing. The partitions are provided between the lower casing and the upper casing at intervals, thereby separating the interior of the metallic casing into a plurality of accommodating spaces. The accommodating spaces each receives a connector of a transceiver module, thereby forming a plurality of ports. Thus, the connectors of the transceiver modules share the common housing, thereby reducing the occupied space on the circuit board and increasing the number of the transceiver modules arranged on the circuit board. |
| US08053666B2 |
Solar cell and manufacturing method of the solar cell
A p type amorphous silicon layer is stacked, by a CVD method, on a main surface of an n type single-crystalline silicon substrate; an n type amorphous silicon layer is stacked, by the CVD method, on a surface opposite to the surface on which the p type amorphous silicon layer is stacked; and, by using a laser ablation processing method, through-holes are formed in the n type single-crystalline silicon substrate, the p type amorphous silicon layer, and the n type amorphous silicon layer. Subsequently, an insulating layer is formed on an inner wall surface of each of the through-holes, and then a conductive material is filled therein. |
| US08053664B2 |
Transparent electrode having thermal stability, method of fabricating the same and dye-sensitized solar cell comprising the same
A transparent electrode having thermal stability, composed of a transparent conductive material containing a pentavalent element, a method of fabricating the same, and a dye-sensitized solar cell including the electrode. The transparent electrode having thermal stability does not substantially deteriorate even when it is exposed to high temperatures and its conductivity is not reduced. Thus, the dye-sensitized solar cell including the electrode can have improved performance. |
| US08053663B2 |
Panel-shaped semiconductor module
A solar battery module as a panel-shaped semiconductor module comprises multiple spherical or nearly spherical, granular electric power generation semiconductor elements arranged in multiple rows and columns, a conductive connection mechanism electrically connecting in parallel multiple semiconductor elements in each row and connecting in series multiple semiconductor elements in each column, and a conductive inner metal case housing the multiple semiconductor elements and constituting the conductive connection mechanism, wherein each row of semiconductor elements is housed in each reflecting surface-forming groove of the inner metal case, the positive electrodes of the semiconductor electrodes are connected to the bottom plate and the negative electrodes are connected to finger leads, the bottom plate of each reflecting surface-forming grove has a cutoff slit, and the top is covered with a transparent cover member. |
| US08053660B2 |
Variable slippage control for a disc jockey control surface
The disclosure pertains to a scratch effect controller for use by a disk jockey, wherein at least one electromagnet creates the slippage tension or friction effect between the user manipulated disc, which includes a vinyl-like surface thereby simulating a vinyl record, and the rotatable or fixed platter. The strength of the electromagnet is variable so as to create a variable slippage tension or friction effect. |
| US08053658B2 |
Electronic musical instrument using on-on note times to determine an attack rate
An electronic musical instrument includes: an input device that inputs a sound generation instruction to start generating a musical sound and a stop instruction to stop the musical sound; an on-on time timer device that measures a time difference between a first and second sound generation instructions; a gate time timer device that measures a time difference between the second sound generation instruction and a stop instruction; an attack characteristic setting device that sets an attack characteristic of the musical sound to have a shorter attack time as the time difference measured by the on-on time timer device becomes shorter; and a release characteristic setting device that sets a release characteristic of the musical sound generated to have a shorter release time as the time difference measured by the gate time timer device becomes shorter. |
| US08053656B1 |
Single-arm pedal assembly for percussion instrument
A single-arm pedal assembly of the present invention mainly includes two hammers and two pedals. Each pedal can indirectly drive a hammer to rotate respectively. The single-arm pedal assembly can be reconstituted into two separate pedal assemblies. Both of the two pedal assemblies have one pedal and one hammer. As such, the single-arm pedal assembly can be transformed for particular situations. |
| US08053649B1 |
Maize variety inbred PHVPM
A novel maize variety designated PHVPM and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHVPM with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHVPM through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHVPM or a locus conversion of PHVPM with another maize variety. |
| US08053648B2 |
Plants and seeds of hybrid corn variety CH353606
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH353606. The invention thus relates to the plants, seeds and tissue cultures of the variety CH353606, and to methods for producing a corn plant produced by crossing a corn plant of variety CH353606 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH353606. |
| US08053645B1 |
Maize variety PHECH
A novel maize variety designated PHECH and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHECH with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHECH through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHECH or a trait conversion of PHECH with another maize variety. Inbred maize varieties derived from maize variety PHECH, methods for producing other inbred maize varieties derived from maize variety PHECH and the inbred maize varieties and their parts derived by the use of those methods. |
| US08053638B2 |
Method for agrobacterium-mediated transformation of plants
The invention provides methods and compositions for enhancing the efficiency of Agrobacterium-mediated transformation of host cells such as plant cells. Plant expression constructs comprising a gene encoding a VIP2 or VIP2-like polypeptide are provided, as well as methods for utilizing such constructs to enhance Agrobacterium-mediated transformation efficiency. |
| US08053631B2 |
Polynucleotides and methods for making plants resistant to fungal pathogens
This invention relates to polynucleotide sequences encoding genes that can confer resistance to the plant pathogen Colletotrichum, which causes anthracnose stalk rot, leaf blight and top dieback in corn and other cereals. It further relates to plants and seeds of plants carrying chimeric genes comprising said polynucleotide sequences, which enhance or confer resistance to the plant pathogen Colletotrichum, and processes of making said plants and seeds. The invention further presents sequences that can be used as molecular markers that in turn can be used to identify the region of interest in corn lines resulting from new crosses and to quickly and efficiently introgress the genes from corn lines carrying said genes into other corn lines that do not carry said genes, in order to make them resistant to Colletotrichum and resistant to stalk rot. |
| US08053630B2 |
Nematode inducible plant metabolite exporter gene promoters
The invention provides plant gene promoters, and essential promoter elements, which are root-specific and/or induced by parasitic nematodes. The promoters of the invention are useful for controlling expression of nucleic acids of interest in plant roots. |
| US08053628B2 |
Wheat having new starch and method for producing it
The object of the present invention is to provide a wheat which accumulates a starch with a novel property by controlling the expression of the enzymes described in claims.The present invention provides a wheat, which does not express any of the following proteins (1)-(6): (1) Wheat Starch Synthase II-A1 Protein encoded by Wheat Starch Synthase II-A1 gene of SEQ ID NO:1, (2) Wheat Starch Synthase II-B1 Protein encoded by Wheat Starch Synthase II-B1 gene of SEQ ID NO:3, (3) Wheat Starch Synthase II-D1 Protein encoded by Wheat Starch Synthase II-D1 gene of SEQ ID NO:5, (4) Granule Bound Starch Synthase A1 Protein encoded by Granule Bound Starch Synthase A1 gene of SEQ ID NO:7, (5) Granule Bound Starch Synthase B1 Protein encoded by Granule Bound Starch Synthase B1 gene of SEQ ID NO:9, and (6) Granule Bound Starch Synthase D1 Protein encoded by Granule Bound Starch Synthase D1 gene of SEQ ID NO:11. |
| US08053624B2 |
Reinforced closure anchor
A reinforced closure anchor includes a first layer having an adhesive side, an opposite non-adhesive side, and an outer edge. An anchor member layer having a reinforcing structure is disposed on the first layer. The anchor member includes an adhesive side and an opposite non-adhesive side. The anchor member adhesive side is adhered to the first layer non-adhesive side or the first layer adhesive side. The anchor member may be generally centered between ends of the first layer, the anchor member may extend to portions of the outer edge of the first layer, and the anchor member may have a shape that generally corresponds in shape to a middle portion of the first layer. |
| US08053619B2 |
Dehydrogenation of mixed alcohols
Process for the production of alkenes from a feedstock comprising monohydric aliphatic paraffinic alcohols having from 2 to 3 carbon atoms, in which the monohydric aliphatic paraffinic alcohols containing 2 to 3 carbon atoms are dehydrated into the corresponding same carbon number alkenes at a pressure of more than 0.5 MPa but less than 4.0 MPa and at a temperature of less than 300° C. The alcohols present in the feedstock comprise ethanol, propanol(s), less than 1 wt % of methanol and less than 1 wt % of C3+ alcohols. |
| US08053616B2 |
Continuous process for converting natural gas to liquid hydrocarbons
A method comprising providing a halogen stream; providing a first alkane stream; reacting at least a portion of the halogen stream with at least a portion of the first alkane stream to form a halogenated stream, wherein the halogenated stream comprises alkyl monohalides, alkyl polyhalides, and a hydrogen halide; providing a second alkane stream; and reacting at least a portion of the second alkane stream with at least a portion of the alkyl polyhalides to create at least some additional alkyl monohalides. |
| US08053615B2 |
Synthesis of liquid fuels and chemicals from oxygenated hydrocarbons
Processes and reactor systems are provided for the conversion of oxygenated hydrocarbons to hydrocarbons, ketones and alcohols useful as liquid fuels, such as gasoline, jet fuel or diesel fuel, and industrial chemicals. The process involves the conversion of mono-oxygenated hydrocarbons, such as alcohols, ketones, aldehydes, furans, carboxylic acids, diols, triols, and/or other polyols, to C4+ hydrocarbons, alcohols and/or ketones, by condensation. The oxygenated hydrocarbons may originate from any source, but are preferably derived from biomass. |
| US08053612B2 |
Process for dehydrochlorinating 1,1,1,2-tetrafluoro-2-chloropropane to 2,3,3,3-tetrafluoropropene in the presence of an alkali metal-doped magnesium oxyfluoride catalyst and methods for making the catalyst
A process for making a fluorinated olefin. The process has the step of dehydrochlorinating a hydrochlorofluorocarbon having at least one hydrogen atom and at least one chlorine atom on adjacent carbon atoms in the presence of a catalytically effective amount of a catalyst composition. The catalyst composition is represented by the following: n wt. % MX/M′OyFz, wherein 0 |
| US08053611B2 |
Process or the preparation of 1,1,1,3,3,3-hexafluoro-propane and at least one of 1,1,1,2,3,3-hexafluoropropane, hexafluoropropane and 1,1,1,2,3,3,3-heptafluoropropane
A process is disclosed for the manufacture of 1,1,1,3,3,3-hexafluoropropane and 1,1,1,2,3,3-hexafluoropropane, hexafluoropropene and/or 1,1,1,2,3,3,3-heptafluoropropane. The process involves (a) reacting HF, Cl2, and at least one halopropene of the formula CX3CCl═CClX (where each X is independently F or Cl) to produce a product comprising CF3CCl2CF3 and CF3CClFCClF2; (b) reacting CF3CCl2CF3 and CF3CClFCClF2 produced in (a) with hydrogen, optionally in the presence of HF, to produce a product comprising CF3CH2CF3 and at least one of CHF2CHFCF3, CF3CF═CF2 and CF3CFHCF3; and (c) recovering from the product produced in (b), CF3CH2CF3 and at least one of CHF2CHFCF3, CF3CF═CF2 and CF3CFHCF3. In (a), the CF3CCl2CF3 and CF3CClFCClF2 are produced in the presence of a chlorofluorination catalyst including (i) a crystalline alpha-chromium oxide where at least 0.05 atom % of the chromium atoms in the alpha-chromium oxide lattice are replaced by divalent copper, and/or (ii) a chromium-containing composition of (i) which has been treated with a fluorinating agent. |
| US08053609B2 |
Solid catalyst useful for converting an alkylene oxide to an alkylene glycol
A solid (i.e., heterogeneous) catalyst useful for preparing an alkylene glycol from the corresponding alkylene oxide as well as a process for the catalytic hydration of an alkylene oxide to an alkylene glycol utilizing such a catalyst are provided. The catalyst of the present invention is based on an ion exchange resin including polystyrene crosslinked with from about 2 to about 10 weight (wt.) % divinyl benzene. The ion exchange resin further includes quaternary ammonium groups or quaternary phosphonium groups. The process includes reacting water and an alkylene oxide in at least one reactor under conditions to form an alkylene glycol, wherein the at least one reactor includes a catalyst based on an ion exchange resin that includes polystyrene crosslinked with from about 2 to about 10 weight (wt.) % divinyl benzene. |
| US08053600B2 |
Process for the preparation of carboxylic acids and/or derivatives thereof
Process for preparing an aliphatic carboxylic acid having (n+1) carbon atoms, where n is an integer up to 6, and/or an ester or anhydride thereof by contacting an aliphatic alcohol having n carbon atoms and/or a reactive derivative thereof with carbon monoxide under hydrous conditions in the presence of a ferrierite catalyst. |
| US08053599B2 |
Drug containing (2R)-2-propyloctanoic acid as the active ingredient
The present invention relates to a medicament which is useful for neurodegenerative diseases, which comprises about 1 to about 5 equivalents of a basic metal ion based on 1 equivalent of (2R)-2-propyloctanoic acid or a salt thereof, which is supplied from a metal salt of weak acid or a metal hydroxide, and optionally further comprises an additive. The medicament of the present invention is a medicament which a pH of suitable for intravenous administration, is resistant to fluctuations of the pH and is not clouded when it is dissolved in an infusion, and an injection and the like can be prepared therefrom by using any dissolving liquid and/or dilution liquid. |
| US08053598B2 |
Compounds, their preparation and use
Novel compounds of the general formula (I), the use of these compounds as pharmaceutical compositions, pharmaceutical compositions comprising the compounds and methods of treatment employing these compounds and compositions. The present compounds may be useful in the treatment and/or prevention of conditions mediated by Peroxisome Proliferator-Activated Receptors (PPAR), in particular the PPARδ subtype. |
| US08053594B2 |
Preparation of diesters from imide/dinitrile compounds
Diester compounds are prepared from imide/dinitrile compounds employing a vapor-phase hydrolysis of dinitrile compounds in the presence of alcohol, more particularly from branched dinitrile compounds, such as methylglutaronitrile or branched dinitrile compounds obtained as by-products in a process for the production of adiponitrile by hydrocyanation of butadiene. |
| US08053593B2 |
Catalyst and process for preparing carboxylic acid esters
A catalyst and a process for preparing carboxylic acid esters from an aldehyde and an alcohol in the presence of molecular oxygen are disclosed. The catalyst comprises metals supported on a silica-containing support, wherein the metals consist essentially of palladium, lead, an alkali or alkaline earth metal, and at least one of niobium and zirconium. The process for preparing a carboxylic acid ester comprises reacting an aldehyde with an alcohol in the presence of molecular oxygen and the aforementioned catalyst. |
| US08053590B2 |
Method for producing enantiomeric form of 2,3-diaminopropionic acid derivatives
The invention relates to a method for producing enantiomers form of 2,3-diaminopropionic acid derivatives of formula (I) by asymmetric hydrogenation from compounds of formula (II). |
| US08053581B2 |
Trisubstituted thiazole compounds, preparations methods, pharmaceutical compositions and medicals uses thereof
The present invention relates to 2,4,5-trisubstituted thiazole compounds of formula (I) or all possible isomers, prodrugs, pharmaceutically acceptable salts, solvates or hydrates thereof for the inhibition of plasma PLTP activity and/or plasma CETP activity, wherein the substituents are as defined in the specification; a process for the preparation of the compounds of formula (I); a pharmaceutical composition comprising the compound of formula (I) and its use for the preparation of a medicament for treatment and/or prevention of diseases associated with the increased plasma PLTP activity and/or the increased plasma CETP activity in a mammal, such as atherosclerosis, cardiovascular diseases and peripheral vascular diseases, etc. |
| US08053568B2 |
Bacterial packaging strains useful for generation and production of recombinant double-stranded RNA nucleocapsids and uses thereof
Bacterial packaging strains useful for generating recombinant double-stranded RNA nucleocapsids (rdsRNs) are provided. The packaging strains are useful for the production of RNA encoding vaccine antigens, bioactive proteins, immunoregulatory proteins, antisense RNAs, and catalytic RNAs in eukaryotic cells or tissues. Recombinant ssRNA is introduced into the strains and packaged to form rdsRNs de novo. |
| US08053564B2 |
Cross-linked antibodies
The present invention provides a compound consisting essentially of the following elements: one or more reactive groups; and two or more cross-linked antibodies or fragments thereof; characterised in that the or each reactive group is suitable for attaching an effector molecule but does not react with any of the antibodies or fragments thereof. |
| US08053562B2 |
Modified antibody fragments
The present invention relates to a new class of modified antibody fragments. The present invention provides an antibody fragment to which one or more effector molecules is attached characterized in that the native interchain disulphide bond between the heavy (CHI) and light (CL) chain constant regions is absent and the heavy chain (CHI) and light chain (CL) constant regions are linked by an interchain disulphide bond between a pair of engineered cysteines, one in the light chain constant (CL) region and the other in the heavy chain constant (CHI) region. |
| US08053561B2 |
Pegylated factor VIII
The invention is a proteinaceous construct comprising a Factor VIII molecule having at least a portion of the B domain intact, which is conjugated to a water-soluble polymer such as polyethylene glycol having a molecular weight of greater than 10,000 Daltons. The construct has a biological activity of at least 80% of the biological activity of native Factor VIII, and the in vivo half-life of the construct is increased by at least 1.5 fold as compared to the in vivo half-life of native factor FVIII. |
| US08053559B2 |
Biodegradable scaffold with ECM material
We add discontinuous regions of Extra Cellular Matrix (ECM) to a biodegradable scaffold. Hereby it is possible to combine the range of physical properties the scaffold can offer with the reconstructive properties of the ECM. The optimal amount of discrete ECM material for each application is disclosed and this concentration is equally distributed in the dressing hence avoiding unnecessary high concentrations of ECM. In addition to the effect of the ECM, the porous structure of the base material provides the cells with a structure for in-growth. |
| US08053557B2 |
SPARC-derived tumor rejection antigenic peptides and medicaments comprising the same
It is an objective of the present invention to identify SPARC protein-derived peptides that are able to induce human killer T cells and helper T cells having cytotoxic activity to tumors, and to provide a means for carrying out a tumor immunotherapy of patients with various types of cancers overexpressing SPARC. The present invention provides a peptide of any of the following: (A) a peptide which consists of the amino acid sequence as shown in any one of SEQ ID NOS: 1 to 3; or (B) a peptide which consists of an amino acid sequence comprising a substitution or addition of one or several amino acids with respect to the peptide consisting of the amino acid sequence as shown in any one of SEQ ID NOS: 1 to 3, and which has capacity to induce cytotoxic (killer) T cells. |
| US08053553B2 |
Targeting host proteinases as a therapeutic strategy against viral and bacterial pathogens
Disclosed are compositions and methods for preventing or reducing harm resulting from pathogen infection. For example, disclosed are peptides that inhibit the processing of toxins normally cleaved by proprotein convertase enzymes. |
| US08053548B2 |
Hydrophilic surface modification of polydimethylsiloxane
A method for the preparation of hydrophilic elastomers involves the synthesis of polydimethylsiloxane with tunable hydrophilic surface properties. An elastomeric monolith with desired hydrophilic properties is produced by combining a polyethylene oxide polymeric surfactant additive with a PDMS base and curing agent during polymerization. The surfactant chain segment lengths are varied to control the hydrophobic/hydrophilic balance. |
| US08053543B2 |
Filler for optical isomer separation
A polymer compound derivative, obtained by modifying part of the hydroxy or amino groups of a polymer compound having the hydroxy or amino groups with molecules of a compound represented by the following general formula (I): A-X—Si(Y)nR3-n (I), where A represents a reactive group which reacts with a hydroxy or amino group, X represents an alkylene group which has 1 to 18 carbon atoms and which may have a branch, or an arylene group which may have a substituent, Y represents a reactive group which reacts with a silanol group to form a siloxane bond, R represents an alkyl group which has 1 to 18 carbon atoms and which may have a branch, or an aryl group which may have a substituent, and n represents an integer of 1 to 3. |
| US08053541B2 |
Catalysts for catalytic chain transfer
Cobaloxime derivatives and methods of producing cobaloxime derivatives are disclosed herein. Methods of producing decolorized homo- and co-polymers through polymerization of monomers in presence of the cobaloxime derivatives and decolorization of the produced polymer by exposing the polymer to a sorbent and, optionally, a solvent are also disclosed herein. |
| US08053539B2 |
Siloxanyl materials for molded plastics
In one aspect, the invention relates to compositions comprising siloxanyl compounds comprising the structure: or residues thereof. Such compositions can be suitable for producing molded articles, can be excellent in transparency, hydrophilicity, and oxygen permeability, and can have a low modulus of elasticity and/or an excellent optical quality, so as to be suitable for ophthalmic lenses such as contact lenses and intraocular lenses. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. |
| US08053538B2 |
Ether composition and solution composition
To provide an ether composition containing no —OCF2O— structure, having a low viscosity and being excellent in chemical stability in a wide temperature range. An ether composition comprising a polyether compound (A) containing at least two —(OCF2CF2)— units, containing no —OCF2O— structure and having an average molecular weight of higher than 2,000 and at most 20,000, and an ether compound (B) containing at least one —(OCF2CF2)— unit and having an average molecular weight of at most 2,000. |
| US08053532B2 |
Polyester toner compositions
An emulsion aggregation polyester toner including a polyester resin having modified end groups, wherein the polyester resin includes at least one carboxylic end group. A process of making the toner by oxidation of a polyester resin including reacting the polyester with a hypohalite and a phase transfer catalyst results in a polyester resin endcapped with at least one acidic group. Stable xerographic charging in all ambient environments for all colors, and excellent resistivity and cohesion of the toner, may be achieved. |
| US08053531B2 |
Hydrogenated crystalline norbornene ring-opening polymer and molded article
A hydrogenated crystalline norbornene ring-opening polymer is obtained by hydrogenating 80% or more of carbon-carbon double bonds of a ring-opening polymer that is obtained by ring-opening polymerization of norbornene monomers including 90 to 100 wt % of 2-norbornene and 0 to 10 wt % of a 2-norbornene derivative having a substituent which does not include an aliphatic carbon-carbon double bond in the presence of a branching agent, the hydrogenated crystalline norbornene ring-opening polymer having a melting point of 110 to 145° C. and a branching index of 0.3 to 0.98, and a molded article is obtained by molding the hydrogenated crystalline norbornene ring-opening polymer. The hydrogenated crystalline norbornene ring-opening polymer has excellent industrial productivity, and the molded article has excellent productivity and moisture resistance. |
| US08053530B2 |
Polyelectrolyte membranes made of poly(perfluorocyclobutanes) with pendant perfluorosulfonic acid groups and blends with poly(vinylidene fluoride)
A polymer useful as an ion conductor in fuel cells includes a perfluorocyclobutyl moiety and pendant PFSA side groups. The polymer is made by a variation of the Ullmann reaction. Ion conducting membranes incorporating the polymer are provided. |
| US08053528B2 |
Binder compositions for fiber mats, and fiber mats and articles comprising them
Aqueous binder compositions for fiber mats include a urea-formaldehyde resin and an aqueous emulsion of a copolymer prepared by polymerization of a monomer mixture including styrene, an alkyl(meth)acrylate, acrylonitrile, and an unsubstituted or substituted acrylamide. Even when used in relatively low concentration, the copolymer provides improved physical properties to the fiber mat. The fiber mats can be used in composite flooring, asphalt roofing shingles, siding, and dry wall. |
| US08053524B2 |
Golf ball material, golf ball and method for preparing golf ball material
A golf ball material composed of (A) an olefin-containing thermoplastic polymer having an acid content of at least 0.5 wt % but less than 5.0 wt %, (B) a resin composition which includes one or more selected from the group consisting of diene polymers, thermoplastic polymers and thermoset polymers, and (C) an oxygen-containing inorganic metal compound has a good thermal stability, flow and processability, making it suitable for injection molding. The golf ball material is ideal for the production of high-performance golf balls endowed with durability, scuff resistance and optimal hardness without a loss of rebound in the molded article. |
| US08053522B2 |
Synthesis of polyester-graft-poly(meth)acrylate copolymers
The present invention relates to a novel synthesis of (meth)acrylate-grafted polyesters and their action as compatibilizers. |
| US08053517B2 |
Stabilized elastomer dispersions
This invention pertains to neutralized silicone elastomer dispersions and methods for making neutralized silicone elastomer dispersions. This invention also pertains to compositions comprising the neutralized silicone elastomer and an acid reactive compound. The silicone elastomer dispersion are neutralized typically by blending the silicone elastomer dispersion with a base such as sodium bicarbonate or by adding a basic neutralizing agent to one or more of the raw materials used to make the silicone elastomer dispersion and removing the basic neutralizing agent by filtration or any other suitable means. |
| US08053513B2 |
Pyrrolidone-carboxylic modified polysiloxanes having aqueous and detergent solubilities and water-in-oil emulsion capability
The properties of 2-pyrrolidone-4-carboxylic substituted polysiloxanes can be dramatically altered by increasing the presence of the carboxylic-substituted pyrrolidone monomer of the polysiloxane, such that the amidopolysiloxane has an acid equivalent weight of about 3:00-3,000 daltons and a molecular weight average Mw of about 1,000-60,000 daltons resulting in enhanced detergent and water solubilities and the ability to form water-in-oil emulsions thereby providing usefulness across a broad range of formulations having enhanced electrolytic and silicone and/or hydrocarbon compatibility and cleansing properties. |
| US08053502B2 |
PVDF-based extrusion-aiding agent
The invention concerns to a composition comprising: at least one fluorinated polymer (A), at least one interfacing agent (B), and at least one stabilizer (C) of formula (I) wherein Ar1 and Ar2 represent an aryl group. The composition is used as an agent for extruding a thermoplastic polyolefin or resin. The invention also concerns an extruding method consisting in: (i) contacting in the solid phase a composition as defined above with a thermoplastic polyolefin or a thermoplastic resin; (ii) then extruding the mixture obtained in (i) in the form of a film, a tube, a profiled section or a hollow body. |
| US08053500B2 |
Flame-retardant polyamide resin composition and molded article
To provide a flame-retardant polyamide resin composition generally excellent in flame resistance, mechanical characteristics and electrical characteristics, and suitable for electrics/electronics components and vehicles. Used is a flame-retardant polyamide resin composition comprising, a polyamide resin (A), a phosphorus-containing flame retarder (B), and glass fiber having a non-circular cross-section (C), wherein the contents in the composition are 15 to 78% by weight for the polyamide resin (A), 2 to 20% by weight for the phosphorus-containing flame retarder (B), and 20 to 65% by weight for the glass fiber having a non-circular cross-section (C). |
| US08053499B2 |
Colored polyoxymethylene molding compounds and molded parts produced therefrom
The present invention relates to a polyoxymethylene molding composition comprising (A) 0.1-5.0% by weight of colorant, (B) 0.01-0.5% by weight of a nitrogen-containing stabilizer, (C) 0.05-1% by weight of an ester of a polyhydric alcohol and at least one fatty acid, and (D) 0.001-0.5% by weight of a metal salt of a fatty acid, and (I) polyoxymethylene polymer and, where appropriate, up to 40% by weight of other conventional additives, and variants of this constitution in advantageous versions. In the case of these polyoxymethylene molding compositions the selection of the colorants is no longer restricted to conventional colorants suitable particularly for POM.The products produced therewith are particularly stable during processing and feature low formaldehyde emission, defect-free surfaces, and high color fastness. |
| US08053498B2 |
Pulverulent polycondensation products
Pulverulent polycondensation products are described, consisting of a) 5 to 95% by weight of a polycondensation product based on an aromatic or heteroaromatic compound (A) having 5 to 10 C atoms or heteroatoms having at least one oxyethylene or oxypropylene radical and one aldehyde (C) selected from the group consisting of formaldehyde, glyoxylic acid and benzaldehyde or mixtures thereof, and b) 5 to 95% by weight of a finely divided mineral carrier material having a specific surface area of 0.5 to 500 m2/g (according to BET as specified in DIN 66 131). The pulverulent polycondensation products according to the invention are outstandingly suitable in construction material mixtures in an amount of from 0.1 to 5% by weight, based on the weight of the construction material. The pulverulent polycondensation products have a number of advantages here, such as, for example, excellent storage stability, good liquefying action at low dosage and industrially simple production. |
| US08053497B2 |
Polymers produced by using sulphur compounds in the form of transfer agents for controlled radical polymerisation of acrylic acid and the use thereof
The invention concerns the polymers obtained by the use of sulfur compounds in a process for controlled radical polymerization in water of acrylic acid and/or acrylic acid with hydrosoluble monomers. It concerns also their uses as dispersant agents or agents to aid grinding and/or co-grinding of mineral matters in aqueous suspensions, and as dispersant agents incorporated directly in aqueous formulations containing mineral matters. Finally, the invention concerns the formulations of mineral matters obtained in this manner. |
| US08053490B2 |
Pre-treated acid-reactive fillers and their use in dental applications
A dental filler and dental resin restorative composition containing the dental filler is provided. The dental filler is prepared by pre-treating an acid-reactive filler with a polymerizable monomer or oligomer pre-treatment chemical having at least one acid or acid-precursor functional group, at least one polymerizable unsaturated carbon-carbon bond, and a molecular weight of about 1,000 grams per mole or less. |
| US08053489B2 |
Crosslink agents and dual radical cure polymer
Crosslink agents used to copolymerize at least one hydrophilic monomer with at least one lens monomer typically used to prepare polymeric materials for ophthalmic lenses. The crosslink agents have a relatively high selectivity for the hydrophilic monomer and limited reactivity with the crosslink agent used to polymerize the lens monomer. Accordingly, the invention is also directed to a hydrophilic crosslinked polymer that comprises at least two monomeric units and at least two different crosslink units. The use of the dual crosslink system provides an improved means to control the final chemical, physical and structural characteristics of the resulting polymer. |
| US08053486B2 |
Coating compositions and curing method thereof
The invention provides a coating composition comprising a thermal plastic resin selected from the group consisting of a polycycloolefin resin, polyester resin, polyacrylate resin, and a mixture thereof; and a radiation curable resin comprising a radiation polymer containing at least one mono- or multi-functional acrylic acid based monomer as a polymerization unit, an oligomer containing an ethylenically unsaturated functional group, and a photoinitiator, wherein the radiation curable resin is used in an amount of 220-1000% by weight on the basis of the weight of the thermal plastic resin. The invention improves the hardness of the coating composition, prevent the coated substrate from being scratched or impaired, and impart the substrate with high transparency without causing warping problem. |
| US08053484B2 |
Composition for polyurethane foam and polyurethane foam prepared therefrom
A polyurethane foam composition includes a polyol, a polyisocyanate, a catalyst, a foam stabilizer, a blowing agent and a fluorinated carbonate wherein the fluorinated carbonate is a compound represented by Formula 1: a compound represented by Formula 2: or a mixture thereof. Also disclosed is a polyurethane foam derived from the composition. |
| US08053483B2 |
Gas adsorbent
A gas adsorbent which has sufficient gas adsorptivity for noxious gas components in a cigarette when brought into contact with a gas stream having a high flow rate as that when it passes through a cigarette filter, and which releases a small amount of bad odor components such as amine impurities and free noxious components which adversely affect health such as aromatic compounds derived from the gas adsorbent itself, the gas adsorbent satisfying conditions (I), (II), (IV) and (V) or conditions (I), (III), (IV) and (V), as described in the specification. |
| US08053482B2 |
Fischer-tropsch catalyst
Process for reducing the methane selectivity in a Fischer-Tropsch conversion of syngas to hydrocarbons, by using a catalyst composition containing (i) cobalt, either as the elemental metal, oxide, or a compound thermally decomposable to the elemental metal or oxide, (ii) zinc, in the form of the oxide or a compound thermally decomposable to the oxide, and (iii) platinum, in the elemental metal form, or in the form of a compound wherein the amount of platinum metal present in the composition is in the range 0.0001 to 1.50% w/w. |
| US08053477B2 |
Inhibitors of the S100-p53 protein-protein interaction and method of inhibiting cancer employing the same
Compounds that bind S100 and inhibit the S100-p53 protein-protein interaction and activate the tumor suppressor activity of p53, and thus which have an antineoplastic effect are disclosed, as well as methods for identifying these compounds, compositions comprising the same, and methods of using the same to treat cancer. |
| US08053474B2 |
Compound with carboxyl acid group and amide group and application thereof
The present invention discloses compounds with a carboxyl acid group and an amide group which also containing the tertiary amino groups. The carboxyl acid group having a partial negative charge can attract the tertiary amino group with each other to form a quaternary ammonium salt structure, so that the compounds are easy to dissolve in water. Moreover, these compounds having a mushroom tyrosinase-inhibition effect and have the potential to use in the cosmetics for skin whitening. |
| US08053467B2 |
Flavor improving agent, and food and drink containing the same
The present invention provides a novel flavor improving agent capable of sufficiently enhancing or alleviating the flavor sensed in oral cavity; for example, enhancing and improving the thickness in taste or the like to provide depth and profoundness to the flavor, and also improving the sense of volume or the sharpness of aftertaste. The present invention also provides a food/drink, a pharmaceutical product and an oral care product having a good taste which can fulfill the recent high-level demand for taste. |
| US08053458B2 |
Dipyrazole compounds and their use as central nervous system agents
The present invention is directed to dipyrazole compounds of formula I and their pharmaceutically acceptable salts, stereoisomers, tautomers, or solvates thereof. Novel compounds include those of formula I. The compounds of this invention modulate AMPA and NMDA receptor function, and therefore are useful as pharmaceutical agents, especially for the treatment of neuropsychiatric disorders. |
| US08053457B2 |
3-imidazolyl-indoles for the treatment of proliferative diseases
The invention relates to 3-heterocyclyl indolyl compounds of formula I capable of inhibiting the interaction between p53, or variants thereof, and MDM2 and/or MDM4, or variants thereof, respectively: wherein R1, R2, R3, R4, RA, Y and Y are as defined in the specification. Due to their activity, the compounds are useful in the treatment of various disorders and diseases mediated by the activity of MDM2 and/or MDM4, or variants thereof, such as inflammatory or proliferative diseases or in the protection of cells. |
| US08053455B2 |
Angiotensin II receptor antagonists
A compound having the structure wherein R is an angiotensin receptor antagonist active group, Y is selected from the group consisting of and —C(R1H)OC(O)X((CR12R13)—(CHR10)m—(CH2)n—Zp—(CH2)q—(CHR11)r—(CR16R17))—R5; 2) Z is —O— or —(CR14R15)—; m, n, p, q, and r are independently selected from the group consisting of 0 and 1; X is —O— or —(CR18R19)—; R1 is selected from the group consisting of hydrogen, C1-4 alkyl, aryl and C1-4 alkylaryl; R5 is —O—N═N(O)—R3R4; or a pharmaceutically acceptable salt or hydrate thereof, which is useful for treating hypertension. |
| US08053451B2 |
Hydroxybenzoate salts of metanicotine compounds
Patients susceptible to or suffering from conditions and disorders, such as central nervous system disorders, are treated by administering to a patient in need thereof compositions that are hydroxybenzoate salts of E-metanicotine-type compounds. The formation of hydroxybenzoate salts of the E-metanicotine compounds is also useful in purifying the E-metanicotine compounds, as the hydroxybenzoate salts tend to crystallize out, leaving impurities such as Z-metanicotine compounds, and compounds where the double bond has migrated, in solution. If desired, the hydroxybenzoate salts can be converted to either the free base (the E-metanicotine) or to another pharmaceutically acceptable salt form. |
| US08053450B2 |
Amino-benzazoles as P2Y1 receptor inhibitors with pyridine ring and heterocyclic components
The present invention provides novel amino-benzazoles and analogues thereof, which are selective inhibitors of the human P2Y1 receptor. The invention also provides for various pharmaceutical compositions of the same and methods for treating diseases responsive to modulation of P2Y1 receptor activity. |
| US08053449B2 |
Method for inhibiting AGE complex formation
Various methods of administering medication(s) that inhibit the nonenzymatic formation of glycation and dehydration condensation complexes known as advanced glycation end-products (AGEs) or modulate the advanced glycation end-product receptor (RAGE) are provided. Also, a medication releasing medical devices, wherein at least a portion of the medical device releasably includes at least one of these medication(s) are provided. |
| US08053448B2 |
Biphenyl compounds useful as muscarinic receptor antagonists
This invention provides methods of using compounds of formula Ib below to treat pulmonary disorders. wherein: R4 is hydrogen or (1-4C)alkyl; q is 0, 1, or 2; R5 is independently selected from halo, (1-4C)alkyl, and (1-4C)alkoxy, wherein each alkyl and alkoxy group is optionally substituted with from 1 to 3 fluoro substituents; R7 is hydrogen or (1-4C)alkyl; or a pharmaceuticallly acceptable salt thereof. |
| US08053447B2 |
11β-hydroxysteroid dehydrogenase type 1 active compounds
A novel class of compounds of the general formula (I), their use in therapy, pharmaceutical compositions comprising the compounds, as well as their use in the manufacture of medicaments are described. The present compounds modulate the activity of 11β-hydroxy-steroid dehydrogenase type 1 (11βHSD1) and are accordingly useful in the treatment of diseases in which such a modulation is beneficial, e.g. the metabolic syndrome. |
| US08053443B2 |
N-substituted indenoisoquinolines and syntheses thereof
N-Substituted indenoisoquinoline compounds, and pharmaceutical formulations of N-substituted indenoisoquinoline compounds are described. Also described are processes for preparing N-substituted indenoisoquinoline compounds. Also described are methods for treating cancer in mammals using the described N-substituted indenoisoquinoline compounds or pharmaceutical formulations thereof. |
| US08053442B2 |
Organic compounds
The invention relates to organic compounds which have interesting pharmaceutical properties. In particular, the compounds are useful in the treatment and/or prevention of infections such as those caused by Plasmodium falciparum, Plasmodium vivax, Plasmodium malariae, Plasmodium ovale, Trypanosoma cruzi and parasites of the Leishmania genus such as, for example, Leishmania donovani. The invention also relates to pharmaceutical compositions containing the compounds, as well as processes for their preparation. |
| US08053439B2 |
Benzophenone derivatives useful for inhibiting formation of microtubule
Disclosed herein are novel benzophenone derivatives represented by formula I, a pharmaceutically acceptable salt thereof, a hydrate thereof or a solvate thereof, a pharmacological composition containing the same, and a use of the composition as therapeutic drugs. The benzophenone derivatives have an inhibition activity of microtubule formation and can be used to treat a normal proliferative state of a malignant tumor by killing the actively proliferating cells. |
| US08053438B2 |
Pyrazine compounds as phosphodiesterase 10 inhibitors
Pyrazine compounds, and compositions containing them, and processes for preparing such compounds. Provided herein also are methods of treating disorders or diseases treatable by inhibition of PDE10, such as obesity, non-insulin dependent diabetes, schizophrenia, bipolar disorder, obsessive-compulsive disorder, and the like. |
| US08053434B2 |
Kinase inhibitors and their uses
The present disclosure provides compounds that inhibit protein kinases, such as JAK, Axl, or Syk kinases, compositions comprising the compounds and methods of using the compounds to inhibit protein kinase and treat and/or prevent diseases associated with inappropriate kinase activity. The compounds of the present invention are according to structural formula (I): or a salt or N-oxide thereof, wherein B is selected from |
| US08053433B2 |
Pyrrolo[2,3-b]pyridin-4-yl-amines and pyrrolo[2,3-b]pyrimidin-5-yl-amines as janus kinase inhibitors
The present invention provides pyrrolo[2,3-b]pyridine-4-yl amines pyrrolo[2,3-b]pyrimidin-4-yl amines that modulate the activity of Janus kinases and are useful in the treatment of diseases related to activity of Janus kinases including, for example, immune-related diseases and cancer. |
| US08053432B2 |
Cyclic hydroxylamine as psychoactive compounds
A compound of formula (I): in which X represents O or CH2; R3 and R4 each independently represent hydrogen or C1-6 alkyl; p represent 0 or 1; and R represents a five- or six-membered saturated or unsaturated ring selected from: formula (II), (III) and (IV); or R represents a five- or six-membered oxo-substituted unsaturated ring selected from: (V) and (VI); wherein R1 and R2 together represent an oxo group, or R1 and R2 each represent hydrogen, methoxy or ethoxy, or R1 and R2 together with the interjacent carbon atom represent a 1,3-dioxolane or 1,3-dioxane ring, attached via the 2 position and optionally bearing one or more methyl or ethyl groups; or a salt thereof, is suitable for the treatment of anxiety and depression. |
| US08053430B2 |
Treatment of renal cell carcinoma
Methods are provided of treating renal cancer by administration of certain 3,3′,4,4′-tetrahydroxy-2,2′-bipyridine-N,N′-dioxide compounds, especially 3,3′,4,4′-tetrahydroxy-2,2′-bipyridine-N,N′-dioxide (Orellanine), using particular administration protocols and dosing regimens, as well as pharmaceutical compositions suitable for use in the treatment methods that are provided. |
| US08053423B2 |
Method of preparing cross-linked bioactive hydrogel matrices
The present invention is directed to a stabilized cross-linked hydrogel matrix comprising a first high molecular weight component and a second high molecular weight component that are covalently linked, and at least one stabilizing or enhancing agent, wherein the first high molecular weight component and the second high molecular weight component are each selected from the group consisting of polyglycans and polypeptides. This stabilized hydrogel matrix may be prepared as bioactive gels, pastes, slurries, cell attachment scaffolds for implantable medical devices, and casting or binding materials suitable for the construction of medical devices. The intrinsic bioactivity of the hydrogel matrix makes it useful as a gel or paste in multiple applications, including as a cell attachment scaffold that promotes wound healing around an implanted device, as gels and pastes for induction of localized vasculogenesis, wound healing, tissue repair, and regeneration, as a wound adhesive, and for tissue bulking. |
| US08053422B2 |
Anti-cancer oligodeoxynucleotides
It is disclosed herein that suppressive ODNs are of use for preventing or delaying the formation of a tumor, reducing the risk of developing a tumor, treating a tumor, preventing conversion of a benign to a malignant lesion, or preventing metastasis. In some embodiments, methods are disclosed herein for treating, preventing or reducing the risk of developing a tumor, such as esophageal, gastrointestinal, liver, lung, skin and colon tumors or a mesothelioma. Generally, the methods disclosed herein include selecting a subject for treatment and administering to the subject a therapeutically effective amount of one or more suppressive ODN. In some examples, additional agents can also be administered to the subject of interest. |
| US08053419B2 |
Synthetic genes and genetic constructs
The present invention relates generally to synthetic genes for modifying endogenous gene expression in a cell, tissue or organ of a transgenic organism, in particular a transgenic animal or plant. More particularly, the present invention provides novel synthetic genes and genetic constructs which are capable of repressing delaying or otherwise reducing the expression of an endogenous gene or a target gene in an organism when introduced thereto. |
| US08053414B2 |
Methods of using B7-DC molecules to induce or enhance an immune response
A novel costimulatory protein molecule, B7-DC, which is a member of the B7 family, is described as is DNA coding therefor and expression vectors comprising this DNA. B7-DC protein, fragments, fusion polypeptides/proteins and other functional derivatives, and transformed cells expressing B7-DC are useful in vaccine compositions and methods. Compositions and methods are disclosed for inducing potent T cell mediated responses that can be harnessed for anti-tumor and anti-viral immunity. |
| US08053412B2 |
NELL-1 peptides
Recombinant NELL peptides and methods of preparing the same are disclosed. |
| US08053407B2 |
Methods of treating neurological conditions with hematopoeitic growth factors
The present invention relates to a method of treating a neurological condition in a mammal by administering at least one hematopoietic growth factor. |
| US08053403B2 |
Cleaning compositions
The subject of the invention is a composition comprising (i) from 10% to 25% by weight of 1,1,1,3,3-pentafluorobutane, preferably 16% to 24% by weight of 1,1,1,3,3-pentafluorobutane; (ii) from 62% to 70% by weight of trans-dichloroethylene, preferably from 63% to 68% by weight of trans-dichloroethylene, (iii) from 10% to 21% by weight of nonafluoromethoxybutane, preferably from 11% to 17% by weight of nonafluoromethoxybutane; and; (iv) from 1% to 4% by weight of nonafluoroethoxybutane, preferably from 2% to 4% by weight of nonafluoroethoxybutane. The subject matter of the invention is also to the use of said composition as a cleaning, solvent, degreasing, defluxing or drying agent. |
| US08053398B2 |
Lubricant compositions, condom products and methods of making same
Warming personal lubricant compositions, condom products including such compositions and methods of making such condom products are disclosed. The present warming lubricant compositions include at least about 50% by weight of a polyalkylene glycol component, preferably including at least two portions of different molecular weights, and an effective amount of a viscosity inducing component. |
| US08053393B2 |
Aqueous herbicidal composition based on a suspension concentrate comprising herbicides and safeners
The present invention relates to an aqueous herbicidal composition based on a suspension concentrate comprising a herbicidally active compound of the formula (I), a safener of the formula (II) and optionally a herbicidally active compound of the formula (III) In these formulae, R1, R2, R3 and R4 independently of one another are methyl or ethyl; R5 is isopropyl or cyclopropyl; R6 is hydrogen or chlorine; Q is cyclohexane-1,3-dion-2-yl, isoxazol-4-yl or pyrazol-4yl; and R7, R8 and R9 are hydrogen, halogen or various organic radicals. |
| US08053389B2 |
Heat-sensitive transfer image-receiving sheet
A heat-sensitive transfer image-receiving sheet, having, on a support, at least one layer containing an organic hollow polymer, wherein the layer containing the organic hollow polymer includes at least one surfactant selected from the group consisting of an anionic surfactant and a nonionic surfactant. |
| US08053383B2 |
Light-amplifying glass
To provide a light-amplifying glass capable of increasing absorption of Yb3+. A light-amplifying glass to be used for amplifying light having a wavelength of 1.0 to 1.2 μm, which comprises, as represented by mol % based on the following oxides, from 30 to 55% of Bi2O3, from 25 to 50% of either one, or both in total, of SiO2 and B2O3, from 12 to 27% of either one, or both in total, of Al2O3 and Ga2O3, from 0 to 4% of La2O3 and from 0.1 to 4% of Yb2O3 and which contains substantially no Er2O3. An optical waveguide having such a light-amplifying glass as a core. |
| US08053379B2 |
Polyester woven fabric
A polyester garment material including a set of 100% polyester warp yarns and a set of 100% polyester weft yarns, wherein the warp and weft yarns are interlaced to form the garment material. The warp and weft yarns comprise of air-jet spun polyester fibers that wisk moisture away from an individual wearing the garment material and, therefore, provide a quick-drying, breathable garment material that simulates the absorbency characteristics of cotton yarns. The set of polyester warp yarns and the set of polyester weft yarns may be interlaced to form a ground fabric, where a set of polyester pile yarns may then be interlaced with the ground fabric so that the pile yarns extend outwardly (e.g., forming a plurality of loops) on the front side, back side, or both sides of the ground fabric. |
| US08053374B2 |
Method of manufacturing a metal wiring structure
In a method of manufacturing a metal wiring structure, a first metal wiring and a first barrier layer are formed on a substrate, and the first barrier layer is nitridated. An insulating interlayer is formed on the substrate so as to extend over the first metal wiring and the first barrier layer. Part of the insulating interlayer is removed to form a hole exposing at least part of the first metal wiring and part of the first barrier layer. A nitidation plasma treatment is performed on the exposed portion of the first barrier layer. A second barrier layer is formed along the bottom and sides of the hole. A plug is formed on the second barrier layer to fill the hole. |
| US08053373B2 |
Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX)
A semiconductor-on-insulator structure includes a buried dielectric layer interposed between a base semiconductor substrate and a surface semiconductor layer. The buried dielectric layer comprises an oxide material that includes a nitrogen gradient that peaks at the interface of the buried dielectric layer with at least one of the base semiconductor substrate and surface semiconductor layer. The interface of the buried dielectric layer with the at least one of the base semiconductor substrate and surface semiconductor layer is abrupt, providing a transition in less than about 5 atomic layer thickness, and having less than about 10 angstroms RMS interfacial roughness. A second dielectric layer comprising an oxide dielectric material absent nitrogen may be located interposed between the buried dielectric layer and the surface semiconductor layer. |
| US08053372B1 |
Method of reducing plasma stabilization time in a cyclic deposition process
The present invention relates to an enhanced cyclic deposition process suitable for deposition of barrier layers, adhesion layers, seed layers, low dielectric constant (low-k) films, high dielectric constant (high-k) films, and other conductive, semi-conductive, and non-conductive films. The deposition enhancement is derived from ions generated in a plasma. The techniques described reduce the time required for plasma stabilization, thereby reducing deposition time and improving efficiency. |
| US08053371B2 |
Apparatus and methods for selective removal of material from wafer alignment marks
A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. |
| US08053365B2 |
Methods for forming all tungsten contacts and lines
Novel low-resistivity tungsten film stack schemes and methods for depositing them are provided. The film stacks include a mixed tungsten/tungsten-containing compound (e.g., WC) layer as a base for deposition of tungsten nucleation and/or bulk layers. According to various embodiments, these tungsten rich layers may be used as barrier and/or adhesion layers in tungsten contact metallization and bitlines. Deposition of the tungsten-rich layers involves exposing the substrate to a halogen-free organometallic tungsten precursor. The mixed tungsten/tungsten carbide layer is a thin, low resistivity film with excellent adhesion and a good base for subsequent tungsten plug or line formation. |
| US08053356B2 |
Interconnect structure for semiconductor devices
A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, thereby forming a copper-metal cap layer. In another embodiment, a copper-metal silicide cap is provided. In this embodiment, silane is introduced before, during, or after a process gas is introduced, the process gas comprising germanium, arsenic, tungsten, or gallium. Thereafter, an optional etch stop layer may be formed, and a second dielectric layer may be formed over the etch stop layer or the first dielectric layer. |
| US08053353B2 |
Method of making connections in a back-lit circuit
A method for forming, on a surface of a thinned-down semiconductor substrate, a contact connected to a metal track of an interconnect stack formed on the opposite surface of the thinned-down substrate, including the steps of: forming, on the side of a first surface of a substrate, an insulating region penetrating into the substrate and coated with a conductive region and with an insulating layer crossed by conductive vias, the vias connecting a metal track of the interconnect stack to the conductive region; gluing the external surface of the interconnect stack on a support and thinning down the substrate; etching the external surface of the thinned-down substrate and stopping on the insulating region; etching the insulating region and stopping on the conductive region; and filling the etched opening with a metal. |
| US08053352B2 |
Method and mesh reference structures for implementing Z-axis cross-talk reduction through copper sputtering onto mesh reference planes
A method and mesh reference applications are provided for implementing Z-axis cross-talk reduction. A mesh reference plane including a grid of mesh traces is formed with the mesh traces having selected thickness and width dimensions effective for reference current-flow distribution. An electrically conductive coating is deposited to fill the mesh electrical holes in the mesh reference plane to reduce cross-talk, substantially without affecting mechanical flexibility. |
| US08053351B2 |
Method of forming at least one bonding structure
A method of forming at least one bonding structure may be provided. A ball may be formed on the front end of a wire outside a capillary. The capillary may be moved downwardly to form a preliminary compressed ball on a first pad using the ball. The capillary may be moved upwardly to form a neck portion on the preliminary compressed ball using the preliminary compressed ball and the wire. The capillary may be moved obliquely and downwardly to form a compressed ball. The capillary may extend the wire from the compressed ball to a second pad. |