Document Document Title
US08040566B2 Image generating device, image generating method and printing device
An image generating method comprises the steps of extracting elliptical shape parameters (specifying an elliptical shape), gradation pattern parameters (specifying a gradation pattern to be drawn in the elliptical shape) and drawing area parameters (specifying a drawing area) from an instruction for drawing an elliptical radial gradation, generating a transformation matrix for transforming the elliptical shape into a perfect circular shape based on the elliptical shape parameters, calculating an inverse matrix of the transformation matrix, transforming the gradation pattern parameters using the transformation matrix, transforming a first area containing the drawing area using the transformation matrix, drawing a radial gradation in the perfect circular shape in a second area containing the transformed first area based on the transformed gradation pattern parameters, and generating the elliptical radial gradation for the drawing area by inversely transforming the second area (in which the radial gradation has been drawn) using the inverse matrix.
US08040565B2 Image processing device, image forming apparatus including same, image processing method, and image processing program
An image processing device including an image signal reception unit configured to receive an image signal of an image to be processed; a density reduction area detector configured to detect a density reduction area satisfying predetermined image density reduction requirements in the image to be processed based on the image signal; a specific image area detector configured to detect a specific image area satisfying predetermined specific image requirements different from the predetermined image density reduction requirements in the image to be processed based on the image signal; and a density controller configured to reduce density of the density reduction area detected by the density reduction area detector in a non-specific image area other than the specific image area detected by the specific image area detector, and to not reduce density of the density reduction area in the specific image area.
US08040558B2 Apparatus and method for shift invariant differential (SID) image data interpolation in fully populated shift invariant matrix
An image processing system for interpolating image data is comprised of a shift invariant point determining device, an illumination averager, a second order differentiator, and color data calculator. The shift invariant point determining device ascertains shift invariant points within the mosaic color element array pattern. The illumination averager determines average illumination values of clusters of a plurality of pixels. The second order differentiator determines a second order derivative of the average illumination values of the clusters of the plurality of pixels. The color data calculator determines color data for each of the plurality of pixels from the image data and second order derivative. A second order derivative scaler multiplies the second order derivative by a scaling factor for selectively smoothing and sharpening the second order derivative. A color data averager averages color data values of adjacent pixels to a resolution of the image data.
US08040556B2 Image data generating method, printing method, image data generating apparatus, and printer
A head in a printer has an outlet row including a plurality of outlets arranged in a width direction perpendicular to a scan direction. A threshold matrix is stored in a main body control part, and sleep elements representing sleep of ejection of ink are arranged in the threshold matrix at a regular interval in each element row which is a plurality of elements arranged in a row direction corresponding to the width direction. The threshold matrix is compared with a grayscale original image to generate data of a halftone image where during printing, the number of outlets included in each outlet group not brought into sleep state continuously in the width direction is made equal to or larger than 1 and equal to or smaller than a predetermined number. Thus, it is possible to easily suppress occurrence of unevenness in a printed image, caused by cross talk between outlets.
US08040554B2 Method of revealing hidden content on a printed substrate using handheld display device
A method of revealing hidden content associated with a printed substrate using a handheld display device having touch-sensitive screen and a transceiver for sending and receiving digital information. The method comprises the steps of: imaging an area of the substrate containing printed content and generating image data using an optical sensor; determining interaction data using the image data, the interaction data identifying a substrate identity; retrieving display data comprising first data corresponding to the printed content and second data corresponding to the hidden content; and displaying, on the touch-sensitive screen, display information based on the display data. The display information includes first content corresponding to the printed content and second content corresponding to the hidden content, thereby revealing the hidden content on the screen.
US08040552B2 Variable data image generating device, variable data image forming system and computer readable storage medium
There is provided a variable data image generating device including a plurality of first type image generating units that execute a first rendering instruction for a distributed record and generates a first type image corresponding to the record; a first type image memory that stores the first type image corresponding to each record generated by each of the first image generating units; a distributing unit that distributes a record in variable data to each of the first type image generating units; and a document image generating unit that executes a drawing program including one or more instructions for each record in the variable data, wherein the document image generating unit generates a document image for each record by obtaining the first type image corresponding to the record from the first type image memory and laying out the obtained image in response to the first rendering instruction in the rendering program.
US08040548B1 Automated creation of printed works having customized and/or personalized content
Disclosed are various embodiments for automatically creating printed works. A subset of electronic publications from a collection of electronic publications is periodically selected in at least one computing system. The selecting is directed at least in part by at least one rule predefined by a user. The subset of electronic publications includes at least two distinct electronic publications. A printed work that includes the subset of electronic publications is encoded for printing.
US08040545B2 Method and system for printing content according to print capabilities of image forming apparatuses using a device
A method and system are provided for printing content according to print capabilities of a network of image forming apparatuses using a device. At least one image forming apparatus forming a network with the device is searched and a list is provided of at least one extensible hyper text markup language (XHTML)-Print template, which can be processed by an image forming apparatus selected from among the searched image forming apparatuses. XHTML-Print data of content is created using an XHTML-Print template selected from the list of XHTML-Print templates and the created XHTML-Print data is transmitted to the selected image forming apparatus. The transmitted XHTML-Print data is analyzed and the content printed. Accordingly, printing is performed by supporting specific XHTML-Print templates for providing functions, differentiated according to types of image forming apparatus, as well as supporting limited XHTML-Print templates applicable to all image forming apparatuses.
US08040544B2 Image output system having image log recording function, and log recording method in image output system
An image output system includes input section for inputting an image or data, instruction acceptance section for accepting an instruction of outputting the input image or an image generated from the input data, image output section for outputting the instructed image, and log-recording section for recording an image log, including at least the image to be output and the result information of an output process for the image to be output, irrespective of whether or not the output of the instructed image has been completed successfully.
US08040543B2 Instruction file execution device, instruction file execution method and job flow system
An instruction file execution device which includes a receiver, a comparison section and a job execution section. The receiver receives an instruction file and a usable money amount, which instruction file describes a job flow which defines linking of a number of jobs. The comparison section compares an execution charge of a job being handled of the jobs of the instruction file received by the receiver with the usable money amount received by the receiver. If the comparison section determines that the usable money amount is greater than or equal to the execution charge, the job execution section executes the job being handled.
US08040542B2 Display system, information distributing apparatus, electronic device, and portable terminal
A display system is provided that can perform suitable procedure display in accordance with the respective operation statuses of a plurality of electronic devices. The display system is formed by connecting an electronic device, a portable terminal, and an information distributing apparatus through a network, and the electronic device has a description tool affixed to the device to indicate the electronic device information of the device and transmits the state information of the device to the information distributing apparatus. The portable terminal acquires the electronic device information of the electronic device from the description tool and transmits it to the information distributing apparatus and displays the returned operation procedure information. The information distributing apparatus registers the received state information of the electronic device and returns the specified procedure display information to the portable terminal based on the electronic device information received from the portable terminal and the registered state information.
US08040539B2 Method and system for mitigating errors when processing print stream data
A method and system for processing data indicative of pages of mailpiece content material, and for printing pages “on demand” for use in a mailpiece inserter. The method comprises the steps of: (i) transmitting data from the application software to a print processor along read and write paths and (ii) activating one of the write and read such that when one path is activated the other path is inactivated. The data is then rendered into a print control language (PCL) compatible with a printer integrated with the mailpiece inserter and printed for use therein. The method and system mitigates printing errors by eliminating synchronous access to the same data location within the spool file, i.e., by the application software/spooler along the write path and the print processor along the read path.
US08040537B2 Adaptive forced binary compression in printing systems
Forced compression halftone processes and forced compression techniques may be used to forcibly compress page raster images passed between a Digital Front End (DFE) processor and a Continuous Feed (CF) printer within a CF printing system. If a DFE processor determines that a compressed image size exceeds a static or dynamically predetermined threshold, the DFE processor may re-render the image using a “forced compression” halftone process, such as 2-to-1 forced compression, 4-to-1 forced compression, reduced resolution, etc. Once the page raster image has been re-rendered, the DFE processor may use a forced compression technique, which is complimentary to the applied “forced compression” halftone process to re-compress the page raster image. The approach allows page raster images to be compressed to meet interface bandwidth constraints associated with the physical interface between the DFE processor and CF print engine, thereby allowing otherwise unprintable jobs to be printed with reasonable quality.
US08040536B2 Image data communication in image processing system
An image processing apparatus comprises: a reception unit adapted to receive image data transmitted from a host computer; first and second communication units adapted to communicate with a second image processing apparatus different from the image processing apparatus; a determination unit adapted to determine a type of image data; and a decision unit adapted to decide, on the basis of determination by the determination unit, whether to use the first communication unit or the second communication unit to transfer the image data.
US08040535B2 Image forming apparatus, image forming system, recovery processing method, program, and storage medium
There is provided an image forming apparatus that can reduce the burden placed on the user by avoiding input errors and a complicated input operation when making settings for a color/black-and-white mixing operation and can perform a proper recovery even when a sheet determined to be abnormal is included in other sheets. Images are formed on sheets by an MFP 104 in accordance with an image forming job. The sheets on which the images have been formed are conveyed to a stacker tray 1207 detachably attached to the MFP 104. Information relating to the image forming job for the sheets conveyed to the stacker tray 1207 is written into a storage device 1202 provided in the stacker tray 1207.
US08040534B2 Image processing method and apparatus comprising an image processing in which a RIP process is performed on original image data
An image processing method in which a RIP process is performed on original image data to obtain raster data with a first resolution, and a smoothing process is performed through oversampling the obtained raster data to generate output image data with a second resolution which is smaller than the first resolution. The method is performed for recording an image on a recording medium by an inkjet recording device that performs the recording by discharging an ink drop on the recording medium from an inkjet head based on the output image data. Here, the first resolution in the RIP process for performing the smoothing process on the raster data is determined according to information that indicates the number of gradations corresponding to the number of ink drops selected in advance and the second resolution.
US08040523B2 Measurement method of chromatic dispersion of optical beam waveguide using interference fringe measurement system
The present invention relates to a measurement method of the chromatic dispersion of an optical waveguide using an optical interferometer with a broadband multi-wavelength light source and an optical spectrum analyzing apparatus, wherein one arm, called “reference arm” of the interferometer's two arms has an adjustable air spacing and the other arm, called “sample arm” can contain said optical waveguide to be measured, and including the following measurement and analysis steps: measuring interference spectra of the optical beam output exiting from the said interferometer with an optical spectrum analyzing apparatus when said optical waveguide is connected to said sample arm, and when said optical waveguide is not connected to said sample arm respectively; by adjusting the reference arm length for appearance of clear interference patterns; converting the wavelength-domain interference spectra into frequency-domain interference spectra and calculating phase difference values of the interference peaks of one of the spectra from a predetermined reference peak as a function of the frequency change by counting the interference peak (or valley) points; finding a Taylor series curve fit function for each set of the phase difference value data corresponding to each of the two interference spectra; and calculating a chromatic dispersion coefficient of the optical waveguide by using the coefficients of the Taylor series curve fit functions.
US08040521B2 Holographic condition assessment system for a structure including a semiconductor material
An improved condition testing system and method integrated into microelectronic circuits includes a structure including a semiconductor material with a target portion and a second portion for determining the presence and nature of various external (e.g. magnetic field, microwave, bioelectric or incident radiation) or internal stresses (e.g. binary circuit-state or analog signal recognition) or conditions acting upon the material. The target portion has a first feature when at least one of the following occurs: an external force is received by the second portion of the structure and an internal condition occurs in the target portion. The system and method further has a test grating determined and shaped and located to produce a first optical interference pattern when the target portion and the grating are exposed to non-invasive illumination and when the target portion has the first feature. Further implementations use one or more diffraction structures, holograms, or holographic optical elements spaced apart from the circuit or electronic device under test to non-invasively optically test in parallel two or more targeted conditions having a shape, size, structure, intensity or orientation of the stress acting upon the material.
US08040520B2 Device for detecting the edges of a workpiece, and a laser beam processing machine
A device for detecting the edges of a workpiece held on the chuck table of a processing machine, having a beam oscillation means for oscillating a detection beam, an objective lens for focusing the detection beam oscillated from the beam oscillation means, and a reflected light detection means for detecting the reflected light of the detection beam applied through the objective lens, wherein the beam oscillation means oscillates the detection beam in such a manner that the optical axis of the detection beam becomes parallel to the center axis of the objective lens at a position offset from the center axis; and the reflected light detection means detects the edge of the workpiece based on a positional difference between reflected light obtained when the detection beam applied through the objective lens is reflected on an area where the workpiece is not existent and refracted by the objective lens and reflected light obtained when the detection beam is reflected on the workpiece and refracted by the objective lens.
US08040515B2 Fluorescence detection apparatus and method, and prism used therein
In order to provide a fluorescence detection apparatus having a high sensitivity, a high processing capacity and a competitive edge in cost, the fluorescence detection apparatus according to this invention irradiate the sample with light so that the aspect ratio of the form of the irradiated region by light on the arrangement surface of the sample may be 1±0.1. The preferable form of irradiate region is not limited to one and varies to some extent depending on the item to be optimized. The form of irradiated region may be, for example, a circle, an equilateral triangle, a square, a regular hexagon and the like.
US08040508B2 Laser-based apparatus and method for measuring agglomerate concentration and mean agglomerate size
Apparatuses, methods, and systems for measuring mean particle size and concentration of a polydispersion of agglomerates are disclosed. In one embodiment, the apparatuses include a light source; a focusing lens to form a probe volume; a first light detector positioned at a first angular position from the beam of light; and a second light detector positioned at a second angular position from the first direction of the beam of light, the mean particle size and concentration being determined using nearly invariant functions of a ratio of the light scattered measured by the first and second detectors.
US08040504B2 Defect inspecting method and defect inspecting apparatus
Provided is a method and apparatus for inspecting a defect of a shape formed on a substrate. Primary inspection is sequentially performed on specific patterns in a plurality of divided regions of the substrate by using an optical method, and one or more regions on which secondary inspection is to be performed are selected from the regions. One or more defects are detected by performing the secondary inspection using an electron beam on the selected regions.
US08040502B2 Optical inspection of flat media using direct image technology
The invention is directed at a method and system of detecting defects in a transparent media such as a piece of glass. The method comprises the steps of transmitting light from a light source towards the transparent media and then detecting defects in the transparent media by scanning the light as it is reflected or passes through the transparent media. The method and system may operate in any one of a dark field mode, a bright field mode for scanning or a bright field mode for inspecting.
US08040501B2 Image forming apparatus
An image forming apparatus includes a carrier, a forming device forming a mark on the carrier, a sensor, a determiner, a changer, an evaluator and a controller. The sensor includes a light emitting device that emits light toward the carrier and the light receiving device that receives light reflected from the carrier or the mark and outputs a light reception signal corresponding to the received light quantity. The determiner determines a position of the mark based on the light reception signal. The changer changes sensor sensitivity by changing a quantity of light from the light emitting device or sensitivity of the light receiving device. The evaluator obtains the light reception signals multiple times and evaluates a degree of closeness between an average level of the light reception signals and a target level. The controller controls the changer to change the sensor sensitivity of the sensor according to an evaluation result.
US08040499B2 Transmitted light refractometer
A transmitted light refractometer allows high measurement accuracy across a broad measurement range, even under difficult measuring conditions. The transmitted light refractometer can be connected to a process simply via a single access. In accordance with advantageous features, the transmitted light refractometer covers a measurement range for all practically relevant media and includes integrated temperature compensation. A reversing optics unit is arranged relative to an illumination optics unit such that the reversing optics unit deflects a parallel beam through the process liquid and a measurement prism into the transmitted light refractometer back to the side from which it was radiated. The illumination optics unit, an imaging optics unit, and a detector plane are arranged on the light radiation side such that only one process access is needed.
US08040498B2 Method and system for identification of changes in fluids
Method and system for identification of a changed state of a fluid with respect to a reference state of the same fluid, the fluid having an optical parameter changing with the change of the state of the fluid. The method comprises: a) providing an optical arrangement including a transparent enclosure with a portion of the fluid, and an object observable through the optical arrangement, the arrangement being designed such that an image of the object in the changed state of the fluid is optically distinctive from an image of the object in the reference state of the fluid due to change of the optical parameter, at least one of the images being predetermined; b) illuminating the object with diffuse light; c) observing a current image of the object though the optical arrangement along an optical axis; and d) comparing the current image to the predetermined image to identify the changed state of the fluid. The comparison and the identification may be performed by eye or by a sensor with a logical circuit.
US08040497B2 Method and test structure for estimating focus settings in a lithography process based on CD measurements
By encoding process-related non-uniformities, such as different height levels, which may be caused by CMP or other processes during the fabrication of complex device levels, such as metallization structures, respective focus parameter settings may be efficiently evaluated on the basis of well-established CD measurement techniques.
US08040495B2 Method and device for optical analysis of a tissue
The invention relates to a method and device for analyzing a tissue (70), which comprises: —irradiating the tissue (70) with light focused on a focal region (40); —collecting light coming back from the focal region (40) into a first detection device (100A), the first detection device (100A) being arranged to only collect the light coming back from the focal region (40), on a first detection area (140A), by confocal spectroscopy, in order to generate a first signal, containing information on an optical property of the tissue (70); —collecting light, scattered from the focal region (40) to at least a second region (60), coming back from the second region (60), into a second detection device (100B), the second detection device (100B) being arranged to only collect the light coming back from the second region (60), on a second detection area (140B), in order to generate a second signal, —using the first and second signals in order to get information on the scattering and/or absorption coefficients of the tissue (70) in the region between the focal region (40) and the second region (60). Thanks to the invention, information can be gathered on the scattering and/or absorption properties of the tissue.
US08040493B2 Thermal flow meter
A thermal flow meter for use in dialysis is described, that uses a thermal wave to generate a signal in the fluid for which the flow rate is to be measured. The phase angle of the thermal wave signal changes when traversing downstream. The phase difference between the signals received downstream, compared with a reference excitation source signal is measured, and used to determine the flow rate of the fluid.
US08040490B2 Liquid immersion exposure apparatus, exposure method, and method for producing device
A liquid immersion exposure apparatus includes: a first optical member having an exit surface via which an exposure beam exits; a first movable body movable with respect to the first optical member while holding a substrate; a cover member movable with movement of the first movable body and capable of retaining a liquid in a space formed between the exit surface and the cover member when the cover member is arranged at a position opposite to the exit surface; a first holding portion provided on the first movable body and holding the cover member; and a transport section removing the cover member from the first holding portion and moving the cover member independently from the first movable body. Upon exposing the substrate through the liquid, it is possible to suppress the deterioration of the performance which would be otherwise caused due to the cover member.
US08040484B2 Liquid crystal display panel having a constant cell gap and method of making the same
An LCD panel that provides improved image quality by preventing light leakage and maintaining constant cell gap is provided, along with a method of making the LCD panel. The LCD panel includes a first member that has a column spacer, a second member that is positioned substantially parallel to the first member, and a polymer layer disposed between the column spacer and the second member. The polymer layer combines the column spacer with the second member. A liquid crystal layer is disposed between the first member and the second member.
US08040481B2 In-plane switching mode liquid crystal display device having first and second common electrode connection lines and first and second pixel electrode connection linesbeing formed on the same layer
An in-plane switching mode liquid crystal display device includes a first substrate; a gate line disposed in a first direction on the first substrate; a data line disposed in a second direction on the first substrate, the data line crossing the gate line to define a pixel region; pixel electrodes and common electrodes disposed in the first direction in the pixel region, the pixel electrodes and the common electrodes generating an in-plane electric field within the pixel region; first and second common lines disposed parallel to the data line at right and left sides of the pixel region; a first common electrode connection line connecting at least two common electrodes and forming a first common electrode overlapping region by overlapping the first common line; and a second common electrode connection line connecting at least two other common electrodes and forming a second common electrode overlapping region by overlapping the second common line, wherein the first common electrode overlapping region and the second common electrode overlapping region have substantially the same area.
US08040476B2 Display device and method of producing the same
The display device includes a pair of insulating substrates arranged so as to be opposed, a bonding layer, and a strain suppressing plate. The bonding layer is provided on the outer surface side of one insulating substrate. The strain suppressing plate has rigidity higher than that of the insulating substrate to suppress the strain caused by curving the insulating substrate. The strain suppressing plate is fixed to the insulating substrate by the bonding layer.
US08040474B2 Mold and method of manufacturing display device
A mold for a display device, comprising a supporting frame; at least one pattern forming part provided on a surface of the supporting frame; and a protrusion projecting from the supporting frame and disposed along the circumference of the pattern forming part, an inside wall of the protrusion toward the pattern forming part standing upright from the surface of the supporting frame.
US08040473B2 Multilayer black-matrix-equipped filter and liquid crystal display
A black-matrix-equipped filter including a black matrix adapted to selectively shield light being incident from a light introduction side, and to transmit the unshielded light to a light output side, wherein the black matrix includes: a light shielding layer; and a first reflection inhibition layer formed at the light introduction side of the light shielding layer.
US08040472B2 Large pixel multi-domain vertical alignment liquid crystal display using fringe fields
A multi-domain vertical alignment liquid crystal display that does not require physical features on the substrate (such as protrusions and ITO slits) is disclosed. Each pixel of the MVALCD is subdivided into color components, which are further divided into color dots. The polarity of the color dots are arranged so that fringe fields from adjacent color dots causes multiple liquid crystal domains in each color dot. Specifically, the color dots of a pixel are arranged so that each color dot of a first polarity has four neighboring pixels of a second polarity. Thus, a checkerboard pattern of polarities is formed. Furthermore, the checkerboard pattern is extended across multiple pixels in the MVALCD. In addition, many display unit include multiple pixel designs to improve color distribution or electrical distribution.
US08040471B2 Liquid crystal display including color filters, and manufacturing method thereof
A liquid crystal display includes a first display panel including a first substrate, and first and second color filters disposed on the first substrate and adjacent to each other, a second display panel including a second substrate facing the first display panel and a first spacer disposed on the second substrate, and a liquid crystal layer disposed between the first and second display panels. The first color filter includes a first protrusion protruded toward and overlapped with the second color filter. The first spacer faces the first protrusion, and the first and second display panels contact each other at a location area of the first spacer.
US08040468B2 Liquid crystal display device
The invention relates to a liquid crystal display device comprising a retardation layer wherein an in-plane slow axis of the retardation layer is within the direction of 90±40 degrees relative to an absorption axis of the polarizing layer disposed at a closer position to the retardation layer; Re(550) meets following relation, 25 nm≦Re(550)≦230 nm; R[40°] of the retardation layer which is measured for incident light in a direction tilted by 40 degrees toward the tilt direction of the retardation layer relative to the normal line of the retardation layer meets following relation, 0 nm≦R[40°]≦300 nm; and R[+40°] of the retardation layer and retardation R[−40°] of the retardation layer meet following relation, 1
US08040465B2 External light illumination of display screens
Apparatus and methods for harnessing external light to illuminate a display screen of an electronic device are provided. The display screen may be illuminated using a light harness, a reflector, a translucent surface, or any combination thereof. The light harness may be cylindrical or hexahedral. The light harness may be coupled to an external light input or a collector. The reflector may be repositioned toward or away from the display screen to reflect external light toward the display screen. The translucent surface may allow external light to pass through it to illuminate the display screen. The translucent surface may protect the rear face of the display screen, or the rear face of the display screen may itself be translucent.
US08040462B2 Liquid crystal display device
The present invention can provide an optical device, an optical uniform device, an optical sheet and a backlight unit and a display apparatus. In the present invention, a lamp image can be removed by uniformly emitting incident light from a plurality of light sources. Further, even if a distance between a light source and an optical device and between a light source and an optical uniform device are short, warpage due to heat generated from a light source does not occur.
US08040461B2 Compound diffusion plate structure, backlight module, and liquid crystal display
A liquid crystal display, comprising: a liquid crystal display panel and a backlight module. The backlight module comprising: a reflection unit, a light emitting unit, and a compound diffusion plate structure. The light emitting unit has a plurality of light emitting components installed within the installation space of the reflection unit. The compound diffusion plate structure is placed on one side of the light emitting unit, comprising: a body unit and a printing micro diffusion unit. The body unit has a main layer, and a plurality of micro diffusion particles formed inside the body unit, allowing light to diffuse within the body unit. The printing micro diffusion unit has a plurality of convex lens units formed on a light entrance plane or a light exit plane of the body unit by means of printing.
US08040455B2 Display device and information processing device having the same
A display device including a display module and an information processing device having the same is described herein. The display device includes a display module, a supporting frame, and a fixing frame. The supporting frame supports a rear face of the display module corresponding to a peripheral area, a side face of the display module, and includes a coupling portion used for connecting the fixing frame to an information input device. A rear housing receives the display device. A front housing is connected to the rear housing and has an opening to expose a display screen of the display module.
US08040452B2 Manufacturing method for a thin film transistor-liquid crystal display having an insulating layer exposing portions of a gate island
A pixel unit of TFT-LCD array substrate and a manufacturing method thereof is disclosed. In the manufacturing method, besides a first insulating layer and a passivation layer, a second insulating layer is adopted to cover the gate island, and forms an opening on the gate island to expose the channel region, the source region and the drain region of the TFT. A gray tone mask and a photoresist lifting-off process are utilized to perform patterning, so that the TFT-LCD array substrate can be achieved with just three masks.
US08040450B2 Liquid crystal electro-optic device
In a horizontal electric field drive type liquid crystal electro-optic device wherein a liquid crystal material is driven by controlling the strength of an electric field parallel to a substrate, noncontinuity of the electric field strength around each pixel electrode is minimized and thereby the occurrence of flaws in the orientation of the liquid crystal material and dispersion in operation are reduced and a construction having improved display characteristics and a method of manufacturing the same are provided. In a horizontal electric field drive type liquid crystal electro-optic device wherein a gate electrode 403, a source electrode 407, a drain electrode 408, a semiconductor film 406 and a common electrode 404 are formed on a glass substrate and a liquid crystal material is driven by controlling the strength of an electric field substantially parallel to the glass substrate, the electrodes and the semiconductor film are made curved, for example semi-circular or semi-elliptical, in sectional profile. These curved sectional profiles can be formed by suitably selecting and combining various patterning and etching methods.
US08040449B2 Thin film transistor array panel and manufacturing method of the same
A thin film transistor array panel includes a substrate; a gate electrode formed on the substrate; a data line formed on the substrate; a gate insulating layer formed on the data line and the gate electrode, and having a first contact hole exposing the gate electrode, and a second contact hole exposing the data line; a gate line intersecting the data line, and connected to the gate electrode through the first contact hole; a semiconductor formed the gate insulating layer, and including a channel of a thin film transistor; a source electrode connected to the data line through the second contact hole; a drain electrode opposite to the source electrode with respect to the channel on the semiconductor; a passivation layer having a third contact hole exposing the drain electrode; and a pixel electrode connected to the drain electrode through the third contact hole are included.
US08040447B2 Method of driving display device comprising electrically connecting a control capacitor to the second pixel electrode and changing the voltage of the first pixel electrode by changing a voltage of a first storage line
A display device includes a pixel comprising first and second pixel electrodes receiving respective pixel voltages; a control capacitor electrically connected to the second pixel electrode by a switching operation in order to change the voltage of the second pixel electrode; and a first storage line overlapping the first pixel electrode and having a variable voltage in order to change the voltage of the first pixel electrode. A method of driving a display device includes providing a pixel voltage to each of first and second pixel electrodes of a pixel; and then changing the voltages applied to the first pixel electrode and/or the second pixel electrode to cause the first and second pixel electrodes to simultaneously be at different voltages.
US08040446B2 Thin film transistor array panel for liquid crystal display and method for manufacturing the same
In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
US08040443B2 Method for stacking thermal actuators with liquid crystal elastomer
A method comprising arranging a first heating element on a first liquid crystal elastomer, arranging a first layer of thermal paste on the first heating element, and arranging a second liquid crystal elastomer on the first layer of thermal paste.
US08040436B2 Device and method for modifying video image of display apparatus
A method for modifying a video image of a display apparatus, the method including dividing received broadcast signals into a video signal, an audio signal, and supplementary information, converting the video signal to a video image and displaying the converted video image, displaying a video image modifying menu for allowing a user to remotely change a size or aspect ratio for the displayed video image, and adjusting at least one of the size and aspect ratio of the displayed video image based on the supplementary information.
US08040432B2 Information processing equipment, method, provision system and computer program product that synthesizes content by adopting a mean value
Disclosed are information processing equipment and an information processing method, a provision system and method, and a program that are intended to readily produce a content of higher quality, wherein, an acquisition unit acquires an interpolative content with which a main content is interpolated in a spatial or temporal direction or with which gray levels into which the main content is quantized are interpolated, and, a synthesis unit synthesizes the main content and interpolative content so that the first content will be interpolated in the spatial or temporal direction or the gray levels into which the first content is quantized will be interpolated.
US08040429B2 Electronic apparatus having autofocus camera function
An electronic apparatus including a drive mechanism, a signal processing section, an image pickup lens, an image pickup device and a focus control section is described. The drive mechanism changes a position of the image pickup lens relative to the image pickup device. The image pickup device outputs an electric signal of an image at each of a plurality of relative positions. The signal processing section processes the electric signal and generates a digital image signal corresponding to the plurality of relative positions. The focus control section extracts, from the digital image signal, high-frequency components for pixels selected from a focus area set in the image of the digital image signal, calculates a focus evaluation value corresponding to each relative position, identifies a maximum focus evaluation value among the calculated focus evaluation values, and moves the image pickup lens to the relative position that provides the maximum focus evaluation value.
US08040428B2 Method for focus control
A camera or other optical system is focused by generating a plurality of digital images each obtained with a different focus setting of the optical system. These images are analysed to generate for each image a score (S) by comparing first groups of pixels chosen from the image with second groups chosen from the image such that the pixels of each second group have same respective positional relationships with respect to one another as the pixels of the first group with which it is compared have to one another, the score (S) being a function of the number of matches obtained with said comparisons. The focus setting that gives the score corresponding to the largest number of matches is chosen.
US08040427B2 Imaging device and autofocusing method
In a digital video camera according to one aspect of the invention, a black level of a video signal is specified during an initialization process. An autofocusing process obtains an AF evaluation value and a brightness evaluation value at each current position of a compensator lens and updates a maximum AF evaluation value and a corresponding position of the compensator lens based on the obtained data. The autofocusing process also detects an AGC gain, computes an offset value of the AF evaluation value from the detected AGC gain, the obtained brightness evaluation value, and the specified black level, and calculates a threshold value from the computed offset value and the updated maximum AF evaluation value. When the obtained AF evaluation value is less than the calculated threshold value, the lens position corresponding to the maximum AF evaluation value is specified as the focus position. When the obtained AF evaluation value is not less than the calculated threshold value, on the other hand, this series of processing is repeated with a position shift of the compensator lens by a preset number of steps. This arrangement ensures efficient and precise hill-climbing autofocus control in view of the potential influence of high frequency noise in the digital video camera or another electronic camera.
US08040425B2 Imaging apparatus and imaging method using ND filters for color-temperature correction
An imaging apparatus includes one or a plurality of optical filters, an image sensor, an imaging signal processing part, a detecting part, and a control part. The one or the plurality of optical filters are selectively arranged in a path of an optical system for obtaining imaging light. The image sensor is provided for converting the imaging light obtained through the optical system into an imaging signal. The imaging signal processing part is provided for subjecting the imaging signal from the image sensor to a color-temperature correction processing. The detecting part is provided for detecting a type of the one or the plurality of optical filters arranged in the optical system. The control part is provided for adjusting a color temperature that is set at the imaging signal processing part to a color temperature defined for each filer detected by the detecting part.
US08040424B2 Mobile communication device with camera mode and mobile communication mode and operation method thereof
A mobile communication device with camera comprises a mobile communication module, a camera module, a storage unit, a display unit, and a switching module. The mobile communication module has a first transmission interface, the camera module has a second transmission interface; image data processed that are outputted by means of the camera module via the second transmission interface, and next the image data outputted that are received by the mobile communication module via the first transmission interface, and next the image data received that are transmitted to the storage unit to be stored and to the display unit to be displayed. The switching module is installed in the mobile communication module for switching to the camera module operation or the mobile communication module operation.
US08040420B2 Camera
The camera according to this invention comprises an L-shaped frame that is capable of changing the size or aspect ratio of the viewfinder by relative movement, a back-face image-pickup device for photographing an image of the eye of the photographer, and a photographing optical system for forming the image of the subject image to the internal CCD, analyzes the image captured by the back-face image-pickup device and calculates the distance and direction to the eye of the photographer from the center of the viewfinder, and based on the calculated information and the size or aspect ratio information of the viewfinder, the photographer performs optical zooming or shifting of the photographing optical system, or performs electronic zooming or shifting by cropping the taken image by use of the CCD, in order for the range that the photographer observed via the viewfinder to become the photographing range.
US08040419B2 Image reproducing device capable of zooming in a region of an image, image reproducing method and recording medium for the same
According to the image reproducing device, the image reproducing method, the image reproducing program and the image capturing device of the present invention, if a face image is not detected in an image, a main object can be zoomed by detecting the center part of the image or a focused object. If a plurality of face images are detected from an image, the detected face images can be zoomed in order by simple operation.
US08040416B2 Solid-state imaging apparatus
A solid-state imaging apparatus including a plurality of pixels, each pixel containing a photoelectric conversion section; an accumulation section; a transfer section; an amplification section; and a reset section for resetting the accumulation section; the pixel section having output signal lines provided column by column onto which the pixel signal is outputted, connected to the other end of a constant current supply having one end grounded; and a control section where, of a first one of the pixels and a second one of the pixels connected to the same one output signal line, taking the first pixel as one of the pixels subject to reading of pixel signal conforming to the incident light and the second pixel as non-subject one of the pixels set in accordance with a location of the first pixel, an output from the second pixel onto the output signal line is used at the time of outputting of the pixel signal from the first pixel onto the output signal line to effect control so that an electric potential difference between the one end and the other end of the constant current supply is kept in a range where the constant current supply is operable.
US08040411B2 Image pickup device and image pickup method
An image pickup device includes an image pickup section that picks up a long-time exposure image and short-time exposure image; a combining section that combines the long-time exposure image and short-time exposure image with each other, to generate a combined image, the exposure images being combined on the basis of a ratio between the exposure time of the long-time exposure image and the exposure time of the short-time exposure image; a dynamic range calculating section that calculates an object dynamic range from the long-time exposure image, the exposure time of the long-time exposure image, the short-time exposure image, and the exposure time of the short-time exposure image; and a compressing section that, using base compression curve data, calculates a compression curve suitable for the object dynamic range, and generates a compressed image in accordance with the calculated compression curve.
US08040409B2 Image processing device capable of performing retinex process at high speed
A storage portion stores, in association with first pixel values, table values including either gamma-corrected values obtained by performing gamma correction on the first pixel values using a predetermined reflectance component or second pixel values calculated based both on the gamma-corrected values and on the first pixel values. A pixel-value generating portion includes an extracting portion and a determining portion. The extracting portion extracts at least one of the table values corresponding to a pixel value of a subject pixel. The determining portion determines a pixel value of an output image based on the at least one of the table values extracted by the extracting portion. The predetermined reflectance component is the reflectance component calculated by the reflectance-component calculating portion when the pixel value of the subject pixel is substantially identical with the average luminance of the peripheral pixels.
US08040407B2 Image capturing apparatus and image capturing apparatus control method
An image capturing apparatus comprises: an acquisition unit; a smear detection unit; and a smear correction unit which corrects a level of pixels in a smear region in original image data by a first correction amount obtained by multiplying a smear amount by a first coefficient, thereby generating first image data, and corrects the level of pixels in the smear region in the original image data by a second correction amount obtained by multiplying the smear amount by a second coefficient, thereby generating second image data, wherein the first image data is used for at least either of image displaying and image recording, the second image data is used for at least one of exposure control, focus adjustment, and white balance control, and the first coefficient is smaller than the second coefficient.
US08040405B2 Solid-state imaging apparatus
The present invention relates to solid-state imaging apparatus such as digital camera for outputting video signals, and more particularly relates to a solid-state imaging apparatus in which vertical stripe-like noise and horizontal shading can be corrected.
US08040402B2 Imaging apparatus
An imaging apparatus includes: an imaging device including first and second pixels; imaging control means for carrying out a first imaging action and a second imaging action; storage means for storing first image data acquired from the first pixels in the first imaging action and second image data acquired from the first pixels in the second imaging action; noise data acquisition means for acquiring first noise data based on pixel signals produced in the second pixels in the first imaging action and acquiring second noise data based on pixel signals produced in the second pixels in the second imaging action; noise estimation means for estimating a noise component in the first image data using the second image data and a noise ratio of the noise in an exposure period to the noise in a non-exposure period; and noise correction means for removing the noise component from the first image data.
US08040401B2 Replay apparatus for noise reduction signal processing
An image pickup system according to the present invention includes an extracting unit for extracting a block area with a predetermined size from a signal of an image pickup device, a transforming unit for transforming the signal in the extracted block area into a signal in a frequency space, an estimating unit for estimating the amount of noises of a frequency component except for a zero-order component based on the zero-order component in the transformed signal in the frequency space, a noise reducing unit for reducing noises of the frequency component except for the zero-order component based on the estimated amount of noises, and a compressing unit for compressing the zero-order component and the frequency component except for the zero-order component from which the noises are reduced.
US08040397B2 Automatic image quality adjustment according to brightness of subject
The image processing device performs image processing using image data generated by an image generating device, and image generation record information associated with the image data where the image generation record information includes at least operating information about the image generating device at the time of generation of the image data. A picture quality adjuster is able, when the image generation record information includes subject brightness information relating to the brightness of a subject at the time of generation of the image data, to adjust the picture quality of the image data using the subject brightness level derived from the subject brightness information.
US08040395B2 System and method for automatic format selection for digital photographs
A system and method for automatically determine whether an image captured by a digital camera should be stored in a raw format or a compressed format. After an image is captured by the digital camera, the digital camera checks certain sets of characteristics of the captured image to check the image quality. If the image quality falls within an acceptable range, then the digital camera saves the image in a compressed format. If the captured image does not fall within predetermined quality levels, then the captured image is save in raw format for later processing.
US08040383B2 Communication system, communication method, computer-readable medium and image shooting device
A communication system includes a first and a second communication devices, and the first and the second communication devices includes a first and a second transmission units that are disposed respectively on bodies of the communication devices and wirelessly transmits predetermined information to each other. The first communication device further includes a first reception unit that is disposed in a position where the first reception unit is capable of communicating with the second transmission unit and receives second information that has been transmitted from the second transmission unit, and a first control unit that controls the first communication device such that, when communication becomes possible between the first reception unit and the second transmission unit, the first reception unit receives the second information, and such that, when communication becomes possible between the first transmission unit and the second reception unit, the first transmission unit transmits first information.
US08040379B2 Imaging apparatus and recording medium
As shown in FIG. 2B, a photographing area is divided into a plurality of blocks. The block at the center of the photographing area is defined as an observation block 31, and the blocks at the periphery of the photographing area are defined as background blocks 32. When the number of background blocks 32 having the largest number of identical motion vectors is larger than a threshold m, when the scalar quantity of the motion vectors of these background blocks 32 with the largest number is larger than a threshold v, and when the scalar quantity of the motion vector of the observation block 31 is smaller than a threshold vc, the digital camera 1 judges that the user is performing a follow shot and there is no blurring of the observed photographic subject, and performs an automatic shooting.
US08040371B2 Three-dimensional display device and driving method thereof
A three-dimensional display device according to the present invention includes a panel that time-shares images and displays left and right eye images, a panel control unit for controlling the panel by applying a display control signal that includes vertical and horizontal signals to the panel, a barrier facing the panel and separating the images of the panel into user left and right eye images, and a barrier control unit for controlling the barrier. The panel can be converted between a first mode of a portrait-type view and a second mode of a landscape-type view, and the barrier may be operated corresponding to the mode conversion of the panel.
US08040370B2 Stereoscopic image display apparatus having stereoscopic pixel with approximately square shape and stereoscopic image display method
It is possible to prevent an image processing amount from increasing and obtain excellent display characteristics. A stereoscopic image display apparatus includes: a flat display device having approximately square pixels arranged on a flat display plane in a square manner: and an optical plate which is disposed in front of the display device and has optical apertures which extend linearly in the same direction as a diagonal line of a rectangle obtained by connecting n pieces of the pixels vertically, for controlling directions of light rays from the pixels. The flat display plane of the flat display device are divided to elemental images, each corresponding to each of the optical apertures in the optical plate, and an average value of pitches of the elemental images is larger than m (m=1,2,3 . . . ) times a length of a diagonal line of a rectangle obtained by connecting n pieces of the pixels laterally and the pitch of the optical apertures in the optical plate is equal to m times the length of the diagonal line of the rectangle obtained by connecting n pieces of the pixels laterally.
US08040369B1 System and method for transferring objects in a video conferencing session
A system and method of virtually passing an object in near real time between separated participants in a remote conference session is disclosed. The method includes providing a video screen at first and second locations. An object can be inserted into a scanning device coupled to a scanner opening located proximate to the video conference screen in the first location to form a scanned object file. Video imaging of the insertion of the object can be transmitted and displayed at the second location. The scanned object file can be received and printed at the second location in near real time and output through a printer opening positioned proximate the video screen at the second location to create an illusion of virtually passing the object between locations.
US08040368B2 Image forming apparatus
An image forming apparatus is provided. The image forming apparatus includes: a photosensitive member on which an electrostatic latent image is to be formed; a first body which rotatably supports the photosensitive member; an exposing unit which exposes the photosensitive member; a second body which supports the exposing unit movably between an exposing position in which the exposing unit exposes the photosensitive member and a retracting position in which the exposing unit is retracted from the photosensitive member; a first grounding unit which, when the exposing unit is positioned at the exposing position, causes the exposing unit to be electrically connected to the first body; and a second grounding unit which, when the exposing unit is positioned at the retracting position, causes the exposing unit to be electrically connected to the first body via the second body.
US08040366B2 Thermal printer and control method thereof
When printing on a printing medium, a second image adjacent to a first image, which is already printed, control is performed such that the trailing edge of a first coating layer of the first image transferred onto the printing medium does not reach the trailing edge of the first image, and the leading edge of a second coating layer transferred onto the second image is either the same as the trailing edge of the first coating layer of the first image or is made to overlap with the trailing edge of the first coating layer.
US08040364B2 Latent resistive image layer for high speed thermal printing applications
An imaging system including an image receiving structure including a tunable-resistivity material; and an energy source to emit an energy beam at the image receiving structure to pattern-wise program the tunable-resistivity material. A resistivity can be pattern-wise changed. Marking material can be pattern-wise adhered in response to the pattern-wise changed resistivity.
US08040362B2 Driving device and related output enable signal transformation device in an LCD device
An output enable signal transformation device for a gate driver in an LCD device includes a reception terminal coupled to a timing generator of the LCD device for receiving an enable synchronization signal, an enable clock signal and a plurality of enable control signals generated by the timing generator, a shift register module coupled to the reception terminal for shifting the enable synchronization signal according to the enable clock signal, a multiplexer module coupled to the shift register module and the timing generator for generating a plurality of output enable signals according to the enable synchronization signal and the plurality of enable control signals, and an output terminal coupled to the multiplexer module and a logic circuit of the gate driver for outputting the plurality of output enable signals to the logic circuit.
US08040357B1 Quotient remainder coverage system and method
Embodiments of the present invention pixel processing system and method provide convenient and efficient processing of pixel information. In one embodiment, quotient-remainder information associated with barycentric coordinate information indicating the location of a pixel is received. In one exemplary implementation quotient-remainder information is associated with barycentric coordinate information through the relationship c divided by dcdx, where c is the barycentric coordinate for a particular edge and dcdx is the derivative of the barycentric coordinate in the screen horizontal direction. The relationship of a pixel with respect to a primitive edge is determined based upon the quotient-remainder information. For example, a positive quotient can indicate a pixel is inside a triangle and a negative quotient can indicate a pixel is outside a triangle. Pixel processing such as shading is performed in accordance with the relationship of the pixel to the primitive.
US08040356B2 Color management user interface
Various embodiments described above provide a user interface system that can expose end users and others to color management information in an easy-to-understand manner. In one or more embodiments, the user interface system can provide information that allows the user to easily ascertain whether a device, component or application is color managed, and the status of the device, component or application. Further, the user interface system can enable the user to access links that provide additional information and/or diagnostic help in the event a color management issue is identified.
US08040352B2 Adaptive image interpolation for volume rendering
Sampling frequency of a ray casting for generating a projection image is varied in dependence of information derived from a 3D volume data during rendering. Furthermore, an interpolation is performed for skipped pixels for which no ray casting was performed in the projection image, based on this information.
US08040348B2 Combined sectional view producing method and apparatus
A combined sectional view is produced by obtaining a section plane based on one of a plurality of section lines, which is currently set as a target, and on a cut face along the target section line, obtaining an adjacent section plane passing a crossed point between a connected section line, which is connected to the target section line, and the target section line and being perpendicular to a plane including the plurality of section lines and to the section plane, specifying one or more elements and/or parts of elements of a three-dimensional model, which are necessary to draw a sectional view of the model, with respect to the section plane and the adjacent section plane, projecting the specified elements and/or the parts of the elements to obtain a sectional view corresponding to the target section line, and combining a plurality of sectional views obtained by executing the above-described processes for each of the section lines.
US08040347B2 Method for constructing surface of fluid-body simulation based on particle method, program for the same, and storage medium for storing program
Thin films or sharp edges in a fluid body are expressed in the display of a particle-based fluid-body simulation. The surface construction method is a method applied to a method for rendering calculation results on the screen of a display device using data that are obtained by calculation of a fluid-body simulation based on a particle method executed by a CPU or the like. The method has a first stage of allocating a concentration sphere to a particle that is a calculation object and computing an implicit function curved surface, and computing a plurality of base vertices (V0) for creating a fluid-body surface by the implicit function curved surface; and a second stage that is executed at least one time for adjusting a surface sharpness for each of the plurality of base vertices (V0) for creating the fluid-body surface that is computed in the first stage.
US08040345B2 Systems for hybrid geometric/volumetric representation of 3D objects
The invention provides a system for modeling three-dimensional objects using hybrid geometric/volumetric representation, wherein sharp edges are created by a geometric representation that is connected to the volumetric representation. The system creates, maintains, and updates the hybrid representation according to user input. The system also provides for conversion of the hybrid representation into either a wholly geometric representation or a wholly volumetric representation, as may be needed for output to a given device, such as a display device, a printer, and/or a fabricating device.
US08040336B2 Rescue circuit line, display device having the same and method for manufacturing the same
A display device includes a rescue circuit line structure having a first conductive pattern, a second conductive pattern and a dielectric layer. The first conductive pattern is adapted to electrically interconnect a first circuit element and a second circuit element, wherein the first conductive pattern has an open. Neither of the first and second conductive patterns is used as a data line or a scan line. The dielectric layer is located on the open and disposed between the first conductive pattern and the second conductive pattern.
US08040335B2 System, method of controlling system and apparatus
According to an aspect of an embodiment, a system comprises a display having a display area for displaying an image corresponding to image data signals applied thereto, the display being capable of maintaining the image to be displayed after termination of application of the image data signals, an area designation unit for designating a part of the display area and a controller unit for receiving image data and generating image data signals to be applied to the display, the controller unit being configured to inhibit application of image data signals to the part of the display area when designated while applying new image data signals to the display.
US08040334B2 Method of driving display device
A method for driving a display device comprises processing a plurality of sequent frame data by a graphics controller. The graphics controller is capable of optimizing a frame rate and outputting a first plurality of display signals at the frame rate. And then, a timing controller is used to convert the first plurality of display signals into a second plurality of signals at a predetermined refresh rate.
US08040333B2 Type of radial circuit used as LCD drivers
This invention discloses a type of radial circuit for use in driving LCD monitors. The radial circuit includes an odd-even column data generator. The odd-even column data generator receives data from a modulation counter and divides the data into two groups of data having opposite levels: odd column modulation data and even column modulation data. The odd-even column data generator then sends the two sets of data to a comparator comparing the display data and modulation data of the LCD. The comparator is used to control the odd and even columns of the LCD. This utility model divides all the columns in the same row into odd and even columns. An opposite driver voltage waveform is output from between the odd and even columns of the neighboring columns. While the odd columns discharge, the even column recharges. This type of simultaneous discharge and recharge process creates just the right mutual electric charge compensation; and it results in minimizing the electric charge dissipation which saves energy.
US08040330B2 Untethered stylus empolying multiple reference frequency communication
An untethered stylus is configured to cooperate with a location sensing device that generates a drive signal. The stylus includes transceiver circuitry disposed in a housing, which is configured to receive the drive signal and transmit a stylus signal for reception by the location sensor. Energy circuitry is disposed in the housing and energized by the drive signal. A reference frequency generator, disposed in the housing and coupled to the transceiver circuitry and energy circuitry, is configured to generate a number of reference frequencies based on a source frequency of the drive signal, the reference frequencies indicative of a number of stylus states and synchronized to the source frequency of the drive signal. The transceiver circuitry is configured to mix the reference frequencies with the stylus signal.
US08040329B2 Frequency control circuit for tuning a resonant circuit of an untethered device
An untethered device, configured to inductively couple to a source device, includes a tunable resonant circuit having a resonance frequency and configured to generate a supply voltage for the untethered device in response to a varying magnetic field produced by the source device. The tunable resonant circuit includes an inductive coil comprising a center tap and a capacitive circuit coupled to the inductive coil. The capacitive circuit includes an anti-series arrangement of varactor diodes that behave as a capacitance when placed in reverse bias. A frequency control circuit is coupled to the tunable resonant circuit and includes a control voltage source coupled to the center tap of the inductive coil. The control voltage source produces a control signal to place the varactor diodes in reverse bias and to change the capacitance of the capacitive circuit, thereby effecting a change in the resonance frequency of the tunable resonant circuit.
US08040325B2 Base capacitance compensation for a touchpad sensor
Methods are provided for base capacitance compensation of traces in a touchpad sensor. Compensation areas are calculated by evaluating the differences between the base capacitances of the traces, or the differences between the base capacitances of the traces and a target value. The compensation areas are electrically connected to respective traces to equalize the base capacitances of the traces. Alternatively, a relationship between the areas of the traces and the distances from the traces to a grounding layer for equalizing the base capacitances of the traces is derived and from which the areas of the traces or the position of the grounding layer are adjusted.
US08040323B2 Input device
An input device, especially an input device for a vehicle, includes a display for optical display of information, a touchscreen arranged above the display for input of commands by touching an operating surface of the touchscreen and a control for optical display of additional or other information on the display during at least a second simultaneously occurring touching of the operating surface.
US08040320B2 Input device and method of operation thereof
A generic input device built of Electro-optical camera, sensors, buttons and communication means, provides a measure for operating in absolute and/or relational mode, most software applications on many electronic platforms with display independent of the screen characters.
US08040318B2 Electrophoretic display panel
The electrophoretic display panel(1) for displaying a picture and subsequently displaying a subsequent picture has a pixel(2) having an electrophoretic medium (5) having first and second charged particles (6,7) and an optical state depending on the positions of the particles (6,7) in the common region (30) of the pixel (2). Furthermore, transition control means are able to control a transition of the first and the second particles (6,7) being in substantially separated domains of the common region (30) for displaying the picture to substantially separated domains of the common region (30) for displaying the subsequent picture. For the display panel (1) to be able to have an attainable optical state for displaying the subsequent picture which is unequal to the optical state determined by the mixture of the first and second particles (6,7), even if the particles (6,7) have substantially equal electrophoretic mobilities, the transition control means are further able to control the first and the second particles (6,7) to be in substantially separated domains of the common region (30) during the transition.
US08040315B2 Device for driving a display panel with sequentially delayed drive signal
A display device includes a scanning line drive circuit, which includes plural stages of D type of flip-flops (DFFs) connected in cascade. The first DFF stage receives a pixel signal of video data to be displayed. These DFF stages have outputs respectively connected to AND gates. The DFF stages and AND gates receive a common clock signal. The DFF stages are responsive to the clock signal to sequentially shift respective values held therein to the following stages with delay. Thus, a drive device is provided which can drive a display panel in a simple configuration without using an OE (Output Enable) signal.
US08040314B2 Driving apparatus for liquid crystal display
A liquid crystal display having a plurality of pixels and blocks of shift registers that are connected to one another for temporarily storing data signals and from which the data signal outputs are sequentially applied to drive the pixels. Each of the shift registers receives a shift start signal and at least one of first and second clock signals, of which phases are opposite to each other, and a high period of the shift start signal corresponds to two cycles of the respective clock signals so that each pixel is pre-charged from the data signal from previous block of registers before receiving the data signal for the current block thereby preventing a boundary between blocks from being visually recognized.
US08040306B2 Display driving chip
Disclosed is a display driving chip of a semiconductor chip. According to an embodiment, the display driving chip comprises, input/output (I/O) pads each electrically connected to a lower interconnection on an active area, the I/O pads forming a perimeter on an inner peripheral surface of the active area, and dummy pads formed on the active area within the perimeter of I/O pads.
US08040300B2 Demultiplexer and display device using the same
A display device includes a demultiplexer. The demultiplexer programs time-divided and sequentially input data currents to at least two signal lines. The demultiplexer includes first and second sample/hold circuits for alternately sampling data currents and holding sampled data corresponding to the sampled data, and third and fourth sample/hold circuits for respectively sampling the sampled data held by the first and second sample/hold circuits and programming the current which correspond to the sampled data to the two signal lines.
US08040298B2 Organic light emitting diode display and manufacturing method thereof
An OLED display according to an exemplary embodiment of the present invention includes a substrate, a gate line formed on the substrate and including a first control electrode, a data line intersecting the gate line, a switching TFT connected to the gate line and the data line, a driving TFT connected to the switching TFT, a first electrode connected to the driving TFT, a second electrode facing the first electrode, and a light emitting member formed between the first electrode and the second electrode. At least one of the switching TFT and the driving TFT includes a plurality of channels.
US08040293B2 Shift register and organic light emitting display using the same
A shift register and an organic light emitting display using the same with a simplified design of a shift register having high reliance, and reduced dead space includes a plurality of stages dependently connected to a start pulse input line, each of the stages including: a voltage level controller to control voltage levels of first and second output nodes according to a start pulse or an output signal of a previous stage and a second clock signal; a control capacitor coupled between the first output node and an input line of a first clock signal; a first transistor coupled between a first power supply and a third output node and including a gate electrode coupled to the first output node; and a second transistor coupled between the third output node and an input line of the third clock signal and including a gate electrode coupled to the second output node.
US08040292B2 Portable communication display device
A head-mounted display system displays information via a matrix display element mounted within a housing that is positioned relative to at least eye of a user. The display is connected to a video or information source such that the user can view information or images shown on the display. The display can be mounted to a frame so that the user can move the display in and out of the user's field of view without adjusting the supporting harness that holds the display on the user's head.
US08040291B2 F-inverted compact antenna for wireless sensor networks and manufacturing method
An F-inverted compact antenna for ultra-low volume Wireless Sensor Networks is developed with a volume of 0.024λ×0.06λ×0.076λ, ground plane included, where λ is a resonating frequency of the antenna. The radiation efficiency attained is 48.53% and the peak gain is −1.38 dB. The antenna is easily scaled to higher operating frequencies up to 2500 MHz bands with comparable performance. The antenna successfully transmits and receives signals with tolerable errors. It includes a standard PCB board with dielectric block thereon and helically contoured antenna wound from a copper wire attached to the dielectric block and oriented with the helix axis parallel to the PCB. The antenna demonstrates omnidirectional radiation patterns and is highly integratable with WSN, specifically in Smart Dust sensors. The antenna balances the trade offs between performance and overall size and may be manufactured with the use of milling technique and laser cutters.
US08040284B2 Handset device
A handset device including a ground plane, an antenna, a first conductive strip and a second conductive strip is provided. The antenna is electrically connected to the ground plane and forms a current loop with the ground plane. The ground plane forms a current area according to the current loop. The first conductive strip is electrically connected to the current area and changes a current distribution on the ground plane to increase a current density passing through the current area.
US08040283B2 Dual band antenna
An antenna applied in a communication device is provided. The antenna includes a conductive supporting portion, a radiator and a grounding portion. The radiator operates in a first frequency band. The grounding portion is connected to the radiator through the conductive supporting portion. The grounding portion includes a cavity extended from a top surface of the grounding portion into the interior of the grounding portion. A resonant cavity operating in a second frequency band is formed between the radiator and the cavity.
US08040280B2 Apparatus and method for computing location of a moving beacon using received signal strength and multi-frequencies
Provided is an apparatus and method for computing the location of a radio beacon by using received signal strength (RSS) and multiple frequencies. The apparatus and method of the present invention computes the location of a radio beacon without limitation in distance by using multiple frequencies and received signal strength to resolve the problem of phase ambiguity. A radio beacon location computing system includes a plurality of base stations configured to receive signals of multiple frequencies transmitted from the radio beacon, and detect and output phase differences and received signal strength; and a location computing server configured to receive the phase differences and the received signal strength outputted from the respective base stations, acquire calculation distances based on the phase differences, remove phase ambiguity from the calculation distances based on the received signal strength, and compute the location of the radio beacon.
US08040279B2 Measuring positions
Techniques, systems and computer readable medium are disclosed for measuring a position of an object device. A position measuring apparatus includes a receiving unit designed to receive a signal transmitted from an object device for position measurement. The position measuring apparatus also includes a position computing unit designed to compute a position of the object device by applying Angle Of Arrival (AOA) and Time Of Arrival (TOA) techniques using the received signal. The position measuring apparatus also includes a medium channel estimating unit designed to estimate a channel of a medium, through which the received signal penetrates on a transmission path, using the received signal. The position measuring apparatus also includes a position correcting unit configured to compute a delay time caused by the received signal penetrating the medium using the estimated medium channel and correcting the position of the object device computed by the position computing unit using the delay time.
US08040278B2 Adaptive antenna beamforming
Adaptive antenna beamforming may involve a maximum signal-to-noise ratio beamforming method, a correlation matrix based beamforming method, or a maximum ray beamforming method. The adaptive antenna beamforming may be used in a millimeter-wave wireless personal area network in one embodiment.
US08040276B2 Generation of multi-satellite GPS signals in software
A method for testing GPS receivers may read GPS files with data for a plurality of GPS satellites, and two or more GPS satellites may be selected from that data. The method may receive parameters for a GPS receiver to be tested. The method may generate two or more GPS signals for the two or more selected GPS satellites. The method may operate on the two or more GPS signals using the received parameters for the GPS receiver to generate two or more calculated GPS signals. These two or more calculated GPS signals may be re-sampled to a common rate. The two or more re-sampled GPS signals may be added together to create a composite GPS signal. The composite GPS signal may be generated using a hardware signal generator, where the composite GPS signal used to test the GPS receiver.
US08040271B2 A/D conversion apparatus, A/D conversion method, and communication apparatus
An A/D conversion apparatus includes: a first and a second D/A converter to sample an analog signal and successively compare the analog signal and a reference signal to generate a first and a second comparison signal respectively; a first comparator to compare the first comparison signal generated by the first D/A converter with a benchmark signal; a second comparator to compare the second comparison signal generated by the second D/A converter with the benchmark signal; and a converter to convert the analog signal to a digital signal according to results of the comparisons by the first and second comparators.
US08040269B2 Analog-to-digital conversion in pixel array
An analog-to-digital converter generates an output digital value equivalent to the difference between two analog signals. The converter forms part of a set of converters. The converter receives a first analog signal and a second analog signal (Vreset, Vsig) and a ramp signal (Vramp). A clock is dedicated to the converter, or a sub-set of converters. A control stage enables a first counter based on a comparison of the ramp signal with the first analog signal and the second analog signal. The converter can be calibrated by at least one reference signal (Vref1, Vref2) which is common to the set of converters. A-to-D conversion can include a first A-to-D conversion stage which determines a signal range, selected from a plurality of signal ranges, and a second A-to-D conversion stage which determines an M-bit digital value equivalent to the difference between the first and second analog signals by comparing the signals with a ramp signal, with the ramp signal having the signal range determined by the first analog-to-digital conversion stage.
US08040268B2 Data readout system having non-uniform ADC resolution and method thereof
A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal.
US08040266B2 Programmable sigma-delta analog-to-digital converter
A system includes an analog-to-digital modulator to convert at least one analog input signal into at least one digital output signal. The system also includes a processing device to set an operational order and a quantization level of the analog-to-digital modulator. The analog-to-digital modulator converts the analog input signal into the digital output signal according to the operational order and the quantization level.
US08040259B2 Systems and methods for alerting to traffic proximity in the airport environment
Systems and methods for alerting to traffic proximity in the airport environment. Knowledge of the geographic position, speed, rate of change of speed, heading (or track-angle) and/or altitude of own-aircraft (or vehicle) and another, potentially conflicting aircraft (or vehicle) are used to calculate a predicted distance between the two aircraft (or vehicles) at given point of time in the future. If separation distance is predicted to be less than a predetermined acceptable value, then an alert message (aural, visual or both) is issued to the pilot or operator of the vehicle.
US08040256B2 Context sensitive speed tracking
A method and apparatus for performing a context sensitive speed tracking by generating a location of the mobile tracking device; determining context information related to the location; and analyzing the location and context information to determine an appropriate speed of the mobile tracking device in view of the context information.
US08040254B2 Method and system for controlling and adjusting traffic light timing patterns
The present invention relates to methods and systems for controlling and adjusting traffic light timing patterns, and more particularly, to a method and system for controlling and adjusting traffic light timing patterns based on input variables related to known or predicted events, and for gradually changing traffic light intervals over time.
US08040251B2 Detection of fast poll responses in a TWACS inbound receiver
A method for use in a power line communication systems for an electrical distribution system (1) to quickly and accurately poll electrical meters (6) installed at user facilities to determine if an outage has occurred at a facility. An outbound communications message is transmitted to the meter at the facility requesting a short response consisting of a bit pattern that is either partially or completely known to the receiver. Any perceived response from the meter is then processed to ascertain whether or not the meter actually transmitted a message. Receipt of a message indicates that an outage has not occurred at that site, while an indication the message was not received indicates an outage has likely occurred. In processing the received message, two types of errors can potentially occur; i.e., a false positive or a false negative. A false positive occurs when a detection algorithm used to process the response indicates that the meter sent a response when actually it did not. A false negative occurs when the detection algorithm indicates the meter did not send a response when actually it did. The method utilizes a signal processing algorithm to determine if a response was actually sent by the meter and is important because it minimizes the probability of both types of errors.
US08040250B2 Retractable sensor system and technique
A technique usable with a well includes disposing a retractable line in a conduit having an open end located above a region of interest in the well. The retractable line comprises a sensing portion that, when the line is deployed, extends from the open end of the conduit and into the region of interest. Information observed by the sensing portion in the region of interest is communicated to the surface. When further well operations are to be performed in the region of interest, the retractable line is retracted until the sensing portion is located above the region of interest and below the surface. After the well operation is completed, the retractable line may be re-deployed such that the sensing portion again extends through the open end of the conduit and into the region of interest to continue observing characteristics associated with the well.
US08040248B2 Device for detection of surface condition data
A device is disclosed for detection of surface properties or conditions, in particular detection of water, snow and ice and in particular to road surfaces by means of detector means mounted on individual vehicles, and transmitting the data from the vehicle, preferably together with position data of the vehicle, to be used by drivers of other vehicles for warning of slippery road conditions ahead of the vehicle. According to a particular aspect, it has been realised that the fact that polarized light which is mirror reflected by e.g. ice or water on a surface, preserves its polarization, whereas polarized light which is diffuse reflected largely becomes depolarized, may be utilised to separate the two types of reflection and thus provide a much more compact sensor device for surface properties, in which the light may be emitted close to or parallel to the road surface normal.
US08040247B2 System for rapid detection of drowsiness in a machine operator
The present invention discloses a system and a process for rapidly detecting drowsiness in a individual operating a machine. The system can capture a plurality of facial images of the individual and compare one or more facial parameters from the images to a plurality of stored high priority sleepiness facial actions that are in a prioritized action database. Based on the comparison, a current level of sleepiness can be determined for the individual and an actuator can be actuated in order to alert the individual and possibly any other individuals that may be in the vicinity.
US08040245B2 Hand washing monitor for detecting the entry and identification of a person
Methods, systems, and computer-storage media provide for the monitoring of hand washing by people entering a room. A person is detected entering a room and an image of the person is captured. The person is identified as an employee using various employee identifiers or is identified as a visitor. The image may be used to identify distinguishing features of the visitor to be compared to an image subsequently during hand washing to verify the identity of the hand washer as the person who entered the room. Similarly, the employee identifier is used to verify the identity of a hand washer as the employee that entered the room. If any person entering the room remains for a threshold period of time without activating the soap dispenser, then a notification that includes the person's identity is provided within the room to remind the person that hand washing is required.
US08040240B2 Method and apparatus to automatically trigger position location fixes for external devices
A method and apparatus automatically triggers position location fixes for external devices. In one embodiment of the present invention, a mobile station generates position location data for a position location function in an external device in response to determining that the mobile station is electrically coupled to the external device, and in response to determining that the position location function in the external device is active. The mobile station does not generate position location data for the position location function in the external device in response to determining that the mobile station is electrically decoupled from the external device, or in response to determining that the position location function in the external device is not active.
US08040237B2 Methods and apparatus to detect carrying of a portable audience measurement device
Methods and apparatus to detect carrying of a portable audience measurement device are disclosed herein. An example portable audience measurement device includes a housing; a media detector in the housing to collect media exposure data; a first status sensor to detect a first distance between the housing and an object at a first time, wherein the first status sensor is to detect a second distance between the housing and the object at a second time; and a distance comparator to generate a first signal indicative of a relationship between the first distance and the second distance to enable determination of whether the device is being carried by a person.
US08040234B2 Method and apparatus for remote service of an appliance
An appliance network has a service key accessory to facilitate remote diagnosis and service of an appliance.
US08040230B2 Alarm control apparatus
An alarm control apparatus which collects alarms from a plant and handles the alarms includes: a defining section for defining a conditioning process which is executed when performing a filtering process on the alarms; and a filtering section for performing the filtering process on the collected alarms in accordance with the conditioning process defined by the defining section.
US08040224B2 Apparatus and method for controlling vibration in mobile terminal
An apparatus and method for controlling vibration in a mobile terminal are provided. The method includes, upon detecting a key input by a user, determining whether a current feedback signal is detected when an external case with a first vibrator is connected to the mobile terminal, upon detecting the current feedback signal, determining that the external case is connected to the mobile terminal and applying a drive signal to the first vibrator, and controlling the first vibrator to be activated in response to the received drive signal to output a haptic feedback.
US08040220B2 Method and apparatus for managing tag information, and computer product
A storing unit stores a plurality of pieces of tag information to be stored in a single radio-frequency-identification tag. A responding unit transmits, in response to a request from a reader/writer, part of the stored tag information to the reader/writer.
US08040215B2 Address selection for an I2C bus
An address configuration circuit and a method for sharing a series bus connected to a first device between two secondary devices by a configuration within each secondary device of a different address, including, in a configuration phase, the temporary configuring of an output terminal of each secondary device in a mode of reading of the voltage present on this terminal to select one address out of two within the device.
US08040213B2 Thin film resistor element and manufacturing method of the same
In order to provide a thin-film resistor and a manufacturing method thereof capable of restraining reduction of a Q-value of varactor by reducing a parasitic capacitance between the resistor and the substrate, the thin-film resistor includes a semiconductor substrate 10 including an integrated circuit 12 having a plurality of electrode pads 14 placed in a distance from each other in the most upper part of a plurality of stacked interconnections, and the integrated circuit 12 having a passivation film 16 formed between the plurality of electrode pads 14; a secondary interconnections 18 electrically connected to the electrode pads 14; an insulating film 20 formed in a place in between the secondary interconnections 18 on the passivation film 16; and a resistor 26 formed 18 in a predetermined place in between the secondary interconnections 18 on the insulating film 20.
US08040210B2 Electromagnetically operated switching device
A switching contact, an electromagnetically operated electromagnet for driving the switching contact, and a drive power source device for driving the electromagnetically operated electromagnet. The electromagnetically operated electromagnet includes a movable core coupled to a movable contact of the switching contact, a fixed core located in a peripheral portion of the movable core, and coils wound around the movable core and the fixed core. Currents are supplied to the coils to drive the movable core. Capacitors store charges for supplying the current to the coils. Resistors are arranged in series with a path through which the capacitors are connected with the coils of the electromagnetically operated electromagnet and through which a current for closing operation flows. Capacitances of the capacitors and values of the resistors are controlled to adjust a supplied current characteristic to the electromagnetically operated electromagnet.
US08040206B2 Circular and/or linear polarity format data receiving apparatus
An apparatus has an antenna configured to receive transmitted digital data, wherein the data comprises circular polarity (CP) and linear polarity (LP) format signals. The apparatus also has a waveguide coupled to the antenna and configured to propagate: 1) a first component of the CP format signal which is received; 2) a second component of the CP format signal which is received, said second component being substantially orthogonal to said first component; and 3) the LP format signal which is received. The apparatus further has one or more phase adjusters configured to allow adjustment to be made to match a phase of the first and second components of the CP format signal. The apparatus also has one or more amplitude adjusters configured to allow adjustments to be made to match an amplitude of the first and second components of the CP format signal.
US08040204B2 Radio frequency combiners/splitters
Disclosed is a radio-frequency divider comprising: an input port; and two output ports, separated by a bridge bar, wherein the divider is arranged in microstrip form and the microstrip structure takes the form of a generally tapering section connecting the input port to the bridge bar such that the input port is positioned at the relatively thinner end of the tapering section and the bridge bar is positioned at the relatively wider end of the tapering section. Also disclosed is a corresponding method. The divider is able to operate equally as a combiner.
US08040199B2 Low profile and compact surface mount circulator on ball grid array
A surface mount circulator. The novel circulator includes a substrate, a predetermined number of microstrip lines disposed on a first surface of the substrate, a ground layer and a predetermined number of electrical contacts disposed on the second surface of the substrate, and a mechanism for coupling each microstrip line to one of the electrical contacts. In an illustrative embodiment, the circulator uses edge wrap metallization to wrap a microstrip line down a side of the substrate to connect with a corresponding contact. A ball grid array can then be used to connect the signal contacts and ground at the second surface of the substrate with a circuit board. The circulator also includes a magnet on first surface of the substrate over a resonator circuit connecting the microstrip lines and a pole piece on the second surface of the substrate beneath the ground to provide magnetic bias to the substrate.
US08040196B2 Digitally controlled oscillator
A digitally controlled oscillator includes a ring oscillator, a parallel resistor bank connected to a first terminal of the ring oscillator and having a resistance that varies according to a digital code, and a serial resistor bank connected to a second terminal of the ring oscillator and having a resistance that varies according to the digital code. A frequency of the ring oscillator linearly varies with a variation in the resistance of the parallel resistor bank and the resistance of the serial resistor bank according to the digital code.
US08040191B2 PLL circuit with VCO gain control
A PLL circuit includes first and second charge pump circuits controlling an output voltage according to an output signal of a phase comparator, a first filter filtering out predetermined frequency component included in a signal generated according to current output from the first charge pump circuit, and outputting the signal as a first voltage signal, a second filter inputting a current output from the second charge pump circuit and outputting a predetermined constant voltage as a second voltage signal, a voltage control unit outputting a third voltage signal according to a comparison result between the first voltage signal output from the first filter and a reference voltage signal, and a voltage controlled oscillator that has a first low gain property, a second low gain property, and a high gain property, and is controlled by the first to third voltage signals to generate an oscillating frequency.
US08040181B2 Time delay compensation and pulse width correction
A system, method and apparatus is provided for pulse width correction in a power driver. In an embodiment, an apparatus includes an operational amplifier having an input and an output. The input of the operational amplifier is coupled to receive an input pulse signal. The apparatus further includes an output stage having an input coupled to the output of the operational amplifier. The output stage also includes a current output configured to couple to a load and to a voltage sense output. The apparatus also includes a comparator having an inverting input coupled to the voltage sense output of the output stage, a non-inverting input configured to couple to an input signal, and an output. Also, the apparatus includes a timing circuit with an input coupled to the output of the comparator and an input coupled to the input signal. The timing circuit also has an output to supply the input pulse signal. The timing circuit measures a delay from a change in the input signal to a change in the output of the comparator. The timing circuit replicates the measured delay as a delay in a change to the input pulse signal.
US08040180B2 Operational amplifier capable of compensating offset voltage
An operational amplifier capable of compensating offset voltage includes an input stage circuit having a positive input end, a negative input end, a first current output end, and a second current output end, for outputting current corresponding to voltage received by the positive and negative input ends, an output stage circuit coupled to the first current output end and the second current output end of the input stage circuit, for outputting voltage according to current outputted from the first current output end and the second current output end, and an trimming device coupled between the input stage circuit and the output stage circuit, for adjusting current of the first current output end or the second current output end for compensating offset voltage.
US08040179B2 Apparatus and method for estimating power for amplifier
Described herein is an apparatus and method for estimating the amount of power that is to be consumed by an amplifier. An estimation section may be determined based on frame data of an input signal that is to be input to the amplifier. The estimation section may be stored to in a predetermined section, and the amount of power to be consumed by the amplifier may be estimated in advance based on the stored signal. The predetermined section may be determined in consideration of response a characteristic of a power supply of the amplifier. The amount of power may be calculated by assigning weight to the stored signal.
US08040178B2 Oscillator, and receiving device and electronic device using the oscillator
An oscillator unit is configured such that a frequency adjustment unit of a synthesizer used by a controller is smaller than a frequency variation tracking capability of a demodulator connected to an output side of a frequency converter. This structure successfully combines the temperature compensation control of an oscillator unit and the receiving process of a high-frequency receiving device. Accordingly, an oscillator unit with large temperature coefficient is applicable to high-frequency receiving devices.
US08040175B2 Supply regulated charge pump system
An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit.
US08040172B2 Logic level converter
A logic level converter includes two first electronic switches coupled in a bi-stable flip-flop arrangement having at least one output line, and a forcing circuitry including two second electronic switches to force switching of the first electronic switches in the flip-flop arrangement. The forcing circuitry has an input terminal to receive a logic input signal having a given level to produce switching of the flip-flop arrangement and generate at the output line(s) of the flip-flop arrangement, a logic output signal(s) whose voltage level is converted with respect to the level of the logic input signal. The converter includes, interposed between each of the two first electronic switches in the flip-flop arrangement and a respective one of the second electronic switches in the forcing circuitry, at least one respective cascode electronic switch to limit the voltage across the two first electronic switches in the flip-flop arrangement.
US08040168B2 Charge pump circuit
The charge pump circuit includes: a first switch for controlling either one of push operation and pull operation based on a first control signal; a current mirror circuit composed of a transistor different in attribute from the first switch; and a second switch composed of a transistor same in characteristic as a transistor constituting the first switch, for controlling input of a current into the current mirror circuit based on a second control. The other operation, the push operation or the pull operation, is performed with a current output from the current mirror circuit.
US08040164B2 Circuits and methods for programming integrated circuit input and output impedances
An integrated circuit may include at least a first replica driver stage coupled between a reference impedance input and a first power supply node and having a first programmable driver impedance set by a first driver configuration value in the same manner as a first output driver section of the integrated circuit. At least a first replica input termination stage may be coupled between the reference impedance input and the first power supply node and having a first programmable termination impedance set by a first termination configuration value in the same manner as a first input termination section of the integrated circuit. An impedance programming circuit may generate at least the first driver configuration value and the first termination configuration value in response to a potential at the reference node.
US08040160B2 Driver arrangement and signal generation method
A driver arrangement comprises a charge pump based oscillator (OSC) having a first charging element (CE1) with a first capacitance (C1) for generating an oscillator signal depending on a first capacitance (C1) and on a first charging current (I1). A controllable current source (CCS) is configured to generated a first and a second charging current (I1, I2) depending on a current control signal, wherein first and second charging currents (I1, I2) have a first predetermined scaling ratio (α). The current control signal is provided by a control unit (CTL). An output circuit (DRV) of the driver arrangement comprises a second charging element (CE2) having a second capacitance (C2). The output circuit (DRV) is configured to generate an output signal depending on a data signal (TXD), on the second charging current (I2) and on the second capacitance (C2). Herein, the second capacitance (C2) has a second predetermined scaling ratio (β) with respect to the first capacitance (C1).
US08040159B1 Comparator with jitter mitigation
In one example, a comparator circuit includes a differential stage adapted to receive a differential input signal. The comparator circuit includes first and second diodes coupled to the differential stage. The first and second diodes are adapted to selectively switch on and off to provide a differential output signal at first and second differential output nodes in response to the differential input signal. The comparator circuit includes a current steering circuit adapted to selectively provide a reference current from a current source to the first or second diode in an off state to reduce a voltage swing of the first or second diode between the off state and an on state. The comparator circuit includes an output stage coupled to the first and second diodes at the first and second differential output nodes. The output stage is adapted to convert the differential output signal to a single ended output signal.
US08040156B2 Lock detection circuit and lock detecting method
Provided are a lock detection circuit and a lock detecting method. The lock detection circuit includes two delay devices, four flip-flops and two logic gates, and can accurately detect a lock state of a phase locked loop (PLL) circuit. Therefore, the lock detection circuit can be implemented in a simple structure, and as a result, the lock detection circuit can be compact in size and can consume less electric power. Also, the lock detecting method enables lock detection process to be simpler, so that a lock state can be detected within a short time period.
US08040152B1 Separate configuration of I/O cells and logic core in a programmable logic device
A programmable logic device (PLD) is provided that includes: a plurality of programmable logic blocks, the plurality of programmable logic blocks being associated with a first configuration data shift register operable to shift in configuration data for the plurality of programmable logic blocks; a plurality of input/output (I/O cells), each I/O cell associating with a corresponding set of I/O configuration memory cells; and a plurality of boundary scan cells corresponding to the plurality of I/O cells, each boundary scan being configurable to form a second data shift register for the I/O configuration memory cells.
US08040151B2 Programmable logic device with programmable wakeup pins
A programmable logic device (PLD) adapted to enter a low-power or sleep mode with programmable wakeup pins in a wakeup group of pins is disclosed. Wake on a single pin change, wake on vector, and wake on a single pin transition are supported. The approach is to select the actively participating pins, enable the desired operation, define the wakeup condition, enter sleep mode, monitor the external signals coupled to the active pins, and exit sleep mode when the wakeup condition is detected.
US08040144B2 Interface circuit
An interface circuit includes a reference voltage generation circuit to generate a reference voltage, a differential voltage signal generation circuit to convert send data input in sending data into a pair of differential voltage signals and output the pair of differential voltage signals based on the reference voltage generated by the reference voltage generation circuit, a receiver to convert a pair of differential voltage signals input in receiving data and output received data, and a receiver test circuit to perform a sensitivity test of the receiver, the receiver test circuit having a resistance circuit to generate a pair of differential voltage signals having a potential difference being necessary for the sensitivity test of the receiver.
US08040143B2 Capacitance sensing with mismatch compensation
Systems and methods are provided for determining the value of a capacitance. A system for sensing capacitance comprises an oscillator arrangement comprising a plurality of oscillators and a mismatch compensation arrangement coupled between the oscillator arrangement and a first capacitive element having a first capacitance. The mismatch compensation arrangement is configured to selectively couple the first capacitive element to a respective oscillator of the plurality of oscillators, wherein an oscillation frequency of the respective oscillator is influenced by the first capacitance.
US08040137B2 Method for measuring an ionization current of a spark plug of the type with resonant structure and corresponding device
A device for measuring an ionization current of a spark plug of a type with a resonant structure, including a motor vehicle ignition system, the spark plug being coupled to a generator including a regulating capacitor. The generator includes a polarizer that polarizes the spark plug, connected between the generator and the spark plug, and a device that measures ionization current of the spark plug, connected between the regulating capacitor and ground.
US08040134B2 Magnetic resonance imaging device configured to suppress signals from fat by excluding effect of non-uniformity of irradiated magnetic field
A magnetic resonance imaging device includes control means for controlling receiving means according to a predetermined pulse sequence that includes an unnecessary material suppressing sequence unit for suppressing a signal from an unnecessary material which is not a measurement target, and a main imaging sequence unit for measuring a nuclear magnetic resonance signal used to create an image of an examinee. The unnecessary material suppressing sequence unit generates at least two or more high frequency magnetic field pulses so that the longitudinal magnetization of the unnecessary material is made spatially uniform in the imaging space under application of a first high frequency magnetic field pulse in the main imaging sequence unit.
US08040129B2 Rotation detector and rotation detector-equipped bearing
A rotation detecting device capable of outputting information on the absolute angle using an ABZ phase signal and without extra operation and procedures required, and a bearing assembly having this rotation detecting device incorporated therein are provided. The device includes an absolute angle detecting sensor unit for detecting the rotation angle of a rotating member as an absolute angle and a rotation pulse signal generating section for generating a rotation pulse signal including an index signal corresponding to a zero phase of the absolute angle detecting sensor unit and a pulse signal of a constant interval, based on the absolute angle detected by the absolute angle detecting sensor unit. The rotation pulse signal is outputted in an absolute angle output mode, under which the rotational pulse signal is outputted from a time the index signal is outputted to the current absolute angle.
US08040125B2 Device and method for the analysis of a measured signal transmitted via a multi-channel system
A device, in particular, a multi-channel oscilloscope, for the analysis of at least one measured signal transmitted via a multi-channel system, with several measurement channels. The device includes in each case a sampling device, a baseband mixing device, and a filter device, and an analysis device. The measured signal is supplied to the measurement channels and to the respective sampling devices for simultaneous sampling. The sampled measured signal is supplied to the baseband mixing devices connected downstream of the sampling devices for the mixing of the measured signal down into the baseband, to the filter devices connected downstream of the baseband mixing devices for the decimation of the sampled values of the measured signal in the baseband and to the analysis device connected to the filter devices for the analysis of the measured signal.
US08040124B2 Method and apparatus for monitoring leakage current of a faraday cup
A current branch circuit is electrically coupled with a Faraday cup and an operation amplifier separately. The Faraday cup, the current branch circuit and the operation amplifier are formed as a portion of an ion implanter. When the Faraday cup is electrically coupled with a ground through a conductive structure formed by an ion beam received by the Faraday cup, a current flows from the output of the operation amplifier to the current branch circuit to balance another current flow from the current branch circuit through the Faraday cup to the ground. By dynamically monitoring the voltage of the output of the operation amplifier, current flows through the Faraday cup to the ground and through the resistance of the conductive structure can be dynamically monitored. Accordingly, the difference between the ion current measured by the Faraday cup and the real ion current implanted to the wafer can be dynamically acquired to avoid overdosage of the wafer with the ion beam.
US08040123B2 Reference voltage circuit
A reference voltage circuit that obtains a precisely constant voltage by compensating a temperature variation of a reference voltage circuit using band gap voltage. A p-type MOS transistor (PNP) outputs a reference voltage according to a control voltage, and provides respective PNPs having diode connections with currents corresponding to the reference voltage. A temperature compensation unit adds compensation currents proportional to the second power of absolute current to currents flowing in the respective PNPs, so that both voltages generated corresponding to the currents flowing in the respective PNPs become the same in the case where the band gap unit has temperature characteristics including a peak value. The band gap unit has a differential amplifier for outputting the control voltage. In the case where the band gap unit has a bottom value, the compensation unit subtracts the above compensation currents from the currents flowing in the respective PNPs.
US08040115B2 Multiple branch alternative element power regulation
A power regulation circuit includes at least a first regulator connected to a second regulator in series forming a first regulator pair and a third regulator connected to a fourth regulator in series forming a second regulator pair. The first regulator pair is connected in parallel with the second regulator pair. Each individual regulator is configured to separately regulate an input voltage to a predetermined regulated output voltage. The second regulator pair regulates the input voltage if a short condition occurs within the first regulator pair and the second and fourth regulators each regulate the input voltage if an open condition occurs within the first or third regulator respectively.
US08040114B2 Method and apparatus to increase efficiency in a power factor correction circuit
A controller for use in a power factor correction (PFC) converter includes a power factor correction controller circuit coupled to output a drive signal to switch a power switch between an on state and an off state to transfer energy to an output of the PFC converter. The controller also includes an switching frequency adjuster coupled to output a frequency adjust signal to the power factor correction controller circuit to adjust an average switching frequency of the power switch in response to a load signal representative of a load coupled to the output of the PFC converter, wherein the frequency adjust signal is responsive to a range of load conditions.
US08040113B2 Fault tolerant generator or starter/generator with low torque ripple
A fault tolerant generator apparatus includes subsystems isolated from each other, so that the generator may operate in a fault mode with low torque ripple. The apparatus comprises a machine and a power controller unit. In an embodiment, the machine has a plurality of electrical three phase windings and the power controller unit has a plurality of power converters. Each three phase winding of the machine is coupled to a separate corresponding power converter to form an operating subsystem. The operating subsystems are physically and electrically isolated from each other to provide fault tolerant operation of the apparatus. Accordingly, each of the operating subsystems is effective to provide a balanced electrical load for the machine.
US08040112B2 Vehicle-use power generation control device
The vehicle-use power generation control device includes a first function of detecting a temperature around a generator mounted on a vehicle, a second function of setting a target control voltage in accordance with the temperature detected by the first function, and a third function of controlling an output voltage of the generator at the target control voltage set by the second function. The second function is configured to determine the target control voltage on the basis of a target power generation voltage defining the target control voltage to be set at a predetermined temperature, and a predetermined gradient of the target control voltage with respect to the temperature detected by the first function.
US08040109B2 Battery terminal inspection apparatus, inspection method, and cylindrical dry battery
Poor contact on a terminal face that is likely to especially occur with a dry battery with low electromotive force can be appropriately inspected and suppressed. Moreover, the inspection can be highly efficiently performed in a non-contacting state. Also, a cylindrical dry battery in which the poor contact on the terminal face is certainly suppressed is provided. An apparatus 50 that inspects an electric contact at an outer surface of a positive terminal 12 and a negative terminal 32 of a dry battery 10, includes: a light-emitting section 51 that makes a light incident on a part to be measured on a terminal face of the battery; a light-receiving section 52 that detects a reflection state of the light from the part to be measured, and a measurement processing section 55 that quantifies gloss level of the part to be measured based on detection with the light-receiving section 52, wherein evaluation data of the electric contact is obtained with measurement values of the gloss level.
US08040107B2 Battery charger, secondary battery unit and electric apparatus equipped therewith
A mobile telephone has a rechargeable battery, and the rechargeable battery is charged through a battery charger; the battery charger includes an information processing system serving as a charge controller and a battery manager; the battery manager measures a discharging time period of the rechargeable battery so as to store pieces of duration data expressing a charge-and-discharge cycle, and determines a charge initiation level and a charge completion level on the basis of the pieces of duration data in such a manner to reduce the number of charging operation without shortage of electric charge for the rechargeable battery; and the charge controller carries out the charging with reference to the charge initiation level and charge completion level so that the rechargeable battery is prolonged in life time.
US08040106B2 Method of controlling battery charging
The present teachings are directed toward methods of controlling the charging of a battery. The method includes the steps of receiving current and voltage output information for the battery during a charging/discharging cycle at a certain time interval, and using a model to determine both charging efficiency of the battery and the overpotential for a side reaction. These values for the charging efficiency and the overpotential of the side reaction are then compared to respective first and second given values. If either the charging efficiency or the overpotential is less than their respective given values, then the charging of the battery is suspended. The present method is particularly applicable to Li-ion batteries.
US08040105B1 Emergency power generating source for mobile devices
Various portable electronic devices are respectively equipped so that manually provided mechanical energy is converted into electrical energy and stored there in. The stored electrical energy can be used to power the respective portable electronic device for at least a brief period. Suitably equipped portable electronic devices can thus be operated in emergency situations without external sources of electrical power, replacement batteries, or the like.
US08040101B2 Alternating current motor drive circuit and electric vehicle drive circuit
A current source rectifier is provided at an output of an alternating current generator, an alternating current motor is connected to an output of the rectifier via a voltage source inverter, furthermore, two arms having switching elements connected in inverse parallel to diodes are connected to the output of the rectifier, and one terminal of a direct current power source capable of a power supply and absorption is connected to a midpoint between the arms, while the other terminal thereof is connected to a neutral point of motor coils or generator coils, thereby eliminating a need for a large volumetric reactor in a direct current chopper, achieving a downsizing of the circuit.
US08040098B2 Position controller
A position controller includes a position control part that calculates a speed command on the basis of a difference between a position command and a rotation position of a motor, a PI control part that calculates a torque command on the basis of a speed difference between the speed command and a feedback speed, an observer that generates the feedback speed on the basis of the torque command and a rotation speed of the motor, a phase lead compensator that generates a phase lead compensation signal of the torque command on the basis of the speed command, and an adder that generates a new torque command by adding the phase lead compensation signal of the torque command to the torque command.
US08040090B2 Brushless motor controller and brushless motor
A brushless motor controller that controls a brushless motor by determining an energizing timing of a three-phase stator coil based on the rotational position and speed of a rotor. The controller includes a normal timing generation unit, an advancing timing generation unit, and a control switching unit. The normal timing generation unit generates a normal energizing timing. The advancing angle timing generation unit generates an advancing angle energizing timing advanced by a predetermined amount from the normal energizing timing and a final advancing angle energizing timing delayed by a delay amount from the advancing angle energizing timing. The control switching unit switches rotation control of the motor between a first rotation control executed in accordance with the normal energizing timing and a second rotation control executed in accordance with the final advancing angle energizing timing.
US08040087B2 Control devices and methods
A control device for driving a motor which includes a rotor and a stator is provided. The control device includes a Hall detector and driving circuit. The Hall detector detects magnetic flux variation when the rotor rotates and generates a first detection signal and a second detection signal. The first and second detection signals represent current rotation location when the rotor rotates. The driving circuit generates a driving signal to drive the stator. The driving circuit turns on or off the driving signal according to a control signal and the relationship between the first and second detection signals.
US08040086B2 Current detector unit and motor control device
A current detector unit has a current detecting portion detecting a current flowing between a three-phase inverter and a direct-current power supply as a detection current; a three-phase current detecting portion for detecting a three-phase current of the inverter based on the detection current; and a judging portion judging, based on the detection current, whether or not a target time point belongs to a period during which the three-phase current can be detected. If the judging portion judges that the target time point belongs to the period, the three-phase current detecting portion detects the three-phase current.
US08040085B2 Brushless motor apparatus
A brushless motor apparatus includes a fixedly arranged stator 14, a rotor 12 rotated in a manner sequentially excited by a plurality of excitation patterns, a magnetic-pole-position detecting magnet 16 fixed to the rotor and having twice the number of poles of the rotor, and a position detecting element 18 arranged opposite to the magnetic-pole-position detecting magnet and detecting the position of magnetic poles of the rotor, and further includes a motor drive circuit serving as a control such that when the stator is excited with a different excitation pattern between regular excitation patterns on normal operation at the time of phase matching carried out upon actuation of a power source, the rotation angle of the rotor is one-half the rotation angle corresponding to the regular excitation pattern.
US08040083B2 Motor drive control system and method for controlling the same
In a motor drive control system configured to include a converter capable of stepping up the voltage, when the locked state of MG2 operating as an electric motor does not occur (NO in S130), a voltage command value VHref for the converter output voltage is set according to respective required voltages of MG1 operating as an electric generator and MG2 (S140). In contrast, when the locked state of MG2 occurs (YES in S130), the voltage command value VHref is set to a limit voltage Vlmt or less for limiting the voltage step-up by the converter (S150, S180). When the locked state occurs, the converter output voltage is decreased and accordingly the DC voltage switched by the inverter is lowered, so that a switching loss at the switching device forming a part of the inverter is reduced and the temperature increase due to the heat generation can be suppressed.
US08040080B2 Force invariant touch sensitive actuator
A user interface for a lighting control has a touch sensitive front surface; a four-wire resistive touch pad responsive to a point actuation on the front surface, the touch pad having a longitudinal resistive element for providing a first control signal representative of the position of the point actuation along the longitudinal axis, and a lateral resistive element for providing a second control signal representative of the position of the point actuation along the lateral axis; a controller receiving the first and second control signals; a first capacitor coupled between the lateral resistive element and a circuit common that charges and discharges through the longitudinal resistive element of the resistive touch pad to stabilize the first control signal; and first, second, and third switches controlled by the controller to provide a DC supply voltage to the resistive elements and to couple a respective resistive element to the controller. The controller determines, from the second control signal, if the touch sensitive front surface is presently being actuated, and determines, from the first control signal, the position of the point actuation along the longitudinal axis.
US08040079B2 Peak detection with digital conversion
A peak detection/digitization circuit includes a plurality of level detect units, each having a comparator and a flip-flop with a clock input responsive to the output of the comparator. For a detection period, each level detect unit configures a data output signal of the flip-flop to a first data state responsive to a start of the detection period. Further, each level detect unit is configured to enable the comparator responsive to the data output signal having the first data state or a second data state, respectively. While the comparator is enabled during the detection period, the level detect unit configures the data output signal of the flip-flop responsive to a comparison of an input signal to a corresponding reference voltage level by the comparator. The data output signals of the flip-flops of the level detect units at the end of the detection period are used to determine a digital value representative of a peak voltage level of the input signal.
US08040074B2 Discharge-lamp lighting device and luminaire
There is provided a discharge-lamp lighting device that, upon start-up of a high-intensity discharge lamp, alternately outputs a period A during which a starting circuit applies a high voltage to the high-intensity discharge lamp by resonance operation when a DC/AC inverter outputs a high-frequency voltage, and a period B during which the DC/AC inverter applies a low-frequency-square-wave voltage or a DC voltage to the high-intensity discharge lamp via the starting circuit. The period A for applying the high voltage by the resonance operation is set to about a time enough for a high-intensity discharge lamp in an initial aging stage to cause a dielectric breakdown, and a period C for alternately outputting the high-voltage generating period A and the period B for outputting the low-frequency-square-wave voltage or the DC voltage is set to about a time enough for a high-intensity discharge lamp in a life's last stage to cause a dielectric breakdown.
US08040073B2 AC power supply system for balanced energization of a plurality of loads
A gas-discharge lamp igniter is disclosed which has a group of gas-discharge lamps, such as those for LCD backlighting, connected in parallel with one another between the pair of outputs of an AC power supply. Provided one for each lamp to be energized, current-balancing transformers have their secondary windings serially interconnected. The lamps are connected to one of the pair of outputs of the AC power supply via the respective primary windings of the current-balancing transformers and the serial connection of the secondary windings thereof.
US08040070B2 Frequency converted dimming signal generation
There is provided a lighting control circuit comprising a duty cycle detection circuit, an averaging circuit, a waveform generator and a comparator circuit. The duty cycle detection circuit generates a first periodic waveform having a duty cycle and frequency corresponding to an input waveform duty cycle and frequency. The averaging circuit generates a first signal having a voltage level corresponding to the duty cycle of the first periodic waveform. The waveform generator outputs a second periodic waveform having a frequency different from the input waveform frequency. The comparator circuit compares the second periodic waveform with the first signal to generate an output waveform having a duty cycle corresponding to the input waveform duty cycle and a frequency corresponding to the frequency of the second periodic waveform. Also, there are provided methods.
US08040069B2 Method and apparatus for maximizing the sustainable flash of a handheld portable electronic device
A method and apparatus for maintaining a maximum sustained flash current over the whole length of a flash using a programmable current drive in a handheld portable device powered by a battery. The method involves measuring the battery voltage before and after a flash is initiated and calculating the equivalent series resistance (ESR) of the battery. The calculated ESR is then used to adjust the flash current. The process may be repeated to correct for errors in the flash current.
US08040068B2 Radio frequency power control system
A radio frequency (RF) system includes a control module that allocates M predetermined frequency intervals. The system also includes N RF sources that each applies first RF power to electrodes within a plasma chamber at frequencies within an assigned respective one of the M predetermined frequency intervals. The N RF sources also each respond to second RF power including feedback from the plasma chamber. The N RF sources each include a processing module that adjusts the first RF power based on the second RF power and the respective one of the M predetermined frequency intervals. M and N are integers greater than 1.
US08040067B2 Magnetron with cathode decoupled from output
A magnetron including a cathode, an anode axially aligned with the cathode and including a plurality of radial vanes defining resonant cavities, an output coupler connected to a first set of the vanes, a second set of vanes not connected to the output coupler, and extensions formed on only the vanes of the second set, the extensions extending in the axial direction towards the output coupler in a direction parallel to the axis of the anode, the extensions not being connected to the output coupler, whereby a capacitance between the axial extensions and the cathode at least partly compensates for the capacitance between the output coupler and the cathode.
US08040066B1 Flesh illuminating device
A flesh illuminating device (FID) (10) that is comprised of three major elements: an electronic control unit (ECU) (12), an LED assembly (50) and a flesh attachment assembly (70). The ECU (12) and the LED assembly (50) are attached to the flesh attachment assembly (70) which is dimensioned to allow the LED assembly (50) to be attached to a selectable section of flesh. The section of flesh can consist of either an arm, a hand, a leg, a foot, at least one ear lobe or at least one breast. When the FID (10) is manually or remotely turned ON, the LED assembly (50) which preferably consists of at least one LED (60), illuminates causing the selected section of flesh to illuminate.
US08040062B2 Electroconductive laminate, and electromagnetic wave shielding film and protective plate for plasma display
Provided is an electroconductive laminate having a substrate and an electroconductive film formed on the substrate, wherein the electroconductive film has a multilayer structure having an oxide layer and a metal layer alternately laminated from the substrate side in a total layer number of (2n+1) (wherein n is an integer of at least 1); the oxide layer predominantly contains zinc oxide and titanium oxide having a refractive index of at least 2.3; the oxide layer has an atomic ratio of titanium to a total amount of titanium and zinc of 15-50 atomic %; and the metal layer predominantly contains silver or a silver alloy. Also provided is a process for producing the electroconductive laminate.
US08040057B2 Display panel having a contact angle between the substrate and electrode
A display panel includes a substrate and an electrode disposed on the substrate. A contact angle θ between the substrate and the electrode is expressed by the following Equation 1: arc tangent(T/S)≦θ≦arc tangent(40T/S) (S: surface area of electrode cross section, T: peak height of electrode cross section).
US08040051B2 Organic light emitting display and method of manufacturing the same
An organic light emitting display is capable of preventing or reducing a scratch and a short between the wire lines due to the scratch. The organic light emitting display includes a pixel substrate including an organic light emitting element formed on a pixel region and wire lines formed in a surrounding area of the pixel region; and a protrusion formed between the wire lines.
US08040050B2 AC driven light emitting device
An alternating current (AC) driven light emitting device includes a substrate, K number of first light emitting diode (LED) cells arranged in a row on a top surface of the substrate, where K is an integer satisfying K≧3, K number of second LED cells arranged in a row parallel to the row of the first LED cells on the top surface of the substrate, and (K−1) number of third LED cells arranged in a row between the respective rows of the first and second LED cells on the top surface of the substrate. The AC driven light emitting device has a connection structure between LED cells to be operable at an AC.
US08040049B2 Organic EL element and method for manufacturing thereof
One embodiment of the present invention is a method for manufacturing an organic electroluminescence element wherein the organic electroluminescence has a substrate, a partition wall on the substrate, a pixel on the substrate sectioned by the partition wall, an organic luminescent layer on the pixel, forming an under-layer on the entire surface of a luminescent area including the inside surface of the pixel and the upper surface of the partition wall and forming the organic luminescent layer by coating an ink which includes an organic luminous material by a printing method on the surface of the under-layer.
US08040046B2 Organic electroluminescent display having light scattering film
An organic electroluminescent display includes a pair of substrates; an organic electroluminescent device between the pair of substrates, including: a pair of electrodes of an anode and a cathode, and a light-emitting layer between the pair of electrodes; and a light scattering film on a substrate on the viewing side of the pair of substrates, including: a transparent substrate film, and a light scattering layer which contains a light transmitting resin and a light scattering particle having a particle size of from 0.3 μm to 1.2 μm, wherein a ratio of (np/nb) is from 0.80 to 0.95 or from 1.05 to 1.35, taking a refractive index of the light scattering particle and the light transmitting resin as np and nb, respectively.
US08040043B2 Display device and luminous panel
In an organic EL panel for enhancing luminous efficiency and utilization efficiency of light, monochromatic RGB lights emitted from the organic EL panel in which organic EL elements optimum for three monochromatic primary RGB colors are patterned in a stripe-like manner, are adjusted by a liquid crystal panel so as to obtain monochromatic RGB output lights. In addition, the three monochromatic RGB lights are led through color filters with black matrices in order to enhance the color purities and visibilities of the adjusted lights.
US08040042B2 Transparent electroconductive layered structure, organic electroluminescent device using the same layered structure, method for producing the same layered structure, and method for producing the same device
Disclosed is an organic EL device comprising a transparent electroconductive anode layer which is formed by a simple coating method that enables film formation at a low temperature, which organic EL device is free from electrical short circuit between the transparent electroconductive anode layer and a cathode layer. Also disclosed is a transparent electroconductive layered structure used for manufacturing such an organic EL device. The transparent electroconductive layered structure is characterized by comprising a flat and smooth substrate, a transparent electroconductive anode layer which is formed on the substrate by a coating method and mainly composed of conductive particles, and a transparent substrate joined to the transparent electroconductive anode layer via an adhesive layer. The transparent electroconductive layered structure is also characterized in that the flat and smooth substrate can be separated from the transparent electroconductive anode layer.
US08040041B2 Light emitting apparatus
A red nitride phosphor of formula (I) or (II), and two green phosphors of formulas (III) and/or (IV) are included. MwAlxSiyBzN((2/3)w+x+(4/3)y+z):Eu2+  (I) M is any of Mg, Ca, Sr and Ba, and 0.5≦w≦3, x=1, 0.5≦y≦3 and 0≦z≦0.5, MpSiqN((2/3)p+(4/3)q):EU2+  (II) 1.5≦p≦2.5 and 4.5≦q≦5.5, MxMgSizOaXb:Eu2+  (III) M is any of Ca, Sr, Ba, Zn and Mn, X is any of F, Cl, Br and I, and 6.5≦x<8.0, 3.7≦z≦4.3, a=x+1+2z−b/2 and 1.0≦b≦1.9, SicAldOfNg:Eu2+  (IV) c+d=6, 5.0≦c<6, 0
US08040039B2 Device and method for emitting composite output light using multiple wavelength-conversion mechanisms
A device and method for emitting composite output light uses multiple wavelength-conversion mechanisms to convert the original light generated by a light source of the device into longer wavelength light to produce the composite output light. One of the wavelength-conversion mechanisms of the device is a fluorescent substrate of the light source that converts the original light into first converted light. Another wavelength-conversion mechanism of the device is a wavelength-conversion region optically coupled to the light source that converts the original light into second converted light. The original light, the first converted light and the second converted light are emitted from the device as components of the composite output light.
US08040038B2 High frequency, cold cathode, triode-type, field-emitter vacuum tube and process for manufacturing the same
Disclosed herein is a high frequency, cold cathode, triode-type, field-emitter vacuum tube including a cathode structure, an anode structure spaced from the cathode structure, and a control grid, wherein the cathode structure and the anode structure are formed separately and bonded together with the interposition of spacers, and the control grid is integrated in the anode structure.
US08040036B2 Organic light emitting device and method for manufacturing the same
Disclosed is an organic light emitting device and a method of manufacturing the same. The organic light emitting device includes a base rod, and a plurality of organic light emitting units. Each of the plurality of organic light emitting units includes a first electrode formed on the base rod, an organic layer formed on the first electrode, and a second electrode formed on the organic layer. The plurality of organic light emitting units are formed in longitudinal direction of the base rod and come into continuous contact with each other. The first electrode of each of the organic light emitting units comes into contact with the second electrode of each of the organic light emitting units adjoining said first electrode of each of the organic light emitting units.
US08040033B2 Electrode device for gas discharge sources and method of operating a gas discharge source having this electrode device
The present invention relates to an electrode device for gas discharge sources, a gas discharge source comprising such an electrode device and to a method of operating the gas discharge source. The electrode device comprises an electrode wheel (1) rotatable around a rotational axis (3) and a wiper unit (11) arranged to limit the thickness of a liquid material film applied to at least a portion of an outer circumferential surface (18) of the electrode wheel (1) during rotation of said electrode wheel (1). The wiper unit (11) is arranged and designed to form a gap (17) between the outer circumferential surface (18) and a wiping edge (19) of the wiper unit (11) and to inhibit or at least reduce a migration of liquid material from side surfaces to the outer circumferential surface (18) of the electrode wheel (1) during rotation. With the proposed electrode device the electrode wheel (1) can be rotated at higher rotational speeds without the formation of droplets resulting in a higher output power and pulse frequency of a gas discharge source having such an electrode device.
US08040028B2 Photo luminescent light source
An apparatus for providing a photoluminescent light source is disclosed. In one embodiment, the apparatus comprises a light source that emanates light of a particular spectrum, photoluminescent material which converts light from the light source to light of another spectrum, and a selective mirror which reflects light generated by the light source and transmits light generated by the photoluminescent material. The photoluminescent material may be arranged so as to provide a plurality of light sources that emanate light of various colors.
US08040025B2 Method of producing ceramic structure and ceramic structure
Striped sheets each having a structure in which two types of first layers and second layers are stacked in the X direction are prepared. More specifically, first raw material sheets having the same composition as the first layers and second raw material sheets having the same composition as the second layers are regularly alternately stacked in the X direction to prepare a uniaxial stack. The uniaxial stack is then cut along the X direction to prepare the striped sheets. A large number of striped sheets and a large number of homogeneous sheets are then collected to form a sheet group. The striped sheets and the homogeneous sheets are alternately stacked in the Y direction different from the X direction to prepare a biaxial stack having two stacking axes in the X direction and the Y direction. The biaxial stack is fired to produce a ceramic structure.
US08040023B2 Bending transducer for generating electrical energy from mechanical deformations
A bending transducer device for generating electrical energy from deformations, and a circuit module which has such a bending transducer. The bending transducer includes at least one electrically deformable, vibration-capable, electrically conductive support structure, one piezoelectric element and a first contacting element, the conductive support structure having a first restraining area and a second restraining area for restraining the support structure, the piezoelectric element being designed and situated on the support structure in such a way that the piezoelectric element is deformable due to the deformation of the support structure caused by vibrations, and a first electrode for picking up the voltage generated by the deformation of the piezoelectric element is formed and contacted by the support structure, the first contacting element being connected electrically conductively to the support structure outside the first restraining area and the second restraining area.
US08040022B2 Forced vibration piezo generator and piezo actuator
Piezoelectric elements for power generation and/or actuation are described. An aspect is directed to generators utilizing piezoelectric elements for electrical power generation. Such a generator can use one or more arrays of piezoelectric cantilevers for electrical power generation in conjunction with modulated air pressure used for exciting the cantilevers. The pressure level/modulation and cantilever area can be controlled variables for maximizing the bending, and hence energy generation, of the cantilevers. A further aspect is directed to hydraulic fluid actuators utilizing a pumping mechanism that includes a piezoelectric element. The linear actuators can advantageously utilize the high force and high frequency characteristics of a piezoelectric membrane in conjunction with a large stroke and actuation direction conversion afforded by hydraulic transmission.
US08040019B2 Driver and driving method
Conventional drivers for transducers oftentimes did not provide an efficient driving mechanism because the driving signal was not “close enough” to the natural frequency of the transducer. Here, a driver for a transducer is provided that measures the natural frequency of the transducer and generates a driving signal accordingly. Thus, a more efficient driver is provided.
US08040018B2 Piezoelectric transformer type high-voltage power apparatus and image forming apparatus
A piezoelectric transformer high-voltage power source apparatus, in which a driving voltage determined by a value of a driving frequency is applied to a piezoelectric transformer, and thereby an output voltage output by the piezoelectric transformer is provided to a load, includes: an output voltage detection unit to compare an output voltage with a reference voltage for controlling the output voltage, in order to maintain the output voltage at a predetermined value, and based on the comparison result, detecting the change of the output voltage as a digital value; and a driving control unit to perform driving control of the piezoelectric transformer according to the detected digital value. The high-voltage power source apparatus performs stable frequency control without falling into an abnormal oscillation or uncontrollable state, and a high-voltage can be output within a short rise time.
US08040015B2 Rotor for an electric motor
The invention relates to a rotor for an electric motor, comprising a rotor shaft, a rotor core stack that is attached to the rotor shaft, a ring member which surrounds the rotor core stack, and a gap located between the rotor core stack and the ring member. Adhesive is introduced into the gap for fastening the ring member to the rotor core stack. Molded articles that are used as spacers are admixed to the adhesive.
US08040008B2 Axial gap motor
The axial gap motor includes the rotor having: a rotor frame including a plurality of ribs extending in a radial direction, an inner circumferential side annular shaft, and an outer circumferential side annular rim, which are integrally coupled to each other through the ribs; the shaft has shaft side rib mounting holes through which the ribs are mounted, the rim has rim side rib mounting holes through which the ribs are mounted, the ribs have radial inner ends mounted and fixed into the shaft side rib mounting holes and radial outer ends mounted and fixed into the rim side rib mounting holes, and in the rotor frame, the main magnets and the sub magnets are alternately disposed in the circumferential direction, between the shaft and the rim.
US08040006B2 Motor rotor and electric power steering apparatus
A motor rotor has a rotor yoke having a polygonal column structure, a plurality of magnet fixing sections formed on the lateral surface of the rotor yoke, segment magnets respectively fixed to the magnet fixing sections and extending in the axial direction of the rotor yoke, and projections provided on the rotor yoke and protruding outward from the rotor yoke, the projections being provided at each boundary section located between each of the adjacent magnet fixing sections and being provided in pairs in the axial direction of the rotor yoke.
US08040004B2 Motor device with pin terminals
A motor device may include a motor, a plurality of pin terminals protruded from a side face of a motor case on an outer side in a radial plane direction, and a wiring circuit board which is connected with the plurality of the pin terminals. The plurality of the pin terminals includes first pin terminals which are bent at predetermined positions in the radial plane direction toward one side in an axial direction of the motor, and second pin terminals which are bent toward the one side in the axial direction at inner sides in the radial plane direction with respect to the first pin terminals. The wiring circuit board is connected with the first pin terminals and the second pin terminals in a state where a circuit board face is directed in the axial direction.
US08040002B2 Ventilated rotor of high-power turbogenerator for production of electricity
A ventilated rotor of a high-power turbogenerator for the production of electricity has a shaft extending along an axis; a plurality of axial slots obtained in the shaft; a plurality of conductor bars arranged at least partly in the slots; a plurality of axial channels suitable for ventilating the conductor bars; a plurality of subslots, each of which is arranged below a slot to distribute a ventilating gas; a plurality of axial portions traveled over by respective flows of ventilating gas along each axial channel; and at least one radial channel, which is intended to convey directly the ventilating gas from the subslot to the outer surface of the rotor via the conductor bars and is arranged between two consecutive and adjacent axial portions of an axial channel.
US08039995B2 Controlling inductive power transfer systems
An inductive power transfer system (1) comprises a primary unit (10) operable to generate an electromagnetic field and at least one secondary device (30), separable from the primary unit, and adapted to couple with the field when the secondary device is in proximity to the primary unit so that power can be received inductively by the secondary device from the primary unit without direct electrical conductive contacts therebetween. The system detects if there is a substantial difference between, on the one hand, a power drawn from the primary unit and, on the other hand, a power required by the secondary device or, if there is more than one secondary device, a combined power required by the secondary devices. Following such detection, the system restricts or stops the inductive power supply from the primary unit. Such a system can detect the presence of unwanted parasitic loads in the vicinity of the primary unit reliably.
US08039994B2 Reduction of inrush current due to voltage sags
Various systems and methods are provided for minimizing an inrush current to a load after a voltage sag in a power voltage. In one embodiment, a method is provided comprising the steps of applying a power voltage (100) to a load (246), and detecting a sag in the power voltage (106) during steady-state operation of the load. The method includes the steps of adding an impedance (RT) to the load upon detection of the sag in the power voltage, and removing the impedance when the power voltage has reached a predetermined point in the power voltage cycle after the voltage has returned to normal.
US08039993B2 High-voltage bus discharge with logarithmic self-protection
Systems and methods for discharging a high-voltage bus coupled to a discharge circuit are provided. A method comprises obtaining a first voltage level of the high-voltage bus. The method further comprises determining a first discharge time based on the first voltage level and activating the discharge circuit. The method further comprises obtaining a second voltage level of the high-voltage bus after the first discharge time, comparing the first voltage level and the second voltage level, and deactivating the discharge circuit if a difference between the first voltage level and the second voltage level is less than a threshold value.
US08039992B2 Series connection apparatus for generators
In an apparatus for series-connecting at least two engine generators driven by an internal engine and each generates and outputs alternating current through single-phase two-wire output terminals, there are equipped with a magnetic coupler such as transformer that can magnetically couple the single-phase two-wire output terminals of the generators with the primary side and the secondary side, and a connector that can connect one of the single-phase two-wire output terminals of one of the generators and one of the single-phase two-wire output terminals of other of the generators. With this, single-phase three-wire output terminals are formed by the single-phase two-wire output terminals of the generators using the connector as a neutral line, without a communication line.
US08039991B2 Cogeneration system with first and second power plants
In a cogeneration system having a first power plant connected to an AC power feed line between a power network and an electrical load and a first internal combustion engine for driving the first power plant such that exhaust heat of the first engine is supplied to a thermal load, power supply from the first power plant to the power network is interrupted by turning off a switch installed in the feed line, when outage of the power network is detected and a second power plant is operated, such that outputs of the first and second power plants are supplied to the electrical load. With this, it becomes possible to respond to a commercial power network outage for preventing reverse flow of the power output by the cogeneration system into the power network and supplying as much electric power as possible to the electrical load.
US08039990B2 DC UPS configured as intrinsic power transfer switch
Methods of manufacturing a direct current (DC) uninterruptible power supply (UPS) configured as an intrinsic power transfer switch are provided. One method includes providing multiple inputs, multiple rectifiers coupled to the inputs, a common node coupled to the rectifiers, and at least one DC output coupled to the common node. The DC output(s) is/are adapted for connection to at least one electrical load and a first input is adapted for connection to a first electrical service. A second input is adapted for connection to a second electrical service, the DC UPS continuing to supply power to the at least one electrical load in the event of a loss of either the first or second electrical services. Also provided are methods of manufacturing an intrinsic power transfer switch for a high-power electrical load requiring at least two electrical service inputs.
US08039989B2 Apparatus, system, and method for a low cost multiple output redundant power supply
An apparatus, system, and method are disclosed for a low cost multiple output redundant power supply. Disclosed is a power supply that includes a primary stage for regulating voltage on an internal bus. The power supply includes a first regulator stage and a second regulator stage connected to the internal bus. The first regulator stage regulates voltage on a bus configured to connect to a first system. The second regulator stage regulates voltage on a bus configured to connect to a second system. The each regulator stage continues to operate in the event the other regulator stage is not operating. A disconnecting means is connected between the primary stage and the each regulator stage for isolating the failed regulator stage from the other regulator stage and the primary stage.
US08039985B2 Wind turbine
A wind turbine has a housing, multiple cross-flow fan assemblies, a turbine generator assembly, an air guide and multiple wind-driven fans. The housing has a chamber having top and bottom openings. The cross-flow fan assemblies are mounted on the housing and each has a casing, a cross-flow fan blade and a transmission shaft. The cross-fan blade rotates to provide airflow to the chamber. The turbine generator assembly is mounted in the chamber and has a generator, a generator shaft mounted on the generator and a turbine blade mounted on the generator shaft and driven by the airflow to activate the generator. The air guide is mounted on the transmission shafts and guides airflow outwards. The wind-driven fans are mounted respectively on the transmission shafts and are driven by outward airflow. The wind turbine derives energy from the airflow exiting out of the wind turbine for improved energy extraction efficiency.
US08039980B2 Wind turbine generator and method of controlling the same
An object of the invention is to reduce stop time of a wind turbine generator caused by icing on a wind turbine blade in the wind turbine generator. The invention provides the wind turbine generator including an ice detecting unit for detecting an amount of icing on a wind turbine blade, wherein an operation mode is switched to a no-load operation mode with no power being generated in a case where the icing amount detected by the ice detecting unit exceeds a first predetermined value, and an icing amount is detected by the ice detecting unit in a state where the apparatus is operated in the no-load operation mode.
US08039979B2 Wind turbine generator system and method of controlling output of the same
It is an object to supply, to the utmost extent, reactive power according to a demand of a utility grid side while maintaining the power factor within a predetermined range. The wind turbine generator system includes a main controller 19. The controller 19 includes a first controller 31 performing constant-reactive-power regulation, a second controller 32 performing constant-power-factor regulation, a judging unit 34 for judging whether a present operating condition is within a predetermined operating region, and a control-switching unit 35 for switching from the first controller 31 to the second controller 32 when the first controller 31 is performing the constant-reactive-power regulation and the judging unit 34 detects a deviation from the operating region.
US08039972B2 Printed circuit board and method thereof and a solder ball land and method thereof
A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.
US08039971B2 Electronic circuit arrangement
Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.
US08039969B2 Semiconductor device
A semiconductor device 1 includes a semiconductor chip 10 (first semiconductor chip), a semiconductor chip 20 (second semiconductor chip) and a seal ring 30. The semiconductor chip 20 is provided on a surface S1 of the semiconductor chip 10 so as to be spaced apart from the semiconductor chip 10 with a predetermined spacing therebetween. A seal ring 30 is interposed between the semiconductor chip 10 and the semiconductor chip 20. An internal region, which is an inner region of the seal ring 30, and an external region, which is an outer region of the seal ring 30, are provided between the semiconductor chip 10 and the semiconductor chip 20.
US08039965B2 Semiconductor device with reduced layout area having shared metal line between pads
A semiconductor device with a reduced layout area includes pads disposed between a first voltage line and a second voltage line; first and second driver units adjacently disposed at an upper portion or a lower portion of the respective pads; and a metal line disposed between the pads and supplying power commonly to the first and second driver units.
US08039964B2 Fluorine depleted adhesion layer for metal interconnect structure
A line trough and a via cavity are formed within a dielectric layer comprising a fluorosilicate glass (FSG) layer. A fluorine depleted adhesion layer is formed within the line trough and the via cavity either by a plasma treatment that removes fluorine from exposed surfaces of the FSG layer, or by deposition of a substantially fluorine-free dielectric layer. Metal is deposited within the line trough and the via cavity to form a metal line and a metal via. The fluorine depleted adhesion layer provides enhanced adhesion to the metal line compared with prior art structures in which a metal line directly contacts a FSG layer. The enhanced adhesion of metal with an underlying dielectric layer provides higher resistance to delamination for a semiconductor package employing lead-free C4 balls on a metal interconnect structure.
US08039959B2 Microelectronic connection component
A microelectronic connection component includes a substrate having a first surface, a second surface and a peripheral edge. First and second terminals are exposed at the first surface of the substrate. Wire bond pads are exposed proximate the peripheral edge of the substrate at the first surface. First conductive paths couple the first terminals to the wire bond pads. Bonding leads extend beyond the peripheral edge of the substrate. Second conductive paths couple the second terminals to the bonding leads.
US08039956B2 High current semiconductor device system having low resistance and inductance
A high current semiconductor device (for example QFN for 30 to 70 A) with low resistance and low inductance is encapsulated by molding compound (401, height 402 about 0.9 mm) so that the second lead surfaces 110b remain un-encapsulated. A copper heat slug (404) may be attached to chip surface (101b) using thermally conductive adhesive (403). Chip surface (101a), protected by an overcoat (103) has metallization traces (102). Copper-filled windows (107) contact the traces and copper layers (105) parallel to traces (102). Copper bumps (108) are formed on each line in an orderly and repetitive arrangement so that the bumps of one line are positioned about midway between the bumps of the neighboring lines. A substrate has elongated leads (110) oriented at right angles to the lines; the leads connect the corresponding bumps of alternating lines.
US08039955B2 Mold lock on heat spreader
A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped head integral with the neck. The mold lock can be formed to project above a support component, such as a heat spreader, of the semiconductor device and the neck is formed from the support component. The shaped head is of a greater dimension than the neck and can present a “T” shape in side view or a “Y” shape in side view. A base portion of the neck is seated within the support component. A method is provided for forming the described mold lock.
US08039953B2 System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
Heat sink structures employing carbon nanotube or nanowire arrays to reduce the thermal interface resistance between an integrated circuit chip and the heat sink are disclosed. Carbon nanotube arrays are combined with a thermally conductive metal filler disposed between the nanotubes. This structure produces a thermal interface with high axial and lateral thermal conductivities.
US08039952B2 System and method for dissipating heat from a semiconductor module
The system includes a circuit board, a semiconductor module, a heat dissipator, and at least one thermal via. The circuit board has substantially flat opposing first and second sides. The semiconductor module includes multiple semiconductor devices. The semiconductor module is oriented substantially parallel to the circuit board near the first side, while the heat dissipator is disposed near the second side. The thermal via extends through the circuit board to thermally couple the semiconductor module to the heat dissipator, which may be a heat spreader, heat sink, cooling fan, or heat pipe.
US08039951B2 Thermally enhanced semiconductor package and method of producing the same
This invention includes a heat sink structure for use in a semiconductor package that includes a ring structure with down sets and a heat sink connected to the ring structure. The down sets can be slanted or V-shaped. The invention also includes a method of manufacturing a semiconductor package that includes inserting a substrate with an attached semiconductor chip in a first mold portion, placing a heat sink structure on top of a portion of the substrate, placing a mold release film onto a second mold portion, clamping a second mold portion onto a portion of the heat sink structure, injecting an encapsulant into a mold cavity, wherein the encapsulant surrounds portions of the substrate, semiconductor chip and heat sink structure, curing the encapsulant, whereby the heat sink structure adheres to the encapsulant and singulating the encapsulated assembly to form a semiconductor package.
US08039950B2 Solder material lining a cover wafer attached to wafer substrate
The invention relates to a cover wafer with a core and with an inside, whereby the inside has one or more annular outer areas, (an) annular area(s), which inwardly adjoin(s) the outer area(s), and has (a) inner area(s), and to a component cover with only one annular outer area on its inside. The invention is characterized in that at least area(s) has/have a buffer layer, which has a wetting angle of <35° for a metallic eutectic solution that melts in a range of >265° C. to 450° C. The invention also relates to a component cover having one of the areas which has said buffer layer in a comparable manner. The invention additionally relates to a wafer component or to a component, which can be inserted using microsystem technology and which has a cover wafer or component cover applied with the aid of a solder material, and to a method for the production thereof.
US08039949B2 Ball grid array package having one or more stiffeners
Electrically and thermally enhanced die-up ball grid array (BGA) packages are described. A BGA package includes a stiffener, substrate, a silicon die, and solder balls. The die is mounted to the top of the stiffener. The stiffener is mounted to the top of the substrate. A plurality of solder balls are attached to the bottom surface of the substrate. A top surface of the stiffener may be patterned. A second stiffener may be attached to the first stiffener. The substrate may include one, two, four, or other number of metal layers. Conductive vias through a dielectric layer of the substrate may couple the stiffener to solder balls. An opening may be formed through the substrate, exposing a portion of the stiffener. The stiffener may have a down-set portion. A heat slug may be attached to the exposed portion of the stiffener. A locking mechanism may be used to enhance attachment of the heat slug to the stiffener. The heat slug may be directly attached to the die through an opening in the stiffener.
US08039944B2 Electrical connection device and assembly method thereof
An electrical connection device and assembly method thereof includes a substrate with a plurality of contacting portions arranged on a surface thereof; a chip module having a plurality of terminals inclining in one direction and compressed and contacted with the contacting portions correspondingly; at least one restricting structure which restricts the chip module to move a distance relative to the substrate depending on the compression deformation of the terminals when the terminals are contacted with the contacting portions; and at least one elastic element just producing deformation when the chip module moves the distance. When the terminals are compressed and contacted with the contacting portions, the restricting structure restricts the chip module to move the distance depending on the compression deformation of the terminals, so that the elastic element just produces deformation, which make the chip module only move in the direction opposite to the deformation direction of the terminals.
US08039938B2 Airgap micro-spring interconnect with bonded underfill seal
A package includes a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, an assembly material between the pad chip and the spring chip arranged to form a gap between the pad chip and the spring chip, and an underfill material in a portion of the gap to form a mold from the pad chip and the spring chip. A package includes a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, an assembly material between the pad chip and the spring chip arranged to form a gap between the pad chip and the spring chip, an underfill material in the gap to form a mold from the pad chip and the spring chip, and at least one wall between the underfill material and the interconnect area. A method of assembling a package includes aligning a pad chip with a spring chip to form at least one interconnect in an interconnect area, adhering the pad chip to the spring chip so that there is a gap between the pad chip and the spring chip, dispensing underfill material into the gap to seal the interconnect area from an environment external to the package, and curing the underfill material to form a solid mold.
US08039937B2 Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same
Provided are methods of fabricating semiconductor chips, semiconductor chips formed by the methods, and chip-stack packages having the semiconductor chips. One embodiment specifies a method that includes patterning a scribe line region of a semiconductor substrate to form a semiconductor strut spaced apart from edges of a chip region of the semiconductor substrate.
US08039936B2 Semiconductor device
A semiconductor device includes a semiconductor element and a connector. The semiconductor element has a power device of a voltage drive type for controlling an on operation and an off operation of a main current by input of a drive signal. The connector receives the drive signal without making contact with an issuing unit issuing the drive signal, and transmits the drive signal to the semiconductor element. The semiconductor element preferably includes a control unit for converting the drive signal received by the connector into a voltage value, and transmitting the voltage value to the semiconductor element.
US08039932B2 Lead frame, semiconductor device, method of manufacturing the lead frame, and method of manufacturing the semiconductor device
A lead frame is provided which can prevent a short circuit between wires and the ends of adjacent leads, the short circuit being caused by wire sweep during the injection of molding resin, in a configuration where the electrodes of a semiconductor chip and the leads disposed around the semiconductor chip. The lead having sides substantially perpendicular to the direction of a resin flow has an end whose upstream side relative to the resin flow is constricted.
US08039931B2 Power semiconductor component having a topmost metallization layer
A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, whilst avoiding electrically insulating additional protection and sealing layers that are usually to be provided.
US08039923B2 Interdigitated capacitors
The specification describes matched capacitor pairs that employ interconnect metal in an interdigitated form, and are made with an area efficient configuration. In addition, structural variations between capacitors in the capacitor pair are minimized to provide optimum matching. According to the invention, the capacitor pairs are interdigitated in a manner that ensures that the plates of each pair occupy common area on the substrate. Structural anomalies due to process conditions are compensated in that a given anomaly affects both capacitors in the same way. Two of the capacitor plates, one in each pair, are formed of comb structures, with the fingers of the combs interdigitated. The other plates are formed using one or more plates interleaved between the interdigitated plates.
US08039919B2 Memory devices having a carbon nanotube
In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.
US08039915B2 Solid-state image sensor
A solid-state image sensor (1) includes: an imaging device wafer (2A); a plurality of imaging devices (3) which are formed on the imaging device wafer (2A); a spacer (5) which surrounds the imaging devices (3) on the imaging device wafer (2A) and is joined to the imaging device wafer (2A) with an adhesive (7); a transparent protection member (4) which covers the imaging devices (3) on the imaging device wafer (2A) and is attached on the spacer (5); and a plurality of electrostatic discharge protection devices (10A) which are formed on the imaging device wafer (2A), the electrostatic discharge protection devices (10A) being positioned under the spacer (5), each of the electrostatic discharge protection devices (10A) having diffusion layers (12, 13) and a well layer (11) between the diffusion layers (12, 13), the well layer (11) being provided with a channel stopper (20).
US08039914B2 Solid-state imaging device, method of making the same, and imaging apparatus
A solid-state imaging device includes the following elements. A photoelectric conversion section is arranged in a semiconductor layer having a first surface through which light enters the photoelectric conversion section. A signal circuit section is arranged in a second surface of the semiconductor layer opposite to the first surface. The signal circuit section processes signal charge obtained by photoelectric conversion by the photoelectric conversion section. A reflective layer is arranged on the second surface of the semiconductor layer opposite to the first surface. The reflective layer reflects light transmitted through the photoelectric conversion section back thereto. The reflective layer is composed of a single tungsten layer or a laminate containing a tungsten layer.
US08039913B2 Magnetic stack with laminated layer
A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.
US08039912B2 Systems and methods for reduced stress anchors
Anchor systems and methods anchor components of a Micro-Electro-Mechanical Systems (MEMS) device to a substrate. An exemplary embodiment has a trace anchor bonded to a substrate, a device anchor bonded to the substrate, and an anchor flexure configured flexibly couple the trace anchor and the device anchor to substantially prevent transmission of a stress induced in the trace anchor from being transmitted to the device anchor.
US08039906B2 High-voltage metal oxide semiconductor device and fabrication method thereof
A high-voltage metal oxide semiconductor device comprising a main body of a first conductivity type, a conductive structure, a first well of a second conductivity type, a source region of the first conductivity type, and a second well of the second conductivity type is provided. The conductive structure has a first portion and a second portion. The first portion is extended from an upper surface of the main body into the main body. The second portion is extended along the upper surface of the main body. The first well is located in the main body and below the second portion. The first well is kept away from the first portion with a predetermined distance. The source region is located in the first well. The second well is located in the main body and extends from a bottom of the first portion to a place close to a drain region.
US08039905B2 Semiconductor device
A semiconductor device includes a substrate having a first area and a second area, a first transistor in the first area, a second transistor in the second area, an isolation layer between the first area and the second area, and at least one buried shield structure on the isolation layer.
US08039903B1 Passivated tiered gate structure transistor
In various embodiments, a tiered gate structure transistor is provided including a source, a drain, and a gate between the source and the drain. The tiered gate structure transistor including a gate foot having a top portion and sidewalls. A gate head is attached to the top portion of the gate foot. A passivation layer extends along and directly contacts an uppermost surface of the source, and extends along and directly contacts an uppermost surface of the drain, the passivation layer surrounds the sidewalls of the gate foot such that the top portion is not covered by the passivation layer and such that the passivation layer surrounding the sidewalls supports the gate head.
US08039901B2 Epitaxial source/drain transistor
A semiconductor device includes a gate electrode disposed on a semiconductor substrate and source/drain regions disposed at both sides of the gate electrode, the source/drain regions being formed by implanting impurities. The source/drain regions include an epitaxial layer formed by epitaxially growing a semiconductor material having a different lattice constant from that of the semiconductor substrate in a recessed position at a side of the gate electrode, and a diffusion layer disposed in a surface layer of the semiconductor substrate.
US08039892B2 Semiconductor device and a method for manufacturing a semiconductor device
A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a channel formation region formed on a side wall, having a mixture of a first semiconductor material with a first lattice constant, a second semiconductor material and carbon, the second semiconductor material having a second lattice constant differing from the first lattice constant.
US08039891B2 Split charge storage node outer spacer process
Memory cells containing two split sub-lithographic charge storage nodes on a semiconductor substrate and methods for making the memory cells are provided. The methods can involve forming two split sub-lithographic charge storage nodes by using spacer formation techniques. By removing an exposed portion of a fist poly layer between sloping side surfaces or outer surfaces of spacers while leaving portions of the first poly layer protected by the spacers, the method can provide two split sub-lithographic first poly gates. Further, by removing an exposed portion of a charge storage layer between sloping side surfaces or outer surfaces of spacers, the method can provide two split, narrow portions of the charge storage layer, which subsequently form two split sub-lithographic charge storage nodes.
US08039890B2 Random number generating device
A random number generating device includes a semiconductor device including a source region, a drain region, a channel region provided between the source region and the drain region, and an insulating portion provided on the channel region, the insulating portion including a trap insulating film having traps based on dangling bonds and expressed by Six(SiO2)y(Si3N4)1-yMz (M is an element other than Si, O, and N, x≧0, 1≧y≧0, z≧0, the case where x=0 and y=1 and z=0 is excluded), conductivity of the channel region varying randomly depending on the amount of charge caught in the traps, and a random number generating unit connected to the semiconductor device and generating random numbers based on a random variation in the conductivity of the channel region.
US08039889B2 Non-volatile memory devices including stepped source regions and methods of fabricating the same
A non-volatile memory device includes a semiconductor substrate having a first section including a substantially planar first top surface, a second section including a substantially planar second top surface, and a sidewall extending between the first and second top surfaces. The second top surface of the substrate is closer to a bottom surface of the substrate than is the first top surface. A charge storage pattern extends on the first and second top surfaces of the substrate and along the sidewall therebetween. A source region in the first section of the substrate extends from the first top surface into the second section of the substrate and has a stepped portion defined by the sidewall and the second top surface. Related fabrication methods and methods of operation are also discussed.
US08039888B2 Conductive spacers for semiconductor devices and methods of forming
A method of forming a conductive spacer on a semiconductor device. The method includes depositing a polysilicon layer on the semiconductor device, selectively implanting dopant ions in the polysilicon layer on a first side of a transistor region of the semiconductor device to define a conductive spacer area, and removing the polysilicon layer except for the conductive spacer area. Optionally, a silicidation process can be performed on the conductive spacer area so that the conductive spacer is made up of metal silicide.
US08039886B2 Depletion-type NAND flash memory
A depletion-type NAND flash memory includes a NAND string composed of a plurality of serially connected FETs, a control circuit which controls gate potentials of the plurality of FETs in a read operation, a particular potential storage, and an adjacent memory cell threshold storage, wherein each of the plurality of FETs is a transistor whose threshold changes in accordance with a charge quantity in a charge accumulation layer, the adjacent memory cell threshold storage stores a threshold of a source line side FET adjacent to a source line side of a selected FET, and the control circuit applies a potential to the gate electrode of the source line side FET in the read operation, the applied potential being obtained by adding a particular potential stored in the particular potential storage to a threshold stored in the adjacent memory cell threshold storage.
US08039884B2 Semiconductor device having a contact hole with a curved cross-section and its manufacturing method
A semiconductor device includes: a ferroelectric capacitor including a first electrode provided above a substrate, a ferroelectric film provided on the first electrode and a second electrode provided on the ferroelectric film; a hydrogen barrier film that covers a top surface and a side surface of the ferroelectric capacitor; an interlayer dielectric film that covers the ferroelectric capacitor and the substrate; a contact hole that penetrates the interlayer dielectric film and the hydrogen barrier film and exposes the second electrode; a barrier metal that covers a top surface of the second electrode exposed in the contact hole and an inner wall surface of the contact hole and is composed of a conductive material having hydrogen barrier property; and a plug conductive section that is embedded in the contact hole and conductively connects to the barrier metal, wherein the inner wall surface of the contact hole at the hydrogen barrier film includes a concave curved surface facing the interior of the contact hole, and the contact hole at the hydrogen barrier film has an inner diameter that gradually becomes smaller toward the second electrode.
US08039881B2 Deuterated structures for image sensors and methods for forming the same
A pixel cell with a photo-conversion device and at least one structure includes a deuterated material adjacent the photo-conversion device.
US08039877B2 (110)-oriented p-channel trench MOSFET having high-K gate dielectric
A method of forming a field effect transistor having a heavily doped p-type (110) semiconductor layer over a metal substrate starts with providing a heavily doped p-type (110) silicon layer, and forming a lightly doped p-type (110) silicon layer on the P heavily doped-type (110) silicon layer. The method also includes forming a p-channel MOSFET which has a channel region along a (110) crystalline plane in the lightly doped p-type (110) silicon layer to allow a current conduction in a <110> direction. The p-channel MOSFET also includes a gate dielectric layer having a high dielectric constant material lining the (110) crystalline plane. The method further includes forming a top conductor layer overlying the lightly doped p-type (110) silicon layer and a bottom conductor layer underlying the heavily doped p-type (110) silicon layer. A current conduction from the top conductor layer to the bottom conductor layer is characterized by a hole mobility along a <110> crystalline orientation and on a (110) crystalline plane.
US08039876B2 Metal oxide semiconductor (MOS) transistors having a recessed gate electrode
A metal oxide semiconductor (MOS) includes an isolation layer disposed in a semiconductor substrate to define an active region. A source region and a drain region are disposed on both sides of the active region such that a first direction is defined from the source region to the drain region. A channel recess is disposed in the active region between the source and drain regions. The channel recess has a convex surface when viewed from a cross-sectional view taken along a second direction orthogonal to the first direction. A gate electrode fills the channel recess and crosses the active region in the second direction. A gate insulating layer is interposed between the gate electrode and the active region.
US08039871B2 Semiconductor device
A semiconductor device includes: a compound semiconductor substrate; a buffer layer, a channel layer, and a Schottky junction forming layer sequentially formed on the compound semiconductor substrate, the buffer layer, the channel layer, and the Schottky junction forming layer each being a compound semiconductor; a source electrode and a drain electrode located on the Schottky junction forming layer; and a gate electrode disposed between the source and drain electrodes and forming a Schottky junction with the Schottky junction forming layer. The dopant impurity concentration profile in the channel layer is inversely proportional to the third power of depth into the channel layer from a top surface of the channel layer. The channel layer has fixed sheet dopant impurity concentration, and the top surface of the channel layer has a dopant concentration in a range from 5.0×1017 cm−3 to 2.0×1018 cm−3.
US08039870B2 Multifinger carbon nanotube field-effect transistor
A multifinger carbon nanotube field-effect transistor (CNT FET) is provided in which a plurality of nanotube top gated FETs are combined in a finger geometry along the length of a single carbon nanotube, an aligned array of nanotubes, or a random array of nanotubes. Each of the individual FETs are arranged such that there is no geometrical overlap between the gate and drain finger electrodes over the single carbon nanotube so as to minimize the Miller capacitance (Cgd) between the gate and drain finger electrodes. A low-K dielectric may be used to separate the source and gate electrodes in the multifinger CNT FET so as to further minimize the Miller capacitance between the source and gate electrodes.
US08039867B2 ZnO-containing semiconductor layer, its manufacture method, and semiconductor light emitting device
A ZnO-containing semiconductor layer, doped with Se, has an emission peak wavelength in visual light and has a band gap equivalent to a band gap of ZnO.
US08039865B2 Light emitting apparatus, and method for manufacturing the same, and lighting system
A light emitting apparatus includes: a substrate including a first conductive type impurity; a first heatsink and a second heatsink on a first region and a second region of the substrate; second conductive type impurity regions on the substrate and electrically connected to the first heatsink and the second heatsink, respectively; a first electrode electrically connected to the first heatsink on the substrate; a second electrode electrically connected to the second heatsink on the substrate; and a light emitting device electrically connected to the first electrode and the second electrode on the substrate.
US08039861B2 GaN compound semiconductor light emitting element and method of manufacturing the same
The present invention relates to a gallium nitride (GaN) compound semiconductor light emitting element (LED) and a method of manufacturing the same. The present invention provides a vertical GaN LED capable of improving the characteristics of a horizontal LED by means of a metallic protective film layer and a metallic support layer. According to the present invention, a thick metallic protective film layer with a thickness of at least 10 microns is formed on the lateral and/or bottom sides of the vertical GaN LED to protect the element against external impact and to easily separate the chip. Further, a metallic substrate is used instead of a sapphire substrate to efficiently release the generated heat to the outside when the element is operated, so that the LED can be suitable for a high-power application and an element having improved optical output characteristics can also be manufactured. A metallic support layer is formed to protect the element from being distorted or damaged due to impact. Furthermore, a P-type electrode is partially formed on a P-GaN layer in a mesh form to thereby maximize the emission of photons generated in the active layer toward the N-GaN layer.
US08039859B2 Semiconductor light emitting devices including an optically transmissive element
Methods of packaging a semiconductor light emitting device include dispensing a first quantity of encapsulant material into a cavity including the light emitting device. The first quantity of encapsulant material in the cavity is treated to form a hardened upper surface thereof having a shape. A luminescent conversion element is provided on the upper surface of the treated first quantity of encapsulant material. The luminescent conversion element includes a wavelength conversion material and has a thickness at a middle region of the cavity greater than proximate a sidewall of the cavity.
US08039858B2 Fluorescer solution, light-emitting device, and method for manufacturing same
In a fluorescer solution, a plurality of types of fluorescent particles are contained in a resin liquid. Average particle sizes of these fluorescent particles decrease as densities of the types increase. In other words, average settling rates vs of the types of the fluorescent particles ascertained by v s = D p 2 × ( ρ p - ρ f ) × g 18 × η are equal to each other, where Dp is an average particle size of each of the types of fluorescent particles, pp is a density of each of the types of fluorescent particles, pf is a density of the resin liquid, η is a viscosity of the resin liquid, g is the acceleration due to gravity, and vs is an average settling rate of each of the types of fluorescent particles.
US08039857B2 Optical semiconductor device and method of manufacturing optical semiconductor device
An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.
US08039855B2 Radiation-emitting optical component
A radiation-emitting semiconductor component, having a layer structure (30) which includes an active layer (32) which, in operation, emits radiation with a spectral distribution (60), and electrical contacts (36, 38, 40) for applying a current to the layer structure (30), includes a coating layer (44) which at least partially surrounds the active layer (32) and holds back a short-wave component of the emitted radiation (60).
US08039854B2 Pulsed growth of catalyst-free growth of GaN nanowires and application in group III nitride semiconductor bulk material
Exemplary embodiments provide semiconductor devices including high-quality (i.e., defect free) group III-N nanowires and uniform group III-N nanowire arrays as well as their scalable processes for manufacturing, where the position, orientation, cross-sectional features, length and the crystallinity of each nanowire can be precisely controlled. A pulsed growth mode can be used to fabricate the disclosed group III-N nanowires and/or nanowire arrays providing a uniform length of about 10 nm to about 1000 microns with constant cross-sectional features including an exemplary diameter of about 10-1000 nm. In addition, high-quality GaN substrate structures can be formed by coalescing the plurality of GaN nanowires and/or nanowire arrays to facilitate the fabrication of visible LEDs and lasers. Furthermore, core-shell nanowire/MQW active structures can be formed by a core-shell growth on the nonpolar sidewalls of each nanowire.
US08039852B2 Thin film transistor for a liquid crystal device in which a sealing pattern is electrically connected to a common electrode wiring
A display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate has a counter electrode, and the TFT array substrate has a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.
US08039848B2 Semiconductor light emitting device substrate strips and packaged semiconductor light emitting devices
Semiconductor light emitting device packaging methods include fabricating a substrate configured to mount a semiconductor light emitting device thereon. The substrate may include a cavity configured to mount the semiconductor light emitting device therein. The semiconductor light emitting device is mounted on the substrate and electrically connected to a contact portion of the substrate. The substrate is liquid injection molded to form an optical element bonded to the substrate over the semiconductor light emitting device. Liquid injection molding may be preceded by applying a soft resin on the electrically connected semiconductor light emitting device in the cavity. Semiconductor light emitting device substrate strips are also provided.
US08039844B2 Microcrystalline silicon thin film transistor and method for manufacturing the same
This invention provides a top-gate microcrystalline thin film transistor and a method for manufacturing the same. An inversion layer channel is formed in a top interface of a microcrystalline active layer, and being separated from an incubation layer in a bottom interface of the microcrystalline active layer. The inversion layer channel is formed in the crystallized layer of the top interface of the microcrystalline active layer. As such, the present microcrystalline thin film transistor has better electrical performance and reliability.
US08039842B2 Thin film transistor and display device including thin film transistor
A thin film transistor with favorable electric characteristics is provided, which includes a gate electrode layer; a first insulating layer covering the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions, which are provided with a distance therebetween and at least partly overlap with the gate electrode layer; a microcrystalline semiconductor layer which is provided over the first insulating layer in part of a channel formation region, and at least partly overlaps with the gate electrode layer and does not overlap with at least one of the pair of impurity semiconductor layers; a second insulating layer between and in contact with the first insulating layer and the microcrystalline semiconductor layer; and an amorphous semiconductor layer over the first insulating layer, covering the second insulating layer and the microcrystalline semiconductor layer. The first insulating layer is a silicon nitride layer and the second insulating layer is a silicon oxynitride layer.
US08039840B2 Display device and method for manufacturing the same
A display device having the high aperture ratio and a storage capacitor with high capacitance is to be obtained. The present invention relates to a display device and a manufacturing method thereof. The display device includes a thin film transistor which includes a gate electrode, a gate insulating film, a first semiconductor layer, a channel protective film, a second semiconductor having conductivity which is divided into a source region and a drain region, and a source electrode and a drain electrode; a third insulating layer formed over the second conductive film; a pixel electrode formed over the third insulating layer, which is connected to one of the source electrode and the drain electrode; and a storage capacitor formed in a region where a capacitor wiring over the first insulating layer and the pixel electrode are overlapped with the third insulating layer over the capacitor wiring interposed therebetween.
US08039835B2 Semiconductor device, method for manufacturing the same, electro-optical device and electronic apparatus
A semiconductor device includes a substrate, a transparent oxide layer disposed on one surface side of the substrate, a gate disposed apart from the transparent oxide layer, and a gate insulating layer disposed between the transparent oxide layer and the gate. The transparent oxide layer includes a source, a drain, and a channel formed integrally between the source and the drain, and is made of a transparent oxide material as the main material. The gate provides an electric field to the channel. The gate insulating layer insulates the source and the drain from the gate. The average thickness of the channel is smaller than the average thickness of the source and the drain so that the source and the drain function as conductors and the channel functions as a semiconductor.
US08039827B2 Apparatus and methods for measuring at least one physical characteristic of a threaded object
In some embodiments, an inspection system includes a collimated light source defining a source optical path and useful to cause a collimated light beam to propagate along the source optical path and a sensing device defining a sensor optical path. A positioning device includes a positioning device stage movably disposed relative to the positioning device, sensing device and collimated light source. A retention mount is disposed on the positioning device stage and within the sensor optical path such that when an object is retained within the retention mount, the object blocks at least a portion of the collimated light beam.
US08039825B2 Installation for exposing a cinematographic film from digital images
This installation includes: a light source; means for storing film photoresist for exposure and exposed photoresist; a film carrier for positioning said film photoresist at an exposure plane; a projection lens capable of projecting the digital images at the exposure plane; a liquid crystal matrix where the various digital images to be exposed are displayed; a retractable mirror oriented at 45° to an optical axis of the projection lens; and an image analysis device positioned symmetrically to said exposure plane with regard to the plane containing said mirror when the latter is in place on the optical axis. When said mirror is positioned on the optical axis, the image analysis device is suitable for receiving the image transmitted by the liquid crystal matrix issuing from the projection lens. The signals thereby detected are processed using an associated software, for setting the characteristics of the optical members of the installation.
US08039824B2 Canister for final repository of spent nuclear fuel
The invention relates to a canister (1) for final repository of spent fuel elements from a nuclear reactor, comprising an insert (2) that contains said spent fuel elements, an inner copper casing (4a, 4b, 4c) that encloses the insert (2), and at least one outer casing (5a, 5b, 5c) that encloses the copper casting and that consists of a passive-film-forming metal or metal alloy, the passive film on the casing being constituted by an essentially oxidic film that is rich in one or more of the metals in the group of metals that consist of the metals zirconium, chromium and titanium.
US08039823B2 Material activating device
There is provided a material activating device capable of being formed in any one of various shapes and having an improved material activating effect.A material activating device formed by superposing a plurality of polymer film 31 each having one surface coated with a metal film 32, and radioactive layer 33 of a radioactive means has a very small thickness and is very flexible. The metal films 32 are insulated from each other by the electrically insulating polymer films 31 and are spaced from each other by a distance corresponding to the thickness of the polymer films 31. Consequently, the material activating effect of the radioactive rays emitted by the radioactive layer 33 of the radioactive means is enhanced.
US08039822B2 Particle therapy apparatus and method for modulating a particle beam generated in an accelerator
The invention relates to a particle therapy apparatus having an accelerator for generating a particle beam, a passive energy modulator comprising an absorber element, and a control entity. The control entity is designed to switch between an active adjustment of the energy in the accelerator and a passive energy modulation by the energy modulator, for the purpose of changing the energy of the particle beam from a high energy level to a low energy level in a step-by-step manner. In particular, this has the effect of shortening the dead times when changing between the energy levels.
US08039814B2 Luminescence sensor operating in reflection mode
A luminescence sensor, such as a luminescence biosensor or a luminescence chemical sensor, includes a substrate having at least one aperture filled with a medium. The aperture has a first lateral dimension larger than the diffraction limit of excitation radiation in the medium, and a second lateral dimension smaller than the diffraction limit of the excitation radiation in the medium. A method is also provided for the detection of luminescence radiation, e.g. fluorescence radiation, generated by at least one optically variable molecule, e.g. fluorophore, in the at least one aperture. Beneficially, the excitation radiation is polarized to suppress the excitation radiation in the apertures. The luminescence sensor and the method are able to detect relatively low concentrations of optically variable molecules, e.g. fluorophores.
US08039795B2 Ion sources for improved ionization
Improved apparatuses and methods are provided for ionizing samples and analyzing the samples with mass spectrometry.
US08039794B2 Mass spectrometry assay for thiopurine-S-methyl transferase activity and products generated thereby
Methods are described for measuring the amount of a methylation TPMT enzyme product in a sample. More specifically, mass spectrometric methods are described for detecting and quantifying 6-MMP or isotopically labeled 6-MMP in a test sample utilizing mass spectrometric techniques and for using such methods to determine the activity of TPMT enzyme that is present in a sample.
US08039792B2 Wide band gap semiconductor photodetector based gamma ray detectors for well logging applications
A gamma ray detector uses a scintillation detector having a response that matches a response characteristic of a photodiode. The detector may be used to measure natural gamma rays and/or gamma rays produced by interaction of neutrons from a neutron source with the earth formation.
US08039790B2 Phantoms and methods for verification in radiotherapy systems
Methods and phantoms for verification in radiotherapy systems. A phantom for verification in a radiotherapy system may include a body to support a detector surface for obtaining a panoramic image of individual radiation beams in the radiotherapy system. The detector surface may be positioned in an intermediate region between the one or more sources and a target isocenter of the radiotherapy system. The detector surface may at least partially surround the target isocenter.
US08039787B2 Digital pulse processor slope correction
A method of adjusting a response of an energy measuring filter, such as an FIR filter, of a pulse processor based on a slope of a preamplifier signal having a plurality of step edges each corresponding to a respective photon is provided that includes receiving a digital version of the preamplifier signal comprising a plurality of successive digital samples each having a digital value, the preamplifier signal having a portion defined by a first one of the step edges and a second one of the step edges immediately following the first one of the step edges, using the digital values of each of the digital samples associated with the portion to determine an average slope of the portion normalized by a length of the portion, and using the average slope of the portion normalized by a length of the portion to correct the response of the energy measuring filter.
US08039786B2 Absolute position encoder obtains signals corresponding to individual imaging ranges of imaging optical systems
In an absolute position detection type photoelectric encoder devised so as to detect a pseudorandom pattern disposed on a main scale by means of a plurality of imaging optical systems, assembling of the absolute position detection type photoelectric encoder is facilitated and production cost thereof is reduced by providing: a single light-receiving array element disposed on the imaging surfaces of the imaging optical systems, which incorporates a greater light-receiving array portion in the length measurement direction than the light-receiving range of the respective imaging optical systems; a window signal storing portion for storing a window signal showing a light-receiving range of the respective imaging optical systems; and a window signal comparison portion for obtaining signals corresponding to individual imaging ranges by comparing scanning signals of the light-receiving array element with window signals.
US08039785B2 LED array having array-based LED detectors
The present invention provides an optical system having an array of light emitting semiconductor devices to performing an operation that have multiple characteristics associated with performing the operation. The array includes at least one detector located within the array to selectively monitor multiple characteristics of the light emitting semiconductor devices and is configured to generate a signal corresponding to the selected characteristic. A controller is configured to control the light emitting semiconductor devices in response to the signal from the at least one detector. At least one of the multiple characteristics may be concentrated at an area of the array and the at least one detector may be located within the array at the area of the array to selectively monitor characteristic that is concentrated at the area of the array.
US08039784B2 Readout chip with binary counter for fast single photon counting
A readout chip for single photon counting has a plurality of N individually working channels each assigned to a respective detector diode. Each channel has a counter designed as a binary counter having a length of M bits and a number of programmable bits. Further, the readout chip has a serial shift register or parallel data input register for entering values for the counter and the programmable bits, and a number of data output shift registers each having a number of K data outputs. Means are provided for selectively multiplexing each of the K data outputs onto a selectable bit of the data output shift register.
US08039783B2 Methods and materials for detecting light released from a labeling material using self triggering excitation
The present disclosure relates generally to methods and materials for detecting light released from a labeling material using self triggering excitation. In particular, the present disclosure provides an architecture for a detection system that detects accumulated phase shifts in the form of a ring-oscillator frequency. The present disclosure provides devices for detection of a light released by a labeling material, the device comprising: a start-up circuit that provides power to a pulse generator block that drives an LED driver, a photodetector that detects the light released by a labeling material and provides a first signal; a variable reference that provides a second signal; a slicer for comparing the first signal to the second signal, wherein the slicer generates an output signal with a delay that triggers the pulse generator block after the start-up circuit is disabled; a frequency reference; and a frequency counter for comparing the output from the slicer to the frequency reference thereby producing a output signal.
US08039782B2 Optical sensor device and electronic apparatus with an amplifier circuit and dual level shift circuit
In an optical sensor device employing an amorphous silicon photodiode, an external amplifier IC and the like are required due to low current capacity of the sensor element in order to improve the load driving capacity. It leads to increase in cost and mounting space of the optical sensor device. In addition, noise may easily superimpose since the photodiode and the amplifier IC are connected to each other over a printed circuit board. According to the invention, an amorphous silicon photodiode and an amplifier configured by a thin film transistor are formed integrally over a substrate so that the load driving capacity is improved while reducing cost and mounting space. Superimposing noise can be also reduced.
US08039778B2 Laser processing apparatus and laser processing method
The present invention relates to a laser processing apparatus and the like having a structure for implementing at the same time both an efficient laser processing in the place where a laser beam is difficult to reach and a laser processing without damages in the place where the laser beam is easy to reach. This laser processing apparatus comprises a laser light source, an irradiation optical system applying a laser beam to an object while scanning the laser beam, a photo-detector detecting the laser beam applied from the irradiation optical system, and a control section of making switching between a continuous oscillation and a pulse oscillation of the laser beam at the laser light source. In particular, the control section makes a continuous oscillation of the laser beam with respect to the laser light source in the case in which the laser beam applied from the irradiation optical system is detected at the photo-detector; while it makes a pulse oscillation of the laser beam with respect to the laser light source in the case in which no laser beam applied from the irradiation optical system is detected at the photo-detector.
US08039769B2 Joystick deactivation
The invention concerns an armrest mounted joystick for communication of operator initiated control signals to a vehicle controller. A plurality of switches require that the operator be safely located in the operation position in order for the control signals to reach the vehicle controller. Only when all of the switches change state, at substantially the same time, does the joystick either activate or de-activate, in response.
US08039767B2 Compound operation input device
A compound operation input device includes a case; an operating member for pushing operation, tilting operation and rotating operation, having a push button for pushing operation and a rotary knob for rotating operation; an operation support portion for supporting the operating member in a pushingly, tiltingly and rotatingly operable manner; and at least one of a tilting operation detecting push switch and a pushing operation detecting push switch, disposed to be contactable with a base end side of at least one of the operation support portion and the operating member. The push switch includes a snap plate, and a key top with one end portion contactable with a top portion of the snap plate, the key top being elastically extendable and contractable in an axial direction. An elastic force of the key top is set to be greater than that of the snap plate.
US08039761B2 Printed circuit board with solder bump on solder pad and flow preventing dam
Disclosed is a printed circuit board having a flow preventing dam and a manufacturing method thereof. The printed circuit board includes a base substrate having a solder pad, a solder bump formed on the solder pad of the base substrate, and a flow preventing dam formed on a peripheral area of the base substrate using a dry film resist. The flow preventing dam can prevent the outflow of an underfill solution and can be simply formed.
US08039760B2 Mounting board and method of producing the same
A mounting board of the invention includes: an insulative base; a plurality of first conductive elements provided on the insulative base and having lands; a plurality of second conductive elements disposed on the lands; a plurality of solder pieces each disposed on each of the second conductive elements; and an electronic component which includes electrode sections each contacting each of the solder pieces, wherein the first conductive elements are made from a first element that contains at least silver; the second conductive elements are made from a second element that contains at least copper; and the solder pieces are made from a third element that contains at least tin.
US08039759B2 Method for manufacturing a printed circuit board with a thin film capacitor embedded therein having a dielectric film by using laser lift-off, and printed circuit board with a thin film capacitor embedded therein manufactured thereby
A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.
US08039758B2 Mounting structure for electronic component
A mounting structure is provided in which outer electrodes of an electronic component are soldered on lands provided on a circuit board. Two of the lands on which two of the outer electrodes disposed along a diagonal of a principal surface of the electronic component are soldered, are configured such that inner vertexes defined at opposite ends of a minimum distance between the lands are aligned with inner vertexes defined at opposite ends of a minimum distance between the outer electrodes. That is, sides of the outer electrodes are aligned with outer edges of the lands. Accordingly, only one positional relationship is permitted between the electronic component and the mounting surface, the positional relationship causing a total area of the outer electrodes facing the lands to be maximized.
US08039757B2 Electronic part mounting substrate and method for producing same
An electronic part mounting substrate has a ceramic substrate, a metal member bonded to one side of the ceramic substrate, a metal plate of aluminum or an aluminum alloy, one side of the metal plate being bonded directly to the other side of the ceramic substrate, and an electronic part bonded directly to the other side of the metal plate.
US08039756B2 Multilayered wiring board, semiconductor device in which multilayered wiring board is used, and method for manufacturing the same
A multilayered wiring board has electrodes disposed on a first surface and a second surface, alternately layered insulation layers and wiring layers, and vias that are disposed in the insulation layer and electrically connect the wiring layers. The second electrode disposed on the second surface is embedded in the insulation layer exposed on said second surface, and the second wiring layer covered by the insulation layer exposed on said second surface does not have a layer for improving adhesion to the insulation layer.
US08039753B2 Flexible printed circuit board
A flexible printed circuit board includes a first substrate portion having at least one first terminal, a second substrate portion in communication with the first substrate portion and having at least one circuit device, a connection substrate portion in communication with the second substrate portion, the connection substrate portion extending away from the second substrate portion in a same direction as the first substrate portion, and a third substrate portion in communication with the connection substrate portion, the third substrate portion having at least one second terminal.
US08039751B2 Motor and compressor with the same
In a motor, one ends of a plurality of electric wires with the other ends connected to the motor side are connected to a terminal rod, and the terminal rod is exposed to the exterior of a motor casing via a terminal base. The terminal rod is provided with a flange portion and a crimping portion. A concave part is formed on an end surface of the crimping portion, and a communication part providing communication between an outer surface and the concave part is formed. The terminal base is provided with a depression to be fitted to the flange portion of the terminal rod, a seal portion having a diameter reduced from the depression, and a through portion passing from the seal portion through to the exterior of the motor casing. A seal member is put on the terminal rod. In a state that the electric wires are inserted into the concave part of the crimping portion, the outer surface of the crimping portion is pressurized, so that the electric wires are fixed to the crimping portion. With such a configuration, it is possible to reduce electric resistance between the electric wires from the motor side and the terminal rod and strongly combine the electric wires and the terminal rod.
US08039750B2 Cable connector having length adjustability
A combined cable connector and cable untangler is disclosed. The combined cable connector and untangler comprises a single elongated body with at least one through hole extending along the whole body length. The cable connector is adapted to be used with a portable electronic device. The cable connector enables the cable to be adapted in length and prevents it from being entangled.
US08039748B2 Electronic apparatus with flexible flat cable for high-speed signal transmission
A flexible flat cable includes a plurality of ground lines and a plurality of signal lines. Each of the ground lines is connected to an electromagnetic shield layer by two connection line members. An arrangement of the ground lines and signal lines that are positioned in a region on one side of a center line of the flexible flat cable and an arrangement of the ground lines and signal lines on a region on the other side are symmetric with respect to the center line. In each of two connectors to which end portions of the flexible flat cable are coupled, terminals corresponding to the ground lines are grounded, a terminal corresponding to a signal line interposed between two ground lines is assigned a high-speed signal, and a terminal corresponding to another signal line is assigned a ground potential.
US08039746B2 Electric connector and cable
An electrical connector includes a terminal (11) fixed to a connector housing (10). The electrical connector includes a conductor (23) exposed from a covering (22) and having a connection portion connected to a connection portion of the terminal (11). The electrical connector includes a foam element (31) at a predetermined foam ratio located around respective connection portions of the conductor (23) and the terminal (11).
US08039745B2 Cable strain relief module assembly
A cable strain relief module assembly for securing a cable and providing strain relief is described. The cable strain relief module assembly includes a module and a twist nut. The module has a male threaded portion and the twist nut has a female threaded portion. A portion of a cable may be captivated between the male threaded portion of the module and the female portion of the twist nut when the module and twist nut are engaged.
US08039743B2 Apparatus and method for longitudinal sealing of electrical lines
In a method for longitudinal sealing of electrical conductors that include one or more conductor elements disposed inside an external sheath, and include cavities between the individual conductor elements and between the individual conductor elements and the external sheath, in which the one end, requiring sealing, of the conductor is immersed in a liquid sealing compound, and the other end of the conductor has negative pressure applied to it. A sealing apparatus suitable for carrying out said method encompasses a supply reservoir for the liquid sealing compound into which the one end, requiring sealing, of the conductor is immersed, and a negative-pressure source to which the other end of the conductor is connected.
US08039742B2 Superconductive cable
A superconductive cable capable of promoting a heat insulating function by a heat insulating tube. A heat insulating tube contained within a cable core of a superconductive cable includes a first metal tube and a second metal tube and a third metal tube arranged from an inner side in a diameter direction. An inner side heat insulating portion is formed between the first metal tube and the second metal tube, and an outer side heat insulating portion is formed on an inner side of the third metal tube and on an outer side of the inner side heat insulating portion. A heat insulating function of the heat insulating portion on an outer side is set to be lower than a heat insulating function of the heat insulating portion on an inner side thereof.
US08039738B2 Active rare earth tandem solar cell
The use of rare-earth (RE and O, N, P) based materials to transition between two different semiconductor materials and enable up and/or down conversion of incident radiation is disclosed. Rare earth based oxides, nitrides and phosphides provide a wide range of lattice spacing enabling, compressive, tensile or stress-free lattice matching with Group IV, III-V, and Group II-VI compounds.
US08039733B2 Construction method of solar battery modules
A construction method of solar battery modules by which solar battery modules are fixed using a fixing member, including: connecting a first frame body of a solar battery module between a pedestal and a to-be connected portion on a side opposite to a side of a plate-like portion extending outward farther than the pedestal with respect to an axis of the fixing member; sliding the fixing member to a position of a structural member such as a rafter along the first frame body; fixing the fixing member to a support member by the plate-like portion extending outward farther than the pedestal; and connecting a first frame body of a second solar battery module different from the first solar battery module between the pedestal and the to-be connected portion on a side identical to a side of the plate-like portion extending outward farther than the pedestal with respect to the axis.
US08039732B2 Solar energy trap
A solar energy trap (10) includes a chamber (11) having inlet post (12), such that solar energy (13) entering the chamber (11) through the inlet port (12) is absorbed and reflected within the chamber (11) means until substantially all the solar energy (13) is absorbed by the chamber (11). Preferably, the inlet port (12) is arranged to cause photons of the solar energy (13) entering the chamber (11) to circulate substantially in a single direction within the chamber (11) until absorbed, such that on re-passing the inlet port (12) substantially no photons emerge from the inlet port (12).
US08039726B2 Thermal transfer and power generation devices and methods of making the same
A device includes a first thermally conductive substrate having a first patterned electrode disposed thereon and a second thermally conductive substrate having a second patterned electrode disposed thereon, wherein the first and second thermally conductive substrates are arranged such that the first and second patterned electrodes are adjacent to one another. The device includes a plurality of nanowires disposed between the first and second patterned electrodes, wherein the plurality of nanowires is formed of a thermoelectric material. The device also includes a joining material disposed between the plurality of nanowires and at least one of the first and second patterned electrodes.
US08039724B1 Removable electronic drum head for an acoustic drum
A removable electronic drum head for an acoustic drum is disclosed. The electronic drum head includes an elastic strike layer, a rigid plate centered below the elastic strike layer. A first sensor is attached to a bottom surface of the rigid plate. A structural body supports the elastic strike layer, rigid plate and first sensor. The structural body is further adapted to attach to an acoustic drum. Other optional foam layers may be included above and below the rigid plate.
US08039722B2 Methods and formats for visually expressing music
A method for visually expressing music includes marking a region of a stave to identify a musical note's pitch, wherein the stave includes four lines each of which is parallel or substantially parallel to the other three lines, and each of which defines at least three regional positions where a mark can be made to identify a musical note's pitch, wherein the stave includes at least twelve regional positions and each of the at least twelve regional positions corresponds to a unique pitch of a musical note within a musical octave. The method also includes marking the region of the stave to also identify the duration of the musical note. With at least twelve regional positions defined by the stave, each of the 12 pitches in an octave can have a position within the stave that uniquely identifies the pitch of the note. Furthermore, the stave can span exactly the twelve pitches in an octave to allow one to quickly identify the pitch of the note being visually expressed without having to memorize each position and its associated pitch in the stave. In addition, each pitch in an octave can be identified by numbers (1-N). Western music using 12 notes would have the following 12 Arabic numerals, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12.
US08039721B2 Kit and method for learning to play an instrument
A kit and method for learning rhythms, composing music, to play a musical instrument, and then read music; in that particular order of events. The kit comprises a set of hands on manipulatives that assemble into a structured system of interactive musical instrument concept training components. The method comprises employing the kit according to instructions in at least one or more training manuals to assemble the hands on manipulatives into a structured system of interactive musical instrument concept training components.
US08039718B2 Inbred corn line BB33
An inbred corn line, designated BB33, is disclosed. The invention relates to the seeds of inbred corn line BB33, to the plants and plant parts of inbred corn line BB33 and to methods for producing a corn plant, either inbred or hybrid, by crossing inbred corn line BB33 with itself or another corn line. The invention further relates to methods for producing a corn plant containing in its genetic material one or more transgenes and to the transgenic plants produced by that method and to methods for producing other inbred corn lines derived from inbred corn line BB33.
US08039716B1 Maize variety hybrid 10085650
A novel maize variety designated 10085650 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety 10085650 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into 10085650 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety 10085650, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety 10085650. This invention further relates to methods for producing maize varieties derived from maize variety 10085650.
US08039715B1 Maize variety hybrid X7K448
A novel maize variety designated X7K448 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety X7K448 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X7K448 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X7K448, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X7K448. This invention further relates to methods for producing maize varieties derived from maize variety X7K448.
US08039713B2 Plants and seeds of hybrid corn variety CH105778
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH105778. The invention thus relates to the plants, seeds and tissue cultures of the variety CH105778, and to methods for producing a corn plant produced by crossing a corn plant of variety CH105778 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH105778.
US08039711B2 Plants and seeds of hybrid corn variety CH110135
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH110135. The invention thus relates to the plants, seeds and tissue cultures of the variety CH110135, and to methods for producing a corn plant produced by crossing a corn plant of variety CH110135 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH110135.
US08039709B2 Plants and seeds of hybrid corn variety CH414517
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH414517. The invention thus relates to the plants, seeds and tissue cultures of the variety CH414517, and to methods for producing a corn plant produced by crossing a corn plant of variety CH414517 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH414517.
US08039708B2 Plants and seeds of hybrid corn variety CH550494
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH550494. The invention thus relates to the plants, seeds and tissue cultures of the variety CH550494, and to methods for producing a corn plant produced by crossing a corn plant of variety CH550494 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH550494.
US08039701B2 Cotton variety 565452G
The invention relates to the novel cotton variety designated 565452G. Provided by the invention are the seeds, plants, plant parts and derivatives of the cotton variety 565452G. Also provided by the invention are tissue cultures of the cotton variety 565452G and the plants regenerated therefrom. Still further provided by the invention are methods for producing cotton plants by crossing the cotton variety 565452G with itself or another cotton variety and plants produced by such methods.
US08039699B2 Cotton variety 303308G
The invention relates to the novel cotton variety designated 303308G. Provided by the invention are the seeds, plants, plant parts and derivatives of the cotton variety 303308G. Also provided by the invention are tissue cultures of the cotton variety 303308G and the plants regenerated therefrom. Still further provided by the invention are methods for producing cotton plants by crossing the cotton variety 303308G with itself or another cotton variety and plants produced by such methods.
US08039696B2 Soybean cultivar 8023330
A soybean cultivar designated 8023330 is disclosed. The invention relates to the seeds of soybean cultivar 8023330, to the plants of soybean 8023330, to plant parts of soybean cultivar 8023330 and to methods for producing a soybean plant produced by crossing soybean cultivar 8023330 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars or breeding cultivars and plant parts derived from soybean variety 8023330, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar 8023330 and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants and plant parts produced by crossing the cultivar 8023330 with another soybean cultivar.
US08039691B2 Pea line 08250833
The invention provides seed and plants of the pea line designated 08250833. The invention thus relates to the plants, seeds and tissue cultures of pea line 08250833, and to methods for producing a pea plant produced by crossing a plant of pea line 08250833 with itself or with another pea plant, such as a plant of another line. The invention further relates to seeds and plants produced by such crossing. The invention further relates to parts of a plant of pea line 08250833, including the seed, pod, and gametes of such plants.
US08039690B2 Stress-regulated genes of plants, transgenic plants containing same, and methods of use
Clusters of plant genes that are regulated in response to one or more stress conditions are provided, as are isolated plant stress-regulated genes, including portions thereof comprising a coding sequence or a regulatory element, and to consensus sequences comprising a plant stress-regulated regulatory element. In addition, a recombinant polynucleotide, which includes a plant stress-regulated gene, or functional portion thereof, operatively linked to a heterologous nucleotide sequence, is provided, as are transgenic plants, which contain a plant stress-regulated gene or functional portion thereof that was introduced into a progenitor cell of the plant. Also provided are methods of using a plant stress-regulated gene to confer upon a plant a selective advantage to a stress condition, methods of identifying an agent that modulates the activity of a plant stress-regulated regulatory element, and methods of determining whether a plant has been exposed to a stress.
US08039678B2 Process for the preparation of chloromethyl 2,2,2-trifluoro-1-(trifluoromethyl) ethyl ether
The present invention refers to a process for the preparation of chloromethyl 2,2,2-trifluoro-1-(trifluoromethyl) ethyl ether (sevochlorane), which consists of reacting hexafluoroisopropanol with: a formaldehyde equivalent selected between paraformaldehyde or 1,3,5-trioxane, a chlorinating agent selected from the group consisting of oxalyl chloride, phosphorus trichloride, phosphorus pentachloride, phosphorus oxychloride, sulfuryl chloride and thionyl chloride, and a strong acid selected from the group consisting of concentrated or fuming sulfuric acid. Said process provides sevochlorane in high purity and yield, which can be converted to sevoflurane by known means.
US08039675B2 Catalysts
Catalysts suitable for asymmetric hydrogenation reactions are described comprising the reaction product of a group 8 transition metal compound, a chiral phosphine and a chiral diamine of formula (I) in which R1, R2, R3 and R4 are independently hydrogen, a saturated or unsaturated alkyl or cycloalkyl group, an aryl group or a urethane or sulphonyl group and R5, R6, R7 and R8 are independently hydrogen, a saturated or unsaturated alkyl or cycloalkyl group, or an aryl group, at least one of R1, R2, R3 and R4 is hydrogen and A is a linking group comprising one or two substituted or unsubstituted carbon atoms.
US08039674B2 Compound having S1P receptor binding potency and use thereof
Provided are: a compound represented by formula (I): (wherein ring A and ring D each represent a cyclic group which may have a substituent(s); E and G each represent a bond or a spacer having 1 to 8 atoms in its main chain; L represents a hydrogen atom or a substituent; X represents amino which may have a substituent(s), or a heterocyclic group which contains at least one nitrogen atom and which may have a substituent(s); n represents 0 to 3, in which when n is 2 or more, a plurality of ring A's may be the same or different from one another); a salt thereof; an N-oxide form thereof; a solvate thereof, a prodrug thereof; and a medicament which includes those. The compound represented by formula (I) is capable of binding S1P receptors (in particular, EDG-1 and/or EDG-6), and useful for preventing and/or treating rejection in transplantation, autoimmune diseases, allergic diseases, etc.
US08039673B2 Macromolecular antioxidants comprising differing antioxidant moieties: structures, methods of making and using the same
Described are antioxidant macromolecules and methods of making and using same.
US08039672B2 Method of obtaining 3,3-diphenylpropylamines
The invention relates to a method of obtaining 3,3-diphenylpropylamines (I), wherein R1 is H, alkyl, haloalkyl or alkoxyalkyl, R2 is alkyl, alkoxy, halogen, NO2, CN, CHO, which may be free or protected, CH2OH or COOR6, and R3 and R4 are selected independently from H and alkyl or together with the nitrogen to which they are bound form a ring having 3 to 7 members. The inventive method consists in reacting a propylenephenylamine and a disubstituted aromatic hydrocarbon and, if necessary, separating the desired enantiomer or the mixture of enantiomers, and/or converting the compound (I) into a salt. Compounds (I) are muscarinic receptor antagonists which can be used in the treatment of urinary incontinence and other symptoms of urinary bladder hyperactivity. Said compounds include tolterodine.
US08039670B2 Analogs of alpha galactosyceramide and uses thereof
There are disclosed compound of formula I, in which R1 represents a hydrophobic moiety adapted to occupy the C′ channel of human CDId, R2 represents a hydrophobic moiety adapted to occupy the A′ channel of human CDId, such that R1 fills at least at least 30% of the occupied volume of the C′ channel compared to the volume occupied by the terminal nC14H29 of the sphingosine chain of α-galactosylceramide when bound to human CDId and R2 fills at least 30% of the occupied volume of the A′ channel compared to the volume occupied by the terminal nC25H51 of the acyl chain of α-galactosylceramide when bound to human CDId R3 represents hydrogen or OH, Ra and Rb each represent hydrogen and in addition, when R3 represents hydrogen, Ra and Rb together may form a single bond, X represents or —CHA(CHOH)nY or —P(=0)(0−)0CH2(CH0H)mY, in which Y represents CHB1B2, n represents an integer from 1 to 4, m represents 0 or 1, A årepresents hydrogen, one of B1 and B2 represents H, OH or phenyl, and the other represents hydrogen or one of B1 and B2 represents hydroxyl and the other represents phenyl, in addition, when n represents 4, then A together with one of B1 and B2 together forms a single bond and the other of B1 and B2 represents H, OH or OSO3H and pharmaceutically acceptable salts thereof; the compounds of formula I are indicted for use in the treatment of a virus, microbial infection, parasite, an autoimmune disease, cancer, allergy or asthma.
US08039667B2 Compound for solid polymer electrolyte membrane
An unsaturated compound including a urethane bond in a main chain and a sulfonic acid group, a phosphoric acid group, an alkylsulfonic acid group, or an alkylphosphoric acid group on a benzene ring in a side chain is provided. In addition, a solid polymer electrolyte membrane containing a compound prepared by polymerizing the above-mentioned compound and an electrolyte membrane-electrode assembly including diffusion layers adhered on both surfaces of the electrolyte membrane are provided. Furthermore, a solid polymer fuel cell using the electrolyte membrane-electrode assembly is provided.
US08039666B2 Synthesis of amine boranes
A method for preparing an amine borane from an alkali metal borohydride and an amine salt. The alkali metal borohydride is allowed to react with 0.95 to 1.05 equivalents of the amine salt in a solvent which contains water and an amine.
US08039663B2 Monomers derived from pentacyclopentadecane dimethanol
The invention is based on the discovery that certain well-defined compounds derived from pentacyclopentadecane dimethanol are useful components in adhesive formulations. In particular, the invention compounds described herein provide high Tg values and low shrinkage. Compounds of the invention are useful as adhesives for use in the semiconductor packaging industry.
US08039654B2 Esterification reaction product, gelling agent containing the product, and cosmetic preparation containing them
Disclosed is an esterification reaction product which is capable of gelling both an oil agent and a cyclic silicone or a volatile dimethylpolysiloxane, or both an oil agent and a nonvolatile dimethylpolysiloxane. Also disclosed are a gelling agent contacting the esterification reaction product, and a cosmetic preparation containing the esterification reaction product or the gelling product and having an excellent feeling of use. Specifically, the cosmetic preparation contains, as a gelling agent, an esterification reaction product which is obtained by esterifying a component A that is a polyhydric alcohol or a condensate thereof, a component B that is a saturated dibasic acid having 10-28 carbon atoms, a component C that is a linear saturated fatty acid having 16-28 carbon atoms, and a component D that is a branched saturated fatty acid having 8-28 carbon atoms at a blending ratio (component A:component B) of 1.0 mole:0.10-0.20 mole.
US08039653B2 Methods and apparatus for removal of degradation byproducts and contaminants from oil for use in preparation of biodiesel
Methods, particles, and devices are disclosed for filtration of oil for use of the oil in the preparation of biodiesel. Disclosed particles may comprise a substantially inert porous particle with a coating comprising a polymer having amine, amino, and/or imine group(s).
US08039652B2 Methods for producing biodiesel
Transesterification, esterification, and esterification-transesterification (both one-step and two-step) for producing biofuels. The process may be enhanced by one or more of the following: 1) applying microwave or RF energy; 2) passing reactants over a heterogeneous catalyst at sufficiently high velocity to achieve high shear conditions; 3) emulsifying reactants with a homogeneous catalyst; or 4) maintaining the reaction at a pressure at or above autogeneous pressure. Enhanced processes using one or more of these steps can result in higher process rates, higher conversion levels, or both.
US08039650B2 Process for producing tetraglycidylamino compound
A diamine and an epihalohydrin are subjected to ring-opening addition reaction in the presence of water, to thereby produce a tetrahalohydrinamino compound (i.e., halohydrin compound). Thereafter, the halohydrin compound is reacted with an alkali metal hydroxide in the co-presence of a phase-transfer catalyst, to thereby allow cyclization reaction to proceed. An alkali metal halide by-produced during the cyclization reaction is dissolved in water and removed through phase separation. The resultant organic layer is washed with water for phase separation. Then, a crude tetraglycidylamino compound obtained by recovering unreacted epihalohydrin through evaporation is dissolved in an organic solvent and washed with water for phase separation. Subsequently, the organic solvent is recovered through evaporation under reduced pressure with heating, to thereby isolate a tetraglycidylamino compound (i.e., a product of interest). An aqueous alkali metal hydroxide solution is added to the organic solvent recovered through evaporation, followed by thermal treatment. The thus-purified organic solvent is recycled. This method can effectively produce, at low cost, a tetraglycidylamino compound (i.e., a product of interest) of reliable quality having low residual epihalohydrin and hydrolyzable halogen contents.
US08039646B2 Process for preparing glycidyloxyalkyltrialkoxysilanes
The present invention relates to a process for preparing glycidyloxy-alkylalkoxysilanes of the general formula (I) (R″)O—CnH2nSi(R′)m(OR)3-m(I) in which R and R′ groups are each independently linear or branched alkyl groups having from 1 to 4 carbon atoms, n is 1, 2, 3, 4, 5, 6, 7 or 8 and m is 0, 1, 2 or 3, and R″ is an H2C(O)CH— or H2C(O)CHCH2— group, by reacting (i) a functionalized alkene of the general formula (II) (R″)O—CnH2n-1(II) in which R″ is an H2C(O)CH— or H2C(O)CHCH2— group and n is 1, 2, 3, 4, 5, 6, 7 or 8 with (ii) at least one hydroalkoxy-silane of the general formula (III) HSi(R′)m(OR)3-m (III) in which R and R′ groups are each independently linear or branched alkyl groups having from 1 to 4 carbon atoms and m is 0, 1, 2 or 3, in the presence (iii) of at least one homogeneous catalyst, (iv) of at least one solvent and/or of a diluent and (v) of at least one promoter.
US08039644B2 Hydrogenated benzo (C) thiophene derivatives as immunomodulators
The invention relates to novel thiophene derivatives, their preparation and their use as pharmaceutically active compounds. Said compounds particularly act as immunosuppressive agents.
US08039641B2 Tetrahydrofuro[3,2-b] pyrrol-3-one intermediates
The present invention relates to a process for preparing a compound of formula (Ia), (Ib), (Ic) or (Id), or a pharmaceutically acceptable salt, hydrate, solvate, complex or prodrug thereof, said process comprising the steps of: (A) (i) treating a compound of formula (IVa), where R48 is alkyl or tosyl, with an oxidizing agent to form a compound of formula (Va); and (ii) converting said compound of formula (Va) to a compound of formula (Ia) or (Ic); or (B) (i) treating a compound of formula (IVb), where R48 is alkyl or tosyl, with an oxidizing agent to form a compound of formula (Vb); and (ii) converting said compound of formula (Vb) to a compound of formula (Ib) or (Id).
US08039640B2 Morphine compounds for pharmaceutical compositions
The invention relates to new morphine compounds of the formula: where R1 represents a C1-6 alkyl radical and the radicals R2 and R3 are independently selected from the group consisting of hydrogen atoms, methyl groups and acetyl groups.
US08039639B2 Kinase inhibitors and methods of use thereof
A compound of Formula II and salts thereof are useful in the preparation of a compound of Formula I and pharmaceutically acceptable salts and prodrugs thereof.
US08039638B2 Inhibitors of HIV replication
The present invention relates to compounds of formula (I) wherein R1, R2, R3 and R4 are as defined herein, compositions and uses thereof for treating human immunodeficiency virus (HIV) infection. In particular, the present invention provides novel inhibitors of HIV replication, pharmaceutical compositions containing such compounds and methods for using these compounds in the treatment of HIV infection.
US08039630B2 Cationic compound, dye compound and method of using the same, and optical information recording medium
The present invention relates to a cationic compound denoted by the general formula (I). In general formula (I), Ar1 and Ar2 each independently denote an optionally substituted aryl group or aromatic heterocyclic group, L1 denotes a single bond or a divalent linkage group, with at least one from among Ar1, Ar2 and L1 comprising one or more onium cations; R3 and R4 each independently denote a substituent and may form a ring with a benzene ring substituted; m3 and m4 each independently denote an integer ranging from 0 to 4, and plural R3s and R4s may be identical or different from each other when m3 and m4 are an integer ranging from 2 to 4.
US08039628B2 Process for preparing (alpha S, beta R)-6-bromo-alpha-[2-(dimethylamino) ethyl]-2-methoxy-alpha-1-naphthalenyl-beta-phenyl-3-quinolineethanol
The present invention relates to a process for isolating (αS,βR)-6-bromo-α-[2-(dimethylamino)ethyl]-2-methoxy-α-1-naphthalenyl-β-phenyl-3-quinolineethanol from a mixture of stereoisomeric forms of 6-bromo-α-[2-(dimethylamino)ethyl]-2-methoxy-α-1-naphthalenyl-β-phenyl-3-quinolineethanol by optical resolution with chiral 4-hydroxydinaphtho[2,1-d:1′,2′-f][1,3,2]dioxaphosphepin 4-oxide or a derivative thereof, in particular (11bR)-4-hydroxydinaphtho[2,1-d:1′,2′-f][1,3,2]dioxaphosphepin 4-oxide, as resolution agent.
US08039626B2 Method of manufacturing of 7-ethyl-10-hydroxycamptothecin
The method of manufacturing of 7-ethyl-10-hydroxycamptothecin of formula I characterized in that 7-ethyl-1,2,6,7-tetrahydrocampotothecin of formula IV is oxidized with an oxidizing agent selected from the group comprising iodosobenzene, an ester of iodosobenzene, sodium periodate, potassium periodate, potassium peroxodisulfate and ammonium peroxodisulfate, in a solvent formed by a saturated aliphatic monocarboxylic add containing 1 to 3 carbon atoms, and in the presence of water.
US08039624B2 Azaspiro derivatives
The present invention is concerned with novel indol-3-yl-carbonyl-azaspiropiperidine derivatives as V1a receptor antagonists, their manufacture, pharmaceutical compositions containing them and their use for the treatment of anxiety and depressive disorders and other diseases. In particular, the present invention is concerned with compounds of the general formula (I) wherein R1 to R6, U, V, W, X, Y and Z are as defined in the specification.
US08039622B2 Melanocortin receptor agonists
The present invention relates to a compound having a good agonistic activity to melanocortin receptor, or pharmaceutically acceptable salt or isomer thereof, and an agonistic composition for melanocortin receptor comprising the same as an active ingredient.
US08039614B2 4' -C-substituted-2-haloadenosine derivative
The present invention provides a method for producing a 4′-C-substituted-2-haloadenosine derivative represented by the following formula [I], [II], or [III]: wherein X represents a halogen atom, R1 represents an ethynyl group or a cyano group, and R2 represents hydrogen or a phosphoryl group. The present invention also provides the derivative, and a pharmaceutical composition containing the derivative and a pharmaceutically acceptable carrier therefor. The derivative is useful as a medicine for the treatment of Acquired Immune Deficiency Syndrome (AIDS).
US08039606B2 Seneca Valley virus based compositions and methods for treating disease
The present invention relates to a novel RNA picornavirus that is called Seneca Valley virus (“SVV”). The invention provides isolated SVV nucleic acids and proteins encoded by these nucleic acids. Further, the invention provides antibodies that are raised against the SVV proteins. Because SVV has the ability to selectively kill some types of tumors, the invention provides methods of using SVV and SVV polypeptides to treat cancer. Because SVV specifically targets certain tumors, the invention provides methods of using SVV nucleic acids and proteins to detect cancer. Additionally, due to the information provided by the tumor-specific mechanisms of SVV, the invention provides methods of making new oncolytic virus derivatives and of altering viruses to have tumor-specific tropisms.
US08039605B2 Targeting of long chain triacylglycerol hydrolase gene for tuberculosis treatment
Disclosed herein are novel methods for screening for compounds useful in treating or preventing tuberculosis. In exemplary embodiments, screening methods are based on the implementation or manipulation of triacylglycerol hydrolase like polypeptides or polynucleotides encoding the same. The methods are useful in identifying agents active against TB infection.
US08039604B2 DNA sequence encoding penicillin acylase, novel recombinant recombinant DNA constructs and recombinant microorganisms
The invention consists in a nucleotide sequence having the size of (2646) bp, wherein the order of nucleotides is identical to the order of the nucleotide sequence encoding penicillin acylase from Achromobacter sp. CCM 4824 (formerly Comamonas testosteroni CCM 4824), eventually of the fragments of this sequence having the length of at least 150 nucleotides. The sequence can be used in the formation of a DNA construct, eventually the construct having at least one regulatory sequence regulating the expression of the gene and the production of a polypeptide with the penicillin acylase activity. The sequence can form part of a recombinant expression vector, which consists of the above-mentioned construct, promoter, translational start signal, translational and transcriptional stop signal. Further, the invention concerns a recombinant host cell, containing the nucleic acid construct carried by the vector or integrated into the cell chromosome, and the E. coli BL21 strain containing said sequence of the nucleotides encoding the penicillin acylase carried in the pKXIP1, the pKLP3 or the pKLP6 plasmid.
US08039600B2 Rapamycin assay
Monoclonal antibodies to rapamycin and to 40-O-alkylated derivatives of rapamycin are provided, together with novel haptens, immunogenic conjugates, and processes for making them and assay kits for using them.
US08039599B1 Rapamycin assay
Monoclonal antibodies to rapamycin and to 40-O-alkylated derivatives of rapamycin are provided, together with novel haptens, immunogenic conjugates, and processes for making them and assay kits for using them.
US08039591B2 Flowable collagen material for dural closure
Flowable graft materials are provided which comprise collagen powder and a liquid in an amount sufficient to impart a flowable consistency to the material. The graft materials are sufficiently formable and pliable so as to provide both superior contact with and easier access to a surgical site than typical, more rigid grafts such as collagen sheets. These flowable materials may also be in a fluidized, paste-like and/or gel-like state and may be moldable and/or ejectable. The flowable collagen materials reduce and/or eliminate post implantation problems associated with other materials, e.g. synthetic dural sealants (hemostasis products), such as product swelling after application and implantation. The flowable graft materials are particularly useful as a dural graft.
US08039579B2 Intermediates useful in the preparation of maleimide functionalized polymers
Methods for forming maleimide functionalized polymers are provided. In one such embodiment, a maleimide functionalized polymer is prepared in a method that includes a step of carrying out a reverse Diels-Alder reaction. Intermediates useful in the methods, as well as methods for preparing the intermediates, are also provided. Also provided are polymeric reagents, methods of using polymeric reagents, compounds and conjugates.
US08039578B2 Polyester composition with modifier hydroxyl compound
A process for producing non-solid-stated polyester polymer particles having one or more properties similar to polyester polymer particles that have undergone solid-state processing. In one embodiment, the process comprises (a) forming polyester polymer particles from a polyester polymer melt; (b) quenching at least a portion of the particles, (c) drying at least a portion of the particles, (d) crystallizing at least a portion of the particles, (e) annealing at least a portion of the particles. At all points during and between steps (b) through (e), the average bulk temperature of the particles is maintained above 165° C.
US08039575B2 Flame-retardant polycarbonate resin composition, polycarbonate resin molded article, and method for producing the polycarbonate resin molded article
Provided are a polycarbonate resin composition containing a glass filler, which is excellent in transparency, strength, and heat resistance and provided with high flame retardancy even without using a flame retardant, and a polycarbonate resin molded article obtained by molding the resin composition. The flame-retardant polycarbonate resin composition contains a combination including (A) 55 to 95 mass % of an aromatic polycarbonate resin containing a polycarbonate-polyorganosiloxane copolymer and (B) 45 to 5 mass % of a glass filler having a refractive index smaller or larger than a refractive index of the aromatic polycarbonate resin by 0.002 or less, and (C) 0.05 to 20.0 parts by mass of a silicone compound having a reactive functional group with respect to 100 parts by mass of the combination. The polycarbonate resin molded article has a thickness of 0.3 to 10 mm which is obtained by molding the composition.
US08039569B2 Polyethylene molding compositions for injection molding applications
Monomodal molding compositions based on polymers of ethylene, wherein the density of the molding compositions is in the range from 0.940 to 0.96 g/cm3, the Mi is in the range from 0.5 to 10.0 g/10 min. the polydispersity Mw/Mn is in the range from 3 to 20, the branches/1000 carbon atoms is in the range from 0.1 to 10 and the weight average molar mass Mw is in the range from 50 000 g/mol to 150 000 g/mol, and also injection-molded shaped bodies as well as screw closures comprising the molding compositions.
US08039567B2 Alternating copolymers of phenylene vinylene and biarylene vinylene, preparation method thereof, and organic thin film transistor comprising the same
Disclosed herein are an alternating copolymer of phenylene vinylene and biarylene vinylene, a preparation method thereof, and an organic thin film transistor including the same. The organic thin film transistor maintains low off-state leakage current and realizes a high on/off current ratio and high charge mobility because the organic active layer thereof is formed of an alternating copolymer of phenylene vinylene and biarylene vinylene.
US08039565B2 Catalytic system for obtaining conjugated diene/mono-olefin copolymers and these copolymers
A catalytic system usable for the copolymerization of at least one conjugated diene and at least one monoolefin, a process for preparing this catalytic system, a process for preparing a copolymer of a conjugated diene and at least one monoolefin using said catalytic system, and said copolymer are described. This catalytic system includes: (i) an organometallic complex represented by the following formula: {[P(Cp)(Fl)Ln(X)(LX)}p  (1) where Ln represents a lanthanide atom to which is attached a ligand molecule comprising cyclopentadienyl Cp and fluorenyl Fl groups linked to one another by a bridge P of the formula MR1R2, M is an element from column IVa of Mendeleev's periodic table and R1 and R2 each represent alkyl groups of 1 to 20 carbon atoms or cycloalkyl or phenyl groups of 6 to 20 carbon atoms, X represents a halogen atom, L represents an optional complexing molecule, such as an ether, and optionally a substantially less complexing molecule, such as toluene, p is a natural integer greater than or equal to 1 and x is greater than or equal to 0, and (ii) a co-catalyst selected from alkylmagnesiums, alkyllithiums, alkylaluminums, Grignard reagents and mixtures of these constituents.
US08039562B2 Method for seed bed treatment before a polymerization reaction
In some embodiments, a method in which at least one continuity additive (“CA”) and a seed bed are pre-loaded into a reactor, and a polymerization reaction is optionally then performed in the reactor. In other embodiments, at least one flow improver, at least one CA, and a seed bed are pre-loaded into a reactor. Pre-loading of a reactor with a CA can significantly improve continuity of a subsequent polymerization reaction in the reactor during its initial stages, including by reducing sheeting and fouling. The CA can be pre-loaded in dry form (e.g., as a powder), or in liquid or slurry form (e.g., as an oil slurry). To aid delivery of a dry CA to the reactor and combination of the dry CA with a seed bed in the reactor, the dry CA can be combined with a flow improver and the combination of CA and flow improver then loaded into the reactor. Alternatively, the CA and flow improver can be sequentially loaded into the reactor, and then mixed together (and mixed with a seed bed) in the reactor after both the CA and flow improver have been separately loaded into the reactor.
US08039559B2 Unsaturated polyester resin or vinyl ester resin compositions
The present invention relates to a two-component composition comprising a first component and a second component, wherein the first component being a non-aqueous resin composition comprising an unsaturated polyester resin or vinyl ester resin, a transition metal compound selected from a copper, iron, manganese or titanium compound, a potassium compound, and the resin composition contains less than 0.01 mmol cobalt per kg primary resin system and less than 0.01 mmol vanadium per kg primary resin system; and the second component comprises a peroxide compound.
US08039558B2 Polymer composition with elastomeric properties at wide temperature ranges and process for the preparation thereof
It is depicted a polymer composition with elastomeric properties at wide temperature ranges of the type comprising polymers and/copolymers resulting from substituted or unsubstituted vinyl aromatic monomers and from dienic monomers, which is homogeneous and compatible in nature, with such composition being based on stereoregular polymers and without requiring the additional use of compatibilizing agents. Likewise, it is depicted the process to obtain the same, as well as to hydrogenise them, without requiring the use of additional catalyzers or processes.
US08039555B2 Thermoplastic resin composition and floor tile made of the same
The invention provides a thermoplastic resin composition including a thermoplastic resin component (I) in an amount of 100 parts by mass, and a filler (II) in an amount of 1 to 900 parts by mass, wherein the thermoplastic resin component (I) contains a block copolymer (A) in an amount of 5 to 90 mass %, the block copolymer (A) being at least one species selected from among a block copolymer and a hydrogenated product thereof, the block copolymer having a polymer block (a1) formed mainly of an aromatic vinyl compound unit(s), and a polymer block (a2) formed mainly of a conjugated diene unit(s); a polyolefin resin (B) in an amount of 5 to 90 mass %; and a block copolymer (C) in an amount of 5 to 90 mass %, the block copolymer (C) having a polymer block formed from a repeating unit having a polar group.
US08039553B2 Pressure-sensitive adhesive composition
The present invention relates to an adhesive composition comprising (A) a block copolymer composition comprising a block copolymer (a) formed from at least two polymer blocks composed mainly of a monoalkenyl aromatic compound and at least one polymer block composed mainly of a conjugated diene compound and a block copolymer (b) formed from a polymer block composed mainly of a monoalkenyl aromatic compound and a polymer block composed mainly of a conjugated diene compound, wherein the block copolymer (a) has a GPC peak molecular weight of 60,000 to 110,000 in terms of standard polystyrene, the polymer block composed mainly of a monoalkenyl aromatic compound has a peak molecular weight of 10,000 to 30,000 and a molecular weight distribution Mw/Mn of 1.0 to 1.6, the block copolymer composition (A) has a content of the block copolymer (b) of 50 to 90% by weight, the block copolymer composition (A) has a total monoalkenyl aromatic compound content of more than 40% by weight and 50% by weight or less, the conjugated diene unit has a vinyl bond content of less than 20%, and the block copolymer composition (A) has a viscosity in a 15% toluene solution of 10 to 40 cP at 25° C.
US08039546B2 Modified natural rubber latex and method for producing the same, modified natural rubber and method for producing the same, rubber composition and tire
This invention provides a modified natural rubber latex formed by charging a polar group-containing mercapto compound into a natural rubber latex to add the polar group-containing mercapto compound to a natural rubber molecule in the natural rubber latex, a modified natural rubber formed by coagulating and drying the modified natural rubber latex, and the rubber composition using the modified natural rubber and being excellent in the low loss factor, wear resistance and fracture characteristics.
US08039539B2 Production of a composite comprising inorganic material and organic polymer
Physical properties and soiling resistance of polymer-bound inorganic composites such as artificial stone are improved by incorporating a silane adhesion promoter and at least one of three organosilicon compounds.
US08039537B2 Modified bismaleimide resins, preparation method thereof and compositions comprising the same
A modified bismaleimide resin of Formula (I) or (II) is provided. In Formula (I) or (II), Q is —CH2—, —C(CH3)2—, —O—, —S—, —SO2— or null, R is —(CH2)2—, —(CH2)6—, —(CH2)8—, —(CH2)12—, —CH2—C(CH3)2—CH2—CH(CH3)—CH2—CH2—, 10
US08039533B2 Synthetic styrene resin composition for environment-friendly window frame
Disclosed are a synthetic resin composition for use as building materials such as window frames, as well as a product manufactured using the same. More particularly, the synthetic resin composition comprises a tetrapolymer of acrylic rubber-styrene monomer-butadiene rubber-vinyl cyanide monomer and a styrene-vinyl cyanide copolymer having a high molecular weight and a high degree of dispersion. Unlike products manufactured using prior polyvinyl chloride (PVC), building material such as window frames manufactured using the synthetic resin composition are recyclable, and thus can contribute to a reduction in the generation of hormone-disrupting chemical dioxin, which is released in the burning thereof. Also, the resin composition can be manufactured into products having excellent properties of weather resistance and colorability without using environmental pollutants such as cadmium stearate or lead stearate, which are used as thermal stabilizers.
US08039532B2 Heterocyclic compound, ultraviolet absorbent and composition containing the same
A compound represented by formula (I-1): wherein R21, R22, R23 and R24 each independently represent a hydrogen atom or a monovalent substituent, with the proviso that compounds, in which R21, R22, R23 and R24 each are an alkylthio group, are excluded; R21 and R22 and/or R23 and R24 each may bond to each other to form a ring, with the proviso that compounds, in which the formed ring is a dithiol ring or a dithiolane ring, are excluded; R25 and R26 each independently represent a hydrogen atom or a monovalent substituent; X21, X22, X23 and X24 each independently represent a hetero atom; compounds, wherein R21, R22, R23 and R24 each represent a cyan group; X21, X22, X23 and X24 each represent a sulfur atom; and R25 and R26 each represent a hydroxyl group or a hydrogen atom, are excluded; and compounds, wherein R21 and R23 each represent a hydrogen atom; R22 and R24 each represent an arylcarbonyl group; X21, X22, X23 and X24 each represent a sulfur atom; and R25 and R26 each represent a hydroxyl group, are excluded; and an ultraviolet absorbent, which has molecular weight of 10,000 or less and molar extinction coefficient at the maximum absorption wavelength of the ultraviolet absorbent of 80,000 or more.
US08039530B2 High thermal conductivity materials with grafted surface functional groups
The present invention provides a continuous high thermal conductivity organic-inorganic composite material. The composite material features high thermal conductivity materials bonded to a host resin matrix by covalent linkages. The bonding takes place through surface functional groups that are reactively grafted to the high thermal conductivity material. These surface functional groups react with the host resin matrix, forming the covalent linkages. The structure of the composite material is effective to reduce phonon scattering and increase phonon transport in the composite material.
US08039526B2 Thermoplastic vulcanizates including nanoclays and processes for making the same
A method for preparing a nanoclay-filled thermoplastic vulcanizate, the method comprising introducing an olefinic thermoplastic vulcanizate, a functionalized thermoplastic resin, and a surface-modified nanoclay, where the blending takes place at a temperature above the melt temperature of the thermoplastic vulcanizate but below the temperature at which the surface-modified nanoclay degrades.
US08039523B2 Resin composition for press foaming, foam and process for producing the foam
A resin composition for pressure-foam molding, which comprises an ethylene-based copolymer and a foaming agent, wherein the ethylene-based copolymer has monomer units derived from ethylene and monomer units derived from an a-olefin having 3 to 20 carbon atoms, has a melt flow rate of 0.01 to 0.7 g/10 minutes, a molecular weight distribution of 5 or more determined by a gel permeation chromatography, an activation energy of flow of 40 kJ/mol or more, and inflection points of 3 or less on a melting curve within temperature range from 25° C. to the end point of melting obtained by a differential scanning calorimetry; a foam obtained by press foaming; and a process for producing the foam.
US08039520B2 Electrolyte membrane comprising nanocomposite ion complex, manufacturing method thereof, and fuel cell including the same
An electrolyte membrane includes a nanocomposite ion complex that is a reaction product of a nanocomposite with a basic polymer. The nanocomposite includes a polymer having a sulfonic acid group and an unmodified clay. Either the unmodified clay has a layered structure and is dispersed in the polymer having the sulfonic acid group, and the polymer is intercalated between layers of the clay or the unmodified clay has an exfoliated structure and the exfoliated layers of the unmodified clay are dispersed in the polymer. The electrolyte membrane shows high mechanical strength, high ionic conductivity, and excellent methanol crossover impeding properties even when the degree of sulfonation of the polymer having the sulfonic acid group is high. When a methanol aqueous solution is used as a fuel, the fuel cell including the electrolyte membrane has a low methanol crossover, and thus, has a high operational efficiency and a long lifetime.
US08039518B2 Environmentally friendly water/oil emulsions
The invention relates to particular orthoester based polymers as well as the use of specific orthoester beased polymers as a demulsifier for water/oil emulsions.
US08039512B2 Biologically active oils
A process for the production of fats or oils and their extracts containing biologically active chemical compounds from a lipid substrate, the process comprising: a) inoculation of a lipid substrate with fungally derived lipolytic enzymes; b) incubating the inoculated substrate for a period of between about 7-120 days at a temperature of between about 435° C., at a humidity of between about 75-100%, and c) processing said substrate mixture to obtain a biologically active fat or oil.
US08039510B2 Methods of making and using theaflavin, theaflavin-3-gallate, theaflavin-3′-gallate and theaflavin 3,3′-digallate and mixtures thereof
The present invention discloses methods of making a mixture of theaflavin, theaflavin-3-gallate, theaflavin-3′-gallate and theaflavin 3,3′-digallate, pharmaceutical compositions of the above mixture of theaflavins, diet supplement compositions of the above mixture of theaflavins and methods for using the above mixtures of theaflavin and pharmaceutical compositions thereof to treat or prevent various diseases. The present invention also discloses methods of making theaflavin, theaflavin-3-gallate, theaflavin-3′-gallate and theaflavin 3,3′-digallate, each as a separate compound, pharmaceutical compositions of the above compounds, diet supplement compositions of the above compounds and methods for using the above compounds to treat or prevent various diseases.
US08039508B2 Lipase inhibiting composition
Pharmaceutical compositions that contain a lipase inhibitor having a melting point ≧37° C., a sucrose fatty acid ester wherein the sucrose fatty acid ester is a mono-, di-, tri- or tetra-ester, and optionally one or more pharmaceutically acceptable excipients, are useful for treatment of obesity.
US08039507B2 Therapeutic substituted gamma lactams
Disclosed herein is a compound having a structure or a pharmaceutically acceptable salt or a prodrug thereof; wherein Y, A, X, R and D are as described. Methods, compositions, and medicaments related thereto are also disclosed.
US08039506B2 Bicyclic lactam factor VIIa inhibitors useful as anticoagulants
The present invention provides novel bicyclic lactams derivatives, and analogues thereof, of Formula (I): or a stereoisomer, tautomer, pharmaceutically acceptable salt, solvate, or prodrug thereof, wherein the variables A, B, C, W, Y, Z1, Z2, Z3, Z4, R8, and R9 are as defined herein. These compounds are selective inhibitors of factor VIIa which can be used as medicaments.
US08039504B2 Chemicals, compositions, and methods for treatment and prevention of orthopoxvirus infections and associated diseases
Methods of using di, tri, and tetracyclic acylhydrazide derivatives and analogs, as well as pharmaceutical compositions containing the same, for the treatment or prophylaxis of viral infections and diseases associated therewith, particularly those viral infections and associated diseases cased by the orthopoxvirus.
US08039503B2 Lapachone compounds and methods of use thereof
The present invention provides novel tricyclic spiro-oxathiine naphthoquinone derivatives, a synthetic method for making the derivatives, and the use of the derivatives to induce cell death and/or to inhibit proliferation of cancer or precancerous cells. The naphthoquinone derivatives of the present invention are related to the compound known as β-lapachone (3,4-dihydro-2,2-dimethyl-2H-naphtho(1,2-b)pyran-5,6-dione).
US08039490B2 Benzoyl-piperidine derivatives as dual modulators of the 5-HT2A and D3 receptors
The present invention relates to compounds of the general formula as dual modulators of the 5-HT2a and D3 receptors useful against CNS disorders, wherein A, R1, R2, n, p, q and r are as defined in the specification.
US08039488B2 Methods and compositions for inhibition of angiogenesis
The present invention comprises a group of compounds that effectively inhibit angiogenesis. More specifically, thalidomide and various related compounds such as thalidomide precursors, analogs, metabolites and hydrolysis products have been shown to inhibit angiogenesis and to treat disease states resulting from angiogenesis. Additionally, antiinflammatory drugs, such as steroids and NSAIDs can inhibit angiogenesis dependent diseases either alone or in combination with thalidomide and related compounds. Importantly, these compounds can be administered orally.
US08039485B2 Malate salts, and polymorphs of (3S,5S)-7-[3-amino-5-methyl-piperidinyl]-1-cyclopropyl-1,4-dihydro-8-methoxy-4-oxo-3-quinolinecarboxylic acid
The present invention is directed to malate salts of (3S,5S)-7-[3-amino-5-methyl-piperidinyl]-1-cyclopropyl-1,4-dihydro-8-methoxy-4-oxo-3-quinolinecarboxylic acid, and its polymorphs. The present invention is also directed to pharmaceutical compositions comprising the described salts and polymorphs.
US08039482B2 Composition of solifenacin or salt thereof for use in solid formulation
A solid pharmaceutical preparation of solifenacin or a salt thereof, the preparation being stable and inhibited from decomposing with time when supplied to clinical fields. In a pharmaceutical preparation containing solifenacin or a salt thereof, the compound in an amorphous form was revealed to be causative of cardinal-drug decomposition with time. The composition for a solid pharmaceutical preparation of solifenacin or a salt thereof contains solifenacin or its salt each in a crystalline from, and the content provided are: a process for producing the composition; and a medicinal composition for solid pharmaceutical preparations which contains solifenacin and an amorphization inhibitor.
US08039478B2 Purinone derivatives as HM74A agonists
The present invention relates to purinone derivatives which are agonists of the HM74a receptor. Further provided are compositions and methods of using the compounds herein, and their pharmaceutically acceptable salts for the treatment of disease.
US08039472B2 Pyrazine-2-carboxamide derivatives to treat diseases mediated by blockade of the epithelial sodium channel
A compound of Formula I in free or salt or solvate form, where R1, R2, R3, R4, R5, R6, R7, R8, R9, R10 and R11 have the meanings as indicated in the specification, is useful for treating diseases which respond to the blockade of the epithelial sodium channel. Pharmaceutical compositions that contain the compounds and processes for preparing the compounds are also described.
US08039470B2 Kinase inhibitor compounds
The invention relates to compounds, compositions comprising the compounds, and methods of using the compounds and compound compositions. The compounds, compositions, and methods described herein can be used for the therapeutic modulation of kinase-mediated processes, and treatment of disease and disease symptoms, particularly those mediated by certain kinase enzymes.
US08039467B2 Compounds for the treatment of inflammatory disorders
This invention relates to compounds of the Formula (I): or a pharmaceutically acceptable salt, solvate or isomer thereof, which can be useful for the treatment of diseases or conditions mediated by MMPs, ADAMs, TACE, TNF-α or combinations thereof.
US08039466B2 5-hydroxymethyl-oxazolidin-2-one antibacterials
The invention relates to novel chimeric antibiotics of formula I wherein R1 represents OH, OPO3H2 or OCOR5; R2 represents H, OH or OPO3H2; R3 represents H or halogen; R4 is H, (C1-C3)alkyl, or cycloalkyl; R5 represents piperidin-4-yl or R5 is the residue of a naturally occurring amino acid, of the enantiomer of a naturally occurring amino acid or of dimethylaminoglycine; n is 0 or 1; and to salts (in particular pharmaceutically acceptable salts) of compounds of formula I. These chimeric compounds are useful in the manufacture of medicaments for the treatment of infections (e.g. bacterial infections).
US08039465B2 Cytoskeletal active compounds, composition and use
The present invention is directed to synthetic cytoskeletal active compounds that are related to natural Latrunculin A or Latrunculin B. The present invention is also directed to pharmaceutical compositions comprising such compounds and a pharmaceutically acceptable carrier. The invention is additionally directed to a method of preventing or treating diseases or conditions associated with actin polymerization. In one embodiment of the invention, the method treats increased intraocular pressure, such as primary open-angle glaucoma. The method comprises administering to a subject a therapeutically effective amount of a cytoskeletal active compound of Formula I or II, wherein said amount is effective to influence the cytoskeleton, for example by inhibiting actin polymerization.
US08039464B2 Muscarinic antagonists with PARP and SIR modulating activity as agents for inflammatory diseases
The present invention relates generally to the cytoprotective activity of mixed muscarinic inhibition/PARP modulation and in particular to the use of dual inhibitors of M1 muscarinic receptor and poly(ADP-ribose) polymerase (PARP) as epithelioprotective medicaments, particularly as medicaments for the prevention and/or treatment of at least one of the common lung diseases associated with a significant inflammatory component such as severe sepsis, acute lung injury, acute respiratory distress syndrome, cystic fibrosis, asthma, allergic rhinitis, chronic obstructive pulmonary disease, pulmonary fibrosis, systemic sclerosis, pneumoconiosis or lung cancer. Particularly preferred compounds are condensed diazepinones, e.g. condensed benzodiazepinones such as pirenzepine or compounds which are metabolized to condensed benzodiazepinones such as olanzapine.
US08039461B1 Physical states of a pharmaceutical drug substance
An amorphous form of imipramine pamoate, morphologically pure forms, and mixtures of amorphous and morphologically pure imipramine pamoate characterized by differential scanning calorimetry, fourier transform infrared, and powder x-ray diffraction, and pharmaceutical compositions formed therefrom.
US08039460B2 CGRP receptor antagonists
Compounds of Formula (I): and Formula (II): (where variables R2, R4, A, B, D, W, X, Y and Z are as defined herein) useful as antagonists of CGRP receptors and useful in the treatment or prevention of diseases in which the CGRP is involved, such as headache, migraine and cluster headache. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which CGRP is involved.
US08039456B2 Method of stimulating the motility of the gastrointestinal system using ipamorelin
The present invention provides a method of stimulating the motility of the gastrointestinal system in a subject in need thereof, wherein the subject suffers from maladies (i.e., disorders, diseases, conditions, or drug- or surgery-induced dysfunction) of the gastrointestinal system, by administering to the subject a ghrelin mimetic, or pharmaceutically acceptable salt thereof. The invention also provides a method of treating a gastrointestinal malady by co-administering a ghrelin mimetic with a laxative, a H2 receptor antagonist, a serotonin receptor agonist, pure or mixed, an antacid, an opioid antagonist, a proton pump inhibitor, a motilin receptor agonist, dopamine antagonist, a cholinergic agonist, a cholinesterase inhibitor, somatostatin, octreotide, or any combination thereof.
US08039445B2 Methods and devices for delivering a therapeutic product to the ocular sphere of a subject
The present invention relates, generally, to improved methods of delivering a biologically active agent, in particular a therapeutic or prophylactic nucleic acid, to the ocular sphere of a subject comprising administering said agent to the ciliary body tissue(s) or cells and/or to the extra-ocular muscle tissue or cells. More particularly, the invention relates to devices, their uses, notably in gene therapy, and to methods for treating pathologies of the ocular sphere by specific ciliary body tissue(s) or cells and/or extra-ocular muscle or cells administration of a therapeutic product and transfer thereof into the ocular tissue to be treated. This invention also relates to pharmaceutical compositions comprising the product in a form suitable for ciliary body tissue(s) or cells and/or extra-ocular muscle or cells administration, their preparation and uses.
US08039444B2 Antisense permeation enhancers
A pharmaceutical composition comprising an antisense oligonucleotide and a permeation enhancer that comprises a multi-carbon backbone having a functional group and also one or more side chains which have one or more carbon atoms and, optionally, one or more functional groups.
US08039440B2 Peptides for inhibiting chemokine binding to chemokine receptors
Novel peptidic or peptidomimetic agents or small molecules for modulating the biological effect of a chemokine. According to the present invention, the therapeutic agents preferably are endowed with the capacity to bind to certain chemokines in order to modulate the biological interaction between the target ligand, chemokine, and the respective target receptor, chemokine receptor. These peptides may be described as agonist ligands or antagonists. Next, preferably certain peptides share consensus sequences are described which characterize the families or categories of these modulator peptides.
US08039439B2 Cellular cycle anomalies for targeting oncology and neurodegeneration
The present invention relates to the field of medicine and biology. It concerns a novel test for screening and for therapeutic follow-up in oncology. More particularly, it relates to diagnostic and/or therapeutic tests in oncology and on neurodegenerative diseases. It is a diagnostic test and a prognostic test for various cancers (breast cancer, bladder cancer, ovarian cancer, lung cancer, skin cancer, prostate cancer, colon cancer, liver cancer, glioblastoma, sarcoma, leukemia, etc.) and therapeutics solutions for specific neurodegenerative diseases. More particularly, the invention concerns the use of the LIV21 protein, LIV21 gene and of derivatives thereof as diagnostic and prognostic markers for cancers. The invention therefore concerns the detection of the LIV21 protein with a kit comprising LIV21-specific antibodies.
US08039438B2 Synthetic peptides that cause F-actin bundling and block actin depolymerization
Synthetic peptides derived from sucrose synthase, and having homology to actin and actin-related proteins, sharing a common motif, useful for causing acting bundling and preventing actin depolymerization. Peptides exhibiting the common motif are described, as well as specific synthetic peptides which caused bundled actin and inhibit actin depolymerization. These peptides can be useful for treating a subject suffering from a disease characterized by cells having neoplastic growth, for anti-cancer therapeutics, delivered to subjects solely, or concomitantly or sequentially with other known cancer therapeutics. These peptides can also be used for stabilizing microfilaments in living cells and inhibiting growth of cells.
US08039437B2 Fn14/TRAIL fusion proteins
Fusion proteins which act on the TWEAK and TRAIL signaling axes are provided. The proteins are useful in the treatment or amelioration of autoimmune diseases, particularly multiple sclerosis, as well as other diseases such as alloimmune diseases and cancer.
US08039434B2 Method for producing human insulin-like growth factor I
A method is provided for producing hIGF-I with high purity and yield. This is a method for producing human insulin-like growth factor I, having a step of removing modified human insulin-like growth factor I from the human insulin-like growth factor I, the step including: (A) a step of adjusting the pH of a culture liquid of a human insulin-like growth factor I producing bacteria to 8 or more after completion of culture; (B) a step of letting the culture liquid obtained in step (A) stand; and (C) a step of removing the producing bacteria from the culture liquid obtained in step (B).
US08039432B2 Method of treatment of diabetes and/or obesity with reduced nausea side effect
The present invention provides methods of administering an insulinotropic peptide in an amount effective to treat a disorder or condition while reducing nausea side effect by administering to a subject in need thereof an insulinotropic peptide conjugated to albumin. The present invention also provides methods of selecting a subject for administration of a conjugated insulinotropic peptide. Exemplary disorders or conditions treatable with an insulinotropic peptide include obesity and type II diabetes.
US08039429B2 Method of treatment using high-affinity antagonists of ELR-CXC chemokines
The present invention provides novel polypeptide sequences, methods for production thereof and uses thereof for novel ELR-CXC chemokine receptor agonists and antagonists.
US08039427B2 Method for manufacturing a shaped article
A method for manufacturing a shaped article comprising the step of cutting a shaped article from a first article; wherein as the shaped article is cut from the first article the shaped article's cross-section is deformed and wherein the first article's cross-section is shaped such that it compensates for the deformation during the cutting step so as to achieve a shaped article with a desired cross-section. Shaped articles and compositions comprising shaped articles are also described.
US08039426B2 Method for hydrolyzing metallic salts with emulsions
The invention relates to a method for hydrolyzing hydrolyzable metallic salts, the metallic salts being reacted with emulsions of a) water and b) an inert liquid.
US08039425B2 Skin or hair cleanser composition comprising an alkoxylated C8-C10 alcohol and a siloxane
Provided is a skin or hair cleanser composition having an excellent foaming property and making a good feeling upon use available from cleansing until after drying, which comprises: from 0.2 to 20 wt. % of (A) a compound represented by the following formula (1): R1O-(AO)n—R2  (1) wherein R1 represents a straight-chain or branched alkyl or alkenyl group having from 8 to 10 carbon atoms, AO represents an alkyleneoxy group having from 2 to 4 carbon atoms, n is the number of the alkyleneoxy group and stands for a number from 0.5 to 3.5 on average, and R2 represents a hydrogen atom or a methyl group, from 5 to 60 wt. % of (B) a surfactant other than the component (A), and from 0.1 to 10 wt. % of (C) at least one of silicones and monohydric alcohols having from 15 to 28 carbon atoms.
US08039424B2 Universal synthetic lubricant additive with micro lubrication technology to be used with synthetic or miner host lubricants from automotive, trucking, marine, heavy industry to turbines including, gas, jet and steam
It is known by the inventor that a universal synthetic lubricant additive that can greatly enhance the performance standards of existing lubricants, petroleum based or synthetic, imparts a new and desirable property not originally present in the existing oil or it reinforces a desirable property already possessed in some degree can greatly benefit the consumer. Although additives of many diverse types have been developed to meet special lubrication needs, their principal functions are relatively few in number. This universal synthetic lubricant additive (invention) with micro lubrication technology, when used as directed will reduce the oxidative or thermal degradation of the host oil, substantially reduce the deposition of harmful deposits in lubricated parts, minimize rust and corrosion, control frictional properties, reduce wear, temperature, sludge, varnishes and prevent destructive metal-to-metal contact, reduce fuel consumption and harmful emissions while improving performance through increased horsepower and torque.
US08039423B2 Lubricant composition, speed reduction gear using the lubricant composition, and electric power steering apparatus using the speed reduction gear
Disclosed are a lubricant composition including a lubricating base oil, fine particles and a calcium sulfonate-based thickener, a speed reduction gear filled with the lubricant composition, and an electric power steering apparatus including the speed reduction gear. The invention reduces operating noise of the speed reduction gear, regardless of the amount of backlash that occurs on combining a small gear and a large gear and without a more complicated structure for the speed reduction gear, by action of the fine particles. Further, separation of oil is prevented, by action of the calcium sulfonate-based thickener of the lubricant composition, so that electric power steering apparatus noise within the inside of a car is reduced at a low cost.
US08039417B2 Catalyst for polyester polycondensation and method for producing polyester resin using the same
The invention relates to a liquid catalyst solution containing a polycondensation catalyst for polyester production, which contains titanium atoms, alkaline earth metal atoms and phosphorus atoms, has high reactivity and excellent long-term storage stability, can be easily produced industrially, and has an advantage in cost.
US08039412B2 Crystalline composition, device, and associated method
A composition including a polycrystalline metal nitride having a number of grains is provided. These grains have a columnar structure with one or more properties such as, an average grain size, a tilt angle, an impurity content, a porosity, a density, and an atomic fraction of the metal in the metal nitride.
US08039403B2 Thin film transistor, method of manufacturing same, display device, method of modifying an oxide film, method of forming an oxide film, semiconductor device, method of manufacturing semiconductor device, and apparatus for manufacturing semiconductor device
In a manufacturing method of a thin film transistor (1), the oxide film forming step is performed whereby: a process-target substrate (2) having a surface on which a gate oxide film (4) should be formed is immersed in an oxidizing solution containing an active oxidizing species; and a gate oxide film (4) is formed through direct oxidation of polycrystalline silicon (51) on the process-target substrate (2). With this step, a silicon dioxide film (42) is formed while growing a silicon dioxide film (41) on the process-target substrate 2. Accordingly, the interface between the polycrystalline silicon (51) and the gate oxide film (4) is kept clean. The gate oxide film (4) is uniformly formed with excellent quality in insulation tolerance and other properties. Therefore, the thin film transistor (1) contains a high quality oxide film with excellent insulation tolerance and other properties which can be formed at low temperature.
US08039401B2 Structure and method for forming hybrid substrate
A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.
US08039400B2 Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition
A conductive barrier material of a metallization system of a semiconductor device may be formed on the basis of one or more deposition/etch cycles, thereby providing a reduced material thickness in the bevel region, while enhancing overall thickness uniformity in the active region of the semiconductor substrate. In some illustrative embodiments, two or more deposition/etch cycles may be used, thereby providing the possibility to select reduced target values for the barrier thickness in the die regions, while also obtaining a significantly reduced thickness in the bevel region.
US08039393B2 Semiconductor structure, method for manufacturing semiconductor structure and semiconductor package
A semiconductor structure, a method for manufacturing a semiconductor structure and a semiconductor package are provided. The method for manufacturing a semiconductor structure includes the following steps. Firstly, a silicon substrate is provided. Next, a part of the silicon substrate is removed to form a ring hole and a silicon pillar surrounded by the silicon pillar. Then, a photosensitive material is disposed in the ring hole, wherein the photosensitive material is insulating. After that, the silicon pillar is removed, such that the ring hole forms a through hole and the photosensitive material covers a lateral wall of the through hole. Lastly, the conductive material is disposed in the through hole, wherein the outer surface of the conductive material is surrounded by the photosensitive material.
US08039392B2 Resistor random access memory cell with reduced active area and reduced contact areas
A memory device has a sidewall insulating member with a sidewall insulating member length according to a first spacer layer thickness. A first electrode formed from a second spacer layer having a first electrode length according to a thickness of a second spacer layer and a second electrode formed from the second spacer layer having a second electrode length according to the thickness of the second spacer layer are formed on sidewalls of the sidewall insulating member. A bridge of memory material having a bridge width extends from a top surface of the first electrode to a top surface of the second electrode across a top surface of the sidewall insulating member, wherein the bridge comprises memory material.
US08039391B1 Method of forming a contact in a semiconductor device with engineered plasma treatment profile of barrier metal layer
A method of forming a contact in a semiconductor device provides a titanium contact layer in a contact hole and a MOCVD-TiN barrier metal layer on the titanium contact layer. Impurities are removed from the MOCVD-TiN barrier metal layer by a plasma treatment in a nitrogen-hydrogen plasma. The time period for plasma treating the titanium nitride layer is controlled so that penetration of nitrogen into the underlying titanium contact layer is substantially prevented, preserving the titanium contact layer for subsequently forming a titanium silicide at the bottom of the contact.
US08039390B2 Method of manufacturing semiconductor device
The method of manufacturing a semiconductor device according to the present invention includes: a groove forming step of forming a groove in an insulating layer made of an insulating material containing Si and O; an alloy film applying step of covering the side surface and the bottom surface of the groove with an alloy film made of an alloy material containing Cu and Mn by sputtering; a thinning step of reducing the thickness of a portion of the alloy film covering the bottom surface of the groove; a wire forming step of forming a Cu wire made of a metallic material mainly composed of Cu in the groove after the thinning step; and a barrier film forming step of forming a barrier film made of MnSiO between the Cu wire and the insulating layer by heat treatment.
US08039385B1 IC devices having TSVS including protruding tips having IMC blocking tip ends
A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve and an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to the protruding TSV tips is on a portion of the sidewalls of the protruding TSV tips. The passivation layers is absent from a distal portion of the protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends including a first metal layer including a first metal other than solder and a second metal layer including a second metal other than solder that covers the exposed tip portion. The bulbous distal tip ends cover a portion of the TSV sidewalls and are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ≧25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends.
US08039383B2 Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric regions
A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case (particularly in the latter), capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material (e.g., a cobalt alloy, a nickel alloy, tungsten, tantalum, tantalum nitride), a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
US08039380B2 Procedure for obtaining nanotube layers of carbon with conductor or semiconductor substrate
The present invention relates to a process for producing a carbon nanotube (CNT) mat on a conductive or semiconductor substrate. According to this process, a catalytic complex comprising at least one metal layer is firstly deposited on said substrate. Said metal layer then undergoes an oxidizing treatment. Finally, carbon nanotubes are grown from the metal layer thus oxidized. The present invention also relates to a process for producing a via using said CNT mat production process.
US08039376B2 Methods of changing threshold voltages of semiconductor transistors by ion implantation
A method for forming a semiconductor structure. The method includes providing a semiconductor structure including a semiconductor substrate. The semiconductor substrate includes (i) a top substrate surface which defines a reference direction perpendicular to the top substrate surface and (ii) a semiconductor body region. The method further includes implanting an adjustment dose of dopants of a first doping polarity into the semiconductor body region by an adjustment implantation process. Ion bombardment of the adjustment implantation process is in the reference direction. The method further includes (i) patterning the semiconductor substrate resulting in side walls of the semiconductor body region being exposed to a surrounding ambient and then (ii) implanting a base dose of dopants of a second doping polarity into the semiconductor body region by a base implantation process. Ion bombardment of the base implantation process is in a direction which makes a non-zero angle with the reference direction.
US08039373B2 Pattern film forming method and pattern film forming apparatus
A pattern film forming method includes a step of producing a transfer sheet in which a thin film is formed on a surface of a sheet-shaped material and a step of pressing the thin film against a pattern film formation surface of the substrate with a pressing member having convex portions corresponding to the pattern film from a reverse surface of the transfer sheet opposite to the thin film or a reverse surface of the substrate opposite to the pattern film formation surface to transfer the thin film to the substrate. A pattern film forming apparatus includes a sheet supply device, a pressing device and a substrate transport device. A high-definition pattern film having a desired pattern and a sharp edge can be formed with high productivity.
US08039365B2 Integrated circuit package system including wafer level spacer
An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.
US08039363B2 Small chips with fan-out leads
A method of expanding the contact pitch for un-diced chips in an array by pre-slicing the array in a first direction, attaching a lead frame to the chips' contacts, and then slicing the array and attached lead frame in the second direction. The lead frame has leads mechanically connected one another such that slicing the frame in the second direction along the mechanical connections separates the leads. Each lead has a first terminal which is conductively attached to a chip contact and a second terminal extending beyond the boundaries of the chip to which the first terminal is attached. In this manner, the contact pitch is effectively expanded to the terminal pitch of the leads.
US08039355B2 Method for fabricating PIP capacitor
A PIP capacitor and methods thereof. A method of fabricating a PIP capacitor may include forming a field oxide film over a silicon substrate to define a device isolating region and/or an active region. A method of fabricating a PIP capacitor may include forming a lower polysilicon electrode having doped impurities on and/or over an field oxide film. A method of fabricating a PIP capacitor may include performing an oxidizing step to form a first oxide film over a polysilicon and/or a second oxide film on and/or over an active region. A method of fabricating a PIP capacitor may include forming an upper polysilicon electrode on and/or over a region of a first oxide film and forming a gate electrode on and/or over a second oxide film at substantially the same time. A method of fabricating a PIP capacitor may include forming a polysilicon resistor. A PIP capacitor is disclosed.
US08039354B2 Passive components in the back end of integrated circuits
Passive components are formed in the back end by using the same deposition process and materials as in the rest of the back end. Resistors are formed by connecting in series individual structures on the nth, (n+1)th, etc levels of the back end. Capacitors are formed by constructing a set of vertical capacitor plates from a plurality of levels in the back end, the plates being formed by connecting electrodes on two or more levels of the back end by vertical connection members.
US08039353B2 Semiconductor device and manufacturing method of semiconductor device
The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer. In addition, a substrate covering an element formation layer side is a substrate having a support on its surface is used in the manufacturing process.
US08039350B2 Methods of fabricating MOS transistors having recesses with elevated source/drain regions
Methods of fabricating metal-oxide-semiconductor (MOS) transistors having elevated source/drain regions are provided. The MOS transistors formed by these methods may include a gate pattern formed to cross over a predetermined region of a substrate. Recessed regions are provided in the substrate adjacent to the gate pattern. Epitaxial layers are provided on bottom surfaces of the recessed regions. High concentration impurity regions are provided in the epitaxial layers. The recessed regions may be formed using a chemical dry etching techniques.
US08039346B2 Insulated gate silicon carbide semiconductor device and method for manufacturing the same
An insulated gate silicon carbide semiconductor device is provided having small on-resistance in a structure obtained by combining the SIT and MOSFET structures having normally-off operation. The device includes an n− semiconductor layer on an SiC n+ substrate, a p-type base region and highly doped p-region both buried in the layer, a trench from the semiconductor layer surface to the p-base region, an n+ first source region in the surface of a p-type base region at the bottom of the trench, a p-type channel region in the surface of the sidewall of the trench, one end of which contacts the first source region, a gate electrode contacting the trench-side surface of the channel region via a gate insulating film, and a source electrode contacting the trench-side surface of the gate electrode via an interlayer insulating film and contacting the exposed first source region and p-base region at the bottom of the trench.
US08039344B2 Methods of forming a capacitor structure and methods of manufacturing a semiconductor device using the same
In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening. A lower electrode is formed covering the seed on the innerwall of the opening. The sacrificial layer and the seed are removed. A dielectric layer and an upper electrode are sequentially formed on the lower electrode.
US08039338B2 Method for reducing defects of gate of CMOS devices during cleaning processes by modifying a parasitic PN junction
By incorporating nitrogen into the P-doped regions and N-doped regions of the gate electrode material prior to patterning the gate electrode structure, yield losses due to reactive wet chemical cleaning processes may be significantly reduced.
US08039337B2 Nonvolatile memory device with multiple blocking layers and method of fabricating the same
A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
US08039336B2 Semiconductor device and method of fabrication thereof
A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
US08039335B2 Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer of the base semiconductor material, well-established process techniques for forming the gate dielectric may be used. In some illustrative embodiments, a substantially self-aligned process is provided in which the gate electrode may be formed on the basis of layer, which has also been used for defining the central portion of the base semiconductor material of one of the active regions. Hence, by using a single semiconductor alloy, the performance of transistors of different conductivity types may be individually enhanced.
US08039333B2 Semiconductor device and method of fabricating the same
A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.
US08039330B2 Method for manufacturing semiconductor device
The invention is directed to a method for manufacturing a semiconductor. The method comprises steps of providing a substrate having a gate structure formed thereon and forming a source/drain extension region in the substrate adjacent to the gate structure. A spacer is formed on the sidewall of the gate structure and a source/drain region is formed in the substrate adjacent to the spacer but away from the gate structure. A bevel carbon implantation process is performed to implant a plurality carbon atoms into the substrate and a metal silicide layer is formed on the gate structure and the source/drain region.
US08039329B2 Field effect transistor having reduced contact resistance and method for fabricating the same
A field effect transistor includes a nitride semiconductor layered structure that is formed on a substrate and includes a capping layer made of a compound represented by a general formula of InxAlyGa1−yN (wherein 0
US08039328B2 Trench Schottky device with single barrier
A process for forming a trench Schottky barrier device includes the forming of an oxide layer within the trenches in the surface of a silicon wafer, and then depositing a full continuous metal barrier layer over the full upper surface of the wafer including the trench interiors and the mesas between trenches with a barrier contact made to the mesas only. Palladium, titanium or any conventional barrier metal can be used.
US08039327B2 Transistor forming methods
A transistor forming method includes forming a dielectric spacer in a trench surrounding an active area island, forming line openings through the spacer, and forming a gate line extending through the line openings, over opposing sidewalls, and over a top of the fin. Source/drain regions are in the fin. Another method includes forming an interlayer dielectric over areas of the fin intended for source/drain regions, forming contact openings through the interlayer dielectric, and forming a source/drain plug in contact with an exposed portion of the spacer and in electrical connection with the top, one of opposing endwalls, and both of the opposing sidewalls of the fin.
US08039326B2 Methods for fabricating bulk FinFET devices having deep trench isolation
Methods are provided for fabricating Bulk FinFET devices having deep trench isolation. One or more deep isolation trenches are formed in a bulk silicon wafer. Mandrel-forming material is deposited overlying the bulk silicon wafer and dielectric pad layer thereon and simultaneously into the trench(es) as filler material. Mandrels are formed, overetching thereof creating a recess at the trench upper end. A conformal sidewall spacer material from which sidewall spacers are fabricated is deposited overlying the mandrels and into the recess forming a spacer overlying the filler material in the trench(es). Mandrels are removed using the spacer as an etch stop. Fin structures are formed from the bulk silicon wafer using the sidewall spacers as an etch mask. The mandrel-forming material is amorphous and/or polycrystalline silicon.
US08039325B2 Methods of fabricating semiconductor device having capacitorless one-transistor memory cell
A method of fabricating a semiconductor device having a capacitorless one-transistor memory cell includes forming a first floating body pattern on a lower insulating layer of a substrate and a first gate pattern crossing over the first floating body pattern and covering sidewalls of the first floating body pattern is formed. The first floating body pattern at both sides of the first gate pattern is partially etched to form a protrusion portion extending between and above the partially etched regions, and first impurity regions are formed in the partially etched regions of the first floating body pattern.
US08039324B2 Image sensor and method of fabricating the same
An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a first impurity region formed in the semiconductor substrate spaced from the photodiode, a second impurity region formed in the semiconductor substrate spaced from the first impurity region, a first gate formed over the semiconductor substrate between the photodiode and the first impurity region, a second gate formed over the semiconductor substrate between the first impurity region and the second impurity region, a spacer formed over the fourth impurity region and a first sidewall of the second gate, and an insulating film formed over the photodiode, the first gate, the first impurity region and a second sidewall and a portion of the uppermost surface of the second gate.
US08039321B2 Electrical fuse, semiconductor device having the same, and method of programming and reading the electrical fuse
Provided are an electrical fuse, a semiconductor device having the same, and a method of programming and reading the electrical fuse. The electrical fuse includes first and second anodes disposed apart from each other. A cathode is interposed between the first and second anodes. A first fuse link couples the first anode to the cathode, and a second fuse link couples the second anode to the cathode.
US08039317B2 Aluminum leadframes for semiconductor QFN/SON devices
A post-mold plated semiconductor device has an aluminum leadframe (105) with a structure including a chip mount pad and a plurality of lead segments without cantilevered lead portions. A semiconductor chip (210) is attached to the chip mount pad, and conductive connections (212) span from the chip to the aluminum of the lead segments. Polymeric encapsulation material (220), such as a molding compound, covers the chip, the connections, and portions of the aluminum lead segments without leaving cantilevered segment portions. Preferably by electroless plating, a zinc layer (301) and a nickel layer (302) are on those portions of the lead segments, which are not covered by the encapsulation material including the aluminum segment surfaces (at 203b) formed by the device singulation step, and a layer (303) of noble metal, preferably palladium, is on the nickel layer.
US08039313B2 Method for producing a semiconductor device including connecting a functional wafer to a carrier substrate and selectively etching the carrier substrate
A semiconductor device and method for producing such a device is disclosed. One embodiment provides a semiconductor functional wafer having a first and second main surface. Component production processes are performed for producing a component functional region at the first main surface, wherein the component production processes produce an end state that is stable up to at least a first temperature. A carrier substrate is fitted to the first main surface. Access openings are produced to the first main surface. At least one further component production process is performed for producing patterned component functional regions at the first main surface of the functional wafer in the access openings. The end state produced in this process is stable up to a second temperature, which is less than the first temperature.
US08039312B1 Method for forming a capped micro-electro-mechanical system (MEMS) device
A capped micro-electro-mechanical systems (MEMS) device is formed using a device wafer and a cap wafer. The MEMS device is located on a frontside of the device wafer. A frontside of a cap wafer is attached to the frontside of the device wafer. A first stressor layer having a tensile stress is applied to a backside of the cap wafer after attaching the frontside of the cap wafer to the frontside of the device wafer. The first stressor layer and the cap wafer are patterned to form an opening through the first stressor layer and the cap wafer after applying the first stressor layer. A conductive layer is applied to the backside of the cap wafer, including through the opening to the frontside of the device wafer.
US08039311B2 Leadless semiconductor chip carrier system
A semiconductor package system includes: providing a semiconductor die with bonding pad on the semiconductor die; attaching the semiconductor die to an intermediate layer; attaching one end of a bonding wire to the bonding pad; forming a bonding ball at the other end of the bonding wire, the bonding ball being fully or partially embedded in the intermediate layer; encapsulating the semiconductor die, the bonding pad, the bonding wire, and a portion of the bonding ball with a mold compound; removing the intermediate layer, resulting in the bonding ball protruding from the exposed mold compound bottom surface; and conditioning the bonding ball.
US08039310B2 Method of manufacturing semiconductor device with improved design freedom of external terminal
A semiconductor method comprises a method for making a device comprising: a base; a semiconductor chip provided on the base which includes a first main surface 20a on which a plurality of electrode pads is provided, a surface protecting film provided on the first main surface, a second main surface which opposes the first main surface, and a plurality of side surfaces between the surface of the surface protecting film and the second main surface; an insulating extension portion formed so as to surround the side surfaces of the semiconductor chip; a plurality of wiring patterns electrically connected to the electrode pads, respectively and extended from the electrode pads to the surface of the extension portion; a sealing portion formed on the wiring patterns such that a part of each of the wiring patterns is exposed; and a plurality of external terminals provided on the wiring patterns in a region including the upper side of the extension portion.
US08039308B2 Integrated-circuit package for proximity communication
Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover, the given semiconductor die is configured to communicate signals with the other semiconductor die via proximity communication through one or more of the proximity connectors. Furthermore, the MCM includes an alignment plate and a top plate coupled to the alignment plate. This alignment plate includes a first negative feature configured to accommodate the first semiconductor die and a second negative feature configured to accommodate the second semiconductor die, and the top plate includes a positive feature. Note that the positive feature is coupled to the first semiconductor die, and the positive feature facilitates mechanical positioning of the first semiconductor die.
US08039306B2 3D integration of vertical components in reconstituted substrates
A reconstituted electronic device including: a first face and a second face; a plurality of individual chips placed perpendicular to the faces, each individual chip carrying, on one of its surfaces, at least one component, tracks, and a connection mechanism that are flush with one or other of the faces of the reconstituted electronic device; and an encapsulant that encapsulates the individual chips.
US08039301B2 Gate after diamond transistor
A gate after diamond transistor and method of making comprising the steps of depositing a first dielectric layer on a semiconductor substrate, depositing a diamond particle nucleation layer on the first dielectric layer, growing a diamond thin film layer on the first dielectric layer, defining an opening for the gate in the diamond thin film layer, patterning of the diamond thin film layer for a gate metal to first dielectric layer surface, etching the first dielectric layer, depositing and defining a gate metal, and forming a contact window opening in the diamond thin film layer and the first dielectric layer to the ohmic contact.
US08039298B2 Phase changeable memory cell array region and method of forming the same
A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions.
US08039297B2 Plasma treating methods of fabricating phase change memory devices, and memory devices so fabricated
Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related devices are also described.
US08039292B2 Holey electrode grids for photovoltaic cells with subwavelength and superwavelength feature sizes
A photovoltaic cell and a method of forming an electrode grid on a photovoltaic semiconductor substrate of a photovoltaic cell are disclosed. In one embodiment, the photovoltaic cell comprises a photovoltaic semiconductor substrate; a back electrode electrically connected to a back surface of the substrate; and a front electrode electrically connected to a front surface of the substrate. The substrate, back electrode, and front electrode form an electric circuit for generating an electric current when said substrate absorbs light. The front electrode is comprised of a metal grid defining a multitude of holes. These holes may be periodic, aperiodic, or partially periodic. The front electrode may be formed by depositing nanospheres on the substrate; forming a metallic layer on the substrate, around the nanospheres; and removing the nanospheres, leaving an electrode grid defining a multitude of holes on the substrate.
US08039290B2 Method of making photovoltaic cell
Methods of making a photovoltaic (PV) cell are disclosed. The methods comprise at least the steps of, providing a first component comprising a cadmium telluride (CdTe) layer comprising an interfacial region, and subjecting the first component to a functionalizing treatment in the presence of a material comprising copper.
US08039288B2 Semiconductor device and manufacturing method thereof
A high performance electric device which uses an adhesive layer over a substrate. A color filter is over a substrate, and an adhesive layer is also located over the substrate and color film. An insulating layer is over the adhesive layer, and thin film transistors cover the insulating film and the color filters. Light emitting elements cover the thin film transistors and emit light through the substrate that is through the adhesive layer and color filter. The substrate may be plastic, thus increasing the heat resistance.
US08039286B2 Method for fabricating optical device
A method for fabricating an optical device includes providing a semiconductor substrate having an element region and a peripheral region. The element region has an element array comprised of semiconductor elements formed therein. The peripheral region has at least a bonding pad electrically connected to the element array. A dielectric layer with an opening exposing the bonding pad is formed over the semiconductor substrate. A filter array and a planarizing layer are sequentially formed on the dielectric layer, and an organic layer is filled into the opening. An inorganic layer is formed on the planarizing layer and covers the organic layer. A portion of the inorganic layer and the organic layer are sequentially removed until the bonding pad is exposed. The organic layer protects the bonding pad from corrosion during the step removing the inorganic layer, and thus the fabrication yield is improved.
US08039285B2 Thin film getter protection
A method for installing a sorption element in a cavity including: disposing, within the cavity, a getter material, a reaction material, and a protective material, the protective material covering at least one part of the getter material so as to bury the at least one part; raising a temperature up to at least one removal temperature; and moving the protective material towards the reaction material by reaction between the protective material and the reaction material so that at least one portion of the part of the getter material is no longer covered with the protective material.
US08039282B2 Semiconductor optical device and method of fabricating the same
In a method of fabricating a semiconductor optical device, a semiconductor region is formed by growing an InP lower film, a active region, an InP upper film and a capping film on a substrate sequentially. Material of the capping film is different from that of InP. Next, a mask is formed on the capping film, and the semiconductor region is etched using the mask to form a semiconductor stripe mesa, which includes an InP lower cladding layer, a active layer, an InP upper cladding layer and a capping layer. The active layer comprises aluminum-based III-V compound. A width of the top surface of the capping layer is greater than that of a width of the bottom surface of the capping layer. A width of the top surface of the InP upper cladding layer is smaller than that of the bottom surface of the InP upper cladding layer. The minimum width of the semiconductor mesa is in the InP upper cladding layer. After forming the semiconductor stripe mesa, thermal process of the semiconductor mesa is carried out in an atmosphere to form a mass transport semiconductor on a side of the InP upper cladding layer, and the atmosphere contains V-group material.
US08039280B2 Light emitting diode and method of fabricating the same
The present invention provides a method of fabricating a light emitting diode, which comprises the steps of forming a compound semiconductor layer on a substrate, the compound semiconductor layer including a lower semiconductor layer, an active layer and an upper semiconductor layer; and scratching a surface of the substrate by rubbing the substrate with an abrasive. According to the present invention, the abrasive is used to rub and scratch the surface of the light emitting diode, thereby making it possible to cause the light emitted from the active layer to effectively exit to the outside. Therefore, the light extraction efficiency of the light emitting diode can be improved.
US08039277B2 Providing current control over wafer borne semiconductor devices using overlayer patterns
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1240) having a substrate (1240), at least one active layer (1240) and at least one surface layer (1240), Current control can be achieved through the formation of patterns (1240) surrounding contacts (1215), said patterns (1240) including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (1215). Current flows through active regions (1260) associated with said contacts (1215) and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
US08039270B2 Apparatus and method for performing ligand binding assays on microarrays in multiwell plates
Ellipsometry systems for imaging binding events between analytes in a sample and an array of ligands in an evanescent field generated by a beam of light reflected from the plane of the ligands is adapted to a multiwell plate structure in common use. In one example, a film of prism arrays is affixed to the underside of the plate with each prism array located in registry with a well and ligand arrays being immobilized on the (planar) bottom surface of the wells. The prism array may be formed in a film and juxtaposed with the bottom surface of the plate or a prism array can be made integral with the plate bottom of a multiwell plate.
US08039269B2 Mechanically induced trapping of molecular interactions
The invention provides devices and methods for surface patterning the substrate of a microfluidic device, and for detection and analysis of interactions between molecules by mechanically trapping a molecular complex while substantially expelling solvent and unbound solute molecules. Examples of molecular complexes include protein-protein complexes and protein-nucleic acid complexes.
US08039266B2 Methods to radiolabel natural organic matter by reduction with hydrogen labeled reducing agents
Methods to radiolabel natural organic matter by reduction with a hydrogen labeled reducing agent, and compositions, are provided.
US08039265B1 Determining oxygen content of metal species in heterogeneous catalysts
The oxygen content of metal species in a heterogeneous catalyst is determined using volumetric adsorption measurements. Such measurements are employed to quantify the amount of reduction gas that it takes to reduce metal species of a catalyst sample, and the oxygen content is derived from this amount and the reaction stoichiometry. This method can be applied to mono-metallic and multi-metallic heterogeneous catalysts and has been shown to provide at least 10 times better detection sensitivity than typical TCDs in TPR-TCD methods.
US08039261B2 Promoters exhibiting endothelial cell specificity and methods of using same for regulation of angiogenesis
Isolated polynucleotide sequences exhibiting endothelial cell specific promoter activity, novel cis regulatory elements and methods of use thereof enabling treatment of diseases characterized by aberrant neovascularization or cell growth are disclosed.
US08039259B2 Buffer solution for electroporation and a method comprising the use of the same
A buffer solution for suspending animal or human cells and for dissolving biologically active molecules in order to introduce the biologically active molecules into the cells using electric current. The buffer solution includes at least one of sodium succinate, mannitol and sodium lactobionate. The buffer solution has a buffer capacity of at least 20 mmol*l−1*pH−1 at a change in the from pH 7 to pH 8 and at a temperature of 25° C., and an ionic strength of at least 200 mmol * l−1.
US08039251B2 Biological indicator
A biological indicator for monitoring the effectiveness of a sterilization or disinfection treatment or process. The biological indicator comprises a substrate having a surface layer containing functional groups thereon desirably free of silicon linking groups. The functional groups are added to the surface through the use of a functionalized silane coupling agent, wherein two different functional groups are generally utilized and the functionalized silane is applied in a uniform and consistent manner thereby assuring that the microorganism or etiological agent indicators are attached to the substrate in a uniform and consistent manner through non-covalent bonding to the functional groups. After being subjected to sterilization or other similar disinfecting treatments or processes along with various articles such as instruments, the indicator can be cultivated or cultured to determine the effectiveness of the sterilization or disinfection treatment or process.
US08039236B2 Process for producing dipeptides
The present invention provides a protein which catalyzes the synthesis of a dipeptide different from L-Ala-L-Ala, a process for producing the protein which catalyzes the synthesis of a dipeptide, a process for producing a dipeptide using the protein which catalyzes the synthesis of a dipeptide, and a process for producing the dipeptide using a culture of a microorganism producing the protein which catalyzes the synthesis of a dipeptide or the like as an enzyme source.
US08039235B2 Oligonucleotide sequences and DNA chip for identifying filamentous microorganisms and the identification method thereof
A DNA chip for identifying filamentous microorganisms, including a substrate and a plurality of probes, wherein the probe includes SEQ ID No. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, complementary sequences thereof, derivatives thereof or combinations thereof. The derivative is 5′ and/or 3′ end of the sequence SEQ ID No. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 or 16 with at least one thymidine residue added or is 5′ and/or 3′ end of the sequence SEQ ID No. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 or 16 with one or two nucleotides added or deleted.
US08039232B2 Method for producing a dipeptide
DNA and recombinant DNA that encode a peptide-forming enzyme, a method for producing a peptide-forming enzyme, and a method for producing a dipeptide are disclosed. A method for producing a dipeptide includes producing a dipeptide from a carboxy component and an amine component by using a culture of a microbe belonging to the genus Sphingobacterium and having the ability to form the dipeptide from the carboxy component and the amine component, a microbial cell separated from the culture, treated microbial cell product of the microbe or a peptide-forming enzyme derived from the microbe.
US08039231B2 Methods for enhanced production of bone morphogenetic proteins
Methods and processes for improved recombinant protein production are provided. The methods are useful for production of growth factors, particularly those of the TGF-β superfamily, including bone morphogenetic proteins (BMPs), such as BMP-2. Suitable host cells are cultured in media where iron is present at a concentration of at least 2.25 μM and if pyridoxal is present, it makes up less than 55% of the molar concentration of vitamin B6 in the media.
US08039225B2 Method to identify patients at risk for lung transplant rejection
Various embodiments include methods for diagnosing and treating medical conditions that involve an autoimmune response to connective tissue such as collagen found in organs such as the lung. In one method pulmonary disease and disorders such as Idiopathic Pulmonary Fibrosis (IPF) are diagnosed by analyzing fluid or tissue samples obtained from a patient for evidence of an autoimmune response to various types of collagen including, for example, Type V. One type of assay for evidence of an autoimmune response to Type V collagen comprises the steps of obtaining a fluid or tissue sample from a patient, contacting at least a portion of the sample with antigen to anti-Type V collagen antibody and monitoring the mixture of sample and antigen for changes indicative of the presence of anti-Type V collagen in the sample. Another embodiment includes treating pulmonary diseases such as IPF by administering a therapeutically effective dose of epitopes of various collagens including Type V collagen.
US08039224B2 Gene specifically expressed in postmitotic dopaminergic neuron precursor cells
A novel gene 65B13 expressed specifically and transiently in dopaminergic neuron precursor cells immediately after cell cycle exit was obtained by the present invention. The cellular expression of 65B13 can be used as an index to select cells that are suitable in terms of their safety, survival rate, and network formation ability, for transplant therapy of neurodegenerative diseases such as Parkinson's disease.
US08039223B2 Method of selectively assaying adiponectin multimers
Kits and methods for selectively assaying a target adiponectin multimer in a biological sample. Such methods accurately evaluate the relationship between a disease and adiponectin through selective assay of adiponectin multimers and provide information that cannot be obtained through measurement of the total amount of adiponectin alone. A method for selectively assaying a target adiponectin multimer in a biological sample comprising distinguishing target adiponectin multimer from the other adiponectin multimers by using a protease and/or an antibody.
US08039221B2 Methods for identifying and using MarR family polypeptide binding compounds
Methods for identifying MarR family inhibiting compounds are described. The methods include the use of computer aided rational based drug design programs and three dimensional structures of MarR family polypeptides.
US08039217B2 Proteomic interaction and genomic action determinations in the presence of associated redox state conditions
Genomic actions and/or proteomic interactions for pathophysiological processes and for physiological processes are determined at associated redox state conditions. Protein interactions are correlated with oxygen tensions. Identification of markers for disease including epitopes is effected in the presence of simulated redox state perturbations. Screening for previously unknown receptors and activating ligands is carried out in the presence of alteration of redox state.
US08039214B2 Synthesis of tagged nucleic acids
The present invention relates generally to methods, compositions and kits for synthesizing sense RNA molecules from one or more RNA molecules of interest in a sample. In exemplary embodiments, the methods use a terminal tagging oligoribonucleotide (rTTO) to join a DNA sequence tag to the 3′-termini of first-strand cDNA molecules. The use of an rTTO comprising ribonucleotides results in decreased oligonucleotide-derived background synthesis of RNA in the absence of sample RNA and, surprisingly and unexpectedly, also results in significantly increased yields of sense RNA molecules that exhibit sequences that are substantially identical to those of the RNA molecules of interest in the sample. The sense RNA molecules also have an RNA sequence tag on their 5′-termini that is useful for fixing the lengths of sense RNA molecules that are synthesized in a second or subsequent round.
US08039209B2 Yeast screens for treatment of human disease
Screening methods for identifying substances that provide therapeutic value for various diseases associated with protein misfolding are provided. Genetic and chemical screening methods are provided using a yeast system. The methods of the invention provide a rapid and cost-effective method to screen for compounds that prevent protein misfolding and/or protein fibril formation and/or protein aggregation which includes numerous neurodegenerative diseases including Parkinson's disease, Alzheimer's disease, Huntington's disease as well as non-neuronal diseases such as type 2 diabetes.
US08039208B2 Automated strategy for identifying physiological glycosylation markers(s)
One can identify and quantify one or more glycosylation markers of a physiological condition such as a disease or a stage of disease by utilizing quantitative HPLC analysis of glycans which have been released from unpurified glycoproteins. The unpurified glycoproteins can be total glycoproteins or a selection of the total glycoproteins. The identified glycosylation marker can be a native glycan or a digestion product which has been segregated and amplified by exoglycosidase digestions. This strategy is compatible with a high throughput format and glycan data base searching. One can utilize the identified glycosylation marker, for example, for monitoring the physiological condition in a subject. One can also use the glycosylation marker to identify glycoproteins that carry the glycosylation marker which can also be used to monitor the physiological condition. The biomarker may also be a subset of glycoforms of a glycoprotein that are separated in trains of spots on 2D gel.
US08039206B1 Detection of micro-organisms
Improved methods for detecting microorganisms, such as yeast and bacteria in mixtures, are disclosed. Methods include passing a sample mixture through a filter device, which has been pretreated with a detergent, resuspending the filtrand in the filter membranes and detecting the presence of microorganisms in the filtrand.
US08039205B2 Fluidic MEMS device
A method includes depositing a sacrificial material on a substrate, and depositing a polymer layer on the substrate and the sacrificial material. The method further includes removing the sacrificial material to at least partially define boundaries of at least one fluidic channel of a fluidic micro electromechanical system (MEM) device, the at least one fluidic channel is at least partially defined by a portion of the polymer layer and a portion of the substrate.
US08039200B2 Photosensitive composition and pattern-forming method using the photosensitive composition
A photosensitive composition comprises (A) a sulfonium or iodonium salt having an anion represented by one of formulae (I) and (II): wherein Y represents an alkylene group substituted with at least one fluorine atom, and R represents an alkyl group or a cycloalkyl group.
US08039199B2 Negative resist composition for immersion exposure and method of forming resist pattern
A negative resist composition for immersion exposure including a fluorine-containing polymeric compound (F) containing a structural unit having a base dissociable group, an alkali-soluble resin component (A) excluding the fluorine-containing polymeric compound (F), an acid generator component (B) that generates acid upon exposure, and a cross-linking component (C); and a method of forming a resist pattern including applying the negative resist composition for immersion exposure to a substrate to form a resist film, subjecting the resist film to immersion exposure, and subjecting the resist film to alkali developing to form a resist pattern.
US08039198B2 Sulfonium salt-containing polymer, resist composition, and patterning process
A polymer comprising recurring units of a sulfonium salt represented by formula (1) is provided as well as a chemically amplified resist composition comprising the same. R1 is H, F, methyl or trifluoromethyl, R2 to R4 are C1-C10 alkyl or alkoxy, R5 is C1-C30 alkyl or C6-C14 aryl, k, m and n are 0 to 3. The recurring units generate a sulfonic acid upon exposure to high-energy radiation so as to facilitate effective scission of acid labile groups in the resist composition. The resist composition exhibits excellent resolution and a pattern finish with minimal LER.
US08039197B2 Positive type resist composition for use in liquid immersion exposure and a method of forming the pattern using the same
A positive type resist composition for use in liquid immersion exposure comprises: (A) a resin having a monocyclic or polycyclic cycloaliphatic hydrocarbon structure, the resin increasing its solubility in an alkali developer by an action of acid; (B) a compound generating acid upon irradiation with one of an actinic ray and a radiation; (C) an alkali soluble compound having an alkyl group of 5 or more carbon atoms; and (D) a solvent.
US08039194B2 Photoacid generators for extreme ultraviolet lithography
A photoacid generator P+ A− comprises (a) an antenna group P+ comprising atoms with high EUV photoabsorption cross-sections according to FIG. 1 and A− anions; or (b) an antenna group P+ and A− comprising anions with low photoabsorption cross-sections for EUV; or (c) an antenna group P+, comprising atoms with high EUV photoabsorption cross-sections according to FIG. 1 and A− comprising anions with low photoabsorption cross-sections for EUV. Novel compounds comprise DTFPIO PFBuS, and DTBPIO CN5.
US08039191B2 Toner
A toner having a BET specific surface area of from 1.5 to 3.5 m2/g, obtainable by a process including the steps of; step (1): pulverizing a toner composition containing at least a resin binder and a colorant in the presence of fine inorganic particles having an average primary particle size of from 6 to 20 nm to obtain mother toner particles having a volume-median particle size of from 3 to 8 μm; and step (2): externally adding silica having an average primary particle size of from 25 to 60 nm to the mother toner particles obtained in the above step (1). The toner of the present invention is suitably used for, for example, developing a latent image formed in electrophotography, electrostatic recording method, electrostatic printing method, or the like.
US08039186B2 Toner for developing electrostatic image, developer for developing electrostatic image, and method for forming image
A toner for developing an electrostatic image comprises: a binder resin; and a releasing agent, wherein the binder resin comprises a polycondensation resin obtained by polycondensing a polycondensation monomer in the presence of a polycondensation catalyst, the releasing agent comprises a condensation compound obtained by condensing a condensation monomer in the presence of a condensation catalyst, the toner contains a metallic element derived from the polycondensation catalyst and the condensation catalyst in an amount of from 0 to 10 ppm, and the toner contains a sulfur component in an amount of from 100 to 20,000 ppm.
US08039185B2 Toner for developing a latent electrostatic image, method for producing the same, image-forming apparatus and process cartridge using the same
To provide a toner for developing a latent electrostatic image comprising at least a colorant, a wax, and a binder resin, wherein Iwax (s) is a value measured by FTIR-ATR Spectroscopy before heating a mirror-surfaced pellet formed by compressing and molding the toner, and Iwax (t) is a value measured by FTIR-ATR Spectroscopy after heating the pellet at a surface temperature thereof of 130° C. for 1 minute satisfy Formulae (1), (2), (3), and (4), Iwax (t)≧0.2*100/[T½(° C.)]  Formula (1) Iwax (s)≦0.26  Formula (2) Iwax (t)≦0.50  Formula (3) Iwax (t)>Iwax (s)  Formula (4) wherein both Iwax(s) and Iwax(t) are obtained by a formula: absorbance derived from the wax (2850 cm−1)/absorbance derived from the binder resin (828 cm−1).
US08039182B2 Circuit pattern formation device and method of forming circuit pattern to substrate
An object is to improve the adhesion strength between a circuit pattern and its substrate without increasing the resistance value of the circuit pattern in preparation of a circuit pattern holding substrate. A circuit pattern formation device 100 forms, after forming a precursor circuit-pattern 12 in the surface of a dielectric thin film body 4, a circuit pattern 14 onto a target substrate 23 from the dielectric thin film body. After forming an electrostatic latent image 2 in the upper surface of the dielectric thin film body, the electrostatic latent image is exposed using an exposure unit 3 to prepare a pattern. A development apparatus 7 supplies a conductive particle dispersion solution 6 to this pattern to form a precursor circuit-pattern. By energizing the circuit pattern holding substrate 8, in which an adhesive layer 22 is formed, the precursor circuit-pattern is temporarily transferred to the circuit pattern holding substrate. The transferred precursor circuit-pattern is heated using the heater 13 to form a circuit pattern. The circuit pattern and the adhesive layer are released from the circuit pattern holding substrate, thereby transferring to the target substrate.
US08039175B2 Method for shrinkage and porosity control during sintering of multilayer structures
The present invention provides a method for producing a multilayer structure, comprising the steps of: providing a composition comprising a Fe—Cr alloy powder and at least one of the oxides of Fe, Cr, Ni, Co, Zn, Cu; forming a first layer of said composition; forming at least one additional layer on one side of said first layer; heat treating said layers in an oxygen-containing atmosphere; and sintering in a reducing atmosphere so as to provide a final alloy, wherein the amount of Fe in the final alloy of the first layer after the sintering step is in the range of from about 50-90% by weight, based on the total weight of the final alloy.
US08039172B2 Cathode catalyst for a fuel cell, and a membrane-electrode assembly for a fuel cell and a fuel cell system comprising the same
A cathode catalyst for a fuel cell, and a membrane-electrode assembly for a fuel cell and a fuel cell system that includes the same. The cathode catalyst includes an active material of an A-B-X compound where A is one of Cu, Ag or a combination thereof, B is one of Nb, Hf; Ta or combinations thereof, and X is one of S, Se, Te or combinations thereof, and a carbon-based material supporting the active material as a carrier.
US08039171B2 Current-collecting composite plate for fuel cell and fuel cell fabricated using same
A current-collecting composite plate for a fuel cell configured with unit cells according to the present invention, which comprises: an insulator layer; and a plurality of pairs of conductor layers, the conductor layers being bonded to the insulator layer to be spaced apart from each other by a predetermined distance, each pair being used for adjacently disposed anode and cathode electrodes for a different one of the unit cells by sandwiching an electrolyte assembly therebetween. And, each conductor layer includes: a first conductor layer of a corrosion resistant metal treated with an electrically conductive surface treatment; a second conductor layer of a metal with low electrical resistivity; a through-hole penetrating the first conductor layer and the insulator layer; and a connecting portion formed of the second conductor layer for connecting the unit cells.
US08039163B2 Separator and fuel cell using that separator
A separator of a fuel cell, which is inserted between single cells, each single cell having an electrolyte sandwiched between electrodes, in order to stack the single cells together, includes gas diffusion portions which are arranged so as to cover a surface of the electrodes and in which are formed multiple air holes for gas diffusion, and spacer portions which form parallel divided gas passages on the back side of portions of the gas diffusion portions which cover the surface of the electrodes. The gas diffusion portions and the spacer portions are integrally formed by bending a wire mesh member to have a rectangular corrugated plate shaped cross-section. As a result, the air holes are formed evenly between the electrodes and the separator and high contact pressure is ensured by the contact of the fine wire mesh, thereby making it possible to both have the gas diffuse evenly and reduce the power collection resistance.
US08039157B2 Startup method for fuel cell stack structure, temperature control method for fuel cell stack structure, and fuel cell stack structure
A fuel cell stack structure and a method of starting up the fuel cell stack structure are disclosed. The fuel cell stack structure includes a stack of a plurality of solid electrolyte fuel cells, each equipped with a solid electrolyte simplex cell accommodated in a cell space surrounded by a metallic thin plate-like separator and having one surface exposed to the outside, and a gas flow channel formed in and extending through the solid electrolyte fuel cells to supply gas to the respective cell space areas of the solid electrolyte fuel cells, wherein an area with high-heat capacity is preferentially supplied with and heated by high temperature gas at the stage of increasing temperatures of the plurality of solid electrolyte fuel cells during startup thereof.
US08039154B2 Fuel cell system, method of starting fuel cell system
Problems of acceleration of drying of electrolyte membrane and local reaction, etc. can be properly coped with to attain the stabilization of performance of fuel cell.There are provided a fuel cell 121 which generates electric power from a fuel gas and an oxidizing agent gas, a fuel gas feed pipe 161 and a first switch valve 129 as fuel gas supplying unit which supplies the said fuel gas into the said fuel cell on the anode side thereof, an oxidizing gas supplying pipe 162 and a second cut-off valve 131 as oxidizing agent gas supplying unit which supplies the said oxidizing agent into the said fuel cell on the cathode side thereof, a raw material gas supplying pipe 151 and a third switch valve 143 as raw material gas supplying unit which supplies raw material of the said fuel gas into the fuel cell and a control portion 127 which controls the supply of the said fuel gas, the supply of the said oxidizing agent and the supply of the said raw material and the control portion 127 controls during the starting of electricity generation of the fuel cell 121 such that the said raw material gas supplying unit purges the fuel cell 121 at least on the cathode side thereof with the said raw material gas before the oxidizing agent gas supplying unit and the fuel gas supplying unit supply the fuel gas and the said oxidizing agent gas into the fuel cell 121, respectively.
US08039149B2 Bismuth oxyfluoride based nanocomposites as electrode materials
The present invention relates to bismuth oxyfluoride nanocomposites used as positive electrodes in primary and rechargeable electromechanical energy storage systems.
US08039146B2 Electrochemical device comprising alkaline electroylte
An electrochemical device, such as an alkaline battery, that is excellent in leakage-resistance and storage characteristics is provided by controlling at least one of the following two conditions with respect to at least the inner side surface of a battery case comprising a nickel plated steel plate. The two conditions are: (1) the intensity ratio of Fe to Ni (IFe/Ni) as determined by electron probe microanalysis; and (2) the ratio of the area with an intensity ratio of Fe to Ni (IFe/Ni) of greater than 1.0 as determined by electron probe microanalysis to the whole area.
US08039145B2 Secondary battery module with exposed unit cells and insulation between terminals
Disclosed herein is a high-output, large-capacity secondary battery module, having a plurality of unit cells electrically connected to each other, for charging and discharging electricity. A plurality of unit cells are stacked one on another and mounted on a plate, preferably, between an upper case and a lower case, which are separated from each other, circuit units are continuously mounted at the side surfaces of the module for sensing the voltage, the current, and the temperature of the battery, controlling the battery, and interrupting electricity when overcurrent is generated, whereby the secondary battery module is constructed in a compact structure, design of the battery module is easily changed depending upon electrical capacity and output, and components of the battery module are stably mounted.
US08039144B2 Electrochemical cell with singular coupling and method for making same
An electrochemical cell (400) is provided having a singular electrical coupling. A flexible substrate (200) having an interconnect extension (209) is coupled to an electrochemical cell structure (300). The assembly is then placed into an enclosure (301), such that a portion of the flexible substrate (200) is disposed within the enclosure (301). The enclosure (301) is then sealed about the interconnect extension (209) such that the interconnect extension (209) projects distally from the closure (404) as a singular electrical coupling. Embodiments of the invention facilitate the manufacture of narrow cells without compromising cell reliability.
US08039143B2 Electrode unit for prismatic battery, prismatic battery, and method of manufacturing electrode unit for prismatic battery
To provide an electrode unit for a prismatic battery capable of increasing the output of the battery while suppressing the battery internal resistance value and improving the degree of freedom of the size of the electrode plate. An electrode unit for a prismatic battery including an electrode group in which positive electrode plates and negative electrode plates in an almost rectangular shape are alternately stacked with separators interposed therebetween. In each of the positive electrode plate and the negative electrode plate, core material exposed portions are formed at least on two side edges. The positive electrode plates and the negative electrode plate are stacked such that their core material exposed portions are directed not to overlap each other in the stack direction. The electrode unit for a prismatic battery includes a positive current collector having a shape capable of joining to all of the core material exposed portions of the positive electrode plates constituting the electrode group, and a negative current collector capable of joining to all of the core material exposed portions of the negative electrode plates constituting the electrode group, not in contact with the positive current collector.
US08039142B2 Battery case
The present invention provides a battery including a case, a connector, the holding member, and a resilient conductive plate. In the case, two battery cells each in the form of a flattened rectangular plate are accommodated. The connector is exposed from the case. The holding member is for holding the two battery cells in the case. The holding member is made of a nonconductive resilient material and has a first battery accommodating section and a second battery accommodating section in which the battery cells each in the form of a flattened rectangular plate are accommodated in a juxtaposed relationship so as to form a rectangular shape as viewed in plan. The resilient conductive plate extends on the holding member for electrically connecting the two battery cells accommodated in the first and second battery accommodating sections and the connector to each other.
US08039139B2 Prismatic-cell battery pack with integral coolant passages
A prismatic-cell battery pack is provided with integral coolant passages including an intake plenum, an exhaust plenum, and a distributed array of coolant channels coupled between the intake plenum and the exhaust plenum. Coolant medium forced into the intake plenum enters the coolant channels in parallel, draws heat away from the battery cells, and then enters the exhaust plenum for expulsion into the atmosphere. The battery pack is configured as a set of stackable interlocking battery cell modules including at least one battery cell in thermal proximity to an array of coolant channels distributed over the profile of the battery cell, and a pair of peripheral chambers joined to opposite ends of the coolant channels to form the intake and exhaust plenums when the modules are arranged and interlocked in a lineal stack.