Document Document Title
US07978597B2 Communication management system, communication management method, and communication management device
A failure is detected in at least one of an active system including an active packet transfer board, an active system packet processing board, and an active system switch board. At least function setting information for executing functions of the active system packet transfer board and the active packet processing board is stored. When failure is detected in active system, a system switching instruction is outputted to the standby system including a standby packet transfer board, a standby system packet processing board, and a standby system switch board. The stored function setting information of one or both of the active system packet transfer board and the active system packet processing board that have been detected a failure is transmitted to the one or both of the standby system packet transfer board and the standby system packet processing board that correspond to boards that have been detected a failure.
US07978596B2 Connection-oriented network node
A connection-oriented network node capable of becoming an originating node of a protection path serving as a bypath of a protection segment included in a working path in a network system in which data is transferred via a path previously set up between nodes, comprises a usage bandwidth determining unit determining, when setting up the protection path, a usage bandwidth of the setup target protection path on the basis of a working path including the protection segment to be protected by the setup target protection path, and a generation unit generating, if a value obtained by adding the determined usage bandwidth to a current protection path usage bandwidth of an interface transmitting data that is forwarded on the setup target protection path, does not exceed a usable bandwidth for the protection path that is preset with respect to the interface, a signaling message for setting up the setup target protection path to send this message.
US07978595B2 Method for processing multiple active devices in stacking system and stacking member device
The present invention discloses a method for processing multiple active devices in a stacking system. In the method, each active device in a stacking system exchanges unique identity information with any another active device through a preconfigured Bidirectional Forwarding Detection (BFD) session when a stacking link in the stacking system is in failure, determines an active priority of its own by comparing unique identity information of its own with the unique identity information received; and the active device stops providing services as an active device when determining that the active priority of its own is not the highest priority. The present invention also discloses a member device in the stacking system. The present invention can solve the collision of multiple Active devices, and is applicable to both a stacking system including two member devices and a stacking system including more than two member devices.
US07978593B2 Method for transmitting control information to instruct receiver
A method for transmitting control information to indicate a receiver, comprising following steps: the control information is formed at transmitting side and is encoded based on the working status of the transmitting side of the system; after the encoded control information is mapped, it is multiplexed with other pilot symbol and service load, then an OFDM symbol is generated; the OFDM symbol is transformed from frequency domain to time domain, then a time domain sampling signal is obtained and transmitted to the receiving side of the system; at the receiving side, the time domain sampling signal transmitted by the transmitting side is received and transformed from time domain to frequency domain to form OFDM symbol; the control information is obtained from the valid sub carrier of the OFDM symbol, and the control information is decoded; each work information is extracted form the decoded control information, and the receiving terminal is indicated to execute respective receive process based on the extracted work information. The method can ensure the receiving terminal to receive data based on its own expectation, then reduces the work power consumption of the receiving terminal, and saves the run cost of the digital broadcast system.
US07978592B2 Method and apparatus for signaling in multiple user one-slot operation in wireless communication
Disclosed are multiple embodiments of method and apparatus to facilitate Multiple Users Reusing One Timeslot (MUROS) operation in wireless communications. A pair of wireless transmit/receive units (WTRUs) may be multiplexed onto a timeslot using a same pulse format. A WTRU may communicate on a network using MUROS technology both on the downlink (DL) and the uplink (UL), and may use a first pulse format on the DL and a second different pulse format on the UL. Pulse format support information to facilitate MUROS operation may be communicated between a network and a WTRU. The support information may be communicated in Radio Resource Control (RRC) messages. A network may allow for concurrent operation of WTRUs using different types of MUROS technology. For example, a network may include WTRUs using MUROS based on orthogonal sub-channels (OSC) while other WTRUs use MUROS based on an interference-canceling technology such as Downlink Advanced Receiver Performance (DARP) Phase I or Phase II.
US07978589B1 System and method for verifying write performance during optical recording
A write analysis system is described for an optical drive, where the optical drive includes an optical storage medium. The write analysis system includes a filter that receives a reflected signal that is based on a reflection of a diffracted laser beam. The reflection of the diffracted laser beam includes a reflection of a first write signal. The filter generates a filtered signal by filtering the first write signal from the diffracted laser beam. The system also includes a read-back module that receives the filtered signal and that compares the filtered signal to a second write signal that was written to the optical storage medium prior to the first write signal.
US07978587B2 Optical pickup apparatus and optical disc apparatus with a single beam system
An optical pickup apparatus is provided with a dividing element having a plurality of regions. The dividing element is capable of dividing a light flux reflected by the optical disc into a plurality of light fluxes having different outgoing directions. Each region of the dividing element and light receiving parts of a light detector are structured such that when a target information recording layer of the optical disc is brought into focus, a light flux reflected from the target information recording layer is focused on the light receiving parts of the light detector, and a light flux reflected from other information recording layer than the target information recording layer is not irradiated onto the light receiving parts of the light detector.
US07978586B2 Optical pickup device
An optical pickup device includes a diffraction grating 12 for separating a light beam emitted from a semiconductor laser element into at least three light beams. The diffraction grating 12 is divided into three regions by a straight line extending in a direction parallel to a tangent line of a track of an optical information recording medium. A second region 12B is divided into a first sub-block 13 and a second sub-block 14 by a straight line extending in a direction parallel to a radius direction of the optical information recording medium. The first sub-block 13 has a phase difference of approximately 180 degrees from the second sub-block 14. The first region 12A has a phase difference of approximately 90 degrees from the first sub-block 13 and has a phase difference of approximately 180 degrees from the third region 12C.
US07978585B2 Aberration correcting device, optical head, and optical disc apparatus
An aberration correcting device includes: a first transparent electrode; a second transparent electrode; and a liquid crystal layer disposed between the first transparent electrode and the second transparent electrode, having refractive index varying according to an electric field applied to the liquid crystal layer, wherein the first transparent electrode has a first circular dividing line and a second circular dividing line formed outside the first circular division line arranged to be concentric with the second circular dividing line, and wherein a region between the first circular dividing line and the second circular dividing line is radially divided by plural radial dividing lines.
US07978581B2 Multi-layered high-density recording medium and optical power adjusting method therefor
A multi-layered high-density recording medium and an optical power adjusting method for use with the same. Control information is pre-recorded in a specific area of at least a specific recording layer among the multiple recording layers, wherein the control information and includes each reference power information for respective recording layers. The method includes: (a) reading control information from a specific area of the recording medium, wherein the control information includes each reference power information for respective recording layers and is pre-recorded in the specific area of at least a specific recording layer among the multi recording layers; (b) adjusting a power value to be used for at least one of a recording operation and a reproducing operation at a target recording layer, by referring to the read control information; and (c) performing at least one of the recording and reproducing operations based on the adjusted power value.
US07978580B1 Calibrating optical drive write parameters during writing
A model is derived for write parameters of a laser in an optical drive. A parameter range for the write parameters is set based on a recordable medium. A number of test runs are recorded on the recordable medium while varying the write parameters. Write performance characteristics are measured over the test runs, and a model of write performance as a function of the write parameters is derived. Values for write parameters are selected for use in writing actual data based on the derived model. A first section of user data is written to the data-carrying region of the recordable medium using the selected values. The write performance characteristics of the first section of user data are measured, and the model is updated by including the measurements from the data-carrying region. New values for the write parameters of the laser are selected based on the updated model.
US07978579B1 HD DVD wobble detection circuit
In a circuit, a wobble detector detects a wobble signal from an optical recording medium and a synchronization signal based on the wobble signal and provides a wobble clock signal. A wobble signal phase imperfection detector responds to the wobble signal and detects and corrects a phase transition imperfection in the wobble signal. The imperfection detector integrates a first scaled wobble signal sample over a half period portion of the wobble clock signal; compares the first scaled wobble signal sample integrated over one period of the wobble clock signal to a variable threshold value; and based on the comparison, outputs either the half period integrated and scaled wobble sample or the first scaled wobble sample integrated over one period of the wobble clock signal. The imperfection detector further decodes the output to obtain wobble address period data. In one embodiment, the imperfection detector may include a half period integrator, a comparator, a selector, and a decoder to perform the indicated functions.
US07978577B2 Method of and apparatus for managing disc defects using temporary defect information (TDFL) and temporary defect management information (TDDS), and disc having the TDFL and TDDS
A disc having an updatable defect management area used by an apparatus for managing defects on the disc, the disc including a user data area which includes user data, a spare area that is a substitute area for a defect existing in the user data area, and an area in which are recorded an address of data that is last recorded in the user data area and an address of a replacement data recorded in the spare area. Accordingly, the disc defect management method and apparatus are applicable to a recordable disc such as a write-once disc while effectively using a defect management area of the disc.
US07978576B2 Adjustment method of optimum write power and optical write/retrieval device
A power adjustment method in which a modulation index is calculated from reproduced signals of patterns recorded by irradiating light onto an optical information recording medium with a recording power varied and an optimum power of irradiation light is set up using the modulation index. The power adjustment method includes calculating an optimum value PcO of a predetermined correction term Pc using a relation of a value obtained by subtracting the predetermined correction term Pc from the recording power and the modulation index, finding a value Pth of the recording power at which the modulation index becomes substantially zero in the relation of the value obtained by subtracting the optimum value PcO from the recording power and the modulation index, and setting up a value obtained by multiplying the value of Pth by a predetermined constant as a recording power of each of the recording patterns.
US07978573B1 Detecting sync patterns for optical media
A sync finder includes a pulse jitter detect module to select N-bit segments of an M-bit sync pattern at predetermined positions and to compare the N-bit segments to expected N-bit segments. A pulse verifying module generates a first signal in response to the expected N-bit segments matching the N-bit segments. N and M are integers greater than 1 and M>N.
US07978571B2 Recording device and method, computer program, and recording medium
A recording apparatus (1) is provided with: a recording device (11) for recording a data pattern onto a recording medium (100); a first controlling device (22) for stopping the recording; a reading device (11) for reading the data pattern which is recorded immediately before the recording is stopped, thereby obtaining a read signal; a measuring device (19) for measuring jitter of the read signal; an adjusting device (21) for adjusting a recording condition such that the jitter satisfies a desired condition, and a second controlling device (22) for restarting the recording of the data pattern by using the adjusted recording condition.
US07978569B2 Optical disc device and focus control method
A focus control section first performs a reference focus control process in which a reference optical beam is focused on a reference layer of an optical disc according to the result of receiving a reference reflection optical beam, and then switches from the reference focus control process to an information focus control process in which an information optical beam is focused on a mark layer of the optical disc according to the result of receiving an information reflection optical beam.
US07978565B2 Alarm clock with nap timer
An alarm clock includes a nap timer. At least one button may be used to add a predetermined time interval to a total nap time, while the clock is in its normal timekeeping mode. No further actions are necessary in order to set a nap time. An alarm will sound upon the elapsing of the set nap time.
US07978564B2 Interactive medication container
This invention relates to an interactive medication container or console that hold or otherwise organizes one or more medication vials or containers. Each vial has a memory strip containing medication and prescription information. Each vial can also include a reminder unit that is attached to and portable with the individual vials. The console or reminder unit reads the information strip of the vial and communicates this information to or interacts with a patient to remind them to take the medication. The medication container or reminder unit also gathers or tracks information such as consumption time, quantity remaining, patient feedback, and contraindication information. The medication container or reminder unit interacts with the patient by displaying questions or receiving and recording input from the patient before, during or after a dose of medication is taken. The patient input can be used to modify the dosing regimen for future doses of medication. The medication container reorders medication when the quantity remaining reaches a threshold level. Contraindication information in the memory strip is downloaded to a personal home computer or a hospital or nursing home computer.
US07978561B2 Semiconductor memory devices having vertically-stacked transistors therein
Provided is a semiconductor device having transistors of stacked structure. The semiconductor memory device having transistors includes a memory cell array block which includes a plurality of word lines and a plurality of memory cells which each includes at least one first transistor connected between the plurality of word lines, and a word line decoder which includes a plurality of drivers which drive the plurality of word lines, respectively, wherein a plurality of word lines are disposed on a first layer, and a plurality of drivers are disposed on at least two second layers.
US07978558B2 In-circuit programming of output voltage and output current characteristics of a PSR power supply
A primary-side regulation (PSR) controller integrated circuit includes a PSR CC/CV controller and a non-volatile shift register. An assembled power supply that includes the integrated circuit is in-circuit tested to determine errors in power supply output voltage and/or current. Programming information is determined and shifted into the shift register. During programming, the power supply regulates to a different output voltage, and the different voltage is used for shift register programming. After programming, the power supply operates in a normal mode so that the output voltage and current are within specification. The voltage and current to which the power supply regulates are set by some of the bits of the programming information. Other of the bits set error correction circuits of the PSR CC/CV controller such as a primary inductance variation compensation circuit, a line input voltage variation compensation circuit, an efficiency variation compensation circuit, and a cord resistance compensation circuit.
US07978557B2 Semiconductor memory device and data processing system including the semiconductor memory device
A semiconductor device that includes a plurality of memory cell arrays, a plurality of ports, a plurality of internal address generating circuits, and a controller. The plurality of internal address generating circuits may generate first and second internal addresses of first and second memory cell arrays of the plurality of memory cell arrays. The first internal address may designate a first area of the first memory cell array. The second internal address may designate a second area of the second memory cell array. The controller reads a series of data from the first area sequentially and writes the series of read data into the second area sequentially without transferring the series of read data to the plurality of ports.
US07978553B2 Apparatus for controlling I/O strobe signal in semiconductor memory apparatus
A sensing enable signal control circuit determines a driving timing of an I/O sense amplifier based on a read-out result of data, which is stored in a dummy cell of a semiconductor memory apparatus. The sensing enable signal control circuit in a semiconductor memory apparatus includes a detection code generating unit configured to output a detection code according to a voltage level of dummy cell data, which are read out from a dummy cell through at least one read operation, in response to a column select enable signal, and a multiplexer configured to receive the detection code and a default code and output a delay code to delay a sensing enable signal.
US07978551B2 Bit line equalizing control circuit of a semiconductor memory apparatus
A bit line equalizing control circuit of a semiconductor memory apparatus includes a control signal generating unit that receives a bank active signal to generate a control signal such that a bit line equalizing signal is delayed and enabled, a bit line equalizing selecting unit that generates a bit line equalizing detection signal in response to a plurality of mat select signals and the control signal, and a driver that receives the bit line equalizing detection signal to generate the bit line equalizing signal.
US07978547B2 Data I/O control signal generating circuit in a semiconductor memory apparatus
A circuit for generating a data I/O control signal used in a semiconductor memory apparatus comprises a delay block for generating a delay signal having a relatively short delay value and a delay signal having a relatively long delay values, and a selection block for selecting any one of the delay signals according to an operational mode. The selection block selects an output signal of the first delay unit in a high-speed operation mode and selects an output signal of the second delay unit in a low-speed operation mode.
US07978544B2 Methods for providing a unified view of a domain model to a user
Techniques for providing a unified view of a domain model to a user are described herein. In one embodiment, in response to a first search query received from a client via a first search mechanism (e.g., outside of the relational DB) for a list of persistent objects representing data entries of a relational database, it is determined whether the persistent objects have been accessed via a second search query via a second search mechanism based on an object identifier of the persistent object. If the requested persistent object has been accessed via a second search query, an identical instance of the persistent object is returned to the client as a result of the first search query. Other methods and apparatuses are also described.
US07978542B2 Thin film magnetic memory device writing data with bidirectional current
An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.
US07978541B2 High speed interface for multi-level memory
A solid state memory system includes a first memory chip that includes a plurality of storage elements, and a controller. Each of the plurality of storage elements have a measurable parameter that varies between a lower limit and an upper limit. The controller receives write data, converts the write data to N target values, and transmits the N target values to the first memory chip. The first memory chip adjusts corresponding measurable parameters of N storage elements of the plurality of storage elements to the N target values, where N is an integer greater than zero.
US07978540B2 Extraction of a binary code based on physical parameters of an integrated circuit via programming resistors
An integrated cell and method for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.
US07978523B2 Semiconductor device and control method of the same
The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
US07978522B2 Flash memory device including a dummy cell
A non-volatile memory device includes a selection transistor coupled to a bit line. The device also includes a plurality of memory cells serially coupled to the selection transistor and at least one dummy cell located between the plurality of memory cells. The dummy cell is turned off during a programming operation of a memory cell located between the dummy cell and the selection transistor.
US07978519B2 Method of reading an NVM cell that utilizes a gated diode
A method of reading an NVM cell structure formed on a deep well of N-type semiconductor material, wherein the NVM cell structure includes a PMOS transistor formed in an N-type well, the PMOS transistor including spaced-apart p-type source and drain region defining an n-type cannel region therebetween, an NMOS transistor formed in a P-type well that is adjacent to the N-type well, the NMOS transistor including spaced-apart n-type source and drain regions defining a p-type channel region therebetween, a conductive floating gate that includes a first section that extends over the n-type channel region of the PMOS transistor and is separated therefrom by intervening dielectric material and a second section that extends over the p-type channel region and is separated therefrom by intervening dielectric material, and a conductive control gate formed over at least a portion of the second section of the floating gate and is separated therefrom by intervening dielectric material, the method comprising: biasing the deep N-type well at a preselected read voltage; holding the source region of the PMOS transistor at the read voltage; holding the drain of the PMOS transistor at ground; and holding the control gate at ground for a preselected read time.
US07978512B2 Semiconductor memory system
A semiconductor memory system includes: a memory cell array having a plurality of memory cells arranged therein, the plurality of memory cells capable of storing N bits of information in each memory cell (where N is a natural number more than 3, other than a power of two); a control circuit configured to control read, write, and erase operations on the memory cell array; and an ECC circuit configured to correct data read from the memory cell array, based on redundant data. The memory cells that share one of word lines and can be written or read at a time are configured to store multiple pages of data therein. A total amount of data stored in the multiple pages is set to a power-of-two number of bits, and the redundant data is stored in a residual portion of the multiple pages.
US07978510B2 Stochastic synapse memory element with spike-timing dependent plasticity (STDP)
An active memory element is provided. A bipolar memory two-terminal element includes polarity-dependent switching. A probability of switching of the bi-polar memory element between a first state and a second state decays exponentially based on time delay and a difference between received signals at the two terminals and a switching threshold magnitude.
US07978508B2 Reduction of drift in phase-change memory via thermally-managed programming
A method of programming a phase-change material. The method includes providing a transformation pulse to the phase-change material, where the transformation pulse includes a programming waveform and a conditioning waveform. The programming waveform provides sufficient energy to alter the structural state of the phase-change material. In one embodiment, the programming waveform alters the volume fractions of crystalline and amorphous phase regions within the phase-change material. The conditioning waveform provides sufficient energy to heat the phase-change material to a temperature above the ambient temperature but below the crystallization temperature of the phase-change material. The method programs the phase-change material to a state that exhibits a reduced time variation of resistance.
US07978501B2 Method for contemporaneous margin verification and memory access for memory cells in cross-point memory arrays
Circuitry and methods for restoring data values in non-volatile memory are disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory cells. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory cells substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory cells may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state).
US07978500B2 Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance
The invention relates to a method and apparatus providing a memory cell array in which each resistance memory cell is connected in series to a capacitive element. Access transistors are not necessary to perform read and write operations on the memory cell. In one exemplary embodiment, the capacitive element is a capacitor.
US07978498B2 Programming non-volatile storage element using current from other element
A non-volatile storage apparatus includes Y lines, a common X line, multiple storage elements, a dummy element and control circuitry in communication with the common X line and the Y lines. Each element is connected to the common X line and the dummy element is also connected to a particular Y line. The control circuitry provides control signals to the common X line and the Y lines to change a first storage element from a first to a second state by passing a current into the first storage element from the particular Y line through the dummy element. The control circuitry controls the common X line and Y lines to sequentially change additional storage elements from the first to the second state by passing currents into the additional storage elements previously changed to the second state and their associated different Y lines.
US07978496B2 Method of programming a nonvolatile memory device containing a carbon storage material
A nonvolatile memory cell includes a steering element located in series with a storage element, where the storage element comprises a carbon material. A method of programming the cell includes applying a reset pulse to change a resistivity state of the carbon material from a first state to a second state which is higher than the first state, and applying a set pulse to change a resistivity state of the carbon material from the second state to a third state which is lower than the second state. A fall time of the reset pulse is shorter than a fall time of the set pulse.
US07978495B2 Nonvolatile semiconductor storage device and method for operating same
A nonvolatile semiconductor memory device for suppressing a current consumption caused by a transient current because of the potential change of the bit and word lines at the time of shifting between the programming, reading, and erasing actions in a highly integrated memory cell array is provided. A memory cell (1) array comprises two-terminal memory cells each having a variable resistance element whose resistance value reversibly changes by pulse application are arranged in a row and column directions, wherein the memory cells in a row are connected at one end to common word lines (WL1 to WLn), the memory cells in a column are connected at the other end to common bit lines (BL1 to BLm), and a common unselected voltage VWE/2 is applied to both unselected word and bit lines not connected to the selected memory cell during the reading, programming, and erasing actions for the selected memory cell.
US07978494B2 Radio frequency identification device initializing a memory using an offset voltage
An RFID device sets initial data stored in a memory using an offset voltage and includes an analog block, a digital block, and a memory block. The memory blocks is configured to read/write data in a cell array unit. The memory block includes an offset controller that is configured to set an offset voltage value of a bit line connected to the cell array unit.
US07978491B2 Stacked memory cell structure and method of forming such a structure
This invention relates to memory technology and new variations on memory array architecture to incorporate certain advantages from both cross-point and 1T-1Cell architectures. The fast read-time and higher signal-to-noise ratio of the 1T-1Cell architecture and the higher packing density of the cross-point architecture are both exploited by combining certain characteristics of these layouts. A single access transistor 16 is used to read multiple memory cells, which can be stacked vertically above one another in a plurality of memory array layers arranged in a “Z” axis direction.
US07978486B2 Rectifier circuit and radio communication device using the same
A rectifier circuit includes an input terminal that receives an alternating-current signal, a first rectifier circuit that generates a first direct-current voltage from the alternating-current signal, a bias-voltage generating circuit that generates a bias voltage from the first direct-current voltage, and a second rectifier circuit that generates a second direct-current voltage from the alternating-current signal biased with the bias voltage.
US07978485B2 Thyristor power control circuit with damping circuit maintaining thyristor holding current
A thyristor power control circuit reduces EMI and maintains a holding current in the thyristor to prevent flickering at a load. The power control circuit includes a thyristor configured to receive an input AC voltage, and responsive to a gate pulse generates a modified AC voltage. A rectifier receives the modified AC voltage and generates a rectified DC voltage. A power converter coupled to the rectifier receives the rectified DC voltage and generates a controlled output current. A damping circuit coupled to an output terminal of the rectifier includes a damping resistor for maintaining the holding current in the thyristor during an ON period of the thyristor. The damping circuit includes a first capacitor coupled in series to the damping resistor and a diode coupled in parallel to the damping resistor. The diode enables the first capacitor to discharge without causing power loss at the damping resistor.
US07978483B2 Power conversion components, systems and methods
Components, systems and methods for generating variable frequency AC voltage from a DC power supply are described. The components include a full-bridge (FB) parallel load resonant (PLR) converter which operates in discontinuous conduction mode. The PLR converter includes MOSFETs in an H-bridge configuration and employs a topology which minimizes inductance. The PLR converter can be coupled to a single or poly-phase bridge for use as an inverter. The inverter can be used to produce an AC sinusoidal waveform from a low voltage, high current DC power supply. Systems and techniques for modulating the output from the PLR converter to produce an AC sinusoidal waveform having desired characteristics, including frequency and voltage, are also provided. The PLR converter can also be coupled to a rectifier for use as a DC-DC converter.
US07978480B2 Patch panel with modules
A patch panel includes a back plane having front mounted pairs of termination locations, and an interconnect location electrically connected to each pair of termination locations. The termination locations connect to two patch cords. The interconnect location defines an access device for selectively accessing the termination locations. An interconnect module interfaces with the interconnect location. The module can include test access, power over Ethernet, or circuit protection features.
US07978472B2 Liquid-cooled cooling apparatus, electronics rack and methods of fabrication thereof
Liquid-cooled electronics racks and methods of fabrication are provided wherein a liquid-based cooling apparatus facilitates cooling of electronic subsystems when docked within the electronics rack. The cooling apparatus includes a liquid-cooled cooling structure mounted to a front of the rack, and a plurality of heat transfer elements. The cooling structure is a thermally conductive material which has a coolant-carrying channel for facilitating coolant flow through the structure. Each heat transfer element couples to one or more heat-generating components of a respective electronic subsystem, physically contacts the cooling structure when that electronic subsystem is docked within the rack, and provides a thermal transport path from the heat-generating components of the electronic subsystem to the liquid-cooled cooling structure. Advantageously, electronic subsystems may be docked within or undocked from the electronics rack without affecting flow of coolant through the liquid-cooled cooling structure.
US07978469B2 Computer apparatus and method having dual air chambers
A computer system including an enclosure having a plurality of components; a first chamber including a first set of components; and a second chamber including a second set of components, the second chamber located adjacent to the first chamber and the first set of components being different than the second set of components; wherein air flow is prevented from flowing between the first chamber and the second chamber; and wherein the first chamber includes a first set of cooling devices and the second chamber includes a second set of cooling devices.
US07978465B2 Function expanding method for small-sized display device
The function expanding method for a display device comprises: a step of preparing a plurality of types of function expanding modules; a step of selecting a function expanding module or modules from the plurality of types of function expanding modules; and a step of stacking the selected single or plurality of function expanding module(s) to a rear part of the display device at will, and connecting the module(s) by using expanding connector(s).
US07978463B1 Transportable weatherproof battery power supply and storage for electronic equipment
One or more embodiments of transportable weatherproof battery power supply and storage for electronic equipment are provided. The transportable weatherproof enclosure can include a base, an enclosure removably engaged to a base plate; a first door pivotably connected to the first wall, a second door pivotably connected to the second wall, and a first battery pack disposed within the enclosure.
US07978458B2 Locking device and withdrawable rack provided with said locking device
A locking device for an electric switch is disclosed which is movably guided in a withdrawable rack via an actuating shaft wherein the electric switch is placed in a preferred position, in particular in a disconnected position. In at least one embodiment, the locking device is movable from a release position in which the switch is displaceable in the withdrawable rack to a locking position in which the locking device blocks the switch displacement in a predetermined direction and the actuating shaft is actuated via an actuating crank. In order to safe the switch locking in the preferred position thereof, the locking device is movable to the locking position when the actuating crank actuation is blocked, only. The withdrawable rack, provided with the inventive locking device for the electric switch displaceable in the withdrawable rack via the actuating shaft, is also disclosed.
US07978456B2 Scalable integrated circuit high density capacitors
The present invention provides several scalable integrated circuit high density capacitors and their layout techniques. The capacitors are scaled, for example, by varying the number of metal layers and/or the area of the metal layers used to from the capacitors. The capacitors use different metallization patterns to form the metal layers, and different via patterns to couple adjacent metal layers. In embodiments, optional shields are included as the top-most and/or bottom-most layers of the capacitors, and/or as side shields, to reduce unwanted parasitic capacitance.
US07978455B2 Adaptive transient blocking unit
A variable trip limit transient blocking unit (TBU) is provided. The variable trip limit transient blocking unit circuit includes a transient blocking unit and a low-pass filter, such as an RC circuit having an RC time constant. The RC circuit is disposed to approximate an integrator operating over periods of time that are short compared to the RC time constant. The RC circuit integrates a signal representing an approximated current flowing through the transient blocking unit and triggers a disconnect threshold in the transient blocking unit when a voltage stored across a capacitor of the RC circuit reaches a predefined limit.
US07978452B2 Automotive overcurrent protection
Overcurrent is prevented in an automotive vehicle based on sensing at least one operating condition. An overcurrent threshold is determined based on characteristics of the load and on the sensed condition. If the sensed flow of current exceeds the determined overcurrent threshold, the flow of current to the load is interrupted. The sensed condition may be, for example, ambient temperature.
US07978449B2 Integrated electrostatic discharge (ESD) protection circuitry for signal electrode
An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage. These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.
US07978448B2 Hybrid circuit for circuit protection and switching
A hybrid circuit (42) for use with communications transceivers. The hybrid circuit (42) combines the function of an ESD protection circuit (12) with the function of a TX/RX switch (10). The input node of the hybrid circuit (42) is connecting between the source of an ESD event (60) and a device to be protected (44). The hybrid circuit (42) includes an ESD protection element (50), which is triggered by a triggering transistor (52). The gate of the triggering transistor (52) is connected to a driver (54) for turning the triggering transistor (52) on during transmission and for turning the triggering transistor (52) off during reception.
US07978446B2 High voltage ground fault detection system
A ground fault detection system for an electrical system is disclosed. The electrical system may have a first and a second electrical component and a controller, and the second electrical component may be coupled to the controller. The ground fault detection system may include a ground fault detection module integrated in the first electrical component. The first electrical component may be isolated from the second electrical component. The ground fault detection system may further include a data link configured to establish a data communication between a controller and the ground fault detection module. The ground fault detection module may be configured to activate a mode of operation for the first electrical component if a ground fault associated with the first electrical component is identified.
US07978443B2 Tunnel magnetoresistive effect element having a tunnel barrier layer of a crystalline insulation material and manufacturing method of tunnel magnetoresistive effect element
A TMR element includes a lower magnetic layer, an upper magnetic layer, and a tunnel barrier layer of crystalline insulation material sandwiched between the lower magnetic layer and the upper magnetic layer. The lower magnetic layer includes a first magnetic layer and a second magnetic layer sandwiched between the first magnetic layer and the tunnel barrier layer. The second magnetic layer is formed from a magnetic material containing at least one of Fe, Co and Ni.
US07978436B2 Air bearing surface with higher flying height for lower rotating speed drives
A method and apparatus for improving flying height stability in a small form factor hard disk drive that typically moves at lower speeds is achieved by a slider having an ABS with an air channel and pocket. The air channel and pocket are configured to increase the amount of aerodynamic lift provided by normally smaller amounts of intake air at the inner diameter of the rotating disk and, thereby, to achieve a desired flying height profile.
US07978430B2 Apparatus for providing a reverse air bearing surface head with trailing shield design for perpendicular recording
A method and apparatus for providing a reverse air bearing surface head with trailing shield design for perpendicular recording. A reverse air bearing surface head for perpendicular recording is provided with an inversed bevel shape to handle skew when recording data on a magnetic recording medium.
US07978427B2 Device for embedding information into data
An object of the present invention is to embed information while making effective use of a recording area at the time of recording data. To this end, a controller in a tape drive includes: a storage unit which stores information desired to be embedded; an acquisition unit which acquires the information stored in the storage unit; a writing unit which repeatedly writes a CQ set determined on the basis of the acquired information the number of times determined on the basis of this information; a reading unit which reads data in which information is embedded; and an identification unit which identifies information embedded in the read data, and which determines whether or not the read data can be used and the like, in comparison with this information and the information stored in the storage unit.
US07978424B2 Lens barrel
A lens barrel includes front and rear holding members holding front and rear optical elements; an advancing/retracting member; a first guide portion guiding the front holding member relative to the advancing/retracting member; a first biasing member biasing the front holding member rearwards; a second guide portion guiding the rear holding member independently of the advancing/retracting member; a second biasing member biasing the rear holding member forwards; and first contact portions provided between the front and rear holding members, a rearward movement of the front holding member causing the first contact portions to contact and transmit a rearward moving force to the rear holding member when the lens barrel moves to the lens barrel accommodated state. The first and second guide portions, force-applied portions provided between the first/second biasing members and the front/rear holding members, and the first contact portions being all positioned within one of four equiangular ranges.
US07978417B2 Eyepiece optical system and electronic view finder incorporating the same
The invention relates to an eyepiece optical system that, albeit being of small size, works in favor of gaining an angle of field and optical performance, and an electronic view finder incorporating such an eyepiece optical system. Specifically, the invention is characterized by comprising, in order from an object side to an exit side thereof, a first lens group that is a single lens that has positive refracting power and is in a meniscus configuration concave on its object side, a second lens group that is a single lens that has negative refracting power and is in a meniscus configuration concave on its object side, and a third lens group that is a single lens that has positive refracting power, wherein an object-side concave lens surface in the first lens group is an aspheric surface, an object-side concave lens surface in the second lens group is an aspheric surface, and an exit-side lens surface in the third lens group is an aspheric surface.Alternatively, the eyepiece optical system is characterized by comprising a first lens group having a curved refractive surface, and a rear lens group having positive refracting power, wherein while the first lens group remains fixed, the rear lens group moves along an optical axis with satisfaction of given conditions, thereby implementing diopter adjustment.
US07978413B2 Micro-lens array substrate and method for manufacturing thereof
A micro-lens substrate having a precise micro-lens array suitable for higher resolution, the micro-lens array substrate of high quality without having a distortion, and a method for manufacturing thereof are provided.In the micro-lens array substrate of the present invention, a micro-lens array formed of a plurality of consecutive concave lens-shaped micro-lenses is directly formed in a surface of a quartz substrate or glass substrate, and the micro-lens array is formed by a transfer method based on dry-etching. In the micro-lens array substrate of the present invention, a taper portion is formed toward the surface of the substrate in a peripheral portion of the micro-lens array in the quartz substrate or glass substrate.In a method for manufacturing the micro-lens array substrate of the present invention, a resist layer having a plurality of consecutive lens-shaped concave portions is formed in a surface of a quartz or glass substrate, the lens-shaped concave portion of the resist layer is transferred to the substrate by dry-etching, and a micro-lens array is formed by injecting a resin into the lens-shaped concave portion of this substrate. In addition, a taper portion is formed in a peripheral portion similarly to the formation of the lens-shaped concave portion, and a micro-lens array is formed by injecting a resin into the lens-shaped concave portion and taper portion.
US07978410B2 Optical sheet
An optical sheet includes a transparent base, a plurality of first micro structures, and a plurality of second micro structures. The transparent base has a light-receiving surface and a light-exit surface. The first micro structures are disposed on the light-exit surface, and the second micro structures are disposed on the light-receiving surface. Each first micro structure includes a first planar surface and a curve surface. Each second micro structure includes a second planar surface formed on the light-receiving surface and a total reflection surface connected with the second planar surface. Each first micro structure forms a first orthogonal projection area on the light-receiving surface, each second micro structure forms a second orthogonal projection area on the light-receiving surface, the second planar surface is located within the first orthogonal projection area, and the entire area of the second planar surface is equal to the second orthogonal projection area.
US07978409B2 Hard coat layer-forming composition and optical lens
The hard coat layer-forming composition of this invention includes (A) composite oxide fine particles with a mean particle diameter of 1 to 200 nm, containing titanium, tin and optionally silicon, and with a rutile-type crystal structure, (B) an organosilicon compound represented by the formula R1aR2bSi(OR3)4−(a+b) and/or a hydrolyzate thereof, and (C) a cyanamide derivative compound. A hard coat layer formed from the composition not only is excellent in transparency, scratch resistance, adhesion property, weathering resistance, impact resistance, etc. but also can enjoy no coloration or little coloration, particularly in bluing or yellowing, upon exposure to or irradiation with ultraviolet rays, even if an antireflection film is provided.
US07978407B1 Holovision (TM) 3D imaging with rotating light-emitting members
This invention is a novel device that displays three-dimensional moving images featuring binocular disparity and motion parallax that can be seen simultaneously by multiple viewers in different positions without requiring headgear. This device comprises: longitudinal light-guiding members that rotate around their longitudinal axes; and light-emitting members inside, or attached to, each longitudinal light-guiding member. Changes in the content of light rays from the light-emitting members are coordinated with changes in the directions of these light rays so that viewers in different positions can see appropriate three-dimensional images. Advantageous features include: no headgear required, allows multiple viewers, high image resolution, avoids pseudoscopic images, offers wide viewing range, scalable to large size displays, multi-directional motion parallax, high light efficiency, avoids head tracking, avoids reciprocal motion, avoids fluid lag, avoids ghost-like images, and avoids use of coherent light.
US07978404B2 Surgical microscope having an OCT-system
A surgical microscope (100) has a viewing beam path for main viewing and a secondary beam path (106) for viewing by another person. The surgical microscope (100) has a microscope main objective (101) through which the viewing beam path for main viewing and the viewing beam path (106) for secondary viewing pass. The surgical microscope (100) includes an OCT-system (120) for examining an object region. The OCT-system (120) includes an OCT-scanning beam (123) which is guided through the microscope main objective (101). In the viewing beam path (106) for secondary viewing, an in-coupling element (150) is provided to couple the OCT-scanning beam (123) into the viewing beam path (106) for secondary viewing and to guide the same through the microscope main objective (101) to the object region (108).
US07978403B2 Imaging interferometric microscopy
Exemplary embodiments provide an image interferometric microscope (IIM) and methods for image interferometric microscopy. The disclosed IIM can approach the linear systems limits of optical resolution by using a plurality of off-axis illuminations to access high spatial frequencies along with interferometric reintroduction of a zero-order reference beam on the low-NA side of the optical system. In some embodiments, a thin object can be placed normal to the optical axis and the frequency space limit can be extended to about [(1+NA)n/λ], where NA is the numerical-aperture of the objective lens used, n is the refraction index of the transmission medium and λ is an optical wavelength. In other embodiments, tilting the object plane can further allow collection of diffraction information up to the material transmission bandpass limited spatial frequency of about 2n/λ.
US07978398B2 Shell-type electrophoretic particle, display device including the particle, and method thereof
An electrophoretic particle includes ionic liquid stored in a spherical polymer shell and a charged layer formed on an inner surface of the shell, and a display device includes the electrophoretic particle. The shell is not charged, and the charged layer in the shell is charged. Therefore, particles having different polarities from each other do not stick to each other. Since the electrophoretic particles are dispersed in air, a high response speed can be achieved, a large amount of charges can be formed by the ionic liquid and the charged layer contacting the ionic liquid, and thus, the particles can move with a low driving voltage.
US07978397B2 Information display panel and method for manufacturing the same
In an information display panel, in which display media are sealed between a transparent front substrate and a rear substrate, and, in which the display media, to which an electrostatic field is applied from electrodes arranged respectively to the front substrate and the rear substrate, are made to move so as to display information such as an image, the rear substrate is constituted by a flexible material, and a metal electrode is formed on the rear substrate by a patterning process using a vapor deposition and a sputtering or a metal electrode is formed on the rear substrate by effecting a patterning process to a metal film formed by a vapor deposition or a sputtering. In this manner, it is possible to obtain an information display panel, which can improve a flexibility of the rear substrate with the electrode by an inexpensive cost, achieve an easy handling of the substrate and decrease a panel breakage due to a detachment of two substrates.
US07978392B2 Bi-stable display device
A bi-stable display device including a first substrate, a thin film transistor (TFT) array layer and a bi-stable display panel is provided. The TFT array layer is formed on the first substrate and the bi-stable display panel is disposed on the TFT array layer. The first substrate includes at least two patterns with two predetermined ranges for respectively limiting the shift along a first axis and a second axis, and the first axis is perpendicular to the second axis.
US07978388B2 Mirror device and mirror device manufacturing method incorporating a collision preventive structure
When a mirror (230) rotates with a maximum angle, a distance from the rotation center of the mirror (230) to the edge of the mirror (230) along a direction horizontal to an electrode substrate (300) is larger than a distance from a perpendicular, perpendicular to the horizontal direction and extending through the rotation center, to the distal end of an electrode (340a-340d) along the horizontal direction. Even when the mirror (230) rotates to come into contact with the electrode substrate (300), since the electrode (340a-340d) does not exist at a position with which the mirror (230) comes into contact when rotating, the mirror (230) and the electrode (340a-340d) can be prevented from being electrodeposited.
US07978382B2 Computer readable medium recording a calibration program, calibration method, and calibration system for detecting patch positions during acquisition of calorimetric values from a patch sheet
A computer readable medium records a calibration program, which causes a control device to execute calibration processing of reading as image data a patch sheet output from an image formation device, having a plurality of patch patterns formed as images based on different density-gradation value data for each color, acquiring calorimetric values for each of the patch patterns from the read-out image data, and adjusting the density of the image formation device based on the density-gradation values and the acquired calorimetric values for each of the patch patterns. The program causes the control device to execute displaying the read-out image data of the patch sheet, detecting and displaying the position of each of the patch patterns in the image data of the patch sheet, and acquiring the calorimetric values for each the patch pattern based on the displayed patch pattern positions, in response to confirmation input by a user of the displayed patch pattern position.
US07978381B2 Automatic document feeder with mechanism to discriminate document types
An automatic document feeder includes an input tray, a transfer path, a roller assembly, an ejecting tray, a light emitter, a light receiver, a comparator and a discriminating unit. The light emitter successively emits multiple light beams of different intensities to the document. When the multiple light beams penetrating through the document are received by the light receiver, the light receiver outputs corresponding voltage signals. The discriminating unit is electrically connected to the light receiver for discriminating document types according to the voltage levels of the voltage signals.
US07978380B2 Image reader and method of producing thereof
An image reader has an image sensor; a carriage; a positioning portion formed at a predetermined position in a longitudinal direction of the image sensor with respect to a reference position of the image sensor; a connector portion to which an electric cable is connected and which is provided between an end of the carriage and one end in the longitudinal direction of a case of the image sensor; and an engaging portion formed in the carriage. In the image recording apparatus, since the positioning portion is engaged with the engaging portion, it is possible to use a common carriage for a plurality of types of image sensors, and an operation of connecting the electric cable becomes simple.
US07978378B2 Apparatus and method for scanning an object
A method for scanning an object is provided. The method involves placing the object on a scanning platform. The scanner has a plurality of cameras positioned around the object to be scanned. The scanned object can be a foot, among other things, and the scanner is positioned at a predetermined incline so that the foot is evenly supported. A positioning system including at least one sensor is used to determine if the foot is located within a predetermined scanning area. The method can be used to measure foot dimensions for the production of shoe lasts and construction of shoes. The method can be used in a system for selecting shoes that properly fit.
US07978368B2 System and method for visualization of black-component gamut sculpting
The subject application is directed to a system and method for visualization of black-component gamut sculpting. Parameter data is first received corresponding to parameters associated with the black replacement for a primary color system. Alternative color profiles are then generated according to the parameter data and characteristics of the primary color system. Image data is then received of an image defined in the primary color system. Renderings are then generated corresponding to the received image data, with each rendering uniquely corresponding to one of the alternative color profiles. Selection data is then received corresponding to a selected black replacement parameter selected in accordance with the generation of the renderings.
US07978366B2 Method for compensating for color variations among multiple printers
A method for compensating for color variations among multiple user printers by providing a target simulation process in each user printer that modifies its default color characteristics so that it has the same color characteristics as a designated target printer. In a WCS implementation, a target CDMP and a user CDMP representing color characteristics of the target printer and the user printer, respectively, are stored and used by the WCS workflow to perform color conversion when printing an image on the user printer. In an ICC implementation, a color simulation profile is generated that matches the color characteristics of the user printer to those of the target printer. The color simulation profile is combined with the default color profile of the printer to generate a combined color profile which is used to perform color conversion when printing an image on the user printer.
US07978361B2 Automatic and transparent document archiving
An automatic archiving system that makes document archiving largely transparent to the user. In one embodiment, documents scanned in or printed during the course of office equipment operation are automatically archived. For example, an office local area network (LAN) may interconnect a copier, a printer, a fax machine, and a document management workstation. Whenever, a document is copied, printed, or faxed, a document image is archived by the document management workstation without further user intervention. A single user command results in the document being copied and archived, printed and archived, Of faxed and archived.
US07978358B2 Double-sided image forming device
The present invention provides an image forming device that forms visible images by scanning in a first scan direction and a slow scan direction that is perpendicular to the first scan direction, image data that are arranged in the first scan direction and the slow scan direction. The image data include actual latent image lines formed from actual data, and artificial latent image lines formed using the actual data. The image forming device has a data storage unit that stores the image data so that the total number of scan lines in the image data from one end to the other end in the slow scan direction is an odd number.
US07978355B2 Job scheduling system for print processing
A job scheduling device that sequentially stores jobs, for which processing requests were received from terminals, in a queue and sequentially processes the jobs held in the queue using a job execution section having a plurality of queues provided corresponding to a status of a sequential job process, a scheduling unit that schedules the jobs using the plurality of queues, wherein each job has associated job information which includes job status information, and a recovery unit that recovers the status of each of the jobs being held in the plurality of queues.
US07978354B2 Restriction information generation apparatus and method, printing system with functional restriction, and printing authentication method
A restriction information generation apparatus configured to generate access restriction information to be transmitted from a client terminal to a printing apparatus to determine whether to permit/inhibit execution of a print job based on the access restriction information containing functional restriction information of the printing apparatus, comprises an acquisition unit, adapted to acquire, from a restriction information management server, functional restriction information directly assigned to a user specified by user information received from a requesting client terminal, and indirectly assigned functional restriction information; a merge unit, adapted to merge the pieces of functional restriction information acquired by the acquisition unit to generate access restriction information; and a transmission unit, adapted to transmit the access restriction information generated by the merge unit to the client terminal.
US07978353B2 Document input and output device having security protection function and document input and output method of the device
A document input and output device with a security protection function, the document input and output device being connected to a network and using a plurality of communication protocols, the document input and output device communicating documents in various data forms with plural information devices, includes a protection part configured to provide security protection for the document that is input; a confirmation part configured to encourage reconfirmation of information that is input by a user; and a restriction part configured to limit use of functions of the document input and output device. The document is protected and a document input and output process is performed.
US07978350B2 Copyright compliance
A method for use in reproducing pages from at least one document. The method includes, in a document processing device, determining an identity of the at least one document, and scanning at least some of the pages of the at least one document. The document processing device then displays a representation of a number of the scanned pages to allow selection of at least some of the scanned pages for reproduction and controls the selection of pages for reproduction at least in part using a rule indicative of copyright that is determined based on the identity.
US07978348B2 Imaging device
An imaging device capable printing images in a plurality of print modes includes an image storage, a print mode data storage that stores a plurality of pieces of print mode data corresponding to the plurality of print modes, a consumable substance quantity calculating system that calculates quantity of consumable substances necessary for printing images in accordance with image data stored in the image storage, a print cost calculating system that calculates, for each of the plurality of print modes, a print cost based on the quantity of the consumable substances calculated by the consumable substance quantity calculating system. The print costs corresponding to the plurality of print modes are displayed in association with the plurality of print modes, and a printing system executes a printing operation in a designated print mode in accordance with the image data stored in the image storage.
US07978346B1 Methods and systems for realizing high resolution three-dimensional optical imaging
Methods and systems for realizing high resolution three-dimensional (3-D) optical imaging using diffraction limited low resolution optical signals. Using axial shift-based signal processing via computer based computation algorithm, three sets of high resolution optical data are determined along the axial (or light beam propagation) direction using low resolution axial data. The three sets of low resolution data are generated by illuminating the 3-D object under observation along its three independent and orthogonal look directions (i.e., x, y, and z) or by physically rotating the object by 90 degrees and also flipping the object by 90 degrees. The three sets of high resolution axial data is combined using a unique mathematical function to interpolate a 3-D image of the test object that is of much higher resolution than the diffraction limited direct measurement 3-D resolution. Confocal microscopy or optical coherence tomography (OCT) are example methods to obtain the axial scan data sets.
US07978342B2 Method and apparatus for measuring expansion of materials
Methods for measuring expansion of a test sample. One method includes establishing a diffraction slit between two blades, with the position of at least one of the blades being dependent upon the length of a test sample of material. As the temperature of the sample changes, the width of the slit changes. Light is projected through the slit onto a target and an diffraction pattern is measured. Changes in the light diffraction pattern correspond to the thermal expansion of the sample. Another method includes establishing a diffraction slit between two blades, with the position of at least one of the blades being dependent upon a length along a test sample of material. As a load is applied to the test sample, the width of the slit changes. Changes in the light diffraction pattern correspond to Young's Modulus for the sample.
US07978340B2 System and method for determining positions of structures on a substrate
A system and a method for determining positions of structures on a substrate are disclosed. The system includes at least one measurement table (20) movable in the X-coordinate direction and in the Y-coordinate direction, a measurement objective (9) and a camera for determining the positions of the structures (3) on the substrate (2). The position of the measurement objective (9) and/or the measurement table (20) may be determined by at least one interferometer (24). The system is surrounded by a housing representing a climatic chamber (50) provided with an active pressure regulation.
US07978338B2 Compound reference interferometer
Interferometry system are disclosed that include a detector sub-system including a monitor detector, interferometer optics for combining test light from a test object with primary reference light from a first reference interface and secondary reference light from a second reference interface to form a monitor interference pattern on a monitor detector, wherein the first and second reference interfaces are mechanically fixed with respect to each other and the test light, a scanning stage configured to scan an optical path difference (OPD) between the test light and the primary and secondary reference light to the monitor detector while the detector sub-system records the monitor interference pattern for each of a series of OPD increments, and an electronic processor electronically coupled to the detector sub-system and the scanning stage, the electronic processor being configured to determine information about the OPD increments based on the detected monitor interference pattern.
US07978335B2 System for producing tomographic image by optical tomography
In optical tomography measurement using light, the wavelength of which is periodically swept, interference light between reflection light and reference light is split into first interference light and second interference light by a light splitting means. The optical path length of the first interference light and that of the second interference light are adjusted by an interference-light optical path length adjustment means so that they become the same. Further, balanced detection is performed on the first interference light and the second interference light by an interference light detection means.
US07978333B2 Holographic sensor having heterogeneous properties
A sensor which comprises a support medium and a hologram disposed therein, wherein an optical characteristic of the medium varies as a result of a change of a property of the medium, and wherein the medium is heterogeneous such that the change of property is heterogeneous.
US07978328B2 Vision inspection system device and method
A course material that is applied to a substrate during fabrication of a composite item is inspected by a system that includes a vision assembly. The vision assembly includes an area light, a line generator, a sensor, and an image processor. The area light illuminates an area of the course material. The line generator generates a line of illumination across the area. The sensor captures an image of the area. The image processor analyzes the image. The image processor is configured to identify debris on the course material in response to the area light being activated and the image processor is configured to identify placement aberrations in response to the line generator being activated.
US07978323B2 Surface inspection system with improved capabilities
Pixel intensities indicative of scattered radiation from portions of the inspected surface surrounding a location of a potential anomaly are also stored so that such data is available for quick review of the pixel intensities within a patch on the surface containing the location of the potential anomaly. Where rotational motion is caused between the illumination beam and the inspected surface, signal-to-noise ratio may be improved by comparing the pixel intensities of pixels at corresponding positions on two different surfaces that are inspected, where corresponding pixels at the same relative locations on the two different surfaces are illuminated and scattered radiation therefrom collected and detected under the same optical conditions.
US07978322B2 Calibrating aircraft surfaces
Systems and methods to calibrate aircraft surfaces are provided. A particular method includes installing a set of laser targets. The set of laser targets includes at least first laser target and a second laser target. The first laser target is installed on a first side of a first aircraft surface and the second laser target is installed on a second side of the first aircraft surface at a known location relative to the first laser target. The method also includes determining a first position of the first laser target with a first laser device. The method further includes determining a second position of the second laser target with a second laser device. The method includes determining a position of the first aircraft surface based on the first position of the first laser target and the second position of the second laser target.
US07978321B2 Angle measurements
Methods and devices for angle determination, and retroreflecting foils are presented. A retroreflecting foil (1) is arranged at a surface, an angle of which is going to be determined. The retroreflecting foil has a lens surface with a plurality of spherical microlenses (4) and a reflecting surface with a plurality of spherical mirrors (5) of a second main radius of curvature. The lens surface of the retroreflecting foil is illuminated, and transitions between darkness and light in radiation reflected from the retroreflecting foil, either upon changing a relative angle between the retroreflecting foil and the illuminating light or spatial transitions over the surface of the retroreflecting foil, are observed. An angle measure associated with the transitions is determined. The spherical mirrors present preferably at least one inner point (22) of a spherical mirror surface at which reflection according to the second main radius of curvature is prohibited.
US07978320B2 Light angle detection device, method for fabrication thereof and electronic device employing same
A light angle detection device according to an embodiment of the present invention includes a first light receiving lens, a first light sensing element, a second light receiving lens, and a second light sensing element. The first and second light receiving lenses and the first and second light sensing elements are disposed such that a first straight line passing through the center of the light receiving surface of the first light sensing element and the vertex of the first light receiving lens, a second straight line passing through the center of the light receiving surface of the second light sensing element and the vertex of the second light receiving lens, and a third straight line passing through the center of the light receiving surface of the first light sensing element and the center of the light receiving surface of the second light sensing element form an isosceles triangle.
US07978316B2 Multi-phase interferometer
An optical perturbation sensing system includes a probing beam incident on a medium with perturbations and a sensing beam redirected from the medium and incident on a surface area of a photodetector. A reference beam directed onto the photodetector surface forms, with the sensing beam, an interference pattern on the photodetector surface and a phase patterner with at least two phase regions across its section, generates different phases in different regions of the interference pattern. An array of photodetector elements detects each phase region of the interference pattern and a constructive combiner subtract pairs of the detected signals, squares the subtracted signal squares, and sums the squared signals to form a stronger detected signal with reduced intensity noise, reduced background noise, and reduced sensitivity to phase drifts.
US07978313B2 Systems and methods for targeting directed energy devices
Systems and methods for targeting a directed energy system are provided. A particular system includes a first laser and a second laser. The system also includes a scanning system coupled to the first laser and the second laser. The scanning system is adapted to movably direct the second laser in a pattern around a pointing location of the first laser.
US07978308B2 Lithographic apparatus and device manufacturing method
A lithographic apparatus arranged to transfer a pattern from a patterning device onto a substrate is disclosed, the apparatus including a substrate table constructed to hold a substrate, a first clamping system configured to clamp the substrate table to a substrate table support structure, and a second clamping system configured to clamp a substrate to the substrate table after the substrate table has been clamped to the substrate table support structure.
US07978302B2 Fabrication of dichroic guest-host polarizer
A method for the manufacture of a polarizer is provided. The method comprises providing a liquid crystal composition comprising a liquid crystal host and a viscosity enhancer; providing a thin film of said composition on a substrate; orienting said liquid crystal host to obtain an aligned film in a first liquid crystal mesophase, wherein the liquid crystal host is aligned planar to said substrate; gelating said viscosity enhancer to congeal said film; and obtaining a second liquid crystal state in said congealed film. By the use of a viscosity enhancer in the composition, homeotropic alignment of the liquid crystal host can be suppressed.
US07978300B2 Liquid crystal display device and method of manufacturing the same
In the liquid crystal display device and the method of manufacturing the same, the pixel electrodes 32 and the projection pattern 35 are formed on the TFT substrate 30 side, and surfaces of the pixel electrodes 32 and the projection pattern 35 are covered with the vertical alignment film 36. Also, the opposing electrode 44 and the projection pattern 45 are formed on the CF substrate 40 side, and surfaces of the opposing electrode 44 and the projection pattern 45 are covered with the vertical alignment film 46. Then, the TFT substrate 30 and the CF substrate 40 are arranged such that top end portions of the projection pattern 45 on the CF substrate 40 are brought into contact with the TFT substrate 30. Then, the liquid crystal 49 having the negative dielectric anisotropy is sealed between them. Accordingly, the step of scattering the spacers can be omitted, change in the cell thickness can be prevented, and the good display quality can be achieved.
US07978298B2 Liquid crystal display device
In a liquid crystal display device which presents display by forming liquid crystal domains that take radially-inclined orientation, persisting display unevenness is prevented from occurring when the panel surface is pressed, thus realizing high-quality displaying.A liquid crystal display device according to the present invention includes a first substrate, a second substrate provided so as to oppose the first substrate, and a vertical-alignment type liquid crystal layer provided therebetween. The liquid crystal display device according to the present invention further includes wall-like structures regularly arranged on the liquid crystal layer side of the first substrate, such that, when a predetermined voltage is applied, the liquid crystal layer forms at least one liquid crystal domain that takes a radially-inclined orientation state in a region substantially surrounded by the wall-like structures. The second substrate includes a protrusion projecting toward the liquid crystal layer in a region corresponding to the liquid crystal domain, and the liquid crystal layer contains a chiral agent. The thickness dLC of the liquid crystal layer, the natural chiral pitch p of the liquid crystal layer, and the distance dRW from the center of the protrusion to the wall-like structure satisfy the relationships dRW>p and dLC/p≧0.15.
US07978296B2 Liquid crystal display and thin film transistor substrate therefor
The invention is directed to an improved flat panel liquid crystal display (LCD). In one embodiment the improved LCD includes a liquid crystal layer that completely fills a gap formed between a color filter array and a thin film transistor (TFT) array. The TFT array includes a substrate that includes one or more pixel areas. Each pixel area may be divided into at least two pixel sub-areas. Each pixel sub-area is configured to have a different electric field than its counterparts, such that mutual compensation in the sub-areas decreases distortion of a gamma curve and improves lateral visibility of the flat panel display. In one embodiment, a first pixel electrode is formed in a first of the at least two pixel sub-areas; and a second pixel electrode is formed in a second of the at least two pixel sub-areas.
US07978292B2 Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same
The invention is directed to simultaneously etching thin films to different uniform depths depending on positions by using a photoresist pattern having different thickness depending on positions as an etch mask in order to form a contact hole for a gate pad along with at least one other layer, or a data wire and a semiconductor pattern, via a single photolithography step.
US07978290B2 Liquid crystal display device
A liquid crystal display device including first and second substrates, liquid crystal with negative dielectric anisotropy, a polymer which determines directions in which liquid crystal molecules tilt when voltage is applied, and a plurality of picture elements located on the first substrate. At least one of the picture elements includes a switching element, a first sub picture element electrode with a plurality of band-shaped microelectrode parts and a first connecting electrode part electrically connecting the microelectrode parts with one another, and a second sub picture element electrode including a plurality of band-shaped microelectrode parts and a second connecting electrode part electrically connecting the microelectrode parts of the second sub picture element electrode with one another. A voltage applied to the second sub picture element electrode is different from a voltage applied to the first sub picture element electrode.
US07978284B2 Illumination device and liquid crystal display apparatus
An illumination device comprising: a wired board having flexibility and including a light source member mounted on one of principal planes; a light-shielding member disposed so as to cover at least part of the other principal plane of the wired board on the opposite side from the one principal plane and having at least partly a light-shielding property; a fixing member having first and second sticking surfaces to which the wired board and the light-shielding member are stuck respectively, a first adhesive layer being interposed between the one principal plane of the wired board and the first sticking surface of the fixing member, having an adhesive property with respect to both of the one principal plane of the wired board and the first sticking surface, and having a first adhesive force with respect to the one principal plane, and a second adhesive layer being disposed on a surface opposing the fixing member of the light-shielding member, and having a portion having an adhesive property with respect to both of the light-shielding member and the second sticking surface and a portion having an adhesive property for both of the light-shielding member and the other principal plane of the wired board, wherein the second adhesive layer includes a non-adhesive portion having no adhesive property with respect to the other principal plane or a low-bond strength adhesive portion having a second adhesive force lower than the first adhesive force at least in a portion having an adhesive force for both the light-shielding member and the other principal plane of the wired board.
US07978281B2 Low stress mounting support for ruggedized displays
Embodiments of the present invention may include an apparatus and method for ruggedizing a Liquid Crystal Display (LCD). Embodiments of the present invention may be configured to impart little or no stress to the LCD, while also shielding the LCD from adverse effects of electromagnetic interference (EMI). A conductive adhesive, a metal frame, and a assembly support panel may be used to provide a electrically conductive path for controlling the EMI. A protective glass may be used to shield the LCD from environmental effects and a heater glass allows for operation of the LCD in different thermal conditions.
US07978280B2 Backlight module and liquid crystal display incorporating same
Disclosed are a backlight module and a liquid crystal display (LCD) incorporating the same. The backlight module includes a frame having an accommodation portion, elastic plate structures, a light guide plate disposed in the frame and light emitting diodes (LEDs). The elastic plate structures extend respectively from both sides of the accommodation portion in the frame. The light emitting diodes are disposed in the accommodation portion, and are fixed between the light guide plate and the respective elastic plate structures.
US07978278B2 Display apparatus and repair method thereof
A display apparatus comprises a substrate, a first lead, a second lead and a third lead. The first lead and second lead are provided on the substrate and intersect at a first overlapping area. The third lead surrounds the first overlapping area where the first lead and second lead cross each other. The third lead intersects the first lead respectively at a second overlapping area and a third overlapping area.
US07978276B2 Thin film transistor array panel for liquid crystal display and method of manufacturing the same
A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.
US07978271B2 Multi-domain liquid crystal display and array substrate thereof comprising a storage capacitor having an auxiliary electrode controlled by a preceding scan line or signal line
A multi-domain liquid crystal display includes a first and a second transparent substrates, a liquid crystal layer interposed between them, a common electrode, a first and a second metal layers, a first and a second dielectric layer, multiple pixel electrodes and multiple auxiliary electrodes. The second metal layer is formed on the first dielectric layer, and the second dielectric layer is formed on the first dielectric layer and covers the second metal layer. The pixel electrodes are formed on the second dielectric layer, each of the pixel electrodes having at least one opening to divide itself into a plurality of sections. The auxiliary electrodes are formed on the second dielectric layer, and each of the auxiliary electrodes extends into the opening of the pixel electrode. The second metal layer is hollowed out at a position overlapping the auxiliary electrode to form at least one opening.
US07978268B2 Apparatus for digitally filtering a video signal, and related method
A method for digitally filtering a video signal comprises: converting the video signal into a plurality of sampled values; determining whether distribution of at least one portion of the sampled values belongs to one of a plurality of specific types according to the sampled values; and generating a plurality of output values according to a correction operation corresponding to the one of the specific types.
US07978266B2 Ticker processing in video sequences
An improved motion compensated interpolation of images in video sequences, in particular, for use in up-conversion processing. In order to achieve a smooth object motion in the interpolated image sequence, separate image areas are processed differently if an image change occurs in the video sequence. While for one image area motion compensation is suspended, the other image area is subjected to motion compensated interpolation.
US07978260B2 Electronic camera and method with fill flash function
A method and camera for electronic image capture provide an electronic image capture device, a scanning aperture shutter located to control light energy received by the image capture device, a flash unit oriented to illuminate an image scene, a photocell unit adapted for sensing visible spectrum energy and infrared spectrum energy received from the image scene, and an exposure control system responsive to the photocell unit and operatively connected to the scanning aperture shutter and the flash unit. The exposure control system is adapted to control an amount of fill flash energy received from the image scene in relation to visible ambient light energy received from the image scene during image capture by illuminating the flash unit once a predetermined amount of ambient visible spectrum energy is sensed by the photocell unit and by extinguishing the flash unit once a predetermined amount of infrared energy is sensed by the photocell unit.
US07978249B2 Image capturing device and auto-focus method for same
An image capturing device includes a taking lens, an image sensor, an image processing unit, an input device, a processor, and a driving unit for moving the taking lens. The image processing unit is configured for receiving the electrical signals from the image sensor and obtaining image information of each image. The input device is configured for selecting focus areas in a photographing area and setting a focus power of each of the focus areas. The processor is configured for performing an auto-focus process using a base evaluation value of an image of the photographing area, wherein the base evaluation value is calculated by taking the total of multiplying an evaluation value of each of the focus areas and non-focus areas of the photographing area by the focus power corresponding to said each of the focus areas and a focus power corresponding to each of the non-focus areas.
US07978248B2 Data processing apparatus and data processing method for displaying image capture mode candidates
A data processing apparatus includes: an image capture mode storing section that stores image capture modes each associated with a feature value related to a subject as a selection condition for selecting an image capture mode candidate according to the subject; a feature value extracting section that extracts a feature value included in captured data that is captured by converting incident light from the subject; an image capture mode candidate selecting section that selects image capture mode candidates from among the image capture modes stored in the image capture mode storing section, on the basis of the feature value extracted from the feature value extracting section; and a display control section that displays on a display section the image capture mode candidates selected by the image capture mode candidate selecting section.
US07978245B2 Method and apparatus for controlling color balance in a digital imaging device
A digital imaging device provides for different exposure times for each of a set of color components, the exposure time of each color component being inversely related to its strength relative to the other color components in a pre-exposure frame. By compensating for color imbalance in the scene during exposure, the digital imaging device improves the signal-to-noise ratio and, hence, the quality of the resulting digital image.
US07978243B2 Imaging apparatus, driving method thereof, and imaging system
In an imaging apparatus according to the present invention, the driving unit drives each of the pixels in the non-readout region in the first mode such that the setting unit sets the input unit to a third electric potential with the transfer unit being ready to transfer the electric charge to reset the photoelectric conversion unit in a first period and that the setting unit sets the input unit to a fourth electric potential for the pixel to be deselected in a second period later than the first period.
US07978237B2 Method and apparatus for canceling fixed pattern noise in CMOS image sensor
An apparatus for canceling a fixed pattern noise in a CMOS image sensor includes a storage device, a fixed pattern noise operation circuit, and a fixed pattern noise canceling circuit. The storage device stores first reference fixed pattern noises operated in a vertical blank section of an (n−1)th frame. The fixed pattern noise operation circuit calculates second reference fixed pattern noises based on the first reference fixed pattern noises stored in the storage device and blank fixed pattern noises output in a vertical blank section of an n-th frame and outputs the second reference fixed pattern noises to the storage device to update the first reference fixed pattern noises to the second reference fixed pattern noises. The fixed pattern noise canceling circuit cancels active fixed pattern noises in combination signals based on the combination signals output in an active section of an (n+1)th frame and including the active fixed pattern noises and pixel signals and the second reference fixed pattern noises output from the storage device.
US07978234B2 Image acquisition apparatus, resolution enhancing method, and recording medium
An image sensor acquires images with resolutions being switched. A resolution switching unit switches the resolutions of the images to be output from the image sensor. An image selecting unit selects a basic image from a plurality of output images which are output from the image sensor, having different resolutions of two or more types switched by the resolution switching unit, at least including an image having a first resolution and an image having a second resolution higher than the first resolution. An image displacement estimating unit estimates a displacement between the basic image and another image. A resolution converting unit converts the resolution of any image in the plurality of output images output from the image sensor using the image having the first resolution and the image having the second resolution acquired by the image sensor and the displacement between images obtained by the image displacement estimating unit.
US07978233B2 Image processing apparatus with correcting section for gradation correction
An image processing apparatus includes an input section, an adjusting section, and a correcting section.The input section acquires image data and information about subject condition at the time of photographing the image data. The adjusting section determines a brightness enhancement amount of dark area gradation of the image data, depending on the subject condition at the time of photographing. The correcting section performs image correction of brightness enhancement on the dark area gradation of the image data according to the brightness enhancement amount determined by the adjusting section.
US07978232B1 Photograph location stamp
A camera includes a feature that associates meaningful information with a photograph to indicate where the photograph was taken. The camera includes equipment that determines a physical position associated with an image. An application uses geographic data to determine a municipality, or other administrative or governmental area, in which the physical position is located and associates data indicating the municipality, or other administrative or governmental area, with the image.
US07978227B2 Imaging apparatus with viewfinder and light sensing detector
An imaging apparatus, includes a viewfinder optical system for guiding an observation light beam to a viewfinder window, the observation light beam being output from an imaging optical system and then reflected from a main reflective surface, an imaging element for generating an image signal in response to the reception of the observation light beam, an exposure control unit for performing exposure control of the imaging element in response to the image signal from the imaging element, and a light sensing detector, arranged in the vicinity of the imaging element, for measuring light. The exposure control unit determines an exposure control value in the exposure control in response to a light measurement value provided by the light sensing detector if a predetermined condition is satisfied.
US07978225B2 Image recording apparatus, image playback control apparatus, image recording and playback control apparatus, processing method therefor, and program for enabling computer to execute same method
An image recording/playback control apparatus includes a moving image capturing section capturing a moving image and generating moving image data; a still image capturing section capturing a still image and generating still image data; a still image information generation section generating still image information in which the moving image data and the still image data are associated with each other by an image-capturing time; moving and still image coding sections coding the moving and still image data, respectively; a recording section recording the coded moving and still image data; a separation section separating the coded moving and still image data; moving and still image decoding sections decoding the coded moving and still image data, respectively; a still image information indication section indicating the moving or still image data; a selection section selecting the moving and still image data; and a display control displaying the moving or still image data.
US07978220B2 Optical apparatus having device for removing foreign substance
An optical apparatus includes a rectangular optical member provided on an optical axis, a supporting member configured to support the optical member, and a rectangular vibrating device stuck to the optical member close to and in parallel with one of four sides of the optical member and configured to vibrate the optical member in a wave fashion having a predetermined wavelength to have a plurality of nodes parallel with the one side. A support position at which the optical member is supported by the supporting member at a side opposite the one side of the optical member is located inward from the opposite side by ¼ the predetermined wavelength.
US07978219B1 Device, network, server, and methods for providing digital images and associated processing information
A wireless communication device operable as a digital image capturing device (wireless digital camera) may be used to associate processing information with a captured image. The wireless communication device may communicate information to a network server, such as a WAP server and/or a process server for processing. A process associated with the communicated information is identified and initiated to process the information.
US07978215B2 System using mobile device for setting up and activating agent shortcut operations to control electronic device at remote locations
Embodiments of the present invention provide for methods, devices and systems for setting up an agent shortcut operation to be activated at an electronic device in a network. The agent shortcut operation can be setup at an electronic device connected to a network by receiving a selection of an agent shortcut operation from a user on an agent setup device, and sending the selected agent shortcut operation through the network to the electronic device to be available for subsequent activation. The agent shortcut operation can be activated by sending an agent shortcut operation to the electronic device, receiving an activation signal from an agent activation device for the agent shortcut operation, and in response to the received activation signal, sending a signal to the electronic device to activate the agent shortcut operation.
US07978214B2 Apparatus and method of reducing banding artifact visibility in a scanning apparatus
A method of, and apparatus for, reducing the visibility of banding artifacts on a printed medium comprising producing synthetic artifacts on the printed medium, overlapping scan lines at swath boundaries and controlling exposure along a scan line to reduce the visibility of the banding artifacts.
US07978213B2 Focus adjustment method of LED print head and image forming apparatus
A focus adjustment method of an LED print head of an image forming apparatus, including steps of: setting one end with respect to a longitudinal direction of the LED print head on a first position where a distance between the photoconductor and the LED print head becomes shorter than a designed focal length, and setting other end with respect to the longitudinal direction of the LED print head on a second position where the distance between the photoconductor and the LED print head becomes longer than the designed focal length; outputting a pattern image having a predetermined resolution; and adjusting the position of the LED print head by moving each of the one end and the other end of the LED print head, based on information of the resolution of the outputted pattern image.
US07978205B1 Systems and methods for providing an enhanced graphics pipeline
An enhanced graphics pipeline is provided that enables common core hardware to perform as different components of the graphics pipeline, programmability of primitives including lines and triangles by a component in the pipeline, and a stream output before or simultaneously with the rendering a graphical display with the data in the pipeline. The programmer does not have to optimize the code, as the common core will balance the load of functions necessary and dynamically allocate those instructions on the common core hardware. The programmer may program primitives using algorithms to simplify all vertex calculations by substituting with topology made with lines and triangles. The programmer takes the calculated output data and can read it before or while it is being rendered. Thus, a programmer has greater flexibility in programming. By using the enhanced graphics pipeline, the programmer can optimize the usage of the hardware in the pipeline, program vertex, line or triangle topologies altogether rather than each vertex alone, and read any calculated data from memory where the pipeline can output the calculated information.
US07978204B2 Transparency-conserving system, method and computer program product to generate and blend images
A1A system embodying the invention includes a controlling device and a set of rendering devices, with the effect that the controlling device can distribute a set of objects to the rendering devices. Each rendering device computes a (2D) image in response to the objects assigned to it, including computing multiple overlapping images and using a graphics processor to blend those images into a resultant image. To interface with the graphics processor, each rendering device spoofs the α-value with a pixel feature other than opacity (opacity is expected by the graphics processor), with the effect that the graphics processor delivers useful α-values, while still delivering correct color values, for each pixel. This has the effect that the resultant images include transparency information sufficient to combine them using transparency blending.
US07978198B2 Image data transfer method, image processing device, and imaging system
An image data transfer method including the steps of: (a) reading pixel data of a two-dimensional image stored in a first image storage and having a plurality of pixels, the position of each of the pixels being represented by coordinates of first and second directions, the pixel data being read by scanning data transfer units of the pixel data in the second direction where each of the data transfer units is formed by data of a predetermined number of pixels consecutive in the first direction; (b) writing the data transfer units read at step (a) in a temporary data storage where data is stored at a position designated by a combination of first and second addresses, the data transfer units being written in burst mode in a region of the temporary data storage in which the first addresses are consecutive while the second address is fixed; and (c) reading the data transfer units written in the temporary data storage from the region in which the first addresses are consecutive while the second address is fixed in burst mode and writing the read data transfer units in a second image storage.
US07978197B2 Systems and methods for downloading algorithmic elements to a coprocessor and corresponding techniques
Systems and methods for downloading algorithmic elements to a coprocessor and corresponding processing and communication techniques are provided. For an improved graphics pipeline, the invention provides a class of co-processing device, such as a graphics processor unit (GPU), providing improved capabilities for an abstract or virtual machine for performing graphics calculations and rendering. The invention allows for runtime-predicated flow control of programs downloaded to coprocessors, enables coprocessors to include indexable arrays of on-chip storage elements that are readable and writable during execution of programs, provides native support for textures and texture maps and corresponding operations in a vertex shader, provides frequency division of vertex streams input to a vertex shader with optional support for a stream modulo value, provides a register storage element on a pixel shader and associated interfaces for storage associated with representing the “face” of a pixel, provides vertex shaders and pixel shaders with more on-chip register storage and the ability to receive larger programs than any existing vertex or pixel shaders and provides 32 bit float number support in both vertex and pixel shaders.
US07978196B2 Efficient rendering of page descriptions
A method (600) is disclosed of generating a representation of a page (1500) to be rendered to a raster image (1600) of pixels. The page (1500) comprises one or more graphical objects (1520 and 1530), arranged in a rendering order. Each the object (1520 and 1530) comprises one or more object edges and an associated fill. The method (600) comprises decomposing the objects (1520 and 1530) into a plurality of fillmap edges (1750, 1755, 1760, 1765, and 1770) defining disjoint regions (1710, 1720, 1730, 1740, and 1780) of the page. The method (600) further comprises setting a reference from at least one fillmap edge (1750, 1755, 1760, 1765, and 1770) to a sequence comprising a plurality of fills to be composited to generate the values for all pixels within the defined region (1710, 1720, 1730, 1740, and 1780).
US07978195B2 Method for superimposing statistical information on tabular data
A method is disclosed for displaying a plurality of statistical data usually presented in a histogram, such as sample counts and percentages of a collection of categorized samples, in a compact single table. The method comprises presenting grouped statistical data that exists within a collection of “buckets” and presenting the sample count for the collected data as an integer in a corresponding cell in the table. Additionally, as disclosed by the present invention, the percentage value of the samples located in each bucket data cell is represented in the data cell as a superimposed gray-scale representation. Presenting the percentages in gray-scale provides overall clarity to the table, assists in ensuring that data can be quickly and easily interpreted and not be subject to misinterpretation, and further allows for the compact display of such information in a single table and subsequent manipulation by automated analysis tools.
US07978194B2 Method and apparatus for hierarchical Z buffering and stenciling
A method and apparatus for hierarchical Z buffering stenciling includes comparing an input tile Z value range with a hierarchical Z value range and a stencil code. The method and apparatus also updates the hierarchical Z value range and stencil code in response the comparison and determines whether to render a plurality of pixels within the input tile based on the comparison of the input tile Z value range with the hierarchical Z value range and stencil code. In determining whether to render the tile, a stencil test and a hierarchical Z value test is performed. If one of the test fails, the tile is killed as it is determined that the pixels are not visible in the graphical output. If the stencil test passes and the hierarchical Z test passes, the pixels within the tile are rendered, as it is determined that the pixels may be visible.
US07978192B2 Method and apparatus for evaluating sight distance
A method of sight distance analysis comprising: acquiring a scene-graph representation comprising three dimensional entities; acquiring at least one three dimensional object representation within the scene graph environment; acquiring a target object representation; selecting at least one camera position; positioning the acquired target object representation in the scene graph representation at a distance from the selected at least one camera position; and determining a visibility factor for the positioned target object representation.
US07978191B2 System and method for locating anatomies of interest in a 3D volume
A system and method for modifying a curved cut plane of a 3D volume to locate objects or sections of interest within the 3D volume intersected by the cut plane. A cross-section of the 3D volume along an initially estimated curved cut plane is projected onto a flat viewing plane, and a panorama image of the cross-section is displayed to the user. If the initially estimated curved cut plane does not exactly intersect the object or section of interest, the user manipulates a user input device to modify the curve of the plane inward or outward in the 3D volume away from the projected plane. As the user manipulates the user input device, an affected portion of the curve is recalculated and a modified curved cut plane is reconstructed based on the recalculated curve for re-projecting a modified cross-section of the 3D volume in real time with the movement of the user input device. The user is therefore provided with instant visual feedback as the user moves the user input device to browse in and out within the 3D volume from the current projected plane.
US07978181B2 Keystroke tactility arrangement on a smooth touch surface
Disclosed are four arrangements for providing tactility on a touch surface keyboard. One approach is to provide tactile feedback mechanisms, such as dots, bars, or other shapes on all or many keys. In another embodiment, an articulating frame may be provided that extends when the surface is being used in a typing mode and retracts when the surface is used in some other mode, e.g., a pointing mode. The articulating frame may provide key edge ridges that define the boundaries of the key regions or may provide tactile feedback mechanisms within the key regions. The articulating frame may also be configured to cause concave depressions similar to mechanical key caps in the surface. In another embodiment, a rigid, non-articulating frame may be provided beneath the surface. A user will then feel higher resistance when pressing away from the key centers, but will feel a softer resistance at the key center.
US07978180B2 Apparatus and method for providing haptics of image
An apparatus for and method of providing haptics of an image displayed through an image unit. The apparatus includes: a touch unit checking whether a user has touched a portion of the displayed image, and searching for a position of the portion when the user touches the portion; and a magnetic force changing unit changing magnetic forces in response to haptic information corresponding to the position and expressing the changed magnetic forces through the image unit. The haptics of the portion are provided through the change of the expressed magnetic forces.
US07978175B2 Magnetic re-centering mechanism for a capacitive input device
Various embodiments provide an enhanced mobile computing experience by providing an input device in a mobile electronic device that is configured to accurately and quickly re-center a button or other user interface while providing a sensation of enhanced tactile feedback to a user. The biasing force of a magnetic re-centering mechanism is employed to overcome frictional forces acting on the button during its travel forwards and backwards and tilting to insure that the button is returned quickly and accurately to a resting position. The magnetic re-centering mechanism has a low profile, and permits the input device and the mobile electronic device within which the input device is disposed to have small form factors.
US07978174B2 System and method for interactive three-dimensional position tracking
A system and method for tracking the x, y and z coordinates of a position of an input device in an interactive computer system is disclosed. An image sensor situated on the input device captures images of an electronic marker displayed on a display screen. As the position of the input device changes, the features of the electronic marker as captured by the image sensor also change. Images of the electronic marker captured during game play are compared to a calibration image of the electronic marker to determine current x, y and z coordinates of positions of the input device. The game display is updated to reflect the movements of the input device.
US07978169B2 Signal processing circuit, low-voltage signal generator and image display incorporating the same
There are provided: a first logic operation circuit which performs a logic operation using a high-amplitude logic signal; a transmission system having a load capacitance; and a low-voltage signal generator which is a step-down level shifter transforming an incoming high-amplitude logic signal from the first logic operation circuit to a low-amplitude logic signal having a lower amplitude than the high-amplitude logic signal for output to the transmission system. In the configuration, the first logic operation circuit operates based on a high-amplitude logic signal, and is therefore free from malfunctions and performs operations at high speed. Further, the transmission system introducing a load capacitance transmits a low-amplitude logic signal and therefore restrains increases in electric power consumption and occurrence of unnecessary radiation.
US07978165B2 Liquid crystal display device, method for repairing liquid crystal display device, and method for driving liquid crystal display device
A method for repairing a liquid crystal display device comprises: a plurality of pixels arranged in a matrix, adjacent to each other row-wise and column-wise; a plurality of first bus lines extended row-wise and connected to the pixels arranged row-wise; a plurality of second bus lines extended column-wise and connected to the pixels arranged column-wise; and a plurality of third bus lines extended row-wise, connected to the pixels arranged row-wise. The plurality of the pixels each includes: a pixel electrode; a first switching element connected to the pixel electrode and the second bus line, for controlling the connection between the pixel electrode and the second bus line by the first bus line; and a second switching element having one electrode connected to the second bus line and the other electrode arranged, overlapping the pixel electrode with an insulating film formed there between, for controlling the connection between said one electrode and said the other electrode by the third bus line.
US07978148B2 Quadrifilar helical antenna
A quadrifilar helical antenna comprising two pairs of filars having unequal lengths and phase quadrature signals propagating thereon. A conductive H-shaped impedance matching element matches a source impedance to an antenna impedance. The impedance matching element having a feed terminal at the center thereof from which current is supplied to the two filars of each filar pair disposed about an edge of the impedance matching element and symmetric with respect to a center of the impedance matching element. The impedance matching element further comprises a reactive element for matching the antenna and source impedances.
US07978141B2 Couple-fed multi-band loop antenna
The present invention is related to a coupled-fed multi-band loop antenna. The antenna comprises a dielectric substrate, a ground plane located on the dielectric substrate and has a grounding point, a radiating portion which comprise a supporter, a coupling trip and a loop strip, and a matching circuit. The coupling strip and loop strip are both located on the supporter, with the coupling strip surrounded by the loop strip. The length of loop strip is about 0.25 wavelength of the antenna's first resonant mode. The loop strip has a first end paralleling with the coupling loop, a second end and a shorting point near the second end and electrically connected to the grounding point on the ground plane. The matching circuit is on the dielectric substrate. One terminal of the matching circuit is connected to the coupling strip, and the other is connected to a signal source.
US07978140B2 Multiband antenna and communication device having the same
A multiband antenna for a communication device is disclosed. The multiband antenna comprises a dielectric substrate, a ground portion, and a radiating metal portion. The dielectric substrate comprises two surfaces. The ground portion comprises a first ground plane, a second ground plane, and a connecting metal strip. The first ground plane is on one of the surfaces of the dielectric substrate and has a first connecting point and a shorting point. The second ground plane is near the first ground plane and has a second connecting point. At least one part of the connecting metal strip is on one surface of the dielectric substrate. The connecting metal strip has one end connected to the first connecting point and the other end connected to the second connecting point. The radiating metal portion is connected to the dielectric substrate, without overlapping the first ground plane. The radiating metal portion comprises a radiating section having one end connected to the shorting point and the other end as an open end; and a feeding section having one end connected to a signal source and the other end as an open end, wherein the open end of the feeding section has a spacing of less than 3 mm to the radiating portion.
US07978138B2 Direction finding of wireless devices
Techniques are disclosed that allow for the detection, identification, and direction finding of wireless emitters in a given multipath environment. For example, the techniques can be used to detect and identify a line of bearing (LOB) to an IEEE 802.11 emitter in a building or in an open field or along a roadside. In some cases, multiple LOBs can be used to geolocate the target emitter if so desired. The techniques can be embodied, for instance, in a handheld device that can survey the target environment, detect an IEEE 802.11 emitter and identify it by MAC address, and then precisely determine the LOB to that emitter. In some cases, a sample array of response data from the target emitter is correlated to a plurality of calibrated arrays having known azimuths to determine the LOB to the target emitter.
US07978137B2 Performance and power management in direction of arrival determination by utilizing sensor information
A system for enhancing the performance of a wireless communication device (WCD) while executing a direction of arrival (DoA) estimation. The performance may be improved through device management, and may include the collection of information from one or more sensors installed within the WCD. The sensor information may initially be used to determine an appropriate configuration for the device. Further, the sensor information may also be used to affect the behavior of the device while performing the DoA estimation.
US07978134B2 System and method for efficient transmit and receive beamforming protocol with heterogeneous antenna configuration
A system and method of training antennas for two devices having heterogeneous antenna configurations in a wireless network is disclosed. The method includes communicating one or more estimation training sequences between two devices via a phased array antenna and a switched array antenna, wherein a beamforming vector of the phased array antenna is switched between phase vectors within a set of weight vectors while the switched array antenna is switched within a plurality of antenna sectors. The method further includes tuning at least one of the phase array and switched array antennas with an antenna parameter selected based at least in part on the one or more estimation training sequences. The method further includes communicating data messages via at least one of the phase array and switched array antennas so tuned.
US07978123B2 System and method for operating a radar system in a continuous wave mode for data communication
A system and a method for operating a radar system in a continuous wave mode for communicating information are provided. In one embodiment, the invention relates to a method for operating a radar system, having an antenna including a plurality of active array elements, in a continuous wave mode to communicate information, the method including receiving an instruction to enter the continuous wave mode, loading a plurality of tables, where each table includes information indicative of a primary group of the active array elements to be activated and a secondary group of elements to be deactivated, receiving a communication signal to be transmitted, and providing, repeatedly, the communication signal, for a preselected period of time, to the primary group of elements of each of the plurality of tables.
US07978121B2 Distributed and cable reduced TCAS
A direction finding antenna system for determining the relative bearing of a second aircraft from a first aircraft in conjunction with Distance Measuring Equipment (DME). The system includes a first antenna and a second antenna located on a top surface of the first aircraft, spaced apart along a first axis, as well as a third antenna and a fourth antenna located on a bottom surface of the first aircraft, spaced apart along a second axis orthogonal to the first axis. The system further includes a transmitting, receiving, and processing system coupled to the first, second, third, and fourth antennas, wherein the transmitting, receiving, and processing system is configured to transmit DME interrogations, receive DME replies, and process the DME replies to determine the relative bearing of the second aircraft from the first aircraft.
US07978119B2 Wireless vehicle access control system
A system and method for coordinating movement of a powered sliding door module and an access ramp for a vehicle is shown in FIG. 5 An OEM key fob (26a) is modified to send a non-OEM signal when a passenger side sliding door button is pressed A non-OE controller (70) receives the non-OEM signal and, depending on whether the passenger side sliding door is opened or closed, and whether the access ramp is stowed or deployed, sends the OEM signal to open the door before deploying the ramp, or delays sending the OE signal until the ramp is stowed In another embodiment, an OEM receiver is modified to receive a non-OEM signal and the control configured to receive the OEM signal and send or delay sending of the non-OEM signal depending on the condition of the door and ramp.
US07978116B2 Apparatus and method for pipelined analog to digital conversion
Apparatus and methods for pipelined analog-to-digital conversion are disclosed. In some embodiments, a pipeline analog-to-digital converter includes a plurality of multiplying digital-to-analog converter (MDAC) stages coupled in cascade. At least one of the MDAC stages includes two or more flash ADCs connected in parallel, operating alternately to generate digital signals from an analog input voltage. In one embodiment, the flash ADCs provide the digital signals in an alternating manner to a capacitor block that receives a delayed analog input voltage. In another embodiment, the at least one MDAC may include two or more capacitor blocks, each of which is associated with a respective one of the flash ADCs, forming two or more sets of a flash ADC and a capacitor block. In yet another embodiment, the at least one MDAC also include three or more capacitor blocks, each of which can be randomly selected for one of the flash ADCs.
US07978113B2 Analog-to-digital converter having output data with reduced bit-width and related system and method
A circuit includes an analog-to-digital converter configured to receive an analog input signal and generate first digital values at a first sampling rate. The first digital values have a first bit-width. The circuit also includes an interpolator configured to receive the first digital values and generate second digital values at a second sampling rate higher than the first sampling rate. The second digital values have a second bit-width equal to or greater than the first bit-width. The circuit further includes a digital filter configured to receive the second digital values and perform bit-width reduction in a recoverable manner to generate third digital values. The third digital values have a third bit-width less than the first and second bit-widths. The circuit could optionally include a recovery circuit configured to process the third digital values to generate recovered digital values at the first sampling rate. The recovered digital values have the first bit-width.
US07978111B2 High resolution time-to-digital converter
A time-to-digital converter (TDC) can have a resolution that is finer than the propagation delay of an inverter. In one example, a fractional-delay element circuit receives a TDC input signal and generates therefrom a second signal that is a time-shifted facsimile of a first signal. The first signal is supplied to a first delay line timestamp circuit (DLTC) and the second signal is supplied to a second DLTC. The first DLTC generates a first timestamp indicative of a time between an edge of a reference input signal to the TDC and an edge of the first signal. The second DLTC generates a second timestamp indicative of a time between the edge of the reference input signal and an edge of the second signal. The first and second timestamps are combined and together constitute a high-resolution overall TDC timestamp that has a finer resolution than either the first or second timestamps.
US07978110B2 Digital-to-analog converter
A system for converting a digital signal to an analog signal is provided. The present invention provides a digital-to-analog converter (DAC) that can convert a large bit value digital signal to a corresponding analog signal. The digital-to-analog converter includes a bias regeneration circuit, and three sub-DACs. The bias regeneration circuit provides biasing to the three sub-DACs allowing the DAC to be implemented with smaller circuit area. In addition, the three sub-DACs may be digitally calibrated during the conversion process to increase the linearity of the DAC.
US07978107B1 Digital-to-analog converter to produce paired control signals in a power supply controller
An example digital-to-analog converter (DAC) for a power supply controller includes a first node, a second node, a current source, and a switch. The first node is to be coupled to provide a first analog signal to a variable oscillator of the power supply controller. The second node is to be coupled to provide a second analog signal to the variable oscillator of the power supply controller. The switch is coupled to the current source and configured to couple the current source to the first node to provide current to the first analog signal in response to a binary digit received by the DAC, where the switch is further configured to couple the current source to the second node to provide current to the second analog signal in response to a complement of the binary digit.
US07978106B1 Interference detection using a moving window
A receiver including an automatic gain control module, a digital signal processor module, and a control module. The automatic gain control module has a gain that varies from a nominal value in response to the receiver receiving an input signal. The automatic gain control module is configured to generate a first signal in response to the gain settling at a value different from the nominal value. In response to the input signal not being an interference signal, the digital signal processor module is configured to process the input signal and generate a second signal. Subsequent to the first signal being generated and prior to the second signal being generated, the control module is configured to determine whether the input signal is an interference signal based on whether the second signal is generated within a predetermined time period subsequent to the first signal being generated.
US07978105B2 Current sensing and background calibration to match two resistor ladders
In one embodiment, a first resistor ladder includes a first voltage across the first resistor ladder. A second resistor ladder includes a second voltage across the second resistor ladder. A third resistor ladder includes a third voltage across the third resistor ladder. The calibrator receives the first voltage and third voltage and adjusts a current through the third resistor ladder to adjust the third voltage based on the received first voltage and third voltage. A buffer is configured to provide buffering for the third resistor ladder from the second resistor ladder. The third voltage of the third resistor ladder is stable even though the second voltage of the second resistor ladder is changing.
US07978104B2 Compensation of mismatch errors in a time-interleaved analog-to-digital converter
A method for the compensation of frequency-response mismatch errors in M-channel time-interleaved ADCs. The compensation is done utilizing a technique that makes use of a number of fixed filters, that approximate differentiators of different orders, and a few variable multipliers that directly correspond to parameters in polynomial models of the M channel frequency responses. A compensated M-channel time-interleaved ADC is based on and can perform the method.
US07978103B2 Code amount estimating device, image coding apparatus including the code amount estimating device, and code amount estimating method
To provide a code amount estimating device which can perform, at high speed and with high precision, estimation of code amount obtained after arithmetic coding. The code amount estimating device includes a context index calculation unit which calculates a context index of a binary symbol included in binary data, and an estimate code amount calculation unit which calculates an estimate code amount for the binary data based on symbol occurrence probability information stored in association with the calculated context index and on a held probability interval range. The estimate code amount calculation unit estimates the code amount for the binary data according to code amount information indicating an association between (i) a combination of a binary symbol string including one or more binary symbols, symbol occurrence probability information, and a probability interval range and (ii) an estimate code amount for the binary symbol string.
US07978102B1 Multi-bin CABAC decision bin decoder
A binary arithmetic decoding device may include a first and second lookup table each receive signal output from a first register. A third lookup table receives signal output from the first lookup table and a fourth lookup table receives signal output from the second lookup table. A first multiplexer receives signal output from the third and fourth lookup tables. A second multiplexer receives signal output from the first and second lookup tables and from the second lookup table where the first and second multiplexers are controlled by a same first signal. The proposed decoder may further include a second register, a first adder, a third adder, and a first comparison module coupled in series and output of the first comparison module is the first signal.
US07978099B2 17B/20B coding system
A method, apparatus and system employing a 17B/20B coder is disclosed. The 17B/20B coder to receive an incoming stream including a 17B block and a 20B block, and partition the 17B block into first blocks, and partitioning the 20B into second blocks. The coder is further to code 17B to 20B of memory using one or more serial lines for communication is performed, wherein coding includes coding the first blocks of the 17B block and the second blocks of the 20B block, wherein the coding of the first and second blocks is performed such that a maximum run length is maintained.
US07978098B2 Key input device
Key switches SW1-SW6 short-circuit one ends of resistors R corresponding thereto and a termination of a resistor string unit STR1, in accordance with inputs made by keys KEY1-KEY6 assigned thereto, respectively. The keys KEY1-KEY6 are made active in a period when the selection command SEL is at “P1”, so that control unit 2 can identify which key is used to make an input, out of the keys KEY1-KEY6. The keys KEY7-KEY12 are made active in a period when the selection command SEL is at “P2”, so that control unit 2 can identify which key is used to make an input, out of the keys KEY7-KEY12.
US07978097B2 Dynamic speed limit system
A method, medium and implementing processing system are provided in which the presence of workers in a long highway construction zone is monitored and the electronically-controlled posted speed limit is adjusted in accordance with the detected presence of workers in the immediate area. In an example, Radio Frequency Identification (RFID) scanners or readers are strategically placed in a construction or working area. Such RFID reading devices may be embedded, for example, in construction speed limit signs. The displayed speed limit is controlled by the detected proximity of construction workers wearing RFID-embedded clothing, for example, such as safety vests or helmets. The speed limit sign includes logic to display one of many possible speed limit displays based on the nearest, and/or the number of RFID signals detected in a given area. Vehicular traffic is thereby enabled to travel faster through construction zones where no workers are present and, when appropriate, traffic is slowed when workers are present within a given proximity of the RFID reading devices.
US07978094B2 Mirror assembly for vehicle
An interior rearview mirror assembly for a vehicle includes a reflective element assembly portion and at least one cap portion adapted to attach to the reflective element assembly portion. The reflective element assembly portion includes a reflective element. The reflective element assembly portion comprises a first molding that encompasses at least a perimeter portion of the reflective element. The first molding is formed by molding a first resinous material having a tool shrinkage factor equal to or greater than about 1%. The cap portion comprises at least one second molding formed by molding a second resinous material having a tool shrinkage factor of less than or equal to about 1%. The cap portion preferably includes internal structure for supporting at least one accessory.
US07978091B2 Method and device for a touchless interface
A method (400) and device (100) for touchless control of an headset or earpiece is provided. The device can include a sensing unit (202) for determining (402) a presence of a finger within a proximity of the earpiece, tracking (404) a touchless movement of the finger in air within the proximity, selecting (410) the control in accordance with a movement of the finger, and adjusting (414) the control in accordance with the tracking. A circular movement of the finger can be tracked for scrolling through a list. Menu options in the list can be audibly played during the scrolling.
US07978089B2 Method and apparatus for ground fault detection
In one embodiment, the present invention is a method and apparatus for ground fault detection. One embodiment of a method for diagnosing a ground fault in a notification appliance circuit comprising a plurality of field wiring connections includes individually testing each of the plurality of field wiring connections until a source of the ground fault is detected and outputting a signal identifying the source of the ground fault.
US07978087B2 Fire detector
A fire detector operating by the scattered radiation principle is described, having at least one radiation transmitter and at least one radiation receiver, whose beam paths form a scattering volume. The fire detector includes, in addition to at least one first radiation transmitter and one first radiation receiver, at least one second radiation transmitter and one second radiation receiver, whose beam paths form at least two spatially separated scattering volumes.
US07978085B1 Human and physical asset movement pattern analyzer
A system of tracking and analyzing the movement of human subjects. UWB is used to track the location of all persons and/or physical objects (assets) occupying a defined area, giving their location with an accuracy of under twenty centimeters, their acceleration, their path, and a time/date-stamp for each observation. The system then uses artificial intelligence to detect variations in patterns of movement of designated individuals and movable physical objects in the defined space. The extracted patterns inform the design of intelligent methods to automatically track behavioral markers of movement. The system can be used to detect dementia in otherwise healthy human subjects and to identify changes in movement pursuant to medication or health changes and which may precede a fall or to detect proper movement in military training scenarios such as battlefield simulations.
US07978080B2 Pliable material loop tag
A security tag that can be attached to an item or items that provides a zero or low impact to the item or items such as elegant or soft goods. The security tag includes a security element that is enclosed within a pliable material that is looped around the item or items it is protecting and then is closed on itself or on an extension of the pliable material. No puncturing, piercing or adhesive attachment to the elegant or soft goods occurs, thereby making a “zero or low impact” on the item while also making a pleasant presentation to customers when the item (or items) is displayed.
US07978079B2 Electronic tag
The present disclosure relates to an electronic tag, and more particularly to an electronic tag including an insulating cap. When the electronic tag is being made, the insulating cap is arranged adjacent to heat-sensitive electronic components. The insulating cap protects the electronics from the heat generated when injection molding with hot plastic.
US07978076B2 System for, and method of, monitoring the movement of mobile items
A system monitors parameters (e.g., speed, position, threshold boundaries) of mobile items attached to beacons and produces signals indicating these parameters. The system also monitors non-mobile parameters (e.g., battery life, door locks, windows) in the items. Different technologies (e.g., wireless) are provided for communicating between the beacons and a beacon controller interface. Different technologies are provided for locating and indicating item positions. The beacons and the interface provide for new beacons to be added to the system with different characteristics than the existing beacons for monitoring the operation of new beacons without affecting the operation of existing beacons. The system includes resellers, retailers, users and subscribers in a flexible relationship to enhance the ease in the system operation. Beacons can perform more than one function (e.g. tracking, threshold monitoring) simultaneously. Scenarios for the beacons can be created and monitored. Recovery personnel can intervene to resolve crises.
US07978075B2 Apparatus and a method for recognizing an activity of daily living
Provided is an apparatus for recognizing an activity of daily living (ADL). The apparatus includes a radio frequency identification (RFID) reader for reading the information of an RFID tag to recognize a motion object, a motion detector attached on a moving subject for acquiring acceleration information and recognizing a motion characteristic, and a controller for receiving information on the motion object from the RFID reader and information on the motion characteristic from the motion detector and then recognizing an ADL.
US07978073B2 Transmitter and a method for transmitting data
An excitation reference source (FC) is split through a 90 degree splitter. One output from the splitter is fed to the LO port of a mixer. Data is fed to the mixer's IF port and causes PRK modulation of the LO port's signal. The output of the mixer at the RF port is a PRK modulated quadrature signal. This is attenuated and added back onto the reference by a zero degree combiner ready for transmission to the transponder.
US07978067B2 Intelligent container
A system for remotely identifying, tracking, and monitoring transported goods includes a sensing and communications device (14) embedded in a shipping container (2). The sensing and communications device (14) includes onboard sensors (58,60,62) and wirelessly communicates with external sensors (24,26) to receive environmental and structural condition data. The device (14) communicates the data via either an RF interface (52,54) or a cellular telephone system interface (48,50) to a remote monitoring station (68). The remote monitoring station (68) analyzes the data, presents the data to a user, and enables the user to program the device (14).
US07978066B2 Navigation apparatus and method using RFID
Disclosed is a navigation apparatus and method using RFID that is capable of providing information on a current position and a moving direction to the destination. An antenna unit has directivity in a predetermined direction and receives at least one radio signal transmitted from at least one RFID tag. An RFID reader converts the at least one radio signal provided by the antenna unit into information on the at least one RFID tag in a digital form, measures the reception strength of the at least one radio signal, and provides the information on the at least one RFID tag and information on the received strength. A control unit determines the current position and moving direction on the basis of the information on the at least one RFID tag and the information on the reception strength provided from the RFID reader. Accordingly, it is possible to accurately recognize the current position and the moving direction of the navigation apparatus and guide the moving direction to the destination.
US07978060B2 Identification system
An identification system for recognizing at least one item signal emitting device operating at a first frequency and in operable communication with at least one item. The system includes at least one support member having a support surface for supporting the items thereon and a support member signal emitting device operating a second, different frequency in communication with the support member. The system includes a local signal recognition system with a signal receiving device in communication with the support member for receiving signals therefrom and a control device for receiving, processing and transmitting signals. A transferable local signal recognition system, as well as a networked identification system are also disclosed.
US07978059B2 System and method for monitoring and controlling remote devices
The present invention is generally directed to a system for monitoring a variety of environmental and/or other conditions within a defined remotely located region. Such a system may be configured to monitor utility meters in a defined area. The system is implemented by using a plurality of wireless transmitters, wherein each wireless transmitter is integrated into a sensor adapted to monitor a particular data input. The system also includes a plurality of transceivers that are dispersed throughout the region at defined locations. The system uses a local gateway to translate and transfer information from the transmitters to a dedicated computer on a network. The dedicated computer, collects, compiles, and stores the data for retrieval upon client demand across the network. The computer further includes means for evaluating the received information and identifying an appropriate control signal, the system further including means for applying the control signal at a designated actuator.
US07978053B2 Tag-information management apparatus and IC tag
An apparatus for managing information about an integrated circuit tag includes an acquiring unit and a storing unit. The acquiring unit acquires communication range information that is information about a range in which the integrated circuit tag communicates with an antenna of a reader/writer. The integrated circuit tag includes a transmitting device that transmits position identification information for identifying a position of the integrated circuit tag. The storing unit stores the communication range information in association with antenna identification information and integrated-circuit-tag identification information.
US07978051B2 RFID interrogator device
An RFID interrogator device has a transmission section for transmitting a command to an RFID tag and a reception section for receiving an RF signal from the RFID tag and is configured to perform backscatter radio communication with the RFID tag. The RFID interrogator device comprises a time window setting section configured to set a time window at timing of receiving preamble data added to a head of response data transmitted from the RFID tag in response to the command, and an identifying data storage section storing preamble identifying data. The RFID interrogator device compares the data received within the time window, with preamble identifying data stored in the identifying data storage section, thereby determining whether the data received is identical to the preamble data transmitted from the RFID tag.
US07978039B2 Semiconductor module for connecting to a transformer winding, and transformer arrangement
A semiconductor module (500) for connecting to a transformer winding (132, 133; 408; 409) includes a semiconductor component (501) that is disk-shaped and disposed between two contact plates (502). One of the contact plates (502) is acted upon using a cooling fluid on its side facing away from the semiconductor component (501).
US07978036B2 Method and device for the secure operation of a switching device
A method and a device are disclosed for the secure operation of a switching device including at least one main contact which can be switched on and off and which includes contact pieces and a displaceable contact bridge, and at least one control magnet which includes a displaceable anchor. The anchor and the contact bridge are actively connected to each other such that the corresponding main contact can be opened or closed when switched on and off. In at least one embodiment, the method includes the following: a) the path difference, which returns the anchor after switching on and off, is recognised, b) devices which are used to open welded main contacts are released by a release device when the recognised path difference exceeds a predetermined value and a specific time duration of time has run out after switching off.
US07978032B2 Locking mechanism for protecting a ground fault circuit interrupter from faulty resetting
A locking mechanism for protecting a ground fault circuit interrupter (GFCI) from being faultily reset. In one embodiment, the locking mechanism has a blocking member secured onto a lateral side of the movable assembly, a resilient member, and a locking member having a first end portion positioned against the resilient member, a second end portion positioned in relation to the blocking member, and a body portion defined between the first end portion and the second end portion. When the movable assembly is in a first (tripping) position, the expanding force of the resilient member applied to the first end portion of the locking member causes the second end portion of the locking member to be positioned against the blocking member so that no movement of the movable assembly from the first position to a second (resetting) position is allowed.
US07978030B2 High-speed interconnects
In one example embodiment, a high-speed transponder includes a printed circuit board having a set of coplanar high-speed traces, and a high-speed circuit and a package mounted to the printed circuit board. The package includes an outside housing and a second high-speed circuit positioned inside the housing. The high-speed transponder also includes a high-speed feed thru which includes an inside coplanar structure positioned inside the housing, a strip line structure positioned through the housing, and an outside coplanar structure positioned outside the housing. The second high-speed circuit is operably coupled to the inside coplanar structure, which is operably coupled to the strip line structure, which is operably coupled to the outside coplanar structure, which is operably coupled to the first high-speed circuit via the set of coplanar high-speed traces. The signal plane of the outside coplanar structure is flipped with respect to a signal plane of the inside coplanar structure.
US07978023B2 Apparatus and method for wireless communications
An apparatus including: a first transistor including a first port configured for connection to an antenna having a first impedance at a first frequency band, and a second port configured for connection to radio circuitry, the first port of the first transistor being configured to have an impedance at the first frequency band substantially equal to the complex conjugate of the first impedance.
US07978011B1 Systems and methods for mitigating distortion in single-ended amplifiers
Systems and methods which implement degeneration circuitry in a single-ended amplifier circuit to mitigate distortion associated with one or more amplifier components are disclosed. A degeneration circuit of embodiments adds an impedance to cancel the second-order distortion of an amplifier transistor of a single-ended amplifier circuit. A bias circuit may be provided to minimize bias offset between an amplifier transistor and a corresponding degeneration transistor.
US07978010B2 Boost operational amplifier
A boost operational amplifier. A boot operational amplifier may include a differential amplifying unit amplifying and/or outputting an inputted differential voltage, a first mirroring unit mirroring a current flowing through a first output terminal of a differential amplifying unit, which may output a mirrored first mirror current, a second mirroring unit mirroring a current flowing through a second output terminal of a differential amplifying unit, which may output a mirrored second mirror current, a pull-up transistor connected between a first power source and an output node, which may switch based on a first and/or a second mirror current, and/or a pull-down transistor connected between a second power source and an output node, which may switch based on a first and/or a second mirror current.
US07978009B2 Digital modulated RF power amplifier with impedance compensation circuit
A digital modulated power amplifier unit includes a differential radio frequency (RF) amplifier circuit having differential output nodes, a digital modulation signal input and complimentary clock signal inputs. The differential RF amplifier circuit includes a first pair of transistors operable to receive a digital modulation signal and a second pair of transistors operable to receive complimentary clock signals. The digital modulated power amplifier unit further includes an impedance compensation circuit connected between the differential output nodes of the differential RF amplifier circuit. The impedance compensation circuit includes a transistor connected in series between first and second RC circuits. The transistor is operable to electrically connect and disconnect the first RC circuit and the second RC circuit responsive to the digital modulation signal.
US07978008B2 Supply voltage control device for amplifier
A supply voltage control device for an amplifier that controls a supply voltage for the amplifier has been improved. The supply voltage control device includes: a supply voltage control circuit including an error amplification circuit that feeds an error current so as to control the supply voltage for the amplifier, and a direct current feed circuit that feeds a direct current (or the direct current and a current of a low-frequency component); a high-frequency component extraction unit that extracts a predetermined high-frequency component contained in a signal resulting from detection of an envelope relevant to a signal to be amplified by the amplifier; a peak hold unit that performs peak hold processing on a signal of the extracted high-frequency component; and an addition unit that adds up a signal based on the result of detection of the envelope relevant to the signal to be amplified by the amplifier, and the signal resulting from the peak hold processing, and inputs a signal resulting from the addition to the supply voltage control circuit.
US07978007B2 Feedback network for cascaded amplifiers
The invention relates to a feedback network (60) for cascade amplifiers (200), which comprises an active stage (30) to feed signal back to a first internal node (65) at the output of the first amplifier stage (61) of the cascade. The invention further relates to a feedback network (60) which comprises said active feedback stage (30) with said first internal amplifier node (65) connection and a feedback resistor (10) connected from said cascade amplifier output port (out) to its input port (in).
US07978005B1 Reference current generator with low temperature coefficient dependence
Embodiments of the invention describe a core circuit for a reference current generator circuit that biases a first transistor to source a first current and a second transistor parallel to the first transistor, biased to source a second current controlled by the first current. A third transistor is coupled parallel to the second transistor and sources a third current controlled by the first current. The third transistor has a different threshold voltage than a threshold voltage of the second transistor. A resistive component coupled to conduct the second current has a resistive voltage that is substantially equal to a voltage differential between the first transistor and the second transistor. The conducting current through the resistive component is substantially independent of temperature variations.
US07978003B2 Internal voltage generating circuit
There is an internal voltage generating circuit for providing a stable high voltage by making a response time short. The internal voltage generating circuit includes a charge pump unit for generate a high voltage being higher than an external voltage in response to pumping control signals and a supply driving control signal; a pumping control signal generating unit for outputting the pumping control signals to the charge pump unit based on a driving signal; and a supply driving control unit for receiving the driving signal to generate the supply driving control signal to the charge pump unit.
US07978002B2 Voltage boosting circuit and semiconductor device
A voltage boosting circuit includes a first voltage boosting circuit configured to receive an external power supply voltage, and pump the external power supply voltage to a second boosting voltage higher than the external supply voltage in a single pumping stage, and a second voltage boosting circuit configured to receive the second boosting voltage and pump the second boosting voltage to a first boosting voltage higher than the second boosting voltage in two pumping stages.
US07978001B2 Microprocessor with selective substrate biasing for clock-gated functional blocks
A microprocessor according to one embodiment includes a supply node providing a core voltage, a functional block, a charge node, select logic, and substrate bias logic. The functional block has multiple power modes and includes one or more semiconductor devices and a substrate bias rail routed within the functional block and coupled to a substrate connection of at least one semiconductor device. The select logic couples the substrate bias rail to the charge node when the functional block is in a low power mode and clamps the substrate bias rail to the supply node when the functional block is in a full power mode. The substrate bias logic charges the charge node to a bias voltage at an offset voltage relative to the core voltage when the functional block is in the low power mode. Semiconductor devices may be provided to clamp or otherwise couple the bias rail.
US07978000B2 Semiconductor temperature sensor using bandgap generator circuit
A combined bandgap generator and temperature sensor for an integrated circuit is disclosed. Embodiments of the invention recognize that bandgap generators typically contain at least one temperature-sensitive element for the purpose of cancelling temperature sensitivity out of the reference voltage the bandgap generator produces. Accordingly, this same temperature-sensitive element is used in accordance with the invention as the means for indicating the temperature of the integrated circuit, without the need to fabricate a temperature sensor separate and apart from the bandgap generator. Specifically, in one embodiment, a voltage across a temperature-sensitive junction from a bandgap generator is assessed in a temperature conversion stage portion of the combined bandgap generator and temperature sensor circuit. Assessment of this voltage can be used to produce a voltage- or current-based output indicative of the temperature of the integrated circuit, which output can be binary or analog in nature.
US07977999B2 Temperature detection circuit
Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.
US07977995B2 Configurable pulse generator
The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable signal is coupled to the test circuit. When the disable signal is asserted, the test circuit is disabled, and the pulse generator circuit outputs pulses of a predetermined duration. In contrast, when the disable signal is deasserted, the test circuit is enabled, and the pulse generator circuit outputs an oscillating signal.
US07977988B2 Delay adjusting method, and delay circuit
A variable delay circuit 1 includes: a multistage delay circuit 20 constructed by connecting delay elements D1 to Dn in series; a selecting unit 21 which selects one delayed signal obtained by introducing different amounts of delay by passing a reference clock through one or more of the delay elements D1 to Dn; a decision unit 23 which, at decision timing synchronized to the reference clock, makes a decision on the logic state of each delayed signal sequentially selected from among the plurality of delayed signals; and a changing point detection unit 24 which detects at least two delay elements Dm and Dk where a change has occurred in the logic state of the reference clock at the decision timing, and wherein the difference (k−m) between the numbers of delay elements through which the clock signal has passed until reaching one of the two detected delay elements Dm and Dk is used as the number of delay elements that provides a desired delay time.
US07977984B1 High-speed charge pump circuits
A charge pump circuit includes at least one switching transistor and a level-shifter. The level-shifter has a cross-coupled pair of transistors. The level-shifter shifts a voltage of a first input signal to generate a level-shifted signal. The level-shifted signal controls a conductive state of the switching transistor to regulate an output voltage of the charge pump. A feedback loop circuit includes a detector and a charge pump. The detector compares an input signal to a feedback signal to generate first and second output signals. The charge pump includes at least two thin-oxide switching transistors and a level-shifter in another embodiment. The level-shifter shifts a voltage of the first output signal of the detector to generate a level-shifted signal. The two switching transistors are driven by the level-shifted signal and the second output signal of the detector to regulate an output voltage of the charge pump.
US07977981B2 Pre-driver circuit using transistors of a single channel type
A serial interface apparatus comprises a driver for generating a differential communication signal and a pre-driver for driving the driver circuit. The pre-driver receives an input signal that alternates between VDD and ground and produces an output signal that alternates between a lower limit that is greater than ground and an upper limit that is less than VDD. The pre-driver comprises input circuitry and actuation circuitry, and the actuation circuitry comprises transistors of a single channel type.
US07977979B2 High-speed multi-stage voltage comparator
A high-speed multi-stage voltage comparator is provided. The multi-stage voltage comparator is configured to eliminate offset from outputs of preamplifiers through respective offset-cancellation switches, and to reset the outputs of the preamplifiers through respective reset switches to reduce an output recovery time. Thus, the multi-stage voltage comparator operates with high accuracy and at a high speed, so that it can be usefully applied to an analog-to-digital converter (ADC), and particularly, a high-speed successive approximation register ADC (SAR ADC).
US07977978B2 Inverter, method of manufacturing the same, and logic circuit including the inverter
Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.
US07977976B1 Self-gating synchronizer
A synchronizer circuit for transferring data from a source clock domain to a target clock domain. A first latch in the target clock domain may capture a data value corresponding to current data received from the source clock domain. Under certain conditions, the first latch may enter into a metastable, or undefined logic state. A second latch may remain stable, and store a previous value corresponding to data that has most recently been transferred from the source clock domain to the target clock domain. The respective values output by the two latches may be compared by a detection circuit, and a value derived from the output value of the first latch and corresponding to the current data may be written to an output latch if the current data differs from the stored previous value. The detection circuit may also provide a defined logical value to the output latch even if the first latch is in a metastable state.
US07977975B1 Apparatus for using metastability-hardened storage circuits in logic devices and associated methods
An integrated circuit (IC) includes a set of metastability-hardened storage circuits. Each metastability-hardened storage circuit may include: (a) a pulse width distortion circuit; (b) a first circuit powered by a nominal power supply voltage, and a second circuit powered by a higher-than-nominal supply voltage; (c) an inverter and a bias circuit, where the bias circuit provides a bias current based on an intermediate state of the inverter to resolve a metastable state of the inverter; or (d) a latch, and a dynamic bias circuit that causes current to be injected into the latch to resolve a metastable state of the latch.
US07977969B2 Circuit arrangement and method for evaluating a data signal
A circuit arrangement (10) comprises a circuit terminal (11) for supplying a data signal (DATA) having digital information, a logic circuit (12) that is coupled at an input (22) to the circuit terminal (11) for supplying the digital information, an activation circuit (13), and a voltage regulator (14) that is coupled for activation to an output (18) of the activation circuit (13). The activation circuit (13) comprises an input (16) that is coupled to the circuit terminal (11), a delay element (17) that is coupled to the input (16) of the activation circuit (13), and the output (18), connected to the delay element (17), for emitting an activation signal (SON).
US07977966B2 Internal voltage generating circuit for preventing voltage drop of internal voltage
An internal voltage generating circuit is utilized to perform a TDBI (Test During Burn-in) operation for a semiconductor device. The internal voltage generating circuit produces an internal voltage at a high voltage level, as an internal voltage, in not only a standby section but also in an active section in response to a test operation signal activated in a test operation. Accordingly, dropping of the internal voltage in the standby section of the test operation and failure due to open or short circuiting are prevented. As a result, reliability of the semiconductor chip, by preventing the generation of latch-up caused by breakdown of internal circuits, is assured.
US07977965B1 Soft error detection for latches
A system and method for soft error detection in digital ICs is disclosed. The system includes an observing circuit coupled to a latch, which circuit is capable of a response upon a state change of the latch. The system further includes synchronized clocking provided to the latch and to the observing circuit. For the latch, the clocking defines a window in time during which the latch is prevented from receiving data, and in a synchronized manner the clocking is enabling a response in the observing circuit. The clocking is synchronized in such a manner that the circuit is enabled for its response only inside the window when the latch is prevented from receiving data. The system may also have additional circuits that are respectively coupled to latches, with each the additional circuit and its respective latch receiving the synchronized clocking. Responses of a plurality of circuits may be coupled in a configuration corresponding to a logical OR.
US07977963B2 Methods, systems and apparatus for detecting abnormal operation of an inverter sub-module
Methods and apparatus are provided for determining whether one or more inverter sub-modules of an inverter module is operating properly. Amplitude of each stator current signal is regularly measured. For each current signal, a positive counter counts a number of consecutive times the amplitude of that current signal is less than a positive current threshold, while a negative counter counts a number of consecutive times the amplitude of that current signal is greater than a negative current threshold. If the positive counter or the negative counter exceeds a maximum count, it is determined that an inverter sub-module is operating abnormally.
US07977954B2 Methods and systems for sigma delta capacitance measuring using shared components
Methods, systems and devices are described for detecting a measurable capacitance using sigma-delta charge transfer techniques that can be implemented with many standard microcontrollers, and can share components to reduce device complexity and improve performance. In the various implementations of this embodiment, the passive network used to accumulate charge can be shared between multiple measurable capacitances. A switch or IO controlling the charge sharing and/or charge changing can also be shared Likewise, in various implementations a voltage conditioning circuit configured to provide a variable reference voltage can be shared between multiple measurable capacitances. Finally, in various implementations a guarding electrode configured to guard the measurable capacitances can be shared between multiple measurable capacitances. In each of these cases, sharing components can reduce device complexity and improve performance.
US07977952B2 Polymeric structures and methods for producing and monitoring polymeric structures
A method for monitoring a component formed of a polymer material, and the polymer component. The component includes an electrically-conductive polymer sensing element integrally incorporated into the component. An electric potential is applied to the polymer sensing element, and an electric signal generated by the polymer sensing element is sensed in response to the polymer sensing element physically responding to a transitory or permanent distortion of the component. A signal can then be generated if the electric signal exceeds a predetermined threshold value for the component.
US07977951B1 Methods and apparatus for measuring a length of a cable
A first physical layer (PHY) device includes an auto-negotiation module, a first cable-length measuring module, and a first control module. The auto-negotiation module exchanges data rates of the first PHY device and a second PHY device. The first PHY device is connected to the second PHY device by a cable. The first cable-length measuring module performs a first measurement of a length of the cable. The first control module selectively receives a second measurement of the length of the cable from the second PHY device, and selects a data rate of the first PHY device from the data rates of the first PHY device and the second PHY device based on (i) the first measurement of the length of the cable performed by the first cable-length measuring module of the first PHY device, or (ii) the second measurement of the length of the cable received from the second PHY device.
US07977946B2 Interventional MRI magnetic field generator based on permanent magnets
A magnet assembly primarily for use in MRI Interventional applications having an array of four mam permanent magnets that are spaced-apart and arranged into a ring-like geometry with six easy-access openings The magnetization direction in each permanent magnet is anti-parallel to any other adjacent permanent magnet in the πng assembly while it is parallel to any other permanent magnet in the array that is oppositely located just as in a quadrupolar system Such an arrangement has the advantage of concentrating the magnetic field inside the nng enclosure while minimizing magnetic field generated outside Together, these four spatially spaced-apart permanent magnets create a very homogeneous and strong magnetic field in the central enclosure with two orthogonal access paths and one parallel access path to the enclosure Through one access pathway a patient can be inserted while through the other pathways a doctor can fully access the patient.
US07977944B2 Control apparatus for a magnetic resonance imaging antenna arrangement
An apparatus to control an antenna arrangement in a magnetic resonance apparatus has an amplifier with an input connected to a radio-frequency transmission signal to be amplified. The antenna arrangement has at least one antenna element for emission of the amplified transmission signal. The antenna element has an infeed point with two terminals, wherein the amplified transmission signal is connected at the terminals. The amplifier is connected on the output side with two terminals of the infeed point. The antenna element has at the infeed point, a mounting surface to accommodate the amplifier.
US07977943B2 Method and system for reconstructing images
A method for reconstructing an image in a magnetic resonance imaging system is provided. The method includes steps of acquiring magnetic resonance signals from a plurality of receiver coils placed about a subject, each receiver coil having a coil sensitivity, iteratively polling each acquired magnetic resonance signal for determining one or more significant wavelet components of each acquired magnetic resonance signal by utilizing a coil sensitivity function of each receiver coil for each acquired magnetic resonance signal, iteratively determining one or more coefficients based on the one or more significant wavelet components to generate a plurality of coefficients for each acquired magnetic resonance signal, reconstructing an image utilizing a corresponding plurality of coefficients corresponding to each acquired magnetic resonance signal, and generating a composite image by combining the reconstructed images.
US07977942B2 Apparatus and method for tracking movement of a target
The present invention discloses an apparatus and method to track the movement of a target. One embodiment tracks the movement of the patient during medical imaging scanning using optical technology. Optical systems record the position and movement of the target and provide inputs to a processor. The processor is capable of performing mathematical analysis of the movement of the target to determine the positional shift of the patient. Weighted averages, phase correlation, Fourier-Mellin algorithms, and cross-correlation of data related to X-Y translation are used to calculate movement of the target subject. Feedback related to the movement is provided to the medical imaging scanning machine which allows for adjustments in focusing coils for real time tracking of the patient's movements during the procedure. As a result, the medical image scanning procedure becomes more accurate as it is adjusted for the patient's movements.
US07977930B2 Voltage/current control apparatus and method
A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
US07977925B2 Systems and methods involving starting variable speed generators
An exemplary method for starting a generator, the method comprising, starting a rotor with an AC voltage across the rotor. Starting a stator. Increasing a speed of the rotor.
US07977922B1 Battery charger for aircraft emergency egress batteries
A battery charger includes one or more channels for independently charging one or more batteries at different current levels. The battery charger also includes multiple modes for each channel for charging a battery with a continuous current or a pulse current. The battery charger supplies charging current by holding the charging voltage at a set value.
US07977921B2 AC-to-DC voltage conversion and charging circuitry
Voltage conversion and charging circuitry and method for converting an alternating current (AC) voltage to a direct current (DC) voltage for charging an energy storage element (e.g., battery or supercapacitor). An output capacitance, which is initially charged quickly for use in the slower charging of a battery, also maintains the charge on an input capacitance which provides power for the charging control circuitry during such charging process. In accordance with a preferred embodiment, the DC charging current is substantially constant during a first time interval following which the DC charging power is substantially constant during a second time interval.
US07977920B2 Voltage-converter circuit and method for clocked supply of energy to an energy storage
The present invention provides a voltage converter circuit for the clocked supplying of energy to an energy storage, based on an input voltage present at an input of the voltage converter circuit. The voltage converter circuit comprises an energy storage and a switch assembly, the switch assembly comprising a first switch and a second switch connected in parallel and coupled to the energy storage. The first switch of the switch assembly exhibits, according to magnitude, a smaller turn-on voltage than the second switch, wherein a control terminal of the first switch is switched such that the first switch is active in a starting phase of the voltage converter circuit in order to supply the energy storage with energy, and wherein a control terminal of the second switch is switched such that the second switch is active after the starting phase in order to supply the energy storage with energy in a clocked manner.
US07977915B2 Method and system for power management
A method for managing power of a power source and a system is disclosed. The method includes determining (404) a power source capacity value for the power source having a plurality of cells. Further, the method includes determining (406) a cell-capacity value for each cell of the plurality of cells. Furthermore, the method includes determining (408) a duty-cycle ratio value for each cell of the plurality of cells according to the determined cell-capacity value of the cell and the power source capacity value. Moreover, the method includes drawing (410) power from each cell of the plurality of cells according to the determined duty-cycle ratio value of the cell to achieve the power source capacity value for the power source.
US07977913B2 Battery pack
A battery pack comprising a rechargeable power source element; an input member for connecting the battery pack to an external power source; an output member for connecting the battery pack to an external device for power supply to the external device a micro-controller for sensing at least one characteristic of an electrical signal from the external power source, and for controlling an output signal at the output member based on the characteristics of the electrical signal.
US07977912B2 Electronic apparatus and battery unit
According to one embodiment, an electronic apparatus includes a main body and a battery unit which supplies power to the main body. The battery unit includes a first battery having a first connecting portion connected to the main body and a second connecting portion provided independent of the first connecting portion, and a second battery connected to the first battery via the second connecting portion. The second connecting portion is configured to be connected to the second battery in two different directions.
US07977910B2 Method of starting a synchronous motor with a brushless DC exciter
A starting method and system for a motor where the motor may be started as an induction motor by applying a magnetizing current to build flux through the stator, with the field current set at the maximum permissible exciter stator current (i.e., the current that will cause rated no-load current in the main field at the transition speed). The motor stator currents will be maintained at a value that allows the motor to generate sufficient breakaway torque to overcome any stiction. At a specific transition speed or after a period of time, the drive will initiate a transition from induction motor control to synchronous motor control by removing the initial magnetizing current, and a field current is then applied to the motor through the DC exciter. Once this transition is completed, the drive may ramp up to the desired speed demand.
US07977907B2 Driving system for mobile robot
In a system for driving a mobile robot having a body, a plurality of legs each comprising a thigh link and a shank link, a first electric motor and a second motor for driving the thigh link in a forwarding direction, a power line connecting a power source to the first and the second motors, and a motor driver that supplies drive voltage to the first and second motors, a booster that boosts the drive voltage to be supplied to the first and second motors is provided such that the booster and the motor driver are installed in the thigh link where the first and second motors are installed, thereby enabling to satisfy both the low-voltage demand and high-voltage demand and to supply drive voltage to the motors effectively.
US07977900B2 Inverter system for vehicle-mounted air conditioner
The object is to provide an inverter system for a vehicle-mounted air conditioner capable of reducing standby power requirements during nonuse. The voltage supply from a communication power source 80 is turned on and off on the basis of a signal from a communication driver 27a and an electric switch is changed over, whereby the voltage supply from a vehicle-mounted battery power source 50 to a DC-DC converter 26 is turned on and off and the voltage supply to a motor-control microcomputer 24 and a gate circuit 22 is turned on and off. As a result of this, during nonuse the operating state of the motor-control microcomputer 24 is shifted to a sleep mode by performing control by a host ECU 60, whereby the voltage supply is suspended and it becomes possible to reduce power consumption.
US07977895B2 Perturbation device for charged particle circulation system
A perturbation device for a charged particle circulation system, capable of readily generating a distribution profile of a perturbation magnetic field, is provided. By partially superposing a perturbation magnetic field on a main magnetic field for circulating charged particles, perturbation is produced in trajectories of the charged particles. Then, the charged particles that have been injected into the charged particle circulation system are captured into a stable circular closed orbit. Using a leakage magnetic field formed of a magnetic field generated by magnetic field generation devices, each including a high-frequency coil, the perturbation magnetic field is generated.
US07977894B1 Programmed start ballast for gas discharge lamps
An electronic ballast has control circuitry to provide a pre-heating signal to the filaments of a gas discharge lamp for a predetermined length of time before the lamp is ignited and, further, cease providing the pre-heating signal after the lamp has been ignited.
US07977892B2 Solid state lighting apparatus
A lighting apparatus includes a solid state lamp including one or more solid state lighting elements, and a power circuit including a current limiting device electrically connected to the lamp. The current limiting device configured to impose a maximum threshold on the current delivered to the lamp, wherein the current limiting device functions as essentially a constant current source. The lighting apparatus includes a housing for the power circuit and lamp, as a module unit.
US07977885B2 High intensity discharge lamp having compliant seal
In certain embodiments, a lamp is provided with an arc envelope including a ceramic, an end member including a material different from the ceramic, and a compliant seal disposed between the end member and the arc envelope. The compliant seal includes a plurality of layers having different thermal expansion characteristics in an order of gradual change between the arc envelope and the end member.
US07977881B2 Plasma display panel
A plasma display panel is provided. The plasma display panel includes a front substrate including an upper dielectric layer, a rear substrate including a lower dielectric layer, and a seal layer between the front substrate and the rear substrate. A length of a longer side of the front substrate is longer than a length of a longer side of the rear substrate, and a length of a shorter side of the front substrate is shorter than a length of a shorter side of the rear substrate. An interval between an end of the front substrate and an end of the upper dielectric layer in a direction crossing the longer side of the front substrate is less than an interval between an end of the front substrate and an end of the upper dielectric layer in a direction crossing the shorter side of the front substrate.
US07977878B2 Photomultiplier and its manufacturing method
The present invention relates to a photomultiplier having a structure for making it possible to easily realize high detection accuracy and fine processing, and a method of manufacturing the same. The photomultiplier comprises an enclosure having an inside kept in a vacuum state, whereas a photocathode emitting electrons in response to incident light, an electron multiplier section multiplying in a cascading manner the electron emitted from the photocathode, and an anode for taking out a secondary electron generated in the electron multiplier section are arranged in the enclosure. A part of the enclosure is constructed by a glass substrate having a flat part, whereas each of the electron multiplier section and anode is two-dimensionally arranged on the flat part in the glass substrate.
US07977875B2 Light emitting display
A light emitting display includes light-emitting devices in which unnecessary layers for the emission operation of the light-emitting device are removed in an emission region, and in a case where a wavelength of a light, of which an interference intensity to the light emitted from an emissive layer constituting the light-emitting device becomes a maximum value at 0 degree of a viewing angle, is λimax and a wavelength of the light becoming a maximum in a light intensity in relation to the light emitted from the emissive layer is λemax, a relationship of λimax<λemax is satisfied, obtaining a light emitting display with a little variation in color over a wide range of viewing angles.
US07977873B2 Electroluminescent device having protective layers for sealing
An EL device includes a substrate; a first electrode layer; an insulating layer having an opening corresponding to a pixel; a first protective layer covering the insulating layer; an organic layer on the first protective layer and the first electrode layer in the opening; a second electrode layer on the organic layer; and a second protective layer on the second electrode layer, wherein the second protective layer covers edges of the organic layer and the second electrode layer and extends to the outside of the forming region of the organic layer and the second electrode layer to contact the first protective layer.
US07977868B2 Active matrix organic light emitting device with MO TFT backplane
A full-color active matrix organic light emitting display including a transparent substrate, a color filter positioned on an upper surface of the substrate, a spacer layer formed on the upper surface of the color filter, a metal oxide thin film transistor backpanel formed on the spacer layer and defining an array of pixels, and an array of single color, organic light emitting devices formed on the backpanel and positioned to emit light downwardly through the backpanel, the spacer layer, the color filter, and the substrate in a full-color display.
US07977865B2 Composite material, material for light-emitting element, light-emitting element, light-emitting device and electronic device
The present invention provides a composite material for a light-emitting element including a high molecular compound having an arylamine skeleton and an inorganic compound showing an electron accepting property to the high molecular compound. The absorption spectrum of the composite material is different from absorption spectra of the high molecular compound and the inorganic compound which each form the composite material. In other words, a composite material having an absorption peak in a wavelength which is seen in the absorption spectra of neither the high molecular compound nor the inorganic compound forming the composite material is superior in carrier transporting and injecting properties and a favorable material. In addition, the composite material can be formed by a wet method such as a sol-gel method, it can be apply to the increase of substrate size easily in a manufacturing process and advantageous industrially.
US07977862B2 Organic light emitting devices
A white organic light emitting device includes an anode; a cathode; and a light emitting region comprising one or more phosphorescent materials that emit red light, one or more phosphorescent materials that emit green light, and one or more fluorescent materials that emit blue light.
US07977859B2 Image display apparatus with particular electron emission region location
Degradation of an electron emission element by irradiation of the positive ion generated inside a panel is suppressed. A deflection electrode is periodically disposed, and the electron emission region of an electron emission element is disposed so as not to include a center line between adjacent deflection electrodes, so that an electron beam trajectory is deflected and bombardment or irradiation of the generated positive ion to the electron emission region is prevented.
US07977858B2 Low-pressure mercury vapor discharge lamp
A low-pressure mercury vapor discharge lamp is provided with a discharge vessel which encloses a discharge space including a filling of mercury and a rare gas in a gastight manner. The discharge vessel further includes an amalgam which communicates with the discharge space. The lamp has a discharge device for maintaining an electric discharge in the discharge vessel. The amalgam includes a bismuth-tin-indium compound having a bismuth (Bi) content in the range between 30≦Bi≦70 wt. %, a tin (Sn) content in the range between 25≦Sn≦67 wt. %, and an indium (In) content in the range between 3≦In ≦5 wt. %.
US07977856B2 Spark plug incorporating a folded packing situated on an outer circumference of a housing for position-oriented installation
A spark plug for an internal combustion engine includes a ground electrode, a center electrode, an insulator, a housing, and a folded packing which is situated on an outer circumference of the housing. The folded packing has: a hollow profile in cross section; a free leg directed outwards; and a support region. The folded packing lies on a contact surface in a support region, and the free leg is situated at an angle to the support region. The folded packing is pressed together during the mounting of the spark plug, and the free leg of the folded packing is designed to bend over in the direction of the support surface during the mounting to provide a diameter enlargement of the folded packing.
US07977849B2 Droplet spray generation device
An electronic drive system for a droplet spray generation device has a droplet generator with a perforate membrane driven by a piezoelectric transducer. An electronic circuit controls a power supply to control the charging of a capacitor to supply a drive signal to the piezoelectric transducer. The electronic circuit is arranged to control the operation of the power amplifier at substantially its resonant frequency.
US07977847B2 Vehicle alternator
The vehicle alternator comprises a rotor. The rotor comprises a first pole core 12, a second pole core 14, a field coil 13, and holders 15 each containing a magnet 16 and disposed between a first claw 123 and a second claw 143. The holder 15 consists of the magnet 16 inserted in a tubular member X having an opening x1/openings x2, and is formed with the tubular member X deformed so as to close the opening x1/openings x2.
US07977841B2 Electric machinery with a conduction winding excited magnetic poles wraps PM magnetic pole
An electric machinery provided with a PM magnetic pole wrapped by conduction winding excited magnetic poles is related to an innovative design of having a PM magnetic pole wrapped by individual magnetic poles of conduction winding excited so to prevent the PM magnetic pole from falling off due to vibration and to prevent from weakening magnetic force by inverse excitation when the electric machinery is running.
US07977840B2 Stator winding for a slotless motor
A stator winding for a slotless motor is formed by winding a magnet wire 22 into a single layer coil 24. The coil 24 is deformed e.g., by pressing, to form a double layer web 26 which is rolled up end to end to form a cylindrical stator winding 20. The coil 24 is divided into a number of phase windings 27 extending between connection tappings 25. The magnet wire 22 is a multi-core magnet wire formed from a plurality of core wires 23. Each core wire 23 is an insulated single core wire. Optionally the core wires are twisted together. The core wires 23 are electrically connected together at the connection tappings 25 to form a plurality of parallel electrical paths or sub-windings.
US07977837B2 Rotary body used for energy storage apparatus, method of manufacturing rotary body, and energy storage apparatus
A rotary body used in an energy storage device and capable of storing a large amount of external energy is provided in an energy storage device that stores external energy as the energy of the rotary motion of the rotary body for which the frictional resistance of the bearing parts has been reduced to a high degree using the fishing effect of superconductivity. The rotary body is used in an energy storage device capable of storing energy by rotating the rotary body for which the frictional resistance of the bearing parts having floating support that makes use of the fishing effect of superconductivity has been made very small. The rotary body is made of CFRP, and the required compressive stress is applied to it in the direction opposite to the centrifugal force of the rotary body when rotating. The rotary body has a bar-like structure elongated in the direction of the centrifugal force when the rotary body rotates.
US07977836B2 Single bearing motor with magnetic element
A single bearing motor comprises a fan blade set, a motor set and a fan blade base. The fan blade set has a fan blade hub to join with a spindle fitting with a bearing on the outside thereof. The motor set is attached to the fan blade base and a hollow axial seat is provided in the center of the fan blade base to receive the bearing. Further, magnetic elements are disposed at the axial seat to avoid internal clearances being created for lack of a preset pressure acting on the bearing casing and balls therein. The balls and the bearing itself can run smoothly to effectively enhance motor operation.
US07977835B2 Electric motor cooling module having bearing structure nested directly in a brush and connector unit that is mounted directly to a cover of a shroud
A cooling module includes a shroud (38) having an integral cover (42). The cover receives a bearing structure (40). A fan (36) is provided for moving air. A rotor and stator assembly (30) has an opened end and includes a stator (29) having permanent magnets. A rotor (31) includes a lamination stack (16), windings (21), a commutator (20); and a shaft (18). The rotor is associated with the stator so as to rotate with respect thereto. One end (34) of the shaft is coupled with the fan and another end (39) of the shaft is received by the bearing structure. A brush and connector unit (52) is associated with the cover of the shroud and includes brushes (58) associated with the commutator, and an electrical connector (62). The cover covers the opened end of the rotor and stator assembly and covers at least a portion of a brush and connector unit.
US07977834B2 Vibration motor
A vibration motor is provided, comprising a case having an upper case and a lower case which are coupled to each other; a shaft installed in the case while being supported by the case; a rotor rotatably coupled with the shaft; a stator arranged around the shaft; a first substrate installed on an upper surface of the lower case; and a second substrate coupled to a lower surface of the lower case and electrically connected to the first substrate. The lower case has a first opening and the first substrate is electrically connected to the second substrate through the first opening.
US07977832B2 Cooling system for a motor and associated electronics
A cooling system is provided for an electric motor having control circuitry and including a motor housing surrounding the motor. The motor drives at least one radial fan at one end thereof for directing airflow through the motor housing across the motor. A fan housing encloses the cooling fan and defines a diverter chamber radially outboard of the fan that is sized to divert a portion of the airflow away from the electric motor. A control box contains the control circuitry and includes a base having a heat sink for contacting the control circuitry. The base defines a plenum in communication with the diverter chamber and a channel in communication with the plenum and the heat sink to direct the diverted airflow across the heat sink.
US07977831B2 Electromotor
An electromotor has an external stator, and a ventilator vessel which is used to produce a cooling air flow for self-ventilation of the electromotor. In order to improve the cooling of an electromotors, it is proposed to use a ventilator vessel to help direct an air flow along the outer surface of the motor housing, through the inside of the housing of the electromotor and through an air gap formed between the motor housing wall and ventilator vessel.
US07977830B2 Structure for mounting vehicle driving apparatus
A mounting structure for a vehicle driving apparatus includes a housing fixed to a vehicle body and including a first internal space and a second internal space formed below the first internal space in the state of being separated from the first internal space; a motor generator provided in the first internal space of the housing; an inverter provided in the second internal space of the housing; and a terminal electrically connecting the motor generator and the inverter. Oil used for cooling the motor generator is stored in the bottom of the first internal space. The portion in the terminal located in the first internal space is located above the highest liquid level of the oil stored in the first internal space.
US07977829B2 Housing of an electrical machine comprising cooling channels extending in a housing wall
The invention relates to a housing (2) for an electrical machine (1), said housing comprising a housing wall (3) having an inner surface (4). At least two cooling channels (15) extend inside the housing wall. A connecting deviation channel (16) is provided between two of the cooling channels (15). The inventive housing is also provided with an inner sealing ring (18) applied to the inner surface (4). The housing wall (3) comprises at least one housing recess (17) on the inner surface (4) thereof, in the region of the inner sealing ring (18), such that, together with the inner sealing ring (18), it forms the deviation channel (16).
US07977824B2 Switching device, use thereof and a method for switching
A device for switching in and out a load with respect to an alternating voltage feeder has two mechanical switches connected in series in a current path between the load and the feeder and each having a by-pass branch with at least one member with ability to block current therethrough in at least a blocking direction and conduct current therethrough in at least one direction. A unit is adapted to control a procedure of a switching out and switching in by synchronization with the current in the feeder and the voltage of the feeder, respectively.
US07977821B2 High power density switch module with improved thermal management and packaging
A semiconductor power device, e.g., an Insulated Gate Bi-polar Transistor (IGBT) or a Metal-Oxide Field Effect Transistor (MOSFET) may be constructed in a reusable and repairable cost-effective sealed shell. The switch may be provided with direct-pressure-contact caps which may perform as electrical conductors for a semiconductor die of the switch and also as thermal heat-sink contacts for the device. The switch may be provided with internal self-powered gate driving control and PHM incorporated in sealed shell. Embodiments of the switch may be constructed with no external gating/PHM connection pin penetrations through the shell.
US07977817B2 Method for pulse width modulated control of a plurality of load elements
Disclosed is a method for pulse width modulated control of a plurality of load elements, particularly during supply of the load elements from a common supply system in motor vehicles. The load elements are controlled in a time staggered manner with respect to one another, more particularly in a phase staggered manner within a common pulse width. Switch loads and high frequency interferences in the supply lines and the corresponding emissions can thus be reduced. The invention also discloses a circuit arrangement in which a corresponding phase staggered control is achieved with only one counter.
US07977812B2 Electric power system for vehicle
An ECU in an electric power system for a vehicle controls a DC-DC converter so that an alternator transmits a residual generated electric power to a sub battery while a terminal voltage of a main battery is maintained within an optimally specified voltage range. This residual generated electric power is obtained by subtracting from a maximum generating electric power of the alternator an electric power to be consumed by electric loads and an electric power with which the main battery is charged. This can suppress any fluctuation of the voltage of electric power of the electric power system, namely, the output voltage of the alternator and the voltage of the main battery, and perform a maximum regenerative electric power generation. The sub battery is efficiently changed with the regenerative electric power.
US07977810B2 Signal coupling apparatus for power line communications using a three-phase four-wire power line
A signal coupling apparatus for power line communications includes an impedance matching transformer and a transmission mode control circuit for high data rate power line communications on a three-phase four-wire distribution line. Therefore, it is possible to improve the efficiency of power line communications, to minimize signal loss, and to construct an optimal high voltage distribution path.
US07977796B2 Semiconductor device and multilayer wiring board
A gas or an insulating material having a relative dielectric constant of not more than 2.5 on average is interposed between a first wiring layer and a second wiring layer included in a multilayer wiring structure. Between a wiring of the first wiring layer and a wiring of the second wiring layer, a conductive connector is arranged. Between a predetermined wiring of the first wiring layer and a predetermined wiring of the second wiring layer, an insulating heat conductor having a relative dielectric constant of not more than 5 is arranged.
US07977792B2 Semiconductor device
A semiconductor device including a first insulating layer having a hydroxyl radical formed over a semiconductor substrate; a line layer having a plurality of line patterns formed over the first insulating layer, the plurality if line patterns being arranged such that a spatial gap is provided therebetween; a fluorine-doped second insulating layer formed in the spatial gap between respective line patterns; and a multilayered diffusion prevention layer including a first oxide layer for suppressing an increase of a dielectric constant between the plurality of line patterns and a second oxide layer for preventing the diffusion of fluorine from the fluorine-doped second insulating layer into the first insulating layer.
US07977785B2 Electronic device including dies, a dielectric layer, and a encapsulating layer
An electronic device and a method of packaging an electronic device are disclosed. In one embodiment, the electronic device can include a first die. The electronic device can also include a dielectric layer defining a first opening. The first die can be disposed within the first opening. Further, the electronic device can include an encapsulating material disposed adjacent to the first die. The encapsulating material can have a different composition as compared to the dielectric layer. In a particular embodiment, the electronic device can also include an electrically conductive carrier contacting the dielectric layer and the encapsulating material.
US07977784B2 Semiconductor package having redistribution layer
A semiconductor package and a method for making the same, whereby the semiconductor package includes a substrate, a first passivation layer, a first metal layer, a second passivation layer, and second and third metal layers. The substrate has a surface having at least first and second pads. The first passivation layer covers the surface of the substrate and exposes the first pad and the second pad. The first metal layer is formed on the first passivation layer and is electrically connected to the second pad. The second passivation layer is formed on the first metal layer and exposes the first pad and part of the first metal layer. The second metal layer is formed on the second passivation layer and is electrically connected to the first pad. The third metal layer is formed on the second passivation layer and is electrically connected to the first metal layer.
US07977783B1 Wafer level chip size package having redistribution layers
A wafer level chip size package (WLCSP) and a method of manufacturing the same are disclosed. Lands are formed at the ends of redistribution layers. The redistribution layers excluding the lands and a first dielectric layer are covered with a second dielectric layer. After forming a first under bump metallurgy (UBM) layer on the land, a solder ball is reflowed to the first UBM layer. A second UBM layer is widely formed on the entire second dielectric layer that is the outer circumference of the first UBM layer and is connected to the redistribution layer through a via-hole. Therefore, the second UBM layer having a large area can be used as a ground plane or a power plane. In addition, the second UBM layer can electrically connect the redistribution layers physically separated from each other. Therefore, the plurality of redistribution layers can cross each other without being electrically shorted with each other.
US07977778B2 Integrated circuit package system with interference-fit feature
An integrated circuit package system is provided including forming an integrated circuit die, forming an interference-fit feature in the integrated circuit die, fitting a support element within the interference-fit feature, connecting an external interconnect and the integrated circuit die, and encapsulating the integrated circuit die.
US07977777B2 Lead frame thermoplastic solar cell receiver
A lead frame thermoplastic package for a solar cell, and a method of manufacturing the same. The lead frame being either a single-lead frame design or a dual-lead frame design. The single-lead frame design being made up of a single-lead metal frame. The dual-lead frame design being made up of a die pad lead frame, a wire bond lead frame, and being encapsulated in a thermoplastic resin. Optionally, the single lead frame or at least one of the dual-lead frames is coated with a dielectric material. The lead frame providing connections for a semiconductor die, a diode, and the associated electrical connections. The lead frame also providing a large surface area metal pad for cooling, and mounting tabs for securing various optics systems to the package. Optionally, the lead frame is incorporated into a solar cell including the lead frame, a semiconductor die, a diode, an optics system, and an integrated electrical connection system.
US07977771B2 Semiconductor device and method of manufacturing semiconductor device
The semiconductor device according to the present invention includes: a semiconductor chip including a wire and a passivation film formed on the outermost surface with an opening partially exposing the wire; a resin layer stacked on the semiconductor chip and provided with a through-hole in a position opposed to a portion of the wire facing the opening; and a pad formed on a peripheral portion of the through-hole in the resin layer and in the through-hole so that an external connection terminal is arranged on the surface thereof. The peripheral portion of the resin layer is formed more thickly than the remaining portion of the resin layer other than the peripheral portion.
US07977764B2 Semiconductor device
A semiconductor device that includes a metal fuse which may be used for redundancy or trimming, allowing for adjustment in the characteristics of a circuit. The fuse includes a disconnecting metal, a plurality of metal-vias that are connected under respective ends of the disconnecting metal, and a plurality of interconnections that connect to the disconnecting metal through respective metal-vias. The disconnecting metal is disconnected by a laser exposure and the metal-vias are located inside of the spot diameter of the laser used for the laser exposure, and are spaced apart from a side surface of the disconnecting metal. The disconnecting metal is formed of a material having a melting point and a boiling point that is lower than the melting point and boiling point of the metal-vias.
US07977763B2 Chip package with die and substrate
A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glass sandwiched substrates. The substrates form the base for mounting semiconductor dies and fabricating the thin film interconnect structure.
US07977760B2 Photoelectric conversion device, its manufacturing method, and image pickup device
A manufacturing method is provided for a photoelectric conversion device in which no plane channeling is produced. The photoelectric conversion device includes a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate that forms an off-angle θ with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°≦θ≦4.5°, and an ion injecting direction for forming a semiconductor region constituting the photoelectric conversion element forms an angle θ to a direction perpendicular to the principal plane within a range of 0°<φ≦45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle α with the two plane direction within a range of 0°<α<90°.
US07977756B2 Semiconductor storage device using magnetoresistive effect element and method of manufacturing the same
A semiconductor storage device includes a semiconductor substrate, a source region, a source line, and a bit line. The source region is formed in an element region formed on the semiconductor substrate. The source line is formed to overlap with the source region in planar view. The bit line is formed on a layer higher than the source line.
US07977753B2 High voltage BICMOS device and method for manufacturing the same
A high voltage BICMOS device and a method for manufacturing the same, which may improve the reliability of the device by securing a distance between adjacent DUF regions, are provided. The high voltage BICMOS device includes: a reverse diffusion under field (DUF) region formed by patterning a predetermined region of a semiconductor substrate; a diffusion under field (DUF) region formed in the substrate adjacent to the reverse DUF region; a spacer formed at a sidewall of the reverse DUF region; an epitaxial layer formed on an entire surface of the substrate; and a well region formed in contact with the DUF region.
US07977752B2 Thin-film semiconductor device, lateral bipolar thin-film transistor, hybrid thin-film transistor, MOS thin-film transistor, and method of fabricating thin-film transistor
In a lateral bipolar transistor including an emitter, a base and a collector which are formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction. In addition, in a MOS-bipolar hybrid transistor formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction.
US07977745B2 Tungsten plug drain extension
A power metal-oxide-semiconductor field effect transistor (MOSFET) cell includes a semiconductor substrate. A first electrode is disposed on the semiconductor substrate. A voltage sustaining layer is formed on the semiconductor substrate. A highly doped active zone of a first conductivity type is formed in the voltage sustaining layer opposite the semiconductor substrate. The highly doped active zone has a central aperture and a channel region that is generally centrally located within the central aperture. A terminal region of the second conductivity type is disposed in the voltage sustaining layer proximate the highly doped active zone. The terminal region has a central aperture with an opening dimension generally greater than an opening dimension of the central aperture of the highly doped zone. An extension region is disposed in the voltage sustaining region within the central aperture of the highly doped active zone.
US07977744B2 Field effect transistor with trench filled with insulating material and strips of semi-insulating material along trench sidewalls
A MOSFET comprises a first semiconductor region having a first surface, a first insulation-filled trench region extending from the first surface into the first semiconductor region, and strips of semi-insulating material along the sidewalls of the first insulation-filled trench region. The strips of semi-insulating material are insulated from the first semiconductor region.
US07977743B2 Alternating-doping profile for source/drain of a FET
A semiconductor device is provided. In an embodiment, the device includes a substrate and a transistor formed on the substrate. The transistor may include a gate structure, a source region, and a drain region. The drain region includes an alternating-doping profile region. The alternating-doping profile region may include alternating regions of high and low concentrations of a dopant. In an embodiment, the transistor is a high voltage transistor.
US07977742B1 Trench-gate MOSFET with capacitively depleted drift region
A trench-gate metal oxide semiconductor field-effect transistor (MOSFET) includes a field plate that extends into a drift region of the MOSFET. The field plate, which is electrically coupled to a source region, is configured to deplete the drift region when the MOSFET is in the OFF-state. The field plate extends from a top surface of a device substrate, which comprises an epitaxial layer formed on a silicon substrate. The field plate has a depth greater than 50% of a thickness of the epitaxial layer. For example, the field plate may extend to a full depth of the drift region. The field plate allows for relatively easy interconnection from the top surface of the device substrate, simplifying the fabrication process.
US07977737B2 Semiconductor device having additional capacitance to inherent gate-drain or inherent drain-source capacitance
A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control electrode and a first electrode. In addition, the semiconductor device has an inherent drain-source capacitance between the first electrode and a second electrode. At least one monolithically integrated additional capacitance is connected in parallel to the inherent feedback capacitance or in parallel to the inherent drain-source capacitance. The additional capacitance comprises a first capacitor surface and a second capacitor surface opposite the first capacitor surface. The capacitor surfaces are structured conductive layers of the semiconductor device on a front side of the semiconductor body, between which a dielectric layer is located and which form at least one additional capacitor.
US07977734B2 SONOS flash memory
A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, comprising: preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easy to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer. Thereby, the short circuit between different memory cells may be avoided.
US07977729B2 Aging device
An aging device according to an embodiment of the present invention includes a semiconductor substrate, first and second diffusion layers provided in a first element region, a floating gate provided above a channel region between the first and second diffusion layers, and a control gate electrode provided beside the floating gate with an interval in the lateral direction. A coupling capacitance between the floating gate and the control gate electrode is larger than a coupling capacitance between the floating gate and the semiconductor substrate.
US07977724B2 Capacitor and method of manufacturing the same comprising a stabilizing member
A capacitor includes a cylindrical storage electrode formed on a substrate. A ring-shaped stabilizing member encloses an upper portion of the storage electrode to structurally support the storage electrode and an adjacent storage electrode. The ring-shaped stabilizing member is substantially perpendicular to the storage electrode and extends in a direction where the adjacent storage electrode is arranged. A dielectric layer is formed on the storage electrode. A plate electrode is formed on the dielectric layer.
US07977719B2 Magneto-resistance effect element and magnetic memory
It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer. When the second magnetization pinned layer is made of ferromagnetic material including Co, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Rh, Ag, and Au; when the second magnetization pinned layer is made of ferromagnetic material including Fe, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Rh, Pt, Ir, Al, Ag, and Au; and when the second magnetization pinned layer is made of ferromagnetic material including Ni, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Au, and Ag.
US07977718B2 Image sensor photodiodes using a multi-layer substrate and contact method and structure thereof
The present invention relates to a photodiode of an image sensor using a three-dimensional multi-layer substrate, and more particularly, to a method of implementing a buried type photodiode and a structure thereof, and a trench contact method for connecting a photodiode in a multi-layer substrate and a transistor for signal detection.
US07977717B1 Pixel sensing circuit
Systems and methods of pixel sensing circuits. In accordance with a first embodiment of the present invention, a pixel sensing circuit includes a floating diffusion functionally coupled to and surrounded by a ring transfer gate. The ring transfer gate is functionally coupled to and surrounded by a photo diode. The photo diode may be surrounded by a region of poly silicon. The disclosed structure provides radiation hardening and low light performance.
US07977715B2 LDMOS devices with improved architectures
An LDMOS device includes a substrate of a first conductivity type, an epitaxial layer on the substrate, a buried well of a second conductivity type opposite to the first conductivity type in a lower portion of the epitaxial layer, the epitaxial layer being of the first conductivity type below the buried layer. The device further includes a field oxide located between a drain and both a gate on a gate oxide and a source with a saddle shaped vertical doping gradient of the second conductivity type in the epitaxial layer above the buried well such that the dopant concentration in the epitaxial layer above the buried well and below a central portion of the field oxide is lower than the dopant concentration at the edges of the field oxide nearest the drain and nearest the gate.
US07977714B2 Wrapped gate junction field effect transistor
A wrapped gate junction field effect transistor (JFET) with at least one semiconductor channel having a first conductivity type doping is provided. Both sidewalls of each of the at least one semiconductor channel laterally abuts a side gate region having a second conductivity type doping, which is the opposite of the first conductivity doping. Further, the at least one semiconductor channel vertically abuts a top gate region and at least one bottom gate region, both having the second conductivity type doping. The gate electrode, which comprises side gate region, the top gate region, and at least one bottom gate regions, wraps around each of the at least one semiconductor channel to provide tight control of the current, i.e., a low off-current, through the at least one semiconductor channel. By employing multiple channels, the JFET may provide a high on-current.
US07977713B2 Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making
Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described.
US07977712B2 Asymmetric source and drain field effect structure
A semiconductor structure, such as a CMOS semiconductor structure, includes a field effect device that includes a plurality of source and drain regions that are asymmetric. Such a source region and drain region asymmetry is induced by fabricating the semiconductor structure using a semiconductor substrate that includes a horizontal plateau region contiguous with and adjoining a sloped incline region. Within the context of a CMOS semiconductor structure, such a semiconductor substrate allows for fabrication of a pFET and an nFET upon different crystallographic orientation semiconductor regions, while one of the pFET and the nFET (i.e., typically the pFET) has asymmetric source and drain regions.
US07977711B2 Pixel sensor cell for collecting electrons and holes
The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
US07977706B2 Tri-gate field-effect transistors formed by aspect ratio trapping
Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.
US07977703B2 Nitride semiconductor device having a zinc-based substrate
A nitride semiconductor device includes a semiconductor substrate; a first nitride semiconductor layer provided on the semiconductor substrate; a mask layer having opening portions, provided on the first nitride semiconductor layer; a second nitride semiconductor layer selectively grown on the mask layer laterally from the opening portions; and a semiconductor lamination portion formed by laminating nitride semiconductor layers so as to form a semiconductor element on the second nitride semiconductor layer. The substrate may be made of a zinc-based compound, the first nitride semiconductor layer may be provided on, and in contact with, the substrate, and at least a substrate side of the first nitride semiconductor layer may be made of AlyGa1-yN (0.05≦y≦0.2). Additionally, the semiconductor element may be a light emitting layer in which case the mask layer may include a metal film provided on the first nitride semiconductor layer and an insulating film provided on the metal film.
US07977701B2 Semiconductor device with SiO2 film formed on side surface of nitride based semiconductor layer
A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.
US07977699B2 Light emitting device package and manufacture method of light emitting device package
A light emitting device package and a method of manufacturing the light emitting device package are provided. A base is first provided and a hole is formed on the base. After a light emitting portion is formed on the base, a mold die is placed on the light emitting portion and a molding material is injected through the hole. The mold die is removed to complete the package.
US07977697B2 Light emitting device
The present invention provides a light emitting device which comprises a light emitting element, a mounting board on which the light emitting element is mounted, a metal-made reflector surrounding the side surfaces of the light emitting element on the mounting board, a conductor for electrically connecting the light emitting element with the mounting board, and a sealing resin fitted within the reflector to cover and seal the light emitting element and the conductor. The mounting board includes a metal-made base board, and an insulating board laminated on the base board and formed with a window hole extending therethrough which is larger than the outer periphery of the light emitting element. A mount for carrying the light emitting element thereon is disposed on the base board within the window hole with a clearance defined from side surfaces of the window hole. The conductor straddles the clearance, and electrically connects the wiring pattern formed on the insulating board with the light emitting element and the mount. Then, part of the clearance associated with the area that projects from the conductor to the mounting board is narrower than the rest of the clearance.
US07977695B2 Semiconductor light emitting device and method for manufacturing the same
Disclosed is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a first conductive semiconductor layer comprising a first concave-convex pattern, a second concave-convex pattern on at least one pattern of the first concave-convex pattern, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer.
US07977689B2 Backlight device for liquid crystal display including a plurality of light emitting diodes within their own concaves aligned in a straight line within a larger concave
A semiconductor light emitting device of the present invention includes a plurality of light emitting elements, a package body for storing the light emitting elements, wiring patterns being electrically connected to the light emitting elements, and Au wires for electrically connecting the light emitting elements and the wiring patterns, the package body including mounting concave portions for storing the respective light emitting elements, and storing concave portion for storing the mounting concave portions and the Au wires, the mounting concave portions being aligned on a linear line and spaced from each other with an equal pitch. In the above arrangement, as the semiconductor light emitting device of the present invention, it is possible to provide a semiconductor light emitting device having a high directional characteristic of emitted light, and a backlight device for a liquid crystal display, the backlight device using the semiconductor light emitting device and having an improved brightness of the emitted light.
US07977684B2 Light emitting package having screen layer
The present invention discloses a light emitting device package, comprising: a metal base; an electrical circuit layer provided at an upper side of the metal base for providing a conductive path; a light emitting device mounted in a second region having a smaller thickness than a first region on the metal base; an insulating layer sandwiched between the meta base and the electrical circuit layer; an electrode layer provided at an upper side of the electrical circuit layer; and a wire for electrically connecting the electrode layer and the light emitting device. Further, there is provided a light emitting device package which is improved in light emission efficiency since the light emitting device is placed on a small thickness portion of the metal base.
US07977682B2 Light emitting device
Provided is a compound light emitting device which facilitates easy connection of power supply lines, and has a high emission intensity in-plane uniformity. The light emitting device includes a first-conduction-type cladding layer, active layer structure, and second-conduction-type cladding layer each containing a III-V compound semiconductor. The first-conduction-type cladding layer and second-conduction-type cladding layer sandwich the active layer structure. The light emitting device includes a first-conduction-type-side electrode (7) for injecting carriers into the first-conduction-type cladding layer, and a second-conduction-type-side electrode (6) for injecting carriers into the second-conduction-type cladding layer. The first-conduction-type-side electrode (7) has an opening (7p). The second-conduction-type-side electrode (6) has a main-electrode-portion (6-0) partially surrounded by the first-conduction-type-side electrode (7), and extracting portions (6-1, 6-2) for extracting the main-electrode-portion (6-0) outside the first-conduction-type-side electrode (7) though the opening (7p). The main-electrode-portion (6-0) is a part of a constant-width figure. The interval between the outer edge of the main-electrode-portion (6-0) and the inner edge of the first-conduction-type-side electrode (7) is almost constant.
US07977678B2 Semiconductor display device
A semiconductor display device using a light-emitting element, which can suppress luminance unevenness among pixels due to the potential drop of a wiring, is provided. Power supply lines to which a power supply potential is supplied are electrically connected to each other in a display region where a plurality of pixels are arranged. Further, an interlayer insulating film is formed over a wiring (an auxiliary power supply line) for electrically connecting the power supply lines to each other in the display region and a gate electrode of a transistor included in a pixel; and the power supply lines are formed over the interlayer insulating film which is formed over the auxiliary power supply line and the gate electrode. Furthermore, a wiring (an auxiliary wiring) formed over the interlayer insulating film is electrically or directly connected to the auxiliary power supply line.
US07977675B2 Semiconductor device and method for manufacturing the same
A metallic oxide semiconductor device with high performance and small variations. It is a field effect transistor using a metallic oxide film for the channel, which includes a channel region and a source region and comprises a drain region with a lower oxygen content than the channel region in the metallic oxide, in which the channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.
US07977674B2 Phase change memory device and method of fabricating the same
A phase change memory device and a method of fabricating the same are provided. A phase change material layer of the phase change memory device is formed of germanium (Ge)-antimony (Sb)-Tellurium (Te)-based Ge2Sb2+xTe5 (0.12≦x≦0.32), so that the crystalline state is determined as a stable single phase, not a mixed phase of a metastable phase and a stable phase, in phase transition between crystalline and amorphous states of a phase change material, and the phase transition according to increasing temperature directly transitions to the single stable phase from the amorphous state. As a result, set operation stability and distribution characteristics of set state resistances of the phase change memory device can be significantly enhanced, and an amorphous resistance can be maintained for a long time at a high temperature, i.e., around crystallization temperature, and thus reset operation stability and rewrite operation stability of the phase change memory device can be significantly enhanced.
US07977673B2 Semiconductor layer with a Ga2O3 system
To provide a semiconductor layer in which a GaN system epitaxial layer having high crystal quality can be obtained.The semiconductor layer includes a β-Ga2O3 substrate 1 made of a β-Ga2O3 single crystal, a GaN layer 2 formed by subjecting a surface of the β-Ga2O3 substrate 1 to nitriding processing, and a GaN growth layer 3 formed on the GaN layer 2 through epitaxial growth by utilizing an MOCVD method. Since lattice constants of the GaN layer 2 and the GaN growth layer 3 match each other, and the GaN growth layer 3 grows so as to succeed to high crystalline of the GaN layer 2, the GaN growth layer 3 having high crystalline is obtained.
US07977671B2 Compound having oxadiazole ring structure substituted with pyridyl group and organic electroluminescence device
The present invention relates to a compound having an oxadiazole ring structure having a substituted pyridyl group connected thereto, represented by the following general formula (1). According to the present invention, it becomes possible to provide an organic compound having excellent characteristic of high stability in a thin film state, and the emission efficiency and durability of conventional organic EL devices can be remarkably improved.
US07977668B2 Multilayer structure with zirconium-oxide tunnel barriers and applications of same
A multilayer structure with zirconium-oxide tunnel barriers. In one embodiment, the multilayer structure includes a first niobium (Nb) layer, a second niobium (Nb) layer, and a plurality of zirconium-oxide tunnel barriers sandwiched between the first niobium (Nb) layer and the second niobium (Nb) layer, wherein the plurality of zirconium-oxide tunnel barriers is formed with N layers of zirconium-oxide, N being an integer greater than 1, and M layers of zirconium, M being an integer no less than N, such that between any two neighboring layers of zirconium-oxide, a layer of zirconium is sandwiched therebetween.
US07977667B2 Memory cell that includes a carbon nano-tube reversible resistance-switching element and methods of forming the same
Methods of forming planar carbon nanotube (“CNT”) resistivity-switching materials for use in memory cells are provided, that include depositing first dielectric material, patterning the first dielectric material, etching the first dielectric material to form a feature within the first dielectric material, depositing CNT resistivity-switching material over the first dielectric material to fill the feature at least partially with the CNT resistivity-switching material, depositing second dielectric material over the CNT resistivity-switching material, and planarizing the second dielectric material and the CNT resistivity-switching material so as to expose at least a portion of the CNT resistivity-switching material within the feature. Other aspects are also provided.
US07977663B2 Semiconductor light-emitting device with a highly reflective ohmic-electrode
A semiconductor light-emitting device includes a multilayer semiconductor structure on a conductive substrate. The multilayer semiconductor structure includes a first doped semiconductor layer situated above the conductive substrate, a second doped semiconductor layer situated above the first doped semiconductor layer, and/or an MQW active layer situated between the first and second doped semiconductor layers. The device also includes a reflective ohmic-contact metal layer between the first doped semiconductor layer and the conductive substrate, which includes Ag, and at least one of: Ni, Ru, Rh, Pd, Au, Os, Ir, and Pt; plus at least one of: Zn, Mg Be, and Cd; and a number of: W, Cu, Fe, Ti, Ta, and Cr. The device further includes a bonding layer between the reflective ohmic-contact metal layer and the conductive substrate, a first electrode coupled to the conductive substrate, and a second electrode coupled to the second doped semiconductor layer.
US07977662B2 Phase-changeable memory devices having reduced susceptibility to thermal interference
A non-volatile memory array includes an array of phase-changeable memory elements that are electrically insulated from each other by at least a first electrically insulating region extending between the array of phase-changeable memory elements. The first electrically insulating region includes a plurality of voids therein. Each of these voids extends between a corresponding pair of phase-changeable memory cells in the non-volatile memory array and, collectively, the voids form an array of voids in the first electrically insulating region.
US07977659B2 Radio frequency screen assembly for microwave cavities
A luminaire assembly comprising at least one magnetron, a least one microwave-powered bulb, a luminaire reflector, at least one waveguide, and a radio-frequency screen assembly is provided. The radio-frequency screen assembly, the radio frequency gasket, and the luminaire reflector are configured to form a microwave cavity that can accommodate a microwave-powered bulb. The at least one waveguide is configured to couple energy from the at least one magnetron to the microwave-powered bulb. The radio-frequency screen accommodates at least one latching structure. The at least one latching structure is configured to sufficiently compress or to release the radio-frequency screen and the luminaire assembly. In another embodiment, a radio-frequency screen assembly comprises a frame which comprises an opening defined by a plurality of edges. The frame comprises a planar portion and further comprises a ridge at one of the edges that extends in a direction perpendicular to the planar portion.
US07977658B2 Flexible infrared delivery apparatus and method
A flexible infrared delivery apparatus useful for endoscopic infrared coagulating of human or animal blood and tissue or for other uses employs a source of infrared radiation which is not a laser and an elongated flexible fiber optic member which transmits radiation from the source to a contact portion at a distal end of the member and to a material such as human or animal tissue proximate the contact portion. The elongated member has an outer diameter which enables it to be inserted into and through an accessory channel of an endoscope to view the human or animal tissue or material to be treated with infrared radiation. A connector on the proximal end of the member allows the elongated member to be quickly connected to and disconnected from the apparatus where the member is aligned for receiving infrared radiation from the source. The contact portion defines a size, direction and shape of a radiation delivery area from the member to the human or animal tissue or material proximate the contact portion.
US07977657B2 Ion radiation therapy system with distal gradient tracking
An ion radiation therapy machine provides a control of the range of the ion beam that a Bragg peak of the beam is located according to a determined gradient of the dose plan.
US07977655B2 Method and system of monitoring E-beam overlay and providing advanced process control
A method for monitoring overlay of a direct-write system. The method includes providing a substrate having a pattern formed thereon by the direct-write system, generating data associated with the substrate pattern, decomposing the data by applying a transformation matrix, and determining an overlay index based on the decomposed data, the overlay index corresponding to a variation component of the substrate pattern relative to a target pattern.
US07977644B2 Portable radiation detector
There is provided a portable radiation detector including: a housing; a wireless communication section accommodated in the housing, and carrying out wireless communication of image data of a detected radiation image; a cable whose one end portion is connected to the housing; a connector provided at another end portion of the cable, and able to be connected to an external device; and a connector holding mechanism provided at the housing, and holding the connector removably at the housing.
US07977643B2 Radiation detector assembly, radiation detector, and method for radiation detection
An assembly for detecting radiation is described. The assembly includes a host matrix with particles suspended within the host matrix. The particles are capable of generating a charge carrier upon interaction with the radiation. A first electrode is disposed adjacent to a first surface of the host matrix, and a second electrode disposed adjacent to a second surface of the host matrix. A power source operatively connects to one of the first or second electrodes. The power source establishes an electric field between the first and second electrodes such that a ratio of a mobility-lifetime-field strength product of the charge carrier to the thickness of the host matrix is greater than or equal to 0.1. A radiation detector and a method for detecting radiation are also described.
US07977642B2 Imaging apparatus
An imaging apparatus for x-rays includes a scintillator, overlying an array of imaging pixels on a substrate, and at least one trigger pixel array externally peripheral to the array of imaging pixels on the substrate such that the trigger pixel array is not substantially overshadowed by the scintillator from incident x-ray radiation. A layer substantially impervious to light but transparent to x-rays overlays the trigger pixel array, such that the trigger pixels are unresponsive to light but triggered by direct hits from incident x-ray photons.
US07977636B2 Infrared imaging using thermal radiation from a scanning probe tip
A method for performing sub-micron optical spectroscopy, using a heated SPM probe and far-field collection optics is described. The enhanced emission characteristics at a sharp heated tip constitute a highly localized wideband IR source. Thus the IR absorption and emission properties of a sample surface adjacent can be observed and measured in the farfield even though the interaction region is sub-micron in scale. . . . providing spatial resolution mapping of sample composition.
US07977633B2 Phase plate, in particular for an electron microscope
The invention concerns a phase plate, in particular for an electron microscope, which is disposed in an electron beam path (4), comprises at least one thin film (8, 8a-h), which thin film is at least partially permeable to electron beams, wherein the thin film (8, 8a-h) comprises electrically conductive material, is connected to a predeterminable electrical voltage (12, 12a-e) and is equipped with at least one through-hole (9, 9a-c).
US07977632B2 Scanning electron microscope
To make it possible to observe the bottom of a contact hole and internal wires, in observation of the contact hole 102, by scanning it at a predetermined acceleration voltage, the positive charge 106 is formed on the surface of the insulator 101, and the secondary electrons 104 are attracted in the hole by this electric field, and the hole is continuously scanned at an acceleration voltage different from the acceleration voltage, and the sample is observed. When the wires embedded in the insulator are to be observed, by observing the insulator at a predetermined acceleration voltage, an electron beam is allowed to enter the sample, and the sample is continuously scanned at an acceleration voltage different from the acceleration voltage, and hence the existence of wires is reflected as a change in the charge of the surface, and it is observed. In either case, the acceleration voltage before observation is different from the one during observation, and the sample surface is temporarily radiated at an acceleration voltage positively generating a positive or negative charge, and thereafter, the acceleration voltage is returned to a one suited to observation, and the sample is observed.
US07977631B2 Method for obtaining images from slices of specimen
The invention relates to a method for obtaining images from slices of a specimen, the method comprising: repeatedly obtaining an image of the surface layer of the specimen (1) and removing the surface layer of the specimen, thereby bringing the next slice to the surface; characterized in that after at least one of the removals of a surface layer the specimen is exposed to a staining agent. This method is especially suited for use in a particle-optical instrument equipped with both a scanning electron microscope column (20) and a focused ion beam column (10).The specimen can e.g. be stained in situ by admitting a gas, such as OsO4 (osmiumtetroxide), to the specimen. This method also makes it possible to perform differential staining by first making an image of the specimen exposed to a first staining agent, and subsequently making an image of the specimen when it is additionally stained by a second staining agent.
US07977628B2 System and method for reducing particles and contamination by matching beam complementary aperture shapes to beam shapes
An ion implantation system comprising an ion source configured to generate an ion beam along a beam path, a mass analyzer is located downstream of the ion source wherein the mass analyzer is configured to perform mass analysis of the ion beam and a beam complementary aperture located downstream of the mass analyzer and along the beam path, the beam complementary aperture having a size and shape corresponding to a cross-sectional beam envelope of the ion beam.
US07977625B2 Method and assembly for optical reproduction with depth discrimination
A method and an assembly for generating optical section images permit the three-dimensional, layered optical scanning of spatially extended objects. Illumination patterns with periodicity in at least one direction are projected into a plane and the light from the sample which is reflected and/or scattered and/or emitted fluorescence light is being imaged onto a spatially resolving detector. Initially, there is a calibration step, in which the local phase and/or the local period of the illumination patterns are determined for each location on the detector. In the sample detection mode, for the calculation of each optical section image there are two illumination patterns projected into or onto the sample and the resulting intensity distributions are used to form an image on the detector.
US07977622B2 Tuning an optical resonator using a feedback signal representing an average DC balanced coding
Various embodiments of the present invention relate to systems and methods for monitoring and tuning detector and modulator resonators during operation. Aspects of the present invention use DC balanced coding of data in optical signals tune and monitor the performance of a resonator. Whether the resonator is being used as a modulator or a detector, the intensity of the light coupled into the resonator is DC balanced and varies as a function of the data being transmitted. Average intensity variations of the light scattered from the resonator are converted into an electronic feedback signal, which is used to determine appropriate levels of thermal and electronic tuning applied to the resonator.
US07977617B2 Image intensifying device having a microchannel plate with a resistive film for suppressing the generation of ions
An image intensifying device includes a lens that is positioned at a light input that forms an image of a scene. The image intensifying device also includes an image intensifier tube that includes a photocathode that is positioned to receive the image formed by the lens. The photocathode generates photoelectrons in response to the light image of the scene. The image intensifier tube also includes a microchannel plate having an input surface comprising the photocathode. The microchannel plate receives the photoelectrons generated by the photocathode and generating secondary electrons. An electron detector receives the secondary electrons generated by the microchannel plate and generates an intensified image of the scene.
US07977616B2 Microscope equipped with automatic focusing mechanism and adjustment method thereof
Provided is a microscope equipped with an automatic focusing mechanism, comprising an illumination light source; an objective lens for focusing first light emitted from the illumination light source onto an object to be detected; an illumination light source for imaging the first light that is reflected by the object to be detected and passes through the objective lens; and a focal-point detector for detecting a positional shift of a microtiter plate from a focal position of the objective lens, wherein the focal-point detector includes a focal-point-detection light source for emitting focal-point-detection light serving as second light, a focal-point detection light acquisition unit on which the focal-point-detection light is focused, and a region setting unit which can set an in-focus assessable region of the focal-point-detection light acquired by the focal-point detection light acquisition unit to any position on the focal-point detection light acquisition unit.
US07977615B1 Aircraft and missile forebody flow control device and method of controlling flow
A forebody flow control system and more particularly to aircraft or missile flow control systems for enhanced maneuverability and stabilization at high angles of attack. The present invention further relates to a method of operating the flow control system. In one embodiment, the present invention includes a missile or aircraft comprising an afterbody and a forebody; at least one flow effector on the missile or aircraft forebody; at least one sensor having a signal associated therewith, the at least one sensor being positioned to detect flow separation on the missile or aircraft forebody; and a closed loop control system; wherein the closed loop control system is used for activating and deactivating the at least one flow effector based on at least in part the signal of the at least one sensor.
US07977613B2 System and method for roll angle indication and measurement in flying objects
A method for onboard measurement of a deviation in orientation of an object from a desired orientation of the object. The method including: transmitting a polarized RF signal from a reference source, with a predetermined polarization plane: receiving the signal at a pair of polarized RF sensor cavities positioned symmetrical on the object with respect to the predetermined polarization plane: analyzing an output of the pair of polarized RF sensor cavities resulting from the received signal: and determining the deviation in orientation of the object relative to the predetermined plane based on the analysis. The method can further include controlling the object based on the determined deviation in orientation.
US07977612B2 Container for microwaveable food
A container for microwavable food has a main container part for accommodating a food product to be cooked and open from above, a cover covering the main container part from above, and at least one insert accommodated in the container part and provided with a plurality of perforations for placing a food product to be steamed on the insert.
US07977603B2 Method of manufacturing an eyeless suture needle
A method for manufacturing an eyeless needle by which a satisfactory hole can be formed in the end surface of a fine suture needle having a needle diameter less than 150 micrometers is proposed.In a method for manufacturing an eyeless needle by forming a hole for inserting and fixing one end of a suture thread by caulking in the end surface of the eyeless suture needle made of stainless steel, the hole is formed by irradiating the end surface of a needle material thicker by 6 to 20 micrometers than a desired needle diameter of the suture needle less than 150 micrometers with one shot of a laser beam, and subsequently, a portion thicker than the desired needle diameter is removed by electrolytic polishing or chemical polishing.
US07977599B2 Erosion resistant torch
An erosion resistant torch for use in a solid free form fabrication system for manufacturing a component from successive layers of metal feedstock material. The erosion resistant torch includes a torch structure defining a torch nozzle formed of a highly conductive bulk material. The erosion resistant torch further includes a gas flow channel and an orifice defined therein. An arc electrode is disposed within the gas flow channel. An erosion resistant material is disposed between the torch nozzle and the arc electrode in the form of a coating layer or an erosion resistant insert. The erosion resistant material is formed of one of a refractory material or a ceramic material.
US07977594B1 Toggle switch cover adapter
A weatherproof toggle switch cover adapter assembly comprises a cover plate adapted for placement over a toggle switch and coupling with an electrical junction box. A lever rotationally pivotably coupled with the cover plate is in mechanical communication with the toggle switch through a yoke. When the lever is moved to an on position, the toggle switch also moves to an on position. The yoke comprises two opposing tines defining a yoke spanning gap having a perimeter edge, the yoke spanning gap sized to straddle the toggle switch. An adapter ring comprising an external perimeter edge and an internal perimeter edge is interposed between the yoke and the toggle switch. The external perimeter edge is in communication with the perimeter edge of the yoke. The internal perimeter edge is inside two opposing tines and is disposed about an adapter spanning gap sized to straddle the toggle switch.
US07977593B2 Backlighted key for a keypad of an electronic device
The disclosure relates to a key plunger and a key assembly for a key of an electronic device. The plunger comprises: a stalk made of a first material allowing light to pass through and a body section connected to the top of the plinth. In the plunger, the body section is made of a second material and shaped to fit snugly within an interior of a cap for the key and to extend horizontally about the stalk. The second material is a translucent, light-diffusing material; the first material allows more light to pass therethrough than the second material. The key assembly comprises: a key plunger; a key cap shaped to fit over the key plunger; and a backlight to illuminate an interior of the key cap. The backlight may be located underneath the key plunger and to a side of the stalk.
US07977589B2 Measuring contact sequence in a tap changer
A tap changer and a method for measuring a contact sequence of a tap changer is provided. The tap changer includes a cylinder and a shaft that is rotatably arranged inside the cylinder, the cylinder is provided with fixed contacts, the shaft is provided with a contact circuit facing the cylinder and including mechanical contacts, which mechanical contacts are adapted to selectively mate with the fixed contacts of the cylinder upon rotation of the shaft, the contact circuit also includes at least two measuring points for measuring the function of the contact circuit. The tap changer includes at least one measuring contact device, which is electrically connected to the respective measuring points in the contact circuit, and which the measuring contact device is arranged inside the shaft. This facilitates access to the measuring points of the tap changer.
US07977588B2 Load tap changer position sensor
An on-load tap changer position sensor includes a series of radially spaced reed switches and a magnetic indicator that is rotated by a shaft that is coupled directly or indirectly to a load tap changer. As the position of the magnetic indicator changes, the location of the magnetic field created by the magnetic indicator moves. Each reed switch includes a set of contacts that close when in the presence of the magnetic field. The closed contacts create a voltage differential that is detected and used to determine the location of the closed reed switch and thus the position of the on-load tap changer.
US07977585B2 Closed-type motor
A closed-type motor has an elastic grommet with a through-hole into which a lead wire is inserted. The grommet covers an opening portion of a case. An elastic tube is connected to the grommet, and a cover covers the grommet. The grommet includes a pedestal portion abutted to the case; a tubular projection with the through-hole; and an annular groove surrounding a basal portion of the tubular projection. The tubular projection has an internal sectional area being equal to or larger than the one of the lead wire. The tube has an internal sectional area being equal to or larger than the one of the lead wire and has an inner diameter being equal to or less than an outer diameter of the tubular projection. The cover is provided with a central hole having a diameter being equal to or larger than an outer diameter of the tube.
US07977581B2 Shifted segment layout for differential signal traces to mitigate bundle weave effect
An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.
US07977578B2 Tab tape for tape carrier package
A TAB tape for a tape carrier package may have at least one opening formed in a connection portion. The at least one opening may be provided in the connection portion and a portion of the corresponding second lead. The at least one opening may be arranged near a boundary between the corresponding first lead and the connection portion. The at least one opening may be sized to reduce the change of the lead width from the first lead to the second lead.
US07977576B1 Nail deflector
An improved pipe and utility protector comprising a rectangular piece of material composition featuring a down piece having a V-shaped cross-section along a longitudinal centerline, including an angular transition, to an offset mounting flange protruding slightly outward from the crest of the curved V-shape for attaching the embodiment to framing members. The flanges allow pieces to be attached together, joining framing members horizontally, vertically and at various angles throughout structures.
US07977574B2 Cable for high speed data communications
Cables and methods of manufacturing cables for high speed data communications, the cable including: a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer, the inner conductors and the dielectric layers parallel with and along a longitudinal axis; and folded conductive shield material wrapped in a rotational direction along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps along and about the longitudinal axis, the conductive shield material comprising a first conductive layer and second conductive layer separated by an inner-shield dielectric layer.
US07977568B2 Multilayered film-nanowire composite, bifacial, and tandem solar cells
A photovoltaic device includes a substrate having at least two surfaces and a multilayered film disposed on at least a portion of at least one surface of the substrate. Elongated nanostructures are disposed on the multilayered film. The device incorporates a top layer of the multilayered film contacting the elongated nanostructures that is a tunnel junction. The device has at least one layer deposited over the elongated nanostructures defining a portion of a photoactive junction. A solar panel includes at least one photovoltaic device. The solar panel isolates each such devices from its surrounding atmospheric environment and permits the generation of electrical power.
US07977567B2 Photovoltaic module and the use thereof
The present invention relates to a photovoltaic module, comprising at least two component cell groups (SCA) which are connected to each other and disposed on an electrically insulating basic body, which groups comprise respectively one solar cell which is applied on a thermally and electrically conductive carrier and a bypass diode which is applied at a spacing thereto, and which are contacted with each other via an electrical conductor, the bypass diode having a polarity which is inverse to the solar cell and the solar cell and the bypass diode being applied on the conductive carrier via a conductive connecting layer.
US07977559B2 Tone generation system controlling the music system
In a plurality of rooms, hubs are installed to build a star-shaped LAN, and tone-generation-related devices, such as a keyboard, tone generator device and speaker, are connected to the respective hubs. For example, in an internal network, the keyboard is logically connected to an input side of the tone generator device and a speaker is connected to an output side of the tone generator device, so as to build a tone generation system. The tone-generation-related devices are provided with respective network adaptors so that they can be readily connected to the LAN. Communication is carried out between the tone-generation-related devices, using a communication protocol intended for retransmission control. Each of the tone-generation-related devices is in the form of a processor device, which executes a program corresponding to a function of a desired processing element to thereby implement the desired processing element. Once a given tone-generation-related device, implementing a plurality of processing elements, is connected to the network, an internal connection between the processing elements is canceled.
US07977553B1 Maize variety hybrid X7P235
A novel maize variety designated X7P235 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety X7P235 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X7P235 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X7P235, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X7P235. This invention further relates to methods for producing maize varieties derived from maize variety X7P235.
US07977551B1 Maize variety hybrid X7K438
A novel maize variety designated X7K438 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety X7K438 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X7K438 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X7K438, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X7K438. This invention further relates to methods for producing maize varieties derived from maize variety X7K438.
US07977548B1 Soybean variety XB31AB09
According to the invention, there is provided a novel soybean variety designated XB31AB09. This invention thus relates to the seeds of soybean variety XB31AB09, to the plants of soybean XB31AB09 to plant parts of soybean variety XB31AB09 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB31AB09 with another soybean plant, using XB31AB09 as either the male or the female parent.
US07977545B1 Soybean variety XB30H09
According to the invention, there is provided a novel soybean variety designated XB30H09. This invention thus relates to the seeds of soybean variety XB30H09, to the plants of soybean XB30H09 to plant parts of soybean variety XB30H09 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB30H09 with another soybean plant, using XB30H09 as either the male or the female parent.
US07977544B1 Soybean variety RJS49003
According to the invention, there is provided a novel soybean variety designated RJS49003. This invention thus relates to the seeds of soybean variety RJS49003, to the plants of soybean RJS49003 to plant parts of soybean variety RJS49003 and to methods for producing a soybean plant produced by crossing plants of the soybean variety RJS49003 with another soybean plant, using RJS49003 as either the male or the female parent.
US07977537B2 Sclerotinia-resistant brassica
The invention provides Brassica plants and lines having an improved Sclerotinia sclerotiorum Disease Incidence (SSDI %) score and represented by, or descended from, ATCC accession number PTA-6779 or PTA-6778.
US07977532B2 Tampon with clean appearance post use
A catamenial tampon comprises a compressed absorbent member having an inner region and an exterior surface, the compressed absorbent member comprising an absorbent material. An overwrap substantially covers the exterior surface of the compressed absorbent member. The overwrap comprises an apertured fluid pervious material that is hydrophobic or rendered hydrophobic relative to the compressed absorbent member. The fluid pervious overwrap therefore tends to remain free of fluid as the fluid is preferentially partitioned into the absorbent member.
US07977529B2 Incontinence management system and diaper
An incontinence management system for monitoring wetness in one or more absorbent articles, includes input for receiving one or more sensor signals indicative of a presence of wetness in an absorbent article, processor for processing the one or more sensor signals and for performing an analysis of the signals to characterise wetness events occurring in an absorbent article and user interface for communicating with a user of the system. A mathematical model is used to characterise wetness events, receiving as inputs variables derived from sensor signals and optionally, patient and demographic data. The mathematical model can be configured and/or re-configured utilising observation data obtained while monitoring a patient for wetness. A diaper for use with such as system is also disclosed.
US07977528B2 Disposable absorbent article having refastenable side seams and a wetness sensation member
A disposable absorbent article including features facilitating toilet training of a wearer. A wetness sensation member provides a wetness sensation on the wearer's skin upon urination. Highlighting that is visible when viewing a body-facing surface of the article may be associatively correlated with the concept of toilet training and indicates the presence of the wetness sensation member in the article while providing a visual reference and topic for conversation relevant to toilet training. Refastenable side seams enable the configuration, application, and removal of the article as a pair of training pants or as a diaper, while providing an appearance like training pants when the article is worn and allowing easy inspection of the interior of the article without the necessity of pulling the article downward. The synergistic effect of each feature in combination with one or more of the other features enhances the usefulness of the article in toilet training.
US07977524B2 Process for decoking a furnace for cracking a hydrocarbon feed
A process for decoking a convection section of a furnace for cracking a hydrocarbon feed, the furnace comprising a radiant section having burners that generate radiant heat and hot flue gas, and the convection section having at least one heat exchange tube for conveying the hydrocarbon feed. The process includes the step of establishing a flue gas temperature within the convection section of the furnace immediately adjacent the at least one convection section heat exchange tube so as to effect a film surface temperature of less than about 540° C. (about 1000° F.) within at least one convection section heat exchange tube, wherein said flue gas temperature establishing step is effective to decoke the at least one convection section heat exchange tube. A process for cracking hydrocarbon feed in a furnace is also provided.
US07977523B2 Catalyst and process for preparing isoolefins
A catalyst, useful in the preparation of isoolefins and containing 0.1 to 20% by mass of an alkali metal oxide, an alkaline earth metal oxide and mixtures thereof; 0.1 to 99% by mass of aluminum oxide; and 0.1 to 99% by mass of silicon dioxide, is prepared by a) treating an aluminosilicate with an aqueous alkali metal salt solution, an alkaline earth metal salt solution and mixtures thereof, under acidic conditions, to obtain a treated aluminosilicate; and b) calcining the treated aluminosilicate, to obtain the catalyst.
US07977522B2 Process of producing olefins
A process of producing olefins by a metathesis reaction in a practical low temperature range by improving the reactivity of the catalyst is provided.The process of producing olefins according to the present invention allows a metathesis reaction of olefins, which uses a catalyst containing metal elements such as tungsten, molybdenum, rhenium or the like, to proceed at an industrially sufficient reaction rate in a practical low temperature range, by using a compound containing at least one metal element selected from the metals of Group Ia (alkali metals), Group IIa (alkaline earth metals), Group IIb and Group IIIa as co-catalyst and allowing hydrogen gas to co-exist with the reaction raw material.
US07977506B2 Compounds and compositions for delivering active agents
Compounds and compositions for the delivery of active agents are provided. Methods of administration and preparation are provided as well.
US07977503B2 Polymerization inhibition method
The objective of the present invention is to provide a method for inhibiting polymerization of (meth)acrylic acid and the like. By the method, the generation of deposit in a pipe, which is exclusively used for providing a solution of a dialkyldithiocarbamic acid copper salt to a distillation column and the like, is prevented, and the problems such as the clogging of the pipe and polymerization in the distillation column are solved. The method according to the present invention for inhibiting polymerization of (meth)acrylic acid and/or an ester thereof is characterized in comprising a step of inhibiting polymerization of (meth)acrylic acid and/or the ester thereof by using a solution of a dialkyldithiocarbamic acid copper salt dissolved in an organic solvent, wherein a content amount of copper sulfate in the solution of the dialkyldithiocarbamic acid copper salt is 100 ppm or less by mass.
US07977498B2 Reduction of sterols and other compounds from oils
A process for the removal of sterols, specifically cholesterol, from a triglyceride oil, preferably a marine triglyceride oil, said process comprising contacting an oil with an absorbent, specifically TRIS YL™, clay or a mixture thereof, heating the mixture to 100° C. to 210° C., preferably 150° C. to 170° C., preferably for a time period of greater than one minute and optionally at a pressure less than 133 Pa, preferably less than 1.33 Pa.
US07977494B2 Method for producing substituted pyrazolecarboxylic acid chlorides
The present invention relates to a process for preparing substituted pyrazolyl chlorides by chlorinating aldehydes of the formula (II) under free-radical conditions.
US07977489B2 Benzylthiazolone inhibitors of estrogen-related receptors (ERR)
Compounds of the following general structure for use in compositions and methods for modulating the activity of nuclear receptors are provided: The compounds are useable in compositions and methods for modulating the estrogen related receptors and are agonists, partial agonists, antagonists. or inverse agonists of ERR or ERRα.
US07977488B2 1-heterocyclylsulfonyl, 2-aminomethyl, 5-(hetero-) aryl substituted 1-H-pyrrole derivatives as acid secretion inhibitors
The present invention provides a compound having a superior acid secretion inhibitory effect and showing an antiulcer activity and the like. The present invention provides a compound represented by the formula (I) wherein R1 is a nitrogen-containing monocyclic heterocyclic group optionally condensed with a benzene ring or a heterocycle, the nitrogen-containing monocyclic heterocyclic group optionally condensed with a benzene ring or a heterocycle optionally has substituent(s), R2 is an optionally substituted C6-14 aryl group, an optionally substituted thienyl group or an optionally substituted pyridyl group, R3 and R4 are each a hydrogen atom, or one of R3 and R4 is a hydrogen atom and the other is an optionally substituted lower alkyl group, an acyl group, a halogen atom, a cyano group or a nitro group, and R5 is an alkyl group or a salt thereof.
US07977487B2 Method for producing N,N-bis(pyridin-2ylmethyl)-1,1-bis(pyridin-2-yl)-1-aminoalkane compounds and metal complex salts containing these compounds
The invention relates to a method for producing the compositions cited in the title. According to this method: dipyridyl ketone is reacted with hydroxylamine; the oxime obtained thereby is reduced without intermediate isolation to form 1,1-di-(2-pyridyl)-methylamine, and; this amine is firstly reacted with 1 to 1.5 molar equivalent of picolyl chloride and then with another 1 to 1.5 molar equivalent of picolyl chloride to form the amine of formula (1). This amine is purified via the tetrafluoroborate salt and subsequently alkylated with an alkyl iodide. This method represents an improvement with regard to prior art methods for producing these compounds.
US07977475B2 Process for the preparation of faropenem
The present invention is related to processes for the preparation of faropenem, which comprises treating the compound of Formula II, with an alkali metal salt of a substituted or unsubstituted C5-10 carboxylic acid and a catalytic amount of a palladium complex in the presence of an organic solvent, followed by the treatment of the reaction mixture of with water and a water miscible solvent, and isolating a hydrate of an alkali metal salt of faropenem from the reaction mass, wherein water is not removed from the reaction mixture in water treatment or isolation steps.
US07977473B1 Use of non-crystalline cellulose as a medicine tablet medium
A non crystalline or low crystallinity cellulose is able to be formed into a medicine tablet medium. A method of making a tablet of non crystalline or low crystallinity cellulose comprises providing cellulosic material, adding an effective acid in an amount effective to at least wet the cellulosic material, mixing the cellulosic material and acid under conditions effective to form an essentially uniformly wet condition, letting the mixture sit at ambient conditions for a period of time sufficient to form a viscous fluid, adding water or other diluent in an amount sufficient to lower the acid concentration and to form a slurry, dewatering the slurry, removing any residual acid from the dewatered slurry and forming the tablet.
US07977472B2 RNA interference mediated inhibition of myostatin gene expression using short interfering nucleic acid (siNA)
This invention relates to compounds, compositions, and methods useful for modulating myostatin (GDF8) gene expression using short interfering nucleic acid (siNA) molecules. This invention also relates to compounds, compositions, and methods useful for modulating the expression and activity of other genes involved in pathways of myostatin gene expression and/or activity by RNA interference (RNAi) using small nucleic acid molecules. In particular, the instant invention features small nucleic acid molecules, such as short interfering nucleic acid (siNA), short interfering RNA (siRNA), double stranded RNA (dsRNA), micro-RNA (miRNA), and short hairpin RNA (shRNA) molecules and methods used to modulate the expression of myostatin genes.
US07977466B2 C-glycoside derivatives and salts thereof
The present invention provides C-glycoside derivatives and salts thereof, wherein B ring is bonded to A ring via —X— and A ring is directly bonded to the glucose residue, and it is usable as a Na+-glucose cotransporter inhibitor, especially for a therapeutic and/or preventive agent for diabetes such as insulin-dependent diabetes (type 1 diabetes) and insulin-independent diabetes (type 2 diabetes), as well as diabetes related diseases such as an insulin-resistant diseases and obesity.
US07977459B2 Adiponectin receptor and gene encoding the same
The object is to isolate and identify human and mouse adiponectin receptors, to provide a novel protein having adiponectin binding ability, and to provide a screening method and screening kit for a ligand, agonist and antagonist to an adiponectin receptor using such protein. To achieve this object, a protein is used, as novel protein having adiponectin binding ability, that is (a) a protein comprising an amino acid sequence according to Seq. No. 2, 4, 6 or 8, or (b) a protein comprising an amino acid sequence according to Seq. No. 2, 4, 6 or 8 with one or more amino acids deleted, replaced or added, and having adiponectin binding ability.
US07977457B2 Fusion proteins, uses thereof and processes for producing same
This invention provides fusion proteins comprising consecutive amino acids which beginning at the amino terminus of the protein correspond to consecutive amino acids present in (i) a cytomegalovirus human MHC-restricted peptide, (ii) a first peptide linker, (iii) a human β-2 microglobulin, (iv) a second peptide linker, (v) a HLA-A2 chain of a human MHC class I molecule, (vi) a third peptide linker, (vii) a variable region from a heavy chain of a scFv fragment of an antibody, and (viii) a variable region from a light chain of such scFv fragment, wherein the consecutive amino acids which correspond to (vii) and (viii) are bound together directly by a peptide bond or by consecutive amino acids which correspond to a fourth peptide linker, wherein the antibody from which the scFv fragment is derived specifically binds to mesothelin. This invention provides nucleic acid constructs encoding same, processes for producing same, compositions, and uses thereof.
US07977452B2 Janus dendrimers and dendrons
This invention provides a cost effective process and new Janus dendrimers where at least two dendrons are attached at the core (with or without a connector group) and where at least two of the dendrons have different functionality. Preferred are those Janus dendrimers where at least one dendron is a PEHAM dendron. Thus these Janus dendrimers are heterobifunctional in character and use unique ligation chemistry with single site functional dendrons, di-dendrons and multi-dendrons. Also included are Janus dendrons which may be used as intermediates to make the Janus dendrimers or to further react with another reactive moiety. These Janus dendrimers can provide several new dendrimer moieties, namely: combinatorial libraries of bifunctional structures; combined target director and signaling dendrimers; specific targeting entities for diagnostic and therapeutic applications, such as for example targeted MRI agents, targeted radionuclide delivery for diseases such as cancer, and targeted photosensitive or radiowave sensitive agents.
US07977451B2 Polyarylether membranes
Membranes for use in methods and apparatuses for hemodialysis and hemofiltration are composed of at least one membrane comprising a polyarylethernitrile having structural units of formula 1, 2, 3 and 4 wherein Z is a direct bond, O, S, CH2, SO, SO2, CO, RPO, CH2, alkenyl, alkynyl, a C1-C12 aliphatic radical, a C3-C12 cycloaliphatic radical, a C3-C12 aromatic radical or a combination thereof; R is a C6-12 aromatic radical or a C1-12 aliphatic radical; R1 and R2 are independently H, halo, nitro, a C1-C12 aliphatic radical, a C3-C12 cycloaliphatic radical, a C3-C12 aromatic radical, or a combination thereof; a is 0, 1, 2 or 3; b is 0, 1, 2, 3 or 4; m and n are independently 0 or 1; and Q and Z are different.
US07977448B2 Method for producing highly condensed solid-phase polyesters
The invention relates to a continuous or discontinuous method for the production of highly condensed polyesters in the solid state, comprising a crystallization of a polyester material, wherein the crystallization is carried out in the presence of a gas with a dew point of (less than or equal to) ≦approximately −10° C. The invention also relates to a method for the production of polyester formed bodies using the polyester material obtained for the production of bottles, films and high strength threads.
US07977447B2 Method for making carbonates and esters
A method for forming a monomeric carbonate includes the step of combining a monofunctional alcohol or a difunctional diol with an ester-substituted diaryl carbonate to form a reaction mixture. Similarly, a method for forming a monomeric ester includes the step of combining a monofunctional carboxylic acid or ester with an ester-substituted diaryl carbonate to form a reaction mixture. These methods further include the step of allowing the reaction mixtures to react to form a monomeric carbonate or a monomeric ester, respectively.
US07977445B2 Storage-stable aqueous emulsions of α-silyl terminated polymers
Aqueous, storage-stable emulsions of α-silyl terminated polymers are useful as adhesives, sealing compounds and coating materials. The α-silyl terminated polymers correspond to the general formula (I): in which R1 is a linear or branched alkyl or alkoxy group containing 1 to 4 carbon atoms, R2 and R3 independently of one another are linear or branched alkyl groups containing 1 to 4 carbon atoms, R4 and R6 independently of one another are divalent organic connecting groups, R5 is a hydrophobic divalent polymer group; and R7 is a CH2SiR1(OR2)(OR3) group, in which R1, R2 and R3 have the above meaning or R7 stands for a group that lends the polymer of the general formula (I) the property of self-emulsification in water by forming an oil in water emulsion.
US07977444B2 Process for polymerizaing 1-hexene or higher alpha-olefins
A process for preparing a polymer containing derived units of one or more alpha olefins of formula CH2═CHW wherein W is a C3-C10 hydrocarbon radical and optionally from 0 to 81% by mol of derived units of propylene or 1-butene, comprising contacting under polymerization conditions one or more alpha olefins of formula CH2═CHW and optionally propylene or 1-butene in the presence of a catalyst system obtainable by contacting:a) a metallocene compound of formula (I) wherein M, X, L, T, R1, R2, R7 and R8 are described in the text; and (b) an alumoxane or a compound capable of forming an alkyl metallocene cation.
US07977440B2 Optical element and optical pickup apparatus
A production method of an objective lens for optical pickup apparatus having a numerical aperture NA of image side of 0.80 to 0.90 is disclosed. The method includes steps of molding resin composition containing copolymer of α-olefin and a cyclic olefin represented by Formula (I) or (II) to form lens shape, and thermally processing the molded product under a condition at a temperature between Tg −45° C. and Tg −15° C. for 12 to 168 hours, wherein the Formula (I) and (II) is detailed in the specification.
US07977435B2 Propylene polymer compositions and processes for making the same
Provided are a propylene polymer compositions comprising a propylene copolymer and a propylene homopolymer polymerized in the presence of the propylene copolymer. The propylene polymer compositions exhibit properties such as broad molecular weight distribution, low crystallinity, high solubles and superior crystallization kinetics and are useful in fast cycle-time processing methods such as injection molding, sheet extrusion, thermoforming, and oriented film fabrication. Also provided is a process for preparing the propylene polymer compositions in the presence of a catalyst and at least two electron donors using sequential or parallel polymerization reaction zones. Finally, articles made from the propylene polymer composition are provided, particularly articles requiring high stiffness, high heat deflection temperature, good fatigue resistance and low temperature impact resistance such as appliance parts.
US07977432B2 Functionalized block copolymers, method for making same, and various uses for such block copolymers
The present invention is a, solid block copolymer comprising at least two polymer end blocks A and at least one polymer interior block B wherein each A block is a polymer block resistant to lithiation and each B block is a polymer block susceptible to lithiation, and wherein said A and B blocks do not contain any significant levels of olefinic unsaturation. After lithiation, the lithiated polymer is reacted with at least one graftable functional molecule selected from the group consisting of an electrophilic graftable molecule containing a functional group and an electrophile. Preferred are carbon monoxide and ethylene oxide. Also claimed are processes for making such block copolymers, and the various end uses and applications for such block copolymers.
US07977431B2 Dithiocarbamic esters
The present invention relates to dithiocarbamic esters, their preparation and their use for regulating the degree of polymerization during the polymerization of monomers, such as during the polymerization of chloroprene to give polychloroprene, and during the polymerization of 2,3-dichlorobutadiene to give poly-2,3-dichlorobutadiene, and during the copolymerization of chloroprene with 2,3-dichlorobutadiene. The present invention further relates to polymers which are obtainable via the polymerization of monomers in the presence of the dithiocarbamic esters of the invention. The present invention also relates to polymers which contain end groups derived from the dithiocarbamic esters of the present invention.
US07977430B2 Crosslinkable polyurea prepolymers
The present invention provides a water-soluble crosslinkable polyurea prepolymer. The crosslinkable polyurea prepolymer of the invention is prepared by reacting an amine- or isocyanate-capped polyurea with a multifunctional compound having at least one one ethylenically unsaturated group and a function group coreactive with the capping amine or isocyanate groups of the amine- or isocyanate-capped polyurea. The amine- or isocyanate-capped polyurea is a copolymerization production of: (a) at least one poly(oxyalkylene)diamine, (b) optionally at least one organic di- or poly-amine, (c) optionally at least one diisocyanate, and (d) at least one polyisocyanate. The crosslinkable polyurea prepolymer of the invention can find use in economically producing contact lenses which have durable, highly elastic soft contact lenses with desired physical properties. In addition, the present invention provides method for making a medical device, preferably an ophthalmic device, more preferably a contact lens.
US07977427B2 Method involving 1-benzotriazolyl carbonate esters of polymers
The invention provides a method comprising the steps of (i) reacting a water-soluble and non-peptidic polymer having two or more terminal hydroxyl groups with di(1-benzotriazolyl)carbonate to form a water-soluble and non-peptidic polymer having two or more 1-benzotriazolylcarbonate ester groups; and (ii) reacting the water-soluble and non-peptidic polymer having two or more 1-benzotriazolylcarbonate ester groups with a water-soluble and non-peptidic polymer having three or more primary amino groups under conditions effective to form a cross-linked polymer composition.
US07977426B2 Fluoroalkyl ether sulfonate surfactants
A compound of Formula (1) Rf—O—(CXX′)m—(CY2)nSO3M  (1) wherein Rf is a C1 to C4 linear or branched perfluoroalkyl group, X and X′ are each independently H or F, provided that at least one of X or X′ is F, each Y is independently H or F, m is an integer from 1 to 4, n is an integer from 1 to 2, and M is H, NH4, Li, Na or K, provided that when CXX′ is CHF or CFH, then n is 2.
US07977425B2 Co-milling organic pigments with fumed silica
A pigment composition comprising an intimate mixture of an organic pigment and fumed silica is prepared which exhibit improved coloristic characteristics including excellent chroma, color strength and enhanced color flop when incorporated into in polymeric systems, such as plastics or surface coatings, for example inks and paints. Also provided are coating compositions and plastic articles that are pigmented with a tinctorially effective amount of the inventive pigment composition. A particular embodiment of the invention relates to pigments useful in automotive coatings.
US07977424B2 Polymer concrete and method for preparation thereof
A soy-based polyol is mixed with an isocyanate and aggregate to produce a soy-based polyurethane having superior mechanical properties. The aggregate composition may be varied to obtain different mechanical properties, as can the amount of resin. The resin may be crosslinked using a low molecular weight polyol, such as glycerine, to also improve structural performance. A catalyst may be added to accelerate curing time without reducing structural performance.
US07977422B2 Non-staining black sidewall
The addition of a surfactant containing a thio functionality of the formula-S—, and specifically a polyether thioether surfactant to a rubber formulation results in a rubber compound having a glossy film on the outer, exposed surface.
US07977419B2 Dielectric body and method for production thereof
A dielectric body and a method of producing the dielectric body are disclosed. In accordance with an embodiment of the present invention, the dielectric body using a polymer matrix and being expressed in the following Reaction Scheme 1 includes two or more kinds of ceramic fillers having different x values in the following Reaction Scheme 1. In this way, a dielectric body having a stable dielectric constant as well as a high dielectric constant against the change in temperature can be manufactured. Ba1-xSrxTiO3  [Reaction Scheme 1] whereas 0
US07977417B2 Silicone rubber composition for extrusion molding
Provided is a silicone rubber composition for extrusion molding, including: (A) 100 parts by mass of an organopolysiloxane represented by an average composition formula (1): R1nSiO(4-n)/2 (in the formula, R1 represents identical or different, unsubstituted or substituted monovalent hydrocarbon groups, and n represents a positive number within a range from 1.95 to 2.04), (B) 0 to 50 parts by mass of a vinyl group-containing silicon compound, (C) 5 to 100 parts by mass of a reinforcing silica, and (D) an effective quantity of a curing agent, in which the vinyl group content relative to the combination of the components (A) through (D) is at least 1.0×10−4 mol/g. The composition yields a cured product for which the elastic modulus increases across a temperature range from 30 to 110° C. and which is therefore capable of reducing the temperature dependency of acrylic optical fibers. The composition is suitable for extrusion molding.
US07977416B2 Aromatic polycarbonate resin composition and production method thereof
According to the present invention, an aromatic polycarbonate resin composition comprising: a resin component (A) mainly comprising an aromatic polycarbonate; a reinforcing agent and/or a filler (B); and an aromatic sulfonic acid and/or an ester thereof (C), wherein a mixture consisting of said component (B) and said component (C) has a pH of 4 to 8 when measured in accordance with JIS-K5101, and said composition comprises 1 to 200 parts by weight of said component (B) and 0.001 to 5 parts by weight of said component (C) based on 100 parts by weight of said component (A) is provided.
US07977415B2 Impact resistant, flame retardant thermoplastic molding composition
A thermoplastic molding composition characterized by its flame retardance and impact strength is disclosed. The composition contains (A) linear aromatic (co)polycarbonate, (B) a graft (co)polymer having core-shell morphology, the shell containing polymerized alkyl(meth)acrylate and the core containing interpenetrated and inseparable polyorganosiloxane and poly(meth)alkyl acrylate components, (C) a phosphorous-containing flame retardant compound, (D) fluorinated polyolefin and (E) a boron compound, and optionally SAN. The composition is further characterized in that it contains no polyalkylene terephthalate.
US07977414B2 Radiation-resistant resin composition and radiation-proof wire/cable
There are provided a radiation-proof resin composition that is excellent in mechanical characteristics even after exposure to harsh radiation (with 2.5 MGy), that exhibits a suitable radiation-resistant properties by a small amount of mixed additives, and that can suppress the blooming of the additives, and a radiation-resistant wire/cable. The radiation-resistant resin composition is obtained by adding 0.3 to 1.0 parts by mass of a salicylate-based UV absorber, 0.3 to 5 parts by mass of a benzotriazole-based UV absorber, and 0.3 to 5 parts by mass of a triazine-based UV absorber to 100 parts by mass of a polyolefin-based resin.
US07977413B2 Thermally responsive ink and coating compositions
A thermally responsive ink composition consisting of at least one halochromic optical-state change material, at least one base, at least one solvent, and at least one binder material. The pH of the ink composition is such that the halochromic optical-state change material remains in its basic state until it is acted upon by a thermal stimulus. The ink composition is capable of transforming from a first optical state to a second optical state upon a change in pH caused by exposure to a thermal stimulus. A thermally responsive ink composition consisting of at least one quaternary onium salt of an halochromic optical-state change material, at least one solvent, and at least one binder material is also disclosed. Coating compositions prepared using these ink compositions and optical articles comprising these coating compositions are also disclosed.
US07977410B2 Fine pore formation agent for porous resin film and composition containing the same for porous resin film
A fine pore formation agent for a porous resin film is provided which comprises inorganic particles satisfying (a) 0.1≦D50≦1.5 (μm) (D50: average particle diameter of particles in 50% cumulative total by weight from the larger particle side by micro-track FRA), (b) Da≦20 (μm) (Da: maximum particle diameter by micro-track FRA), (c) 3≦Sw≦60 (m2/g) (Sw: BET specific surface area measured by nitrogen adsorption method), (d) Ir≧1.0×105 (Ω·cm) (Ir: volume resistivity (Ω·cm).The fine pore formation agent for a porous resin film is capable of providing a resin composition giving a porous resin film useful in uses for electric parts such as capacitors and battery separators.
US07977406B2 Endodontics sealer
The present invention discloses an endodontic sealer which comprises a urethane-monoacrylate oligomer, a diluting monomer, at least one photo-initiator, at least one thermal-initiator, and a filler, wherein the urethane-monoacrylate oligomer is obtained by firstly reacting the acrylate with the diisocyanate to form an intermediate with only one isocyanate group, and then reacting the intermediate with the polyol to form the desired urethane-monoacrylate oligomer.
US07977401B2 Ultraviolet-curable resin composition containing a polyfunctional oxetanyl group
An ultraviolet curable resin composition, which comprises a cationic photopolymerization initiator (B) and a urethane prepolymer (A) having a structure represented by the general formula (1); (wherein R1 and R2 each independently represent an alkylene group, R3, R4 and R5 each independently represent an alkyl group or hydrogen atom, R6 and R7 each independently represent an alkylene group having 2 to 4 carbon atoms, a represents 0 or 1, and b and c each independently represent an integer of 0 to 10).
US07977399B2 Curable composition
Disclosed is a curable composition which can be cured quickly by light. This curable composition is not left uncured even in portions which are not irradiated with light. A cured product of this curable composition is excellent in heat resistance, oil resistance and weather resistance. Specifically disclosed is a curable composition characterized by containing a vinyl polymer having at least one crosslinkable silyl group on average and a vinyl polymer having at least one photocrosslinkable group on average.
US07977397B2 Polymer blends of biodegradable or bio-based and synthetic polymers and foams thereof
The present invention relates to compositions comprising blends of alkenyl aromatic polymers such as styrenic polymers (i.e. PS and HIPS) and bio-based or biodegradable polymers (i.e. PLA, PGA, PHA, PBS, PCL) compatibilized with styrene-based copolymers (i.e. styrene-ethylene-butylene-styrene (SEBS) block copolymers, maleated SEBS, styrene-maleic anhydride (SMA) copolymer, styrene-methyl methacrylate (SMMA) copolymer) or a mixture of two or more styrene-based copolymers such as SEBS and SMA. These novel compositions can be extruded and thermoformed to produce very low density food service and consumer foam articles such as plates, hinged lid containers, trays, bowls, and egg cartons with good mechanical properties.
US07977389B2 Microemulsions and use thereof as a fuel
The invention relates to bicontinuous microemulsions and to the use thereof as a fuel, combustion or heating fluid. Said fuels permit an increased efficiency of internal combustion systems and heating installations of any type and, simultaneously, a minimized emission of pollutants, associated with combustion, to be obtained.
US07977386B2 Solid forms of selective androgen receptor modulators
The present invention relates to solid forms of (S)—N-(4-cyano-3-(trifluoromethyl)phenyl)-3-(4-cyanophenoxy) -2-hydroxy-2-methylpropanamide and process for producing the same.
US07977384B1 Anticancer tobacco cembranoids
In the specification and drawings a method of treating cancer is described and shown. The method includes delivering an amount of at least one compound to an area containing a cancer cell. A compound and a method of preparing a compound are also described and shown.
US07977379B2 Method for angiogenesis inhibition or immunostimulation
The present invention relates to a composition for use in prevention or treatment of a vascular-related disease, particularly used for angiogenesis inhibition, tumor growth inhibition or tumor metastasis inhibition, or immunostimulation, which comprises glutamic acid or derivatives thereof, preferably glutamic acid is anhydrous glutamic acid represented by Formula (1) or pyroglutamic acid, and a pharmaceutically acceptable carrier or an edible carrier, and a method of preventing or treating a vascular-related disease.
US07977371B2 Pyrrole derivative having ureido group and aminocarbonyl group as substituents
Objects of the present invention are to study on the synthesis of a novel pyrrole derivative having a ureido group and an aminocarbonyl group as substituents or a salt thereof, to find a pharmacological effect of the derivative or a salt thereof, and to find a medicinal agent which has a prophylactic and/or therapeutic effect on a retinal disease or the like through oral administration. A compound represented by the general formula (1) or a salt thereof has an inhibitory activity against the production of interleukin-6 and/or an inhibitory effect on choroidal neovascularization, and is therefore useful as a prophylactic and/or therapeutic agent for a disease associated with interleukin-6, an ocular inflammatory disease and/or a retinal disease. In the formula, the ring A represents a benzene ring or the like; R1 represents a halogen atom, a hydrogen atom, a lower alkyl group or the like; R2 represents a halogen atom, a lower alkyl group which may have a substituent, a lower alkenyl group, a lower alkynyl group which may have a substituent, a lower cycloalkyl group, an aryl group, a hydroxy group, a lower alkoxy group which may have a substituent or the like; and n represents 0, 1, 2, 3 or the like.
US07977367B2 Substituted imidazole propanamide glucokinase activators
The present invention provides Formula (1A) compounds that act as glucokinase activators; pharmaceutical compositions thereof; and methods of treating diseases, disorders, or conditions mediated by glucokinase. X, Y, Z, R1, R2, R3, and R4 are as described herein.
US07977366B2 Treating an inflammatory disorder or inhibiting respiratory burst in adherent neutrophils with chemical inhibitors of neutrophil activation
The present invention relates to a method of treating an inflammatory disorder in a subject with an effective amount of compound having the general formula (I) as described in the present application, under conditions effective to treat the inflammatory disorder. The present invention also relates to a method of inhibiting respiratory burst in neutrophils without inhibiting degranulation in or bacterial killing by the neutrophils by contacting neutrophils with the compounds described above.
US07977365B2 Antiviral drugs for treatment of arenavirus infection
Compounds, methods and pharmaceutical compositions for treating viral infections, by administering certain novel compounds in therapeutically effective amounts are disclosed. Methods for preparing the compounds and methods of using the compounds and pharmaceutical compositions thereof are also disclosed. In particular, the treatment and prophylaxis of viral infections such as caused by hemorrhagic fever viruses is disclosed, i.e., including but not limited to, Arenaviridae (Junin, Machupo, Guanarito, Sabia, Lassa, Tacaribe, Pichinde, and LCMV), Filoviridae (Ebola and Marburg viruses), Flaviviridae (yellow fever, Omsk hemorrhagic fever and Kyasanur Forest disease viruses), and Bunyaviridae (Rift Valley fever and Crimean-Congo hemorrhagic fever).
US07977360B2 Benzo[d]isoxazol-3-yl-amine compounds and their use as vanilloid receptor ligands
The present invention relates to substituted benzo[d]isoxazol-3-yl-amine compounds, methods for their production, medicaments containing these compounds and the use of these compounds to produce medicaments.
US07977357B2 Polymorphic forms of 3-(4-amino-1-oxo-1, 3 dihydro-isoindo1-2-yl)-piperidine-2,6-dione
Polymorphic forms of 3-(4-amino-1-oxo-1,3 dihydro-isoindol-2-yl)-piperidine-2,6-dione are disclosed. Compositions comprising the polymorphic forms, methods of making the polymorphic forms and methods of their use are also disclosed.
US07977353B2 Heterocyclic aromatic compounds useful as growth hormone secretagogues
Novel heterocyclic aromatic compounds are provided that are useful in stimulating endogenous production or release of growth hormone, said compounds having the general structure of formula I wherein R1, R1′, R2, R3, R4, Xa, Y, Z and n are as described herein. The compounds provided herein are useful in treating obesity, osteoporosis (improving bone density) and in improving muscle mass and muscle strength.
US07977352B2 Triazolopyridine compounds useful for the treatment of degenerative and inflammatory diseases
Novel triazolopyridine compounds are disclosed that have a formula represented by the following: The compounds may be prepared as pharmaceutical compositions, and may be used for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, ECM degradation, joint degradation and/or inflammation, and others.
US07977351B2 Heteroaryl dihydroindolones as kinase inhibitors
The present invention provides a compound represented by the formula: wherein the variables R1, b, R6, Y, Z, X, R and a are defined in the specification. Said compound may be used in a method for treating diseases related to unregulated tyrosine kinase signal transduction, wherein said disease is selected from the group consisting of cancer, blood vessel proliferative disorders, fibrotic disorders, mesangial cell proliferative disorders, and metabolic diseases.
US07977350B2 CCR1 antagonists and methods of use therefor
The invention provides compounds having the formula: wherein R1 is halogen. The invention also provides compositions comprising the compounds, and methods of treating diseases or disorders that comprise administering one or more of the compounds to a subject in need thereof. The disclosed compounds have CCR1 antagonist activity.
US07977348B2 Polymorphic forms of imatinib mesylate and processes for preparation of novel crystalline forms as well as amorphous and form α
Solvates and crystalline forms of imatinib mesylate are described. Further, methods for preparing such solvates and crystalline forms of imatinib mesylate are described. The structure diagram below shows the chemical structure of imatinib mesylate.
US07977346B2 Spiro compounds and methods of use
The present invention relates to spiro compounds of formula I, processes for their preparation, pharmaceutical compositions containing them as active ingredient, methods for the treatment of disease states such as cancers associated with protein tyrosine kinases, especially epidermal growth factor (EGF) and vascular endothelial growth factor (VEGF), to their method of use as medicaments and to their method of use in the manufacture of medicaments for use in the production of inhibition of tyrosine kinase reducing effects in warm-blooded animals such as humans.
US07977341B2 Substituted isoxazoles as fungicides
The present invention provides compounds of formula I: (I) along with methods of making the same, compositions thereof, and methods of use thereof, particularly methods of use as fungicides.
US07977338B2 Phenylacetamides being FLT3 inhibitors
Compounds of formula wherein the residues R1, R2, R3, R9, R10 and Q and X, Y and Z are as defined in the specification, salts thereof; their use, methods of their use, processes for their production, pharmaceutical compositions comprising them, their combinations with second drug substances and the use thereof and the like. The compounds are protein kinase inhibitors and can be used for the treatment of diseases mediated by protein kinase inhibitors, e.g. for the treatment of various proliferative diseases.
US07977332B2 Insecticidal N-(heteroarylalkyl)alkanediamine derivatives
Certain noel N-(heteroarylalkyl)alkanediamine derivatives have provided unexpected insecticidal and acaricidal activity. These compounds are represented by formula I: wherein Ar, a, r, R, Ra, Rb, Rc, Rd, b, c, Re, Rf, Rg, Rh, R5, d, e, U, V, X, WR6 and R7 are fully described herein. In addition, compositions comprising an insecticidally effective amount of at least one compound of formula I, and optionally, an effective amount of at least one of a second compound, with at least one insecticidally compatible carrier are also disclosed; along with methods of controlling insects comprising applying said compositions to a locus where insects are present or are expected to be present.
US07977329B2 5HT2C receptor modulators
The present invention relates to novel compounds of Formula (I): which act as 5HT2C receptor modulators. These compounds are useful in pharmaceutical compositions whose use includes the treatment of obesity.
US07977324B2 Process for preparing malathion for pharmaceutical use
The present invention provides a process for preparing a highly pure form of malathion having a reduced level of toxic impurities. In addition, the malathion prepared by the process of this invention is storage stable. The level of toxic impurities in the malathion, e.g., isomalathion, O,O,S-trimethyl phosphorodithioate (MeOOSPS), O,O,S-trimethyl phosphorothioate (MeOOSPO), O,S,S-trimethyl phosphorodithioate (MeOSSPO), malaoxon, isomalathion, diethyl fumarate, methyl malathion, dimethyl malathion, O,O-methyl,ethyl-S-(1,2-dicarboethoxy)ethyl-phosphorodithioate are lower than that of any other commercial preparation of malathion that may be used for pharmaceutical purposes.
US07977318B2 Derivative of glucose and of vitamin F, compositions comprising it, uses and preparation process
An O-acyl product derived from glucose which may be obtained by partial or total esterification of glucose and of vitamin F, comprising a mixture of esters, for example, monoesters, of glucose and of at least one acid chosen from linoleic acid, oleic acid, palmitic acid and stearic acid, compositions, for example, cosmetic and pharmaceutical compositions, comprising this novel derivative, and their use for improving the condition of head hair and/or other hairs, and, for example, for reducing and/or impeding the loss of head hair and/or other hairs, and/or for inducing and/or stimulating hair growth, as well as a process for preparing O-acyl derivatives mainly in position 6 of glucose, comprising preparing a mixed anhydride by reacting a carboxylic acid with a trimethylacetyl halide, followed by reacting said mixed anhydride formed with glucose.
US07977314B2 Methods and compositions to treat and detect misfolded-SOD1 mediated diseases
The invention provides a method for treating a medical condition, disease, or disorder mediated by a misfolded form of superoxide dismutase (SOD) in a subject in need of treatment. The method optionally comprises administering to the subject a composition comprising a pharmaceutically acceptable vehicle and an agent selected from (1) an exogenous antibody or fragment thereof that binds selectively to the misfolded form of SOD, and/or (2) an immunogen that elicits production of an endogenous antibody that binds selectively to the misfolded form of SOD, and/or (3) a nucleic acid sequence encoding (1) or (2). In certain embodiments, the invention provides methods of treating diseases such as Alzheimer's Disease, Parkinson's Disease or amyotrophic lateral sclerosis using amyotrophic disease-specific epitopes, and compositions including these epitopes. The invention also provides antibodies that bind to monomeric or misfolded SOD1, and not on the molecular surface of native homodimeric SOD1. In addition, the invention includes methods of diagnosing Alzheimer's Disease, Parkinson's Disease or amyotrophic lateral sclerosis in a subject. Also, the invention provides methods of identifying substances for the treatment or prevention of Alzheimer's Disease, Parkinson's Disease or amyotrophic lateral sclerosis and kits using the binding proteins of the invention.
US07977311B2 Methods and compositions for the prevention and treatment of anemia
Methods for increasing and maintaining hematocrit in a mammal comprising administering a hyperglycosylated analog of erythropoietin are disclosed. An analog may be administered less frequently than an equivalent molar amount of recombinant human erythropoietin to obtain a comparable target hematocrit and treat anemia. Alternatively, a lower molar amount of a hyperglycosylated analog may be administered to obtain a comparable target hematocrit and treat anemia. Also disclosed are new hyperglycosylated erythopoietin analogs, methods of production of the analogs, and compositions comprising the analogs.
US07977310B2 Method for reducing cardiovascular morbidity and mortality in prediabetic patients and patients with type 2 diabetes
This invention relates to a method of reducing cardiovascular morbidity and mortality in a prediabetic or Type 2 Diabetes patient population. The method comprises administering an effective dosage of a long acting insulin, preferably insulin glargine, to a prediabetic or Type 2 Diabetes patient.
US07977305B2 Juvenile hormone compositions and methods for making same
The present invention relates to hormone coating layers having desirable hormone delivery characteristics and product lifetime. In one embodiment, the invention is a hormone composition including a substrate having an external surface, and a coating layer disposed on the external surface. The coating layer preferably includes a polymer web, and from about 1 wppm to about 100,000 wppm of a hormone comprising a terpene dispersed throughout the polymer web. The invention also relates to methods for making hormone coating materials of the present invention. The coating compositions of the present invention preferably are implemented in human and animal food packaging materials in order to safely and efficiently protect the foodstuffs contained therein from insect infestation.
US07977304B2 FK 228 derivates as HDAC inhibitors
Compounds which are FK228 analogues of the general formula (I) or (I′), isosteres thereof and pharmaceutically acceptable salts thereof are found to inhibit HDAC wherein R1, R2, R3 and R4 are the same or different and represent an amino acid side chain moiety and each R6 is the same or different and represents hydrogen or C1-C4 alkyl.
US07977303B2 Multiple use fabric conditioning block with indentations
Multiple use fabric conditioning blocks comprising indentations and/or protrusions are useful for conditioning fabric.
US07977299B2 Treated oxidizing agent, detergent composition containing a treated oxidizing agent, and methods for producing
A treated oxidizing agent is provided according to the invention. The treated oxidizing agent includes an oxidizing agent that is solid at room temperature and atmospheric pressure, and a chemical barrier composition provided on the oxidizing agent. The chemical barrier composition includes a hydrocarbon component having about 10 to about 85 carbon atoms, and wherein the chemical barrier composition is provided as a liquid at 25° C. A solid detergent composition is provided including the treated oxidizing agent. Methods for manufacturing are provided.
US07977295B2 Method for mechanical cleaning of textiles or solid objects comprising encapsulated enzymes
Water-soluble detergents and enzymes are used for mechanically cleaning textiles or crockery. According to the invention, enzymes with a catalytic effect on typical stains are added to the washing or cleaning process, only for as long as their catalytic effect is desired. This avoids superfluous removal of the enzymes that have been used in a washing or cleaning process.
US07977292B2 Cleaning composition and process for producing semiconductor device
A cleaning composition of a semiconductor device for laminating an organosiloxane-based thin film and a photoresist layer in this order on a substrate having a low dielectric interlayer insulation film and a copper wiring or a copper alloy wiring, then applying selective exposure and development treatments to the subject photoresist layer to form a photoresist pattern, subsequently applying a dry etching treatment to the organosiloxane-based thin film and the low dielectric interlayer insulation film while using this resist pattern as a mask and then removing the organosiloxane-based thin film, a residue generated by the dry etching treatment, a modified photoresist having been modified by the dry etching treatment and an unmodified photoresist layer located in a lower layer than the modified photoresist, the cleaning composition containing from 15 to 20% by mass of hydrogen peroxide, from 0.0001 to 0.003% by mass of an amino polymethylene phosphonic acid, from 0.02 to 0.5% by mass of potassium hydroxide and water and having a pH of from 7.5 to 8.5, is provided. Also, a method for manufacturing a semiconductor device using the subject cleaning composition is provided.
US07977287B1 Microemulsion (nanotechnology) additive to oil
A micro-emulsion forming (nanotechnology) oil additive composition is disclosed which improves the fuel economy and reduces the exhaust emissions of internal combustion machines when used at a cost effective dose level of about 20:1 to 2,000:1 in the crankcase lubricating oil.
US07977284B2 Non-estrogenic alkylphenol derivatives
A method of making phenol and alkylphenol ethoxylates non-estrogenic by inserting 1 mole of propylene oxide onto the phenolic group before proceeding with the addition of ethylene oxide or mixtures of ethylene and propylene oxide. The final phenolic products can be further reacted to form sulfates, sulfonates, phosphate esters, condensed alkylphenol alkoxylates and other derivatives of alkylphenol or phenol. Non-estrogenic phenol and alkylphenol alkoxylates and their derivatives have been found to be excellent salt tolerant, high temperature stable surfactants for oil recovery from subterranean reservoirs. These products are also useful in forming emulsions of heavy crude for transportation through pipelines.
US07977283B2 Method of minimizing or reducing salt deposits by use of a fluid containing a fructan and derivatives thereof
The amount of crystallized salt in an oil and/or gas well may be minimized or reduced by use of a fructan, such as inulin, or a derivative as a salt block inhibitor. A preferred salt inhibitor is the salt of carboxyalkyl inulin such as a sodium salt of carboxymethyl inulin. The salt block inhibitor may be adsorbed onto a water-insoluble adsorbent.
US07977279B2 Differential phage capture proteomics
Disclosed herein are methods for identifying, isolating and comparing proteins and other biomolecules differing between two complex biological samples using affinity chromatography and phage display techniques.
US07977277B2 Getter systems comprising an active phase inserted in a porous material distributed in a low permeability means
Getter systems are provided having a phase active in the sorption of gas, inserted in the pores of a porous material. The porous material is, in turn, dispersed in a polymeric means having a low permeability to the gas to be sorbed.
US07977274B2 Catalyst with bimodal pore size distribution and the use thereof
The invention pertains to a catalyst useful for the epoxidation of an olefin. More particularly, the invention pertains to an improved catalyst useful for the epoxidation of ethylene to ethylene oxide. The catalyst has improved selectivity in the epoxidation process. The catalyst comprises a solid support having a surface, which has a first mode of pores which have a diameter ranging from about 0.01 μm to about 5 μm and having a differential pore volume peak in the range of from about 0.01 μm to about 5 μm. The surface then has a second mode of pores, different from the first mode of pores, which second mode of pores have a diameter ranging from about 1 μm to about 20 μm and have a differential pore volume peak in the range of from about 1 μm to about 20 μm. On the bimodal pore surface is a catalytically effective amount of silver or a silver-containing compound, a promoting amount of rhenium or a rhenium-containing compound, and a promoting amount of one or more alkali metals or alkali-metal-containing compounds.
US07977273B2 Enhancement of molecular sieve performance
A catalyst for converting methanol to light olefins and the process for making and using the catalyst are disclosed and claimed. SAPO-34 is a specific catalyst that benefits from its preparation in accordance with this invention. A seed material is used in making the catalyst that has a higher content of the EL metal than is found in the principal part of the catalyst. The molecular sieve has predominantly a roughly rectangular parallelepiped morphology crystal structure with a lower fault density and a better selectivity for light olefins.
US07977272B2 Process and catalyst for the manufacture of acetic acid
Catalyst system for the production of acetic acid comprising a rhodium carbonylation catalyst, methyl iodide and at least one heteropolyacid promoter.
US07977268B2 Polymerization of olefins
Mixtures of different polyolefins may be made by direct, preferably simultaneous, polymerization of one or more polymerizable olefins using two or more transition metal containing active polymerization catalyst systems, at least one of which contains cobalt or iron complexed with selected ligands. The polyolefin products may have polymers that vary in molecular weight, molecular weight distribution, crystallinity, or other factors, and are useful as molding resins and for films.
US07977267B2 Wetting resistant materials and articles made therewith
Ceramic materials with relatively high resistance to wetting by various liquids, such as water, are presented, along with articles made with these materials. The oxide materials described herein as a class typically contain one or more of ytterbia (Yb2O3) and europia (Eu2O3). The oxides may further contain other additives, such as oxides of gadolinium (Gd), samarium (Sm), dysprosium (Dy), or terbium (Tb). In certain embodiments the oxide, in addition to the ytterbia and/or europia, further comprises lanthanum (La), praseodymium (Pr), or neodymium (Nd).
US07977264B2 Optical glasses of the dense barium flint position
The optical glasses designated to be used in the areas of imaging, sensors, microscopy, medical technology, digital projection, photolithography, laser technology, wafer/chip technology as well as telecommunications, optical communications engineering and optics/illumination in the automotive sector with a refractive index nd of 1.60≦nd≦1.72 and/or an Abbe number vd of 32≦vd≦45 and with a Tg of 567° C. to 640° C., pronounced short flint character, good chemical resistance, excellent resistance to crystallization, good solarization stability and the following composition (in % by weight based on oxides): SiO230-45 B2O3 8-12 Na2O 8-15 CaO0.1-7   ZnO0 ≦ 5 ZrO210-20 Nb2O512-24 Ta2O50 ≦ 9 AgO 0 ≦ 5.
US07977263B2 Glass fiber for high temperature insulation
A glass composition is provided for the production of high temperature glass fibers with oxides comprising 1% to 15% Fe2O3+FeO as a fluidizer to lower liquidous temperature and the fiberizing temperature of a mix of high temperature oxides. The glass composition has therein an appropriate content of high temperature oxides to produce glass fiber with high temperature limits and high burn-through properties.
US07977260B2 Separator for an electric double layer capacitor
The present invention provides a separator for an electric double layer capacitor comprising a porous sheet containing fibrillated heat-resistant fibers, polyester fibers having a fineness of 0.01 dtex to less than 0.10 dtex, and fibrillated cellulose, which is suitable for use as a separator for an electric double layer capacitor operating at high voltages of 3 V or more.
US07977255B1 Method and system for depositing a thin-film transistor
A method for forming a thin-film transistor gate insulating layer over a substrate disposed in a processing chamber is provided. The method includes: introducing a processing gas for producing a plasma in the processing chamber; heating the substrate to a substrate processing temperature of between 50 and 350° C.; and depositing silicon oxide, silicon oxynitride, or silicon nitride over the heated substrate by sputtering a target assembly at a medium frequency.
US07977254B2 Method of forming a gate insulator in group III-V nitride semiconductor devices
A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
US07977253B2 Manufacturing method of semiconductor device
A method for forming a semiconductor layer having a fine shape is provided. A method for manufacturing a semiconductor device with few variations is provided. In addition, a method for manufacturing a semiconductor device with a high yield is provided where the cost can be reduced with few materials. According to the invention, a semiconductor film is partially irradiated with a laser beam to form an insulating layer, and the semiconductor film is etched using the insulating film as a mask so as to form a semiconductor layer having a desired shape. Then, the semiconductor layer is used to manufacture a semiconductor device. According to the invention, a semiconductor layer having a fine shape can be formed in a predetermined position without using a known photolithography step using a resist.
US07977249B1 Methods for removing silicon nitride and other materials during fabrication of contacts
Methods for removing silicon nitride and elemental silicon during contact preclean process involve converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride-based etch. Specifically, silicon nitride and elemental silicon may be treated with an oxidizing agent, e.g., with an oxygen-containing gas in a plasma, or with O2 or O3 in the absence of plasma to produce a material that is more rich in Si—O bonds and is more easily etched with a fluoride-based etch. Alternatively, silicon nitride or elemental silicon may be doped with a number of doping elements, e.g., hydrogen, to form materials which are more easily etched by fluoride based etches. The methods are particularly useful for pre-cleaning contact vias residing in a layer of silicon oxide based material because they minimize the unwanted increase of critical dimension of contact vias.
US07977248B2 Double patterning with single hard mask
In general, in one aspect, a method includes forming a hard mask on a semiconductor substrate. A first resist layer is patterned on the hard mask as a first plurality of lines separated by a first defined pitch. The hard mask is etched to a portion of formed thickness to create a first plurality of fins in alignment with the first plurality of lines and the first resist layer is removed. A second resist layer is patterned on the hard mask as a second plurality of lines separated by a second defined pitch. The second plurality of lines is patterned between the first plurality of lines. The hard mask is etched to the portion of the formed thickness to create a second plurality of fins in alignment with the second plurality of lines. The first plurality of hard mask fins and the second plurality of hard mask fins are interwoven and have same thickness.
US07977246B2 Thermal annealing method for preventing defects in doped silicon oxide surfaces during exposure to atmosphere
A thermal anneal process for preventing formation of certain BPSG surface defects following an etch or silicon clean step using a fluorine and hydrogen chemistry. The thermal anneal process is carried out while protecting the wafer from moisture, by heating the wafer to a sufficiently high temperature for a sufficient duration of time to thermally diffuse boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer into the bulk of the layer. The thermal anneal process is completed by cooling the wafer to a sufficiently low temperature to fix the distribution of the boron and/or phosphorus materials in bulk of the doped glass layer.
US07977245B2 Methods for etching a dielectric barrier layer with high selectivity
Methods for etching a dielectric barrier layer with high selectivity to a dielectric bulk insulating layer are provided. In one embodiment, the method includes providing a substrate having a portion of a dielectric barrier layer exposed through a dielectric bulk insulating layer in a reactor, flowing a gas mixture containing H2 gas, fluorine containing gas, at least an insert gas into the reactor, and etching the exposed portion of the dielectric barrier layer selectively to the dielectric bulk insulating layer.
US07977242B2 Double mask self-aligned double patterning technology (SADPT) process
A method for providing features in an etch layer is provided by forming an organic mask layer over the inorganic mask layer, forming a silicon-containing mask layer over the organic mask layer, forming a patterned mask layer over the silicon-containing mask layer, etching the silicon-containing mask layer through the patterned mask, depositing a polymer over the etched silicon-containing mask layer, depositing a silicon-containing film over the polymer, planarizing the silicon-containing film, selectively removing the polymer leaving the silicon-containing film, etching the organic layer, and etching the inorganic layer.
US07977238B2 Method of manufacturing a semiconductor integrated circuit device
A manufacturing technique is disclosed for producing a semiconductor integrated circuit device having plural layers of buried wirings, and such that there is prevented the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried wiring. For example, in the case where the width of a first Cu wiring is not smaller than about 0.9 μm and is smaller than about 1.44 μm, and the width of a second Cu wiring and the diameter of a plug are about 0.18 μm, there are arranged two or more plugs which connect the first wirings and the second Cu wirings electrically with each other.
US07977237B2 Fabricating vias of different size of a semiconductor device by splitting the via patterning process
When forming a complex metallization system in which vias of different lateral size have to be provided, a split patterning sequence may be applied. For this purpose, a lithography process may be specifically designed for the critical via openings and a subsequent second patterning process may be applied for forming the vias of increased lateral dimensions, while the critical vias are masked. In this manner, superior process conditions may be established for each of the patterning sequences.
US07977233B2 Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium
A semiconductor device has first wiring layers 30 and a plurality of dummy wiring layers 32 that are provided on the same level as the first wiring layers 30. The semiconductor device defines a row direction, and first virtual linear lines L1 extending in a direction traversing the row direction. The row direction and the first virtual linear lines L1 define an angle of 2-40 degrees, and the dummy wiring layers 32 are disposed in a manner to be located on the first virtual linear lines L1. The semiconductor device also defines a column direction perpendicular to the row direction, and second virtual linear lines L2 extending in a direction traversing the column direction. The column direction and the second virtual linear lines L2 define an angle of 2-40 degrees, and the dummy wiring layers 32 are disposed in a manner to be located on the second virtual linear lines L2.
US07977231B1 Die bonder incorporating dual-head dispenser
Adhesive is dispensed for conducting die bonding onto a substrate including rows of bond pads aligned along a first axis and columns of bond pads aligned along a second axis transverse to the first axis where target dispensing positions are located. A first dispensing head incorporating a first nozzle and a second dispensing head incorporating a second nozzle are provided and the substrate is fed along the first axis to a position where the first and second dispensing heads are located. Pattern recognition of a columnar section of the substrate comprising one or more consecutive columns of bond pads with an optical system may be conducted by moving the optical system along the second axis relative to the substrate. Thereafter, the first nozzle and the second nozzle are driven concurrently to dispense adhesive from the first and second nozzles onto the target dispensing positions in the same columnar section of the substrate.
US07977221B2 Method for producing strained Si-SOI substrate and strained Si-SOI substrate produced by the same
A strained Si—SOI substrate, and a method for producing the same are provided, wherein the method includes the steps of growing a SiGe mixed crystal layer 14 on an SOI substrate 10 having an Si layer 13 and a buried oxide film 12; forming protective films 15, 16 on the surface of the SiGe mixed crystal layer 14; implanting light element ions into a vicinity of the interface between the Si layer 13 and the buried oxide film 12; performing a first heat treatment at a temperature in the range of 400 to 1000° C.; performing a second heat treatment at a temperature not lower than 1050° C. under an oxidizing atmosphere; performing a third heat treatment at a temperature not lower than 1050° C. under an inert atmosphere; removing the Si oxide film 18 formed on the surface; and forming a strained Si layer 19.
US07977213B1 Use of laser energy transparent stop layer to achieve minimal debris generation in laser scribing a multilayer patterned workpiece
A solution to failure mechanisms caused by mechanical sawing of a mechanical semiconductor workpiece entails use of a laser beam to cut and remove the electrically conductive and low-k dielectric material layers from a dicing street before saw dicing to separate semiconductor devices. A laser beam forms a laser scribe region such as a channel in the electrically conductive and low-k dielectric material layers, the bottom of the channel ending on a laser energy transparent stop layer of silicon oxide lying below all of the electrically conductive and low-k dielectric material layers. The disclosed process entails selection of laser parameters such as wavelength, pulse width, and fluence that cooperate to leave the silicon oxide layer stop layer completely or nearly undamaged. A mechanical saw cuts the silicon oxide layer and all other material layers below it, as well as the substrate, to separate the semiconductor devices.
US07977209B2 Method for manufacturing SOI substrate
A heating plate having a smooth surface is placed on a hot plate which constitutes a heating section, and the smooth surface of the heating plate is closely adhered on the rear surface of a single-crystal Si substrate bonded to a transparent insulating substrate. The temperature of the heating plate is kept at 200° C. or higher but not higher than 350° C. When the rear surface of the single-crystal Si substrate bonded to the insulating substrate is closely adhered on the heating plate, the single-crystal Si substrate is heated by thermal conduction, and a temperature difference is generated between the single-crystal Si substrate and the transparent insulating substrate. A large stress is generated between the both substrates due to rapid expansion of the single-crystal Si substrate, thus separation takes place at a hydrogen ion-implanted interface.
US07977204B2 Method of forming a fine pattern of a semiconductor device using a double patterning technique
A method of forming a fine pattern of a semiconductor device uses a double patterning technique. A first mask pattern is formed on a first hard mask layer disposed on a substrate. A conformal buffer layer is formed over the first mask pattern. A second mask pattern is formed such that segments of the buffer layer are interposed between the first and second mask patterns, and each topographical feature of the second mask pattern is disposed between two adjacent ones of each respective pair of topographical features of the first mask pattern. A first hard mask pattern is formed by etching the first hard mask layer using the first mask pattern, the second mask pattern, and/or the buffer layer as an etch mask. A trench is formed by etching the substrate using the first hard mask pattern as an etch mask. An isolation layer, of a material that is different from that of first hard mask pattern, is formed in the trench.
US07977200B2 Charge breakdown avoidance for MIM elements in SOI base technology and method
A semiconductor device including at least one capacitor formed in wiring levels on a silicon-on-insulator (SOI) substrate, wherein the at least one capacitor is coupled to an active layer of the SOI substrate. A method of fabricating a semiconductor structure includes forming an SOI substrate, forming a BOX layer over the SOI substrate, and forming at least one capacitor in wiring levels on the BOX layer, wherein the at least one capacitor is coupled to an active layer of the SOI substrate.
US07977199B2 Method for measuring dopant concentration during plasma ion implantation
Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.
US07977198B2 Semiconductor device and method of manufacturing semiconductor device
A semiconductor device is provided. The semiconductor device in which a field effect transistor utilizing a heterojunction is formed in a device formation region sectioned by a device separation region of a substrate comprising a semiconductor layer laminated while including a semiconductor layer having a heterojunction on a semiconductor substrate. The device separation region is composed of a layer in which a conductive impurity is introduced, and an electrode to which a positive voltage is to be applied is formed on the device separation region, specifically on the surface of at least a part of the device separation region in the periphery of the field effect transistor.
US07977197B2 Method for fabricating a transistor with reliable source doping
A transistor and a method for the fabrication of transistors with different gate oxide thicknesses is proposed, in which for the doping of the source, the typical LDD implantation, which is formed after the fabrication of the gate electrode, is replaced by a doping step, which is generated before applying the gate stack. In this way that is already a component of the remaining process sequence in the fabrication of the transistor doping can be used.
US07977193B1 Trench-gate MOSFET with capacitively depleted drift region
A trench-gate metal oxide semiconductor field-effect transistor includes a field plate that extends into a drift region of the transistor. The field plate is configured to deplete the drift region when the transistor is in the OFF-state. The field plate is formed in a field plate trench. The field plate trench may be formed using a self-aligned etch process. The conductive material of the field plate and gate of the transistor may be deposited in the same deposition process step. The conductive material may be etched thereafter to form the field plate and the gate in the same etch process step.
US07977191B2 Method for fabricating flash memory device
A method of forming a flash memory device includes forming a plurality of memory gates over a semiconductor substrate, forming an oxide film over the uppermost surface and sidewalls of the memory gates and then forming a plurality of selective gates on sidewalls of each of the memory gates.
US07977188B2 Method for fabricating semiconductor memory device
A method for manufacturing a semiconductor device comprises forming a first spacer layer at sidewalls of one or more gate electrodes, forming a trench by etching an isolation insulating layer exposed between the gate electrodes, forming a second spacer layer on sidewalls of the gate electrodes and an inner surface of the trench and forming an interlayer insulating layer between the gate electrodes.
US07977186B2 Providing local boosting control implant for non-volatile memory
A substrate of a non-volatile storage system includes selected regions in which additional ions are deeply implanted during the fabrication process. NAND strings are formed over the selected regions such that end word lines of the NAND strings are over the deeply implanted ions. The presence of the deeply implanted ions below the end word lines increases a channel capacitance of the substrate under the end word lines. Due to the increased capacitance, boosting of a channel in the substrate below the end word lines is reduced, thereby reducing the occurrence of gate induced drain leakage (GIDL) and band-to-band tunneling (BTBT) and, consequently, program disturb. A shallow ion implantation may also be made to set a threshold voltage of storage elements of the NAND string.
US07977181B2 Method for gate height control in a gate last process
Provided is a method that includes forming first and second gate structures in first and second regions, respectively, the first gate structure including a first hard mask layer having a first thickness and the second gate structure including a second hard mask layer having a second thickness less than the first thickness, removing the second hard mask layer from the second gate structure, forming an inter-layer dielectric (ILD) over the first and second gate structures, performing a first chemical mechanical polishing (CMP), remove the silicon layer from the second gate structure thereby forming a first trench, forming a first metal layer to fill the first trench, performing a second CMP, remove the remaining portion of the first hard mask layer and the silicon layer from the first gate structure thereby forming a second trench, forming a second metal layer to fill the second trench, and performing a third CMP.
US07977177B2 Methods of forming nano-devices using nanostructures having self-assembly characteristics
Provided are methods of forming nano-devices. One of the methods includes forming a nano-scale self-assembly material layer on a substrate formed of at least one layer, forming a mask layer on the self-assembly material layer, performing a surface treatment process on the substrate using the mask layer as a mask, and removing the self-assembly material layer. Accordingly, it is possible to fabricate nano-devices through a nano-scale substrate patterning process, ion implantation process and etching process, without using a light source.
US07977176B2 Flexible display device and fabricating method thereof
A flexible display device for improving reliability, and a fabricating method thereof are disclosed. In the method of fabricating the flexible display device, an insulating protective layer is formed at one side of a glass substrate. A display device including a thin film transistor array and a pad part, which is connected to the thin film transistor array, is formed on the insulating protective layer. A flexible substrate is attached on the display device. And the glass substrate is removed.
US07977174B2 FinFET structures with stress-inducing source/drain-forming spacers and methods for fabricating the same
Methods for fabricating FinFET structures with stress-inducing source/drain-forming spacers and FinFET structures having such spacers are provided herein. In one embodiment, a method for fabricating a FinFET structure comprises fabricating a plurality of parallel fins overlying a semiconductor substrate. Each of the fins has sidewalls. A gate structure is fabricated overlying a portion of each of the fins. The gate structure has sidewalls and overlies channels within the fins. Stress-inducing sidewall spacers are formed about the sidewalls of the fins and the sidewalls of the gate structure. The stress-inducing sidewall spacers induce a stress within the channels. First conductivity-determining ions are implanted into the fins using the stress-inducing sidewall spacers and the gate structure as an implantation mask to form source and drain regions within the fins.
US07977173B2 Silicon thin film transistors, systems, and methods of making same
Systems and methods of fabricating silicon-based thin film transistors (TFTs) on flexible substrates. The systems and methods incorporate and combine deposition processes such as chemical vapor deposition and plasma-enhance vapor deposition, printing, coating, and other deposition processes, with laser annealing, etching techniques, and laser doping, all performed at low temperatures such that the precision, resolution, and registration is achieved to produce a high performing transistor. Such TFTs can be used in applications such as displays, packaging, labeling, and the like.
US07977172B2 Dynamic random access memory (DRAM) cells and methods for fabricating the same
A method for fabricating a memory cell is provided. A trench is formed in a semiconductor structure that comprises a semiconductor layer, and a trench capacitor is formed in the trench. Conductivity determining impurities are implanted into the semiconductor structure to create a well region in the semiconductor layer that is directly coupled to the trench capacitor. A gate structure is formed overlying a portion of the well region. Conductivity determining ions are then implanted into other portions of the well region to form a source region and a drain region, and to define an active body region between the source region and the drain region. The active body region directly contacts the trench capacitor.
US07977167B2 Method of producing a field effect transistor arrangement
A method of producing a field effect transistor arrangement. A substrate having a first crystal surface orientation is provided. A first layer is formed above a first portion of the substrate, the first layer having a second crystal surface orientation different from the first crystal surface orientation. A second layer is formed on at least a second portion of the substrate and adjacent to the first layer, the second layer having the first crystal surface orientation. A first buried oxide layer is formed between the substrate and the first layer. Micro-cavities are formed in the second layer and oxidizing the micro-cavities, thereby forming a second buried oxide layer between the substrate and the second layer. A first field effect transistor of a first conductivity type is formed in or on the first layer. A second field effect transistor of a second conductivity type is formed in or on the second layer.
US07977166B2 Semiconductor device and fabrication method for the semiconductor device
A semiconductor device and a fabrication method for the semiconductor device which can remove the sacrifice layer deposited on the semiconductor device surface in a short time and whose manufacturing yield can be improved are provided. The semiconductor device and the fabrication method for the semiconductor device includes a field effect transistor 4 including a gate electrode 1, a drain electrode 2, and a source electrode 3 formed on a semiconductor substrate; and a hollow protective film 5 for covering the gate electrode 1, the drain electrode 2, and the source electrode 3, and being provided on the semiconductor substrate 4A. The hollow protective film 5 includes a 1st cap layer 7; a second cap layer 10 placed on the first cap layer 7; a plurality of openings 12 formed on the position of the first cap layer 7 of the upper part of the drain electrode 2 and the source electrode 3; a sealed part 12A for sealing the openings 12 by the second cap layer 10, wherein oxygen plasma is supplied through the openings 12, and ashing removal of the sacrifice layer 6 is performed.
US07977165B2 Method of manufacturing a semiconductor device
Provided is a technology capable of improving a production yield of a semiconductor device having, for example, IGBG as a semiconductor element. After formation of an interconnect on the surface side of a semiconductor substrate, a supporting substrate covering the interconnect is bonded onto the interconnect. Then, a BG tape is overlapped and bonded onto the supporting substrate and the semiconductor substrate is ground from the backside. The BG tape is then peeled off and an impurity is introduced into the backside of the semiconductor substrate by ion implantation. Then, the supporting substrate is peeled off, followed by heat treatment of the semiconductor substrate.
US07977164B2 Fuse of a semiconductor memory device and repair process for the same
Disclosed herein is a fuse of a semiconductor memory device and a repair process for the same. The fuse includes a lower conductive film of a multilayer interconnection formed on a lower structure of a semiconductor substrate, an upper conductive film of the multilayer interconnection spaced apart upward from the lower conductive film to define a predetermined vertical space therebetween, and a contact electrode, which vertically connects the upper and lower conductive films to each other and forms a fuse body. The lower conductive film includes a form not coinciding with that of the upper conductive film. With such a configuration, the device can achieve a stable minimization in the length of the fuse and the distance between adjacent fuses in consideration of a laser beam irradiation region for the high integration of the semiconductor memory device. In this way, the device performs the repair process of cutting the contact electrode and/or upper conductive film using a laser beam.
US07977157B2 Methods of forming integrated circuit packages, and methods of assembling integrated circuit packages
Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.
US07977156B2 Chipstack package and manufacturing method thereof
A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via holes; establishing electrical connections between the chip pads and corresponding connection vias; removing material from the back sides of the wafers to form thinned wafers; separating the thinned wafers into individual chips by removing a central portion of each scribe lane; attaching a first plurality of individual chips to a test wafer; attaching a second plurality of individual chips to the first plurality of individual chips to form a plurality of chip stack structures; encapsulating the plurality of chip stack structures; and separating the plurality of chip stack structures to form individual chip stack packages.
US07977149B2 Transistor, organic semiconductor device, and method for manufacture of the transistor or device
The invention provides a process for production of a transistor and an organic semiconductor element which allows satisfactory formation of active layers on desired surfaces, even if the active layers are organic semiconductor compound-containing active layers imparted with prescribed properties beforehand. A preferred mode of the process for production of a transistor is a process for production of a transistor provided with a source electrode and drain electrode, an active layer containing an organic semiconductor compound as a current channel between the electrodes, a gate electrode that controls the current flowing through the current channel and an insulating layer disposed between the active layer and gate electrode, wherein the process includes a pasting step in which a working liquid is situated between the active layer and insulating layer and the active layer and insulating layer are attached together.
US07977146B2 Method for manufacturing a photovoltaic module
For the manufacture of a photovoltaic module (1), there are attached to a transparent substrate (2) a transparent front electrode layer (3), a semiconductor layer (4) and a rear electrode layer (5) which, for forming cells (C1, C2, . . . , Cn, Cn+1) connected in series, are structured by dividing lines (6, 7, 8). A water-soluble detachment mass (12) is applied using an inkjet printer (15) to the regions of the semiconductor layer (4) at which the dividing lines (8) are to be formed in the rear electrode layer (5), whereon the rear electrode layer (5) is attached. The detachment mass (12), with the regions attached thereto of the rear electrode layer (5), is removed using a water jet (13) while forming the dividing lines (8) in the rear electrode layer (5).
US07977144B2 Thin film transistor array panel and manufacture thereof
A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.
US07977139B2 Method for manufacturing CIS based thin film solar cell device
Before a buffer layer deposition step P5, a pre-rinse step P4 is provided to remove deposits deposited on the surface of a CIS-based light absorbing layer 3D. Thus, the disturbing factors of the formation reaction of the buffer layer are removed, thereby to improve the coverage of the buffer layer, and to hold the transparency thereof. In addition, a rinse step P6 is provided after the step P5. Thus, the colloidal solid matter remaining on the buffer layer surface is cleaned and removed with a rinse solution, thereby to hold the high resistivity. The rinse solution from a second rinse tank of the step P6 is re-used. After the step P6, a draining/drying step P7 is provided. After drying, an n-type window layer (transparent conductive film) is deposited.
US07977138B1 Optical device and method of manufacturing the same
An optical device includes a semiconductor substrate (11) on which a light receiving part (12) (or a light emitting part) and electrodes (13) are formed, and a translucent plate (2) bonded on the light receiving part (12) with a translucent adhesive (5), the semiconductor substrate (11) having a plurality of convex portions (31) formed so as to separate the light receiving part (12) and the electrodes (13) and have proper gaps (32) therebetween.
US07977130B2 Method of assembling displays on substrates
Various embodiments of methods and systems for designing and constructing displays from multiple light-modulating elements are disclosed. Display elements having different light-modulating and self-assembling characteristics may be used during display assembly and operation.
US07977129B2 Method for manufacturing semiconductor optical device
A method for manufacturing a semiconductor optical device having an optical grating, includes the steps of: forming a semiconductor layer, an insulating layer and a first resin layer not containing silicon (Si); forming a second resin layer containing silicon (Si) on the first resin layer wherein the second resin layer has a pattern corresponding to the optical grating; etching the first resin layer using the second resin layer as a mask by a reactive ion etching that uses a mixed gas of oxygen and nitrogen where the first resin layer is cooled downto a first temperature during etching to form a protective layer on a side face of the etched first resin layer; increasing the temperature of the first resin layer upto a second temperature higher than the first temperature; etching the insulating layer using the patterned first resin layer as a mask; and forming the optical grating on the semiconductor layer by etching the semiconductor layer using the patterned insulating layer as a mask.
US07977127B2 Optical transmission module and manufacturing method of the same
To accommodate a plurality of optical semiconductor elements in one package with their optical axes aligned highly precisely.An optical transmission module includes an optical transmission unit, a carrier to become a base, a semiconductor optical amplification element mounted on the carrier through a first sub-carrier, first and second lenses fixed on the carrier through first and second lens holders, an element supporting member and an optical isolator fixed on the carrier, a third lens holder supported by the element supporting member, a third lens and a small carrier individually fixed in the third lens holder, and a semiconductor laser element mounted on the small carrier through a second sub-carrier.
US07977124B2 Semiconductor device and method of designing the same
A semiconductor device includes a first wiring layer, a second wiring layer and an insulating layer provided between the first wiring layer and the second wiring layer. A capacitor has a first electrode formed on the first wiring layer and a second electrode formed on the second wiring layer in such a manner that the second electrode overlaps with the first electrode. To the first electrode, two connection wirings are connected and, to the second electrode, two connection wirings are connected. The two connection wirings are connected to each other with low DC impedance substantially only through the first electrode. Similarly, the two connection wirings are connected to each other with low DC impedance substantially only through the second electrode.
US07977122B2 Fluidic device containing 3D structures
A micro fluidic device comprises a laminate structure, comprising a plurality of individual layers. At least one layer comprises a micro fluidic channel structure and at least on one side of said layer a further layer is arranged comprising a three-dimensional (3D) micro structure such that the 3D micro structure is influencing a flow characteristic of a fluid within the micro fluidic channel structure.
US07977121B2 Method and composition for restoring dielectric properties of porous dielectric materials
The present invention provides a method for restoring the dielectric properties of a porous dielectric material. The method comprises providing a substrate comprising at least one layer of a porous dielectric material comprising a contaminant comprising at least one entrapped liquid having a surface tension, wherein the porous dielectric material comprising the at least one contaminant has a first dielectric constant. The substrate is contacted with a restoration fluid comprising water and at least one compound having a surface tension that is less than the surface tension of the at least one entrapped liquid in the at least one layer of a porous dielectric material. Upon drying, the porous dielectric material has a second dielectric constant that is lower than the first dielectric constant and all constituents of the restoration fluid are removed upon drying.
US07977118B2 Two helix binders
An isolated polypeptide, Z domain, derived from B domain of Staphylococcal protein A, comprising a pair of anti-parallel alpha helices that are capable of binding a target, is provided herein. Introduction of an un-natural amino acid in the polypeptide is provided here. Also provided are methods of using the two-helix binders.
US07977116B2 Analysis method and analysis apparatus
Provided are an analysis method and an analysis apparatus that can perform analysis of a substance and information obtainment with relatively high accuracy and reproducibility without previously allowing a carrier to carry a reagent for a color reaction. In the analysis method and the analysis apparatus, the information on an analyte is obtained by using an electromagnetic wave of a frequency including a frequency band which is at least a part of a frequency range of 30 GHz or more and 30 THz or less. A non-fibrous, isotropic porous material is allowed to hold the analyte, the analyte held by the porous material is irradiated with the electromagnetic wave, a change in the propagation state of the electromagnetic wave due to transmission through or reflection by the porous material is detected and information on the analyte is obtained based on the result of the detection.
US07977112B2 System and method for determining an abused sensor during analyte measurement
A method of measuring an analyte in a biological fluid comprises applying an excitation signal having a DC component and an AC component. The AC and DC responses are measured; a corrected DC response is determined using the AC response; and a concentration of the analyte is determined based upon the corrected DC response. Other methods and devices are disclosed.
US07977110B2 Method for distinguishing between kidney dysfunctions
A method for distinguishing between kidney dysfunctions in a mammal, including pre-renal azotemia, an acute renal injury that may progress to acute renal failure, and chronic kidney disease, using a urinary or circulating NGAL assay result that is compared to a predetermined NGAL cutoff level, and a single serum or plasma creatinine measurement. Typically the single creatinine measurement cannot distinguish acute renal injury from chronic kidney disease or pre-renal azotemia, a single measurement of urinary NGAL, combined with the single serum or plasma creatinine measurement, has sufficient sensitivity and specificity to distinguish acute renal injury from normal function, prerenal azotemia, and chronic kidney disease and predicts poor inpatient outcomes. Patients admitted to the emergency department of the hospital with any of acute kidney injury, prerenal azotemia, chronic kidney disease, or even normal kidney function, can be evaluated based on the single measurements of urinary or circulating NGAL, and serum or plasma creatinine. Urinary NGAL level is highly predictive of clinical outcomes, including nephrology consultation, dialysis, and admission to the intensive care unit.
US07977109B2 Method for enriching short-chain nucleic acids
The present invention relates to a method for enriching nucleic acids with a length of not more than 300 nucleotides. The invention also relates to a kit for enriching nucleic acids with a length of not more than 300 nucleotides, to the use of such a kit, to the use of an anion exchange matrix and to a method for treating a disease.
US07977108B2 Method for detecting a mutation in a repetitive nucleic acid sequence
The present invention provides methods and probe nucleic acids for detecting mutant forms of target nucleic acids that comprise repetitive nucleotide sequences. In certain embodiments, for example, these approaches and reagents can be used to detect instability in regions of genomic DNA that include microsatellite markers. The invention also provides related reaction mixtures, systems, and kits.
US07977107B2 Oral detection test for cannabinoid use
A method for confirming the active intake of marijuana and its active component Δ9-tetrahydrocannabinol (“Δ9-THC”) by detecting the amount of 11-nor-Δ9-THC carboxylic acid (“THCA”) in oral fluid at the picogram per milliliter (pg/ml) level using chromatography/mass spectrometry/mass spectrometry (“GC/MS/MS”).
US07977106B2 Method for assaying coagulation in fluid samples
This invention is a disposable cartridge for use at the patient side to perform traditional coagulation assays on fresh whole blood or blood derivative samples. The cartridge, in use with an electronic analyzer allows a fluid sample to be metered and quantitatively mixed with reagents which activate the coagulation cascade. An artificial substrate for thrombin, the enzyme whose action results in clot formation is also provided. Clot formation is subsequently detected using a microfabricated sensor also housed within the cartridge which detects electrochemically the product of the thrombin reaction upon the synthetic substrate.
US07977105B2 Myoglobin as early predictor of myocardial infarction
Disclosed is a method for diagnosing myocardial infarction in a subject who suffers from acute coronary syndrome and has a cardiac troponin level, which is detectable, but lower than the level that is considered as being indicative for a myocardial infarction. Also disclosed is a method for identifying a subject being susceptible to cardiac intervention, wherein the subject suffers from acute coronary syndrome and has a cardiac troponin level which is detectable, but lower than a level that is considered as being indicative for a myocardial infarction. These methods are based on the determination of myoglobin and, optionally, Heart-type fatty acid binding protein (H-FABP) in a sample of the subject and comparing the amount of myoglobin and, optionally, H-FABP to reference amounts. Also disclosed are kits or devices to carry out the methods.
US07977101B2 Method and system for measuring water hardness
Prior to adding detergent or chelant, the conductivity of water in a washing chamber is measured. The maximum concentration of hard water ions that could correspond to the measured conductivity is determined, i.e., it is assumed that all of the conductivity is from calcium and/or magnesium ions in the water even though other ions may in fact be contributing to the measured conductivity. Enough chelating agent is added to the chamber to sequester this maximum concentration of hard water ions and the conductivity is measured again. Using the two conductivity measurements, the actual concentration of hard water ions is determined. A chelant factor based on the actual concentration of hard water ions is then used to determine the amount of chelant to be added for subsequent wash cycles to sequester all of the hard water ions.
US07977100B2 Punching method for use in dispensing
Provided is a punching apparatus for use in dispensing, having a blood specimen contained therein, and punching a dispensing hole in a plug body of a test tube serving as a specimen container closed by the plug body whose upper end opening is made of a rubber or synthetic resin material, the apparatus comprising a guide rail serving as a transport passage which transports the test tube while the plug body thereof is held at the upper side in a vertical state, an elevating mechanism provided at a punch position P in the middle of the guide rail, and an ultrasonic cutter which is supported by the elevating mechanism, and which is lowered when the test tube reaches the punch position, thereby punching a dispensing hole immediately before penetrating the plug body from a top face thereof.
US07977098B2 Antigenic binding patterns of norovirus to human histo-blood group antigens
The invention provides a compound which competitively inhibits the binding of a norovirus with a native blood antigen of a human host, as well as a kit for determining whether an individual has been infected by a norovirus. Also provided is a method for determining the susceptibility of an individual to infection by a particular, known strain of norovirus. The invention is based on the determination that noroviruses recognize human blood antigens such as human histo-blood group antigens (HBGAs) as a receptor in seven specific binding patterns. The invention allows one to predict that a particular strain of norovirus can infect humans who have a particular human histo-blood type, as well as blood antigens that can bind the particular strain of infecting norovirus. The invention also allows one to predict that a particular strain of norovirus will bind with one or more particular histo-blood group antigens, but will not bind with other blood group antigens.
US07977093B2 Obtention of food- or auto-antigen specific TR1 cells from a leukocyte or PBMC population
An in vitro method for the obtention of a food- or auto-antigen specific Tr1 cell population from a leukocyte or a PBMC population, includes stimulating the PBMC or leukocyte population with the food- or auto-antigen, and recovering the food- or auto-antigen specific Tr1 cell population from the stimulated cell population. Preferably, the PBMC or leukocyte population is re-stimulated at least once with the same antigen after step (1), in the presence of IL-2 and at least one interleukin selected from the group consisting of IL-4 and IL-13. The in vitro method may further include a third step of expanding the recovered antigen-specific Tr1 cell population, advantageously by contacting them with feeder cells capable of expressing factors necessary for the expansion. Preferably, the feeder cells are recombinant insect feeder cells.
US07977092B2 Methods for identifying candidate anti-tumorigenic agents
Methods for identifying stem cells and other cells specific to embryogenesis and carcinogenesis, classifying tissue samples, diagnosing precancerous and cancerous or atherosclerotic lesions, testing the value of anticancer agents, discovering macromolecules specifically expressed in particular cell types, using stem cells in restorative tissue therapy as well as methods for preparing tissue samples so heteromorphic nuclear morphotypes remain intact are disclosed.
US07977091B2 Eukaryotic layered vector initiation systems
The present disclosure provides compositions and methods for utilizing recombinant alphavirus vectors. Also disclosed are compositions and methods for making and utilizing eukaryotic layered vector initiation systems.
US07977086B2 Platform
A platform for a devise for wetting objects, especially for an incubation/hybridization chamber is defined by an object support. The platform is arranged at a distance to the object support. The platform comprises a base provided with a least one spacer and a frame carrying the base. The inventive platform is characterized in that the base is moveably mounted relative to the frame by a bearing device. In a first function position, the bearing device maintains the base such that the base projects from the frame and/or the bearing device. In a second functional position, the base projects in some areas beyond an imaginary plane in which the surface of the base is disposed.