| Document | Document Title |
|---|---|
| US07924802B2 |
Wireless communication systems and methods
Embodiments of the present invention transmit signals simultaneously over a communication channel at different RF center frequencies, and may use a single power amplifier and antenna. In one embodiment the present invention includes a method of transmitting information in a wireless communication channel comprising receiving digital signals having data to be transmitted, converting the signals to analog signals, up-converting each analog signal, combining the up-converted signals, amplifying the combined up-converted signal and transmitting the combined up-converted signal. In one embodiment, the same data is sent over a transmission channel at two different frequencies to improve reliability. |
| US07924796B2 |
Routing method in an ad hoc network
A routing method in an ad hoc network between a source node (S) and a destination node (M) to guarantee a required quality of service level between the source node and the destination node. The source node (S) sends a route request to the network, request containing required quality of service level and an initial value of cost function (Fg). A node receiving a route request sent by a neighbor node then refuses said request if node is not able to guarantee said required quality of service level, and sends over the network a route request containing required quality of service level and a value of cost function combining a value of the cost function received from a previous neighbor node and a value of The cost function calculated on a connection with a neighbor node. The destination node (M) sends a route response step by step to the source node (S) containing the cumulative value of the cost function (Fg) corresponding to a route formed by successive connections between the source node (S) and the destination node (M). The source node chooses the route between the source node (S) and the destination node (M) having the best cumulative cost function. |
| US07924795B2 |
Apparatus and method for coordinating bluetooth and wireless local area network (WLAN) and WiMAX communications
The invention provides a method for operating an apparatus capable of Bluetooth and Wireless Local Area Network (WLAN)/WiMAX communications. In one embodiment, the apparatus comprises a Bluetooth module, and a WLAN/WiMAX unit comprising a packet traffic arbitration (PTA) module, and a WLAN/WiMAX module. The Bluetooth module sends a request for Bluetooth signal transceiving to be performed in a Bluetooth time slot to the WLAN/WiMAX unit, wherein the request comprises a length information about length of a transceiving time period for Bluetooth signal transceiving. The Bluetooth module then performs an Bluetooth signal transceiving during the transceiving time period of the Bluetooth time slot after the WLAN/WiMAX unit grants the request. The WLAN/WiMAX unit then performs an WLAN/WiMAX signal transceiving during a residual time period of the Bluetooth time slot in response to the length information. |
| US07924794B2 |
Method and system for centralized radio resource allocation in communication networks, related network and computer program product
A method for centralized radio resource allocation in a communication network including a Network Control and Management System and at least one Base Station Cluster having a set of Base Station Entities to which respective permutation zones and radio resources are to be allocated. The Network Control and Management System controls the allocation of permutation zones and radio resources to the Base Station Entities by aligning the permutation zones of different Base Station Entities and by determining the radio resources to be used within each permutation zone. Preferably, the Network Control and Management System issues towards the Base Station Entities a first message requesting information on the radio resources available including specific information items for each permutation zone. The Base Station Entities return towards the Network Control and Management System a second message including the information requested in said first message, and the Network Control and Management System issues towards the Base Station Entities a third message including commands to align the permutation zones of different Base Station Entities to determine the radio resources to be used within each permutation zone. |
| US07924792B2 |
Method, system, gateway and user device for receiving/sending multimedia message
Methods, systems, gateways and user devices for receiving/sending multimedia message. According to the invention, a multimedia messaging service system comprising a wireless LAN, a multimedia messaging service user device and a multimedia messaging service gateway, the user device communicates with the gateway via the wireless LAN so as to send and receive multimedia messages. Furthermore, the gateway of the invention detect whether the user device is located within the wireless LAN. If yes, then multimedia messages are sent and received via the wireless LAN; and if not, then via conventional telecom network. The invention also discloses a corresponding gateway and a corresponding user device. |
| US07924790B2 |
Radio base station apparatus and base station controller
The invention provides a radio base station apparatus forming a wireless zone in a mobile communication system and to a base station controller performing channel control over a terminal visiting a wireless zone. The radio base station apparatus has an identifying section identifying a particular radio base station that is to maintain a radio channel between the radio base station apparatus and a terminal during a process of diversity handover, a network interface section delivering a signal to a network if a local station is not the particular radio base station, and an inter-office interface section delivering to the network a composite wave of the signal and a signal having arrived and forwarded from the terminal via the radio channel at a radio base station forming a wireless zone adjacent to a wireless zone formed by the local station if the local station is the particular radio base station. |
| US07924781B2 |
Method and apparatus for communications of data rate control information in a communication system
In a communication system, a method and an apparatus provide for efficient communications of data rate control information. A mobile station communicates a request on a data channel for reception of a data file on a traffic channel. In response to the request, a transmitter in mobile station starts communication of data rate control information on a data rate control channel. After concluding the delivery of a requested data file by a receiver in mobile station, transmitter ceases communication of data rate control information on data rate control channel from mobile station. |
| US07924778B2 |
System and method of increasing the data throughput of the PDCH channel in a wireless communication system
A wireless communication system is disclosed, including a network; and a plurality of base transceiver stations (BTS) coupled to the network, wherein at least one of the base transceiver station (BTS) is adapted to receive a request to communicate with a mobile communication unit (MU) from the network; determine whether to establish a dedicated voice channel or a dedicated packet data channel with the mobile communication unit (MU) on the basis of the request: and if the dedicated voice channel is established, receive voice information from the network and send the voice information to the mobile communication unit (MU) by way of the dedicated voice channel; or if the packet data channel is established, receive packet data from the network, encode the packet data for joint detection, and send the encoded packet data to the mobile communication unit (MU) by way of the dedicated packet data channel. |
| US07924772B2 |
Method and apparatus to support multi-user packets in a wireless communication system
Described is a method of constructing multi-user packets in a communication network utilizing packet-switching, wherein a plurality of user request service from the communication network. According to this method, priorities are allocated to each of the plurality of user. Of the plurality of user, those user are selected who indicate that multi-user packets are supportable. A group of user out of the selected user is formed, where group is defined in that all user who are member of the group allow at least one common transmission format. Finally, a multi-user packet is constructed utilizing one common transmission format. |
| US07924768B2 |
Wireless LAN system, communication terminal and communication program
A wireless LAN system in which data communication between a wireless station whose connection method as a method for wireless connection can be set to one of a plurality of connection methods and a wireless access point whose connection method has been preset to one of the connection methods is made possible by setting the connection method of the wireless station to a method identical with the connection method of the wireless access point. |
| US07924761B1 |
Method and apparatus for multihop network FEC encoding
A reliable delivery protocol for wireless networks, where a source node applies network forward error correction coding such that no transmission is ever repeated, instead all retransmissions and relay transmissions use coded packets further out in the coding sequence so that intermediate and destination nodes can make maximal use of overheard transmissions. |
| US07924760B2 |
Method for acquiring multimedia broadcast/multicast service access information
The invention discloses a method for acquiring MBMS access information comprising: in a modification period, upon receiving an MBMS access information message transmitted from a network a UE initiating a corresponding procedure according to its state; if completing the corresponding procedure successfully, the UE stopping receiving a further MBMS access information messages; if not completing the corresponding procedure successfully the UE continuing acquiring further MBMS access information messages. The method facilitates the UE to automatically control MBMS access information acquiring procedure, and further reduces energy consumption of the UE to the maximum extent. |
| US07924759B1 |
Validation method for transmitting data in a two-way audience response teaching system
A response monitoring apparatus using a remote including an electrical circuit including a user activated input, a transmitter, and a receiver, where the electrical circuit is adapted to detect operation of the user activated input and temporarily activate the receiver. After an activation period, the electrical circuit turns off the receiver to conserve battery power. Both signal verification and time monitoring may be used to generate the signal to turn of the receiver. Different transmission and receiving wavelengths are utilized at both the remote and the base unit, and a sensory output is provided on the remote to indicate receipt and acknowledgement of the signal received from the main processor. Different activation codes are sent back to the receiver to generate different sensory outputs. A supplemental teaching method for using the two way teaching apparatus is also provided. |
| US07924757B2 |
Method for improving power efficiency of subscriber stations
Disclosed is a method for improving power efficiency of subscriber stations in a communication network. A subscriber station is uniquely identified by a base station using a connection Identifier (CID). The method includes splitting CIDs of subscriber stations to form a plurality of first parts and a plurality of second parts. The method includes generating an index including a plurality of entries and transmitting the index to a plurality of subscriber stations by the base station. One or more subscriber stations switch to a power-saving mode on absence of a match between each entry of the plurality of entries with an equivalent part of CIDs associated with the one or more subscriber stations, thereby conserving power and improving power efficiency of the subscriber station. Further, at least one information element in a sub-MAP message may be compressed to reduce overhead. |
| US07924756B2 |
Method for controlling sleep-mode operation in a communication system
A method for controlling a sleep-mode operation in a communication system is provided, in which a Mobile Station (MS) transitions to an awake state in a listening interval of the sleep mode, performs one of a first operation, a second operation, and a third operation in the awake state, and transitions to a sleep state if the MS determines that there is no data to transmit to a BS and no data to receive from the Base Station (BS) after the one operation is performed. The first operation is for receiving data from the BS, the second operation is for transmitting data to the BS, and the third operation is receiving data from the BS and transmitting data to the BS. |
| US07924750B1 |
Method and apparatus for establishing a communication mode between network devices in a network
A computer program comprises instructions for advertising a plurality of communication modes. In response to detecting that one or more communication modes of a second physical layer module have been advertised to a first physical layer module, the computer program synchronizes the communication mode between the first and second physical layer modules based on the plurality of advertised communication modes of the first physical layer module and the one or more advertised communication modes of the second physical layer module. In response to not having detected that one or more communication modes of the second physical layer module have been advertised to the first physical layer module, the computer program detects whether the second physical layer module has been preset to communicate in a full duplex mode, and sets the communication mode between the first physical layer module and the second physical layer module to the full duplex mode. |
| US07924746B2 |
Method for separation of packet network+optical management domains
The present invention provides a mechanism and a method for indirectly controlling a packet handling device interface from an optical management system in an packet-optical network. A mechanism is provided for controlling a packet handling device, such as a router, interface from a management system indirectly, by using optical equipment as a proxy and communicating between the optical gear and router via a peer-to-peer signaling protocol. The present invention provides a management method that allows separate management systems for the optical layer and the packet network layer and a method for managing the network across the domains. |
| US07924744B2 |
Association of a multi-access terminal to a communication network
A method of associating a multi-access terminal (STA) with a communications network. The method includes sending data about the connection of the terminal to other networks from the terminal to an access point (AP) of the network. |
| US07924741B1 |
Session quality information collection and correlation
A communication system for collecting and correlating quality information for a session over a path between an origination node and a destination node, the communication system comprising a quality processing system configured to transmit a first subscribe message identifying a first device, and the first device configured to receive the first subscribe message, process first traffic for the session to determine first quality information, and transmit a first quality message indicating the first quality information to the quality processing system responsive to the first subscribe message. |
| US07924737B2 |
Signal degrade detecting method, signal restoration detecting method, devices for those methods, and traffic transmission system
A method of detecting a signal degrade of transmission data, a method of detecting a restoration from a signal degrade, and a signal restoration detecting device are provided. The method of detecting a signal degrade includes measuring a discarded data rate of traffic; and comparing said discarded data rate with a threshold value to detect the signal degrade. The method of detecting restoration from a signal degrade includes obtaining a first value by multiplying a threshold value and a multiplier, the threshold value used to detect a signal degrade; and comparing a discarded data rate of a control traffic after a signal degrade with the first value to detect a restoration from the signal degrade. The methods and devices disclosed herein are suitable for precisely determining a signal degrade in a communication system. |
| US07924736B2 |
DSL system estimation
Estimates of a communication system configuration, such as a DSL system, are based on operational data collected from a network element management system, protocol and users. The operational data collected from the system can include performance-characterizing operational data that typically is available in the OSL system via element-management-system protocols. Generated estimates and/or approximations can be used in evaluating system performance and directly or indirectly dictating/requiring changes or recommending improvements in operation by transmitters and/or other parts of the indication system. Data and/or other information may be collected using internal means or using system elements and components via e-mail and/or other extra means. The likelihood of the models accuracy can be based on various data, information and/or indicators of system performance, such as observed normal operational data, test data and/or prompted operational data that shows operating performance based on stimulation signals. |
| US07924726B2 |
Arrangement for preventing count-to-infinity in flooding distance vector routing protocols
Each router in a network is configured for generating router advertisement messages according to a flooding distance vector routing protocol. Each router advertisement message output according to the flooding distance vector routing protocol includes reachability information for at least one destination, and an originating router identifier indicating a router having originated the reachability information. If any router receiving the router advertisement message detects a match between the originating router identifier and the corresponding assigned router identifier, the received router advertisement message is disregarded during calculation of the best paths from the network. If the originating router identifier identifies another router, the router floods the received router advertisement message to other ports, and output its own router advertisement message based on the received router advertisement message and that specifies the originating router identifier from the received router advertisement message. |
| US07924725B2 |
Ethernet OAM performance management
Maintenance entities may be defined between customer or provider flow points for performance management on an Ethernet network. The maintenance entities may be defined for access link, intra-domain, and inter-domain, and may be defined on a link or service basis. The maintenance entities may be used to monitor performance within a network or across networks, and may be used to monitor various performance parameters, such as frame loss, frame delay, frame delay variation, availability, errored frame seconds, service status, frame throughput, the number of frames transmitted, received or dropped, the status of a loopback interface and/or the amount of time a service has been unavailable. Several management mechanisms may be used, and the measurements may be collected using a solicited collection method, in which a responses are required and collected, or an unsolicited collection method in which a response is not required. |
| US07924724B2 |
Method and apparatus for providing queue delay overload control
A method and apparatus for handling an overload condition in a communication network are disclosed. For example, the method calculates a call target rate by at least one core signaling network element for at least one edge signaling network element. The method then sends the call target rate by the at least one core signaling network element to the at least one edge signaling network element, when a total queueing delay of the at least one core signaling network element exceeds a predefined high threshold in a measurement interval, wherein the call target rate is used by the at least one edge signaling network element in an overload control that throttles signaling traffic. |
| US07924721B2 |
Communication apparatus, transmission control method, and transmission control program
A communication apparatus includes a storage unit having a plurality of storage areas corresponding to a plurality of candidates of a destination of data to be transmitted, a detecting unit for detecting the amount of data stored in each of the storage areas, a destination selecting unit for selecting one destination from among the destination candidates on the basis of at least the amount of data detected by the detecting unit, and a transmission signal generating unit for reading out a predetermined amount of data to be transmitted to the destination selected by the destination selecting unit, from the corresponding storage area, and generating a transmission signal. |
| US07924720B2 |
Network traffic monitoring
Systems, methods, and devices are described that monitor network traffic. One method includes monitoring a number of packets received by a network device based on a number of criteria to determine a flow of the packets. For each monitored packet for a particular source IP address/destination IP address pair, the method includes hashing a destination TCP/UDP port number into a range [0 . . . N]. The method further includes setting a bit in a bit field that has a width of N+1 bits based on the hashing. |
| US07924719B2 |
Parallelizing the TCP behavior of a network connection
One embodiment of the present invention provides a system that parallelizes the TCP-related actions of a network connection between two computer systems during a data transfer between the two computer systems. During operation, the first computer system partitions the data into two or more data segments, and assigns the data segments to multiple processing elements. These multiple processing elements subsequently prepare and send their assigned data segments to the second computer system in parallel using TCP. |
| US07924718B2 |
Distributed joint admission control and dynamic resource allocation in stream processing networks
Methods and apparatus operating in a stream processing network perform load shedding and dynamic resource allocation so as to meet a pre-determined utility criterion. Load shedding is envisioned as an admission control problem encompassing source nodes admitting workflows into the stream processing network. A primal-dual approach is used to decompose the admission control and resource allocation problems. The admission control operates as a push-and-pull process with sources pushing workflows into the stream processing network and sinks pulling processed workflows from the network. A virtual queue is maintained at each node to account for both queue backlogs and credits from sinks. Nodes of the stream processing network maintain shadow prices for each of the workflows and share congestion information with neighbor nodes. At each node, resources are devoted to the workflow with the maximum product of downstream pressure and processing rate, where the downstream pressure is defined as the backlog difference between neighbor nodes. The primal-dual controller iteratively adjusts the admission rates and resource allocation using local congestion feedback. The iterative controlling procedure further uses an interior-point method to improve the speed of convergence towards optimal admission and allocation decisions. |
| US07924717B2 |
Systems and methods of handling access control violations
Systems and methods of reporting access violations in a network device are disclosed. One such method comprises setting a forwarding index field in a specific entry of an access control list (ACL) to reference a specific forwarding table entry (FTE). The specific FTE is the only FTE associated with reporting access violations. The method further comprises setting a next destination field in the specific FTE to indicate a copy-to-processor behavior. The method further comprises setting the next destination field in the specific FTE to indicate a drop behavior. The setting of the next destination field is responsive to a timeout on a timer associated with reporting access violations. |
| US07924699B2 |
Signaling method in an OFDM multiple access system
A method for reducing the peak-to-average ratio in an OFDM communication signal is provided. The method includes defining a constellation having a plurality of symbols, defining a symbol duration for the OFDM communication signal, and defining a plurality of time instants in the symbol duration. A plurality of tones are allocated to a particular communication device, and a discrete signal is constructed in the time domain by mapping symbols from the constellation to the time instants. A continuous signal is generated by applying an interpolation function to the discrete signal such that the continuous signal only includes sinusoids having frequencies which are equal to the allocated tones. |
| US07924693B2 |
Optical disk and optical disk drive device
An optical disk physical has a recording region divided into zones, each zone including physical tracks adjacent to each other. An integer number of sectors are provided in each physical track. The angular recording density is higher in the more outward zones such that the linear recording density is substantially constant throughout the recording region, and logical tracks are formed of a predetermined number of sectors, independent of the physical tracks. The conversion between the logical track and sector addresses read from the disk and the linear logical addresses supplied from a host device is easy. The addresses written in headers of the sectors in the logical track in which data are actually recorded, including substitute sectors used in place of defect sectors, are preferably consecutive to further facilitate the conversion between the logical track and sector addresses read from the disk and the linear logical addresses supplied from the host device. Each of the zones can be set to serve as any of the different types of recording area independently of other zones. |
| US07924689B2 |
Optical disk apparatus
Provided is an optical disk apparatus which optimizes a frequency of a high frequency superimposing operation upon reproduction so that good reproduction performance is realized in a wide irradiation power range of a laser power. The optical disk apparatus includes: a semiconductor laser device; an optical disk discrimination circuit for performing laser discrimination; a driver device including a drive circuit for supplying direct drive current to the semiconductor laser device and a high frequency superimposing circuit for superimposing high frequency current on the drive current; and a high frequency superimposing variable circuit for changing a frequency of the high frequency current in which when information is reproduced, the high frequency superimposing variable circuit sets the frequency of the high frequency current for reproducing a multi-layer disk to be higher than the frequency of the high frequency current for reproducing a single-layer disk. |
| US07924687B2 |
Optical system for collimating elliptical light beam and optical device using the same
An optical system (20) for efficiently collimating an elliptical light beam includes a light source (21), a first lens (22), a second lens (23), and a third lens (24). The light source is adapted for providing an elliptical light beam defining different diverging angles in different directions, wherein any cross-section of the elliptical light beam emitted from the light source defines a long axis and a short axis which are perpendicular to each other. The first lens, the second lens, and the third lens are used for reconfiguring the elliptical light beam, thus obtaining a round light beam having equivalent short axis and long axis, and equivalent diverging angles in both horizontal direction and vertical direction. Optical centers of the first lens, the second lens, and the third lens commonly define a common optical axis along which the elliptical light beams travels. |
| US07924686B2 |
Objective lens and optical pickup device
An objective lens for converging light onto a recording surface of an optical information recording medium in order to perform at least one of recording, reproduction and deletion of information on the optical information recording medium. The objective lens is a bi-convex single lens having at least one aspheric surface, and satisfies the following conditions: 0.8 |
| US07924683B2 |
Optical pickup apparatus with objective optical system and guiding optical system
An optical pickup apparatus comprises a first light source for emitting a first light flux having first wavelength λ1 (430 nm>λ1>380 nm), a second light source for emitting a second light flux having second wavelength λ2 (λ2>λ1), an objective optical system having phase structure thereon, and at least one moving optical element for guiding the light flux into the objective optical system, the moving optical element being moved in a direction parallel to an optical axis corresponding to the first light wavelength λ1 and the second light wavelength λ2, wherein the objective optical system has phase structure and satisfies M1=M2=0, where, M1 and M2 denote a first and second magnifications of the objective optical system for recording and/or reproducing the information on or from the first and second optical information media. |
| US07924677B2 |
Optical recording medium with power calibration areas and a recording method therefor with optimum power control
In an optical recording medium having a plurality of recording layers on which information can be recorded by irradiating a laser beam from one side thereof, an optimum recording power to each of the recording layers can be determined. The optical recording medium has a plurality of recording layers on which information can be recorded by irradiating a laser beam from one side thereof, and each of the recording layers has a power calibration area (PCA) for optimizing the intensity of the laser beam. |
| US07924676B2 |
Multilayer information recording medium, information recorder, and information reproducer
A multi-layered information recording medium used in an information recording/reproducing apparatus applicable to both a single-layer information recording medium and an arbitrary multi-layered information recording medium is provided. The multi-layered information recording medium has a plurality of recording layers, and each of the recording layers has a guiding groove formed at a track pitch defined as a quadratic function of disk thickness (i.e., the distance from the light incident surface) of the associated recording layer. The guiding grooves of the recording layers are formed such that the track pitch of a reference recording layer having a disk thickness closest to that of the single-layer information recording medium is the smallest amongst the multiple recording layers. |
| US07924675B2 |
Information recording apparatus, imaging device, information-recording controlling method, and computer program
An information recording apparatus for recording data on an information recording medium includes a logical-format-image manager configured to generate logical-format-image data; a logical-format-image storage unit configured to store the logical-format-image data generated by the logical-format-image manager; and a recording controller configured to exercise control so that the logical-format-image data stored in the logical-format-image storage unit is recorded on an information recording medium during periods of suspension of recording of user data on the information recording medium, the periods of suspension being provided intermittently on the basis of an amount of user data stored in a buffer for storing user data. |
| US07924671B2 |
Optical disc drive apparatus, camera apparatus, and method for controlling tilt of light beam in accordance with skew in optical disc
An optical disc drive apparatus includes a rotatably supporting drive unit supporting an optical disc, an optical pickup, an angular velocity sensor detecting the magnitude and direction of an angular velocity, a skew estimating section estimating disc skew from the result of detection by the angular velocity sensor, such that one estimated skew value in a case where the angular velocity is applied in a direction in which the optical disc moves away from the optical pickup differs from another estimated skew value in a case where the angular velocity of the same magnitude but in the opposite direction, in which the optical disc approaches the optical pickup, is applied, and a tilt drive section changing the tilt of the light beam in accordance with the estimated skew value and correcting a shift, occurring because of the angular velocity, in a light beam applying position on the optical disc. |
| US07924669B2 |
Optical disk device and recording method
An optical disk device includes a test recording portion, a power control portion, a recording portion and a power correction portion. The power control portion determines a first recording power to record recording information to the optical disk based on test information recorded by the test recording portion. The power correction portion calculates a first average of modulation of the recording information recorded on a first track of the optical disk at the first recording power and a second average of modulation of the recording information recorded on a second track of the optical disk at the first recording power. The power correction portion increases the first recording power to a second recording power when the second average of the modulation drops below a first threshold value that is preset and drops below a second threshold value that is calculated based on the first average of modulation. |
| US07924667B2 |
Recording and/or reproducing apparatus, medium, and method controlling a write speed
A recording and/or reproducing apparatus, medium, and method controlling a write speed of a disk drive. The method may includes measuring a predetermined disk quality evaluating factor affecting a servo control performance in multiple areas of a disk, determining an optimal write speed of the areas of the disk corresponding to the disk quality evaluating factor, and controlling a rotation speed of the disk at an optimal write speed of a corresponding area of the disk, depending on a position of the disk in which writing is to be performed, in a writing mode. |
| US07924665B2 |
Pickup device and recording medium drive unit
The pickup device includes: a fixed portion 11, a movable portion 12 movable in a tracking direction and a focus direction; linear resilient members 13A through 13D for connecting the fixed portion 11 and the movable portion 12; a coil 21 provided on the lateral side of the movable portion 12; and a flux providing unit 22 for providing a magnetic flux generating a translational force for driving a portion different from the center of gravity O of the movable portion 12 in the tracking direction in association with the coil 21 and a rotational force for rotating the movable portion 12 in a plane orthogonal to the focus direction, the flux providing unit 22 having an arrangement in which a torque generated by driving the portion different from the center of gravity with the translational force is counteracted by the rotational force. |
| US07924664B2 |
Optical disk apparatus, optical head, and detection signal processing method thereof
Disclosed herein is a technology that enables stable and high-speed writing and/or reading in an optical disk apparatus. The optical disk apparatus has an optical head that includes a first circuit for driving a laser diode, a second circuit for sampling and holding analog electric signals that are based on reflected laser light from the optical disk, and a third circuit for converting said signals being sampled and held into digital signals. Signals digitized in the optical head are transmitted to the apparatus body side using time-division multiplexing. The first circuit, the second circuit, and the third circuit are constructed on a single substrate or in a single IC. |
| US07924661B2 |
Track-jump control system and method for maintaining track-jump stability
A track-jump control system and method are provided. The track-jump control system applied in an optical disc drive comprises a signal generator, a protection device, a velocity estimator, and a controller. The signal generator receives the signal from the PUH and generates a tracking signal and a position signal. The protection device receives the position signal and when the position signal represents the PUH pass a predetermined position of the optical disc, the protection device generates a protection signal. The velocity estimator estimates the velocity of the PUH according to the tracking signal, and then generates a velocity signal. The controller receives the velocity signal and the protection signal, protects the velocity signal according to the protection signal, and generates a control signal to control the track-jump according to the protected velocity signal. |
| US07924660B2 |
Optical data carrier
An optical data carrier includes at least one session in which one or more tracks are stored, wherein each session includes a plurality of data frames, and wherein each data frame includes controlling data and content data coded in a first format. In place of at least part of at least one bit sequence which would be included within said content data and which would correspond to constant data with respect to a second format into which said content data would be converted during a reading process, if said one or more tracks had been transferred onto said optical data carrier in accordance with a predetermined CD standard, the at least part of the at least one bit sequence is represented by a bit sequence which does not correspond to constant data with respect to said second format. |
| US07924656B2 |
Information communication terminal with acceleration sensor
An information communication terminal with a report function for use in the alarm includes the report function for awakening. However, since an operation required to stop the report function is performed in an operation unit, there is a risk that the user who is not in wakefulness makes an operation error. Using the information communication terminal including a sensor capable of detecting that the information communication terminal is shaken, a notification operation at a set time in the report function is controlled. Also, a control unit of the information communication terminal performs various kinds of control for the notification operation by partitioning vibration information detected by this sensor according to various patterns. |
| US07924650B2 |
Dynamically controlled voltage regulator for a memory
A memory device that includes multiple blocks of static random access memory (SRAM), which each have a standby mode and an active operating mode, is described. During the active operating mode, a selection circuit couples a higher voltage from a first power-signal line and a power-supply circuit to a given block of SRAM, and during the standby mode the selection circuit couples a lower voltage from a second power-signal line to the given block of SRAM. Note that a regulator circuit regulates the lower voltage on the second power-signal line by selectively opening or closing a first switch between the first power-signal line and the second power-signal line. Furthermore, a recycling circuit selectively opens a second switch between the first switch and the first power-signal line when the block of SRAM transitions from the active operating mode to the standby mode, thereby transferring charge from the block of SRAM to other blocks of SRAM. |
| US07924648B2 |
Memory power and performance management
A method for storage includes collecting information regarding respective performance characteristics of a plurality of memory units in a memory array, each memory unit including one or more cells of the memory array. When data are received for storage in the memory array, a memory unit is selected responsively to the respective performance characteristics, and the received data are stored in the selected memory unit. |
| US07924646B2 |
Fuse monitoring circuit for semiconductor memory device
A fuse monitoring circuit for a semiconductor memory device includes a fuse repair unit including a plurality of fuses each programmed with at least one repair address, configured to receive a fuse reset signal and to output a plurality of fuse state signals each corresponding to a connection state of one of the fuses, a fuse monitoring unit configured to receive a monitoring enable signal and to output a plurality of fuse state monitoring signals each corresponding to a corresponding one of the fuse state signals, each of the fuse state signals corresponding to one of a plurality of addresses, and an output unit configured to receive an output control signal and to output the fuse state monitoring signals to an output pad. |
| US07924645B2 |
Refreshing method
A refreshing method suitable for a memory device is provided which includes the following steps. A sleep mode is set and the memory device cannot be read and programmed in the sleep mode. A first and a second memory cell arrays are sequentially auto-refreshed, and the steps for auto-refreshing each of the first and the second memory cell arrays individually include: during an equalization period, switching the potential of a sense line pair, a first bit line pair and a second bit line pair to a reference voltage wherein the sense line pair is not coupled to the second bit line pair, and during a refreshing period, adjusting the potential of the first and the second bit line pairs according to a refresh sequence of the first and the second memory cell arrays, thereby coupling the sense line pair to one of the first and the second bit line pairs. |
| US07924641B2 |
Data flow scheme for low power DRAM
Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determine the exact time required for data sensing. Furthermore no precharging is performed during WRITE-operations. In case data is changing from “1” to “0” or vice versa data lines are inverted accordingly during WRITE operation. |
| US07924628B2 |
Operation of a non-volatile memory array
A cache programming operation which requires 2 SRAMs (one for the user and one for the array) may be combined with a multi-level cell (MLC) programming operation which also requires 2 SRAMs (one for caching the data and one for verifying the data), using only a total of two SRAMs (or buffers). One of the buffers (User SRAM) receives and stores user data. The other of the two buffers (Cache SRAM) may perform a caching function as well as a verify function. In this manner, if a program operation fails, the user can have its original data back so that he can try to reprogram it to a different place (address). |
| US07924627B2 |
Semiconductor memory device
In a semiconductor memory device, a voltage rise due to IR-DROP is suppressed which occurs when a ground voltage is applied to a memory cell during a program operation. Discharge transistors are provided between the ground and bit lines connected to the source and drain of the memory cell. The discharge transistors receive mutually independent discharge control signals which are generated and outputted from a DS decoder driver at the respective gates thereof. To the bit line which applies the ground voltage to the memory cell, the ground voltage can be set using the discharge transistor. |
| US07924616B2 |
Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same
The voltage of a selected word line is increased beyond the voltage to which a respective string driver transistor is capable of driving the word line by capacitively coupling a voltage to the selected word line from adjacent word lines. The voltage is capacitively coupled to the selected word line by increasing the voltages of the adjacent word lines after a programming voltage has been applied to a string driver transistor for the selected word line and after a string driver voltage has been applied to the gates of all of the string driver transistors in an array. |
| US07924614B2 |
Memory and boundary searching method thereof
A memory and a boundary searching method thereof are provided therein. When searching a boundary of a threshold voltage distribution of the memory, data errors resulted from tail bits of the memory would be corrected. Therefore, a sensing window could be broader, and the boundary of the threshold voltage distribution could be determined precisely. |
| US07924613B1 |
Data storage in analog memory cells with protection against programming interruption
A method for data storage includes storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data. Second data is stored in the analog memory cells in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data. The first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell. |
| US07924612B2 |
Nonvolatile semiconductor memory, and method for reading data
A nonvolatile semiconductor memory includes a memory cell, a first gate control circuit that is coupled to the memory cell, and a second gate control circuit that is coupled to the memory cell. The memory cell includes a first gate electrode that is formed above a channel region in a semiconductor substrate, a second gate electrode that is formed beside the first gate electrode, and that is capacitively coupled with the first gate electrode through a first insulating layer, and a charge trapping layer that is formed between the channel region and the second gate electrode, and that includes a second insulating layer for trapping a charge. Data stored in a memory cell transistor including the second gate electrode changes depending on an amount of the charge trapped in the charge trapping layer. The first gate control circuit applies a potential to the first gate electrode, when reading the data stored in the memory cell transistor. The second gate control circuit brings the second gate electrode into a floating state, when the potential is applied to the first gate electrode. |
| US07924610B2 |
Method for conducting over-erase correction
A method for conducting an over-erase correction describes the steps of: conducting a first erase and verification operation; using an FN soft program to correct over-erased cells if bit line leakage is found after the first erase and verification operation; conducting a second erase and verification operation; and using a hot carrier HC soft program to correct over-erased cells if bit line leakage is found after the second erase and verification operation. |
| US07924605B2 |
Semiconductor memory device
A semiconductor memory device includes a memory cell array. The memory cell array includes a plurality of sub arrays. Each sub array includes a plurality of memory cells. The memory cell includes a pair of storage nodes that are complementary to each other. One storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a global bit-line. The other storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a local bit-line. The global bit-line is a bit-line connected in common to the plurality of the sub arrays. The local bit-line is provided for each of the sub arrays. |
| US07924602B2 |
Method to program a memory cell comprising a carbon nanotube fabric element and a steering element
A method of programming a carbon nanotube memory cell is provided, wherein the memory cell comprises a first conductor, a steering element, a carbon nanotube fabric, and a second conductor, wherein the steering element and the carbon nanotube fabric are arranged electrically in series between the first conductor and the second conductor, and wherein the entire carbon nanotube memory cell is formed above a substrate, the carbon nanotube fabric having a first resistivity, the method including applying a first electrical set pulse between the first conductor and the second conductor, wherein, after application of the first electrical set pulse, the carbon nanotube fabric has a second resistivity, the second resistivity less than the first resistivity. Other aspects are also provided. |
| US07924601B2 |
Resistive memory and data write-in method
An ReRAM of the present invention includes a high speed write-in region and a main memory region, only memory cells designated to have the storage state out of the memory cells corresponded to data are set to the storage state in the high speed write-in region. The data written in the memory cell array are transferred to the main memory region, the memory cells of the memory cell array corresponded to the data transferred from the high speed write-in region are reset to the no-storage state in the main memory region, only the memory cells designated to have the storage state out of the memory cells are set, and all memory cells are reset to the no-storage state, or the initial state, in the high speed write-in region. |
| US07924597B2 |
Data storage in circuit elements with changed resistance
A method of storing data in an array of circuit elements, said method comprising injecting a current into selected circuit elements, said current causing a persistent change in a resistance of said selected circuit elements from a first resistance to a second higher resistance indicative of a binary data bit, wherein said current does not break an electrical circuit in which said circuit element is disposed. |
| US07924585B2 |
Pulse resistor (brake resistor) for a frequency converter in the higher voltage and capacity range
The invention relates to a pulse resistor for a frequency converter in the higher voltage and capacity range. The inventive pulse resistor is characterized by comprising at least two bipolar subsystems (24) and a resistor element (14), said subsystems (24) and said resistor element (14) being connected in series. The inventive pulse resistor is devoid of the drawbacks of known pulse resistors, it can be finely controlled by a brake current (iB) and can be adapted to any medium voltage by simple means. |
| US07924583B2 |
Method and arrangement in connection with inverter
A method and an arrangement for controlling an inverter provided with a voltage intermediate circuit, the inverter (1) comprising two or more sub-inverters (1A, 1B, 1C), each being connected with a specific cable to feed a common load (2) and each sub-inverter (1A, 1B, 1C) receiving the same switch instruction pattern. The method comprises the steps of determining the magnitude of a time delay, and consecutively generating, with each sub-inverter (1A, 1B, 1C), an output voltage according to the switch instruction for the load (2) such that each sub-inverter generates an output voltage according to the switch instruction after a time equal to the time delay. |
| US07924582B2 |
Switching device and method, in particular for photovoltaic generators
The subject matter of the invention is an inverter (3), more specifically for use in a photovoltaic plant (1) with a direct voltage input (connection terminals 4; 5) for connection to a generator (2) and an alternating voltage output (connection terminals 7; 8) for feeding into an energy supply network (6) as well as with a DC-AC converter (12) with semiconductor switch elements (15) and an intermediate circuit (11), at least one short-circuit switch element (18) being connected in parallel to the generator (2), so that the voltage will not exceed a maximum voltage value neither at the connection terminals (4; 5) of the generator (2) nor between the connection terminals (9; 10) of the inverter. This is achieved in that the inverter (3) comprises, in the intermediate circuit (12), a buffer capacitor (14) that is connected to the generator (2) through a protection diode (17) so that said buffer capacitor (14) will not be discharged upon actuation of the short-circuit switch element (18), the generator (2) working according to a clock rate in the short-circuit mode of operation. |
| US07924578B2 |
Two terminals quasi resonant tank circuit
A power converter includes a transformer, a primary switch, an auxiliary switch, first and second resonance capacitors, and a secondary side rectification means. A switch mode power supply is formed to use reflected voltage and parasitic capacitance as an energy source for a transformer resonance. The auxiliary switch effectively exchanges energy between the primary inductance of the transformer and the first and second resonant capacitors. The auxiliary switch effectively switches the transformer resonance between two distinct frequencies. In one embodiment of the invention, the power converter can be, but is not limited to, a flyback converter and further includes a comparator and a driver. The comparator is for detecting the voltage across the second resonance capacitor and the driver is configured to drive the auxiliary switch based on the output state of the comparator. The resonant nature of the converter provides zero voltage (ZVS) for the primary switch as well as for the auxiliary switch. |
| US07924577B2 |
Two terminals quasi resonant tank circuit
A power converter includes a transformer, a primary switch, an auxiliary switch, first and second resonance capacitors, and a secondary side rectification means. A switch mode power supply is formed to use reflected voltage and parasitic capacitance as an energy source for a transformer resonance. The auxiliary switch effectively exchanges energy between the primary inductance of the transformer and the first and second resonant capacitors. The auxiliary switch effectively switches the transformer resonance between two distinct frequencies. In one embodiment of the invention, the power converter can be, but is not limited to, a flyback converter and further includes a comparator and a driver. The comparator is for detecting the voltage across the second resonance capacitor and the driver is configured to drive the auxiliary switch based on the output state of the comparator. The resonant nature of the converter provides zero voltage (ZVS) for the primary switch as well as for the auxiliary switch. |
| US07924576B2 |
Fixing assembly and computer case using the same
A fixing assembly can fix a shielding panel to a housing of a computer case. The fixing assembly includes two sliding members and a driving member. The housing includes a front plate defining through holes. The shielding panel includes a plurality of latching hooks corresponding to the through holes. Each latching hook passes though the corresponding through hole. The sliding members are slidably attached to the opposite edge portions of the front plate respectively. Each sliding member defines a plurality of engaging holes corresponding to the through holes. Each engaging hole includes a latching portion and a receiving portion in communication with the latching portion. Each latching hook is latched in one corresponding latching portion or received in one corresponding receiving portion. The driving member is capable of sliding the sliding members such that each latching hook is movable between the corresponding latching portion and the corresponding receiving portion. |
| US07924572B2 |
Control device and method of manufacturing thereof
A module comprises a metallic terminal pins for connection and a circuit board with electronic components mounted thereon, a circuit board connecting side of the connector. The electronic components and the circuit board with the electronic components mounted thereon are encapsulated with the same resin. A metallic base is united to the module to obtain an electric conduction between the metallic base and the circuit board. |
| US07924571B2 |
Circuit module
A shield case shields an electric circuit on a circuit board by covering a front surface and a side peripheral surface of the circuit board. The shield case includes a frame section vertically arranged on a mother board and covering the side peripheral surface of the circuit board, and a lid section including a plate member provided at an upper end of the frame section and covering the front surface of the circuit board. The circuit board is arranged in the frame section at a position spaced apart from a front surface of the mother board, and has a circuit-side connector at a back surface of the circuit board. The circuit-side connector is connected with a mother-board-side connector provided at the mother board, so that an electric circuit of the circuit board is electrically connected with a conductive portion of the mother board. |
| US07924570B2 |
Interface assembly
A computer system comprising an interface assembly configured to support one or more I/O connections. In one variation, the computer system comprises a main board housed within a chassis, a chassis connector coupled to the chassis, and one or more I/O cables coupled to the chassis connector. In another variation, the computer assembly comprises a computer rack with a plurality of connector interfaces, each of which is adapted for engaging a computer through a chassis connector with a plurality of I/O ports. |
| US07924566B2 |
Heat dissipation device
A heat dissipation device includes a heat sink in which a plurality of mounting holes are defined, and a plurality of fasteners. Each of the fasteners includes a shaft with one end thereof received in a corresponding mounting hole, a sleeve enclosing the shaft and received in the mounting hole, and a fixture engaging the shaft and pressing the heat sink and a bottom end of the sleeve. The sleeve is filled between the end of the shaft and an inner face of the heat sink defining the mounting hole to perform an engagement of the shaft in the mounting hole of the heat sink, thereby fastening the fasteners to the heat sink. The shaft has a screw extending out of the mounting hole for mounting the heat sink on a printed circuit board. |
| US07924565B2 |
Heat dissipation structure for communication chassis
A heat dissipation structure for communication chassis. The heat dissipation structure includes an enclosure. At least one first copper heat absorption component and at least one first heat pipe assembly are disposed in the enclosure. The first heat pipe assembly is connected with the first copper heat absorption component and a section not in contact with the first copper heat absorption component. The first heat pipe assembly serves to quickly transfer heat absorbed by the first copper heat absorption component to the section not in contact with the first copper heat absorption component to dissipate the heat. |
| US07924564B1 |
Integrated antenna structure with an embedded cooling channel
According to one embodiment of the disclosure, an integrated antenna structure comprises a plurality of radiating elements, cooling channels embedded directly within each of the plurality of radiating elements, a fluid inlet, and a fluid outlet. Each of the plurality of radiating elements receive or transmit electromagnetic energy. The cooling channels are formed by an internal surface of the radiating elements. The fluid inlet and the fluid outlet are in communication with each of the cooling channels. Each of the cooling channels provides a heat exchanging function by receiving at least a portion of a fluid coolant from the fluid inlet, transferring a least a portion of the thermal energy from the respective radiating element to the received portion of the fluid coolant, and dispensing of at least a portion of the received fluid coolant out of the cooling channel to the fluid outlet. |
| US07924555B2 |
Portable electronic device
A portable electronic device includes a shell, a control circuit, a display panel and at least a bi-stability display module. The shell has an opening and an accommodating cavity in two different surfaces. The control circuit includes a first information transmission unit. The control circuit and the display panel are disposed in the shell. The display panel is electrically connected to the control circuit. The display panel has a display surface exposed from the opening. The bi-stability display module is detachably disposed in the accommodating cavity and selectively electrically connected to the control circuit. The bi-stability display module includes a second information transmission unit for communicating with the first information transmission unit and a bi-stability display for displaying the information received by the second information transmission unit. The bi-stability display module can display when the control circuit is closed. The power-consumption of the portable electronic device may be decreased. |
| US07924553B2 |
Computer device locking system
A locking system for a computer device comprising a display member coupled to a base member to enable positioning of the display member relative to the base member in a open position, a closed position and a tablet position. The system comprises a first locking mechanism adapted to restrict rotational movement between the base and display members in a direction about a first axis. The system also comprises a second locking mechanism adapted to restrict rotational movement between the base and display members in a direction about a second axis. |
| US07924550B2 |
Multiphase line fuse module
The invention relates to a multiphase line fuse module. According to the invention, said multiphase line fuse module comprises a busbar pack (32), interposed between two supporting plates (16, 42), at least one line fuse (52, 66) with an associated AC contactor (54) per phase, said phase assemblies being arranged one on top of the other in front on a small face of the busbar pack (32) having connections (56, 58) on the small face and being electrically connected to the small face connections (56, 68), and a cover closing the phase assemblies on the front side. The invention thus provides a space-saving system for line fuses (52, 66), AC contactors (54) and busbars in one housing, thereby allowing an easy replacement of the wearing parts. |
| US07924548B2 |
Electric double layer capacitor
An electric double layer capacitor includes a positive electrode, a negative electrode which faces the positive electrode and is isolated therefrom, and an electrolyte solution. The positive electrode includes a first current collector of a metal foil and a first polarizable electrode layer on the first current collector, the first polarizable electrode layer containing a phosphorus compound. The negative electrode includes a second current collector of a metal foil and a second polarizable electrode layer on the second current collector. The electrolyte solution, with which the first and second polarizable electrode layers are impregnated, has fluorine-containing anions as an electrolyte solute. |
| US07924547B1 |
RuO0.8 electrode and structure
A structure including a TiW oxygen plasma mask, a photoresist mask above and in contact with the TiW oxygen plasma mask, a 2000 angstrom thick oxygen plasma vaporizable RuO0.8 electrode layer partially under and in contact with the TiW oxygen plasma mask, the RuO0.8 electrode layer not being completely covered by a pattern of the TiW oxygen plasma mask, a first side of a PZT ferroelectric layer in contact with the RuO0.8 electrode layer and a second RuO0.8 electrode layer in contact with a second side of the PZT ferroelectric layer. |
| US07924545B2 |
Apparatus for controlling atmospheric humidity
An apparatus for modification of the atmospheric humidity profile via creating updrafts of moistened air is provided. The apparatus is based on a capacitor of a Van der Graaf generator which, with the aid of air ionizers comprising a source of alpha particles, produces a unipolar atmospheric electric current of a magnitude sufficient to achieve selective moisture transport. Operating such an apparatus augments or creates a moisture updraft, which may lead to the formation of new clouds and/or an increase in supersaturation in existing clouds, thus enhancing the development of precipitation and/or facilitating the inflow of the evaporated moisture from a water reservoir inland. |
| US07924542B2 |
Power supply controller and semiconductor device
A voltage-dividing circuit 60, which is formed of serially connected voltage-dividing resistors R1, R2, R3, is disposed between the source terminal S of a power MOSFET 15 and the ground. The divided voltage Va at a connecting point A is applied to one of the input terminals of a comparator 62, while the divided voltage Vb at a connecting point B is applied to one of the input terminals of a comparator 64. The other input terminals of the comparators 62, 64 are connected to the connecting line between an external terminal P4, to which an external resistor 12 is connected, and an FET 30. |
| US07924541B2 |
Power plug with leakage current protection function
A power plug having leakage current protection function is disclosed. The power plug includes a changeover mechanism for making and breaking electrical connection between the input (line) and output (load) side of the plug, and a control circuit for detecting a leakage current and a short circuit. A reset button and a test button are provided. When the reset button is pressed, a reset shaft operates the changeover mechanism to achieve electrical connection between the input and output sides. When there is a current leakage, a short circuit or other abnormal conditions at the output side of the plug (or the input side of the appliance connected to the plug), the control circuit generates a signal to operate the changeover mechanism to electrically disconnect the input and output sides. The test button can simulate a short circuit to electrically disconnect the input and output sides. |
| US07924539B2 |
Semiconductor integrated circuit
A protection circuit with suppressed erroneous operation due to power source fluctuation has a first resistor and a capacitor connected in series between a power source line and a ground line, an inverter with an input connected between the first resistor and the capacitor, and a MOS transistor with a gate electrode that receives an output of the inverter and with a drain electrode and source electrode connected to the power source line and the ground line. When high voltage fluctuation occurs in the power source line, a level change at a connection point between the first resistor and the capacitor is delayed according to a time constant. By the delay, the MOS transistor that receives an output of the inverter is temporarily turned on and discharges a high voltage to the ground line. |
| US07924536B2 |
Short protection device for alternator
A short circuit protection device for the protection of an alternator in which turning on/off a trigger switch causes conduction/cutoff of the field current of the field coil of the alternator is disclosed. The protection device enables the field current to pass through a sensor so that when the field current is abnormally high and the voltage drop across the sensor rises, the potential of an input end of a boost circuit electrically connected to the sensor correspondingly arises and an output end of the boost circuit electrically connected to a shutoff device drives the shutoff device to turn off the trigger switch, and the boost circuit further keeps the shutoff device in on-state to hold the trigger switch off till the short circuit condition is eliminated and the protection circuit system is reset. |
| US07924533B2 |
Multi-channel head
A multi-channel head includes a substrate, a plurality of write elements arranged in a track width direction above the substrate in a lamination direction, and a plurality of read elements arranged in the track width direction above the plurality of write elements in the lamination direction. At least one of the plurality of write elements is offset from the others in the lamination direction. All the plurality of read elements are located higher than an uppermost one of the plurality of write elements in the lamination direction. |
| US07924530B1 |
Head suspension having a punched gimbal dimple with coined inclined inner and outer surfaces oriented at different angles and method of fabricating same
A punched gimbal dimple with a coined, frusto-conical base in a head suspension and a method for producing such a dimple. The dimple has an apex and a base, the base having outer and inner surfaces which generally conform to conical frustums. The conical frustum half-cone angles differ by at least 2 degrees. The dimple and its coined base are fabricated by a dimple punch and die with mismatched punch tangent and chamfer angles. The coined dimple base can be more easily seen by optical systems for aligning a slider to the dimple. |
| US07924529B2 |
Suspension board with circuit
A stepped-part 4b with a lower tip side is formed on the top face of a pattern end 4, and a lower face 4c thereof is used as a plane on which a solder ball 7 is provided. One or more protrusions 4d made of a swollen conductive layer are formed on the lower face to limit displacement of the solder ball in the tip direction and the both side directions. The solder ball is held by the protrusions to suppress deviation of the solder ball. |
| US07924522B2 |
Apparatus and method of detecting error symbol, and disk drive apparatus using the same
An apparatus and a method of detecting an error symbol in a data storage apparatus so that an error correcting performance of an error correction decoder. The error symbol detecting apparatus includes an equalizer equalizing a signal transmitted to a channel using a channel equalization characteristic that is suitable for a corresponding system, a data detector to detect data from the signal output from the equalizer, a modeling tool designed to have the same characteristics corresponding to a partial response (PR) target polynomial applied to the system, a correlation evaluation information generating unit to generate correlation evaluation information based on a correlation degree between an actual output of the equalizer and a target output of the modeling tool, and an error symbol determination unit to determine an order of probability of error generation of the symbols based on the correlation evaluation information, and to determine a predetermined number of symbols having a high probability of generating errors corresponding to the order of probability of error generation as error generating symbols. |
| US07924518B2 |
Systems and methods for adaptive write pre-compensation
Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide methods for modifying magnetic information transfer. The methods include retrieving magnetically represented data from a storage medium, and converting the magnetically represented data to a series of data samples. A preceding pattern and a transition status is identified in the series of data samples, and an equalized channel response is computed based on an estimated NLTS value. An error value is computed that corresponds to a difference between the estimated NLTS value and an actual NLTS value, and a pre-compensation value is computed based at least in part on the error value. |
| US07924512B2 |
Lens module with extension member
A lens module includes a lens barrel, a lens holder, and an extension member. The lens barrel is received in the lens holder. The lens holder includes at least one first guiding portion. The extension member defines a receiving through hole and includes at least one second guiding portion corresponding to the at least one first guiding portion. The lens holder is fixedly received in the receiving through hole by engagement between the at least one first guiding portion and the at least one second guiding portion. |
| US07924504B2 |
Color filter structure having inorganic layers
A color filter structure includes a substrate, in which a number of first pixel regions, a number of second pixel regions, and a number of third pixel regions are defined on the substrate. Each first pixel region includes a first stack layer; each second pixel region includes a second stack layer; and each third pixel region includes the first stack layer and the second stack layer. |
| US07924499B2 |
Gain and signal level adjustments of cascaded optical amplifiers
An optical amplification device which includes first and second optical amplifiers, and a controller. The first optical amplifier receives a light and amplifies the received light. The second optical amplifier receives the light amplified by the first optical amplifier, and amplifies the received light. When a level of the light received by the first optical amplifier changes by Δ, the controller controls a level of the light received by the second optical amplifier to change by approximately −Δ. In various embodiments, the controller causes the sum of the gains of the first and second optical amplifiers to be constant. In other embodiments, the optical amplification device includes first and second optical amplifier and a gain adjustor. The gain adjustor detects a deviation in gain of the first optical amplifier from a target gain, and adjusts the gain of the second optical amplifier to compensate for the detected deviation. |
| US07924497B2 |
System and method for gain equalization and optical communication system incorporating the same
An optical amplifier including gain equalization and system incorporating the same. The amplifier includes a Raman portion and an EDFA portion with a gain flattening filter coupled between the Raman portion and the EDFA. |
| US07924494B2 |
Apparatus and method for reducing slippage between structures in an interferometric modulator
A support structure within an interferometric modulator device may contact various other structures within the device. Increased bond strengths between the support structure and the other structures may be achieved in various ways, such as by providing roughened surfaces and/or adhesive materials at the interfaces between the support structures and the other structures. In an embodiment, increased adhesion is achieved between a support structure and a substrate layer. In another embodiment, increased adhesion is achieved between a support structure and a moveable layer. Increased adhesion may reduce undesirable slippage between the support structures and the other structures to which they are attached within the interferometric modulator. |
| US07924492B2 |
Optical device including gate insulating layer having edge effect
Provided is an optical device having an edge effect with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities, and has a recessed groove in an upper portion thereof; a gate insulating layer covering the groove and a portion of the first semiconductor layer; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive impurities. |
| US07924489B2 |
Hidden micromirror support structure
Methods and apparatus for use with a micromirror element includes a micromirror a micromirror having a substantially flat outer surface disposed outwardly from a support structure that is operable to at least partially support the micromirror. The support structure includes at least one layer overlying at least two discrete planes that are both substantially parallel to the outer surface of the micromirror. In one particular embodiment, the support structure includes annular-shaped sidewalls that encapsulate a photoresist plug. |
| US07924486B2 |
MEMS scan controller with inherent frequency and method of control thereof
A MEMS scan controller with inherent frequency and a method of control thereof applied to controllers of a MEMS mirror of bidirectional scanning laser printers are disclosed. The amplitude of the MEMS mirror is adjusted by using the inherent frequency so that scan data string is sent within effective scanning window with preset frequency of a laser source of the laser printer and a certain time interval. Thus the controller is simplified and the high precision scanning is achieved. |
| US07924484B2 |
Video hologram and device for reconstructing video holograms with small region encoding
In a video hologram that enables a three dimensional scene to be reconstructed, a specific region in the hologram encodes information for a particular, single point in the reconstructed scene. This region is the only region in the hologram encoded with information for that point, and is restricted in size to form a portion of the entire hologram, the size being such that multiple reconstructions of that point caused by higher diffraction orders are not visible at the defined viewing position. This contrasts with conventional holograms, in which the information needed to reconstruct a given point is distributed across the entire hologram. |
| US07924483B2 |
Fused multi-array color image sensor
The invention, in various exemplary embodiments, incorporates multiple image sensor arrays, with separate respective color filters, on the same imager die. One exemplary embodiment is an image sensor comprising a plurality of arrays of pixel cells at a surface of a substrate, wherein each pixel cell comprises a photo-conversion device. The arrays are configured to commonly capture an image. An image processor circuit is connected to said plurality of arrays and configured to combine the captured images, captured by the plurality of arrays, and output a color image. |
| US07924479B2 |
Image reading apparatus for reading a document positioned on a plate
An image reading apparatus configured to read a document positioned on a document positioning plate includes an apparatus body, the document positioning plate mounted on the apparatus body, a document cover configured to press the document against the document positioning plate, a hinge member attached to the document cover and rotatably attached to the apparatus body, and a switch member engaging with the hinge member and configured to restrict a rotation angle of the hinge member. The switch member is located on a same side as a side of the document positioning plate of the apparatus body and is configured to restrict, at a first position thereof, the rotation angle to a first open angle and to release, at a second position thereof, the rotation angle from being restricted to the first open angle. |
| US07924477B1 |
Automated detection of creases and/or tears in scanned prints
Images of a document having a surface are captured. In this process, multiple scan lines respectively illuminated from different illumination angles relative to the document surface are scanned across the document surface in a first scan direction in relation to orientation of the document. Multiple scan lines respectively illuminated from different illumination angles relative to the document surface are scanned across the document surface in a second scan direction in relation to orientation of the document. The captured images are generated from scan line illumination reflected from the document surface during the scanning of respective ones of the scan lines across the document surface. A crease or a tear is detected in the document based on the captured images. |
| US07924473B2 |
Apparatus and method for image evaluation and program thereof
An image evaluation apparatus includes a printing status judgment unit for judging a printing status of a target image assigned with an evaluation value and an evaluation value changing unit for appropriately changing the evaluation value based on information representing the printing status. An image evaluation method and a program for causing a computer to execute the image evaluation method are also provided. Therefore, the evaluation value can be assigned to the image, reflecting an intention and preference of a user at the time of selection of an image for printing. |
| US07924466B2 |
Image processing device, and medium employed for the same
An image processing device is capable of generating single-hue image data from color image data, which include at least two records of a first area to be filled with a first color based on first hue component data and a second area to be filled with a second color based on second hue component data, the first and second areas establishing one of line contact and overlap therebetween. The image processing device includes a density determining unit that determines a first density of the first area and a second density of the second area in the single-hue image data based on the first hue component data and second hue component data, respectively, a comparing unit that compares the first and second densities as determined, and a modifying unit that modifies at least one of the first and second densities based on the comparison result by the comparing unit. |
| US07924458B2 |
Method for manufacturing three-dimensional object, three-dimensional object, and print medium
An object of the present invention is to provide a method for manufacturing a three-dimensional object which method is able to easily manufacture a three-dimensional object using a low-cost apparatus. The present invention thus manufactures a three-dimensional object containing a three-dimensional image by printing a two-dimensional image on print media each having at least an ink receiving layer and a bonding layer, on the basis of an ink jet scheme, and stacking the print media on which the two-dimensional image is printed so that the print media are bonded together via the bonding layers. |
| US07924457B2 |
Electro-optical device that includes a plurality of driving transistors turned on and off in accordance with a plurality of pulse width modulation signals
An electro-optical device includes a plurality of driving transistors turned on or turned off in accordance with a plurality of pulse-width modulation signals. An electro-optical element is electrically connected to drains of the plurality of driving transistors and emits light at a luminance corresponding to a drive current. A data signal generator generates a data signal in accordance with a plurality of pieces of data such that, the logical level of the data signal corresponds to the logical level of the corresponding pulse-width modulation signal for the corresponding section. Pulse-width modulation signal generators are provided for each respective driving transistors. |
| US07924450B2 |
Reprint card on a mobile device
A method of reprinting content on a print medium using a mobile telecommunications device, comprising the steps of: determining a first print media identifier, from a first print medium provided with content, using a sensor module of the mobile telecommunications device, the first print medium having been inserted into a media feed path of the mobile telecommunications device; retrieving a copy of the content, previously stored in a database, using the print media identifier; and, printing the copy of the content on a second print medium using a printer module of the mobile telecommunications device. |
| US07924446B2 |
Method and device for handling errors in a printer or copier
A method is provided for error handling in a printer or copier. A plurality of monitoring units detect error states of the printer or copier. A detected error states are transmitted to a controller. A plurality of successively transmitted error states are stored in a storage. The stored error states are evaluated by the controller. The stored error states are compared with predetermined error patterns and at least one error type is determined. Further steps are executed by the controller dependent on the error type. |
| US07924444B2 |
Applying print settings to print data
A data processing apparatus for executing predetermined printing processes to a file has: a display for displaying a plurality of boxes (folders) associated with a plurality of printing processes (for example, 2up, Duplex, Staple) which can be executed to the file; and a mouse for inputting a moving instruction to the file displayed on the display. When it is detected that the file which is moved by the moving instruction input by the mouse has passed through the plurality of boxes (folders) displayed on the display, the printing processes regarding the boxes (folders) through which the file has passed are executed to the file on the basis of the detection result. |
| US07924442B2 |
Image forming system and image forming apparatus
If it is not a time zone of confidential mode and there is a print job to be executed, a print process is performed based on the print job, but if there is not a print job to be executed, non-confidential data stored in a HDD device is completely deleted. In the time zone of confidential mode, a determination is made as to whether or not there is non-confidential data, and after deleting the non-confidential data, a print process based on a print job to be executed is performed. The confidentiality of data is maintained without decreasing the processing efficiency of image formation. |
| US07924440B2 |
Imaging apparatus for imaging integrated circuits on an integrated circuit carrier
The invention provides for an imaging apparatus for imaging integrated circuits and a respective integrated circuit carrier. This enables positional analysis to be carried out on the integrated circuits and respective carrier. The imaging apparatus includes a support structure, and a bed mounted on the support structure and displaceable along an operatively horizontal axis, the bed being configured to support a nest assembly that operatively retains the integrated circuit carrier and respective integrated circuits. Also included is a support assembly operatively mountable with respect to a bed on which the integrated circuit carrier and integrated circuits are supported, in use. The apparatus further includes an image recordal device mounted on the support assembly and configured to record an image representing the integrated circuit carrier and integrated circuits, the support assembly including an adjustment mechanism to enable adjustment of a position of the image recordal device relative to the bed. |
| US07924438B2 |
Method for measuring wear in the refractory lining of a metallurgical melting vessel
A method of a method for measuring wear in the lining of a metallurgical melting vessel such as a steel converter (1), by a laser scanner (2) A laser having a contouring system on a cart can be moved between measurements The laser contouring system references three permanent marks behind the cart (PM1, PM2, PM3) and two temporary marks positioned near the vessel (TM1, TM2) The distances from the movable cart to each of the five marks is determined during an initial measurement by the contouring system Every time the cart is moved and a new measurement is taken, the contouring system scans the vessel and the two temporary marks but not the permanent marks. |
| US07924437B2 |
Measurement method and apparatus, exposure apparatus
A measurement method for measuring a wavefront aberration of a target optical system using a measurement apparatus that measures the wavefront aberration of the target optical system by detecting an interference pattern includes the steps of measuring as a system parameter a shift from a design value of a value that defines a structure of the measurement apparatus and the target optical system, and measuring the wavefront aberration of the target optical system using the system parameter. |
| US07924432B2 |
Three-dimensional interferometric microscopy
A statistically sparse subset of switchable optical sources in a sample is activated, and the activated switchable optical sources are excited such that optical beams are emitted from the activated switchable optical sources along at least two optical paths. A first wavefront modification in a first optical beam emitted from the activated switchable optical sources along a first optical path is introduced and a second wavefront modification in a second optical beam emitted from the activated switchable optical sources along a second optical path is introduced, the second wavefront modification being distinct from the first wavefront modification. The first and second optical beams are interfered with each other to produce a plurality of output beams, and three-dimensional position information of the optical sources is determined based on an intensity of each output beam from the plurality of output beams. |
| US07924430B2 |
Optical heterodyne fourier transform interferometer
An interferometer and method for interferometric analysis are provided. The methodology includes generating first and second light beams from a light source, interacting the first light beam with an object under inspection, forming, from light emanating from the object under inspection in response to the interacting, an image of the light source on an image sensor, projecting the second light beam on the image on the image sensor, the combination of the light emanating from the object under inspection and the second light beam forming a collective image on the image sensor, applying a Fourier transform to the collective image formed on the image sensor, thereby forming a phase image, and isolating a wavefront map of the object under inspection from within the phase image. |
| US07924422B2 |
Calibration method for optical metrology
A zoned order sorting filter for a spectrometer in a semiconductor metrology system is disclosed with reduced light dispersion at the zone joints. The order sorting filter comprises optically-transparent layers deposited underneath, or on top of thin-film filter stacks of the order sorting filter zones, wherein the thicknesses of the optically-transparent layers are adjusted such that the total optical lengths traversed by light at a zone joint are substantially equal in zones adjacent the zone joint. A method for wavelength to detector array pixel location calibration of spectrometers is also disclosed, capable of accurately representing the highly localized nonlinearities of the calibration curve in the vicinity of zone joints of an order sorting filter. |
| US07924420B2 |
Optical inspection including partial scanning of wafers
Inspection of objects, such as semiconductor wafers, can be performed using a diluted scan wherein not all of an inspected area is actually imaged. Instead, a dilution plan can be devised based on the desired amount of area to be skipped and the particular parameters of the inspection, such as the size of each unit area to be imaged or not imaged and the distribution features of the wafer. When the same area is inspected in multiple wafers, the wafers can be inspected in sets using a dilution plan whereby a wafer (or inspected area) can be statistically inspected using diluted scans of the set of wafers. Similarly a die or group of dies of a specified type can be statistically inspected using diluted scans of a set of dies (or group of dies). When statistical inspection is used, the end results of such inspections, such as defect densities and distributions, can be corrected to account for inaccuracies that may be introduced when certain portions are imaged more often than others due to the dilution plan. |
| US07924414B2 |
Non-hazardous bulk material analyzer system
A system for processing bulk materials, comprising at least one transport apparatus that conveys a stream of bulk materials from a first process position to a second process position, an illumination source that projects light on to a surface of the stream, and at least one spectrometer that captures light reflected, emitted, or absorbed by the stream. |
| US07924411B2 |
3-D imaging system
A 3-D imaging system is described. The 3-D imaging system comprises an illumination unit for emitting light onto a target scene, an imaging sensor for imaging the target scene by detecting scattered/reflected light, an evaluation unit for determining distance information related to the target scene on the basis of light propagation time and synchronization means for providing synchronization information to the evaluation unit. The synchronization means comprises means for generating an electrical reference signal in the illumination unit, the reference signal being directly derived from the emitted light. |
| US07924409B2 |
Rangefinder and range finding method
A rangefinder includes: a lens system (3) including multiple lenses (3a, 3b) arranged so that their optical axes are parallel to each other and integrated together; an imager (4) having image capturing areas (4a, 4b) that face the lenses (3a, 3b) and transforming light incident on the image capturing areas into an electrical signal; a transparent plate (6) arranged between the imager and the lens system and having substantially the same thermal expansion coefficient as the lenses (3a, 3b); markers (11a, 11b) provided on the transparent plate for the lenses (3a, 3b) and each casting its shadow on an associated image capturing area (4a, 4b); a signal receiving section (21) receiving the electrical signal from the imager; and an image processing section (22) correcting the positions of the optical axes of the lenses by reference to information about the locations of the markers (11a, 11b) on the respective images, thereby determining the distance to an object by performing a triangulation based on the corrected positions of the optical axes. |
| US07924407B2 |
Exposure device
The present invention relates to an exposure device for forming circuit patterns onto a surface of an object. The exposure device includes at least one spatial light modulator which includes a plurality of reflection elements being arranged in a matrix fashion, at least one optical source which supplies exposure light to the reflection elements, and a bias voltage controller which applies a first voltage to the reflection elements, thereby setting the reflection elements to a first state and which does not apply a voltage to the reflection elements, thereby setting the reflection elements to a second state. In addition, the exposure light is delivered to the surface of the object in the first state, and the exposure light is not delivered to the surface of the object in the second state. |
| US07924402B2 |
Exposure apparatus and device manufacturing method
An exposure apparatus exposes a substrate by projecting a pattern image onto the substrate via a projection optical system and a liquid. The exposure apparatus includes a liquid supply device which supplies liquid onto the substrate from above the substrate through a first and second supply ports disposed in a vicinity of a projection area onto which the pattern image is projected, and a liquid recovery device which recovers liquid on the substrate from above the substrate through an inside recovery port disposed outside the first and second supply ports and an outside the second recovery port disposed outside the inside recovery port. |
| US07924401B2 |
Seal ring arrangements for immersion lithography systems
Various seal ring arrangements for an immersion lithography system are disclosed. With the seal ring arrangements, the immersion lithography system can provide better sealing effect for processing the wafers on a wafer chuck. |
| US07924400B2 |
Method for measuring liquid immersion lithography soluble fraction in organic film
A method for measuring a liquid immersion lithography soluble fraction in an organic film including a mounting step of mounting a droplet of a liquid immersion medium for liquid immersion lithography on a surface of an organic film formed on a substrate; and a transfer step of transferring a component in the organic film into the droplet. |
| US07924399B2 |
Assembly comprising a conditioning system and at least one object, a conditioning system, a lithographic apparatus and methods
An assembly including a conditioning system and an object movable into and/or out of an area to be conditioned is disclosed. The conditioning system has fluid outlet passages to supply conditioning fluid to the area to be conditioned and is configured to adjust outflow of the conditioning fluid from the fluid outlet passages depending on a position of the object. |
| US07924398B2 |
Optical apparatus and method of manufacturing device
An optical apparatus including an optical element includes a holder configured to hold the optical element, and a rectifier configured to rectify a flow of gas in a space adjacent to a surface of the optical element, and to decrease the flow rate of the gas adjacent to the surface of the optical element. |
| US07924390B2 |
Display device
A terminal includes a first part, which includes a terminal contact hole and an ITO film, and a second part, which includes the ITO film but not the contact hole. A terminal wiring line of the terminal is wide in the first part and narrow in the second part. In regions adjacent to the first part, adjacent terminal wiring lines are bent outward, thus securing enough interval between wiring lines, with the result that terminals can be formed through patterning by normal light exposure. |
| US07924386B2 |
Liquid crystal display device and driving method for fabricating the same
A liquid crystal display device includes a gate line on a substrate; a data line defining a pixel region by crossing the gate line; a thin film transistor formed at a crossing position between the gate line and the data line; a passivation layer protecting the thin film transistor; a pixel electrode connected with the thin film transistor; a common electrode generating an electric field with the pixel electrode; and a plurality of grooves on the passivation layer, wherein at least one of the pixel electrode and the common electrode is arranged at intervals in the pixel region, and the grooves are formed at intervals on the passivation layer disposed between the at least one of the pixel electrode and the common electrode arranged at intervals in the pixel region. |
| US07924383B2 |
Multi-domain vertical alignment liquid crystal display device
A liquid crystal display device is provided for not reducing the aperture ratio and improving transmittance. The liquid crystal display device comprises a substrate with a pixel electrode, a substrate with a common electrode, and a liquid crystal layer therebetween, wherein liquid crystal molecules of the liquid crystal layer are vertically aligned when no voltage is applied, each pixel comprises one or more sub-pixels, and cross-shaped slits are formed on the common electrode corresponding to each sub-pixel. |
| US07924382B2 |
Liquid crystal display device substrate, method of manufacturing liquid crystal display device substrate, liquid crystal display device and method of manufacturing liquid crystal display device
A color filter substrate for a liquid crystal display device includes a color layer, a photo spacer and a counter electrode disposed on the substrate, and an alignment control protrusion is disposed on the counter electrode for controlling alignment of liquid crystal. A manufacturing method for the color filter substrate includes the step of forming an opening by laser irradiation in a region of the counter electrode corresponding to an absent portion occurring in the alignment control protrusion. The manufacturing method is also applicable to an active matrix substrate for a liquid crystal display device. The manufacturing method can effectively correct a defect if one occurs in the alignment control protrusion. |
| US07924380B2 |
Semiconductor light-receiving device
Disclosed is light-receiving device (1) comprising semiconductor substrate (101), a light-receiving layer arranged on semiconductor substrate (101), and filter layer (103) arranged between semiconductor substrate (101) and the light-receiving layer to absorb light other than reception light. First mesa (11) serving as the light-receiving layer is surrounded by third mesa (13) for absorbing at least light other than reception light. Consequently, even when filter layer (103) is too thin to sufficiently absorb light other than reception light, third mesa (13) absorbs the light, thereby preventing the light from reaching first mesa (11). |
| US07924378B2 |
Photo-sensitive element and liquid crystal display with the same
A photo-sensitive element, a readout pixel with the photo-sensitive element, and a liquid crystal display with the readout pixels are described. The photo-sensitive element includes a switch TFT and a photo detecting device. The gate electrode of the switch TFT is electrically connected to a switch line and the source electrode of the switch TFT is electrically connected to a readout line. The photo detecting device is connected between the switch line and the drain electrode of the switch TFT for detecting the brightness of a light incident thereon. The photo detecting device is preferably a photo TFT, a photo diode, or a light sensitive resistor. The photo TFT and the switch TFT are preferably amorphous silicon transistors. The switch line is preferably a gate line disposed on the TFT array substrate of the liquid crystal display. |
| US07924376B2 |
Liquid crystal device and electronic apparatus
Aspects of the invention provide a transflective liquid crystal display device that prevents display failure, such as an afterimage and unevenness like stains, and achieves a bright display with a wide viewing angle in both transmissive display and reflective display. The liquid crystal display device of the invention is a vertically-aligned transflective liquid crystal display device having a multigap structure. Each pixel can include, in a dot region, a plurality of islands, and connecting portions for electrically connecting the adjoining islands. Two islands, of the islands, can be disposed in a transmissive display region, and the remaining island is disposed in a reflective display region. A boundary sloping area in which the thickness of a liquid crystal layer continuously changes is disposed right below the connecting portion in the pixel electrode. |
| US07924373B2 |
Display panel and method for the same
A method for forming a display panel including the following steps is provided. A barrier layer having a plurality of openings is formed. A color filter layer having a plurality of units and a plurality of black matrix structures among the plurality of units is formed over the barrier layer. A first width of the plurality of openings and a second width of the plurality of black matrix structures are determined based on a first aperture ratio of the barrier layer and a second aperture ratio of the color filter layer. |
| US07924369B2 |
Light guide plate structure and back light module
A structure of a light guide plate comprising a light guide plate and a plurality of transparent elements is disclosed. The light guide plate comprises at least onelight incident surface, a light scattering surface and a light emitting surface. The light scattering surface has a plurality of notches and these transparent elements are disposed therein. The transparent elements refractive index is different from that of the light guide plate. By disposing these transparent elements, the light scattering surface can improve light scattering effect. In addition, a back light module comprising a linearlight source and a light guide plate structure mentioned above is also disclosed. The linearlight source is disposed next to the light incident surface of the light guide plate. |
| US07924368B2 |
Diffuse multilayer optical assembly
An optical assembly includes a light diffusing layer attached to a reflective polarizing layer. An intermediate region between the light diffusing layer and the reflective polarizing layer includes an intermediate structure that defines voids between the light diffusing layer and the reflective polarizing layer. |
| US07924361B2 |
Portable display device
A portable display device capable of preventing the ambient temperature of a light source provided in a liquid crystal display device from being intensively raised. The portable display device is constructed with a liquid crystal display panel; a backlight assembly including light source for supplying light to the liquid crystal display panel, and a mold frame receiving the liquid crystal display panel and the light source as well as surrounding at least two sides of the light source. At least one region of the mold frame surrounding the sides of the light source is formed of at least one aperture. |
| US07924360B2 |
Flat panel display module wherein the side walls of the upper and lower bezels, the plurality of tenons, and the fixing plate are located in a same vertical plane
A display module includes a planar display panel, a frame disposed under the planar display panel, a lower bezel disposed outside the frame, and an upper bezel disposed outside the planar display panel. The frame includes at least one side wall. The outer surface of the side wall includes a plurality of tenons and at least one fixing plate is coupled to the side wall. The fixing plate is contacted with a side of the planar display panel. The side wall of the lower bezel includes at least one first hole corresponding to a first tenon so that the first tenon can be engaged with the first hole. The side wall of the upper bezel includes at least one second hole corresponding to a second tenon so that the second tenon can be engaged with the second hole. |
| US07924349B2 |
Arrangement for and method of projecting an image with linear scan lines
A lightweight, compact image projection module, especially for mounting in a housing having a light-transmissive window, is operative for sweeping a composite laser beam as a pattern of linear scan lines on a planar projection surface and for causing selected pixels arranged along each linear scan line to be illuminated to produce an image of high quality and in color. |
| US07924348B2 |
Method and apparatus for distributing multiple signal inputs to multiple integrated circuits
An integrated circuit (IC) structure and method of distributing multiple broadband signal inputs to multiple integrated circuits, where each IC receives at least one original signal and outputs a replica of the original signals to other ICs and receives at least one replica signal output by another IC. |
| US07924342B2 |
Image sensor with image-capturing pixels and focus detection pixel areas and method for manufacturing image sensor
An image sensor equipped with imaging pixels disposed in a two-dimensional array, which converts an image formed through an optical system to an electrical signal, includes: first focus detection pixel groups each formed by disposing in the array of the imaging pixels a plurality of first pixels adopting a split pupil method; and second focus detection pixel groups each formed by disposing in the array of the imaging pixels a plurality of second pixels adopting a split pupil method different from the split pupil method adopted in the first pixels, and a relationship between a number of the first focus detection pixel groups and a number of the second focus detection pixel groups is determined in correspondence to directions of positions assumed by the first focus detection pixel groups and the second focus detection pixel groups relative to a center of the image sensor. |
| US07924337B2 |
Dual panel pixel readout in an imager
An imager having two panels of pixels (i.e., the imager's rows of pixels are split into two panels) that are controllable by separate row decoders. The dual panel architecture allows pipelining of pixel readout and column readout operations to improve the imager's frame rate. The dual panel architecture may use a standard pixel configuration, a shared column and/or a shared row and column configuration. |
| US07924334B2 |
Solid-state imaging apparatus and imaging system using the same
A solid-state imaging apparatus including: a pixel section having pixels arranged into a matrix, each pixel containing an electric charge retaining section with a first accumulation capacitance for retaining a signal electric charge, a photoelectric conversion device with a second accumulation capacitance greater than the first accumulation capacitance where a light signal is converted into signal electric charges and then accumulated, a transfer means for controlling a transfer of the signal electric charges from the photoelectric conversion device to the electric charge retaining section, a signal amplification means for amplifying the signal electric charges retained at the electric charge retaining section and outputting them as a pixel signal, and a reset means for controlling a connection between the photoelectric conversion device and a pixel power supply; a horizontal and vertical scanning means for outputting the pixel signal; and a control section for, after transfer of the signal electric charges by the transfer means, executing the connection between the photoelectric conversion device and the pixel power supply by the reset means before a start of an exposure. |
| US07924331B2 |
Solid-state imaging device and driving method thereof that prevents image quality defect caused by coupling occuring when signal charge is read out from photodiode
An object of the present invention is to provide a solid-state imaging device and driving method thereof capable of suppressing image quality defect caused by a coupling which occurs when a readout transistor that controls signal charge readout from a photodiode. The solid-state imaging device is an amplifying solid-state imaging device which includes: a unit cell having a readout transistor which reads signal charge from the photodiode, which outputs an amplifier signal corresponding to the signal charge; a first vertical signal line and a second vertical signal line connected to the unit cell; a sampling capacity which accumulates amplifier signals transmitted via the first vertical signal line and the second vertical signal line; a bias current supply, a coupling control transistor, and a coupling control circuit, which prevent transmission of the amplifier signal from the unit cell to the sampling capacity either at the start or the end of the signal charge readout by the readout transistor. |
| US07924330B2 |
Methods and apparatuses for double sided dark reference pixel row-wise dark level non-uniformity compensation in image signals
Methods and apparatuses for row-wise dark level non-uniformity compensation of imaging sensor pixel signals. A column dependent dark reference value is determined as one of a linear and parabolic function of signal values from two areas of dark reference pixels and a column location and then used for dark level non-uniformity compensation of signal values from imaging pixels. |
| US07924321B2 |
Apparatus and method for high dynamic range imaging using spatially varying exposures
Apparatus and methods are provided for obtaining high dynamic range images using a low dynamic range image sensor. The scene is exposed to the image sensor in a spatially varying manner. A variable-transmittance mask, which is interposed between the scene and the image sensor, imposes a spatially varying attenuation on the scene light incident on the image sensor. The mask includes light transmitting cells whose transmittance is controlled by application of suitable control signals. The mask is configured to generate a spatially varying light attenuation pattern across the image sensor. The image frame sensed by the image sensor is normalized with respect to the spatially varying light attenuation pattern. The normalized image data can be interpolated to account for image sensor pixels that are either under or over exposed to enhance the dynamic range of the image sensor. |
| US07924314B2 |
Bulk image gathering system and method
A system and method for gathering bulk images are provided herein. |
| US07924313B2 |
Camera device incorporating a print roll validation apparatus
A camera device includes an image sensor for capturing an image. A printer includes an ink ejection printhead and is configured to print the captured image. A replaceable print roll includes an ink reservoir section configured to supply ink to the printer for printing. A validation apparatus is configured to validate the replaceable print roll and enable the printer to print the captured image only subsequent to validation of the print roll. |
| US07924312B2 |
Infrared and visible-light image registration
Methods and thermal imaging cameras are provided for registering visible-light and infrared images within a thermal imaging camera to reduce a parallax error in the images. Registration generally includes detecting a first feature set in the visible-light image data, detecting a second feature set in the infrared image data and generating a plurality of overlapping alignments of the infrared image data and the visible-light image data. A similarity figure is calculated as a function of the relative alignment of the first feature set and the second feature set for each alignment and the alignment with the desired similarity figure is selected. The images are aligned and the camera displays at least a portion of the visible-light image data and/or at least a portion of the infrared image data. |
| US07924309B2 |
Wireless integrated security controller
A system and method are disclosed for improved video transmission, particularly in security settings. An improved security controller combines the interfaces and functionality for high quality video delivery over often less-than-perfect wireless networks, multi-camera analog/digital video controllers and encoders, multi-frequency wireless camera support, connectivity for serial controllers, network switching, and distributed digital video recording with optional object and motion detection. The video transmission in enhanced using wireless adaptive video encoding, mobile viewing optimization, and wireless bandwidth improvement. |
| US07924307B2 |
Optical viewing system and method for operating the same
An optical viewing system (100) for viewing an object region has a display unit (105) which has a plurality of controllable display segments which make available color pulse sequences in order to generate a display image which is built up of a plurality of image points. The optical viewing system (100) includes a superposition unit (110) which superposes an image, which is made available by the display unit (105), onto the image of an object region (104). The optical viewing system has a camera unit (111, 113) to which the superposed image of display unit (105) and object region (104) is supplied. The camera unit (111, 113) has image sensors (112, 114) whose light sensitivity is adjustable as a function of time. The light sensitivity of the image sensors (112, 114) is matched to the color pulse sequence in such a manner that the image sensor (112, 114) can detect at least two light pulses of different color from the color pulse sequence from a display segment. |
| US07924305B2 |
Consistent quality for multipoint videoconferencing systems
A technique for maintaining consistent video quality between a plurality of videoconference sites is disclosed. Calibration correction factors are determined from video calibration data obtained from the videoconference sites. The calibration factors are applied to transmissions between the videoconference sites. |
| US07924304B2 |
Light-emitting element array, drive controlling device, recording head, and image forming device
A light-emitting element array includes: a resistor connected at a first end to a driving unit; and a plurality of light-emitting elements, each of the plurality of light-emitting elements including a three-terminal switching element having a first terminal, a second terminal, and a third terminal, the first terminal in each of the plurality of light-emitting elements being connected to a second end of the resistor, the second terminal in each of the plurality of light-emitting elements being connected to ground, and the third terminal in each of the plurality of light-emitting elements being connected to a control circuit. |
| US07924291B2 |
Display color correcting system
A display color-correcting system is provided. Color response values are measured that go into the vertices of polyhedra in a cubic color output space of the display. A set of corresponding values for the display is built from intermediate values determined between the measured color response values. The intermediate values are determined by decomposition and interpolation of interpolation volumes in the cubic color output space. Each of the interpolation volumes is the combined volume of a selected polyhedron within the cubic color output space and a predetermined volume of space between the selected polyhedron and the next polyhedron within the cubic color output space. The set of corresponding values is converted into decoupled RGB adjustment values that specify the RGB signals independently for the display to produce corrected colors. The RGB adjustment values are saved into one or more look-up tables. |
| US07924289B2 |
Method for determining weighting factors for the color calculation of a color value of texels for a footprint
In a method for determining weighting factors for the color calculation of a color value of texels for a footprint covering a plurality of texels in a texel grid, in a graphic system, form information of the footprint is determined at first. Afterwards, the edges of the footprint are determined and the edges determined in this way are approximated by a staircase function. The texels of the texel grid contacted by the staircase function are determined and a weighting factor is determined for each texel containing a portion of the staircase function, depending on the subarea of the respective texel covered by the footprint. |
| US07924287B2 |
Method and system for minimizing an amount of data needed to test data against subarea boundaries in spatially composited digital video
A method and system for minimizing an amount of data needed to test data against subarea boundaries in spatially composited digital video. Spatial compositing uses a graphics unit or pipeline to render a portion (subarea) of each overall frame of digital video images. This reduces the amount of data that each processor must act on and increases the rate at which an overall frame is rendered. Optimization of spatial compositing depends on balancing the processing load among the different pipelines. The processing load typically is a direct function of the size of a given subarea and a function of the rendering complexity for objects within this subarea. Load balancing strives to measure these variables and adjust, from frame to frame, the number, sizes, and positions of the subareas. The cost of this approach is the necessity to communicate, in conjunction with each frame, the graphics data that will be rendered. Graphics data for a frame is composed of geometry chunks. Each geometry chunk is defined by its own bounding region, where the bounding region defines the space the geometry chunk occupies on the compositing window. Only the parameters that define the bounding region are communicated to each graphics unit in conjunction with the determination of which graphics unit will render the geometry chunk defined by the bounding region. The actual graphics data that comprises the geometry chunk is communicated only to those geometry units that will actually render the geometry chunk. This reduces the amount of data needed to communicate graphics data information in spatially composited digital video. |
| US07924286B2 |
System and method of customizing animated entities for use in a multi-media communication application
In an embodiment, a method is provided for creating a personal animated entity for delivering a multi-media message from a sender to a recipient. An image file from the sender may be received by a server. The image file may include an image of an entity. The sender may be requested to provide input with respect to facial features of the image of the entity in preparation for animating the image of the entity. After the sender provides the input with respect to the facial features of the image of the entity, the image of the entity may be presented as a personal animated entity to the sender to preview. Upon approval of the preview from the sender, the image of the entity may be presented as a sender-selectable personal animated entity for delivering the multi-media message to the recipient. |
| US07924282B2 |
Object loading and unloading system
An object loading and unloading system for loading and unloading objects in a graphically simulated virtual environment, or virtual world, is described. A world object manager manages multiple object loaders to load and unload objects as geographic cells move within and out of a loading radius of each loader based on a position of a camera or view within the virtual world. Each object loader has an associated priority level, and the world object manager notifies a loader to load its corresponding objects in a cell only after all loaders having higher priority levels, which also have that cell in their respective loading radii, have already loaded their corresponding objects in that cell. The world object manager may expose various programming interfaces to provide an extensible object loading system whereby third parties can define new loaders to be incorporated into the hierarchical spatial object loading system. |
| US07924279B2 |
Protocol-based volume visualization
A system for visualizing a 3D volume, in particular for medical applications, includes an input 1010 for receiving a three-dimensional set of data representing voxel values of the 3D volume. The data set is stored in a storage 1030. A processor projects the volume onto an imaginary 2D projection screen from a predetermined viewpoint. For each pixel of the 2D projection image a ray is cast through the pixel and through the volume. A protocol is used that, while traversing along ray positions within the volume, determines a rendering algorithm and/or rendering parameters in dependence on the ray position. For each ray position the determined rendering algorithm/parameters are used to calculate a contribution to a pixel value of the pixel based on at least one voxel value within a predetermined range of the ray position. An output 1040 is used for providing pixel values of a 2D image for rendering on a display. |
| US07924276B2 |
Display device, method of driving same and electronic device mounting same
A liquid crystal panel (2) includes scanning signal lines (31) for supplying scanning signals to gate electrodes (20) of TFTs (14), and data signal lines (32) for supplying data signals to data electrodes (24) of TFTs. The liquid crystal panel further includes auxiliary capacitive electrode pads (27a) for use in forming auxiliary capacitance and an auxiliary capacitive lines (33) so as not to generate a capacitive bond with the scanning signal lines. The liquid crystal panel is driven at a rewriting frequency of a screen of not more than 30 Hz. As a result, the liquid crystal panel can be driven at a low consumption power while maintaining a desirable display quality of the liquid crystal panel. |
| US07924269B2 |
Display devices and methods forming the same
Display devices and methods forming the same. A digitizer sensor board is integrated on an upper substrate or a lower substrate of a display panel to provide a display device. In the display device, the display panel displays images, and the digitizer sensor board is integrated into the display panel to sense position of a position pointer or finger contact on a surface. |
| US07924266B2 |
Stand alone module mouse with replaceable cover
A computer mouse includes two components. A fully functional module mouse and a shell mouse that fits over the module mouse. The module mouse is configured to perform at least one complete mouse function, independently of the shell mouse. Other functions can be split between the shell mouse and the module mouse, in any desired way. |
| US07924263B2 |
Wide flat panel LCD with unitary visual display
A flat panel display, particularly a liquid crystal display has a front plate with a plate area defined by a plate perimeter, which is in turn defined by a first and second pair of parallel sides, the pairs of sides in perpendicular relationship to each other. An active display area providing a unitary visual display is located within the plate perimeter. In the invention, this active display area is divided into at least first and second display areas, a visual output of said first and second display areas being separately driven. In some embodiments, one or both of the display areas is subdivided into first and second subdisplay areas, with the visual output of the first and second subdisplay areas being separately driven. |
| US07924262B2 |
Light source driving apparatus, display device having the same and method of driving a light source
A light source driving apparatus according to the present invention includes a controller, a first driver and a second driver. The controller outputs a first control signal to drive the light source in a normal-luminance mode and outputs a second control signal to drive the light source in a low-luminance mode. The first driver drives the light source, based on a first voltage in response to the first control signal in the low-luminance mode. The second driver drives the light source, based on a second voltage in response to the second control signal in the normal luminance mode. Therefore, the light source driving apparatus driving the light source decreases current-consumption and prevents unnecessary power consumption from increasing in a low-luminance driving mode. |
| US07924258B2 |
Gate driving apparatus for preventing distortion of gate start pulse and image display device using the same and driving method thereof
A gate driving apparatus and image display device using the same and driving method thereof comprises a start pulse generator which generates a second gate start pulse by a logic operation of a first gate start pulse and a gate output enable signal, a shift register which generates a shift signal by sequentially shifting the second gate start pulse in accordance with a gate shift clock, and an output unit which outputs the shift signal in accordance with the gate output enable signal. |
| US07924257B2 |
Display device, driver circuit therefor, and method of driving same
A driver circuit for driving a display device includes N-number of grayscale selecting circuits, which correspond to N-number of data electrodes, each for selecting one grayscale voltage from among a plurality of grayscale voltages in accordance with an image signal; one voltage follower circuit for subjecting the grayscale voltages, which have been selected by the grayscale selecting circuits, to an impedance conversion to thereby drive the data electrodes; and a changeover control circuit for exercising control so as to divide one horizontal interval into at least (N+1)-number of intervals, drive a Kth data electrode by the output of the amplifier circuit by inputting only an output of a Kth grayscale selecting circuit to the amplifier circuit in a Kth (K=1 to N) interval, and drive the Kth data electrode by the output of the Kth grayscale selecting circuit in at least some intervals other than the Kth interval. |
| US07924256B2 |
Display device
A display device in which a plurality of pixels are disposed in a matrix form includes data lines connected with the pixels, a signal controller for processing image data received from the outside and generating a plurality of control signals and clock signals, a gray voltage generator for generating a plurality of gray voltages, and a data driver including a plurality of data driver ICs for selecting gray voltages corresponding to image data from signal controller among the gray voltages and applying them as data voltages to data lines, wherein data driver includes four data driver ICs groups and each data driver IC group receives a separate clock signal and includes at least two data driver ICs connected in series with each other is disclosed. Because data driver IC groups receive the separate clock signals a signal delay can be reduced, and because phases of the clock signals are different a harmonic component can be reduced compared with the related art in which the clock signals have no phase difference, and thus EMI can be reduced. |
| US07924255B2 |
Gate driving method and circuit for liquid crystal display
A gate driving method for a liquid crystal display (LCD) and a gate driver thereof are provided. The LCD has a plurality of scan lines. The method starts by generating a gate driving signal. A correction signal is superposed to the gate driving signal to generate a corrected gate driving signal and to reduce a high voltage level of the gate driving signal, wherein a polarity of the correction signal is opposite to a polarity of the gate driving signal. The corrected gate driving signal is then outputted to drive one of the corresponding scan lines. |
| US07924243B2 |
Image display apparatus for forming an image with a plurality of luminescent points
The present invention relates to an image display apparatus for forming an image with a plurality of luminescent spots to be precisely aligned in a matrix. For example, a spacer disposed between an electron source and a face plate causes luminescent spots on the face plate spaced unevenly. The luminescent spots spaced unevenly will produce a visual unevenness in luminance which deteriorates the quality of produced image. By modifying the quantity of light of luminescent spots spaced unevenly, the visual unevenness in luminance is compensated. |
| US07924242B2 |
Apparatus and method of driving plasma display panel
An apparatus and method of driving a plasma display panel for preventing a brightness spot miss-fire and a miss-writing as well as reducing a manufacturing cost are disclosed. In the apparatus, a set-up supplier supplies a rising ramp waveform to scan electrodes in an initialization period, and supplies a positive enhancing pulse to the scan electrodes during an enhancing period following said initialization period. A negative voltage supplier supplies a falling ramp waveform to the scan electrodes in the initialization period, and supplies a negative enhancing pulse to the scan electrodes during the enhancing period. |
| US07924241B2 |
Plasma display apparatus and method of driving the same
A plasma display apparatus and a method of driving the same are disclosed. The plasma display apparatus includes a plasma display panel including first, second and third electrodes, a sustain driver supplying a sustain signal to the first electrode during a sustain period, a data driver supplying a data signal to the third electrode during an address period, a first reference voltage source that is commonly connected to the sustain driver and the second electrode, a second reference voltage source connected to the data driver, and a reference separation controller. The reference separation controller separates or connects the first reference voltage source from or to the second reference voltage source. |
| US07924237B2 |
Antenna device
An antenna device including a substrate, a ground layer, a first feeding element, a second feeding element, a first control circuit and a second control circuit is provided. The substrate has a top surface and a lower surface. The ground layer disposed on the lower surface includes a first, a second and a third ground portions. The third ground portion is separated from the first and the second ground portions by a first and a second slots, respectively. The first and the second feeding elements include a first and a second conductive feeding lines, respectively. The first and the second conductive feeding lines cross over the first and the second slots and are electrically connected to the first and the second ground portions, respectively. The radiation pattern of the antenna device is variable by selectively operating the first, the second, the third and the fourth control circuits. |
| US07924235B2 |
Antenna apparatus employing a ceramic member mounted on a flexible sheet
An antenna apparatus used in a wireless communication medium or a wireless communication medium processing apparatus constructed by a constitution of including a magnetic member in which a magnetic ceramic powder is used as a major component thereof and which is provided with flexibility, an antenna formed at a surface or inside of the magnetic member, and a matching circuit of the antenna formed at the surface or the inside of the magnetic member. |
| US07924228B2 |
Storage medium with built-in antenna
A storage medium with built-in antenna includes circuit board on which semiconductor element is placed, first and second magnetic layers sandwiching semiconductor element and circuit board, and first and second antenna coils disposed on first and second magnetic layers. First and second antenna coils are connected in parallel on a flexible sheet. First and second antenna coils are folded at the sides of first and second magnetic layers, respectively, and electrically connected to semiconductor element. |
| US07924225B2 |
Direction finding antenna systems and methods for use thereof
An antenna system comprising a first antenna element, a second antenna element, and a parasitic element, wherein the parasitic element is arranged with regard to the first antenna element and the second antenna element such that a greatest difference in gain between respective antenna patterns of the first and second antenna elements occurs at a null of the pattern of the first antenna element. |
| US07924218B2 |
System for enhanced detection of a target
A method for discrimination of a target from clutter, comprising: providing phase-range data associated with a return pulse of a radar device and second phase-range data associated with a subsequent return pulse; comparing the phase-range data and the second phase-range data to obtain a difference; differentiating the differences with respect to range; and discriminating the target from the clutter by identifying coordinates from the differentiated differences satisfying velocity thresholds associated with the clutter. In one embodiment, the subsequent return pulse is drawn after skipping one or more pulses after the return pulse. In another embodiment, the subsequent return pulse is drawn successive to the return pulse. In other aspects, the invention can be a detection system and/or computer-readable medium adapted implement the method. |
| US07924214B2 |
Azimuth detecting apparatus and radar apparatus
In an azimuth detecting apparatus, a receiver includes antenna elements arranged at predetermined intervals d. A first signal producer produces, based on reception signals generated by the antenna elements, first signals which are equivalent to signals generated by antenna elements arranged at first intervals d1, d1 being an integral multiple of d. A second signal producer produces, based on the reception signals, second signals which are equivalent to signals generated by antenna elements arranged at second intervals d2, d2 being an integral multiple of d and greater than d1. A first azimuth detector detects, within a first azimuth detection area whose angular range is defined by d1, the azimuth of the target based on the first signals. A second azimuth detector detects, within a second azimuth detection area whose angular range is defined by d2, the azimuth of the target based on the second signals. |
| US07924211B2 |
Electromagnetic pulse reflector detection method
Detecting reflectors of an emitted electromagnetic pulse, using a received signal, by time-sampling the received signal and the emitted pulse at a same sampling frequency, each received sample corresponding to a return-trip distance for the emitted pulse between its transmitter and a possible reflector. The sampled received signal is divided by the emitted pulse sampled and temporally translated into an interval of duration equal to the emitted pulse divided into L samples, producing L results of the division. A weighted summing of the L results of the division is calculated, the sets of L weights each having a support on which the weights are not zero, every subinterval of length between L/n and L being the support for at least one set of weights and no support having a length of less than L/n, wherein the sums of the weights of a set all being equal, and n is a nonzero integer such that L/n is greater than or equal to 2. Finally, determining the minimum of the summations, wherein a nonzero minimum characterizes the amplitude of the pulse reflected by a reflector located at the distance corresponding to the start of a time interval being considered. |
| US07924210B2 |
System, method, and apparatus for remote measurement of terrestrial biomass
A system, method, and/or apparatus for remote measurement of terrestrial biomass contained in vegetative elements, such as large tree boles or trunks present in an area of interest, are provided. The method includes providing an airborne VHF radar system in combination with a LiDAR system, overflying the area of interest while directing energy toward the area of interest, using the VHF radar system to collect backscatter data from the trees as a function of incidence angle and frequency, and determining a magnitude of the biomass from the backscatter data and data from the laser radar system for each radar resolution cell. A biomass map is generated showing the magnitude of the biomass of the vegetative elements as a function of location on the map by using each resolution cell as a unique location thereon. In certain preferred embodiments, a single frequency is used with a linear array antenna. |
| US07924208B2 |
Low power 10 Gigabit Ethernet interface
A low-power communication interface, such as used with 10 Gigabit Ethernet, that uses an analog front end having a charge-domain analog-to-digital converter that uses a charge-domain pipeline. |
| US07924207B2 |
Single slope analog-to-digital converter
A single-slope ADC, particularly suitable for use in a massive-parallel ADC architecture in a readout circuit of a CMOS imager. A plurality of ramp signals are generated which define non-overlapping sub-ranges of the full input range. For each ADC channel, the sub-range in which the voltage of the input signal falls is determined, and the corresponding ramp signal is selected for use in the A/D conversion. Thus, the speed of the A/D conversion process can be increased and the power consumption decreased. |
| US07924203B2 |
Most significant bits analog to digital converter, and an analog to digital converter including a most significant bits analog to digital converter
A most significant bits analog to digital converter for determining a first P bits of an N bit analog to digital conversion, the most significant bits analog to digital converter comprising: a digital to analog converter a capacitive attenuator, and a switching arrangement for inhibiting action of the attenuator during sampling and enabling the attenuator during conversion. |
| US07924201B2 |
Current output type digital-analog conversion circuit, and graphic display device
A current output type digital-analog conversion circuit which outputs a current signal includes a decoder for decoding higher-order bits of input digital data, a plurality of binary current generators, and a current adder. Each of the binary current generators includes a device for outputting a binary current which increases linearly as binary values according to lower-order bits of the input digital data, and a device for outputting a predetermined all-ON current. Either the device for outputting the binary current or the element for outputting the all-ON current of the binary current generator is selected according to a decode signal output by the decoder. The current adder adds up and outputs the binary currents and the all-ON currents output by the plurality of binary current generators. |
| US07924198B2 |
Digital-to-analog converter
A digital-to-analog converter is disclosed. The digital-to-analog converter includes a decoder that receives a plurality of digital input signals to output a plurality of thermometer decode signals, a current supply part including a plurality of current sources, each of which operates in one of a sleeping mode and an operating mode under the control of the thermometer decode signals, and a switching part including a plurality of switching units, each of which operates in one of a sleeping mode and an operating mode under the control of the thermometer decode signals. The current supply part selectively outputs a plurality of switching power signals. The switching part outputs an analog signal under the control of the thermometer decode signals. |
| US07924189B2 |
Method and apparatus for analogue to digital conversion
An analogue to digital conversion unit (208, 210) comprises three analogue to digital converters (ADCs) (300, 301, 302) having different dynamic ranges. A lowest dynamic range ADC (300) and middle dynamic range ADC (301) have saturation detectors SAT for outputting a signal when the amplitude of an input analogue signal reaches their respective dynamic ranges and saturates them. The middle dynamic range ADC (301) and highest dynamic range ADC have enable inputs EN for switching themselves on. The output of the saturation detector SAT of the lowest dynamic range ADC (300) is connected to the enable input EN of the middle dynamic range ADC (301). The output of the saturation detector SAT of the middle dynamic range ADC (301) is connected to the enable input EN of the highest dynamic range ADC (302). So, whilst the middle and the highest dynamic range ADCs (301, 302) are normally switched off, when the lowest dynamic range ADC becomes saturated, the middle dynamic range ADC (301) is switched on; and when the middle dynamic range ADC (301) is saturated, the highest dynamic range ADC (302) is switched on. The input analogue signal is therefore converted to a digital output using the ADC (300, 301, 302) having the lowest sufficient dynamic range and the higher dynamic range ADCs (301, 302) are switched off unless needed. |
| US07924187B2 |
Multi-speed burst mode serializer/de-serializer
A multi-speed burst mode serializer/de-serializer (SerDes) is configurable and can operate in one of a plurality of operating modes. The plurality of operating modes correspond to the reception of signals from optical network units that operate at different nominal speeds. These various modes of operation can enable a single SerDes design to apply to a variety of speeds and network configurations (e.g., point-to-point or point-to-multipoint). In one example, the design can be initially configured for operation with a single ONT or a network of ONTs at a single speed, or can be dynamically configured during operation for use with a network of ONTs operating at different speeds. |
| US07924186B2 |
Dual purpose serializer/de-serializer for point-to-point and point-to-multipoint communication
A dual purpose serializer/de-serializer (SerDes) for point-to-point and point-to-multipoint communication. A configurable SerDes can be designed to operate in one of a plurality of operating modes. Selection between the plurality of operating modes can be based on information received via a management interface. In one example, the various operating modes can be defined with different locking times and jitter characteristics. |
| US07924179B2 |
Variable-length code determining device and variable-length code decoding method
To provide a decoding device that compactly stores prefix related information therein compatible to variable-length codes used in various systems. The decoding device includes a register file in which a prefix common portion and a word length of the prefix common portion, prefix individual portions and word lengths of the prefix individual portions, word lengths of suffixes, and an input bit sequence are stored, a bit matching unit that determines a prefix included in the input bit sequence from prefixes generated from the prefix common portion and the prefix individual portions, a codeword computation unit that computes the word length of a codeword included in the input bit sequence using the respective word lengths of the prefix common portion, a prefix individual portion, and a suffix corresponding to the determined prefix, and an index computation unit that computes an index in a symbol table using the respective word lengths of the corresponding suffix and the codeword. |
| US07924177B2 |
Distributed on-demand media transcoding system and method
A method for delivering media content over a network includes transcoding the media content to generate multiple copies of the media content, each of the multiple copies having a different destination type or a different source type or both, storing the multiple copies in a cache, receiving requests for the media content, and selecting and delivering a copy of one of the multiple copies in response to each of the requests. A further method for providing media content transcoding services includes fetching media content, selecting one of multiple transcoders for transcoding from multiple source types to multiple destination types, wherein the one transcoder is selected based at least on the destination type, sending the media content to the selected transcoder, transcoding the media content to the destination type, thereby generating transcoded media content, and transmitting the transcoded media content. |
| US07924176B2 |
N-state ripple adder scheme coding with corresponding N-state ripple adder scheme decoding
Methods and apparatus for implementing an n-state ripple-adder scheme coder with n≧2 using an n-state reversible switching function and a non-reversible n-state switching function acting upon a first and a second word of at least 2 n-state symbols are disclosed. Corresponding decoding methods and apparatus are also disclosed. A resulting codeword may be a codeword which can be decoded by using the identical or different n-state switching functions in a corresponding ripple adder scheme decoder. Feistel networks and LFSRs apply the coding and decoding. Systems using the coding and decoding methods may be communication, storage and/or financial systems. |
| US07924174B1 |
System for controlling a lighting level of a lamp in a multi-zone environment
System for controlling a lighting level of a lamp in a multi-zone environment. |
| US07924173B2 |
Electronic navigation system and method
The invention provides a system for providing geographic information. The system includes a mobile unit having a first geographic database and a base unit having a second geographic database that is more up-to-date than the first geographic database. The base unit receives a request from a mobile unit for updated geographic data. The base unit identifies a portion of the second geographic database that corresponds to the request and provides a response to the mobile unit comprising the identified portion of the second geographic database. |
| US07924172B1 |
Synthetic vision runway corrective update system
A synthetic vision system (SVS) for an aircraft, including a user input device for receiving runway correction commands from a user. The runway correction commands are in response to discrepancies observed by the user between an observed runway position in the real world and a synthetic vision runway position depicted on an electronic display device. The user input device provides runway corrections. An SVS computer is operatively connected to the electronic display device for providing SVS image data to the electronic display device in response to received runway parameter data. A runway parameter server device (RPSD) is operatively connected to the user input device and to the SVS computer for receiving the runway corrections from the user input device and providing the runway parameter data, including any corrected data provided by the user, to the SVS computer. A runway parameter database is operatively connected to the RPSD for receiving correction data from the RPSD and providing corrected data to the RPSD. The user input device provides the capability of stewing the synthetic vision runway position to the observed real-world runway position when the synthetic vision runway position is observed to be misaligned, the corrected data being subsequently used to provide enhanced runway environment information for taxi operations. |
| US07924169B2 |
Device for fastening a sensor on containers
Device for fastening a sensor on containers with a flexible container wall, in particular mixing bags, comprising a sensor support which is fitted with a sensor, bears against an inner wall of the container wall at least with a rear subsurface averted from the sensor, and is guided with a central piece through an opening in the container wall in which the sensor support is fixed on the container wall by a clamping part which can be connected to the central piece, in which the container wall is clamped between the rear subsurface of the sensor support and on a bearing surface, facing an outer wall of the container, of the clamping part, and in which the rear subsurface bears sealingly against the inner wall of the container wall. The sensor support can also have an electronic or optical transmit unit which is connected to the sensor, in which case the transmit unit communicates in a wireless fashion with a receive unit arranged outside the container. |
| US07924168B2 |
Remote control system, remote commander and remote control method, apparatus to be remotely controlled, and computer system
When apparatuses controllable via a network exist inside and outside a user's visual range, a user remotely controls at least one of the apparatuses via the network using a predetermined control point in a remote control system. The remote control system includes the following: a mechanism that causes the control point to transmit a command for specifying an apparatus to be controlled via the network to an apparatus to be specified in accordance with a user's apparatus specifying operation; and a mechanism that causes the apparatus that has received the command for specifying an apparatus to be controlled to transmit a response via the network to the control point as well as to perform an operation using a device attached to the body of the apparatus in response to the command. |
| US07924164B1 |
Method for sensing the presence of a human body part within a region of a machine tool
A detection system senses the location of a preselected color within one or more monitored zones of a machine tool. If the operator of a machine tool wears a red glove, the system detects the location of the color red and defines various monitored zones through the use of synchronization signals and a time circuit. The system can take action based on the location of the particular monitored zones in which the red glove is sensed. These actions can include the sounding of a horn, the lighting of a light, or the deactivation of the machine tool. |
| US07924163B1 |
Cordless patient pad
A cordless pressure pad connected to a bed pad transmitter for centralized monitoring by a central bed monitor receiving and alarm unit. When a monitored person gets up from bed, the pad transmitter sends a coded RF signal matched to a particular bed monitor unit, and it then triggers an alarm; when the person sits or lays back down, the pad transmitter sends a signal to the monitor to reset. Multiple pads can be linked to a single bed monitor. |
| US07924155B2 |
Digital occupancy sensor light control
A method of sensing motion in a predetermined area is provided. The method may include using a digital output motion sensor to produce a digital output signal indicative of the presence of motion in the predetermined area. The method may further include transmitting the digital output signal along a signal path independent of analog amplification and filtering. The method may also include using a microprocessor coupled to the signal path to receive the digital output signal and to process the digital output signal. |
| US07924151B2 |
Field device management
A system for facility management is disclosed, comprising a plurality of system devices each provided with an identity tag uniquely identifying the system device; a system layout database comprising facility layout data including intentional positions of the system devices; a system device database comprising data and identity for each system device; and an operator tool enabled to communicate with the system layout database and system device database, the operator tool being provided with a tag reader enabled to read an identity from the tags of the system devices when being in the vicinity of the system devices, wherein the operator tool is arranged to access data from the system device database about the system device and include said identity in an item of the system layout database. An operator tool and methods for managing the facility management system is also disclosed. |
| US07924150B2 |
Safe identification and association of wireless sensors
A wireless sensor network for wirelessly monitoring a medical subject includes a plurality of sensor nodes (22, 24, 26, 122, 124, 126). Each sensor node includes a wireless transceiver (46) for sending and receiving wireless messages, a sensor (40, 42, 130, 132, 140, 142) monitoring a characteristic of the medical subject, and a processor (50). The processor is programmed to at least perform an authentication method including: (i) acquiring sensor data via the sensor for a predetermined time (76) responsive to receiving a wireless trigger message; (ii) storing an association code (60, 150, 152, 160, 162) computed from the acquired sensor data; and (iii) authenticating a subsequently received wireless message containing an association code tag by comparing the association code tag with the stored association code. The processor further attaches the stored association code as the association code tag in messages sent to other sensors. |
| US07924148B2 |
Robust radio frequency signals
A tire pressure monitoring system includes a receiver for processing signals and alerting an operator of the vehicle should conditions within any of the tires fall outside a desired range. The transmitters within the tires emit shorter transmission signals during operation by eliminating transmission of the identification code. The receiver stores the identifier for each transmitter for comparison to subsequent transmissions. Subsequent transmissions do not include the identifier. The receiver combines the saved identifier with the value provided in the check portion of the incoming transmission. If the combination of the saved identifier with the value provided in the check portion meets a defined criteria, than the signal is recognized as originating from one of the transmitters. |
| US07924147B2 |
Tyre pressure monitoring apparatus
A tire pressure monitoring system comprises an initiator which is arranged to transmit an initiation signal, and at least one corresponding transducer associated with a tire of the vehicle which responds to exposure of the initiation signal from the initiator and is adapted to respond by transmitting a return signal indicating that it has been woken by the initiator, in which the strength of the initiation signal emitted by the initiator is varied across a number of values within a range. |
| US07924144B2 |
Method and apparatus for sensory stimulation
An apparatus for producing an electrosensory sensation to a body member (120). The apparatus comprises one or more conducting electrodes (106), each of which is provided with an insulator (108). When the body member (120) is proximate to the conducting electrode, the insulator prevents flow of direct current from the conducting electrode to the body member. A capacitive coupling over the insulator (108) is formed between the conducting electrode (106) and the body member (120). The conducting electrodes are driven by an electrical input which comprises a low-frequency component (114) in a frequency range between 10 Hz and 500 Hz. The capacitive coupling and electrical input are dimensioned to produce an electrosensory sensation. The apparatus is capable of producing the electrosensory sensation independently of any mechanical vibration of the one or more conducting electrodes (106) or insulators (108). |
| US07924140B2 |
Biometrics-based identification method and apparatus
The invention relates to an identification method carried out as follows. A surface structure and an inner structure of a body member are measured (ST1-ST4, ST7) so as to obtain a surface-structure measurement result (FPM) and an inner-structure measurement result (BVPM), respectively. The surface-structure measurement result (FPM) is compared (ST5) with a surface-structure reference result (FPR) that distinguishes an individual from other individuals. The inner-structure measurement result (BVPM) is compared (ST8) with an inner-structure reference result (BVPR) that is associated with the same individual and that distinguishes the individual from other individuals. The body member may be, for example, a finger. In that case, the surface structure comprises a fingerprint and the inner structure comprises a blood-vessel pattern. |
| US07924136B2 |
Fusible switching disconnect modules and devices
A fusible switch disconnect device includes a housing adapted to receive at least one fuse therein, and switchable contacts for connecting the fuse to circuitry. A tripping mechanism is provided to disconnect the switchable contacts when predetermined circuit conditions occur. |
| US07924134B2 |
Inductor packaging for power converters
A vehicular power converter includes switches and first and second inductive components. The first and second inductive components have substantially adjacent portions and are coupled to the plurality of switches such that when current flows from the plurality of switches and through the first and second inductive components, flux generated by the current flowing through the adjacent portions of the first and second inductive components and located between the adjacent portions is oriented in substantially opposite directions. |
| US07924129B2 |
Ignition coil with spring-loaded boltless mounting to spark plug
An ignition coil engages an inner surface of a bore of an engine, the providing access to a spark plug. The engagement is a boltless cam-lock engagement. A spring is associated with the engagement to hold the assembly in tension, and the spring also contacts a ground terminal in the ignition coil and the base of the spark plug to provide a short electrical path for radiofrequency interference (RFI) dissipation. |
| US07924123B2 |
Method and system for adjusting an electromagnetic relay
An electromagnetic relay has a solenoid formed from a wound coil, a movable contact-point block having a movable iron core, an insulation holder integrated with the upper end portion of the movable iron core and a movable contact piece which is biased toward and supported by the insulation holder through a contact pressing spring, and a fixed iron core fitted in a through hole in a yoke. A restoring spring is inserted into an axial hole of the solenoid. The movable iron core of the movable contact-point block is slidably inserted into the axial hole of the solenoid from thereabove. The fixed iron core is inserted into the axial hole from therebelow. The movable iron core is adapted to be slid into the axial hole based on the magnetization force and the demagnetization of the coil to move the movable contact-point block back and forth. |
| US07924118B2 |
Duplexer and elastic wave device
In a duplexer, a transmission elastic wave filter and a reception elastic wave filter are mounted on a laminated substrate, a coil connected between an antenna terminal and a ground potential is provided on the laminated substrate, the reception elastic wave filter has first and second ground pads connected to ground potentials of IDTs connected to first and second balanced terminals, the distance between the second ground pad and the coil is greater than the distance between the first ground pad and the coil, and an inductance component in a conductive path E connecting the second ground pad to the second ground terminal is less than an inductance component in a conductive path D connecting the first ground pad to the first ground terminal, so as to improve isolation characteristics between first and second balanced terminals of a reception filter chip. |
| US07924115B2 |
DPDT RF switch and TMA using the same
Disclosed is a DPDT RF switch. The DPDT RF switch includes: first to fourth transmission lines for forming first to fourth ports, respectively; and first to fourth slot line pattern sections. The first slot line pattern section includes: a first slot line; and a first switching device for blocking signal transfer by short-circuiting a gap of a slot line. The third slot line pattern section includes: a third slot line; and a third switching device for blocking signal transfer by short-circuiting a gap of a slot line. The second slot line pattern section includes: a first loop-shaped slot line; a second slot line; and a second switching device for blocking signal transfer by short-circuiting a gap of a slot line. The fourth slot line pattern section includes: a second loop-shaped slot line; a fourth slot line; and a fourth switching device for blocking signal transfer by short-circuiting a gap of a slot line. |
| US07924109B2 |
MEMS oscillator
Provided is a MEMS oscillation circuit which performs temperature compensation of a MEMS resonator with a simple circuit, which is mild so that an output clock does not have jitter, and which makes the range of fluctuations of a reference frequency from a reference value equivalent to a range of digital processing. The MEMS oscillator includes a MEMS resonator, a temperature measurement unit for measuring a temperature and outputting a detected voltage corresponding to the temperature, and a bias voltage control circuit for applying the MEMS resonator with a bias voltage which changes the resonant frequency of the MEMS resonator in a manner opposite to a change of the resonant frequency of the MEMS resonator due to temperature change correspondingly to the detected voltage. |
| US07924106B2 |
Oscillation module
To provide an oscillation module which is able to improve an input level by passing signals in a main signal band while removing near noise and far noise.An oscillation module is provided with an OCXO, an amplifier, and a noise elimination filter. The noise elimination filter includes: a BPF passing a signal in the main signal band and eliminating far noise with respect to the main signal band; an L-BEF eliminating near noise in a low frequency band with respect to the main signal band; and an H-BEF eliminating near noise in a high frequency band with respect to the main signal band. Each filter is configured with a crystal filter. |
| US07924105B2 |
Method for the detection of a predamping state and inductive sensor with predamping detection
The present invention relates to a method for the detection of a predamping state of an inductive sensor. The sensor has at least one oscillator with a resonant circuit and an oscillation amplifier. According to the method the oscillatory response of the oscillator is analyzed with an operating amplification or gain. According to the invention the method is further developed in that the oscillatory behavior of the oscillator is additionally analyzed for an analysis amplification or gain, which is chosen lower than the operating amplification. The analysis amplification is also chosen in such a way that the oscillatory response of the oscillator reacts sensitively to objects or articles located in close proximity to the sensor. The invention also relates to an inductive sensor with predamping detection. |
| US07924104B2 |
Methods and apparatus for compensating a clock bias in a GNSS receiver
A method for compensating a clock bias in a Global Navigation Satellite System (GNSS) receiver includes deriving at least one clock drift value comprising a first clock drift value corresponding to a first time point, and calculating the clock bias according to the at least one clock drift value and at least one interval within the time period between the first time point and a specific time point after the first time point. An apparatus for compensating a clock bias in a GNSS receiver is also provided. |
| US07924103B2 |
Inductive proximity switch and method for its operation
The present invention relates to an inductive proximity switch with an oscillator having a resonant circuit and an amplifier and with an evaluating and control device for evaluating an impedance of the resonant circuit and for outputting a switching signal. According to the invention, the proximity switch is characterized in that a frequency measuring device is provided for measuring the oscillation frequency of the oscillator and for eliminating ambiguities of the evaluation result of the evaluating and control device. The invention also relates to a method for operating an inductive proximity switch. |
| US07924102B2 |
Symmetric load delay cell oscillator
An oscillator includes a control circuit and a ring of symmetric load delay cells. Each delay cell includes two novel symmetric loads. Each load involves a level shift circuit and a diode-connected transistor coupled in parallel with a current source-connected transistor. The control circuit converts an oscillator input signal into bias control signals that in turn control the effective resistance of the symmetric loads such that delays through the delay cells are a function of the input signal. The control circuit uses a symmetric load replica in a control loop to control the level shift circuits of the delay cells such that the oscillating delay cell output signals have a constant amplitude. In a first advantageous aspect, due to the constant amplitude, the oscillator is operable over a wide frequency range. In a second advantageous aspect, the oscillator input signal to output signal oscillation frequency has a substantially linear relationship. |
| US07924099B2 |
Method of establishing an oscillator clock signal
A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip. It may comprise a numeric time-locked loop (TLL) with an analog phase-locked loop (PLL). Moreover a high-performance number-controlled oscillator (NCO), for creating an event clock from a master clock according to a period control signal. It processes edge times rather than period values, allowing direct control of the spectrum and peak amplitude of the justification jitter. Moreover a combined clock-and-frame asynchrony detector, for measuring the phase or time offset between composite signals. It responds e.g. to event clocks and frame syncs, enabling frame locking with loop bandwidths greater than the frame rate. |
| US07924097B2 |
Solid-state ultra-wideband microwave power amplifier employing modular non-uniform distributed amplifier elements
A number of identical non-uniformly distributed ultra-wideband power amplifier string building blocks are coupled together to form an ultra-wide bandwidth high-power amplifier. The non-uniform distribution results in an amplifier utilizing modular string building blocks that have input and output impedances with only real values. This permits the strings to be replicated and connected together with simple impedance matching. The internal impedance matching associated with the non-linear distribution also absorbs parasitic capacitance to permit the ultra-broadband operation. In one embodiment identical transistors are used for each cell so that the strings may be identically replicated. This permits modular re-use without reconfiguration. In one embodiment a non-uniform distributed power amplifier built using the subject building blocks provides an ultra-wideband multi-octave device suitable for electronic warfare and communications applications, especially to replace traveling wave tubes. |
| US07924096B2 |
Input buffer with impedance cancellation
An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described. |
| US07924095B2 |
Operational amplifiers having low-power unconditionally-stable common-mode feedback
An operational amplifier is provided. The operational amplifier includes a first transistor configured to receive a first input voltage, a second transistor configured to receive a second input voltage, and a current steering module coupled to first and second transistors and configured to receive a reference voltage. The first and second transistors form a differential pair. The first transistor, second transistor, and current steering module are configured such that a current is steered from the current steering module or to the current steering module based on common-mode voltages of the first and second input voltages and the reference voltage to set a common-mode output voltage of the operational amplifier. |
| US07924094B2 |
Amplifier and offset regulating circuit
An amplifier includes a signal amplification part that outputs an output signal obtained by amplifying an input signal and a common mode voltage VCM of the output signal, and a common mode feedback part that outputs a signal according to a difference between the common mode voltage VCM and a reference potential Vref as a regulation signal SREG. The regulation signal SREG from the common mode feedback part is fed back to a current source of the signal amplification part and a current source of the common mode feedback part. |
| US07924090B2 |
Amplifying device
An amplifying device for setting input impedance at several GΩ to several tens of GΩ and improving an ESD withstand current rating is provided.An ECM is connected to an input terminal 21 and frequency characteristics become flat to a voice band by high input impedance of a CMOS amplifier 20 and the input impedance is set at several GΩ to several tens of GΩ and thereby, response time after detecting a loud voice or turning on a power source of the ECM is speeded up and desired electrical characteristics are achieved. A path for releasing a surge voltage which occurs during assembly in the outside of an IC and intrudes from the input terminal 21 to a power source terminal or an earth terminal without an influence on a signal (20 Hz to 20 kHz) of a voice band entering from the input terminal 21 can be constructed by connecting a P-channel MOS transistor 27 and an N-channel MOS transistor 28 as an ESD protective element. |
| US07924089B2 |
Offset voltage correction circuit and class D amplifier
A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage. |
| US07924088B1 |
Offset voltage calibration method and apparatus and amplifier thereof
An offset voltage calibration method is disclosed, which is utilized for calibrating an offset voltage of an electronic device during a calibration period. The offset voltage calibration method includes generating a control signal according to an output signal of the electronic device, counting a count value and generating an offset indication signal according to the control signal, stopping counting and generating a final count value according to a compensation value after the output signal changes state, generating a calibration signal according to the count value or the final count value, and calibrating the offset voltage according to the offset indication signal and the calibration signal. |
| US07924082B2 |
Driving configuration of a switch
A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switch to supply it with a first control signal for driving the switch in a first working state and a second control signal for driving the switch in a second working state. At least one latch circuit coupled between respective common gate and source terminals of the first and second transistors supplies the common gate terminal with the first and second control signals, respectively, according to the working state to turn off and turn on the first and second transistors. The latch circuit comprises at least one flip-flop coupled to the common source terminal and having a reset terminal coupled to the first output terminal of the driving device and to the common source terminal by means of a reset resistance, a set terminal coupled to the second output terminal of the driving device and to the common source terminal by means of a set resistance and an output terminal coupled to the common gate terminal. The latch circuit further includes an activation circuit connected to the set and reset terminals of the flip-flop and to the common source terminal in order to dynamically short-circuit the set and reset resistances during the falling edges of the signal applied to the switch. |
| US07924079B2 |
Baseline restore based on diode star configuration and transformer coupling
A simple, low cost circuit with only passive components, and thus low power consumption, is provided for baseline restoration of an AC coupled signal. The circuit includes a passive network of diodes arranged in a star configuration and an RF-transformer. A differential signal strategy may be employed by including a differential amplifier at the input and output of the passive network. |
| US07924076B2 |
Data recovery circuit
Provided is a data recovery circuit including an input data phase detection circuit for outputting a gate signal synchronized with a rising phase of input data, a gated multiphase oscillator for instantly generating N-phase clocks based on the gate signal as a trigger, data discriminating and reproducing circuits for outputting sampled data of the input data which are synchronized with the clocks, a continuous clock generation circuit for generating a continuous clock which is a reference clock, continuous clock synchronization circuits for synchronizing the sampled data with the continuous clock and outputting the synchronized sampled data as phase synchronization data, and a phase selector for selecting the phase synchronization data having an optimum discrimination phase with the largest phase margin with respect to the input data and outputting the selected phase synchronization data as recovery data. |
| US07924072B2 |
Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops
A PLL-based frequency translator provides a divider augmented with a sigma delta modulator (SDM) in a reference path. The system may include two primary functional blocks—an input PLL with its reference path containing an integer divider coupled with a SDM (a fractional frequency divider), and an output PLL with its feedback path containing an integer divider coupled with a SDM (a fractional frequency multiplier). The combination of an integer divider and an SDM yields a fractional divider that divides by N+F/M, where N is the integer portion of the division and F/M is the fractional portion of the division, with M denoting the fractional modulus. Furthermore, since it is desirable to have programmable division factors, it is beneficial to define N, F and M as integers as this simplifies a programming interface when the frequency translator is manufactured as an integrated circuit. |
| US07924070B2 |
Power-on reset circuit and electronic device using the same
A power-on reset circuit, connected to an external direct current (DC) power source, to receive DC power signals and generate a reset signal, includes a delay circuit, a combination circuit and a shaping circuit. The delay circuit comprises a plurality of delay units, to delay the received DC power signals and output a plurality of delayed DC power signals. The combination circuit is connected to the delay circuit, to combine the delayed DC power signals into a combination signal, and output the combination signal. The shaping circuit is connected to and turns the combination circuit on and off according to the combination signal and outputs the reset signal. |
| US07924061B2 |
Apparatus for detecting clock failure and method therefor
A clock failure detection circuit comprises clock failure detection logic having a clock input providing an input clock signal, a counter and a reference clock input providing a reference clock signal to the counter for counting a number of reference clock cycles. The counter comprises a reset input arranged to receive successive reset pulses generated by at least one clock edge of the input clock signal to reset a counter value of the counter. The counter value before reset is used to identify a clock frequency error. A method of detecting a clock failure is also described. By using a counter value based on the reference clock cycles, and a reset trigger based on a clock edge of the input signal, it is possible to identify a clock frequency error in a much shorter time. |
| US07924060B2 |
Output circuit of semiconductor device
An output circuit of a semiconductor device includes a signal selector configured to receive first and second input data signals and sequentially outputting the first and second input data signals in response to a phase signal; and an output level controller configured to control a voltage level of an output signal of the signal selector based on the first and second input data signals. |
| US07924056B2 |
Low voltage differential signalling driver
A low voltage differential signalling driver is provided in which a first output node and a second output node provide a differential signal. First differential steering switch circuitry is switched in dependence on a differential input signal to selectively connect the first output node to a voltage supply via a current source, while second differential steering circuitry is switched in dependence on an inverse version of the differential input signal to connect the second output node to the voltage supply via the current source. Slew control circuitry is provided, configured to establish a current discharge path for the current source during the polarity transition of the differential input signal, thus maintaining a symmetric slew rate of the output signals at the first output node and second output node. |
| US07924054B1 |
Latency measurements for wireless communications
A programmable logic device (PLD), is provided that includes: a plurality of SERDES channels; a programmable logic fabric configured to implement an interface for a standardized cellular base station system; wherein the interface receives data words from the SERDES channels and transmits data words to the SERDES channels, and wherein a standard corresponding to the standardized base station system restricts a latency with regard to flow of the data words through the interface, the data words being arranged into frames; and a timing measurement circuit configured to measure a delay between a detection of a first timing point in the frames at first location in the PLD with respect to the interface and a detection of a second timing point in the frames at a second location in the PLD with respect to the interface. |
| US07924053B1 |
Clustered field programmable gate array architecture
A logic cluster for a field programmable gate array integrated circuit device is disclosed. The cluster comprises a plurality of functional blocks and three levels of routing multiplexers. External signals enter the logic cluster primarily at the third level multiplexers with a few signals entering at the second level. Combinational outputs are fed back into the first and second level multiplexers while sequential outputs are fed back into the third level multiplexers. The logic function generators have permutable inputs with varying propagation delays. Routing signals between the first and second level multiplexers are grouped into speed classes and coupled to first level multiplexers associated with different logic function generators according to their speed class. Second and third level multiplexers are organized into groups such that routing signals between the second and third level multiplexers can be localized within the area occupied by the group. Groups are pitch matched to logic function generators to optimize and modularize area. Provision is made for global and local control of the sequential elements. |
| US07924051B2 |
Programmable logic device with a microcontroller-based control system
A computer program product in a computer-readable medium for use in a microcontroller-based control system in a programmable logic integrated circuit device. The computer program product comprises first instructions for initializing the device, second instructions for reading programming data from a data source external to the programmable logic integrated circuit device, third instructions for transferring the programming data into control elements internal to the device. Provision is made for fourth instructions for saving a part of the internal logic state of the user logic programmed into the device into a non-volatile memory block and for fifth instructions for restoring a part of the internal logic state of the user logic programmed into the device from a non-volatile memory block. The device comprises a microcontroller block and a programmable logic block with programming circuitry, and has a sub-bus which couples the microcontroller block to the programming circuitry. |
| US07924048B2 |
Memory controller that controls termination in a memory device
A memory controller that controls termination in a memory device. The memory controller includes a data interface, command/address interface and termination control output. The data interface outputs write data onto a data line coupled to a data input of the memory device, and the command/address interfaces outputs, onto a command/address path coupled to the memory device, information that indicates whether the write data is to be received within the memory device. The termination control output asserts a first termination control signal on a termination control signal line coupled to the memory device to cause the memory device to either (i) couple a first termination impedance to the data line while the write data is present at the data input of the memory device if the information indicates that the write data is to be received within the memory device, or (ii) couple a second termination impedance to the data line while the write data is present at the data input of the memory device if the information indicates that the write data is not to be received within the memory device. |
| US07924046B1 |
Configurable emphasis for high-speed transmitter driver circuitry
Pre-emphasis may be able to operate in either of two modes. In a first mode, when one bit has a same value as the bit that immediately preceded it, an output signal for said one bit is based on a first electrical current reduced by a second electrical current. Otherwise the output signal for said one bit is based on the first current without regard for the second current. The second mode may be similar to the first mode when said one bit has the same value as the immediately preceding bit; but otherwise the output signal for said one bit is based on the first current increased by the second current. As an alternative to using the immediately preceding bit (as in the above “post-tap” operation), the immediately succeeding (following) bit may be used in generally the same way (in so-called “pre-tap” operation). |
| US07924045B2 |
Apparatus, system, and method for error detection in a stand alone power supply
An apparatus for error checking in a power supply includes a power module that determines that the power supply is in a self-test condition. The self-test condition involves the power supply being connected to an input power source while it is disconnected from the electronic load that it normally services. A load module connects an internal test load to the power supply when the power supply is in self-test condition, and an error checking module performs error check operations on the power supply while it is connected to the test load. The apparatus also includes a notify module that actuates an indicator when the error checking module determines that there are one or more faults in the power supply. The apparatus may also include a log module for storing error messages and reports in non-volatile memory. |
| US07924043B2 |
Method and product for testing a device under test
In a method of testing a device under test (DUT) using a test device adapted to provide a connection to a central controller, a test procedure activation signal is supplied from the central controller to the test device. A test procedure for testing the DUT is performed on the basis of test procedure data, upon receipt of the test procedure activation signal. The test procedure is adjustable upon receipt of a feedback signal from the DUT. The test procedure is adjusted by 1) receiving a feedback signal from the DUT, 2) determining from the feedback signal properties of a physical connection between the test device and the DUT, and 3) adjusting the test procedure to modify the test signal and compensate for the properties of the physical connection between the test device and the DUT. |
| US07924041B2 |
Liquid crystal display including sensing unit for compensation driving
A liquid crystal display includes; a plurality of pixels, each of which comprises a switching element having a control terminal and an input terminal connected to a corresponding gate line of a plurality of gate lines and a corresponding data line of a plurality of data lines, respectively, at least one test pixel comprising at least one test switching element having a control terminal connected to a corresponding at least one gate line of a plurality of gate lines, and a sensing unit which measures a leakage current flowing through the test pixel and to control compensation driving of a threshold voltage of a switching element of a pixel according to the measured leakage current. |
| US07924031B2 |
Health monitoring method for composite materials
An in-situ method for monitoring the health of a composite component utilizes a condition sensor made of electrically conductive particles dispersed in a polymeric matrix. The sensor is bonded or otherwise formed on the matrix surface of the composite material. Age-related shrinkage of the sensor matrix results in a decrease in the resistivity of the condition sensor. Correlation of measured sensor resistivity with data from aged specimens allows indirect determination of mechanical damage and remaining age of the composite component. |
| US07924030B2 |
Test pattern for analyzing capacitance of interconnection line
Disclosed is a test pattern for analyzing capacitances of interconnection lines that accounts for parasitic capacitance components. The test pattern includes a first metal line having a comb-type structure including a plurality of tines, a second metal line having a comb-type structure including a plurality of tines engaged with the tines of the first metal line, a first probe pad switchably connected to the first metal line, and a second probe pad switchably connected to the second metal line. Switchable connections between the first metal line and the first probe pad and between the second metal line and the second probe pad may be provided by first and second switch terminals, respectively. The test pattern enables a capacitance measurement that accounts for parasitic capacitance components of pads and portions of interconnection lines leading from the pads, which otherwise interfere with accurate measurement of capacitances of the interconnection lines. |
| US07924028B2 |
Method and system for adjusting characteristics of integrated relative humidity sensor
A method and system for adjusting characteristics of a relative humidity sensor in order to achieve a desired value of accuracy is presented. A relative humidity sensor charge balance circuit includes a series of sensing capacitors Cx1, Cx2 including a thin porous platinum top plate, a humidity sensitive polyimide dielectric, and two metal bottom plates on a semiconductor substrate; and two fixed oxide capacitances Cref, and C0. Changes in humidity affect the humidity sensitive dielectric thereby causing changes in the sensing capacitive value of the capacitive circuit. The charge in the sensing capacitor and the fixed capacitor C0 can be controlled separately by adjusting and/or trimming the supply voltage using a voltage trimmer; thereby the slope and offset of the relative humidity sensor circuit can be modified and controlled to particular desired values. |
| US07924026B2 |
Method and apparatus for determining a response of a DUT to a desired large signal, and for determining input tones required to produce a desired output
A method for determining input tones required to produce a desired output includes the step of extracting a linearization of a spectral map representing a device under test (DUT) that i) is under drive of a large signal having one or more fundamental frequencies with associated amplitudes and phases, and ii) produces an approximation of a desired output having at least one unwanted spectral component. The method includes the further step of using an inverse of the extracted linearization to determine the input tones required to produce the desired output under a given load condition. |
| US07924025B2 |
System, device, and method for embedded S-parameter measurement
An embedded s-parameter measurement system for measuring or determining an s-parameter is provided. The system includes an s-parameter test circuit for connecting to a port of a high-frequency multi-port device-under-test (DUT). The s-parameter test circuit includes a directional coupler for sampling a forward signal conveyed to the DUT and for sampling a reverse signal reflected by the DUT. The s-parameter test circuit also includes a peak detector electrically connected to the directional coupler for detecting a magnitude of a signal conveyed to the peak detector by the directional coupler. The s-parameter test circuit further includes a phase detector electrically connected to the directional coupler for determining a phase of a signal conveyed to the phase detector by the directional coupler, and at least one other s-parameter test circuit for connecting to another port of the high-frequency multi-port DUT. |
| US07924024B2 |
Automatic calibration techniques with improved accuracy and lower complexity for high frequency vector network analyzers
A calibration module, for use in calibrating a VNA, includes ports connectable to the VNA, calibration standards, and single pole multi throw (SPMT) switches. Each SPMT includes a single pole terminal, multiple throw terminals and a shunt terminal corresponding to each multiple throw terminal. A switching path is between each throw terminal and the single pole terminal, and between each shunt terminal and the single pole terminal. Each switching path includes at least one solid state switching element. The calibration standards are selectively connectable to the ports of the calibration module by selectively controlling the switching elements. Each port of the calibration module is directly connected to a throw terminal of one of the SPMT switches. Also, unique algorithm are provided for calibrating a VNA when using a calibration impedance that is a hybrid of a reflect standard and a transmission standard, which can be achieved using the calibration module. |
| US07924023B2 |
Method and apparatus for measuring data rates
A method, computer readable storage medium and apparatus for measuring data rates is disclosed. A method that incorporates the teachings of the present disclosure may include, for example, submitting a signal over a cable from a Time Domain Reflectometry (TDR) element, determining a fault in the cable from a reflection of the signal, determining a length of the cable from the reflection of the signal, determining a location of a bridged tap relative to customer premise equipment (CPE) and determining effective downstream bit rates for the cable according to the fault, the length of the cable and the location of the bridged tap relative to the CPE. Additional steps and embodiments are disclosed. |
| US07924021B2 |
Procedure for testing the function of a lamp circuit
The function of a lamp circuit is tested by measuring the current and voltage. A resistance value is taken into account which is specified as a polynomial of at least the 1st order depending on the effective measured voltage on the lamp circuit. The parameters of the polynomial are determined by a quantity of measurements which correspond to the order of the polynomial, under operating conditions which are known to differ, and the specific resistance value or a value derived from it are compared with a specified value. |
| US07924010B2 |
Apparatus for supporting and method for forming a support for a magnetic resonance imaging (MRI) magnet
An apparatus and method for supporting a magnetic resonance imaging magnet are provided. The apparatus includes a magnet coil support structure having a main former body with a plurality of channels and an end flange at each end of the main former body. The end flanges are reinforced with a strengthening material at least at corner regions of the end flanges. |
| US07924005B2 |
Arrangement to connect gradient current feed lines in a magnetic resonance apparatus
An arrangement for connection of gradient current feed lines in a magnetic resonance apparatus has an electrically insulating connection plate with at least one connection device. The connection device is fashioned to electrically connect a first gradient current feed line with a second gradient current feed line and is associated with a gradient coil that forms a gradient field via a supplied gradient current for a spatial direction. The supply ensues via the two gradient current feed lines connected with one another. A base plate that is fashioned for fastening the connection plate to a magnet housing of the magnetic resonance apparatus. An electrically insulating layer to damp vibrations of the connection plate is arranged between the base plate and the connection plate. |
| US07924003B2 |
Method for water-fat separation and T2* estimation in an MRI system employing multiple fat spectral peaks and fat spectrum self-calibration
NMR signal contributions from water and fat are separated using a model of the fat resonant frequency spectrum that has multiple resonant peaks. The relative frequencies of the multiple fat spectrum peaks are known a priori and their relative amplitudes are determined using a self-calibration process. With the determined relative amplitudes of the fat spectrum peaks, acquired NMR signals are modeled. Using this model and NMR signal data acquired at a plurality of echo times (TE), the signal contribution from multiple fat spectrum peaks is separated from the acquired NMR signal data. A combined image is alternatively produced from weighted contributions of the separated water and fat images. Additionally, a more accurate estimation of the apparent relaxation time and rate (T*2 and R*2, respectively) is alternatively performed. |
| US07924001B2 |
Determination of oil viscosity and continuous gas oil ratio from nuclear magnetic resonance logs
A method for determining oil viscosity and continuous gas-oil-ratio (GOR) from nuclear magnetic resonance logs (NMR). The method includes obtaining a set of NMR data of a portion of the subterranean formation from inside the wellbore without acquiring formation fluid sample; isolating a quantitative reservoir fluid information associated with oil from oil based mud (OBM) using radial profiling of the set of NMR data, wherein the OBM is used for extracting fluid from the underground reservoir; determining GOR related information associated with the portion of the subterranean formation from the quantitative reservoir fluid information associated with oil, wherein the GOR related information is determined based on a predetermined model; and performing operations for the oilfield based on the GOR related information. |
| US07924000B2 |
Miniature coils on core with printed circuit
A method for producing a coil assembly includes overlaying printed circuit traces on a core. The traces include terminals for coupling to conductive connections on a base on which the coil assembly is to be mounted. Two or more wires are wrapped around the core so as to define two or more coils, wrapped in different, respective directions. The ends of the wires are coupled to the printed circuit traces, so as to connect the wires through the traces to the terminals. |
| US07923999B2 |
MEMS device with supplemental flux concentrator
A microelectromechanical modulating magnetic device comprising: a base; a magnetic transducer that provides an output in response to a magnetic field associated with the base; at least one movable flux concentrator positioned to move relative to the magnetic transducer; at least one flux collector positioned to collect flux for transfer onto at least one movable flux concentrator; which transfers the magnetic flux to the magnetic transducer for detection and measurement purposes; support structure for enabling the at least one movable flux concentrators to move within a predetermined frequency range; a power source for causing the movable flux concentrators to move at a frequency within the predetermined frequency range; whereby magnetic flux may enter through the flux collector, pass through the at least one movable flux concentrator for transfer to the magnetic transducer, and due to the movement of the movable flux concentrator, the signal outputted from the transducer is modulated. |
| US07923998B2 |
Sensor device
A sensor device has a sensor assembly with at least one sensor element, an additional sensor assembly having at least one additional sensor element, and a switch-in element which couples the additional sensor assembly to the sensor assembly responsive to a switch-in signal to obtain an overall sensor assembly having a reduced power demand. |
| US07923995B2 |
Sensor coil array for magnetic inductance tomography with reduced mutual coil coupling
This invention relates to magnetic inductance tomography, and in particular, to coils of a sensor/driver coil array for use in a magnetic inductance tomography apparatus, in which driver/sensor coils are used to measure the induced flux in a conductive, dielectric and permittivity body, such as the human body. The sensor/driver coil array comprises at least one layer of thin coils whose centers are arranged on a regular grid, with adjacent coils overlapped by a suitable distance to cancel inductive neighbor coupling between them. |
| US07923992B2 |
Inspection of asphalt during manufacturing
An apparatus and a method for monitoring a ratio of at least two components being mixed use sensors detecting ferrous taggant particles in the component(s) and the mixture. The sensors include an annular drive coil positioned between inner and outer annular sense coils all surrounding a passage for material being sensed. The ratio is determined by comparing a signal generated by one sensor through which a taggant particle containing component is flowing with a signal generated by another sensor through which the mixture is flowing delayed by the time required for the component to flow from the one sensor to the another sensor. The signals can also be used to control the flow of the components and to check the mixture after use. |
| US07923991B2 |
Signal testing apparatus
A signal testing apparatus includes a number of first switches, a second switch, and a testing terminal. Each first switch includes a static contact, a first dynamic contact, and a second dynamic contact. The second switch includes a static contact and a number of dynamic contacts. When the static contact and the first dynamic contact of each first switch are connected to each other, a computer interface is connected to a peripheral equipment interface. When the static contact and the second dynamic contact of each first switch are connected to each other, the computer interface is disconnected to the peripheral equipment interface, the static contact of the second switch is capable of selectively connected to one of the dynamic contacts of the second switch, to selectively test a signal output from a corresponding pin of the computer interface. |
| US07923987B2 |
Magnetic sensor integrated circuit with test conductor
A magnetic sensor integrated circuit includes a plurality of magnetically sensitive elements, and at least one test conductor positioned adjacent to at least one of the magnetically sensitive elements and configured to generate a differential magnetic field that is adapted to be applied to the plurality of magnetically sensitive elements during a test mode. |
| US07923973B2 |
Method and apparatus to reduce line current harmonics from a power supply
A method and apparatus for controlling a power converter. In one aspect, a controller for use in a power converter includes a first calculator coupled to determine an end of an on time of a power switch of the power converter by integrating an input current to output an on time signal representative of the end of the on time of the power switch. The controller also includes a second calculator coupled to determine an end of an off time of the power switch by integrating a difference between an input voltage and an output voltage to output an off time signal representative of the end of the off time of the power switch. |
| US07923971B2 |
Non-contact electric power transmission apparatus
The object is to provide a safe non-contact electric power transmission apparatus reducing unnecessarily consumed electric power, while intermittently-operated or otherwise restrained electric power transmission is not performed, and heat is not generated when a metal such as a foreign object is placed. In a non-contact electric power transmission apparatus having: a power supplying unit 10 main body containing a power supplying coil L1 for non-contact electric power transmission; a power receiving unit 50 containing a power receiving coil L50 for non-contact electric power transmission; and a supporting base 20 for detachably mounting the power receiving unit 50, formed in a portion of the power supplying unit 10 main body, electric power being transmitted from the power supplying coil L1 to the power receiving coil L50 in a non-contact manner using electromagnetic induction, the power receiving unit 50 has a modulation circuit 52 which outputs a recognition signal upon receiving electric power from the power supplying coil L1 at the power receiving coil L50, and the power supplying unit 10 has a electric power transmitting circuit 1, a control circuit 2, detecting means 3, a demodulation circuit 4, a recognition circuit 5, and a timer circuit 6. |
| US07923969B2 |
State of charge equalizing device and assembled battery system including same
A state-of-charge equalizing device equalizes the state of charge of each of cells connected in series to form an assembled battery, and comprises charging/discharging circuits connected in parallel to the respective cells to discharge and/or charge the respective cells, voltage measurement circuits connected to the respective charging/discharging circuits to measure the voltages across the respective cells, and a control circuit. The control circuit comprises a unit calculating an equalization target voltage based on the measured voltages before the charge or discharge starts, a unit starting discharging/charging the cells having a voltage thereacross different from the target voltage, a unit correcting the target voltage to thereby calculate a corrected equalization target voltage for each of those cells based on the difference between the measured voltages before and at a certain time period after the charging/discharging, and a unit ending the discharging/charging when the measured voltage reaches the corrected target voltage. |
| US07923966B2 |
Battery control device, battery control method, power source control device and electronic apparatus
A battery control device 1 has an electric circuit control unit 6 controlling a power supply; a voltage measuring unit 7 measuring a voltage; a current measuring unit 8 measuring an electric current; and a power source control unit 9, wherein the power source control unit 9 measures a first voltage defined as the voltage of the battery 4 and a first current defined as the current of the battery 4 in a state where the battery 4 supplies electric power to the load 3, measures a second voltage defined as the voltage of the battery 4 in a state where the supply of the electric power to the load 3 from the battery 4 is cut off, and calculates internal impedance of the battery 4 by dividing a value, obtained in a way that subtracts the first voltage from the second voltage, by the first current. |
| US07923961B2 |
Vehicle equipped with motor and inverter
A vehicle includes a motor for driving wheels WH, an inverter to drive the motor, and a control device to perform PWM control of the inverter. The control device performs synchronous PWM control in a case where an electric current supplied to the motor by the inverter or torque generated in the motor is larger than a threshold value; and performs the synchronous PWM control or non-synchronous PWM control in a case where the electric current or the torque is smaller than the threshold value and sets carrier frequency or a pulse number of the PWM control to be higher than the case where the electric current or the torque is larger than the threshold value. Thereby, it is possible to provide a vehicle of achieving reduction of noise, reduction of cost and improvement of fuel consumption in a balanced manner. |
| US07923960B2 |
Method for controlling a polyphase voltage inverter
A method for driving a power bridge (1) which is used for controlling a multiphase electric load (3), is connectable to said electric load (3) through several arms and is drivable by switching functions determining control vectors for controlling the load, wherein said control vectors are subdivided into the free wheel control vectors and active control vectors. The inventive method is characterized in that it comprises the use of a switching function production method which produced a reduced number of switching function combinations corresponding to the free wheel control vectors for producing a sequence of the control vectors. |
| US07923958B2 |
Apparatus and method for driving 2-phase SRM motor
An apparatus and method for driving a 2-phase SRM are provided. The method may include initializing 2-phase SRM based on a detected position of a rotor by an initializing sensor at a time of an initial driving, and normally driving the 2-phase SRM based on a detected position of the rotor by a driving sensor. With this method, a sufficient amount of torque is generated when the 2-phase SRM is driven at a high speed. The apparatus may include an initializing sensor that detects each position of each phase of a 2-phase SRM, and generates an initializing sensor signal based on the detected result; a driving sensor that detects each position of each phase of the 2-phase SRM, and generates a driving sensor signal based on the detected result; and a microprocessor that initially drives the 2-phase SRM based on the initializing sensor signal at the time of an initial driving, and normally drives the 2-phase SRM based on the driving sensor signal at the time of a normal driving. |
| US07923953B2 |
Linearity for field weakening in an interior permanent magnet machine
Systems and methods are disclosed to provide torque linearity in the field-weakening region for an electric (e.g., IPM) machine. The systems and methods implement a field weakening and a torque linearity control loop for linearizing torque generated by an electric machine. As a result, torque linearity is maintained when the electric machine operates in the field weakening region. |
| US07923951B2 |
Vehicle power controller
An ECU executes a program including the steps of: calculating regenerative power value P based on a brake pressure; calculating limit charging power WIN(B) to a battery; calculating limit charging power WIN(C) to a capacitor; when it is determined that regenerative power value P is larger than the sum of WIN(B) and WIN(C), estimating that a large regenerative energy sufficient to fully charge the capacitor even if the battery is charged with priority would be generated; and transmitting a control signal to set output voltage of a boost converter to be not higher than the voltage of the capacitor so as to charge the battery with priority. |
| US07923948B2 |
Method for adjusting the residual light gap between slats of a motorized venetian blind
A method for adjusting the residual light gap between slats of a motorized blind when oriented in a set closed position of the blind, where at least one closed position of the slats is set by automatic detection using detecting means, comprising the following steps: adjusting a detection criterion of the detecting means, performing anew automatic detection of the closed position with adjusted detection criterion, recording the new value of the detection criterion. |
| US07923945B2 |
Voltage control of upconverter in a motored vehicle drive
When an ECU receives a transmission signal having a high level from a transmission, the ECU exerts torque reduction control to reduce a torque control value for a motor generator. Furthermore the ECU sets an optimum (or target) value of a voltage as based on the torque control value and a motor rotation speed and controls an upconverter. Herein, when the transmission is shifting gears, the ECU controls the upconverter to allow the voltage to be constant regardless of whether the torque reduction control is exerted to reduce the torque control value. |
| US07923944B2 |
Single processor dual motor control
A motor control processor is provided for motor phase current sampling of multiple variable frequency controlled electric motors, and includes an analog-to-digital (A/D) converter and a controller. The A/D converter has multiple analog inputs and generates a digital output signal in response to the multiple analog inputs. The controller is coupled to the A/D converter and determines a maximum desired switching frequency for a first one of the multiple variable frequency controlled electric motors. The controller further selects a base period in response to the maximum desired switching frequency and defines a phase shift time delay as a fraction of the base period so the controller may control the multiple analog inputs of the A/D converter to sample motor phase currents of each of the multiple variable frequency controlled electric motors at sample times determined by the controller in response to the base period and the phase shift time delay. |
| US07923939B1 |
Mixed mode control for dimmable fluorescent lamp
A mixed mode control for dimmable fluorescent lamp provides a smooth and continuous control of output of the lamp. A load threshold, below which the output of the discharge lamp could not be effectively controlled by the conventional frequency control, is determined. During the dimming of the discharge lamp, when the load is not lower than the load threshold, the conventional frequency control is employed. However, when the load is lower than the load threshold, a complementary duty cycle control is used. |
| US07923937B2 |
Light emitting device and driving method thereof
The light emitting device has a limiter transistor which is connected to a monitoring element, and an inverter an output terminal of which is connected to a gate electrode of the limiter transistor and an input terminal of which is connected to one electrode of the limiter transistor and the monitoring element. In the case where the monitoring element is short-circuited, the limiter transistor can be turned off by the inverter to correct a defect of the monitoring element. |
| US07923935B2 |
Illumination control system for light emitters
A lighting fixture (1010) has a fluorescent tube (1012) and a plurality of emitters (1022-1032). A color sensor (1016) detects light that has been totally internally reflected within a diffuser (1014) and provides a color feedback signal to a feedback control circuit (1020) to control the light output from the fixture (1012). |
| US07923934B2 |
Battery-powered fluorescent lamp
A lamp includes a light source, a power tool battery for providing a DC voltage level, and a base for housing the power tool battery. A stem is coupled to the base and supports the light source. A power inverter converts the DC voltage level to an AC voltage level, and a current sensing circuit operatively coupled to the converter or the inverter senses an over-current condition when the converter or the inverter draws more than a predetermined amount of current. The converter or inverter is disabled if the over-current condition continues for more than a predetermined amount of time so that the light source receives the AC voltage level and is illuminated for the predetermined amount of time before power is removed. |
| US07923933B2 |
Lamp failure detector
An apparatus and method for detecting lamp failure is described for an array of lamps used in a rapid thermal processing system. The lamp failure detection system enables identification of a failed lamp among a plurality of lamps, and also provides identification of the failure type. The apparatus applies a lamp failure detection method to the voltage drop values measured across each lamp to determine if a lamp is in a failure state. In one embodiment, a field programmable gate array is used to apply a failure detection method to the lamp voltage values. |
| US07923927B2 |
Organic light emitting display
Disclosed is an organic light emitting display. The organic light emitting display includes a display panel including a first substrate in which an organic light emitting diode is formed, a second substrate arranged on the top of the first substrate and a sealing material for combining the first substrate with the second substrate. The device includes a bezel including a lower surface and a plurality of sidewalls extending from edges of the lower surface, wherein a space for receiving the display panel is defined by the lower surface and the sidewalls. The device further includes a reinforcing lattice arranged between the display panel and the bezel. |
| US07923918B2 |
Light emitting film, luminescent device, method for manufacturing light emitting film and method for manufacturing luminescent device
The present invention provides a reliable, long-life phosphor, or the like, which is prevented from darkening due to aging. A light emitting apparatus has a light emitting element and a phosphor layer. The phosphor layer has a phosphor excited by light from the light emitting element, and a binder which binds the phosphor. The binder is hydroxide oxide gel obtained by curing sol of a hydroxide oxide mixed with sol containing at least one metallic element selected from the group consisting of Al, Y, Gd, Lu, Sc, Ga, In, and B. Transmittance of hydroxide oxide in a gel state is higher than the transmittance in the polycrystal state where the sol-gel reaction is proceeded. In addition, the content of hydroxyl group or water of crystallization in the hydroxide oxide is 10% or less by weight. |
| US07923914B2 |
Field emission cathode device and field emission display using the same
The field emission cathode device includes an insulating substrate with a number of cathodes mounted thereon. A number of field emission units are mounted on the cathodes. A dielectric layer is disposed on the insulating substrate and defines a number of voids corresponding to the field emission units. The dielectric layer has an upper and lower section and disposed on the insulating substrate. The dielectric layer defining a plurality of voids corresponding to the field emission units. A number of grids disposed between the upper and lower sections, and wherein each grid are secured by the upper and lower sections of the dielectric layer. |
| US07923913B2 |
Image display apparatus
An image display apparatus includes first and second light-emitting regions which are arranged in a first direction, a first electron-emitting device corresponding to the first light-emitting region which is located further from the second light-emitting region than the first light-emitting region with respect to the first direction, a second electron-emitting device corresponding to the second light-emitting region which is located further from the first light-emitting region than the second light-emitting region with respect to the first direction, a first black member which is located on the opposite side of the first light-emitting region from the second light-emitting region, and a second black member which is located between the first and second light-emitting regions. A width of the second black member with respect to the first direction is smaller than a width of the first black member. |
| US07923912B2 |
Light-emitting electron emission device and display device including the same
A light emission having: a first substrate; a second substrate opposite the first substrate; a sealing member between the first and second substrates and forming a vacuum envelope with the first and second substrates. The device also includes an electron emission unit on the first substrate, the electron emission unit having a plurality of pixel regions, each of the plurality of pixel regions having an independently controlled electron emission; a light emission unit on the second substrate, the light emission unit having a phosphor layer and an anode electrode on the phosphor layer; at least one anode button penetrating the second substrate at a region enclosed by the sealing member and spaced apart from the light emission unit; and a conductive layer on the second substrate and electrically coupling the anode button to the anode electrode. |
| US07923907B2 |
LED lamp assembly
A robust LED lamp may be assembly by forming a heat sinking sandwich with two metal heat sinks positioned around the circuit board and pinned together a heat conductive element. The assembly is positioned by pressing it into a base providing electrical connections. The robust assembly is rapidly assembled, thermally effective in draining or spreading heat from the circuit board and is readily adaptable to a variety of applications lighting. The heat sink may be decorated, colored or otherwise esthetically enhanced for consumer appreciation. |
| US07923904B2 |
Electronic package having stress buffer layer on mounting surface thereof, and method for manufacturing same
An electronic component capable of withstanding stress from a printed circuit board or the like is provided. In an electronic component, a cavity hermetically sealed by a base and a lid is formed. In the cavity, a crystal resonator is supported by a supporting member over the top surface of the base. The base is made of glass. A stress buffer layer made of a conductive resin or the like is formed over the whole bottom surface of the base. An external electrode and an external electrode that are in continuity with the electrodes of the crystal resonator individually extend to the bottom surface of the stress buffer layer via the side surfaces of the base and stress buffer layer. The thus configured electronic component is surface-mounted by, for example, soldering the external electrode and external electrode formed on the bottom surface of the stress buffer layer to a printed circuit board. |
| US07923902B2 |
High-performance electroactive polymer transducers
Electroactive polymer constructions that convert electrical energy to mechanical energy and vice versa are disclosed. The subject transducers (actuators, generators, sensors or combinations thereof) share the requirement of a frame or fixture element used in preloading elastomeric film electrodes and dielectric polymer in a desired configuration. The structures are either integrally biased in a push-pull arrangement or preloaded/biased by another element. |
| US07923892B2 |
Switch for a brush wear recording circuit
A switch for a recording circuit used to determine brush wear of an electrical brush comprises a flag having a first end and a second end defining distal ends of the flag. The flag is mounted on the electrical brush at the first end so as to move in unison with brush wear while being in electrical communication with the electrical brush and has a piercing feature on the second end. The switch further comprises a contact plate arrange relative to the flag so as to bring the flag in contact with the contact plate at a predetermined brush wear and includes an inner conductive core encased by a cover forming an outer layer of the contact plate, wherein the piercing feature is configured to penetrate the cover and to contact the conductive core to cause electrically continuous contact between the flag and the contact plate and close the switch. |
| US07923890B2 |
Apparatus for generator stator mounting
In one embodiment, a system includes a generator frame that includes a spring ring configured to mount removably between an outer annular support and a stator. The spring ring includes a first guide configured to circumferentially align the spring ring to the outer annular support, and a second guide configured to circumferentially align the spring ring to the stator. |
| US07923889B2 |
Rotor of an electric motor and method of manufacturing the same
In a manufacturing method of a rotor for an electric motor including: a core (4) formed of stacked steel plates, each of which has a center hole (4a); and a shaft (3) inserted through the center hole (4a) of the core (4), the shaft (3) is deformed to fit a second end plate (2) in a state where the second end plate (2) is pressed against the core (4), and a deformed portion (3e) of the shaft (3) that engages with an edge (2a, 2b) of the second end plate (2) is deformed along a core-side edge portion (2a) and a no core-side edge portion (2b) of the edge (2a, 2b) of the second end plate (2) so that the deformed portion (3e) is deformed into the deformed shape that fits the shape of the edge (2a, 2b) of the second end plate (2). |
| US07923888B2 |
Switched reluctance motor
Disclosed is a switched reluctance motor which can reduce noise and prevent overheating in rotation of a rotor. The switched reluctance motor includes: a stator core having a plurality of inwardly protruded poles at predetermined intervals; coils wound around the protruded poles of the stator core; and a rotor core being rotatably housed inside the stator core with a predetermined gap, and having a plurality of outwardly protruded poles along the radial direction, and round units protruded from the front ends of each protruded pole of the rotor core starting to meet each protruded pole of the stator core, so that gaps between the protruded poles of the stator core and the protruded poles of the rotor core can be gradually reduced. |
| US07923887B2 |
Brushless motor
Disclosed herein is a brushless motor that is simply constructed based on a vernier type motor to achieve high torque without the increase in size and complication thereof. The brushless motor includes a rotor having magnetized surfaces alternately magnetized as N and S poles and a stator having salient poles. The salient poles have tip end surfaces opposite to the magnetized surfaces in the radial direction. Grooves and protrusions are alternately formed at the tip end surfaces of the salient poles in the rotational direction. The grooves and the protrusions extend in the axial direction and have a width in the rotational direction approximately equal to that of the N pole or the S pole. Magnetic bodies are disposed in gaps defined between the grooves and the magnetized surfaces in a non-contact fashion. A magnetic connection member is spaced apart from the stator to interconnect the magnetic bodies. |
| US07923882B2 |
Synchronous machine and a process of manufacturing a synchronous machine
A synchronous machine and a process for manufacturing a synchronous machine having permanent magnets arranged within the rotor such that the leak of magnetic flux generated by the magnets is reduced and having constructive characteristics that maximize the difference in the reluctances of direct axis and quadrature axis while providing the strength necessary for the good functioning of the equipment. Magnet-fixation grooves of the rotor are provided with elongated ends in a curved shape, a first elongated end extending from the first free end to a region adjacent the end of the rotor groove bottom, the first elongated end being configured from an opening in the rotor, forming reluctance-increase channels, a second elongated end of the fixation grooves being configured so as to form the reluctance-increase channel and extending from the respective second free-end portion toward the second free-end portion of the other fixation groove of the pair. |
| US07923881B2 |
Interior permanent magnet motor and rotor
An electric machine includes a stator and a rotor core positioned adjacent the stator and rotatable about a longitudinal axis. The rotor core includes a plurality of bar apertures, a plurality of elongated flux barriers separate from the bar apertures and positioned radially inward of the bar apertures, and a plurality of magnet slots separate from the bar slots and positioned radially inward of a portion of the bar apertures. The electric machine also includes a plurality of magnets, each positioned in one of the magnet slots. A plurality of conductive bars are each positioned in one of the bar apertures and includes a first end and a second end. A first end ring is coupled to the first end of each of the bars and a second end ring is coupled to the second end of each of the bars. |
| US07923879B2 |
Permanent magnet motor and washing machine provided therewith
A permanent magnet motor includes a rotor and a plurality of permanent magnets located inside a rotor core. One or more of the permanent magnets having relatively smaller coercive forces have a first magnetic characteristic that when a magnetizing magnetic field is caused to act on the permanent magnets, a magnetic susceptibility is substantially at 0 until reaching an inflection point during magnetization, and when exceeding the inflection point, the magnetic susceptibility enters a loop approximating to the hysteresis loop in a first quadrant, and a second magnetic characteristic that when a demagnetizing magnetic field is caused to act on the permanent magnets, a magnetic susceptibility is substantially at 0 until reaching the inflection point during demagnetization, and when exceeding the inflection point, the magnetic susceptibility enters a loop approximating to the hysteresis loop in a second quadrant. |
| US07923878B2 |
Axial gap coreless motor and positioning unit
An axial gap coreless motor includes a stator including a stator yoke having a surface and being composed of a plurality of laminated layers of silicon steel sheets secured together, a wiring substrate having a surface and being disposed on the stator yoke surface, and a plurality of coreless coils annularly disposed on the wiring substrate surface; and a rotor including a rotor magnet having a plurality of circumferentially arranged magnetic poles, wherein the rotor is rotated relative to the stator such that the rotor magnet axially confronts the coreless coil over an air gap. |
| US07923874B2 |
Nested torsional damper for an electric machine
A damper for an electric machine (10) includes a shaft (20) and at least one shaft segment (26) concentric about the shaft (20) and operably connected to the shaft (20). The at least one shaft segment (26) includes a plurality of shaft slots (38) extending through a wall (40) of the at least one shaft segment (26) to increase torsional compliance of the at least one shaft segment (26). A driveline mounted electric machine (10) includes at least one rotor (16) located at a central axis (18) of the electric machine (10) and a damper. The damper includes a shaft (20) in operable communication with the at least one rotor (16) and at least one shaft segment (26) concentric about the shaft (20) an operably connected thereto. The at least one shaft segment (26) includes a plurality of shaft slots (38) extending through a wall (40) of the at least one shaft segment (26) to increase torsional compliance of the at least one shaft segment (26). |
| US07923870B2 |
Noncontact power transmission system and power transmitting device
A noncontact power transmission system having a power transmitting device including a primary coil and a power receiving device including a secondary coil, the primary coil and the secondary coil being electromagnetically coupled to each other and the power transmitting device configured to transmit electric power to the power receiving device, wherein the secondary coil contains a magnetic substance, the power transmitting device has a feeding section for feeding power to the primary coil and a self inductance detection section for detecting a change in the self inductance of the primary coil immediately after starting the feeding to the primary coil, wherein a feeding operation of the feeding section immediately after starting the feeding is determined based on a detection result of the self inductance detection section. |
| US07923867B2 |
Electromagnetic noise suppression system for Wye power distribution
Three single-phase transformers having primary sides connected in a delta connection and the secondary sides connected in a series-delta connection. Each power line is connected through a fused disconnect to two primary terminals, each primary terminal on a different transformer. A second terminal on the secondary side of the first phase transformer is connected to a first terminal on the secondary side of the third transformer through a non-inductive grid resistor. The second terminal on the secondary side of the third transformer is connected to the first terminal on the secondary side of a second transformer. The second terminal on the secondary side of the second transformer is connected to the first terminal on the secondary side of the first transformer. In this fashion, the secondary sides of each of the single-phase transformers are connected in series through a non-inductive grid resistor. |
| US07923863B2 |
System for line powering
A system for line powering includes at least one office-end PSU, one standby PSU and one power switching unit. The office-end PSU provides power for a group of subscriber lines in a centralized manner. The power switching unit monitors the power supply status of the office-end PSU and controls the switching between the office-end PSU and standby PSU. In embodiments of the invention, different rectifier/boost circuits and different step-down circuits need not be set for each pair of subscriber lines between the office-end PSU and the remote device. When an office-end PSU fails to supply power, the standby PSU can be switched over quickly to supply power for the remote device, which cuts down the cost for designing the office-end PSU and the standby PSU while ensuring the reliability of power supply for the remote device. |
| US07923854B1 |
Wind turbines direct drive alternator system with torque balancing
Wind turbine direct drive alternator system includes a supporting structure, at least two turbines mounted on the supporting structure to rotate in opposite directions when exposed to the same wind, a respective number of alternator rotor disks whereby each turbine is directly connected to an alternator rotor disk, and a stator unit having two sides each facing a respective rotor disk. The stator unit is arranged or constructed such that torque generated by rotation of each turbine can be transmitted therethrough with a view toward balancing the torque induced on the supporting structure by rotation of the turbines. When the stator unit includes two stator disks, each stator disk transmits approximately the same magnitude of torque as, but in an opposite direction to, the other stator disk. The two stator disks balance the torque of each other and almost no external torque is needed to balance the system. |
| US07923853B2 |
Methods of synchronizing a plurality of generators
A method of synchronizing a plurality of generators connected together in parallel to a supply network. A common synchronization signal can be generated having a frequency versus time pattern that is the same as the frequency versus time pattern of the supply network during normal operating conditions. The common synchronization signal is then supplied to each of the generators to control the level of power that is supplied to the supply network by the generators. |
| US07923852B2 |
Semiconductor package structure with protection bar
A semiconductor package structure includes a carrier, a chip or multi-chips mounted on a top surface of the carrier, a molding compound encapsulating the top surface and the chips, a plurality of solder balls distributed on a bottom surface of the carrier, and a protection bar formed of thermosetting plastic material formed on the bottom surface. |
| US07923850B2 |
Semiconductor chip with solder joint protection ring
Various semiconductor chip arrangements and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip that has an external peripheral wall to a first side of a substrate. A first metallic ring is coupled to the first side of the substrate. The first metallic ring has an internal peripheral wall that frames the semiconductor chip and is separated from the external peripheral wall by a gap. The first metallic ring has a coefficient of thermal expansion less than about 6.0 10−6 K−1. |
| US07923847B2 |
Semiconductor system-in-a-package containing micro-layered lead frame
Semiconductor packages that contain a system-in-a-package and methods for making such packages are described. The semiconductor packages contain a first semiconductor die resting on a middle of a land pad array, a second die disposed over the first die and resting on routing leads that are connected to the land pad array, a third die resting on the backside of the second die and connected to the land pad array by wire bonds, and a passive device and/or a discrete device resting on device pads. The packages also contain thermal pads which operate as a heat sink. The land pad array is formed from etching the leadframe. The semiconductor packages have a full land pad array with a thin package size while having a system-in-a-package design. Other embodiments are also described. |
| US07923840B2 |
Electrically conductive path forming below barrier oxide layer and integrated circuit
Methods of forming an electrically conductive path under a barrier oxide layer of a semiconductor-on-insulator (SOI) substrate and an integrated circuit including the path are disclosed. In one embodiment, the method includes forming an electrically conductive path below a barrier oxide layer of a semiconductor-on-insulator (SOI) substrate, the method comprising: forming a first barrier oxide layer on a semiconductor substrate; forming the electrically conductive path within the first barrier oxide layer; and forming a second barrier oxide layer on the first barrier oxide layer. The electrically conductive path allows reduction of SRAM area by forming a wiring path underneath the barrier oxide layer on the SOI substrate. |
| US07923837B2 |
Microelectronic device patterned by ablating and subsequently sintering said microelectronic device
A microelectronic device includes a non-polymeric substrate, an organic interlayer, and a indium tin oxide layer formed on the organic interlayer; the indium tin oxide layer including an ablated feature within said indium tin oxide layer, wherein said indium tin oxide layer is formed by an indium tin oxide solution that is laser ablated prior to sintering.Applicant respectfully submits that the above amendments bring the Abstract into compliance with MPEP §608.01 (b). Accordingly, Applicant respectfully requests reconsideration and withdrawal of the objection to the abstract. |
| US07923836B2 |
BLM structure for application to copper pad
A microelectronic element and a related method for fabricating such is provided. The microelectronic element comprises a contact pad overlying a major surface of a substrate. The contact pad has a composition including copper at a contact surface. A passivation layer is also provided overlying the major surface of the substrate. The passivation layer overlies the contact pad such that it exposes at least a portion of the contact surface. A plurality of metal layers arranged in a stack overlie the contact surface and at least a portion of the passivation layer. The stack includes multiple layers, which can have different thicknesses and different metals, with the lowest layer including titanium (Ti) and nickel (Ni) in contact with the contact surface. |
| US07923832B2 |
Integrated circuit package
An integrated circuit package includes a cover plate disposed on a substrate mounted with an integrated circuit chip thereon. The chip is formed with first solder pads coupled respectively and wiredly to pin terminals on the substrate, and second solder pads coupled respectively and wiredly to pinhole terminals in the cover plate, and includes a main circuit unit, a pin transmission unit interconnecting electrically first ports of a main circuit unit and the first solder pads, a pinhole transmission unit interconnecting electrically second ports of the main circuit unit, and a control unit coupled to the pin and pinhole transmission units, and operable to control operation of the pin and pinhole transmission units such that each first port is coupled to a selected first solder pad through the pin transmission unit and that each second port is coupled to a selected second solder pad through the pinhole transmission unit. |
| US07923829B2 |
Bonding pad sharing method applied to multi-chip module and apparatus thereof
A multi-chip module (MCM) includes a first die and a second die. The first die supports a plurality of predetermined functions. The second die is coupled to the first die and comprises at least an option pad configured for a bonding option. The first die performs a predetermined function according to a bonding status of the option pad of the second die. |
| US07923827B2 |
Semiconductor module for a switched-mode power supply and method for its assembly
Semiconductor module for a Switched-Mode Power Supply comprises at least one semiconductor power switch, a control semiconductor chip and a leadframe comprising a die pad and a plurality of leads disposed on one side of the die pad. The die pad comprises at least two mechanically isolated regions wherein the semiconductor power switch is mounted on a first region of the die pad and the control semiconductor chip is mounted on a second region of the die pad. Plastic housing material electrically isolates the first region and the second region of the die pad and electrically isolates the semiconductor power switch from the control semiconductor chip. |
| US07923825B2 |
Integrated circuit package
An integrated circuit package is described that includes an integrated circuit die, a plurality of lower contact leads, and an insulating substrate positioned over the die and lower contact leads. The insulating substrate includes a plurality of electrically conducting upper routing traces formed on the bottom surface of the substrate. The traces on the bottom surface of the substrate electrically couple each lower contact lead with an associated I/O pad. |
| US07923823B2 |
Semiconductor device with parylene coating
A method for producing semiconductor chips has the following steps for this purpose: firstly, a semiconductor wafer having a multiplicity of semiconductor chip positions arranged in rows and columns is provided, wherein the semiconductor wafer has on its front side front sides of semiconductor chips with integrated circuits. The rear side of the semiconductor wafer is provided with a coating having Parylene. The semiconductor wafer is subsequently singulated into semiconductor chips having rear sides on which the coating having Parylene is arranged. |
| US07923821B2 |
Semiconductor integrated circuit substrate containing isolation structures
Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths. |
| US07923818B2 |
Varactor element and low distortion varactor circuit arrangement
A varactor element having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element has an exponential depletion capacitance-voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided. |
| US07923811B1 |
Electronic fuse cell with enhanced thermal gradient
An electronic fuse (“E-fuse”) cell is formed on a semiconductor substrate. The E-fuse cell has a fuse element with a fuse link extending from a first fuse terminal across a thick dielectric structure to a second fuse terminal. The first and second fuse terminals are separated from the semiconductor substrate by a thin dielectric layer. |
| US07923810B2 |
Semiconductor devices having active elements with raised semiconductor patterns and related methods of fabricating the same
A semiconductor device may include a semiconductor region of a semiconductor substrate wherein a P-N junction is defined between the semiconductor region and a bulk of the semiconductor substrate. An insulating isolation structure in the semiconductor substrate may surround sidewalls of the semiconductor region. An interlayer insulating layer may be on the semiconductor substrate, on the semiconductor region, and on the insulating isolation structure, and the interlayer insulating layer may have first and second spaced apart element holes exposing respective first and second portions of the semiconductor region. A first semiconductor pattern may be in the first element hole on the first exposed portion of the semiconductor region, and a second semiconductor pattern may be in the second element hole on the second exposed portion of the semiconductor region. A surface portion of the first semiconductor pattern opposite the semiconductor substrate and a surface portion of the second semiconductor pattern opposite the semiconductor substrate may have a same conductivity type. Related methods are also discussed. |
| US07923806B2 |
Embedded wiring in copper damascene with void suppressing structure
A semiconductor device capable of restricting a void growth in a copper wiring. The semiconductor device comprises a semiconductor substrate, an insulation layer formed above the semiconductor substrate, a barrier metal layer that is a first damascene wiring buried in the insulation layer, defines the bottom face and the side faces, and also defines a first hollow part at the inner side, a copper wiring layer disposed in the first hollow part and defining a second hollow part at the inner side, a first damascene wiring disposed in the second hollow part and containing an auxiliary barrier metal layer separated from the barrier metal layer, and an insulating copper diffusion preventing film disposed on the first damascene wiring and the insulation layer. |
| US07923802B2 |
Method and apparatus for forming a photodiode
Embodiments of the invention provide a method and an apparatus for forming a photodiode. One embodiment provides a thin dielectric layer sandwiched between two metallic plates (electrodes), one or both of which are periodically patterned in one or two dimensions. The effect of the pattern is to couple incident light within some range of wavelength and/or incidence angles to surface excitations of the metal surface called surface plasmons, enhancing the electric field near the surface and resulting in dramatically increased photo-absorption and carrier generation in the dielectric layer. |
| US07923798B2 |
Optical device and method for fabricating the same, camera module using optical device, and electronic equipment mounting camera module
An optical device includes a light receiving element chip having: an active region formed on a principal plane of a substrate and made by arranging a plurality of light receiving pixels; a circuit region disposed around an outer circumference of the active region; a penetrating conductor provided to penetrate the substrate in the thickness direction of the substrate; and an external connection terminal provided on a back surface of the substrate facing the principal plane thereof and connected to the penetrating conductor. The optical device further includes a microlens, a planarization film, and a transparent protective film formed on the planarization film. |
| US07923796B2 |
Semiconductor device including resonance circuit
It is an object of the present invention to provide a semiconductor device in which an arrangement area of capacitance can be reduced and resonance frequency can be easily adjusted. The semiconductor device includes an antenna and a resonance circuit including a capacitor connected to the antenna in parallel where the capacitor is formed by connecting x pieces of first capacitor (x is an arbitrary natural number), y pieces of second capacitor (y is an arbitrary natural number), and z pieces of third capacitor (z is an arbitrary natural number) in parallel; and the first capacitor, the second capacitor, and the third capacitor have different capacitance values from each other. It is preferable that each of the first capacitor, the second capacitor, and the third capacitor be a MIS capacitor. Further, at least one of the first capacitor, the second capacitor, and the third capacitor is preferably formed by connecting a plurality of capacitors in parallel. |
| US07923794B2 |
Micromechanical component having thin-layer encapsulation and production method
A micromechanical component having a substrate and having a thin-layer, as well as having a cavity which is bounded by the substrate and the thin-layer, at least one gas having an internal pressure being enclosed in the cavity. The gas phase has a non-atmospheric composition. A method for producing a micromechanical component having a substrate and having a thin-layer encapsulation, as well as having a cavity which is bounded by the substrate and the thin-layer encapsulation. The method has the steps of positioning a polymer in a cavity, closing the cavity and generating a gas phase of non-atmospheric composition in the cavity by decomposing at least a part of the polymer. An internal pressure is generated, which may be higher than the process pressure when the cavity is closed. |
| US07923792B2 |
MEMS sensor comprising a deformation-free back electrode
An MEMS sensor constructed on a base chip and having a capacitive mode of operation is disclosed. The MEMS sensor has a patterned layer construction applied on the base chip. A cutout is produced in the layer construction, the moveable electrode, for example a membrane, being arranged in said cutout. The cutout is spanned by a covering layer, which bears on the layer construction around the cutout and comprises the back electrode. |
| US07923791B2 |
Package and packaging assembly of microelectromechanical system microphone
A package of a MEMS microphone is suitable for being mounted on a printed circuit board. The package includes a substrate, at least one MEMS microphone, and a conductive sealing element. The MEMS microphone is arranged on the substrate, and electrically connected to a conductive layer on a bottom surface of the substrate. The conductive sealing element is arranged on the substrate and around the MEMS microphone for connecting the printed circuit board, and constructs an acoustic housing with the printed circuit board and the substrate. The acoustic housing has at least one acoustic hole passing through the substrate. The acoustic hole has a metal layer on the inner wall thereof for connecting the conductive layer on the bottom surface of the substrate to another conductive layer on the top surface of the substrate. |
| US07923790B1 |
Planar microshells for vacuum encapsulated devices and damascene method of manufacture
Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell. |
| US07923787B2 |
MOSFET with isolation structure and fabrication method thereof
A MOSFET with an isolation structure is provided. An N-type MOSFET includes a first N-type buried layer and a P-type epitaxial layer disposed in a P-type substrate. A P-type FET includes a second N-type buried layer and the P-type epitaxial layer disposed in the P-type substrate. The first, second N-type buried layers and the P-type epitaxial layer provide isolation between FETs. In addition, a plurality of separated P-type regions disposed in the P-type epitaxial layer further provides an isolation effect. A first gap exists between a first thick field oxide layer and a first P-type region, for raising a breakdown voltage of the N-type FET. A second gap exists between a second thick field oxide layer and a second N-well, for raising a breakdown voltage of the P-type FET. |
| US07923784B2 |
Semiconductor device having saddle fin-shaped channel and method for manufacturing the same
A semiconductor device includes a semiconductor substrate with an isolation layer formed in the semiconductor substrate to delimit active regions. Recess patterns for gates are defined in the active regions and the isolation layer. Gate patterns are formed in and over the recess patterns for gates, and a gate spacer is formed to cover the gate patterns. The recess patterns for gates have a first depth in the active regions and a second depth, which is greater than the first depth, in the isolation layer. Gaps are created between the gate patterns and upper parts of the recess patterns for gates that are defined in the isolation layer. The gate spacer fills the gaps and protects the gate spacer so as to prevent bridging. |
| US07923781B2 |
Semiconductor device and method for manufacturing the same
It is an object to achieve high performance of a semiconductor integrated circuit depending on not only a microfabrication technique but also another way and to achieve low power consumption of a semiconductor integrated circuit. A semiconductor device is provided in which a crystal orientation or a crystal axis of a single-crystalline semiconductor layer for a MISFET having a first conductivity type is different from that of a single-crystalline semiconductor layer for a MISFET having a second conductivity type. A crystal orientation or a crystal axis is such that mobility of carriers traveling in a channel length direction is increased in each MISFET. With such a structure, mobility of carriers flowing in a channel of a MISFET is increased, and a semiconductor integrated circuit can be operated at higher speed. Further, low voltage driving becomes possible, and low power consumption can be achieved. |
| US07923778B2 |
Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device
A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with beat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions. |
| US07923776B2 |
Trench-gate field effect transistor with channel enhancement region and methods of forming the same
A field effect transistor includes a body region of a first conductivity type in a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminating within the semiconductor region. A source region of the second conductivity type extends in the body region adjacent the gate trench. The source region and an interface between the body region and the semiconductor region define a channel region therebetween which extends along the gate trench sidewall. A channel enhancement region of the second conductivity type is formed adjacent the gate trench. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region. |
| US07923775B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a plurality of trench patterns formed over a substrate; gate insulation layers formed over sidewalls of the trench patterns; gate electrodes formed over the trench patterns; line patterns coupling the gate electrodes; and source and drain regions formed in upper and lower portions of the substrate adjacent to the sidewalls of the trench patterns. |
| US07923774B2 |
Power MOS device with conductive contact layer
A semiconductor device includes a drain, a body disposed over the drain, a source embedded in the body, a gate trench extending through the source and the body into the drain, a gate disposed in the gate trench, a source body contact trench extending through the source into the body, a conductive contact layer disposed along at least a portion of a source body contact trench sidewall and in contact with at least a portion of the source, and a trench filling material disposed in the source body contact trench and overlaying at least a portion of the conductive contact layer. |
| US07923773B2 |
Semiconductor device, manufacturing method thereof, and data processing system
A bottom of a gate trench has a first bottom relatively far from an STI and a second bottom relatively near from the STI. A portion, in an active region, configuring the second bottom of the gate trench configures a side-wall channel region, and has a thin-film SOI structure sandwiched between the gate electrode and the STI. On the other hand, a portion configuring the first bottom of the gate trench functions as a sub-channel region. A curvature radius of the second bottom is larger than a curvature radius of the first bottom. In an approximate center in a length direction of the gate trench, a bottom of a trench is approximately flat, and on the other hand, in ends of the length direction, a nearly whole bottom of the trench is curved. |
| US07923762B2 |
Semiconductor device and method of manufacturing the same
Disclosed herein is a semiconductor device, including: an insulating film provided on a semiconductor substrate so as to have a trench pattern; a gate insulating film provided so as to cover an inner wall of the trench pattern; and a gate electrode formed so as to be filled in the trench pattern through the gate insulating film and so as to protrude more widely than the trench pattern on both sides of the trench pattern on the insulating film. |
| US07923759B2 |
Metal gate semiconductor device and manufacturing method
A method for manufacturing a metal gate includes providing a substrate including a gate electrode located on the substrate. A plurality of layers is formed, including a first layer located on the substrate and the gate electrode and a second layer adjacent the first layer. The layers are etched to form a plurality of adjacent spacers, including a first spacer located on the substrate and adjacent the gate electrode and a second spacer adjacent the first spacer. The first spacer is then etched and a metal layer is formed on the device immediately adjacent to the gate electrode. The metal layer is then reacted with the gate electrode to form a metal gate. |
| US07923757B2 |
Semiconductor device and associated layouts having linear shaped gate electrodes defined along at least five adjacent gate electrode tracks of equal pitch with gate electrode connection through single interconnect level
A restricted layout region includes a diffusion level layout including p-type and n-type diffusion region layout shapes separated by a central inactive region. The diffusion region layout shapes are defined in a non-symmetrical manner relative to a centerline defined to bisect the diffusion level layout. A gate electrode level layout is defined to include linear-shaped layout features placed to extend in only a first parallel direction. Adjacent linear-shaped layout features that share a common line of extent in the first parallel direction are separated by an end-to-end spacing that is substantially equal across the gate electrode level layout and that is minimized to an extent allowed by a semiconductor device manufacturing capability. The gate electrode level layout includes linear-shaped layout features defined along at least four different lines of extent in the first parallel direction. The restricted layout region corresponds to an entire gate electrode level of a cell layout. |
| US07923752B2 |
Thin-film crystal wafer having pn junction and method for fabricating the wafer
A thin-film crystal wafer having a pn junction includes a first crystal layer of p GaAs, a second crystal layer of n InxAlyGa1−x−yP, the first and second crystal layers being lattice-matched layers that form a heterojunction, and a control layer of a thin-film of InxAlyGa1−x−yP differing in composition from the n InxAlyGa1−x−yP of the second crystal layer is formed at the interface of the heterojunction. The control layer enables the energy discontinuity at the interface of the InxAlyGa1−x−yP/GaAs heterojunction to be set within a relatively broad range of values and thus enables the current amplification factor and the offset voltage to be matched to specification values by varying the energy band gap at the heterojunction. |
| US07923747B2 |
Wafer level LED package structure and method for making the same
A wafer level LED package structure includes a light-emitting unit, a first conductive unit, a second conductive unit and an insulative unit. The light-emitting unit has a light-emitting body, a positive conductive layer and a negative conductive layer formed on the light-emitting body, and a first insulative layer formed between the positive conductive layer and the negative conductive layer. The first conductive unit has a first positive conductive layer formed on the positive conductive layer and a first negative conductive layer formed on the negative conductive layer. The second conductive unit has a second positive conductive layer formed on the first positive conductive layer and a second negative conductive layer formed on the first negative conductive layer. The insulative unit has a second insulative layer formed on the first insulative layer and disposed between the second positive conductive layer and the second negative conductive layer. |
| US07923745B2 |
LED chip package structure with high-efficiency light-emitting effect and method of packaging the same
An LED chip package structure with high-efficiency light-emitting effect includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covered on the LED chips. |
| US07923744B2 |
Semiconductor light-emitting device
The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. At least one recess is formed in the sidewall of each bump structure. Alternatively, the sidewall of each bump structure has a curved contour. |
| US07923742B2 |
Method for production of a nitride semiconductor laminated structure and an optical semiconductor device
A nitride semiconductor laminated structure comprises: a substrate; a first p-type nitride semiconductor layer formed using an organometallic compound as a Group III element source material, a p-type impurity source material, and ammonia as a Group V element source material, with the hydrogen concentration in the first p-type nitride semiconductor layer being 1×1019 cm−3 or less; and a second p-type nitride semiconductor layer on the first p-type nitride semiconductor layer formed using an organometallic compound as a Group III element source material, a p-type impurity source material, and ammonia and a hydrazine derivative as Group V element source materials, with the carbon concentration in the second p-type nitride semiconductor layer being 1×1018 cm−3 or less. |
| US07923741B1 |
Semiconductor lighting device with reflective remote wavelength conversion
A semiconductor lighting device includes at least one semiconductor light emitter and at least one wavelength converting element, physically separated from the light emitter. At least one wavelength converting element has a reflective member underneath it, so that both primary light and converted light from the wavelength converting layer become a forward transferred light preventing from backscattering loss into the light emitter. The reflective member may be a thermal conductive element to effectively remove the heat from the wavelength converting element. Accordingly, the remote wavelength conversion on a reflective surface improves the thermal stability of the wavelength conversion material and prevents backscattering loss to produce a higher radiance result from the device. |
| US07923738B2 |
LED array for microdisplays or like application
An array of LEDs are grown by epitaxy on row-connecting conductor strips extending in parallel spaced relationship to one another on the surface of a semiconductor substrate and are thereby electrically interconnected in rows. The row-connecting conductor strips are formed by ion implantation of a p-type dopant into parts of an n-type silicon substrate. Column-connecting conductor strips extend over the light-emitting surfaces of the LEDs for electrically interconnecting them in columns. The LEDs are lit up individually by voltage application between one of the row-connecting conductor strips and one of the column-connecting conductor strips. |
| US07923737B2 |
Three-terminal switch array device, combined semiconductor device, and image forming apparatus
A combined semiconductor device can be formed by bonding the thin-film three-terminal switching elements to a surface of an integrated circuit chip including a shift register that shifts data supplied to the control electrodes of the three-terminal switching elements, or by bonding both the thin-film three-terminal switching elements and another thin semiconductor film including the shift register to a substrate. In either case, thin-film wiring can be used to interconnect the shift register and the switching elements, and the need for an array of large transistors to feed driving current to the switching elements is eliminated, reducing the size and cost of the combined semiconductor device, which can be advantageously used in the optical head of an electrophotographic printer. |
| US07923732B2 |
Thin film transistor and method for manufacturing a display panel
Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. |
| US07923726B2 |
TFT substrate for display device with a semiconductor layer that extends beyond the gate electrode structure and manufacturing method of the same
Disclosed is a TFT substrate for a display apparatus comprising a gate wiring including a gate electrode, a data wiring including a data line, a source electrode connected to the data line, and a drain electrode connected to a pixel electrode, and a semiconductor layer disposed between the gate wiring and the data wiring, wherein the semiconductor layer under the drain electrode is disposed within an area overlapping the gate electrode and the semiconductor layer under the source electrode extends outward to an area not overlapping the gate electrode. Advantageously, the present disclosure provides a TFT substrate for a display apparatus having a high aperture ratio and causing less afterimaging, and a manufacturing method of the same. |
| US07923722B2 |
Thin film transistors and methods of manufacturing the same
A TFT includes a zinc oxide (ZnO)-based channel layer having a plurality of semiconductor layers. An uppermost of the plurality of semiconductor layers has a Zn concentration less than that of a lower semiconductor layer to suppress an oxygen vacancy due to plasma. The uppermost semiconductor layer of the channel layer also has a tin (Sn) oxide, a chloride, a fluoride, or the like, which has a relatively stable bonding energy against plasma. The uppermost semiconductor layer is relatively strong against plasma shock and less decomposed when being exposed to plasma, thereby suppressing an increase in carrier concentration. |
| US07923721B2 |
Electromagnetically protected organic thin film transistor
An organic thin film transistor including: a substrate; a gate electrode placed on the substrate; a gate insulating film placed on the gate electrode; a source electrode and a drain electrode which are placed on the gate insulating film; an organic semiconductor layer placed on the gate insulating film between the source electrode and the drain electrode; a hole transport layer placed on the organic semiconductor layer; an electron transport layer placed on the hole transport layer; and a conductor layer placed on the electron transport layer; the organic thin film transistor which characteristics are stable by being protected from oxygen or moisture and being protected electromagnetically and which is suitable for integration. |
| US07923716B2 |
Nitride semiconductor device
There is provided a nitride semiconductor device including: an n-type nitride semiconductor layer; a p-type nitride semiconductor layer; and an active layer formed between the n-type and p-type nitride semiconductor layers, the active layer including a plurality of quantum well layers and at least one quantum barrier layer deposited alternately with each other, wherein the active layer includes a first quantum well layer, a second quantum well layer formed adjacent to the first quantum well layer toward the p-type nitride semiconductor layer and having a quantum level higher than a quantum level of the first quantum well layer, and a tunneling quantum barrier layer formed between the first and second quantum well layers and having a thickness enabling a carrier to be tunneled therethrough. |
| US07923714B2 |
Phase change memory cell structures and methods for manufacturing the same
Phase change memory cell structures and methods for fabricating the same are provided. An exemplary embodiment of a phase change memory cell structure includes a first electrode formed over a first dielectric layer. A second dielectric layer is formed over the first electrode. A conductive member is formed through the second dielectric layer and electrically contacting the first electrode, wherein the conductive member comprises a lower element and an upper element sequentially stacking over the first electrode, and the lower and upper elements comprises different materials. A phase change material layer is formed over the second dielectric layer, electrically contacting the conductive member. A second electrode is formed over the phase change material layer. |
| US07923713B2 |
High density chalcogenide memory cells
A non-volatile memory cell is constructed from a chalcogenide alloy structure and an associated electrode side wall. The electrode is manufactured with a predetermined thickness and juxtaposed against a side wall of the chalcogenide alloy structure, wherein at least one of the side walls is substantially perpendicular to a planar surface of the substrate. The thickness of the electrode is used to control the size of the active region created within the chalcogenide alloy structure. Additional memory cells can be created along rows and columns to form a memory matrix. The individual memory cells are accessed through address lines and address circuitry created during the formation of the memory cells. A computer can thus read and write data to particular non-volatile memory cells within the memory matrix. |
| US07923711B2 |
Switching elements and production methods thereof
The present invention provides switching elements having a readout margin suitable for data storage units of nonvolatile memories, which are obtained by improving the resistance ratio of metal oxide thin films having reversible variable resistance properties. The present invention provides switching elements having a metal oxide consisting of a transition metal and oxygen formed between a first electrode and a second electrode, by modifying one or more of the crystal structure, ionic valence number of metal element, and nonstoichiometricity of a stoichiometric compound consisted of the transition metal and oxygen. The present invention also provides methods for producing switching elements having reversible variable resistance characteristics due to electric power application history. |
| US07923708B2 |
Radiation shielding sheet
A radiation shielding sheet formed by filling a shielding material into an organic polymer material. The shielding material is an oxide powder containing at least one element selected from the group consisting of lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu) and gadolinium (Gd). The oxide powder has an average grain size of 1 to 20 μm, and a volumetric ratio of the shielding material filled in the radiation shielding sheet is 40 to 80 vol. %. |
| US07923707B2 |
Disinfecting device utilizing ultraviolet radiation
A disinfecting device is presented having a UV light source for radiation of a cleaning medium to eradicate the medium of infestation agents such as molds, viruses, bacteria and dust mites. The device enhances the disinfection of the medium by providing mechanisms for enhanced penetration of the UV light into the cleaning medium. The device also offers enhanced heat dissipation to promote effective use of the device. Also provided are safety mechanisms to promote the safe and advantageous use of the UV device. |
| US07923701B2 |
Charged particle beam equipment
Charged particle beam equipment has a processing unit for calibrating dimension values of an enlarged specimen image, and means for changing the amount by which a charged particle beam is scanned. Also, a specimen stand has a mechanism for holding a specimen having a periodical structure or a specimen simultaneously having a periodical structure and a non-periodical structure, and a storage device for automatically changing a magnification for an enlarged specimen image, and storing measured values at all magnifications. |
| US07923693B2 |
Scintillator-block capable of efficient absorption of X-ray energy
The present invention describes scintillator-elements for use in X-ray detectors, the elements being shaped to ensure maximum absorption of the energy carried in by X-ray photons and to provide high position-resolution. Arrangements of such scintillator-elements in arrays and detector-systems comprising a plurality of arrays are described. |
| US07923691B2 |
Method for producing an attenuation map
A method is disclosed for producing an attenuation map for a component of an MR/PET system. In at least one embodiment, the method includes ascertaining attenuation values of the component, producing a basic map from the attenuation values, ascertaining a position of the component relative to an examination volume of the MR/PET system, and producing the attenuation map by correcting the basic map using the ascertained position. This enables the actual position of the components to be taken into account in the attenuation correction. |
| US07923690B2 |
Method of and software for conducting motion correction in tomographic scanning and system for tomographic scanning using the method
During data acquisition in a tomographic scan of a subject unscattered events and scatter events are collected. The data are corrected for the scatter events and movement of the subject during the scan. A scatter estimate is derived for use in the reconstruction of an image of the subject; a first step in the derivation has a first dependence on the movement of the subject. The image of the subject is derived from the detected events using the scatter estimate; a second step in this derivation has a second dependence on the movement of the subject, the dependence being different from that of the first step. |
| US07923689B2 |
Multi-band sub-wavelength IR detector having frequency selective slots and method of making the same
In one embodiment, a multiband infrared (IR) detector array includes a metallic surface having a plurality of periodic resonant structures configured to resonantly transmit electromagnetic energy in distinct frequency bands. A plurality of pixels on the array each include at least first and second resonant structures corresponding to first and second wavelengths. For each pixel, the first and second resonant structures have an associated detector and are arranged such that essentially all of the electromagnetic energy at the first wavelength passes through the first resonant structure onto the first detector, and essentially all of the electromagnetic energy at the second wavelength passes through the second resonant structure onto the second detector. In one embodiment, the resonant structures are apertures or slots, and the IR detectors may be mercad telluride configured to absorb radiation in the 8-12 μm band. Detection of more than two wavelengths may be achieved by proper scaling. A method of forming an IR detector array is also disclosed. |
| US07923676B2 |
Optical unit, solid-state image sensing device with position adjusting section and electronic apparatus comprising same
A camera module 100a includes a lens unit 1a, which includes a lens 11 and a lens holder 12 holding the lens 11 therein, and an image sensing unit 2a, which has a solid-state image sensor 24. A position adjustment of the lens 11 is performed by moving the lens 11 independently of the lens holder 12, by use of electromagnetic force. This allows a fine adjustment of a position of the lens 11, thereby improving the alignment precision of the lens 11. Thus, a solid-state image sensing device is provided, which can make fine adjustments of focal lengths. |
| US07923675B2 |
Projection system having avirtual mask
A projection system includes a projection screen defining a shape and a projector configured to project an image onto the projection screen. The projector may project a static or dynamic image that has substantially the same shape as the projection screen or otherwise block portions of the projected image that are projected outside of the projection screen with the aid of a virtual mask. The virtual mask and the projection screen may be created based on a virtual shape template that defines the desired shape for the projection screen, such as with a vector outline. In some embodiments, the virtual mask and the projection screen are created based on the same virtual shape template. The virtual shape template may define a cutting path for extracting the projection screen from a suitable material. |
| US07923672B2 |
Process and devices for optically sensing a specimen with a large depth of field
A device for optically sensing a specimen with a large depth of field has a lighting module which illuminates a zone of the specimen during a predetermined measurement period with a pattern whose phase is modified in time during the measurement period, generating a specimen light to which a corresponding time-variable phase is imparted. The device also includes a detection module having a space-resolving detection zone which records the specimen zone and has multiple recording pixels, two analysis channels which can be connected to the recording pixels, and an analysis unit is connected to both analysis channels. A control unit is provided which, during the measurement period, connects each recording pixel in synchrony with the phase of the detected specimen light to the two analysis channels, alternatively, in such a way that the detected specimen light is divided into two portions phased in relation to one another, and the analysis unit calculates an optical split-image of the specimen zone on the basis of the two phased portions supplied to the analysis channels. |
| US07923667B2 |
Electric room heater
Electric Room Heater in its housing contains heaters which consist of strip of oriented cold rolled transformer sheet that are cooled by natural air circulation. Heater consists of two cross supports (11) connected by a central support (14). Between the cross supports are placed non-flammable insulating holders (13). The insulating holders have sprockets. Between sprockets lies strip of the heater of oriented cold rolled transformer sheet (12). The insulating holder (13) by its width (17) creates distance between layers of heater strips, and by sprockets width (18) makes distance between adjacent strips, windings, in the layer. These distances make channels for air circulation, thus enabling strip temperature to be less then 100° C. |
| US07923665B2 |
Temperature measuring device and method for measuring wafer-type thermometers
An object of the present invention is to provide a wafer-type thermometer capable of adapting itself to automation and improving the heat resistance to measure temperature distribution of a wafer and a method for manufacturing the wafer-type thermometer. A plurality of temperature sensors are arranged in regions formed by segmenting the upper surface of a wafer into a plurality of regions. Output signals from the plurality of temperature sensors are converted into temperature data by a conversion processing circuit where further processes the temperature data. The conversion processing circuit is housed in a storage room surrounded by a heat insulating member made of a nanocrystalline silicon layer. |
| US07923662B2 |
Stable initiator compositions and igniters
High sparking initiator compositions with a controlled amount of power are disclosed. The initiator compositions comprise a metal containing oxidizing agent, at least one metal reducing agent, and a non-explosive binder. Low voltage igniters that provide bidirectional plumes upon ignition are also disclosed. These igniters have a electrically resistive element positioned across a hole in a support which directs the plume. These igniters and compositions are useful in the actuation of solid fuel heating unit, in particular, sealed heating units. |
| US07923661B2 |
Talking iron
The present invention features an iron being adapted to guide a user through an ironing task. In some embodiments, the iron comprises a plurality of fabric selector switches, a message controller, a speaker, a temperature sensor, and a microprocessor. In some embodiments, said fabric selector switches are operatively connected as inputs to said microprocessor, said temperature sensor is operatively connected to a sole plate of the iron to measure the temperature of the sole plate, and the temperature sensor is also operatively connected as inputs to said microprocessor. |
| US07923659B2 |
Laser machining method and laser machining apparatus
A laser machining method and a laser machining apparatus by which holes excelling in form accuracy can be machined efficiently are to be provided. A first cylindrical lens and/or a second cylindrical lens to correct any deformation of reflective face of a first mirror and/or a second mirror is arranged on an optical axis of a laser beam, and converging positions of the laser beam for an X-component and for a Y-component are coincident with a point on the optical axis. |
| US07923655B2 |
Sorting method and system with dynamically re-allocated sortation bins
A sorter system includes a plurality of sortation bins with a feed path connected to the plurality of sortation bins for transporting media items to destination sortation bins. A controller is connected to control the plurality of sortation bins and is operable during a sortation process to reassign the destination sortation bin into which a media item is sorted. The system operation may employ a method for sorting media items where a plurality of media items are fed onto a transport system for sortation. Each media items is sorted into a destination sortation bin of a plurality of sortation bins connected to said transport system. Destination sortation bins for media items are dynamically reassigned based of the determined status of the media items in the sortation bins. The status of media items is sensed in each of said plurality of sortation bins may be determined based on sensors associated with the equipment or tracked by a controller or other techniques which track the mail pieces being processed. Destination sortation bins may be assigned to accommodate overflow capacity from existing bins thereby creating larger effective bins. They may also be assigned to allow the reuse of existing bins thereby creating a sortation system with a greater effective number of sortation bins. |
| US07923654B2 |
Capacitive touch switch and domestic appliance provided with such switch
A capacitive touch switch having a printed circuit board and capacitive electrode provided on a surface of the printed circuit board is disclosed. The printed circuit board is interposed between a transparent planar light guide and the electrode, the planar light guide being attached to a first face of a transparent cover whose second face is adapted to be touched by the user, a light source being connected to the printed circuit board and being able to convey light to the planar light guide. |
| US07923650B2 |
Ganged auxiliary switch configuration for use in a molded case circuit breaker
A ganged auxiliary switch for a circuit breaker comprises at least two auxiliary switches attached to each other in a side-by-side relationship so that they may be inserted into said circuit breaker as a single unit. |
| US07923643B2 |
Separator for separating windings
A separator is disclosed which provides an electrically insulating layer between groups of windings in an electrical apparatus, such as a rotating electrical machine. The separator comprises a matrix of interconnected rods. This can allow air gaps to be present between groups of windings, which may improve the cooling efficiency of the apparatus. |
| US07923639B2 |
Sealing tape
A cable joint includes at least two cables each having inner conducting elements. At least one of the cables has a layer of paper insulation impregnated with an oil. The inner conducting elements of the cables are secured to each other at a junction. A sealing tape has an inner layer and an outer layer. The sealing tape is wrapped about the junction such that the inner layer is in contact with the cables. The inner layer is provided with a deformable oil barrier including a sealing mastic that is resistant to chemical attack from the oil and resistant to migration of the oil there through. The outer layer carries the inner layer. The outer layer is provided with a substantially rigid tape that is resistant to deformation and expansion of the inner layer that forms a protective sleeve about the inner layer. |
| US07923635B2 |
Mounting bracket with far side support
A mounting bracket is provided for supporting an electrical box to a support structure. The mounting bracket includes a mounting base for coupling to the electrical box, and a body member extending perpendicular to the mounting base and extending against the back wall of the electrical box. The body member includes a support member and extension member that can be folded outwardly from the back wall of the electrical box to contact an opposing wall and support the electrical box. In another embodiment, the mounting bracket includes a front plate with a central opening for receiving an electrical box and a pair of extension members that extend in a rearward direction with respect to the electrical box. The support members can include an extension member that can be folded outwardly to contact an opposing wall surface to support the electrical box. |
| US07923634B2 |
Method for producing a panel storage frame and panel storage frame
The manufacturing method of the panel installation portion 12a allows the portions of the upper block and the lower block for forming the panel installation portion to be exchanged as the nesting blocks upon press working so as to change the protruding amount of the panel installation portion from the outer peripheral surface. |
| US07923632B2 |
Communication cable comprising electrically discontinuous shield having nonmetallic appearance
A tape can comprise a dielectric film that has a pattern of electrically conductive areas adhering thereto. The conductive areas can be electrically isolated from one another. The tape can utilize means to obscure the metallic finish and can contain indicators to deter installers from grounding the tape at either end. The tape can be wrapped around one or more conductors, such as wires that transmit data, to provide electrical or electromagnetic shielding for the conductors. The resulting cable can have a shield that is electrically discontinuous between opposite ends of the cable. |
| US07923631B2 |
Noise-controllable high voltage electric wire
A noise-controllable high voltage electric wire is formed of a pair of thick high voltage electric wires, through which a large current flows. The pair of thick high voltage electric wires each constitute a plus circuit and a minus circuit. The pair of the thick high voltage electric wires includes: a plurality of thin electric wires for the plus circuit; and a plurality of thin electric wires for the minus circuit. Each thin electric wire for the plus circuit and a corresponding thin electric wire for the minus circuit are twisted together so as to form a plurality of twisted pairs of the electric wires. The plurality of the twisted pairs of the electric wires are bundled up. |
| US07923628B2 |
Method of controlling the composition of a photovoltaic thin film
A method of reducing the loss of elements of a photovoltaic thin film structure during an annealing process, includes depositing a thin film on a substrate, wherein the thin film includes a single chemical element or a chemical compound, coating the thin film with a protective layer to form a coated thin film structure, wherein the protective layer prevents part of the single chemical element or part of the chemical compound from escaping during an annealing process, and annealing the coated thin film structure to form a coated photovoltaic thin film structure, wherein the coated photovoltaic thin film retains the part of the single chemical element or the part of the chemical compound that is prevented from escaping during the annealing by the protective layer. |
| US07923623B1 |
Electric instrument music control device with multi-axis position sensors
An electric instrument music control device is provided having at least two multi-axis position sensors. One sensor is a reference multi-axis position sensor retained in a fixed position the reference multi-axis position sensor having at least one axis held in a fixed position. Another sensor is a moveable multi-axis position sensor rotatable about at least one axis corresponding to the at least one axis of the reference multi-axis position sensor, wherein the moveable multi-axis position sensor is in communication with the reference multi-axis position sensor. The device may include a processor that processes the differentiation between the angular position of the at least one axis of the reference multi-axis position sensor and the at least one axis of the moveable multi-axis position sensor, wherein the angular differentiation correlates to a music effect of an electric instrument. |
| US07923620B2 |
Practice mode for multiple musical parts
Described are methods, systems, and apparatuses, including computer program products, that provide a practice mode for multiple musical parts in a rhythm-action game. In one aspect this is accomplished by displaying, on a display in communication with a game platform, a first and second target musical data associated with a musical composition. The game platform receives a selection by the user of the first target musical data to be performed and produces an audio output associated with the first and second target musical data. The game platform also produces a synthesized tone associated with the first target musical data. In some versions, the target music data that is not selected is dimmed and made less visible. |
| US07923619B2 |
Keyboard device
A plurality of keys are supported at a key support parts such that the respective keys are pivoted by a key-pressing operation of a player in a vertical direction, the keys being arranged in parallel to each other along a width direction of the keyboard device. A plurality of hammers are arranged in parallel to each other along the width direction such that the hammers correspond to the respective keys. The hammers are operatively connected to the corresponding keys to rotate about the respective hammer support parts, the hammers applying inertia to pivoting movements of the corresponding keys. A frame has an opening portion open at a front area which faces the player, and located more frontward than the hammer support parts, and the frame is constructed such that the hammer support parts are located between an upper limit position and a lower limit position of the opening portion in the vertical direction, and the hammers can be inserted into the frame through the opening portion from the front area when the hammers are mounted to the respective hammer support parts. |
| US07923616B2 |
Stringed instrument for producing precise rhythmic strumming
The present invention is a stringed instrument for producing rapid tempo and more precise rhythmic strumming. The shape of the strumming apparatus allows simultaneous contact of two or more strings from a plurality of strings, and thereby allows chords to be more efficiently produced. In combination with the strumming apparatus, the present invention includes an instrument body with recessed components on the front surface of the instrument body. Combining the strumming apparatus and an instrument body as in the present invention allows a user to achieve greater rhythmic precision and a faster tempo vis-à-vis faster paced strumming of the strings. |
| US07923615B2 |
Catalyst system for a multi-walled carbon nanotube production process
The present invention relates to a catalyst system for the selective conversion of hydrocarbons into multi-walled carbon nanotubes and hydrogen comprising a compound of the formula: (Ni,Co)FeyOz(Al2O3)w wherein ‘y’ represents the molar fraction of Fe relative to Co and Ni and wherein 0.11≦y≦9.0, 1.12≦z≦14.5, and 1.5≦w≦64. |
| US07923613B1 |
Maize variety X6K217
A novel maize variety designated X6K217 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing maize variety X6K217 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X6K217 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X6K217, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X6K217. This invention further relates to methods for producing maize varieties derived from maize variety X6K217 and to the maize varieties derived by the use of those methods. |
| US07923605B1 |
Soybean variety XB39V08
According to the invention, there is provided a novel soybean variety designated XB39V08. This invention thus relates to the seeds of soybean variety XB39V08, to the plants of soybean XB39V08 to plant parts of soybean variety XB39V08 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB39V08 with another soybean plant, using XB39V08 as either the male or the female parent. |
| US07923603B1 |
Soybean variety XB13W08
According to the invention, there is provided a novel soybean variety designated XB13W08. This invention thus relates to the seeds of soybean variety XB13W08, to the plants of soybean XB13W08 to plant parts of soybean variety XB13W08 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB13W08 with another soybean plant, using XB13W08 as either the male or the female parent. |
| US07923593B2 |
Process for producing a middle distillate
A process for producing a middle distillate or a middle distillate blending component, comprising contacting a feed comprising an olefin, an isoparaffin, and less than 5 wt % oligomerized olefin, in an ionic liquid alkylation zone with an acidic haloaluminate ionic liquid, at alkylation conditions; and recovering an effluent comprising an alkylated product that has greater than 35 vol % C10+ and less than 1 vol % C55+. Also processes for producing a middle distillate by alkylating isobutane and butene in the presence of defined chloroaluminate ionic liquid catalysts, wherein a separating step separates the middle distillate and wherein the middle distillate is from 20 wt % or higher of the total alkylate product. Also a process for producing middle distillate with FC cracker feed comprising olefins. A separated middle distillate has greater than 30 vol % C10+, less than 1 vol % C55+, and a cloud point less than −50° C. |
| US07923590B2 |
Production of alkylaromatic compounds
A process for producing a monoalkylation aromatic product, such as ethylbenzene and cumene, utilizing an alkylation reactor zone and a transalkylation zone in series or a combined alkylation and transalkylation reactor zone. This process requires significantly less total aromatics distillation and recycle as compared to the prior art. |
| US07923588B2 |
Process for preparing a C4-olefin mixture by selective hydrogenation and metathesis process for using this stream
A C4-olefin mixture having a 1,3-butadiene content of from 100 to 500 ppm and a content of 1,2-dienes of less than 10 ppm is described. The present invention further provides a process for preparing this C4-olefin mixture and provides for its use in a metathesis reaction for preparing 2-pentene and/or 3-hexene. |
| US07923579B2 |
Tricyclic hydroxamate and benzamide derivatives, compositions and methods
The present invention relates to compounds and methods for inhibiting histone deacetylase enzymatic activity. The present invention also pertains to pharmaceutical compositions comprising such compounds, and the use of such compounds and compositions, both in vitro and in vivo, to inhibit histone deacetylases (IIDACs), and in the treatment of conditions mediated by HDAC, cancer, proliferative conditions, psoriasis, and also central nervous system diseases. It further deals with processes for preparing said compounds. |
| US07923578B2 |
Method of manufacturing 3-(4-hydroxyphenyl)propanoic acid amide, its application in the manufacture of anti-aging compositions and anti-aging composition
The subjects of the present invention are a method of manufacturing 3-(4-hydroxyphenyl)propanoic acid amide, its application in the manufacture of anti-aging compositions and an anti-aging composition. As phloretamide possesses a series of biological properties it might be use as a composition for skin having excellent anti-aging effect to prevent the sagging of skin and loss of luster. |
| US07923577B2 |
Menthylcarboxamides and their use as cooling agents
Described is a new cooling agent represented by Structure I and compositions with known coolers having cooling properties and the application of Structure I in foodstuffs and chewing gum: |
| US07923576B2 |
Multifunctional linker molecules for tuning electronic charge transport through organic-inorganic composite structures and uses thereof
The invention relates to tuned multifunctional linker molecules for charge transport through organic-inorganic composite structures. The problem underlying the present invention is to provide multifunctional linker molecules for tuning the conductivity in nanoparticle-linker assemblies which can be used in the formation of electronic networks and circuits and thin films of nanoparticles. The problem is solved according to the invention by providing a multifunctional linker molecule of the general structure CON1-FUNC1-X-FUNC2-CON2 in which X is the central body of the molecule, FUNC1 and FUNC2 independently of each other are molecular groups introducing a dipole moment and/or capable of forming intermolecular and/or intramolecular hydrogen bonding networks, and CON1 and CON2 independently of each other are molecular groups binding to nanostructured units comprising metal and semiconductor materials. |
| US07923575B2 |
Asymmetric synthesis of (S)-(+)-3-(aminomethyl)-5-methylhexanoic acid
The invention encompasses processes for the synthesis of (S)-(+)-3-(aminomethyl)-5-methylhexanoic acid, (S)-Pregabalin, and intermediates of (S)-Pregabalin. |
| US07923574B2 |
Prepolymers
The invention relates to novel prepolymers which are accessible from the formamides of oligomeric di- or polyamines (formamide-terminated oligomers) and di- or polyisocyanates. |
| US07923571B2 |
Process for preparing substituted 2-alkoxycarbonyl-3-aminothiophenes
The present invention relates to a process for preparing 4-alkoxycarbonyl-3-aminothiophenes of the general formula (I) and/or their hydrochlorides of the formula (I)′ in which R1 and R2 are each as defined in the description, and/or their mono- or bisacetylated or mono- or bisformylated form, by reacting enamines of the formula (II) in which R1 and R2 are each as defined in the description, and/or their mono- or bisacetylated or mono- or bisformylated form, with a chlorinating agent in the presence of one or more diluents, and also to a process for preparing the compounds of the formula (II). |
| US07923555B2 |
Fused bicyclic mTor inhibitors
Compounds represented by Formula (I) or a pharmaceutically acceptable salt thereof, are inhibitors of mTOR and useful in the treatment of cancer. |
| US07923552B2 |
High yield method of producing pure rebaudioside A
The invention provides a high throughput, high purity, high yield system and method of isolating and purifying rebaudioside A (“Reb A”), with acceptable water solubility for all commercial uses, from commercially available Stevia rebaudiana starting material. The invention also provides a means of maximizing yields of 99+% purity Reb A based on the attributes of a given batch of Stevia starting material. The Reb A produced by the invention is water soluble, devoid of bitterness heretofore associated with rebaudioside sweeteners, non-caloric, and suitable for use as a reagent and as an ingredient in orally consumed products, e.g., as a sweetener, flavor enhancer, and flavor modifier. |
| US07923550B2 |
Reagent compounds and methods of making and using the same
The present invention describes novel compounds and methods for capping reactive groups on support and during multistep synthesis. These new capping reagents are also useful for high quality synthesis on solid supports and surfaces used as microarrays, biosensors, or in general as biochips. The compounds are also useful for controlling surface density of reactive groups on a support. The compounds may also be used to modify the hydrophilic/hydrophobic characteristics of a surface or a molecule. The compounds have functional utility in various applications in the fields of genomics, proteomics, diagnostics and medicine. |
| US07923547B2 |
RNA interference mediated inhibition of gene expression using chemically modified short interfering nucleic acid (siNA)
The present invention concerns methods and reagents useful in modulating gene expression in a variety of applications, including use in therapeutic, diagnostic, target validation, and genomic discovery applications. Specifically, the invention relates to synthetic chemically modified small nucleic acid molecules, such as short interfering nucleic acid (siNA), short interfering RNA (siRNA), double-stranded RNA (dsRNA), micro-RNA (miRNA), and short hairpin RNA (shRNA) molecules capable of mediating RNA interference (RNAi) against target nucleic acid sequences. The small nucleic acid molecules are useful in the treatment of any disease or condition that responds to modulation of gene expression or activity in a cell, tissue, or organism. |
| US07923544B2 |
Biomarkers for inflammatory bowel disease and irritable bowel syndrome
The present invention provides compositions and their use in diagnosing and/or distinguishing inflammatory bowel disease and irritable bowel syndrome. |
| US07923542B2 |
Libraries of regulatory sequences, methods of making and using same
Methods and compositions for the identification, isolation and characterization of regulatory DNA sequences in a cell of interest are provided. In particular, libraries of regulatory sequences are provided, in which each member of the library comprises a polynucleotide comprising sequences from an accessible region of cellular chromatin. |
| US07923541B2 |
High-purity rebaudioside A and method of extracting same
A process for recovering Rebaudioside A from Stevia rebaudiana Bertoni plants is provided and includes the steps of sequentially extracting plant material with a first solvent to obtain a first extract, filtering the first extract and passing the first extract through a polar resin to obtain a filtrate, and purifying the filtrate to obtain a crystalline-containing material. With further purification, a product containing over 99% Rebaudioside A is obtained. The present invention is also directed toward a method of purifying stevia glycosides to obtain purified Rebaudioside A. In one embodiment, the method includes silica gel column chromatography using an solvent comprising ethyl acetate and ethanol. |
| US07923540B2 |
2-[[1-[[(2,3-dihydro-2-oxo-1H-benzimidazol-5-yl)amino]carbonyl]-2-oxopropyl]azo]-benzoic acid and a process for its preparation
The present invention is directed to 2-[[1-[[(2,3-dihydro-2-oxo-1H-benzimidazol-5-yl)amino]carbonyl]-2-oxo-propyl]azo]-benzoic acid (C.I. Pigment Yellow 151): (I), characterized by a ΔE* (black/white) in masstone below 22.0±0.7, a process for its preparation and its use for pigmenting macromolecular organic materials of natural or synthetic origin. The pigment has high opacity and high color strength. |
| US07923536B2 |
Compositions and methods of delivery of pharmacological agents
The present invention relates to a pharmaceutical composition comprising a pharmaceutical agent and a pharmaceutically acceptable carrier, which carrier comprises a protein, for example, human serum albumin and/or deferoxamine. The human serum albumin is present in an amount effective to reduce one or more side effects associated with administration of the pharmaceutical composition. The invention also provides methods for reducing one or more side effects of administration of the pharmaceutical composition, methods for inhibiting microbial growth and oxidation in the pharmaceutical composition, and methods for enhancing transport and binding of a pharmaceutical agent to a cell. |
| US07923533B2 |
Methods for arbitrary peptide synthesis
Methods, apparatus, systems, computer programs and computing devices related to biologically assembling and/or synthesizing peptides and/or proteins are disclosed. |
| US07923530B2 |
Electrochromic polymer material
Provided are (1) a terpyridine monomer that has a strong ability to coordinate with metal atoms, and (2) a polymer material that can be readily switched between a colored state and a colorless state by controlling the electrical potential applied to it and that can be processed.A bis-terpyridine monomer of a first invention comprises a first terpyridyl substituent (A), a second terpyridyl substituent (B), and a spacer that contains at least one benzene ring and links the substituents (A) and (B).A polymer material of a second invention comprises a bis-terpyridine derivative derived from the monomer according to the first invention, a metal ion and a counter anion, or comprise first to Nth bis-terpyridine derivatives (N is an integer of 2 or greater), first to Nth metal ions (N is an integer of 2 or greater) and first to Nth counter anions (N is an integer of 2 or greater). |
| US07923526B2 |
Sulfopolyesters having improved clarity in water-dispersible formulations and products made therefrom
A sulfopolyester comprising repeat residue units from the reaction product dimethyl-5-sodiosulfoisophthalate, isophthalic acid, 1,4-cyclohexanedimethanol and diethylene glycol, has at least one property selected from: a) an acidity of greater than 0.030 measured as milliequivalents H+/gram of sulfopolyester; b) a titanium concentration, measured as metal, of less than about 27 ppm, based on the amount of sulfopolyester; or c) an acidity of greater than 0.010 measured as milliequivalents H+/gram of sulfopolyester, a pH of less than 6.0 and a concentration of a base compound of less than 0.0335 moles/kg of sulfopolyester.A method for making the water-dispersible or water-dissipative sulfopolyester of the present invention is disclosed.Aqueous dispersion having from 0.001 to about 35 weight % of the sulfopolyester of the present invention is also disclosed.The sulfopolyester is useful in making hair spray formulations suitable for pump or aerosol spray applicators. |
| US07923525B2 |
Polyester resin and fabrication method thereof
A polyester resin and a fabrication method thereof are provided. The fabrication method includes providing a diphenol monomer and a diacid monomer. The diphenol monomer is acetylated and then melt pre-polymerized with diacid monomer to form a pre-polymer. Then, the pre-polymer is polymerized by solid state polymerization to form a heat-resistant and transparent polyester resin. |
| US07923524B2 |
Silicone copolymer having condensed polycyclic hydrocarbon group
Provided is a novel silicone copolymer which exhibits high absorption even in a far-ultraviolet region of 200 nm or more, and also is soluble in an alkaline reagent since it has a phenolic hydroxyl group. The silicone copolymer comprises a silsesquioxane having a phenol unit and comprises a silsesquioxane having a condensed polycyclic hydrocarbon. |
| US07923521B2 |
Process for preparing ortho-metallated metal compounds
The present invention describes a process for the preparation of homoleptic and heteroleptic tris-ortho-metallated metal compounds which are used as coloring components as functional materials in a number of different applications which can be ascribed to the electronics industry in the broadest sense. |
| US07923518B2 |
Nitrile rubbers
The present application provides novel nitrile rubbers comprising repeating units of at least one α,β-unsaturated nitrile, at least one conjugated diene and optionally one or more further copolymerizable monomers which nitrile rubbers are distinguished by a specific calcium content as well as a specific chlorine content and dispose of specific thio end groups. Additionally, an improved polymerization and work-up process is provided to produce the aforementioned nitrile rubbers. |
| US07923513B2 |
Coating compositions and methods
The present invention provides coating compositions that include substantially non-irritating ethylenically unsaturated compounds and have one or more of the following properties: high performance, low VOC levels, substantially no formaldehyde content, and low irritation levels. |
| US07923509B2 |
Drug delivery compositions and medical devices containing block copolymer
A composition for delivery of a therapeutic agent is provided. The composition comprises: (a) a biocompatible block copolymer comprising one or more elastomeric blocks and one or more thermoplastic blocks and (b) a therapeutic agent, wherein the block copolymer is loaded with the therapeutic agent. The block copolymer is preferably of the formula X-(AB)n, where A is an elastomeric block, B is a thermoplastic block, n is a positive whole number and X is a seed molecule. The elastomeric blocks are preferably polyolefin blocks, and the thermoplastic blocks are preferably selected from vinyl aromatic blocks and methacrylate blocks. According to another aspect of the invention, a medical device is provided, at least a portion of which is insertable or implantable into the body of a patient. The medical device comprises (a) the above biocompatible block copolymer and (b) a therapeutic agent, wherein the block copolymer is loaded with the therapeutic agent. According to another aspect of the present invention, a method of treatment is provided in which the above device is implanted or inserted into a patient, resulting in the release of therapeutic agent in the patient over an extended period. According to yet another aspect of the invention, a coated medical device is provided which comprises: (a) an intravascular or intervascular medical device and (b) a coating over at least a portion of the intravascular or intervascular a medical device, wherein the coating comprises the above biocompatible block copolymer. |
| US07923507B2 |
Polyorganosiloxane—containing compositions
A polyorganosiloxane-containing composition which comprises a cationic emulsion of a polyorganosiloxane and a surface-modified colloidal silica component having a zeta potential greater than zero. This composition optionally contains a silicone-curing catalyst. |
| US07923505B2 |
High-viscosity elastomeric adhesive composition
High-viscosity elastomeric adhesive compositions including a high softening point tackifier resin in combination with a base polymer can be used to create elastomeric composite laminates having effective adhesion and elastic properties. The elastomeric adhesive compositions suitably have a viscosity between about 100,000 and about 500,000 cps at between about 300 degrees Fahrenheit (149 degrees Celsius) and about 350 degrees Fahrenheit (177 degrees Celsius). Facing layers, such as nonwoven webs, films, elastic strands, fastening material, absorbent material, and the like, can be laminated to one or both surfaces of the elastomeric compositions to form elastomeric composite laminates. A method of making such compositions and laminates involves forming the compositions into elastomeric adhesive films and/or strands. |
| US07923504B2 |
Thermoplastic compound/matrix
Thermoplastic matrix/compound, comprising thermoplastic polymer and silanised, structurally modified, pyrogenically produced silica. |
| US07923501B2 |
Polypropylene resin composition, resin molded part and production method thereof
A polypropylene resin composition contains 2 to 15 wt % of a moldability improver (A) and 85 to 98 wt % of a polypropylene resin (B). The moldability improver (A) is formed of propylene block copolymers (A-1) and (A-2). Each of the propylene block copolymers (A-1) and (A-2) has a crystalline propylene polymer component (A-11), (A-21) and a propylene-ethylene random copolymer component (A-12), (A-22). The propylene block copolymer (A-1) is characterized in that the melt flow rate of the crystalline propylene polymer component (A-11) is high, whereas the propylene block copolymer (A-2) is characterized in that the content ratio of the propylene-ethylene random copolymer component (A-22) is high. The polypropylene resin (B) is formed of a propylene-ethylene block copolymer (B-1), at least one of an ethylene elastomer and a styrene elastomer (B-2) and an inorganic filler (B-3). |
| US07923493B2 |
Rubber composition
A rubber composition containing 100 parts by weight of a diene-based rubber, 20 to 120 parts by weight of silica, a sulfur-containing silane coupling agent of 3 to 15% by weight, based upon the weight of the silica and a tertiary amine compound having the formula (I): wherein, R1 indicates a carbon atom or nitrogen atom and, when R1 is a carbon atom, R2 indicates a hydrogen atom or hydroxyl group and having a pKa value of 6.5 to 13. |
| US07923484B2 |
Process for polymerisation of diethylene glycol bis allyl carbonate
A process for polymerization of diethylene glycol bis allyl carbonate which may advantageously be employed for producing plastic lenses having a low refractive index comprising in the step of subjecting diethylene glycol bis allyl carbonate to the step of gamma radiation in the presence of diiso propyl peroxydicarbonate as a catalyst. |
| US07923482B2 |
Ultraviolet-curable resin composition, ultraviolet-curable coating and coated article
The present invention is to provides an ultraviolet-curable resin composition which contains a composite resin (A) having a polysiloxane segment (a1) having a silanol group and/or a hydrolytic silyl group as well as a polymerizable double bond and a polymer segment (a2) other than the polysiloxane segment (a1), and a photo initiator (B). The ultraviolet-curable resin composition is able to form a cured coating film excellent in weatherability such as scratch resistance, acid resistance, alkali resistance and solvent resistance, without heating. |
| US07923481B2 |
Radiation curable composition and method for producing the same
The present invention relates to a composition which is curable by radiation such as an ultraviolet ray or an electron beam. Specifically, the present invention relates to a curable composition which is useful for coatings and inks. The present invention provides a radiation curable composition that is highly cationically polymerizable and highly adhesive to substrates. A radiation curable composition of the present invention includes, as essential ingredients, a cationically polymerizable compound (a) represented by the following general formula 1 (wherein, R represents an alkyl group of 1 to 10 carbon atoms, R1 represents a hydrogen atom or a methyl group, n represents a number from 1 to 4, and m represents a number from 0 to 10); a cationic photoinitiator (b); and water (c). |
| US07923470B2 |
Benzooxazoles as orexin antagonists
The present invention is concerned with novel sulfonamides of formula I wherein R1, R2, Ar, Hetaryl, m and n are as described in the description and claims. The compounds are orexin receptor antagonists, useful in the treatment of disorders, in which orexin pathways are involved. |
| US07923468B2 |
1,4-benzothiepin-1,1-dioxide derivatives which are substituted with cyclohexyl groups, method for producing the same, drugs containing said compounds and use thereof
This invention relates to Novel 1,4-benzothiepin-1,1-dioxide derivatives which are substituted with cyclohexyl groups, method for producing the same, drugs containing said compounds and use thereof. |
| US07923466B2 |
3-substituted-5- and 6-aminoalkyl indole-2-carboxylic acid amides and related analogs as inhibitors of casein kinase I
Methods for the treatment of a patient suffering from a disease or disorder ameliorated by inhibition of casein kinase Iε activity comprising the administration of a compounds of formula (I) and formula (II) as inhibitors of human casein kinase Iε, and methods of using the compounds of formula (I) and formula (II) for treating central nervous system diseases and disorders including mood disorders and sleep disorders. The R-group substituents are defined herein and pharmaceutical compositions comprising compounds of formula (I) or formula (II) useful in the claimed methods of treatment are also disclosed. |
| US07923461B2 |
TNF-α production inhibitors
A compound having the following formula wherein A is —O—; B is alkylene or alkenylene optionally containing —O—, —S—, —(NR7)—, —CO— or —N═; R1 and R2 are alkyl, alkenyl, alkynyl, cycloalkyl or cycloalkenyl, wherein the alkyl, alkenyl, alkynyl, cycloalkyl or cycloalkenyl is unsubstituted or substituted by halogen, cycloalkyl, aryl, adamantyl or amino; R3 is a substituted or unsubstituted pyridine ring; R5 and R6 are hydrogen or alkyl; R7 is hydrogen or alkyl; X is O or S; and each hydrogen of the said amino is unsubstituted or substituted by alkyl, alkoxycarbonyl, cycloalkyloxycarbonyl, arylalkoxycarbonyl or halogenoalkyloxycarbonyl. The compound is a TNF-α production inhibitor that is useful for treating autoimmune diseases such as rheumatoid arthritis. |
| US07923456B2 |
5-anilinoimidazo[1,5-a]-pyridines inhibitors of MEK kinase
The invention relates to imidazopyridines of formula I with anti-cancer and/or anti-inflammatory activity and more specifically to imidazopyridines which inhibit MEK kinase activity. The invention provides compositions and methods useful for inhibiting abnormal cell growth or treating a hyperproliferative disorder, or treating an inflammatory disease in a mammal. The invention also relates to methods of using the compounds for in vitro, in situ, and in vivo diagnosis or treatment of mammalian cells, or associated pathological conditions. |
| US07923454B2 |
Opioid and opioid-like compounds and uses thereof
The present invention relates to opioid and opioid-like compounds, and pharmaceutical formulations containing the same and methods of use thereof. Uses of the present invention include, but are not limited to, use for the prevention and treatment of septic shock and other disorders. The compounds described herein can be water soluble and can act through mechanisms mediated through pathways other than opiate receptors. |
| US07923453B1 |
Methods of converting a patient's treatment regimen from intravenous administration of an opioid to oral co-administration of morphine and oxycodone using a dosing algorithm to provide analgesia
A method of converting a treatment for pain comprising intravenous administration of opioids, to a treatment for pain comprising oral administration of a first dose of an immediate release morphine-oxycodone combination in patients in need of analgesia. The method may comprise (1) determining a four-hour average oral morphine equivalents or determining a net average hourly intravenous dose, and (2) orally administering to the patient a first dose of a morphine-oxycodone combination in a 3:2 ratio by weight every four to six hours. Also, a method of treating pain in patients who had been administered opioids intravenously, comprising using a dosing algorithm to determine the first dose of the immediate release morphine-oxycodone combination. |
| US07923448B2 |
Purine receptor inhibition as a therapeutic strategy in spinal cord and brain
The present invention is directed to a method of treating a subject with acute spinal cord injury by administering a purine receptor antagonist to the subject under conditions effective to treat spinal cord injury. The purine receptor antagonist inhibits P2X purine receptor activation. The inhibition of P2X purine receptor activation can also be used in conjunction with methods of treating a subject with spinal cord ischemia resulting from stroke or vascular insult, interruption, or mechanical injury, treating a subject with ischemic or traumatic insults of brain tissue in regions expressing P2X receptors, and for inhibiting ATP-triggered brain or spinal cord cell death. |
| US07923447B2 |
Parenteral solutions containing metolazone
Disclosed herein are parenteral solutions containing 7-halo-1,2,3,4-tetrahydro-3-aryl-6-quinazoline sulfonamide in N,N-dimethylactamide, polyethylene glycol and D5W useful in the treatment of hypertension, heart failure and renal disease leading to edematous states. Also disclosed are methods for preparing such solutions. |
| US07923439B2 |
Hydroxamate compositions
The present disclosure provides compositions including a first component including at least one phospholipid possessing at least one vinyl group, a second component including a furanone possessing vinyl and/or acrylate groups, and a third component including a hydroxamate. Compositions, medical devices, and coatings including copolymers and blends of the foregoing components are also provided. |
| US07923438B2 |
Use of cyclipostin derivatives for the treatment of mycobacterial infectious diseases
The invention relates to the use of a compound of the formula (I) for the treatment of bacterial infections caused by mycobacteria, nocardia or corynebacteria, wherein E is phosphorus; X1, X2 and X3 are oxygen; and R1 and R2 are as defined in the specification. |
| US07923430B2 |
Methods for producing modified glycoproteins
Cell lines having genetically modified glycosylation pathways that allow them to carry out a sequence of enzymatic reactions, which mimic the processing of glycoproteins in humans, have been developed. The lower eukaryotes, which ordinarily produce high-mannose containing N-glycans, including unicellular and multicellular fungi are modified to produce N-glycans such as Man5GlcNAc2 or other structures along human glycosylation pathways. This is achieved using a combination of engineering and/or selection of strains which: do not express certain enzymes which create the undesirable complex structures characteristic of the fungal glycoproteins, which express exogenous enzymes selected either to have optimal activity under the conditions present in the fungi where activity is desired, or which are targeted to an organelle where optimal activity is achieved, and combinations thereof wherein the genetically engineered eukaryote expresses multiple exogenous enzymes required to produce “human-like” glycoproteins. |
| US07923429B2 |
Treatment for CD5+ B cell lymphoma
The present invention provides methods for increasing expression of cell surface molecules of CD5+ B cell lymphoma cells by contacting cells with immune response modifiers. The invention also provides methods for the treatment of CD5+ B cell lymphomas, including chronic lymphocytic leukemia and small lymphocytic lymphoma, by administering immune response modifier compounds to a subject in need of such treatment. Suitable immune response modifier compounds include agonists of TLR7 and/or TLR8. |
| US07923420B2 |
Lubricating oil composition
A lubricating oil composition having a total base number of more than 15 mg KOH/g including oil of lubricating viscosity; detergent; and at least one compound of the formula (I) and/or formula (II): wherein Ar and Ar′ represent substituted or unsubstituted aromatic moieties; L and L′ are linking moieties; each Y is independently —ORI″or H(O(CR12)n)yX—, wherein X is (CR1′2)z, O or S; R1 and R1′ are H, alkyl or aryl; R1″ is alkyl or aryl; each Y′ is independently Z(O(CR22)n′)y′X′—, wherein X′ is (CR2′2)z′, O or S; R2 and R2′ are H, alkyl or aryl; Z is H, acyl, alkyl or aryl; z and z′ are 1 to 10; n is 0 to 10 when X is (CR1′2)z and 2 to 10 when X is O or S; n′ is 0 to 10 when X′ is (CR2′2)z′, and 2 to 10 when X′ is O or S; y and y′ are 1 to 30; a and a′ are 0 to 3; and m and m′ are 1 to 100, with the proviso that in compounds of formula (I), at least one Ar moiety bears at least one group Y and that in compounds of formula (II), at least one Ar′ moiety bears at least one group Y′ in wherein Z is not H. |
| US07923419B2 |
Methods and compositions for thermal insulation
Unwanted heat loss from production tubing or uncontrolled heat transfer to outer annuli is inhibited by introduction into the annuli a thermal insulating packer fluid or a riser fluid containing a zwitterionic surfactant, an alcohol and a brine. The viscosity of the composition is sufficient to reduce the convection flow velocity within the annulus. The invention has particular applicability with high density brines. |
| US07923415B2 |
Methods to reduce settling rate of solids in a treatment fluid
The invention discloses a method of treating a subterranean formation of a well bore: providing a treatment fluid made of: a fluid; a particulate material, and a viscosifier material; wherein the viscosifier material is inactive in a first state and is able to increase viscosity of the treatment fluid when in a second state; introducing the treatment fluid into the wellbore; and providing a trigger able to activate the viscosifier material from first state to second state. |
| US07923413B2 |
Lost circulation material for oilfield use
A composition for reducing lost circulation in a well, while drilling the well with a drilling mud, which is composed of a base fluid, a mixture of particles, and a blend of fibers. The composition is used by stopping drilling with the mud, injecting a spacer, injecting the water-based composition, injecting a spacer, and resuming drilling with the oil-based mud. |
| US07923409B2 |
Catalyst for hydrogen generation through steam reforming of hydrocarbons
A catalyst that can be used for the production of hydrogen from hydrocarbon fuels in steam reforming processes contains an active metal of, e.g., at least one of Ir, Pt and Pd, on a catalyst support of, e.g., at least one of monoclinic zirconia and an alkaline-earth metal hexaaluminate. The catalyst exhibits improved activity, stability in both air and reducing atmospheres, and sulfur tolerance. |
| US07923406B2 |
Support for fuel reforming catalyst with excellent heat and mass transfer characteristics and method of preparing the same
A support for a fuel reforming catalyst includes aluminum (Al); and aluminum oxide (Al2O3) encapsulating the aluminum, wherein a total volume of micropores and mesopores is in the range of 0.1 to 1.0 ml/g per unit mass, and a volume of macropores is in the range of 0.4 to 1.2 ml/g per unit mass, and a method of preparing the same. The support has excellent heat transfer characteristics due to its high thermal conductivity and excellent mass transfer characteristics because the micropores, mesopores, and macropores exist in a proper ratio. Accordingly, if the support is used for a supported catalyst that is used in a reaction, in which the reaction rate is controlled by heat transfer and mass transfer, such as a fuel reforming reaction, the activity of the catalyst is enhanced. In addition, the support can be easily formed as desired due to its high mechanical strength. |
| US07923403B2 |
Method for preparing catalysts supported on carbon nanotubes networks
A new method for preparing a supported catalyst is herein provided. The supported catalyst comprises a carbon nanotube network structure containing metal catalysts. The metal catalyst may be loaded onto functionalized carbon nanotubes before forming the carbon nanotube network structure. Alternatively, the metal catalyst may be loaded onto the carbon nanotube network structures themselves. |
| US07923402B1 |
Metal alloy for electrochemical oxidation reactions and method of production thereof
A method of producing a finely divided ruthenium-platinum alloy catalyst comprising: (i) forming a mixture of platinum β-diketone and ruthenium β-diketone on a carbon support, (ii) both, platinum β-diketone and ruthenium β-diketone having a decomposition temperature within 20° C. of each other, (iii) decomposing said platinum β-diketone and ruthenium β-diketone on a carbon support at a temperature of at least 260° C. in the absence of a reducing agent (iv) followed by a reduction effected with a hydrogen containing gas mixture and a method from oxidizing methanol. |
| US07923398B2 |
Preparation of a porous composite material based on EU-1 zeolite and its implementation in the isomerization of C8 aromatics
A preparation process is described for a porous composite material formed from an amorphous core based on at least one silicon oxide on which crystals of EU-1 zeolite are dispersed, said process comprising 1) the impregnation of a solid comprising a silicon oxide and an aluminum oxide with an aqueous solution comprising a hexamethonium cation, 2) the hydrothermal treatment, implemented in an autoclave of volume V (ml) under steam and at a temperature T comprised between 120 and 220° C., of said solid from stage 1), the quantity of water introduced beforehand into said autoclave being strictly greater than a volumetric quantity equal to V*[23.48*10−10*T3−48*10−8*T2+5*10−5*T−0.002] and less than or equal to 0.25*V, and is such that said solid is not in direct contact with it, 3) the drying then calcination of the solid from stage 2). The preparation a catalyst from said material for its use in the isomerization of C8 aromatics is also described. |
| US07923396B2 |
Hydrocarbon conversion
A catalyst comprising at least one metal selected from the group consisting of Group 8 metals, Group 9 metals, Group 10 metals and combinations thereof, an organic compound, and a solid acid and a method of making said catalyst is disclosed. The catalyst can be used in a hydrocarbon conversion process. |
| US07923394B2 |
Titania-doped quartz glass for nanoimprint molds
In the nanoimprint lithography, titania-doped quartz glass having an internal transmittance distribution of up to 10% at wavelength 365 nm is suited for use as nanoimprint molds. |
| US07923387B2 |
Floor covering with double rollable reinforcement
A floor covering having a double rollable reinforcement, of the type comprising on the front a calendered sheet of predefined thickness, a first reinforcement, a layer of foam and a second reinforcement, made from polyester material comprising a grid and a non-woven layer on the back, is characterized in that the first reinforcement comprises a single glass grid. |
| US07923382B2 |
Method for forming roughened surface
Methods of forming a roughened metal surface on a substrate are provided, along with structures comprising such roughened surfaces. In preferred embodiments roughened surfaces are formed by selectively depositing metal or metal oxide on a substrate surface to form discrete, three-dimensional islands. Selective deposition may be obtained, for example, by modifying process conditions to cause metal agglomeration or by treating the substrate surface to provide a limited number of discontinuous reactive sites. The roughened metal surface may be used, for example, in the manufacture of integrated circuits. |
| US07923376B1 |
Method of reducing defects in PECVD TEOS films
The present invention provides high deposition rate PECVD methods for depositing TEOS films. The methods significantly reduce the number of particles in the TEOS films, thereby eliminating or minimizing defects. According to various embodiments, the methods involve adding a relatively small amount of helium gas to the process gas. The addition of helium significantly reduces the number of defects in the film, particularly for high deposition rate processes. |
| US07923375B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes forming a photo-resist pattern above a first film, implanting a predetermined dopant that increases an etching rate of the first film into the first film using the photo-resist pattern as a mask, thereby forming an implantation layer in the first film, and etching a first portion of the first film, which is at least a part of the implantation layer, using the photo-resist pattern as a mask. |
| US07923371B2 |
Method of manufacturing semiconductor device having contact plugs
A semiconductor device has a semiconductor substrate in which a plurality of device regions and a plurality of device isolation regions are alternately formed to extend in a first direction; and a plurality of contact plugs formed on the semiconductor substrate, connected to the device regions and arranged on the semiconductor substrate in a zigzag pattern in a second direction perpendicular to the first direction, wherein the contact plugs have a rectangular cross section. |
| US07923367B2 |
Multilayer wiring substrate mounted with electronic component and method for manufacturing the same
A multilayer wiring substrate mounted with an electronic component includes an electronic component, a core material layer having a first opening for accommodating the electronic component, a resin layer which is formed on one surface of the core material layer and which has a second opening greater than the first opening, a supporting layer which is formed on the other surface of the core material layer and which supports the electronic component, a plurality of connection conductor sections which are provided around the first opening and within the second opening on the one surface of the core material layer, bonding wires for electrically connecting the electronic component to the connection conductor sections, and a sealing resin filled into the first and second openings in order to seal the electronic component and the bonding wires. |
| US07923362B2 |
Method for manufacturing a metal-semiconductor contact in semiconductor components
A method for manufacturing a metal-semiconductor contact in semiconductor Components is disclosed. There is a relatively high risk of contamination in the course of metal depositions in prior-art methods. In the disclosed method, the actual metal -semiconductor or Schottky contact is produced only after the application of a protective layer system, as a result of which it is possible to use any metals, particularly platinum, without the risk of contamination. |
| US07923353B2 |
Gettering method and a wafer using the same
It is shown in the invention a method for manufacturing a semiconductor wafer structure with an active layer for impurity removal, which method comprises phases of depositing a first layer on a first wafer surface for providing an active layer, an optional phase of preparation for said first layer for next phase, growing thermal oxide layer on a second wafer, bonding said first and second wafers into a stack, annealing the stack for a crystalline formation in said thermal oxide layer as a second layer, and thinning said first wafer to a pre-determined thickness. The invention concerns also a wafer manufactured according to the method, chip that utilizes such a wafer structure and an electronic device utilizing such a chip. |
| US07923351B2 |
Manufacturing method of semiconductor devices
In a method of manufacturing semiconductor chips by dicing individual semiconductor devices from a semiconductor wafer, masks formed for plasma dicing in which a semiconductor wafer is divided by conducting plasma etching are removed by mechanical grinding using a grinding head. Accordingly, by removing the masks for plasma dicing using mechanical grinding, generation of reaction products is prevented when removing the masks, so that the dicing can be conducted without causing quality deterioration due to the accumulated particles. |
| US07923349B2 |
Wafer level surface passivation of stackable integrated circuit chips
An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board). |
| US07923348B2 |
Semiconductor device and manufacturing method thereof
It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFF, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof. |
| US07923346B2 |
Field effect transistor structure with an insulating layer at the junction
A method of making a FET includes forming a gate structure (18), then etching cavities on either side. A SiGe layer (22) is then deposited on the substrate (10) in the cavities, followed by an Si layer (24). A selective etch is then carried out to etch away the SiGe (22) except for a part of the layer under the gate structure (18), and oxide (28) is grown to fill the resulting gap. SiGe source and drains are then deposited in the cavities. The oxide (28) can reduce junction leakage current. |
| US07923345B2 |
Methods relating to trench-based support structures for semiconductor devices
A method of manufacturing a semiconductor device wherein a laminate structure comprising a sacrificial layer is sandwiched between two etch stop layers (8,11) and which separates a semiconductor membrane (9) from a bulk substrate (1) is used to provide an underetched structure. Access trenches (4) and support trenches (5) are formed in the layered structure through the thickness of the semiconductor layer (9) and through the upper etch stop layer (8). The support trenches extend deeper through the sacrificial layer (12) and the lower etch stop layer and are filled. The sacrificial layer is exposed and etched away selectively to the etch stop layers to form a cavity (30) and realise a semiconductor membrane which is attached to the bulk substrate via a vertical support structure comprising the filled support trenches. |
| US07923341B2 |
Higher selectivity, method for passivating short circuit current paths in semiconductor devices
A method for passivating short circuit defects in a thin film large area photovoltaic device in accordance with an exemplary embodiment is provided. The method employs a passivation agent and a counter electrode disposed in said passivation agent. The method includes controlling an application of current between the substrate of said photovoltaic device and said counter electrode so as to ensure high selectivity of modification of a transparent conductive oxide material of said photovoltaic module adjacent said short circuit defect, while leaving the transparent conductive oxide material of said photovoltaic module of non-defect areas in its unmodified form. |
| US07923332B2 |
Method for production of semiconductor device
A method for producing a semiconductor device, the method includes the steps of: forming a hard mask layer with a mask opening on a semiconductor substrate in which is formed a source region; forming a side wall mask on the side wall of the mask opening; forming a trench by using the side wall mask and the hard mask layer as a mask in such a way that the trench reaches the source region; removing the side wall mask; forming a gate electrode inside the mask opening and the trench, with a gate insulating film interposed thereunder; forming a side wall on the side wall of the gate electrode; and forming a drain region on the surface of the semiconductor substrate which is adjacent to the gate electrode. |
| US07923331B2 |
Method of fabricating recess channel transistor having locally thick dielectrics and related devices
Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate. |
| US07923330B2 |
Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes providing a semiconductor substrate including a first surface and a second surface which is arranged opposite to the first surface. The semiconductor substrate includes a plurality of trench structures extending from the first surface into the semiconductor substrate. The thickness of the semiconductor substrate is then reduced by removing semiconductor material at the second surface to obtain a processed second surface with exposed bottom portions of the trench structures. At least a first mask is formed on the processed second surface in a self-aligned manner with respect to the bottom portions of the trench structures, and doping regions are formed in the semiconductor substrate between the trench structures. |
| US07923329B2 |
Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes forming a spin-on-carbon (SOC) film that facilitates a low temperature baking process, can prevent collapse of vertical transistors while forming a bit line, thereby providing a more simple manufacturing method and improving manufacturing yields. |
| US07923326B2 |
Memory device and method for manufacturing the same
A split gate (flash) EEPROM cell and a method for manufacturing the same is disclosed, in which a control gate and a floating gate are formed in a vertical structure, to minimize a size of the cell, to obtain a high coupling ratio, and to lower a programming voltage. The split gate EEPROM cell includes a semiconductor substrate having a trench; a tunneling oxide layer at sidewalls of the trench; a floating gate, a dielectric layer and a control gate in sequence on the tunneling oxide layer; a buffer dielectric layer at sidewalls of the floating gate and the control gate; a source junction in the semiconductor substrate at the bottom surface of the trench; a source electrode in the trench between opposing buffer dielectric layers, electrically connected to the source junction; and a drain junction on the surface of the semiconductor substrate outside the trench. |
| US07923322B2 |
Method of forming a capacitor
A method of forming a capacitor includes forming a first capacitor electrode over a substrate. A substantially crystalline capacitor dielectric layer is formed over the first capacitor electrode. The substrate with the substantially crystalline capacitor dielectric layer is provided within a chemical vapor deposition reactor. Such substrate has an exposed substantially amorphous material. A gaseous precursor comprising silicon is fed to the chemical vapor deposition reactor under conditions effective to substantially selectively deposit polysilicon on the substantially crystalline capacitor dielectric layer relative to the exposed substantially amorphous material, and the polysilicon is formed into a second capacitor electrode. |
| US07923321B2 |
Method for gap filling in a gate last process
A method is provided for fabricating a semiconductor device that includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the substrate, forming a silicon layer over the high-k dielectric layer, forming a hard mask layer over the silicon layer, patterning the hard mask layer, silicon layer, and high-k dielectric layer to form first and second gate structures over the first and second regions, respectively, forming a contact etch stop layer (CESL) over the first and second gate structures, modifying a profile of the CESL by an etching process, forming an inter-layer dielectric (ILD) over the modified CESL, performing a chemical mechanical polishing (CMP) on the ILD to expose the silicon layer of the first and second gate structures, respectively, and removing the silicon layer from the first and second gate structures, respectively, and replacing it with metal gate structures. |
| US07923316B2 |
Method of forming a polysilicon film and method of manufacturing a thin film transistor including a polysilicon film
In a method of forming a polysilicon film, a thin film transistor including a polysilicon film, and a method of manufacturing a thin film transistor including a polysilicon film, the thin film transistor includes a substrate, a first heat conduction film on the substrate, a second heat conduction film adjacent to the first heat conduction film, the second heat conduction film having a lower thermal conductivity than the first heat conduction film, a polysilicon film on the second heat conduction film and the first heat conduction film adjacent to the second heat conduction film, and a gate stack on the polysilicon film. The second heat conduction film may either be on the first heat conduction film or, alternatively, the first heat conduction film may be non-contiguous and the second heat conduction film may be interposed between portions of the non-contiguous first heat conduction film. |
| US07923314B2 |
Field effect transistor and method for manufacturing the same
A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use of the mask, the mesa structure extending in a direction parallel to an upper face of the semiconductor substrate; narrowing a distance between two sidewalls of the mesa structure and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the two sidewalls extending in the direction and facing each other; forming a gate insulating film covering the mesa structure having the sidewalls flattened; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode. |
| US07923309B2 |
Thin film transistor array substrate and method for manufacturing the same
A thin film transistor array substrate and a method for manufacturing the thin film transistor array substrate are disclosed. Specifically, a thin film transistor array may be formed using a reduced number of masks. |
| US07923307B2 |
Semiconductor device with fuse and method for fabricating the same
A method for fabricating a semiconductor with a fuse includes providing a substrate, forming an insulation layer over the substrate, forming a polysilicon hard mask over the insulation layer, forming a first mask pattern to form a fuse over the polysilicon hard mask, and removing the polysilicon hard mask exposed by the first mask pattern to form a portion of the polysilicon hard mask into a polysilicon fuse. |
| US07923305B1 |
Patterning method for high density pillar structures
A method of making a device includes forming a first sacrificial layer over an underlying layer, forming a first photoresist layer over the first sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first photoresist features insoluble to a solvent, forming a second photoresist layer over the first photoresist features, patterning the second photoresist layer to form second photoresist features, etching the first sacrificial layer using both the first and the second photoresist features as a mask to form first sacrificial features, forming a spacer layer over the first sacrificial features, etching the spacer layer to form spacer features and to expose the sacrificial features, removing the first sacrificial features, and etching at least part of the underlying layer using the spacer features as a mask. |
| US07923303B2 |
Method of resin sealing electronic part
A method of resin sealing an electronic part, includes the steps of: providing a board where one or more of the electronic parts are mounted in an upper mold; melting a resin material received in a cavity forming part of a lower mold; and dipping the electronic part held by the upper mold into the molten resin so that the resin sealing is achieved. The resin material is received in the cavity forming part of the lower mold after the resin material is pressurized and dispersed in a sealing resin supply apparatus. |
| US07923302B2 |
Method for manufacturing a semiconductor package
A semiconductor package includes: a build-up wiring layer including a metal wiring layer and an insulation resin layer; and a low thermal expansion material layer having a coefficient of thermal expansion closer to that of a semiconductor chip mounted on the build-up wiring layer as compared with the insulation resin layer of the build-up wiring layer, the low thermal expansion material layer being bonded to an entire region of a rear surface of the build-up wiring layer corresponding to a region of a front surface of the build-up wiring layer on which the semiconductor chip is mounted. |
| US07923300B2 |
Stacked power converter structure and method
A power converter can include an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The power converter can further include a controller integrated circuit (IC) formed on a different die which can be electrically coupled to, and co-packaged with, the PowerDie. The PowerDie can be attached to a die pad of a leadframe, and the controller IC die can be attached to an active surface of the first die such that the first die is interposed between the controller IC die and the die pad. |
| US07923298B2 |
Imager die package and methods of packaging an imager die on a temporary carrier
Methods for fabricating an imager die package and resulting die packages are disclosed. An imager die packaging process may include dicing through a fabrication substrate comprising a plurality of imager die. Thereafter, known good die (KGD) qualified from the imager die are repopulated, face down on a high temperature-compatible temporary carrier, the KGD on the temporary carrier are encapsulated and thereafter removed as a reconstructed wafer from the temporary carrier. Furthermore, a first plurality of discrete conductive elements on a back side of the reconstructed wafer may be partially exposed and, optionally, a second plurality of discrete conductive elements may be applied to the first plurality of discrete conductive elements. The encapsulated KGD are then singulated. |
| US07923295B2 |
Semiconductor device and method of forming the device using sacrificial carrier
A semiconductor device is made by forming a photoresist layer over a metal carrier. A plurality of openings is formed in the photoresist layer extending to the metal carrier. A conductive material is selectively plated in the openings of the photoresist layer using the metal carrier as an electroplating current path to form wettable contact pads. A semiconductor die has bumps formed on its surface. The bumps are directly mounted to the wettable contact pads to align the die with respect to the wettable contact pads. An encapsulant is deposited over the die. The metal carrier is removed. An interconnect structure is formed over the encapsulant and electrically connected to the wettable contact pads. A plurality of conductive vias is formed through the encapsulant and extends to the contact pads. The conductive vias are aligned by the wettable contact pads with respect to the die to reduce interconnect pitch. |
| US07923289B2 |
Process for fabricating a semiconductor package
A process for fabricating a semiconductor package which includes using an exothermically active nanoparticle paste to join an electrode of a semiconductor die to a support body. |
| US07923288B2 |
Zinc oxide thin film electroluminescent devices
A thin film electro-luminescent device (TFEL) includes an active layer made of a direct bandgap semiconductor material, e.g. zinc oxide, doped with exciton binding centers, such as aluminum, in small amounts, e.g. 0.001 at % to 30.0 at %. The exciton binding centers prevent free excitons, created by impact ionization, from diffusing toward and recombining at native defect centers. To provide a columnar structure, a polycrystalline seed layer is deposited first to provide a template, followed by the deposition of an overlying layer forming columns in accordance with the template. |
| US07923285B2 |
Method for forming self-aligned thermal isolation cell for a variable resistance memory array
A non-volatile memory with a self-aligned RRAM element includes a lower electrode element, generally planar in form, having an inner contact surface; an upper electrode element, spaced from the lower electrode element; a containment structure extends between the upper electrode element and the lower electrode element, with a sidewall spacer element having a generally funnel-shaped central cavity with a central aperture; and a spandrel element positioned between the sidewall spacer element and the lower electrode. A RRAM element extends between the lower electrode element and the upper electrode, occupying at least a portion of the sidewall spacer element central cavity and projecting from the sidewall spacer terminal edge toward and making contact with the lower electrode. In this manner, the spandrel element inner surface is spaced from the RRAM element to define a thermal isolation cell adjacent the RRAM element. |
| US07923284B2 |
Method of manufacturing organic light emitting display
A method of manufacturing an organic light emitting display is disclosed. The method includes forming a first electrode and a bank layer including an opening area exposing the first electrode on a target substrate, forming a medium substrate including an organic layer and an absorbing layer on the target substrate, forming a mask including an opening corresponding to the opening area of the bank layer on the medium substrate, emitting light on the medium substrate through the mask and transferring the organic layer on a portion of the first electrode exposed by the bank layer to form an organic light emitting layer on the target substrate, and forming a second electrode on the organic light emitting layer. |
| US07923282B2 |
Formation of stretchable photovoltaic devices and carriers
Formation of stretchable photovoltaic devices and carriers is described. In some examples, a formation method includes: forming a stretchable carrier including a stretchable part having a given length, the given length being operable to change in response to a force being applied to the stretchable carrier; depositing a photovoltaic cell over a surface of the stretchable carrier; and interconnecting the photovoltaic cell to output terminals. |
| US07923279B2 |
Method and structure for reducing cross-talk in image sensor devices
Provided is a method of fabricating an image sensor device. The method includes providing a semiconductor substrate having a front side and a back side, forming a first isolation structure at the front side of the semiconductor substrate, thinning the semiconductor substrate from the back side, and forming a second isolation structure at the back side of the semiconductor substrate. The first and second isolation structures are shifted with respect to each other. |
| US07923276B2 |
Processes for forming electronic devices including spaced-apart radiation regions
Processes for forming an electronic device include forming a first radiation region, a second radiation region spaced apart from the first radiation region, and an insulating region. The insulating region can have a first side and a second side opposite the first side. The first radiation region can lie immediately adjacent to the first side, and the second radiation region can lie immediately adjacent to the second side. Within the insulating region, no other radiation region may lie between the first and second radiation regions, and the insulating region can include an insulating layer that includes a plurality of openings. A process for forming the electronic device can include patterning an insulating layer. |
| US07923273B2 |
Stackable optoelectronics chip-to-chip interconnects and method of manufacturing
An optoelectronics chip-to-chip interconnects system is provided, including at least one packaged chip to be connected on the printed-circuit-board with at least one other packaged chip, optical-electrical (O-E) conversion mean, waveguide-board, and (PCB). Single to multiple chips interconnects can be interconnected provided using the technique disclosed in this invention. The packaged chip includes semiconductor die and its package based on the ball-grid array or chip-scale-package. The O-E board includes the optoelectronics components and multiple electrical contacts on both sides of the O-E substrate. The waveguide board includes the electrical conductor transferring the signal from O-E board to PCB and the flex optical waveguide easily stackable onto the PCB to guide optical signal from one chip-to-other chip. Alternatively, the electrode can be directly connected to the PCB instead of including in the waveguide board. The chip-to-chip interconnections system is pin-free and compatible with the PCB. The main advantages of this invention are to use the packaged chip for interconnection and the conventional PCB technology can be used for low speed electrical signal connection. Also, the part of the heat from the packaged chip can be transmitted to the PCB through the conductors, so that complex cooling system can be avoided. |
| US07923272B2 |
Method of forming a resin cover lens of LED assembly
A method of forming the resin cover lens of LED assembly uses transparent materials, such as plastics, PP (Polypropylene), PET (Polyethylene teraphthalate), PC (Polycarbonate), PE (Polyethylene) or glass to produce the mold for making lens; and uses liquid transparent resin that can be quickly cured under EB (electron-beam) radiation, such as PU (Polyurethane), epoxy, silicon, acrylic resin or its copolymer et al., or the above resin added with photo initiator and curable under UV radiation; and fills in the mold cavity with the resin; and selects EB or UV to cure the liquid transparent resin inside the cavity to form lens. The new process in the invention is to reduce the curing time for making lens that helps LED assembly achieve high throughput rate and mass production. |
| US07923271B1 |
Method of assembling multi-layer LED array engine
A method of assembling a multi-layer LED array engine is provided. The method includes the steps of: preparing a base plate frame comprising at least one lighting area, and two lead frame grooves; positioning two lead frames inside accommodating spaces defined in the two lead frame grooves, respectively; executing an injection molding process to form a molded platform on the base plate frame; configuring a thin layer of nickel or chromium; arranging a plurality of LED dice in an array form on an upper surface of the base plate frame; electrically coupling the LED dice to the lead frames by bonded wires; forming a protection layer on the LED dice and the bonded wires; forming a phosphorous layer on the protection layer, wherein the phosphorous layer is formed within a range defined by the phosphorous wall; and forming a dome on the upper surface of the molded platform by executing an injection molding process. |
| US07923268B2 |
Method of measuring resistivity of sidewall of contact hole
A method of measuring a resistivity of a sidewall of a contact hole formed in a semiconductor device, wherein said semiconductor device includes a first electrode formed on a substrate; a second electrode formed on the first electrode with an insulating film in between; a resist pattern formed on the first electrode and the second electrode; a contact hole formed in the first electrode and the second electrode; and an organic film deposited on the sidewall of the contact hole, includes the steps of: placing a probe needle on the first electrode and the second electrode so that the probe needle contacts with the first electrode and the second electrode several times; establishing electrical conductivity of the probe needle relative to the first electrode and the second electrode; and measuring the resistivity of the organic film between the first electrode and the second electrode. |
| US07923261B2 |
Method for determining a carbon source of a product
This invention is directed to a method for determining a source of carbon feed used in manufacturing product produced from the carbon feed. The invention further provides a method for tracking products, particularly MTO products, derived from a particular carbon feed. In general, the method involves a variety of steps that include one or more of determining, comparing, inventorying, and tracking the 13C:12C ratio (or HD:H2 ratio) of the product that is being tracked to the measured or predetermined 13C:12C ratio (or HD:H2 ratio) of the feed used to make the product. |
| US07923254B2 |
Method for studying, determining or evaluating pharmacological actions of a test substance on an sart stressed animal
A method for studying, determining or evaluating a pharmacological action of a test substance, the method including subjecting the brain tissue of an SART stressed animal administered with the test substance to an expression proteome analysis, where expression changes of NSF (N-ethylmaleimide sensitive fusion protein), which is or is not modified after translation, in the SART stressed animal administered with the test substance as compared with an SART stressed animal to which a test substance is not administered is used as an index. |
| US07923252B2 |
Droplet formation systems for flow cytometers
A droplet forming flow cytometer system (1) allows high speed processing without the need for high oscillator drive powers through the inclusion of an oscillator or piezoelectric crystal (10) within the nozzle volume (3) and directly coupled to the sheath fluid. The nozzle container (27) continuously converges so as to amplify unidirectional oscillations (11) which are transmitted as pressure waves through the nozzle volume (3) to the nozzle exit so as to form droplets from the fluid jet. A variation in substance concentration is achieved through a movable substance introduction port (9) which is positioned within a convergence zone (32) to vary the relative concentration of substance to sheath fluid while still maintaining optimal laminar flow conditions. This variation may be automatically controlled through a sensor and controller configuration. |
| US07923251B2 |
Method and apparatus for avalanche-mediated transfer of agents into cells
The present invention provides a method and apparatus for transferring an agent into a cell. The method includes the steps of providing an agent outside of a cell and generating a vapor bubble and a plasma discharge between an avalanche electrode and a conductive fluid surrounding the cell. The vapor bubble and plasma discharge generate a mechanical stress wave and an electric field, respectively. The combination of this mechanical stress wave and electric field results in permeabilization of the cell, which in turn results in transfer of the agent into the cell. |
| US07923250B2 |
Methods of expressing LIM mineralization protein in non-osseous cells
Methods of expressing LIM mineralization protein in non-osseous mammalian cells, such as stem cells or intervertebral disc cells (e.g., cells of the annulus fibrosus, or cells of the nucleus pulposus) are described. The methods involve transfecting the cells with an isolated nucleic acid comprising a nucleotide sequence encoding a LIM mineralization protein operably linked to a promoter. Transfection may be accomplished ex vivo or in vivo by direct injection of virus or naked DNA, or by a nonviral vector such as a plasmid. Expression of the LIM mineralization protein can stimulate proteoglycan and/or collagen production in cells capable of producing proteoglycyan and/or collagen. Methods for treating disc disease associated with trauma or disc degeneration are also described. |
| US07923247B2 |
Method for in vitro proliferation of dendritic cell precursors and their use to produce immunogens
A method for producing proliferating cultures of dendritic cell precursors is provided. Also provided is a method for producing mature dendritic cells in culture from the proliferating dendritic cell precursors. The cultures of mature dendritic cells provide an effective means of producing novel T cell dependent antigens comprised of dendritic cell modified antigens or dendritic cells pulsed with antigen, including particulates, which antigen is processed and expressed on the antigen-activated dendritic cell. The novel antigens of the invention may be used as immunogens for vaccines or for the treatment of disease. These antigens may also be used to treat autoimmune diseases such as juvenile diabetes and multiple sclerosis. |
| US07923246B2 |
Method of culturing embryonic stem cells with the use of amniotic membrane-origin factor
The present invention provides a clinically applicable method of inducing differentiation of the embryonic stem cells. Specifically, the present invention provides a method of culturing embryonic stem cells, which comprises culturing embryonic stem cells in the presence of an amnion-derived factor, a cell culture obtained by the culture method, and a culture agent/culture kit of embryonic stem cells comprising an amnion-derived factor. The present invention also provides a method of screening an amnion-derived factor having an activity useful for culturing embryonic stem cells with the activity as an index, and an amniocyte-derived factor obtained by the screening method. Furthermore, the present invention provides a method of preparing amniocytes useful for culturing embryonic stem cells, amniocytes obtained by the preparation method, and the like. |
| US07923242B2 |
Microorganism detection apparatus and microorganism detection cassette
The objective of the present invention is to provide a simple microorganism detection apparatus that reduces detection time and that provides improved detection sensitivity, especially for gram-negative bacteria. The microorganism detection apparatus of the present invention includes: a detection target introduction portion, into which a sample and reagents are to be introduced; a detector, for detecting the color tone of the reagent introduced into the detection target introduction portion; a sample holder, for holding the sample to be introduced into the detection target introduction portion; a culture solution holder, for holding a culture solution used for microorganism culturing; and reagent holders, for holding the reagents to be introduced into the detection target introduction portion, wherein the presence/absence of microorganisms in the sample is determined based on the detected color tone. |
| US07923241B2 |
Cell culture article and methods thereof
Disclosed is a cell culture article including: a substrate; a tie-layer attached to at least the substrate; and a bio-compatible layer attached to at least the tie layer, the bio-compatible layer having been obtained from surface oxidation of a polymer layer. Also disclosed are methods for making the cell culture article and methods for performing an assay of a ligand with the article. |
| US07923238B2 |
Multi-channel electroporation system
Systems, methods and apparatus provide flexible and efficient high throughput electroporation systems. An electrical pulse may be transmitted to any number of channels of a multi-channel sample plate. Drivers can provide the selection of which channels to transmit the electrical pulse. To provide efficient transitions between electrical pulses, discharge circuits provide efficient means achieve a desired voltage. |
| US07923237B2 |
Method and apparatus for combined electrochemical synthesis and detection of analytes
Described are devices and methods for detecting binding on an electrode surface. In addition, devices and methods for electrochemically synthesizing polymers and devices and methods for synthesizing and detecting binding to the polymer on a common integrated device surface are described. |
| US07923236B2 |
Fungal enzymes
This invention relates to enzymes and methods for producing the same. More specifically this invention relates to a variety of fungal enzymes. Nucleic acid molecules encoding such enzymes, compositions, recombinant and genetically modified host cells, and methods of use are described. The invention also relates to a method to convert lignocellulosic biomass to fermentable sugars with enzymes that degrade the lignocellulosic material and novel combinations of enzymes, including those that provide a synergistic release of sugars from plant biomass. The invention also relates to methods to use the novel enzymes and compositions of such enzymes in a variety of other processes, including washing of clothing, detergent processes, deinking and biobleaching of paper and pulp, and treatment of waste streams. |
| US07923231B2 |
Production of glucuronic acid using myo-inositol oxygenase from cryptococcus neoformans
A method is disclosed for increasing the specific activity of myo-inositol oxygenase. The method includes incubating a mixture including myo-inositol oxygenase and a non-sulfur containing reductant under conditions effective to increase the specific activity of the myo-inositol oxygenase. Also disclosed are methods for producing D-glucuronic acid and glucurono-γ-lactone comprising incubating a mixture including myo-inositol, myo-inositol oxygenase, and oxygen under conditions effective to form 5 grams D-glucuronic acid per liter of the mixture to 400 grams D-glucuronic acid per liter of the mixture. Glucurono-γ-lactone can be produced from the D-glucuronic acid product. Also disclosed are organisms and nucleic acids suitable for use in such methods. |
| US07923228B2 |
Methods and compositions for growth of hydrocarbons in Botryococcus sp
Acceleration of botryococcenoids and growth by concomitant provision of appropriate light, minerals, and assimilable carbon. Specifically, methods, compositions and systems for the in vitro growth of hydrocarbons in photosynthetic organisms while maintaining a biologically exclusive monocultural environment, as for example, from Botryococcus species, is disclosed. Niche-nutrients can include about 200 ppm to about 3% nitrogen, and about 100 ppm to about 15% P2O5, and about 100 ppm to about 3.5% K2O. In certain embodiments, the present invention relates to the growth of the Chlorophyta such as Botryococcus sp. in a nutrient medium that includes up to 15% phosphates, at least 3 ppm soluble iron, and up to about 70 ppm soluble zinc. Also disclosed is a substantially pure culture of Botryococcus braunii var. Showa, strain Ninsei, having the ATCC Accession No. PTA-7441, its parts, and hydrocarbons produced therefrom. |
| US07923224B2 |
Method of recovering lipase activity
The present invention discloses a method of recovering lipase activity which comprises the steps of using a lipase derived from Thermomyces sp. and immobilized on a carrier, or a lipase powder composition which comprises a filter aid and the lipase derived from Thermomyces sp. and immobilized on a carrier which is crushed into the average particle size of 1 μm or larger and smaller than 300 μm in an esterification or transesterification reaction; and washing said lipase or lipase powder composition with triacylglycerol. According to this method, the decreased lipase activity can be effectively recovered. |
| US07923214B2 |
Nonseparation assay methods
Assay methods are disclosed involving specific binding reactions which are simplified compared to known methods. A compound capable of producing chemiluminescence is immobilized on a solid support as is a member of a specific binding pair for capturing an analyte from a sample. An activator compound that activates the chemiluminescent compound and is conjugated to a specific binding pair member is added in excess along with the sample to the solid support. Addition of a trigger solution causes a chemiluminescent reaction at the sites where the activator conjugate has been specifically bound. The assay methods are termed non-separation assays because they do not require removal or separation of excess detection label (activator conjugate) prior to the detection step. The methods are applicable to various types of assays including immunoassays, receptor-ligand assays and nucleic acid hybridization assays. |
| US07923207B2 |
Apparatus and system having dry gene silencing pools
A reverse transfection apparatus can be used for introducing siRNA into a cell to effect gene silencing. Such an apparatus can include a well plate having a well configured for transfecting cells. The well can include a substantially dry gene silencing composition that has at least two siRNAs which silences at least a first target gene. The gene silencing composition can be configured such that the at least two siRNAs are each capable of being solubilized or suspended in an aqueous medium in an amount sufficient for transfecting cells in the well. Additionally, the siRNAs can include a hairpin structure, modification, or a conjugate. Also, the at least siRNAs can be rationally designed. The reverse transfection apparatus can be provided as a kit or system that additionally includes cells, polynucleotide carriers, reverse transfection reagents, and the like. |