最新美国发明专利第2011-03-22期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US07911908B2	Optical head and data processing apparatus including the same An optical data processing apparatus reads and/or writes data from/on a data storage medium, in which first and second data storage layer are stacked. The apparatus includes: a light detector including at least one photodetector for generating a light quantity signal; a detecting optical system for guiding reflected light beams from a storage layer; and a signal processor for generating a layer sensing signal from the light quantity signal and determining, by the layer sensing signal, the type of data storage medium. The light detector includes a layer sensing photodetector arranged in view of an of an area of the light detector, and further includes a photodetector which is different from the layer sensing photodetector which receives the reflected light beam to generate a focus signal.
US07911905B2	Write-once optical disc, and method and apparatus for recording/reproducing management information on/from optical disc A write-once optical disc and a method and apparatus for recording management information on the optical disc are provided. The optical disc includes at least one recording layer and a plurality of temporary defect management areas (TDMAs) on the at least one recording layer. At least one of the TDMAs includes an indicator indicating which one of the TDMAs has an in-use status.
US07911901B2	Magnetic and optical rotating storage systems with audio monitoring A control system for a rotating data storage device includes a drive module configured to at least one of (i) process data, (ii) store data, and (iii) control operation of the rotating storage device; and an audio monitoring module configured to (i) communicate with the drive module and (ii) analyze audio signals that are based on noise generated by the rotating storage device during operation, The rotating storage device includes a first component The audio monitoring module is configured to selectively adjust a rotational speed of the first component by (i) a predetermined value or (ii) a predetermined percentage of the rotation speed in response to detecting resonance of the first component. The drive module is integrated with the audio monitoring module in an integrated circuit (IC). The IC is arranged on a drive printed circuit board (PCB) of the rotating storage device.
US07911899B2	Optical disc reproducing apparatus using an asymmetric compensation scheme An optical disc reproducing apparatus includes an analog-to-digital (A/D) converter which converts an analog signal obtained from an optical disc to a digital signal; an asymmetry compensator which detects and corrects an offset of the digital signal; a phase locked loop (PLL) which estimates a clock of the digital signal and compensates for a frequency error; a binary module which converts the digital signal to binary data; an equalizer which equalizes a particular frequency of the digital signal; and a channel identifier which detects a reference level of the binary module, based on an input signal of the equalizer.
US07911898B2	Drive apparatus for performing a sequential recording and reproduction on a write-once recording medium, and method of reproducing same The drive apparatus of the present invention includes a recording/reproduction section and a drive control section. The drive control section determines a physical address indicating a location at which data can be recorded next in the determined track of a write-once recording medium as a next writable address, based on the last recorded address in the track; compares the physical address corresponding to the logical address included in the recording instruction with the next writable address; when the physical address corresponding to the logical address is smaller than the next writable address, controls the recording/reproduction section to record the data at a specific location in the user data area other than the location indicated by the physical address corresponding to the logical address in the recording instruction; generates new disc management information; and controls the recording/reproduction section to record the new disc management information in the disc management information area.
US07911897B2	Recording medium for storing defect management information for recording real time data, defect managing method therefor, and real time data recording method A recording medium for storing defect management information to record real time data, a defect managing method therefor, and a method of recording real time data. The recording medium stores information representing use or non-use of linear replacement defect management in which a defective area on the recording medium is replaced with the spare area, in order to record real time data. While maintaining compatibility between the defect managing method and a defect managing method based on a current DVD-RAM standard, i.e., while allowing a report of the fact that there are blocks which have not been linearly replaced, linear replacement is not performed when real time data is recorded. Thus, real time data can be recorded and reproduced.
US07911896B2	Write-once recording medium preserving data-recording status, method of preserving data-recording status of a write-once recording medium, medium including computer readable code for the same, and recording and/or reproducing apparatus therefor An apparatus for reproducing a recording medium having a recorded defect management area. The apparatus includes a pickup reading data from a recording medium and a controller controlling the pickup to read data on the recording medium and determining whether the recording medium contains predetermined data, recorded in response to a finalization command, to prevent recording with respect to the recording medium. The controller determines whether an area of a temporary defect management area not having defect management data includes the predetermined data by checking whether the temporary defect management data is filled with repetitions of a predetermined value.
US07911892B2	Center error mechanical center adjustment An apparatus comprising a center error creation circuit and a center error offset injection circuit. The center error creation circuit may be configured to generate a center error signal in response to light from a main laser reflected from a surface of an optical disc. The center error offset injection circuit may be configured to (i) determine a value of the center error signal when a lens in a sled housing is at a mechanical center and (ii) generate an offset signal based upon the value. The center error offset injection circuit generally measures an average value of the center error signal over a predetermined amount of time when a lens suspension which holds the lens in place is in a mechanical equilibrium state.
US07911887B2	Data recording and reproducing apparatus, data recording and reproducing method, and computer program A recording medium has a user-data zone in which a plurality of fragments can be reserved by recording the start and end addresses of the fragments, and a management information zone in which management information having recorded-area-indicator (RAI) information indicating whether each of partial areas into which the user-data zone is divided by a fixed size is a recorded area and fragment information concerning each fragment reserved in the user-data zone is recorded. RAI information and fragment information are acquired from the management information zone. A recording end position in the reserved fragment is searched for using the entirety of an area in a reserved fragment as a search range. A search range in an unreserved fragment whose end address is not defined is determined on the basis of the RAI information, and a recording end position in the unreserved fragment is searched for within the determined search range.
US07911885B2	Recording control device and method, program, and recording medium A recording medium and having efficiency of a reading and a writing process. Audio annual ring data, video annual ring data, low-resolution annual ring data, and meta annual ring data extracted from data series of metadata, an audio file, a video file, and low resolution data are written to a free space on an optical disk in order of a body, a footer, and a header in order to improve the convenience of the recording medium by enabling a quick edit process. For example, the efficiency of the reading and writing process is improved by preventing occurrence of an unnecessary writing process.
US07911882B2	Thin-film magnetic head with near-field-light-generating layer A thin-film magnetic head that has a configuration in which the element-formed surface and the opposed-to-medium surface are perpendicular to each other, and a light source is sufficiently distanced from the medium surface is provided. The head comprises at least one near-field-light-generating layer for heating a part of a magnetic medium during write operation by generating a near-field light, having a shape tapered toward a head end surface on the opposed-to-medium surface side, and comprising a near-field-light-generating portion having a light-received surface and a tip reaching the head end surface on the opposed-to-medium surface side, and the light-received surface being sloped in respect to the element-formed surface and being provided in a position where an incident light propagating from a head end surface opposite to the opposed-to-medium surface can reach at least a part of the light-received surface.
US07911881B2	Method and apparatus for ultrasonic sensing A distance and temperature sensing unit is used on paving vehicles. The unit has a first set of range sensors of a first diameter and a second set of range sensors of a second diameter. The unit calculates a weighted average distance to a road surface based on ranges measured by the multiple sensors. The unit also has a temperature sensor on a temperature bar. The bar is affixed to the unit by a flexible connection preventing break-off when the bar encounters obstacles, like the road surface, while the paving vehicle is moving.
US07911880B2	Acoustic doppler dual current profiler system and method An AD2CP includes at least one transducer assembly emitting sets of slanted directional acoustic beams and receiving the echoes; and electronics that processes the echoes into depth cells and computes velocity in each depth cell. The AD2CP is configured so that each beam set has a profiling catenation, at least two of which are different, and the AD2CP is configured so that the emitting, receiving and processing operate contemporaneously.
US07911877B2	Active noise cancellation through the use of magnetic coupling Passive suppression of casing signals is used to improve the ability to measure formation velocities. Passive suppression includes the use of a magnet slidably coupled to the casing.
US07911874B2	Semiconductor integrated circuit An interface conversion macro converts a signal compliant with a system interface specification output from a controller to a signal compliant with a memory interface specification, and outputs the same to a memory interface part, and it also converts a signal output from the memory macro to a signal compliant with the system interface specification and outputs the same to the controller. By converting the system interface specification and the memory interface specification to each other by an interface conversion macro, a common memory macro can be mounted on a semiconductor integrated circuit even when the system interface specification differs. Accordingly, when designing a system, the design verification time, evaluation time, and test time of the semiconductor integrated circuit can be reduced. As a result, the design time and design cost of the semiconductor integrated circuit can be reduced.
US07911873B1	Digital delay locked loop implementation for precise control of timing signals An efficient implementation of a digital delay locked loop (DLL) circuit is disclosed. The delay locked loop (DLL) circuit includes a phase detector circuit, a clock divider circuit, a delay, a delay control finite state machine (FSM) and an output low pass filter. The delay includes a coarse delay line and a fine delay line. The coarse delay line delays a signal by a fixed large amount and the fine delay line introduces a smaller precise delay. The delay control FSM adjusts the delay to keep the output signal of the DLL synchronized with the input. The adjustment is averaged over a range of cycle periods in order to avoid adjusting the edges of signal waveform constantly. The low pass filter at the output minimizes the jitter in the output signal.
US07911869B1	Fuse-type memory cells based on irreversible snapback device In a programmable circuit making use of fuse cells, a snapback NMOS or NPN transistor or SCR without reversible snapback capability is used as an anti-fuse, and programming comprises biasing the control electrode of the transistor to cause the transistor to go into snapback mode.
US07911860B2	Circuit and method for testing multi-device systems A method and system for high speed testing of memories in a multi-device system, where individual devices of the multi-device system are arranged in a serial interconnected configuration. High speed testing is achieved by first writing test pattern data to the memory banks of each device of the multi-device system, followed by local test read-out and comparison of the data in each device. Each device generates local result data representing the absence or presence of a failed bit position in the device. Serial test circuitry in each device compares the local result data with global result data from a previous device. The test circuitry compresses this result of this comparison and provides it to the next device as an updated global result data. Hence, the updated global result data will represent the local result data of all the previous devices.
US07911857B1	Preamble detection and postamble closure for a memory interface controller A memory controller, such as a memory controller for reading data received from a DDR SDRAM memory, may detect the beginning and end of a read cycle. The memory controller may include a preamble detection circuit to receive a strobe signal and output a first control signal indicating detection of a preamble window in the strobe signal that indicates a beginning of the read cycle, where the first control signal is delayed based on a selectable delay period applied to the first control signal. The memory controller may further include a first gate to, based on the first control signal, either output the strobe signal for reading of the data lines or block the strobe signal, and the control logic to set an amount of the selectable delay period for the preamble detection circuit.
US07911849B2	Controlled boosting in non-volatile memory soft programming A soft programming pre-charge voltage provides boosting control during soft programming operations for non-volatile memory devices. A pre-charge voltage can be applied to the word lines of a block of memory cells to enable pre-charging of the channel region of a NAND string to be inhibited from soft programming. The level of boosting in the channel region of the inhibited NAND string is governed by the pre-charge voltage and the soft programming voltage. By controlling the pre-charge voltage, more reliable and consistent channel boosting can be achieved. In one embodiment, the pre-charge voltage is increased between applications of the soft programming voltage to reduce or eliminate a rise in the channel's boosted potential. In one embodiment, the soft programming pre-charge voltage level(s) is determined during testing that is performed as part of a manufacturing process.
US07911845B2	Non-volatile semiconductor memory device A non-volatile semiconductor memory device includes: a memory cell array having electrically rewritable and non-volatile memory cells arranged; a data register circuit configured to hold write data to be written into the memory cell array; and an address decode circuit configured to decode a write address signal and control the write data-loading in the data register circuit, the address decode circuit being settable in such a multiple selection mode that the same write data is loaded in multiple registers in the data register circuit in correspondence to multiple addresses.
US07911844B2	Non-volatile semiconductor storage device A non-volatile semiconductor storage device includes: a memory cell array having memory cells arranged therein, the memory cells storing data in a non-volatile manner; and a plurality of transfer transistors transferring a voltage to the memory cells, the voltage to be supplied for data read, write and erase operations with respect to the memory cells. Each of the transfer transistors includes: a gate electrode formed on a semiconductor substrate via a gate insulation film; and diffusion layers formed to sandwich the gate electrode therebetween and functioning as drain/source layers. Upper layer wirings are provided above the diffusion layers and provided with a predetermined voltage to prevent depletion of the diffusion layers at least when the transfer transistors become conductive.
US07911843B2	Non-volatile memory device and program method thereof A method of programming a non-volatile memory device employing program loops. Each program loop comprises a programming operation and a subsequent plurality of verifying operations. The method includes preventing the next program loop based on the results of performing the plurality of verifying operations of a current program loop each verifying operation verifying whether the selected memory cell transistors are program-passed. The decision to re-program may be based on a program pass number of the memory cell transistors obtained as a result of the plurality of verifying operations of the current program loop.
US07911842B2	Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.
US07911840B2	Logged-based flash memory system and logged-based method for recovering a flash memory system A flash memory system includes a path selector to determine to write to a non-volatile memory, a volatile memory or both the non-volatile memory and the volatile memory when the flash memory system is to write data. A record is stored in the non-volatile memory which is updated the status of the non-volatile memory after each one or more writing operations. When the flash memory system is powered on after a power loss, it could be recovered to a command executed prior to the power loss or to any checkpoint prior to the power loss by using the record.
US07911839B2	System and method to control one time programmable memory Systems and methods to control one time programmable (OTP) memory are disclosed. A method may include determining a functionality for a hardware capability bus in an integrated circuit. The method may also include storing data in a first register of the integrated circuit based on the functionality. The method may also include disabling the functionality in the integrated circuit by setting at least one bit in a one time programmable memory bank in the integrated circuit based on the data.
US07911837B2	Multi-state memory cell with asymmetric charge trapping A multi-state NAND memory cell is comprised of two drain/source areas in a substrate. An oxide-nitride-oxide structure is formed above the substrate between the drain/source areas. The nitride layer acting as an asymmetric charge trapping layer. A control gate is located above the oxide-nitride-oxide structure. An asymmetrical bias on the drain/source areas causes the drain/source area with the higher voltage to inject an asymmetric distribution hole by gate induced drain leakage injection into the trapping layer substantially adjacent that drain/source area.
US07911834B2	Analog interface for a flash memory die A flash disk controller includes an input operable to receive analog signals from a flash memory die. The flash memory die includes multiple flash memory cells. The analog signals represent data values stored in the flash memory cells. An analog-to-digital conversion module is coupled to the input to convert received analog signals into digital data. A control module selects memory cells from which the input receives analog signals.
US07911832B2	High speed low power magnetic devices based on current induced spin-momentum transfer A high speed and low power method to control and switch the magnetization direction and/or helicity of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a reference magnetic layer with a fixed magnetic helicity and/or magnetization direction and a free magnetic layer with a changeable magnetic helicity and/or magnetization direction. The fixed magnetic layer and the free magnetic layer are preferably separated by a non-magnetic layer. The fixed and free magnetic layers may have magnetization directions at a substantially non-zero angle relative to the layer normal. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, is measured to read out the information stored in the device.
US07911831B2	Nanotube-on-gate FET structures and applications Under one aspect, non-volatile transistor device includes a source and drain with a channel in between; a gate structure made of a semiconductive or conductive material disposed over an insulator over the channel; a control gate made of a semiconductive or conductive material; and an electromechanically-deflectable nanotube switching element in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region.
US07911821B2	Semiconductor memory device A ferroelectric memory is provided with a voltage generating circuit configured to generate prescribed driving potential, a driving interconnection to which the driving potential is applied, a plurality of memory cells connected to the driving interconnections and an internal voltage comparison circuit configured to compare inputted potential and to output results thereof. A plurality of voltage monitoring interconnections are provided to connect between a portion of the driving interconnection disposed at a position distant from the voltage generating circuit on the substrate and the internal voltage comparison circuit. The internal voltage comparison circuit compares potential inputted through the voltage monitoring interconnection with the driving potential.
US07911820B2	Regulating electrical fuse programming current An apparatus for regulating eFUSE programming current includes a current control generator receiving an input reference current through a first current path of reference fuses, the input reference current proportional to a desired eFUSE programming current; a second current path including a reference programming FET and a second group of reference fuses; and a voltage comparator coupled to a gate terminal of the reference programming FET so as to adjust the gate voltage of the reference programming FET to equalize a first voltage across the first current path with a second voltage across the second current path. The gate voltage of the reference programming FET is an output of the current control generator, coupled to corresponding gates of one or more selected programming devices of an eFUSE array such that the selected programming devices source the desired eFUSE programming current to a selected eFUSE to be programmed.
US07911817B2	Systems and methods for controlling energy consumption of AC-DC adapters An AC-DC adapter is provided with an auto-sensing capability to sense when no DC load is present at the output (secondary side) of the adapter by monitoring for absence of load-indicative signals, such as power supply identifier (PSID) signals communicated to the adapter from a coupled DC-powered device. Upon detection of a no load condition, the adapter enters a no load mode during which the adapter output is turned off in order to reduce energy consumption by the adapter, and only produces short recurring voltage pulses (hiccups) at the adapter output. Upon detection of load-indicative signals communicated to the adapter from a coupled DC-powered device, the adapter output enters normal mode and provides its normal regulated power value to the adapter output for powering the coupled DC-powered device.
US07911815B2	Primary-side feedback control device and related method for a power converter A primary-side feedback control device for a power converter includes a control unit for generating a pulse signal according to a feedback signal for controlling on and off states of a switching transistor of the power converter, a comparator coupled to an auxiliary winding of a primary side of the power converter for generating at least one control signal according to a voltage on the auxiliary winding and a reference voltage, a sample-and-hold unit coupled to the auxiliary winding, the comparator, and the control unit for generating the feedback signal according to the voltage on the auxiliary winding and the at least one control signal, and a voltage generator coupled to the control unit, the comparator, and the sample-and-hold unit for generating the reference voltage according to the feedback signal.
US07911811B2	Switching power supply with increased efficiency at light load A switching power supply with the increased efficiency at light load has a switching power circuit, a power monitoring circuit and a light load power supplying circuit. The switching power circuit converts an AC power to a stable DC power and sends the DC power to a load according to voltage variation of the load. When the power monitoring circuit detects the AC power and determines that the load is in a light state, the power monitoring circuit controls the light load power supplying circuit to output a small-power DC to the load. As the DC power provided by the light load power supplying circuit is small, the switching loss ratio is lower in its light load state. Therefore, the operating efficiency at the light load state is higher.
US07911805B2	Multilayer wiring element having pin interface A method of forming contacts for an interconnection element, includes (a) joining a conductive element to an interconnection element having multiple wiring layers, (b) patterning the conductive element to form conductive pins, and (c) electrically interconnecting the conductive pins with conductive features of the interconnection element. A multiple wiring layer interconnection element having an exposed pin interface, includes an interconnection element having multiple wiring layers separated by at least one dielectric layer, the wiring layers including a plurality of conductive features exposed at a first face of the interconnection element, a plurality of conductive pins protruding in a direction away from the first face, and metal features electrically interconnecting the conductive features with the conductive pins.
US07911804B2	Circuit board and method of manufacturing same The present invention provides a circuit board and a method for manufacturing the circuit board, the circuit board and method allowing a further shorter connection distance between electrodes of a semiconductor device, and also allowing a sufficient thickness of a solder pre-coat in a soldering process. The circuit board comprises bonding pads for being connected with bumps of a semiconductor element, which act as connection terminals, the bonding pads being arrayed in parallel lines on a surface of the circuit board, and, on the adjacent parallel lines, the bonding pads being positioned to form a zigzag pattern along the parallel lines longitudinally.
US07911803B2	Current distribution structure and method An electrical structure and method of forming. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current.
US07911802B2	Interposer, a method for manufacturing the same and an electronic circuit package An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.
US07911800B2	Housing for electrical apparatus Electrical apparatus is provided including a housing for containing one or more electrical components therein. The housing has at least one connector means (29) for allowing the connection of at least one electrical cable thereto. Channel means (28) are provided adjacent the connector means for containing at least a part of the electrical cable adjacent a connection end thereof which is to be connected to the connector means on the housing in use.
US07911797B2	Apparatus and methods for thermal management of electronic devices An apparatus is disclosed that may include a printed circuit board (PCB) and an electronics package may be disposed about the first surface of the PCB. The PCB may include a metal layer and a core, and, in some aspects, may include multiple cores interposed between multiple metal layers, and in some embodiments a backplane may be disposed along the core. The metal layer may be disposed on a core first surface. The metal layer may comprise metal or other conductive material suitable to define traces, which may be circuit paths for electronic components affixed to the PCB. In some aspects, the core may be electrically non-conducting, and may be thermally insulating, and, accordingly, inhibit the transfer of heat from the electronics package through the PCB. However, pins may be configured to pass through the PCB including the core from the core first surface to the core second surface to conduct heat generated by the electronics package away for dispersion. In some embodiments, the pins may pass into the backplane. A pad may be disposed between the electronic package and the core in some embodiments, the pins passing into the pad.
US07911796B2	Avionics chassis An avionics chassis comprises a housing having a substantially thermally non-conductive frame comprising a composite of carbon fibers laid up in an epoxy matrix. The housing also includes at least two walls, at least one of which is a thermally conductive wall comprising a composite of carbon fibers in a carbonized matrix, and a plurality of spaced, thermally-conductive, card rails provided on the at least two walls. The at least two walls are mounted to the frame in opposing relationship such that corresponding card rails on the walls define an effective slot therebetween in which a printed circuit board may be received and the card rails and the at least one thermally conductive wall form a thermally conductive path from the interior to the exterior.
US07911792B2	Direct dipping cooled power module and packaging A power module package including a fully enclosed package comprising sidewalls; wherein at least one of said sidewalls includes a conductive substrate; wherein circuit elements are mounted on said conductive substrate on a first side comprising an inner side of said enclosed package; and, wherein a majority area of a second side of said conductive substrate is exposed, the power package has an improved interconnection configuration and compact power I/O terminals, offering low electrical parasitics, a plurality of individual power module packages can be attached seamlessly and positioned in a liquid coolant with multiple top portion open channels, as well as attached to a laminar power connector (busbar) to form various electrical power conversion topologies, the module offers low thermal resistance and low electrical parasitics, in addition to small volume, light weight and high reliability.
US07911789B2	Disk array system In the disk array system, in the basic chassis, HDD modules are installed from a front surface in a front part of a backboard, and duplex CTL modules are installed up and down from a rear surface in a rear part, and duplex power source modules containing fans are installed in the left and right sides thereof. By the operation of the fans, in the rear part, the cooling air flows separately into each CTL module and into each power source module, and the cooling air having passed through the area of the duct by a block in the CTL module is drawn by the fans in the power source module through a ventilation hole and is then exhausted outside. The cooling air flow path to the plurality of ICs is divided by the block. The rotation speed of the fans is controlled by using a temperature sensor.
US07911784B2	Mobile computer stand with integrated keyboard A device for use with a portable computer includes a base, a stand having an upper portion and an adjustable linkage, and a connection mechanism. The base is adapted to rest upon a surface and includes a keyboard that is physically integrated with the base. The stand is attached to the base. The upper portion is adapted to provide a surface upon which a portable computer rests. The upper portion includes an attachment mechanism adapted to attach to a portable computer resting upon the upper portion to secure the portable computer physically to the upper portion. The adjustable linkage is connected to the base and is connected to the upper portion of the stand on another end. The adjustable linkage is adapted to position the upper portion of the stand. The connection mechanism provides data communication from the integrated keyboard to a portable computer resting upon the upper portion.
US07911782B2	Liquid submersion cooling system A portable, self-contained liquid submersion cooling system that is suitable for cooling a number of electronic devices, including cooling heat-generating components in computer systems and other systems that use electronic, heat-generating components. The electronic device includes a housing having an interior space, a dielectric cooling liquid in the interior space, a heat-generating electronic component disposed within the space and submerged in the dielectric cooling liquid, and a pump for pumping the liquid into and out of the space, to and from a heat exchanger that is fixed to the housing outside the interior space. The heat exchanger includes a cooling liquid inlet, a cooling liquid outlet, and a flow path for cooling liquid therethrough from the cooling liquid inlet to the cooling liquid outlet. An air-moving device such as a fan can be used to blow air across the heat exchanger to increase heat transfer.
US07911777B2	Computer drive cage with integrated biasing elements A computer drive cage (10) includes a pair of side support panels (14) that are separated by a space (38) to accommodate receipt of one or more computer drives (86). At least one of these support panels (14) includes a computer drive installation slot (46). One or more contacts (62) are aligned with and disposed outside of this slot (46) in a direction that is at least generally away from the computer drive space (38) between the side support panels (14). Each contact (62) for may be integrally-formed with its corresponding side support panel (14).
US07911776B2	Disk device A disk device includes a disk unit housing a disk-shaped storage medium, a case holding the disk unit, a bracket holding the case, and a guide member guiding sliding movement of the case in and out from the bracket. The disk device also includes spring members on one of the bracket and the case, distributed in the direction of the relative movement. Each of the spring members extends longitudinally in the direction of the movement. Distal ends of the spring members face and press against the other of the bracket and the case. Base portions of the spring members are integral with the one of the bracket and the case. The spring members inhibit lateral vibration of the case by pressing against small projections on the case. Other spring members inhibit vertical vibration of the case by pressing against sliding support rails of the case. A face plate of the case absorbs vibration in the longitudinal direction.
US07911768B2	Drawout door interface for circuit breaker A drawout system with an interface proving a lower ingress protection rating is provided. The system includes a flange mounted to a door. A sleeve is movably mounted to the door adjacent to the flange. As the circuit breaker is moved from a racked-in position to a test position to a racked-out position, the sleeve moves with the circuit breaker and avoids creating exposure to electrical components within the drawout. The drawout system allows the operator to operate the circuit breaker with the door open or closed.
US07911765B2	Metalized film capacitor, case mold type capacitor using the same, inverter circuit, and vehicle drive motor drive circuit A metalized film capacitor capable of exhibiting stable performance in a wide temperature range is provided. The metalized film capacitor has an elliptical cross sectional shape having a major axis of 60 mm or above. In this capacitor, offset for shifting in the width direction of a pair of metalized film is set to 1.2 mm or above. Since the bonding state between metal vapor-deposited electrode and metal sprayed electrode formed on the end surface is stable, a stable contact between metal sprayed electrode and dielectric film is maintained, thereby preferably maintaining tan σand exhibiting excellent performance even if the use temperature range is increased and the thermal stress is increased.
US07911763B2	Method for forming MIM in semiconductor device The present invention relates to a semiconductor device, and more particularly to a method for forming a metal/insulator/metal (MIM). The method comprises the steps of: forming a metal wiring surrounded by the inter-metal dielectric film; forming a plurality of insulating film on the metal wiring in sequence; and forming a metal barrier film on the insulating film, whereby the insulating film functioning as a buffer film can mitigate the stress between the films.
US07911762B2	Capacitor with multiple elements for multiple replacement applications A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal. A pressure interrupter cover assembly is sealingly secured to the open end of case for the elements and has a deformable cover with a centrally mounted common cover terminal and a plurality of section cover terminals mounted at spaced apart locations. A conductor frangibly connects the common element terminal of the capacitor section to the common cover terminal and conductors respectively frangibly connect the capacitor section terminals to the section cover terminals. Deformation of the cover caused by failure of the capacitor element breaks at least some of the frangible connections sufficient to disconnect the capacitive element from an electric circuit in which it is connected. A cover insulation barrier mounted on the deformable cover, has a barrier cup substantially surrounding the common cover terminal and a plurality of barrier fins each extending radially outwardly from the barrier cup, and deployed between adjacent section cover terminals.
US07911758B2	Low power solenoid control system and method A low power solenoid control circuit including a power source in series with a sensing element and a first diode, an inductor to actuate a valve, an energy storage device to store and discharge energy into the inductor, diodes to control current flow, and switches and a controller to control the circuit. The circuit may be operated by closing a first switch, thereby allowing a source current to flow through an inductor; opening the first switch, thereby forcing a charge current to flow through an energy storage device utilizing the inductance of the inductor; repeating these steps until the energy storage device is sufficiently charged; and upon command, closing a second switch, thereby forcing a discharge current to flow from the energy storage device to the inductor causing the inductor to produce an actuating magnetic field thereby actuating a mechanical valve.
US07911757B2	Travel outlet device A travel outlet device is for connecting between an adapter and a power cable. The travel outlet device includes a case, a PCB and at least one power outlet unit. The case is connected with a power input portion and a power output portion. The PCB has a surge-protected circuit and is disposed inside the case. The PCB is electrically connected with the power input portion and the power output portion. The power outlet unit is disposed with the case and electrically connected with the PCB. Accordingly, the travel outlet device can provide the adapter surge-protected function so that users can get more power outlet units to connect to other electric equipments for convenient use.
US07911749B2	Electrostatic discharge protection device for pad and method and structure thereof An ESD protection device for a pad includes an adjusting circuit, a snapback element and a control circuit. The adjusting circuit includes a silicon controlled rectifier (SCR) coupled to the pad. The SCR includes a first diode. The snapback element is coupled to a first N pole of the first diode when a second diode is not used, and is coupled to a second N pole of the second diode when the second diode is used. The control circuit is coupled to the first N pole. In a normal operation mode, the control circuit provides a first voltage to the first N pole so that the first N pole collects a plurality of charges and the SCR is turned off. In an ESD mode, the control circuit does not provide the first voltage to the first N pole so that the first N pole does not collect the charges.
US07911748B1	Diffusion capacitor for actively triggered ESD clamp In an actively triggered ESD protection structure, the control electrode is triggered by an RC circuit, wherein the capacitor is a diffusion capacitor implemented as one or more forward or reverse biased p-n junctions.
US07911747B2	Systems and methods for grounding power line sections to clear faults Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.
US07911745B2	Thin-film magnetic head comprising a magneto-resistive effect device of the CPP structure including a re-magnetizing bias layer and magnetic disk system A thin-film magnetic head includes a magneto-resistive effect device of the CPP structure including a multilayer film comprising a stack of a fixed magnetization layer, a nonmagnetic layer and a free layer stacked one upon another in order, with a sense current applied in the stacking direction of the multilayer film, and an upper shield layer and a lower shield layer with the magneto-resistive effect device held between them in the thickness direction, and further comprises a bias magnetic field-applying layer located at each end of the multilayer film in the widthwise direction and a re-magnetizer unit designed such that when the bias magnetic field-applying layers malfunction, they are re-magnetized to go back to normal.
US07911740B2	Apparatus and method for receiving and positioning a read/write head to a disk in a test apparatus Apparatus for receiving and positioning a read/write head to a disk in a test apparatus has a deck and a spindle on the deck and on which a disk can be mounted for rotation of the disk. A gripper is provided for holding a head during testing, the gripper being movable over a surface of the deck. A precisor receives a head and accurately aligns the head, the precisor being movable over a surface of the deck. A pick is operable to pick up and place down a head. The precisor is movable to a position where the pick can pick up a head from the precisor and place down a head on the precisor. The gripper is movable to a position where the pick can pick up a head from the gripper and place down a head on the gripper.
US07911739B2	Writing and reading multi-level patterned magnetic recording media A method and apparatus for writing magnetization states in a pair of magnetic islands of a multi-level patterned magnetic recording medium and a method and apparatus for reading readback waveforms representing the written magnetization states of a pair of magnetic islands of a two-level patterned magnetic recording medium. Writing each magnetization state includes selecting the magnetization state, determining a write current sufficient to write the magnetization state, and applying the write current to a magnetic write head to write the magnetization state by simultaneously writing associated magnetic states in each magnetic island of the pair of magnetic islands. Reading the readback waveform representing the written magnetization state is implemented through use of a magnetic read head and includes: identifying the written magnetization state by decoding the readback waveform; and displaying and/or recording the written magnetization state.
US07911734B2	Spindle motor with a magnetic shield plate having an inclined annular face A disc driving motor of the invention includes a base, a hub having a ring-shaped disc receiving face on which a disc is placed, a hydrodynamic bearing rotatably supporting the hub, a motor unit mounted on the base, the motor unit having an outer diameter larger than that of the disc receiving face and applying a rotational force to the hub, and a magnetic shield plate disposed on an axial clearance formed between the disc and the motor unit when the disc is placed on the disc receiving face. The magnetic shield plate has an opposed face opposed to the disc when the disc is placed on the receiving face, the opposed face being inclined toward the disc receiving face.
US07911733B2	Tamper evident tape with integrated EMI shielding The present invention provides a multilayer tape for simultaneously providing shielding of electromagnetic interference (EMI) and evidence of tampering with an electronic device to which it is applied. The multilayer tape can be attached to an electronic device to cover a seam or other opening in the electronic device. An embossed surface provides evidence of the disruption of the tape, and the tape includes a conductive adhesive to provide EMI shielding. The multilayer tape is particularly useful for sealing the seams of a disk drive device.
US07911729B2	Information storage apparatus An information storage apparatus includes a housing; a recording medium in which information is recorded, disposed in the housing; a head that records/reproduces information onto/from the recording medium by making contact with or approaching to a surface of the recording medium; a head holding member for holding the head, being rotatable about a predetermined axis and moving the head along the recording medium; a driving section that drives the head holding member to rotate about the axis; a rotation restricting member disposed in a position where the head holding member collides, and that restricts a rotation area of the head holding member; a temperature change detecting section that detects temperature change in the housing; and a drive controlling section that causes the driving section to drive the head holding member to collide with the rotation restricting member, when a detection result by the temperature change detecting section indicates temperature change.
US07911727B2	Controlling motion of storage media An apparatus for writing data to a data storage medium on which data is stored in data groups (N−3 to N+1) comprising tracks extending across and spaced from a reference edge of the storage medium includes a control system operable to cause i) a track reference difference value representative of a difference in a distance between the tracks of an existing data group (N−1) on the storage medium and the reference edge and a distance between the reference edge and the tracks of a data group (N) to be written to the storage medium such that it is the next data group following the existing data group (N−1) or ii) data from which such a difference value can be derived to be included in at least one of frame (A1 to A5) to be written between the existing data group and the next data group such that the tracks of the at least one frame are spaced from the reference edge by substantially the same distance as the tracks of the existing data group.
US07911726B2	Managing data storage media and multiple cartridge memories of a data storage cartridge A data storage cartridge comprises data storage media configured to store data for read and/or write access, wherein the data may be arranged in a plurality of partitions; and a plurality of cartridge memories. A control system, for example of a data storage drive, is configured to allocate at least portions of capacity of the data storage media to cartridge memories of the data storage cartridge; and to provide information defining the allocated portions of capacity to the cartridge memories. Each of the cartridge memories may have a separate user and thus provide access for that user to separate partitions.
US07911725B2	Hard disk, control unit for a disk device, and method for controlling a disk device A hard disk includes: a plurality of servo areas which are elongated radially from a center of the hard disk to an outward thereof over tracks thereof; and a plurality of data areas which are respectively provided between the plurality of servo areas; wherein alternative operation is conducted per servo sector containing one of the plurality of servo areas and a data area provided subsequent to the one of the plurality of servo areas and having a defect created therein when a user sector containing at least a portion of the data area and functioning as an access unit has the defect therein.
US07911716B1	Lens module A lens module including a first lens group, a second lens group, a third lens group, and an aperture stop is provided. The first lens group disposed between a magnified side and a reduced side has a positive refractive power. The second lens group disposed between the first lens group and the reduced side has a negative refractive power. The third lens group disposed between the second lens group and the reduced side has a positive refractive power. The aperture stop is disposed between the first lens group and the second lens group. Additionally, the distance from a center of the second surface to a center of the third surface is L1, an effective focal length is f, and the lens module satisfies 0.4
US07911711B1	Photographing optical lens assembly This invention provides a photographing optical lens assembly including, in order from an object side toward an image side: a first lens element with positive refractive power having a convex object-side surface, a second lens element with negative refractive power having a concave object-side surface and a concave image-side surface, a third lens element with positive refractive power, a fourth lens element with negative refractive power having a convex object-side surface and a concave image-side surface, and at least one of surfaces thereof being aspheric, a plastic fifth lens element having a convex object-side surface and a concave image-side surface with at least one inflection point. An aperture stop is positioned between an imaged object and the third lens element. The photographing optical lens assembly further comprises an electronic sensor on which the object is imaged.
US07911710B2	Telemicroscopic apparatus for the enhancement of simultaneous bi-level telescope viewing of objects both far and near Miniature telescopes of both Galilean and astronomical design are fashioned to allow bi-level viewing, simultaneously, of both magnified scope images and non magnified normal images of both far and near objects or areas. Improvements in bi-leveling telescopes involve: objective lens aspherics, ocular lens materials of high refractive indices, anti-reflective fabric like materials for internal light control. This combination of innovations results in a bi-levelable miniature telemicroscope displaying wider magnified fields which display brighter and clearer imagery. Peripheral chromatic and spherical aberrations are considerably reduced even in shorter length telescope units. These shorter length scopes are spectacle mounted in such a way that the front surface of a spectacle carrier lens is coplanar with the telescope objective lens. Tintings and other coatings can now be applied to any of the scope's lenses or internal disks as well as to spectacle carrier lenses.
US07911707B2	Zoom lens and image pickup apparatus having the same A zoom lens includes, in order from an object side to an image side, a first lens unit having a negative refractive power, a second lens unit having a positive refractive power, a third lens unit having a negative refractive power, and a fourth lens unit having a positive refractive power. In the zoom lens, an interval between every adjacent ones of the first through fourth lens units varies during zooming, the second lens unit includes at least one negative lens, and the third lens unit includes at least one positive lens. An Abbe number and a relative partial dispersion of a material of the at least one negative lens (νd2N, θgF2N) and an Abbe number and a relative partial dispersion of a material of the at least one positive lens (νd3P, θgF3P) are appropriately set.
US07911704B2	Projection optical system and image display apparatus A disclosed projection optical system for projecting and forming an enlarged image of an image displayed in a planar manner as an object includes: a lens system including, from an object side, at least a lens group providing telecentricity to an object space side, a lens group controlling divergence of angles of view, a diaphragm, a lens group converging the angles of view, and a lens group converging and subsequently enlarging the angles of view; and a catoptric system disposed on an image side relative to the lens system and including a mirror having negative power. Each lens group of the lens system and the mirror having negative power share an optical axis and the optical axis is shifted relative to a center of an object surface.
US07911701B2	Micro lens array sheet for use in backlight device and molding roll for manufacturing such micro lens array sheet A micro lens array sheet includes a sheet type base and a plurality of micro lenses arranged on the base. The surface of each micro lens includes a convex part and a peripheral edge part. The convex part has a spherical or elliptical surface. The peripheral edge part is formed between the convex part and the base and curved in a concave shape. Since the surface of the peripheral edge part is curved in a concave shape, the flat part can be narrower than a conventional micro lens array sheet. Therefore, luminance unevenness attributable to the flat part can be suppressed.
US07911699B2	Optical diffuser with UV blocking coating A diffuser is provided in an illumination system, where the diffuser is capable of blocking significant amounts of ultraviolet (UV) radiation. In certain example embodiments of this invention, the diffuser includes a glass substrate which supports a UV coating(s) that blocks significant amounts of UV radiation thereby reducing the amount of UV radiation which can makes its way through the diffuser. In certain example embodiments, the coating may including particulate so that the coating may both diffuse visible light and perform UV blocking.
US07911696B1	Large scale polarizer and polarizer system employing it A large scale polarizer having one or more quartz substrate parts formed as a rectangle, a triangle, or a parallelogram, and a polarizer holder supporting the quartz substrate part. The polarizer holder may be in a lattice structure holding a plurality of quartz substrate parts. A polarizer system employing the large scale polarizer includes a lens making an incident light to a parallel light, the large scale polarizer, and a moving control part coupled to and moving the large scale polarizer.
US07911695B2	Reflex-type screen, screen apparatus, and sheet-like article The present invention provides a reflex-type screen which is wound up by a winding shaft to be retracted and is unwound from the winding shaft in use. The reflex-type screen comprises a reflection layer which reflects an incident light, a transparent surface protective layer provided on a first surface of the reflection layer, and a back surface protective layer provided on a second surface of the reflection layer, wherein as between the surface protective layer and the back surface protective layer, the one that has a higher loop stiffness value, faces inward when the reflex-type screen is wound up by the shaft.
US07911694B1	Screen A screen includes: a screen substrate; a first area disposed on the screen substrate and containing a first main line which has a plurality of first concaves for reflecting light and a first supplementary line which is disposed on the screen substrate at a position adjacent to the first main line and has the same number of second concaves as that of the first concaves formed adjacent to the second concaves, the first main line and the first supplementary line being alternately and repeatedly arranged; and a second area disposed on the screen substrate in a region where an angle of incidence of projection light with respect to the screen substrate becomes larger than in the first area and containing a second main line which has a plurality of third concaves for reflecting light and a second supplementary line which is disposed on the screen substrate at a position adjacent to the second main line and has a larger number of fourth concaves as that of the third concaves formed adjacent to the fourth concaves, the second main line and the second supplementary line being alternately and repeatedly arranged.
US07911691B2	Binoculars having diopter adjustment Binoculars include first and second lens barrels. A bridge interconnects the lens barrels. First and second optical systems are accommodated in respectively the lens barrels. First and second focus lenses are included in respectively the first and second optical systems, for focus adjustment by moving in an optical axis direction. An operation barrel is secured to the bridge, and externally rotatable and movable in the optical axis direction between a focus adjusting position and a diopter adjusting position. A focus adjuster with gear teeth and screw threads moves the first and second focus lenses simultaneously in the optical axis direction when the operation barrel is rotated in the focus adjusting position. A diopter adjuster, including gear teeth, an intermediate rod and screw threads, moves the second focus lens in the optical axis direction when the operation barrel is rotated in the diopter adjusting position.
US07911690B2	Firearm sighting device for viewing around obstacles A viewing device (10) includes a body enclosing a first reflective surface or mirror (40), second reflective surface or mirror (42) and a mechanism for securing the body to a conventional sighting device or telescope (82) on a firearm. First mirror (40) is adapted to direct an incoming light beam (44) onto second mirror (42) so that an outgoing light beam (70) is angled relative to the incoming light beam (44). In use, viewing device (10) can be releasably attached to rear end (80) of telescope (82) and allows a user (90) to remain partially hidden behind obstacle (92) whilst viewing through sighting device (82) and using the firearm. The angular offset of respective light beams (44, 70) is between 35° and 60°.
US07911688B2	Infrared lens, infrared camera, and night vision An infrared lens 1a includes first to third lenses L1 to L3 which are made of zinc sulfide and arranged in this order from an object side. Each of the first to third lenses L1 to L3 is configured as a positive meniscus lens of which convex surface is opposed to the object. The lenses L1 to L3 are formed by heat-press molding raw powder of zinc sulfide using a lens-shaped mold. In addition, a concave surface (the surface opposed to the image side) of the first lens L1 is formed as a diffractive surface.
US07911687B2	Sighted device operable in visible-wavelength or electro-optical/visible-wavelength sighting modes A sighted device has a sight that includes an objective lens lying on an optical axis of the sight so that an input beam is coincident with the optical axis, an eyepiece lens lying on the optical axis, an imaging detector having a detector output signal, a signal processor that receives the detector output signal from the imaging detector, modifies the detector output signal, and has a processor output signal, and a video display projector that receives the processor output signal and has a video display projector output. An optical beam splitter lies on the optical axis. The beam splitter allows a first split subbeam of the input beam to pass to the eyepiece lens and reflects a second split subbeam of the input beam to the imaging detector. An optical mixer mixes the first split subbeam and the video display projector output prior to the first split subbeam passing through the eyepiece lens.
US07911686B2	Optical module and optical communication system An optical module, which is arranged in an optical transmission path, includes an optical amplifying unit configured with a semiconductor, wherein the optical amplifying unit amplifies light input from the optical transmission path, and an optical element configured with a semiconductor, wherein the optical element propagates the light amplified by the optical amplifying unit to the optical transmission path.
US07911684B1	Variable gain erbium doped fiber amplifier Systems, methods, and apparatuses are provided for variable gain optical fiber amplifiers. In one implementation, a variable gain optical amplifier is provided. The amplifier includes a first erbium doped fiber configured to receive an input optical signal, a second erbium doped fiber configured to output an output optical signal, a gain flattening filter positioned between the first erbium doped fiber and the second erbium doped fiber, a pump laser configured to provide energy to the first erbium doped fiber and the second erbium doped fiber, a thermo electric cooler configured to control a temperature of one or more of the first erbium doped fiber and the second erbium doped fiber, and a controller configured to adjust an output from the pump laser and a temperature of at least one of the first erbium doped fiber and the second erbium doped fiber to provide a variable flat spectral gain output.
US07911682B2	Method and structure for nonlinear optics A nonlinear optical crystal having a chemical formula of YiLajAlkB16O48, where 2.8≦i≦3.2, 0.8≦j≦1.2, i and j sum to about four, and k is about 12 is provided. The nonlinear optical crystal is useful for nonlinear optical applications including frequency conversion. Nonlinear optical crystals in a specific embodiment are characterized by UV blocking materials (e.g., some transition metals and lanthanides) at concentrations of less than 1,000 parts per million, providing high transmittance over portions of the UV spectrum (e.g., 175-360 nm).
US07911681B2	Display device, its manufacturing method, and display medium A display system is built up of at least one display cell comprising an assembly which has at least a first electrode and a second electrode and in which there are mutually non-miscible first and second liquids filled, wherein either one of the first and second electrodes is electrically insulated from the first and second liquids, the first liquid has electrical conductivity or polarity, and voltage is applied to one or both of the first and second electrodes, whereby the first liquid and the second liquid can vary in position to produce a display. Even after an applied voltage is shut off at a position to which the first and second liquids have migrated, the positions of the first and second liquids that have migrated are retained to keep memory capability going on.
US07911676B2	Photochromic optical articles prepared with reversible thermochromic materials Provided is a photochromic optical articleincluding: (a) an optical substrate; (b) a thermally reversible photochromic material; and (c) reversible thermochromic material capable of at least partially filtering UV/visible light at or below room temperature and becoming less capable of filtering UV/visible light at temperatures greater than room temperature.
US07911675B2	Optical modulation device and optical semiconductor device An optical modulation device includes: an optical splitter for splitting input light into a first input beam and a second input beam; an optical intensity modulator for modulating the intensity of the first input beam in response to a modulating signal; a variable optical phase shifter for shifting the phase of the second input beam; and an optical combiner for combining an output beam of the optical intensity modulator and an output beam of the variable optical phase shifter into a combined beam and outputting the combined beam. The amount of phase shift produced by the variable optical phase shifter is externally controlled.
US07911668B2	Ultra-short pulse scanning optical system A scanning optical system including an optical source configured to generate an ultra-short light pulse, a dispersion compensation system disposed such that the ultra-short light pulse travels through the dispersion compensation system, an optical deflector configured to rotate about an axis such that the ultra-short light pulse is deflected through a scan angle, and an f-theta scan lens having a group delay (GD) variation versus relative pupil height and group delay dispersion (GDD) variation versus the scan angle that are substantially minimized. The f-theta scan lens is disposed such that the ultra-short pulse is incident on the f-theta scan lens.
US07911662B2	Linear image sensor, image reading apparatus using the same, image reading method, and program for implementing the method A linear image sensor which has an enhanced image resolution, and requires reduced processing time, and is low in cost. A first line sensor has a plurality of light receiving elements linearly arranged at a predetermined pitch in a main scanning direction. A second line sensor has a plurality of light receiving elements linearly arranged at the predetermined pitch in the main scanning direction. The light receiving elements of the second line sensor are shifted from the light receiving elements of the first line sensor by half the predetermined pitch in the main scanning direction. The second line sensor has a length in the main scanning direction shorter than that of the first line sensor, and is arranged in parallel to the first line sensor and spaced from the first line sensor by a predetermined distance in a sub scanning direction perpendicular to the main scanning direction.
US07911660B2	Method and apparatus for data capture from imaged documents Methods and apparatus are disclosed for locating an area of interest within a digital image of a form captured by an imaging scanner. Specific examples include methods and apparatus for optical mark reading with a digital imaging scanner. In many of the methods, an image of a response form is captured by a scanner, and “target” areas for possible responses are located within the image based upon an expected location being adjusted as necessary for certain error-inducing defects in the forms or scanning process. Also disclosed are steps to normalize the darkness values of pixels captured from an optically scanned form.
US07911659B2	Document processing apparatus with image scanning resolution correction function and method thereof An embodiment of a document processing apparatus that has a function of correcting image scanning resolution according to the present invention includes a first carriage mounted with a first reflector that reflects reflected light from a document fixed on an original placing glass plate in a predetermined direction and a second carriage mounted with a second reflector that changes a direction of incident light from the first reflector by 180°. A correction distance from a default position of the second carriage with which predetermined resolution is obtained in plural scanning positions of the first carriage is calculated. An operation of the second carriage is controlled based on the correction distance obtained.
US07911653B2	Device using low visibility encoded image to manage copy history The present invention relates to an image forming device using a low visibility information embedding technique to manage a copy history of an original. The image forming device embeds history information with the use of small dots disappearing by copying, and coordinate information on a region embedded with the history information with the use of large dots not disappearing even by copying. Upon first copying, the image forming device newly creates both of the large dot coordinate information and the small dot history information, and embeds them. Upon second or later copying, the image forming device updates the history information having been read out of the original with that on the current copying, and embeds the updated history information in the history information region indicated by the coordinate information.
US07911650B2	Inkjet printing apparatus, image processing method and image processing apparatus Development of uneven gloss is reduced when printing mutually adjacent printing regions with pigment ink while overlapping boundary regions each other. A joint section and a non-joint section employ mutually different image processing such that a larger amount of ink having a relatively higher gloss level is used in the joint section as compared to the non-joint section. In this way, it is possible to uniform gloss impression between the non-joint section and the joint section and thereby to reduce uneven gloss.
US07911648B2	Method for creating a color transform relating color reflectances produced under reference and target operating conditions and data structure incorporating the same A printer operates under a first set of conditions to create a first set of M of samples and under a target set of conditions to create a second set of K samples. Each sample is produced using the same colorant(s). The actual spectral reflectance for each sample is measured. The actual reflectances for corresponding samples in the first and second sets are used to create a cross-validated, partial-least-squares transform that maps a reflectance from a sample produced under the first set of conditions to a reflectance from a sample produced under the target set of conditions.The transform and reflectances produce a set of predicted reflectances, each representing a sample producible under the target set of conditions using one colorant. The predicted reflectances and the colorant(s) are used to generate a table predicting a color value when the printer operates under the target set of conditions.
US07911640B2	Information processing apparatus, printing data generation method, and printing control program This invention provides an information processing apparatus having a generation function of generating printing data to be transmitted to a printer, including a storage which saves printing data of each original page in an intermediate format together with printing setting data, a printing controller which causes the user to change a printing setting and issue a printing instruction, and a printing data reading unit which reads out the printing setting data from the storage in accordance with the printing instruction, changes the color mode setting of the read printing setting data in accordance with the color mode setting in the printer that is changed by the printing controller, and generates by using the generation function the printing data containing an instruction of changing the color mode on the basis of the printing setting data.
US07911638B2	Image processing apparatus, image processing method, and image processing program An image processing apparatus has a capability of displaying a preview image on a display under the control of a controller even in the middle of a process of reading document pages in a binding reading mode in which a large number of document sheets are read by repeatedly performing reading on a part-by-part basis until all pages of a given set of document sheets have been read. The preview capability enables a user to easily detect if an error occurred in reading one or all of the pages. If a particular page of image data is detected to have an error, re-reading of that page is performed using a scanner unit. The page of image data having the error is discarded and the image data obtained by re-reading is inserted in place of the discarded page. After completion of re-reading, reading of the remaining pages of the document set can continue in the binding reading mode. This leads to a drastic improvement in operational efficiency.
US07911637B2	Printing using multiple paper sources Management of multiple paper sources during printing is provided. A setting screen allows setting a page layout indicating a number of pages to be arranged on a single face of a sheet of paper. An additional setting screen having different setting items allows setting of multiple paper feed sources for a single print job where the paper feed sources include a paper feed source for the first page of the print job and another paper feed source for a page different from the first page. The page layout may be changed in accordance with an operation on a page image indicating a set page layout when the additional setting screen includes the page image. In addition, both setting screens may be provided by a single printer driver.
US07911636B2	Multi-head press data delivery rate control In a printing method and systems, segments of a first print job are distributed to respective downstream processors and are processed to provide printable frames, which are stored in respective print queues. Each print queue supplies a respective one or more printheads. The printable frames are sequentially printed on a continuously transported receiver. A maximum printing duration of each of the print queues is computed periodically during the printing. The transport speed is regulated to trend the maximum printing durations toward a predetermined baseline. The sending of a second print job to the downstream processors is delayed, while processing of the first print job is completed. The delaying is counter to the regulating and reduces the print queues of the first print job non-uniformly relative to the baseline.
US07911635B2	Method and apparatus for automated download and printing of Web pages This invention relates to an image forming apparatus which can prevent the user from repetitively pressing a print button or repeating a print instruction for respective pages, and can save output sheets as much as possible upon printing Web contents over a plurality of pages. An image forming apparatus according to this invention is capable of accessing a network and displaying a Web page. This apparatus includes: URL (Uniform Resource Locator) recording means for recording URL information of a plurality of browsed Web pages; page acquisition means for acquiring a plurality of Web page data corresponding to the URL information recorded by the URL recording means; page integration means for integrating the plurality of Web page data acquired by the page acquisition means; and print means for executing print processing on the basis of the plurality of integrated Web page data.
US07911634B2	Method and system for maintaining device specific image corrections for printers utilizing remote raster image processing An embodiment of the invention generally relates to a method for providing printing services. A database is configured to store data related to a plurality of print engines. The data includes static and time-varying characteristics for each of the print engines of the plurality of print engines. A first print engine is selected from the plurality of print engines. A print job is initiated for the first print engine. The print job is processed at a remote printing service based on data related to the first print engine to create a first print engine print file. The first print engine file is provided to the first print engine.
US07911630B2	Print processing system, control apparatus and control method thereof, and computer-readable recording medium In order to solve one or more problems encountered in the grouping of print jobs spanning a plurality of servers, a control apparatus within a print processing system includes: a designation unit for designating a plurality of print jobs; a generation unit for acquiring the plurality of print jobs from an applicable server, and generating a combined print job that includes the plurality of print jobs; and a setting unit which, when an error has occurred in the acquisition of the plurality of print jobs, is for setting whether to exercise control so as to execute processing of all of the plurality of print jobs after recovery from the error is achieved, or so as to execute processing of print jobs with the exception of the print job in which the error occurred.
US07911628B2	Print system and control method therefor A print system includes an image reading apparatus that describes original document image data read from an original document in a page description language, and transmits the data described in the page description language as a copy job; and a printing apparatus that receives the copy job transmitted from the image reading apparatus, and prints out an image corresponding to the original document image data, wherein the image reading apparatus detects a copy preparing operation that is performed prior to the transmission of the copy job and transmits an occupancy notification for notifying occupancy of the printing apparatus to the printing apparatus according to the result of the detection, and wherein the printing apparatus accepts a copy job from the image reading apparatus in accordance with the occupancy notification.
US07911622B2	System and method for using slow light in optical sensors An optical sensor includes at least one optical coupler and an optical waveguide in optical communication with the at least one optical coupler. The optical waveguide is configured to receive a first optical signal from the at least one optical coupler. The first optical signal has a group velocity and a phase velocity while propagating through at least a portion of the optical waveguide, the group velocity less than the phase velocity. An interference between the first optical signal and a second optical signal is affected by perturbations to at least a portion of the optical sensor.
US07911620B2	Optical sensor utilizing hollow-core photonic bandgap fiber with low phase thermal constant An optical sensor includes an optical coupler. The optical sensor further includes a photonic bandgap fiber having a hollow core and an inner cladding generally surrounding the core. The photonic bandgap fiber is in optical communication with the optical coupler. Light signals counterpropagate through the photonic bandgap fiber and return to the optical coupler. The photonic bandgap fiber has a phase thermal constant S less than 8 parts-per-million per degree Celsius.
US07911619B2	Low-noise fiber optic sensor utilizing a laser source A fiber-optic sensor includes an optical fiber coil and a laser source optically coupled to the coil. Light from the source is transmitted to the coil as a first signal propagating along the coil in a first direction and a second signal propagating along the coil in a second direction opposite to the first direction. The optical paths of the first signal and the second signal are substantially reciprocal with one another and the first signal and the second signal are combined together after propagating through the coil to generate a third signal. The laser source is frequency-modulated or can have a coherence length longer than a length of the coil.
US07911618B2	Holographic interferometry for non-destructive testing of power sources The present invention is connected with the holographic interferometry method and device that provides, to a very high precision, the reconstructing the original waveform of light emitted or reflected by an object. This method allows image resolution close to that of the wavelength of the light being used. The non-destructive method of holographic interferometry coupled with impulse heating of the test article to allow observation of its dynamic response to operating conditions, as described herein, is one of the most effective non-contact automated quality control methods available.
US07911616B2	Sensor and method of detecting the condition of a turf grass A method of detecting the condition of a turf grass is described. According to one aspect of the invention, the method comprises steps of attaching an active sensor to a mower; traversing a section of turf grass; and processing the output of the sensor. A device for detecting the condition of turf grass is also disclosed. The device comprises an array of illuminating devices generating a pattern of illuminating light; a detecting device receiving a pattern of reflected light which is coincident with the pattern of illuminating light; a detecting device adapted to detect stray light from the array of illuminating devices; and a feedback loop controlling the array of illuminating devices. A system employing the device is also disclosed.
US07911613B2	Method and system for predicting print colors A colorimeter of a profile generator calorimetrically measures a color chart after elapse of a sufficient period of time from printing of the color chart, thereby producing post-dry-down colorimetric values. The colorimeter also calorimetrically measures certain patches selected from the color chart immediately after printing thereof, thereby producing pre-dry-down calorimetric values. Colorimetric value differences between the post-dry-down colorimetric values and the pre-dry-down colorimetric values are calculated. Using the calorimetric value differences and the post-dry-down calorimetric values, device-dependent data are converted into colorimetric values, which represent pre-dry-down device-independent data. The colors of a print prior to dry-down are predicted based on such converted colorimetric values.
US07911611B2	Optical system of atomic oscillator and atomic oscillator An optical system of an atomic oscillator that regulates an oscillation frequency by using an optical absorption property by one of a double resonance method utilizing light and micro waves and a coherent population trapping (CPT) method utilizing a quantum interference effect produced by two kinds of resonance light, includes: a light source emitting the resonance light; a gas cell disposed at an emitting side of the light source, sealing a gaseous metal atom therein and transmitting the resonance light through a metal atom gas; a light detecting unit detecting the transmitted light that is transmitted through the metal atom gas; and a fluorescence blocking unit blocking at least a part of fluorescence, which is emitted from the metal atom gas to the light detecting unit, and disposed between the metal atom gas and the light detecting unit.
US07911609B2	Evaporative light scattering detector Embodiments of the present invention are directed to evaporation light scattering detectors having an evaporative chamber having a wall that is in good thermal contact with a heat sink. The heat has a high thermal mass such that a change in temperature of the wall during an analysis is minimized.
US07911603B2	Spectrometric metrology of workpieces using a permanent window as a spectral reference In a spectrographic workpiece metrology system having an optical viewing window, the viewing window is calibrated against a reference sample of a known absolute reflectance spectrum to produce a normalized reflectance spectrum of the reference sample, which is combined with the absolute reflectance spectrum to produce a correction factor. Successive production workpieces are measured through the window and calibrated against the viewing window reflectance, and transformed to absolute reflectance spectra using the same correction factor without having to re-load the reference sample.
US07911597B2	Inspection apparatus to simultaneously measure the sugar content and weight of fruit An inspection instrument includes main unit, Brix testing unit, weight measurement unit, display unit, control unit, and label printer; both of Brix and weight of an object pending test are tested and measured at the same time by the Brix testing unit and the weight measurement unit; resultant data are directly displayed on the inspection instrument by the display unit; data are directly printed on a label; and the label is outputted to be directly attached to the fruit.
US07911594B2	Method to derive physical properties of a sample after correcting the effects of interdetector band broadening Chromatographic separations are often characterized by multiple detectors through which the sample flows serially. As the sample flows between detectors, it becomes progressively diluted due to mixing and diffusion. This phenomenon is traditionally called interdetector “band broadening” and often results in significant distortion of the sample's derived physical properties such as molar mass. This method to characterize the broadening present in a chromatographic system, and an algorithm whereby the narrow peaks of the upstream detector are numerically broadened so they can be compared to the broadened peaks of the downstream detector, is described. Although the technique results in some loss of resolution, its stability and generality allow it a broad range of application. Examples are presented for data collected by dRI, MALS, UV, and viscometric detectors.
US07911593B2	Range finder/velocimeter and range-finding/velocimetry method A laser driver (4) causes a semiconductor laser (1) to operate such that a first oscillation period of monotonically increasing the oscillation wavelength and a second oscillation period of monotonically decreasing the oscillation wavelength alternately exist. A photodiode (2) converts laser light emitted from the semiconductor laser (1) and return light from a measurement target (12) into electrical signals. A counting unit (13) counts the number of interference waveform components obtained from an output signal from the photodiode (2) in each of the first oscillation period and the second oscillation period. A computing device (9) calculates the distance to the measurement target (12) and the velocity of the measurement target (12) from a shortest Lasing wavelength and a longest Lasing wavelength in a period during which the counting unit (13) counts the number of interference waveform components and the counting result obtained by the counting unit (13). This makes it possible to measure the distance to the moving measurement target (12) and the velocity of the measurement target (12).
US07911591B2	Optical transit time velocimeter An L2F velocimeter comprises a probe for insertion into a fluid, the probe having an open area therein to allow the fluid to pass through. The probe comprises an illumination system to direct a pair of light beams, separated by a distance, through the open area, and a collection system to collect forward scattered light scattered from particles in the fluid. The collection system has an optical axis in common with the illumination system. The velocimeter further comprises an electro optical assembly connected to the probe to provide light to the illumination system, to receive light collected from the collection system, to measure a lapse time in fluctuations of the forward scattered light created by particles passing through the pair of light beams and to calculate the velocity of the fluid based on the lapse time and the separation distance.
US07911590B2	Method and system for measuring the speed of blood flow The invention relates to a method for measuring the speed of a particle such as a red blood cell moving inside a flow such as a flow of the blood, using a light scanning microscope. The inventive method comprises the following steps: acquisition of an image by x and y light scanning on a plane containing the object; detection on the plane (x, y) of a mark on the plane (x, y); estimation of the speed vg of the object from the gradient thus determined.
US07911585B2	Measurement apparatus, exposure apparatus, and device manufacturing method A measurement apparatus configured to measure a light intensity distribution in a plane to be measured includes a mask including an opening having a dimension smaller than a wavelength of light for forming the light intensity distribution, and a light-shielding portion being configured to substantially shield the light; a first photoelectric conversion element configured to receive the light passing through the opening and output a light intensity signal; and a second photoelectric conversion element arranged at a position apart from the first photoelectric conversion element, and configured to receive the light transmitted through the light-shielding portion and output a light intensity signal. The mask, and the first and second photoelectric conversion elements are moved along the plane to be measured. The light intensity distribution in the plane to be measured is calculated on the basis of the light intensity signals respectively output from the first and second photoelectric conversion elements.
US07911582B2	Exposure apparatus and device manufacturing method An exposure apparatus illuminates a pattern with an energy beam and transfers the pattern onto a substrate via a projection optical system. The exposure apparatus includes a substrate stage on which the substrate is mounted and that moves within a two-dimensional plane holding the substrate. A supply mechanism supplies liquid to a space between the projection optical system and the substrate on the substrate stage. A recovery mechanism recovers the liquid and an auxiliary recovery mechanism recovers the liquid which could not be recovered by the recovery mechanism.
US07911576B2	Manufacturing method of liquid crystal display device The present disclosure relates to a manufacturing method of a liquid crystal display device. In one aspect, the method may include laminating two or more multipiece boards to each other by way of a sealing material, applying surface polishing to at least one of the multipiece boards using an etchant, and separating the multipiece boards into respective liquid crystal cells by cutting. In further aspects, the sealing material may include individual sealing materials which are formed on regions of the respective liquid crystal cells, an outer peripheral sealing material which surrounds the respective individual sealing materials and forms an opening at least in a portion thereof, and a weir sealing material of a pattern in which the weir sealing material is formed inside the outer peripheral sealing material and in the vicinity of the opening.
US07911575B2	Liquid crystal display for compensating resistance differences of electrode link It is disclosed a liquid crystal display having an electrode pad for compensating for differences in resistance of electrode links. The liquid crystal display including a pixel area and a driving circuit, comprises at least two electrode links each extended from the pixel area; and at least two pads in contact with the driving circuit and the electrode links, each pad being in contact with each electrode link and having a non-resistivity that depends on a length of the each electrode link. Accordingly, resistance differences that depend on the length of the electrode links are compensated for using electrode pads, thereby making signal conductors with substantially equal resistances.
US07911572B2	Liquid crystal display device and method of fabricating the same A liquid crystal display device and fabrication method is provided. The liquid crystal display device includes first and second substrates facing each other and a liquid crystal layer between the first and second substrates. Gate and data lines disposed on the first substrate cross each other to define a pixel region. A first protrusion extends from the gate line at a crossing of the gate line and the data line. A second protrusion extends from the data line at the crossing of the gate line and the data line. A thin film transistor is connected to the gate line and the data line. A pixel electrode in the pixel region is connected to the thin film transistor.
US07911571B2	Electro-optic device, electronic instrument, and projection display The invention provides, an electro-optic device that can include a pair of substrates sandwiching an electro-optic substance therebetween. The electro-optic device can further include a coating member including an antistatic material and being disposed on a surface not opposing the electro-optic substance of at least one of the pair of substrates. Accordingly, problems of dust adhesion on the surface of the electro-optic device and dust projection can be solved so as to enable images with high quality to be displayed.
US07911570B2	Liquid crystal display device The present invention provides a liquid crystal display device comprising at least: a backlight; a polarizer; a first optically anisotropic layer with a retardation of 210 to 300 nm at a wavelength of 550 nm; a second optically anisotropic layer with a retardation of 50 to 140 nm at a wavelength of 550 nm; a third optically anisotropic layer with negative optical anisotropy; a liquid crystal cell comprising upper and lower substrates facing each other and a liquid crystal layer sandwiched between the upper and lower substrates; a fourth optically anisotropic layer with a retardation of 50 to 140 nm at a wavelength of 550 nm; a first optically anisotropic layer with a retardation of 210 to 300 nm at a wavelength of 550 nm; and a polarizer, arranged in piles in this order from the backlight, the second optically anisotropic layer comprising at least a liquid crystal film with a fixed nematic hybrid liquid crystal orientation structure. The liquid crystal display device provides bright images and is high in contrast and less in viewing angle dependency.
US07911569B2	Method of producing optical laminate and image displaying apparatus With regard to an optical laminate having a applied film containing a lyotropic liquid crystalline compound, the present invention provides a method of producing an optical laminate that can prevent this applied film from becoming white turbidity.The present invention is a method of producing an optical laminate having a base material and a applied film laminated on at least one surface of the base material and containing a lyotropic liquid crystalline compound, where the method includes a step A of applying a solution containing at least one kind of a lyotropic liquid crystalline compound on a base material to form a wet applied film, and a step B of drying the wet applied film by spraying a wind onto the surface of the wet applied film simultaneously with this step A or after performing this step A and before the wet applied film is dried. In this step B, the wind is sprayed preferably in a tilted direction, and the wind direction is preferably from 0° to 60° or below relative to the plane of the base material.
US07911562B2	Liquid crystal display and process for producing the same To provide a liquid crystal display, in which substrates are strongly fixed with an even cell gap to exhibit an excellent display quality. The liquid crystal display includes a spacer side substrate and a counter substrate in which the spacer side substrate and the counter substrate oppose a first alignment layer and a second alignment layer to each other; and in which a liquid crystal layer having a liquid crystal material are held between the spacer side substrate and the counter substrate. Additionally, a reactive alignment layer having a curable resin is formed on at least one of the first alignment layer and the second alignment layer, and the spacer side substrate and the counter substrate are bonded to each other with the reactive alignment layer interposed therebetween.
US07911561B2	Method of manufacturing display apparatus using alignment marks A display apparatus includes a main display panel and a sub-display panel. The main display panel includes a first main display substrate and a second main display substrate disposed opposite the first main display substrate to overlap the first main display substrate. The sub-display panel includes a first sub-display substrate and a second sub-display substrate disposed opposite the first sub-display substrate to overlap the first sub-display substrate. The first main display substrate includes a first alignment mark and a second alignment mark, the second main display substrate includes a third alignment mark corresponding to the second alignment mark, the first sub-display substrate includes a fourth alignment mark, and the second sub-display substrate includes a fifth alignment mark corresponding to the fourth alignment mark and a sixth alignment mark corresponding to the first alignment mark.
US07911558B2	Image display apparatus and backlight unit to be used therein An image display apparatus includes a backlight unit including a plurality of light sources arranged in a flat, a reflecting portion for reflecting light from the light sources, a diffuser for diffusing the light from the light sources and the light reflected from the reflecting portion, and a chassis for maintaining or supporting the light sources, the reflecting portion and the diffuser; and a liquid crystal display unit which receives the light diffused by the diffuser of the backlight unit. Concave portions are formed in the chassis at positions corresponding to electrodes of the plurality of light sources, positions corresponding to light-emitting portions of the light sources are arranged in a flat, and a circuit for driving the liquid crystal display unit is provided on a rear surface of a planar portion of the chassis. Accordingly, it is possible to realize a thin lightweight backlight with high luminance and high luminance uniformity.
US07911554B2	Liquid crystal display module A liquid crystal display module includes a liquid crystal display panel, a backlight and a frame-shaped mold frame capable of mounting the liquid crystal display panel thereon and housing the backlight. On a flexible printed circuit board which has one end thereof connected to the liquid crystal display panel, a light source is mounted in a state that the light source faces a light incident surface of a light guide plate in an opposed manner. A plurality of electronic components are mounted in the vicinity of the light source. A housing portion for housing the plurality of electronic components is formed in the mold frame. The plurality of electronic components is mounted in a state that terminals of the electronic components are arranged in the direction perpendicular to the light incident surface of the light guide plate.
US07911553B2	Liquid crystal display device The present invention provides a liquid crystal display device which aims at the reduction of thickness thereof while preventing a holder and a light emitting element of a backlight from coming into contact with each other. The liquid crystal display device includes a backlight and a liquid crystal display panel which is arranged above the backlight, wherein the backlight includes a frame-like holder and a light emitting element which is housed in the inside of the holder, the holder includes support portions which support the liquid crystal display panel, the light emitting element is housed in the inside of the holder at the support portion on a side opposite to the liquid crystal display panel, the support portion includes a recessed portion which is formed on a side opposite to a side which supports the liquid crystal display panel and at a position which faces the light emitting element in an opposed manner. A distal end portion of the light emitting element on a side which faces the support portion in an opposed manner is positioned in the inside of the recessed portion.
US07911552B2	Display substrate, liquid crystal display device including the same, and method of repairing the same A display substrate includes a signal line formed on a substrate, a connection pad receiving a driving signal from the signal line, at least one repair line formed along an outer periphery of the substrate, a first auxiliary repair line overlapping the signal fine at a first position with an insulating layer disposed therebetween, a second auxiliary repair line overlapping the signal line at a second position with the insulating layer disposed therebetween, and a connection line connecting the second auxiliary repair fine to the at least one repair line.
US07911548B2	Electrically-driven liquid crystal lens and stereoscopic display device using the same An electrically-driven liquid crystal lens, which can be switched between a convex lens and a concave lens by changing an optical path difference based on an electric field application, and a stereoscopic display device using the same are disclosed. The electrically-driven liquid crystal lens includes first and second substrates arranged opposite each other and each defining a plurality of lens regions, a plurality of first electrodes formed on the first substrate based on the lens region and spaced apart from one another, a second electrode formed over the entire surface of the second substrate, a liquid crystal layer filled between the first substrate and the second substrate, first and second voltage sources to apply different voltages to the plurality of first electrodes in each lens region, the first and second voltage sources providing the liquid crystal layer between the first and second substrates with a convex lens optical path difference and a concave lens optical path difference, respectively, with respect to each lens region, and a selector to select any one of the first and second voltage sources so as to apply voltages to the first electrodes.
US07911547B2	Stereoscopic 3D liquid crystal display apparatus with slatted light guide A scanning backlight for a stereoscopic 3D liquid crystal display apparatus includes a light guide formed from a plurality of segments. Each segment has a first side and a second side opposite the first side, and a first surface extending between the first and second sides and a second surface opposite the first surface. The first surface substantially re-directs light and the second surface substantially transmits light. The plurality of segments are arranged substantially in parallel and with the second surfaces transmitting light in substantially the same direction to provide backlighting for a stereoscopic 3D liquid crystal display. A first light source is disposed along the first side of each segment for transmitting light into the light guide from the first side, and a second light source is disposed along the second side of each segment for transmitting light into the light guide from the second side. Each segment first and second light source is selectively turned on and off in a particular pattern and each segment light source selectively transmits light into the light guide first side or light guide second side to form a scanning backlight.
US07911546B2	Liquid crystal device and electronic apparatus A liquid crystal device includes a substrate, an opposing substrate disposed so as to face the substrate, a liquid crystal layer interposed between the substrate and the opposing substrate, and a plurality of spacers disposed between the substrate and the opposing substrate and having different aspect ratios from each other.
US07911545B2	Method and apparatus for processing video pictures, in particular in film mode sequences The invention relates to a method for processing video pictures, the video pictures consisting of pixels digitally coded, the digital code word determining the length of the time period during which the corresponding pixel of a display is activated, wherein to each bit of a digital code word a certain activation duration called sub-field is assigned, the sum of the duration of the sub-fields according to a given code word determining the length of the time period during which the corresponding pixel is activated, said method comprising the following steps: detecting the video pictures source mode and the parity between pictures, if the source is in film mode, distributing the total number of sub-fields used for two frame raster in three groups of sub-fields and assigning to a value of a pixel a code word that corresponds to the distribution of the active sub-fields period over the three sub-fields groups, and if the source is in camera mode, distributing the total number of sub-fields used for each frame raster in two groups of sub-fields and assigning to a value of a pixel a code word that corresponds to the distribution of the active sub-fields period over the two sub-fields groups. The invention is applicable to all kinds of displays based on the principle of duty cycle modulation.
US07911541B2	Liquid crystal display device A liquid crystal display device includes a four-color conversion circuit with no chromatic changes in which the chromaticity and luminance of input image data are maintained, a four-color conversion circuit with chromatic changes in which the chromaticity and luminance of input image data are not necessarily maintained, and a selector for switching between the outputs from the two conversion circuits according to a level detection signal from a level detection circuit that detects whether the level of input image data is equal to 100% white level or higher. Display data from the selector is supplied to a liquid crystal section that displays an image by four-color pixels of red, green, blue, and white. The image data conversion circuit controls the light emission quantity of a backlight (BL) as white color, and converts input image data so that the level of data displayed on the liquid crystal section becomes uniform.
US07911539B2	VSB reception system with enhanced signal detection for processing supplemental data A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.
US07911538B2	Estimation of block artifact strength based on edge statistics A method and apparatus estimates the strength of block artifacts in compressed video is described. Block artifacts are associated with the block-based image/video compression schemes. The block artifacts deteriorate the quality of compressed image and video, especially at low bit rates. A deblocking method measures the strength of the block artifacts at each block boundary and adjusts the deblocking parameters accordingly to improve the performance of the overall deblocking process. A method and device to measure the strength of block artifacts based on the global and local edge information of the current picture is provided.
US07911537B2	Multichannel video reception apparatus and method for digital broadcasting Provided is a multichannel video reception apparatus of a mobile communication terminal for digital broadcasting. An RF processor receives a broadcast signal of a digital broadcast service via an antenna. A baseband processor processes the received broadcast signal in a baseband. A controller controls the RF processor and the baseband processor to receive the broadcast signal including video frames of a main channel and a sub-channel. A memory stores a program code, reference data, and updatable user data, for an operation of the controller. A video processor receives the video frames of the main channel and the sub-channel, decodes the latest key frame of the sub-channel if a key frame of the main channel occurs while decoding the video frames of the main channel, and after decoding the key frame of the sub-channel, decodes the frames of the main channel. A display divides the decoded video signal into a main-channel image and a sub-channel image and separately displays the images. An audio processor outputs an audio signal of the digital broadcast service included in the broadcast signal.
US07911535B2	Image signal processing apparatus and method of controlling the same According to one embodiment, a memory stores demonstration image data. A set module outputs a set signal to order a demonstration. An image reading module reads the demonstration image data from the memory in response to the set signal. And a display control module controls execution of a demonstration mode which outputs the read demonstration image data for displaying, next controls execution of a display mode which outputs on-air image data for displaying at the end of the demonstration mode, and controls execution of a shift in the demonstration mode after the display mode being elapsed a predetermined time.
US07911531B2	Battery, camera and camera system A battery takes in a charge current value or a discharge current value from a current detection device at predetermined sampling intervals. Then, based upon the current value, a power consumption quantity representing the extent to which power has been consumed during a sampling interval is calculated and a total power consumption quantity is determined by sequentially adding the power consumption quantity corresponding to each sampling interval. Based upon the total power consumption quantity calculated at each sampling interval, a determination device determines as to whether or not the battery needs to be refreshed, and the determination results are transmitted to the camera. The camera informs the user that the battery needs to be refreshed if the determination device judges that a refresh operation is necessary. The sampling interval may be set longer when the power to the camera is in an OFF state compared to when the power to the camera is in an ON state.
US07911529B2	Digital camera and personal digital assistant with the same A digital camera includes at least one shutter blade in which opening and closing operations of an exposure aperture are performed using an electromagnetic actuator. The digital camera also includes an image sensor converting light from an object into image information, and an image processing circuit which stores the image information converted by the image sensor in an image memory so that the image information can be fetched and such that the image processing circuit has terminals for connecting the image processing circuit to an estimation display device. Further, the digital camera includes an exposure control circuit including a reference table controlling the amount of light exposure and at least one correction table allowing the amount of light exposure controlled by the reference table to be corrected, and includes a driving circuit driving the electromagnetic actuator according to an output signal of the exposure control circuit.
US07911523B2	Automatic adjuster for image capture circuit A reference charge generator provided on an image capture element generates reference charge. The reference charge is transferred through a vertical transfer section as is signal charge of a pixel which is generated by a photoelectric converter. A reference signal corresponding to the reference charge is output from the image capture element. Data of a digital value obtained by conversion from the reference signal and a digital value which is obtained from the reference signal when the image capture element ideally operates are compared to estimate the state of a pulse for driving the image capture element. The state of the pulse is adjusted such that the pulse has optimum phase and duty.
US07911522B2	Amplification-type CMOS image sensor Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.
US07911521B2	Photoelectric conversion device and image pickup apparatus with symmetry about a voltage supply line In a photoelectric conversion device, groups of unit pixels are arranged in a well, where each of the unit pixels includes photoelectric conversion elements, an amplifier transistor, and transfer transistors. The photoelectric conversion device includes a line used to supply a voltage to the well, a well-contact part used to connect the well-voltage-supply line to the well, and transfer-control lines used to control the transfer transistors. The transfer-control lines are symmetrically arranged with respect to the well-voltage-supply line in respective regions of the unit-pixel groups.
US07911515B2	Imaging apparatus and method of processing video signal Calculation is made about standard deviations of portions of high-frequency components GH, RH, and BH along respective predetermined directions. The portions of the high-frequency components GH, RH, and BH represent a prescribed number of pixels including an interpolation pixel located at a position corresponding to none of photosensor pixels in G, R, and B image sensors. The smallest one is detected among the calculated standard deviations. The predetermined direction relating to the detected smallest standard deviation is labeled as a highest-correlation direction in which the highest correlation occurs. Interpolation is implemented in response to portions of the high-frequency components GH, RH, and BH which correspond to the highest-correlation direction to generate a high-frequency interpolation-result signal RGBHI for the interpolation pixel and other pixels. Low-frequency components GL, RL, and BL are combined with the high-frequency interpolation-result signal RGBHI to generate high-definition green, red, and blue signals G(HD), R(HD), and B(HD).
US07911513B2	Simulating short depth of field to maximize privacy in videotelephony An arrangement for simulating a short depth of field in a captured videophone image is provided in which the background portion of the image is digitally segregated and blurred to render it indistinct. Thus, the displayed video of a user in the foreground is kept in focus while the background appears to be out of focus. Image tracking or fixed templates are used to segregate an area of interest that is kept in focus from the remaining captured video image. Image processing techniques are applied to groups of pixels in the remaining portion to blur that portion of the captured video image. Such techniques include the application of a filter that are alternatively selected from convolution filters in the spatial domain (e.g., mean, median, or Gaussian filters), or frequency filters in the frequency domain (e.g., low-pass or Gaussian filters). User-selectable control is optionally implemented for controlling the type of foreground/background segregation technique utilized (i.e., dynamic face-tracking or fixed template shape), degree of blurring applied to the background, and on/off control of the background blurring.
US07911511B2	Imaging device, display control device, display device, printing control device, and printing device In an imaging device, a display control device, and a display device which are operable to conveniently display reduced images in accordance with a motion and an attitude at the time of shooting, a motion detection section detects the motion of the imaging device during continuous shooting. A recording section records reduced images of the shot images obtained by the imaging device, and motion information on the motion of the imaging device corresponding to the reduced images. An image extraction section extracts a plurality of the reduced images of the consecutively shooting from among the recorded reduced images. An image display control section causes a display section to display the extracted reduced images. An image display control section arranges the extracted reduced images in accordance with the motion information and causes the display section to display the extracted reduced images.
US07911507B2	Solid-state image pickup device in which the saturated signal quantity of a W pixel is controlled In a pixel unit, cells are arranged in rows and columns two-dimensionally. Each of the cells accumulates signal charge obtained by photoelectrically converting light incident on photoelectric conversion section and outputs a voltage corresponding to the accumulated signal charge. On the cells, W, R, G, and B color filters are provided. Analog signals output from the W pixel, R pixel, G pixel, and B pixel are converted into digital signals by an analog/digital converter circuit, which outputs a W signal, an R signal, a G signal, and a B signal separately. A W signal saturated signal quantity is controlled by a saturated signal quantity control circuit. Then, a signal generator circuit corrects the R signal, the G signal, and the B signal using the W signal, the R signal, the G signal, and B signal output from the analog/digital converter circuit and outputs the corrected R, G, and B signals.
US07911505B2	Detecting illuminant flicker A method of determining when an image capture device with a rolling shutter is in an environment having a flickering illuminant by using autocorrelation or frequency analysis of difference vectors produced from first and second captured images.
US07911503B2	Information processing apparatus and information processing method A measurement line segment projection unit (400) projects, onto a sensed image, a three-dimensional model which is arranged at the position and orientation of a physical object (199). A search range is set for each side of the virtual object projected onto the sensed image, near the side of the virtual object in the sensed image based on a positional relationship between the side and other sides of the virtual object. A side of the physical object (199) on the sensed image is searched for within the search range for each side of the virtual object. The position and orientation relationship between the physical object (199) and an image sensing device (50) is calculated using the correspondence relationship, determined based on the search result, between each side of the three-dimensional model projected onto the sensed image and each side of the physical object (199) located on the sensed image.
US07911499B2	Digital camera A sample analyzing apparatus includes: an irradiation system which irradiates a charged particle onto a sample having a concave portion partially on a surface thereof; a light condensing reflecting mirror which condenses luminescence obtained from the surface based on the irradiation of the charged particle; a light detector which detects the luminescence guided to the light condensing reflecting mirror; a charged particle detector which detects the charged particle reflected from the surface of the sample as a reflection charged particle; and a signal processor which controls the irradiation system to irradiate the charged particle intermittently, which obtains a shape of the sample on the basis of a detection signal outputted from the charged particle detector, and which identifies a material of the sample on the basis of an attenuation characteristic of a detection signal outputted from the light detector in a period from a time point in which the intermittent irradiation of the charged particle by the irradiation system is ended to a time point in which the intermittent irradiation of the charged particle by the irradiation system is started.
US07911494B2	Video overlay device of mobile telecommunication terminal A video overlay device of a mobile telecommunication terminal comprises a multiplexer for outputting at least one of a first video data and a second video data; and a video overlay unit for overlaying at least one of the first and second video data with graphic data in accordance with a predetermined ratio. The multiplexer selectively outputs at least one of the first and second video data based on input video selection signals provided by a central processing unit (CPU).
US07911491B2	Apparatus and method for controlling power of laser diode having optical power compensation An apparatus includes an output voltage sensing unit, which senses an output voltage of a laser diode, which has been sampled during a power control period and transmits the sensed output voltage of the laser diode to an output voltage control unit; the output voltage control unit, which obtains an error voltage between a reference voltage and the sensed output voltage of the laser diode and generates a control voltage by proportionally integrating the error voltage; and an optical power compensation unit, which receives the control voltage and generates a compensated control voltage by compensating for an optical power deviation on the photosensitive drum during the printing period.
US07911488B2	Ion print head and image forming apparatus using the same An ion print head and image forming apparatus using the same includes at least one discharge cell array structure having microelectrodes to form an electrostatic latent image on an insulation layer of an electrostatic drum by selectively applying charged particles to the insulation layer. The at least one discharge cell is provided with a plurality of discharge elements to emit the charged particles, and a controller to control the plurality of discharge elements. Each of the plurality of discharge elements includes a base, a microelectrode disposed on the base to emit the charged particles toward the insulation layer, and a control electrode spaced apart from the base and having a hole therein through which the emitted charged particles pass and to control the emission of the charged particle from the microelectrode.
US07911483B1	Graphics display system with window soft horizontal scrolling mechanism A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. A soft horizontal scrolling mechanism preferably enables placement of the contents of graphics windows on arbitrary positions on a display line. By blanking out one or more pixels aligned to the start address, the content of a graphics window may be shifted to the left. By accessing graphics data of an address just prior to the start address and blanking out one or more pixels aligned to that address, the content of a graphics window may be shifted to the right.
US07911481B1	Method and apparatus of graphical object selection Disclosed are various approaches for allowing the selection of graphical objects in a graphical user interface. In one embodiment, selection overlays are generated for each of a plurality of graphical objects. The selection overlays are sorted into layers over the layers of the graphical objects, with the sorting based in part of a characteristic of the associated graphical objects other than the layers to which those objects are assigned. The plurality of objects and the selections overlays (which may be transparent) are displayed. In response to user input (e.g., mouse click or mouse motion) relative to a screen region associated with one selection overlay, the state of the overlay and the associated graphical object are updated and displayed accordingly.
US07911479B2	Gamut mapping A mapping technique is disclosed that maps color image data of an image displayed on a first image display device to output color image data for display on a second image display device. This mapping technique maps the color gamut of the first image display device to the color gamut of the second image display device while controlling one or more characteristics of the color image data, and generates one or more lookup tables that correspond to the gamut mapping, for example. The color image data is then mapped to the output color image data based on the lookup tables.
US07911478B2	Drawing device, drawing method, and drawing program A display device includes a wavelet transform unit for transforming an original image into wavelet coefficients using a Harr wavelet transform formula, a level obtaining unit for obtaining a mipmap level of a mipmap image. The display device also includes an inverse wavelet transform unit for receiving and subjecting at least a portion of the wavelet coefficients obtained by the transformation by the wavelet transform unit, to an inverse transform using an inverse Harr wavelet transform formula until an order having a value equal to the mipmap level is obtained, and outputting an image represented by at least a portion of a low-frequency component of wavelet coefficients having the order having the value equal to the mipmap level. Additionally, the display device includes a polygon drawing unit for drawing the image output by the inverse wavelet transform unit, as a mipmap image, on the polygon image.
US07911476B2	Mulitmedia data processing apparatus with reduced buffer size A multimedia data processing apparatus with reduced buffer size includes an accessing unit and a data processing module. The accessing unit has a plurality of buffers therein. The data processing module includes a processing unit and a real-time buffer. The processing unit processes the data temporarily stored in the accessing unit and the real-time buffer. By adding the real-time buffer, the size of the buffer in the accessing unit and the maximum bandwidth requirement can be reduced thereby increasing the system performance.
US07911468B2	Storage medium storing a program for controlling the movement of an object As a virtual plane used when converting a designation point, which is a touched position on a touch panel, into a control point, in a virtual three dimensional space, used for controlling a movement of an object, a first virtual plane is used when a ball is an object to be controlled; a second virtual plane is used when an object to be operated is a dog and an action mode thereof is an attention mode; a third virtual plane is used when the object to be operated is the dog and the action mode thereof is a lick mode; a fourth virtual plane is used when the object to be operated is the dog and the action mode thereof is a rope shake mode; and a fifth virtual plane is used when the object to be operated is the dog and the action mode thereof is a circle mode.
US07911461B2	Current distributor A current distributor that simplifies the architecture and reduces the connecting wires. According to the invention, current distributor can be utilized for distributing the current evenly through a plurality of rows of light-emitting diodes. Each respectively is coupled between a supply pin and a first current pin. The first current pin is coupled to the current distributor. The current distributor is coupled to a total current pin. The current distributor comprises a first resistor, a plurality of first clamp circuitries, a second clamp circuitry and a plurality of first transistors. The first resistor has a first end and a second end. The first end is coupled to the supply pin. Each of the plurality of first clamp circuitries has a first terminal and a second terminal. Each of the first terminal of the first clamp circuitries is coupled to the second end of the first resistor. Each of the second terminal of the first clamp circuitries is coupled to the first current pin. The second clamp circuitry has a first terminal and a second terminal. The second terminal of the second clamp circuitry is coupled to the second end of the first resistor. The plurality of first transistors has a first terminal, a second terminal and a gate. The first terminal is coupled to the first current pin. The gate is coupled to the cathode of the second diode. The second terminal is coupled to the total current pin.
US07911459B2	Pixel circuit A pixel circuit has a light emitting diode, a driving transistor, a capacitor, and a first switch. The light emitting diode had a first end to receive a first supply voltage. The driving transistor has a source and drain respectively receiving a second supply voltage and coupled to a second end of the light emitting diode. The capacitor has a first end coupled to a gate of the driving transistor and a second end receiving a reference voltage. The first switch is controlled by a first scan signal to couple the source of the driving transistor to the second end of the capacitor. The pixel circuit operates in a pre-charge period, a programming period, and an emission period sequentially, and the first scan signal is asserted to turn on the first switch during the pre-charge and emission periods.
US07911458B2	Display control circuit A display control circuit includes a driver circuit DR which drives a plurality of pixels, and a driver control circuit which controls the driver circuit. The driver control circuit includes a control bus which transfers instruction data, an operation setting unit which executes operation settings in accordance with the instruction data from the control bus, and a gateway unit provided for a case in which the instruction data is internally generated and output to the control bus, and is capable of enabling or disabling an instruction data output to the control bus in accordance with a control input signal.
US07911451B2	Method for searching menu in mobile communication terminal The present invention relates to a method for searching a menu in a mobile communication terminal, wherein a plurality of main menus and sub menus of each main menu are simultaneously searched on a single menu screen using various navigational keys.
US07911449B2	Mouse with direction-adjustable connecting wire A mouse with direction-adjustable connecting wire includes a housing, a connecting wire and a turntable. The connecting wire has one end that is embedded in the housing. The turntable is pivotably disposed in the bottom of the housing, and the connecting wire is passed through the turntable and located therein. Thereby, a direction-adjustable connecting wire is designed to make the mouse is easy to be operated and has better controllability without causing the operational inconvenience; for this reason, it takes fully into account the requirements and operation habits of the different users.
US07911444B2	Input method for surface of interactive display An interactive display system configured for detecting an object or user input provided with an object. The system includes a display surface on which graphic images are displayed, one or more scanning light sources configured for scanning the interactive display surface, and a light detector configured for detecting light reflected from an object that is adjacent to or in contact with the interactive display surface. A computing system storing machine instructions is in communication with the scanning light source and the light detector. When executed, the machine instructions cause the computing system to illuminate the interactive display surface with the scanning light source, to detect light with the light detector that is reflected from an object after illumination with the light source, and to generate an output signal based on the detected light that has been reflected from an object on or adjacent to the interactive display surface.
US07911443B2	Driving-control device and method of backlight module A driving-control device of a backlight module receives a first digital burst signal and includes a start signal generating unit, a counter unit, a memory unit, a comparator unit and a driving unit. The start signal generating, unit generates a digital start signal on receiving the first digital burst signal. The counter unit is electrically connected to the start signal generating unit and sequentially generates counting values on receiving the digital start signal. The memory unit stores at least one target counting value. The comparator unit is electrically connected to the counter unit and the memory unit and sequentially generates triggering signals according to the counting values and the target counting value. The driving unit is electrically connected to the comparator unit and outputs sequentially delayed driving signals on receiving the triggering signals.
US07911438B2	Area lighting device and liquid crystal display device having the same The invention relates to an area lighting device using an LED as a light source and a liquid crystals display having the same. An object is to provide an area lighting device which can provide stable display quality and a liquid crystal display device having the same. An area lighting device is configured to have a light source part provided with a plurality of LEDs; a dummy liquid crystal panel which has a pair of substrates and a liquid crystal layer encapsulated between the substrates, and to which light from the light source part partially enters; a chromaticity sensor which senses a chromaticity of light transmitted through the dummy liquid crystal panel; and an LED control part which compares the sensed chromaticity with a set target value, and controls the plurality of the LEDs so that the chromaticity becomes close to the target value.
US07911437B1	Stacked amplifier with charge sharing Column drivers for graphics displays can be arranged as stacked amplifiers with various switching circuits arranged in a charge sharing topology. The apparatus includes an upper and lower amplifier circuit, an input switching circuit, and an output switching circuit. The upper and lower amplifier circuits drive column lines can be swapped during operation by the input and output switching circuits. During a charge share operation, the outputs of the amplifiers are coupled to a common voltage via the output switching circuit, while the transistors from the output stage of each amplifier is reconfigured for charge sharing. Minimally sized transistors are utilized inside the output stage of the amplifiers for charge share configuration. Since the existing transistors from the output stage are utilized for the charge sharing operation, additional space savings and power reductions can be realized.
US07911433B2	Methods and apparatus for repairing inoperative pixels in a display Methods and apparatus for repairing inoperative pixels in a display are provided. In particular, the present invention provides methods and apparatus for improving the effective yield rates of displays, such as liquid crystal micro-displays, by disconnecting inoperative pixels from their defective drive circuitry and tying such pixels to the working drive circuit of a nearby pixel. A display can be repaired without the need to provide redundant drive circuitry underneath each pixel.
US07911431B2	Liquid crystal display device and method of driving the same A liquid crystal display device includes first to third FRC portions. The first to third FRC portions converts n-bit R, G and B input data into (n−m)-bit R, G and B data having first to third FRC patterns for consecutive P frames according to lower m bits of the n-bit R, G and B input data, respectively. The (n−m)-bit R, G and B data for each of the consecutive P frames correspond to R, G and B sub-pixels of the pixels of the pixel block, respectively.
US07911429B2	Programmable liquid crystal display device for controlling viewing angle and driving method thereof A liquid crystal display device includes a liquid crystal panel having a plurality of color subpixels and a plurality of interference subpixels, an input unit for inputting color subpixel data to be applied to the color subpixels, a programmable interference data generating unit for storing viewing mode data to be applied to the interference subpixels, the viewing mode data including interference subpixel data and offset subpixel data, the programmable interference data generating unit selectively outputting one of the stored interference subpixel data and offset subpixel data, and a panel driving unit for driving the color subpixels and the interference subpixels in response to the color subpixel data and selected one of the interference subpixel data and the offset subpixel data.
US07911427B2	Voltage based data driving circuit, light emitting display using the same, and method of driving the light emitting display A data driving circuit for driving pixels of a light emitting display to display images with uniform brightness may include a current sink that is capable of receiving, via a data line, a predetermined current from a pixel to enable the data driving circuit to generate a compensation voltage for the pixel. The compensation voltage may compensate for variations among the pixels of the display. Variations among the pixels may result from different electron mobilities and/or threshold voltages of transistors included in the pixels. The value of the predetermined current may be equal to or higher than a value of a minimum current employable by the pixel to emit light of maximum brightness. The maximum brightness of the pixel may correspond to a brightness emitted by the pixel when a highest one of a plurality of set gray scale voltages is applied to the pixel.
US07911423B2	Organic electro luminescence device An organic electro luminescence device includes first, second, and third switching elements connected in series with each other, the first switching element controlled by a first signal, and the second and third switching elements controlled by a second signal, the second signal being different from the first signal, a first driving element connected to a power source, a storage capacitor, and the first, second and third switching elements, and a second driving element connected to the power source, the storage capacitor, an organic light emitting diode, and the third switching element.
US07911422B2	Method and apparatus for driving plasma display panel using selective writing and erasing A plasma display driving method and apparatus for stabilizing an initialization upon selective erasing in a case of simultaneously performing a selective writing and a selective erasing is disclosed. In the method and apparatus, at least one selective writing sub-field for selecting on-cells using a writing discharge is arranged within a portion of one frame period, and at least one selective erasing sub-field for selecting off-cells from the on-cells using an erase discharge is arranged within the remaining interval of one frame period other than a time period arranged with the selective writing sub-field. A normal sustaining pulse is applied to the selected on-cells to sustain a discharge of the on-cells, and an initialization pulse having at least one of a pulse width and a voltage level set to be larger than the normal sustaining pulse is applied prior to said selective erasing sub-fields.
US07911421B2	Driving device and method for plasma display panel A plasma display apparatus and a method of driving the plasma display apparatus are provided. According to an embodiment, the plasma display apparatus is driven by dividing a sub-field into at least an address period and a sustain period. The apparatus includes a timing controlling unit to vary a length of the sustain period according to a data pattern associated with at least one address electrode.
US07911416B2	Plasma display panel A plasma display panel. A first substrate and a second substrate are provided opposing one another with a predetermined gap therebetween. Address electrodes are formed on the second substrate. Barrier ribs are mounted between the first substrate and the second substrate, the barrier ribs defining a plurality of discharge cells and a plurality of non-discharge regions. Phosphor layers are formed within each of the discharge cells. Discharge sustain electrodes are formed on the first substrate. The non-discharge regions are formed in areas encompassed by discharge cell abscissas and ordinates that pass through centers of each of the discharge cells. Also, external light absorbing members are formed between the second substrate and the barrier ribs layer at areas corresponding to locations of the non-discharge regions.
US07911414B1	Method for addressing a plasma display panel The priming or conditioning of an AC gas discharge plasma display panel for improved selective write and selective erase which comprises addressing n number of rows in an order or sequence that is changed from frame to frame such that later rows to be addressed are advanced in the sequence with each subsequent frame. Each frame consists of the addressing of all n rows. Specific embodiments include the use of plasma-shells, plasma-tubes, and/or combinations thereof.
US07911408B2	Management system of monitor A management system of a monitor including at least one first monitor, a first computer to supply a video signal to the at least one first monitor having a first controller to transmit monitor information about the at least one first monitor through a network, a second monitor, and a second computer having a database to store the monitor information received through the network, and a second controller to display a graphic user interface to display the monitor information stored in the database on the second monitor. With this configuration, the monitor management system checks and/or manages a plurality of monitors connected to a plurality of computers connected to each other through a network from another computer.
US07911402B2	Antenna and method for steering antenna beam direction An antenna comprising an IMD element, and one or more parasitic and active tuning elements is disclosed. The IMD element, when used in combination with the active tuning and parasitic elements, allows antenna operation at multiple resonant frequencies. In addition, the direction of antenna radiation pattern may be arbitrarily rotated in accordance with the parasitic and active tuning elements.
US07911401B2	Earphone antenna and wireless device including the same An earphone antenna is provided that can eliminate high-frequency adverse effects on a wireless device transmitted from a human body via an earphone. The earphone antenna can ensure receiver sensitivity required for a signal in a wide frequency range without any sensitivity control operation and can transmit audio signals from a television receiver to an earphone unit. Two pairs of audio/high-frequency signal lines (8La), (8Lb), (8Ra), and (8Rb) corresponding to the left and right earphone units (12L) and (12R) are connected to a balun (4). Terminals of the two pairs of audio/high-frequency signal lines remote from the balun are connected to the left and right earphone units (12L) and (12R) via loading coils (LLa), (LLb), (LRa), and (LRb). The Terminals of the two pairs of audio/high-frequency signal lines remote from the balun are further connected to each other by a pair of conductive lines (20a) and (20b). The loading coils (LLa), (LLb), (LRa), and (LRb) have low impedance for a fundamental frequency and have high impedance for blocking a specific frequency higher than the fundamental frequency. In addition, the two pairs of audio/high-frequency signal lines (8La), (8Lb), (8Ra), and (8Rb) are used as transmission means for transmitting audio signals to the left and right earphone units (12L) and (12R).
US07911399B2	Antenna assembly An antenna assembly assembled in an electric device includes an inner antenna comprising a planar radiating element, a cover fixing the antenna on the electric device and comprising at least one protrusion to fix the radiating element.
US07911396B2	Meandered antenna The invention concerns a meandered antenna comprising: a first meandered conductive element including a plurality of arms, two consecutive arms forming a meander; a second conductive element forming with the first conductive element a radiating two-wired line, the second conductive element including a plurality of arms engaged each between two consecutive arms of the first conductive element. The antenna is characterized in that it is designed to operate without ground element, in particular without ground plane.
US07911393B2	Antenna device An antenna device includes a dielectric substrate, an electric supply line that includes a microstrip line and is formed on the dielectric substrate, an antenna element that includes a microstrip line and is formed on the dielectric substrate, and a reflector plate disposed on the dielectric substrate at a predetermined angle of inclination. The reflector plate is allowed to move relative to the dielectric substrate while keeping the predetermined angle of inclination.
US07911391B2	Dual-band antenna A dual-band antenna has a feeding conductor with a feeding point and a connecting portion extending downwardly from the feeding conductor. A first radiating conductor and a loop protrusion respectively extend outward from two opposite sides of the connecting portion. A grounding portion faces the loop protrusion and is spaced apart from the feeding conductor to form a small gap therebetween. A loop connection is disposed away from the feeding conductor and connects an upper portion of the loop protrusion and an upper portion of the grounding portion.
US07911383B2	Phased array antenna system with two dimensional scanning A phased array antenna system with two dimensional scanning includes a two dimensional array A of antenna elements A1,1 to A12,12 arranged in lines; each line is associated with a respective first rank corporate feed network 161 to 1612 having outputs 171,1 to 1712,12 connected to respective antenna elements A1,1 to A12,12 and inputs for variable relative phase input signals. These corporate feed networks each have first and second inputs A1/B1 to A12/B12 connected respectively to outputs 171 CD/1712CD to 171EF/1712EF of different second rank corporate feed networks 16CD and 16EF. The corporate feed networks 161 to 16EF convert input signals of variable relative phase into relatively greater numbers of output signals for a phased array. The system (30) includes a phase varying circuit 40 for varying phase differences between input signals to each second rank corporate feed network 16CD or 16EF and between input signals to different second rank corporate feed networks 16CD and 16EF to provide control of antenna beam direction in two dimensions.
US07911382B2	System and method of transferring location assistance information between electronic devices A system and method for exchanging location assistance information between electronic devices using a near field communication (NFC) interface. Positioning satellite signals are received from one or more position satellites. Location assistance information is generated based at least in part on the received positioning satellite signals and/or navigation information. The location assistance information is transferred through a near field communication interface from the first electronic device to another electronic device, wherein the location assistance information includes one or more contemporaneous positioning satellite signals received by the first electronic device.
US07911379B2	Construction equipment component location tracking In a method for construction equipment component location tracking, a wireless mesh network communication is initiated between a component monitor and a component information unit which is mechanically coupled with the component. An identity of the component is received at the component monitor via the wireless mesh network communication. A Global Navigation Satellite System (GNSS) receiver of the component monitor is utilized to ascertain a location of the component at a completion of an inventory action.
US07911377B2	Method for obtaining precise tracking frequency of GPS signal A method for obtaining a precise tracking frequency of a global positioning system (GPS) signal is described, which includes the following steps. A plurality of data from a satellite is continuously received. Each data has a tracking frequency. A plurality of phase differences of the received data is calculated. A phase difference average of the obtained phase differences is calculated. A frequency difference is calculated by the calculated phase difference average and a constant frequency parameter. A new tracking frequency is calculated by the frequency difference and a tracking frequency of the last data among the plurality of received data. A next data is received by the calculated new tracking frequency. A new tracking frequency is obtained by repeatedly calculating the average phase differences of the plurality of data received from the satellite and a constant frequency parameter, so as to obtain the most precise tracking frequency.
US07911373B2	Compact active phased array antenna for radars A radar system, including: a compact, active phased array antenna for transmission and reception of a focused radiation beam, circuits for providing signals to produce or detect a radiation beam by the phased array antenna and to control or detect the direction of the radiation beam, and wherein the radar is adapted to be mounted on a missile and scan a selected area proceeding the direction of motion of the missile.
US07911372B2	Active imaging using satellite communication system An active imaging system uses communication satellites to identify the location and physical attributes of a target. A transmitter emits a time-synchronized signal directed to a target. The transmitter radiates L-band RF signals. The transmitter can be positioned on an airborne or ground platform. A constellation of communication satellites receives and time stamps the time-synchronized signal reflected from the target to form an active image of the target. The constellation of communication satellites have multiple roles other than active imaging, such as providing voice and data communications. The time-synchronized signal reflected from the target can be received by multiple satellites within the constellation of communication satellites or by multiple antenna disposed on one satellite within the constellation of communication satellites.
US07911368B2	Sample error minimization for high dynamic range digitization systems A blending circuit is disclosed to be operable to combine plurality of digital outputs received from an analog to digital conversion system to create a composite digital signal. The analog to digital conversion system receives analog signals originated from multiple but substantially the same source signals, wherein the source signals being scaled to different degrees. A blending circuit deploys a blending factor to combine the digital outputs in a manner which blends and/or adjusts portion of each digital output being used to avoid over-flown portion of the digital outputs and to minimize phase and/or amplitude discontinuity of the composite digital signal.
US07911365B2	Apparatus and method for analog-to-digital converter calibration An analog-to-digital converter (ADC) is provided. The ADC includes a reference voltage generator configured to generate reference voltages, an analog to digital converter core configured to receive an input signal and the reference voltages and to generate a digital signal representative of the input signal, the digital signal having a number of bits, and a controller configured to determine a quality of the input signal, and, based on a quality of the input signal, to control the number of bits of the digital signal and values of the reference voltages.
US07911364B1	Interleaver for turbo equalization A plurality of “local” interleavers replaces a single global interleaver for processing encoded data. If the encoded data may be represented as a matrix of data blocks, or “circulants,” each local interleaver can be the size of one or a small number of circulants. Thus, for example, if the matrix has a certain number of rows and columns, the number of local interleavers may be equal to the number of columns. Each local interleaver is small so latency is low.
US07911363B2	Apparatus and method for inputting characters in portable electronic equipment An apparatus and method are provided for inputting characters in electronic equipment using a limited number of keys. A key input device may include a play/pause key (hereinafter, referred to as a ‘play key’), a repeat key, a record key, up/down/left/right arrow keys, and a confirm key. The key input device may generate key data corresponding to input keys. A flash memory may store a key table in which a character code, which may be a combination of certain key data, may be matched to a relevant letter. A display may display the relevant letter on a window. When key data are generated from the key input device, a central processing unit may confirm whether a combination of the generated key data is identical to a predetermined character code, based on the key table stored in the flash memory. If it is confirmed that the combination of the generated key data is identical to the predetermined character code, the CPU may control the display such that the letter corresponding to the character code is displayed on the window.
US07911361B2	Vehicle recommendation speed display system A vehicle recommendation speed display system includes a vehicle speed sensor, a recommendation speed processing unit that calculates a recommended speed based on a vehicle speed and a display unit that is usually mounted in a speedometer. The recommendation speed processing unit is configured to send information on the vehicle recommended speed to the display unit to display the recommended speed regardless of whether an actual vehicle speed is higher than the recommended speed or not in order to prevent a driver from being irritated by a difference between the actual vehicle speed and a vehicle speed intended by the driver.
US07911358B2	System and method for enrollment of a remotely controlled device in a trainable transmitter A wireless control system is configured to be trainable to control any number of remotely controlled devices. The system can be configured to gather and learn information relating to a signal transmitted by the original transmitter in a manner that is blind to a user of the system. The system can be designed to learn signals automatically such that fewer steps are necessary for a user to train the system to control a particular remotely controlled device. The system can train to remotely controlled devices in this manner with little or no user action required.
US07911357B2	Tricolor signal housing A traffic signal housing includes a bottom housing element that has a radius and a power circuit that is connected to an external source via one or more pluggable connectors through the bottom housing element. Three distinct arrays of LEDs provide a tri-color signal, wherein each array is powered by the power circuit. A distribution cover is coupled to the bottom housing element to enclose the power circuit and the LED arrays.
US07911348B2	Methods for refining patient, staff and visitor profiles used in monitoring quality and performance at a healthcare facility Methods, systems and computer program products are used in monitoring patients, staff, assets and visitors at a facility, initiating a response to prevent or mitigate harm, and assess and ensure overall quality and performance, and refine individual patient, staff and visitor profiles. A plurality of sensors throughout the facility provide multiple data streams relating to the locations of patients relative to at least one of caregivers, assets, other patients, visitors or one or more fixed locations. A computer system analyses the data stream and determines the location and/or movements of the patients relative to the caregivers, assets, other patients, visitors and/or fixed locations. A profile containing individual data for the patient is used to accurately detect events, including actionable events, ensure completion of prescribed care, assess patient wellness, and, in some cases, provide tailored patient specific responses to detected events. Patient profiles are periodically refined by means of an information feedback loop in order to more accurately predict (actionable) events, provide adequate care and ensure a desired level of patient wellness. Staff and visitor profiles can be used to measure staff and visitor performance at a facility.
US07911343B2	Methods for coupling an RFID chip to an antenna A method for mounting multiple small RFID chips onto larger antenna. The chips are mechanically aligned with an interdigitated gap at the feed point of the antenna by electrostatic or magnetic techniques. In an alternate embodiment RF field coupling between the chips and the antenna is employed.
US07911340B2	Indicator processor A network device includes a processor configured to i) assign status information indicative of the network device to a plurality of classes, wherein each of the plurality of classes is associated with a different characteristic of the network device, and ii) combine the status information in the plurality of classes into at least one group of status information in response to user inputs. A display includes a plurality of individually controllable light emitters. The light emitters are configured to display at least one group of status information based on the user inputs. The processor is configured to provide at least one group of status information to the display.
US07911334B2	Electronic personal alert system A personal alert system for sending alerts or notifications in certain conditions. An alert is created by a user, primary contact, first responder or other third party, and an alert message is sent to designated contacts. An alert message can provide an update on a pending alert. Alerts can be configured to be triggered by preselected trigger conditions or can be sent in real time. Triggered alert can include a specific date and time or specific rules or alert conditions. Additional criteria can be applied, such as the constraint to check-in periodically during an alert period. If the user fails to meet an alert condition (e.g., check-in by a certain time), then the alert is triggered and an alert message is sent primary and secondary designated contacts. In another implementation, an emergency first responder can trigger the alert based on information on an emergency card stored in the user's wallet.
US07911330B1	Tractor-trailer coupling detection To test whether a trailer is coupled to a tractor when the tractor ignition switch is off, a test switch in the trailer connects a high-impedance power source in a trailer to a line carrying energy from the tractor ignition switch to the trailer's electrical load, and measures the voltage at the line. A high voltage indicates a connection only to the electrical load in the trailer and thus a decouple. A low voltage indicates a measurement of the electrical loads in both trailer and tractor and hence a coupling.
US07911327B2	Vibration device and method of fabricating the same A vibration device is provided. The vibration device includes a case, a vibrator, a coil, and a spring. The vibrator is disposed inside the case and including a magnet, a yoke, and a weight. The coil is supported by the case. The spring allows the vibrator to be elastically supported by the case. The spring includes a first coupling portion coupled to the vibrator, a second coupling portion coupled to the case, and a connecting portion connecting the first coupling portion to the second coupling portion. The second coupling portion is disposed on a concentric circle with respect to a center of the first coupling portion. A region in which the second coupling portion is disposed on the concentric circle ranges from 40% or more to less than 100% of a total region of the concentric circle.
US07911325B2	Communication system, and endpoint device and interrogator A communication system wherein each endpoint device which has received an interrogating signal from an interrogator responds with a reflected signal generated by modulating the interrogating signal with appropriate information, wherein each endpoint device includes a distance detecting portion operable to detect a distance between the interrogator and the endpoint device, a reflecting portion operable to receive and reflect the interrogating signal, an information generating portion operable to generate replying information to be transmitted to the interrogator, a band determining portion operable to determine, on the basis of the detected distance, a frequency band of a modulating signal used to modulate a reflected signal generated by the reflecting portion, and a modulating-signal generating portion operable, according to the replying information, to generate the modulating signal having a frequency within the determined frequency band. The distance detecting portion may be provided in the interrogator, rather than in the endpoint device. The frequency of the modulating signal may be determined on the basis of the number of the endpoint devices ready for communication with the interrogator, or a distribution of overall frequency utilization ratio of the reflected signals received from the individual endpoint devices.
US07911324B2	Method and system for obtaining information about RFID-equipped objects Method and arrangement for obtaining information about a radio-frequency identification (RFID) device or an object on which the RFID device is mounted when the RFID device is in a space defined by a frame includes arranging a plurality of antennas on the frame to enable transmission of signals into the space and reception of signals from the space, controlling transmission of signals by the antennas by means of an interrogator, and directing radio frequency signals from at least one of the antennas into the space to cause a RFID device in the space to return a signal if it receives any signal from any of the antennas. The return signals from the RFID device are received, e.g., by the interrogator or an associated receiver, and information about the RFID device or object to which the RFID device is attached is derived based on the return signals.
US07911323B2	Radio frequency identification (RFID) tag response modulation Embodiments of radio frequency identification (RFID) tag response modulation are described.
US07911322B2	Information processing apparatus and method, and non-contact IC card device An information processing method includes the steps of: detecting a magnetic field variation that occurs in the vicinity of a receiving section that receives a magnetic field signal; determining whether or not a detection result satisfies a predetermined condition that is set in advance; connecting a storage section, which stores information included in the magnetic field signal received by the receiving section, to the receiving section if it is determined that the detection result does not satisfy the condition; and connecting the storage section to a reading section that reads information stored on the storage section, if it is determined that the detection result satisfies the condition.
US07911320B2	Mobile asset data management system A vehicle provided with means to prevent the use of the vehicle, or access to it, by unauthorized persons is described. The method includes receiving an operator identifier from a certain operator; determining a group identifier associated with the received operator identifier, the group identifier being indicative of a group of one or more potential operators authorized to operate the asset; determining, based on the group identifier and the received operator identifier, whether the certain operator is one of the potential operators and thus authorized to utilize the asset; and communicating with the asset to enable usage of the asset by the certain operator in response to successfully determining that the certain operator is authorized to utilize the asset.
US07911315B2	Miniature pressure sensor assembly for catheter A pressure sensor assembly configured for use with a catheter. In one illustrative embodiment, the pressure sensor assembly may include a multi-layer co-fired ceramic (MLCC) package. The MLCC package may include two or more ceramic layers that are co-fired together, with a cavity defined by at least some of the ceramic layers. At least one internal bond pad is provided within the cavity, and at least one external connection point is provided on the MLCC package exterior. A sensor, such as a pressure sensor, may be positioned and attached within the cavity. The sensor may be electrically connected to at least one of the internal bond pads. In some cases, a sealant may be used to encapsulate the sensor within the cavity. Once fabricated, the MLCC sensor assembly may be provided in a sensor lumen of a catheter.
US07911314B2	Electric circuit with thermal-mechanical fuse A electric circuit includes a connection to a current source, an electric load, and a thermal-mechanical fuse which, in the case of failure at an excessive heat emission, interrupts the current supply to the load, which is effectuated by a feeder in which is arranged a spring having two ends, at least one end is soldered to a solder point provided in the feed line. The one solder point is under a mechanical pretension caused by the restoring force of a spring, that separates the solder joint between the spring and the solder point in the feed line, when the solder melts at the solder point.
US07911312B2	Magnet pole for magnetic levitation vehicles A magnetic pole for magnetic levitation vehicles is described which pole comprises a core (1) and a winding (16) applied on it in form of a disc which is formed by a conductor strip (17) wound in several layers (10a) . . . 10k) around said core (1). According to the present invention, the conductor strip (17) is properly tailor-cut at its longitudinal rims (17a, 17b) so that its width increases from said core (1) towards the outside until it reaches a maximum value (b2).
US07911310B2	Fully differential, high Q, on-chip, impedance matching section An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.
US07911305B2	Ignition coil An ignition coil of an ignition system in an internal combustion engine has a housing, a magnetically active core, a first coil winding connected to a supply voltage, and a second coil winding connected to a high-voltage terminal. At least one electrically conductive component is provided, at least in some areas, with a means for an electrically effective evening out of its surface.
US07911298B2	Electrical switching apparatus and trip actuator assembly therefor A trip actuator assembly is provided for an electrical switching apparatus, such as a circuit breaker. The trip actuator assembly includes a trip actuator with an actuating element, which is movable among unactuated and actuated positions corresponding to separable contacts of the circuit breaker being closeable and tripped opened in response to a trip condition, respectively. The trip actuator is disposed at a mounting portion of a frame. An interface assembly is movably coupled to the frame and includes an interface element disposed between the actuating element of the trip actuator and a portion of the circuit breaker operating mechanism. When the actuating element moves from the unactuated position toward the actuated position, it engages and moves the interface element, thereby moving the operating mechanism to trip open the separable contacts. The frame secures the trip actuator assembly in a desired orientation within a corresponding one of the housing compartments.
US07911296B2	Resonator system such as a microresonator system and method of making same A resonator system such as a microresonator system and a method of making same are provided. In at least one embodiment, a mechanical circuit-based approach for boosting the Q of a vibrating micromechanical resonator is disclosed. A low Q resonator is embedded into a mechanically-coupled array of much higher Q resonators to raise the functional Q of the composite resonator by a factor approximately equal to the number of resonators in the array. The availability of such a circuit-based Q-enhancement technique has far reaching implications, especially considering the possibility of raising the functional Q of a piezoelectric resonator by merely mechanically coupling it to an array of much higher Q capacitively-transduced ones to simultaneously obtain the most attractive characteristics of both technologies: low impedance from the piezo-device and high-Q from the capacitive ones. Furthermore, the manufacturing repeatability of such micromechanical resonator-based products is enhanced.
US07911294B2	Variable-frequency band-elimination filter A series resonance circuit defined by a series circuit including an inductor and a capacitor and a series resonance circuit defined by a series circuit including an inductor and a capacitor are connected in shunt to a signal line. A diode is disposed between the grounding end of the series resonance circuit and the ground, and a diode is disposed between the grounding end of the series resonance circuit and the ground. The connection point between the grounding end of the series resonance circuit and the diode is connected to the ground via a frequency shifting inductor in a conductive state at high frequency, and the connection point between the grounding end of the series resonance circuit and the diode is connected to the ground via a frequency shifting inductor in a conductive state at high frequency. A matching circuit defined by a multistage T-shape LCL circuit is disposed between the series resonance circuits.
US07911292B2	Mode transition between a planar line and a waveguide with a low loss RF substrate and a high loss low frequency substrate Provided is a mode transition circuit for transferring a RF signal and a transceiver module having the same. The mode transition circuit includes: a planar transmission line mounted at a RF substrate for receiving a RF signal from a RF signal generating unit; a via formed inside the RF substrate and connected to one side of the planar transmission line for receiving the RF signal from the planar transmission line; at least one of metal patches formed inside the RF substrate and connected to the one side of the via for receiving the RF signal from the via; and a hole formed inside a low frequency substrate and connected to one side of the metal patch for receiving the RF signal from the metal patch.
US07911286B2	Multiplexed voltage and current signaling Circuitry and methods are provided. Voltage and current of an electrical load are scaled, biased and alternately sampled to derive a multiplexed signal. The multiplexed signal is used to control an oscillator so as to provide a multiplexed frequency-modulated signal. The multiplexed frequency-modulated signal is processed to improve linearity and to time-correlate signal content with discrete samplings of the load voltage and current. Control of a printer or other device is performed using the processed signal.
US07911285B2	Reference frequency control circuit A reference frequency control circuit comprising: a frequency voltage converting circuit configured to receive an oscillation signal from an oscillator circuit, and output an output voltage corresponding to a frequency of the oscillation signal, the oscillator circuit being a circuit configured to oscillate at a frequency corresponding to a level of an input signal; and a control circuit configured to control a level of the input signal so that the output voltage is at a predetermined level.
US07911281B2	PLL circuit and radio communication apparatus A PLL circuit includes: a voltage-controlled oscillator including: a first oscillating portion configured to generate first differential signals; and a second oscillating portion configured to generate second differential signals with a phase difference of 90 degrees from the first differential signals; a phase detector configured to compare phases of third differential signals based on the first and second differential signals with a phase of a reference signal; and a loop filter configured to generate a control voltage for controlling the voltage-controlled oscillator based on a result of the comparison in the phase detector.
US07911274B2	Variable transconductance circuit The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.
US07911267B2	Sigma-delta class-D amplifier and control method for a sigma-delta class-D amplifier A sigma-delta class-D amplifier includes a quantizer to quantize an input to produce a digital signal, and an output stage to produce an output according to the digital signal. The quantizer has a smaller step size so that the digital signal has at least five logical levels, and the sigma-delta class-D amplifier is thus improved to have wider stable modulation range and less switching loss.
US07911266B2	Low complexity and low power phase shift keying demodulator structure A low complexity and low power phase shift keying demodulator structure includes a digitizer, a phase-transition-independent carrier clock extractor, a binary correlater, a delay element, and a sampler. The digitizer digitizes a BPSK signal for an output waveform. The phase-transition-independent carrier clock extractor detects the phase transition on the output of the digitizer and produces a carrier clock signal. The binary correlater has correlated processes to the output signal of the digitizer and carrier clock signal obtained from the phase-transition-independent carrier clock extractor. The sampler samples the signal from the binary correlater according to the signal from the delay element in order to finish the demodulation with only a small capacitance.
US07911263B2	Leakage current mitigation in a semiconductor device A dormant mode target semiconductor device within a leakage current target unit is identified for mitigating leakage current to prevent it from reaching catastrophic runaway. A leakage current shift monitor unit is electrically connected to the output node of the leakage current target unit and collects leakage current from the selected target semiconductor device for two consecutive predefined temporal periods and measures the difference between the collected leakage currents. A comparator receives and compares the outputs of the current shift monitor unit and a reference voltage generator. The comparator propagates an alert signal to the leakage current target unit when the leakage voltage output from the leakage current shift monitor unit exceeds the reference voltage, a condition that indicates that the leakage current is about to approach catastrophic runaway levels. This alert signal switches the target semiconductor device to an active mode for leakage mitigation, which includes a repair voltage from a repair voltage generator applied to the gate of the target semiconductor device.
US07911257B2	MOSFET parametric amplifier A circuit includes an input terminal adapted to receive an input voltage, a MOSFET having its drain terminal and its source terminal connected together, a first switching arrangement configured to be controlled by a first clock signal and adapted to selectively couple the gate terminal to the input terminal, and a further switching arrangement configured to be controlled by a further clock signal in timing relationship with the first clock signal and adapted to selectively couple the source terminal and a first voltage which is capable of pulling carriers out of a channel when the first switching arrangement is not coupling the input terminal to the gate terminal.
US07911256B2	Dual integrator circuit for analog front end (AFE) A circuit includes a generating circuit that generates a current signal in response to an input signal, a first one of a plurality of integrators that generates a voltage signal from the current signal, a comparator that is responsive to the voltage signal to compare the voltage signal with a predefined voltage, a switching circuit that reconfigures a first capacitor and a second capacitor connected to the first one of the plurality of integrators to discharge the first capacitor and to enable the second capacitor to generate the voltage signal in response to the current signal, and an analog-to-digital converter to generate an output when a predefined time interval has elapsed. The output is obtained by adding a first charge value corresponding to a count of number of times the voltage signal reaches the predefined voltage in the predefined time interval and a second charge value from the analog-to-digital converter.
US07911255B2	Voltage level shifter for arbitrary input signals Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
US07911254B2	Offset correction device and method A direct-current-offset correction device includes a digital-to-analog converter that converts a digital signal into an analog signal, a modulator that modulates the analog signal to generate a modulated signal, a direct-current-offset correction value calculation unit that calculates a direct-current-offset correction value as a reverse characteristic component of a carrier leak occurring in the modulated signal based on a demodulated signal which is demodulated by feeding back the modulated signal, a direct-current-offset correction unit that corrects a direct-current-offset on the digital signal based on the direct-current-offset correction value, a correction value detection unit that detects whether or not the direct-current-offset correction value is zero or a neighboring value of zero, and an offset generation unit that superimposes a direct-current-offset component on the analog signal based on a detection result of the correction value detection unit.
US07911251B2	Clock signal generating circuit and semiconductor memory apparatus including the same A clock signal generating circuit includes a main clock buffering unit and a sub clock buffering unit. The main clock buffering unit is capable of generating both a differential clock signal pair and a single clock signal. The main clock buffering unit selectively outputs either the differential clock signal pair or the single clock signal depending upon the frequency of an external clock signal. The sub clock buffering unit receives the output of the main clock buffering unit and generates first and second clock signals. The operation of the sub clock buffering unit depends upon whether the differential clock signal pair or the single clock signal is output by the main clock buffering unit.
US07911248B2	Apparatus for linearization of digitally controlled oscillator There is provided an apparatus for the linearization of a digitally controlled oscillator. The apparatus includes a first filter outputting only a low frequency band signal of an input signal to the digitally controlled oscillator; a negative feedback loop causing the signal of an input port of the digitally controlled oscillator to pass through a frequency table and a frequency-to-digital code mapper in sequence and correcting an input of the digitally controlled oscillator by performing negative feedback to an input port of the first filter; and a frequency table generator storing a frequency value of an output signal of the digitally controlled oscillator in the frequency table.
US07911246B2	DLL circuit and method of controlling the same A DLL circuit includes a clock selection control unit configured to generate a clock selection signal on the basis of a phase difference between a reference clock and a feedback clock and, after the clock selection signal is generated, to generate an initialization signal. A delay control unit, when the initialization signal is enabled, transfers an initial voltage to be generated by dividing an external power supply voltage to a delay unit as a control voltage, and controls a delay operation of a delay reference clock to be selected on the basis of the clock selection signal.
US07911237B2	High speed comparator A comparator comprises a differential amplifier (T1, T2, T8, T9) having differential inputs (IN1, IN2) forming the comparator inputs, and a first and a second amplifier output (f1, f2) forming the comparator outputs of a first comparator stage, wherein the differential amplifier has first (T1, T8) and second (T2, T9) parallel branches. The comparator has a first current source circuit (32) defines a current to be driven through the differential amplifier, a second current source circuit (34) comprising a load driven by the first branch and a third current source circuit (36), comprising a load driven by the second branch. Circuitry (T6,T7) is provided for defining the voltage difference between the first and second amplifier outputs when the differential amplifier is in a stable state providing a differential output. This arrangement drives current through the two branches independently, so that the main transistors in each branch can be kept on to enable rapid response times. By fixing the voltage difference between the outputs, it is possible to remove dependency on the duty cycle on the common voltage mode of the differential amplifier.
US07911236B2	Detection circuit and detection method A detection circuit includes a bias circuit configured to generate a first bias voltage and a second bias voltage. The detection circuit further includes a storage device configured to store a detection value corresponding to an amplitude of a radio frequency signal received at a detector input. A series connection of a first diode element and a second diode element includes first tap to receive the first bias voltage and the radio frequency signal, a second tap which is coupled to a connection node of the first and the second diode element to receive the second bias voltage and a third tap to provide the detection value.
US07911235B2	Logarithmic detectors Disclosed is a logarithmic detector comprising: an amplifier element; means for setting a frequency of operation of the detector; and a controller, wherein an input signal to the amplifier element is arranged to cause an oscillation in the amplifier element, and the controller is operable to sense a pre-determined threshold, indicative of oscillation and, in response to sensing said threshold, to interrupt the oscillation of the amplifier such that the frequency of said interruption is proportional to the logarithm of the power of the input signal.
US07911228B2	Integrated circuit with improved logic cells The present invention provides integrated circuits with improved logic cells. In one embodiment, an integrated circuit having a plurality of logic cells (LC) is provided, each LC comprising: a lookup table having a LUT output terminal; and, a first multiplexer; wherein, a first multiplexer input terminal is connected to of a first input terminal of the LC, a second multiplexer input terminal is connected to the LUT output terminal, a multiplexer output terminal is connected to a first output terminal of the LC, and a multiplexer select terminal is connected to a second input terminal of the LC so as to select which of the signals appearing at the first and second multiplexer input terminal to pass through; wherein, by coupling in chain the first input terminal of one LC to the first output terminal of another LC, a WLUT chain is formed.
US07911221B2	Semiconductor device with speed performance measurement A speed performance measurement circuit that may perform speed performance measurement is provided between a first logic circuit and a second logic circuit. The speed performance measurement circuit includes a first flip flop that stores first data, a first delay circuit that delays the first data and generates second data, and a second flip flop that stores the second data. Furthermore, the speed performance measurement circuit includes a first comparator circuit that compares output of the first flip flop to output of the second flip flop, and a third flip flop that stores output data from the first comparator circuit in accordance with timing of the first clock signal. Data in a normal path is compared to data in a path delayed by a certain time to measure speed, and power voltage of a circuit is determined based on such comparison. Thus, change in speed with respect to power voltage in a critical path can be measured.
US07911218B2	Device and method for analyzing a sample plate A device and a method are provided for the analysis of a sample plate on which at least two material samples are situated. In the method, one impedance spectrum is measured for each of the material samples. As a function of the respectively measured impedance spectrum, a configuration of a circuit equivalent is determined which includes at least one electronic component. Then, for an error minimization computation, starting values for the components of the respective circuit equivalents are determined. In the error minimization computation, a theoretical impedance spectrum is calculated for at least one of the material samples, based on the impedance spectrum measured for the material sample, as well as the starting values for the components of the respective circuit equivalent, and fit values are determined for the components of the respective circuit equivalent. Subsequently, a validation variable is determined for the calculated, theoretical impedance spectrum, and an evaluation variable is ascertained by comparison of at least one of the fit values for the components to a reference value.
US07911216B2	Semiconductor integrated circuit, debug/trace circuit and semiconductor integrated circuit operation observing method A main functional structure executes continuous predetermined operations to continuously generate events associated with the operations. A debug/trace circuit compares an event occurring at the main functional structure with detection condition indicating information of one entry in a control information list, and executes the operation designated by operation indicating information paired with the detection condition indicating information in accordance with the result of the comparison. The debug/trace circuit continuously performs this in accordance with the control information list to identify the event.
US07911215B2	Test patch system and method A test system for taking a sample of a constituent on a surface utilizing a fluid source includes a transition region having a capillary layer for delivering a fluid from said fluid source, an extraction region having a collection material in contact with said surface, and a collection region having a sensor reservoir therein for collecting the fluid for analysis.
US07911213B2	Methods for measuring dielectric properties of parts A method is disclosed for calibrating a capacitance of an apparatus for measuring dielectric properties of a part. The apparatus includes an electrically grounded chamber, a lower electrode disposed within the chamber and connected to a radiofrequency (RF) transmission rod, an electrically grounded upper electrode disposed within the chamber above the lower electrode, and a variable capacitor connected to control transmission of RF power through the RF transmission rod to the lower electrode. A method is also disclosed for determining a capacitance of a part through use of the apparatus. A method is also disclosed for determining a dielectric constant of a part through use of the apparatus. A method is also disclosed for determining a loss tangent of a part through use of the apparatus.
US07911212B2	Filter rod measuring station as well as method for measuring the mass of a softener, the moisture and/or the dry filter material in a filter rod A filter rod measuring station is equipped with measuring devices which measure at least the mass (M) of a filter rod and the draw resistance (PD) of the filter rod, and a microwave measuring device is provided for measuring the mass of the softener and/or the moisture content and/or the dry mass of the filter rod.
US07911211B2	Electromagnetic shielding defect monitoring system and method for using the same An embodiment disclosed herein is directed to a method of monitoring an electromagnetic shield effectiveness including transmitting a first electromagnetic field toward a first surface of an electromagnetic shield, detecting a second electromagnetic field transmitted from a second surface of the electromagnetic shield, generating a first signal corresponding to the second electromagnetic field and determining whether a defect exists at the electromagnetic shield by comparing the first signal to a predetermined threshold.
US07911209B2	Head coil and neurovascular array for parallel imaging capable magnetic resonance systems A head coil for use with a parallel-imaging compatible MR system is disclosed, as is a method of making, and a neurovascular array (NVA) equipped with, same. The head coil includes conductive rings and rods configured to produce a plurality of electrically-adjacent primary resonant substructures about a birdcage-like structure, with each such primary resonant substructure including two rods neighboring each other and the short segment of each of the first and second rings interconnecting them. The primary resonant substructures are isolated from each other via a preamplifier decoupling scheme and an offset tuning scheme thereby enabling each primary resonant substructure (i) to receive an MR signal from tissue within its field of view and (ii) to be operatively couplable to one processing channel of the MR system for conveyance of the MR signal received thereby (iii) while being simultaneously decoupled from the other primary resonant substructures.
US07911203B2	Sensor having an analog processing module to generate a linear position output A sensor having a signal generation module including a first magnetic sensor, an analog signal processing module, and a signal inversion module for inverting a first waveform and a second waveform, wherein the signal inversion module outputs the first and second waveforms in a first region spanning a first range of angular position of the magnet and outputs the first and second inverted waveforms in a second region spanning a second range of angular position of the magnet.
US07911195B2	Electronic circuits and methods for starting up a bandgap reference circuit An electronic circuit includes a bandgap reference circuit and a start-up circuit for starting up the bandgap reference circuit. The bandgap reference circuit includes at least one electric path having a semiconductor diode and a resistor connected in series with said semiconductor diode, wherein the voltage across the resistor is proportional to the absolute temperature of the semiconductor diode. The start-up circuit assists starting up the bandgap reference circuit until the voltage across the resistor reaches a preset threshold voltage, and the start-up circuit turns off automatically when the voltage across the resistor has reached the threshold voltage.
US07911194B2	Controller and driver communication for switching regulators Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
US07911191B2	Drop-out voltage monitoring method and apparatus A voltage regulator has a device for regulating an output voltage, having an input to receive an input voltage and an output to deliver an output voltage of a constant level, and a device for correcting a drop-out voltage violation, coupled to the device for regulating, to determine an occurrence of a drop-out voltage violation and to cause the device for regulating to change the level of the output voltage upon detection of the drop-out voltage violation. A method for regulating an output voltage has the steps of receiving an input voltage, generating and outputting a regulated output voltage of a constant level, monitoring occurrence of a drop-out voltage violation, and causing a change of the level of the output voltage upon detection of the drop-out voltage violation.
US07911185B2	Battery voltage detection circuit A battery-voltage detection circuit comprising: a first-capacitor; an operational-amplifier; a second-capacitor; a voltage-application-circuit to sequentially apply one and the other-battery-terminal-voltages to the other-first-capacitor-end; a discharge circuit to allow the second-capacitor to discharge before the other-battery-terminal-voltage is applied to the other-first-capacitor-end; a constant current circuit to output a constant-current causing predetermined-speed-discharge of electric charge accumulated in the second-capacitor in response to a discharge-start-signal input after voltage is applied to the other-first-capacitor-end; a comparator; and a measurement-circuit to measure a time-period from a time when the discharge-start-signal is input until a time when an comparator-output-signal changes to one logic level as a time-period corresponding to a battery-voltage, at least one of the operational-amplifier and the comparator being provided with an offset so that the comparator-output-signal changes to the one logic level when voltage applied to the other operational-amplifier input terminal is at a predetermined level lower than a reference-voltage level.
US07911179B2	Charging/discharging apparatus A charging/discharging apparatus for simultaneously charging or discharging multiple battery blocks forming a battery pack individually or at one time is provided at low cost. The charging/discharging apparatus includes a group of conductors for connecting one line each respectively to both ends of a group of battery blocks connected in series forming a battery pack and a connection point between battery blocks, a group of discharging circuits mutually connected in series and connected in parallel to battery blocks via the conductors and each disposed at every battery block for discharging the battery block, a group of charging circuits mutually connected in series and connected in parallel with the discharging circuits and the battery blocks via the conductors and each disposed at every battery block for charging the battery block, and a charging/discharging control unit for instructing at least one selected discharging circuit to perform discharging from the group of discharging circuits or one selected charging circuit to perform charging from the group of charging circuits.
US07911178B2	Battery apparatus, battery control apparatus, and motor drive unit The present invention provides enhanced serial communication reliability in a situation where a plurality of cell controllers and a battery controller are daisy-chained to form a serial communication configuration. While the plurality of cell controllers and the battery controller are daisy-chained to form a serial communication configuration, the battery controller or each cell controller includes a communication speed detection means, which detects the communication speed of data input from an additional controller, and a reception timing correction means, which corrects the reception timing for data input from the additional controller in accordance with the communication speed detected by the communication speed detection means.
US07911177B2	AC motor drive controller An overmodulation PWM controller includes a voltage instruction calculation unit which calculates a d axis voltage instruction and a q axis voltage instruction in which a voltage amplitude exceeds a peak value of a triangular wave carrier; a voltage instruction correction unit which corrects the d axis voltage instruction and the q axis voltage instruction so that a pulse width modulation voltage applied to an AC motor has a fundamental wave amplitude corresponding to the voltage instruction amplitude, according to the synchronization value K which is the number of the triangular carriers per one cycle of the phase voltage instruction; and a voltage instruction conversion unit which converts the corrected d axis voltage instruction and the q axis voltage instruction into a phase voltage instruction. The pulse width modulation voltage is controlled according to the result of comparison between the phase voltage instruction and the triangular wave carrier.
US07911175B2	Two speed induction motor with tapped auxiliary winding A six lead, two speed, consequent wound, single phase induction motor with a tapped auxiliary winding having a 2-pole high speed mode and 4-pole low speed mode. A portion of the auxiliary winding is connected in series with the four pole main winding. The 4-pole low speed mode has an efficiency of over 80%.
US07911165B2	Device for controlling an electromechanical actuator A device for controlling an electromechanical actuator includes an electric motor and an actuator operated by the electric motor. It also includes a digital signal processor (DSP) providing data of reference voltages (Ud—ffw, Uq—ffw) on the basis of an decoupled electrical model of the motor. The processor has at least one Park transformation module receiving measurement data for the currents of at least two supply phases of the motor (i_mot—2, i_mot—3) and a datum for the estimated angle of the motor (θestimated) and transforming them into data regarding the component of current with stator current axis (id) and the component of current in quadrature with the stator current (iq).
US07911164B2	Circuit installation capable of full voltage activation, division voltage operation and delayed breaking A circuit installation that executes full voltage activation, division voltage operation, and delayed breaking brake to electric load by increasing the power to the load activated to promote its activation performance or reducing operation power in the course of operation by the load to save power consumption or limit operation performance of the load.
US07911163B2	Method and device for controlling a seat The seat which is provided with at least two elements which can be moved relative to each other and an actuator for maneuvering a movable element, a unit for controlling the actuator for the movement of the movable element comprises: means for measuring a force (Cu) applied manually to the movable element by a user, the control unit comprises: means for calculating the theoretical force (Cth) which must be applied by the actuator to the movable element in the direction of the force (Cu) applied manually to the movable element by the user; and means for controlling the actuator for the movement of the movable element in accordance with the theoretical force (Cth).
US07911162B2	Motor drive device and control method A motor drive device (100) includes a boost converter (12) boosting a power supply voltage and outputting a boosted voltage; an inverter (14) receiving the boosted voltage from the boost converter (12) and driving a motor (M1); and a controller (30) giving a target value of the boosted voltage to the boost converter (12) and setting one of a rectangular-wave control and a non-rectangular-wave control as a control method of the inverter (14). The controller (30) is capable of selecting from a first operation mode for giving a first boosted target value and designating the non-rectangular-wave control as the control method and a second operation mode for giving a second boosted target value lower than the first boosted target value and designating the rectangular-wave control as the control method, in response to a same predetermined input signal indicating a torque request.
US07911159B2	Robust driver for high intensity discharge lamp A circuit arrangement and a method for operating a high intensity discharge lamp driver, which assure long-lasting stable operation of a high intensity discharge lamp regardless of the type or the age of the lamp. This is achieved by the determination of a correctional setpoint signal for a given time period based on the a difference signal between a principal setpoint signal and the actual output current signal for a given time period. The principal setpoint signal is then adjusted by the determined correctional setpoint signal.
US07911158B2	Self-learning lighting system A system (120) and/or corresponding method introduces a minor change to a given set of parameters (110) that affect an ambiance (130) associated with an environment, and collects the user's response to the change. Based on the user's response, the system learns which changes to which parameters lead to an improved effect. By repeating the change-feedback sessions, the system approaches an optimal setting for achieving the desired ambiance in the given environment. Preferably, the change-feedback session is non-obtrusive, and occurs, for example, each time a light is turned on, and the feedback is collected when the light is turned off, using a multiple switch arrangement. If the light is turned off using one switch, the feedback is positive; if the light is turned off using an alternative switch, the feedback is negative. Alternatively, the system can be placed in a rapid-learning mode, wherein the change-feedback cycles occur more frequently.
US07911156B2	Thermal foldback for a lamp control device The output current of a ballast is dynamically limited when an over-temperature condition is detected in the ballast according to one of (i) a step function or (ii) a combination of step and continuous functions, so as to reduce the temperature of the ballast while continuing to operate it.
US07911155B2	Backlight unit, display apparatus comprising the same and control method thereof Provided is a display apparatus including: a display panel; a light source which includes a plurality of light source modules and supplies light to the display panel; a light source driver which drives the light source modules; a power source which supplies power to the light source driver; a current detector which detects a current of the power supplied from the power source to the light source driver; and a controller which controls the light source driver to sequentially drive the plurality of light source modules and compares the detected current with a range to detect errors from the respective light source modules.
US07911154B2	Electronic ballast with phase dimmer detection The invention relates to an electronic ballast comprising a converter which is used to operate a discharge lamp, for example, a low pressure discharge lamp, for selectively operating, in a direct manner, the supply network or a phase section dimmer. Jumps in the supply voltage are decoupled by a differential which is connected between at least one of the network lines and the reference potential of the ballast and transmitted to a control of the ballast, such that the control of the converter can distinguish between the operation on the phase section dimmer and on the network supply.
US07911147B2	Limited current circuit of digital inverter for LCD backlight A limited current circuit of this invention comprising: a transformer that raises an alternating current (AC) power supplied from the digital inverter to an AC voltage of a high voltage to light a lamp; a voltage/current detection unit that detects at least one of the current and voltage supplied to the lamp; an A/D converter that converts the detected voltage/current value of analog to a digital value; and a microcontroller unit (MCU) that induces an LCC check point after the start of a striking process, compares at least one of the output current value and voltage value from the transformer with a preset reference value on the basis of an output signal of the A/D converter and then shuts down the inverter when the output current value or voltage value is determined to be abnormal, wherein the reference value comprises at least one of the current value and voltage value measured at the LCC check point when an object having noninductive resistance is not contacted to the inverter.
US07911144B2	Metal halide lamp and vehicle headlamp The invention relates to a metal halide lamp for a vehicle headlamp comprising a cylindrically-shaped discharge vessel (23) having a ceramic wall which encloses a discharge space comprising Xe and ionizable filling, and a cylindrically-shaped outer bulb (21) surrounding the discharge vessel (23). According to the invention a portion (25, 26) of the surface of the outer bulb (21) facing away from the discharge vessel (23) is shaped as a negative lens. Preferably, the portion (25, 26) encompasses a segment of the outer bulb (21) with a segment angle α in the range between 30≦α≦60°. Preferably, the portion (25) forming the negative lens is shaped as a flat surface.
US07911143B2	Discharge lamp with a holding apparatus for the electrodes The invention relates to a discharge lamp, in particular a high-pressure discharge lamp, having a discharge vessel (1) which has two diametrically opposite necks (2, 3) into each of which a holding rod (5, 10) is fused at least in places, with an electrode (4, 9) which extends into the discharge vessel (1) being arranged on each holding rod (5, 10), and with in each case at least one annular plate (7, 12) at least partially clasping a holding rod (5, 10), with at least one of the annular plates (7, 12) being arranged in the discharge vessel (1).
US07911140B2	Plasma display panel with porous panel A plasma display panel adapted to minimize noise/vibration as well as a heat generated therefrom. In the plasma display panel, a display panel displays a picture while a porous pad is provided behind the display panel to prevent the transfer of noise/vibration to an associated heat proof panel. When the PDP is mounted within a case, a second porous pad can be provided on an inner surface of the case opposite the display panel and adjacent to an associated printed circuit board for additional noise/vibration damping.
US07911139B2	Plasma display device with improved luminance A plasma display device has a panel main body in which a pair of transparent substrates is arranged in opposition so as to form a discharge space between the substrates on at least a front side. Barrier ribs are arranged on at least one of the substrates to divide the discharge space into a plurality of spaces. A group of electrodes is arranged on the substrates so as to generate discharge in the discharge space divided with the barrier ribs. Phosphor layers that emit by discharge are also provided. The phosphor layers are equipped with a green phosphor layer including at least Zn2SiO4:Mn, a surface of Zn2SiO4:Mn is coated with aluminum oxide, and a ratio of an Al element to a Si element on the surface measured with an XPS apparatus is 0.6 to 4.0.
US07911138B2	Encapsulation cap and display device including the same The present invention relates to an encapsulation cap for a display device having a structure which has a reinforced strength and is not modified although a thickness is decreased, and an encapsulation cap according to one embodiment of the present invention may comprises a first plane part; and a second plane part having at least one bead thereon, and disposed in a plane different from a plane of the first plane part, wherein the second plane part is connected with the first plane part.
US07911133B2	Electroluminescent device having improved light output An OLED device including a transparent substrate having a first surface and a second surface, a transparent electrode layer disposed over the first surface of the substrate, a short reduction layer disposed over the transparent electrode layer, an organic light-emitting element disposed over the short reduction layer and including at least one light-emitting layer and a charge injection layer disposed over the light emitting layer, a reflective electrode layer disposed over the charge injection layer and a light extraction enhancement structure disposed over the first or second surface of the substrate; wherein the short reduction layer is a transparent film having a through-thickness resistivity of 10−9 to 102 ohm-cm2; wherein the reflective electrode layer includes Ag or Ag alloy containing more than 80% of Ag; and the total device size is larger than 10 times the substrate thickness.
US07911132B2	Organic light emitting diode having electron and hole mobility in light emitting layer and display using the same An organic light emitting diode comprising a pair of electrodes and a stack including a hole transport layer, a light emitting layer, and an electron transport layer, the stack being intermediate between the electrodes, the light emitting layer being of a material having hole mobility and electron mobility equal to or lower than hole mobility of the hole transport layer and electron mobility of the electron transport layer, respectively.
US07911128B2	Organic electroluminescence display device having anode and drain sealing structure and a method for fabricating thereof An organic electroluminescence display device and a fabrication method thereof is described. The organic electroluminescence display device includes first and second substrates. A cathode including a transparent conductive material and a thin metal film, an organic electroluminescence (EL) layer formed on the cathode, and an anode formed on the organic EL layer are formed on the first substrate. A driving transistor that contains a drain electrode is formed on the second substrate. The first and second substrates are bonded to each other such that the drain electrode contacts the anode.
US07911127B2	Phosphor blend for wavelength conversion and white light emitting device using the same The present invention relates to phosphor blend for wavelength conversion and a white light emitting device using the same. The phosphor blend of the invention comprises three phosphors, A5(PO4)3Cl:Eu2+, D2SiO4:Eu and MS:Eu at a composition where near ultraviolet radiation is converted into light positioned at a CIE coordinate (x, y), where 0.25≦x≦0.45 and 0.25≦y≦0.43, wherein A comprises at least one of Sr, Ca, Ba, and Mg, D comprises at least one of Ba, Sr, and Ca, and M comprises at least one of Sr and Ca. Furthermore, the present invention provides a new white light emitting device in combination of the phosphor blend and a near ultraviolet LED.
US07911123B2	Electron emission device and electron emission display using the electron emission device An electron emission device includes a substrate, cathode electrodes formed on the substrate, electron emission regions electrically coupled to the cathode electrodes, an insulation layer formed on the substrate while covering the cathode electrodes, and gate electrodes formed on the insulation layer and crossing the cathode electrodes. One or more gate holes are formed at each of crossing regions of the gate electrodes and the cathode electrodes through the insulation layer and the gate electrodes. At least one of the cathode electrodes includes at least two openings divided by a bridge. The at least two openings divided by the bridge are formed on each exposed region of the cathode electrodes through the gate holes. A corresponding one of the electron emission regions contacts the bridge and extends toward the walls of at least one of the openings but is spaced away from the cathode electrodes.
US07911120B2	Source for providing an electron beam of settable power The invention concerns a source supplying an adjustable energy electron beam, comprising a plasma chamber (P) consisting of an enclosure (1) having an inner surface of a first value (S1) and an extraction gate (2) having a surface of a second value (S2), the gate potential being different from that of the enclosure and adjustable. The invention is characterized in that the plasma is excited and confined in multipolar or multidipolar magnetic structures, the ratio of the second value (S2) over the first value (S1) being close to: D=1/β √2πme/mi exp (−½), wherein: β is the proportion of electrons of the plasma P, me the electron mass, and mi is the mass of positively charged ions.
US07911117B2	Piezoelectric/electrostrictive body, and piezoelectric/electrostrictive element The piezoelectric/electrostrictive body is represented by a composition formula ABO3 (A includes at least one element selected from the group consisting of Li, Na and K, and B includes at least one element selected from the group consisting of Nb, Ta, Sb and Mn), and the body is formed so that a main phase is a tetragonal system, and the orientation degree of a (001) face after a polarization treatment is smaller than that of a (100) face, in a plane vertical to the applying direction of an electric field applied so as to perform the polarization treatment. The present inventive piezoelectric/electrostrictive body has a ratio between a diffraction peak intensity I001 of the (001) face and a diffraction peak intensity I100 of the (100) face of I001/I100≦1, in an X-ray diffraction pattern in the same plane after the polarization treatment.
US07911115B2	Monolithic electroactive polymers The present invention relates to polymers, transducers and devices that convert between electrical and mechanical energy. When a voltage is applied to electrodes contacting an electroactive polymer, the polymer deflects. This deflection may be used to do mechanical work. Similarly, when the electroactive polymer deflects, an electric field is produced in the polymer. This electric field may be used to produce electrical energy. An active area is a portion of a polymer having sufficient electrostatic force to enable deflection of the portion and/or sufficient deflection to enable a change in electrostatic force. The present invention relates to transducers and devices including multiple active areas. The invention also relates to methods for actuating one or more active areas.
US07911114B2	Impact drive actuator An impact drive actuator comprises a fixing member, a vibrator, a vibrating member, a movable body, a drive circuit, and a friction adjustment section. The friction adjustment section includes a first electrode disposed on a surface of the movable body that faces the vibrating member and a second electrode disposed on a surface of the vibrating member that faces the movable body and electrically isolated from the first electrode. An electrostatic force is caused to act between the first and second electrodes to change an electrostatic force between the vibrating member and movable body so as to change the frictional force acting between the movable body and vibrating member.
US07911112B2	Ultrasonic actuator An ultrasonic actuator includes: a piezoelectric element 1 for generating a bending vibration and a stretching vibration; and a driver element 2 attached to a surface of the piezoelectric element 1 facing the direction of the bending vibration in point contact with the piezoelectric element 1 and actuated in accordance with the vibration of the piezoelectric element 1 to output driving force.
US07911109B2	Permanent-magnet mono-phase synchronous electric motor with improved stator structure, in particular for discharge pumps of washing machines and similar household appliances The invention regards a permanent-magnets mono-phase synchronous electric motor (7) for washing machines and the like, in particular for washing pumps (1), with improved stator (4) structure and of the type centrally comprising a permanent-magnets axial rotor (2) and a stator (4) with a lamination pack core (5) and a couple of pole pieces with ends enveloping the rotor (2), of which they have substantially the same axial length and from which they are spaced by respective aircore. Such a motor is distinguished in that the lamination pack core (5) has a shorter axial length with respect to the ends (10, 11) of said pole pieces.Advantageously, the stator (4) pole pieces are obtained through moulding magnetic powders.
US07911100B2	Dual-stage centering magnetic bearing The present invention relates to a magnetic centering structure, and more particularly a structure of a centering magnetic bearing intended notably for space applications. The solution proposed in the present patent is suited to the centerers used on gyroscopic wheels and actuators. The main originality of the invention is the proposal of a dual-stage magnetic bearing structure. According to the implementation chosen, this invention presents the significant advantage of an improvement in terms of radial bulk.
US07911096B2	Electromagnetic oscillator with electrical and mechanical output An oscillator typically includes several pivotable oscillating arms each having a drive magnet and a follower magnet thereon so that the drive magnet on one arm drives movement of the follower magnet on another arm to oscillatingly pivot the other arm. Typically, a first repelling magnet is mounted on each oscillating arm and two repelling magnets are positioned on opposite sides of the first repelling magnet to facilitate the pivotal oscillation of the oscillating arm. A rotatable flywheel with a drive magnet thereon may drive movement of the follower magnet on one of the arms to drive pivotal movement of that arm. An electric motor may be used to drive rotation of the flywheel. A generating magnet may be mounted on each oscillating arm and movable adjacent an electrically conductive coil for producing an electric current therein. The coil may be in electrical communication with the motor.
US07911095B2	Servo motor with large rotor inertia A servo motor with large rotor inertia includes a casing, a stator, a rotor and an inertial disk. The casing includes a hollow chamber and axial stages at front side and rear side thereof. The stator is arranged in the chamber and includes a ring and a plurality of coils around the ring. A through hole is defined at the center of the ring. A rotation shaft of the rotor is fixed to the stage and a magnet body is capped to the rotation shaft, where the magnet body is arranged in the through hole. The inertial disk is fixed to the rotation shaft of the rotor. The rotational inertia of the rotor is increased by rotating the inertial disk when the rotor is rotated by magnetize the stator. Therefore, the inertial disks of various sizes can be fixed to the rotor for matching different load inertia.
US07911093B2	Converter motor In a converter motor, the converter unit and the electric motor together form a mechatronic unit. The converter unit is located behind the electric motor and is thermally coupled with the rear bearing shield. The converter unit includes a through hole, through which the rear end of the motor shaft passes. A contactless position detector is located in the region of this through hole.
US07911090B2	Stator of an electrical machine, electrical machine, and power tool A stator of an electrical machine has a cross section, a longitudinal extension, a jacket surface, a plurality of winding holders configured for receiving field windings, the winding holders being distributed inhomogenously around an inner circumference of the cross section, such that a density of the field windings in at least one first region formed around a stator circumference is smaller than in an adjacent second region.
US07911089B2	Fan motor for refrigerator The present invention relates to a fan motor is for forced circulation of cool air in the refrigerator and comprises a molding unit, a shaft bearing unit, a rotor and an end cap. The molding unit comprises a stator having a shaft bearing unit mounting hole in the center thereof and core teeth which protrude radially outward so that a coil is wound thereon; and a circuit board having a circuit and a device which are electrically connected to the coil of the stator. The shaft bearing unit is inserted and fixed in the shaft bearing unit mounting hole. The rotor has a magnetic ring formed on the inner surface of a cup-shaped rotor housing, and a rotating shaft is fixed at the bottom center of the rotor housing. The end cap whose edge is connected to a side wall of the molding unit covering the rotor.
US07911088B2	Method and apparatus for monitoring energy storage devices An improved battery, monitoring circuit and method for communicating with the battery is provided. Such batteries and communication methods are particularly useful in UPS systems that use such batteries to provide back-up power to electrical loads. In one aspect, performance, manufacturing, trend and/or other data are stored in non-volatile memory of the battery and are communicated to an external system such as a UPS. In another aspect, a method for communicating via single-wire interface is provided. In one aspect, a same interface is used to communicate with both conventional batteries and improved batteries having increased monitoring capabilities.
US07911087B2	Switching system The switching system for reducing standby power consumed by an electrical device includes a remote control device configured to selectively emit a radio frequency signal and a switching apparatus in electrical communication with a power supply and the electrical device. The switching apparatus includes a passive radio frequency receiver for receiving the emitted radio frequency signal and a switch. The passive radio frequency receiver converts the received radio frequency signal into electrical power. The switch is actuable, in response to the electrical power generated by the passive radio frequency receiver, from an inactive mode. The switch substantially restricts the electrical device consuming standby power from the power supply, to an active mode. The switch allows the electrical device to consume power from the power supply.
US07911086B2	Switching circuit, signal output device and test apparatus A signal output device that outputs an output signal according to an input signal expressing a logical value that includes a high-voltage side switching circuit between a first terminal and a second terminal in accordance with a first control signal. The device includes a low-voltage side switching circuit between a first and second terminal for outputting a low-voltage side reference voltage in accordance with a second control signal and a control section. The high-voltage and low-voltage side switching circuits include a plurality of switching devices serially connected between the first terminal and the second terminal and each of which is opened in accordance with a provided control voltage. The control circuit opens the plurality of switching devices substantially in synchronization with each other, where a voltage inputted to the first terminal is outputted from the second terminal by short-circuiting between the first terminal and the second terminal.
US07911081B2	Power supply control method and structure therefor In embodiment, a power supply system is configured to use a linear regulator to form a regulated voltage during a standby mode and to use the regulated voltage to form another regulated voltage.
US07911079B2	Electrical system architecture having high voltage bus An electrical system architecture is disclosed. The architecture has a power source configured to generate a first power, and a first bus configured to receive the first power from the power source. The architecture also has a converter configured to receive the first power from the first bus and convert the first power to a second power, wherein a voltage of the second power is greater than a voltage of the first power, and a second bus configured to receive the second power from the converter. The architecture further has a power storage device configured to receive the second power from the second bus and deliver the second power to the second bus, a propulsion motor configured to receive the second power from the second bus, and an accessory motor configured to receive the second power from the second bus.
US07911077B2	Power supply system, vehicle provided with the same, temperature rise control method of power storage device, and computer-readable recording medium with program recorded thereon for causing computer to execute temperature rise control of power storage device During temperature rise control of a power storage device, a correction value calculation unit outputs a negative correction value when a voltage value exceeds an upper limit value. Thus, a duty command is corrected to be decreased. That is, duty command is corrected to increase a boost rate of a converter. Meanwhile, correction value calculation unit outputs a positive correction value when voltage value falls below a lower limit value. Thus, duty command is corrected to be increased. That is, duty command is corrected to lower the boost rate of the converter.
US07911076B2	Wind driven power generator with moveable cam A wind driven generator includes a rotor disposed in a cylindrical duct and supported by a frame for rotation in response to wind flowing through the duct. The rotor includes plural circumferentially spaced paralleled rotor blades supported for rotation about a generally horizontal axis. Each blade is supported for pivotal movement to change blade pitch, angle of attack or camber as the rotor rotates. A pitch or camber control motor, self-governing wind vane mechanism, or governing mechanism is operable to move a circular cam to vary blade pitch or camber to control rotor speed. The duct is mounted on a mast having a base supported on a foundation for pivotal movement to face the wind for maximizing air flow through the duct. Electric power generators are connected to opposite ends of the rotor at respective power output or drive shafts.
US07911073B2	System and method for a hydro-hydraulic gravitational generator A system and method for generating electricity using a hydro-hydraulic gravitational generator. In such a system, a main housing that is disposed in deep water may be exposed to deep water pressure. A piston disposed in the main housing may be raised as water enters the main housing. Water passing through water turbines generate electricity in this phase. After the piston is raised to its highest point within the main housing, the main housing may be exposed to atmospheric pressure such that the gravitational force on the piston expels the water that was just drawn in. The expelling water also may generate electricity by being passed though water turbines. The cycle may be repeated and electricity may be continuously generated.
US07911072B2	Methods for controlling a wind turbine connected to the utility grid, wind turbine and wind park The invention relates to methods for controlling a wind turbine connected to the utility grid by detecting status of the utility grid, and controlling one or more rotor blades and/or emitted power to the grid in returning to the operational wind turbine settings of normal grid mode. The invention also relates to a wind turbine and a wind park comprising at least two wind turbines.
US07911069B2	Semiconductor device and layout method thereof A semiconductor device and a layout method thereof are provided, each of which contributes to a reduction in layout area and appropriately adjusts an inter-wiring capacitance even where wiring widths and intervals in a plurality of wiring layers differ at a bus wiring comprised of the wiring layers. In the semiconductor device, a first functional block and a second functional block are connected to each other, and a plurality of wirings formed over their corresponding wiring layers are provided. The wiring layers have constant wiring widths and wiring intervals for every wiring layer. The number of wirings on each wiring layer is determined, at least in part, by multiplying (a) the total number of required wirings (for all wiring layers) by (b) a ratio of (i) a rate of wirings per unit length on the given layer versus (ii) the sum of the rates of wirings per unit length for each of the plurality of wiring layers. Where the rate of wirings per unit length on a given layer is an inverse of the sum of (x) the desired or predetermined constant wiring width for that layer and (y) the desired or predetermined constant wiring interval for that layer.
US07911068B2	Component and method for producing a component A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.
US07911066B2	Through-chip via interconnects for stacked integrated circuit structures A stacked IC structure has an integrated circuit (IC) having a front IC side, a back IC side, and a first conductive feature formed on the front IC side. A through-chip via connects to the first conductive feature on the front IC side. A substrate has an external circuit formed on a front surface. The IC attaches to the front surface of the substrate and the through-chip via forms a connection between the first conductive feature and the external circuit.
US07911065B2	Semiconductor package having a stacked wafer level package and method for fabricating the same A semiconductor package having a stacked wafer level structure includes a base substrate; a semiconductor chip; a redistribution pattern; and a second insulation layer pattern. The base substrate having a chip region and a peripheral region disposed at the periphery of the chip region. The semiconductor chip is disposed over the chip region and has a bonding pad. The first insulation layer pattern covers the chip region and the peripheral region and exposes the bonding pad. The redistribution pattern is disposed over the first insulation layer pattern and extends from the bonding pad to the peripheral region. The second insulation layer pattern is disposed over the first insulation layer pattern and opening some portion of the redistribution pattern disposed in the peripheral region.
US07911063B2	Semiconductor device In a semiconductor device according to an aspect of the invention, a direction in which a fourth metal interconnection layer located on a semiconductor layer is extended is orthogonal to a direction in which third interconnection layers ML30 and ML37 located on the fourth interconnection layer are extended. Thus, even in a case where a stress is applied from outside to bonding pads BP1 and BP2 located above, the stress is wholly dispersed by the third interconnection layers and the fourth interconnection layer which are laminated to intersect with each other, and stress concentration on a particular point can be relieved to restrain deterioration in semiconductor device strength to a minimum. Accordingly, it is possible to provide the semiconductor device having a structure in which productivity of the semiconductor device can be improved while the stress concentration applied from outside on the particular point of the bonding pad is relieved.
US07911060B2	Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.
US07911058B2	Semiconductor chip having island dispersion structure and method for manufacturing the same The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and a porous silicon domain layer, the semiconductor device layer being provided in a main surface region on one surface of the semiconductor silicon substrate, the porous silicon domain layer being provided in a main surface region on a back surface which is the other surface of the semiconductor silicon substrate, and the porous silicon domain layer having porous silicon domains dispersed like islands in the back surface of the semiconductor silicon substrate.
US07911051B2	Electronic circuit arrangement and method for producing an electronic circuit arrangement An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.
US07911048B2	Wiring substrate There is provided a wiring substrate. The wiring substrate includes: a semiconductor substrate having a through hole; an insulating film provided to cover an upper surface, a lower surface and a first surface of the semiconductor substrate, the first surface corresponding to a side surface of the through hole; a through electrode provided in the through hole; a first wiring pattern disposed on an upper surface side of the semiconductor substrate and coupled to the through electrode; and a second wiring pattern disposed on a lower surface side of the semiconductor substrate and coupled to the through electrode. A first air gap is provided between the first wiring pattern and the insulating film formed on the upper surface, and a second air gap is provided between the second wiring pattern and the insulating film formed on the lower surface.
US07911047B2	Semiconductor device and method of fabricating the semiconductor device A semiconductor device includes: a package substrate that includes a recessed portion, with electrode pads that are electrically connected to electrodes of the semiconductor chip being formed inside the recessed portion; a semiconductor chip that is housed in the recessed portion; terminal-use wires that are formed on the surface of the package substrate and are electrically connected to the electrode pads; external connection pads that are formed on a back surface of the package substrate and are electrically connected to the electrode pads; a sealing resin portion that includes a grinded surface that is parallel to the surface of the package substrate, and seals at least the semiconductor chip by a sealing resin; rewiring pads that are formed on the grinded surface; and connecting wires that are formed on the grinded surface and electrically interconnect the terminal-use wires and the rewiring pads.
US07911046B2	Integrated circuit packaging system with interposer An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.
US07911044B2	RF module package for releasing stress The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the die; a protection layer formed over the RDL; and pluralities of pads formed on the protection layer and coupled to the RDL. The RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
US07911043B2	Wafer level device package with sealing line having electroconductive pattern and method of packaging the same Provided are wafer level package with a sealing line that seals a device and includes electroconductive patterns as an electrical connection structure for the device, and a method of packaging the same. In the wafer level package, a device substrate includes a device region, where a device is mounted, on the top surface. A sealing line includes a plurality of non-electroconductive patterns and a plurality of electroconductive patterns, and seals the device region. A cap substrate includes a plurality of vias respectively connected to the electroconductive patterns and is attached to the device substrate by the sealing line. Therefore, a simplified wafer level package structure that accomplishes electric connection through electroconductive patterns of a sealing line can be formed without providing an electrode pad for electric connection with a device.
US07911041B2	Semiconductor device with gold coatings, and process for producing it A semiconductor device (7) has gold coatings (1 to 5) which are applied to metallic or ceramic components (6) of the semiconductor device (7). The gold coatings (1 to 4) have a multifunctional multilayer metal coating (8) with a minimal gold layer (9). The gold layer has a thickness dG where dG≦0.5 μm. Moreover, at least one metallic interlayer (10) is arranged between the gold layer (9) and the metallic or ceramic components (6).
US07911037B1	Method and structure for creating embedded metal features A method and structure for creating embedded metal features includes embedded trace substrates wherein bias and signal traces are embedded in a first surface of the embedded trace substrate and extend into the body of the embedded trace substrate. The bias trace and signal trace trenches are formed into the substrate body using LASER ablation, or other ablation, techniques. Using ablation techniques to form the bias and signal trace trenches allows for extremely accurate control of the depth, width, shape, and horizontal displacement of the bias and signal trace trenches. As a result, the distance between the bias traces and the signal traces eventually formed in the trenches, and therefore the electrical properties, such as impedance and noise shielding, provided by the bias traces, can be very accurately controlled.
US07911036B2	Semiconductor wafer with rear side identification and method A semiconductor wafer with rear side identification and to a method for producing the same is disclosed. In one embodiment, the rear side identification has a multiplicity of information regarding the monocrystalline and surface and also rear side constitution. A multiplicity of semiconductor device positions arranged in rows and columns are provided on the top side of the semiconductor wafer, an information chip being arranged at an exposed semiconductor device position, the information chip having at least the information of the rear side identification.
US07911034B2	Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers A method for patterning CNTs on a wafer wherein a CNT layer is provided on a substrate, a hard mask film is deposited on the CNT layer, a BARC layer (optional) is coated on the hard mask film, and a resist is patterned on the BARC layer (or directly on the hard mask film if the BARC layer is not included). Then, the resist pattern is effectively transferred to the hard mask film by etching the BARC layer (if provided) and etching partly into, but not entirely through, the hard mask film (i.e., etching is stopped before reaching the CNT layer). Then, the resist and the BARC layer (if provided) is stripped, and the hard mask pattern is effectively transferred to the CNTs by etching away (preferably by using C1, F plasma) the portions of the hard mask which have been already partially etched away.
US07911023B2	Semiconductor apparatus including a double-sided electrode element and method for manufacturing the same A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.
US07911021B2	Edge termination for semiconductor devices A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limiting structures connected in series with a semiconductor material, and also includes permanent charge in a trench-wall dielectric. The current-limiting structures in the trench structures are jointly connected in a series-parallel ladder configuration. The current-limiting structures, in combination with the semiconductor material, provide a voltage distribution between the core portion and the edge portion.
US07911012B2	Flexible and elastic dielectric integrated circuit General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.
US07911007B2	Semiconductor device and method of manufacturing the same A semiconductor device including a silicon substrate and a field effect transistor including a gate insulating film on the silicon substrate, a gate electrode on the gate insulating film, and source/drain regions formed in the substrate on opposite sides of the gate electrode, wherein the gate electrode includes a silicide layer containing an Ni3Si crystal phase, at least in a portion of the gate electrode, the portion including a lower surface thereof, and the transistor includes an adhesion layer containing a metal oxide component, between the gate insulating film and the gate electrode.
US07911006B2	Structure and fabrication method for capacitors integratible with vertical replacement gate transistors A process and an architecture related to a vertical MOSFET device and a capacitor for use in integrated circuits. Generally, the integrated circuit structure includes a semiconductor layer with a major surface formed along a plane thereof and further including a first doped region formed in the surface. A second doped region of a different conductivity type than the first doped region is positioned over the first region. A third doped region of a different conductivity type than the second region is positioned over the second region. In one embodiment of the invention, a semiconductor device includes a first layer of semiconductor material and a first field-effect transistor having a first source/drain region formed in the first layer. A channel region of the transistor is formed over the first layer and an associated second source/drain region is formed over the channel region. The integrated circuit further includes a capacitor having a bottom plate, dielectric layer and a top capacitor plate. In an associated method of manufacture, a first device region, selected from the group consisting of the source region and a drain region of a field-effect transistor is formed on a semiconductor layer. A first field-effect transistor gate region is formed over the first device region. A capacitor comprising top and bottom layers with a dielectric layer disposed therebetween, is also formed on the semiconductor layer. In another embodiment, the capacitor layers are formed within a trench or window formed in the semiconductor layer.
US07911003B2	Semiconductor integrated circuit device A semiconductor integrated circuit device including a semiconductor substrate and a MOS transistor having a source diffusion region and a drain diffusion region formed in the semiconductor substrate. A well is formed in the semiconductor substrate. A back gate diffusion region is defined in the vicinity of the source diffusion region or the drain diffusion region. The back gate diffusion region is of a conductivity type that is the same as that of the source diffusion region or the drain diffusion region. A potential control layer, arranged in the semiconductor substrate or under the well, controls the potential at the semiconductor substrate or the well.
US07911002B2	Semiconductor device with selectively modulated gate work function A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.
US07911001B2	Methods for forming self-aligned dual stress liners for CMOS semiconductor devices CMOS (complementary metal oxide semiconductor) fabrication techniques are provided to form DSL (dual stress liner) semiconductor devices having non-overlapping, self-aligned, dual stress liner structures.
US07910994B2	System and method for source/drain contact processing System and method for reducing contact resistance and prevent variations due to misalignment of contacts is disclosed. A preferred embodiment comprises a non-planar transistor with source/drain regions located within a fin. An inter-layer dielectric overlies the non-planar transistor, and contacts are formed to the source/drain region through the inter-layer dielectric. The contacts preferably come into contact with multiple surfaces of the fin so as to increase the contact area between the contacts and the fin.
US07910992B2	Vertical MOSFET with through-body via for gate In an embodiment, set forth by way of example and not limitation, a MOSFET power chip includes a first vertical MOSFET and a second vertical MOSFET. The first vertical MOSFET includes a semiconductor body having a first surface defining a source and a second surface defining a drain and a gate structure formed in the semiconductor body near the second surface. A via is formed within the semiconductor body and is substantially perpendicular to the first surface and the second surface. The via has a first end electrically coupled to the first surface and a second end electrically coupled to the gate structure. The second vertical MOSFET includes a semiconductor body having a first surface defining a source, a second surface defining a drain and a gate structure formed in the semiconductor body near the first surface. The first surface of the first vertical MOSFET and the second surface of the second vertical MOSFET are substantially co-planar and an electrically conductive can substantially surrounds the MOSFETS and shorts the first surface of the first vertical MOSFET to the second surface of the second vertical MOSFET.
US07910991B2	Dual gate lateral diffused MOS transistor A disclosed power transistor, suitable for use in a switch mode converter that is operable with a switching frequency exceeding, for example, 5 MHz or more, includes a gate dielectric layer overlying an upper surface of a semiconductor substrate and first and second gate electrodes overlying the gate dielectric layer. The first gate electrode is laterally positioned overlying a first region of the substrate. The first substrate region has a first type of doping, which may be either n-type or p-type. A second gate electrode of the power transistor overlies the gate dielectric and is laterally positioned over a second region of the substrate. The second substrate region has a second doping type that is different than the first type. The transistor further includes a drift region located within the substrate in close proximity to an upper surface of the substrate and laterally positioned between the first and second substrate regions.
US07910987B2	Semiconductor device A gate electrode <13> is provided to fill up a trench <300> while covering its opening. Assuming that WG represents the diameter (sectional width) of a head portion of the gate electrode <13> located upward beyond a P-type base layer <4> and an N+-type emitter diffusion layer <51>, WT represents the diameter (sectional width) of an inner wall of a linearly extending portion of the trench <300> and WC represents the distance between the boundary (the inner wall of the trench 300) between a gate oxide film <11> and the P-type base layer <4> and an end surface of the gate electrode <13> located upward beyond the trench <300> in a section of the trench <300>, relation of either WG≧1.3·WT or WC≧0.2 μm holds between these dimensions.
US07910986B2	Semiconductor memory device and data processing system A semiconductor memory device includes a silicon pillar, a gate electrode covering a side surface of the silicon pillar via a gate insulation film, diffusion layers (11, 12) provided in a lower part and an upper part, respectively of the silicon pillar, a bit line connected to the diffusion layer (11), and a memory element connected to the diffusion layer (12). The bit line includes a silicon material region in contact with the diffusion layer (11), and a low-resistance region including a material having lower electric resistance than that of the silicon material region. As a result, the resistance of the bit line embedded in the substrate can be decreased.
US07910982B2	Semiconductor apparatus and production method of the same In order to provide a highly integrated semiconductor apparatus and a production method thereof which can avoid the floating of a channel portion that causes a problem when constituting a memory cell from three-dimensional transistors, a semiconductor apparatus includes: multiple three-dimensional transistors each of which includes: a first pillar; a channel portion provided at the first pillar; diffused layers formed at both an upper portion and a lower portion of the channel portion; and a gate electrode provided around the channel portion via a gate insulation film; and a second pillar which is electrically conductive, wherein the multiple three-dimensional transistors are arranged on a well area while surrounding the second pillar, the multiple three dimensional transistors share the second pillar, and the channel portions of the multiple three dimensional transistors are each connected to the second pillar by a channel connection portion. In addition, six three-dimensional transistors preferably share the second pillar which is a single pillar.
US07910979B2	Nonvolatile semiconductor memory device The invention provides a nonvolatile semiconductor memory device comprising a plurality of memory strings each including a plurality of electrically programmable memory cells connected in series. The memory string includes a semiconductor pillar, an insulator formed around the circumference of the semiconductor pillar, and first through nth electrodes to be turned into gate electrodes (n denotes a natural number equal to 2 or more) formed around the circumference of the insulator. It also includes interlayer electrodes formed in regions between the first through nth electrodes around the circumference of the insulator.
US07910973B2	Semiconductor storage device A non-volatile semiconductor storage device has: a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series; and a capacitor element area including capacitor elements. Each of the memory strings includes: a plurality of first conductive layers laminated on a substrate; and a plurality of first interlayer insulation layers formed between the plurality of first conductive layers. The capacitor element area includes: a plurality of second conductive layers laminated on a substrate and formed in the same layer as the first conductive layers; and a plurality of second interlayer insulation layers formed between the plurality of second conductive layers and formed in the same layer as the first interlayer insulation layers. A group of the adjacently-laminated second conductive layers is connected to a first potential, while another group thereof is connected to a second potential.
US07910971B2	Methods of forming vertical field effect transistors, vertical field effect transistors, and dram cells A method of forming a vertical field effect transistor includes etching an opening into semiconductor material. Sidewalls and radially outermost portions of the opening base are lined with masking material. A semiconductive material pillar is epitaxially grown to within the opening adjacent the masking material from the semiconductor material at the opening base. At least some of the masking material is removed from the opening. A gate dielectric is formed radially about the pillar. Conductive gate material is formed radially about the gate dielectric. An upper portion of the pillar is formed to comprise one source/drain region of the vertical transistor. Semiconductive material of the pillar received below the upper portion is formed to comprise a channel region of the vertical transistor. Semiconductor material adjacent the opening is formed to comprise another source/drain region of the vertical transistor. Other aspects and implementations are contemplated.
US07910968B2	Semiconductor device and method for manufacturing the same A ferroelectric capacitor (42) is formed over a semiconductor substrate (10), and thereafter, a barrier film (46) directly covering the ferroelectric capacitor (42) is formed. Then, an interlayer insulating film (48) is formed and flattened. Then, an inclined groove is formed in the interlayer insulating film (48), and a barrier film (50) is formed over the entire surface.
US07910965B2	Image sensor circuits including shared floating diffusion regions An image sensor can include a plurality of photoelectric conversion elements arranged in a matrix. A plurality of floating diffusion regions can be shared by respective corresponding pairs of adjacent photoelectric conversion elements. A plurality of charge-transmission transistors can respectively correspond to the photoelectric conversion elements, where each of the charge-transmission transistors are connected between a corresponding one of the plurality of photoelectric conversion elements and a corresponding one of the plurality of floating diffusion regions. A plurality of charge-transmission lines can be commonly connected to gates of respective corresponding pairs of adjacent rows of charge-transmission transistors, where each of the respective corresponding pairs of adjacent rows of charge-transmission transistors can be connected to respective ones of the plurality of photoelectric conversion elements in different adjacent rows of floating diffusion regions.
US07910963B2	Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.
US07910960B2	Semiconductor integrated circuit device with a fuse circuit In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
US07910956B2	Semiconductor device with interface circuit and method of configuring semiconductor devices Methods and devices yielding an improved semiconductor device with interface circuit are disclosed. Configuring a semiconductor with parallel device features reduces process variation (e.g., lithographically-induced process variation or other defects). Embodiments of the present invention provide semiconductor devices with I/O cell device features (e.g., I/O gates or core gates) laid out in parallel. Additionally, embodiments of the present invention can allow patterning devices to be made to more exacting tolerances because some patterning devices may have a higher capability along one axis than another. Embodiments of the present invention also include a semiconductor device having like-functioned I/O cells arranged such that their layouts and rotational orientations with respect to their corresponding core remain constant. Furthermore, disclosed semiconductor devices may include at least one circuit cell having non-parallel features, where the circuit cell is arranged either within the core or within a corresponding interface circuit cell.
US07910952B2	Power semiconductor arrangement One aspect relates to a power semiconductor arrangement includes a power semiconductor module which is mechanically connected to a heat sink. In order to improve the thermal cycling stability of the connection between a baseplate of the module and a circuit carrier connected thereto, recesses are provided in the baseplate. One aspect further relates to a power semiconductor module.
US07910945B2	Nickel tin bonding system with barrier layer for semiconductor wafers and devices A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.
US07910944B2	Side mountable semiconductor light emitting device packages and panels Side-mountable semiconductor light emitting device packages include an electrically insulating substrate having a front face and a back face and a side face extending therebetween. The side face is configured for mounting on an underlying surface. An electrically conductive contact is provided proximate an edge of the substrate on the back face of the substrate and/or on a recessed region on the side face of the substrate. The contact is positioned to be positioned proximate an electrical connection region of the underlying surface when the semiconductor light emitting device package is side mounted on the underlying surface. A conductive trace extends along the front face of the substrate and is electrically connected to the contact. A semiconductor light emitting device is mounted on the front face of the substrate and electrically connected to the conductive trace.
US07910941B2	Light-emitting diode apparatus and manufacturing method thereof A light-emitting diode (LED) apparatus includes an epitaxial multilayer, a micro/nano rugged layer and an anti-reflection layer. The epitaxial multilayer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The micro/nano rugged layer is disposed on the first semiconductor layer of the epitaxial multilayer. The anti-reflection layer is disposed on the micro/nano rugged layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
US07910937B2	Method and structure for fabricating III-V nitride layers on silicon substrates A method and structure for fabricating III-V nitride layers on silicon substrates includes a substrate, a transition structure having AlGaN, AlN and GaN layers, and a superlattice structure having AlGaN and GaN layers. In the invention, the large lattice mismatch (17%) between GaN and silicon is solved by using AlN as the first buffer layer with a 5:4 coincidence between AlN(0001) and Si(111) lattice to reduce the lattice mismatch to 1.3%.
US07910933B2	Dual gate layout for thin film transistor A dual gate layout of a thin film transistor of liquid crystal display to alleviate dark current leakage is disclosed. The layout includes (1) a polysilicon on a substrate having a L-shaped or a snake shaped from top-view, which has a heavily doped source region, a first lightly doped region, a first gate channel, a second lightly doped region, a second gate channel, a third lightly doped region and a heavily doped drain region formed in order therein; (2) a gate oxide layer formed on the polysilicon layer and the substrate, (3) a gate metal layer then formed on the gate oxide layer having a scanning line and an extension portion with a L-shaped or an I-shaped. The gate metal intersects with the polysilicon layer thereto define the forgoing gate channels. Among of gate channels, at least one is along the signal line, which is connected to the source region through a source contact.
US07910932B2	Transparent nanowire transistors and methods for fabricating same Disclosed are fully transparent nanowire transistors having high field-effect mobilities. The fully transparent nanowire transistors disclosed herein include one or more nanowires, a gate dielectric prepared from a transparent inorganic or organic material, and transparent source, drain, and gate contacts fabricated on a transparent substrate. The fully transparent nanowire transistors disclosed herein also can be mechanically flexible.
US07910931B2	Thin film transistor substrate having a contact hole that does not expose a step portion A thin film transistor substrate including a thin film transistor having a drain electrode with an electrode portion, which overlaps with a semiconductor layer, and an extended portion, which extends from the electrode portion and has a portion overlapping with a storage electrode or storage electrode line. A passivation layer is arranged on the drain electrode, and it has a contact hole that partially exposes the extended portion of the drain electrode without exposing a step in the extended portion caused by the storage electrode or storage electrode line. A pixel electrode is arranged on the passivation layer and is electrically connected with the extended portion of the drain electrode through the contact hole.
US07910930B2	Thin film transistor and thin film transistor display panel having a frame and a line-shaped semiconductor A thin film transistor is provided. The thin film transistor includes a frame formed on a substrate and having a plurality of grooves, line-shaped semiconductors disposed in at least one of the grooves, a first electrode overlapping with the line-shaped semiconductors, and second and third electrodes connected to ends of the line-shaped semiconductors.
US07910926B2	Electro-optical device and electronic apparatus An electro-optical device includes a switching element with a gate electrode provided opposite to the channel region. The gate electrode has a ring-shaped structure that surrounds a junction region between the channel region and a source/drain region.
US07910924B2	Liquid crystal display apparatus and manufacturing method therefor A liquid crystal apparatus is provided wherein the liquid crystal layer comprises a section formed by polymerizing a polymerizable compound in the presence of a liquid crystal by selectively irradiating active energy rays onto the substrate surface when no voltage is applied, or alignment control layers and bumps are formed by polymerizing a polymerizable compound which is added to said liquid crystal, or first electrodes with a vertical alignment control film and a second electrode with a horizontal alignment control film face each other and alignment control of the liquid crystal is performed by irradiating light from a direction tilted from the normal line direction on said liquid crystal display apparatus. A liquid crystal display apparatus which can implement high transmittance, high-speed response and a wide viewing angle can be provided.
US07910920B2	Thin film transistor and method of forming the same A thin film transistor (TFT) may include a channel layer, a source electrode, a drain electrode, a protective layer, a gate electrode, and/or a gate insulating layer. The channel layer may include an oxide semiconductor material. The source electrode and the drain electrode may face each other on the channel layer. The protective layer may be under the source electrode and the drain electrode and/or may cover the channel layer. The gate electrode may be configured to apply an electric field to the channel layer. The gate insulating layer may be interposed between the gate electrode and the channel layer.
US07910918B2	Gated resonant tunneling diode A gated resonant tunneling diode (GRTD) that operates without cryogenic cooling is provided. This GRTD employs conventional CMOS process technology, preferably at the 65 nm node and smaller, which is different from other conventional quantum transistors that require other, completely different process technologies and operating conditions. To accomplish this, the GRTD uses a body of a first conduction type with a first electrode region and a second electrode region (each of a second conduction type) formed in the body. A channel is located between the first and second electrode regions in the body. A barrier region of the first conduction type is formed in the channel (with the doping level of the barrier region being greater than the doping level of the body), and a quantum well region of the second conduction type formed in the channel. Additionally, the barrier region is located between each of the first and second electrode regions and the quantum well region. An insulating layer is formed on the body with the insulating layer extending over the quantum well region and at least a portion of the barrier region, and a control electrode region is formed on the insulating layer.
US07910907B2	Manufacturing method for pipe-shaped electrode phase change memory A method for manufacturing a memory cell device includes forming a bottom electrode comprising a pipe-shaped member, a top, a bottom and sidewalls having thickness in a dimension orthogonal to the axis of the pipe-shaped member, and having a ring-shaped top surface. A disc shaped member is formed on the bottom of the pipe-shaped member having a thickness in a dimension coaxial with the pipe-shaped member that is not dependent on the thickness of the sidewalls of the pipe-shaped member. A layer of phase change material is deposited in contact with the top surface of the pipe-shaped member. A top electrode in contact with the layer of programmable resistive material. An integrated circuit including an array of such memory cells is described.
US07910903B2	Optical sensor with a counter for counting items and controlling a light source An optical sensor comprises: a light source located on one side of a transport path; a variable current drive, an optical receiver in communication with the variable current drive, and located on an opposite side of the transport path to the light source and aligned therewith to detect light output therefrom; and a memory coupled to the variable current drive. The variable current drive is suitable for energising the light source so that the light intensity from the light source increases with increasing current. The variable current drive includes (i) a drive circuit for applying a pulse of current to the light source, during which pulse the light source is energised; and (ii) a counter for increasing the amount of current applied by the drive circuit during a pulse of current. The memory may be arranged to store a value from the counter indicative of a number of media items present in the transport path.
US07910899B2	Flat UV light source A flat UV light source has a tight packing of UV light-emitting diodes (56) that are arranged in a matrix. These light-emitting diodes are cooled by cooling air flows (66) or by cooling water flows.
US07910897B2	Process and apparatus for post deposition treatment of low dielectric materials Methods and apparatus are provided for processing a substrate with an ultraviolet curing process. In one aspect, the invention provides a method for processing a substrate including depositing a silicon carbide dielectric layer on a substrate surface and curing the silicon carbide dielectric layer with ultra-violet curing radiation. The silicon carbide dielectric layer may comprise a nitrogen containing silicon carbide layer, an oxygen containing silicon carbide layer, or a phenyl containing silicon carbide layer. The silicon carbide dielectric layer may be used as a barrier layer, an etch stop, or as an anti-reflective coating in a damascene formation technique.
US07910883B2	Method and device for the mass spectrometric detection of compounds A method for mass-spectrometric detection of compounds in a gas flow includes: alternatingly forming first and a second beams by switching between electron pulses/pulse trains and photon pulses/pulse trains, the photon pulses/pulse trains being generated by an excimer lamp, and the switching between the electron pulses/pulse trains and the photon pulses/pulse trains occurring at a switching frequency above 50 Hz; disposing the gas flow in an ionization region crossed by the first and second beams so as to ionize volume units in the gas flow so as to form ions of the compounds; deflecting the ions in an effective region of an electric field to a mass-spectrometric device; and sensing the ions with a mass-spectrometric process of the mass-spectrometric device.
US07910881B2	Mass spectrometry with laser ablation A mass spectrometric analysis of surface material is performed by vaporizing the surface material with pulses of laser light and then collecting the vaporized material by dissolving it in a liquid. The liquid with the dissolved material is then fed to an ionization process, preferably an electrospray ionization process. The resulting ions are then analyzed with a mass spectrometer. The method is particularly suited for use with imaging mass spectrometry.
US07910877B2	Mass spectral analysis of complex samples containing large molecules The present invention provides, inter alia, methods of analyzing mass spectral data based on charge states of analyte ions. In some embodiments, the methods can be used for differential profiling of samples, such as comparing a sample comprising a given compound and a sample comprising metabolites of the same compound. The methods can also be used to identify and isolate biomarkers. Systems for performing the methods, as well as computer-readable media for performing the methods, are also described.
US07910875B2	Systems and methods for indicating an amount of use of a sensor Aspects of the present disclosure include systems and methods for indicating an amount of use of a pulse oximetry sensor. According to one embodiment, the system includes an oximeter that monitors the amount of use for a given sensor. The oximeter and/or the sensor may advantageously include a visual alarm, an audio alarm, a vibrational alarm, a power down function, or the like, which can be activated when a predetermined amount of use has expired. According to another embodiment, the system includes a sensor having a memory device storing a unique identifier.
US07910874B2	Method of amplifying charge in an imager A charge coupled device (CCD) includes a low noise charge gain circuit that amplifies charge of a cell dependent upon the charge accumulated by the cell. The low noise charge gain circuit receives clocking signals, such as from an input diode, which allow charge to accumulate in a reservoir well and then flow into a receiving well. The low noise charge gain circuit also receives a voltage signal corresponding to charge accumulated on an associated cell. The amount of charge flowing into the receiving well depends on this voltage signal.
US07910870B2	Solar tracker A solar tracker includes a sunlight-detecting unit, a control unit, a first motor and a second motor. The sunlight-detecting unit detects the position of the sun. Based on the position of the sun, the control unit instructs the first motor to rotate a solar cell array and the second motor to tilt the solar cell array.
US07910869B2	Laser processing apparatus using distinct horizontal and vertical data sets A laser processing apparatus includes a laser source (11), a spatial phase modulator (13) configured to modulate a phase of a laser beam emitted from the laser source, a synthetic data generator (17) configured to generate synthetic data by combining hologram image data representing a pattern image to be processed with position displacement hologram data for shifting the pattern image to a prescribed position, the synthetic data being input to the spatial phase modulator for the phase modulation of the laser beams, and a focusing optical unit (14) configured to guide the phase-modulated laser beam onto a surface to be processed to reproduce the pattern image on the processed surface.
US07910868B2	Autofocus device detecting focus point with liquid crystal lens Predetermined voltage is applied to a liquid crystal lens by a liquid crystal lens driver. Image signals are generated based on an optical image passed through the liquid crystal lens during transient response operation caused by application of the predetermined voltage, and plural focus signals are extracted by sampling the image signals at predetermined cycles. Levels of the extracted autofocus signals are compared to determine the maximum value of the autofocus signal. Thus, with the liquid crystal lens, by making use of the transient response operation of the liquid crystal lens, a focus point can be detected in sufficient speed.
US07910862B2	Apparatus and method for manufacturing a semiconductor device with a sapphire substrate A supporting base, including a supporting plate and holders, holds a sapphire substrate so that one substrate surface faces a hot plate and the other substrate surface faces a radiant heat absorbing plate mounted on the supporting plate. Radiant heat from the hot plate passes through the sapphire substrate and heats the radiant heat absorbing plate. The sapphire substrate is heated from both sides by air warmed by the hot plate and radiant heat absorbing plate, and therefore does not warp. When the temperature of the sapphire substrate has reached the necessary level, the supporting base delivers the sapphire substrate to the surface of the hot plate, then moves away while the sapphire substrate is held against the hot plate and a semiconductor fabrication process is carried out on the sapphire substrate.
US07910860B2	Fluid warmer A heat exchange apparatus including a heat exchanging portion capable of conforming to the outer surface of a heat exchange target.
US07910856B2	Hybrid laser processing apparatus A processing table 3 holding a workpiece 2 is accommodated in a chamber 4 with a gas-tight condition kept, and a liquid column W is jetted to an upper surface of this chamber 4, and a processing head 9 that guides laser beam L to the liquid column W is secured to the upper surface of this chamber 4. An oil-sealed rotary pump 11 and a diffusion pump 12 provided in parallel are connected to the chamber 4, and the diffusion pump 12 is actuated after the actuation of the oil-sealed rotary pump 11, bringing the inside of the chamber 4 into a vacuum state.No gas currents are generated around the liquid column W jetted from the processing head 9, making it possible to prevent turbulence of the liquid column W due to turbulence of the gas currents and enabling a liquid column having a small diameter to be jetted in a stable state.
US07910855B2	No gap laser welding of coated steel Welding using a laser, which leaves keyhole portions at each pass, that allow gases to vent. That keyhole portion is an area within the interior portion, e.g., an inside of a spiral or a circular arc. The keyhole is not processed by the laser and gases can escape. The laser later circles back to process the area.
US07910853B2	Direct real-time monitoring and feedback control of RF plasma output for wafer processing A method and apparatus for controlling power output of a capacitatively-coupled plasma are provided. A detector is disposed on the power delivery conduit carrying power to one electrode to detect fluctuations in power output to the electrode. The detector is coupled to a signal generator, which converts the RF input signal to a constant control signal. A controller adjusts power input to the RF generator by comparing the control signal to a reference.
US07910850B2	Electrical switching apparatus and push-to-trip assembly therefor A push-to-trip assembly is provided for an electrical switching apparatus, such as a circuit breaker. The push-to-trip assembly includes a push-to-trip actuator having first and second ends and being movable among a first position corresponding to the circuit breaker separable contacts being closeable, and a second position corresponding to the second end cooperating with a trip bar to cause the circuit breaker operating mechanism to trip open the separable contacts. The first end is accessible from the exterior of the housing to actuate the push-to-trip actuator from the first position to the second position. A biasing element biases the push-to-trip actuator away from the base toward the first position. At least one cover stop of the push-to-trip actuator engages a corresponding portion of the housing cover to stop movement of the push-to-trip actuator. An overtravel restraint proximate the second end of the push-to-trip actuator restrains movement of the trip bar.
US07910848B2	Easy-to-clean keypad device Keypad devices have become commonplace in everyday life. They are part of our everyday life, in the form of pocket calculators, telephones, remote control devices, and cellular phones. Cleaning these keypad devices is problematic, since they have a large number of actuatable keys, due to the functions to be performed. As a mechanical interface in the keypad device, each key is a critical weak point in terms of maintaining a tight seal. An easy-to-clean keypad device, in particular an emergency call device, has a main body, an electronic assembly—which includes circuit elements and is installed in main body—a closing shell and keys, which are installed in closing shell and are designed to mechanically actuate the circuit elements. Closing shell with installed keys is a first preinstalled assembly, and main body with installed electronic assembly is a second preinstalled assembly. The first and second preinstalled assemblies are interconnected such that they may be separated.
US07910846B2	Steering column assembly for vehicle A steering column assembly includes a light switch and a wiper switch assembled to a column tube of a column shaft via an assembly bracket. The assembly bracket includes a body, to which the light switch and the wiper switch are coupled, and a coupling section, to which a top portion of the column tube is fixed. With the assembly, the light switch and the wiper switch can be easily and closely assembled to the column. Also, the assembly tolerance between the column and the assembly bracket can be minimized.
US07910845B2	Removable racking system for an electrical switching apparatus A modular racking system for an electrical switching apparatus is provided. The modular racking system includes a carriage assembly structured to support electrical switching apparatus and at least one cam follower structured to be removably coupled to the electrical switching apparatus.
US07910844B2	Leaf switch and ice making device using leaf switch A leaf switch may include a cam body formed with a plurality of cam parts in a multistage shape and a plurality of leaf contact pieces which are extended toward the cam body and whose tip end sides of the plurality of leaf contact pieces are respectively abutted with the plurality of cam parts, and base end sides of the plurality of leaf contact pieces are held at the same height position. Further, an ice making device may include a water supply leaf switch for controlling water supply from a water-supply part to an ice tray, and a water supply amount adjust mechanism which includes an operation member that causes a leaf contact piece to deform to adjust a timing when the water supply switch is turned on or off. Further, an ice making device may include an ice detecting lever and a lever position detecting mechanism which detects ice amount in an ice storage part by detecting a position of the ice detecting lever.
US07910840B2	Apparatus and method for determining growth status of a human subject A measurement device and method that in one aspect determines and displays percentile information relating to growth indices, such as BMI, weight-for-length, and weight-for-height, based on a subject's age and gender. The device and method may also provide classification information, such as whether the percentile information is considered to be, for example, below normal, normal, above normal, or far above normal. The device and method may additionally indicate, for example, the normal range of the subject's weight based on the subject's height, the subject's height based on the subject's weight and the normal range of BMI based on the subject's age and gender. In still another aspect, the device and method may indicate predictive values of the subject's future weight, height, BMI or head circumference based on the subject's present measurement values and growth percentiles.
US07910837B2	Circuit board, electronic device and method for manufacturing the same A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.
US07910832B2	Line routing device A line routing device is provided in order to allow simple, reliable electrical linking, in particular of a motor-vehicle sliding door to a vehicle power supply system. The line routing device includes a housing having a movement opening which extends in longitudinal direction and an outlet opening. A movement element is movably mounted in the movement opening and the cable as well as a spring strip, which is bent in a U-shape, are attached to the movement element. The cable is routed along the spring strip to the outlet opening and an end of the spring strip, which is remote from the movement element, is fixed to the housing.
US07910828B1	Gangable electrical unit A gangable electrical unit for positioning an electrical component beside an electrical outlet box includes a bracket having a wall structure that defines a front opening. First and second arms extend from the bracket. The first and second arms each include an attachment wall extending from a front edge of the bracket and a support wall extending from the bracket behind the attachment wall. The attachment wall includes an electrical box mounting aperture therethrough. The bracket is configured for attachment to an adjacent electrical device mounting box by aligning the electrical box mounting apertures of the first and second arms with electrical box mounting apertures of the adjacent electrical device box. In addition, a gap between the attachment walls of the first and second arms is larger than an outer wall height of the adjacent electrical device mounting box.
US07910822B1	Fabrication process for photovoltaic cell A photovoltaic strip is physically separated from a semiconductor wafer utilizing physical sawing or other techniques. In accordance with one embodiment, a type of semiconductor wafer is first determined by interrogating the wafer to identify one or more of its optical, thermal, or electrical characteristics. This information regarding substrate type is then communicated to a separation apparatus, which then accomplishes precise physical separation of the substrate into discrete strips. Electrical performance of the strips may be tested prior to their incorporation into an assembled solar cell, where they are coupled to a concentrating element utilizing an elastomer encapsulant.
US07910819B2	Selection of tonal components in an audio spectrum for harmonic and key analysis An audio signal is processed to extract key information by selecting (102) tonal components from the audio signal. A mask is then applied (104) to the selected tonal components to discard at least one tonal component. Note values of the remaining tonal components are determined (106) and mapped (108) to a single octave to obtain chroma values. The chroma values are accumulated (110) into a chromagram and evaluated (112).
US07910817B1	Drum A drum comprises a drum body made of at least one fiber layer. The drum body is provided with a drumhead at each of two opposite ends thereof. The drumheads are positioned on two reinforced frames disposed at both ends of the drum body by two drum hoops, so that the contact area between the drumheads and the drum body can be reduced through the reinforced frames. In addition, the reinforced frames reinforce the structure and maintain the shape of the drum body. Plural positioning screws are inserted through the periphery of the respective drum hoops, and the drum body is provided with plural fixing members to be screwed with the positioning screws. By such arrangements, the drum not only has the advantages of reinforced structure, light weight and easy production but exert a better resonance effect, making the sound produced by the drum more robust and powerful.
US07910816B2	Circular percusive sound generation instrument A percussion instrument incorporates a case with an inner surface having a substantially circular profile. Multiple high precision spherical balls are contained with the case for acceleration on the inner surface in uniform circular motion along the profile to produce a persistent sustained sound. In one exemplary embodiment the case is cylindrical and incorporates two end plates. In a second embodiment the percussion instrument case is torroidal. In a third embodiment the percussion instrument case is spherical. Use of varying materials in the case or differing surface textures on the inner surface allows timbre of the instrument to be modified. Motion of the instrument lateral or perpendicular to the circular profile allows the creation of pulsed percussion sounds.
US07910809B1	Soybean variety XR31C09 According to the invention, there is provided a novel soybean variety designated XR31C09. This invention thus relates to the seeds of soybean variety XR31C09, to the plants of soybean XR31C09 to plant parts of soybean variety XR31C09 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XR31C09 with another soybean plant, using XR31C09 as either the male or the female parent.
US07910804B2	Polypeptides having alpha-glucosidase activity and polynucleotides encoding same The present invention relates to isolated polypeptides having alpha-glucosidase activity and isolated polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods for producing and using the polypeptides.
US07910801B2	Plants with reduced expression of phosphatase type 2C gene for enhanced pathogen resistance The present invention relates to a method for down regulating an Arabidopsis protein phosphatase type 2C gene, referred to as “defense-associated protein phosphatase type 2C one” (DAPP1) that functions as a negative regulator of a plant defense pathway by contacting the gene or gene mRNA with an interfering nucleotide sequence that interacts with the gene and reducing expression thereof. Plants including such interfering nucleotide sequence exhibit increased disease resistance to pathogen even in the absence of R genes. Close homologs of DAPP1 exist in multiple crop species, and as such, the controlled down-regulation of homologous genes in a variety of crop species will enhance disease resistance of target crop species to pathogens.
US07910795B2	Absorbent article containing a crosslinked elastic film A technique for imparting latent elasticity to components of an absorbent article is provided. More specifically, a latent elastic film that contains a crosslinkable semi-crystalline polyolefin is initially incorporated into an absorbent article. The film is not highly elastic prior to crosslinking and is thus dimensionally stable. Consequently, the film need not be maintained in a mechanically stretched condition during attachment to other components of the absorbent article, which provides for greater freedom in the location and manner in which the components are attached together. Once incorporated into the absorbent article, the semi-crystalline polyolefin is crosslinked to form a three-dimensional network having elastic memory. The film may also be heat activated, either through crosslinking or an additional step, to cause the film to shrink and further improve its stretch characteristics.
US07910791B2	Combination SIS and vacuum bandage and method A wound care bandage for treating a wound is provided. The bandage includes an SIS layer to be placed on the wound surface and a cover to placed over the wound. Illustratively, the bandage further includes a structure to provide a vacuum space. A method for promoting wound healing is further provided. The method includes applying the above-mentioned wound care bandage to the wound and creating a vacuum in the vacuum space to draw blood controllably from the wound into the SIS layer.
US07910788B2	System for treating infectious waste matter A system and method is provided for producing a safely disposable end product from waste matter containing undesirable materials, such as infectious, biohazardous, hazardous, or radioactive elements. An apparatus is provided that immerses the biologically infectious waste material in a highly alkaline solvent which is then heated. The waste matter containing the undesirable materials is allowed to remain within the solvent until digested, thereby forming a solution void of any infectious or biohazardous elements and/or containing a decreased concentration of radioisotope.
US07910779B2	Process for producing cyclohexylbenzene In a process for producing cyclohexylbenzene, benzene and hydrogen are fed to at least one reaction zone. The benzene and hydrogen are then contacted in the at least one reaction zone under hydroalkylation conditions with a catalyst system comprising a molecular sieve having an X-ray diffraction pattern including d-spacing maxima at 12.4±0.25, 6.9±0.15, 3.57±0.07 and 3.42±0.07 Angstrom, and at least one hydrogenation metal to produce an effluent containing cyclohexylbenzene. The catalyst system has an acid-to-metal molar ratio of from about 75 to about 750.
US07910777B2	Method for producing cycloalkanol and/or cycloalkanone The present invention provides a method for producing cycloalkanol and/or cycloalkanone, which comprises reacting cycloalkane with molecular oxygen in the presence of mesoporous silica, (1) the mesoporous silica containing at least one transition metal; (2) the mesoporous silica having such pore distribution that the ratio of a total pore volume of mesoporous silica particles having a pore size of 3 to 50 nm to a total pore volume of mesoporous silica particles having a pore size of 2 to 50 nm is 50% or more; and (3) the mesoporous silica being modified by an organic silicon compound.
US07910775B2	Synthesis of 2-Hydroxy-N,N-dimethyl-3-[[2-[[1(R)-(5-methyl-2-furanyl)propyl]amino]-3,4-dioxo-1-cyclobuten-1-yl]amino]benzamide Disclosed is a process for making the compound of formula I: using the compounds of formulas II, Q, and XI or XII: wherein A is selected from the group consisting of Br, Cl and I (with Br being preferred); and R represents (C1-C10)alkyl. Also disclosed are intermediate compounds that are made in the disclosed process.
US07910772B2	Mixed metal oxide catalysts and processes for their preparation and use A catalyst for the oxidation of an alkane, alkene or mixtures thereof. The catalyst includes a mixed-metal oxide having the formula MoaVbNbcTedSbeOf wherein, when a=1, b=0.01 to 1.0, c=0.01 to 1.0, d=0.01 to 1.0, e=0.01 to 1.0, and f is dependent upon the oxidation state of the other elements, the catalyst further characterized by having at least two crystal phases, the first crystal phase being an orthorhombic M1 phase and the second crystal phase being a pseudo-hexagonal M2 phase, the orthorhombic M1 phase present in an amount between greater than 60 weight percent to less than 90 weight percent. The catalysts disclosed herein exhibit a chemisorption of NH3 of less than about 0.2 mmole per gram of metal oxide.
US07910770B2	Fc receptor modulating compounds and compositions The present invention provides compounds capable of binding to an Fc receptor and modulating Fc receptor activity comprising a core lipophilic group in the form of an Aryl ring substituted with a group rich in p-electrons. The invention further provides for a method of treating an autoimmune disease involving Fc receptor activity using such compounds. A method for obtaining a compound which modulates Fc receptor activity is also provided, the method comprising: (a) providing or designing compounds having structural characteristics to fit in the groove of the FcγRIIa structure; and (b) screening the compounds for modulating activity on the Fc receptor.
US07910768B2	Materials for lithographic plates coatings, lithographic plates and coatings containing same, methods of preparation and use This invention relates to iodonium salts, acetal copolymers and polymer binders comprising functional groups capable of undergoing cationic or radical polymerization, their method of preparation and their use in the preparation of coating solutions and coatings. This invention also relates to coatings containing the iodonium salts, acetal copolymers and/or polymer binders and to negative working lithographic printing plates comprising these coatings.
US07910765B2	Composition and method for low temperature deposition of silicon-containing films such as films including silicon, silicon nitride, silicon dioxide and/or silicon-oxynitride Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.
US07910764B2	Polymethylaluminoxane preparation, method of producing the same, polymerization catalyst, and polymerization method of olefins A polymethylaluminoxane preparation exhibiting excellent storage stability with a high yield is provided. A polymethylaluminoxane preparation is formed by thermal decomposition of an alkylaluminum compound having an aluminum-oxygen-carbon bond, the alkylaluminum compound being formed by a reaction between trimethylaluminum and an oxygen-containing organic compound. In this preparation, (i) the oxygen-containing organic compound reacting with trimethylaluminum is an aliphatic or aromatic carboxylic acid represented by the general formula (I), R1—(COOH)n (I), wherein R1 represents a hydrocarbon group of C1-C20 straight or branched alkyl groups, alkenyl groups or aryl groups, and n represents an integer of 1 to 5; (ii) a mole fraction of methyl groups originating from trimethylaluminum, relative to the total moles of methyl groups existing in the generated polymethylaluminoxane preparation is not more than 26 mol %; and (iii) the generated polymethylaluminoxane preparation has a viscosity of not more than 2.1×10−3 Pa·sec at 40° C.
US07910761B2	Hydroconversion processes employing multi-metallic catalysts and method for making thereof A catalyst precursor composition and methods for making such a catalyst precursor are disclosed. The catalyst precursor comprises at least a promoter metal selected from Group VIII, Group IIB, Group IIA, Group IVA and combinations thereof having an oxidation state of +2 or +4, at least one Group VIB metal having an oxidation state of +6, and at least one organic oxygen-containing ligand. Catalysts prepared from the sulfidation of such catalyst precursors are used in the hydroprocessing of hydrocarbon feeds.
US07910760B2	Semi-rigid linked diamines, precursors therefor, and transition metal diamido complexes as catalysts for olefin polymerization processes The invention relates to a process for producing a complex for use in olefin polymerization and oligomerization of the general formula (III): wherein Mt is a group 3 to 12 element in a +2 to +6 oxidation state with between 1 to 4 additional ligands (anionic and/or neutral) coordinated, wherein R1 and R2 are hydrogen, halogen, alkoxy, or a hydrocarbon group containing between 1 to 12 carbon atoms; E is a group 16 element, preferably O; Z is a direct bond between carbon atoms of the adjacent aromatic rings or a —CR3R4— or —SiR3R4— bridge between those carbon atoms, where R3 and R4 are hydrogen or a hydrocarbon groups with 1 to 10 carbons, R5, R6, R7 and R8 are hydrogen, halogen, alkoxy, or a hydrocarbon group containing between 1 to 10 carbon atoms and J1 and J2 are —NR9R10 or —PR9R10, where R9 is H or SiMe3 group and R10 is selected from a group consisting of alkyl, aryl, substituted aryl, heteroalkyl, and heteroaryl containing between 1 to 30 non-hydrogen atoms through a route involving novel precursors such as compounds represented by the general formula (I) where the various substitution options are adapted to produce the substituents shown for formula (III) above.
US07910758B2	Catalytic hydrogenation process for the production of low trans fat-containing triglycerides Hydrogenated vegetable oil exhibiting superior thermal stability and containing reduced levels of saturates and trans fatty acids are produced using an activated hydrogenation catalyst and/or an improved hydrogenation process incorporating high shear. The use of a high shear mechanical device incorporated into the hydrogenation process as a reactor device is shown to be capable of enabling reactions that would normally not be feasible under a given set of reaction pressure and temperature conditions. For example, the hydrogenation process described herein enables a reduction of hydrogenation time, and operation at lower temperatures than current processes. The resulting hydrogenated vegetable oil is particularly useful in frying, confectionery baking, and other applications where a product with a low trans fat content or higher thermal stability is desirable. The hydrogenated oil produced may comprise less than 10 weight % of trans fatty acids with less than 5 weight % of linolenic acid (C18:3).
US07910757B2	Process for the preparation of fatty acids A process for the preparation of a material comprising conjugated isomers of a polyunsaturated fatty acid comprises: treating a first fatty acid mixture comprising saturated fatty acids, monounsaturated fatty acids and polyunsaturated fatty acids in the presence of ethanol to form (i) a solid fraction and (ii) a liquid fraction comprising a second fatty acid mixture, wherein the second fatty acid mixture has a higher molar ratio of total polyunsaturated fatty acids to total saturated and monounsaturated fatty acids than the first fatty acid mixture; separating the solid fraction and the liquid fraction; and subjecting the second fatty acid mixture or a derivative or reaction product thereof to treatment with a base in the presence of a solvent, to form conjugated isomers of at least some of the polyunsaturated fatty acids.
US07910752B2	Anticancer compound, intermediate therefor, and processes for producing these The present invention provides a method for easily and inexpensively preparing a racemate or an optically-active 2-(1 -hydroxyethyl)-5-hydroxynaphtho[2,3-b]furan-4,9-dione in high yields, 2-acetyl-2,3-dihydro-5-hydroxynaphtho[2,3-b]furan-4,9-dione which is useful as an intermediate for preparing NFD, and an anticancer agent comprising 2-(1-hydroxyethyl)-5-hydroxynaphtho[2,3-b]furan-4,9-dione as an active ingredient.Said 2-(1-hydroxyethyl)-5-hydroxynaphtho[2,3-b]furan-4,9-dione is obtained in 4 or 5 steps by using comparatively inexpensive 5 -hydroxynaphthalene-1,4-dione (also referred to as juglone) as a starting material.
US07910750B2	Artemisinin (qinghaosu) derivatives, their preparation methods and their use, and pharmaceutical compositions containing the same The invention provides a type of artemisinin derivatives having following structure I, its preparation method and use, as well as a pharmaceutical composition containing such artemisinin derivatives and its use. The arteminsinin derivatives of the present invention and their pharmaceutical composition containing the artemisinin derivatives. have immunosuppressive activities and can be used more safely. The composition which comprises the artemisinin derivatives can be formulated into long-term dosage forms such as tablet, pellet and the like, and have wider productive and use value.
US07910749B2	Methods for oxidizing organic compounds A method oxidizes an organic compound with oxygen in the presence of a catalyst, in which the catalyst contains a N-hydroxy- or N-(substituted oxy)-imide compound derivable from at least one selected from a target product, a reaction intermediate, and a reaction byproduct, and the catalyst is produced from at least one component selected from the target product, reaction intermediate, and reaction byproduct each formed as a result of the reaction and is used in the oxidation reaction so as to make up for a loss of the catalyst due to denaturation in the reaction. The method can easily and inexpensively make up for a loss of the catalyst denaturated in the course of reaction.
US07910748B2	Thiophene-containing compound and thiophene-containing compound polymer, organic electroluminescent device, production method thereof, and image display medium An organic electroluminescent device with a pair of electrodes having an anode and a cathode, and one or more organic compound layers disposed therebetween. One of the anode or the cathode is transparent or semitransparent. One of the organic compound layers includes a charge-transporting polyester having a repeating structure containing at least one structure selected from the structures represented by the following formulae as a partial structure: Ar represents an unsubstituted monovalent phenyl group, an unsubstituted monovalent polynuclear aromatic hydrocarbon having 2 to 10 aromatic rings, an unsubstituted monovalent fused aromatic hydrocarbon having 2 to 10 aromatic rings, or an unsubstituted monovalent fused aromatic hydrocarbon having 2 to 10 aromatic rings, or an unsubstituted monovalent aromatic heterocyclic ring; X represents a group represented by the following formula (II); T represents a bivalent straight-chain hydrocarbon group having 1 to 6 carbon atoms; k represents O; and l represents 1: R1 and R2 each represent a hydrogen atom, a substituted or unsubstituted alkyl group, a substituted or unsubstituted aryl group, or a substituted or unsubstituted aralkyl group; and n represents an integer of 1 to 10.
US07910743B2	Compounds, compositions and methods Certain substituted urea derivatives selectively modulate the cardiac sarcomere, for example by potentiating cardiac myosin, and are useful in the treatment of systolic heart failure including congestive heart failure.
US07910742B2	Survivin inhibitors Compounds that inhibit survivin, compositions containing the compounds and methods of treating diseases in which survivin is unregulated or overexpressed are disclosed.
US07910738B2	Intermediates for alpha-fluoroalkyl tetrabenazine and dihydrotetrabenazine imaging agents and probes The present invention provides novel fluorophilic compounds having structure VII wherein Q is a carbonyl group, a protected carbonyl group, a hydroxy methine group, or a protected hydroxy methine group; R1 is a C1-C20 aliphatic, C2-C20 cycloaliphatic, or C2-C20 aromatic radical comprising at least one functional group susceptible to reaction with nucleophilic fluoride ion or an electrophilic fluorinating agent; R2 is hydrogen or a C1-C10 aliphatic radical; and R3 is hydrogen or a C1-C10 aliphatic radical. The fluorophilic compounds are provided in both racemic and enantiomerically enriched forms and are useful as intermediates in the preparation of novel PET imaging agents and probes useful in the discovery and performance assessment of PET imaging agents. The fluorophilic compounds are particularly useful in the preparation of PET imaging agents and probes having a high affinity for VMAT-2, a biomarker implicated in human diabetes and other illnesses such as Parkinson's disease.
US07910724B2	RNA interference mediated inhibition of Fos gene expression using short interfering nucleic acid (siNA) This invention relates to compounds, compositions, and methods useful for modulating c-Fos gene expression using short interfering nucleic acid (siNA) molecules. This invention also relates to compounds, compositions, and methods useful for modulating the expression and activity of other genes involved in pathways of c-Fos gene expression and/or activity by RNA interference (RNAi) using small nucleic acid molecules. In particular, the instant invention features small nucleic acid molecules, such as short interfering nucleic acid (siNA), short interfering RNA (siRNA), double-stranded RNA (dsRNA), micro-RNA (miRNA), and short hairpin RNA (shRNA) molecules and methods used to modulate the expression of c-Fos genes. The small nucleic acid molecules are useful in the treatment of cancer, proliferative diseases or conditions, inflammatory diseases or conditions, allergic diseases or conditions, infectious diseases or conditions, autoimmune diseases or conditions, or transplantation/allograft rejection in a subject or organism.
US07910723B2	IG20 splice variants therapeutics for cancer Methods and compositions inhibit the growth of cancer cells by selectively down-regulating the expression of an IG20 splice variant including MADD. Specific knock-down of MADD splice variant resulted in the apoptosis of cancer cells. Interfering RNAs including small hairpin RNAs (shRNA) to down-regulate MADD expression in vivo are disclosed. Inhibition of MADD phosphorylation by Akt results in activation of cancer cell death. Down-regulation of MADD expression results in switching to apoptotic mode due to lack of MAPK activation upon TNF-α-based induction.
US07910721B2	Nucleic acid-enzyme complex The present invention provides a method for controlling cleavage of a target RNA by deoxyribozyme.The present inventors designed a nucleic acid-enzyme complex using GGA 12-mer (Reference 3), which was found in the laboratory of the inventors to have greatly changeable structure in the presence or absence of monovalent metal ion as well as previously known nucleic acid-enzyme. The present invention is a deoxyribozyme complex comprising deoxyribozyme having a nucleotide sequence of target RNA, a substrate binding domain and a catalytic domain of RNA cleavage reaction, and a sequence (5′GGAGGAGGAGGA3′(SEQ ID NO: 21)), wherein the sequence is inserted to the catalytic domain of RNA cleavage reaction.
US07910720B2	Polyanion for improved nucleic acid amplification The present invention is directed to a novel chemical compound comprising the structure [Xx-(CH2)m-phosphate-Yy]n, characterized in that 3≦m≦6, 30≦n≦60, each x and y is independently from each other 0 or 1, each X and Y is independently from each other any photometrically measurable entity; provided that the terminal X can also be an —OH group or a phosphate group, and further provided that the terminal Y can also be an —OH group. Such a compound can be used as a suitable hot start additive for PCR based amplification of nucleic acids.
US07910717B2	Recombinant expression cassettes with a fungal 3′ termination sequence that function in plants The present invention provides recombinant expression cassettes comprising a fungal 3′ termination sequence which is functional in a plant. The recombinant expression cassettes comprise a plant promoter operably linked to a coding sequence having a stop codon, and fungal termination sequence. The fungal 3′ termination sequence is heterologous to the coding sequence. The fungal 3′ termination sequence comprises structural features including a cleavage site, a positioning element. and an upstream element. The present invention also comprises methods for construction of the plant expression cassettes and introducing the cassettes into plant cells.
US07910716B2	Nucleic acids encoding modified South African HIV-1 subtype C gag proteins Embodiments of the invention provide processes for the selection of HIV-1 subtype (clade) C isolates, selected HIV-1 subtype C isolates, their genes and modifications and derivatives thereof for use in prophylactic and therapeutic vaccines to produce proteins and polypeptides for the purpose of eliciting protection against HIV infection or disease. A process for the selection of HIV subtype isolates comprises the steps of isolating viruses from recently infected subjects; generating a consensus sequence for at least part of at least one HIV gene by identifying the most common codon or amino acid among the isolated viruses; and selecting the isolated virus or viruses with a high sequence identity to the consensus sequence. HIV-1 subtype C isolates, designated Du422, Du 151 and Du 179 (assigned Accession Numbers 01032114, 00072724 and 00072725, respectively, by the European Collection of Cell Cultures) are also provided.
US07910711B2	Human cancer-relating genes, the products encoded thereby and applications thereof The invention discloses a human cancer-related gene, LAPTM4B, its encoded products and their applications thereof. This human cancer-related gene provided by this invention comprises one of the following nucleotide sequences: (1) SEQ ID No: 1, SEQ ID No: 2, SEQ ID No: 3, SEQ ID No: 6, or SEQ ID No: 8 in the sequence listings; (2) Polynucleotides that encode the protein sequences of SEQ ID No: 4, SEQ ID No: 5, or SEQ ID No: 7 in the sequence listings; (3) DNA sequences having above 90% homology with the DNA sequences specified by SEQ ID No: 1, SEQ ID No: 2, SEQ ID No: 3, SEQ ID No: 6, or SEQ ID No: 8 in the sequence listings, and these DNA sequences encode the proteins with the same or similar functions. This invention enables the developments of new anti-cancer approaches and new anti-cancer medicines. It would create a significant impact on human society.
US07910710B2	DNA enzymes Methods for the selection of novel signaling allosteric DNA enzymes are provided. In particular, fluorescent signaling allosteric DNA enzymes are described. The selection system is based on the cleavage of an ribonucleotide flanked by a fluorophore modified nucleotide and a quencher modified oligonucleotide. Both cis-acting and trans-acting allosteric DNA enzymes are identified, as well as aptamer/DNA enzyme conjugates.
US07910709B2	β-like glycoprotein hormone polypeptide and heterodimer Novel β10 polypeptides and heterodimers thereof, and nucleic acid molecules encoding the same are disclosed. The invention also provides vectors, host cells, selective binding agents, and methods for producing β10 polypeptides and heterodimeric forms thereof, specifically α2/β10. Also provided for are methods for the treatment, diagnosis, amelioration, or prevention of diseases with β10 polypeptides and α2/β10 heterodimers or their respective binding agents.
US07910707B2	Anti-interferon-α antibodies The present invention relates generally to the generation and characterization of neutralizing anti-IFN-α monoclonal antibodies with broad reactivity against various IFN-α subtypes. The invention further relates to the use of such anti-IFN-α antibodies in the diagnosis and treatment of disorders associated with increased expression of IFN-α, in particular, autoimmune disorders such as insulin-dependent diabetes mellitus (IDDM) and systemic lupus erythematosus (SLE).
US07910705B2	Stable cell lines expressing HERG1a and HERG1b A line of cultured mammalian cells includes HERG1b subunits and optionally HERG1a subunits.
US07910700B2	Highly thermostable fluorescent proteins Thermostable fluorescent proteins (TSFPs), methods for generating these and other stability-enhanced proteins, polynucleotides encoding such proteins, and assays and method for using the TSFPs and TSFP-encoding nucleic acid molecules are provided. The TSFPs of the invention show extremely enhanced levels of stability and thermotolerance. In one case, for example, a TSFP of the invention is so stable it can be heated to 99° C. for short periods of time without denaturing, and retains 85% of its fluorescence when heated to 80° C. for several minutes. The invention also provides a method for generating stability-enhanced variants of a protein, including but not limited to fluorescent proteins.
US07910694B2	Homing peptides to receptors of heart vasculature The present invention relates to peptides which selectively or preferentially home to areas of a heart. The invention further relates to conjugates of the homing peptides and uses thereof.
US07910687B2	Conjugated polymers containing arylamine units, the representation thereof and the use of the same The present invention relates to conjugated polymers which contain specific fused arylamine structural units. The inventive materials have improved efficiency at a high illumination density and are therefore suitable in particular for use in what are known as passive matrix displays.
US07910686B2	Block copolymer and application thereof The present invention relates to a block copolymer having at least one block having an acid group and at least one block having substantially no acid group, wherein one end group of a repeating unit in at least one block of all blocks is oxygen and/or sulfur, and at least one repeating unit of a block having substantially no acid group contains a halogen atom. The block copolymer of the present invention gives a polymer electrolyte membrane which is excellent not only in heat resistance and proton conductivity but also in water resistance and chemical stability, and is useful as an electrolyte for a proton conducting membrane etc. of a fuel cell.
US07910685B2	Hydrolytically degradable polymers and hydrogels made therefrom Conjugates between a protein and a water soluble polymer comprising multiple degradable carbonate linkages are provided.
US07910676B2	Polycarboxylic acid polymers The present invention relates to methods and polymers based upon vinyl type monomers that contain pendant carboxylic acid groups and ester group functionality. The polymers may be prepared under selected conditions of partial neutralization to provide relatively high conversions and/or relatively high values of molecular weight and/or selected amounts of repeating unit tacticity.
US07910675B2	Method for producing water-absorbing polymer particles A process for producing water-absorbing polymeric particles comprises conducting the polymerization in at least two parallel continuous polymerization reactors under substantially identical conditions and further processing the reaction products conjointly in at least one process step.
US07910672B2	Powder of a vinylpyrrolidone polymer and a process for production thereof The present invention is a powder of a vinylpyrrolidone polymer having a K value of smaller than 50, characterized in that a content of particles having a particle diameter of 106 μm or smaller is 10% by mass or less and a content of particles having a particle diameter of greater than 1,000 μm is 5% by mass or lower. A process for production of a powder of a vinylpyrrolidone polymer according to the present invention is characterized in that a vinylpyrrolidone polymer having a K value of smaller than 50 is formed into a solution having a concentration from 30% to 70% by mass, and the solution is dried by using a hot surface adhesion-type dryer, followed by pulverization so that a content of particles having a particle diameter of 106 μm or smaller is 10% by mass or lower and a content of particles having a particle diameter of greater than 1,000 μm is 5% by mass or lower.Thus, there is provided a powder of a vinylpyrrolidone polymer, which has excellent solubility in spite of having a low K value determined by a Fikentscher method and can be made into solution with favorable handleability without dust rising, and a process for production of the same.
US07910670B2	Methods of preparation of an olefin oligomerization catalyst A method of making an olefin oligomerization catalyst, comprising contacting a chromium-containing compound, a heteroatomic ligand, and a metal alkyl, wherein the chromium-containing compound comprises less than about 5 weight percent chromium oligomers. A method of making an olefin oligomerization catalyst comprising a chromium-containing compound, a nitrogen-containing compound, and a metal alkyl, the method comprising adding a composition comprising the chromium-containing compound to a composition comprising the metal alkyl. A method of making an olefin oligomerization catalyst comprising a chromium-containing compound, a nitrogen-containing compound, and a metal alkyl, the method comprising abating all or a portion of water, acidic protons, or both from a composition comprising the chromium-containing compound, a composition comprising the nitrogen-containing compound, or combinations thereof prior to or during the preparation of the catalyst. Methods of oligomerizing olefins by contacting such catalysts with an alpha olefin.
US07910666B2	Mercaptan-hardened epoxy polymer compositions and processes for making and using same Mercaptan-hardened epoxy polymer compositions, methods of making the mercaptan-hardened epoxy polymer compositions, and methods of using the mercaptan-hardened epoxy polymer compositions are provided. The mercaptan-hardened epoxy polymer can be produced by contacting a thiol ester composition and an epoxide composition to produce a mixture and then heating the mixture to produce the mercaptan-hardened epoxy polymer. In some embodiments, the thiol ester compositions include thiol esters, hydroxy thiol esters, and crosslinked thiol esters. Adhesive polymer compositions, methods of making the adhesive polymer compositions, and methods of using the adhesive polymer compositions are provided. The adhesive polymer composition can be produced by contacting a thiol ester composition and an epoxide composition to produce a mixture and then heating the mixture to produce the adhesive polymer composition.
US07910665B2	Composition of epoxy resin and epoxy-reactive polyphosphonate An epoxy resin composition comprising an epoxy resin and, as the effective curing agent, an epoxy-reactive polyphosphonate which can be of the formula (I) where “Y” is an arylene and “n” can range from about 2 to about 30.
US07910664B2	Radially multi-branched polymer and porous film using the same Disclosed is a novel radially multi-branched polymer. The radially multi-branched polymer includes a central molecule to which side-branches are bonded in at least three positions and has an average molecular weight of 500 to 100,000, the side-branch being selected from the group consisting of a polyalkylene oxide, a polyacrylate, a polyester, a polyamide and derivatives thereof. The radially multi-branched polymer is used for manufacturing a low dielectric insulating film to provide a low dielectric insulating film having easily controllable micropores.
US07910653B2	Process for the preparation of arylene fluorinated sulfonimide polymers and membranes Aromatic sulfonimide ionene polymers useful as membranes in electrochemical cells are prepared.
US07910652B2	Polyamide molding materials with an improved flowability, the production thereof and its use The invention relates to a polyamide moulding compound containing 70 to 99.5% by weight of at least one thermoplastic polyamide and 0.5 to 30% by weight of at least one polyamide oligomer with linear or branched chain structure with a number average molar mass of 800 to 5000 g/mol with basic end groups which are at least partially NH2 end groups, and carboxyl end groups, one of these end groups being present in excess and the concentration of the end group present in excess being at most 300 mmol/kg.
US07910651B2	Water-based inks for ink-jet printing The present invention relates to (1) particles of a waster-insoluble polymer which contain a colorant, wherein the water-insoluble polymer contains a constitutional unit derived from a rosin containing a reactive unsaturated group; (2) a water dispersion and a water-based ink for ink-jet printing which exhibit a less unevenness of colors and a high optical density; and (3) a process for producing the water dispersion.
US07910650B2	Conductive thermosets by extrusion Methods of preparing conductive thermoset precursors containing carbon nanotubes is provided. Also provided is a method of preparing conductive thermosets containing carbon nanotubes. The carbon nanotubes may in individual form or in the form of aggregates having a macromorpology resembling the shape of a cotton candy, bird nest, combed yarn or open net. Preferred multiwalled carbon nanotubes have diameters no greater than 1 micron and preferred single walled carbon nanotubes have diameters less than 5 nm. Carbon nanotubes may be adequately dispersed in a thermoset precursor by using a extrusion process generally reserved for thermoplastics. The thermoset precursor may be a precursor for epoxy, phenolic, polyimide, urethane, polyester, vinyl ester or silicone. A preferred thermoset precursor is a bisphenol A derivative.
US07910648B2	Marine antifoulant coating A protective coating applied to the underwater portion of a marine vessel operable to inhibit the growth of marine foulants. The coating comprises a polymer, a marine biocide, a preservative, and optionally an antimicrobial agent. In certain embodiments, the marine biocide, preservative, and optional antimicrobial agent are chemically bonded with the polymer thereby significantly reducing the ability of the biocide, preservative, and antimicrobial agent to leach from the coating into the surrounding environment.
US07910645B2	Breathable biodegradable hot melt composition A composition that includes a biodegradable aliphatic-aromatic polyester and plasticizer including polar groups and exhibits a moisture vapor transmission rate of at least 400 g/m2/day.
US07910640B2	Polycondensation product based on aromatic or heteroaromatic compounds, method for the production thereof, and use thereof Disclosed is a polycondensation product that is a reaction product of A) an aromatic or heteroaromatic compound containing 5 to 10 C atoms or heteroatoms and is provided with an average of 1 to 300 oxyethylene groups and/or oxypropylene groups per molecule which are linked to the aromatic or heteroaromatic compound via an O atom or N atoms, and B) an aromatic compound and C) an aldehyde selected among the group of formaldehyde, glyoxylic acid, and benzaldehyde or mixtures thereof. Surprisingly, the inventive polycondensation product causes very good liquefaction of hydraulic binding agents, eg. Cement, resulting in substantially improved liquefaction of the construction material at a lower dose while pourability can be maintained over a longer period of time as opposed to naphthalene sulfonates or melamine sulfonates.
US07910638B2	Semiconductor-encapsulating epoxy resin composition, preparation method, and semiconductor device A semiconductor-encapsulating epoxy resin composition comprising (A) an epoxy resin, (B) a phenolic resin curing agent, (C) an inorganic filler, and (D) carbon black is prepared by mixing a carbon black feedstock and the curing agent with an organic solvent, filtering off coarse particles of carbon black which remain over a mesh sheet with an opening of 20 μm, removing the solvent from the filtrate to yield a premix of curing agent and carbon black, and kneading the premix with the remaining components.
US07910632B2	Packaged orthodontic assembly with adhesive precoated appliances An assembly for use in orthodontic treatment includes at least two articles, and each article includes an orthodontic appliance as well as an adhesive that extends across the base of each appliance. The adhesive of at least one article differs from the adhesive of at least one other article in terms of composition, properties or characteristics, such that the adhesive can be tailored to enhance the bond between the particular selected appliance and its intended tooth.
US07910626B2	Use of S1P receptor agonists in heart diseases The invention relates to the use of a sphingosine-1-phosphate receptor agonist in the treatment of heart diseases.
US07910624B1	Compositions for the treatment of blood disorders The invention relates to compositions containing chemical compounds and compositions containing steel factor which stimulate the expression of hemoglobin or globin protein such as embryonic or fetal globin, or the proliferation of hemoglobin expressing and other cells. These compositions can be used to treat or prevent the symptoms associated with anemia, sickle cell diseases, thalassemia and other blood disorders. The invention also relates to methods for administering these compositions to patients and to medical aids for the treatment and prevention of blood and other disorders.
US07910615B2	Prophylactic or therapeutic agent for diabetic maculopathy A prophylactic or therapeutic agent for diabetic maculopathy, which can be administered for a long time and exhibits efficacy in a mechanism different from that of existing medicines. The invention relates to a prophylactic or therapeutic agent for diabetic maculopathy, comprising, as an active ingredient, a compound represented by the general formula: wherein X represents a halogen or a hydrogen atom, R1 and R2 concurrently or differently represent a hydrogen atom or an optionally substituted C1 to C6 alkyl group, or R1 and R2, together with a nitrogen atom bound thereto and optionally another nitrogen atom or an oxygen atom, are combined to form a 5- to 6-membered heterocycle. Preferably, the compound is (2S,4S)-6-fluoro-2′,5′-dioxospiro[chroman-4,4′-imidazolidine]-2-carboxamide. The invention also provides a model animal with diabetic maculopathy produced by subjecting a diabetic animal to intraocular ischemia/reperfusion to express edema in a retinal visual cell layer or in a macula lutea.
US07910614B2	Azolylmethyloxiranes, use thereof for controlling plant pathogenic fungi, and agents containing the same The present invention relates to azolylmethyloxiranes of the general formula I in which A or B is benzodioxolyl which is optionally substituted by one to five of the following substituents: halogen, CN, NO2, amino, C1-C4-alkyl, C1-C4-alkoxy, C1-C4-haloalkyl, C1-C4-haloalkoxy, C1-C4-alkylamino, C1-C4-dialkylamino, thio or C1-C4-alkylthio, and the respective other substituent A or B is phenyl or 5-membered or 6-membered heteroaryl, these substituents optionally being substituted by one to three of the following substituents: halogen, CN, NO2, amino, C1-C4-alkyl, C1-C4-alkoxy, C1-C4-haloalkyl, C1-C4-haloalkoxy, C1-C4-alkylamino, C1-C4-dialkylamino, thio or C1-C4-alkylthio, and to the plant-compatible acid addition salts or metal salts thereof, to the use of the compounds of the formula I for controlling phytopathogenic fungi and to compositions comprising these compounds.
US07910604B2	Antioxidant combinations for use in feed rations to increase milk production and milk fat The present invention provides a combination of antioxidants that effectively stabilize different types of fats utilized in a ruminant diet. When included in a ruminant feed ration or water source, the antioxidant combination typically increases nutrient digestion, such as fiber and protein, improves rumen fermentation, improves microbial growth, improves microbial efficiency, increases milk production and/or milk fat, improves antioxidant status of the ruminant, and attenuates the negative effects of some fats in the ruminant animal.
US07910603B2	3-monosubstituted tropane derivatives as nociceptin receptor ligands Compounds of the formula or a pharmaceutically acceptable salt thereof, wherein R1 is aryl, arylalkyl, heteroaryl, heteroarylalkyl, cycloalkyl, cycloalkylalkyl, heterocycloalkyl, heterocycloalkylalkyl or alkyl, all optionally substituted; R2 is H; or aryl, arylalkyl, heteroaryl, heteroarylalkyl, cycloalkyl, cycloalkylalkyl, heterocycloalkyl, heterocycloalkylalkyl or alkyl, all optionally substituted; R3 is aryl, heteroaryl, cycloalkyl or heterocycloalkyl, all optionally substituted; X is a bond, —(CH2)m—N(R7)—(CH2)n—, —(CH2)m—O—(CH2)n—, —(CH2)m—S—(CH2)n—, —C(O)—, —CH(OH)—, —C(O)N(R7)—, —C(O)N(R7)-alkylene or —N(R7)C(O)—; R7 is H or alkyl; and m and n are each 0-6, provided that the sum of m and n is 0-6; or a pharmaceutically acceptable salt or solvate thereof, pharmaceutical compositions thereof, and the use of said compounds in the treatment of cough, pain, anxiety, asthma, depression, alcohol abuse, urinary incontinence and overactive bladder are disclosed.
US07910590B2	Cyclic amine bace-1 inhibitors having a heterocyclic substituent Disclosed are novel compounds of the formula or a pharmaceutically acceptable salt or solvate thereof, wherein R1 is X is —O—, —C(R 14)2— or —N(R)—; Z is —C(R14)2— or —N(R)—; t is 0, 1, 2 or 3; each R and R2 is independently H, alkyl, cycloalkyl, cycloalkylalkyl, aryl, heteroaryl, heterocycloalkyl, arylalkyl, heteroarylalkyl, heterocycloalkylalkyl, alkenyl or alkynyl; each R14 is H, alkyl, alkenyl, alkynyl, halo, —CN, haloalkyl, cycloalkyl, cycloalkylalkyl, aryl, heteroaryl, heterocycloalkyl, arylalkyl, heteroarylalkyl, heterocycloalkylalkyl, —OR35, —N(R24)(R25) or —SR35; R41 is alkyl, cycloalkyl, —SO2(alkyl), —C(O)-alkyl, —C(O)-cycloalkyl or -alkyl-NH—C(O)CH3; and the remaining variables are as defined in the specification. Also disclosed are pharmaceutical compositions comprising the compounds of formula I and methods of treating cognitive or neurodegenerative diseases with compounds of formula I.Also disclosed are pharmaceutical compositions and methods of treatment comprising compounds of formula I in combination with other agents useful in treating cognitive or neurodegenerative diseases.
US07910589B2	Low hygroscopic aripiprazole drug substance and processes for the preparation thereof The present invention provides low hygroscopic forms of aripiprazole and processes for the preparation thereof which will not convert to a hydrate or lose their original solubility even when a medicinal preparation containing the anhydrous aripiprazole crystals is stored for an extended period.
US07910588B2	5-HT7 receptor antagonists The present invention provides selective 5-HT7 receptor antagonist compounds of Formula I and their use in the treatment of migraine: where A is —C(H)═ or —N═ and R1-7 are as defined herein.
US07910583B2	[6,6] and [6,7]-bicyclic GPR119 G protein-coupled receptor agonists Novel compounds are provided which are GPR119 G protein-coupled receptor modulators. GPR119 G protein-coupled receptor modulators are useful in treating, preventing, or slowing the progression of diseases requiring GPR119 G protein-coupled receptor modulator therapy. These novel compounds have the structure: or stereoisomers or prodrugs or pharmaceutically acceptable salts thereof, wherein n1, n2, n3, n4, A, B, D, E, G, Y, Z, R1 and R2 are defined herein.
US07910578B2	8,10-diaza-bicyclo[4.3.1]decane derivatives and their medical use This invention relates to novel 8,10-diaza-bicyclo[4.3.1]decane derivatives, which are found to be cholinergic ligands at the nicotinic acetylcholine receptors. Due to their pharmacological profile the compounds of the invention may be useful for the treatment of diseases or disorders as diverse as those related to the cholinergic system of the central nervous system (CNS), the peripheral nervous system (PNS), diseases or disorders related to smooth muscle contraction, endocrine diseases or disorders, diseases or disorders related to neuro-degeneration, diseases or disorders related to inflammation, pain, and withdrawal symptoms caused by the termination of abuse of chemical substances.
US07910577B2	Injectable nanoparticulate olanzapine formulations Described are injectable formulations of nanoparticulate olanzapine that produce a prolonged duration of action upon administration, and methods of making and using such formulations. The injectable formulations comprise nanoparticulate olanzapine.
US07910568B2	Derivatives of 4- or 5-aminosalicylic acid The present invention provides new derivatives of 4- or 5-aminosalicylic acid, and a pharmaceutical composition containing these derivatives of 4- or 5-aminosalicylic acid as active ingredients, useful for the treatment of intestinal diseases such as inflammatory bowel disease (IBD) and irritable bowel syndrome (IBS) and for the prevention/treatment of colon cancer. More particularly, these derivatives comprise a hydrogen sulfide releasing moiety linked via an azo, an ester, an anhydride, a thioester or an amide linkage to a molecule of 4- or 5-aminosalicylic acid. Furthermore, the present invention provides a process for preparing these compounds and their use for treating IBD and IBS and the prevention/treatment of colon cancer.
US07910566B2	Prevention and treatment of acute renal failure and other kidney diseases by inhibition of p53 by siRNA The invention relates to a double-stranded compound, preferably an oligoribonucleotide, which down-regulates the expression of a human p53 gene. The invention also relates to a pharmaceutical composition comprising the compound, or a vector capable of expressing the oligoribonucleotide compound, and a pharmaceutically acceptable carrier. The present invention also contemplates a method of treating a patient suffering from acute renal failure or other kidney diseases comprising administering to the patient the pharmaceutical composition in a therapeutically effective dose so as to thereby treat the patient.
US07910562B2	Method of delivering genes into antigen presenting cells of the skin A molecular delivery complex specific to antigen-presenting cells is formed from a non-viral gene delivery system complexed with foreign genetic material. The complex then enters the targeted cells through a specific receptor and overcomes the degradation mechanism, so that functional uptake of the foreign genetic material, or transduction, of the cell, results in gene expression. The invention also includes a method for genetic immunization without a needle.
US07910561B2	Inhibitors of Akt activity The present invention is directed to compounds which contain substituted naphthyridines which inhibit the activity of Akt, a serine/threonine protein kinase. The invention is further directed to chemotherapeutic compositions containing the compounds of this invention and methods for treating cancer comprising administration of the compounds of the invention. These substituted naphthyridines have unexpected advantageous properties when compared to other naphthyridines reported in PCT publication WO2003/086394, such unexpected advantageous properties may include increased cellular potency/solubility, greater selectivity, enhanced pharmacokinetic properties, lack of off target activity and so on.
US07910558B2	Bridged macrocyclic compounds and processes for the preparation thereof The present invention provides a method for preparing bridged macrocyclic compounds comprising the step of reacting a macrocyclic compound characterized by having at least two nucleophilic moieties with a bifunctional bridging reagent optionally in the presence of a catalyst, thereby producing a bridged macrocyclic product.
US07910556B2	PAR-2 agonist A compound, or a salt or solvate thereof having a structure of Ar—CO-AA1-AA2-AA3-AA4-NH—X—NR1R2 is disclosed. Ar represents an optionally substituted phenyl group or an aromatic heterocyclic group; AA1 represents a hydrophobic amino acid; AA2 represents an unsubstituted amino acid containing 2 or more carbon atoms; AA3 represents an unsubstituted amino acid containing 2 or more carbon atoms; AA4 represents a hydrophobic amino acid; X represents a divalent saturated aliphatic hydrocarbon group having 2-6 carbon atoms; and R1 and R2 represent a saturated or unsubstituted aliphatic hydrocarbon group having 1-8 carbon atoms, or alternatively R1 and R2 may form a ring together with an adjacent nitrogen atom. A pharmaceutical composition for prevention/treatment of diseases associated with PAR-2 is also disclosed. The pharmaceutical composition includes the above compound, a salt or a solvate thereof and a pharmaceutically acceptable carrier.
US07910554B2	Treatment of macular degeneration with ADP-ribosyl transferase fusion protein therapeutic compositions The Rho family of GTPases regulates axon growth and regeneration. Inactivation of Rho with C3, a toxin from Clostridium botulinum, can stimulate regeneration and sprouting of injured axons. The present invention provides novel chimeric C3-like Rho antagonists. These new antagonists are a significant improvement over C3 compounds because they are 3-4 orders of magnitude more potent to stimulate axon growth on inhibitory substrates than recombinant C3. The invention further provides methods of treating a disease of the eye by administering the compounds of the invention.
US07910553B2	Peptidyl prodrugs that resist P-glycoprotein mediated drug efflux A method of treating a patient for a condition wherein the bioactive agent of choice is DRUG, wherein DRUG is a substrate that is effluxed by the P-gp transporter, is provided, the method comprising administering to the patient an effective amount of a compound of formula (I): DRUG-X—Y(n)—Z(n′)—Z′(n″)—R (I) wherein each X, Y, Z, and Z′ is independently Met, Val, Thr, Tyr, Trp, Ser, Ala, or Gly; R is H or an amino-protecting group; n is 1, and each n′, or n″ is independently 0 or 1; or a pharmaceutically acceptable salt thereof, with the proviso that DRUG is not acyclovir or ganciclovir and that DRUG is non-peptidyl.
US07910552B2	Bone morphogenetic proteins containing a heparin binding site and osteogenic devices and pharmaceutical products containing thereof The present invention relates to reindeer bone formation inducing protein called bone morphogenetic protein (BMP), such as BMP-6, containing a heparin binding site and nucleotide molecules encoding the proteins and host cells expressing the proteins. The present invention relates also to the use of the bone morphogenetic protein for treating disorders related to bone and cartilage formation. The present invention further relates to osteogenic devices and pharmaceutical compositions containing the protein.
US07910546B2	Methods and compositions for the treatment of gastrointestinal disorders The present invention features compositions and related methods for treating IBS and other gastrointestinal disorders and conditions (e.g., gastrointestinal motility disorders, functional gastrointestinal disorders, gastroesophageal reflux disease (GERD), duodenogastric reflux, Crohn's disease, ulcerative colitis, Inflammatory bowel disease, functional heartburn, dyspepsia (including functional dyspepsia or nonulcer dyspepsia), gastroparesis, chronic intestinal pseudo-obstruction (or colonic pseudo-obstruction), and disorders and conditions associated with constipation, e.g., constipation associated with use of opiate pain killers, post-surgical constipation (post-operative ileus), and constipation associated with neuropathic disorders as well as other conditions and disorders using peptides and other agents that activate the guanylate cyclase C (GC-C) receptor.
US07910544B2	Conformationally constrained parthyroid hormone (PTH) analogs The invention provides novel P1R polypeptide antagonists. These antagonists contain amino acid substitutions at selected positions in truncated PTH and PRHrP polypeptides and function by binding selectively to the juxtamembrane (“J”) domain of the receptor. The J domain is the region of the receptor that spans the seven transmembrane domain and the extracellular loops.
US07910540B2	Soluble ZcytoR14, anti-ZcytoR14 antibodies and binding partners and methods of using in inflammation The present invention relates to blocking, inhibiting, reducing, antagonizing or neutralizing the activity of IL-17F, IL-17A, or both IL-17A and IL-17F polypeptide molecules. IL-17A and IL-17F are cytokines that are involved in inflammatory processes and human disease. ZcytoR14 is a common receptor for IL-17A and IL-17F. The present invention includes soluble ZcytoR14, anti-ZcytoR14 antibodies and binding partners, as well as methods for antagonizing IL-17F, IL-17A or both IL-17A and IL-17F using such soluble receptors, antibodies and binding partners.
US07910537B1	Decontamination of chemical warfare agents using benign household chemicals A decontamination composition and method for detoxifying chemical warfare agents on surfaces, wherein said composition comprises mixtures of household cleaners and chemicals such as ammonia, hydrogen peroxide, isopropyl alcohol, baking soda and washing soda.
US07910536B2	Bleaching composition comprising an alkoxylated benzoic acid The present invention relates to a liquid bleaching composition comprising a hypohalite bleach, a trimethoxy benzoic acid or a salt thereof and a compound selected from the group consisting of bleach-unstable brighteners, and bleach-unstable coloring-agents and mixtures thereof.
US07910535B2	Liquid treatment composition comprising a pearlescent agent According to the present invention there is provided a pearlescent liquid treatment composition suitable for use as a laundry or hard surface cleaning composition comprising a pearlescent agent, said pearlescent agent having D0.99 volume particle size of less than 50 μm and is present in composition at a level of from 0.02% to 2.0% by weight of the composition.
US07910526B2	Grease composition for constant velocity joint and constant velocity joint containing the composition sealed therein The present invention provides a grease composition for use in constant velocity joints, which comprises the following components (a) to (g) and a constant velocity joint comprising the grease composition sealed or encapsulated therein: (a) a base oil; (b) a diurea thickener represented by the following general formula: R1NH—CO—NH—C6H4-p-CH2—C6H4-p-NH—CO—NHR2 wherein R1 and R2 each independently represents an alkyl group having 8 to 20 carbon atoms, an aryl group having 6 to 12 carbon atoms or a cycloalkyl group having 6 to 12 carbon atoms; (c) a molybdenum dialkyl dithiocarbamate insoluble in the base oil; (d) a molybdenum dialkyl dithiocarbamate soluble in the base oil; (e) molybdenum disulfide; (f) at least one member selected from the group consisting of calcium phenate and calcium sulfonate; and (g) a sulfur-containing extreme-pressure agent free of phosphorus. The grease composition can efficiently prevent a temperature rise of a constant velocity joint and can impart excellent durability to the joint.
US07910524B2	Treatment fluids comprising diutan and associated methods Treatment fluids are provided that include a treatment fluid comprising a base fluid and a gelling agent that comprises clarified diutan. In some embodiments, the treatment fluid is a subterranean treatment fluid. In some embodiments, the treatment fluid is a subterranean treatment fluid comprising a base fluid, a gelling agent that comprises clarified diutan, and at least a plurality of particulates. Additional treatment fluids are also provided.
US07910521B2	Coated conductor with simplified layer architecture A coated conductor with simplified layer architecture includes a biaxial textured substrate, a template buffer layer composed of a material having the general formula RE2−xB2+xO7 with RE being at least one lanthanoid metal, B being at least one metal selected from Zr and Hf and −0.4≦x≦+0.7, where the superconductor layer is obtainable by hybrid liquid phase epitaxy and can be deposited directly onto the template buffer layer.
US07910519B2	Aqueous subbing for extruded thermal dye receiver The present invention relates to an image recording element comprising a support having thereon an aqueous subbing layer and an extruded dye receiving layer, wherein the image recording element is a thermal dye receiver. The present invention also relates to a method of making a thermal dye receiving element comprising providing a support for an imaging element; applying an aqueous subbing layer to the support; and extruding thereon at least one thermal dye receiving layer.
US07910517B2	Mechanically stable catalyst based on alpha-alumina A catalyst for gas-phase reactions which has high mechanical stability and comprises one or more active metals on a support comprising aluminum oxide as support material, wherein the aluminum oxide in the support consists essentially of alpha-aluminum oxide.Ruthenium, copper and/or gold are preferred as active metal.Particularly preferred catalysts according to invention comprise a) from 0.001 to 10% by weight of ruthenium, copper and/or gold, b) from 0 to 5% by weight of one or more alkaline earth metals, c) from 0 to 5% by weight of one or more alkali metals, d) from 0 to 10% by weight of one or more rare earth metals, e) from 0 to 10% by weight of one or more further metals selected from the group consisting of palladium, platinum, osmium, iridium, silver and rhenium, in each case based on the total weight of the catalyst, on the support comprising alpha-Al2O3. The catalysts are preferably used in the oxidation of hydrogen chloride (Deacon reaction).
US07910516B2	Decomposer of organic halogenated compounds A decomposer of organic halogenated compounds comprises iron powder constituted of flat iron particles of a planar ratio of 2 or greater. Further, a decomposer of organic halogenated compounds comprises a copper salt-containing iron particle powder constituted of copper salt-carrying iron particles having a flat shape with a planar ratio of 2 or greater whose surfaces have adhered thereto copper salt particles that are finer than the iron particles.
US07910513B2	Photocatalyst sheet and methods of welding and manufacturing the same The present invention provides the photocatalyst sheet and the methods of welding and manufacturing the same, by which the substrate and resin of the photocatalyst-containing layer are not decomposed by photocatalyst particles, mutual welding of sheets is easy, and the photo-redox effect of a photocatalyst can be obtained. A photocatalyst sheet (1b) comprises a substrate (2) such as fiber and coated layers (3) on both sides of the substrate (2), and the coated layer (3) constitutes the photocatalyst-containing layer in which apatite-coated photocatalyst particles (4) are dispersed and fixed with resin. Here, the coated photocatalyst particles (4) on the surface of the photocatalyst-containing layer are so fixed as to have the parts exposed from the surface of the photocatalyst-containing layer. In case that photocatalyst sheets (1b) are mutually welded, the photocatalyst-containing layer of each photocatalyst sheet (1b) is not removed, and its surface is mutually held, and welded together by thermal welding or others.
US07910508B2	Zirconium-base sintered product The inventive sintered product is produced from an initial feedstock having a zirconium content ranging from 75 to 99% and the following average chemical weight composition, in percentage by weight, based on oxides: 60%=ZrO2+HfO2=75%, 27%=SiO2=34%, 0.2=TiO2=1.5 %, 0.3
US07910505B2	Sintered glass ceramic and method for producing the same The invention provides a method for producing a glass ceramic comprising the steps of melting a starting glass that is free from alkali, except for incidental contamination, and that contains at least one garnet-forming agent and at least one oxide of a lanthanoid; grinding the starting glass to produce a glass frit; molding by pressing and sintering the glass frit until at least one garnet phase containing lanthanoids is formed. A glass ceramic produced in this way may contain 5-50 % by weight of SiO2, 5-50 % by weight of Al2O3 and 10-80 % by weight of at least one oxide selected from the group formed by Y2O3, Lu2O3, Sc2O3, Gd2O3, Yb2O3, Ce2O3, as well as 0.1-30% by weight of at least one oxide selected from the group formed by B2O3, Th2O3, and oxides of the lanthanoids, except Lu2O3, Gd2O3, Yb2O3, Ce2O3. Such a glass ceramic is suited especially for down conversion of excitation radiation in the blue and in the UV region of the spectrum.
US07910502B1	Liquid submersion ballistic performance through hybridization Ballistic resistant articles having excellent resistance to deterioration due to liquid exposure. More particularly, a ballistic resistant structures and articles formed from a hybrid of woven and non-woven fibrous components that retain their superior ballistic resistance performance after exposure to liquids such as sea water and organic solvents, such as gasoline and other petroleum-based products. The hybrid structures are particularly useful for the formation of or for use in conjunction with soft, flexible body armor.
US07910499B2	Autofocus for high power laser diode based annealing system Apparatus for thermally processing a substrate includes a source of laser radiation comprising a plurality diode lasers arranged along a slow axis, optics directing the laser radiation from the source to the substrate, and an array of photodetectors arranged along a fast axis perpendicular to the slow axis and receiving portions of the laser radiation reflected from the substrate through the optics.
US07910498B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device, including: (a) forming an energy cured resin layer on a semiconductor substrate having an electrode pad and a passivation film; (b) fusing the resin layer without being cured and shrunk by a first energy supply processing; (c) forming a resin boss by curing and shrinking the resin layer after fusion by a second energy supply processing; and (d) forming an electrical conducting layer which is electrically connected to the electrode pad and passes through over the resin boss.
US07910497B2	Method of forming dielectric layers on a substrate and apparatus therefor Methods of forming dielectric layers on a substrate comprising silicon and oxygen are disclosed herein. In some embodiments, a method of forming a dielectric layer on a substrate includes provide a substrate having an exposed silicon oxide layer; treating an upper surface of the silicon oxide layer with a plasma; and depositing a silicon nitride layer on the treated silicon oxide layer via atomic layer deposition. The silicon nitride layer may be exposed to a plasma nitridation process. The silicon oxide and silicon nitride layers may be subsequently thermally annealed. The dielectric layers may be used as part of a gate structure.
US07910493B2	Semiconductor device manufacturing method, semiconductor device, plasma nitriding treatment method, control program and computer storage medium A nitrided region is formed on a surface of a polysilicon layer by a nitriding treatment wherein plasma of a processing gas is generated by introducing microwaves into a processing chamber by a planar antenna having a plurality of slots. Then, a CVD oxide film or the like is formed on the nitrided region and after patterning the polysilicon layer and the like after the prescribed shape, and then, a thermal oxide film is formed by thermal oxidation on exposed side walls and the like of the polysilicon layer by having the nitrided region as an oxidation barrier layer. Thus, generation of bird's beak can be suppressed in the process at a temperature lower than the temperature in a conventional process.
US07910491B2	Gapfill improvement with low etch rate dielectric liners A method of filling a trench is described and includes depositing a dielectric liner with a high ratio of silicon oxide to dielectric liner etch rate in fluorine-containing etch chemistries. Silicon oxide is deposited within the trench and etched to reopen or widen a gap near the top of the trench. The dielectric liner protects the underlying substrate during the etch process so the gap can be made wider. Silicon oxide is deposited within the trench again to substantially fill the trench.
US07910488B2	Alternative method for advanced CMOS logic gate etch applications Methods for etching, such as for fabricating a CMOS logic gate are provided herein. In some embodiments, a method of etching includes (a) providing a substrate having a first stack and a second stack disposed thereupon, the first stack comprising a high-k dielectric layer, a metal layer formed over the high-k dielectric layer, and a first polysilicon layer formed over the metal layer, the second stack comprising a second polysilicon layer, wherein the first and second stacks are substantially equal in thickness; (b) simultaneously etching a first feature in the first polysilicon layer and a second feature in the second polysilicon layer until the metal layer in the first stack is exposed; (c) simultaneously etching the metal layer and second polysilicon layer to extend the respective first and second features into the first and second stacks; and (d) etching the high-k dielectric layer.
US07910487B2	Reverse masking profile improvements in high aspect ratio etch A method of improving high aspect ratio etching by reverse masking to provide a more uniform mask height between the array and periphery is presented. A layer of amorphous carbon is deposited over a substrate. An inorganic hard mask is deposited on the amorphous carbon followed by a layer of photodefinable material which is deposited over the array portion of the substrate. The photodefinable material is removed along with the inorganic hard mask overlaying the periphery. A portion of the amorphous carbon layer is etched in the exposed periphery. The inorganic hard mask is removed and normal high aspect ratio etching continues. The amount of amorphous carbon layer remaining in the periphery results in a more uniform mask height between the array and periphery at the end of high aspect ratio etching. The more uniform mask height mitigates twisting at the edge of the array.
US07910482B2	Method of forming a finFET and structure A method for processing a substrate comprising at least a buried oxide (BOX) layer and a semiconductor material layer is provided. The method includes etching the semiconductor material layer to form a vertical semiconductor material structure overlying the BOX layer, leaving an exposed portion of the BOX layer. The method further includes exposing a top surface of the exposed portion of the BOX layer to an oxide etch resistant species to form a thin oxide etch resistant layer overlying the exposed portion of the BOX layer.
US07910481B2	Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming an interlayer dielectric layer having a plurality of contact holes over a substrate, forming a conductive layer by filling the contact holes to cover the interlayer dielectric layer, performing a first main etch process to partially etch the conductive layer to form a first conductive layer, performing a second main etch process to etch the first conductive layer using an etch gas having a slower etch rate with respect to the first conductive layer than an etch gas used in the first main etch process until an upper surface of the interlayer dielectric layer is exposed to form a second conductive layer, and performing an over-etch process to etch a certain portion of the second conductive layer, and at the same time, to etch a certain portion of the interlayer dielectric layer to form a landing plug.
US07910478B2	Method of manufacturing semiconductor devices A method of manufacturing a semiconductor device, forms connection pads electrically connected to integrated circuit portion formed in a semiconductor substrate, lays an insulating film and a protective film one over another, forms sub-lines electrically connected to the connection pads on the protective film, forms a coating film covering the sub-lines and the protective film, sticks a dry film onto the coating film, forms external connection electrodes externally connectable and electrically connected to the sub-lines, and removes the dry film and forms a sealing layer covering the coating film and side surfaces of the external connection electrodes.
US07910475B2	Method for forming low dielectric constant fluorine-doped layers A method for forming a semiconductor device is provided. In one embodiment, the method includes providing a semiconductor substrate with a surface region. The surface region includes one or more layers overlying the semiconductor substrate. In addition, the method includes depositing a dielectric layer overlying the surface region. The dielectric layer is formed by a CVD process. Furthermore, the method includes forming a diffusion barrier layer overlying the dielectric layer. In addition, the method includes forming a conductive layer overlying the diffusion barrier layer. Additionally, the method includes reducing the thickness of the conductive layer using a chemical-mechanical polishing process. The CVD process utilizes fluorine as a reactant to form the dielectric layer. In addition, the dielectric layer is associated with a dielectric constant equal or less than 3.3.
US07910467B2	Method for treating layers of a gate stack A method for fabricating a semiconductor device with improved performance is disclosed. The method comprises providing a semiconductor substrate; forming one or more gate stacks having an interfacial layer, a high-k dielectric layer, and a gate layer over the substrate; and performing at least one treatment on the interfacial layer, wherein the treatment comprises a microwave radiation treatment, an ultraviolet radiation treatment, or a combination thereof.
US07910456B1	Liquid based substrate method and structure for layer transfer applications An embodiment of a composite substrate member in accordance with the present invention has a handle substrate member derived from a plurality of nanoparticles in a fluid mixture, and a thickness of material transferred to the handle substrate member. The handle substrate member may be formed from a plurality of liquid layers, for example a thinner surface layer conveying specific properties to the donor/substrate interface, and a thicker support layer dispensed over the surface layer.
US07910455B2	Method for producing SOI wafer The present invention relates to a method for producing an SOI wafer, having at least a step of a bonding heat treatment for increasing bonding strength by heat-treating a bonded wafer obtained by bonding a base wafer and a bond wafer, in which argon is ion-implanted from a surface of either the base wafer or the bond wafer at a dosage of 1×1015 atoms/cm2 or more at least before the bonding step, the surface ion-implanted with argon is used as a bonding surface in the bonding step, and an increase rate of temperature to a treatment temperature of the bonding heat treatment is 5° C./minute or higher. Thus the present invention provides a method for producing an SOI wafer facilitating the efficient production of an SOI wafer having in the neighborhood of a buried insulator layer thereof a polycrystalline silicon layer uniform in thickness introduced and having high gettering ability toward metal contaminations in the SOI layer by a simple and low-cost method.
US07910454B2	Combination of a substrate and a wafer The invention pertains to a combination of a substrate (6) and a wafer (15), wherein the substrate (6) and the wafer (15) are arranged parallel to one another and bonded together with the aid of an adhesive layer (8) situated between the substrate (6) and the wafer (15), and wherein the adhesive is chosen such that its adhesive properties are neutralized or at least diminished when a predetermined temperature is exceeded. According to the invention, the adhesive layer (8) is only applied annularly between the substrate (6) and the wafer (15) in the edge region of the wafer (15).
US07910453B2	Storage nitride encapsulation for non-planar sonos NAND flash charge retention The present disclosure provides a method of manufacturing a microelectronic device. The method includes forming recessed shallow trench isolation (STI) features in a semiconductor substrate, defining a semiconductor region between adjacent two of the recessed STI features; forming a tunnel dielectric feature within the semiconductor region; forming a nitride layer on the recessed STI features and the tunnel dielectric feature; etching the nitride layer to form nitride openings within the recessed STI features; partially removing the recessed STI features through the nitride openings, resulting in gaps between the nitride layer and the recessed STI features; and forming a first dielectric material on surfaces of the nitride layer, sealing the nitride openings.
US07910452B2	Method for fabricating a cylinder-type capacitor utilizing a connected ring structure A method for fabricating a capacitor includes forming an isolation layer over a substrate. The isolation layer forms a plurality of open regions. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial layer is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer and the sacrificial layer are then removed.
US07910451B2	Simultaneous buried strap and buried contact via formation for SOI deep trench capacitor A node dielectric, an inner electrode, and a buried strap cavity are formed in the deep trench in an SOI substrate. A buried layer contact cavity is formed by lithographic methods. The buried strap cavity and the buried layer contact cavity are filled simultaneously by deposition of a conductive material, which is subsequently planarized to form a buried strap in the deep trench and a buried contact via outside the deep trench. The simultaneous formation of the buried strap and the buried contact via enables formation of a deep trench capacitor in the SOI substrate in an economic and efficient manner.
US07910450B2	Method of fabricating a precision buried resistor The present invention provides a semiconductor structure including a buried resistor with improved control, in which the resistor is fabricated in a region of a semiconductor substrate beneath a well region that is also present in the substrate. In accordance with the present invention, the inventive structure includes a semiconductor substrate containing at least a well region; and a buried resistor located in a region of the semiconductor substrate that is beneath said well region. The present invention also provides a method of fabricating such a structure in which a deep ion implantation process is used to form the buried resistor and a shallower ion implantation process is used in forming the well region.
US07910448B2	Method for fabricating a mono-crystalline emitter Fabrication of a mono-crystalline emitter using a combination of selective and differential growth modes. The steps include providing a trench (14) formed on a silicon substrate (16) having opposed silicon oxide side walls (12); selectively growing a highly doped mono-crystalline layer (18) on the silicon substrate in the trench; and non-selectively growing a silicon layer (20) over the trench in order to form an amorphous polysilicon layer over the silicon oxide sidewalls.
US07910447B1	System and method for providing a self aligned bipolar transistor using a simplified sacrificial nitride emitter A system and method are disclosed for providing a self aligned bipolar transistor using a simplified sacrificial nitride emitter. An active region of a transistor is formed and a silicon nitride sacrificial emitter is formed above the active region of the transistor. Then a physical vapor deposition oxide layer is deposited over the silicon nitride sacrificial emitter using a physical vapor deposition process. The physical vapor deposition oxide layer is then etched away from the side walls of the sacrificial emitter. The sacrificial emitter is then etched away to form an emitter window. Then a polysilicon emitter structure is formed in the emitter window. The self aligned bipolar transistor architecture of the invention is compatible with BiCMOS technology.
US07910446B2	Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices Electronic devices and methods for forming electronic devices that allow for a reduction in device dimensions while also maintaining or reducing leakage current for non-volatile memory devices are provided. In one embodiment, a method of fabricating a non-volatile memory device is provided. The method comprises depositing a floating gate polysilicon layer on a substrate, forming a silicon oxide layer on the floating gate polysilicon layer, depositing a first silicon oxynitride layer on the silicon oxide layer, depositing a high-k dielectric material layer on the first silicon oxynitride layer, depositing a second silicon oxynitride on the high-k dielectric material, and forming a control gate polysilicon layer on the second silicon oxynitride layer. In one embodiment, the high-k dielectric material layer comprises hafnium silicon oxynitride.
US07910443B2	Method involving trimming a hard mask in the peripheral region of a semiconductor device A method for fabricating a semiconductor device includes forming a conductive material layer for forming a gate over a substrate including a cell region and a peripheral region, forming hard mask patterns over the conductive material layer, forming a mask pattern over the resultant structure in the cell region, exposing the peripheral region, trimming the hard mask patterns in the peripheral region, removing the mask pattern, and etching the conductive material layer to form gate patterns using the hard mask patterns.
US07910441B2	Multi-gate semiconductor device and method for forming the same A semiconductor device includes a substrate (20), a source region (58) formed over the substrate, a drain region (62) formed over the substrate, a first gate electrode (36) over the substrate adjacent to the source region and between the source and drain regions, and a second gate electrode (38) over the substrate adjacent to the drain region and between the source and drain regions.
US07910440B2	Semiconductor device and method for making the same A semiconductor device includes: a first trench that is formed in a semiconductor substrate; a gate oxide film that is formed on a surface of the first trench; and a trench gate electrode that is formed so as to bury the first trench via the gate oxide film. The semiconductor device also includes: a second trench that is formed in the semiconductor substrate with a width wider than the width of the first trench; and a terminal-embedded insulation layer that is formed so as to bury the second trench. The semiconductor device further includes: a third trench that is formed in the semiconductor substrate with a width wider than the width of the second trench; and a trench contact electrode that is formed so as to bury the third trench.
US07910438B2	Method for fabricating semiconductor device including recess gate A method for fabricating a semiconductor device includes etching a substrate to form a first trench pattern, forming spacers over sidewalls of the first trench pattern, etching a bottom portion of the first trench pattern using the spacers as a barrier to form a second trench pattern, performing an isotropic etching on the second trench pattern to round sidewalls of the second trench pattern and form a bulb pattern, and forming a gate over a recess pattern including the first trench pattern, the rounded second trench pattern and the bulb pattern.
US07910436B2	Isolated-nitride-region non-volatile memory cell and fabrication method An isolated-nitride-region non-volatile memory cell is formed in a semiconductor substrate. Spaced-apart source and drain regions are disposed in the semiconductor substrate forming a channel therebetween. An insulating region is disposed over the semiconductor substrate. A gate is disposed over the insulating region and is horizontally aligned with the channel. A plurality of isolated nitride regions are disposed in the insulating region and are not in contact with either the channel or the gate.
US07910433B2	Methods of fabricating multi-layer nonvolatile memory devices A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The semiconductor layer includes a second well region of the first conductivity type having a doping concentration greater than a doping concentration of the first well region of the first conductivity type. As the doping concentration of the second well region is increased, a resistance difference may be reduced between the first and second well regions.
US07910430B2	NAND flash memory device and method of manufacturing the same A NAND flash memory device and method of manufacturing the same is disclosed. Source and drain select transistor gates are recessed lower than an active region of a semiconductor substrate. A valid channel length of the source and drain select transistor gates is longer than a channel length of memory cell gates. Accordingly, an electric field between a source region and a drain region of the select transistor can be reduced. It is thus possible to prevent program disturbance from occurring in edge memory cells adjacent to the source and drain select transistors in non-selected cell strings.
US07910429B2	Method of forming ONO-type sidewall with reduced bird's beak Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.
US07910428B2	Capacitor with pillar type storage node and method for fabricating the same including conductive capping layer A capacitor includes a pillar-type storage node, a supporter filling an inner empty crevice of the storage node, a dielectric layer over the storage node, and a plate node over the dielectric layer.

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