| Document | Document Title |
|---|---|
| US07894421B2 |
Voice and data exchange over a packet based network
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange. |
| US07894420B2 |
Fast path packet destination mechanism for network mobility via secure PKI channel
Disclosed is a method for reducing routing overheads during data transmission to a destination mobile router of a plurality of mobile routers roaming in a network. The method comprises registering by top level mobile routers with a central authority server, sending data packets by a corresponding node of the network to the destination mobile router operationally attached to a corresponding top level mobile router, locating a position of the destination mobile router by identifying attachment of the destination mobile router to the corresponding top level mobile router from the information registered by the plurality of mobile routers with the central authority server, routing the data packet directly to the corresponding top level mobile router to which the destination mobile router is operationally attached and receiving the data packet by the destination mobile router from the corresponding top level mobile router, thereby reducing routing overheads in the network. |
| US07894418B2 |
Mixed analog and digital chip-scale reconfigurable WDM network
The present invention provides a mixed analog and digital chip-scale reconfigurable WDM network. The network suitably includes a router that enables rapidly configurable wavelength selective routers of fiber optic data. The router suitably incorporates photonic wavelength selective optical add/drop filters and multiplexers. |
| US07894405B2 |
Method to achieve fast active scan in 802.11 WLAN
A method for fast active scanning and an Access Point apparatus that reduces the delay in convention active scanning. The method includes the step of giving an AP higher priority to transmit a probe response than is currently known. This priority comes at the delay of transmission of the probe response, so preferably the probe response can be delayed by just the time that the AP needs to prepare the response plus the time, if any, for the frame already in the air to finish. According to the invention, a method can include steps for: sending a uni-cast probe request message by an (STA) 238, 248, 268 on a particular channel having at least one Access Point (AP) 258, 278 in communication therewith; receiving by one particular (AP) 278 the probe request message sent by the (STA); sensing by the particular (AP) 278 of a point coordination function (PCF) interframe space (PIFS) 325 of the particular channel; and sending by the particular (AP) 278 of a probe response message to the (STA) 238 in response to the probe request message after the PIFS. As the probe request is uni-cast, there is no need for a backoff interval as only one AP will respond. Since normal traffic utilizes the longer DIFS space plus backoffs to avoid collisions, the AP will always be able to respond to a probe request of scan faster than other items can respond on the channel, thus giving the AP priority when sending the probe response message. |
| US07894404B2 |
Generation of quality metrics using multibranch PSYNC detection module
A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions. |
| US07894401B2 |
Method of determining feedback in a communication system
A method of determining feedback in a communication system, wherein data is transmitted from a transmitter to a receiver, and in response to data reception at the receiver, feedback is generated based on the received data comprising the step of classifying the data into data entities of different levels of importance and the step of determining feedback based on at least one data entity of one level of importance. The invention further relates to a corresponding receiver, transmitter and a respective communication system. |
| US07894399B2 |
Phase shifted time slice transmission to improve handover
The present invention provides methods and apparatus for a wireless system broadcasting a plurality of data packets to at least one wireless terminal. The wireless system comprises a plurality of base stations that interfaces to a backbone network in order to receive the plurality of data packets from a service source. Data packets are sent to a wireless terminal by a first base station transmitting a first channel burst and by a second base station transmitting a second channel burst, in which corresponding time offsets of the channel bursts, as characterized by amounts phase shifts, are different. Consequently, when the wireless terminal executes a handover from the first base station to the second base station, a probability that some of the data packets are lost, as result of practical network considerations, is reduced. |
| US07894396B2 |
Random access method and signalling method for the same
A method for generating an iterative sequence and a signal transmission method using the same are disclosed. As the cell size or the distance between a user equipment (UE) and a Node-B increases, the CP is repeated at least one time while the iterative sequence is generated, the CP length and the ZCZ length are adjusted, so that the sequence timing point can be easily detected, orthogonality between sequences is maintained, and the sequences can be clearly distinguished from each other. |
| US07894395B2 |
Method of allocating resources in wireless communication system
A method of allocating resources in a wireless communication system includes configuring priorities for a plurality of logical channels according to a first criterion, wherein each of the plurality of logical channels has each priority and allocating resources to a subset of the plurality of logical channels according to a second criterion to transfer data through a transport channel, wherein the subset of the plurality of logical channels is configured with same priority. It is possible to reliably provide various services through a method of processing radio bearers having the equal priorities. |
| US07894394B2 |
Resource allocation method and apparatus in multi-channel system
Radio resource allocation apparatus and method in a multi-channel system are provided. The method includes determining a type of a channel to be allocated to terminals, which request a resource allocation. When there is a terminal to be assigned the band AMC channel, necessary resources are allocated to the terminal as resources of the band AMC channel within a frequency band preferred by the terminal. A virtual resource space is generated which collects resources not allocated as the resources of the band AMC channel. Resources are allocated to terminals to be assigned the diversity channel from within the virtual resource space. Accordingly, the radio resources can be efficiently allocated in the multi-channel system where the diversity channel and the band AMC channel coexist. |
| US07894393B2 |
Systems and methods for determining slotted mode operation timing in a hybrid access terminal
A method for determining slotted mode operation timing in a hybrid access terminal comprises acquiring a first network, determining a first access interval for the first network, acquiring a second network, determining a second access interval for the second network, determining if the first and second access intervals overlap, and re-determining the second access interval when it is determined that the first and second access intervals overlap. |
| US07894389B2 |
System and method for transmitting and receiving resource allocation information in a wireless communication system
A system and method for transmitting resource allocation information in a wireless communication system is provided. A transmitter transmits resource allocation information mapped to a current time interval in a first region to a receiver, and transmits resource allocation information mapped to a next time interval in a second region. When receiving the resource allocation information of the second region, the receiver notifies the transmitter whether the resource allocation information has been received. The transmitter receives notification that the resource allocation information of the second region has been received and transmits resource allocation information mapped to a subsequent time interval in the second region. |
| US07894387B2 |
System and method for accessing a multi-line gateway using cordless telephony terminals
According to the present invention, simultaneous call-handling and data transfer is achieved between a terminal and a multi-line gateway in a cordless telephony environment. Multiple logical channels are established and used as signaling resources for calls on the multiple lines, and also for data transfers between the gateway and terminal. As a result, terminals can handle multiple calls on different lines and at the same time access data stored at the gateway. According to a first aspect of the present invention, two or more logical channels are established over an asynchronous channel between a terminal and a gateway. These logical channels are assigned to calls that are set-up between the terminal and gateway. When used as a signaling resource, the logical channels allow the terminal to distinguish between signaling information for multiple simultaneous calls. The calls are associated with another speech or data channel that will bear the voice signal, referred to herein as a bearer channel. According to a second aspect of the present invention, a logical channel is also established over an asynchronous channel to handle data transfers between the gateway and terminal. Using this logical channel, the terminal can access data stored at the gateway without disrupting any ongoing calls. |
| US07894386B2 |
Mobile telephony
A satellite telephone system for communication between a fixed network (4) and a moveable network (1) on board a vehicle, has means for suspending operation of the moveable network, for example when the moveable network could interfere with a fixed network, during safety-critical stages of a flight, or to enforce “quiet” periods on board. When operation of the moveable network (1) is suspended a control signal is transmitted to the fixed network (4), causing the fixed network (4) to intercept calls directed to the moveable network, thereby avoiding unnecessary signal traffic over the satellite link (3, 6, 13). The moveable network may be a wireless network (FIGS. 1, 2), or a wired network (FIG. 4). |
| US07894380B2 |
Terminal power control method
A power control method for a terminal, including: obtaining, by the terminal, a quality parameter of a received signal, a receiving power of a code channel occupied by the terminal and a power of code channels in a cell having the same carrier frequency and the same time slot as those of the code channel occupied by the terminal respectively, according to a received signal quality; determining the minimum receiving power which is permitted by the code channel occupied by the terminal according to the power of the code channels in the cell having the same carrier frequency and the same time slot as those of the code channel occupied by the terminal; and generating a power control command according to a determined minimum receiving power, the receiving power of the code channel occupied by the terminal and the quality parameter of the received signal. |
| US07894377B2 |
Method and system for group communications
A method and system for group communications is described. The system includes a plurality of endpoints and at least one group entity that receives from an initiating endpoint, using a transactional protocol, a first message requesting an initiation of a session between a plurality of endpoints affiliated with a group that correlates to the group entity. The group entity further: causes the session to be accepted in order to start the session; upon the acceptance and start of the session causes the presence of the session to be communicated, using a broadcast protocol, to the plurality of endpoints affiliated with the group; and communicates to the initiating endpoint, using the transactional protocol, the acceptance of the session. |
| US07894376B2 |
Transmit power management based on receiver parameter and method for use therewith
An RF transceiver includes an RF receiver that receives a received signal from an external device, the RF receiver having an AGC module that generates an automatic gain control (AGC) signal based on a strength of the received signal, and a low noise amplifier that amplifies the received signal based on the AGC signal. A processing module generates a transmit power control signal based on the AGC signal. An RF transmitter generates a transmit signal having a selected power level, wherein the selected power level is based on the transmit power control signal. |
| US07894374B2 |
Network system, spanning tree configuration method, spanning tree configuration node, and spanning tree configuration program
A node that configures a spanning tree over a network to which a plurality of nodes are connected generates a tree after a cost change using another LAN while continuing to operate the tree that existed before the change, and switches the tree that is used for forwarding after the new tree has been stable. |
| US07894372B2 |
Topology-centric resource management for large scale service clusters
Topology-centric resource management for large scale service clusters is described herein. According to certain embodiments of the invention, techniques include 1) creating optimized topology with network switches to connect service modules based on application flows and bandwidth requirements, 2) providing centralized or decentralized monitoring schemes to maintain the topology view of a service cluster, and 3) using the topology information for optimizing load balancing and service information dissemination. Other methods and apparatuses are also described. |
| US07894368B2 |
OVPN system, OVPN terminating device, collective controlling device, and optical communication network
An OVPN user register an L1 signal type information which is used in the user's device in an OVPN terminating device in advance together with an IP address and a VPNID which are allocated to the user's device. Registered contents are notified to other OVPN terminating devices which control the same VPNID as that of the user's device. Otherwise, when a calling connection request arrives from the user's device, the registered contents are notified other OVPN terminating devices which control the devices which receive the notification. By doing this, it is possible to handle a request by the user for changing the setting for the signal format which is employed in the user's device quickly. Also, it is possible to realize an OVPN which can perform a process for a calling connection request from the user efficiently and improve an operability for the user. |
| US07894367B2 |
Methods and systems for bandwidth protection
Presented are methods and systems for providing bandwidth estimation and correction in a communications network. Bandwidth estimation and correction can include calculating a round trip time (RTT) value and a packet loss rate (PLR) value for each packet of a set of packets transmitted at different points in time from a server to a client terminal over the communications network; determining a bandwidth estimate based on the RTT and PLR values for the set of packets transmitted; determining a bandwidth measurement based on the RTT and PLR values for the set of packets; and determining a corrected bandwidth estimate based on the bandwidth estimate and the bandwidth measurement. |
| US07894362B2 |
Passive optical network topology estimation
An apparatus comprising an optical line terminal (OLT) in communication with a plurality of optical network terminals (ONTs) via an optical distribution network (ODN), and a passive optical network (PON) topology estimator coupled to the OLT or at least one of the ONTs, wherein the PON topology estimator is configured to model a PON topology. Also disclosed is an apparatus comprising at least one processor configured to implement a method comprising defining a PON topology comprising a plurality of network parameters, a plurality of component parameters, and at least one relationship between the network parameters and the component parameters, acquiring values for the network parameters, and determining the component parameters using the network parameters and the mathematical equations. |
| US07894358B2 |
Detection of heavy users of network resources
A device includes a multistage filter and an elephant trap. The multistage filter has hash functions and an array. The multistage filter is operable to receive a packet associated with a candidate heavy network user and send the packet to the hash functions. The hash functions generate hash function output values corresponding to indices in the array. The elephant trap is connected to the multistage filter. The elephant trap includes a buffer and probabilistic sampling logic. The probabilistic sampling logic is operable to attempt to add information associated with the packet to the buffer a particular percentage of the time based in part on the result of the multistage filter lookup. The buffer is operable to hold information associated with the packet, counter information, and timestamp information. |
| US07894356B2 |
System and method for measuring network performance using real network traffic
A system and method for measuring network performance include a first element in a network, the first element operable to receive a data packet and to create a clone packet based on the data packet, the clone packet having a destination the same as a destination of the data packet and having information identifying the clone packet as a clone, the first element operable to insert the clone packet into a data stream with the data packet. |
| US07894354B2 |
System and method to monitor RTP streams using RTCP SR/RR packet information
An apparatus and method monitor RTP streams between first and second endpoints within a network. A network analyzer is connected at an intermediate point between the first and second endpoints within the network, to extract and process data from RTCP packets to select and monitor the RTP streams accumulated therein having a worst-case jitter and packet loss within the network. |
| US07894351B2 |
Detection of link status in blade systems
A method and a computer program product for detecting link status in a blade system are provided. The method and computer program product provide for generating a first pattern of characters at a server blade of the blade system, transmitting the first pattern of characters from the server blade to an Ethernet switch of the blade system, and comparing a second pattern of characters to the first pattern of characters to determine whether a link from the Ethernet switch to a network is active in response to the server blade receiving the second pattern of characters from the Ethernet switch. |
| US07894347B1 |
Method and apparatus for packet scheduling
A methods, apparatus and computer memory are provided for packet scheduling. A processor polls queues in a round robin fashion and schedules for transmission onto a link a packet in each queue with no deficit before scheduling for transmission onto the link a packet in each queue with a deficit. A credit is allocated to each queue with the deficit based on a proportional weight, until each queue with the deficit has a credit. |
| US07894346B2 |
Message transmission in wireless access system
A method for transmitting messages to alter the operating status between a mobile station and a base station in a wireless access system comprises, at the mobile station, transmitting a first message to the base station, setting a first count to a first predetermined value and enabling a first, the first message requesting a alteration in operating status between the mobile station and the base station, whereupon expiration of the first timer before receiving a second message from the base station, the count is decremented and, if the count is above a second predetermined value, the first timer is reset and the first message is retransmitted to the base station. The method also comprises, at a base station, receiving the first message, transmitting a second message to the mobile station and enabling a second timer, whereupon expiration of the second timer, the alteration in operating status is effected. |
| US07894344B2 |
System and method for aggregated shaping of multiple prioritized classes of service flows
A system coupled between at least one input port and at least one output port comprises at least one queue, each queue being identified by a QID and operable to receive and buffer data in at least one service flow from the at least one input port. The system further comprises a predetermined at least one token allocated to each queue, each token indicative whether a predetermined amount of data may be dequeued from a queue and transmitted to the output port. The system comprises at least one group of queues where each queue in the group has a subordinate QID identifying a subordinate queue in the group having a lower priority for reallocating unused tokens. The at least one output port receives at least one output flow comprising the dequeued data from the at least one queue. |
| US07894335B2 |
Redundant routing capabilities for a network node cluster
Graceful/hitless restart features from a routing/signaling protocol may be utilized along with synchronization between cluster members in order to provide routing capabilities in a clustering environment. During normal operation, the active cluster member may operate the routing protocol(s) and communicate with the neighboring components using the cluster's address. As the active member learns the routes to the destinations, the routing data may be propagated to the stand-by cluster members across an internal communication mechanism. Configuration information for the routing component may also be propagated to the stand-by cluster members. Upon failure of the active routing component, the standby routing component may be started up such that neighboring routing components located outside of said cluster do not recalculate network topology based on said failure. This allows for failover to occur without affecting neighboring components and unduly burdening the system. |
| US07894329B1 |
Method and system for providing broadband access to a data network via gas pipes
A method and system for providing broadband access to a data network via gas pipes is disclosed. Embodiments of the present invention utilize Orthogonal Frequency-Division Multiplexing (OFDM) or Frequency-Division Multiplexing (FDM) as a modulation technique in order to protect against the effects of dispersion in the gas pipes. An OFDM transceiver modulates a digital data stream into an OFDM signal, RF up-converts the OFDM signal, and transmits the RF up-converted OFDM modulated signal through a gas pipe. |
| US07894325B2 |
Receiver architecture for pilot based OFDM systems
The invention relates to a novel methodology and apparatus for clock-offset compensation and common-phase offset correction in Frequency Division Multiplexing based wireless local area network (WLAN) environment, such as an Orthogonal Frequency Division Multiplexing (OFDM) environment. A curve fit, such as a threshold-based, least mean squares (LMS) fit of phase of the pilot sub-carriers in each OFDM symbol is used to estimate and counteract the rotation of the data sub-carriers due to residual frequency offset, low frequency phase noise, and clock offset. The invention is particularly well suited to wireless channels with multipath where pilots typically undergo frequency-selective fading. The thresholding LMS is implemented in a hardware-efficient manner, offering cost advantages over a weighted-LMS alternative. Additionally, the invention uses a unique phase-feedback architecture to eliminate the effects of phase wrapping, and avoid the need to refine channel estimates during packet reception. |
| US07894324B2 |
Methods and apparatus for signaling data rate option information
A wireless terminal includes an uplink rate option indicator in the same uplink channel segment with data, the rate option indicator providing transmission rate information about the data transmitted in the segment. The indicator value is represented by an energy pattern within the segment. Different energy patterns correspond to different indicator values. The number of indicator values is less than the number of possible uplink data rate options supported by the wireless terminal. A single indicator value represents different uplink data rate options, at different times, as a function of a received maximum data rate option and/or type of assignment message. The maximum data rate option and/or assignment message was transmitted by the same base station receiving the indicator value; therefore, there is no ambiguity between wireless terminal and base station as to the interpretation of the uplink data rate option indicator value with respect to an individual uplink segment. |
| US07894323B2 |
Home phone line networking enhancements for multiple dwelling unit environments
A Home Phoneline system operating within a Multiple Dwelling Unit includes a Home Phoneline Access Multiplexer (HPAN) that services a plurality of Home Phoneline networks, each including at least one Home Phoneline station. The HPAN synchronizes upstream and downstream transmissions to eliminate Near-Far cross-talk. According to a second operation of the present invention, the HPAN manages the transmission power of the HomePNA stations of the HomePNA networks to reduce Near-Near and Far-Far cross-talk. To optimize throughput across the whole building, station power levels are adjusted based on their location in terms of amounts of attenuation. A third method of operation according to the present invention includes adjusting the receiver sensitivity of the Home Phoneline stations according to detected or characterized levels of cross-talk within the MDU. |
| US07894318B2 |
Optical information recording medium, optical information recording method, and optical information recording apparatus
An information recording medium according to the present invention includes a plurality of recording layers, and a test area for determining a recording power of a laser light for each of the plurality of recording layers, in which a first test area of a first layer and a second test area of a second layer adjacent to the first layer are provided at different radial positions. |
| US07894317B2 |
Optical recording medium recording and reproducing apparatus and tracking control method
A tracking control is performed based on a first tracking error signal obtained from a first light beam reflected on an optical recording medium and a second tracking error signal obtained from a second light beam reflected on the optical recording medium. The first tracking error signal is corrected when recording information to or reproducing information from a first information recording layer that includes a first area facing an area on a second information recording layer with no information recorded and a second area facing an area on the second information recording layer with information recorded. |
| US07894313B2 |
Optical disc recording and reproducing apparatus
An optical pickup has a photo detector which is divided into first, second, third and fourth quadrants, receives a laser beam reflected from an optical disc via an objective lens, and outputs first, second, third and fourth detection signals from the respective quadrants. A system controller controls a memory to store levels (A, B, C and D) of the first, second, third and fourth detection signals after a focus servo section performs a focus operation by shifting the objective lens in a direction perpendicular to the optical disc surface, and then, calculates a ratio of ((A+D)/(B+C)) in a radial direction of the optical disc. The system controller controls the tracking servo section to perform a tracking operation to shift the objective lens in the radial direction based on a correction table which represents a relationship between correction amount of the lens shift and the calculated ratio ((A+D)/(B+C)). |
| US07894304B2 |
Project calculator with integral distance measurement sensor
A project calculator, including a housing, a circuit board mounted within the housing and including a processor, an input device connected to the circuit board and interfacing with the processor, an output device connected to the circuit board and interfacing with the processor, and a distance sensor rotatably mounted to the housing and interfacing with the processor. A laser assembly is may also be rotatably mounted to the housing and configured to provide a visual indicator to an object to which the distance sensor is pointing. One or more level indicators may also be mounted to the housing. |
| US07894298B2 |
Multi-component seismic data processing
There is described a method of moveout or velocity analysis of seismic signals using the steps of obtaining such signals 5 from a plurality of receivers, identifying receiver functions within the acoustic signals, analyzing said receiver functions for velocity or moveout characteristics, using the result of said analyzing step to determine, properties of multiple layers of earth located below said 10 receivers. The analyses can involve the use of representation of the traveltime differences as approximated power series of slowness or horizontal distances. The method is the first to comprehensively deal with a multi-layered earth or velocity model. |
| US07894286B2 |
Array sense amplifiers, memory devices and systems including same, and methods of operation
A sense amplifier having an amplifier stage with decreased gain is described. The sense amplifier includes a first input/output (“I/O”) node and a second complementary I/O node. The sense amplifier includes two amplifier stages, each for amplifying a signal on one of the I/O nodes. The first amplifier stage, having a first conductivity-type, amplifies one of the I/O node towards a first voltage. The second amplifier stage, having a second conductivity-type, amplifies the other I/O node towards a second voltage. The sense amplifier also includes a resistance circuit coupled to the second amplifier stage to reduce the gain of the second amplifier stage thereby reducing the rate of amplification of the signal on the corresponding I/O node. |
| US07894285B2 |
Circuits, systems, and methods for reducing simultaneous switching output noise, power noise, or combinations thereof
Memory devices and methods are provided for reducing simultaneous switching output noise and power supply noise during burst data write and refresh operations. An embodiment of a memory device according to the present invention includes a first power domain coupled to some of the components of the memory device and a second power domain coupled to different components of the memory device. One or more distributed power domain coupling circuits may be coupled to the first and second power domains. The power domain coupling circuit includes a controller configured to generate an enable signal responsive to control signals, data signals, or any combination thereof. The power domain coupling circuit also includes coupling circuitry coupled to the first and second power domains and coupled to the controller. The coupling circuitry is configured to couple the first and second power domains together responsive to the enable signal. |
| US07894284B2 |
Ferroelectric memory bake for screening and repairing bits
A method (300) of identifying failing bits in a ferroelectric memory device including at least one ferroelectric capacitor includes (302) writing same state data to the first capacitor, and (304) baking the first capacitor for a first specified period of time at a first selected temperature. A same state read (306) is performed on the first capacitor after the baking. Based on the results from the same state read, it is determined whether an error occurred. The first specified period of time can be from 10 minutes to 2 hours and the first selected temperature can be in a range from 85° C. to 150° C. A repair can be performed (310) to corrected detected errors. A related method (500) can detect imprinted bits using a same state write (502), followed by a relatively high temperature bake (504), then a same state read (506). An opposite state date write (508) is performed followed by a relatively low temperature bake (510), and then an opposite state data read (512) to identify opposite state error or imprint. |
| US07894282B2 |
Dynamic random access memory device and method of determining refresh cycle thereof
Provided are a dynamic random access memory device having reduced power consumption and a method of determining a refresh cycle of the dynamic random access memory device. The method includes: selecting one or more monitoring bits during first through n-th self refresh cycles, where “n” is a natural number equal to or greater than one; detecting whether the monitoring bits have errors during (n+1)-th through m-th self refresh cycles, where “m” is a natural number equal to or greater than n+1; and adjusting an (m+1)-th self refresh cycle according to whether the monitoring bits have errors. |
| US07894281B2 |
Redundancy circuit using column addresses
A redundancy circuit includes an address redundancy circuit block that compares column address information of a defective memory cell and an external input column address and outputs a redundancy column activation signal, and an input/output (IO) redundancy circuit block that, in response to IO fuse information, which is information about a sub-block where a column line of the defective memory cell is arranged, and the redundancy column activation signal, controls whether or not to activate a global IO line connected to an IO pad of the sub-block. |
| US07894279B2 |
Semiconductor storage device comprising reference cell discharge operation load reduction
A semiconductor storage device precharging a bit line pair to a ground potential includes a sense amplifier connected between the bit line pair, a storage cell connected to one of the bit line pair and storing data, a first transistor controlling a conduction state between the other of the bit line pair and a reference cell node, a second transistor connected between a reference voltage source generating a reference voltage and the reference cell node, the second transistor exclusively controlled from the first transistor, and a capacitor setting a potential of the reference cell node. |
| US07894274B2 |
Memories with improved write current
A memory with improved write current is provided, including a bit line, a write switch and a control circuit. The write switch is coupled between a voltage source and the bit line, and has a control terminal. Based on a bit line select signal, the control circuit controls the electric conductance of the write switch and discharges/charges the parasitic capacitors of the write switch. The voltage source is turned on after the control terminal of the write switch reaches a pre-determined voltage level. |
| US07894273B2 |
Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits
A group of non-volatile memory cells are programmed in a programming pass by a series of incremental programming pulses where each pulse is followed by a program-verify and possibly program-inhibition step. Performance is improved during the programming pass by delayed starting and prematurely terminating the various verify levels that demarcate the multiple memory states. This amounts to skipping the verifying and inhibiting steps of the fastest and slowest programming (fringe) cells of the group. A reference pulse is established when the fastest cells have all been program-verified relative to a first verify level. The starting of what verify level at what pulse will then be delayed relative to the reference pulse. Verifying stops for a given verify level when only a predetermined number of cells remain unverified relative to that given level. Any errors arising from over- or under-programming of the fringe cells are corrected by an error correction code. |
| US07894269B2 |
Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
Shifts in the apparent charge stored on a charge storing element of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent charge storing elements. To compensate for this coupling, the programming process for a given memory cell can take into account the target programmed state of one or more adjacent memory cell. The amount of programming is verified after each programming pulse and the standard verify level for the programming cell is dependent on the target state. The verify level is further offset lower dependent on the amount of perturbation from neighboring cells, determinable by their target states. The verify level is preferably virtually offset by biasing adjacent word lines instead of actually offsetting the standard verify level. For soft-programming erased cells, neighboring cells on both adjacent word lines are taken into account. |
| US07894263B2 |
High voltage generation and control in source-side injection programming of non-volatile memory
Non-volatile memory is programmed using source side hot electron injection. To generate a high voltage bit line for programming, the bit line corresponding to a selected memory cell is charged to a first level using a first low voltage. A second low voltage is applied to unselected bit lines adjacent to the selected bit line after charging. Because of capacitive coupling between the adjacent bit lines and the selected bit line, the selected bit line is boosted above the first voltage level by application of the second low voltage to the unselected bit lines. The column control circuitry for such a memory array does not directly apply the high voltage and thus, can be designed to withstand lower operating voltages, permitting low operating voltage circuitry to be used. |
| US07894261B1 |
PFET nonvolatile memory
A non-volatile memory integrated circuit includes multiple memory cells, each memory cell including a first MOS transistor, a first control capacitor, and a first floating gate coupled to the first MOS transistor and the first control capacitor. A first read/write control signal is provided having at least a first state and a second state and coupled the first MOS transistor. When the control signal is in the first state, the memory cell is configured for readout, and when the control signal is in the second state, the memory cell is configured for writing. Both single-ended and differential memory cells are described. Arrays of such nonvolatile memory cells are also described. |
| US07894260B2 |
Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
A synchronous semiconductor memory device having an on-die termination (ODT) circuit, and an ODT method, satisfy ODT DC and AC parameter specifications and perform an adaptive impedance matching through an external or internal control, by executing an ODT operation synchronized to an external clock. The synchronous semiconductor memory device having a data output circuit for performing a data output operation synchronously to the external clock includes the ODT circuit for generating ODT up and down signals having the same timing as data output up and down signals for the data output operation, to perform the ODT operation. |
| US07894258B2 |
Flash memory device for determining most significant bit program
A flash memory device capable of efficiently determining whether most significant bit (MSB) programming has been performed is provided. The flash memory device includes a cell array, a control unit, and a determination unit. The cell array includes at least one flag cell for storing information about whether MSB programming has been performed on a multi-level cell. The control unit controls a program operation, a read operation, and an erasure operation with respect to the cell array. The determination unit receives flag data stored in the flag cells, performs an OR operation and/or an AND operation on the flag data, and generates a determination signal based on a result of the OR operation and/or the AND operation, wherein the determination signal represents whether the MSB programming has been performed. |
| US07894257B1 |
Low voltage low cost non-volatile memory
Methods, circuits, processes, devices, and/or arrangements for providing a non-volatile memory (NVM) cell are disclosed. In one embodiment, an NVM cell can include: (i) a floating gate in a gate layer, where the floating gate is over an insulating layer, and the insulating layer is over a first channel between first and second diffusion regions; and (ii) a control gate in the gate layer, where the control gate is configured to control the floating gate using direct sidewall capacitive coupling, and where a first coupling ratio from the direct sidewall capacitive coupling is greater than a second coupling ratio from the second diffusion region. |
| US07894252B2 |
Magnetic memory cell and method of fabricating same
A magnetic memory cell in which a sensor is magnetically coupled to a magnetic media wherein the separation of the magnetic media from the sensor permits each to be magnetically optimized separate from the other, thus improving defect tolerance and minimizing the magnetic influence of neighboring cells in an array on one another. In an embodiment, the read circuitry is positioned so that no read current passes through the media during a read operation. In an alternative embodiment, processing is simplified but the read current is allowed to pass through the media. |
| US07894249B2 |
Magnetoresistive element and magnetic random access memory
A magnetoresistive element includes a free layer a pinned layer; a nonmagnetic layer interposed between the free layer and the pinned layer; and two magnetic layers arranged adjacent to the free layer on an opposite side to the pinned layer. The free layer includes: a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer interposed between the first magnetic layer and the second magnetic layer. Magnetization of the first magnetic layer and magnetization of the second magnetic layer are antiferromagnetically coupled. One of the two magnetic layers is in contact with one end of the free layer in a long-axis direction, and the other of the two magnetic layers is in contact with the other end of the free layer in the long-axis direction. |
| US07894247B2 |
Scalable magnetic random access memory device
A magnetic memory cell is provided. The magnetic memory cell includes at least one fixed magnetic layer and a plurality of free magnetic layers, separated from the at least one fixed magnetic layer by at least one barrier layer. The free magnetic layers include a first free magnetic layer adjacent to the barrier layer, a second free magnetic layer separated from the first free magnetic layer by at least one spacer layer, and a third free magnetic layer separated from the second free magnetic layer by at least one anti-parallel coupling layer. A magnetic moment of the first free magnetic layer is greater than both a magnetic moment of the second free magnetic layer and a magnetic moment of the third free magnetic layer. The magnetic memory cell may be used in conjunction with a magnetic random access memory device. |
| US07894246B2 |
Magnetoresistive element and magnetic memory
A magnetoresistive element includes: a magnetization free layer having a first plane and a second plane located on the opposite side from the first plane, and having a variable magnetization direction; a magnetization pinned layer provided on the first plane side of the magnetization free layer, and having a pinned magnetization direction; a first tunnel barrier layer provided between the magnetization free layer and the magnetization pinned layer; a second tunnel barrier layer provided on the second plane of the magnetization free layer; and a non-magnetic layer provided on a plane on the opposite side of the second tunnel barrier layer from the magnetization free layer. The magnetization direction of the magnetization free layer is variable by applying current between the magnetization pinned layer and the non-magnetic layer, and a resistance ratio between the first tunnel barrier layer and the second tunnel barrier layer is in a range of 1:0.25 to 1:4. |
| US07894245B2 |
Spin-current switchable magnetic memory element and method of fabricating the memory element
A spin-current switchable magnetic memory element (and method of fabricating the memory element) includes a plurality of magnetic layers having a perpendicular magnetic anisotropy component, at least one of the plurality of magnetic layers including an alloy of a rare-earth metal and a transition metal, and at least one barrier layer formed adjacent to at least one of the plurality of magnetic layers. |
| US07894243B2 |
Methods of programming and erasing resistive memory devices
In a first method of writing data to a resistive memory device (i.e. programming or erasing), successive electrical potentials are applied across the resistive memory device, wherein the successive electrical potentials are of increasing duration. In another method of writing data to a resistive memory device (i.e. programming or erasing), an electrical potential is applied across the resistive memory device, and the level of current through the memory device is sensed as the electrical potential is applied. The application of the electrical potential is ended based on a selected level of current through the resistive memory device. |
| US07894242B2 |
Device for storing a binary state
Device for storing a binary state defined by a first binary value and a second binary value complementary thereto, the device capable of being queried by a query signal so as to output, in dependence on a binary masking state, the first binary value at a first output and the second binary value at a second output or vice versa. |
| US07894239B2 |
Variable resistance element, method for producing the same, and nonvolatile semiconductor storage device
The variable resistance element of the present invention is a variable resistance element having an electrode, the other electrode, and a metal oxide material sandwiched between the electrodes and having an electrical resistance, between the electrodes, changing reversibly in response to a voltage applied between the electrodes. The variable resistance element further includes, inside the metal oxide material, a low resistance material having a lower electrical resistance than the metal oxide material and being out of contact with at least either one of the electrodes. This makes it possible to reduce a forming voltage for providing a conductive section inside the metal oxide material, without causing a leakage current to increase. |
| US07894237B2 |
Programming multilevel cell phase change memories
A multilevel phase change memory cell may have a plurality of intermediate levels between a set and a reset or a crystalline and amorphous states. These intermediate levels between set and reset may be differentiated not only by programming current, but also by different programming pulse widths. As a result, the intermediate states may be positioned, on the programming current versus programming pulse width curve, in regions of common resistance with a relatively large range of programming current. |
| US07894233B2 |
Fuse devices and methods of operating the same
A fuse device includes a fuse unit, which includes a cathode, an anode, and a fuse link coupling the cathode and the anode. A transistor includes at least a portion of the fuse unit to be used as an element of the transistor. In at least one example embodiment, the transistor includes a source and a drain disposed on a substrate at each of a plurality of sides of the fuse link, the fuse link being a gate for the transistor. |
| US07894230B2 |
Stacked semiconductor devices including a master device
A stack that includes non-volatile memory devices is disclosed. One of the non-volatile memory devices in the stack is a master device, and the remaining memory device or devices is a slave device(s). |
| US07894227B2 |
Content addressable memory
The present invention is directed to reduce array area and power consumption in a content addressable memory. A comparator for performing a match determination and a size determination is provided commonly for plural entries each storing data to be retrieved. Each entry includes data storage cells for storing data and mask cells for storing mask bits. The number of mask cells is smaller than that of the data storage cells. Search data is transmitted to the comparator via a search data bus. One of the entries is selected according to a predetermined rule. The comparator decodes the mask bits, generates a mask instruction signal, and performs match comparison and size comparison between the search data and data to be retrieved which is stored in the selected entry. |
| US07894224B2 |
Voltage drive system with hysteretic current control and method of operating the same
A voltage drive system is provided having a plurality of modulators and a plurality of cascaded switching circuits which collectively generate a single-phase output signal to a load. Each modulator receives a phase current error and has an adder which generates a modulated phase current error based on the phase current error and based on a signal having a phase. For each respective modulator, the phase of the respective signal is different. Each respective modulator changes a respective gate input when the respective modulated phase current error changes from being within a predetermined current range to being outside of the predetermined current range. Each respective switching circuit receives the respective gate input and generates a respective output terminal voltage based on the respective gate input. The change in the respective gate input effectively causes a switching event of the respective switching circuit. |
| US07894220B2 |
Voltage generating circuit
A voltage generating circuit is provided, including a voltage output terminal, a ground terminal, a capacitor, a selector, a first switch, and a second switch. The capacitor is connected between a pump signal and the output of the selector. The selector is controlled by a first control signal and used to select the voltage source or the voltage output terminal to connect the capacitor. The first switch is controlled by a second control signal, and the second switch is controlled by a third control signal. When the first switch is turn-on, the voltage output terminal is connected to the ground terminal. When the second switch is turn-on, the voltage output terminal is connected to the voltage source. |
| US07894217B2 |
DC to DC converter
An exemplary direct current (DC) to DC converter includes a first rectifying and filtering circuit configured to receive an alternating current (AC) voltage and transform the AC voltage to a first DC voltage, a pulse width modulation (PWM) circuit, a first transformer configured to receive the first DC voltage and transform the first DC voltage to a second AC voltage under control of the PWM circuit, and a second rectifying and filtering circuit including a first transistor and a control circuit for switching on or switching off the first transistor so as to transform the second AC voltage to a second DC voltage. |
| US07894215B2 |
Electronic apparatus, AC/DC conversion device and power factor correction circuit thereof
An electronic apparatus, AC/DC conversion device and power factor correction circuit are provided. The power factor correction circuit includes an inductance, a switch, a power control chip, a first diode and a first capacitor. The inductance has a first end and a second end. The first end receives a first voltage. The switch has one end coupled to the second end of the inductance and has the other end coupled to a low voltage. The power control chip receives a spread spectrum synchronization signal, and controls turning on/off of the switch by a control signal according to the spread spectrum synchronization signal. The first diode has an anode coupled to the second end of the inductance. The first capacitor has one end coupled to a cathode of the first diode for generating a second voltage and has the other end coupled to the low voltage. |
| US07894214B1 |
Power converter capable of lowering power wastage on standby
A power converter includes at least one electric control switch, an electric current detecting and converting unit, a power controller, and a voltage detecting and controlling unit at the primary side; and a synchronous rectifying circuit, two MOSFETs, and an oscillating loop. During the actual operation, electric current detecting and converting unit outputs an AC voltage signal to the power controller and outputs a DC voltage signal to the voltage detecting and controlling unit, and then voltage detecting and controlling unit compares with a reference voltage to turn off the synchronous rectifying circuit at the no-load mode and to rectify via a body diodes of the MOSFETs. Accordingly, the power converter can reduce the power wastage at the no-load mode to be energy-saving. |
| US07894212B2 |
Switching power supply device
A switching power supply device includes a first series circuit of first and second switching elements connected in parallel with a DC power supply. An isolation transformer has primary and secondary windings and first and second auxiliary windings, a first layer including the primary windings between a second layer of the two auxiliary windings, and a third layer of the secondary windings. A capacitor in series with the primary windings defines a second series circuit in parallel with the second switching element. A rectifying and smoothing circuit includes a rectifying diode and a smoothing capacitor, connected to the secondary windings. First and second control circuits turn on and off the first and second switching elements based on voltages generated in the two auxiliary windings, to obtain a DC output from the rectifying and smoothing circuit, enabling an adequate auxiliary windings voltage and stable switching operation including stable zero-voltage turn-on. |
| US07894211B2 |
Micro wind turbine topology for small scale power generation
A wind energy converter has a generator adapted to be coupled directly to a wind turbine without need for a mechanical gear unit. A rectifier is coupled to the generator and a converter is coupled to the rectifier to provide a regulated DC bus voltage as a function of a controlled duty cycle. An inverter is coupled to the converter for providing a regulated AC output to a load. |
| US07894209B2 |
Telecommunications terminal module with hinged grounding element
The invention relates to an assembly of at least one carrier (12), at least one telecommunications module (10) mounted on the carrier (12) and at least two grounding elements (14, 16), at least one grounding element (14) being fitted to the telecommunications module, and at least one grounding element (16) being fitted to the carrier (12), wherein the grounding elements (14, 16) are in direct contact with each other and can be pivoted with regard to each other while keeping the contact. |
| US07894208B1 |
Server module
A server module includes a tray, a motherboard installed in the tray, and at least one storage device. The tray includes a port erected from a rear end of the tray, a roomage inwardly and concavely disposed on an edge of the motherboard and proximate to the port, and a socket disposed at an edge of the roomage and opposite to the port for connecting the insert roomage of the storage device, such that the storage device is disposed onto the roomage of the motherboard, and the motherboard can be used for expanding the storage device directly. |
| US07894205B2 |
Variable device circuit and method for manufacturing the same
There is provided a variable device circuit according to the present invention, including: a substrate; at least one movable switch device formed on a first principal surface of the substrate; at least one fixed capacitor device formed on the first principal surface of the substrate; at least one variable capacitor device formed on the first principal surface of the substrate; at least one variable inductor device formed on the first principal surface of the substrate; and wiring lines for electrically connecting the devices to one another, the wiring lines being formed on the first principal surface of the substrate; wherein electrical connections among the devices can be selected by operation of the movable switch device, whereby achieving stable, low-loss circuit characteristics with lower manufacturing cost. |
| US07894197B2 |
Optical sensing module and display device using the same
An optical sensing module is adapted to be assembled to a frame of a display device. The display device comprises a display module and the frame, and the display module has a display area and the frame surrounds the display area. The optical sensing module comprises a casing and an optical sensor. The casing is pivoted to the frame and the optical sensor is configured in the casing for sensing external light projecting on a side of the casing. The optical sensor is capable of sensing a brightness of the display area when the side of the casing faces the display area and sensing a brightness of an ambient light when the side of the casing doesn't face the display area. |
| US07894191B2 |
Fan rotation control method, fan rotation control system, and fan rotation control program
The present invention aims to appropriately cool an operation unit and to suppress power consumption and noise according to the configuration and the operation state in a computer system of an enclosure. A plurality of system cooling fans for cooling the operation unit of the computer system installed in the enclosure and an enclosure management module for controlling the rotation of each system cooling fan are arranged, where the enclosure management module stores in advance the supply cooling amount which is to be supplied to the operation unit by each system cooling fan, acquires information related to a temperature of the operation unit and calculates a necessary cooling amount which is to be required in the operation unit based on the information, and determines the rotation number of each system cooling fan based on the supply cooling amount and the necessary cooling amount. |
| US07894189B2 |
Portable computer with an expandable handle
A portable computer includes a host including a housing, an expandable handle connected to the housing in an expandable manner, and a monitor pivoted to the host. |
| US07894186B2 |
Pivoting lock mechanism for a computer access cover
A computer cover retention bar (or lock bar) is provided that is functionally integrated with a padlock and/or Kensington lock setup in such a way that full closure via the padlock and/or Kensington lock will ensure that the retention bar, itself provided with detents or hooks that themselves act to keep the cover fully closed with respect to a chassis or body of the desktop or workstation, cannot be moved. This then ensures that the locking action of a padlock or Kensington lock goes a measure beyond the norm, in that a cover can indeed remain fully closed without, e.g., affording unauthorized individuals from prying open the cover. |
| US07894182B2 |
Flat panel display subassembly having speaker secured by integrated securing structure
An exemplary flat panel display subassembly (1) includes a front frame (10), a back cover (12), and a speaker (14). The back cover is adjacent to the front frame. The speaker is adjacent to one of the front frame and the back cover, and defines a through hole (146) therein. One of the front frame and the back cover includes a securing structure (129) engaged in the through hole. |
| US07894180B2 |
Portable device docking station
An external expanding apparatus or “docking station” operable with a portable computer device of a type having a display unit having a display screen on an inner surface thereof and a hard shell backing surface opposite thereof and pivotally mounted on a substantially rigid casing having a pair of locating holes adjacent to opposite corners of a substantially planar bottom surface thereof, and an input/output (I/O) connector positioned on a back plane thereof with a pair of positioning apertures provided on opposite sides thereof. |
| US07894178B2 |
Through hole capacitor and method of manufacturing the same
A through hole capacitor at least including a substrate, an anode layer, a dielectric layer, a first cathode layer, and a second cathode layer is provided. The substrate has a plurality of through holes. The anode layer is disposed on the inner surface of at least one through hole, and the surface of the anode layer is a porous structure. The dielectric layer is disposed on the porous structure of the anode layer. The first cathode layer covers a surface of the dielectric layer. The second cathode layer covers a surface of the first cathode layer, and the conductivity of the second cathode layer is greater than that of the first cathode layer. The through hole capacitor can be used for impedance control, as the cathode layers of the through hole are used for signal transmission. |
| US07894175B2 |
Non-intrinsically safely supplied measurement device
A non-intrinsically safely supplied measurement device (1) with a connecting device (3) having an “increased safety” type of protection for connecting the measurement device (1) to a feed connection (2) in order to supply the measurement device (1) with electricity, an electronic device (4) which contains electronic components of the measurement device (1), a display device (8), a sensor (7) made with “increased safety” or “intrinsic safety” type of protection, and an output circuit (9) that is without at least the “intrinsic safety” type of protection. The electronic device (4) has an “encapsulation” type of protection, the display device (8) has an “intrinsic safety” type of protection and the display device (8), the sensor (7) and the output circuit (9) are connected to the electronic device (4) via connections having an “increased safety” type of protection. |
| US07894172B2 |
ESD protection structure
An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer. |
| US07894171B2 |
Circuit for protecting NMOS device from voltage stress
A protection circuit for an NMOS device is provided. The protection circuit includes a cascoding NMOS transistor and an adjusting circuit. The cascoding NMOS transistor is cascoded between the NMOS device and an external voltage source. The adjusting circuit is coupled to the external voltage source, a gate of the cascoding NMOS transistor, and an internal voltage source. The adjusting circuit adjusts the voltage at the gate of the cascoding NMOS transistor according to the voltages of the external voltage source and the internal voltage source so as to protect the NMOS device from a voltage stress caused by the external voltage source. |
| US07894167B2 |
Thin-film magnetic head with little reattachment
Provided is a magnetoresistive effect element in which a magneto-sensitive portion is formed in a position where the portion sufficiently receives bias field and the influence of reattachments on reading output is avoided. The magneto-sensitive portion has a pinned layer, a non-magnetic intermediate layer and a free layer. A multilayer, that includes a foundation layer, the magneto-sensitive portion and a cap layer, has upper side surfaces forming an inclination angle θC, intermediate side surfaces forming an inclination angle θS, and lower side surfaces forming an inclination angle θU. The inclination angle θS is greater than both of the inclination angles θC and θU. The boundary between the upper side surface and the intermediate side surface is located above a side surface of the magneto-sensitive portion, and the boundary between the intermediate side surface and the lower side surface is located below a side surface of the magneto-sensitive portion. |
| US07894166B2 |
CPP GMR device with ferromagnetic layer split in depth direction
A magneto-resistive effect device of a CPP structure includes a nonmagnetic intermediate layer, and a first ferromagnetic layer and a second ferromagnetic layer stacked together and formed with the nonmagnetic intermediate layer sandwiched between them. The first ferromagnetic layer and the second ferromagnetic layer are magnetically coupled via the nonmagnetic intermediate layer such that magnetizations of the first ferromagnetic layer and the second ferromagnetic layer are antiparallel with each other. Mutually antiparallel magnetizations of two magnetic layers lie in a medium opposite plane or front to rear direction and in a rear to front direction. The second ferromagnetic layer is divided by a nonmagnetic intervening layer into a front second ferromagnetic layer and a rear second ferromagnetic layer on the way from the front to the rear. |
| US07894160B2 |
Thin-film magnetic head controlling floating amount by locally projecting element portion toward recording medium by thermal expansion and method of manufacturing the same
A thin-film magnetic head which can locally project a reproduction element toward a recording medium and a method of manufacturing the thin-film magnetic head are provided. The thin-film magnetic head includes a reproduction element, a recording element which is stacked on the reproduction element and has a pair of magnetic core layers and a coil layer configured to apply a recording magnetic field to the magnetic core layers, and a heat-emitting member emitting heat by electrification, which causes the reproduction element to project toward the recording medium by thermal expansion. The heat-emitting member is disposed below the coil layer. |
| US07894159B2 |
Perpendicular write head with independent trailing shield designs
A magnetic write head having independent trailing and side magnetic shields. The side shields and trailing shields are independently of one another so that they can have throat heights that are different from one another. This advantageously allows the magnetic potential between the write pole and side shields to be controlled independently of one another without relying on the side gap and trailing gap thicknesses. Furthermore, magnetic performance of the write head can be improved because the side shields can be constructed with varying tapered throat heights, while the throat height of the trailing shield can remain constant. |
| US07894157B2 |
Variable spring-force mechanism for advancing tape media cartridges in a deep slot cell
An apparatus to generate a spring force increasing in accordance with a quantity of tape media cartridges stored in a deep slot cell. The apparatus may include a deep slot cell, a biasing element including a torsion spring, and an advancement element. The deep slot cell may store one or more cartridges. The biasing element may generate a spring force toward the front of the deep slot cell such that the spring force generated increases in accordance with a number of cartridges stored in the cell. The advancement element may be positioned to apply the spring force to the cartridges, thereby advancing the cartridges toward the front of the deep slot cell. |
| US07894154B2 |
Method and system for improving data access time
A computer implemented method of writing data to a linear tape is provided and includes, of the data to be written to the linear tape, distinguishing between data and meta-information, writing both the distinguished meta-information and undistinguished meta-information to a data area of the linear tape and the distinguished meta-information to a reserved area at a leading end of the linear tape, and retaining information reflective of the meta-information and a location thereof in a specified position of the reserved area. |
| US07894152B2 |
Perpendicular recording discrete track medium and servo pattern magnetization method for same
A servo pattern magnetization method is provided, having full-amplitude servo signals, to eliminate the need for intensity modification and waveform shaping during servo signal reading, and to improve the precision of head positioning and enable an increase in track recording density. A servo pattern magnetization method for a perpendicular recording discrete track medium, having a plurality of recording areas and a plurality of servo areas separating the plurality of recording areas, has a process of recording magnetization perpendicular to the substrate and in opposite directions in each of the magnetic recording layers of the plurality of servo blocks, by means of the leakage magnetic field from the soft magnetic layers separated from other servo blocks when a magnetic field is applied. |
| US07894151B2 |
“Flat analog” AFE coupled with an all digital architecture compensation read channel
Reading data from a magnetic storage media with an analog front end (AFE) coupled to an all digital read channel compensation architecture. A read head passes over magnetic storage media to produce an analog signal. The analog signal is amplified such that the range of the amplified analog signal substantial matches a range of the analog to digital converter (ADC) used to sample the analog signal. A baseline adjust is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC. The amplified analog signal may be sampled where the sampling is data frequency locked by a data lock clock (DLC) tracking module. A digital signal may then be produced from the amplified analog signal where this signal is read channel compensated in the digital domain to produce a digital signal which is then processed with a sequence detector. |
| US07894148B2 |
Absorption type multi-layer film ND filter and process for producing the same
An absorption type multi-layer film ND filter having a substrate formed of a resin film and on at least one side thereof an absorption type multi-layer film of oxide dielectric film layers and absorption film layers which are alternately wherein the oxide dielectric film layers are each a SiCyOx (0 |
| US07894145B2 |
Lens adjusting device and image tracking system with the same
A lens adjusting device (100) includes an optical module (10) and a driver module (20). The driver module includes a seat (22), at least one magnet (24) and at least one winding (26). The optical module is rotatably fixed on the seat. The magnet is fixed on the optical module. The magnet and the winding are positioned at one side of the optical module. A variable current is applied to the winding, and a magnetic field is formed at ends of the winding. The magnetic forces between the magnetic field and the magnet drives the optical module to rotate. |
| US07894142B1 |
Photographing optical lens system
This invention provides a photographing optical lens system in order from an object side to an image side including: a first lens element with positive refractive power having a convex object-side surface, a second lens element with positive refractive power having a convex image-side surface, a third lens element with positive refractive power having a convex object-side surface and a concave image-side surface, both the two surfaces being aspheric and at least one of them having at least one inflection point formed thereon; wherein the photographing optical lens system further comprises an aperture stop configured between an imaged-object and the second lens element, and there are three lens elements with refractive power. |
| US07894140B2 |
Compensation techniques for fluid and magnetic bearings
A system is configured to compensate for guide flatness errors and/or shifting of a support. The system can include one or more support devices, fluid or magnetic bearings to guide the one or more support devices along a guide, and a compensation system. The compensation system is coupled to respective ones of the one or more support devices adjacent to each of the fluid or magnetic bearings. The compensation system is configured to generate a rotational motion that compensates for tilting in the support devices compensate for any non-straight areas of the guide or shifting (e.g., thermal shifting) of the support devices, which is done through moving of the support devices with respect to the guides during movement of the support devices along the guide. |
| US07894130B2 |
Stereomicroscope having a beam splitter device
A stereomicroscope (20) has first and second main beam paths (21, 22) whose spacing defines a stereo base (23), a microscope axis (24) proceeding through the center of the stereo base (23) parallel to the main beam paths; and an optical beam splitter device (30) for generating an assistant's beam path (31) and a documentation beam path (32), the assistant's beam path being outcoupled from the first main beam path in a first position of the beam splitter device, and from the second main beam path in a second position, and the documentation beam path being outcoupled from the other main beam path; and the direction of the assistant's beam path in the first position being rotated 180° relative to the assistant's beam path in the second position; and the outcoupled documentation beam path extending, in both positions of the beam splitter device, perpendicular to the outcoupled assistant's beam path. |
| US07894129B2 |
Laser device and optical amplifier
Laser light emission across a wide bandwidth emission spectrum is enabled in a laser amplifier equipped with solid gain media. The laser amplifier is equipped with: a resonator; a plurality of solid gain media, having fluorescent spectra that a least partially overlap with each other, provided within the resonator; and pumping means, for pumping the plurality of solid gain media. The entire fluorescent spectrum width of the plurality of solid gain media is greater than the fluorescent spectrum width of each solid gain medium. |
| US07894126B2 |
Broadband Terahertz radiation generation and detection system and method
The invention relates to a broadband Terahertz (THz) radiation generation and detection system and method. THz radiation is generated by optical rectification of an ultrashort pump pulse of a first wavelength having a duration in the picosecond- or sub-picosecond range in a first nonlinear optical crystal. The THz radiation is detected by electro-optic sampling or another appropriate method of a probe beam having a second wavelength in a second nonlinear optical crystal. According to the invention, at least one of the following conditions is fulfilled: a) the first wavelength is different from the second wavelength; b) the material of the first nonlinear optical crystal is different from the material of the second nonlinear optical crystal. This makes it possible to choose for the generation and for the detection process—independent of one another—the combination of wavelengths and nonlinear material and possibly other features of the pump/probe pulses like polarization with the highest efficiency for generation and detection of Terahertz pulses, respectively. |
| US07894117B2 |
Transparent window switchable rear vision mirror
A transparent window switchable rear vision mirror adapted to be secured to a motor vehicle for improved road safety, said switchable window/mirror including, a film suitable for use as a light modulating unit of suspended particle device (spd) light valve, said film comprising a matrix polymer material having droplets of a liquid light valve suspension comprising a plurality of particles dispersed in a liquid suspending medium distributed within a matrix, said film characterized in that presence or lack thereof of an electric field results in the particles being aligned such that a beam of light may be reflected, transmitted or absorbed depending on the status of the electrical field applied thereto such a film; a switchable mirror device comprising a substrate and a mono layer film capable of undergoing a reversible change in light transmission or reflectance, said substrate including a film comprising a transmission metal composition; and a power supply device to provide an electrical charge to said film for use as a light modulating unit of spd and the substrate and the mono layer film, such that the application of the electric field provides for light absorbing or light reflecting functionality of a darkened characterization, and a mirror like state for the switching device. |
| US07894115B2 |
Light control apparatus having light modulating film
A light control apparatus may include a substrate, a first reflection layer provided on the substrate, a light modulating film provided on the first reflection layer, a second reflection layer provided on the light modulating film, and a pair of electrodes which applies an electric field to the light modulating film. The light modulating film ma have a refractive index controlled by the electric field. |
| US07894114B2 |
Optical deflector having tapered aperture stop, light scanning apparatus and scanning type image display apparatus using same
An optical deflector is disclosed which is capable of preventing unnecessary reflection by a member disposed behind a reflecting portion. The optical deflector includes a substrate portion, a reflecting portion can swing about a swinging motion axis with respect to the substrate portion, and an aperture stop portion which includes an aperture and blocks at least part of a light beam other than a light beam entering the aperture among an incident luminous flux to the optical deflector. The aperture allows passage of the incident luminous flux toward the reflecting portion and that of an emergent luminous flux reflected by the reflecting portion. At least part of an aperture rim of the aperture stop portion has a shape that makes the width of the aperture narrower from a light-beam-incoming side toward a reflecting portion side. |
| US07894110B2 |
Pixel interpolation method and image distinction method
An image processing circuit inputs pixels arranged in RGB Bayer pattern. A chroma value calculation circuit calculates a chroma coefficient for evaluating chroma of a peripheral region of a target pixel. A correlation value calculation circuit calculates a correlation value for gray image and a correlation value for color image. When the chroma coefficient is higher than a first threshold value, a correlation judging method for color image and a pixel interpolation method for color image are selected. When the chroma coefficient is not higher than the first threshold value and higher than a second threshold value, a correlation judging method for gray image and the pixel interpolation method for color image are selected. When the chroma coefficient is not higher than the second threshold value, the correlation judging method for gray image and a pixel interpolation method for gray image are selected. Interpolation is executed in a pixel interpolation circuit. |
| US07894106B2 |
Image reading device and image forming apparatus
A driving-force transferring unit is extended in a predetermined direction, with a predetermined portion attached to a running unit. A driving unit changes a direction of movement of the driving-force transferring unit by rotating based on a driving force from a driving source. At least one pulley unit is rotatably attached to the case and supports the driving-force transferring unit. The pulley unit includes an outer ring member that is rotated by the driving-force transferring unit, an inner ring member that rotatably supports the outer ring member, and an engaging unit that is provided on the inner ring member, to engage with the case. |
| US07894100B2 |
Modular pen-like device having camera, effects and printer modules
A modular pen-like device is provided having a camera module for capturing images, an effects module for applying visual effects to the captured images, and a printer module for printing the captured and visually effected images. The modules have respective, generally cylindrical bodies configured to be assembled together so that the assembled body of the modular pen-like device is generally cylindrical. |
| US07894098B1 |
Color separation of pattern color spaces and form XObjects
Systems and computer program products for performing color separation operations. In one aspect, a system creates a high-level representation of a graphical container as a separated element the first time a graphical container is used. The high-level representation being a non-bitmapped representation. The system stores the high-level representation of the graphical container in memory and refers to the separated element in memory when the graphical container is invoked a second time. In another aspect, a system creates a high-level representation of a form XObject as a separated element in a cache. The system uses the separated element in the cache when the form XObject is invoked a second time. In another aspect, a system creates a high-level representation of a pattern container as a separated element in the cache and uses the separated element in the cache when the pattern container is invoked a second time. |
| US07894095B2 |
Mobile telephone handset having a cartridge and pen arrangement
Provided is a mobile telephone handset having a cartridge with a universal pen arrangement, said cartridge for supplying ink to a printhead mounted on a nib of the pen arrangement. The universal pen arrangement includes a holder fast with the cartridge, and a retractable stylus slidably mounted in the holder, so that the stylus is slidable between a retracted position, in which the stylus is stored inside the holder, and an extended position, in which the printhead protrudes from the holder for printing on a substrate. The pen arrangement also includes a flexible data, power and ink conduit linking the cartridge to the stylus, as well as a stylus retaining mechanism to retain the stylus in either the retracted or extended position. |
| US07894094B2 |
System and method for image rotation
A system and method to provide 180-degree rotation of image data at full throughput. The system includes a memory access controller that writes bursts of image data into a rotation buffer. The image data is then read out of the rotation buffer in the reverse order from which it was written to thereby accomplish rotation. By alternating the position in the rotation buffer in which the image data is written such that an image is either written into the buffer from top and read from the bottom or written into the buffer from the bottom and read out from the top, a one page rotation buffer of can be used to concurrently process two pages. |
| US07894093B2 |
Information processing apparatus, information processing method, information processing program and computer readable recording medium
In an information processing apparatus having a service mode for a service person to carry out maintenance of the apparatus enters for carrying out the maintenance, a registration page is provided for registering the service person as a service person in charge of the maintenance of the apparatus, and an input page is provided for inputting authentication information required for the service person that is registered in the registration page as a person in charge of the maintenance of the apparatus to enter the service mode. |
| US07894080B2 |
Width and thickness detecting mechanism of a shredder
A width and thickness detecting mechanism of a shredder includes a shredding path, a first width sensor, a second width sensor, a third width sensor, a thickness detecting module, and a control unit. The thickness detecting module includes two thickness sensors. After the width of the article is detected by means of the first width sensor, the second width sensor and the third width sensor, a proper thickness sensor is allocated to detect the thickness of the article. |
| US07894077B2 |
Multi-directional projection type moire interferometer and inspection method of using the same
A multi-directional projection type moiré interferometer includes a stage, an image formation part, rotating mirrors, fixed mirrors, and a pattern illumination generating part. The stage moves a target object. The image formation part is provided above the stage to take a pattern image reflected from the target object placed on the stage. The rotating mirrors are vertically arranged and inclined at an angle different from each other to receive a pattern illumination, change the optical path of the pattern illumination, and emit the pattern illumination. The fixed mirrors emit the pattern illumination, emitted from the rotating mirrors, toward the target object. The pattern illumination generating part emits the pattern illumination toward the rotating mirrors. The pattern illumination generating part includes a grating board, and grating elements are formed at the grating board to emit the pattern illumination toward the rotating mirrors. |
| US07894071B2 |
Measurement chip
The present invention concerns a measurement chip (1) for carrying out measurements of transmission and/or emission and/or scattering of light by a fluid sample in an operator unit, wherein the measurement chip has a base plate (2) produced from a transparent polymer material, provided in the base plate (2) are at least one measurement cell (3) for receiving a fluid sample and fluid passages (4, 4) for supplying and discharging fluid to and from the measurement cell (3), and provided in and/or on the base plate (2) outside the measurement cell (3) are mirror surfaces (5) which are so arranged that they direct light emitted from and/or scattered by a fluid sample in the measurement cell (3) from the measurement chip (1), preferably in the direction of a light detector provided in an operator unit. |
| US07894067B2 |
Method and apparatus for the high spatial resolution imaging of a structure marked with a substance
For the high spatial resolution imaging of a structure in a sample (2) the structure is marked with a substance which can be changed over by means of a first electromagnetic signal (5) from a first state having a larger absorption cross section for a second electromagnetic signal (3) into a second state having a smaller absorption cross section for the second signal (3) or which can be changed over by means of a first electromagnetic signal (5) into a first state having a larger absorption cross section for a second electromagnetic signal (3) from a second state having a smaller absorption cross section for the second signal (3). A spatially delimited distribution of a portion of the substance in the first state is then set by means of the first signal (5). Afterward, the second electromagnetic signal (3) is applied to the sample (2), and a local temperature increase in the sample (2) which results from the larger absorption cross section of the substance in the first state is detected. |
| US07894064B2 |
Optical device for dispersing light
An optical device includes an aperture stop that limits an angular extent of light from an illuminated sample. A first lens is positioned between the aperture stop and a detector plane. A second lens is positioned between the first lens and the detector plane and is operable to map light from the aperture stop to the detector plane such that the light is averaged at the detector plane. |
| US07894063B2 |
Lithographic method
A method includes determining relative positional relationships between applied fields on a substrate, one of the applied fields including a first field; in a lithographic apparatus, using an alignment apparatus to obtain at least one absolute positional relationship between the position of at least the first field of the substrate and a part of the lithographic apparatus; and determining an absolute positional relationship between at least one field, other than the first field, and a part of the lithographic apparatus using the relative positional relationships and the at least one obtained absolute relationship. |
| US07894060B2 |
Modular dust measurement
A modular dust measuring device (10) is set forth for the determination of a foreign body concentration in a gas having at least one optical sensor head (14) which has a light transmitter (16) and a light receiver (22) and having a central unit (12) which has an evaluation unit (30) and a scavenging air unit (32), wherein the evaluation unit (32) is made to determine the foreign body concentration with the help of a scattered light intensity or transmitted light intensity recorded by the light receiver (22) and the scavenging air unit (32) can supply the sensor head (14) with scavenging air to avoid or eliminate impurities or deposits. In this respect, the sensor head is made as a sensor module (14) and the central unit is made as a central module (12) in that the evaluation unit (30) is made for the evaluation and control of sensor modules (14) of different measurement principles, the sensor module (14) is interchangeably connected to the central module (12) by standardized data interfaces and connections (26, 28) and the scavenging air unit (32) is able to make scavenging air available in the required quantity and with the required effective pressure for the sensor modules (14) of different measurement principles. |
| US07894059B2 |
Film formation processing apparatus and method for determining an end-point of a cleaning process
The present invention provides a particle measuring system which is provided in a processing system 40 which generates an atmosphere obtained by exhausting air or a gas in a processing chamber 48 by a vacuum pump 98 and applies a process concerning semiconductor manufacture to a wafer W in the atmosphere, attached to an exhaust pipe 90 which connects an exhaust opening 86 of the processing chamber 48 with the vacuum pump 98, and measures the number of the particles in the exhaust gas, and a measuring method thereof, the system and method providing a processing system and a cleaning method which terminate etching process by determining an end point based on the number of the particles in the exhaust gas and perform cleaning of unnecessary films. |
| US07894057B2 |
Methods of analyzing samples using broadband laser light
Broadband light, for example, from a Fabry-Perot quantum cascade laser, is shone onto a sample, and spectral data concerning the broadband light reflected from the sample is collected. The spectral data is analyzed to determine information about one or more substances in the sample. For example, if the sample contains micro-organisms, such as bacteria or fungus, the biological classification(s) (e.g., species) of the micro-organisms can be determined from the spectral data. As another example, if the sample contains virus, the biological classification(s) (e.g., species) of the virus(es) can be determined from the spectral data. As yet another example, if the sample contains particles, size, location and velocity can be determined from the spectral data. |
| US07894053B2 |
Inspection apparatus
An inspection apparatus includes a stage allowing an inspection subject to be mounted thereonto, an illumination unit for emitting diffused light to the inspection subject, an imaging unit disposed to face the illumination unit with the inspection subject interposed therebetween, for taking the diffused light that is emitted from the illumination unit and is transmitted through the inspection subject, a first prism sheet disposed between the inspection subject and the illumination unit and having a first prism surface with a plurality of prisms aligned in a stripe pattern to face the illumination unit, a second prism sheet disposed between the illumination unit and the first prism sheet and having a second prism surface with a plurality of prisms aligned in a stripe pattern to face the first prism surface. |
| US07894049B2 |
Method and device for measuring polarization state and polarization mode dispersion in photonic transmission systems
A method and device capable of evaluating the specific values of the polarization state of the signal transmitted in a photonic transmission system for a number of frequencies of one or more of the pulses extracted from the optical signal by means of the translation of the frequential components of polarization state of one or more pulses to the time domain by means of the use of an optical Fourier transformer, and their sampling, quantification and subsequent analysis.From the analysis the variation in the polarization state versus frequency is calculated, as well as its associate PMD vector and the DGD present in the signal transmitted. This information may be used as a control signal for a PMD compensator device in order to upgrade the quality of communication in the system. |
| US07894047B2 |
Blood analyzer, sample analyzer, and flow cytometer
A sample analyzer is provided that is capable of eliciting sufficient performance of an avalanche photodiode, and performing high-precision analysis of the sample. The sample analyzer is provided with a WBC detection section that uses the avalanche photodiode as a photoreceptor element. The WBC detection section is provided with a flow cell, semiconductor light source, side collective lens, dichroic mirror, and avalanche photodiode. The side collective lens is a lens with a high NA (numeric aperture), and an aspheric lens with a small aberration. The sample analyzer prepares a scattergram using side fluorescent light signals and side scattered light signals to classify white blood cells into five categories. |
| US07894046B2 |
Two-dimensional estimation technique for doppler optical coherence tomography (OCT)
Optical Coherence Tomography (OCT) is a high-resolution, non-invasive technique to image subsurface tissue and tissue functions. A broadband light source illuminates an object and the reflected photons are processed using an interferometer, demodulated into inphase and quadrature components and then digitized. The captured data contains information about the velocity of the moving scatterers but current Doppler estimation algorithms have a limited velocity detection range. Using a two dimensional velocity estimation, Doppler OCT (DOCT) can be used for the detection of in vivo aortic blood flow rates of over 1 m/s peak velocity through an esophageal DOCT probe. Previous methods have used a transverse Kasai (TK) autocorrelation estimation to estimate the velocity which is good for slow velocities, such as in the microvasculature. By calculating the Kasai autocorrelation with a lag in the depth or axial direction, backscattered frequency information is obtained which yields high velocity rate information. Through subtraction with stationary backscattered information, the Doppler shift is obtained by the axial Kasai (AK) technique. Through utilizing information from two dimensions, velocities can be resolved which spans rates from the microcirculation to cardiac blood flow velocities. |
| US07894044B1 |
Laser for coherent LIDAR
A method for achieving optimum coaxial lidar configuration using optical fibers. Optical fibers are used with mirrors or lenses to create light paths that can achieve an optimum lidar configuration while employing fewer components than that of prior art for a more simplified, lightweight, and less expensive system to produce. The lidar components, including the laser source and the light detector unit, may be placed in a separate housing. A separate housing eliminates unnecessary weight in the optical telescope assembly, makes scanning of the system easier, and enables a better omni-directional cloud height indicator. |
| US07894033B2 |
Semiconductor device including a particular dummy terminal
Keeping more space for circuit elements on a chip when dummy terminals for reinforcement are located on it for the purpose of load balancing for pressure welding. A semiconductor device 10 used for COG-implementation comprising an output terminals group 12f arrayed in a first pattern close to one end of a chip, and one or more dummy terminals 12d located close to the one end of the chip in a different region from a region where an output terminals group 12f is located and arrayed in a second pattern different from the first pattern. The second pattern has a shortened width. A power supply portion 14 is located longitudinally adjacent to an output terminals group 12f beside the dummy terminals 12d. |
| US07894030B2 |
Liquid crystal display and method havng three pixel electrodes adjacent each other in a column direction connected with three respective gate lines that are commonly connected and three data lines, two of which are overlapped by all three pixel electrodes
A liquid crystal display device and method therefore include a substrate; first, second and third pixel electrodes formed on the substrate and adjacent to each other in a row direction; first, second and third gate lines connected to the first, second and third pixel electrodes, respectively; and first, second and third data lines which cross the first, second and third gate lines and connected to the first, second and third pixel electrodes, respectively. Each of the first to third pixel electrodes includes at least two parallelogrammic electrode portions each with inclination directions different from each other, at least two data lines of the first to third data lines are overlapped by the first to third pixel electrodes, and the first to third gate lines are connected to each other. |
| US07894025B2 |
Patterned color filter substrate and LCD utilizing the same
An LCD including a color filter substrate, an array substrate, and a liquid crystal layer therebetween is provided. This color filter substrate has a plurality of color filters with overlap regions acting as a black matrix. Subsequently, patterned regions are defined in part of the overlap regions. After formation of a planarization layer and a conductive layer, spacers are formed in the patterned regions. The spacers may not shield the transparent region of the color filters, thereby enhancing the aperture ratio of the color filter substrate. Additionally, the thickness of the planarization layer in the patterned regions is not influenced by the overlap of the color filters, such that the spacers thereon have a uniform height. Furthermore, the at least one spacer of the color filter substrate and at least one data line of the array substrate are overlapped. |
| US07894024B2 |
Liquid crystal panel
The present invention relates to a liquid crystal display panel, including an array substrate and a color filter substrate bonded together. The color filter substrate is provided with primary photo spacers, and the top end of the primary photo spacers are provided at the sub-pixel of the array substrate, and one or more sub-pixels corresponds to one primary photo spacer, the primary photo spacers are grouped into at least two sets, the primary photo spacers in each set have a same prescribed location and a same top end shape. The primary photo spacers in the different set have different prescribed locations or different top end shapes. In the liquid crystal display panel of the invention, since the different primary photo spacers are provided at the different locations, therefore, if the alignment deviation occurs when the array substrate and the color filter substrate are bonded together, the alignment deviations of the primary photo spacers at the different prescribed locations will be compensated for each other, so as to ensure the uniformity of the cell thickness. |
| US07894023B2 |
Method of producing fine particles of anthraquinone structure-containing pigment, fine particles of anthraquinone structure-containing pigment produced thereby, colored pigment dispersion composition therewith, colored photosensitive resin composition therewith and photosensitive resin transfer material therewith, and color filter and liquid crystal display device using the same
A method of producing fine particles of an anthraquinone structure-containing pigment, including mixing a solution of an anthraquinone structure-containing pigment dissolved in a good solvent with a solvent that is compatible with the good solvent but is a poor solvent for the pigment, to form fine particles of nanometer-sized anthraquinone structure-containing pigments; fine particles of an anthraquinone structure-containing pigment produced by the same; a colored pigment dispersion composition, colored photosensitive resin composition and photosensitive resin transfer material each having the same; and a color filter and a liquid crystal display device using the same. |
| US07894016B2 |
Liquid crystal display
In a liquid crystal display, an opening is formed in a lateral surface of a bezel of an LCD unit, and the opening serves as an LED module insert slot. An LED of an LED module is arranged on a substrate so as to emit light toward a light guide plate provided on the backside of a liquid crystal panel. The LED module is inserted into the LED module insert slot and fixed to a back plate arranged on the backside of the LED unit by using a fixing member such as a screw. |
| US07894013B2 |
Liquid crystal display and manufacturing method thereof
A liquid crystal display includes a frame having a coupling groove, an optical sheet adjacent the frame, and a flexible printed circuit on a side of the optical sheet, wherein the flexible printed circuit is coupled to the frame at the coupling groove. A manufacturing method for a liquid crystal display includes providing a frame having a coupling groove, providing an optical sheet adjacent the frame, and providing a flexible printed circuit on a side of the optical sheet and coupling the flexible printed circuit to the frame at the coupling groove. |
| US07894012B2 |
Backlight device and liquid crystal display device using the same
A backlight device includes projections disposed on the back side of a light guide plate, and engagement holes engaging with the projections formed in a housing. The projections of the light guide plate are engaged with the engagement holes in the housing to prevent displacement of the light guide plate caused by vibration and impact. One surface of each projection is flush with a light incident surface, the area of that cross-section of each projection which is parallel or substantially parallel to the light incident surface is set such that it continuously decreases as the section is farther away from the light incident surface, and as a result, occurrence of a bright line and a dark line is prevented. |
| US07894011B2 |
Display panel having repair lines and signal lines disposed at different substrates
A liquid crystal display panel includes a repair line for substituting open-circuited signal lines. Signal lines are disposed over a first side of a first substrate of the liquid crystal display panel for data transmission. Repair lines are disposed over a first side of a second substrate of the liquid crystal display panel for substituting open-circuited signal lines. The first side of the first substrate faces the first side of the second substrate. A liquid crystal layer is disposed between the first and second substrates of the liquid crystal panel. |
| US07894006B2 |
Liquid crystal display with m x 1 inversion drive
A liquid crystal display (LCD) includes a substrate, gate lines, data lines, thin film transistors and pixel electrodes. The gate lines are formed on the substrate and cross the data lines. The thin film transistors are connected to the gate and data lines, and each thin film transistor includes a drain electrode. The pixel electrodes are connected to the thin film transistors and are arranged in a matrix, and each of the pixel electrodes has a first side disposed in parallel with the gate lines and a second side adjacent to the first side and shorter than the first side. In the LCD, the predetermined portion of each of the drain electrodes is overlapped with only one of two adjacent pixel electrodes if the polarities of the adjacent pixel electrodes are different, and the predetermined portion of each of the drain electrodes is overlapped with both of the adjacent pixel electrodes if the polarities are the same. |
| US07894005B2 |
Stereoscopic display device utilizing a liquid crystal parallax barrier
A parallax barrier liquid crystal panel for a stereoscopic display device, including a first substrate including an active region and a non-active region, a second substrate facing the first substrate, first, second, and third lines in the non-active region, at least one barrier electrode in the active region and connected to the first line, at least one pair of first and second transmission electrodes disposed adjacent to the barrier electrode and connected to the second and third lines, respectively, a common electrode on the second substrate, and a liquid crystal layer between the first and second substrates. |
| US07894003B2 |
Flat thin screen TV/monitor automotive roof mount
A vehicle roof mounted video display is disclosed. The display is rotatable 180° about a first axis, between a stored position within a housing and a second position in which the display lies flat against the vehicle roof. The display is also rotatable at least 60°, and preferably 90°, about a second axis that intersects and is substantially perpendicular to the first axis. Each axis includes self-tensioning hinges to hold the display in any position. The display self aligns as it reaches either of the first and second positions so that the display is substantially parallel to the roof. When the display is in the storage position, the display screen faces, and is safely enclosed by, the housing. The invention also includes a number of built-in features to provide passengers with a wide range of entertainment options. |
| US07894002B1 |
3:2 pulldown detection
Field-based detection of 3:2 pulldown in a sequence of digital video fields using a programmable graphics processor is described. The detection is performed using a threshold value to determine equivalence between a pair of fields of digital video data. Furthermore, additional threshold values may be used to control switching into a mode where duplicated fields of digital video data are identified and not displayed and out of the mode where duplicated fields of digital video data are identified and not displayed. Look ahead can be used to detect when to switch into or out of the mode where duplicated fields of digital video data are identified and not displayed, reducing the occurrence of visual artifacts. |
| US07894001B2 |
Hue adjusting system and method thereof
The present invention provides a hue control system for adjusting a hue of a specified color. The system includes a hue determining circuit and a hue adjusting circuit. The hue determining circuit receives a plurality of color signals of the specified color and a plurality of hue adjusting values each corresponding to one color. The hue determining circuit generates a target hue value according to the color signals and the hue adjusting values. The hue adjusting circuit is coupled to the hue determining circuit. The hue adjusting circuit receives the color signals and the target hue value, and adjusts the hue of the color signals according to the target hue value. |
| US07893999B2 |
Simultaneous video and sub-frame metadata capture system
A video processing system captures a sequence of original video frames with a video camera, presents at least one frame of the sequence of original video frames on a video display, receives user input regarding the sequence of original video frames, and presents a sub-frame on the video display that corresponds to a region in at least one frame of the sequence of original video frames that is identified in the user input. The video processing system also generates metadata corresponding to the sub-frame, the metadata to be used by a target video player in modifying the sequence of original video frames to produce a full screen presentation on a target video display of the target video player corresponding to the sub-frame. Targeted sub-frame metadata can be specifically generated for use with a particular screen or screen size. |
| US07893997B2 |
Method for generating video clock and associated target image frame
A method for generating a video clock and an associated target image frame is disclosed. The method generates an output clock signal for outputting a target image frame to a panel according to a frame pixel number and a vertical synchronization signal (Vsync). The target image frame corresponds to a source image frame. The frame pixel number is the number of total pixels included in a predetermined frame format, and the Vsync signal is an input Vsync signal or an output Vsync signal. The period of the output clock signal is the result of the period of the Vsync divided by the frame pixel number. In this manner, the format of the target image frame can remain substantially fixed, and is substantially equal to the predetermined frame format. |
| US07893996B2 |
Video switcher and video switching method
A video switcher includes: a video signal switching device for switching a video signal to be transmitted to a video display unit from a first video signal supplied from a first video input unit into a second video signal supplied from a second video input unit; and a synchronization signal switching device for switching a synchronization signal to be transmitted to the video display unit from a first synchronization signal supplied from the first video input unit into a second synchronization signal supplied from the second video input unit. The synchronization signal switching device starts transmission of the second synchronization signal to the video display unit after stops transmission of the first synchronization signal to the video display unit. The video signal switching device starts transmission of the second video signal to the video display unit, after stop of transmission of the first video signal to the video display unit and start of transmission of the second synchronization signal to the video display unit. |
| US07893993B2 |
Method for video deinterlacing and format conversion
A method for deinterlacing a picture is disclosed. The method generally includes the steps of (A) generating a plurality of primary scores by searching along a plurality of primary angles for an edge in the picture proximate a location interlaced with a field of the picture, (B) generating a plurality of neighbor scores by searching for the edge along a plurality of neighbor angles proximate a particular angle of the primary angles corresponding to a particular score of the primary scores having a best value and (C) identifying a best score from a group of scores consisting of the particular score and the neighbor scores to generate an interpolated sample at the location. |
| US07893992B2 |
Device comprising a camera module with automatic focusing and corresponding assembly method
Device comprising a camera module with automatic focusing itself comprising an optical chip (8) and an optical block (7), the optical block (7) integrating at least an objective (3), at least a focusing means (11) for adjusting the focus of the objective (3), the optical chip (8) integrating at least an image sensor (14) placed on a first face of a substrate of the optical chip (8). This optical chip (8) also includes a microprocessor (4) placed on the same substrate, receiving image signals originating from the image sensor (14) and generating a control signal based on the said image signals, that is applied to the said focusing means (11) to focus the objective (3). |
| US07893990B1 |
Digital video camera with retractable data connector and resident software application
A digital video camera may include a digital video image sensor for capturing digital video footage to be stored on an internal memory. The digital video image sensor and internal memory may be housed in a camera body. A retractable arm having a data connector may be attached to the camera body. The arm can be extended from and retracted into the camera body, while the data connector can be used to transfer digital video footage to an external device, such as a computer. The data connector may conform to a standard for connecting peripheral devices, such as the Universal Serial Bus (USB) standard or the Institute of Electrical and Electronics Engineers 1394 (IEEE 1394) standard. |
| US07893986B2 |
Multifunction lens
An image capture apparatus and a method of image processing. The apparatus includes an image sensor array which receives light that has been reflected by a scene, a luminance photodetector which receives light from a luminance channel, a multifunction lens, and a processor. The multifunction lens includes an imaging lens portion and the luminance channel. The imaging lens portion directs the light that has been reflected in a first direction onto the image sensor array. The luminance channel includes an optical element which directs the light from the luminance channel in a second direction different from the first direction onto the luminance photodetector. The image sensor array and the luminance photodetector each convert the light they receive to image data electrical signals and luminance data electrical signals, respectively. The processor processes the image data electrical signals to form an image of the scene using the luminance data electrical signals. |
| US07893985B1 |
Wide angle electronic camera with improved peripheral vision
The present inventions provide a system and method for a wide angle camera capable of high resolution peripheral vision. A wide angle lens system distorts the image and conveys it to an image sensor, which converts the image to an electronic signal and conveys it to image processing circuitry. The image processing circuitry corrects the distortion or transforms it to human recognizable image forms. In preferred embodiments, the distortion provides greater resolution of regions of interest and more efficient use of the area of the image sensor. |
| US07893984B2 |
Image capturing apparatus, method of controlling the same, and program
An image capturing apparatus includes an image capturing unit which causes an image sensor to photoelectrically convert an object image to generate an image signal, a display unit which displays the image signal generated by the image capturing unit, a storage unit which stores foreign substance information that is information about at least the position and size of a foreign substance sticking to the surface of an optical element arranged in front of the image sensor, and a control unit which controls the display unit to display the image signal while superimposing, on it, an image which represents presence of the foreign substance and is generated based on the foreign substance information stored in the storage unit during a live view operation of sequentially displaying, on the display unit, image signals sequentially generated by the image capturing unit. |
| US07893980B2 |
CMOS image sensor having directly output transfer gate signal
Disclosed herein is a Complementary Metal-Oxide-Silicon (CMOS) image sensor. The image sensor includes a two-dimensional pixel array composed of unit pixels, each unit pixel having a photo diode and transistors, a row decoder located at an end of the pixel array to assign row addresses, and a column decoder located at another end of the pixel array, which is erpendicular to the row decoder, to assign column addresses to corresponding pixels in rows selected by the row decoder. The row decoder allows the integration time points of the unit pixels, which are included in the pixel array, to be identical. Accordingly, the distortion of images can be prevented. |
| US07893974B2 |
Apparatus, method, and computer program for processing information
An information processing apparatus for correcting chromatic aberration of video data, includes a white saturation pixel detecting unit for detecting a white saturation pixel having white saturation using a G signal of the video data composed of an RGB signal, a spatial signal processing unit for performing a spatial signal process on the RGB signal across a plurality of lines, a color signal generating unit for generating a color signal from the RGB signal processed by the spatial signal processing unit, a white saturation distribution information generating unit for generating white saturation distribution information representing a distribution of the white saturation pixels detected by the white saturation pixel detecting unit, and a chromatic aberration correcting unit for correcting a chromatic aberration of the color signal generated by the color signal generating unit, using the white saturation distribution information generated by the white saturation distribution information generating unit. |
| US07893971B2 |
Light source estimation device that captures light source images when it is determined that the imaging device is not being used by the cameraman
An imaging device condition determination section determines whether a condition of an imaging device is suitable for obtaining light source information. When it is determined to be suitable, a light source image obtaining section obtains a light source image by the imaging device. A first imaging device information obtaining section obtains first imaging device information representing the condition of the imaging device at a point in time when the light source image is obtained. A second imaging device information obtaining section obtains second imaging device information representing the condition of the imaging device at a time of actual image capturing. A light source information estimating section estimates light source information at the time of image capturing by using the light source image and the first and second imaging device information. |
| US07893970B2 |
Information input apparatus that reproduces sound corresponding to a picture range
An electronic camera records pictures and sound associated with the picture images, and enables reproduction of selected picture images. When one of the picture images of a range of continuously-shot picture images is reproduced, the sound corresponding to the entire range of continuously-shot picture images is reproduced. |
| US07893968B2 |
Composite still-image creating device capable of creating a still image from moving images
Each of the frames forming moving images is decoded in sequence and while a candidate frame is decoded, a decision is made as to whether or not the motion vector variable-length decoded for each macroblock is greater than a threshold, so that if the motion vector is greater than the threshold, the decoded image of the corresponding block is decided as a partial image forming a subject portion that had motion in the candidate frame and then combined with a base image stored in a still memory in a combining unit, whereby, by repeating this process, a composite still image which allows the motion of the subject to be grasped visually is created in the still memory. |
| US07893966B2 |
Apparatus and method for controlling editing and use of image processing parameters in image processing
An information processing apparatus for editing an image processing parameter available in image processing by an image sensing apparatus. Creator information set by a creator of the image processing parameter, attached to the image processing parameter, is extracted. In accordance with the extracted creator information, editing processing to generate a new image processing parameter by editing the image processing parameter is limited. |
| US07893965B2 |
Optical lens image stabilization systems
The present invention provides optical systems, devices and methods which utilize one or more electroactive polymer actuators to stabilize the image produced by the device or system. |
| US07893963B2 |
Digital camera which estimates and corrects small camera rotations
A method of detecting and correcting camera rotation in a digital camera, that includes the steps of: capturing a digital image to provide a captured digital image; and analyzing the captured digital image to detect a set of lines. The set of lines are used to determine a rotation angle of the captured digital image; and the captured digital image is modified based on the rotation angle, before storing the modified digital image. |
| US07893960B1 |
Smart sensors for perimeter and border security
A border or perimeter is protected from intruders, such as illegal immigrants, terrorists with WMD or smugglers of drugs. The method comprises a detection and communication processing system capable of a high probability of detection and low probability of false positives. The system includes land-based sensor particles and sensitive airborne or land-based camera processing units. The sensors are sown over key border or perimeter landscape areas and are activated by specific pressure levels characteristic of the weight of transiting intruders whereby the sensors emit characteristic optical signals. Specific emitted indicators detect people, vehicles, or particular animals. |
| US07893956B2 |
Image pick-up module and method for assembly of an image pick-up module
The invention relates to an image pick-up module, in particular for an endoscope, comprising an electronic image sensor having a plurality of contact fingers that are arranged in two rows on opposite sides and each have a length, and a circuit board, to which the contact fingers are electrically contact-connected, the circuit board having at least three sections which are connected to one another in one piece and of which a first and a second section extend in a manner spaced apart from one another essentially transversely with respect to the image sensor and a third section extends essentially parallel to the image sensor, the image sensor being arranged at the end of the first and second sections which is remote from the third section, and at least one row of the contact fingers of the image sensor running along an outer side of the first or second section. The first section, the second section and the third section are connected to one another in an unarticulated manner, the length of the first section and/or of the second section is less than or equal to the length of the contact fingers and a space is present between the first, second and third sections of the circuit board, at least one electronic component for the control electronics of the image sensor being present in the said space. |
| US07893954B2 |
Mobile communication terminal and method of video communications thereof
A mobile communication terminal and method of video communications thereof are disclosed, by which a broadcast program currently received by the mobile communication terminal can be transmitted to a correspondent terminal by real time using the video communications. The present invention includes a transceiver unit connecting a video call, a broadcast receiving unit receiving a broadcast program, a codec decoding the received broadcast program, and a control unit controlling the decoded broadcast program to be transmitted using the video call. |
| US07893944B2 |
Gamut mapping and subpixel rendering systems and methods
In a first embodiment, a display system comprises a display panel with 4 or more colored subpixels. The display system receives input image data specified in a first color space and outputs image data specified in a second color space. The display system further comprises a gamut mapping module for mapping the input image data specified in the first color space to image data specified in the second color space. The gamut mapping module clamps out-of-gamut colors using at least a first clamping system and a second clamping system. The first and second clamping systems yield first and second clamped values. A weighting module produces a resulting clamped value from the first and second clamped values. A final output image value is derived from the resulting clamped value. Other embodiments of the display system include pre-reduction modules and adjustable GMA modules. |
| US07893941B2 |
Intelligent video graphics switcher
Methods and apparatus are provided for efficiently and intelligently communicating characteristic information in video graphics switcher environments. An intelligent video graphics switcher obtains display device characteristic information associated with multiple display devices and maintains updated characteristic information. When an event such as a connection/disconnection or switching event occurs between the video graphics switcher and a display device, the characteristic information is communicated to an appropriate host by triggering a connection/disconnection event with the host. |
| US07893935B1 |
Method and system for hybrid trackball and immersive navigation in a virtual environment
The present invention relates to a system, method, and computer program product for immersive navigation in a virtual environment (VE) suitable for allowing a user to change a view orientation in the VE independently of physical orientation of a user input, such as orientation of the user's head. Specifically, the present invention combines three distinct virtual reality navigation metaphors (trackball navigation, grab navigation, and immersive navigation) into a hybrid navigation approach generating a final virtual-viewpoint that correlates to the characteristics of an intermediate virtual-viewpoint defined by radius, pitch, and heading of a virtual reference sphere (as in trackball navigation), while the final virtual-viewpoint also adjusts the location and gaze direction of the intermediate virtual-viewpoint based on pitch, heading, and roll of the user's head (as in immersive navigation), thus allowing the user to view a point of interest in the VE while simultaneously facing comfortably forward in the physical world. |
| US07893932B2 |
Electronic circuit, electro-optical device, and electronic apparatus including the same
An electronic circuit, which has transistors disposed on a substrate, each transistor including an active layer made of thin-film polysilicon, includes a sensor that converts a measured quantity into a current value, a current-voltage conversion circuit that converts the current value into a voltage, and a voltage detection circuit that detects the voltage converted by the current-voltage conversion circuit and outputs a predetermined signal. The current-voltage conversion circuit includes a range-switching circuit that switches a current-voltage conversion range. |
| US07893931B2 |
Display device and shift register array for driving a pixel array
A shift register array includes a plurality of first shift registers, a second shift register, a first connection line, a second connection line, and a third connection line. A signal output terminal of each first shift register overlaps the first connection line and the third connection line without electric connection. The first connection line is connected to a signal input terminal of the second shift register. The second connection line is connected to a signal output terminal of the second shift register, and establishes a plurality of electric connection paths. When one of the first shift registers malfunctions, the corresponding connection points and overlapping points are cut or connected so that the malfunctioned first shift register can be replaced by the second shift register. |
| US07893924B2 |
Data input device
A data input device and method including an illuminator operative to illuminate at least one engagement plane by directing light along the at least one engagement plane, a two-dimensional imaging sensor viewing the at least one engagement plane from a location outside the at least one engagement plane for sensing light from the illuminator scattered by engagement of a data entry object with the at least one engagement plane and data entry processor receiving an output from the two-dimensional imaging sensor and providing a data entry input to utilization circuitry. |
| US07893920B2 |
Operation input device and method of operation input
A three-dimensional image sensor for detecting the three-dimensional position of an object, a coordinate detection unit for detecting the coordinate position of an objective point on a display screen based on the position of the object in a virtual pointing space, a movement detection unit for detecting the three-dimensional movement of the object in the pointing space, and an operation input contents determination unit for determining an operation based on the three-dimensional movement or the like of the object are provided, so that the inconvenience of moving a pointing device such as a finger to a fixed spatial plane is avoided by setting the pointing space which can be operated by the pointing device as a pyramid shape defined by connecting the display screen and a reference point. |
| US07893914B2 |
Liquid crystal display device including gate voltage output unit and method of driving the same
A display device includes nth and (n+1)th gate lines in a display panel, wherein a pixel electrode of a pixel corresponding to the (n+1)th gate line overlaps the nth gate line; and a gate driver including a gate voltage output unit that outputs an on-level gate voltage and first and second off-level gate voltages to the nth gate line, wherein the on-level gate voltage is outputted during a charging period of the nth gate line, and the second off-level gate voltage is outputted during a charging period of the (n+1)th gate line. |
| US07893909B2 |
TFT LCD device and driving method with a chopper amplifier that allows offset voltage polarity interlace within one frame
A thin film transistor (TFT) liquid crystal display panel driving device and a method thereof are provided. The TFT liquid crystal display panel driving device is characterized by including a modulation signal generator for providing at least one modulation signal to at least one output buffer of a source driver of the TFT liquid crystal display panel. The output buffer(s) has chopper function. Each output buffer changes the offset voltages of the pixels of a same frame under the control of different modulation signals, thus eliminating the effect of the offset voltages of the output buffer(s) on the display quality. |
| US07893907B2 |
Method and apparatus for driving liquid crystal display
An the driving method and apparatus including a liquid crystal display panel provided with a plurality of data lines; a brightness detector to detect a black brightness component and a white brightness component of data supplied to the plurality of data lines; a controller to compare magnitudes of a black brightness amount and a white brightness amount in the white and black brightness components detected by the brightness detector to generate a compared result and to control an application of a common voltage on a basis of a black brightness data level or a white brightness data level of data supplied to the plurality of data lines in accordance with the compared result; and a common voltage generator to generate a common voltage having an application level instructed by the controller and to supply the common voltage to the liquid crystal display panel. |
| US07893904B2 |
Displaying method and image display device
In a displaying method for use in an image display, an original gray scale is divided into a higher gray scale and a lower gray scale. Further, the color subpixels are divided into two groups corresponding to the higher and lower gray scales, respectively. The gray scale to be expressed by each subpixel is calibrated by weighing the original higher or lower gray scale for the pixel and the adjacent pixels and summing up the results. The color shift problem due to different visual angles can therefore be solved. |
| US07893901B2 |
Apparatus and method for driving a hold-type display panel
An apparatus and method for driving a hold-type display panel, for example an LCD (liquid crystal display) panel, includes gate lines and data lines intersecting to form a matrix of pixels. An image is displayed corresponding to data signals applied to the data lines according to gate pulses applied to the gate lines. A signal controlling unit generates a gate control signal for selecting the gate lines and image data to be displayed. The signal controlling unit also generates predetermined dummy data during a dummy data display interval set within a blank interval of a vertical synchronization signal. A gate driving unit applies the gate pulses to the gate lines selected according to the gate control signal. A data driving unit generating the data signal corresponding to the image data and applies the data signals to corresponding data lines. |
| US07893900B2 |
Liquid crystal display device and method of driving the same
A liquid crystal display device includes a liquid crystal panel, including multiple pixels, and a driving circuit. The pixels are driven according to a first driving pattern. The driving circuit monitors the liquid crystal panel for a cross-talk condition. The driving circuit generates a signal and changes the driving pattern to an alternate driving pattern when a cross-talk condition is detected in the liquid crystal panel. |
| US07893898B2 |
Voltage based data driving circuits and organic light emitting displays using the same
A data driving circuit for driving pixels of a display to display images with uniform brightness may include a gamma voltage unit that generates gray scale voltages, a digital-analog converter that selects, as a data signal, one of the gray scale voltages using first data, a decoder that generates second data using the first data, a latch for storing the first data and the second data, a current sink that receives a predetermined current from the pixel during a first partial period of a complete period for driving the pixel based on the selected gray scale voltage, a voltage controller that controls a voltage value of the data signal using the second data and a compensation voltage generated based on the predetermined current, and a switching unit that supplies the data signal to the pixel during any partial period of the complete period elapsing after the first partial period. |
| US07893897B2 |
Voltage based data driving circuits and driving methods of organic light emitting displays using the same
A data driving circuit for driving pixels of a light emitting display to display images with uniform brightness may include a gamma voltage unit that generates a plurality of gray scale voltages, a digital-analog converter that selects, as a data signal, one of the plurality of gray scale voltages using first data, a decoder that generates second data using the first data, a current sink, a voltage controller that controls a voltage value of the data signal using the second data and a compensation voltage generated based on the predetermined current, and a switching unit that supplies the data signal to the pixel during any partial period of the complete period elapsing after the first partial period. The current sink receives a predetermined current from the pixel during a first partial period of a complete period for driving the pixel based on the selected gray scale voltage. |
| US07893896B2 |
Light emitting display having decreased parasitic capacitance
A light emitting display including a plurality of scan lines; a plurality of data lines crossing the scan lines; a plurality of pixels defined by the scan lines and the data lines; and a light emitting device formed on a pixel and comprising a first electrode and a second electrode. A pixel connected to an nth data line includes a switching transistor that turns on in response to a selection signal supplied from a scan line; a storage capacitor to store a voltage corresponding to a data signal supplied from the nth data line when the switching transistor is turned on; and a driving transistor to supply a current corresponding to the voltage stored in the storage capacitor to the first electrode. The storage capacitor is formed between the first electrode and an (n+1)th data line. |
| US07893895B2 |
Pixel circuit, display device, driving method of pixel circuit, and driving method of display device
A pixel circuit, disposed at a part where a scanning line and a signal line intersect each other, includes at least an electrooptic element, a drive transistor, a sampling transistor, and a retaining capacitance. The drive transistor has a gate connected to an input node, a source connected to an output node, and a drain connected to a predetermined power supply potential and supplies a driving current to the electrooptic element according to a signal potential retained in the retaining capacitance. The electrooptic element has one terminal connected to the output node and another terminal connected to a predetermined potential. The sampling transistor is connected between the input node and the signal line and operates when selected by the scanning line, samples an input signal from the signal line, and retains the input signal in the retaining capacitance. The retaining capacitance is connected to the input node. The pixel circuit further includes a compensating circuit which detects a decrease in the driving current from a side of the output node and feeds back a result of detection to a side of the input node to compensate for a decrease in the driving current, which decrease is attendant on a secular change of the drive transistor. |
| US07893891B2 |
Data integrated circuit and apparatus for driving plasma display panel using the same
An integrated circuit (IC) device for controlling a plurality of electrodes in a plasma display device, and a plasma display device including one or more IC devices, are provided. The IC device includes a plurality of output parts coupled to the plurality of electrodes, first and second terminals coupled to end portions of the IC device, and at least one third terminal between the first and second terminals and to supply a predetermined voltage to the IC device. |
| US07893890B2 |
Electrically dimmable combiner optics for head-up display
Methods and systems for providing an electrically dimmable combiner optics for head-up displays are disclosed. In one embodiment, a dimmable head-up display includes a display portion configured to provide head-up display information to an operator. Additionally, a dimmable portion is coupled to the display portion configured to change a transmissivity of the display portion from a first transmissivity level to a second transmissivity level. |
| US07893887B2 |
Antenna for RFID device reader, and method of use
An antenna for use with an RFID device reader includes a metallic plate and multiple antenna elements attached to the metallic plate. The antenna elements may consist of two prongs each, with the prongs of each element arrayed in a diagonal configuration, and with the two prongs forming an X-shape. Each of the prongs may include a pair of L-shape prong parts that are coupled together by an electrical element connecting the corners of the L-shape prong parts. The distal ends of all of the prong parts of the antenna elements may together form a substantially square shape. Each of the antenna elements may be coupled to a single conductor, for connection to an RFID reader. The connection may be through a suitable standard coupling, such as a coaxial cable with a suitable connector. |
| US07893885B2 |
Antenna system for tracking mobile satellite and carrier having the same
Provided is a antenna system for tracking a mobile satellite and a movable carrier having the same for mechanically adjusting the orientation of an antenna at the azimuth angle and the elevation angle and correcting the phase error of a receiving signal while adjusting the elevation angle of the antenna at the same time. The antenna system for tracking a mobile satellite includes: a substrate; a rotating plate rotatably disposed on the substrate; one or more antennas disposed at the rotating plate; an azimuth angle adjusting unit for mechanically adjusting an azimuth angle of the antenna; and an elevation angle adjusting unit for mechanically adjusting an elevation angle of the antenna. |
| US07893884B2 |
Embedded door handle antenna apparatus comprising a magnetic core
An antenna apparatus of the present invention has an antenna having a core (2) around which an insulative covered conductor (3) is wound. The core has a magnetic core (1) and a wiring layer which are laminated on each other. The magnetic core (1) is made of flexible soft magnetic material. A wiring space is formed inside of the antenna apparatus. With this structure, the packing density is enhanced. |
| US07893883B2 |
Handheld electronic devices with isolated antennas
Handheld electronic devices are provided that contain wireless communications circuitry having at least first and second antennas. An antenna isolation element reduces signal interference between the antennas, so that the antennas may be used in close proximity to each other. A planar ground element may be used as a ground by the first and second antennas. The first antenna may be formed using a hybrid planar-inverted-F and slot arrangement in which a planar resonating element is located above a rectangular slot in the planar ground element. The second antenna may be formed from an L-shaped strip. The planar resonating element of the first antenna may have first and second arms. The first arm may resonate at a common frequency with the second antenna and may serve as the isolation element. The second arm may resonate at approximately the same frequency as the slot portion of the hybrid antenna. |
| US07893879B2 |
Antenna apparatus
An antenna apparatus includes: a circuit board that has a main surface and a rear surface opposite to each other; an antenna element that is formed of a metal plate and is arranged at a predetermined distance from the main surface of the circuit board; a plurality of legs that extend from the antenna element toward the circuit board; a ground conductor that is formed on the main surface or the rear surface of the circuit board; a feeding pin that supplies power from the circuit board to the antenna element; and a plurality of comb-shaped capacitor patterns that are formed on one of or both the main surface and the rear surface of the circuit board and are electrically connected between the plurality of legs and the ground conductor. |
| US07893877B2 |
Antenna for WWAN and integrated antenna for WWAN, GPS and WLAN
An integrated antenna for WWAN, GPS, and WLAN includes a ground metal plane, a WWAN antenna, and a WLAN antenna. The WWAN antenna is connected to the ground metal plane and includes first and second radiating metal strips which induce a first resonance mode and a second resonance mode respectively. The WLAN antenna is connected to the ground metal plane and includes third and fourth radiating metal strips which induce a third resonance mode and a fourth resonance mode respectively. The integrated antenna can be used in WWAN and WLAN at the same time. The ground metal plane of the integrated antenna does not need to connect to a ground end of a wireless electronic device, and is used for grounding. Therefore, the integrated antenna can be mounted on any part of a wireless electronic device, and can have stable electrical characteristics. |
| US07893875B1 |
Device for and method of geolocation
A device and method of geolocating a transmitter. First and second receivers, in motion, receive a signal from the transmitter. Digitizers in the receivers digitize the signal. Converters in the receivers for converting the digitized signals to complex-valued signals. Transmitters on the receivers transmit their digitized signals, locations, and velocities at the time the signal was received to a processor. A central processing unit on the processor determines a difference in radial velocities of the receivers relative to the transmitter. The difference in radial velocities and delay time between the signals received at the receivers are used to geolocate the transmitter. |
| US07893874B2 |
Global coordinate creation method for precision measurement of hollow frame
A method of creating a global coordinate of a polyhedral hollow frame includes a first step of providing a plurality of transmitters on a reference surface in the hollow frame, providing a plurality of reference sensors to create the coordinate of the reference surface, and creating a local coordinate frame of the reference surface on the basis of the positional coordinates measured by the reference sensors; a second step of providing reference sensors at common points of a first vertical surface neighboring to the reference surface to measure and store the coordinates of the common points; a third step of providing a plurality of transmitters and reference sensors on the first vertical surface neighboring to the reference surface to create a local coordinate frame of the first vertical surface; a fourth step of transforming the local coordinate frames created at the first and the third steps into a global coordinate frame using the coordinates of the common points measured at the second step; a fifth step of repeatedly performing the second step to the fourth step on remaining vertical surfaces of the polyhedral hollow frame to transform the respective local coordinate frames into a unified global coordinate frame; a sixth step of providing transmitters on an upper surface neighboring to each vertical surface to obtain the relationship between the global coordinate frame and a local coordinate frame of the upper surface using the coordinates of the common point; and a seventh step of creating and applying a global coordinate frame using the relationship obtained at the sixth step. |
| US07893872B2 |
Method and apparatus for performing blind signal separation in an OFDM MIMO system
A method and apparatus for performing blind signal separation in an orthogonal frequency division multiplexing (OFDM) multiple-input multiple-output (MIMO) system are disclosed. A transmitter generates a plurality of spatial streams of data and transmits the spatial streams via a plurality of transmit antennas. A receiver receives the transmitted spatial data streams with a plurality of receive antennas and generates a plurality of receive data streams. The receiver performs a discrete Fourier transform (DFT) on each of the receive data streams to generate a plurality of frequency domain data streams. The receiver then performs a blind signal separation on the frequency domain data streams to recover spatial streams transmitted by the transmitter. The blind signal separation may be performed by using an independent component analysis (ICA) in the complex domain. The blind signal separation may be performed individually for each OFDM subcarrier. |
| US07893871B1 |
Beamforming with partial channel knowledge
A method and system for beamforming with partial channel knowledge comprises beamforming one or more streams from a beamformer to one or more receive antennas of a beamformee whose channels are known to the beamformer. In response to the beamformer having a larger number of streams to transmit to the beamformee than a rank of a partial channel matrix between the beamformer and the beamformee, beamforming is used to steer remaining streams through a null space of the partial channel matrix. |
| US07893870B2 |
GPS device
A satellite positioning device comprising: a timing synchronisation circuit arranged to provide timing data for location estimation. The circuit being arranged to, in a first mode, provide the timing data in dependence on at least one received satellite positioning signal without the assistance of a location estimate and, in a second mode, provide the timing data in dependence on at least one received satellite positioning signal with the assistance of a location estimate, the timing synchronisation circuit being arranged to switch between the first and second modes of operation in dependence on whether the timing synchronisation circuit is providing the timing data. |
| US07893868B2 |
Radar device
A radar device is mounted on a vehicle, for detecting an object, and includes: a transmitting unit for transmitting an electromagnetic wave as a transmitter signal; a receiving unit for receiving a reflected signal that is reflected from the object as a receiver signal; a signal processing unit for measuring a distance and a relative velocity between the vehicle and the object on the basis of a beat signal that is obtained by the transmitter signal and the receiver signal; and an interference detecting unit for detecting the interference signal from another radar device or a communication device on the basis of a signal intensity of the frequency range that is not used for measuring the distance to the object and the relative velocity of the object. |
| US07893867B2 |
Communications radar system
A system for a mobile ad-hoc communications network includes a single antenna aperture and a phased array antenna comprising a plurality of radiators communicating electromagnetically via the single antenna aperture. The system may also include a control circuit communicatively connected to the phased array antenna. The control circuit may include a communications module for transmitting and receiving communication data via the phased array antenna through the single antenna aperture and a radar module for transmitting and receiving radar signals via the phased array antenna through the single antenna aperture. |
| US07893865B2 |
Vehicular lamp
A vehicular lamp includes a lamp chamber formed by a lamp body opening forward and a transparent front cover attached to a forward opening portion thereof; a lamp unit disposed within the lamp chamber; a millimeter wave radar for sending a millimeter wave to reflect off of an object in order to detect a distance and a relative speed of the object; and a millimeter wave direction-changing mechanism for sending forward the millimeter wave sent by the millimeter wave radar from a back surface side of the lamp unit, without reflecting the millimeter wave on a rearward side of the lamp unit. |
| US07893862B2 |
Method and apparatus for using collimated and linearly polarized millimeter wave beams at Brewster's angle of incidence in ground penetrating radar to detect objects located in the ground
A detection system comprises a transmitter unit, a receiver, and a processor. The transmitter unit is capable of transmitting a first collimated beam having a first frequency and a second collimated beam having a second frequency into a ground, wherein the first collimated beam and the second collimated beam overlap in the ground. The receiver is capable of monitoring for a response radio frequency signal having a frequency equal to a difference between the first frequency and the second frequency. The response radio frequency signal is generated by an object having non-linear conductive characteristics in response to receiving the first collimated beam and the second collimated beam. The processor is capable of controlling an operation of the transmitter unit and the receiver. The processor is connected to the transmitter unit and the receiver. The object is detected when the response radio frequency signal is detected by the receiver. |
| US07893860B2 |
Successive approximation register analog-digital converter and method of driving the same
A successive approximation register (SAR) analog-digital converter (ADC) and a method of driving the same are provided. The SAR ADC includes a first converting unit including a bit capacitor array corresponding to the number of bits and a correction capacitor array, a comparator outputting a high or low voltage corresponding to each capacitor according to an output voltage of the converting unit, and a correction unit correcting the output of the bit capacitor according to the output of the correction capacitor array among the high or low output of the comparator. Therefore, two bits having the same capacitance as a least significant bit (LSB) enable a digital output error to be corrected, so that a spurious free dynamic range (SFDR) of the signal converter is increased, and a signal to noise and distortion ratio (SNDR) of an output signal is improved. |
| US07893858B2 |
EDC architecture
A method and apparatus for performing pipelined capacitive folding and interpolation analog-to-digital conversion. In one embodiment, the apparatus comprises a multistage pipelined analog-to-digital converter having: a distributed sample/hold and preamp, folding and interpolation unit which combines a plurality of preamplified signals using a capacitive folding and capacitive interpolation; and a decoding unit coupled to decode the output signals from the folding and interpolation unit. The distributed sample/hold and preamp drastically improves the input dynamic range and hence increases ADC over all linearity. This technique offers an inherent dynamic offset cancellation in every sample and can be implemented in submicron CMOS, using the core digital supply. |
| US07893857B2 |
Analog to digital converter using successive approximation
Disclosed is a flash analog to digital converter (ADC) capable of reducing area requirements and using successive approximation. The ADC includes a reference voltage generating unit receiving an external voltage and outputting M reference voltages. A reference voltage selecting unit outputs N reference voltages less than the number of the voltages outputted by the reference voltage generating unit according to a supplied control signal. A digital signal output unit compares the N reference voltages outputted by the reference voltage selecting unit with an external analog input signal and outputs the comparison result as an N-bit digital signal. |
| US07893855B2 |
Delta-sigma analog-to-digital converter
An exemplary continuous-time delta-sigma analog-to-digital converter includes a loop filter, a quantizer, a dynamic element matching circuit, a latch, and a digital-to-analog converter (DAC). The loop filter contains a plurality of integrators coupled in series, including a first integrator and a second integrator; a first positive feedback resistive element, placed in a first positive feedback path between a first output node of the second integrator and a first input node of the first integrator; and a first negative feedback resistive element, placed in a first negative feedback path between a second output node of the second integrator and a second input node of the first integrator. The quantizer is implemented using a domino quantizer. The DAC contains a plurality of DAC units each having a capacitive device, a resistive device, and a switch device coupled between the capacitive device and the resistive device. |
| US07893852B2 |
Enhanced time-interleaved A/D conversion using compression
Compression of signal samples output from a parallel, time-interleaved analog to digital converter (TIADC) for a baseband signal, includes calculating first or higher order differences of consecutive signal samples followed by lossless or lossy encoding of the difference samples to produce compressed samples. Compression of a TIADC output signal with a nonzero center frequency, includes calculating sums or differences of pairs of signal samples separated by an appropriate number of sampling intervals followed by lossless or lossy encoding. The sums or differences of the signal samples have lower magnitudes than the original samples, allowing more efficient compression. Lossy compression alternatives produce compressed data with a fixed bit rate or with a fixed quality in the decompressed samples. Alternatives for lossy compression include attenuating the analog signal before sampling by the TIADC, applying bit shifters or multipliers after sampling to reduce the magnitudes of the signal samples, and lossy encoding. |
| US07893849B2 |
Apparatus and method for providing travel information
An apparatus and method for providing travel information, including a database for storing information regarding a travel area, wherein the information includes at least one of road information, street information, intersection information, and traffic control device information, a processor for processing a request for information regarding an optimal travel route from a present location of a vehicle to a destination, wherein the processor processes the request by utilizing the information stored in the database, and further wherein the processor identifies at least two possible travel routes to the destination, and further wherein the processor identifies an optimal travel route to the destination, wherein the processor generates a message containing travel directions or instructions corresponding to the optimal travel route, and an output device for outputting the information contained in the message. |
| US07893848B2 |
Apparatus and method for locating, identifying and tracking vehicles in a parking area
A method for use in the management of vehicle parking in a vehicle parking area having a plurality of vehicle parking spaces, the method comprising determining the locations of vacant vehicle parking spaces; and displaying the locations of vacant vehicle parking spaces to people seeking to park vehicles. |
| US07893845B2 |
Socket and plug connector for electronic device
The present invention relates to a socket for connecting a plug to an electronic device, comprising a sensor device, wherein the socket is adapted to be arranged in an electronic device and to be connected to a plug, the sensor device is adapted to detect a plug when it is arranged at the socket and adapted to emit a signal when it detects a plug. The present invention further relates to a plug for connecting a socket to an electronic device and to a system comprising a plug and a socket. |
| US07893839B2 |
Deactivatable RFID labels and tags and methods of making same
Disclosed are deactivatable RFID labels and tags in individual and web form, and methods of making same. When it is desired to deactivate the label or tag, the tag or label is subjected to tearing. One arrangement involves providing the label or tag with a tear strip by which the RFID transponder in the label or tag is destroyed, and in another arrangement a tag can be torn along a weakening line to destroy the RFID transponder. |
| US07893834B2 |
Power control method for mobile RFID reader and RFID reader using the same
Provided is a power control method for a mobile Radio Frequency Identification (RFID) reader and an RFID reader using the same. The RFID reader includes: an RFID reader transmission/reception control unit for creating a message to be transmitted to an RFID tag and transmitting RFID tag information to a terminal control unit; a reader transmitting unit for encoding and modulating the created message; a power amplifier for amplifying an output signal; a reader receiving unit for demodulating and decoding the signal and transmitting the signal to the RFID reader transmission/reception control unit; and an RFID reader power control unit for controlling power, wherein when the RFID reader transmission/reception control unit receives a command for acquiring the RFID tag information, the RFID reader power control unit applies power to the power amplifier. |
| US07893830B2 |
System and method of dynamically weighted analysis for intrusion decision-making
An intrusion detection mechanism is provided for flexible, automatic, thorough, and consistent security checking and vulnerability resolution in a heterogeneous environment. The mechanism may provide a predefined number of default intrusion analysis approaches, such as signature-based, anomaly-based, scan-based, and danger theory. The intrusion detection mechanism also allows a limitless number of intrusion analysis approaches to be added on the fly. Using an intrusion detection skin, the mechanism allows various weights to be assigned to specific intrusion analysis approaches. The mechanism may adjust these weights dynamically. The score ration can be tailored to determine if an intrusion occurred and adjusted dynamically. Also, multiple security policies for any type of computing element may be enforced. |
| US07893828B2 |
Bi-directional hand-shaking sensor system
A low cost, robust, wireless sensor that provides an extended period of operability without maintenance is described. The wireless sensors are configured to communicate with a base unit or repeater. When the sensor unit detects an anomalous ambient condition (e.g., smoke, fire, water, etc.) the sensor communicates with the base unit and provides data regarding the anomalous condition. The sensor unit receives instructions to change operating parameters and/or control external devices. |
| US07893826B2 |
Alarm system
The present invention relates to an alarm system intended to trigger an alarm signal upon deviation from at least one environment-dependent reference predetermined for a specific environment. The alarm system comprises at least one portable unit intended to be placed in said environment, which unit has a size corresponding to a mobile telephone. Each unit comprises a sensor system adapted for detecting different states comprising at least vibrations. Furthermore, the alarm system comprises a processor member connected to the sensor system and adapted for the comparison of signals received from the sensor system and said predetermined environment-dependent reference/references. The alarm system further comprises a communication member connected to the processor member and adapted for wireless communication upon, for instance, the triggering of an alarm signal. Furthermore, the alarm system comprises a memory member connected to the processor member via a distributed computer network and adapted for the storage of said predetermined reference/references. |
| US07893820B2 |
Method of transmitting an electromagnetic identification request signal to an electronic housing mounted on a wheel of a vehicle
Method of transmitting an electromagnetic identification request signal, generated by an antenna (11-14) connected to a central unit (15) mounted on a vehicle (1), to an electronic housing (6-9) mounted on a wheel (2-5) of the vehicle. This transmission method includes successively transmitting, after starting of the vehicle (1), a plurality of identical identification request signals (S1 . . . , Si, Si+1, . . . ), and wherein, after each transmission at an instant Ti of a signal Si, the speed of travel V of the vehicle (1) is measured, the time Tr of a complete rotation of the wheel (2-5) is calculated for the speed V, and the following signal Si+1 is triggered at an instant Ti+1 such that: Ti+1=Ti+nTr+Tθ with n integer ≧1 and 0 |
| US07893819B2 |
Method and device for avoiding a collision in a lane change maneuver of a vehicle
Disclosed is a method for avoiding a collision in a lane change maneuver of a vehicle to a target lane, where objects in a lateral rearward space of the vehicle are detected by an ambience monitoring device and measures are taken to influence the vehicle. The method is characterized in that graded measures are provided that depending on their stage, involve warning the driver and/or intervening into a steering system of the vehicle and/or influencing safety devices. The measures of a selected stage are initiated, with the stage being determined depending on a relative position of a detected object with regard to the vehicle and/or a relative speed between the vehicle and the detected object as well as depending on the fulfillment of a lane change condition. Also disclosed is a device that is well suited to implement the method. |
| US07893816B1 |
High sensitivity radio frequency identification tag
Systems and techniques for identification of items using radiofrequency identification (RFID) tags exhibiting a high sensitivity to signals such as signals emitted by an RFID reader. An RFID tag includes an amplification circuit operative to detect and amplify a signal received from an RFID reader, in order to allow for processing of and response to the signal. The amplification circuit may be powered by a battery, suitably a flexible printable battery. Alternative or additional power sources may be used, such as a solar cell or a magnetic coupling, and depending on the design and operation of the tag, these power sources may be used instead of the battery or to recharge the battery if required. |
| US07893810B2 |
Strain measuring device
A strain measuring device according to the present invention includes a bridged circuit comprising a p-type impurity diffused resistor as a strain detective portion and a bridged circuit comprising an n-type impurity diffused resistor as a strain detective portion in a semiconductor single crystalline substrate, and sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, it is preferable that the impurity diffused resistor be configured to be a meander shape comprising strip lines and connecting portions. Moreover, it is preferable that the number of strip lines in the p-type impurity diffused resistor be smaller than that in the n-type impurity diffused resistor. |
| US07893808B2 |
Conductor assembly having an axial field in combination with high quality main transverse field
A conductor assembly of the type which, when conducting current, generates a magnetic field or in which, in the presence of a changing magnetic field, a voltage is induced. In one series of embodiments a plurality of coil rows comprise conductor in a helical wiring pattern formed about an axis. One of the coil rows is positioned a radial distance R from the axis. For each of the coil rows the helical pattern comprises conductor loops each exhibiting a tilt in the same direction with respect to a plane transverse to the axis, the assembly capable of generating an axial field component and a transverse field component. |
| US07893807B2 |
Magnetic element
A magnetic element including a first core and a second core each of which has a winding core provided with a flange portion having a flange surface at least at one end thereof; and an intermediate core to form a closed magnetic circuit which is disposed between said first core and said second core in a manner being integrally connected with said first core and said second core. |
| US07893806B1 |
Method for making magnetic components with N-phase coupling, and related inductor structures
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core. |
| US07893805B2 |
Transformer
A transformer includes a main body and a secondary winding. The main body has a primary winding partition, several secondary winding partitions and two end portions. Several leads are disposed in either end portion. A wire-guiding area is formed in a sunken area in the primary winding partition and a buffer region is formed between the primary end portion and the primary winding partition. The secondary winding is wound around the core on the secondary winding partitions. One end of the wire runs from the secondary winding partitions to the wire-guiding area. Before the secondary wire goes into the buffer region, the secondary wire is folded for several times and then is twisted and rolled for several turns to make the secondary wire thicker. Then the secondary wire goes into the buffer region and then is connected to one of the primary leads. Due to the wire-guiding area and buffer region, the secondary wire would not be affected or pressed against by the primary wire. |
| US07893796B2 |
High frequency device, power supply device and communication apparatus
A high frequency device including an electrostatic type vibrator, a pad, and a circuit. The electrostatic type vibrator is operable via a DC bias voltage. The pad is configured to supply the DC bias voltage. The circuit is positioned electrically between the pad and the vibrator. The circuit is configured to stabilize the DC bias voltage. The circuit and the high frequency signal device are on a common substrate. |
| US07893795B2 |
Circuit device having inductor and capacitor in parallel connection
A circuit device having an inductor and a capacitor in parallel connection includes a planar inductor embedded in an insulating material layer, wherein the planar inductor has a winding wire portion, a first connection terminal and a second connection terminal. The first connection terminal and the second connection terminal are located at different elevations and have an overlapping region. A capacitor dielectric layer is located within the overlapping region between the first connection terminal and the second connection terminal, and the capacitor dielectric layer and the first connection terminal and the second connection terminal together form a capacitor. |
| US07893792B2 |
Duplexer using an embedded PCB and method of fabricating the same
A high-integrated duplexer and a fabrication method thereof. The duplexer has a first filter to pass a signal of a transmitted frequency band, a second filter to pass a signal of a received frequency band, an embedded PCB having the first and second filters bonded on a certain area of a surface of an upper side in a predetermined distance from each other, and an isolation part to prevent a signal interference between the first and second filters, and a packaging substrate to package the entire upper side of the embedded PCB so that the packaging substrate is located above and separated from the first and second filters by a predetermined distance. The fabricated high-integrated duplexer has a small size and high performance. |
| US07893791B2 |
Gallium nitride switch methodology
Devices and systems for using a Gallium Nitride-based (GaN-based) transistor for selectively switching signals are provided. A first transmission line is configured to connect a common connection and a first connection. A first Gallium-Nitride-based (GaN-based) transistor has a first terminal coupled to the first transmission line at a first point, a second terminal coupled to a relative ground, and a third terminal configured to be coupled to a first control connection. A second GaN-based transistor has a first terminal coupled to the first transmission line at a second point, a second terminal configured to be coupled to the relative ground, and a third terminal configured to be coupled to the first control connection. |
| US07893790B2 |
Electronic device and method of matching the impedance thereof
An electronic device includes a first and a second micro-electromechanical switch assembly on a substrate, between which first and second switch assembly a first line having a first impedance and a second line having a second impedance are present. The first switch assembly includes an input terminal and a first and a second output terminal connected to the first and the second line, respectively. The second switch assembly includes an output terminal and a first and second input terminal connected to the first and second line, respectively. |
| US07893786B2 |
Parallel-structured switched variable inductor circuit
An inductor circuit includes a pair of inductors connected in parallel with each other and a switch for turning on and off electric power to one of the pair of inductors. The inductance of the inductor circuit can be varied and the quality factor Q can be improved. Further, RF circuits employing the inductor circuit can generate an intended operating frequency. |
| US07893781B2 |
Low-voltage MEMS oscillator
An electronic device for generating an electric oscillating signal is described based on a micro-electromechanical system (MEMS). The electronic device typically comprises a substrate a moveable element which is moveable with respect to the substrate and an actuating means and a sensor. The actuating means is used to induce vibration of the moveable element and comprises two inductive elements, a first one provided fixed to the substrate and a second one provided fixed to the moveable element. The induced vibration of the moveable element is sensed using the sensor and converted into an electric oscillating signal. |
| US07893780B2 |
Reversible alkali beam cell
One embodiment of the invention includes an alkali beam cell system that comprises a reversible alkali beam cell. The reversible alkali beam cell includes a first chamber configured as a reservoir chamber that is configured to evaporate an alkali metal during a first time period and as a detection chamber that is configured to collect the evaporated alkali metal during a second time period. The reversible alkali beam cell also includes a second chamber configured as the detection chamber during the first time period and as the reservoir chamber during the second time period. The reversible alkali beam cell further includes an aperture interconnecting the first and second chambers and through which the alkali metal is allowed to diffuse. |
| US07893778B2 |
Flexible low current oscillator for multiphase operations
An oscillator includes a reference stage and multiple phase stages. The reference stage has a reference transistor having a gate coupled to a voltage reference and a drain coupled to a reference current source. Each phase stage includes a transistor, two current sources, a capacitor, switch, inverter, and latch. The transistor has a drain coupled to a first current source, a gate coupled to a node and a source coupled to the reference transistor's source. The capacitor and switch couple between the node and ground. The second current source couples to the node. The transistor's drain couples to the inverter's input. The inverter's output couples to the latch's set input. The latch's output couples to the switch. The inverter output also couples to the reset input of a subsequent phase stage's latch. The inverter output for a last stage couples to the reset input of a first stage latch. |
| US07893777B2 |
Voltage controlled oscillation circuit
In a voltage controlled oscillation circuit including a cascade connection of a voltage-to-current conversion circuit (310) for generating an input voltage converted current which is a current corresponding to an input voltage and a current controlled oscillation circuit (120) of which an oscillation frequency varies according to the input voltage converted current, the voltage-to-current conversion circuit (310) includes a first current source for outputting a current in proportion to the input voltage and a plurality of second current sources for outputting a current in proportion to a voltage obtained by shifting the input voltage. Then, a current obtained by adding a current output from the first current source and currents output from the plurality of current sources is output as the input voltage converted current to the current controlled oscillation circuit (120). |
| US07893776B1 |
Monitoring and compensating for real time local circuit speed in an integrated circuit
A speed monitor circuit integrated in an integrated circuit (IC) determines the speed of the IC. The speed monitor circuit includes an oscillator that generates an oscillator signal. A speed determining circuit generates a first count based on transitions of the oscillator signal. A match signal corresponds to the speed of the oscillator based on the first count and a reference count. |
| US07893774B2 |
VCO driving circuit and frequency synthesizer
A VCO driving circuit and a frequency synthesizer wherein the impedance viewed from a VCO control terminal is reduced to prevent the VCO phase noise characteristic from degrading. A VCO driving circuit and a frequency synthesizer having the VCO driving circuit, which comprises a coarse adjustment DAC that receives a digital data, which has a coarse adjustment frequency, to output an analog signal; a fine adjustment DAC that receives a digital data, which has a fine adjustment frequency, to output an analog signal; a low response speed LPF5 that removes noise from the output signal from the coarse adjustment DAC and then provides the resultant signal as an input to a VCO control terminal; a high response speed LPF7 that converts the output signal from the fine adjustment DAC to a voltage, thereby smoothing the signal; a resistor that connects an input stage of the LPF5 to that of the LPF7; and a capacitor used for providing a capacitive coupling such that the output of the LPF7 is added to that of the LPF5. |
| US07893771B2 |
Wideband linearization and adaptive power management for microwave power amplifiers
A power amplifier includes a bipolar transistor and a self-adaptive bias network situated between an RF input and the base of the bipolar transistor. The self-adaptive bias network suppresses the low frequency even-order intermodulation components. The self-adaptive bias network stabilizes a DC bias voltage to provide a substantially constant base-emitter voltage and provides an increased DC base current with increased input power when the power amplifier is operating within the nonlinear region. |
| US07893767B2 |
Operational amplifier and integrating circuit
An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected between the output of the differential amplifier circuit and the output of the output circuit to compensate the phase of the signal output from the output circuit, and a diode connected in parallel with the phase compensation capacitance. |
| US07893766B1 |
Adaptive common mode bias for differential amplifier input circuits
A method and apparatus for extending the common mode range of a differential amplifier. A circuit has a common mode detection circuit, a common mode voltage inversion circuit, and a differential amplifier. The common mode detection circuit receives a differential signal and detects a common mode voltage. The common mode voltage inversion circuit is coupled to the common mode detection circuit. The common mode voltage inversion circuit has an input node that receives the common mode voltage and an output node that outputs body voltage, wherein the common mode voltage inversion circuit creates an inverse relationship between the common mode voltage and the body voltage. The differential amplifier includes a differential pair of transistors that have a pair of body terminals coupled to the output node of the common mode voltage inversion circuit. |
| US07893764B2 |
Power amplifier and common mode choke coil apparatus
Common mode choke coil device includes four coils wound on a core in a same direction. Hot-side outputs of first and second class-D amplifiers are connected to respective ones of first ends of two of the four coils, and first and second hot-side output terminals are connected to respective ones of second ends of the two coils. Ground-side outputs of the first and second class-D amplifiers are connected to respective ones of the first ends of remaining two of the four coils, and first and second ground-side output terminals are connected to respective ones of the second ends of the remaining two coils. Single-end connection is realized by connecting a separate load to each of the class-D amplifiers via the corresponding first (or second) hot-side and ground-side output terminals. BTL connection is realized by connecting a single load to the class-D amplifiers via the first and second hot-side output terminals. |
| US07893763B2 |
Apparatus and method for power added efficiency optimization of high amplification applications
A power added efficiency optimizer apparatus is provided for measuring and monitoring input and output power of an amplifying device, and adjusting the load impedance seen by the amplifying device so that power added efficiency is maintained at optimum levels. A power added efficiency optimizing device includes a variable load impedance that can be controlled, at least one power detection device located after the load, a difference forming apparatus, and at least one coupling device. The power added efficiency optimizing device provides an ability to maintain an amplifier at peak efficiency in a dynamic way and in the presence of changing electromagnetic load conditions. |
| US07893762B2 |
Efficient composite amplifier
A detuned composite amplifier includes a nonlinear drive function (22) that has a phase that varies with the composite amplifier output voltage amplitude. The nonlinear drive function (22) is configured to transform the output voltage transition point of the prior art into an extended output voltage transition region to increase the efficiency of the composite amplifier. |
| US07893761B2 |
Monotonic and voltage supply independent automatic gain control amplifier
A method and circuit are provided wherein the magnitude of an RF signal provided by RF circuit is used to derive a control set point of the RF circuit via an intermediate controller circuit. This controller circuit having the specific function of providing the actual voltage applied to the control point of the RF circuit, via the use of a charge pump, regulator or combination thereof. In this manner the controller limits the maximum applicable voltage set by the limiting characteristics of the charge pump, voltage regulator, or combination thereof. Such limiting characteristics allow the control of the RF circuit to be stabilized against a variety of external factors such as ambient temperature, battery voltage, circuit aging, amongst other factors in a manner exploiting a minimum of additional electronics thereby providing for such performance enhancements with minimum additional die footprint and power consumption. |
| US07893760B2 |
Amplifier circuit
An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor. |
| US07893757B2 |
Multi-chip package semiconductor device
An efficient logic chip operating power supply having digital circuits in a multi-chip package is provided. A multi-chip package semiconductor device fabricated in common with a driver chip having analog circuits and a logic chip having digital circuits, a logic chip power supply circuit is provided in which a driver chip creates a logic chip power supply dedicated for the logic chip. The logic chip has internal logic circuitry operating by receiving a power supply from the logic chip power supply circuit via power input terminals. |
| US07893750B2 |
Electrical component having configurable characteristics that are non-volatile
A component with a functionally-configurable circuit arrangement, has a first switch group with a voltage-dependent switching on or off of a data line and at least one second switch group generating two discrete output voltages separated by an increase in voltage and the switch states for the discrete output voltages may be stored in non-volatile memory. The switching on or off of the data line is determined by the switch state of the first switch group and a third switch group (11) is provided to increase the voltage increase between the first switch group (17) and the second switch group (3). |
| US07893747B2 |
Control signal generation circuit
A control signal generation circuit includes a pulse signal generator configured to delay a column control signal by delay times different from each other and to generate first and second pulse signals, a reset signal generator configured to transfer alternatively the first and second pulse signals as a reset signal in response to a write/read flag signal, and a write-enable signal generator configured to generate a write-enable signal from the first pulse signal in response to the write/read flag signal. |
| US07893746B1 |
High speed intra-pair de-skew circuit
For differential signal transmission (especially in high speed applications), intra-pair skew between paths carrying complementary portions of a differential signal can significantly affect performance. Conventional de-skew circuits employ simple filters (i.e., low-pass filters) to operate as delay elements to account for skew; however, these filters can distort the differential signal, which can also adverse affect performance. Here, an all-pass, adjustable delay element and de-skew circuit are provided to allow for compensation of skew without degrading the differential signal as conventional circuit do and, thus, having better performance characteristics. |
| US07893739B1 |
Techniques for providing multiple delay paths in a delay circuit
A feedback loop circuit includes a phase detector and delay circuits. The phase detector generates an output signal based on a delayed periodic signal. The delay circuits are coupled in a delay chain that delays the delayed periodic signal. Each of the delay circuits includes variable delay blocks and fixed delay blocks that are coupled to form at least two delay paths for an input signal through the delay circuit to generate a delayed output signal. Delays of the variable delay blocks in the delay circuits vary based on the output signal of the phase detector. Each of the delay circuits reroutes the input signal through a different one of the delay paths to generate the delayed output signal based on the output signal of the phase detector during operation of the feedback loop circuit. |
| US07893734B2 |
Power-on reset circuit
An integrated circuit provides a power on reset signal with respect to a supply voltage level supplying the electronic device. The integrated circuit comprises a bias current generating stage having a first current mirror and an output stage having first, second and third series connected MOS transistors. A connection between the second MOS transistor and the third MOS transistor forms a POR output node. A gate of the second MOS transistor and a gate of the third MOS transistor are coupled to each other and to the first current mirror. This allows a current through the third MOS transistor when the supply voltage is higher than a first MOS transistor threshold and a current through the second MOS transistor only when the supply voltage is greater than or equal to the sum of the first MOS transistor threshold and a second MOS transistor threshold voltage. |
| US07893727B2 |
Semiconductor integrated circuit device
For a semiconductor integrated circuit device such as AFE including a CDS amplifier, in case of excessive signal input to the CDS amplifier, a technique capable of preventing the response characteristic of the CDS amplifier from deteriorating is provided. In the AFE including the CDS amplifier, the CDS amplifier is prevented from becoming saturated by detecting an excessive signal input and triggering the reset of the CDS amplifier. Thereby, no abnormality occurs in the transient response of the CDS amplifier. Specifically, comparison of input signals to the CDS amplifier is performed by a comparator and the CDS amplifier is reset by a reset circuit (by fixing the input terminals of the CDS amplifier to a constant voltage) in case of excessive signal input, so that the CDS amplifier will not amplify excessive signal inputs. |
| US07893726B1 |
Leakage compensation and improved setup/hold time in a dynamic flip-flop
A dynamic flip-flop includes first and second input stages forming a differential input stage adapted to receive differential data. The flip-flop is reset in response to a reset signal. To ensure proper operation, a transistor disposed between the first and second input stages is always maintained active to provide a conduction path between the ground terminal and the nodes that may be charged from the supply voltage. To improve the setup and hold time of the flip-flop, the clock signal is applied to a first transistor disposed in the first input stage and a second transistor disposed in the second input stage. |
| US07893715B2 |
Arrangement and method for signal transmission between different voltage domains
An arrangement and method for signal transmission between different voltage domains is disclosed. One embodiment provides a first signal processing unit receiving a first supply voltage. A second signal processing unit receives a second supply voltage, the first supply voltage and the second supply voltage overlap each other in a first overlap range. A third signal processing unit receives a third supply voltage, the second supply voltage and the third supply voltage overlap each other in a second voltage overlap range. A first information signal from the first signal processing unit is transmitted to the second signal processing unit. A second information signal dependent on the first information signal from the second signal processing is transmitted to the third signal processing unit. |
| US07893701B2 |
Method and apparatus for enhanced probe card architecture
A technique for distributing power to a plurality of dies uses a probe card. The probe card can include a plurality of regulators, each regulator accepting a bulk power input and producing a regulated output. The regulated output can be controlled by a programmable controller that accepts a tester-controlled power input and adjusts the regulated outputs as a function of the tester-controlled power input. |
| US07893695B2 |
Apparatus, method, and computer program for obtaining a time-domain-reflection response-information
An apparatus for obtaining a time-domain-reflection response-information has a signal driver adapted to apply two pulses of different pulse lengths to a TDR port in order to excite a first TDR response signal corresponding to a first pulse and a second TDR response signal corresponding to a second pulse. The apparatus has a timing determinator adapted to provide a timing information on the basis of a first instance in time when the first TDR response signal crosses a threshold value and on the basis of a second instance in time when the second TDR response signal crosses the threshold value. The apparatus has a TDR response information calculator adapted to calculate an information about a TDR response on the basis of the timing information. |
| US07893692B2 |
Method for estimating the formation productivity from nuclear magnetic resonance measurements
A method for estimating fluid productivity of a subsurface rock formation from within a wellbore drilled therethrough includes measuring a nuclear magnetic resonance property of the formation at a plurality of lateral depths therein. The measured nuclear magnetic resonance property is used to estimate the fluid productivity. |
| US07893691B2 |
Electromagnetic impedance sensor and passenger protection system
An electromagnetic impedance sensor detects an object made of conducting material or soft magnetic material with contact-free. The sensor includes: a detection coil; and a detection circuit for supplying electricity to the coil and for measuring electromagnetic impedance change in the coil. The detection coil includes multiple coil portions provided by one wire. One coil portion has a side adjacent to a corresponding side of another coil portion. The side and the corresponding side extend along with a direction, and the side has a current flowing direction, which is the same as the corresponding side. |
| US07893689B2 |
Displacement measuring device
A displacement measuring device includes a stationary magnetic member for providing an accommodation space and a first and second magnetic circuits, a movable magnetic member disposed in the accommodation space to move in its longitudinal direction, a magnetic sensor for sensing magnetic flux flowing in the first and second magnetic circuits. The stationary member includes a sensor supporting member disposed in line with an axis of symmetry, a pair of yoke members axisymmetrically disposed at opposite sides of the sensor supporting member, a pair of permanent magnets each of which is disposed between one of the yoke members and the sensor supporting member. The permanent magnets are polarized so that magnetic flux flows in one of the magnetic circuits opposite in direction to magnetic flux flowing in the other magnetic circuit. The magnetic sensor is disposed on the sensor supporting member to confront the moving magnetic member at a first air gap. Each of the yoke members has a projection extending in parallel with the longitudinal direction of the movable magnetic member at a second air gap. Therefore, magnetic permeance of the first and second magnetic circuits changes when the moving magnetic member moves in the longitudinal direction thereof. |
| US07893684B2 |
Integrated power detector with temperature compensation for fully-closed loop control
An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal. |
| US07893678B2 |
Current-mode controlled DC-DC converter
A current-mode controlled DC/DC converter receives an input voltage (Vb) and supplies an output voltage (Vo). A controllable switch (S1) is coupled to an inductor (L) to obtain a periodically varying inductor current (IL) through the inductor (L). A current-mode controller (1) compares (10) the output voltage (Vo) with a reference voltage (Ver) to Obtain an error signal (ER), and applies (11) a transfer function on the error signal (ER) to obtain a control signal (CO; CIO). A correction circuit (7) adds to the control signal (CO; ICO) a correction signal (ICR) representative for a difference between an original value of the control signal (CO; ICO) and an average value of the inductor current (IL) to obtain a modified control signal (MCO; IMC). A drive circuit (3, 4) compares (3) a sensed signal (SE) being representative for the inductor current (IL) with the modified control signal (MCO; ICO) to switch off (4) the controllable switch (S1) when a level of the sensed signal (SE) reaches a level of the modified control signal (MCO; ICO). |
| US07893677B2 |
Method and apparatus for synchronous boost voltage regulators with active negative current modulation
A switch-mode synchronous boost voltage regulator is disclosed that includes a boost voltage regulator and an active current modulator. The active current modulator detects a negative current flowing through the high-side switch during a light load condition. When the negative current is detected, the active current modulator is operable to maintain the high-side switch “on” in a linear mode and to limit the negative current to a predetermined current level. |
| US07893676B2 |
Driver for switch and a method of driving the same
A driver for a switch, a related method of driving the switch, and a power converter employing the same. In one embodiment, the driver includes switching circuitry having a driver switch referenced to a voltage level and configured to provide a drive signal to a control terminal of a power switch referenced to another voltage level and subject to a control voltage limit. The driver also includes a comparator configured to change a state of the driver switch when a voltage at the control terminal passes a threshold voltage. |
| US07893670B2 |
Frequency compensation scheme for stabilizing the LDO using external NPN in HV domain
A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device. A compensation capacitor and resistor may be coupled in series between the output of the error amplifier and the output of the voltage regulator to provide frequency compensation for the Miller-Effect. |
| US07893669B2 |
Efficient voltage converter methods and structures
Voltage converter are provided for efficient generation of voltage signals in a load. The converters are formed with a group of inductors and at least two sets of buck and sync transistors that are arranged with the group so that conducted currents through each of the sets are directed through a respective one of the inductors and further directed to magnetically couple induced currents in the respective inductor of at least an associated one of the sets. Efficiency is particularly enhanced with an operational mode that is directed to light load conditions. In this mode and in at least a selected one of the sets, the buck transistor is turned off throughout the operational mode and the sync transistor is turned off for at least the time that an associated buck transistor is turned on in an associated set which couples induced currents in the respective inductor of the selected set. Preferably, the sync transistor is turned off at the end of a selected time span that begins when the associated buck transistor is turned off. |
| US07893666B2 |
Device and method for charging an electrical energy storage device
A device is described for charging an electrical energy storage device, which has an active current-limiting device in a main current path in order to limit a supply current to a predefined maximum current. A voltage transformer device is situated downstream from the current-limiting device for raising the potential of the electrical energy storage device over a supply potential. |
| US07893664B2 |
Power consumption reduction of a power supply
A power supply includes a first switch to establish a first path to charge an output of the power supply by a voltage source, a second switch to establish a second path to discharge the output, and a third switch connected between the output and a capacitor. When to discharge the output, the third switch is turned on before the second switch turns on, to transfer a portion of energy on the output to the capacitor. When to charge the output, the third switch is turned on before the first switch turns on, to transfer a portion of the energy on the capacitor to the output. |
| US07893660B2 |
Method and apparatus for handling a charging state in a mobile electronic device
The present invention is directed at a method of handling a device charging state for a Universal Serial Bus (USB) connected mobile electronic device comprising the steps of sensing a presence of a bus voltage; sensing an enumeration acknowledgement signal between the device and a USB host; and transmitting a signal to instruct the device to enter the device charging state. |
| US07893657B2 |
Multi-power charger and battery backup system
A multi-power charger comprises an internal battery, receptacles for connecting one or more external power sources, and output receptacles for connecting to an electronic device. A voltage selection circuit determines an operating voltage of the first device and selects a power supply source to supply the operating voltage the device. The power supply source may be the internal battery, the external power source, or both. The operating voltage is delivered to the device via the output receptacle. |
| US07893651B2 |
System for a fuel cell power and management system
There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a portable fuel cell power and management system (for example, hydrogen and/or methanol based systems), components and/or elements thereof, as well as techniques for controlling and/or operating such systems. The fuel cell power management system (and method of controlling and/or operating same) actively monitors, manages and/or controls one or more operating parameter(s) of the fuel cell system. For example, the system monitors, manages and/or controls the consumption and/or the rate of consumption of fuel by the system, and in response thereto, may provide and/or alert the user to amount of fuel remaining, consumed, the rate of consumption and/or the time (or estimation thereof) remaining until all of the fuel is spent. In this way, the user may schedule or plan accordingly. |
| US07893650B2 |
Method and system for multiphase current sensing
A multiphase current sensing method wherein the sum of the phase currents is zero including: sensing a.c. and/or d.c. currents in first and second phases; sensing a.c. current in a predetermined a.c. frequency range in a third phase; and combining the current sensed in the first and third phases and the second and third phases and determining a gain correction factor to be applied to the currents sensed in the first and second phases. |
| US07893648B2 |
Stepping motor driving device, sheet processing device, and image processing apparatus
A stepping motor driving device drives a stepping motor according to a drive pulse of a step signal. A phase matching unit matches, at a time when there is a possibility that a rotor and a phase signal are out of phase with each other, phases of the rotor and the phase signal by applying at least one drive pulse after energizing the stepping motor for a predetermined time and applying a phase signal having a predetermined duration for a final pulse. |
| US07893644B2 |
Ultra-compact, high-performance motor controller and method of using same
Featured is a controller for a motor that is ultra-compact, with a power density of at least about 20 watts per cubic cm (W/cm3). The controller utilizes a common ground for power circuitry, which energizes the windings of the motor, and the signal circuitry, which controls this energization responsive to signals from one or more sensors. Also, the ground is held at a stable potential without galvanic isolation. The circuits, their components and connectors are sized and located to minimize their inductance and heat is dissipated by conduction to the controller's exterior such as by a thermally conductive and electrically insulating material (e.g., potable epoxy). The controller uses a single current sensor for plural windings and preferably a single heat sensor within the controller. The body of the controller can also function as the sole plug connector. |
| US07893641B2 |
Method and apparatus for thermal sensing in an electrically commutated motor
A control circuit for a motor includes a voltage regulator having a thermal shutdown apparatus that turns off the voltage regulator while retaining power to a micro-controller preventing an automatic restart of the motor absent a recycling of power when the temperature of the control circuit rises above a pre-determined threshold level, wherein the voltage regulator is used to provide power to a plurality of insulated gate bipolar transistors controlling a plurality of stator windings of the motor. Thus the voltage regulator prevents the control circuit and the various components on the control circuit from being damaged from overheating. An embodiment of the control circuit is adapted to generate an error code in response to the shutdown of the voltage regulator and to monitor the operation of the motor to ensure that the motor has been turned off and then on before turning on the power supply to a plurality of phase windings. |
| US07893640B2 |
Brushless motor control apparatus and control method and motor system
A brushless motor control apparatus includes a mask processing unit to which digital induced voltage signal is input, a energizing current timing generation processing unit, a pulse width detection unit, and an advance angle correction unit for performing advance angle correction. The pulse width detection unit measures pulse width of spike voltage, and the advance angle correction unit calculates the correction to the advance angle according to the length of this pulse width. The energizing current timing generation processing unit takes half the value obtained after subtracting the correction value from the edge interval of the position detection signal generated in the mask processing unit as the advance angle. |
| US07893634B2 |
Wireless manual pulse generator
The invention relates to a wireless manual pulse generator that includes a central processing unit, a magnification selector, a pulse generator, an axis selector, and a wireless transmission module. The magnification selector is electronically connected to the central processing unit. The pulse generator is electronically connected to the magnification selector. The axis selector is electronically connected to the central processing unit. The wireless transmission module is electronically connected to the central processing unit. The central processing unit is configured to process a signal generated from the magnification selector or the axis selector. The wireless transmission module is configured to deliver the signal processed by the central processing unit to a CNC machine via wireless communication. |
| US07893633B2 |
Method and apparatus for controlling a variable-colour light source
Disclosed is a control device for controlling a variable-color light source, the variable-color light source comprising a plurality of individually controllable color light sources. The control device comprises a control unit for generating, responsive to an input signal indicative of a color and a brightness, respective activation signals for each of the individually controllable color light sources. The control unit is configured to generate the activation signals from the input signal and from predetermined calibration data indicative of at least one set of color values for each of the individually controllable light sources. |
| US07893631B2 |
White light luminaire with adjustable correlated colour temperature
The present invention provides a luminaire system and method for creating white light having a desired color temperature. The system comprises one or more white light light-emitting elements for generating white light having a particular color temperature. The system further comprises one or more first color light-emitting elements and one or more second color light-emitting elements. The luminaire system mixes the colored light generated by the first and second color light-emitting elements with the white light of a particular color temperature, in order to create white light having a desired correlated color temperature. |
| US07893628B2 |
Electronic circuit for operating a plurality of gas discharge lamps at a common voltage source
The presented circuit makes it possible to operate a plurality of gas discharge lamps, particularly cold cathode tubes, at a common voltage source. The uniform distribution of current to all the lamps is achieved without using any magnetic components, but only using semiconductor components. |
| US07893627B2 |
Light strands
The Light strands include at least two light strands connected in series. Each light strand includes a plurality of LED (Light Emitting Diode) lights connected in series, a plurality of two-hole light sockets and a pair of three-hole light sockets being configured for respectively accommodating the plurality of LED lights, a plug electrically connected to the pair of three-hole light sockets via electrical wires; a plug receptacle electrically connected to the pair of three-hole light sockets via electrical wires; and a current limiting device connected in series to the plurality of LED lights. The plurality of two-hole light sockets is disposed between the pair of three-hole light sockets and the plurality of two-hole light sockets and the pair of three-hole light sockets are connected in series. The current limiting device switches off the light strand due to over current. |
| US07893624B2 |
Backlight control circuit having frequency setting circuit and method for controlling lighting of a lamp
An exemplary backlight control circuit includes an inverter, a pulse width modulation (PWM) circuit, and a frequency setting circuit. The inverter is configured to provide an alternating current voltage to a lamp. The PWM circuit is configured to provide a pulse control signal to the inverter. The frequency setting circuit configured to regulate a frequency of the pulse control signal provided by the PWM circuit according to an environment temperature. |
| US07893616B2 |
Process to determine enzyme activity
The present invention provides for various processes for determining enzyme activity. In one embodiment, a process for detecting an enzyme activity includes contacting a blood component with a substrate comprising a cleavage site of the enzyme and a tag moiety to produce a sample comprising a cleavage product having a known mass, and placing the sample in contact with a SELDI sample chip which has surface moieties which bind to the cleavage product. In another embodiment, the process further includes subjecting the SELDI sample chip to SELDI mass spectrometry to identify the cleavage product. The present invention also provides for a kit which includes a SELDI sample chip having surface moieties capable of binding to an enzyme cleavage product. |
| US07893615B2 |
Ultra violet flame sensor with run-on detection
A UV flame sensor for detecting a run-on condition in a flame detector tube is disclosed. The UV flame sensor comprises a pair of secondary electrodes that are enclosed in a mesotube to form a breakdown chamber in order to detect the run-on condition. These secondary electrodes are exposed to UV through an aperture in a cathode plate and are energized continuously by a lower voltage. The mesotube is expected to break down when the run-on condition occurs. The secondary electrodes can be placed in the same gas environment as the main electrodes that may take different forms, shapes and locations. |
| US07893611B2 |
Metal complex, light-emitting device and display
There is provided a novel luminescent metal complex. A metal complex having a composition of [(PtII)2(MI)2(X)2(L)4(LH)2], where MI denotes AgI, AuI or CuI, X denotes Cl, Br or I, L denotes a structure represented by the formula (1), and LH denotes a structure represented by the formula (2). |
| US07893610B2 |
Tandem organic electroluminescent device
A tandem organic electroluminescent device. The tandem organic electroluminescent device comprises a substrate having a pixel thin film transistor. A rib with chambered corners is formed on the substrate, surrounding a display region. A protrusion is formed in the display region. A plurality of organic light emitting diodes is stacked vertically in the display region, covering the protrusion, wherein each organic light emitting diode comprises a top electrode, an organic electroluminescent layer, and a bottom electrode. The bottom electrode of the bottommost organic light emitting diode is electrically connected to the pixel thin film transistor. A common electrode electrically connected to the top electrode of the topmost organic light emitting diode directly over the protrusion. |
| US07893609B2 |
Organic electroluminescence element defect inspection apparatus, organic electroluminescence element and organic electroluminescence element defect inspection method
One embodiment of the present invention is an organic electroluminescence element defect inspection apparatus wherein the apparatus brings in an optical image of a substrate to be inspected and detects a pattern defect of an organic luminescent layer on the substrate to be inspected. The above is performed after an organic luminescent layer is formed on a substrate in a method of manufacturing an organic electroluminescence element. The organic electroluminescence element includes at least one or more organic luminescent layers having a luminescence area, an anode which injects a hole into the organic luminescent layer and a cathode which injects an electrode into the organic luminescent layer on a substrate. And an optical source for obtaining an optical image from a substrate to be inspected is infra-red radiation. |
| US07893600B2 |
Piezoelectric resonator
A capacitor-built-in type piezoelectric resonator which is thin and small in size, and has high reliability is formed by forming a pair of vibrating electrodes on both principal surfaces of a piezoelectric substrate, and joining a sealing substrate made of a ceramic material to form a capacitance via a frame onto one vibrating electrode, and joining a sealing substrate made of a resin material via a frame onto the other vibrating electrode. |
| US07893599B2 |
Energy converters and associated methods
Energy converters and associated methods are disclosed herein. In one embodiment, an energy converter includes a first structural member spaced apart from a second structure member, a first piezoelectric element and a second piezoelectric element individually coupled to the first structural member and the second structural member, and a deflection member tensionally suspended between the first and second piezoelectric elements. The deflection member is substantially rigid. |
| US07893596B2 |
Micro movable element and micro movable element array
A micro movable device suitable for suppressing deterioration of driving characteristics, and a micro movable device array including such a micro movable device are provided. The micro movable device (X1) of the present invention includes a movable portion including a first driving electrode, a second driving electrode for generating electrostatic attraction between the first driving electrode and the second driving electrode, a first conductor portion (22c) electrically connected to the first driving electrode, a second conductor portion (22b) electrically connected to the second driving electrode, and a third conductor portion (21a) which is not electrically connected to the first and the second driving electrodes and which is bonded to the first conductor portion (22c) via an insulating film (23) and bonded to the second conductor portion (22b) via the insulating film (23). |
| US07893593B2 |
Automotive engine starter and electric rotary machine designed to withstand vibrational impact
An electric rotary machine which may be employed as a dc motor in an automotive engine starter. The motor includes an armature equipped with an armature shaft, a commutator, brushes, and a bearing retaining an end of the armature shaft. The surface of the commutator has a plurality of protrusions extending in parallel to each other in a direction of rotation of the commutator. Each of the brushes has formed in the bottom thereof grooves in which the protrusions of the commutator are fit. The brushes are urged into constant engagement of the grooves with the protrusions on the commutator to establish electrical contacts between the brushes and the commutator and minimize movement of the armature shaft relative to the bearing. |
| US07893589B2 |
AC-induction-motor rotor lamination having rotor slots
An AC-induction-motor rotor lamination has a longitudinal axis and circumferentially spaced apart and closed rotor slots. Each rotor slot includes first through fifth corners, a straight slot base, straight first and second slot sides, and first and second curved sides. The slot base extends from the first corner to the second corner, the first slot side extends substantially radially inward from the second corner to the third corner, and the second slot side extends substantially radially inward from the first corner to the fourth corner. The first and second curved sides extend from a corresponding one of the third and fourth corners to the fifth corner. A rotor lamination having slot sides extending substantially radially outwardly from the second and first corners, and rotor laminations having open rotor slots (with slot sides extending substantially radially inward or outward) are also described. |
| US07893587B2 |
Brushless DC electric motor
The brushless DC electric motor comprises, a rotor including a shaft and a permanent magnet fixed on said rotor shaft, stator including a winding in the shape of a hollow cylinder and composed of a plurality of rhombic single coils made of flat wire. The single coils overlap each other in an imbricated manner, wherein the single coils are performed to form an offset at least in the region of two opposite corners. The winding have legs, wherein half of the legs are located in a first radius and half of the legs are located in a second radius. The motor further comprises a housing having two end plates and supporting said rotor and stator. |
| US07893581B2 |
Motor module
First and second connection mechanisms electrically connect power cables extending in the same direction to first and second electric motor neighboring to each other in the extending direction of the power cables, respectively. The first connection mechanism of the first electric motor is arranged in a radially outer portion, and the second connection mechanism of the second electric motor is arranged in a space between the electric motors. Since both the connection mechanisms are located on the opposite sides of a joint surface between the first and second casings accommodating the first and second motors, respectively, the first and second connection mechanisms can be components on the first and second casing sides, respectively. This structure can prevent increase in size in a rotation axis direction, and can improve assembly workability for the motors. |
| US07893579B2 |
Brushless electric motor
An electric motor has a stator (224) having a bearing tube (238) made of a magnetically transparent material; it also has a rotor (222) having a rotor shaft (234) that is at least partially journaled in the bearing tube (238), and has a ring magnet (250) that is fixedly arranged on the rotor shaft (234) inside the bearing tube (238). Two magnetic-field-dependent analog sensors (248′, 248″) are arranged on a circuit board (246) outside the bearing tube (238), at an angular distance (PHI) from one another, in order to generate rotor position signals as a function of the rotational position of the ring magnet (250). A corresponding device (150) that serves to control the motor is provided, in order to process these rotor position signals into a signal that indicates the absolute rotational position of the rotor (222). |
| US07893574B2 |
Rotor of rotary-electric machine
In a rotor of a rotary-electric machine, in order to improve a cooling performance of a rotor winding on an end portion of the rotor in an axial direction, the rotor winding being held by a retaining ring of the rotor winding formed by laminating conductors in slots of a rotor iron core extending in an axial direction and having slots formed at predetermined intervals in a peripheral direction, ventilation channels through which cooling air flows are formed in the surfaces of the conductors along a longitudinal direction. The ventilation channels have air inlet holes which guide the cooling air and exhaust holes which exhaust the cooling air, the conductors are laminated to constitute the rotor winding, and the conductors include openings of the air inlet holes in bottoms of the conductors on a side opposite to a side on which the ventilation channels are formed. |
| US07893567B1 |
Modular utility system
A modular office wiring system comprising a power distribution module, at least one data hub, at least one ten-conductor high-voltage cable, a cable carrier, connectors, at least one power core, at least one high-voltage power module, and at least one low-voltage data module. The system may additionally include one or more splitters that provide branch power lines, with additional power cores positioned on the branch lines and additional high-voltage power modules and low-voltage data modules connected to the additional power cores. In addition, a method is provided for installing and uninstalling the modules to each other. |
| US07893566B2 |
Power latch
A circuit that automatically, seamlessly connects the higher (or the lower) of two power supplies to an output is described. The circuit does not incur a one diode drop when the two power supplies are at about the same voltage levels, and the unused power supply draws no stand-by current. Cross coupled transistor and cross coupled inverters are employed. |
| US07893563B2 |
Electrical distribution feeder system and method of operation
A system and method for operating a transferable feeder system on an electrical distribution system is provided. The system includes a controller that is disposed in communication with switches associated with feeders of a first substation and circuit breakers associated with a second substation. The first substation and second substation are electrically coupled in a manner to allow load transfer from the first substation to the second substation. The system is arranged to disconnect a first pair of circuits from the first substation before connecting the pair of circuits to the second substation while leaving a third circuit coupled to the first substation. During the entire process of transferring load from one substation to the second substation, customer load does not experience any interruption in electrical service. |
| US07893561B2 |
Modular electronically reconfigurable battery system
An electronically reconfigurable battery includes a number of battery modules selectively interconnected by a number of electronic switches, wherein a selectable number of battery modules may be connected either in a series configuration or in a parallel configuration, as a result of placing selected switches of said plurality of switches in open states or closed states. In a parallel configuration, the battery provides power to a primary load, such as a propulsion load for a vehicle. In a series configuration, the battery is configured to provide a high voltage and high power output to a short-term and/or pulsed load, such as an additional load provided on the vehicle. Current from the battery is limited in one of three ways: a) by the batteries themselves; b) a current limiting device or system in series with the total erected battery; or c) a single level power converter or current limiter that is used to erect and charge the capacitor bank in a sequential one level at a time manner until the battery is fully erected and the capacitor is fully charged. |
| US07893559B2 |
Power distribution system
A power distribution system comprises a DC bus supplied by an electrical generator and a resistive load connected to the DC bus. A switching device connects to the DC bus and the load and is configured to periodically open the circuit between the resistive load and the DC bus for a reoccurring period of time. The switching device senses the load on the DC bus and changes the length of the period of time based on the sensed voltage. |
| US07893557B2 |
Methods and systems for high speed data communication
Methods and systems for transmitting power and digital communication are provided. The method includes communicatively coupling a broadband over power line interface unit to a power conductor of a temporary power cable, communicatively coupling the broadband over power line interface unit to a network access point, electrically coupling the power conductor to a vehicle power receptacle, and transmitting network data between the network and the vehicle, and powering the vehicle simultaneously through the power conductor. |
| US07893553B1 |
Wind energy system
A wind energy system comprising a queue of turbines housed in a horizontal air conduit. The inlet end of the conduit opens into a wind collector assembly, which preferably comprises in part downwardly extending earthen slope, such as a hillside or embankment. The wind collector assembly may include a pair of lateral collectors, such as sails, that flank the inlet end of the conduit. An upper collector, similar to a spinnaker, may be included above the shaft and between the flanking sails. The flanking sails preferably are retractable and may be hydraulically controlled. Thus, the wind collector assembly formed by the spinnaker above, the earthen slope below and the lateral sails flanking the inlet, serves to collect wind and channel it into the conduit. Generators coupled to the turbines are electrically connected to a power plant or to an alternate electrical facility on or off the grid. |
| US07893551B2 |
Hand squeeze generator
A hand squeeze generator includes a carrying body, a lever, an elastic member to return the crank to its original position, a gear transmission unit, and a generation motor driven by the gear transmission unit. The lever drives the gear transmission unit and the gear transmission unit drives the generation motor through a clutch gear. The hand squeeze generator may be installed on an electric appliance or connected to an electric appliance, alternatively, be used to charge a rechargeable battery. The generator is driven to generate electricity or to recharge a battery. Therefore, no external power source is required when there is no sufficient electric power supply or the battery runs down. |
| US07893550B2 |
Semiconductor package comprising alignment members
A semiconductor package comprising alignment members is provided. The semiconductor package includes a semiconductor die, first connection terminals disposed on a first surface of the semiconductor die, and a tape substrate including a substrate portion, and second connection terminals disposed on the substrate portion and disposed corresponding to the first connection terminals. The semiconductor package further includes a first alignment member disposed on the first surface of the semiconductor die, and a second alignment member disposed on the substrate portion of the tape substrate and disposed corresponding to the first alignment member. |
| US07893547B2 |
Semiconductor package with a support structure and fabrication method thereof
A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions. |
| US07893544B2 |
Semiconductor device having improved contacts
A device with a solder joint made of a copper contact pad (210) of certain area (202) and an alloy layer (301) metallurgically attached to the copper pad across the pad area. The alloy layer contains copper/tin alloys, which include Cu6Sn5 intermetallic compound, and nickel/copper/tin alloys, which include (Ni,Cu)6Sn5 intermetallic compound. A solder element (308) including tin is metallurgically attached to the alloy layer across the pad area. No fraction of the original thin nickel layer is left after the reflow process. Copper/tin alloys help to improve the drop test performance, nickel/copper/tin alloys help to improve the life test performance. |
| US07893543B2 |
Semiconductor module
A semiconductor module including: a semiconductor chip, an integrated circuit being formed in the semiconductor chip; a plurality of electrodes electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having a plurality of openings positioned corresponding to the plurality of electrodes; and a long elastic protrusion extending on the insulating film. A plurality of interconnects respectively extend from over the electrodes to over the elastic protrusion, directions of the interconnects intersecting an axis AX that is parallel to the extending direction of the elastic protrusion. A plurality of leads are respectively in contact with the interconnects in an area positioned on the elastic protrusion. A cured adhesive maintains a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the leads are formed. A surface of the elastic protrusion except an area on which the interconnects are provided is in close contact with the elastic substrate due to an elastic force. |
| US07893542B2 |
Connecting structure for flip-chip semiconductor package, build-up layer material, sealing resin composition, and circuit board
The invention provides a connecting structure for a flip-chip semiconductor package in which cracking and delamination are inhibited or reduced to improve reliability, and in which the potential range of designs is expanded for the inner circuitry of circuit boards and the inductance is reduced. The invention is a connecting structure for a flip-chip semiconductor package, including: a circuit board having a core layer and at least one build-up layer; a semiconductor element connected via metal bumps to the circuit board; and a sealing resin composition with which gaps between the semiconductor element and circuit board are filled, wherein a cured product of the sealing resin composition has a glass transition temperature between 60° C. and 150° C. and a coefficient of linear expansion from room temperature to the glass transition temperature being between 15 ppm/° C. and 35 ppm/° C., a cured product of the build-up layer has a the glass transition temperature of at least 170° C. and a coefficient of linear expansion in the in-plane direction up to the glass transition temperature being not more than 40 ppm/° C., and stacked vias are provided in the build-up layer on at least one side of the core layer. |
| US07893541B2 |
Optically initiated silicon carbide high voltage switch
An improved photoconductive switch having a SiC or other wide band gap substrate material, such as GaAs and field-grading liners composed of preferably SiN formed on the substrate adjacent the electrode perimeters or adjacent the substrate perimeters for grading the electric fields. |
| US07893537B2 |
Semiconductor device
At least part of an element isolation region, an interlayer insulating film, and a protection insulating film, other than a gate insulating film (silicon oxide film), is formed of carbon fluoride (CFx, 0.3 |
| US07893536B2 |
Semiconductor device
A multilayer interconnect configuration is formed on a semiconductor substrate where a semiconductor integrated circuit is provided. Each layer of the multilayer interconnect configuration has a plurality of pads. Except for the pads of the top layer, the area of the pads is reduced relative to the pads of the top layer. The pad area is reduced by forming a plurality of openings in the pads, or by forming a plurality of notches in the pads whereby the pads have a comb configuration. The capacitance can be significantly reduced by decreasing the area. The reduction of capacitance allows for significantly reducing the effect of a low-pass filter produced from the interconnect metal resistance and the pad capacitance, which slows down the circuit operation. Therefore the high-speed operation can avoid degradation. |
| US07893534B2 |
Thermally insulating bonding pad structure for solder reflow connection
A thermally insulating bonding pad for solder reflow is described. The bonding pad includes a structure. The structure forms the bonding pad. The bonding pad further includes an insulator formed on the structure. The insulator is configured to be interposed between the structure and a substrate of a component onto which said bonding pad is to be disposed. The bonding pad provides thermal insulation for said substrate when said bonding pad is subject to a solder reflow process being performed thereon. |
| US07893531B2 |
Integrated-circuit package for proximity communication
Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover, the given semiconductor die is configured to communicate signals with the other semiconductor die via proximity communication through one or more of the proximity connectors. Furthermore, the MCM includes an alignment plate and a top plate coupled to the alignment plate. This alignment plate includes a first negative feature configured to accommodate the first semiconductor die and a second negative feature configured to accommodate the second semiconductor die, and the top plate includes a positive feature. Note that the positive feature is coupled to the first semiconductor die, and the positive feature facilitates mechanical positioning of the first semiconductor die. |
| US07893530B2 |
Circuit substrate and the semiconductor package having the same
The present invention relates to a circuit substrate comprising an upper surface, a first layout area, a second layout area, and a third layout area. The first layout area is on the upper surface, and has a plurality of first electrical contacts. The second layout area is on the upper surface, and has a plurality of second electrical contacts. The third layout area is on the upper surface, and has a plurality of third electrical contacts. The second and the third electrical contacts that have the same electrical property are electrically connected to each other. Thus, the circuit substrate can be applied to memory chips with different size. |
| US07893523B2 |
Microarray package with plated contact pedestals
A microarray package includes a leadframe having an array of contact posts, a die carried by the lead frame, and a plurality of bonding wires that electrically connect the die to the lead frame. An encapsulant is included that encapsulates the die, the bonding wire and the leadframe while leaving the distal ends of the contact posts exposed and substantially co-planar with a bottom surface of the microarray package. A plurality of pedestal members is plated to the distal end of a respective contact pad. A distal surface of each pedestal member protrudes outwardly beyond the bottom surface of the microarray package in the range of about 15 μm to about 35 μm. |
| US07893522B2 |
Structural body and manufacturing method thereof
The present invention includes a substrate structural body having a high electrostatic chuck force at a low voltage even when an insulated board is used, and a method for manufacturing the substrate structural body. As the substrate structural body, there is provided a substrate structural body for attaining its fixing by an electrostatic chuck mechanism, comprising at least a first polycrystalline silicon film formed on the back surface of a substrate comprised of an insulating material or its back and side surfaces, wherein a top layer of part of the back surface or the back and side surfaces is of a first silicon insulating film. |
| US07893516B2 |
Backside-illuminated imaging device and manufacturing method of the same
A backside-illuminated imaging device, which performs imaging by illuminating light from a back side of a semiconductor substrate to generate electric charges in the semiconductor substrate based on the light and reading out the electric charges from a front side of the semiconductor substrate, is provided and includes: a back-side layer including an back-side element on the back side of the semiconductor substrate; a front-side layer including an front-side element on the front side of the semiconductor substrate; a support substrate above the front-side layer; a spacer, one end of which comes in contact with the front-side layer and the other end of which comes in contact with the support substrate, to form a space having a uniform distance between the semiconductor substrate and the support substrate; and an adhesive filled in at least a part of the space between the surface-side element formation layer and the support substrate. |
| US07893513B2 |
Nanoparticle/nanotube-based nanoelectronic devices and chemically-directed assembly thereof
According to some embodiments, the present invention provides a nanoelectronic device based on a nanostructure that may include a nanotube with first and second ends, a metallic nanoparticle attached to the first end, and an insulating nanoparticle attached to the second end. The nanoelectronic device may include additional nanostructures so a to form a plurality of nanostructures comprising the first nanostructure and the additional nanostructures. The plurality of nanostructures may arranged in a network comprising a plurality of edges and a plurality of vertices, wherein each edge comprises a nanotube and each vertex comprises at least one insulating nanoparticle and at least one metallic nanoparticle adjacent the insulating nanoparticle. The combination of at least one edge and at least one vertex comprises a diode. The device may be an optical rectenna. |
| US07893510B2 |
High temperature-stable sensor
A high temperature-stable sensor is provided in which electrodes on a substrate or an insulation layer are in contact with a sensitive layer, wherein the electrodes have platinum, rhodium, or iridium or an electrically conductive oxide layer. For this purpose, an intermediate product is provided as a platform chip, which has a deposited layer made of platinum, rhodium, or iridium or an alloy of platinum, rhodium, or iridium and is covered by an electrically conductive oxide. From the deposited layer, a conductive structure is formed and thus a platform chip is created with an electrically conductive structure subject to external influences. This structure has an electrically conductive oxide and/or its parts have long-term, stable characteristic resistance curves under high-temperature loading above about 500° C., especially between about 600° C. and 950° C. A sensor with a gas-sensitive layer formed as a gas-sensitive sensor is preferred. |
| US07893504B2 |
Non-volatile semiconductor memory device with contact plug electrically conductive in response to light
Disclosed are a non-volatile semiconductor memory device capable of simplifying the complicated structure of a transistor, and a fabrication method for the same. The non-volatile semiconductor memory device includes a semiconductor substrate including a plurality of active regions, gate electrodes formed over the respective active regions of the semiconductor substrate, gate spacers formed over both sides of each of the gate electrodes, common source/drain regions formed on the surface of the semiconductor substrate at both sides of the gate electrode including the gate spacers, an interlayer dielectric formed over the whole surface of a resultant structure including the substrate, gate electrodes, gate spacers and common source/drain regions, and contact plugs penetrating the interlayer dielectric, and connecting the common source/drain regions to a data line, wherein the contact plugs are made from a material which becomes electrically conductive when in contact with light and becomes non-conductive when out of contact with light. |
| US07893502B2 |
Threshold voltage improvement employing fluorine implantation and adjustment oxide layer
An epitaxial semiconductor layer may be formed in a first area reserved for p-type field effect transistors. An ion implantation mask layer is formed and patterned to provide an opening in the first area, while blocking at least a second area reserved for n-type field effect transistors. Fluorine is implanted into the opening to form an epitaxial fluorine-doped semiconductor layer and an underlying fluorine-doped semiconductor layer in the first area. A composite gate stack including a high-k gate dielectric layer and an adjustment oxide layer is formed in the first and second area. P-type and n-type field effect transistors (FET's) are formed in the first and second areas, respectively. The epitaxial fluorine-doped semiconductor layer and the underlying fluorine-doped semiconductor layer compensate for the reduction of the decrease in the threshold voltage in the p-FET by the adjustment oxide portion directly above. |
| US07893501B2 |
Semiconductor device including MISFET having internal stress film
A semiconductor device includes a first-type internal stress film formed of a silicon oxide film over source/drain regions of an nMISFET and a second-type internal stress film formed of a TEOS film over source/drain regions of a pMISFET. In a channel region of the nMISFET, a tensile stress is generated in the direction of movement of electrons due to the first-type internal stress film, so that the mobility of electrons is increased. In a channel region of the pMISFET, a compressive stress is generated in the direction of movement of holes due to the second-type internal stress film, so that the mobility of holes is increased. |
| US07893498B2 |
Semiconductor device
A semiconductor device 10 comprises a P type base region 13 formed in an N− type base region 11, and N+ type emitter regions 14 formed plurally in the P type base region 13 so as to be spaced form each other. The N+ type emitter regions 14 are formed such that the rate of the area occupied by the N+ type emitter region 14 in the P type base region 13 at the center part of the semiconductor device 10 is smaller than the rate of the area occupied by the N+ type emitter region 14 in the P type base region 13 at the peripheral part of the semiconductor device 10. |
| US07893496B2 |
Stress enhanced transistor
Stress enhanced MOS transistors are provided. A semiconductor device is provided that comprises a semiconductor-on-insulator structure, a gate insulator layer, a source region, a drain region and a conductive gate overlying the gate insulator layer. The semiconductor-on-insulator structure comprises: a substrate, a semiconductor layer, and an insulating layer disposed between the substrate and the semiconductor layer. The semiconductor layer has a first surface, a second surface and a first region. The gate insulator layer overlies the first region, the conductive gate overlies the gate insulator layer, and the source region and the drain region overlie the first surface and comprise a strain-inducing epitaxial layer |
| US07893494B2 |
Method and structure for SOI body contact FET with reduced parasitic capacitance
In one embodiment, the present invention provides a semiconductor device that includes a substrate including a semiconducting layer positioned overlying an insulating layer the semiconducting layer including a semiconducting body and isolation regions present about a perimeter of the semiconducting body; a gate structure overlying the semiconducting layer of the substrate, the gate structure present on a first portion on an upper surface of the semiconducting body; and a silicide body contact that is in direct physical contact with a second portion of the semiconducting body that is separated from the first portion of the semiconducting body by a non-silicide semiconducting region. |
| US07893493B2 |
Stacking fault reduction in epitaxially grown silicon
An intermediate hybrid surface orientation structure may include a silicon-on-insulator (SOI) substrate adhered to a bulk silicon substrate, the silicon of the SOI substrate having a different surface orientation than that of the bulk silicon substrate, and a reachthrough region extending through the SOI substrate to the bulk silicon substrate, the reachthrough region including a silicon nitride liner over a silicon oxide liner and a silicon epitaxially grown from the bulk silicon substrate, the epitaxially grown silicon extending into an undercut into the silicon oxide liner under the silicon nitride liner, wherein the epitaxially grown silicon is substantially stacking fault free. |
| US07893490B2 |
HVNMOS structure for reducing on-resistance and preventing BJT triggering
A high-voltage metal-oxide-semiconductor (HVMOS) device and methods for forming the same are provided. The HVMOS device includes a substrate; a first high-voltage n-well (HVNW) region buried in the substrate; a p-type buried layer (PBL) horizontally adjoining the first HVNW region; a second HVNW region on the first HVNW region; a high-voltage p-well (HVPW) region over the PBL; an insulating region at a top surface of the second HVNW region; a gate dielectric extending from over the HVPW region to over the second HVNW region, wherein the gate dielectric has a portion over the insulating region; and a gate electrode on the gate dielectric. |
| US07893488B2 |
Charged balanced devices with shielded gate trench
This invention discloses a semiconductor power device disposed on a semiconductor substrate includes a plurality of deep trenches with an epitaxial layer filling said deep trenches and a simultaneously grown top epitaxial layer covering areas above a top surface of said deep trenches over the semiconductor substrate. A plurality of trench MOSFET cells disposed in said top epitaxial layer with the top epitaxial layer functioning as the body region and the semiconductor substrate acting as the drain region whereby a super-junction effect is achieved through charge balance between the epitaxial layer in the deep trenches and regions in the semiconductor substrate laterally adjacent to the deep trenches. Each of the trench MOSFET cells further includes a trench gate and a gate-shielding dopant region disposed below and substantially aligned with each of the trench gates for each of the trench MOSFET cells for shielding the trench gate during a voltage breakdown. |
| US07893487B2 |
Recessed channel transistor
A recessed channel transistor includes a single crystalline silicon substrate having a recessed portion, a bottom surface of the recessed portion including an elevated central portion, a channel doping region in the single crystalline silicon substrate, the channel doping region being under the bottom surface of the recessed portion, a gate structure in the recessed portion, and source/drain regions in the single crystalline silicon substrate at both sides of the recessed portion, the source/drain regions being spaced apart from the bottom surface of the recessed portion. |
| US07893481B2 |
Top electrode barrier for on-chip die de-coupling capacitor and method of making same
An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors. |
| US07893469B2 |
Image sensor and method for fabricating the same
An image sensor includes a trench formed by a shallow trench isolation (STI) process, a channel stop layer formed over a substrate in the trench, an isolation structure filled in the trench, and a photodiode formed in the substrate adjacent to a sidewall of the trench. In more detail of the image sensor, a trench is formed in a substrate through a STI process, and a channel stop layer is formed over the substrate in the trench. An isolation structure is formed in the trench, and a photodiode is formed in the substrate adjacent to a sidewall of the trench. |
| US07893468B2 |
Optical sensor including stacked photodiodes
A complementary metal-oxide-semiconductor (CMOS) image sensor comprises a first photosensitive diode comprising a first semiconductor material is formed in a first semiconductor substrate. A second photosensitive diode comprising a second semiconductor material, which has a different light detection wavelength range than the first semiconductor material, is formed in a second semiconductor substrate. Semiconductor devices for holding and detecting charges comprising a sensing circuit of the CMOS image sensor may also be formed in the second semiconductor substrate. The first semiconductor substrate and the second semiconductor substrate are bonded so that the first photosensitive diode is located underneath the second photosensitive diode. The vertical stack of the first and second photosensitive diodes detects light in the combined detection wavelength range of the first and second semiconductor materials. Sensing devices may be shared between the first and second photosensitive diodes. |
| US07893467B2 |
Silicon carbide semiconductor device having junction barrier Schottky diode
A silicon carbide semiconductor device includes a substrate; a drift layer having a first conductivity type; an insulating layer; a Schottky electrode; an ohmic electrode; a resurf layer; and second conductivity type layers. The drift layer and the second conductivity type layers provide multiple PN diodes. Each second conductivity type layer has a radial width with respect to a center of a contact region between the Schottky electrode and the drift layer. A radial width of one of the second conductivity type layers is smaller than that of another one of the second conductivity type layers, which is disposed closer to the center of the contact region than the one of the second conductivity type layers. |
| US07893465B2 |
Semiconductor device and method of manufacturing same
A semiconductor device includes an etching protection layer to protect a metal layer in a bonding pad area when a metal fuse is etched. |
| US07893461B2 |
Electronic device and heterojunction FET
In an electronic device of the present invention a gate Schottky electrode is formed on an active layer constructed of a GaN layer and an AlGaN layer, and a source ohmic electrode and a drain ohmic electrode are further formed on both sides of the gate Schottky electrode on the active layer. A dielectric layer (TiO2 layer) of a stepwise laminate structure is formed on the AlGaN layer so that the electric field distribution between the gate Schottky electrode and the drain ohmic electrode is substantially uniformed. The dielectric constant of TiO2 of the dielectric layer is made higher than the dielectric constant of GaN and AlGaN of the active layer. |
| US07893457B2 |
Bipolar mosfet devices and methods for their use
A semiconductor device includes at least one cell including a base region of a first conductivity type having disposed therein at least one emitter region of a second conductivity type, a first well region of a second conductivity type, a second well region of a first conductivity type, a drift region of a second conductivity type, a collector region of a first conductivity type, and a collector contact. Each cell is disposed within the first well region, and the first well region is disposed within the second well region. The device further includes a first gate in communication with a base region so that a MOSFET channel can be formed between an emitter region and the first well region, and at least one embedded region embedded in the first well region. The device is configured such that during operation of the device a depletion region at a junction between the base region and the first well region can extend to a junction between the first well region and the second well region. |
| US07893455B2 |
Semiconductor light emitting device with stress absorber, LED printhead, and image forming apparatus
An inclined surface having an inclination angle θ is formed in an edge portion which forms an opening portion of an inter-layer insulating film, thereby reducing a stress by the inclined surface. |
| US07893450B2 |
Semiconductor light-emitting element and semiconductor light-emitting element manufacturing method
An aspect of the present invention inheres in a semiconductor light-emitting element includes a light-emitting functional stacked body including a light-emitting region having a light-emitting function, and including a light extraction surface for extracting light emitted from the light-emitting region, and an upward convex lens disposed on the light extraction surface. |
| US07893449B2 |
Gallium nitride based compound semiconductor light-emitting device having high emission efficiency and method of manufacturing the same
The present invention provides a gallium nitride based compound semiconductor light-emitting device having high light emission efficiency and a low driving voltage Vf. The gallium nitride based compound semiconductor light-emitting device includes a p-type semiconductor layer, and a transparent conductive oxide film that includes dopants and is formed on the p-type semiconductor layer. A dopant concentration at an interface between the p-type semiconductor layer and the transparent conductive oxide film is higher than the bulk dopant concentration of the transparent conductive oxide film. Therefore, the contact resistance between the p-type semiconductor layer and the transparent conductive oxide film is reduced. |
| US07893448B2 |
Light emitting device having nano structures for light extraction
The present invention relates to a light emitting device having nano structures for light extraction and a method for manufacturing the same, nano structures comprising nano rods, nano agglomerations, nano recesses, nano patterns with nano line widths, nano through-holes or a combination thereof, formed on a light emitting surface of a light emitting device, thereby enhancing the light extraction efficiency of the device. |
| US07893446B2 |
Nitride semiconductor light-emitting device providing efficient light extraction
A nitride semiconductor light-emitting device comprises a substrate, and a first n-type nitride semiconductor layer, an emission layer, a p-type nitride semiconductor layer, a metal layer and a second n-type nitride semiconductor layer stacked on the substrate successively from the side closer to the substrate, with an electrode provided on the surface of the second n-type nitride semiconductor layer or above the surface of the second n-type nitride semiconductor layer. The metal layer is preferably made of a hydrogen-storage alloy. |
| US07893445B2 |
Solid state emitter package including red and blue emitters
A solid state emitter package includes a principally red solid state emitter having peak emissions within 590 nm to 680 nm, a principally blue solid state emitter having peak emissions within 400 nm to 480 nm, and at least one of a common leadframe, common substrate, and common reflector, with the package being devoid of any principally green solid state emitters having peak emissions between 510 nm and 575 nm. A solid state emitter package may include at least one electrically conductive path associated with the solid state emitter package that is not in electrical communication with any solid state emitter of the solid state emitter package, with such electrically conductive path being susceptible to inclusion of a jumper or a control element. |
| US07893438B2 |
Organic light-emitting display device including a planarization pattern and method for manufacturing the same
Provided is an organic light-emitting display device (OLED) and method of manufacturing the same. The OLED comprises a substrate and a thin film transistor, with source/drain electrodes, located at a predetermined area on the substrate. A passivation layer is located on the source/drain electrodes with a via hole exposing one of the source/drain electrodes. A first pixel electrode is located at the bottom of the via hole, electrically coupled to the exposed source/drain electrode, and extending onto the side wall of the via hole and the passivation layer. A planarization pattern fills the via hole in which the first pixel electrode is located and exposes the portion of the first pixel electrode on the passivation layer. |
| US07893433B2 |
Thin films and methods of making them
Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources. |
| US07893428B2 |
Photosensitive organic semiconductor compositions
The present invention relates to a photosensitive organic semiconductor composition comprising an organic p-type semiconductor pigment with a p-type conducting polymer, wherein the ionization potentials of the organic p-type semiconductor pigment and the p-type conducting polymer are nominally equivalent and a photosensitive organic semiconductor composition comprising an organic n-type semiconductor pigment with an n-type conducting polymer, wherein the electron affinities of the organic semiconductor pigment and the conducting polymer are nominally equivalent. The present invention also relates to a p/n heterojunction utilizing the photosensitive organic semiconductor compositions. |
| US07893427B2 |
Light emitting element and light emitting device using the same
An object of the prevent invention is to provide a light emitting element having slight increase in driving voltage with accumulation of light emitting time. Another object of the invention is to provide a light emitting element having slight increase in resistance value with increase in film thickness. A light emitting element of the invention includes a first layer for generating holes, a second layer for generating electrons and a third layer comprising a light emitting substance between first and second electrodes. The first and third layers are in contact with the first and second electrodes, respectively. The second and third layers are connected to each other so as to inject electrons generated in the second layer into the third layer when applying the voltage to the light emitting element such that a potential of the second electrode is higher than that of the first electrode. |
| US07893424B2 |
Semiconductor layer structure with superlattice
The semiconductor layer structure includes a superlattice composed of stacked layers of III-V compound semiconductors of a first and at least one second type. Adjacent layers of different types in the superlattice differ in composition with respect to at least one element, at least two layers of the same type have a different content of the at least one element, the content of the at least one element is graded within a layer of the superlattice, and the layers of the superlattice contain dopants in predefined concentrations, with the superlattice comprising layers that are doped with different dopants. In this way, the electrical, optical and epitaxial properties of the superlattice can be adapted in the best possible manner to given requirements, particularly epitaxial constraints. |
| US07893421B2 |
Phase change memory device capable of satisfying reset current characteristic and contact resistance characteristic
A phase change memory device is presented that has a lower electrode contact that has a gradient resistance profile ranging from a lower resistive lower end to a higher resistive upper end. The phase change memory device includes a semiconductor substrate, a lower electrode contact, and a phase change pattern. The semiconductor substrate has a switching device. The lower electrode contact is formed on the switching device and has a specific resistance which gradually increases from a lower part to an upper part of the lower electrode contact. The phase change pattern layer is formed on the lower electrode contact. |
| US07893418B2 |
Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods
A memory device as described herein includes a memory member contacting first and second interface structures. The first interface structure electrically and thermally couples the memory member to access circuitry and has a first thermal impedance therebetween. The second interface structure electrically and thermally couples the memory member to a bit line structure and has a second thermal impedance therebetween. The first and second thermal impedances are essentially equal such that applying a reset pulse results in a phase transition of an active region of the memory member spaced away from both the first and second interface structures. |
| US07893416B2 |
Detecting printing plate edge alignment
A system for detecting the alignment of a top plate placed on a plate pallet. The alignment is detected relative to predetermined coordinates of the system. The system will generally include the following components: An illumination source configured to illuminate light on at least one edge of the top plate; a scanner for acquiring scanning results of the top plate edges. The scanning result will be analyzed by an analyzing component, in order to align the top plate correctly before it is loaded into the CTP imaging device. |
| US07893415B2 |
Optical semiconductor relay device for reducing transient voltage between output terminals of the relay and maintaining high operation speed and low capacitance characteristics
A transient voltage occurring between output terminals during ON/OFF operation is reduced. There are provided a pair of input terminals IN1 and IN2, a pair of output terminals OUT1 and OUT2, MOSFETs N1 and N2 connected between the output terminals, and a drive circuit 10 connected between the input terminals IN1 and IN2 and the MOSFETs N1 and N2. A light-emitting diode D1 is connected between the input terminals IN1 and IN2. The MOSFETs N1 and N2 have their source electrodes electrically connected to each other and their drains connected to the output terminals OUT1 and OUT2 respectively. The drive circuit 10 includes a photodiode array FD1 that supplies a drive voltage to the gates of the MOSFETs N1 and N2, and a discharge circuit 11, connected between the gate electrodes and the source electrodes of the MOSFETs N1 and N2, that discharges electric charges accumulated on each gate electrode. |
| US07893414B2 |
Apparatus and method for absorption of incident gamma radiation and its conversion to outgoing radiation at less penetrating, lower energies and frequencies
Gamma radiation (22) is shielded by producing a region of heavy electrons (4) and receiving incident gamma radiation in such region. The heavy electrons absorb energy from the gamma radiation and re-radiate it as photons (38, 40) at a lower energy and frequency. The heavy electrons may be produced in surface plasmon polaritons. Multiple regions (6) of collectively oscillating protons or deuterons with associated heavy electrons may be provided. Nanoparticles of a target material on a metallic surface capable of supporting surface plasmons may be provided. The region of heavy electrons is associated with that metallic surface. The method induces a breakdown in a Born-Oppenheimer approximation Apparatus and method are described. |
| US07893412B2 |
Attenuator system for beam modulation
An attenuator system for attenuating a radiation beam, including a first attenuating element placed in a path of a radiation beam for attenuation thereof, a second attenuating element placed distal to the first attenuating element for further attenuation of the radiation beam, a first positioner operatively connected to the first attenuating element, which moves the first attenuating element along a first direction, a first processor operatively connected to the first positioner for controlling motion of the first attenuating element, a second positioner operatively connected to the second attenuating element, which moves the second attenuating element along a second direction, and a second processor operatively connected to the second positioner for controlling motion of the second attenuating element, wherein a two-dimensional attenuation distribution of the first attenuating element varies linearly with respect to at least one coordinate. |
| US07893411B2 |
Charged-particle beam writing apparatus and charged-particle beam writing method
A timing control circuit controls the timing for applying a voltage to a sub deflector when changing a position to be irradiated with the charged-particle beam. A control computer compares a target line width and a line width of a pattern written with the timing for applying voltage to the sub deflector changed, and determines appropriate timing for applying voltage to the sub deflector from a timing range corresponding to a predetermined allowable range of the difference between the target line width and the line width of the written pattern. The control computer then controls the timing control circuit based on the determined timing. |
| US07893410B2 |
Method and apparatus for processing multiphoton curable photoreactive compositions
A method including providing a substrate having thereon a layer including a multiphoton polymerizable composition, applying a light beam to at least one region of the layer, wherein the light beam cures or initiates cure of the multiphoton curable photoreactive composition; and processing a portion of the light beam reflected off the substrate to obtain a location signal of an interface between the layer and the substrate at each region. |
| US07893407B2 |
High performance micro-fabricated electrostatic quadrupole lens
A method of aligning sets of cylindrical electrodes in the geometry of a miniature quadrupole electrostatic lens, which can act as a mass filter in a quadrupole mass spectrometer is provided. The electrodes are mounted in pairs on microfabricated supports, which are formed from conducting parts on an insulating substrate. Complete segmentation of the conducting parts provides low capacitative coupling between co-planar cylindrical electrodes, and allows incorporation of a Brubaker prefilter to improve sensitivity at a given mass resolution. A complete quadrupole is constructed from two such supports, which are spaced apart by further conducting spacers. The spacers are continued around the electrodes to provide a conducting screen. |
| US07893405B2 |
Radiation detection apparatus and scintillator panel
A radiation detection apparatus includes an optical detector disposed on a substrate and having a plurality of photoelectric conversion elements which convert light into an electrical signal, and a scintillator layer disposed on the optical detector and having a columnar crystal structure which converts radiation into light, wherein the concentration of an activator of the scintillator layer is higher at the radiation-incident side opposite the optical detector and is lower at the optical detector side. The scintillator panel includes the substrate and the scintillator layer disposed on the substrate, wherein the concentration of the activator of the scintillator layer is higher at the radiation-incident side and is lower at the light-emission side. |
| US07893402B2 |
Measurement of the mobility of mass-selected ions
The mobility of mass-selected ions in gases is measured at pressures of a few hectopascal by selecting the ions under investigation in a quadrupole filter according to their mass-to-charge ratio m/z, measuring their mobility in a drift region at a pressure of a few hundred Pascal under the influence of a DC electric field and then filtering the measured ions by means of a quadrupole field in order to eliminate, or detect changes in, the mass-to-charge ratio. Several embodiments for the drift region are disclosed, in which the ions are kept in the axis of the drift region by RF fields. As these drift regions can also be utilized for a collision-induced decomposition of the ions, the device can additionally be used as a so-called triple quadrupole mass spectrometer. |
| US07893401B2 |
Mass spectrometer using a dynamic pressure ion source
A mass spectrometer has a pulsed ion source, a first ion trap (10) for trapping ions generated by the pulsed ion source and for locating trapped ions for subsequent ejection from the first ion trap. A pulse of cooling gas is introduced into the first ion trap (10) at a peak pressure suitable for enabling the first ion trap (10) to trap ions. A turbomolecular pump (17) reduces the pressure of cooling gas before the trapped ions are ejected from the first ion trap (1) towards a second ion trap (20) for analysis. The pulsed ion source has a sample plate (14) which forms an end wall of the first ion trap (10). |
| US07893400B2 |
Method for laser desorption/ionization mass spectrometry, sample supporting substrate used therein, and substrate material testing method
There is disclosed a method of performing laser desorption/ionization mass spectrometry based on ions generated by exposing a sample supported on a substrate to laser light, the sample being to be subjected to spectrum analysis. The method includes the steps of (a) causing a part of the ions to be generated through one of an interaction between the laser light and a surface of the substrate and an interaction between the laser light and an interface between the substrate and the sample; and (b) determining the generated part of the ions to be index ions and identifying a signal to become noise in the laser desorption/ionization mass spectrometry using a signal of the index ions, thereby performing the spectrum analysis without an effect of the noise. |
| US07893390B2 |
Guided missile
A guided missile has a sensor unit, a propulsion unit, and a payload unit. A missile casing forms the outer contour, extends along a longitudinal direction, and accommodates the sensor unit, the propulsion unit, and the payload unit. At least two of the units can be fitted alongside one another in the longitudinal direction. In comparison to conventional guided missiles, the guided missile is distinguished by increased modularity and thus by increased flexibility with regard to different operational scenarios. |
| US07893388B2 |
Microwave grill
A microwave grill for converting microwave energy to heat and applying the heat to a grillable food or other grillable substance. The microwave grill a cover and a base that each have a grill element and an enclosure. The grill element includes a microwave absorbent material and a grilling surface that are in thermal communication with each other. The enclosure is attached to the grill element. The enclosure is fabricated from a microwave transparent material possessing a low heat transfer rate. The first enclosure substantially extends over the first microwave absorbent material. A hinge mechanism operably attaches the cover and the base. An offset bump extends from at least one of the enclosures to maintain the cover and the base in a first spaced-apart configuration when the cover and the base are in a closed configuration. |
| US07893386B2 |
Laser micromachining and methods of same
The described embodiments relate to laser micromachining a substrate. One exemplary method includes forming a feature into a substrate, at least in part, by directing a laser beam at the substrate. During at least a portion of said forming, the method includes supplying liquid to at least a first region of the feature along a first liquid supply path and supplying liquid to at least a second different region of the feature along at least a second liquid supply path. |
| US07893385B2 |
Method for enhancing gain and range of an RFID antenna
Three dimensional nano structures created on copper or aluminum base metal through the use of a laser pulse device which results in an increase in radiation sensitivity of the metal. The base metal is used to manufacture RFID antennae after receiving a pulse of sharply focused laser ablation energy. The result is an increase in gain and range of the antennae. Furthermore, the antennae do not detune in the proximity of other antennae and are readable in a non perpendicular orientation. |
| US07893384B2 |
Systems and methods for laser material manipulation
A laser material manipulation system is provided for material processing, such as laser ablation, laser deposition and laser machining. The system includes a laser for emitting laser pulses and a laser imaging device having an array of controllable imaging elements. The laser imaging device receives the laser pulses emitted from the laser, forms a laser image through the controllable imaging elements, and projects the laser image onto a target material which is to be processed. The projected laser image processes the material according to a desired pattern. The laser can be a femtosecond laser. The laser imaging device can be a liquid crystal display (LCD) or a digital micromirror device (DMD). An SEM can be used for monitoring the material distribution and dynamically adjust the laser image according to the monitor result. |
| US07893376B2 |
Key structure with scissors-type connecting member
A key structure includes a scissors-type connecting member. The scissors-type connecting member includes a first frame and a second frame. The first frame includes a first protrusion and a second protrusion. The second frame includes a first receiving recess for accommodating the first protrusion, a second receiving recess for accommodating the second protrusion, and a partition wall between the first receiving recess and the second receiving recess. When the first frame is swung with respect to the second frame, the first protrusion is sustained against a first side of the partition wall and moved on the first side of the partition wall, and the second protrusion is sustained against a second side of the partition wall and moved on the second side of the partition wall. Consequently, the first protrusion and the second protrusion are permitted to be partially detached from first receiving recess and the second receiving recess, respectively. |
| US07893374B2 |
Sheet switch module
A sheet switch module includes a circuit board (20) provided with a fixed contact (22) thereon, a light source (30), a movable contact (26) to face the fixed contact (22), a sheet (28) to hold the movable contact (26) on the circuit board, a key top (46) disposed to face the movable contact and a light guiding plate (32) to guide light emitted from the light source (30) to the key top. The light-guiding plate (32) includes a light-receiving part (34) projecting toward an upper surface of the circuit board (20) and a light-guiding part (39). The light-guiding plate (32) is positioned in a substantially horizontal state supported by the light-receiving part (34) on the upper surface of the circuit board (20). |
| US07893371B2 |
Pressure switch
In a pressure switch, a joint coupling holder is installed in a case of a housing through an opening, and a joint coupling, to which piping is connected, is connected to the joint coupling holder. The joint coupling holder includes a protective wall therein, which is arranged on a straight line with a detector that is accommodated inside the housing at a central portion of a through hole. In addition, a pressure fluid, which is introduced to the detector through a conduit of the joint coupling, flows in a bypassing manner through a pair of communication openings while averting the protective wall. |
| US07893367B2 |
Infant scale
An infant scale includes a scale pan configured to hold an infant and including first and second pan halves foldable against each other from an unfolded weighing position to a folded-up storage position. A measuring device is configured to support the scale pan and to determine a weight of the infant. The measuring device includes a plurality of load cells. A display is configured to show the determined weight. |
| US07893363B2 |
Large capacity universal conduit bodies
A conduit body device for accommodating wire therethrough the device is provided. The conduit body has a body wall including a pair of elongate side walls and a pair of end walls forming a perimetrical side wall, a bottom wall, and an open end defining a body interior. The conduit body further includes a longitudinal axis located generally along the elongate side walls. At least two hub passageways extend from the conduit body in communication with the body interior, each of the hub passageways including a hub wall defining an access channel for passage of wires therethrough. The hub passageways may be generally located in non-axial alignment with said longitudinal axis. In some embodiments the bottom wall has a broad curved shape. In other embodiments, the open end may be angled for ease of access. |
| US07893358B2 |
Conductor bar for the stator of a generator, and method for its production
A conductor bar for a stator of a generator includes a plurality of internal conductor elements; an insulation wound around the plurality of internal conductor elements so as to externally enclose the plurality of internal conductor elements, the insulation including impregnated glass/mica bands; and at least one interlayer disposed between the insulation and the plurality of internal conductor elements so as to improve a mechanical connection between the plurality of internal conductor elements and the insulation. |
| US07893355B2 |
Lead pin for package boards
Provided is a lead pin for package boards including a disk-shaped head of which the diameter increases toward the middle portion thereof and that has a hexagonal vertical cross-sectional shape; and a connection pin that is formed so as to project from the center of the upper surface of the head. |
| US07893354B2 |
Cable harness, more specifically a high-voltage cable harness for a motor vehicle, as well as a device for leading-through an electric cable and for connecting a shield of the cable
A cable harness, more specifically a high-voltage cable harness for a motor vehicle, is provided. The cable harness has at least one electric cable, which includes an electric line and a shield that surrounds the line, as well as a device for leading-through and for connecting the shield of the cable. The device includes a lead-through element, through which a cable end is guided, as well as an under-sleeve. The under-sleeve includes a shaft and a head that is widened compared to the shaft. The under-sleeve with the shaft is inserted between the electric line and the shield as well as being retained by use of the head at the lead-through element. |
| US07893346B2 |
Integrated voltaic energy system
An integrated voltaic energy system incorporates a bio-friendly DC power generator with a photovoltaic (PV) system connected to feed a main service panel and a utility grid. A plurality of inverters are connected one each, to a respective output of one of a plurality of photovoltaic (PV) solar arrays. The outputs of each of the inverters are connected to a main service panel and a utility grid. A further inverter is connected to the DC power generator and in parallel with the other inverters. The DC power generator is also connected to each of the PV solar panel inverters through a switch operated at a specific time manually or automatically. When switched the DC power generator feeds all of the inverters. A resistor/capacitor structure is connected between the DC power generator and each inverter. A self-powered timer may control the output level of the DC power generator. |
| US07893345B2 |
Thermoelectric module device
A thermoelectric module device includes a first substrate having inner and outer surfaces, a second substrate having inner and outer surfaces, a Peltier-junction module sandwiched between the inner surfaces of the first and second substrates, the Peltier-junction module being made up of a series of Peltier junctions including a pair of outermost Peltier junctions, a pair of power supply electrodes connected to the pair of the outermost Peltier junctions, respectively, and a metallization layer provided on the outer surface of the second substrate for being soldered to a package, the metallization layer being divided into spaced first and second portions which correspond to the Peltier-junction module and the pair of power supply electrodes, respectively. |
| US07893343B2 |
Musical instrument digital interface parameter storage
This disclosure describes techniques for processing audio files that comply with the musical instrument digital interface (MIDI) format. In particular, this disclosure describes storage of MIDI parameters for efficient access by a processor and a hardware unit. The processor may be a digital signal processor (DSP) and the hardware unit may be specifically designed to process MIDI parameters. In one aspect, this disclosure provides an apparatus comprising a processor that converts a MIDI event into MIDI parameters, a hardware unit that uses MIDI parameters to generate audio samples, and a plurality of storage units that store MIDI parameters which are accessible by both the processor and the hardware unit. |
| US07893342B2 |
Information processing terminal and music information generating program
An object of the present invention is to provide an information processing terminal that specifies emotions from a voice and audio outputs music suitable for the specified emotions to enable the emotions of a loudspeaker who uttered the voice to be recognized readily.In an information processing terminal according to the present invention, an emotion inferring unit 23 detects, from sound information, at least two emotions of an utterer who uttered a voice included in the sound information, and a music data generating unit 24 synthesizes music data, stored in a music parts database 242 and corresponding to the emotions detected by the emotion inferring unit 23, and a controller 22 reproduces the music data generated by the music data generating unit 24. |
| US07893338B2 |
Method of composing music on a handheld device
A musical sequence is formed on the keypad of a handheld electronic device. The numbered keys on the keypad of the handheld device are mapped directly to corresponding notes in an octave. The sequence of musical notes is entered by depressing at least one numbered key on the keypad and displaying a numerical representation of the sequence on the display screen of the handheld device. |
| US07893331B2 |
Music string
A music string (1), in particular for bowing and/or plucking instruments, wherein the music string (1) has at least one core (2) including at least a first core element (3), and wherein the music string (1) has at least one wrap (4), which is arranged around the first core (2), in particular in a helicoid manner. In order to adapt the characteristics of a stringed musical instrument to changed circumstances and/or in order to avoid problems of a stringed musical instrument without having to keep a great number of different music strings in stock, it is proposed that the music string (1) has first means (5) to change its vibration and/or sound and/or handling characteristics in a predefined manner. |
| US07893330B1 |
Stringed instrument construction
An ergonomic guitar wherein the plane of the strings is shifted toward the player as a result of its overall construction. It includes a guitar body having a center spine region in the form of an open-top channel. The guitar neck is advantageously fitted and clamped to the bottom wall of the channel in a manner which assures maximum sustain and tonal quality of the instrument. |
| US07893325B2 |
Brassica plant resistant to the fungus Leptosphaeria maculans (blackleg)
The invention relates to fungal disease resistance, in particular to resistance to blackleg disease caused by Leptosphaeria maculans. Provided are Brassica plants and seeds comprising a fragment of chromosome 8 of a wild B. rapa accession in their genome, wherein this fragment comprises a blackleg resistance locus. Further provided are molecular markers linked to the blackleg resistance locus and methods of using the markers. Brassica plants and seeds with stacked blackleg resistance loci are also provided. |
| US07893320B2 |
Method for producing multiple unsaturated fatty acids in plants
The present invention relates to a method for the production of fatty acid esters which comprise unsaturated fatty acids with at least three double bonds, and to free unsaturated fatty acids with a content of at least 1% by weight based on the total fatty acids present in the plants, by expressing at least one nucleic acid sequence which encodes a polypeptide with Δ6-desaturase activity and at least one nucleic acid sequence which encodes a polypeptide with Δ6-elongase activity. Advantageously, these nucleic acid sequences can, if appropriate, be expressed in the transgenic plant together with a third nucleic acid sequence which encodes a polypeptide with Δ5-desaturase activity. The invention furthermore relates to the use of defined nucleic acid sequences which encode polypeptides with a Δ6-desaturase activity, Δ6-elongase activity or Δ5-desaturase activity selected from a group of nucleic acid sequences, and/or to the use of nucleic acid constructs comprising the abovementioned nucleic acid sequences. |
| US07893319B2 |
Nucleotide sequences mediating plant male fertility and method of using same
Nucleotide sequences mediating male fertility in plants are described, with DNA molecule and amino acid sequences set forth. Promoter sequences and their essential regions are also identified. The nucleotide sequences are useful in mediating male fertility in plants. In one such method, the homozygous recessive condition of male sterility causing alleles is maintained after crossing with a second plant, where the second plant contains a restoring transgene construct having a nucleotide sequence which reverses the homozygous condition. The restoring sequence is linked with a hemizygous sequence encoding a product inhibiting formation or function of male gametes. The maintainer plant produces only viable male gametes which do not contain the restoring transgene construct. Increase of the maintainer plant is also provided by self-fertilization, and selection for seed or plants which contain the construct. |
| US07893317B2 |
Nucleotide sequences mediating plant male fertility and method of using same
Nucleotide sequences mediating male fertility in plants are described, with DNA molecule and amino acid sequences set forth. Promoter sequences and their essential regions are also identified. The nucleotide sequences are useful in mediating male fertility in plants. In one such method, the homozygous recessive condition of male sterility causing alleles is maintained after crossing with a second plant, where the second plant contains a restoring transgene construct having a nucleotide sequence which reverses the homozygous condition. The restoring sequence is linked with a hemizygous sequence encoding a product inhibiting formation or function of male gametes. The maintainer plant produces only viable male gametes which do not contain the restoring transgene construct. Increase of the maintainer plant is also provided by self-fertilization, and selection for seed or plants which contain the construct. |
| US07893311B2 |
Method for producing ethylene and propylene
The invention is to provide a catalyst excellent in product producibility and selectivity, and in coking degradation resistance and regeneration degradation resistance, which is for production of ethylene and propylene through catalytic conversion from a hydrocarbon material. The invention relates to a method for producing ethylene and propylene through catalytic conversion from an olefin, by contacting a hydrocarbon material with a zeolite-containing shaped catalyst satisfying the following requirements (1) to (6), in a reactor: (1) the zeolite is an intermediate pore-size zeolite having a pore size of from 5 to 6.5 angstroms, (2) the zeolite does not substantially contain a proton, (3) the zeolite contains at least one metal selected from the group consisting of metals belonging to the Group IB of the Periodic Table, (4) the zeolite-containing shaped catalyst comprises silica as a binder, (5) the zeolite-containing shaped catalyst has a side-crush strength of at least 2.5 N/mm, (6) the zeolite-containing shaped catalyst has a sodium content of 500 ppm or less as an H-exchange type thereof. |
| US07893304B2 |
Hydroquinone long-chain derivatives and/or phenoxy long-chain derivatives, and pharmaceuticals comprising the same
The present invention provides compounds that are useful for preventing or treating brain dysfunctions, motor dysfunctions, or urinary dysfunctions caused by the degeneration and/or loss of the central nervous system or peripheral nervous system cells. |
| US07893302B2 |
Lipid nanoparticle based compositions and methods for the delivery of biologically active molecules
The present invention relates to novel cationic lipids, transfection agents, microparticles, nanoparticles, and short interfering nucleic acid (siNA) molecules. The invention also features compositions, and methods of use for the study, diagnosis, and treatment of traits, diseases and conditions that respond to the modulation of gene expression and/or activity in a subject or organism. Specifically, the invention relates to novel cationic lipids, microparticles, nanoparticles and transfection agents that effectively transfect or deliver biologically active molecules. |
| US07893301B2 |
Method of preparing polymethylene-polyphenyl-polyamine
The present invention provides a method of preparing polymethylene-polyphenyl-polyamine (briefly referred to as polyamine, DAM), in which a high gravity rotating bed is used as the mixing reactor of formaldehyde and aniline hydrochloride, the mixing solution of aniline hydrochloride and circulation solution and the formaldehyde are fed into the high gravity rotating bed reactor proportionally to carry out mixing and condensation reaction under a condition of a very high gravity; the materials leaving the high gravity rotating bed reactor is introduced into a stirred vessel to proceed with the pre-condensation reaction and obtain a condensation solution; and the process steps of heating, molecular rearrangement, neutralization, water washing and purification, etc. are completed to obtain the refined DAM. With the method according to the present invention, the main by-products is obviously reduced in the condensation process, the phenomenon of deposit attaching to the inner walls of circulation pipes and heat exchanger and blockage are prevented in the condensation process, the impurity content is low in the refined DAM, and the subsequent product MDI has a lighter color, the product quality is stable and may be improved to a certain extent. |
| US07893300B2 |
Process for the preparation of polymorphs of selective serotonin reuptake inhibitor
The present invention is directed to Form II, III, IV and V of sertraline hydrochloride and methods for its preparation. According to the present invention, the various polymorphs of sertraline hydrochloride may be produced either, directly from sertraline base or sertraline acetate. |
| US07893296B2 |
Method for producing an optically active β-amino acid
Disclosed is a producing method of an optically active β-amino acid useful as intermediate for the production of medicines, agricultural. chemicals and physiologically active substances, by means of a catalytic and asymmetric synthesis method of high performance and a high enantiomeric excess, without requiring additional procedures such as introduction and removal of protecting group and so on. The method includes subjecting an enamine to an asymmetric hydrogenation. |
| US07893291B2 |
Methods employing and compositions containing defined oxidized phospholipids for prevention and treatment of atherosclerosis
Novel synthetic forms of etherified oxidized phospholipids and methods of utilizing same for preventing and treating atherosclerosis and other related disorders, as well as inflammatory disorders, immune mediated diseases, autoimmune diseases and proliferative disorders, are provided. In addition, methods of synthesizing etherified and esterified oxidized phospholipids and of using same for preventing and treating atherosclerosis and other related disorders are also provided. |
| US07893288B2 |
Poly-halogenated triazapentadiene compositions
A new class of fluorinated or polyhalogenated triazepentadienes are disclosed. The synthesized triazapentadienes are thermally stable, soluble in typical solvents and have several metal binding sites for complexation with metal ions. The compounds are prepared as colorless crystalline solids. Synthesis takes advantage of a reaction with triethylamine. Synthesized triazapentadienes (with and without complexed metals) inhibit bacterial growth of both Gram positive and Gram-negative bacteria. |
| US07893287B2 |
Methods of preparing hydroxy functional vegetable oils
Simple, economical preparative processes for the provision of pure hydroxyl functional materials that are derived by converting the alkene groups of the unsaturated molecules found in vegetable oils, into hydroxyl groups. |
| US07893284B2 |
Oestrogen derivatives as inhibitors of steroid sulphatase
The present invention provides a compound comprising a steroidal ring system and an optional group R1 selected from any one of —OH, a sulphamate group, a phosphonate group, a thiophosphonate group, a sulphonate group or a sulphonamide group; wherein the D ring of the steroidal ring system is substituted by a group R2 of the formula -L-R3, wherein L is an optional linker group and R3 is selected from groups which are or which comprise one of a nitrite group, an alcohol, an ester, an ether, an amine and an alkene, provided that when R3 is or comprises an alcohol, L is present; and wherein the A ring of the steroidal ring system is substituted at position 2 or 4 with a group R4, wherein R4 is a hydrocarbyl group. |
| US07893283B2 |
Semi-synthesis of taxane intermediates and their conversion to paclitaxel and docetaxel
A process is provided for the semi-synthesis of taxane intermediates useful in the preparation of paclitaxel and docetaxel, in particular, the semi-synthesis of protected taxane intermediates. |
| US07893282B2 |
7-substituted fused ring tetracycline compounds
7-substituted fused ring tetracycline compounds, methods of treating tetracycline responsive states, and pharmaceutical compositions containing the 7-substituted fused ring tetracycline compounds are described. |
| US07893280B2 |
2,4-disubstituted thiazolyl derivatives
This invention concerns the use of a compound of formula (I′) a N-oxide, pharmaceutically acceptable addition salt, quaternary amine and stereochemically isomeric form thereof, wherein Q is optionally substituted C3-6cycloalkyl, phenyl, naphthyl, pyridyl, pyrimidinyl, pyrazinyl, pyridazinyl, benzthiazolyl, benzoxazolyl, benzimidazolyl, indazolyl, or imidazopyridyl; or Q is a radical of formula wherein X and Y each independently are O, NR3, CH2 or S, with R3 being hydrogen or C1-4alkyl; q is 1 to 4; Z is O or NR4 with R4 being hydrogen or C1-4alkyl; r is 1 to 3; L is optionally substituted phenyl or L is Het with Het being an optionally substituted five- or six-membered heterocyclic ring or an optionally substituted bicyclic heterocyclic ring; for the manufacture of a medicament for the prevention or the treatment of diseases mediated through cytokines. |
| US07893279B2 |
Cyclohexanecarboxylic acid compound
The present invention provides a VLA-4 inhibitor having high water-solubility and excellent long-term stability; i.e., sodium trans-4-[1-[2,5-dichloro-4-[(1-methyl-1H-3-indolylcarbonyl)amino]phenylacetyl]-(4S)-methoxy-(2S)-pyrrolidinylmethoxy]cyclohexanecarboxylate pentahydrate. |
| US07893278B2 |
CIS-imidazolines
The present invention relates to compounds of the formula and the pharmaceutically acceptable salts and esters thereof, a process for their manufacture, medicaments containing them as well as the use of these compounds as pharmaceutically active agents. The compounds show antiproliferative activity and may be especially useful for the treatment of cancer. |
| US07893277B2 |
Poly(ethylene glycol) containing chemically disparate endgroups
The present invention provides bifunctional polymers, methods of preparing the same, and intermediates thereto. These compounds are useful in a variety of applications including the PEGylation of biologically active molecules. The invention also provides methods of using said compounds and compositions thereof. |
| US07893275B2 |
Polycyclic ketone compound and process for producing the same
The present application provides polycyclic ketone compounds that have a quarternary asymmetric carbon center and conform to Formula (I): Also provided is a stereoselective method for synthesizing the polycyclic ketone compounds. |
| US07893274B2 |
Process for producing amino acid N-carboxyanhydride
The present invention provides a process for producing an amino acid N-carboxyanhydride, which comprises reacting an amino acid or a derivative thereof with a compound represented by the following formula (1): wherein R1 and R2 represent the same or different electron-withdrawing substituents and each independently are an optionally substituted acyl group, an optionally substituted alkyloxycarbonyl group, an optionally substituted perfluoroalkyl group, an optionally substituted perchloroalkyl group, a cyano group, a halogen atom, or a nitro group; and a and b are the same or different and each are an integer of 1-5. |
| US07893272B2 |
Reagents and kits for detection of influenza virus and the like
The present invention relates to reagents and methods for influenza virus detection. These reagents and methods disclosed in the present invention enable simple, rapid, specific and sensitive detection of influenza virus types A and B. These reagents are N-acetylneuraminic acid-firefly luciferin conjugates which can be cleaved by influenza virus neuraminidase. |
| US07893270B2 |
Process for the production of cyclic diketones
The present invention relates to a process for the preparation of compounds of formula (I), wherein the substituents are as defined in claim 1, by reacting a compound of formula (II), with a bromine or chlorine source to form a compound of formula (III), wherein X is chlorine or bromine; reacting that compound with water to form the compound of formula (IV), converting that compound, using a compound of formula (V), wherein M+ is the hydrogen cation or an alkali metal ion, alkaline earth metal ion or ammonium ion, into the compound of formula (VI), and treating that compound with a cyanide source in the presence of a base. |
| US07893266B2 |
Detection of cancer cells in vitro using sigma-2 receptor ligands as radiotracers
Methods for detection of cancer cells and for determining the proliferative status of cells in a tissue sample in vitro are disclosed. These methods comprise contacting a tissue sample with a radiolabeled compound or salt thereof of Formula wherein at least one of X, Y, and Z comprises a radioisotope, n is an integer from 2 to about 10; and each of A and A1 is a C1-C4 alkoxyl, a C1-C4 fluoroalkyl or a C1-C4 fluoroalkoxyl. The methods further comprise detecting the distribution of the radioisotope in the tissue sample, whereby a cell having a high density of the radioisotope compared to quiescent cells is diagnostic for a cancer cell. |
| US07893259B2 |
Pyrido-pyrimidine derivatives, preparation thereof, and therapeutic use thereof
The disclosure concerns pyrido[2,3-d]pyrimidine derivatives, their preparation and their therapeutic application, of general formula (I): and acid addition salts, hydrates and solvates thereof, as well as in the form of enantiomers, diastereoisomers and mixtures thereof. The disclosure also concerns methods for preparing said derivatives, pharmaceutical compositions containing a compound of general formula (I), and their therapeutic use. |
| US07893257B2 |
Process for the preparation of piperazinyl and diazepanyl benzamide derivatives
The present invention is directed to a novel process for the preparation of piperazinyl and diazepanyl benzamide derivatives, useful for the treatment of disorders and conditions mediated by a histamine receptor, preferably the H3 receptor. |
| US07893256B2 |
Azabicycloalkane compounds
This invention provides compounds of formula I: wherein R1, R2, R3, R4, R5, R6 and R7 are as defined in the specification, or a pharmaceutically acceptable salt or solvate or stereoisomer thereof. The compounds of this invention possess both β2 adrenergic receptor agonist and muscarinic receptor antagonist activity. Such compounds are useful for treating pulmonary disorders, such as chronic obstructive pulmonary disease and asthma. |
| US07893243B2 |
Composition and methods of RNAi therapeutics for treatment of cancer and other neovascularization diseases
Compositions and methods are provided for treatment of diseases involving unwanted neovascularization (NV). The invention provides treatments that control NV through selective inhibition of pro-angiogenic biochemical pathways, including inhibition of the VEGF pathway gene expression and inhibition localized at pathological NV tissues. Tissue targeted nanoparticle compositions comprising polymer conjugates and nucleic acid molecules that induce RNA interference (RNAi) are provided. The nanoparticle compositions of the invention can be used alone or in combination with other therapeutic agents such as VEGF pathway antagonists. The compositions and methods can be used for the treatment of NV diseases such as cancer, ocular disease, arthritis, and inflammatory diseases. |
| US07893242B2 |
Oligonucleotide compositions and their use to induce apoptosis
The present invention provides novel synthetic oligonucleotide sequences (hereinafter sequence) of 3 to 9 bases in length comprising one or more non-DNA bases wherein the bases are nebularine, hypoxanthine, or uracil, or combinations of nebularine, hypoxanthine and uracil bases. These sequences optionally further comprise one or more guanine bases or one or more thymine bases, or combinations thereof. The present invention also provides methods of using these compositions to induce responses in cells, and to treat diseases and conditions characterized by undesired cellular proliferation such as autoimmune disease, lymphoproliferative disease, inflammation or cancer. |
| US07893240B2 |
High level expression of recombinant human erythropoietin having a modified 5′-UTR
The present invention provides an expression construct capable of producing high levels of erythropoietin in mammalian cells. More particularly, the expression construct includes an erythropoietin coding region fused to a unique 5′-UTR sequence and a truncated 3′-UTR. The present invention also provides methods of synthesizing large amounts of erythropoietin and in increasing serum erythropoietin level in individuals in need thereof. |
| US07893237B2 |
Haemophilus influenzae type IV pili
The invention described herein relates to a Haemophilus influenzae (H. influenzae) regulon encoding type IV pili. In particular, the invention relates to type IV pili from nontypeable H. influenzae (NTHi) and from H. influenzae strains a, b, c, e and f. The invention provides isolated H. influenzae pilus polynucleotides and polypeptides encoded by the polynucleotides as well as polynucleotides and polypeptides encoded by the polynucleotides involved in the assembly/disassembly of the structure. The invention also relates to uses of these polynucleotides and/or polypeptides including methods for eliciting an immune response to H. influenzae and methods of treating and preventing H. influenzae related pathological conditions. |
| US07893236B2 |
Soybean isopentenyl transferase genes and methods of use
Methods and compositions for modulating plant development are provided. Polynucleotide sequences encoding isopentenyl transferase (IPT) polypeptides are provided, as are the amino acid sequences of the encoded polypeptides. The sequences can be used in a variety of methods including modulating root development, modulating floral development, modulating leaf and/or shoot development, modulating senescence, modulating seed size and/or weight and modulating tolerance of plants to abiotic stress. Transformed plants, plant cells, tissues and seed are also provided. |
| US07893231B2 |
Alleles of the PRPD1 gene from coryneform bacteria
An isolated mutant of coryneform bacteria comprising a gene encodes a polypeptide having 2-methylcitrate dehydratase activity, where the polypeptide comprises an amino acid sequence in which one of the proteinogenic amino acids except L-proline is present at position 272 or a corresponding or comparable position. In addition, an isolated polynucleotide encoding a polypeptide having 2-methylcitrate dehydratase enzymic activity, which comprises at position 272 of the amino acid sequence or a corresponding or comparable position a proteinogenic amino acid except L-proline is described. A method for producing a recombinant coryneform bacterium and L-amino acids. A recombinant microorganism, L-Lysine-containing feed additive, and L-Tryptophan-containing feed additive is also described. |
| US07893229B2 |
Peptides comprising repetitive units of amino acids and DNA sequences encoding the same
Novel polypeptides comprising repetitive units of amino acids, as well as synthetic genes encoding the subject polypeptides are provided. The subject polypeptides are characterized by comprising repetitive units of amino acids, where the repetitive units are present in naturally occurring proteins, particularly naturally occurring structural proteins. The subject polypeptides find use in a variety of applications, such as structural components of prosthetic devices, synthetic fibers, and the like. |
| US07893226B2 |
Use of lipid conjugates in the treatment of diseases
This invention provides compounds represented by the structure of the general formula (A): wherein L is a lipid or a phospholipid, Z is either nothing, ethanolamine, serine, inositol, choline, or glycerol, Y is either nothing or a spacer group ranging in length from 2 to 30 atoms, X is a physiologically acceptable monomer, dimer, oligomer, or polymer, wherein X is a glycosaminoglycan; and n is a number from 1 to 1000, wherein any bond between L, Z, Y and X is either an amide or an esteric bond. |
| US07893218B2 |
Antibodies that specifically bind SOST peptides
The present invention is directed to isolated polypeptides and antibodies suitable for producing therapeutic preparations, methods, and kits relating to bone deposition. One objective of the present invention is to provide compositions that improve bone deposition. Yet another objective of the present invention is to provide methods and compositions to be utilized in diagnosing bone dysregulation. The therapeutic compositions and methods of the present invention are related to the regulation of Wise, Sost, and closely related sequences. In particular, the nucleic acid sequences and polypeptides include Wise and Sost as well as a family of molecules that express a cysteine knot polypeptide. |
| US07893216B2 |
Anti-human trail receptor DR5 monoclonal antibody (AD5-10), method thereof and use of the same
The present invention discloses a monoclonal antibody against the extracellular domain of human tumor necrosis factor-related apoptosis-inducing ligand receptor DR5 (death receptor 5). The present invention also provides a method of producing the monoclonal antibody, amino acid sequences of the variable regions of the monoclonal antibody's heavy chain and light chain, as well as use of the monoclonal antibody for preparation of a medicament in the treatment of various cancers and/or AIDS. |
| US07893214B2 |
Humanized antibodies that recognize beta amyloid peptide
The invention provides improved agents and methods for treatment of diseases associated with amyloid deposits of Aβ in the brain of a patient. Preferred agents include humanized antibodies. |
| US07893202B1 |
Post-translational modifications and Clostridial neurotoxins
The present invention discloses modified neurotoxins with altered biological persistence. In one embodiment, the modified neurotoxins are derived from Clostridial botulinum toxins. Such modified neurotoxins may be employed in treating various conditions, including but not limited to muscular disorders, hyperhidrosis, and pain. |
| US07893199B2 |
Peptides having neutrophil-stimulating activity
A peptide having a sequence which satisfies all of the following requirements (I) to (V) and has an activity of stimulating an immune cell: (I) the number of constituent amino acid residues is 12 to 36; (II) the sequence is amphipathic; (III) the charge of the whole molecule is +2 or more; (IV) when constituent amino acid residues are arranged so as to form an a-helical structure, a side chain of any aromatic amino acid residue is not located between side chains of at least two positively charged amino acid residues on a side where hydrophilic amino acid residues are located; and (V) the sequence contains an amino acid residue which serves as a cleavage point for a mitochondrial processing enzyme. |
| US07893198B2 |
Multilayer films, coatings, and microcapsules comprising polypeptides
Disclosed herein is a multilayer film comprising two or more layers of polyelectrolytes, wherein adjacent layers comprise oppositely charged polyelectrolytes. A first layer polyelectrolye comprises a composite polypeptide comprising one or more surface adsorption regions covalently linked to one or more functional regions forming a single polypeptide chain. The surface adsorption regions comprise one or more amino acid sequence motifs consisting of 5 to 15 amino acid residues. The one or more functional regions comprise 3 to about 250 amino acid residues. |
| US07893196B2 |
Polypeptides having antimicrobial activity and polynucleotides encoding same
The present invention relates to isolated polypeptides having antimicrobial activity and isolated polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods for producing and using the polypeptides. |
| US07893191B2 |
Fused thiophenes, methods for making fused thiophenes, and uses thereof
Described herein are compositions including heterocyclic organic compounds such as fused thiophene compounds, methods for making them, and uses thereof. |
| US07893190B2 |
Alternating copolymers of phenylene vinylene and oligoarylene vinylene, preparation method thereof, and organic thin film transister comprising the same
Disclosed herein are an alternating copolymer of phenylene vinylene and oligoarylene vinylene, a preparation method thereof, and an organic thin film transistor including the same. The organic thin film transistor maintains low off-state leakage current and realizes a high on/off current ratio and high charge mobility because the organic active layer thereof is formed of an alternating copolymer of phenylene vinylene and oligoarylene vinylene. |
| US07893189B2 |
Poly(ether-ester) polyols and processes for their production
The invention is directed to novel poly(ether-ester)polyols, processes for their production from monocarboxylic or polycarboxylic acid esters with one or more bound polyether chain(s). This invention also relates to the production of polyurethane materials in which the isocyanate-reactive component comprises these poly(ether-ester)polyols. |
| US07893188B2 |
Baby bottles comprising polyester compositions which comprise cyclobutanediol
Described are baby bottle(s) comprising polyesters comprising (a) a dicarboxylic acid component having terephthalic acid or an ester thereof; optionally, an aromatic dicarboxylic acid or aliphatic dicarboxylic acid or esters thereof; 2,2,4,4-tetramethyl-1,3-cyclobutanediol; and 1,4-cyclohexanedimethanol. |
| US07893184B2 |
Method for producing dendritic or hyperbranched polyurethanes
Dendritic or hyperbranched polyurethanes are prepared by 1) reacting diols or polyols having at least one tertiary nitrogen atom and at least two hydroxyl groups of differing reactivity toward isocyanate groups with diisocyanates or polyisocyanates to form an addition product, with the diols or polyols and diisocyanates or polyisocyanates being selected so that the addition product has, on average, one isocyanate group and more than one hydroxyl group or one hydroxyl group and more than one isocyanate group, 2) converting the addition product from step 1) into a polyaddition product by intermolecular reaction of the hydroxyl groups with the isocyanate groups, and with a reaction with a compound containing at least two hydroxyl groups, mercapto groups, amino groups or isocyanate groups also being able to be carried out first, 3) if desired reacting the polyaddition product from step 2) with a compound containing at least two hydroxyl groups, mercapto groups, amino groups or isocyanate groups. |
| US07893183B2 |
Epoxy silane oligomer and coating composition containing same
A process for producing an epoxy silane oligomer including a reaction glycidoxy silane and/or cycloaliphatic epoxy silane having 2 or 3 alkoxy groups and, optionally, a copolymerizable silane other than glycidoxy and cycloaliphatic epoxy silane, with less than 1.5 equivalents of water in the presence of a catalyst, wherein said water is continuously fed during the reaction. |
| US07893171B2 |
Polymer compositions for reduced shrinkage
A polymeric composition comprising a polymer and a nucleation agent, and having isotropic shrinkage of less than about 20% and a differential shrinkage of less than about 20%. |
| US07893168B2 |
Hydrophobic linear polyrotaxane molecule and crosslinked polyrotaxane
To provide a hydrophobic linear polyrotaxane molecule which is soluble in an organic solvent, and a crosslinked polyrotaxane using the same.A hydrophobic linear polyrotaxane molecule has a cyclic molecule, a linear molecule including the cyclic molecule with piercing through the cyclic molecule, and blocking groups placed at both end terminals of the linear molecule to prevent the cyclic molecule from leaving from the linear molecule. The linear molecule is hydrophobic. The linear molecule is polycaprolactone and has a molecular weight ranging from 5,000 to 100,000. The cyclic molecule is α-cyclodextrin, β-cyclodextrin or γ-cyclodextrin.A crosslinked polyrotaxane is formed by combining the hydrophobic linear polyrotaxane molecule and a polymer through the cyclic molecule. |
| US07893167B2 |
Sealing film for solar cell and solar cell using the sealing film
The object of the present invention is to provide a sealing film having excellent productivity, and improved light resistance and heat resistance, and a solar cell provided with the sealing film.A sealing film for a solar cell comprising ethylene-vinyl acetate copolymer and an organic peroxide, wherein the organic peroxide comprises an organic peroxide A having a 10 hour half-life in the range of 110 to 130° C. in and an organic peroxide B having a 10 hour half-life in the range of 80 to 100° C.; and a solar cell having the sealing film. |
| US07893166B2 |
Ethylene/alpha-olefins block interpolymers
Embodiments of the invention provide a class of ethylene/α-olefin block interpolymers. The ethylene/α-olefin interpolymers are characterized by an average block index, ABI, which is greater than zero and up to about 1.0 and a molecular weight distribution, Mw/Mn, greater than about 1.3. Preferably, the block index is from about 0.2 to about 1. In addition or alternatively, the block ethylene/α-olefin interpolymer is characterized by having at least one fraction obtained by Temperature Rising Elution Fractionation (“TREF”), wherein the fraction has a block index greater than about 0.3 and up to about 1.0 and the ethylene/α-olefin interpolymer has a molecular weight distribution, Mw/Mn, greater than about 1.3. |
| US07893165B2 |
Metal-containing inorganic block copolymers
There are provided in accordance with embodiments of the invention metal-containing inorganic block copolymers, structures formed by self-assembly of such copolymers, and metal-containing ceramics which may be formed from such copolymers and/or structure. Methods for making such copolymers, structures and ceramics are also provided. Other embodiments are also disclosed. |
| US07893159B2 |
Blends of styrenic block copolymers and propylene-alpha olefin copolymers
The present invention includes a composition comprising a propylene-alpha olefin copolymer having at least seventy weight percent units derived from propylene, and from ten to twenty five weight percent units derived from ethylene or a C4-C10 alpha olefin, the propylene-alpha olefin copolymer exhibiting a heat of fusion of less than 37 Joules/gram and a melt flow rate of from 0.1 to 100 gram/10 minutes; and a styrenic block copolymer, wherein the weight ratio of the propylene-alpha olefin copolymer to the styrenic block copolymer is from 3:7 to 7:3. The composition exhibits tensile modulus of less than 20 MPa, tensile strength of at least 5 MPa, and elongation at break of at least 900% with low relative immediate set. |
| US07893158B2 |
Poly(trimethylene-ethylene ether) glycols
Block poly(trimethylene-ethylene ether) glycols are disclosed. The block poly(trimethylene-ethylene ether) glycols can be prepared by the polycondensation of 1,3-propanediol reactant and polyethylene glycol reactant. The block poly(trimethylene-ethylene ether) glycols can be used in breathable membranes, synthetic lubricants, hydraulic fluids, cutting oils, motor oils, surfactants, spin-finishes, water-borne coatings, laminates, adhesives, packaging, films and foams, fibers and fabrics. |
| US07893157B2 |
Polymeric compositions having low glass transition temperatures
The present invention provides polymeric compositions having a high polymer size and a low Tg. These novel compositions are useful as plastic additives. Also provided is a method of improving the processing of a matrix resin by adding one or more of the novel polymeric compositions. |
| US07893152B2 |
Polymers and other groups attached to pigments and subsequent reactions
Methods of making a modified pigment by reacting a first chemical group and a second chemical group to form a pigment having attached a third chemical group. The first chemical group includes at least one nucleophile and the second chemical group includes at least one electrophile, or vice versa. Resulting modified pigments, and ink compositions containing such pigments, are also described. |
| US07893148B2 |
Nanocomposites of polymers with dispersed nanotubes
The present invention provides polymer nanocomposites with dispersed nanotubes and methods of making same. The polymer may be a polyether. For example, the present invention provides an effective method to successfully disperse single walled nanotubes (SWNTs) into both Polyethylenoxide (PEO) and its low molecular weight analog polyethylene glycol (PEG) with hydrodynamic percolation at about 0.09 wt % and an electrical percolation at about 0.03 wt % SWNTs at room temperature, and the resulting nanocomposites. The method may include providing a surfactant. Most notably the present inventors achieved a decrease in the melting point of the polymer and a retardation of polymer crystallization due to the presence of the nanotubes. |
| US07893147B2 |
Radial tire
There is provided a radial tire reducing rolling resistance by having a breaker cushion or a side wall packing comprising a rubber composition in which the loss tangent tan δ is reduced and the complex elastic modulus E* and the fracture feature are improved in good balance. A radial tire having a breaker cushion or a side wall packing comprising a rubber composition containing 20 to 55 parts by weight of carbon black having an iodine adsorption amount of 25 to 75 mg/g and a DBP oil absorption amount of 110 to 150 ml/100 g and 5 to 30 parts by weight of silica having a BET specific surface area of 115 to 200 m2/g based on 100 parts by weight of a rubber component. |
| US07893133B2 |
Adhesion enhancer for polymer composition substrate and polymer composition containing the same
The present invention provides an adhesion enhancer and a polymer composition containing the adhesion enhancer for enhancing the adhesion performance of polymer composition substrates to a primer. The adhesion enhancer of the present invention includes an alcohol, a phenol or another organic compound having a hydroxyl group of the alcohol or phenol and another functional group as supported by a porous material, or a master batch prepared by mixing a polymer with the above organic compound as supported on a porous material. The polymer composition substrate obtained by adding more than 0.5 part by weight of the adhesion enhancer based on 100 parts by weight of the polymer to a normal polymer composition shows good adhesion to a primer having an isocyanate group without a separate process of making a coarse surface of the substrate or an abrasion process using an organic solvent. |
| US07893132B2 |
Power or communications cable with flame retardant polymer layer
The present invention in a first embodiment relates to a conduit or automotive wire consisting of an inner conductor core surrounded by a flame retardant layer made of a polymer composition in a continuous process which composition comprises (A) an olefin homo- and/or copolymer, (B) a silicone-group containing compound, and (C) an inorganic filler, wherein the ratio of the MFR2 measured under a load of 2.16 kg and at a temperature of 190° C. of component (A) to the MFR2 measured under a load of 2.16 kg and at a temperature of 190° C. of the composition is higher than 3.5, and the wire has a length of at least 100 m. In a second embodiment, the present invention relates to a power or communications cable or wire comprising a flame retardant layer made of a polymer composition comprising (A) an olefin homo- and/or copolymer, (B) a silicone-group containing compound, and (C) an inorganic filler, wherein the ratio of the MFR2 measured under a load of 2.16 kg and at a temperature of 190° C. of component (A) to the MFR2 measured under a load of 2.16 kg and at a temperature of 190° C. of the composition is higher than 3.5, the cable or wire further comprising at least one further layer. |
| US07893130B2 |
Photocurable dental composition
Dental compositions are described which are photocurable by radiation with a wavelength greater than 390 nm. The compositions include a cationically active compound, a dental filler, optionally a dispersant, a cationic photoinitiator and a photosensitizer which is a thioxanthone salt substituted by at least one group containing an ammonium function. The composition has the advantage of remedying the color stability problems of finished dental products after crosslinking. |
| US07893117B2 |
Ion-conducting crosslinked copolymer and fuel cell comprising the same
An ion-conducting, sulfonated and crosslinked copolymer for use in a fuel cell is disclosed. The ion-conducting, sulfonated and crosslinked copolymer is made up of four monomers. The first monomer is an aromatic diol. The second monomer includes two groups, each group capable of reacting with the hydroxy groups of the first monomer, and each group independently selected from a nitro group and a halogen group. The third monomer is one of the first monomer or the second monomer, except that one of the hydrogen atoms attached to a benzene ring is substituted with —SO3Y, where Y is selected from hydrogen (H), lithium (Li), sodium (Na), potassium (K) and trialkyl ammonium of the form HNR3 where R is an alkyl group having from 1 to 5 carbon atoms. The fourth monomer includes at least three groups, each independently selected from a hydroxy group, a nitro group, and a halogen group. |
| US07893114B2 |
Silica-based sols and their production and use
The invention relates to a process for producing aqueous silica-based sols which comprises providing a cationic ion exchange resin having at least part of its ion exchange capacity in hydrogen form; bringing said ion exchange resin in contact with an aqueous alkali metal silicate to form an aqueous slurry; adjusting the pH of the aqueous slurry and separating the ion exchange resin from the aqueous slurry, as well as the silica-based sols obtained by the process; the invention also relates to silica-based sols obtained by the process, as well as a process for producing paper which comprises providing an aqueous suspension comprising cellulosic fibres; adding to the suspension one or more drainage and retention aids comprising a silica-based sol according to the invention; and dewatering the obtained suspension to provide a sheet or web of paper. |
| US07893112B2 |
Di-fluoro containing compounds as cysteine protease inhibitors
The present invention is directed to compounds that are inhibitors of cysteine proteases, in particular, cathepsins B, K, L, F, and S, and are therefore useful in treating diseases mediated by these proteases. The present invention is directed to pharmaceutical compositions comprising these compounds and processes for preparing them. |
| US07893109B2 |
N,N-dihalogenated amino acids and derivatives
The present invention relates to active bactericidal, antibacterial, anti-infective, antimicrobial, sporicidal, disinfectant, antifungal and antiviral compounds and compositions and to new uses of these compositions in therapy. This specification also describes methods of use for the new compounds and compositions. The specification further describes methods for preparing these compounds. |
| US07893108B2 |
Antiviral methods and compositions
Disclosed herein are antiviral compounds, such as anti-human cytomegalovirus antiviral compounds, pharmaceutical compositions and antiviral methods. |
| US07893107B2 |
Therapeutic methods using prostaglandin EP4 agonist components
Methods are provided directed to administering a therapeutically effective amount of a prostaglandin EP4 agonist component to a mammal afflicted with or prone to afflicted with a disease or condition selected from an esophageal ulcer, alcohol gastropathy, a duodenal ulcer, non-steroidal anti-inflammatory drug-induced gastropathy, non-steroidal anti-inflammatory drug-induced enteropathy and intestinal ischemia. Such administration results in treating the disease or condition. |
| US07893104B2 |
Process for synthesizing silver-silica particles and applications
Size-controlled immobilization of metal nano-clusters onto particles or nanoparticles is achieved using a polyol process. Polyol processing makes it possible to use thiol groups as a chemical protocol to functionalize the surface of particles, such as silica and polystyrene nanoparticles. Metal nano-clusters, such as silver, gold, platinum and palladium, nucleate and grow on the surface of the particles. The metal nano-clusters may be synthesized in a one-pot process from metal salts, nitrates, nitrites, sulfates, sulfites and the like. Any source of metal ions compatible with the polyol suspension and selected particles may be used. The size of immobilized metal nano-clusters may be controlled by additions of a poly(vinylpyrrolidone) or other polymer capable of regulating the metal ion reduction and nucleation process and by controlling concentration of metal ions, the nucleation and/or growth temperatures, and processing time. |
| US07893103B2 |
Processes for the preparation of DPP IV inhibitors
The present invention relates to novel processes for preparing DPP-IV inhibitors having the structure of formula I, and pharmaceutically acceptable salt thereof, which are useful for treatment of Type 2 diabetes. |
| US07893101B2 |
Solid forms comprising (+)-2-[1-(3-ethoxy-4-methoxyphenyl)-2-methylsulfonylethyl]-4-acetylaminoisoindoline-1,3-dione, compositions thereof, and uses thereof
Solid forms comprising (+)-2-[1-(3-Ethoxy-4-methoxyphenyl)-2-methylsulfonylethyl]-4-acetylaminoisoindoline-1,3-dione, compositions comprising the solid forms, methods of making the solid forms and methods of their use are disclosed. The methods include methods of treating and/or preventing disorders ameliorated by the reduction of levels of TNF-α or the inhibition of PDE4. |
| US07893100B2 |
Carvedilol phosphate salts and/or solvates thereof, corresponding compositions, and/or methods of treatment
The present invention relates to carvedilol phosphate salts, which include novel crystalline forms of carvedilol dihydrogen phosphate (i.e., dihydrogen phosphate salt of 1-(carbazol-4-yloxy-3-[[2-(o-methoxyphenoxy) ethyl]amino]-2-propanol) and/or carvedilol hydrogen phosphate, etc.), and/or solvates thereof, compositions containing the aforementioned salts and/or solvates, and methods of using the aforementioned salts and/or solvates to treat hypertension, congestive heart failure and angina, etc. |
| US07893099B2 |
Cyclopentane derivatives
The invention relates to a compound of formula (I) wherein A1 and R1 to R5 are defined as in the description and in the claims. The compound of formula (I) can be used as a medicament. |
| US07893095B2 |
Use of quaternary pyridinium compounds for vasoprotection and/or hepatoprotection
The invention relates to a method for the treatment or prevention of diseases or conditions associated with vascular endothelium dysfunction or liver injury comprising the administration to a patient in a need of such treatment or prevention of a therapeutically or prophylactically effective amount of a compound selected from the group consisting of: wherein R represents hydrogen atom, CH3, OH, pyridyl (C5H4N), 1-methylpyridyl (C5H4N—CH3) or pyridyl substituted with hydroxy group ((OH)C5H3N), and X represents a physiologically acceptable counterion. |
| US07893092B2 |
Anthranilamide derivatives as insecticides
Compounds of formula (I) wherein the substituents are as defined in claim 1, and the agrochemically acceptable salts and all stereoisomers and tautomeric forms of the compounds of formula (I) can be used as agrochemical active ingredients and can be prepared in a manner known per se. |
| US07893090B2 |
N-aroyl cyclic amine derivatives as orexin receptor antagonists
Disclosed are N-aroyl cyclic amine derivatives having the formula: where the variables are as define herein, and their use as pharmaceuticals, specifically as orexin receptor antagonists. |
| US07893088B2 |
6-substituted isoquinoline derivatives
The present invention relates to 6-substituted isoquinoline derivatives having the general Formula I wherein X is O, S or NH; Y is OH or NH2; m is 0, 1 or 2; n is 0 or 1; o is 0 or 1; R1 is H, when Y is NH2; or R1 is H, (C1-4)alkyl or halogen, when Y is OH; R2 and R3 are independently H, (C1-4)alkyl or halogen; R4 is H or (C1-6)alkyl, optionally substituted with halogen, (C3-7)cycloalkyl, (C6-10)aryl or a saturated 5- or 6-membered heterocyclic ring comprising 1-3 heteroatoms independently selected from O, S and N, the (C6-10)aryl and heterocyclic ring being optionally substituted with (C1-4)alkyl, (C1-4)alkyloxy or halogen; R5 is H or (C1-4)alkyl; or a pharmaceutically acceptable salt thereof, with the proviso that the compounds of Formula I wherein X is O, Y is OH , n is 0 and m+o=2 are excluded, to pharmaceutical compositions comprising the same, as well as to the use of said 6-substituted isoquinoline derivatives for the preparation of a medicament for the treatment of ROCK-I related disorders such as glaucoma, hypertension and atherosclerosis. |
| US07893087B2 |
Quinuclidine derivatives and medicinal compositions containing the same
A compound of formula (I) is provided, wherein B, A, R1, R2, R3, R4, R5 and R6 are as defined herein and X− represents a pharmaceutically acceptable anion of a mono or polyvalent acid. Processes for the preparation of such compounds and pharmaceutical compositions containing them are also provided. |
| US07893081B2 |
Tyrosine kinase inhibitors
This invention relates to salt forms of the compound N-[(2R)-1,4-dioxan-2-ylmethyl]-N-methyl-N′-[3-(1-methyl-1H-pyrazol-4-yl)-5-oxo-5H-benzo[4,5]cyclohepta[1,2-b]pyridin-7-yl]sulfamide, an inhibitor of tyrosine kinases, in particular the receptor tyrosine kinase MET, that are useful in the treatment of cellular proliferative diseases, for example cancer, hyperplasias, restenosis, cardiac hypertrophy, immune disorders and inflammation. In particular, the invention relates to the sodium salt of N-[(2R)-1,4-dioxan-2-ylmethyl]-N-methyl-N′-[3-(1-methyl-1H-pyrazol-4-yl)-5-oxo-5H-benzo[4,5]cyclohepta[1,2-b]pyridin-7-yl]sulfamide. |
| US07893080B2 |
Method of restoring the incretin effect
The present invention relates to methods of treating metabolic syndrome, Type 2 diabetes mellitus, atherogenic dyslipidemia and/or obesity. The present invention also relates to methods of restoring the incretin effect, to restoring physiologic control of glucagon levels, to restoring first-phase insulin secretion, and to restoring the physiologic glucose-dependent insulin secretion. The methods of the present invention comprise administration of a selective κ-receptor antagonist, such as guanidinylated naltrindole (GNTI), or pharmaceutically acceptable derivatives thereof to a subject in need thereof. |
| US07893078B2 |
Use of cyclopamine in the treatment of basal cell carcinoma and other tumors
This invention concerns the use of cyclopamine in vivo on basal cell carcinomas (BCC's) to achieve therapeutic effect by causing differentiation of the tumor cells and, at the same time, apoptotic death and removal of these tumor cells while preserving the normal tissue cells, including the undifferentiated cells of the normal epidermal basal layer and hair follicles. Causation of apoptosis by cyclopamine is by a non-genotoxic mechanism and thus unlike the radiation therapy and most of the currently used cancer chemotherapeutics which act by causing DNA-damage. These novel effects, previously unachieved by a cancer chemotherapeutic, make the use of cyclopamine highly desirable in cancer therapy, in the treatment of BCC's and other tumors that use the hedgehog/smoothened signal transduction pathway for proliferation and prevention of apoptosis. |
| US07893075B2 |
Compounds modulating c-fms and/or c-kit activity and uses therefor
Compounds active on the receptor protein tyrosine kinases c-kit and/or c-fms are provided herewith. Also provided herewith are compositions useful for treatment of c-kit mediated diseases or conditions and/or c-fms-mediated diseases or conditions, and methods for the use thereof. |
| US07893073B2 |
Heterocyclic derivatives
The invention relates to novel 3,4-dihydropyrimidin-2(1H)-one derivatives having the formula processes for their preparation, and their use in compositions, and in the treatment of chronic obstructive pulmonary diseases, acute coronary syndrome, acute myocardial infarction and heart failure development. |
| US07893072B2 |
Trp-p8 active compounds and therapeutic treatment methods
Compounds of the disclosure provide compositions, which are effective for prophylaxis and treatment of diseases or disorders, such as cell-proliferation, angiogenesis, or apoptosis mediated diseases. The disclosure encompasses compounds, analogs, prodrugs, metabolites, and pharmaceutically acceptable salts thereof, pharmaceutical compositions, and methods for prophylaxis and treatment of diseases and other maladies or conditions involving cancer, tumors, and like conditions. The disclosure also provides therapeutic methods including the administration of an effective amount of a compound of the disclosure. |
| US07893069B2 |
Substituted imidazo[2,1-b]thiazole compounds and uses thereof
Substituted imidazo[2,1-b]thiazole compounds corresponding to formula I, a method for producing them, pharmaceutical compositions containing them, and the use thereof for regularing mGluR5 receptors, or for treating or inhibiting disorders or disease states at least partially mediated by mGluR5 receptor such as pain, anxiety attacks, drug or alcohol dependency, and others. |
| US07893068B2 |
Physiologically active substances
The present invention relates to a compound represented by the formula (I): (wherein, R3, R6, R7 and R21 are the same as or different from one another and each represents a hydroxyl group etc.), a pharmacologically acceptable salt thereof or a hydrate of them. The compound (I) of the present invention suppresses angiogenesis, in particular, suppresses VEGF production in a hypoxic condition and is useful as a therapeutic agent for treating solid cancer. |
| US07893066B2 |
Pyridol[2,3-B]pyrazinones for use as stearoyl CoA desaturase inhibitors
The present invention discloses pyrido[2,3-B]pyrazinones having the structure of Formula I for use as inhibitors of stearoyl-CoA desaturase. The compounds are useful in treating and/or preventing various human diseases, mediated by stearoyl-CoA desaturase (SCD) enzymes, especially diseases related to abnormal lipid levels, cardiovascular disease, diabetes, obesity, oily skin conditions, metabolic syndrome, and the like. |
| US07893065B2 |
Heterocyclic inhibitors of MEK and methods of use thereof
Disclosed are compounds of the Formula I and pharmaceutically acceptable salts and prodrugs thereof, wherein R1, R2, R7, R8, R9, and W are as defined in the specification. Such compounds are MEK inhibitors and are useful in the treatment of hyperproliferative diseases, such as cancer and inflammation, and inflammatory conditions in mammals. Also disclosed are methods of using such compounds in the treatment of hyperproliferative and inflammatory diseases in mammals and pharmaceutical compositions containing such compounds. |
| US07893064B2 |
Hydrazone derivatives as kinase inhibitors
The present invention is directed to novel bicyclic pyrimidine compounds of Formula (I) or a form or composition thereof as inhibitors of ATP-protein kinase interactions, wherein substituents on each side of the iminomethyl double bond in Formula (I) may be in the E or Z configuration; and wherein R1, R2, R3 and R4 are as defined herein. |
| US07893062B2 |
Pyrrolidine derivatives as dual NK1/NK3 receptor antagonists
The invention relates to pyrrolidine derivatives of formula wherein R1, R2, R3, n, and o are defined in the specification and to pharmaceutically active acid-addition salts thereof. Compounds of formula I have a high affinity simultaneously to both the NK1 and the NK3 receptors (dual NK1/NK3 receptor antagonists), useful in the treatment of schizophrenia. |
| US07893061B2 |
Alkyne-substituted pyridone compounds and methods of use
The present invention comprises a new class of compounds capable of modulating the c-kit receptor and, accordingly, useful for treatment of c-kit mediated diseases, including various inflammatory, fibrotic and/or mast cell mediated diseases such as mastocytosis. The compounds have a general Formula I wherein A1-3, R1 and R3-6 are defined herein. The invention further comprises pharmaceutical compositions, methods for treatment of c-kit mediated diseases, and intermediates and processes useful for the preparation of compounds of the invention. |
| US07893060B2 |
Thiazolopyrimidines and their use as inhibitors of phosphatidylinositol-3 kinase
Thiazolopyrimidines of formula (I): wherein W represents a thiazole ring; R1 and R2 form, together with the N atom to which they are attached, a group of the following formula (IIa): in which A is a ring system; m is 0, 1 or 2; R3 is H or C1-C6 alkyl; and R4 is an indole group which is unsubstituted or substituted; and the pharmaceutically acceptable salts thereof are inhibitors of PI3K and are selective for the p110δ isoform, which is a class Ia PD kinase, over both other class Ia and class Ib kinases. The compounds may be used to treat diseases and disorders arising from abnormal cell growth, function or behaviour associated with PI3 kinase such as cancer, immune disorders, cardiovascular disease, viral infection, inflammation, metabolism/endocrine function disorders and neurological disorders. |
| US07893059B2 |
Thiazolopyrimidine PI3K inhibitor compounds and methods of use
Compounds of Formulas Ia and Ib, and including stereoisomers, geometric isomers, tautomers, solvates, metabolites and pharmaceutically acceptable salts thereof, are useful for inhibiting lipid kinases including PI3K, and for treating disorders such as cancer mediated by lipid kinases. Methods of using compounds of Formula Ia and Ib for in vitro, in situ, and in vivo diagnosis, prevention or treatment of such disorders in mammalian cells, or associated pathological conditions, are disclosed. |
| US07893058B2 |
Imidazolopyrazine compounds useful for the treatment of degenerative and inflammatory diseases
Novel imidazo[1,2-a]pyrazine compounds are disclosed that have a formula represented by the following: The compounds may be prepared as pharmaceutical compositions, and may be used for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, arthritis, inflammation, and others. |
| US07893054B2 |
Materials and methods relating to protein aggregation in neurodegenerative disease
The present invention is directed to methods for the treatment or prophylaxis of a tauopathy comprising administering to a patient in need thereof a medicament comprising a phenothiazine. |
| US07893053B2 |
Treating psychological conditions using muscarinic receptor M1 antagonists
Provided are methods of treating psychological diseases and conditions by administration of a preferential muscarinic acetylcholine receptor M1 antagonist, optionally with at least one antidepressant other than a selective muscarinic acetylcholine receptor M1 antagonist. The invention also provides for pharmaceutical compositions and kits for administration of at least one selective muscarinic acetylcholine receptor M1 antagonist in combination with at least one antidepressant other than a selective muscarinic acetylcholine receptor M1 antagonist. |
| US07893052B2 |
CGRP receptor antagonists
The present invention is directed to compounds of Formula I: and Formula II: (where variables R1, R2, R3, R4, A, B, G, J, Q, T, U, V, W, X and Y are as defined herein) useful as antagonists of CGRP receptors and useful in the treatment or prevention of diseases in which the CGRP is involved, such as headache, migraine and cluster headache. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which CGRP is involved. |
| US07893048B2 |
2-azetidinone derivatives as cholesterol absorption inhibitors for the treatment of hyperlipidaemic conditions
Compounds of formula (I): (wherein variable groups are as defined within) pharmaceutically acceptable salts, solvates, solvates of such salts and prodrugs thereof and their use as cholesterol absorption inhibitors for the treatment of hyperlipidaemia are described. Processes for their manufacture and pharmaceutical compositions containing them are also described. |
| US07893041B2 |
Oligosaccharide compositions and use thereof in the treatment of infection
Oligosaccharides and oligosaccharides linked to backbones such as proteins, methods for making such oligosaccharides and methods for using them to treat and/or prevent various disorders are described. |
| US07893028B2 |
Isolated mutant protein of fibroblast growth factor 18 and pharmaceutical composition comprising the same
Disclosed is a mutant protein having an altered fibroblast growth factor receptor specificity, which is produced by deleting one or more amino acid residues from the N-terminus of the amino acid sequence of naturally secreted fibroblast growth factor 18. The protein mutant can be used in a pharmaceutical composition for regulating hair regeneration or growth or a pharmaceutical composition for regulating bone or cartilage formation. |
| US07893022B2 |
Anti-angiogenic methods and compositions
Disclosed herein are methods and compositions for treatment of conditions requiring inhibition of angiogenesis. Such conditions include those characterized by neovascularization, such as retinopathies, macular degeneration and various malignancies. |
| US07893019B2 |
G-CSF site-specific mono-conjugates
Novel site-specific mono-conjugates of Granulocyte Colony Stimulating Factor (G-CSF) are hereby described, with analogues and derivatives thereof, which stimulate proliferation and differentiation of progenitor cells to mature neutrophiles. These conjugates have been obtained using transglutaminase to covalently and site-specifically bind a hydrophilic, non-immunogenic polymer to a single glutamine residue of the human G-CSF native sequence and analogues thereof. These novel site-specific mono-conjugated derivatives are recommended for therapeutic use since they are stable in solution and exhibit significant biological activity in vitro and a longer bloodstream half-life, as compared to the non-conjugated protein, with a consequent prolonged pharmacological activity. |
| US07893014B2 |
Fabric treatment for stain release
A fabric treatment composition that includes at least one zeta potential modifier and a hydrophobic agent with a melting point or glass transition temperature below 100° C. that imparts fabric protection benefits, including improved stain and soil resistance, oil repellency, water repellency, softness, wrinkle and damage resistance, and better handfeel to treated fabrics. Treatment compositions can be used as a pretreatment prior to washing, through soaking, or added to the treatment liquor, that is either the wash or rinse cycle of an automatic washing machine, to first provide and then maintain and restore the beneficial fabric protection benefits imparted to the fabrics during a first treatment operation. The fabric treatment is complete when the fabric is cured by drying and/or heating. Following use of a first treatment composition, protective benefits are maintained and restored by means of a second treatment operation employing a second treatment composition with lower active levels of the protective agents to provide for economical and continual maintenance of the imparted fabric protection benefits through a delivered second fabric treatment benefit with each subsequent treatment operation employing the fabric treatment compositions. |
| US07893006B2 |
Systems and methods for solution-based deposition of metallic cap layers for high temperature superconductor wires
Under one aspect, a method of making a superconductor wire includes providing an oxide superconductor layer overlaying a substrate; forming a substantially continuous barrier layer over the oxide superconductor layer, the barrier layer including metal; depositing a layer of metal particles over the barrier layer, said depositing including applying a liquid including metal particles over the barrier layer; and sintering the layer of metal particles to form a substantially continuous metal layer over the barrier layer. In one or more embodiments, the oxide superconductor layer is oxygen-deficient, and the method may include oxidizing the oxygen-deficient oxide superconductor layer. At least a portion of the sintering and the oxidizing may occur simultaneously, for example by performing them at an oxygen partial pressure and a temperature sufficient to both sinter the metal particles and to oxidize the oxygen-deficient oxide superconductor layer. |
| US07893000B2 |
Boron carbide ceramic and manufacturing method thereof
Boron carbide ceramics produced by spark sintering methods have more desirable mechanical properties than conventionally produced carbides. The boron carbide ceramics include amorphous boron, amorphous carbon, and Al2O3 powder as a sintering aid. The boron carbides may also contain a carbon nano fiber in a nearly homogeneously dispersed state. The sintered compact has a relative density of a boron carbide ceramic of approximately not less than 99%. The boron carbide ceramics are prepared preferably by subjecting a mixed powder of the starting raw materials and the carbon nano fiber to simultaneous synthesis and sintering using the spark plasma sintering method. |
| US07892998B2 |
Optical glass and optical element
An optical glass includes, based on a total weight of the optical glass: 15 to 40 weight percent of P2O5; 0 to 10 weight percent of Li2O; 0 to 20 weight percent of Na2O; 0 to 20 weight percent of K2O; more than 2 weight percent and not more than 15 weight percent of TiO2; 0 to 15 weight percent of CaO; 0 to 32 weight percent of BaO; 0 to 20 weight percent of SrO; 0 to 15 weight percent of ZnO, not less than 0 weight percent and less than 3 weight percent of Bi2O3; 0 to 50 weight percent of Nb2O5; not less than 0 weight percent and less than 20 weight percent of WO3; and 0 to 1 weight percent of Sb2O3. A total weight of Li2O, Na2O and K2O is in a predetermined range of weight percents and the optical glass does not comprise B2O3. |
| US07892997B2 |
Glaze compositions
This invention relates to boron-containing compositions for use in glaze compositions. There is provided a boron-containing composition for use in glaze production, which composition is obtainable by a process which comprises heating to a temperature sufficiently high that calcination occurs but insufficient for the formation of a homogeneous melt a mixture comprising components capable, under the conditions of heating, of forming the oxides B2O3, SiO2, Al2O3, Na2O and optionally CaO in proportions such that the relative percentages by weight of the said oxides, based on the total weight of the said oxides, are as follows: 10 to 18% B2O3, 40 to 65% SiO2, 17 to 32% Al2O3, 4 to 9% Na2O, and 0 to 10% CaO. The boron-containing compositions according to the present invention may be used in glaze compositions, suitably frit-free or boron-free frit-containing glaze compositions. |
| US07892996B2 |
Lead-free sealing material
A lead-free sealing material is provided, which contains a glass with a composition including 47.5-67.5 mole % SnO, 2.5-15 mole % MgO, and 30-40 mole % P2O5. The lead-free sealing material has excellent chemical durability, low melting temperature, and good flowability during heating. The lead-free material is particularly suitable to be used as a sealing material. The lead-free sealing material may additionally contain low-thermal-expansion powdered fillers to reduce the thermal expansion coefficient of the resulting sealing material. |
| US07892994B2 |
pH-adjusting textile containing amphoteric polymer composite nanoparticles
Amphoteric polymer composite nanoparticles are added into the polymer grains of synthetic fibers. The synthetic fibers are woven to form a textile capable of adjusting pH value. |
| US07892992B2 |
Polyvinyl alcohol fibers, and nonwoven fabric comprising them
Readily-fibrillable fibers of PVA polymer, having good chemical resistance, hydrophilicity, weather resistance and water resistance have a flattened cross-sectional profile and have a mean thickness D (μm) that satisfies the following formula (1): 0.4≦D≦5 (1) wherein D=S/L; S indicates the cross-section area (μm2) of the fibers; and L indicates the length (μm) of the major side of the cross section of the fibers. The fibers can be used for making nonwoven fabrics. |
| US07892984B2 |
Reduction of defects formed on the surface of a silicon oxynitride film
Methods for reducing defects on the surface of a silicon oxynitride film are disclosed. In one embodiment, the methods include forming a silicon oxynitride film on a semiconductor substrate and heating the silicon oxynitride film to increase a hydrophilicity of a surface of the silicon oxynitride film prior to treating the surface of the silicon oxynitride film with a hydrofluoric acid. |
| US07892981B2 |
Method of forming a micro pattern of a semiconductor device
A method of forming a micro pattern of a semiconductor device includes forming an etch target layer, a hard mask layer, a Bottom Anti-Reflective Coating (BARC) layer and a first photoresist pattern over a semiconductor substrate. An organic layer is formed on a surface of the first photoresist pattern. A second photoresist layer is formed over the BARC layer and the organic layer. An etch process is performed so that the second photoresist layer remains on the BARC layer between the first photoresist patterns and becomes a second photoresist pattern. The organic layer on the first photoresist pattern and between the first and second photoresist patterns is removed. The BARC layer formed below the organic layer is removed. The hard mask layer is etched using the first and second photoresist patterns as an etch mask. The etch target layer is etched using a hard mask pattern as an etch mask. |
| US07892979B2 |
Columnar structured material and method of manufacturing the same
A method of manufacturing a dot pattern includes the steps of preparing a structured material composed of a plurality of columnar members containing a first component and a region containing a second component different from the first component surrounding the columnar members, with the structured material being formed by depositing the first component and the second component on a substrate, and removing the columnar members from the structured material to form a porous material having a columnar hole. In addition, a material is introduced into the columnar hole portions of the porous material to form a dot pattern, and the porous material is removed. |
| US07892976B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, a copper-containing metal interconnect over the semiconductor substrate, and a copper-containing connection plug, and the metal interconnect includes metal elements other than copper, and a concentration of different metal elements in a connection portion between the metal interconnect and the connection plug is higher than a concentration of the different metal elements in a center portion of the metal interconnect, and higher than a concentration of different elements in upper face portion of the metal interconnect other than the connection portion. |
| US07892973B2 |
Method for manufacturing a semiconductor device
A falling off of a through electrode is inhibited without decreasing a reliability of a semiconductor device including a through electrode. A semiconductor device 100 includes: a silicon substrate 101; a through electrode 129 extending through the silicon substrate 101; and a first insulating ring 130 provided in a circumference of a side surface of the through electrode 129 and extending through the semiconductor substrate 101. In addition, the semiconductor device 100 also includes a protruding portion 146, being provided at least in the vicinity of a back surface of a device-forming surface of the semiconductor substrate 101 so as to contact with the through electrode 129, and protruding in a direction along the surface of the semiconductor substrate 101 toward an interior of the through electrode 129. |
| US07892971B2 |
Sub-second annealing processes for semiconductor devices
An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described. |
| US07892965B2 |
Post passivation interconnection schemes on top of IC chip
A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric, a thick second layer of dielectric is created over the surface of the layer of passivation. Thick and wide interconnect lines are created in the thick second layer of dielectric. The first layer of dielectric may also be eliminated, creating the wide thick interconnect network on the surface of the layer of passivation that has been deposited over the surface of a substrate. |
| US07892962B2 |
Nail-shaped pillar for wafer-level chip-scale packaging
A wafer-level chip-scale packaging feature for a semiconductor device is disclosed which has a substrate, a plurality of nail-shaped conducting posts extending from a surface of the substrate, and a plurality of solder balls, where each of the solder balls is connected to one of the nail-shaped conducting posts. When a different-sized solder ball is desired for use, the device can be re-processed by only removing and replacing the cross-members of the nail-shaped conducting posts, which cuts down on the re-processing expense. |
| US07892956B2 |
Methods of manufacture of vertical nanowire FET devices
A vertical Field Effect Transistor (FET) comprising a vertical semiconductor nanowire is formed by the following steps. Create a columnar pore in a bottom dielectric layer formed on a bottom electrode. Fill the columnar pore by plating a vertical semiconductor nanowire having a bottom end contacting the bottom electrode. Form a doped source region and a doped drain region in the vertical semiconductor nanowire thereby forming an FET device with a FET channel region between the source region and a drain region, which are formed in distal ends of the vertical semiconductor nanowire. Form a gate dielectric layer around the channel region of the vertical semiconductor nanowire. Then form a gate electrode around the gate dielectric layer. Form a top electrode contacting a top end of the vertical semiconductor nanowire. |
| US07892955B2 |
Laser mask and crystallization method using the same
A crystallization method using a mask includes providing a substrate having a semiconductor layer; positioning a mask over the substrate, the mask having first, second and third blocks, each block having a periodic pattern including a plurality of transmitting regions and a blocking region, the periodic pattern of the first block having a first position, the periodic pattern of the second block having a second position, the periodic pattern of the third block having a third position, the first, second and third positions being different from each other; and crystallizing the semiconductor layer by irradiating a laser beam through the mask. |
| US07892952B2 |
Laser apparatus, laser irradiation method, manufacturing method for semiconductor device, semiconductor device, production system for semiconductor device using the laser apparatus, and electronic equipment
Provided are a laser apparatus of continuous oscillation that is capable of enhancing the efficiency of substrate processing, a laser irradiation method, and a manufacturing method for a semiconductor device using the laser apparatus. A portion of a semiconductor film that should be left on a substrate after patterning is grasped in accordance with a mask. Then, a portion to be scanned with a laser light is determined so that it is possible to crystallize at least the portion to be obtained through the patterning. Also, a beam spot is made to strike the portion to be scanned. As a result, the semiconductor film is partially crystallized. That is, with the present invention, the laser light is not scanned and irradiated onto the entire surface of a semiconductor film but is scanned so that at least an indispensable portion is crystallized. With the construction described above, it becomes possible to save a time taken to irradiate the laser light onto a portion that will be removed through the patterning after the crystallization of the semiconductor film. |
| US07892951B2 |
SOI substrates with a fine buried insulating layer
A method of producing a semiconductor structure having a buried insulating layer having a thickness between 2 and 25 nm, by: forming at least one insulating layer on a surface of a first or second substrate, or both, wherein the surfaces are free from an insulator or presenting a native oxide layer resulting from exposure of the substrates to ambient conditions; assembling the first and second substrates; and thinning down the first substrate, in order to obtain the semiconductor structure. In this method, the insulating layer forming stage is a plasma activation based on an oxidizing or nitriding gas. |
| US07892947B2 |
Method for machining a workpiece on a workpiece support
A workpiece machining method includes attaching a workpiece to a workpiece support with the aid of joining means. The workpiece and the workpiece support are joined to one another by an annular joining means. The composite produced is machined. The machined workpiece is separated from the workpiece support. |
| US07892941B2 |
Technique for forming shallow trench isolation structure without corner exposure
A shallow isolation trench structure and methods of forming the same wherein the method of formation comprises a layered structure of a buffer film layer over a dielectric layer which is atop a semiconductor substrate. Tile buffer film layer comprises a material which is oxidation resistant and can be etched selectively to oxide films. The layered structure is patterned with a resist material and etched to form a shallow trench. A thin oxide layer is formed in the trench and the buffer film layer is selectively etched to move the buffer film layer back from the corners of the trench. An isolation material is then used to fill the shallow trench and the buffer film layer is stripped to form an isolation structure. When the structure is etched by subsequent processing step(s), a capped shallow trench isolation structure which covers the shallow trench corners is created. |
| US07892938B2 |
Structure and method for III-nitride monolithic power IC
III-nitride materials are used to form isolation structures in high voltage ICs to isolate low voltage and high voltage functions on a monolithic power IC. Critical performance parameters are improved using III-nitride materials, due to the improved breakdown performance and thermal performance available in III-nitride semiconductor materials. An isolation structure may include a dielectric layer that is epitaxially grown using a III-nitride material to provide a simplified manufacturing process. The process permits the use of planar manufacturing technology to avoid additional manufacturing costs. High voltage power ICs have improved performance in a smaller package in comparison to corresponding silicon structures. |
| US07892937B2 |
Methods of forming capacitors
Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water. |
| US07892932B2 |
Semiconductor devices having tensile and/or compressive strain and methods of manufacturing and design structure
A semiconductor device having a tensile and/or compressive strain applied thereto and methods of manufacturing the semiconductor devices and design structure to enhance channel strain. The method includes forming a gate structure for an NFET and a PFET and forming sidewalls on the gate structure for the NFET and the PFET using a same deposition and etching process. The method also includes providing stress materials in the source and drain regions of the NFET and the PFET. |
| US07892931B2 |
Use of a single mask during the formation of a transistor's drain extension and recessed strained epi regions
A method 300 for forming a transistor's drain extension 70 and recessed strained epi regions 150 with a single mask step 306. In an example embodiment, the method 300 may include forming a patterned photoresist layer 200 over a protection layer 190 in a NMOS region 50 and then etching exposed portions of the protection layer 190 in the PMOS region 60 to form extension sidewalls 210 on the transistors 30 in the PMOS region 60 plus a protective hardmask 220 over the NMOS region 50. The method 300 may further include forming the extension regions 70 for the PMOS region transistors 30, performing a recess etch 240 of active regions 230 of the PMOS region transistors 30, and forming the recessed strained epi regions 150. |
| US07892927B2 |
Transistor with a channel comprising germanium
A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator. |
| US07892926B2 |
Fuse link structures using film stress for programming and methods of manufacture
A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse. |
| US07892924B1 |
Method for making a charge balanced multi-nano shell drift region for superjunction semiconductor device
A method is disclosed for making a substantially charge balanced multi-nano shell drift region (MNSDR) for superjunction semiconductor devices atop a base substrate. The MNSDR has numerous concentric nano shell members NSM1, NSM2, . . . , NSMM (M>1) of alternating, substantially charge balanced first conductivity type and second conductivity type and with height NSHT. First, a bulk drift layer (BDL) is formed atop the base substrate. A substantially vertical cavity of pre-determined shape and size and with depth NSHT is then created into the top surface of BDL. The shell members NSM1, NSM2, . . . , NSMM are successively formed inside the vertical cavity, initially upon its vertical walls then moving toward its center, so as to successively fill the vertical cavity till a residual space remains therein. A semi-insulating or insulating fill-up nano plate is then formed inside the residual space to fill it up. |