最新美国发明专利第2011-01-11期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US07869266B2	Low current switching magnetic tunnel junction design for magnetic memory using domain wall motion A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
US07869265B2	Magnetic random access memory and write method of the same A magnetic random access memory includes a first interconnection extending to a first direction, a second interconnection extending to a second direction perpendicular to the first direction, a magnetoresistive effect element formed between the first and second interconnections, having one terminal connected to the first interconnection, includes a fixed layer, a recording layer and a nonmagnetic layer, a film thickness of the fixed layer being larger than that of the recording layer, and a width of the fixed layer being larger than that of the recording layer, and configured to reverse a magnetization direction in the recording layer by supplying a first electric current between the fixed layer and the recording layer, and a diode having one terminal connected to the other terminal of the magnetoresistive effect element, and the other terminal connected to the second interconnection, and configured to supply the first electric current in only one direction.
US07869260B2	Semiconductor storage device A plurality of memory cells, each including a variable resistance element capable of having four or more values, are arranged at intersections of first wirings and second wirings. A control circuit selectively drives the first and second wirings. A sense amplifier circuit compares, with a reference voltage, a voltage generated by a current flowing through a selected memory cell. A reference voltage generation circuit includes: a resistance circuit including first and second resistive elements connected in parallel. Each of the first resistive elements has a resistance value substantially the same as a maximum resistance value in the variable resistance elements, and each of the second resistive elements has a resistance value substantially the same as a minimum resistance value in the variable resistance elements. A current regulator circuit averages currents flowing through the first and second resistive elements.
US07869255B2	Non-volatile memory devices, method of manufacturing and method of operating the same A non-volatile memory device includes a substrate having a recess thereon, a resistant material layer pattern in the recess, a lower electrode on the resistant material layer pattern in the recess, a dielectric layer, and an upper electrode formed on the dielectric layer. The resistant material layer pattern includes a material whose resistance varies according to an applied voltage. The dielectric layer is formed on the substrate, the resistant material layer pattern and the lower electrode. An upper electrode overlaps the resistant material layer pattern and the lower electrode. The applied voltage is applied to access the upper and lower electrodes to vary the resistance of the resistant material layer pattern.
US07869251B2	SRAM based one-time-programmable memory Disclosed is a method and device for providing fast-response One-Time-Programmable (OTP) memory based on SRAM memory technology and the inherent breakdown characteristics of a MOS transistor. Each memory cell of an SRAM memory cell circuit is connected to a programming circuit. The programming circuit is comprised of two groups of MOS transistors connected to the storage nodes (SN and SNB, where SNB is the complementary value of SN) of the two cross-coupled inverters of the SRAM memory circuit. A desired data set is loaded into the circuit and then is burned-in by applying and repeatedly cycling a “burn-in” voltage across the source and drain of the MOS transistors of the programming circuit that approaches the ON STATE trigger voltage of the characteristic bipolar junction transistor contained within the MOS transistors. Upon repeated cycling of the source-to-drain voltage, the targeted MOS transistor within the programming circuit breaks down and shorts across the gate, drain, and/or source of the transistor. When the system is returned to normal operation, the programming circuits will be connected to ground, Vdd or Vss and one of the two nodes of the SRAM cell circuit will be shorted through the programming circuit to ground, Vdd or Vss, thus, forcing a retention of the programmed data state.
US07869249B2	Complementary bit PCRAM sense amplifier and method of operation A method and apparatus is disclosed for sensing the resistance state of a Programmable Conductor Random Access Memory (PCRAM) element using complementary PCRAM elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense amplifier detects voltages discharging through the high and low resistance elements to determine the resistance state of an element being read.
US07869247B2	Bit line decoder architecture for NOR-type memory array A bit line decoder for sensing states of memory cells of a memory array includes a first sub-decoder that (i) is adjacent to the memory array and (ii) includes D control devices arranged in a first of two levels of the bit line decoder. The D control devices selectively communicate with a first set of S of B bit lines of the memory array and are connected to each other in series forming (D−1) junctions. (S−2) of the S bit lines are directly connected to the (D−1) junctions, where log2D>2, S=(D+1), And S
US07869246B2	Bit line decoder architecture for NOR-type memory array A bit line decoder includes control devices that selectively communicate with bit lines and that are arranged in a multi-level configuration having a plurality of levels. Each of the levels includes a plurality of the control devices connected to each other in series forming one or more junctions. Each of the one or more junctions in one of the levels is directly connected to a respective one of the bit lines. A control module selects from the bit lines a first bit line and a second bit line associated with a memory cell when determining a state of the memory cell and generates first control signals that deselect one or more of the control devices at each of the levels. When the one or more control devices at each of the levels are deselected, a first group of the bit lines including the first bit line is charged to a first potential and a second group of the bit lines including the second bit line is charged to a second potential. An isolation circuit to isolate a first one of the levels from a second one of the levels includes a plurality of isolation devices having first ends that communicate with the control devices of the first one of the levels and second ends that communicate with the control devices of the second one of the levels.
US07869245B2	Semiconductor storage device with first and second pads arranged in proximity with first to fourth output transistors for reducing an excess region An excess region on a chip plane is eliminated to reduce a chip size. A plurality of data pads, which input/output data, are arranged near one side of an outer periphery of a substrate in parallel with the aforementioned one side, and a plurality of data pads, which input/output data, are arranged on an inner side of the plurality of data pads in parallel with the plurality of data pads. NMOSs, which output data, are arranged between the data pads, and PMOSs, which output data, are arranged at positions where they face the NMOSs near the data pads.
US07869236B2	Carrier-based pulse-width modulation (PWM) control for matrix converters A matrix converter includes a plurality of switches that electrically connect a multi-phase input voltage source to a multi-phase load; and a controller to output pulse-width modulated (PWM) switching signals to control the switches to produce a multi-phase output voltage from the multi-phase input voltage source. The controller outputs the PWM switching signals by modulating a carrier signal with a time-varying signal having a frequency determined from a desired output frequency for the output voltage.
US07869233B2	Voltage conversion device and computer-readable recording medium having program recorded thereon for computer to control voltage conversion by voltage conversion device A control device calculates a voltage command value of a voltage step-up converter based on a torque command value and a motor revolution number and calculates an on-duty of an NPN transistor based on the calculated voltage command value and a DC voltage from a voltage sensor. When the on-duty is influenced by a dead time of NPN transistors, control device fixes the on-duty at 1.0 to control the NPN transistors in such a manner that the voltage is increased or decreased.
US07869232B2	Electric power converter suppressing output voltage variation due to input voltage fluctuation An electric power converter apparatus having a function of converting a power source voltage into an AC voltage having an arbitrary frequency and maintaining an output voltage constant even on the power source variation, in which the electric power converter apparatus decreases the output voltage when the output voltage drops to equal to or less than a predetermined value, afterward, increases the output voltage in response to a predetermined rate of change when the power source voltage rises.
US07869227B2	Power supply apparatus and method A method of supplying a power to elements in a power supply apparatus including a primary side and a second side. Particularly, a method of supplying a driving power to an element at the primary side of the power supply apparatus from a primary coil of a transformer. A power factor improvement section improves a power factor of a received alternating current (AC) power. A transformer then receives the AC power having the improved power factor from a primary coil and generates an induced power at a secondary coil. The transformer then provides the AC power to drive a predetermined element located at the primary side of the power supply apparatus from the primary coil.
US07869226B2	Achieving ZVS in a two quadrant converter using a simplified auxiliary circuit A zero voltage switch half bridge converter comprises a first and second diode series diodes, parallel with a voltage source. A first terminal of an inductor is joined to the diode junction. A first semiconductor auxiliary switch connected in series between the voltage source and a third diode, which is in series with a fourth diode connected to a second semiconductor auxiliary switch. First and second semiconductor main switches are connected in series and in parallel with the voltage supply. A capacitive voltage divider connected across the voltage source, wherein a second terminal of the inductor is connected to junction of the main switches and a midpoint of the capacitive voltage divider. A control circuit is configured to provide respective control signals to at least the first semiconductor auxiliary switch and the second semiconductor auxiliary switch.
US07869223B2	Circuit board device for information apparatus, multilayered module board and navigation system A multilayered module board with mounted high-frequency electronic components such as a CPU and a graphic circuit is mounted on one face of a base board with mounted low-frequency electronic components. The multilayered module board is a squared multilayered board smaller than the base board. The electronic components are wired with an inner layer-wiring pattern. Connector terminals are solder-jointed to four sides of the multilayered module board. The multilayered module board is mounted to the base board via the connector terminal.
US07869211B2	Electronic module configured for failure containment and system including same An electronic module. The electronic module includes a chassis, a plurality of capacitors, and a heat sink. The chassis includes a first end and a second end. The first end is opposite the second end. The chassis also includes a first side, a second side, a third side, and a fourth side. The second side is opposite the first side. The third side is connected to at least one of the first and second sides. The fourth side is connected to at least one of the first and second sides, and is opposite the third side. The chassis is fabricated from a material which stops component debris from passing through the sides of the chassis. The capacitors are positioned within the chassis. The heat sink is positioned between the capacitors and the second end.
US07869209B2	Electronic rack combining natural convection and forced air circulation for its cooling This rack (1) houses rackable electronic gear modules (2, 3) and has cooling by natural convection thanks to ventilation orifices (20, 21) provided in its bottom (10) and top (11) walls and forced air cooling thanks to internal air distribution ramps (30) fed with air under pressure through the intermediary of a distribution box (31) connected to a forced air circulation duct (37). The use of internal distribution ramps for the forced air makes it possible to produce a pulsed air circulation providing only a slight obstacle to the air circulation obtained by natural convection. Compared to usual configurations, this makes it possible to lower the operating temperature reached by the equipment in the event of loss of the forced ventilation.
US07869208B2	Electronics component packaging for power converter Assembling a power converter for a multiple phase electric drive propulsion system in a machine includes arranging a plurality of rectangular capacitor units of a capacitor subassembly for conditioning electrical power in the power converter in a first packaging arrangement. In the first packaging arrangement, major capacitor axes of each one of the capacitor units are co-linear with one another and minor capacitor axes of each one of the capacitor units are oriented parallel but not co-linear with one another. Assembling the power converter further includes arranging a plurality of IGBT modules of a transistor subassembly for power switching in the power converter in a second packaging arrangement. In the second packaging arrangement major module axes of each one of the IGBT modules are oriented parallel but not co-linear with one another and minor module axes of each one of the IGBT modules are co-linear with one another. The capacitor subassembly and the transistor subassembly are supported in the first packaging arrangement and in the second packaging arrangement for service in a power converter housing.
US07869205B2	Data processing device A data processing device including a first housing, a second housing, and a bracket is provided. The bracket is disposed between the first housing and the second housing. The bracket has a body and a plurality of supporting ends. The body has a bearing surface and a supporting surface. The bearing surface faces the first housing, and does not contact the first housing. The supporting surface faces the second housing, and does not contact the second housing. The supporting ends are disposed around the body and contact the first housing to support the body. A first distance between the supporting surface relatively away from the supporting ends and the second housing is larger than a second distance between the supporting surface relatively close to the supporting ends and the second housing.
US07869204B2	Compact size portable computer having a fully integrated virtual keyboard projector and a display projector A computer with a fully integrated virtual keyboard projector and a display projector. The computer includes a base having a CPU, a video card and memory, a screen pivotally mounted to one side of the base, and a display projector mounted to an opposite side of the base and angled to project a computer generated image onto the screen. Further, the computer includes a keyboard projector mounted to the opposite side of the base to project a keyboard onto a surface adjacent to the opposite side of the base. Further, the computer includes another display projector mounted to the opposite side of the base and digitally synchronized with the first display projector for projecting a superimposed image.
US07869199B2	Battery cover assembly for portable electronic device A battery cover assembly comprises a housing, a battery cover, a first magnetic element and second magnetic element. The magnetic pole of the first magnetic is opposite to the magnetic pole of the second magnetic element such that the first magnetic element and the second magnetic element are magnetically attracted to each other to attach the battery cover to the housing to cover the receiving space of the housing.
US07869198B1	Multiple seal electronic display module having displacement springs The present invention provides a multiple seal electronic display module having displacement springs for distributed use as major components of an electronic sign. Displacement springs are provided to displace the electronic display module from the front of an electronic sign mounting panel until latching mechanisms are properly actuated in order to secure the electronic display module to the electronic sign mounting panel and thus provide a visual clue indicating proper or improper securing. A configured front edge seal provides for multiple surface sealing of multiple components consisting of, but not limited to, a louver panel, an LED circuit board, and a housing. A rear seal is also provided to seal the rear of the electronic display module to the electronic sign mounting panel. Input and output signal jack base seals and a power jack base seal provide effective seals between the housing and the signal and power jacks.
US07869197B2	Display apparatus A display apparatus includes a front casing which includes a front casing body which is formed with a display opening; and a display panel module combined with the front casing, and including a panel body, a frame which is formed on a peripheral area of the panel body and supports the panel body, and a panel supporting member which is formed on the frame and supported to the front casing.
US07869194B2	Closing apparatus for a withdrawable-part rack At least one embodiment of the invention provides that, for a closing apparatus for a part rack withdrawable via V-shaped rod assemblies, the closing apparatus includes at least one pin formed on rod assemblies or as part of them, each pin engaging in a slot in an actuating element. Owing to the use of the slots, the actuating element can be formed as a rigid body, with the result that no frictional forces need to be overcome when inserting a circuit breaker into a withdrawable-part rack with the closing apparatus according to at least one embodiment of the invention. With the closing apparatus according to at least one embodiment of the invention, a locking element can have a particularly simple design: it can be guided in the actuating element.
US07869189B2	Methods of fabricating integrated circuit devices including capacitors having high-aspect ratio support patterns and related devices A method of fabricating an integrated circuit device includes forming a plurality of lower capacitor electrodes vertically extending from a substrate. The plurality of lower capacitor electrodes respectively include an inner sidewall and an outer sidewall. At least one support pattern is formed vertically extending between ones of the plurality of lower capacitor electrodes from top portions thereof opposite the substrate and along the outer sidewalls thereof towards the substrate to a depth that is greater than a lateral distance between adjacent ones of the plurality of lower capacitor electrodes. A dielectric layer is formed on the support pattern and on outer sidewalls of the plurality of lower capacitor electrodes, and an upper capacitor electrode is formed on the dielectric layer. Related devices are also discussed.
US07869188B2	Capacitor structure A capacitor structure includes an insulating layer, first conductive patterns, second conductive patterns, an insulating interlayer, third conductive patterns, and fourth conductive patterns. The first and second conductive patterns are alternately arranged on the insulating layer to be spaced apart from one another. The first and second conductive patterns have side faces where concave portions and convex portions are formed. The insulating interlayer is formed on the insulating layer to cover the first and second conductive patterns. The third and fourth conductive patterns are alternately arranged on the insulating interlayer to be spaced apart from one another. The third and fourth conductive patterns have side faces where concave portions and convex portions are formed.
US07869185B2	Method of de-chucking wafer using direct voltage and alternating voltage, and apparatus for fabricating semiconductor device using the same Example embodiments provide a method of de-chucking a wafer by alternating between using a direct voltage and an alternating voltage, and an apparatus for fabricating a semiconductor device using the same. The method of de-chucking a wafer comprises interrupting a chucking voltage applied to an electrostatic chuck, applying a first de-chucking voltage to the electrostatic chuck, and applying a second de-chucking voltage to the electrostatic chuck.
US07869184B2	Method of determining a target mesa configuration of an electrostatic chuck A method of modifying the heat transfer coefficient profile of an electrostatic chuck by configuring the areal density of a mesa configuration of an insulating layer of the chuck is provided. A method of modifying the capacitance profile of an electrostatic chuck by adjustment or initial fabrication of the height of a mesa configuration of an insulating layer of the chuck is further provided. The heat transfer coefficient at a given site can be measured by use of a heat flux probe, whereas the capacitance at a given site can be measured by use of a capacitance probe. The probes are placed on the insulating surface of the chuck and may include a plurality of mesas in a single measurement. A plurality of measurements made across the chuck provide a heat transfer coefficient profile or a capacitance profile, from which a target mesa areal density and a target mesa height are determined. The target density and height are achieved mechanically; the target density by mechanically adjusting the areal density of existing mesas; and the target height by creating or deepening low areas surrounding planned or existing mesas, respectively. This can be accomplished using any of known techniques for controlled material removal such as laser machining or grit blast machining on an X-Y table.
US07869181B2	Flex circuit lightning protection applique system for skin fasteners in composite structures A lightning protection appliqué incorporates a plurality of conductive plies adhesively affixed to a composite surface, at least a first one of the plies providing conductive characteristics sufficient to divert electrical energy from a lightning strike and at least a second one of the plies comprising operational circuitry. A dielectric ply is fixed to the composite surface over and completely covering at least one metal surface feature between the plurality of conductive plies and the composite surface.
US07869180B2	Spark gap apparatus and method for electrostatic discharge protection An apparatus for providing electrostatic discharge protection includes a plurality of conductive circumferential extensions defined by overlapping circular voids between a first conductor surface and a second conductor surface.
US07869179B2	Protection patch panel An access control system dissipates voltage transients while allowing access control equipment to operate normally. The access control system utilizes an isolation patch panel which is provided with circuitry to prevent voltage transients from damaging access control equipment, while also enabling the access control equipment to be wired with standard Ethernet cabling.
US07869178B2	Augmentation of ambient temperature and free convection effects in thermal circuit breaker trip curve approximations An electrical overload protection system may be based on a solid state control system. A solid state switch may open responsively to commands for a solid-state controller. The controller may perform calculations to determine accumulated energy in a protected conductor. The calculations may be based, in part, on samplings of current in the protected conductor and ambient temperature to which the conductor may be exposed.
US07869176B2	Surge protected power supply An overvoltage protection circuit for protecting a pass element in a controlled voltage supply circuit electrically connected between a circuit power supply interconnection terminal region suited for electrical connection to a circuit power supply and an output terminal, the pass element being protected from voltage surges that may occur on the circuit power supply interconnection with respect to a voltage reference interconnection. A voltage reference is provided electrically connected in series with a voltage. The voltage divider and the voltage reference are connected in series with one another between the circuit power supply interconnection and the voltage reference interconnection. A threshold switch is electrically connected to a corresponding one of the voltage divider output and one of the voltage divider terminating regions terminating regions, and has an output coupled to the pass element control region.
US07869174B2	Semiconductor device with a plurality of power supply systems Disclosed is a semiconductor integrated circuit device that includes an output circuit with power thereof supplied from one power supply system, an input circuit with an input terminal thereof connected to an output terminal of the output circuit through a signal line and with power thereof supplied from other power supply system different from the one power supply system, and a circuit that restrains a current flowing from the output circuit into the signal line when an ESD stress is applied from the output circuit to a signal transmitting/receiving portion of the input circuit.
US07869172B2	Digital controller An input processing unit of safe digital controller includes units for determining ground when a voltage V from an input terminal is equal to or lower than a ground determination value; for outputting a first specified value regardless of the voltage V during a first given period immediately after the controller starts; for outputting a value based on the voltage V when the voltage V is equal to or higher than the ground fault determination value and equal to or lower than a disconnection determination value after the first given period, outputting a third specified value during a second given period after the first given period when the voltage V is lower than the ground fault determination value, and outputting the first specified value when a state in which the voltage V is lower than the ground fault determination value is maintained for the second given period or longer; and for outputting a second specified value during the second given period when the voltage V is higher than the disconnection determination value after the first given period, and outputting the first specified value when a state in which the voltage V is higher than the disconnection determination value is maintained for the second given period or longer.
US07869170B2	Method and system for time synchronized trip algorithms for breaker self protection A time-synchronized trip implementation for a motor circuit protector (MCP) having a reconfigurable microcontroller. The microcontroller causes a power supply to, be charged for an initial time period during a charging mode. An onboard comparator is configured for a predetermined self-protection level of the MCP, and fault currents that exceed the comparator's threshold will directly drive a solenoid to trip the MCP. The microcontroller reconfigures the comparator's threshold to both measure and charge the power supply toward a stored energy trip voltage, which will charge quickly when high fault currents are present. As a result, self-protection is not compromised. After the trip voltage is reached, the microcontroller reconfigures the onboard comparator's threshold for self-protection trip levels. When a trip event occurs in this mode, stored energy trip activation occurs. The MCP includes user-selectable trip settings, and the microcontroller reconfigures the comparator threshold levels for user-selectable self-protection levels.
US07869168B2	Power cord with GFCI device and remote test/reset unit for an electrical appliance An electrical appliance includes a power cord having a GFCI device and an associated remote test/reset unit. The power cord includes a first end portion provided with a plug adapted to be inserted into an electrical outlet. The first end portion extends to a second end portion that is electrically coupled to a plurality of electrical components in the appliance. The test/reset unit is spaced from the GFCI device along the power cord. Preferably, the test/rest unit is connected to the power cord through an extension lead. With this arrangement the test/reset unit is actually remote from the GFCI device, allowing easy access to service personnel.
US07869160B1	Perpendicular recording head with shaped pole surfaces for higher linear data densities A perpendicular recording head is provided having a bottom pole, a writer pole disposed above the bottom pole, and a top shield disposed above the writer pole. The bottom pole and the top shield are both magnetically coupled to the writer pole. The writer pole includes a concave facing surface that faces the top shield. The top shield can include a convex surface that faces the writer pole. The top shield can also include a pedestal that protrudes towards the writer pole.
US07869158B1	Helicoid group switching A recording medium can include multiple helicoid patterns arranged in multiple helicoid groups, e.g., first and second helicoid groups. Operating a disk drive can include switching between helicoid groups to maintain the alignment of the head with respect to a target track of the rotating recording medium. Enabling a switch can include receiving a waveform produced by a head operated with respect to a rotating recording medium, generating first information from one or more portions of the waveform corresponding to the helicoid patterns of the first helicoid group; generating second information from one or more portions of the waveform corresponding to the helicoid patterns of the second helicoid group; and analyzing the second information with respect to the first information to generate calibration information. The calibration information can compensate for operational differences between using the helicoid patterns of the first helicoid group and the helicoid patterns of the second helicoid group.
US07869157B2	Magnetic disk drive having dual actuator In a dual-stage actuator magnetic drive having a coarse actuator and a fine actuator, an amplitude level of a command signal for the fine actuator during a decoupling-path control depends on a gain of an applied fine actuator model. The fine actuator model gain depends on the amplitude level of the fine actuator command signal and needs to be calibrated to avoid performance degradation. The gain is calibrated by determining a deviation of the fine actuator model gain from the fine actuator gain during decoupling-path control. This deviation is obtained by comparing gain values of the open-loop transfer functions measured for the decoupling-path control case and the single coarse actuator control case with respect to the feedback loop of the coarse actuator at an excitation signal frequency, when the excitation signal is added to the coarse actuator.
US07869153B1	Self servo write tune feature for preamps A system includes N channels and a control module. Each of the N channels includes a latch and a signal generator module, where N is an integer greater than 1. The latch selectively latches a B-bit codeword, where B is an integer greater than 1. The signal generator module generates a signal based on the B bit codeword. The control module transmits the B-bit codeword via a B-bit data bus to the latch of each of the N channels. The control module generates control signals that select the latch in at least one of the N channels.
US07869152B2	Techniques for identifying servo sectors in storage devices Techniques are provided for identifying the servo sectors in a track on a data storage device. A data storage device identifies the servo sectors in a track by reading distributed index bits from multiple servo sectors in a track. The data storage device analyzes only one index bit from each servo sector to identify the index of a track. In some embodiments, the index of a track can be identified after examining the index bits stored in a particular number of consecutive servo sectors, even in the presence of errors. The index bits in each track can have an error tolerance with a minimum Hamming distance greater than one. In other embodiments, a data storage device compares a sliding window of the index bits read from the servo sectors to all possible N-bit vectors that exist within a pattern of the index bits stored on a track.
US07869151B2	Color wheel with segment fixing mechanisms, and manufacturing method of same A color wheel comprises sectorial color filter segments and a support member. Protrusions are disposed at the support member and engaged with either through-holes or cavities as segment fixing mechanisms formed at the color filter segments, whereby the color filter segments are fixedly positioned with respect to the support member in the radial direction. Consequently, the color filter segments can be surely prevented from getting scattered off when the color wheel spins at high speed.
US07869150B2	Actuator, method of controlling the same, and camera module including the actuator An actuator used for a camera module and controlling a lens assembly to move along an optical axis, includes a magnet disposed on a side of the lens assembly, a coil part disposed within a magnetic field of the magnet and controlling an up-and-down movement of the lens assembly when an electric power is applied, and a yoke part disposed to horizontally move the magnet disposed on the side of the lens assembly. The lens assembly is provided with a friction-generating member generating a frictional force to the lens assembly in an opposite direction to a direction in which the lens assembly moves to the yoke part.
US07869135B2	Zoom lens and image pickup apparatus having the same A zoom lens includes, in order from an object side to an image side, a first lens unit having a negative refractive power and a second lens unit having a positive refractive power. In the zoom lens, an interval between the first and second lens units becomes smaller at a telephoto end than at a wide-angle end during zooming. The first lens unit includes, in order from the object side to the image side, a first lens having a negative refractive power, a second lens having a negative refractive power, which is made of a plastic and has an aspheric lens surface, and a third lens unit having a positive refractive power. In the zoom lens, a refractive index and an Abbe number of the plastic (Nd, νd), a focal length of the second lens (fn), and a focal length of the first lens unit (f1) are appropriately set.
US07869134B2	Variable power optical system, imaging lens system and digital apparatus Provided is a microminiaturized zoom optical system capable of sufficiently correcting aberration. The zoom optical system (100) includes a first lens group (101) having a negative optical power, a second lens group (102) having a positive optical power, and a third lens group (103) having a positive or negative optical power in this order from the object side. The zoom optical system is configured in such a manner that the interval between the first lens group (101) and the second lens group (102) is decreased in zooming from the wide angle end to the telephoto end. A positive lens element in the third lens group (103) or in a lens group closer to the image side than the third lens group (103) satisfies the following conditional expression: vp<40 where vp is the minimum value of the Abbe number of the positive lens element.
US07869132B2	Immersion microscope objective and laser scanning microscope system using same An immersion microscope objective formed of thirteen or fewer lens elements includes, in order from the object side, first and second lens groups of positive refractive power, a third lens group, a fourth lens group having negative refractive power with its image-side surface being concave, and a fifth lens group having positive refractive power with its object-side surface being concave. The first lens group includes, in order from the object side, a lens component that consists of a lens element of positive refractive power (when computed as being in air) and a meniscus lens element having its concave surface on the object side. Various conditions are satisfied to ensure that images of fluorescence, obtained when the immersion microscope objective is used in a laser scanning microscope that employs multiphoton excitation to observe a specimen, are bright and of high resolution. Various laser scanning microscopes are also disclosed.
US07869128B2	Head mounted display An object of the present invention is to provide a head mounted display capable of an accurate display of a surrounding situation always without affecting the display section even if a frame is deflected, and giving a comfortable mounting feeling as well as easy mounting. For this purpose, the head mounted display comprises: a support member including a pair of lateral frames contacting both of a user's head and a front frame in front of a user's face to contact a user's nose; an image display device for displaying an image; an eyepiece optical system provided in front of an eye of the user to lead the image displayed on the image display device to the user's eye; and a connection section which connects the eyepiece optical system with the front frame at a position corresponding to a center position in a lateral direction of the user's face.
US07869124B2	Laser microscope It is an object to perform high-precision observation by compensating group-velocity-delay dispersion and angular dispersion with a simple structure. The invention provides a laser microscope 1 including a light source; an acousto-optic deflector 7 that deflects ultrashort-pulse laser light L emitted from the light source; an angular-dispersion element 8, disposed in front of or after the acousto-optic deflector 7, that applies angular dispersion in a direction opposite to the acousto-optic deflector 7; and a group-velocity-delay dispersion-amount adjusting unit 10 that adjusts the amount of dispersion compensation by moving the angular-dispersion element 8 so as to vary the optical path length at each wavelength between the angular-dispersion element 7 and the acousto-optic deflector 8.
US07869121B2	Small ultra-high NA catadioptric objective using aspheric surfaces A relatively high NA objective employed for use in imaging a specimen is provided. The objective includes a lens group having at least one focusing lens configured to receive light energy and form an intermediate image, at least one field lens oriented to receive the intermediate image and provide intermediate light energy, and a Mangin mirror arrangement positioned to receive the intermediate light energy and apply light energy to the specimen. One or more elements may employ an aspheric surface. The objective may provide an uncorrected spectral bandwidth up to approximately 193 to 266 nanometers and numerical apertures in excess of 0.9. Elements are less than 100 millimeters in diameter and may fit within a standard microscope. The field lens may include more than one lens and may be formed of a material different from at least one other lens in the objective.
US07869116B2	Display device for improving image contrast A light valve unit may include a first conductive layer and a second conductive layer disposed on opposite sides of each other with respect to a plurality of cells in which at least some of the cells include a first material and a second material. The first material may have a lower light transmissivity property than the second material and a position of the first material within a corresponding cell may be changeable responsive to application of an electric field between the first and second conductive layers. The second conductive layer may include at least two electrodes and a gap defined between the two electrodes. A portion of the light valve unit adjacent to the gap may be configured to have a transmissivity that is substantially less than transmissivity of a portion of the light valve unit adjacent to cells across which the electric field is applied, but greater than or equal to transmissivity of a portion of the light valve unit adjacent to cells across which the electric field is not applied.
US07869115B2	Display apparatus using pulsed light source The present invention provides a display apparatus, comprising: a light source; at least one spatial light modulator for modulating a luminous flux emitted from the light source; and controller for processing video image information, which is input, and controlling the light source and the spatial light modulator, wherein the controller controls the light source and the spatial light modulator so as to perform pulse emission of the light source during a period shorter than a period in which the spatial light modulator is controlled under a modulation state and also controls the light source so as to modulate the pulse emission during a period shorter than a period in which the spatial light modulator is controlled under a modulation state.
US07869112B2	Beam scanning based on two-dimensional polygon scanner for display and other applications Scanning beam systems based on a two-dimensional polygon scanner with different reflective polygon facets tilted at different tilt facet angles to use rotations of the polygon scanner to scan optical beams both horizontally and vertically on a surface which can be a display screen or a printing surface.
US07869111B2	Optical scanner, image forming device, optical scanning method A technique capable of achieving reduction in space of allocating an optical system and improvement of an optical characteristic of a scan light in an optical scanner that scans a light flux from a light source on each of a photosensitive surface of a plurality of photoconductors in a main-scanning direction is provided.An optical scanner comprising: a polygon mirror 80; a pre-deflection optical system 7; and a post-deflection optical system A, wherein the post-deflection optical system A includes a common optical element having a smooth surface acting on all the light fluxes reflected and deflected by each of the plurality of reflecting surfaces in the polygon mirror 80, the common optical element that applies power to the light flux reflected and deflected by the polygon mirror 80 and introduced to each of the plurality of photoconductors, so as to make the light flux introduced to the photosensitive surface by the post-deflection optical system A to have a predetermined optical characteristic on the photosensitive surface depending on an incident position of the light flux.
US07869110B2	Optical scan apparatus and image formation apparatus An optical scan apparatus is configured to include a light source emitting a light beam; a vibration mirror deflecting the light beam emitted from the light source to scan a scan area; a drive unit driving the vibration mirror; and an optical imaging system focusing the light beam deflected by the vibration mirror on a predetermined focus position, and having optical power to correct a displacement of the focus position which occurs due to a deformation of the vibration mirror caused by its own vibration.
US07869108B2	Electromagnetically actuated device The present invention provides an electromagnetically actuating optical deflecting elements which can be manufactured out of reduced number of components and are capable of being actuated at lower frequencies and at wider deflecting angles without causing mechanical influences of the metal wiring on beams of the optical deflecting element.For that purpose, the electromagnetically actuating optical deflecting element comprises: a movable part having a light reflecting plane and a coil; a base component having a magnetic field generating means; and a pair of beams which axially support said movable part on to the base component, The movable part is actuated by an electromagnetic force generated by an electric current flowing through the coil and the magnetic field generating means. The beams 108 are constituted by one material having functions to perform as conductors for supplying electric current to the coil, to support the movable part, to perform as springs for returning the movable part to a starting position.
US07869105B2	Transmission and communication apparatus including the same A transmission including: a sun gear forwardly and reversely rotatable by a driving force; a rotary member being forwardly and reversely rotatable, and having a projecting portion; a clutch causing the rotary member to be forwardly rotated and reversely rotated, and not causing the rotary member to be reversely rotated when a predetermined torque is applied; a planetary gear rotatably supported by the rotary member, meshed with and revolved around the sun gear, and rotated by a rotation of the sun gear; a transmission gear meshed with the planetary gear and rotated when the planetary gear is positioned at a predetermined revolution position; a stopper inhibiting the rotary member from being reversely rotated at a rotation position; a switch including a switch lever which the projecting portion contacts when the rotary member is rotated, and detecting a rotational position of the rotary member, the switch permitting the swinging of the switch lever caused by the projecting portion when the rotary member is forwardly rotated and restricting the swinging of the switch lever caused by the projecting portion when the rotary member is reversely rotated; and a saving mechanism saving the switch lever from being forcedly swung when the rotary member is reversely rotated.
US07869103B2	Image reading device configuration for an image reading unit and a document holder An image reading device capable of correctly reading an image on a document is provided without the need to increase the size of an upper cover, etc. of the device. A CIS (Contact Image Sensor) is supported by holders and support shafts to be movable toward the upper cover (rib) and is biased toward the rib by compression springs. In this configuration, the rib for holding the document is not required to be installed as a movable component and there is no need to provide a space for allowing the rib to move or providing the upper cover with a mechanism for allowing the rib to move, which can avoid the need to increase the size of the upper cover.
US07869100B2	Image sensor, module and electronic device From an amplifier circuit of a plurality of pixels each, a signal is directly output to a signal line. Even if the signal line is longer and the signal line has an increased parasitic capacitance, attenuation of the signal transmitted through the signal line can be prevented. Therefore, the dynamic range of the signal output can be expanded and the information can be output accurately.
US07869099B2	Method and apparatus for image quality diagnosis For an automatic image diagnosis, toned images or residual toner existing on the photoconductive surface of a photoreceptor may be scanned with light energy provided by the raster scanning system. The light energy, which may be reflected from the photoreceptor surface, may be disturbed due to scattering/absorption in toned or damaged surface regions. The light energy may be directed to image sensors to obtain a spatial image map of the photoreceptor surface in conjunction with pixel clock information present for the raster scanning system. The evaluation may be made based on the spatial image map. Diagnostic and maintenance may then be applied to correct the defect and/or adjust a tone level for a latent image formed on the photoreceptor surface.
US07869098B2	Scanning verification and tracking system and method A method and device are provided for assigning a task to a user to verify information from a scanned document. An image, a data item, and a data field are presented to a user. The image is associated with at least a section of a scanned document. The data item is identified from a portion of the image. The data field is associated with the data item. A second data item is received. The second data item is entered by the user in the data field and indicates a correction to the data item to reflect the portion of the image. An error rate is updated based on the received second data item. The user is selected to process a task based on the updated error rate. The task is presented to the selected user.
US07869092B2	Image processing apparatus, printing apparatus, and image processing method In an image processing for printing a monochrome image, color deviation can be suppressed to print a favorable monochrome image. Specifically, the printing of a monochrome image is performed by using black ink in all of a color reproduction region (color gamut) including a gray axis and regions other than the gray axis. This avoids the use of C, M, and Y for the expression of the monochrome image to suppress the color deviation due to slight imbalance among amounts of three colors of inks.
US07869079B2	Methods and apparatus for print job submission Methods and apparatus are provided for submitting an electronic document to a printing system that includes a print controller having an input port and a print queue. Methods in accordance with this invention include coupling a portable media device to the input port, the portable media device including an electronic document and automatically copying the electronic document to the print queue. Apparatus in accordance with this invention include a portable media device that includes an electronic document. The portable media device is adapted to be coupled to the input port of the print controller, and the print controller is adapted to automatically copy the electronic document to the print queue.
US07869073B2	Image forming system, image forming method and information terminal device An image forming system comprising an information terminal device and a printing device that is connected to the information terminal device through a network and a local connection and performs a printing process of image data sent from the information terminal device, in which the information terminal device includes a network identifier acquisition unit that obtains through the local connection a network identifier of the printing device on the network at the time of the local connection between the information terminal device and the printing device, and a data communication unit that performs data communications with the printing device through the network according to the network identifier obtained by the network identifier acquisition unit.
US07869072B2	Printer device In a printer device, the page analysis controller causes the page analyzer to execute the page analysis processing preferentially on the print type print job data to the storage type print job data out of the print job data waiting for the page analysis processing stored in the page analysis queue, to interrupt, when the print type print job data is received during the page analysis processing on the storage type print job data, the page analysis processing and execute the page analysis processing on the received print type print job data to output the page analyzed print job data to the expansion circuit, and to resume the interrupted page analysis processing on the storage type print job data after the page analysis processing on the received print type print job data.
US07869071B2	Printer with security algorithm A printer has a security algorithm configured to determine a source of an incoming print job and accept or reject the print job based on the source of the print job.
US07869068B2	Printer driver extension and related method A software plug-in module extends the functionality of a standard printer driver. For example, the plug-in facilities the ability to provide a customizable user interface. The plug-in also facilitates the use of multiple forms of color management and half-tone screening. Further, the plug-in provides a system and method for determining the status of a printing device.
US07869066B2	Device, method, and computer-readable medium for creating print data This specification discloses a computer program product manufacturing method. This method is provided with a forming step, a combining step, and a storing step. The forming step instructs the printer to form a dot at a predetermined coordinate. The combining step creates a combination of the predetermined coordinate and a sub-coordinate which is different from the predetermined coordinate. A distance between the predetermined coordinate and a position of a dot formed when the printer tries to form the dot at the sub-coordinate is shorter than the distance between the predetermined coordinate and the position of the dot formed in the forming step. A storing step stores a computer program into a memory medium. The computer program includes instructions for ordering the computer device to perform a choosing step and a converting step. The choosing step chooses a coordinate from bit-mapped data. The converting step converts the coordinate chosen in the choosing step into the sub-coordinate in a case where the coordinate chosen in the choosing step has been combined with the sub-coordinate in the combining step.
US07869062B2	Apparatus for supporting substrate, apparatus for measuring surface potential, apparatus for measuring film thickness, and apparatus for inspecting substrate In a substrate supporting apparatus of a surface potential measuring apparatus, a first fluid is ejected around a target region on an upper surface of a substrate from a circular-shaped first porous member of a first fluid ejection part and a second fluid is ejected onto a lower surface of the substrate from a circular-shaped second porous member of a second fluid ejection part which is opposite to the first fluid ejection part. The substrate can be supported and flattened between the first fluid ejection part and the second fluid ejection part. Also, it is possible to keep the distance between the substrate and the first porous member, with a simple construction. As a result, a probe can be positioned above a flatted target region with leaving a predetermined spacing, to perform measurement of a surface potential of the target region on the substrate with high accuracy.
US07869061B2	Surface-distortion measuring device and method A surface-distortion measuring device and a surface-distortion measuring method can quantitatively, rapidly, and highly accurately measure and evaluate surface-distortion distribution at all of observable points on a specular or semi-specular surface of a measurement target. The device includes pattern displaying means 2 capable of switching and displaying a plurality of kinds of light-and-shade patterns 5, capturing means 3 for capturing mirror images, reflected in the specular or semi-specular surface of a measurement target 1, of the plurality of light-and-shade patterns displayed on the pattern displaying means, and surface-distortion distribution calculating means 10 for performing image processing on the captured mirror images of the plurality of light-and-shade patterns to calculate surface-distortion distribution of the measurement-target surface.
US07869060B2	Jig for measuring an object shape and method for measuring a three-dimensional shape A jig for measuring an object shape includes a plate having a first surface and a second surface opposed to the first plate and two reference balls fixed to the plate, each ball surface being exposed on both the first and second surfaces. A reference plane is fixed to the plate, the reference plane having a first plane and a second plane that are parallel to each other, the first and second planes being exposed on the first and second surfaces of the plate, respectively. An object-holding portion is fixed to the plate, the object-holding portion having a hole passing through the plate, the object-holding portion being able to hold an object in the hole with the front and back surfaces of the object being exposed on the first and second surfaces of the plate, respectively.
US07869059B2	Height-limit calculation apparatus, height-limit calculation method, method of manufacturing three-dimensional structure, and computer product A height-limited-area-information creating device creates a clip plane on a base plane of a printed circuit board, and sets a view so that an image faces the base plane and a normal to the base plane represents a depth direction of the image. According to the view, a three-dimensional image of a chassis-side component is created. The base plane is divided into unit areas, and one of the unit areas is selected. Coordinates of vertices of the selected unit area are transformed to screen coordinates to acquire a component and a polygon at the position of the screen coordinates. Distances from respective four vertices to the polygon are calculated as height, and a minimum value is determined as a maximum height for the unit area.
US07869058B2	Apparatuses and methods for evaluating performance of optical systems A system for evaluation of optical quality of an optical device includes a light source configured to generate light, the generated light be received by an optical device. An interferometric lens apparatus is removably mounted to the optical device to generate interference fringes. A camera device is configured to receive and display the interference fringes, and a computer configured to analyze the interference fringes received from the camera device to determine aberrations of the optical device and generate a recommendation to correct the determined aberrations. Methods for evaluating the optical quality of an optical device are also described.
US07869054B2	Polarization insensitive multiple probe An apparatus for determining a polarization-insensitive interferometric signal and a birefringence for a sample and methods for using such an apparatus to characterize the sample are proved herein. Such apparatuses may generally be designed to eliminate birefringence associated with the apparatus itself, collect data from the sample using light in both orthogonal states, and determine the interference birefringence associated with the collected data.
US07869052B2	Method and amplifying stage for suppressing modulation distortion rate sensing errors in a resonator fiber optic gyroscope A device and a method for suppressing 2nd order harmonic distortion in a Resonator Fiber Optic Gyroscope includes driving a laser to generate at least one of a plurality of counter propagating laser beams traveling through a fiber optic resonator according to a modulated signal. The modulated signal can be represented by a polynomial having two terms, and each of the two terms is suitably multiplied by a coefficient and a constant. A modulation amplitude adjuster amplifies the modulation signal by an amplification factor as it is used to drive the laser. When the amplification factor is suitably chosen to represent a square root of a ratio of the constants, the total harmonic distortion in the RFOG is minimized.
US07869046B2	Full hemisphere bi-directional reflectance distribution function instrument According to an embodiment there is provided a bi-directional reflectance distribution function (BRDF) instrument, including an enclosure having a plurality of sides. A first side has a relatively high reflectivity substantially non-specular interior surface, while each of the remaining sides has a relatively low reflectivity interior surface. A bottom of the enclosure has a relatively low reflectivity interior surface. A viewport is formed in one of the plurality of sides or the bottom, at least one exit port is formed in at least one of the sides, and at least one entrance port is formed in at least of the sides.
US07869045B1	Target substance detection system In a localized surface plasmon detection system using a metal thin film pattern, by radiating light for detection on a detecting element using an effective light source which has a peak out of an axis, the present invention strikes a balance between narrowing a peak width of a spectrum and highly efficient illumination even if it is a case of using converging or diffused light.
US07869044B2	Optical sensing system based on a micro-array structure An optical sensing system includes an optical sensor that includes a substrate having an upper surface and a plurality of tapered walls on the substrate, wherein at least one of the tapered walls is aligned along a longitudinal direction, wherein the plurality of tapered walls comprise sloped surfaces oriented at oblique angles relative to the upper surface, wherein the sloped surfaces are configured to adsorb molecules of a chemical sample, a light source configured to emit an incident light beam to impinge the plurality of tapered walls adsorbed with molecules of the chemical sample; and a detector that can collect light scattered by the plurality of tapered walls to allow a determination of the sample chemical.
US07869043B2	Automated passive skin detection system through spectral measurement A passive skin detection system includes a main body which houses a collection optics system having an image splitting device, a visible light filter mechanism having a plurality of narrow band filters and an image capture system. The image capture system stores visible light data as a plurality of digital images formed from a plurality of pixels. Each of the plurality of digital images is associated with visible light passed through a respective one of the plurality of narrow band filters. An image processing system, operatively connected to the image capture system, compares relative intensities of each of the plurality of digital images to identify one or more of the plurality of pixels having an absorption bandwidth indicating a presence of skin. The processing system determines whether a person, identified by his skin, is present in any of the images captured by the detection system.
US07869042B2	Fluorometers In apparatus for the production and detection of fluorescence at a sample surface, the height of the apparatus above the sample surface is reduced, and loss of the emitted fluorescence due to reflection loss and light scattering is minimized. The apparatus comprises a three-dimensionally curved light reflecting surface (40) that directs light from a light source (32) transversely to its original path and focuses the light on to an illumination zone (30) at or below the sample surface. The reflecting surface (40) also collects, directs and at least partially collimates emitted fluorescence transversely to its original path and towards a detector (46).
US07869041B2	Color measurement instrument The color measurement instrument includes an illumination system and a sensing system. The illumination system is composed of a light emitting element and a light pipe. The light pipe has an incident surface at an illuminating end of the light emitting element and an ejected surface adjacent to a sensing platform of a sensing system. The sensing system includes a light collection device and a sensing platform for disposing a testing object. The light collection device includes an aperture stop for adjusting the shape of a light spot on a color sensor, a light collection lens set for detecting and projecting an image of a testing object on the sensing platform, a field stop for separating a light from an area, an uniform lens set for spreading the image on the field stop, and a color sensor for capturing and analyzing the color to adjust the brightness.
US07869036B2	Analysis apparatus for analyzing a specimen by obtaining electromagnetic spectrum information An analysis apparatus for analyzing a specimen comprises a spectral separator for dispersing spatially an electromagnetic wave introduced from the specimen into spectral components, a sensing element array containing plural sensing elements for sensing the spectral components of the electromagnetic wave dispersed spatially by the spectral separator, and a spectrum calculator for calculating the spectrum from the signal sensed by the sensing elements; the sensing element array having sensitivities different to each of the spectral components of the electromagnetic wave dispersed spatially by the spectral separator, and the spectral separator and the sensing element array being placed so as to receive the spectral components by each of the sensing elements at different incident angles.
US07869035B2	Sample table for a food analyzing device Disclosed is a sample table for a food analyzing device used for analyzing a food sample. Said sample table includes a sample holder (14) for receiving the food sample, a means for moving the sample holder (14), and a housing (12) that surrounds the moving means. The moving means and the sample holder (14) are magnetically coupled to each other such that the sample holder (14) can be moved relative to the housing (12) outside the housing (12). Also disclosed is a food analyzing device for spectroscopically analyzing food samples, said device encompassing such a sample table (10).
US07869033B2	Cancer detection by optical analysis of body fluids The optical analysis of body fluids is a method of determining the relative concentration of certain bio-molecules in blood and urine samples by fluorescent spectroscopy. The relative concentration of these bio-molecules serves as a marker or screening test to assess the presence and stage of cancer in some organ or tissue of the body, and in some cases, the presence of particular types of cancer in the body. The bio-molecules include various species of porphyrin, flavins (including flavin mononucleotide[FMN], flavin adeno dinucleotide [FAD], and riboflavin), bile components (including biliverdin and bilirubin), tyrosine, tryptophan, and NAD(P)H. The fluorescent spectroscopy techniques include determining intensity maxima in the emission spectra at particular excitation wavelengths characteristic of the bio-molecules, determining intensity maxima in the excitation spectra at particular emission wavelengths characteristic of the bio-molecules, and synchronous scanning of the excitation and emission spectra while maintaining particular offsets in the wavelengths.
US07869024B2	Method and its apparatus for inspecting defects A defect inspection apparatus is capable of inspecting an extremely small defect present on the top and edge surfaces of a sample such as a semiconductor substrate or a thin film substrate with high sensitivity and at high speed. The defect inspection apparatus has an illumination optical system, a plurality of detection optical units and a signal processor. One or more of the detection optical units receives either light diffracted from an edge portion of the sample or light diffracted from an edge grip holding the sample. The one or more of the detection optical units shields the diffracted light received by the detection optical unit based on a signal obtained by monitoring an intensity of the diffracted light received by the detection optical unit in order to inspect a sample portion located near the edge portion and a sample portion located near the edge grip.
US07869023B2	System for detecting anomalies and/or features of a surface A cylindrical mirror or lens is used to focus an input collimated beam of light onto a line on the surface to be inspected, where the line is substantially in the plane of incidence of the focused beam. An image of the beam is projected onto an array of charge-coupled devices parallel to the line for detecting anomalies and/or features of the surface, where the array is outside the plane of incidence of the focused beam.
US07869008B2	Device of detecting light reflecting speed and direction, and method thereof A device of detecting light reflecting speed and directions includes a light source, a light-guided pulley, a reflector, photo detectors, barriers, a processor and a display unit. The light source generates incident light, the light-guided pulley is located at one side of the light source, and includes a support moving along the pulley track. The reflector is installed on the support to reflect the incident light. The photo detectors detect the incident light reflected by the reflector. The barriers are located at two sides of the light source and make the incident light to be a light beam and travel in straight line direction. The barriers are respectively installed between said photo detectors to isolate the incident light. The processor receives the light signals transmitted from photo detectors and processes the light reflecting speed and directions according to the light signals. The processed result is displayed on the display unit.
US07869007B2	Ranging apparatus and ranging method A first ranging apparatus includes a synchronizing signal generator for generating a synchronizing signal at a constant interval, a light-emitting unit for emitting an intensity-modulated light in response to the synchronizing signal input thereto, a light-detecting unit for detecting a reflected light from an object irradiated with the modulated light, in response to the synchronizing signal input thereto, a calculating unit for calculating the distance up to the object based on the phase difference between the modulated light and the reflected light, and a synchronizing signal control unit for changing an arrival time of the synchronizing signal from the synchronizing signal generator at the light-detecting unit, depending on the number of times that the synchronizing signal is generated. The light-detecting unit samples the amount of the reflected light in exposure periods established at a constant cycle length with reference to a time at which the synchronizing signal is input thereto.
US07869005B2	Method and device for determining a distance from an object A device for determining a distance from an object may include a light emitter for emitting an emission light beam, a light receiver for receiving a reception light beam, and an evaluation unit for determining the distance on the basis of a propagation time of the emission and reception light beams. The reception light beam may arise as a result of reflection of the emission light beam at the object. The light receiver may have a reception optical unit comprising a first lens element and a pinhole diaphragm. A light-impermeable element may shade a central region of the reception optical unit in such a way that the reception light beam is incident in the form of a light ring on the pinhole diaphragm. A second lens element, which is substantially hat-shaped in cross section, is arranged between the first lens element and the pinhole diaphragm.
US07869003B2	Lithographic apparatus and device manufacturing method with reticle gripper A reticle gripper to hold a reticle of a lithographic apparatus is presented. The reticle gripper includes three gripper structures to contact the surface of the reticle. Each of the three gripper structures determines a position with respect to the reticle gripper of one of the points on the surface of the reticle.
US07869002B2	Reducing contamination in immersion lithography A method for reducing contamination in immersion lithography includes retaining a semiconductor wafer on a support surface of a wafer chuck, the wafer chuck having a gap therein, the gap located adjacent an outer edge of the wafer, and the gap containing a volume of immersion lithography fluid therein; and providing a fluid circulation path within the wafer chuck so as to facilitate the radial outward movement of the immersion lithography fluid in the gap, thereby maintaining a meniscus of the immersion lithography fluid at a selected height with respect to a top surface of the semiconductor wafer.
US07869000B2	Stage assembly with lightweight fine stage and low transmissibility A stage assembly (220) that moves a work piece (200) along a first axis, along a second axis and along a third axis includes a first stage (238), a first mover assembly (242) that moves the first stage (238) along the first axis, a second stage (240) that retains the work piece (200), a second mover assembly (244), and a non-contact bearing (257). The second mover assembly (244) moves the second stage (240) relative to the first stage (238) along the first axis, along the second axis, and along the third axis. The non-contact bearing (257) supports the mass of the second stage (240). Further, the non-contact bearing (257) allows the second stage (240) to move relative to the first stage (238) along the first axis and along the second axis. The second mover assembly (244) can move the second stage (240) with at least four degrees of movement.
US07868998B2	Lithographic apparatus Liquid is supplied to a space between the projection system and the substrate by an inlet. In an embodiment, an overflow region removes liquid above a given level. The overflow region may be arranged above the inlet and thus the liquid may be constantly refreshed and the pressure in the liquid may remain substantially constant.
US07868997B2	Projection optical system inspecting method and inspection apparatus, and a projection optical system manufacturing method In the inspection apparatus of this projection optical system, a folding glass member, comprising a flat surface part and a reflecting spherical surface part opposing to the flat surface part, is disposed on the image plane side of the projection optical system so that the flat surface part opposes to the projection optical system. Further, in a state wherein a liquid is supplied between the projection optical system and the folding glass member, a measuring beam emitted from an interferometer unit enters the projection optical system; the measuring beam that transmitted through the projection optical system and the liquid, and entered the folding glass member is reflected by the reflecting spherical surface part, and once again passes through the liquid and the projection optical system; and the interference fringes obtained from the measuring beam and the reference beam generated within the interferometer unit are detected.
US07868994B2	Liquid crystal display device and method for manufacturing the same A liquid crystal display device includes a first substrate and a second substrate facing each other, column spacers at designated areas of the second substrate, protrusions having a first height on the first substrate corresponding to portions of the column spacers, compensation patterns having a second height on the first substrate corresponding to the edges of the column spacers, the second height being lower than the first height, and a liquid crystal layer filling a gap between the first and second substrates.
US07868992B2	Liquid crystal display device having patterned spacers and method of fabricating the same A liquid crystal display device includes first and second substrates, a black matrix on the second substrate, the black matrix including a plurality of open portions corresponding to pixel regions and a plurality of holes disposed adjacent to the plurality of open portions, color filter layers on the black matrix, and a plurality of patterned spacers corresponding to each of the plurality of holes between the first and the second substrates.
US07868990B2	Liquid crystal panel having a plurality of thermal-hardened sealant blocks surrounding a closed loop UV light irradiated and thermal-hardened sealant An exemplary liquid crystal panel (20) includes a first substrate (21); a second substrate (23) parallel to the first substrate; a sealant; a liquid crystal layer (27) and a light shielding member (234). The sealant is configured for adhering the two substrates together, the sealant including a first portion (24) and a second portion (25). The liquid crystal layer is sandwiched between the two substrates. The light shielding member corresponds to the second portion of the sealant. The first portion of the sealant is adjacent to the liquid crystal layer. The second portion of the sealant surrounds the first portion of the sealant. The second portion of the sealant has stronger adhesion than the first portion. The liquid crystal panel has improved reliability.
US07868987B2	Liquid crystal panel for liquid crystal display device To utilize effectively the panel space of the liquid crystal panel, this invention has provided a wiring structure, in which the seal material and BM are coated in a superposition and the UV light is irradiated from one side of the TFT substrate; this invention has also provided a wiring structure, in which the seal material can still be irradiated by the UV light with high efficiency, meanwhile, the drop of the resistance value of the metal wiring on the TFT substrate can be restricted to a specific range. The solution is: the liquid crystal dropped is sandwiched between the TFT substrate and the CF substrate, meanwhile the liquid crystal panel is formed by adhering the light cured seal material disposed at the peripheral area of two substrates. In the adhering-formed liquid crystal panel, for the wiring portion, which is the portion of wiring disposed on the TFT substrate superposing the light cured seal material, the wiring structure is formed as follows, that is, the region of the seal material is divided into three regions, an adjacent region, a middle region and an outer region. The function of the respective regions must be held, and the resistance of the metal wiring is minimized under the precondition that the respective function is satisfied sufficiently.
US07868984B2	Electro-optical device and method of manufacturing the same In a liquid crystal display device, gate lines and common lines are first concurrently formed, and after an interlayer film is formed, a pixel electrode, common electrodes, and source lines are formed at the same time. By this, a electrode pattern can be made simple and manufacturing steps are simplified. Further, wiring lines and electrode disposed in the layer closest to a liquid crystal layer are made the pixel electrode, common electrodes and source lines, and the shapes thereof are made simple.
US07868982B2	Pixel structure of a color filtering array substrate A pixel structure of a color filtering array substrate includes a color filtering layer, a black matrix layer, and an electrode layer. The black matrix layer surrounds the color filtering layer. The electrode layer covers the color filtering layer and the black matrix layer. Besides, the electrode layer has at least one opening therein, and the opening is located above the black matrix layer.
US07868981B2	Liquid crystal display device A liquid crystal display device including a pair of substrates and a liquid crystal layer sandwiched between the pair of substrates, as well as a source electrode, a Cs intermediate electrode, and a pixel electrode formed on one of the pair of substrates. The liquid crystal display device also includes vertical alignment films formed on the pair of substrates and polymer layers formed on the vertical alignment films, wherein a contact hole, which connects the source electrode and the pixel electrode, and another contact hole, which connects the pixel electrode and the Cs intermediate electrode, are both formed at a liquid crystal domain boundary.
US07868979B2	Liquid crystal display device A liquid crystal display device includes a liquid crystal display panel to which an OCB mode is applied, and an optical compensation element which optically compensates a retardation of the liquid crystal layer in a predetermined display state in which a voltage is applied to the liquid crystal layer. The optical compensation element includes a polarizer, a first retardation plate which is disposed between the polarizer and the liquid crystal display panel and in which discotic liquid crystal molecules are fixed in a state in which the discotic liquid crystal molecules are hybrid-aligned along a normal direction, and a second retardation plate which is disposed between the polarizer and the first retardation plate and has wavelength dispersion characteristics which are opposite to wavelength dispersion characteristics of an in-plane retardation in the liquid crystal layer.
US07868976B2	Transflective liquid crystal display with gamma harmonization In a transflective liquid crystal display having a transmission area and the reflection area, the transmissive electrode is connected to a switching element to control the liquid crystal layer in the transmission area, and the reflective electrode is connected to the switching element via a separate capacitor to control the liquid crystal layer in the reflection area. The separate capacitor is used to shift the reflectance in the reflection area toward a higher voltage end in order to avoid the reflectance inversion problem. In addition, an adjustment capacitor is connected between the reflective electrode and a different common line. The adjustment capacitor is used to reduce or eliminate the discrepancy between the gamma curve associated with the transmittance and the gamma curve associated with the reflectance.
US07868975B2	Color filter substrate and fabricating method thereof and liquid crystal display panel A color filter substrate having a substrate, a black matrix layer, a first filter layer and a second filter layer is provided. The black matrix layer is disposed on the substrate, and multiple pixel areas is defined on the substrate by the black matrix layer. Each pixel area includes a first sub-pixel area and a second sub-pixel area. The first and second filter layer are disposed in the pixel area, and the second filter layer covers the first filter layer. A refractive index of the second filter layer is greater than that of the first filter layer, such that light emitting direction of the first sub-pixel area is different from that of the second sub-pixel area. Besides, a fabricating method of the color filter substrate and an LCD panel with the color filter substrate are provided. The LCD panel with 3D image display or dual-view function can be easily manufactured.
US07868969B2	Area light source apparatus and liquid crystal display apparatus assembly Disclosed herein is an area light source apparatus for illuminating a liquid crystal display apparatus of the transmission type, which has a display area formed from a plurality of pixels arrayed in a two-dimensional matrix, from the back, including: a plurality of light emitting element assemblies each provided as a light source and each including a light emitting element and a lens through which light emitted from the light emitting element passes; and a plurality of dummy lenses disposed in the proximity of each of the light emitting element assemblies and configured same as the lenses of the light emitting element assemblies.
US07868968B2	Liquid crystal module A liquid crystal module includes a rear frame, a panel support, a liquid crystal panel and a bezel. The rear frame has a side plate, a top plate extending outward from the side plate, an outer plate extending rearward from the top plate and a bezel fixing component protruding outward from the top plate with respect to the outer plate. The panel support is disposed on the rear frame and covers the outer plate and the top plate of the rear frame. The liquid crystal panel is disposed on the panel support. The bezel is fixedly coupled to the bezel fixing component of the rear frame and holds an edge portion of the liquid crystal panel on the panel support.
US07868965B2	Liquid crystal display device with bezel having bead portion An exemplary LCD device (2) includes a liquid crystal display panel (21) and a housing assembly (23). The LCD panel includes a first substrate (211), a second substrate (213) parallel to the first substrate, and a polarizer (215) attached on the first substrate. The housing assembly is arranged for holding the liquid crystal display. The housing assembly includes a bezel (231). The bezel includes at least one bead portion (25) adjacent to an inner free edge thereof. The at least one bead portion elastically contacts a peripheral edge area of the first substrate, and the inner free edge of the bezel covers a peripheral edge portion of the polarizer.
US07868964B2	Display panel manufacturing apparatus including vacuum controlled panel holder and method of using same A liquid crystal display panel manufacturing apparatus is provided with a stage for fixing a substrate having an optical film adhered to at least one of surfaces of the substrate. The stage has a suction hole for attracting the substrate by suction. The stage has an interposition member located around a region provided with the suction hole, and the interposition member has a closed frame-like form in a plan view. A display panel manufacturing apparatus that can stably fix the substrate is provided.
US07868963B2	Optical modulation element unit, projection optical unit, and image projection apparatus An optical modulation element unit is disclosed which employs a film-type optical function member and a reflective optical modulation element and allows dust prevention for the reflective optical modulation element while preventing an increased number of parts other than optically required parts. The optical modulation element unit includes a light-transmissive substrate, a film-type optical function member attached to the light-transmissive substrate, a reflective optical modulation element separately placed from the light-transmissive substrate, a cover member which surrounds a space between the light-transmissive substrate and the reflective optical modulation element, and a holding member which holds the light-transmissive substrate. The holding member has a guide portion which guides an air flow to a space along a surface of the light-transmissive substrate, the surface being a surface on the side opposite to the reflective optical modulation element.
US07868962B2	Pixel circuit, pixel array and method for discharging a capacitor unit of the pixel circuit A pixel circuit for a liquid crystal display panel includes a capacitor unit, a voltage-regulating mechanism, a first switching member, and a second switching member. The liquid crystal display panel includes a plurality of scan lines and data lines. The voltage-regulating mechanism is coupled to the first and second liquid crystal capacitors thereby enabling the first and second liquid crystal capacitors to be configured with different voltages when a voltage is applied to the capacitor unit. The first switching member is coupled to the capacitor unit, one of two corresponding scan lines, and one of two corresponding data lines. The second switching member is coupled to the second liquid crystal capacitor, the other of two corresponding scan lines.
US07868960B2	Active matrix substrate, display device, and television receiver An active matrix substrate includes a plurality of transistors. A source electrode is connected with a data signal line, and a drain electrode is connected with a pixel electrode in each transistor. The source electrode is located on a semiconductor layer, and at least a portion of the drain electrode is overlapped with the gate electrode. A gate insulating film covering the gate electrode of each transistor has a thin section having a reduced film thickness, at a portion where the gate insulating film is overlapped with each gate electrode. An overlapping area of the thin section with the source electrode is smaller than an overlapping area of the thin section with the drain electrode. Thus, the active matrix substrate can prevent the generation of short-circuits between the signal lines (between the data signal line and a scanning signal line) in a TFT forming region, while guaranteeing TFT characteristics.
US07868958B2	Manufacturing liquid crystal display with incremental removal of an insulating layer A method for forming a liquid crystal display device includes incremental removal of a gate insulator. After forming a gate line layer, a gate insulator, a semiconductor layer, a data layer and a photoresist layer, a mask is used to define a plurality of regions in the photoresist layer through selective development. The developed portions of the photoresist layer are removed and parts of the underlying layers are etched in a plurality of steps using the photoresist layer as a mask. The gate insulator is partially removed during the etching of the data layer and completely removed during formation of source and drain electrodes.
US07868957B2	Thin film transistor, display device and liquid crystal display device and method for manufacturing the same As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.
US07868950B1	Reducing noise and artifacts in an image In a method of processing an input image, compression parameters of the input image are determined and luminance artifacts in the input image are reduced to obtain an improved luminance component of the input image, where the determined compression parameters guide the luminance artifact reduction. In addition, a chrominance noise and chrominance artifact level of the input image is estimated and a spatially-correlated chrominance noise and chrominance artifact of the input image is reduced with the improved luminance component, where the estimated chrominance noise and chrominance artifact level guide the spatially-correlated chrominance noise and chrominance artifact reduction to obtain an improved chrominance component of the input image. Moreover, an output image having the improved luminance component and the improved chrominance component is outputted.
US07868947B2	Moving image display device and method for moving image display In the moving image display device of the invention, a synthesis circuit inputs signals representing specified values of pixel rate factors R2 and R3 from a pixel rate factor specification circuit, while inputting overscanned frame image data D1 in the units of pixels from a 1st latch circuit. The synthesis circuit extracts a preset number of pixels corresponding to the specified value of the pixel rate factor R2 from a prior frame image, while extracting a preset number of pixels corresponding to the specified value of the pixel rate factor R3 from a latter frame image. The positions of pixels to be extracted from the latter frame image are complementary to the positions of pixels to be extracted from the prior frame image. The synthesis circuit combines the extracted pixels of the prior frame image with the extracted pixels of the latter frame image by a logical OR operation to generate intermediate frame image data D2. This technique of the invention is significantly simpler than the prior art technique but still effectively prevents flicker in a moving image to ensure smooth display of the moving image.
US07868945B2	Function key assembly and portable device having the same A function key assembly and a portable device having the same. The function key assembly is exposed to an outside of the portable device having a screen to allow a user to select various functions, includes a direction key unit provided in the portable device, and having a plurality of buttons to select or move a menu on the screen, a mode key unit movably provided around the direction key unit to allow the user to select a predetermined mode provided from the portable device according to a position motion thereof, and a circuit board provided inside the portable device to prevent the direction key unit and the mode key unit from being detached therefrom, and having switches to generate signals in response to an operation of the direction key unit and the mode key unit.
US07868943B2	Image pickup apparatus and interchangeable lens An image pickup apparatus 100 includes a memory 52 that stores information on an object distance obtained from an interchangeable lens 220 mounted on the image pickup apparatus and a memory controller 50 that retains the information on the object distance in the memory also after the interchangeable lens is removed from the image pickup apparatus. The image pickup apparatus of a changing-lenses type in which an object in-focus at a same distance can be obtained in a short time when lenses are changed is provided.
US07868938B2	Image pickup device and image pickup apparatus An image pickup device having a photoelectric conversion unit having a plurality of photoelectric conversion elements arranged in a matrix pattern for converting exposed light into electric charges and accumulating the same and an electronic shutter function for controlling the exposure time for each frame including: a first reader for reading out electric charges exposed during a standard exposure time from respective pixels including the photoelectric conversion elements in the exposed area of the photoelectric conversion unit in a destructive read-out method; a second reader for reading out electric charges exposed during a short exposure time, which is an exposure time shorter than the standard exposure time, from the respective pixels including the photoelectric conversion elements during the same exposure period as the first reader in a nondestructive read-out method; and a saturation predictor for predicting whether or not the amounts of accumulated electric charges in the respective pixels being exposed during the standard exposure time are saturated on the basis of a non-standard exposure pixel data including the electric charges being exposed during the short exposure time, which are read out by the second reader.
US07868930B2	Method and apparatus for automatic white balance A method of automatic white balance for an image capture system is disclosed. The automatic white balance mechanism ascertains the illuminant source of an image by analyzing the number of white pixels within a predefined white area in a color space diagram. The automatic white balance mechanism also determines gain adjustments based on the evaluating the average RGB values to achieve white balance.
US07868923B2	Imaging system An optical system forms an optical image on an imager, and a read control block selects a read rule for the imager depending on a magnification addressed by a magnification address block. The imager transforms an optical image at an addressed area into electrical signals in compliance with the read rule. The read image signals are stored in n image memories, where n is the number of images necessary for ultra-resolution processing. Ultra-resolution processing is built up of a motion estimation block and a high-resolution image estimation block adapted to estimate image data having a high-resolution image sequence. A selector selects a basic image for motion estimation and an image that is estimated in terms of motion.
US07868922B2	Foreground/background segmentation in digital images An implementation efficient method of distinguishing between foreground and background regions of a digital image of a scene includes capturing two images of nominally the same scene and storing the captured images in DCT-coded format. The first image is taken with the foreground more in focus than the background and the second image is taken with the background more in focus than the foreground. Regions of the first image are assigned as foreground or background according to whether the sum of selected higher order DCT coefficients decreases or increases for the equivalent regions of the second image.
US07868919B2	Control system for allowing an operator to proportionally control a work piece A control system (1) includes a work piece, such as a camera (2), having an adjustable functionality (3). A configuration device is associated with the work piece and is responsive to one or more control signals (7), the configuration device affects one or more selective adjustments to the adjustable functionality (3). Further included is an input device, such as a mouse (11), for generating one or more input signals (13) in response to one or more predetermined manual inputs (15) from an operator (9). Also a controller (21) is included for providing the control signals (7), the controller (21) being implemented in a graphical user environment and being responsive to the impute signals (13) such that the selective adjustments made to the adjustable functionality (3) are substantially proportional.
US07868918B2	Image stabilization control circuit of image pickup apparatus An image stabilization control circuit comprises a plurality of vibration detecting elements for detecting vibration of an image pickup apparatus; a plurality of position detecting elements for detecting a position of an optical component; an analog/digital converter circuit for converting output signals of the plurality of vibration detecting elements and the plurality of position detecting elements to digital signals; and a logic circuit for generating a control signal for driving the optical component based on the output signals of the plurality of vibration detecting elements and the plurality of position detecting elements digitalized by the analog/digital converter circuit, wherein the analog/digital converter circuit digitalizes and outputs the output signal of the plurality of vibration detecting elements with respect to a plurality of axis directions, and successively digitalizes and outputs the output signal of the plurality of position detecting elements with respect to a plurality of axis directions.
US07868917B2	Imaging device with moving object prediction notification The present invention provides an imaging device comprising: an image pickup device which picks up an object, an image acquisition device which continuously acquires image signals indicating the object via the image pickup device, a face recognition device which continuously recognizes the face of the object at predetermined time intervals from the continuously acquired image signals, a tracking indication device which indicates to keep track of the face of the object, a prediction device which predicts the position of the face of the object after a predetermined time elapsed since the tracking indication device indicated tracking based on a plurality of pieces of information about the position of the continuously recognized face of the object and the time intervals of recognizing the face, and a notification device which notifies a user of the predicted position of the face of the object.
US07868916B2	Image Transmitter and print system An image processing device decides whether the image size of the input image obtained by shooting the image or the edited image is larger than an image size required for printing by the printer. When it is decided that the image size is larger than the image size required at the time of printing, the image processing device automatically resizes the input image or the edited image so that the image size thereof is changed to an image size required for printing, generates a new print image, and transmits the new print image to the printer. Therefore, it is possible to edit an input image, generate a print image from information required for printing, transmit the print image to a printer, and print a desired image in a short time.
US07868911B2	Surveillance camera capable of adjusting position and a controlling method thereof A surveillance camera capable of adjusting a position thereof, and a controlling method thereof are disclosed. The surveillance camera capable of adjusting a position to photograph or capture video images of a monitored area by adaptively driving a camera part in accordance with a predetermined monitoring mode selected by an external controller, includes a pan sensor detecting a standard position of a pan motor that transversely rotates the camera part; a tilt sensor detecting a standard position of a tilt motor that perpendicularly rotates the camera part; and a control part outputting a driving control signal for driving the pan motor and/or the tilt motor, adaptively, according to the received monitoring mode selecting signal, such that standard positions of the pan motor and/or the tilt motor are detected respectively by the pan sensor and/or the tilt sensor by a certain period set according to the monitoring mode. Accordingly, positions of the pan motor and the tilt motor are adaptively initialized during the operation thereof, and therefore, position error caused by loss of driving pulse can be compensated, thereby enabling more correct monitoring work.
US07868906B2	Thermal printer with reduced donor adhesion Thermal printers and methods for operating thermal printers are provided. In one method, a sequence of thermal print head control signals is generated that is adapted to cause an array of thermal elements to cause the donor material to transfer from a donor ribbon in a manner that is modulated in accordance with image data and attenuated in accordance with an attenuation pattern. A receiver medium is urged through the printing nip while the thermal print head control signals are transmitted to the thermal print head to cause the donor material to transfer from the donor web in an image modulated pattern having a longitudinal length that is larger than a longitudinal length of the receiver medium. The attenuation pattern provides a relatively high level of attenuation at a portion of the printing wherein there is greater risk that the receiver medium will not be within the printing nip.
US07868904B2	Image processing method and image processing apparatus On a captured image corresponding to acquisition time t of acquisition of the captured image, a virtual-space image based on the position and/or orientation at time that depends on the time t and a lag d is superimposed. An image on which the virtual-space image is superimposed is displayed. (S602-S606).
US07868902B1	System and method for pixel data row forwarding in a 3-D graphics pipeline A system and method for a row forwarding of pixel data in a 3-D graphics pipeline. Specifically, in one embodiment a data write unit capable of row forwarding in a graphics pipeline includes a first memory and logic. The first memory stores a plurality of rows of pixel information associated with a pixel. The plurality of rows of pixel information includes data related to surface characteristics of the pixel and includes a first row, e.g., a front row, and a second row, e.g., a rear row. A data write unit includes first logic for accessing a portion of the second row and for storing data accessed therein into a portion of the first row. The data write unit also comprises logic for recirculating the plurality of rows of pixel information to an upstream pipeline module for further processing thereof.
US07868901B1	Method and system for reducing memory bandwidth requirements in an anti-aliasing operation Embodiments of the present invention sets forth a method and system for reducing memory bandwidth requirements for an anti-aliasing operation. The first virtual coverage information for a pixel involved in an anti-aliasing operation is maintained in memory. If a certain operating condition of the anti-aliasing operation deterministically implies the second virtual coverage information for this pixel, the second virtual coverage information, as opposed to the first virtual coverage information, is used in the anti-aliasing operation. In such situations, since the virtual coverage information is implied, it does not have to be accessed from memory, thereby improving overall system performance.
US07868897B2	Apparatus and method for memory address re-mapping of graphics data A method and apparatus for creating, updating, and using guest physical address (GPA) to host physical address (HPA) shadow translation tables for translating GPAs of graphics data direct memory access (DMA) requests of a computing environment implementing a virtual machine monitor to support virtual machines. The requests may be sent through a render or display path of the computing environment from one or more virtual machines, transparently with respect to the virtual machine monitor. The creating, updating, and using may be performed by a memory controller detecting entries sent to existing global and page directory tables, forking off shadow table entries from the detected entries, and translating GPAs to HPAs for the shadow table entries.
US07868894B2	Operand multiplexor control modifier instruction in a fine grain multithreaded vector microprocessor The present invention is generally related to the field of image processing, and more specifically to an instruction set for processing images. Vector processing may involve rearranging vector operands in one or more source registers prior to performing vector operations. Typically, rearranging of operands in source registers is done by issuing a plurality of permute instructions that require excessive usage of temporary registers. Furthermore, the permute instructions may cause dependencies between instructions executing in a pipeline, thereby adversely affecting performance. Embodiments of the invention provide a level of muxing between a register file and a vector unit that allow for rearrangement of vector operands in source registers prior to providing the operands to the vector unit, thereby obviating the need for permute instructions.
US07868893B2	Integration of graphical application content into the graphical scene of another application This application describes a system that captures 3D geometry commands from a first 3D graphics process and stores them in a shared memory. A second 3D environment process creates a 3D display environment using a display and display hardware. A third process obtains the 3D commands and supplies them to the hardware to place 3D objects in the 3D environment. The result is a fused display environment where 3D objects are displayed along with other display elements. Input events in the environment are analyzed and mapped to the 3D graphics process or the environment where they affect corresponding processing.
US07868890B2	Display processor for a wireless device A display processor includes an interface unit, an instruction processor, a synchronization unit, at least one processing unit, and a device buffer. The interface unit receives input image data (e.g., from a main memory) and provides output image data for a frame buffer. The instruction processor receives instructions (e.g., in a script or list) and directs the operation of the processing unit(s). The synchronization unit determines the location of a read pointer for the frame buffer and controls the writing of output image data to the frame buffer to avoid causing visual artifacts on an LCD screen. The processing unit(s) may perform various post-processing functions such as region flip, region rotation, color conversion between two video formats (e.g., from YCrCb to RGB), up/down image size rescaling, alpha-blending, transparency, text overlay, and so on.
US07868888B2	Course grid aligned counters Methods and apparatus implementing and using techniques for scaling a character having stems. A character including stems and having an associated output resolution and an associated bit depth can be received. The counters defined by the stems can be grouped into one or more chains of counters. The stems of the character can be aligned based on a stem alignment policy while the chains of counters are balanced based on the output resolution. A pixel map can be created at the output resolution and the output bit depth based on the aligned stems.
US07868885B2	Direct manipulation of subdivision surfaces using a graphics processing unit A graphics system allows for manipulation of a detail mesh for a subdivision surface. To deform the subdivision surface, the graphics system generates a corresponding deformed control mesh by attempting to satisfy both position constraints of the manipulation and Laplacian constraints for the detail mesh. After the deformed control mesh is generated, the deformed detail mesh can be generated by applying a subdivision function to the deformed control mesh to generate a deformed smooth mesh and then applying detail information to the deformed smooth mesh.
US07868884B2	System and method for generating a digital image of an internal anatomy of a person A system and a method for generating a digital image indicative of an internal anatomy of a person over a respiratory cycle are provided. The method includes scanning the internal anatomy of the person at a plurality of positions along an axis to obtain scanning data, wherein the scanning at each position is performed over at least one respiratory cycle of the person. The method further includes generating a plurality of cross-sectional digital images based on the scanning data. The method further includes generating a plurality of cross-sectional digital image groups, each group comprising at least two digital images of the plurality of cross-sectional digital images wherein each of the two digital images indicate the internal anatomy at a substantially similar respiratory state. The method further includes generating a plurality of 3-D digital images, wherein each digital image of the plurality of 3-D digital images is determined from a corresponding one of the plurality of cross-sectional digital image groups. Finally, the method includes processing the plurality of 3-D digital images to obtain a resultant 3-D digital image indicating positions of at least a portion of the internal anatomy of the person during at least the respiratory cycle.
US07868881B2	Picture display device and picture display method A picture display device displays a video signal supplied from a data process device. Bi-directional communication is carried out with each of a plurality of data process devices. A plurality of video signals is combined into one screen corresponding to information of the picture size of each of the plurality of video signals obtained by the bi-directional communication with each of the plurality of data process devices. A video signal, outputted when the plurality of video signals is combined, is displayed. A second control signal is generated which controls the plurality of data process devices and which corresponds to a first control signal that corresponds to a user operation. The first control signal and the second control signal are transmitted to the plurality of data process devices. The plurality of data process devices also communicate bi-directionally with each other.
US07868880B2	Display apparatus and drive control method thereof A display apparatus is disclosed. A display panel includes a plurality of display pixels arranged at intersections of a plurality of scanning lines and a plurality of data lines. A scanning drive unit sequentially applies a scanning signal to each of the scanning lines and sets the corresponding display pixels to a selection state. A data drive unit generates a gradation signal corresponding to the display data and supplies the gradation signal to the display pixels. A power source drive unit supplies to the display pixels a drive voltage for controlling a drive state of each of the display pixels. A drive control unit controls the power source drive unit to operate to set the display pixels to a non-display operation state during a non-display period, and controls the scanning drive unit to operate to set the display pixels to the selection state during the non-display period.
US07868875B2	Touch sensitive display device and method thereof The present invention relates to a touch sensitive display device, the display device including a display panel unit, a sensing unit formed on the display panel unit, receiving a sensor control signal, and generating a sensor data signal based on a touch exerted on the display panel unit, an output unit generating a sensing signal based on the sensor data signal from the sensing unit, and a compensation unit adjusting the sensor control signal such that the sensing signal is bounded in a predetermined range.
US07868874B2	Methods and systems for detecting a position-based attribute of an object using digital codes Methods, systems and devices are described for detecting a position-based attribute of a finger, stylus or other object with a touchpad or other sensor having a touch-sensitive region that includes a plurality of electrodes. Modulation signals for one or more electrodes are produced as a function of any number of distinct digital codes. The modulation signals are applied to an associated at least one of the plurality of electrodes to obtain a resultant signal that is electrically affected by the position of the object. The resultant signal is demodulated using the plurality of distinct digital codes to discriminate electrical effects produced by the object. The position-based attribute of the object is then determined with respect to the plurality of electrodes from the electrical effects.
US07868873B2	Surface and cordless transducer system A smart surface is disclosed that can stand alone or be contained within a portable computer or other system, for powering and communicating with single or multiple cord-free transducers. Operating or charging power is transmitted by the surface using a carrier signal that is on/off keyed or amplitude modulated with synchronization, clock, enable, address, modes, commands and other pulse width, encoded or digital data. The signal is transmitted to single or multiple cordless smart transducers located on or above the surface, such as pens with multiple pressure sensing and switch capability, pointers, stylus, cursors, pucks, mouse, pawns, implements and similar items. Overlapping resonant inductive circuits are used in the surface to transmit operating power and communicate data to the transducer(s).
US07868870B2	Operation apparatus An operation unit is used for a user to perform a tilt operation. The operation unit includes a disc-shaped detection subject member with a detection subject plane, which intersects with a basic axis Q of the operation unit and is movable integrally with the operation unit. Three detecting units are fixed in three different disposed positions surrounding a neutral axis N to detect displacement parallel with the neutral axis, which is generated by movement of the detection subject plane. A computing unit determines three-dimensional detected positions M1, M2, M3 of the detection subject plane by using (i) the disposed positions (X, Y) of the three detecting units and (ii) displacement detection outputs Z detected by the three detecting units. A tilt direction, in which the operation unit is tilted, is determined using a displacement plane DP defined by the three-dimensional detected positions M1, M2, M3.
US07868865B2	Organic electroluminescence display and method of operating the same An organic electroluminescence display and a method of operating the organic electroluminescence display are disclosed. A pixel array unit, including a plurality of pixels, is divided into at least two pixel groups adjacent to each other. The first pixel group is selected by a first scan driving unit and the second pixel group is selected by a second scan driving unit. Scanning lines for selecting the first pixel group extend into the first pixel group and scanning lines for selecting the second pixel group extend into the second pixel group. Accordingly, each scanning line is reduced in length and thus impedance of the scanning line is decreased. The reduction of impedance prevents delay or distortion of scan signals.
US07868862B2	Liquid crystal display A liquid crystal display is provided. The liquid crystal display includes a plurality of first pixels provided with RGB color filters and a plurality of second pixels provided with CMY color filters are formed at a liquid crystal display panel. A video processing part is inputted with RGB data to generate CMY data, and selectively outputs RGB data inputted in accordance with a clock signal and CMY data generated in accordance with a clock signal. A control part controls a supply of RGB data or CMY data inputted from the video processing part in accordance with the clock signal. In accordance with a control part, a data driving part converts RGB data or CMY data outputted from the control part into an analog data, and then supplies it to the plurality of first pixel or the plurality of second pixel.
US07868860B2	Liquid crystal display device The present invention realizes proper driving circuits in a driving-circuit integral type liquid crystal display device which has an increased screen size. The liquid crystal display device includes a liquid crystal display panel and a driving circuit which supplies video signals to video signal lines formed on the liquid crystal display panel. The driving circuit is comprised of a first driving circuit which is formed in a step similar to a step for forming pixels provided to the liquid crystal display panel and a second driving circuit which is connected to the liquid crystal display panel after formation of the liquid crystal display panel. The first driving circuit is constituted of a switching circuit which is capable of distributing an output of the second driving circuit to a plurality of video signal lines.
US07868859B2	Self-luminous display device and driving method of the same Disclosed herein is a self-luminous display device including: pixel circuits; and a drive circuit, wherein each of the pixel circuits includes a light-emitting diode, a drive transistor connected to a drive current path of the light-emitting diode, and a holding capacitor coupled to a control node of the drive transistor, during a period in which at least actual threshold voltage and mobility corrections are performed on the drive transistor before the light-emitting diode can emit light, the drive circuit performs a preliminary threshold voltage correction of the drive transistor, i.e., a dummy Vth correction, with the light-emitting diode in a non-light emitting state, the drive circuit next performs a correction preparation for a constant period by reverse-biasing the light-emitting diode and initializing the voltage held by the holding capacitor, and the drive circuit performs the actual threshold voltage correction and mobility correction after the correction preparation.
US07868849B2	Plasma display apparatus and method of driving the same In the method of driving a plasma display panel according to the present invention, the address electrodes are divided into a plurality of electrode groups, and the an application time point of data pulses applied to one or more of the address electrode groups in the address period is different from that of a scan pulse applied to the scan electrode in all the sub-fields of the frame. In addition, the width of the scan pulse applied during an address period of a predetermined number of the sub-fields is greater than the width of scan pulses applied during the address period of the remaining sub-fields.
US07868848B2	Method of synchronizing images on multiple display devices with different refresh rates A method for displaying images on multiple monitors with different refresh rates is disclosed. To prevent screen tearing, the surface containing image data is not released when the access by the master monitor is completed until the slave monitor or monitors finish access. To synchronize images with a predefined playback speed, the surface containing a new image received from the application is not flipped onto the screens until receiving a predefined synchronization indicator.
US07868846B2	Frequency reconfiguration array antenna and array distance control method A frequency reconfiguration array antenna includes a first metal plate, and a first antenna element formed on the first metal plate and reconfiguring a frequency. An array antenna includes a second metal plate and a second antenna element formed on the second metal plate and reconfiguring a frequency. Further, the array antenna includes a connection plate being bent to connect the first metal plate and the second metal plate, and being bent to change the distance between the first metal plate and the second metal plate according to the frequency of the first and second antenna elements.
US07868844B2	Ultra-wide bandwidth antenna An ultra-wide bandwidth antenna includes a dielectric substrate, first and second conductive elements, and a third conductive element. The dielectric substrate has opposite first and second surfaces. The first conductive element is formed on the second surface of the dielectric substrate and has a feeding point. The second conductive element is formed on the second surface of the dielectric substrate, is spaced apart from the first conductive element, and has a grounding point. The third conductive element is formed on the first surface of the dielectric substrate, partially overlaps the first conductive element, and is coupled electrically to the second conductive element.
US07868843B2	Slim multi-band antenna array for cellular base stations This invention is in the field of base station antennas for wireless communications. The present invention refers to a slim multi-band antenna array for cellular base stations, which provides a reduced width of the base station antenna and minimizes the environmental and visual impact of a network of cellular base station antennas, in particular in mobile telephony and wireless service networks. A multiband antenna array comprises a first set of radiating elements operating at a first frequency band and a second set of radiating elements operating at a second frequency band, said radiating elements being smaller than λ/2 or smaller than λ/3, being (λ) the longest operating wavelength. The ratio between the largest and the smaller of said frequency bands is smaller than 2.
US07868842B2	Base station antenna with beam shaping structures A dual polarization base station antenna producing a beam having 3 dB azimuth beamwidth of E(theta) within 5° of the 3 dB azimuth beamwidth of E(phi). The antenna also maintains E(theta) and E(phi) within 3 dB of each other over a wide beamwidth up to 120°, and over a wide bandwidth of 30% of the center frequency. The antenna achieves these performance characteristics through beam shaping structures connected to or located near the ground plane supporting the dipole antenna elements. By adjusting the locations and shapes of the beam shaping structures, specific antennas are designed to meet these design characteristics for different desired beamwidths, including 45°, 60°, 90° and 120°.
US07868836B2	Antenna and mobile terminal An antenna for a mobile terminal includes a substrate, a dipole placed on the substrate, a loop placed on the substrate, and a matching circuit on the substrate. The matching circuit comprises at least one of a variable capacitor or a variable inductor. The radiation center of the loop substantially coincides with the radiation center of the dipole.
US07868832B2	Three dimensional antennas formed using wet conductive materials and methods for production A method for manufacturing antennas including providing a substrate having at least one surface lying in three dimensions and applying a conductive coating to the at least one surface lying in three dimensions, thereby defining an antenna on the at least one surface and an antenna including a conductive coating applied to a three-dimensional surface of a substrate.
US07868831B2	Complex antenna A complex antenna includes a first antenna and a second antenna having a grounding element and an installing element sharing with the first antenna. The first antenna working in a WLAN (Wireless Local Area Network) comprises a first connecting element, a first radiating element and a second radiating element extending from the first connecting element in opposite direction. The second antenna working in a WWAN (Wireless Wide Area Network) comprises a second connecting element and at least three radiating elements extending from the second connecting element in different directions.
US07868827B2	Coupling for patch antennas Device comprising a patch antenna, and coupling means for connecting the antenna to an electronic component, wherein the patch antenna is arranged on one side of an antenna plate, and the electronic component can be mounted on the other side of the antenna plate, wherein the coupling means comprise a metal passage through the antenna plate. This passage thus ensures the transmission of signals between the antenna and the electronic component. Such a passage is mechanically very robust and not susceptible to ageing, whereby this passage is suitable for automotive applications. This passage is generally not ideal, since it does not have the same characteristic impedance as the antenna and the electronic component, but the dimensions of the passage can be kept sufficiently small so that no disruption is encountered from this impedance mismatch.
US07868826B1	Method and system for determining locations of mobile stations using directional corrections A base station almanac (BSA) stores directional forward link calibration (FLC) values that correct for differences between the listed locations of base station antennas and the actual locations of the antennas. Each directional FLC value is specific to wireless signals that are transmitted from a particular base station antenna and propagate toward a particular receiving area. A mobile station operating in a receiving area measures a wireless signal from a base station antenna located outside of the receiving area to obtain a signal measurement. The location of the mobile station is determined by applying a positioning algorithm that uses the signal measurement corrected by the directional FLC value for that particular combination of base station antenna and receiving area.
US07868824B2	Beamforming apparatus and method A beamforming apparatus obtains the beamforming parameters that realize arbitrary desirable PSF by using optimization theories. The apparatus uses at least one of the beamforming parameters such as the intensities, frequencies, bandwidths and shapes of the signals transmitted by the transmitting unit, the filtering of noises, amplifications (gains) and shapes of the signals received by the receiving unit, delays of the directions of propagation and array used by the delay units, apodization functions of the directions of propagation and array used by the apodization units, the number of the additions of the signals by the addition unit, array element parameters such as element size or shape and how to implement the elements in transducers (e.g., connections by leads between the elements and with the surroundings), which are determined by the specified optimization process to realize the desirable PSF.
US07868823B2	Phased array antenna system with variable electrical tilt A phased array antenna system with variable electrical tilt comprises an array of antenna elements etc. incorporating a divider dividing a radio frequency (RF) carrier signal into two signals between which a phase shifter introduces a variable phase shift. A phase to power converter converts the phase shifted signals into signals with powers dependent on the phase shift. Power splitters divide the converted signals into two sets of divided signals with total number equal to the number of antenna elements in the array. Power to phase converters etc. combine pairs of divided signals from different power splitters this provides vector sum and difference components with appropriate phase for supply to respective pairs of antenna elements etc. located equidistant from an array centre. Adjustment of the phase shift provided by phase shifter changes the angle of electrical tilt of the antenna array.
US07868821B2	Method and apparatus to estimate vehicle position and recognized landmark positions using GPS and camera A navigation system with a capability of estimating positions of the platform vehicle and recognized landmarks using satellite information and camera measurements is disclosed. One aspect is to represent a landmark by one or few representative features by executing image recognition and feature extraction to find representative features inside the recognized landmark. Another aspect is to re-identify the recognized landmarks in the landmark database correlating the landmark attributes obtained by image recognition and mathematical feature characteristics obtained by feature extraction with the corresponding data in the landmark database. A further aspect is to enhance navigation accuracy through the Kalman filter architecture with additional imagery measurements of landmarks whose positions are known or previously estimated. According to the aspects noted above: (1) navigation accuracy improves with augmented imagery measurements; (2) a database of recognizable landmark attributes and associated feature characteristics can be created in real-time; (3) by re-visiting the same landmarks, navigation accuracy improves and the landmark database will be re-calibrated and augmented with new landmark data.
US07868816B2	Radio detection device and method A radio detection device includes two or more reception antennas, for detecting a detecting object by a mono-pulse method; the radio detection device including: a variable gain unit for discretely changing respective signal intensity of a difference signal and a sum signal of each reception signal received by the two or more reception antennas; an A/D conversion unit for performing A/D conversion process on the difference signal or the sum signal, the difference signal or the sum signal having the signal intensity changed by the variable gain unit; an angle calculating portion for calculating an angle by the mono-pulse method using the difference signal and the sum signal after the A/D conversion process by the A/D conversion unit; and a control unit for performing a control of individually switching a conversion magnification of the signal intensity by the variable gain unit with respect to the difference signal and the sum signal.
US07868814B1	Method for transmission of target information over a network A data network interconnects ships. At least one ship has sensors which track targets. The data rate over the network is reduced by transmitting hostile target tracks at a greater rate than friendly target tracks, by transmitting hostile target tracks that are closest to friendly assets at a greater rate than hostile tracks at greater distances from friendly assets, andor by predicting the location of a target from old track information previously transmitted over the network, and if the predicted location matches the actual sensed location, transmitting only a track update message, and if the predicted location does not match the actual location, transmitting a complete track update.
US07868809B2	Digital to analog converter having fastpaths A resistor-based digital to analog converter (DAC) having mux fastpaths, which selectively connect a subset (or an entirety) of voltage divider nodes in a DAC to either a higher level of multiplexor hierarchy, or a DAC output node, effectively bypassing one or more levels of multiplexor devices. In addition, the fastpaths may selectively connect lower levels of multiplexor hierarchy to higher levels of multiplexor hierarchy and/or a DAC output node.
US07868808B2	Phase-locked loop circuitry using charge pumps with current mirror circuitry A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.
US07868806B2	Apparatus and method for dynamic circuit element selection in an digital-to-analog converter According to at least one embodiment of the invention, an apparatus may include first, second and third circuits. The first circuit receives input data and provides a plurality of first signals asserted based on the input data. The second circuit receives the plurality of first signals and provides a plurality of second signals used to select a plurality of circuit elements. The third circuit generates a control for the second circuit using a fractional data weight of the input data, the second circuit mapping the plurality of first signals to the plurality of second signals based on the control from the third circuit.
US07868801B2	Methods and apparatus for look-ahead block processing in predictive delta-sigma modulators Methods and apparatus are provided for look-ahead block processing in predictive delta-sigma modulators. An input signal is quantized using a predictive delta-sigma modulator by generating error prediction values for a current block of input values based on a linear combination of error prediction values from one or more previous blocks, input values of one or more previous blocks, quantized values of one or more previous blocks and the current block of input values; computing speculative error prediction values for at least one input value in the current block, wherein the speculative error prediction values are computed for a plurality of possible quantizer output values; selecting one of the speculative error prediction values based on a quantized value from the current block; and subtracting the error prediction values for the current block from the corresponding current block of input values.
US07868797B2	Sample/hold circuit, and analog-to-digital converter There is disclosed a sample-and-hold circuit. An operational amplifier includes an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a non-inverting output terminal. First and second groups of capacitors are operated in first to third modes periodically. Positive and negative input signals are input to charge an electric charge in the first mode, electric charge are held while positive and negative output signals are output from the operational amplifier by connecting between the inverting input terminal and the non-inverting output terminal and by connecting between the non-inverting input terminal and the inverting output terminal in the second mode, and electric charge are discharged in the third mode. Second group of capacitors shifts to the third mode when first group of capacitors is in the first or second mode, and shift to the first or second mode when first group of capacitors is in the third mode.
US07868796B2	Self-calibrating data conversion circuitry and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data converter is provided. In one embodiment, a differential data converter with a more stable comparator common mode voltage is provided. In one embodiment, the input range of a digitally calibrated data converter is provided and maintained so that there is no loss in input range due to the calibration. In one embodiment, digital post-processing of an uncalibrated result using a previously stored calibration value is provided.
US07868789B1	Dictionary-based order-preserving string compression for main memory column stores Methods and systems are described that involve usage of dictionaries for compressing a large set of variable-length string values with fixed-length integer keys in column stores. The dictionary supports updates (e.g., inserts of new string values) without changing codes for existing values. Furthermore, a shared-leaves approach is described for indexing such a dictionary that compresses the dictionary itself while offering access paths for encoding and decoding.
US07868788B2	System and method for encoding data based on a compression technique with security features Described herein is an efficient encryption method and system having improved security features based on randomness. The method and system utilize a random dictionary insertion and a random dictionary permutation, and a key stream generated by a stream cipher. Security analysis results show that the method and system provides a higher level of security without incurring any coding efficiency loss, compared with a existing encoding methods.
US07868783B2	Cellular-based preemption system A cellular-based preemption system that uses existing cellular infrastructure to transmit preemption related data to allow safe passage of emergency vehicles through one or more intersections. A cellular unit in an emergency vehicle is used to generate position reports that are transmitted to the one or more intersections during an emergency response. Based on this position data, the one or more intersections calculate an estimated time of arrival (ETA) of the emergency vehicle, and transmit preemption commands to traffic signals at the intersections based on the calculated ETA. Additional techniques may be used for refining the position reports, ETA calculations, and the like. Such techniques include, without limitation, statistical preemption, map-matching, dead-reckoning, augmented navigation, and/or preemption optimization techniques, all of which are described in further detail in the above-referenced patent applications.
US07868780B2	System and method for test probe management Individual probe management is accomplished in a measurement system by communicating configuration data to each probe based on that probe's received metadata. In one embodiment, the configuration data is sent from a server and the server does not keep track of the probe's configuration. The configuration data can be, for example, parameters used to directly configure the probe or software modules for running on the probe.
US07868771B2	Doze-off warning apparatus for vehicle The present invention provides a doze-off warning apparatus for a vehicle, comprising: a sensor measuring a driver's eye-open time (to) and an eye-closure time (tc); a doze-off driving determination part determining degree of danger based on the measured eye-open time (to) and the eye-closure time (tc) and comparing the determined degree of danger with a predetermined threshold (Kt); and an alarm part providing a warning signal with the driver when the degree of danger exceeds the predetermined threshold (Kt).
US07868770B2	Warning device for drivers and the like A warning device for alerting an individual of a tendency to fall asleep includes a pressurized collar adapted to fit around an individual's neck with an operable portion of the collar under the individual's chin and in close proximity thereto. A pressure sensor and an alarm are provided to sense an increase in pressure due to the individual's chin pressing against the collar and sound an alarm in response to the increase in pressure. The alarm may be audible or tactile.
US07868767B2	IC tag The present invention provides IC tags which can not easily be broken nor give any hazard to human health, which enables minimization of aborted tags, shortening of time required for deletion of recorded data, minimization of sanitary and environmental problems, and reuse of tags to substantially reduce the cost for a management system. A metal antenna and an IC chip are coupled to and integrated with each other to form an IC chip-mounted body. Then, the IC chip-mounted body is covered with ceramic cladding members to form an IC tag. The metal antenna is formed by winding a metal wire into a coil form. A ceramic filler is used for coupling the ceramic cladding members to each other and also tightly securing the IC chip-mounted body to the ceramic cladding members.
US07868766B2	RFID tags and processes for producing RFID tags A Radio Frequency Identification (RFID) tag. The RFID tag comprises a flexible substrate and an integrated circuit embedded within the flexible substrate. The top surface of the integrated circuit is coplanar with the flexible substrate. At least one conductive element is formed on the flexible substrate. The conductive element is electrically connected to the integrated circuit. The conductive element serves as an antenna for the RFID tag.
US07868765B2	Affixing method of RFID label and its affixing apparatus A display label, having a display section on a surface thereof and an adhesive surface on a back surface thereof, and an IC tag, provided with an antenna coil and an IC chip so as to transmit information through non-contact communication, are prepared. After writing information on the IC chip, reading test is applied, so as to separate non-defective ID tags and defective ID tags. After printing addition display on the surface of the display label, a non-defective ID tag is adhered on an adhesive surface thereof, so as to form an RFID label. Then the RFID label is affixed to an object-to-affix such as a container. An affixing method of an RFID label and its affixing method are provided, wherein an ID tag is less likely to be damaged, since the ID tag is not adhered on a display label while printing additional display.
US07868763B2	Design structure for security system for inventory A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure includes a security system for inventory that automatically detects removal of inventory items from an area or areas protected with security sensors. A person removing the item then scans an identifying code of the item, such as its bar code or radio-frequency identification (RFID) tag, with a device such as a portable shopping assistant device; if the item is not scanned in an appropriate manner, such as within a particular a time period, then theft of the item may be suspected. Information for completing a purchase transaction can be sent from the portable shopping assistant device. In this manner, items can be purchased directly from the protected areas.
US07868753B2	Portable data acquisition and management system and associated device and method A system for manipulating data is provided. Such a system comprises a host system, a discrete portable data acquisition device for collecting the data, at least one of a wireless wide area network (WWAN) data radio, a wireless local area network (WLAN) data radio, and a wireless personal area network (WPAN) data radio operably engaged with the portable data acquisition device and configured to at least one of transmit the data to the host system, communicate with a peripheral device, and receive data, and a memory operably engaged with the portable data acquisition device for storing the data, the memory comprising a FLASH memory module, a DRAM memory module, and an NVDRAM memory module. Associated systems, devices, and methods are also provided.
US07868752B1	Method and apparatus for concealing sensors in simulated articles The present invention provides a method of monitoring the position of a vehicle, vessel, rail car, barge, tanker truck that is loaded with bulk or hazardous material. A G.P.S unit is set to send a signal to a radio transmitter if the unit moves beyond a maximum permissible distance (for example, 50 feet or more). An oxygen sensor can be used to send a signal to a radio transmitter if oxygen levels fall below a selected minimum concentration. The radio transmitter can send the message to a tugboat crew, police department, fire department, company headquarters, civil defense office or other personnel if either of the unit has moved beyond the selected maximum travel distance or if oxygen levels fall below a minimum concentration. In addition to the radio transmission of oxygen concentration data and/or G.P.S position data, visible or audible alarms can be used such as strobe light, horn or the like. Also disclosed is a system for concealment of chemical and/or biological sensors in a building for urban or industrial environments.
US07868748B2	Collision detection sensor for vehicle A chamber room is located between a bumper reinforcement and a bumper cover in a vehicle front-rear direction. The chamber room is deformed with a relative movement of the bumper cover to the bumper reinforcement in the event of the collision. A pressure sensor is located in the chamber room to detect a pressure change in the chamber room. A touch sensor is located between the bumper reinforcement and the bumper cover to detect contact with the bumper cover. The touch sensor and the chamber room are located at different positions in a vehicle top-bottom direction. It is determined whether collision occurs based on the detection results of the pressure sensor and the touch sensor.
US07868747B2	Vehicle reversing alarm having ultrasonic and camera sensors The vehicle reversing radar alarm of this invention pertains to the field of alarming device and particularly relates to a vehicle reversing radar alarm for cars. The vehicle reversing radar alarm consists of a frame mount, a camera assembly, a support means for camera, mounting holes for ultrasonic sensors, a circuit board and a rear cover. The ultrasonic sensors are mounted into the mounting holes for ultrasonic sensors arranged on the frame mount. The camera assembly is mounted into the mounting holes for camera assembly arranged on the frame mount. The support means for camera covers the camera assembly and is fixed on the frame mount by screws. There are rotation axes at both ends of the camera assembly and the camera assembly can rotate together with the rotation axes. This invention has a simple structure and a reasonable design, and it is easy to mount it and convenient to use it.
US07868745B2	Integrated passive entry transmitter/receiver A portable personal convenience device carried by a person having access to a transportation vehicle is provided that includes personal convenience means for performing a non-transportation related convenience function. A passive entry device is integrated within the personal convenience means and adapted to interact with the transportation vehicle for passively gaining access thereto. The passive entry device includes a receiver for receiving an interrogating signal from an electronic control module in the transportation vehicle. A transmitter is provided for broadcasting a response signal to the electronic control module. A controller is provided for controlling the transfer of the response signal to the electronic control module in response to the interrogating signal.
US07868738B2	Device simulator framework for an RFID infrastructure The claimed subject matter provides a system and/or a method that facilitates simulating one or more devices respective to disparate vendors, wherein the devices can be associated with an RFID infrastructure. A physical device can wirelessly receive data from a tag. A device simulator can employ a virtual replication of the physical device to simulate the physical device within an RFID network allowing the device to be virtually represented as if physically within the RFID network.
US07868735B2	Vehicle door control system In a vehicle door control system, a vehicle-side unit communicates with a hand-held device and detects an operation on any one of vehicle doors. When a condition for unlocking the doors is satisfied, the vehicle-side unit unlocks the doors. In addition, the vehicle-side unit also automatically opens some specific doors having an automatic door opening/closing function. Thus, the holder of the hand-held device no longer needs to issue another command to execute an operation to automatically open the specific doors. The vehicle side-unit also detects an operation on any doors and communicates with the hand-held device to automatically close and lock the doors, when the holder of the hand-held device leaves the vehicle.
US07868734B2	Security and energy control system and method A system detects for the presence of an identification (ID) code associated with an object. The detected ID code is communicated to a computer and power is provided to an energy consumption device. In response to detecting that the ID code has been absent for less than a first duration, an indication of the absence of the ID code is communicated to the computer and energy is withheld from the energy consumption device. If, however, the ID code has been absent for more than the first duration and motion is detected in a field of view, an intruder indication is communicated to the computer if the presence of the ID code is not detected within a second duration. However, if motion is not detected in the field of view, power is provided or withheld from the energy consumption device as a function of an ambient temperature of an environment.
US07868732B2	Microvaristor-based overvoltage protection The disclosure relates to an overvoltage protection means containing ZnO microvaristor particles for protecting electrical elements and a method to produce the means. Single microvaristor particles are placed in an arrangement having a monolayer thickness and are electrically coupled to the electrical element to protect it against overvoltages. Embodiments, among other things, relate to: 1-dimensional or 2-dimensional arrangements of microvaristor particles; placement of single microvaristors on a carrier; the carrier being planar or string-like, being structured, being a sticky tape, having fixation means for fixing the microvaristors, or having electrical coupling means. The monolayered overvoltage protection means allows very tight integration and high flexibility in shaping and adapting it to the electric or electronic element. Furthermore, reduced capacitance and hence reaction times of overvoltage protection are achieved.
US07868728B2	Inductor and electric power supply using it An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.
US07868726B2	Winding method and coil unit A rectangular coil unit is manufactured in such a manner that two wires are simultaneously regularly wound on four outer surfaces of a bobbin having a rectangular section so that the wires advance obliquely together for a lane change corresponding to 0.5 wire on one (a lower surface side) of a pair of parallel surfaces of the four outer surfaces of the bobbin and for a lane change corresponding to 1.5 wires on the other one (an upper surface side) of the parallel surfaces.
US07868725B2	Power inductor with reduced DC current saturation A conducting crossover structure for power inductors comprises a first lead frame array that includes a first feed strip, a first lead frames including first and second terminals, and first tab portions that releasably connect said first lead frames to said first feed strip.
US07868719B2	Tamper resistant interrupter receptacle having a detachable metal skin A tamper-resistant device including a housing having a first surface and a second surface; and one or more covers positioned on the first surface of the housing, wherein the first surface includes at least two angled surfaces for receiving the one or more covers to create a securedly fixed connection, and wherein the one or more covers are securedly fixed to the housing via a snapping device.
US07868715B2	Duplexer and communication apparatus using the same The present invention provides a duplexer using a ladder-type filter, which has a small size and is superior in isolation characteristic, and a communication apparatus using such a duplexer. A series resonator (R1) contained in a first filter element (F1) and a parallel resonator (R4) contained in a second filter element (F2) are disposed so as not to allow the elastic wave propagating paths to be overlapped with each other. By disposing them in this manner, it is possible to prevent an elastic wave, leaked from the series resonator (R1) and most influential to the isolation characteristic, from being received by the parallel resonator (R4). Consequently, it is possible to achieve a small-size duplexer that is superior in isolation characteristic.
US07868713B2	Impedance matching circuit and impedance matching system employing the impedance matching circuit An exemplary impedance matching circuit (20) includes a signal processing circuit (22) and a variable resistance unit (24). The signal processing unit is configured for identifying a frequency of a signal from an external transmission line (23), generating an identification signal according to the frequency. The variable resistance unit is configured for selecting a resistance matched with an actual impedance of the transmission line.
US07868712B2	Circuit arrangement for frequency modulation A circuit arrangement for frequency modulation is provided, which includes a voltage-controlled oscillator having at least one varactor diode that is driven by a drive signal, wherein a capacitance of the varactor diode depends on the drive signal, includes a modulating unit that creates a modulation signal for frequency modulation of the voltage-controlled oscillator, and includes a drive unit that generates the drive signal for the at least one varactor diode from the modulation signal, wherein the drive unit generates the drive signal from the modulation signal in such a manner that a linear relationship results between the modulation signal and the capacitance of the varactor diode.
US07868710B1	Digitally-controlled crystal oscillator circuit The present invention relates to a digitally-controlled crystal oscillator (DCXO) circuit having control circuitry, an active core, and a pair of thermometer-coded switched-capacitor circuits (TCSCCs), each of which is coupled to the active core and to a crystal. The active core, the crystal, and the pair of TCSCCs form a DCXO, which provides an output signal having an output frequency. Each TCSCC includes multiple capacitive elements, which are selected by a respective control signal from the control circuitry to control the output frequency. The DCXO circuit may be integrated into a digital integrated circuit (IC) without need for a digital-to-analog converter (DAC), and may be used with a wide range of crystal types. By using thermometer-coding, the pair of TCSCCs provides monotonic frequency tuning behavior. Further, by utilizing different types of tuning steps, the DCXO may have a wide tuning range with high resolution.
US07868702B2	Photoreceiver/amplifier circuit, optical pickup device, and optical disk device The subject invention provides a photoreceiver/amplifier circuit comprising a differential circuit including a differential transistor pair and a bias circuit; an active load; a feedback resistor for converting a photocurrent generated from a photodiode into a voltage; a reference resistor; and a compensation circuit. The resistance of the feedback resistor is greater than the resistance of the reference resistor. The compensation circuit supplies a compensation current from a junction between the feedback resistor and a non-inverting input terminal of the differential amplifier circuit, so as to cancel the difference between a voltage between terminals of the feedback resistor and a voltage between terminals of the reference resistor. This reduces noise and improves offset voltage characteristics. The present invention provides a photoreceiver/amplifier circuit ensuring noise reduction and desirable offset voltage characteristics.
US07868701B2	Transimpedance amplifier A gain switching determination circuit (250) compares/determines a comparative input voltage (Vc) from an inter-stage buffer (230) with a first hysteresis characteristic, and outputs a gain switching signal (SEL) based on the comparison/determination result to first and second transimpedance amplifier core circuits (210, 220), thereby switching the gains of the core circuits. This obviates holding a comparison input voltage with long response time in a level holding circuit for gain switching determination, which allows instantaneous gain switching determination and instantaneous response corresponding to burst data.
US07868699B2	Semiconductor integrated circuit device The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10Ω or so, for example, the resistor is set to about a few Ω to about 100Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
US07868696B2	Method and system for a highly efficient power amplifier utilizing dynamic baising and predistortion Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal.
US07868691B2	Commutating amplifier with wide dynamic range Variable gain commutating amplifier apparatus and methods for use in a polar modulator are described. The apparatus may include two or more commutating amplifier stages configured to be switched to an output load based on a desired amplitude and/or transmit power level. The amplifier stages may include cross-coupled differential pairs to cancel RF carrier feedthrough. An additional R-2R ladder circuit may be provided to further extend the dynamic range by reducing the output power at the lowest output stages.
US07868690B2	Comparator with sensitivity control A comparator has a differential input stage, a current source coupled to the differential input stage for providing a tail current to one side of the differential input stage, and a differential load coupled to the differential pair and having at least one diode coupled load transistor per differential side. A load current through either one of the at least one diode coupled load transistor on either differential side is mirrored with a current mirror configuration to provide a current be fed to a respective node, each node being coupled to a respective variable biasing current source and a respective other side of the differential input stage, so as to provide a variable positive feedback to the differential input stage.
US07868689B2	Low power slicer-based demodulator for PPM An apparatus and method for communications is disclosed. The apparatus includes a slicer configured to generate samples of a signal carrying information, and a demodulator having a digital integrator configured to integrate the samples, the demodulator being further configured to recover from the integrated samples data representative of the information carried by the signal.
US07868685B2	Electronic circuit device operable under power supply An electric circuit device operable under a power supply includes: a circuit; a first switch connected between the power supply and the circuit; a capacitor tending to produce a first leakage current; a second switch connected between the power supply and the capacitor, the second switch producing a second leakage current when it is cut off, the second leakage current being less than the first leakage current; and a switch controller for turning on the second switch while both the first switch and the second switch are turned off, and after a first time passes for turning on the first switch.
US07868683B2	Switch using an accelerating element A switch includes a switching transistor, a switching resistor, connected between a control terminal of the switching transistor and a switching control terminal, and an accelerating element. The accelerating element includes a resistance smaller than a resistance of the switching resistor, the accelerating element being adapted to be connected in parallel to the switching resistor upon switching of the switching transistor until a voltage at the control terminal of the switching transistor has reached a predetermined value.
US07868678B2	Configurable differential lines Embodiments related to configurable differential lines are disclosed herein.
US07868676B2	Hybrid on-chip regulator for limited output high voltage A driver circuit includes a pre-driver and an output driver. The pre-driver is coupled to receive an input signal and to generate first and second pre-driver output signals in response to the input signal. The output driver generates a driver output signal and includes first and second switches, a native mode transistor, and a driver output. The first switch has a first control terminal coupled to receive the first pre-driver output signal. The second switch has a second control terminal coupled to receive the second pre-driver output signal. The native mode transistor is coupled in series between the first switch and the second switch and has a third control terminal coupled to receive the voltage reference signal. The driver output is coupled between the native mode transistor and the second switch to output the driver output signal.
US07868672B2	Digital phase-locked loop with two-point modulation and adaptive delay matching A digital phase-locked loop (DPLL) supporting two-point modulation with adaptive delay matching is described. The DPLL includes highpass and lowpass modulation paths that support wideband and narrowband modulation, respectively, of the frequency and/or phase of an oscillator. The DPLL can adaptively adjust the delay of one modulation path to match the delay of the other modulation path. In one design, the DPLL includes an adaptive delay unit that provides a variable delay for one of the two modulation paths. Within the adaptive delay unit, a delay computation unit determines the variable delay based on a modulating signal applied to the two modulation paths and a phase error signal in the DPLL. An interpolator provides a fractional portion of the variable delay, and a programmable delay unit provides an integer portion of the variable delay.
US07868664B2	Generating a trigger from a differential signal A trigger circuit generates a trigger signal when a differential input signal crosses a differential threshold voltage level. A first side of the differential input signal is applied to a first terminal of a first load termination resistor. A second side of the differential signal is applied to a first terminal of a second load termination resistor. A first side of the differential threshold voltage level is applied to a second terminal of the first load termination resistor. A second side of the differential threshold voltage level is applied to a second terminal of the second load termination resistor. A comparator generates the trigger signal when a voltage level at the first terminal of the first resistor exceeds a voltage level at the first terminal of the second resistor.
US07868660B2	Serial communications bus with active pullup A dual-wire communications bus circuit, compatible with existing two-wire bus protocols, includes a first and second part of the communications bus circuit to couple to a communications bus. The bus has a first line for carrying data signals from a master device to one or more slave devices and a second line to carry a clock signal between the devices. A pullup resistor is located in each part of the communications bus circuit; the pullup resistor in the first part couples to the first line of the communications bus and the pullup resistor in the second part couples to the second line of the communications bus. To improve data throughput and reduce noise, an active pullup device, working in conjunction with the pullup resistor, is located in each part of the communications bus circuit, providing a high logic level on at least one of the communications bus lines.
US07868659B2	I/O buffer with twice the supply voltage tolerance using normal supply voltage devices The invention relates to an I/O buffer with twice the supply voltage tolerance using normal supply voltage devices. The I/O buffer of the invention includes a driver, a first level converter, a gate-controlled circuit and a dynamic source output stage. Signals of the I/O buffer are classified into a first voltage range and a second voltage range. The first voltage range is zero to the normal supply voltage, and the second voltage range is the normal supply voltage to twice the supply voltage. Therefore, the voltage between any two terminals of any of the transistors in the I/O buffer does not exceed the normal supply voltage so that the I/O buffer of the invention can transmit and receive signals with a voltage swing twice as high as the normal power supply voltage using normal supply voltage devices and without gate-oxide reliability problems.
US07868656B2	Hot plug control apparatus and method An apparatus for controlling a hot plug bus slot on a bus has an input for receiving a set of float signals (i.e., the set may have one or more float signals), and a driver having an output electrically couplable with the bus. The apparatus also has float logic operatively coupled with the input. The float logic is responsive to the set of float signals to cause the output to float at a high impedance in response to receipt of the set of float signals.
US07868655B2	Configurable time borrowing flip-flops Configurable time-borrowing flip-flops are provided for circuits such as programmable logic devices. The flip-flops may be based on a configurable delay circuit and two latches or may be based on a configurable pulse generation circuit and a single latch. In designs based on two latches, a first and a second latch are arranged in series. A clock signal is delayed using a configurable delay circuit. Programmable memory elements that have been loaded with configuration data may be used to adjust how much delay is produced by the configurable delay circuit. The delayed version of the clock signal is provided to a clock input associated with the first latch. The second latch has a clock input that receives the clock signal without delay. In designs based on a single latch, a configurable pulse generation circuit receives a clock signal for the flip-flop and generates a corresponding clock pulse for the latch.
US07868653B2	Clock supply apparatus and clock supply method According to one embodiment, a clock supply apparatus according to one embodiment of the invention includes a first transmission line connected to a clock generator that generates clock signals, a second transmission line connected to a clock supply destination having input impedance different from output impedance of the clock generator, a capacitor that capacitively couples the first and second transmission lines, a pull-up resistor that is provided on the first transmission line to suppress reflection of the clock signal, and a pair of voltage divider resistors that apply potential obtained by voltage division to the second transmission line as a reference potential of the clock signal. The impedance of the pair of voltage divider resistors on the second transmission line is set to match the input impedance of the clock supply destination.
US07868649B2	Data processing apparatus, method of controlling termination voltage of data processing apparatus, and image forming apparatus A processing unit carries out a predetermined data processing on the data in a storage unit. The storage unit is connected to the processing unit with a plurality of connecting lines. A voltage generating unit is connected to each of the connecting lines via a corresponding termination resistor and that generates a termination voltage to be applied to the connecting lines. An interrupting unit is connected between the connecting lines and the termination resistors, and it applies or does not apply the termination voltage to the connecting lines depending on a data processing state of the processing unit.
US07868647B2	Semiconductor device A semiconductor device includes a plurality of pads configured to receive a plurality of external signals, an internal circuit configured to perform a predetermined internal operation in response to one of the external signals that is inputted through one of the plurality of pads, and a signal transferring unit configured to receive the external signal, output the external signal to an internal circuit an output signal during a normal mode, and output a fixed signal regardless of changes in the external signal to the internal circuit in a test mode.
US07868646B1	Soft error upset hardened integrated circuit systems and methods In one embodiment, a programmable logic device includes a plurality of configuration cells that store configuration data, wherein the programmable logic device is adapted to provide soft error upset (SEU) protection for the configuration cells that are reprogrammable. The programmable logic device may further include or alternatively provide hard coding and/or hard encoding of the configuration cells.
US07868642B2	Socket for connecting ball-grid-array integrated circuit device to test circuit A simple structure socket 10 for connecting a ball grid array integrated circuit device to a test circuit has a base 14, contacts 26 arranged corresponding to the ball grid array, a nest assembly 16 of two comb structures 70 and a lever assembly 18 for spacing opposed tip portions of each contact away from each other to define a gap for receiving a ball. The lever assembly has two rectangular frames 86 each made of a distal cross piece 94, a proximal cross piece and two side pieces connecting the distal and proximal cross pieces. The two rectangular frames are arranged so that the side pieces are intersected at substantially mid portions thereof. This allows that, by depressing the proximal cross pieces toward the base, the distal cross pieces forces the comb structures toward each other.
US07868641B2	Semiconductor device A semiconductor device with technology for externally deciding if the stress test was performed or not. A semiconductor device includes a stress test circuit and a stress test decision circuit. The stress test circuit outputs control signals for executing the stress test to the stress test decision circuit and the object for testing. The stress test decision circuit then outputs the decision results if the stress test was performed, based on the control signals.
US07868640B2	Array-based early threshold voltage recovery characterization measurement A method and test circuit provide measurements to aid in the understanding of time-varying threshold voltage changes such as negative bias temperature instability and positive bias temperature instability. In order to provide accurate measurements during an early stage in the threshold variation, a current generating circuit is integrated on a substrate with the device under test, which may be a device selected from among an array of devices. The current generating circuit may be a current mirror that responds to an externally-supplied current provided by a test system. A voltage source circuit may be included to hold the drain-source voltage of the transistor constant, although not required. A stress is applied prior to the measurement phase, which may include a controllable relaxation period after the stress is removed.
US07868635B2	Probe An object is to provide a probe, a probe card, and a testing device which can precisely perform a test for conductive state of a conductive wiring in, for example, a through hole or a contact hole provided in a circuit board. Provided is a probe (10) for performing a test for conductivity of a conductive wiring in a hole such as a through hole or a contact hole provided in a circuit board. The probe (10) is provided with an elastically deformable leg portion (11) and a contact portion (13) provided on a tip side of the leg portion (11) to be brought into contact with the conductive wiring (21) provided in a through hole (22). The contact portion (13) is formed to be in a shape and size so as to be prevented from entering the through hole (22).
US07868632B2	Composite motion probing An electronic device is moved into a first position with respect to probes for making electrical contact with the device. The electronic device is then moved into a second position in which the electronic device is pressed against the probes, compressing the probes. The movement into the second position includes two components. One component of the movement tends to press the electronic device against the probes, compressing the probes and inducing a stress in the probes. The second movement tends to reduce that stress. Test data are then communicated to and from the electronic device through the probes.
US07868631B2	Solar cell testing apparatus A solar cell testing apparatus including a stage, a movable chuck, a light source and a plurality of probes is provided. The movable chuck is disposed on the stage and capable of carrying a sample sheet to move. The sample sheet has a light incident side, a rear side opposite to the light incident side, and a plurality of electrodes disposed on the rear side. The light source is disposed above the stage and capable of providing testing light to the light incident side of the sample sheet. The probes are located on the rear side of the sample sheet and capable of contacting the electrodes of the sample sheet. The present invention not only can be used to test a substrate type solar cell, but also can be used to test a superstrate type solar cell.
US07868621B2	Power line communication based aircraft power distribution system with real time wiring integrity monitoring capability A power line communication-based aircraft power distribution system may allow for both power line communication (PLC) technology and spread spectrum time domain reflectometry (SSTDR) technology to be utilized in aircraft power distribution systems to achieve key maintenance functions. Unlike conventional power distribution systems, which may, for example, use only SSTDR for fault detection, the present invention includes a hardware platform that may allow both the PLC and the SSTDR to be utilized in aircraft power distribution systems to achieve key maintenance functions, such as real time wire fault location, and cost and weight savings. Further, unlike conventional power distribution systems, which may only detect and locate damage in feeder conductor wire sections before the power is applied to the load, the power distribution system of the present invention may permit real time wire fault location.
US07868619B2	Method and arrangement for monitoring connections of switch intended for activating safety function A method and an arrangement are disclosed for monitoring connections of a switch intended for activating a safety function, the switch having at least two poles. The arrangement can supply voltages to first sides of two poles of the switch through first connections, and monitor the voltages supplied through the switch and further from second sides of the two poles of the switch to a device through second connections. The arrangement can form a voltage difference between the voltages to be supplied to the first sides of the two poles of the switch, and detect a connection failure when the difference between the voltages supplied to the device does not correspond with the formed voltage difference or when the difference between the voltages supplied to the device is substantially zero.
US07868616B2	Method of and apparatus for in-situ measurement of changes in fluid composition by electron spin resonance (ESR) spectrometry A miniaturized instrument and method of using electron spin resonance spectrometry for measuring the degradation of lubricating fluids, and the like, that includes continuously passing a sample of such fluid through a resonating RF microwave cavity resonator during the application therethrough of a uniform slowly varying uniform magnetic field that is rapidly modulated and measuring the resulting phase modulation or amplitude modulation thereof to derive an electron spin resonance signal that directly senses the molecular changes in the fluid sample resulting from fluid degradation during operation of the vehicle, such as peroxy radicals in vehicle engine oil and the like.
US07868615B2	Method and device for suppressing motion artifacts in magnetic resonance imaging In a method and device for suppressing residual motion artifacts, k-space is divided into a snapshot segment, an alternate sampling segment and a high frequency segment in a phase encoding direction; then phase encoding lines are respectively sampled within each of the segments; and a magnetic resonance image is reconstructed according to the phase encoding lines within k-space.
US07868613B2	Magnetic sensor and manufacturing method thereof First and second MR elements are provided with a plurality of element patterns each having a stacked structure. The stacked structure includes a free layer changing its magnetization direction depending on an external magnetic field, an intermediate layer generating no specific magnetization direction, and a pinned layer having magnetization pinned in a certain direction. The first and the second MR elements have a rotationally symmetrical relationship with each other around a central axis parallel to the directions of anisotropic magnetic fields of the free layer. In the initial condition, the resistance of the first MR element and the resistance of the second MR element are equal to each other. The resistances of the first and the second MR elements exhibit changes in opposite directions in accordance with a magnetic field to be detected. This provides a magnetic sensor permitting higher-precision detection of the magnetic field to be detected.
US07868611B2	Rotary angle detecting device A rotary angle detecting device is provided which includes: a main driving gear configured to rotate while being directly or indirectly connected to a detection target rotating about a predetermined axis; a driven gear configured to rotate while meshing with the main driving gear; a magnet provided at the center of the driven gear; a magnetic detection element configured to detect a variation in magnetic field in accordance with a rotation of the magnet; a circuit board having the magnetic detection element; and the circuit board is separated from the gears by a holder member.
US07868610B2	Angular motion tracking sensor A motion tracking sensor apparatus configured for real-time, three-dimensional angular motion tracking that can determine the absolute orientation, axis of rotation and angular speed of a body rotating about a point, which is fixed relative to the sensor, without contacting the rotating body. The sensor obtains measurements of the three-dimensional magnetic field of a dipole fixed on the body. In one embodiment, a permanent magnet is embedded in the center of the rotating body, and the time-varying magnetic field is measured as the magnet rotates, and then the instantaneous magnet orientation from the field data is determined. The apparatus is particularly suited for use with devices that are based on a sphere rotating in a cradle such as spherical motors or spherical variable transmissions.
US07868607B2	Test method for frequency converters with embedded local oscillators A method is presented where the phase trace is offset for each sweep such that the first point is always at zero degrees. The resulting traces are then averaged. The average reduces the noise in the phase trace and results in a less noisy group delay trace.
US07868606B2	Process variation on-chip sensor Improved process variation sensors and techniques are disclosed, wherein both global and local variations associated with transistors on an integrated circuit can be monitored. For example, respective circuits for sensing a global process variation, a local process variation between neighboring negative-channel type transistors, and a local process variation between neighboring positive-channel type transistors are disclosed. Further, in one example, a method for sensing a process variation associated with transistors on an integrated circuit includes providing at least one process variation sensor on the integrated circuit, the process variation sensor comprising a sensing portion including one or more transistors and a loading and amplification portion including one or more transistors, and operating the one or more transistors of the sensing portion and the one or more transistors of the loading and amplification portion in a subthreshold region of transistor operation such that when a threshold voltage of at least one of the transistors changes, a process variation is sensed.
US07868604B2	Fast voltage regulators for charge pumps A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
US07868600B2	Adaptive PWM pulse positioning for fast transient response An adaptive pulse positioning system for a voltage converter including an adjustable ramp generator, a pulse generator circuit, and a sense and adjust circuit. The adjustable ramp generator has an adjust input and provides a periodic ramp voltage having an adjustable magnitude based on an adjust signal provided to the adjust input. The pulse generator circuit receives the ramp voltage and generates a pulse signal with control pulses for controlling the output voltage of the voltage controller based on the ramp voltage. The sense and adjust circuit senses an output load transient and provides the adjust signal to the adjust input of the ramp generator to adaptively shift the pulse signal in time in response to the output load transient without adding pulses to the pulse signal.
US07868595B1	Apparatus and method for soft-start mode transition in a switching regulator A regulator is provided. The regulator is a PWM-based switching regulator with soft-start. The regulator starts up with non-synchronously-rectified regulation. A soft-start done signal is asserted after soft-start is finished. In one embodiment, the soft-start done signal is asserted at about 150% of the soft-start time. After the soft-start done signal has been asserted, the regulator changes from non-synchronously-rectified regulation to synchronously-rectified regulation if a pre-determined period of time occurs with no zero-crossing in the inductor current. In one embodiment, the pre-determined period of time is one switching cycle. In some embodiments, the “zero-crossing” of the inductor current is slightly different from zero, such as −0.5 A.
US07868592B2	Method of automotive electrical bus management A method for managing a vehicle's electrical power bus and charging system. A current sensor is utilized to measure a current produced by an alternator. The alternator current is controlled in a feedback system such that the current is equal to the amount required for the vehicle loads or, if the battery is being charged, the amount required for the vehicle loads plus the optimum charging current. Alternatively, the method may measure and control the amount of current delivered to and from the battery such that, in a fuel efficiency mode, no current is delivered to the battery.
US07868590B2	Electrical component, such as a radio, MP3 player, audio component, battery charger, radio/charger, MP3 player/radio, MP3 player/charger or MP3 player/radio/charger, having a selectively connectable battery charger An electrical component, such as, for example, a radio, MP3 player, audio component, battery charger, radio/charger, MP3 player/radio, MP3 player/charger, or MP3 player/radio/charger. The electrical component includes a housing and an electrical circuit supported by the housing. In some aspects, the electrical component is an audio component and the electrical circuit is an audio circuit. In other aspects, the electrical component is a battery charger and the electrical circuit is a charging circuit. In further aspects, the electrical component is an MP3 player and the electrical circuit is a MP3 circuit. In yet further aspects, the electrical component is an combination of any or all of a radio, battery charger, and MP3 player and the electrical component can include any combination or all of the audio, radio, and MP3 circuits. A battery may be connectable to the housing and electrically connectable the electrical circuit.
US07868586B2	System, devices, and method for selectively wirelessly energizing passive wireless data communications devices Systems, methods, and devices wirelessly energize passive wireless data communication devices. In one embodiment, remotely powered wireless transmission power sources are actuated by a user. Upon actuation, a selected wireless transmission power source transmits electromagnetic energization energy into a volume of space, thereby energizing passive wireless data communication devices therein. The user may use a hand-held portable automatic data collection device to interrogate the wireless data communication devices and may use the automatic data collection device to remotely actuate the selected wireless transmission power source.
US07868580B2	Method for turning a three-phase current motor on again and electrical circuit for implementing the method A method for turning a three-phase alternating current motor on again, after it has been separated from a supply voltage, if a residual field voltage induced by a rotor residual field is present, and to an electrical circuit for implementing the method. The time progressions of the residual field voltage and the supply voltage are recorded, and the phase difference between the voltages is calculated in advance from the time progressions. A time point ts is determined, at which the phase difference goes below a predetermined maximum value Δφmax. A switching command for applying voltage is triggered at a time interval that corresponds to a predetermined switching time delay τs, before the time point ts is reached, so that the motor is connected to the supply voltage approximately at the time point ts. The electrical circuit has a measurement value detection device, a microcontroller and a direct current setting device.
US07868579B2	Micro-step driving method of stepping motor and electrically-driven device using stepping motor In a micro-step drive and driving method of a stepping motor, the stepping motor generates a drive force for movement on a prescribed path of a moving unit provided in an electrically driven device, a standard point and a target point of an operation are set on the path, the stepping motor is rotated such that the moving unit passes through the standard point, a count value of a stable stop point of the stepping motor that is closest to a count value at the point of time when the moving unit passed through the standard point is specified, the specified count value is set as a start point for controlling a rotation angle of the stepping motor, and the stepping motor is rotated, and stopped at the count value of the selected stable stop point.
US07868578B2	Arrangement comprising electric drive units for drawers Disclosed is an assembly comprising at least two electric drive units (4) for respectively driving one of at least two drawers (2) which are movably mounted within a common furniture carcass (3). A measuring instrument (10) is assigned to each drive unit (4) in order to detect a force (F) that a user applies to the respective drawer (2). The inventive assembly further comprises at least one control or regulation device (9) for controlling or regulating the drive units (4). The measuring signals of the measuring instrument (10) can be fed to the control or regulation device (9) while the control or regulation device (9) can trigger the associated drive unit (4) after receiving a predetermined measuring signal from one of the measuring instruments (10). The control or regulation device (9) features a mode of operation in which the same prevents the drive units (4) allocated to the other measuring instruments (10) from being triggered after receiving the predetermined measuring signal from one of the measuring instruments (10).
US07868577B2	Electric motor control apparatus In order to simultaneously realize an improvement in disturbance suppression force of an electric motor control apparatus and vibration suppression of a load machine, a velocity control circuit receives a velocity command signal as a target value of velocity of an electric motor and a corrected velocity signal, obtained by correcting a velocity signal with a velocity correction signal, and outputs a torque command signal specifying target torque of the electric motor driving the load machine. A vibration suppression circuit outputs a velocity correction signal, based on an acceleration signal, indicating acceleration of the load machine. A transfer function from the acceleration signal to the torque command signal is obtained by multiplying a transfer function from a position signal, indicating position of the electric motor to the torque command signal, by a proportion characteristic having a specified gain and integration characteristic.
US07868572B2	Seatbelt apparatus This seatbelt apparatus includes: a belt reel around which a belt is wound; a motor which rotationally drives the belt reel; a transmitting device which transmits a driving power between the belt reel and the motor; a controller which drives the motor while controlling an electricity to be supplied to the motor; a rotation-detection device which detects a rotation status of the belt reel. The rotation-detection device outputs, in accordance with a rotation of the belt reel, a plurality of outputs including signals indicating a first state in which a current consumption by the rotation-detection device is larger than a predetermined value, and a second state in which the current consumption by the rotation-detection device is smaller than the predetermined value. The controller executes a first motor-driving process in which the motor is driven based on an output from the rotation-detection device until reaching the second state.
US07868567B2	Booster converter circuit for vehicles An object of the invention is to limit a current flowing in a booster converter circuit for a vehicle within a predetermined range. In the booster converter circuit for a vehicle including a battery that outputs a DC voltage; a switching unit having a switching element to be controlled to ON or OFF; an inductive element unit being connected between the battery and the switching unit and including an inductive element; a switching control unit that controls the switching element, an output voltage measuring unit that measures an output voltage of the booster converter circuit for a vehicle is provided, and the duty ratio determining device obtains a control duty ratio with respect to the switching element on the basis of a measured output voltage value so that a value of a converter current flowing through a path from the battery to the switching unit falls within a predetermined range.
US07868565B2	Linear actuator motor selection method and devices A method of selectively utilizing a set of linear actuator motors for an application includes providing a plurality of linear actuator motors numbered from 1 to N including a box shaped housing with respective lengths between a first end-plate and a second end-plate and respective hollow shafts. Each hollow shaft includes an extended portion out of either the first end-plate or the second end-plate and configured to receive a nut including a tube part integrally connected with a flat-end part. The nut is configured to be able to mate in a common manner to any of the plurality of linear actuator motors. The method further includes testing any of the plurality of linear actuator motors including the nut for the application, wherein the nut is detached from one linear actuator motor to reattach with another linear actuator motor.
US07868563B2	Light emitting device drive circuit and vehicle lamp using the same A light emitting device drive circuit includes: a power conversion unit for receiving an input electric power and performing an electric power conversion on the input electric power in accordance with a control signal so as to generate the predetermined output current; a current detection unit for detecting an output current IL of the power conversion unit; a temperature detection unit for detecting a case internal temperature TD, which is an interior temperature of a case for accommodating the light emitting device drive circuit; a regulation unit being operable to a) detect whether a temperature TL of the light emitting device has reached a first predetermined temperature TLmax based on TD, IL, and a temperature rise coefficient α relative to IL, the temperature rise coefficient α being set in advance so that TL satisfies a relationship of TL=TD+α·IL, and b) generate a regulation signal for reducing a predetermined output current IL0 so that TL does not exceed TLmax in the event that a result of the detection indicates that TL has reached TLmax; and a control unit for controlling IL0 in accordance with the regulation signal from the regulation unit.
US07868560B2	Inverter driving circuit for LCD backlight An inverter driving circuit for an LCD is switched on/off more stably to improve heating radiation characteristics and drive efficiency. In the driving circuit, a controller supplies a first driving signal. A level shifter provides a second driving signal. A first delay circuit delays a rising section of the first driving signal to provide the first driving signal. A second delay circuit delays a falling section of the second driving signal to provide the second driving signal. Also, a power switching circuit is provided. The inverter driving circuit for the LCD, when a switching device thereof is turned off, has less current flowing in the switching device, thereby generating less heat. In addition, the inverter driving circuit prevents heat generation caused by current flowing reversely in the switching device, thereby enhancing drive efficiency.
US07868557B2	Controlling an arrangement of semiconductors emitting light of distinct colors Controlling an arrangement of semiconductors of which different semiconductors emit light of different distinct colors is disclosed, whereby a feed forward control part, which is dependent on a junction temperature of semiconductors for each color, is operated with first intervals and is adjusted dependent on measure light output for each color with much longer second intervals.
US07868555B2	Enhanced vehicle side signal lighting system The present invention relates to a vehicle side light system for signaling an event that is directly connected to a vehicle's signaling system and power source. The system comprises at least one series of lights having multiple light emitting devices set in a row, a flexible circuit attached to at least one circuit of a vehicle and at least one digital shift register coupled to at least one schmitt trigger circuit. The lights in the system are automatically sequentially activated by the schmitt trigger circuits to signal the occurrence of an event. The light system may alternatively be attached to an independent power source to add instinctive awareness to an object or situation.
US07868552B2	Short arc lamp A short arc lamp comprises a body portion made from an insulating material and having a curved reflective surface, in which a concave discharge space is formed; a pair of cathode and anode disposed at a focal point of the reflective surface with a gap; a support member connected to the cathode; and an electric supply ring connected to the support member, wherein a heat release member is provided on the anode or the support member or when a heat capacity of the cathode is A and that of the support member is B, a relationship of A and B is B/A>2.8.
US07868550B2	Protective layer material for PDP and method of manufacturing the same An MgO protective layer formed on a front substrate of a plasma display panel and a method of manufacturing the protective layer are disclosed. The protective layer is manufactured by using an MgO pellet, which is simultaneously doped with a first doping material of BeO and/or CaO among alkali earth metals and a second material selected from the group consisting of Sc2O3, Sb2O3, Er2O3, Mo2O3, and Al2O3, as a deposition source through a vacuum deposition method. The protective layer remarkably improves a discharge efficiency of the PDP and shortens a discharge delay time, so that it is applied to a signal can PDP. Also, it lowers a manufacturing cost by reducing the number of electronic components.
US07868546B2	Organic light emitting display device and method of manufacturing the same Provided are an organic light emitting display device including a transparent moisture absorption layer formed of at least one of a metal oxide and metal salt having an average particle diameter of 100 nm or less, a binder, and a selective light absorber absorbing light of a wavelength of a specific range, and a method of manufacturing the same. The transparent absorbing layer further contains a dispersant. The organic light emitting display device including the transparent moisture absorption layer has an excellent moisture absorption capability compared to a conventional organic light emitting display device including a getter, and is transparent. Therefore, the organic light emitting display device has desired lifetime characteristics and improved color purity and contrast characteristics.
US07868543B2	Light-emitting device having openings in electrode The invention provides a light-emitting device, a manufacturing method thereof, and an electronic apparatus which can improve the emission efficiency of light, obtain uniform brightness within a display surface in high reliability, in particular, and which can suppress lowering of the emission efficiency of light due to various wiring line structures, even though a large screen is performed. In a light-emitting device having a light-emitting element in which a first electrode on a base substrate, a functional layer having a light-emitting layer, and a second electrode are sequentially deposited, the first electrode and the second electrode are reflective, and the second electrode has an opening through which light from the light-emitting layer passes.
US07868540B2	Organic light emitting diode display device and method of manufacturing the same An organic light emitting diode (OLED) display device, which can use a non-emission surface of an encapsulation substrate to reflect light, can prevent a voltage applied to a cathode from dropping, and has improved mechanical reliability, and a method of manufacturing the same. The OLED display device includes a substrate; a first electrode disposed on the substrate; an organic layer disposed on the first electrode; a second electrode disposed on the organic layer; a conductive material layer disposed on the second electrode; a metal layer disposed on the conductive material layer; an encapsulation substrate disposed on the metal layer; and an encapsulant to combine the substrate with an encapsulation substrate.
US07868537B2	Polymer light-emitting diode with an ion receptor layer A light-emitting diode has a first electrode, a second electrode and a light-emitting layer. A receptor layer of an ion receptor has an affinity for ions of a first charge and is positioned between the first electrode and the light-emitting layer. A further layer includes immobile ions of a second charge and is positioned between the second electrode and light-emitting layer. The immobile ions initially have attached counterions of the first charge that move towards the receptor layer upon application of an electric field for capture by the receptor layer. Upon capture of the counterions, a concentration of immobilized ions of the first charge is formed at the first electrode yielding an ion gradient for injection of electrons and holes resulting in emission of light.
US07868527B2	Polarizer, method of manufacturing the same, and flat panel display device including the polarizer A polarizer adapted to improve contrast and visibility of a display device, a method of manufacturing the polarizer, and a flat panel display device including the polarizer. In one embodiment, the polarizer includes a base and a plurality of grids disposed in a stripe pattern on the base. Here, the grids are separated from each other and formed of metal-containing graphite.
US07868526B2	Light source device The present invention relates to a light source apparatus with a structure that enables the brightness of a gas discharge tube to be stabilized and facilitates gas discharge tube maintenance work. The light source apparatus has a gas discharge tube, a lamp container housing the gas discharge tube, and a base on which the lamp container is fixed. The gas discharge tube is fixed via a heat insulating member to a portion of an outer shell of the lamp container, and the heat insulating member functions to reduce heat transfer between the lamp container and the gas discharge tube to reduce the influence of temperature change, outside the lamp container, on the gas discharge tube. The lamp container also has an attachment/detachment structure for enabling attachment and detachment of the portion of the outer shell on which the gas discharge tube is fixed via the insulating member, with respect to the remaining portion of the outer shell, and whereby the attachment/detachment structure facilitates gas discharge tube maintenance work.
US07868524B2	Piezoelectric component A multiple-layer component includes at least two metal layers, at least one dielectric layer among the at least two metal layers, and a contact element that includes a porous body that electrically connects the at least two metal layers. The at least one dielectric layer includes dielectric layers made from ceramic material that are sintered.
US07868521B2	Piezoelectric oscillator and case having an integral electrical terminal A method of fabricating a case accommodating a piezoelectric vibrating piece therein in a piezoelectric oscillator including the piezoelectric vibrating piece, including the steps of: applying deep drawing to a conductive plate member to shape the plate member in a nearly cylindrical shape with a bottom; pressing an inner surface of a bottom part of the plate member by a punch for step drawing while an outer surface of the bottom part is being abutted against a surface including an opening of a hole of a die having an inner diameter smaller than the outer diameter of the bottom part, whereby a projecting portion is formed on the outer surface of the bottom part; and cutting the plate member having the projecting portion at a predetermined position on the opening side thereof, whereby a case in a nearly cylindrical shape with a bottom having the projecting portion is obtained.
US07868518B2	Device for processing workpieces A device for processing workpieces uses ultrasound, with an resonant system comprising an ultrasound generator, an ultrasound sonotrode, and an anvil, wherein a workpiece is processed between the anvil and the ultrasound sonotrode. The ultrasound generator comprises a regulation means which has a regulation member connected upstream of the ultrasound generator to receive a feedback signal from the resonant system and to generate a regulation variable which is supplied to the ultrasound generator. A connecting point is provided between the regulation member and the ultrasound generator, at which the regulation variable of the regulation member is linked to a process variable from the processing procedure.
US07868516B2	Electrostatic actuator having electrodes with deformation patterns having larger pitches from the center When a mover during moving is displaced in a direction (X2 direction) perpendicular to a moving direction, between a deformation pattern portion formed in stator-side electrodes of a stator and a deformation pattern portion formed in mover-side electrodes of the mover, a restoring force trying to return the mover toward a direction (X1 direction) opposite to the X2 direction acts on the mover. This makes it possible to prevent the mover from displacement, and consequently to provide an electrostatic actuator improved in the linear movability toward the moving direction.
US07868510B2	High-efficiency wheel-motor utilizing molded magnetic flux channels with transverse-flux stator A motor including an outside rotor having a rotor disc with plural magnets alternating polarities flush mounted in the disc, an inside stator assembly with a ring of pole pieces forming a channel to house a transversely wound stator windings, and a controller coupled with feedback electronics for monitoring a timing, speed and direction and coupling a signal to a processing unit for adjusting the drive electronics driving the phase windings. A u-shaped gap above the channel to receive the rotor disc and focus the captured magnetic flux in the pole pieces toward the magnets. In an embodiment the molded magnetic flux channel pole pieces of the inside stator are sets of molded magnetic flux channel pole pieces, each set forming a channel and corresponding to one phase of the motor; and a section of each one of the transverse windings passing through one channel, the remaining section folding back outside the set in close proximity to the outer base of the set of molded magnetic flux channel pole pieces.
US07868509B2	Single-phase motor and hermetic compressor It is an object to obtain a highly efficient and low-cost single-phase motor and a hermetic compressor employing the motor by producing the motor in a form that allows a proper material layout, with securing a magnetic path of a coreback of a stator iron core. According to the present invention, in a single-phase motor having a stator including a stator iron core formed by laminating a plurality of electromagnetic steel sheets and provided with a slot and single-phase two-pole distributed windings composed of a main winding and an auxiliary winding contained in the slot, and a rotor placed through a gap on an inner circumference of the stator, at least five notches each having a roughly straight lined shape are provided on an outer circumference of the stator iron core, so that a quadrangle is formed by straight lines including four notches out of the at least five notches.
US07868507B2	Phase winding for a rotating electrical machine stator and stator equipped with same A rotating electrical machine stator comprising an annular cylindrical body including axial grooves, and at least one phase winding including corrugated turns of wire, the phase winding comprising a first outer half-phase and a second inner half-phase which are radially superimposed, the first outer half-phase including outer leading-out wires projecting from the radial walls of the body and the second inner half-phase including outer leading-out wires projecting from the radial walls of the body. The invention is characterized in that for each phase winding, the wire length of each turn of the inner half-phase is greater than the wire length of each turn of the outer half-phase. The invention also concerns a phase winding designed to be mounted in such a rotor.
US07868505B2	Motor and electric power supply control apparatus for the motor In a ring body of a stator, permanent magnets are arranged in alternate inter-pole magnetic path portions located between an even number of stator poles so that magnetic fields pointing in the circumferential direction of the ring body are generated. Coils are wound around alternate inter-pole magnetic path portions where permanent magnets are not provided so that magnetic fields that oppose the magnetic fields generated by the permanent magnets are generated. When electric power is not supplied to the coils, a ring-shaped magnetic circuit is formed by the permanent magnets, and therefore, magnetic flux does not leak to a rotor. When electric power is supplied to the coils, the magnetic flux of the magnetic fields of the permanent magnets and that of the coils combine with each other and flow from the stator poles to rotor poles of the rotor, whereby strong attraction force is obtained.
US07868499B2	Spindle motor having plurality of sealing portions Disclosed herein is a spindle motor having a plurality of sealing portions. The spindle motor includes a rotor hub for rotating a recording medium mounted thereon, a rotating shaft secured to the rotor hub and supporting the rotor hub, a sleeve for rotatably supporting the rotating shaft, and a sealing member. The sealing member is secured to the sleeve and coupled to a bearing portion between the rotating shaft and the sleeve, and provides a rotary side sealing portion and a stationary side sealing portion between the rotor hub and the sleeve. The rotor hub has a ring-shaped inner wall facing the sealing member. The sealing member has a shape of a hollow cylinder, at least part of an outer circumferential surface of the sealing member facing the ring-shaped inner wall and at least part of an inner circumferential surface of the sealing member facing the sleeve being inclined and thus gradually tapered.
US07868496B2	Brushless motor stator A plurality of winding parts are wound around teeth of an iron core with insulators disposed therebetween, and a printed wiring board is electrically connected to the winding part with a plurality of terminal pins. Each terminal pin is extends along an axial direction of the iron core and is attached to one of the insulators. An end portion of each winding part is wound around one of the terminal pins, and the terminal pin is soldered to the printed wiring board together with the end portion of the winding part. The terminal pins extend through hole portions of the printed wiring board.
US07868494B2	Rectifier assembly A rotating rectifier includes diode subassemblies that each have an AC contact between two diodes, held in place by a spring clip or interference fit between an inner DC bus and an outer DC bus. The outer DC bus can also act as a housing and heat sink. Diodes and resistors are distributed around the rotating rectifier. Zener diodes can be included in series with the resistors to provide further protection to the diodes to ensure proper operation of the rectifier.
US07868493B2	Motor having rotation balancing member A motor includes a base, a stator mounted to the base, a rotor rotatably coupled to the base, and a balancing member. The rotor includes a permanent magnet having a first magnetically conductive face with a first width in a radial direction. The balancing member includes an upper surface facing the permanent magnet. A magnetically conductive section is formed between the upper surface and the first magnetically conductive face. The balancing member further includes a magnetically attracting portion in the magnetically conductive section. The magnetically attracting portion includes a second magnetically conductive face having a second width in the radial direction. The second width is not greater than the first width. A magnetically attracting spacing is formed between the first and second magnetically conductive faces and in a range of 0.2-1.5 mm.
US07868490B2	Actuator When currents are applied to driving coils, electromagnetic forces are generated between the currents and magnetic fluxes passing through gaps, a shaft member is swung in one direction, and a tilt angle of a mirror (controlled object) changes relative to a support center point. Electromotive forces generated in detection coils when the magnetic fluxes pass through the detection coils are given as feedback signals to a control unit. The control unit generates currents on the basis of the feedback signals, and applies the currents to the driving coils. By detecting the velocity of the mirror during swinging with the detection coils, the structure of the actuator can be simplified. Further, the responsivity can be increased, and the tilt angle of the mirror can be detected with high accuracy.
US07868487B2	Apparatus and method for restricting power delivery An apparatus and method for restricting operation of a power delivery system are disclosed. In at least some embodiments, the apparatus includes a first input terminal at which is received a first command signal, and a second input terminal at which is received an additional signal. The apparatus further includes an output terminal at which is provided a control signal, and a circuit that generates the control signal based at least indirectly upon the first command and additional signals. The control signal generated by the circuit is configured to cause the power delivery system to not deliver at least one type of power when the first command signal indicates a command to do so, if the additional signal indicates an acceptability status. In some embodiments, the power delivery system is an isolation system (e.g., safety isolation system) as are employed in industrial environments, and the apparatus is a permissive module.
US07868469B2	Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device An adapter board includes a package substrate having a first surface and a second surface and further including a board having wirings formed therein, pads disposed in the device side, and the pads disposed in the bump side, an insulating resin layer joined to the first surface, through holes formed in the positions corresponding to the pads in the insulating resin layer, vias formed in the through holes, and pads covering the through holes, wherein the pads are electrically coupled to the pads through the wirings, and the pads are electrically coupled to the pads through the vias.
US07868466B2	Semiconductor device and method of manufacture thereof, circuit board and electronic instrument A method of manufacturing a semiconductor device comprises: a first step of interposing a thermosetting anisotropic conductive material between a substrate and a semiconductor chip; a second step in which pressure and heat are applied between the semiconductor chip and the substrate, an interconnect pattern and electrodes are electrically connected, and the anisotropic conductive material is spreading out beyond the semiconductor chip and is cured in the region of contact with the semiconductor chip; and a third step in which the region of the anisotropic conductive material other than the region of contact with the semiconductor chip is heated.
US07868464B2	Multilayer substrate and manufacturing method thereof A multilayer substrate according to the present invention includes a plurality of laminated insulating layers and conductive patterns formed between the respective insulating layers. The conductive patterns include a first conductive pattern having a predetermined thickness and a second conductive pattern thicker than the first conductive pattern. The first and second conductive patterns are located in the same layer. The first conductive pattern is formed by pattern-etching a conductive layer having a uniform thickness by the subtractive method. The second conductive pattern is formed by forming a pattern-forming groove and then filling the inside of the pattern-forming groove with a conductive material simultaneously with forming a via hole. The first conductive pattern is suitable for an LC pattern for a high-frequency circuit requiring small variations in the width and the thickness of the pattern as well as accuracy in the thickness relative to an insulating pattern, and for a normal conductive pattern requiring impedance matching. The second conductive pattern is suitable for an L pattern for a choke coil.
US07868461B2	Embedded interconnects, and methods for forming same The present invention relates to a semiconductor device comprising first and second active device regions that are located in a semiconductor substrate and are isolated from each other by an isolation region therebetween, while the semiconductor device comprises a first conductive interconnect structure that is embedded in the isolation region and connects the first active device region with the second active device region. The semiconductor device preferably contains at least one static random access memory (SRAM) cell located in the semiconductor substrate, and the first conductive interconnect structure cross-connects a pull-down transistor of the SRAM cell with a pull-up transistor thereof. The conductive interconnect preferably comprises doped polysilicon and can be formed by processing steps including photolithographic patterning, etching, and polysilicon deposition.
US07868460B2	Semiconductor package and method of manufacturing the same Provided are a semiconductor package in which bonding pads of a semiconductor chip are electrically connected to interconnection portions by wire-bonding, and a method of manufacturing the semiconductor package. The semiconductor package includes: a substrate; an interconnection portion that is disposed on the substrate and comprises conductive patterns having a first thickness and conductive patterns having a second thickness that is smaller than the first thickness; at least one semiconductor chip that is mounted on the substrate and comprises a plurality of bonding pads; and a plurality of wires electrically connecting the conductive patterns and the bonding pads.
US07868456B2	Semiconductor device and method for fabricating the same A semiconductor device in which the resistance of a copper wiring to electromigration is increased. The copper wiring is formed so that copper grains will be comparatively large in a central portion of the copper wiring and so that copper grains will be comparatively small in an upper portion and a lower portion of the metal wiring. The copper wiring having this structure is formed by a damascene method. This structure can be formed by controlling electric current density at electroplating time. With the copper wiring having this structure, it is easier for an electric current to run through the central portion than to run through the upper portion. As a result, the diffusion of copper atoms in the upper portion is suppressed and therefore the diffusion of copper atoms from an interface between the copper wiring and a cap film is suppressed.
US07868451B2	Resin sealing semiconductor device and electronic device using resin sealing semiconductor device A resin sealing semiconductor device (2) having a structure in which a portion to be sealed of components including a plurality of chip mounting board, a semiconductor chip mounted to a front surface of each chip mounting board, and a plurality of leads provided correspondingly to each chip mounting board is embedded in resin molded portions (41 and 42) molded into a generally plate shape, and outer lead portions of the plurality of leads (16 and 17) are led out in line from a side surface at one end in a width direction of the resin molded portions, and back surfaces as exposed surfaces (11u1 to 11w1 and 12u1 to 12w1) of each chip mounting board are placed on one surfaces of the resin molded portions (41 and 42), wherein a plurality of positioning protrusions (50) are provided on one surfaces of the resin molded portions (41 and 42), and a protrusion height of the positioning protrusions is set so that a gap to be filled with insulating resin is formed between each part of the exposed surface of each chip mounting board and a radiator plate when the positioning protrusions (50) are abutted against the radiator plate.
US07868448B2	Electrical component and production thereof A modularly constructed electrical component having a module substrate, preferably, of Si, and having one or more preferably un-housed chips placed on the module substrate while being electrically connected thereto and each joined to the module substrate, e.g., by direct wafer bonding. A recess is provided in the module substrate so that a closed hollow space is formed when the chip is joined to the module substrate. The hollow space is not formed by a protective cap, which surrounds the chip and, with the module substrate, closes it on all sides. Rather it is formed by the joining of opposing contact areas of the chip underside and of the upper side of the module substrate. The component can be economically produced because it does not require a protective cap for creating the hollow space. The component has a higher yield than monolithic integration of the functional units.
US07868436B2	Semiconductor device A semiconductor device includes an insulator substrate mounted on a base plate, the insulator substrate having an upper electrode, semiconductor chips mounted on the insulator substrate, external terminals for establishing external electrical connections of the semiconductor device, wires for establishing electrical connections among the external terminals, the upper electrode and the semiconductor chips, a case accommodating the insulator substrate, the semiconductor chips, the external terminals and the wires which are sealed by a sealing material filled in the case, a lid for protecting an upper part of the sealing material, and an insulative low electrification covering fitted on each wire, the low electrification covering having a lesser tendency to produce an electric charge buildup than the sealing material.
US07868433B2	Low stress cavity package The present invention relates to methods and arrangements for forming a low stress cavity package. Particular methods may be performed with existing packaging equipment. In one such method, a leadframe laminated with adhesive film is provided. Integrated circuit dice are connected to the leadframe by reflowing solder between bond pads on the active surface of each die and the leadframe. A viscous thermosetting material is dispensed around the periphery of the active surface of each die. The thermosetting material fills gaps between the solder joint connections and the adhesive film. As a result, the thermosetting material, solder joint connections, each integrated circuit die and the adhesive film define and seal a protective cavity between the active surface of the die and the adhesive film. Portions of each die, leads, solder joint connections and adhesive film are encapsulated with a molding material that is prevented from entering the sealed cavity.
US07868429B2	Micro-sensor and manufacturing method thereof The micro-sensor for a micro image pick-up device includes a flexible circuit board and a circuit substrate. The flexible circuit board has an opening exposing an end of a plurality of metal wires. An image sensing device that electrically connected to a plurality of printed wires disposed on the circuit substrate. The circuit substrate is disposed at the opening of the flexible circuit board. The plurality of printed wires on the circuit substrate corresponds to and contacts the end of the plurality of metal wires exposed out of the flexible circuit board. With the design of the flexible circuit board, the steps of forming a plurality of wiring ducts on the circuit substrate and electrically connecting the printed wires of the circuit substrate by a plurality of connecting lines for transferring signals can be omitted.
US07868427B2	Structure and method for placement, sizing and shaping of dummy structures A material layer on a substrate being processed, e.g. to form chips, includes one or more functional structures. In order to control pattern density during fabrication of the chip, dummy fill structures of different sizes and shapes are added to the chip at different distances from the functional structures of the material layer. In particular, the placement, size and shape of the dummy structures are determined as a function of a distance to, and density of, the functional structures of the material layer.
US07868425B2	Semiconductor device and manufacturing method of the same Provided is a technology capable of suppressing a reduction in electron mobility in a channel region formed in a strained silicon layer. A p type strained silicon layer is formed over a p type silicon-germanium layer formed over a semiconductor substrate. The p type strained layer has a thickness adjusted to be thicker than the critical film thickness at which no misfit dislocation occurs. Accordingly, misfit dislocations occur in the vicinity of the interface between the p type strained silicon layer and p type silicon-germanium layer. At a position which is below the end of a gate electrode and at which misfit dislocations occur, the impurity concentration of the n type strained silicon layer and n type silicon-germanium layer is 1×1019 cm−3 or less.
US07868422B2	MOS device with a high voltage isolation structure The present invention discloses a semiconductor structure. A buried layer of a first polarity type is constructed on a semiconductor substrate. A first epitaxial layer of a second polarity type is formed on the buried layer. A second epitaxial layer of the second polarity type is formed on the buried layer. An isolation structure of the first polarity type is formed between the first and second epitaxial layers on the buried layer. A first well of the second polarity type is formed on the first epitaxial layer. A second well of the second polarity type is formed on the second epitaxial layer. A third well of the first polarity type is formed between the first and second wells, on the isolation structure. The isolation structure interfaces with the buried layer and the third well, thereby substantially blocking a leakage current path between the first and the second wells.
US07868421B2	Analog capacitor Analog capacitors, and methods of fabricating the same, include a lower electrode having a lower conductive layer, a capacitor dielectric layer on the lower conductive layer, and an upper electrode on the capacitor dielectric layer to be opposite to the lower electrode, wherein the upper electrode includes at least an upper conductive layer in contact with the capacitor dielectric layer, wherein the upper conductive layer has a resistivity higher than that of the lower conductive layer.
US07868420B2	Semiconductor device which includes a capacitor and an interconnection film coupled to each other and a manufacturing method thereof A semiconductor device includes a semiconductor substrate and a capacitor which is disposed on a principal surface of the semiconductor substrate. The capacitor includes a lower electrode film disposed on the principal surface of the semiconductor substrate, a dielectric film disposed on the lower electrode and an upper electrode film disposed on the dielectric film. The semiconductor device further includes an interconnection film which includes a portion disposed on the upper electrode film so as to be electrically coupled to the upper electrode film. Directions of residual stresses of the upper electrode film coincide with directions of residual stresses of the portion of the interconnection film. Each of the upper electrode film and the interconnection film may include at least one of platinum and iridium. Also, there is provided a method of manufacturing the semiconductor device.
US07868409B2	Semiconductor integrated circuit with solder bump A semiconductor integrated circuit which is connected to a substrate by solder bumps wherein, when at least one solder bump is connected to a signal line of the semiconductor integrated circuit and the semiconductor integrated circuit is mounted on the substrate, the semiconductor integrated circuit is bonded to the substrate by the solder bump, and the interconnection to the substrate is made by dummy bumps forming wires at the substrate side.
US07868407B2	Substrate comprising a lower silicone resin film and an upper silicone resin film There is disclosed a substrate comprising at least an organic film, an antireflection silicone resin film over the organic film, and a photoresist film over the antireflection silicone resin film, wherein the antireflection silicone resin film includes a lower silicone resin film and an upper silicone resin film which has lower silicon content than the lower silicone resin film. There can be provided a substrate comprising at least an organic film, an antireflection silicone resin film over the organic film, and a photoresist film over the antireflection silicone resin film, in which the antireflection silicone resin film has both excellent resist compatibility and high etching resistance at the time of etching the organic film, whereby a pattern can be formed with higher precision.
US07868400B2	Apparatus for driving a load An apparatus for driving a load that may include, for instance, a semiconductor chip, comprising a first switch, and a fracture sensor. The apparatus may further include, for instance, a circuit disposed outside the semiconductor chip and comprising a second switch coupled in series with the first switch, and configured such that an on/off state of the second switch is set in accordance with a state of the fracture sensor.
US07868395B2	Metal insulator semiconductor field effect transistor having fin structure A semiconductor device includes a fin-shaped semiconductor layer, a gate electrode section formed in a widthwise direction of the semiconductor layer with a gate insulation film interposed therebetween, the gate electrode section including a plurality of electrode materials having different work functions and stacked one another, and a channel section formed adjacent to the gate insulation film in the semiconductor layer. The semiconductor device further includes source and drain regions formed adjacent to the channel section.
US07868393B2	Space efficient integrated circuit with passive devices A multimodal integrated circuit (IC) is provided, comprising, first (74) and second (76) semiconductor (SC) devices, and first (78) and second (80) integrated passive devices (IPDs) coupled, respectively, to the first (74) and second (76) SC devices, wherein the first IPD (78) overlies the second SC device (76) and the second IPD (80) overlies the first SC device (74) chosen such that the underlying SC device (74, 76) is not active at the same time as its overlying IPD (80, 78). By placing the IPDs (78, 80) over the SC devices (76, 74) a compact IC layout is obtained. Since the overlying IPD (78, 80) and underlying SC (76, 74) are not active at the same time, undesirable cross-talk (68, 69) between the IPDs (78, 80) and the SC devices (76, 74) is avoided. This arrangement applies to any IC having multiple signal paths (RF1, RF2) where the IPDs (78, 80) of a first path (RF1, RF2) may be placed over the SC devices (76, 74) of a second path (RF2, RF1) not active at the same time. This is especially useful with high frequencies ICs.
US07868390B2	Method for fabricating strained-silicon CMOS transistor First, a semiconductor substrate having a first active region and a second active region is provided. The first active region includes a first transistor and the second active region includes a second transistor. A first etching stop layer, a stress layer, and a second etching stop layer are disposed on the first transistor, the second transistor and the isolation structure. A first etching process is performed by using a patterned photoresist disposed on the first active region as a mask to remove the second etching stop layer and a portion of the stress layer from the second active region. The patterned photoresist is removed, and a second etching process is performed by using the second etching stop layer of the first active region as a mask to remove the remaining stress layer and a portion of the first etching stop layer from the second active region.
US07868382B2	Emitter-switched power actuator with integrated Zener diode between source and base A power actuator of the emitter-switched type is described, the power actuator comprising at least one high voltage bipolar transistor and a low voltage DMOS transistor connected in cascode configuration between a collector terminal of the bipolar transistor and a source terminal of the DMOS transistor and having respective control terminals. Advantageously, the power actuator further comprises at least a Zener diode, inserted between the source terminal of the DMOS transistor and the control transistor of the bipolar transistor.
US07868379B2	Electronic device including a trench and a conductive structure therein An electronic device can include a transistor. In an embodiment, the transistor can include a semiconductor layer having a primary surface and a conductive structure. The conductive structure can include a horizontally-oriented doped region lying adjacent to the primary surface, an underlying doped region spaced apart from the primary surface and the horizontally-oriented doped region, and a vertically-oriented conductive region extending through a majority of the thickness of the semiconductor layer and electrically connecting the doped horizontal region and the underlying doped region. In another embodiment, the transistor can include a gate dielectric layer, wherein the field-effect transistor is designed to have a maximum gate voltage of approximately 20 V, a maximum drain voltage of approximately 30 V, and a figure of merit no greater than approximately 30 mΩ*nC.
US07868377B2	Layout and structure of memory A flash memory is provided. The flash memory features of having the select gate transistors to include two different channel structures, which are a recessed channel structure and a horizontal channel. Because of the design of the recessed channel structure, the space between the gate conductor lines, which are for interconnecting the select gates of the select gate transistors arranged on the same column, can be shortened. Therefore, the integration of the flash memory can be increased; and the process window of the STI process can be increased as well. In addition, at least one depletion-mode select gate transistor is at one side of the memory cell string. The select gate transistor of the depletion-mode is always turned on.
US07868376B2	Semiconductor storage device and method for manufacturing the same A semiconductor storage device has a plurality of word lines formed with a predetermined interval on a semiconductor substrate, a selection transistor provided at an end portion of the plurality of word lines, a first insulating film formed so as to cover side surfaces of the word lines, a side surface of the selection transistor, and a surface of the semiconductor substrate between the word lines, a high-permittivity film formed on the first insulation film, a second insulating film formed so as to cover the upper surface of the word lines and the selection transistor, a first air-gap portion located between the word lines and surrounded by the high-permittivity film and the second insulating film, and a second air-gap portion formed via the first insulating film and the high-permittivity film at a sidewall portion, which opposes the selection transistor, of the word line adjacent to the selection transistor, an upper portion of the second air-gap portion being covered by the second insulating film.
US07868372B2	Depletion-mode single-poly EEPROM cell A method for forming a depletion-mode single-poly electrically erasable programmable read-only memory (EEPROM) cell is provided. The method includes providing a substrate having a floating region and a control region. Then, an isolation deep well and a deep well are formed in the floating region and the control region of the substrate respectively. A well region is formed in the isolation deep well simultaneously with forming an isolation well region between the isolation deep well and the deep well in the substrate. A depletion doped region and a cell implant region are formed at the well region of the substrate and the deep well of the substrate respectively. A floating gate structure is formed across over the floating region and the control region. An implantation process is performed to form a source/drain region and a heavily doped region in the depletion doped region and the cell implant region respectively.
US07868371B2	Non-volatile memory device and fabrication method thereof In one embodiment, a non-volatile memory device includes an isolation film defining an active region in a semiconductor substrate; a tunnel insulating film located on the active region; a control gate located on the isolation film; an inter-gate dielectric film parallel to the control gate and located between the control gate and the isolation film; an electrode overlapped by the control gate and the inter-gate dielectric film, wherein the electrode extends over the tunnel insulating film on the active region to form a floating gate; and a source region and a drain region formed in the active region on both sides of the floating gate.
US07868370B2	Single gate nonvolatile memory cell with transistor and capacitor A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions of the transistor and the capacitor. The transistor has at least a doping region defining the source and drain regions, as well as three other doping regions overlapping the source and drain regions. Also disclosed are a nonvolatile memory circuit with multiple such nonvolatile memory device, and methods for making the nonvolatile memory circuit with one or more such nonvolatile memory devices.
US07868366B2	Image sensor and method for fabricating the same An image sensor is disclosed including a second semiconductor substrate including a metal interconnection and a second interlayer dielectric; a second via penetrating the second interlayer dielectric so that the second via is connected to the metal interconnection; a first semiconductor substrate on the second interlayer dielectric, the first semiconductor substrate having a unit pixel; a pre-metal dielectric on the first semiconductor substrate; a first via penetrating the pre-metal dielectric and the first semiconductor substrate, the first via being electrically connected to the second via; a first interlayer dielectric on the pre-metal dielectric including the first via; a metal interconnection on the first interlayer dielectric and connected to the first via and the unit pixel; a conductive barrier layer on the metal interconnection; and a color filter and a microlens on the first interlayer dielectric in each unit pixel.
US07868365B2	Image pickup element performing image detection of high resolution and high image quality and image pickup apparatus including the same In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, a resetting transistor is formed. In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, an amplifying transistor is formed. The first and second active regions are respectively the same in shape in image pixel parts. The resetting transistor and the amplifying transistor are shared by the pixel parts.
US07868364B2	Image sensor Embodiments relate to and image sensor. In embodiments, the image sensor may include a semiconductor substrate, a photodiode region, a gate electrode, a dummy gate, and an interlayer dielectric layer. The semiconductor substrate includes a field oxide layer. The photodiode region may be formed on the semiconductor substrate. The gate electrode may be formed on the semiconductor substrate. The dummy gate may be formed on the field oxide layer. The interlayer dielectric layer may be formed on one side of the dummy gate and includes an opening exposing the photodiode region.
US07868363B2	Semiconductor component arrangement comprising a trench transistor Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench disposed in the semiconductor body and with at least a gate electrode disposed in the at least one trench. An electrode structure is disposed in at least one further trench and comprises an at least one electrode. The at least one trench of the transistor structure and the at least one further trench are produced by common process steps. Furthermore, the at least one electrode of the electrode structure and the gate electrode are produced by common process steps.
US07868359B2	Semiconductor device In a semiconductor device including multiple unit cells arranged in an array, transistors are affected by a stress from an STI at different degrees depending on the position in the array. As a result, a variation occurs in transistor characteristic. In a semiconductor device according to the present invention, each of predetermined transistors in outermost unit blocks in the array has a transistor size according to the stress from the STI.
US07868352B2	Silicon break over diode A Break Over Diode (“BOD”) device is a gate-less two terminal high power semiconductor switch in which transitions from a blocking state to a conducting state are triggered by a dV/dt pulse to the anode. The BOD device can be thought of as two cross-coupled PNP and NPN transistors, and includes both anode and cathode shorts which reduce the gain of the NPN and PNP transistors by shunting some current away from their bases directly to their emitters, thereby improving blocking. Moreover, the anode and cathode shorts in conjunction with the device blocking junction form PN diodes which are distributed throughout the bulk of the material and function as anti-parallel diodes to the base-emitter junctions of the PNP and NPN transistors, which enables the BOD device to handle a larger current reversal for a longer period of time. The P base layer may be made thin to decrease the voltage fall time from full blocking to full conduction, and the cathode and anode shorts may be provided in a honeycomb pattern.
US07868351B2	Light emitting device A light emitting device includes a pair of electrodes, wherein at least one electrode is transparent or semi-transparent, and an phosphor layer provided between the pair of electrodes, wherein the phosphor layer includes a layer having nitride semiconductor particles, and wherein the nitride semiconductor particles have metal nano structures precipitated in grain boundaries between the nitride semiconductor particles.
US07868349B2	Light source apparatus and fabrication method thereof A light source apparatus and a fabrication method thereof can prevent light interference between light emitting devices adjacent to each other and increase the luminous efficiency by collecting light emitted from the side of the light emitting device toward the front of a metal stem by forming grooves at a sub-mounts, bonding the light emitting device to the inside of the groove by a flip chip bonding method and forming a reflective layer inside the groove.
US07868347B2	Metal core multi-LED SMD package and method of producing the same A new SMD (surface mount devices) package design for efficiently removing heat from LED Chip(s) is involved in this invention. Different from the regular SMD package, which electrical isolated materials like Alumina or AlN are used, the substrate material here is metal like Copper, Aluminum and so on. Also, different from regular design, which most time only has one LED chip inside, current design will at least have two or more LED chips (or chip groups) in one package. All chips are electrical connected via metal blocks, traces or wire-bond. This type of structure is generally fabricated via chemical etching and then filled with dielectric material inside to form a strong package. Because the thermal conductivity of the metal is much higher than the ceramics, the package thermal resistance is much lower than the ceramics based package. Also, the cost of the package is much lower than ceramics package. Moreover, emitting area in one package is much larger than the current arts.
US07868346B2	Island submount and a method thereof An island submount used for carrying at least one light-emitting element having at least one electrical contact. The island submount includes a substrate, at least one island structure having a top surface and an inclined surface, and a conductive layer. The island structure is located on the substrate and corresponds to the electrical contact. The conductive layer is formed on the surface of the island structure and at least covers the top surface, so as to be electrically connected with the electrical contact. The island submount is capable of enhancing the light extraction efficiency of the light-emitting element, and avoids the energy loss due to re-absorption when the light emerging from below the light-emitting element is reflected back to the light-emitting element.
US07868345B2	Light emitting device mounting substrate, light emitting device housing package, light emitting apparatus, and illuminating apparatus A light-emitting apparatus with improved dissipation efficiency of heat transmitted to a specific electrode of a light-emitting device is provided. A light-emitting device mounting substrate used for the light emitting apparatus include a base body (1) which mounts thereon a light-emitting device (3); a first electrically conductive path (L1) formed within the base body (1), one end thereof being electrically connected to a first electrode (3a) of the light-emitting device (3) and the other end thereof being led out to a surface of the base body (1); and a second electrically conductive path (L2) formed in the base body (1), one end thereof being electrically connected to a second electrode (3b) of the light-emitting device (3), and the other end thereof being formed on the surface of the base body (1). The first electrically conductive path (L1) is made smaller in thermal resistance than the second electrically conductive path (L2).
US07868344B2	Nitride semiconductor light emitting device including electrodes of a multilayer structure A nitride semiconductor LED comprises a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer formed on a predetermined region of the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the active layer; a p-electrode formed on the p-type nitride semiconductor layer; and an n-electrode formed on the n-type nitride semiconductor layer in which the active layer is not formed. The p-electrode and n-electrode are formed to have such a multilayer structure that an ohmic contact layer, a compound layer containing aluminum or silver, and a degradation preventing layer are sequentially laminated.
US07868343B2	Light-emitting devices having multiple encapsulation layers with at least one of the encapsulation layers including nanoparticles and methods of forming the same A light-emitting device includes an active region that is configured to emit light responsive to a voltage applied thereto. A first encapsulation layer at least partially encapsulates the active region and includes a matrix material and nanoparticles, which modify at least one physical property of the first encapsulation layer. A second encapsulation layer at least partially encapsulates the first encapsulation layer.
US07868342B2	Semiconductor light emitting device A semiconductor light emitting device includes a silicon substrate, a p-type semiconductor layer provided on the silicon substrate, a n-type semiconductor layer provided on the silicon substrate, the n-type semiconductor layer adjoining the p-type semiconductor layer, and a light emitting section formed at a p-n homojunction between the p-type semiconductor layer and the n-type semiconductor layer. The p-n homojunction is substantially perpendicular to a major surface of the silicon substrate. The p-n homojunction is corrugated with a period matched with an integer multiple of an emission wavelength at the light emitting section.
US07868337B2	Light emitting diode and method for manufacturing the same Provided are a light emitting diode (LED) and a method for manufacturing the same. The LED includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The active layer includes a well layer and a barrier layer that are alternately laminated at least twice. The barrier layer has a thickness at least twice larger than a thickness of the well layer.
US07868335B1	Modulation doped super-lattice sub-collector for high-performance HBTs and BJTs A bipolar junction transistor having an emitter, a base, and a collector includes a stack of one or more layer sets adjacent the collector. Each layer set includes a first material having a first band gap, wherein the first material is highly doped, and a second material having a second band gap narrower than the first band gap, wherein the second material is at most lightly doped.
US07868325B2	Semiconductor wafer of single crystalline silicon and process for its manufacture Semiconductor wafer of monocrystalline silicon contain fluorine, the fluorine concentration being 1·1010 to 1·1016 atoms/cm3, and is free of agglomerated intrinsic point defects whose diameter is greater than or equal to a critical diameter. The semiconductor wafers are produced by providing a melt of silicon which is doped with fluorine, and crystallizing the melt to form a single crystal which contains fluorine within the range of 1·1010 to 1·1016 atoms/cm3, at a growth rate at which agglomerated intrinsic point defects having a critical diameter or larger would arise if fluorine were not present or present in too small an amount, and separating semiconductor wafers from the single crystal.
US07868324B2	Light emitting device By doping an organic compound functioning as an electron donor (hereinafter referred to as donor molecules) into an organic compound layer contacting a cathode, donor levels can be formed between respective LUMO (lowest unoccupied molecular orbital) levels between the cathode and the organic compound layer, and therefore electrons can be injected from the cathode, and transmission of the injected electrons can be performed with good efficiency. Further, there are no problems such as excessive energy loss, deterioration of the organic compound layer itself, and the like accompanying electron movement, and therefore an increase in the electron injecting characteristics and a decrease in the driver voltage can both be achieved without depending on the work function of the cathode material.
US07868323B2	Thin film transistor device, image display device and manufacturing method thereof In an image display device comprising a display part configured with a plurality of pixels and a peripheral integrated circuit which controls the display part, the display device is provided on a support substrate which has high durability for the impact and the bending, the pixel circuit is configured with an organic semiconductor TFT, the peripheral integrated circuit is configured with a low-temperature poly Si-TFT, this peripheral integrated circuit is provided on a support substrate of the display device being removed the support substrate when being manufactured, and the pixel circuit and the peripheral integrated circuit are connected with the same wire layer.
US07868321B2	Organic light emitting device and flat display including the same Provided are an organic light emitting device (OLED) and a flat display including the OLED. The OLED includes an organic layer which includes a pixel electrode, an opposite electrode, and at least an emission layer between the pixel electrode and the opposite electrode, wherein the emission layer includes a long wavelength-blue emission layer emitting blue light having a long wavelength and a short wavelength-blue emission layer emitting blue light having a short wavelength. The long wavelength-blue emission layer is positioned in a location to enhance emission of blue light from the emission layer. The OLED can emit blue light with high efficiency and high brightness.
US07868320B2	Semiconductor device and manufacturing method thereof An object of the invention is to reduce an area occupied by a capacitor in a circuit in a semiconductor device, and to downsize a semiconductor device on which the capacitor and an organic memory are mounted. The organic memory and the capacitor, included in a peripheral circuit, in which the same material as the layer containing the organic compound used for the organic memory is used as a dielectric, are used. The peripheral circuit here means a circuit having at least a capacitor such as a resonance circuit, a power supply circuit, a boosting circuit, a DA converter, or a protective circuit. Further, a capacitor in which a semiconductor is used as a dielectric may be provided over the same substrate as well as the capacitor in which the same material as the layer containing the organic compound is used as a dielectric. In this case, it is desirable that the capacitor in which the same material as the layer containing the organic compound is used as a dielectric and the capacitor in which the semiconductor is used as a dielectric are connected to each other in parallel. (189)
US07868316B2	Nitride semiconductor device There is provided a nitride semiconductor device. A nitride semiconductor device according to an aspect of the invention may include: an n-type nitride semiconductor layer; a p-type nitride semiconductor layer; an active layer provided between the n-type and p-type nitride semiconductor layers and having quantum well layers and quantum barrier layers alternately stacked on each other; and an electron blocking layer provided between the active layer and the p-type nitride semiconductor layer, and having a plurality of first nitride layers formed of a material having a higher band gap energy than the quantum barrier layers and a plurality of second nitride layers formed of a material having a lower band gap energy than the first nitride layers, the first and second nitride layers alternately stacked on each other to form a stacked structure, wherein the plurality of first nitride layers have energy levels bent at predetermined inclinations, and with greater proximity to the p-type nitride semiconductor layer, the first nitride layers have a smaller inclination of the energy level.
US07868313B2	Phase change memory device and method of manufacture A phase change memory control ring lower electrode is disclosed. The lower electrode includes an outer ring electrode in thermal contact with a phase change memory element, an inner seed layer disposed within the outer ring electrode and in contact with the phase change memory element, and an electrically conductive bottom layer coupled to the outer ring electrode.
US07868310B2	Resistance variable memory device and method of fabrication Methods and apparatus for providing a resistance variable memory device with agglomeration prevention and thermal stability. According to one embodiment, a resistance variable memory device is provided having at least one tin-chalcogenide layer proximate at least one chalcogenide glass layer. The invention also relates to methods of forming such a memory device.
US07868309B2	Radiation detecting system In a radiation detecting system including a first electrode which is imparted with a positive bias and permeable to a recording electromagnetic wave carrying thereon image information, a recording photoconductive layer which generates electric charges in response to receipt of projection of the recording electromagnetic wave, an organic polymer layer provided between the first electrode and the recording photoconductive layer, and a second electrode which is provided on the side of the recording photoconductive layer opposite to a side where the first electrode is provided and being for recording the image information by storing electric charges generated in the recording photoconductive layer upon projection of the recording electromagnetic wave, the organic polymer layer includes a hole blocking material.
US07868305B2	Technique for ion beam angle spread control A technique for ion beam angle spread control is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for ion beam angle spread control. The method may comprise directing one or more ion beams at a substrate surface at two or more different incident angles, thereby exposing the substrate surface to a controlled spread of ion beam incident angles.
US07868300B2	Lithography system, sensor and measuring method Lithography system, sensor and method for measuring properties of a massive amount of charged particle beams of a charged particle beam system, in particular a direct write lithography system, in which the charged particle beams are converted into light beams by using a converter element, using an array of light sensitive detectors such as diodes, CCD or CMOS devices, located in line with said converter element, for detecting said light beams, electronically reading out resulting signals from said detectors after exposure thereof by said light beams, utilizing said signals for determining values for one or more beam properties, thereby using an automated electronic calculator, and electronically adapting the charged particle system so as to correct for out of specification range values for all or a number of said charged particle beams, each for one or more properties, based on said calculated property values.
US07868299B2	Systems and methods for adjustably detecting ultra-violet radiation The invention disclosed provides an improved method and apparatus for light sensing to detect bulb ignition for UV curing lamps. The light sensing apparatus is configured with adjustable sensitivity, and can be configured for use with a range of light intensity levels. The light sensing apparatus can be configured for use with multiple ultra-violet lamps in a variety of spatial configurations. The light sensing apparatus comprises a phototransistor circuit configured with adjustable sensitivity. The improved apparatus further comprises a signal conditioning circuit.
US07868288B2	Optical scanning device, image forming apparatus including the same, and method of configuring the same An enclosure includes a first enclosure and a second enclosure. A deflector deflects a light emitted from a light source. A first optical system leads the light emitted from the light source to the deflector. A second optical system includes at least one optical element, and leads the light deflected by the deflector onto a surface to be scanned. The first enclosure holds the light source, the deflector, and the first optical system, and the second enclosure holds the at least one optical element included in the second optical system.
US07868286B2	Mounted imaging device A vehicle-mounted imaging device that is mounted in an automobile and performs color imaging has been provided with a plurality of two-dimensionally arranged pixel cells. In each of the pixels, a color filter separates incident light by a multilayer interference filter. The multilayer interference filter is composed of two λ/4 multilayer films and a spacer layer sandwiched therebetween. The multilayer interference filter transmits light in a wavelength region that corresponds to an optical thickness of the spacer layer. The λ/4 multilayer films and spacer layer are composed of inorganic materials.
US07868285B2	Array-type light receiving device and light collection method An array-type light receiving device includes a first light collector, a second light collector configured to receive light collected by the first light collector, and a light receiver configured to receive light collected by the second light collector. The first light collector has a spherical shape, the second light collector has a high refractive index portion and a low refractive index portion, and the high refractive index portion has one of a cylindrical shape and a polygonal prismatic shape.
US07868282B2	Automatic vision display apparatus An automatic vision display apparatus has a flight object having a floating gas filled therein to fly, flying along a vertical wall surface and including a screen mounted at an opposite side to the vertical wall surface; a propulsion unit mounted at a predetermined position of the flight object and moving the flight object; a control unit mounted to the flight object and controlling the propulsion unit; a projector projecting an image on the screen of the flight object at a distance from the flight object; an adjusting unit adjusting an image projecting direction of the projector; and a main control unit controlling the projector to project the image and controlling the adjusting unit so that the projector tracks a movement of the flight object to project an image. According to the invention, it is possible to project an image while automatically tracking the screen of the flight object being flying. In addition, it is possible to correct a distortion of the projected when the screen of the flight object consists of the three dimensional curved surface.
US07868281B2	Optical navigation system and method of estimating motion with optical lift detection An optical navigation system and method of estimating motion uses a plate with an aperture, a photodetector and an optical system for optical lift detection. The optical system is configured to direct an input light to a target surface through the aperture of the plate and to direct the input light reflected from the target surface and transmitted back through the aperture of the plate toward the photodetector to be detected by the photodetector for lift detection.
US07868279B2	Focus detecting apparatus for focusing on surface of transparent substance The focus detecting apparatus comprises an objective lens, a point light source which irradiates illumination light for generating a focusing signal to a transparent substrate through the objective lens, a mask means having a first shading part for shading one of areas of the luminous of the illumination light, and a photodetector having two light receiving parts, wherein the mask means is formed so as to have a shape similar to one of light receiving parts in the photodetector, and has a second shading part that intercepts a part of luminous flux passing through another area so that reflected light from one of the surfaces may enter into the two light receiving parts, and reflected light from another surface may pass through an area which is located off the light receiving part arranged at one of the areas, when a focus of the objective lens is positioned near one of surfaces out of the first or second surface in the transparent substrate.
US07868270B2	Temperature control for performing heat process in coating/developing system for resist film A temperature control method is used for controlling a temperature of a hot plate, so that a measured temperature of the hot plate conforms to a target temperature thereof, in a heat processing apparatus for performing a heat process on a substrate placed on the hot plate, which is used in a coating/developing system for applying a resist coating onto the substrate to form a resist film and then performing development on the resist film after light exposure. The method includes acquiring adjustment data necessary for adjusting a reaching time defined by a time period for increasing the temperature of the substrate from a first temperature around an initial temperature to a second temperature around the target temperature; and adjusting the target temperature by use of the adjustment data thus acquired, after starting the process on the substrate.
US07868267B2	Laser irradiating device, laser irradiating method and manufacturing method of semiconductor device An object of the present invention is to provide a method and a device for constantly setting the energy distribution of a laser beam on an irradiating face, and uniformly irradiating the laser beam to the entire irradiating face. Further, another object of the present invention is to provide a manufacturing method of a semiconductor device including this laser irradiating method in a process. Therefore, the present invention is characterized in that the shapes of plural laser beams on the irradiating face are formed by an optical system in an elliptical shape or a rectangular shape, and the plural laser beams are irradiated while the irradiating face is moved in a first direction, and the plural laser beams are irradiated while the irradiating face is moved in a second direction and is moved in a direction reverse to the first direction. The plural laser beams may be irradiated while the irradiating face is moved in the first direction, and the plural laser beams may be irradiated while the irradiating face is moved in the direction reverse to the first direction, and the irradiating face may be also moved in the second direction.
US07868263B2	Percussion hand-held power tool with contactless manual switch located in side handle An electrical hand-held power tool includes an assembly (2) vibrating along a vibration axis (A) during operation of the power tool, at least one, transversely projecting, vibration-decoupled pivotal side handle (3), a manual switch (4) having an actuation element (5) arranged in the side handle (3) and switchingly connectable with at least one sensor switch (8) which is located in the assembly (2) in vicinity of the handle pivot point (G), by a switching rod (7) having a switching element (6) and being pivotally supported on the side handle at a switching pivot point (S) spaced from the handle pivot point (G) and from the vibration axis (A).
US07868256B2	Grommet A grommet, made of an elastic body, is externally mounted on a group of electric wires to be spanned between a car-body panel and a movable body consisting of a door or a trunk lid coupled to the car-body panel through a hinge member. The grommet has large-diameter cylindrical parts which are disposed on one and other ends thereof in a longitudinal direction thereof and have an annular locking groove respectively to be inserted into and locked to a through-hole formed through the car-body panel and a through-hole formed through the trunk lid respectively; small-diameter cylindrical parts continuous with the large-diameter cylindrical parts respectively; and a bellows-like cylindrical part provided between the small-diameter cylindrical parts with the bellows-like cylindrical part continuous with the small-diameter cylindrical parts.
US07868249B2	Substrate and collector grid structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays This invention comprises deposition of thin film photovoltaic junctions on metal substrates which can be heat treated following deposition in a continuous fashion without deterioration of the metal support structure. In a separate operation an interconnection substrate structure is produced in a continuous roll-to-roll fashion. In this way the interconnection substrate structure can be uniquely formulated from polymer-based materials since it does not have to endure high temperature exposure. Cells comprising the metal foil supported photovoltaic junctions are then laminated to the interconnection substrate structure. Conductive interconnections are deposited to complete the array. The conductive interconnections can be accomplished with a separately prepared interconnection component. The interconnected array is produced using continuous roll-to-roll processing which avoids the need to use the expensive and intricate material removal operations currently taught in the art to achieve electrical interconnections among arrays of photovoltaic cells.
US07868248B2	Chain link metal interconnect structure An interconnect structure is provided by applying a conductive layer (typically one or more metal layers 23,28) over the entire surface of the module (11) to form all of the contacts (19,32) to all of the cells in the module and then scribing the conductive layer into a series of strips using a series of straight high speed laser scribes. The strips are then divided into individual links by scribing transversely to the first scribe direction with the laser turned on and off to cut each alternate stripe. The p-type regions of the cells are contacted through holes (19), n-type regions are contacted through holes (32). A silicon film (12) is separated into cells (35a,b,c,d) by isolation grooves (16). In a first embodiment, every second transverse scribe is offset by one strip such that each strip is cut into links which overlap two links on either side that are offset by a distance equal to half the pitch of the links. The pitch of the links is equal to two cell widths and the transverse scribes are coincident with or close to interruptions in the underlying cell layout representing cell boundaries between adjacent cells of the module. In a second embodiment, conductive bridges extend across longitudinal interruptions separating the parallel extending strips. In this embodiment, the like type contact pads for the cells are aligned in rows extending transverse to the cell boundary with alternating rows of p type and n type contact pads.
US07868247B2	Photovoltaic device A method of forming a photovoltaic device includes a plurality of quantum wells and a plurality of barriers. The quantum wells and barriers are disposed on an underlying layer. The barriers alternate with the quantum wells. One of the plurality of quantum wells and the plurality of barriers is comprised of tensile strained layers and the other of the plurality of quantum wells and the plurality of barriers is comprised of compressively strained layers. The tensile and compressively strained layers have elastic properties. The method includes selecting compositions and thicknesses of the barriers and quantum wells taking into account the elastic properties such that each period of one tensile strained layer and one compressively strained layer exerts substantially no shear force on a neighboring structure; providing the underlying layer; and forming the quantum sells and barriers on the underlying layer according to the derived compositions and thicknesses.
US07868242B2	Thermoelectric conversion module A thermoelectric conversion module includes a tubular element unit having a plurality of ring-like thermoelectric elements coaxially arranged with air as an insulator sandwiched inbetween. The ring-like thermoelectric element is covered approximately entirely with electrodes at its outer circumference surface and inner circumference surface, respectively, and generates electricity by temperature difference between the outer circumference surface and the inner circumference surface. A lead wire electrically connects the electrode covered on the outer circumference surface of one ring-like thermoelectric element among the plurality of ring-like thermoelectric elements to the electrode covered on the inner circumference surface of another ring-like thermoelectric element adjacent to the one ring-like thermoelectric element. A doubled cylindrical support unit 41 includes a SUS tube whose outer circumference surface supports the tubular element unit and a SUS tube whose inner circumference surface supports the tubular element unit.
US07868241B2	Waveform generating apparatus, sound effect imparting apparatus and musical sound generating apparatus A synthesizer 10 is configured such that when a PC 30 is connected thereto, the synthesizer 10 accepts selection of a tone used for sound generation from among a tone included in an internal tone generation unit 16 and a tone included in a tone generation module 312 provided by the external PC 30, and causes the PC 30 to enable the function of the tone generation module 312, downloads an edit operation accepting program corresponding to the tone generation module 312 from a UI control program memory 315 of the PC 30, and executes the downloaded edit operation accepting program to thereby realize a function of editing data of the tone included in the tone generation module 312, the data being stored in the PC 30, when the tone included in the tone generation module 312 of the PC 30 is selected.
US07868240B2	Signal processing apparatus and signal processing method, program, and recording medium A signal processing apparatus is disclosed which processes an audio signal. The signal processing apparatus includes a detection section which detects a first tempo from an audio signal, a calculation section which calculates a speed feeling that indicates whether the first tempo is fast or slow, and a determining section which determines a second tempo by correcting the first tempo using the speed feeling.
US07868235B2	Bridge system for improved acoustic coupling in stringed instruments A bridge system for connection to the instrument body of a stringed instrument, the bridge system including at least one bridge piece configured to contact at least one string of the stringed instrument and a ramp-shaped height and tone adjustment bar between the bridge piece and the instrument body. An adjustment mechanism translates the bridge piece with respect to the height and tone adjustment bar to raise and lower the string and to provide contact between the bridge piece and the height and tone adjustment bar.
US07868234B1	Inbred maize line PHEME A novel inbred maize variety designated PHEME and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing inbred maize variety PHEME with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHEME through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the inbred variety PHEME or a trait conversion of PHEME with another maize variety. Inbred maize varieties derived from inbred maize variety PHEME, methods for producing other inbred maize varieties derived from inbred maize variety PHEME and the inbred maize varieties and their parts derived by the use of those methods.
US07868226B2	Poplar transcription factors A nucleic acid molecule comprising a nucleotide sequence selected from the group consisting of nucleotide sequences set forth in SEQ ID NO:1-6 and 11, particularly SEQ ID NO: 3. The nucleotide sequence encodes at least a corresponding amino acid sequence set forth in SEQ ID NO: 12-17 and 26. The nucleic acid sequences and corresponding amino acid sequences regulate the flavonoid pathway, and more particularly they regulate the proanthocynanidin biosynthetic pathway and proanthocynanidin biosynthesis in a plant. One embodiment relates to methods of producing transformed plants comprising introducing into a cell of a plant a nucleic acid sequence selected from the group consisting of SEQ ID NO:1-6 and 11, particularly SEQ ID NO: 3 and regenerating a transformed plant from the transformed cell. Another embodiment relates to a host plant cell comprising at least one of the nucleic acid sequences set forth in SEQ ID NO:1-6 and 11.
US07868219B2	Production of high purity ethylbenzene from non-extracted feed and non-extracted reformate useful therein A process for producing an ethylbenzene product having a purity of at least 99.50 percent based on the weight of ethylbenzene present in the product by the ethylation of the benzene present in non-extracted feed, e.g., non-extracted hydrocarbon composition. The non-extracted feed is substantially free of both C4− hydrocarbons and the C7+ aromatic hydrocarbons and contains benzene and benzene coboilers. The process is carried out in the liquid phase, in the presence of an acid-active catalyst containing MCM-22 family molecular sieve, and under specified conditions.
US07868213B2	1,4-bis(bromodifluoromethyl) tetrafluorobenzene and producing method thereof A method for producing 1,4-bis(bromodifluoromethyl)tetrafluorobenzene (BFTFB) is disclosed. The target compound is predicted as a very potent monomer for low dielectric constant material. This method comprises the following steps: (a) mixing 1,4-bis(bromodifluoromethyl)tetrafluorobenzene (DFMTFB), a bromination agent, and a solvent (with or without) to form a mixture; (b) heating the mixture under UV radiation; and (c) purifying the resultant to obtain 1,4-bis(bromodifluoromethyl)tetrafluorobenzene (BFTFB) with high purity.
US07868209B2	Process for making borated alkaline earth metal toluene sulfonates Provided is a new and improved process for preparing a borated alkaline earth metal toluene sulfonate salt.
US07868200B2	Process for preparing alicyclic carboxylic acid compounds A process for preparing at least one alicyclic carboxylic acid compound by Grignard reaction, the process comprising: reacting magnesium and at least one alicyclic halide compound in at least one solvent to produce at least one alicyclic Grignard reagent; concurrently adding carbon dioxide to the magnesium, the alicyclic halide compound, the solvent, and the alicyclic Grignard reagent, while the alicyclic Grignard reagent is still being produced, to form at least one alicyclic carboxylate magnesium salt; and hydrolyzing the alicyclic carboxylate magnesium salt to form the alicyclic carboxylic acid compound; wherein the alicyclic Grignard reagent and the alicyclic carboxylate magnesium salt are prepared in a one-pot synthesis.
US07868199B2	Fluoroalcohol preparation method, fluorinated monomer, polymer, resist composition and patterning process Fluoroalcohol compounds of formula (4) are prepared by reacting a fluorine compound of formula (1) with reducing agents or organometallic reagents of formulas (2) and (3) wherein R1 is H or a monovalent C1-C20 hydrocarbon group in which any —CH2— moiety may be replaced by —O— or —C(═O)—, R2 is H or a monovalent C1-C6 hydrocarbon group, R3 and R4 are H or a monovalent C1-C8 hydrocarbon group, and M1 is Li, Na, K, Mg, Zn, Al, B, or Si. From the fluoroalcohol compounds, fluorinated monomers can be produced in a simple and economic way, which are useful in producing polymers for the formulation of radiation-sensitive resist compositions.
US07868198B2	Multi-functional silsesquioxanes for novel coating applications A multi-functional silsesquioxane, method of making the same, and coatings incorporating the same, including a polyhedral silsesquioxane including at least one first face and at least one second face that is spaced apart from the at least one first face; at least one first functionality bonded to the at least one first face; and at least one second functionality different from the first functionality, and being bonded to the at least one second face. In one particular respect, silica for the silsesquioxane may be derived from rice hull ash via an octa(tetramethylammonium)silsesquioxane octaanion.
US07868195B2	Systems and methods for extracting lipids from and dehydrating wet algal biomass Exemplary methods include centrifuging a wet algal biomass to increase a solid content of the wet algal biomass to between approximately 10% and 40% to result in a centrifuged algal biomass, mixing the centrifuged algal biomass with an amphiphilic solvent to result in a mixture, heating the mixture to result in a dehydrated, defatted algal biomass, separating the amphiphilic solvent from the dehydrated, defatted algal biomass to result in amphiphilic solvent, water and lipids, evaporating the amphiphilic solvent from the water and the lipids, and separating the water from the lipids. The amphiphilic solvent may be selected from a group consisting of acetone, methanol, ethanol, isopropanol, butanone, dimethyl ether, and propionaldehyde. Other exemplary methods include filtering a wet algal biomass through a membrane to increase a solid content of the wet algal biomass to between approximately 10% and 40% to result in a filtered algal biomass.
US07868192B1	Process for producing glycidol The present invention relates to a process for producing glycidol from glycerol carbonate by subjecting the glycerol carbonate to decarboxylation reaction in the presence of a solvent containing no active hydrogen. In the process, glycidol can be produced from glycerol carbonate as a raw material of the glycidol with a high selectivity.
US07868190B2	Method for producing phenolphthalein using a heteropolyacid catalyst A method for producing a phenolphthalein compound comprises: reacting a phenolic compound of the formula: wherein R1 is a hydrogen or a C1-C12 hydrocarbyl group, with a phthalic anhydride compound of the formula: wherein R2 is a hydrogen, a C1-C12 hydrocarbyl group, or a halogen, in the presence of a heterogeneous catalyst and a promoter to form a reaction mixture comprising a phenolphthalein compound of the formula: wherein each R1 is independently a hydrogen or a C1-C12 hydrocarbyl group; and R2 is a hydrogen, a C1-C12 hydrocarbyl group, or a halogen; wherein the heterogeneous catalyst comprises, on a porous support, a calcination product of a heteropolyacid composition.
US07868189B2	Organic dye used in dye-sensitized solar cell An organic dye used in a dye-sensitized solar cell is described, having general formula (1): D-Sp1-Ch-Sp2-Acc-Y (1) wherein the groups D, Ch, Acc and Y are conjugate with each other, the group D is a donor group, the group Ch is a chromophore rendering low HOMO-LUMO gap or a polyaromatic chromophore, the group Acc is an acceptor group, the group Y is an anchoring group, and each of Sp1 and Sp2 represents a single bond or a spacer group allowing conjugation between the groups D and Ch or between the groups Ch and Acc.
US07868187B2	Processes of producing glutamic acid compounds and production intermediates therefore and novel intermediate for the processes The present invention relates to processes of producing glutamic acid compounds, for example, monatin, which are useful as, for example, production intermediates for sweetener or pharmaceutical products.
US07868180B2	Process for the preparation of sartan derivatives and intermediates useful in such process The invention provides a process for the preparation of a sartan derivative of formula (I) (formula as filed in paper form) (I) wherein the substituents have the meaning indicated in the description, or a pharmaceutically acceptable salt thereof, comprising reacting 2-cyanophenylboronic acid or a derivative thereof with a p-halobenzyl-1H-imidazole derivative of formula (VI), (formula as filed in paper form) (VI) wherein (part of formula as filed in paper form), X, Y, R1 and R2 are as defined above, and Z is I, Br or Cl, in the presence of a transition metal catalyst and an inorganic or organic base. The invention also provides new intermediates of formula (V), (formula as filed in paper form) (V) wherein M is an alkali metal or an NR4R5R6R7 group; and of formula (II) (formula as filed in paper form) (II).
US07868179B2	Thiazolyl biphenyl amides The invention relates to novel thiazolylbiphenylamides of the formula (I) in which R1, R2, R3, R4, R5 and R6 are as defined in the disclosure, to a process for preparing these compounds and to their use for controlling unwanted micro-organisms.
US07868176B2	Salts of N-(4-fluorobenzyl)-N-(1-methylpiperidin-4-y1)-N′-(4-(2-methylpropyloxy)phenylmethyl)carbamide and their preparation Disclosed herein are salts of N-(4-fluorobenzyl)-N-(1-methylpiperidin-4-yl)-N′-(4-(2-methylpropyloxy) phenylmethyl)carbamide including the citrate, fumarate, maleate, malate, phosphate, succinate, sulphate, and edisylate salts.
US07868174B2	Form of a benzenesulfonamide derivative The present disclosure relates to an improved process for the preparation of enantiomerically enriched alcohols of Formula (I), from the corresponding ketone of Formula (II), by asymmetric transfer hydrogenation, using a hydrogen donor, catalyzed by a ruthenium or rhodium complex of an optically active N-sulfamoyl-1,2-diamine. R is as defined herein.
US07868173B2	Prodrugs of benzoquinolizine-2-carboxylic acid The instant invention relates to novel prodrugs of optically pure benzoquinolizine-2-carboxylic acid and pharmaceutical compositions that include the prodrugs. In particular, the present invention relates to the sulfonic acid salts of L-alanine and L-valine prodrugs of S-(−)-9-fluoro-6,7-dihydro-8-(4-hydroxypiperidin-1-yl)-5-methyl-1-oxo-1H,5H-benzo[i,j]quinolizine-2-carboxylic acid. The compounds and compositions of the invention can be used to treat bacterial Gram-positive, Gram-negative and anaerobic infections, especially infections caused by resistant Gram-positive organism and Gram-negative organism, mycobacterial infections and emerging nosocomial pathogen infections.
US07868172B2	2-(hetero)-aryl substituted tetrahydroquinoline derivatives Compounds of the formula I, in which W, R, R1, R2, R3, R4, R5, R6 and R7 have the meanings indicated in Claim 1, can be employed, inter alia, for the treatment of tumours
US07868170B2	Platinum complex and organic light-emitting device using the same The present invention relates to a platinum complex as the following formula (I): wherein X, n, R1, R2, R3,R4, R5, X1, X2, L1, and L2 are defined the same as the specification. The present invention also further provides an organic light-emitting device using the same. The complexes of the present invention exhibit enhanced emission quantum yields, and short phosphorescence radiative lifetimes in the range of several microseconds so as to be applied in high efficiency OLEDs.
US07868169B2	Crystalline rosuvastatin intermediate Provided is a crystalline rosuvastatin intermediate and processes for preparation thereof.
US07868164B2	Cellulose ethers A cellulose ether which has from 4,000 to 10,000 anhydroglucose repeat units and is substituted with (a) on the average from 0.0003 to 0.08 moles, per mole of anhydroglucose unit, of a substituent comprising an alkyl or arylalkyl group having from 8 to 24 carbon atoms and (b) a substituent having the formula II wherein R5, R6 and R7 each independently are —CH3 or —C2H5, R8 is —CH2—CHOH—CH2— or —CH2CH2, Az− is an anion, and z is 1, 2 or 3 is useful in hair and skin care compositions.
US07868161B2	Photocrosslinking probes and uses of the same A method of detecting a target nucleic acid is disclosed, the method comprising detecting the presence of a fluorescent covalent crosslinked product from non-fluorescent precursors. The fluorescent covalent crosslinked product comprises a novel fluorophore structure. Also described are methods of synthesizing probe molecules that can form fluorescent covalent crosslinked products with nucleic acid targets and arrays comprising such probes.
US07868160B2	Compositions and methods for inhibiting expression of anti-apoptotic genes The present invention relates to a double-stranded ribonucleic acid (dsRNA) for inhibiting the expression of an anti-apoptotic gene, comprising an antisense strand having a nucleotide sequence which is less that 25 nucleotides in length and which is substantially complementary to at least a part of an apoptotic gene, such as a Bcl gene. The invention also relates to a pharmaceutical composition comprising the dsRNA together with a pharmaceutically acceptable carrier; methods for treating diseases caused by the expression of an anti-apoptotic gene using the pharmaceutical composition; and methods for inhibiting the expression of an anti-apoptotic gene in a cell.
US07868159B2	Modulation of negative immune regulators and applications for immunotherapy The invention includes compositions and methods for enhancing immunopotency of an immune cell by way of inhibiting a negative immune regulator in the cell. The present invention provides vaccines and therapies in which antigen presentation is enhanced through inhibition of negative immune regulators. The present invention also provides a mechanism to break self tolerance in tumor vaccination methods that rely on presentation of self tumor antigens.
US07868156B2	Plant seed specific promoters The present invention relates to novel seed specific promoter regions. The present invention further provide methods of producing proteins and other products of interest and methods of controlling expression of nucleic acid sequences of interest using the seed specific promoter regions. The present invention also provides methods of identifying and isolating novel seed specific promoters.
US07868153B2	Cinnamic acid 4-hydroxylase After-cooking darkening is a gray-black discoloration of the potato tuber, formed after cooking by the oxidation of an iron-chlorogenic acid complex. Cinnamic acid 4-hydroxylase (C4H) is a key enzyme involved in the biosynthesis of chlorogenic acid. The full-length c4h gene was cloned and sequenced from both genomic DNA and cDNA of Russet Burbank tuber tissue by PCR and 5′ and 3′ RACE. The gene expression levels of c4h were examined by Northern hybridization, relative quantitative RT-PCR and real time quantitative RT-PCR in potato cultivars and wide selection of diploid clones varying in susceptibility to after-cooking darkening. Results suggest that there is a relationship between the levels of c4h gene expression and the degree of after-cooking darkening in potato tubers. The inhibition of C4H gene expression and over expression of C4H expression were also examined. The successful inhibition of the gene expression will lead to the reduced biosynthesis of chlorogenic acid, reducing the susceptibility of after-cooking darkening. The successful overexpression of the C4H gene will lead to the increase in the chlorogenic acid in plant tissues, gaining the resistance to diseases. In addition, due to the natural antioxidant activity of chlorogenic acid, overexpression of C4H gene will lead to its over production in plant tissues, such as potato tubers.
US07868147B2	Fluorescent probe A fluorescent probe which is represented by the following formula (I): (wherein, R1 represents a monovalent substituent other than hydrogen atom, carboxy group, or sulfo group; R2 represents hydrogen atom, or a monovalent substituent; R3 and R4 each independently represents hydrogen atom or a halogen atom; and R5 represents a monovalent group which is cleaved by contact with a measuring object, provided that a combination of R1 and R2 is selected so that the oxidation potential of the benzene ring to which they bind makes (1) the compound represented by the formula (I) substantially no fluorescent before the cleavage, and (2) a compound after the cleavage, which is derived from the compound represented by the formula (I), substantially highly fluorescent after the cleavage).
US07868146B2	Method and device for producing a thread from silk proteins The present invention relates to a thread preparation process from silk proteins including an apparatus which is appropriate for performing the method. Furthermore, the invention is directed to the threads obtained therewith as well as the use thereof. The invention uses a diffusion unit leading to the production of high-quality silk threads with high yield.
US07868145B2	Magnetic particles containing a copolymer core, magnetic layer and silicon layer A magnetic particle and fabrication method thereof. The magnetic particle comprises a polymer core, a magnetic material layer covering the polymer core, and a silicon containing layer covering the magnetic material layer. In addition, the magnetic particle may further comprise a coupling agent on the silicon containing layer, and an active molecule connected to the coupling agent. The magnetic particles provide controllable size, uniform diameter distribution, high magnetization, improved storage stability, and modified surface for targeting biomolecules for biomaterial separation and environmental analysis.
US07868144B2	Method for unspecific enrichment of bacterial cells The present invention relates to a method for unspecific enrichment of bacterial cells by means of cationic or anionic polymers and magnetic carriers.
US07868141B2	Anti-OX40L antibodies This invention relates to anti-OX40L antibodies and, in particular, to anti-OX40L antibodies and variants thereof that contain a Fc part derived from human origin and do not bind complement factor C1q. These antibodies have new and inventive properties causing a benefit for a patient suffering from inflammatory diseases.
US07868136B2	Search for cancer markers by a screening method The present invention relates to a method of concentrating low molecular weight peptides in the supernatant of serum-free cultured cells, said method comprising allowing the peptides to bind to a strong cation exchanger under an acid condition, and eluting them under an alkali condition to concentrate the peptide.Furthermore, peptides having the amino acid sequence as set forth in SEQ ID NO: 1 or 2, and a method of screening cancer markers using antibody to these peptides, are disclosed.
US07868134B2	Immunogenic peptides derived from sclerostin Compositions and methods relating to antibodies that specifically bind to TGF-beta binding proteins are provided. These methods and compositions relate to altering bone mineral density by interfering with the interaction between a TGF-beta binding protein sclerostin and a TGF-beta superfamily member, particularly a bone morphogenic protein. Increasing bone mineral density has uses in diseases and conditions in which low bone mineral density typifies the condition, such as osteopenia, osteoporosis, and bone fractures.
US07868132B2	Method for preparing multi-arm poly (ethylene glycol) amines A method for preparing multi-arm poly(ethylene glycol) (PEG) amines from multi-arm PEG polyols is described. The method comprises a two step process, wherein the multi-arm PEG polyol is first reacted with thionyl chloride to form a multi-arm PEG chloride, which is subsequently reacted with aqueous or anhydrous ammonia to yield the multi-arm PEG amine.
US07868130B2	Multi-level tubular reactor with vertically spaced segments A multi-level tubular reactor operable to facilitate a chemical reaction in a reaction medium flowing therethrough. The tubular reactor can include a plurality of horizontally elongated and vertically spaced reactor segments coupled to and extending outwardly from a common header. One or more of the reactor segments can contain a tray that divides the internal volume of the reactor segment into upper and lower chambers. The reaction medium can flow away from the header in the upper chambers and back to the header in the lower chambers.
US07868118B2	High refractive index flexible silicone The present invention discloses to a high refractive index polysiloxane (co)polymer comprising refractive index modifying groups chemically bonded in clustered configuration to the polysiloxane backbone. The invention also discloses methods for the preparation of such high refractive index polysiloxane (co)polymers A polysiloxane according to the invention is very suitable for use as a material for the production of intra-ocular lenses.
US07868114B1	Compositions comprising a farnesene interpolymer Provided herein are composition comprising a farnesene interpolymer. The farnesene interpolymer can be derived from a farnesene and at least one vinyl monomer. In some embodiments, the mole percent ratio of the farnesene to the at least one vinyl monomer is from about 1:4 to about 100:1. In certain embodiments, the farnesene is α-farnesene, β-farnesene or a combination thereof. In some embodiments, the at least one vinyl monomer is ethylene, an α-olefin such as styrene, or a substituted or unsubstituted vinyl halide, vinyl ether, acrylonitrile, acrylic ester, methacrylic ester, acrylamide or methacrylamide, or a combination thereof.
US07868113B2	Low shrinkage polyester thermosetting resins The invention is based on the discovery that a certain polyester compounds are useful as b-stageable adhesives for the microelectonic packaging industry. The polyester compounds described herein contain ring-opening or ring-forming polymerizable moieties and therefore exhibit little to no shrinkage upon cure. In addition, there are provided well-defined b-stageable adhesives useful in stacked die assemblies. In particular, there are provided assemblies wherein the b-stageable adhesive encapsulates a portion of the wiring members contained within the bondline gap between the stacked die.
US07868108B2	Transition metal compound, ligand system, catalyst system and process for preparing polyolefins The present invention relates to transition metal compounds of the formula (I), a process for preparing polyolefins by polymerization or copolymerization of at least one olefin in the presence of at least one olefin in the presence of at least one of the catalyst systems according to the invention and the use of the ligand systems according to the invention for preparing transition metal compounds.
US07868105B2	Polymerization methods using the catalysts Provided is a method of preparing a cyclic olefin polymer by addition polymerization of a cyclic olefin monomer, the method including contacting a metal catalyst complex represented by Formula 1 below with a cyclic olefin monomer represented by Formula 2 below: [M(L1)x(L′2)y(L3)z]a[Ani]b wherein M is a Group X metal; [M(L1)x(L′2)y(L3)z] is a cationic complex; L1 is an anionic hydrocarbyl-containing ligand; L′2 is a neutral ligand; L3 is an N-heterocyclic carbene ligand; [Ani] is an anion capable of weakly coordinating with the metal M; x is 1 or 2; y is 0 to 4; z is 1 or 2; 2≦x+y+z≦6; a and b are respectively the number of cations and the number of anions capable of weakly coordinating with the metal M and are each a number of 1-10 which is used to satisfy the net charge balance of the metal catalyst complex, and wherein for each of L1, L′2, and L3, when a plurality of ligands are present in a molecule of the metal catalyst complex, the ligands may be the same or different, and wherein m is an integer of 0 to 4; and R7, R′7, R″7, and R″′7 are each independently a polar functional group or a nonpolar functional group.According to the method of the present invention, a high molecular weight cyclic olefin addition polymer can be produced in a high yield even when using a polar functional group-containing cyclic olefin monomer. A polymer produced using the method shows good thermal stability.
US07868104B2	Crystallizable propylene copolymers A propylene copolymer is described comprising at least 70 mol % of units derived from propylene, up to 30 mol % of units derived from a combination of ethylene, at least one alpha-olefin having from 4 to 10 carbon atoms, such that the molar ratio of ethylene-derived units to said alpha-olefin-derived units in said combination is from about 1:9 to about 9:1, and from 0 to about 3 mol % of units derived from a copolymerizable diene. The copolymer has isotactically arranged propylene derived sequences, an overall heat of fusion as determined by differential scanning calorimetry (DSC) of less than 65 J/g, a second melting point as determined by DSC of less than 100° C., less than one 1,3 insertion error per 1000 carbon atoms and a weight average molecular weight as determined by gel permeation chromatography (GPC) of from about 100,000 to about 500,000.
US07868102B2	Method for producing a film of an aromatic amide oxadiazole polymer containing an oxadiazole structure and the film so produced A compound having an oxadiazole structure which is obtained by dehydration-cyclization of a compound having a carbohydrazide structure using a chemical agent selected from acids and bases. The dehydration-cyclization of the compound having a carbohydrazide structure can be conducted under mild conditions at low cost.
US07868101B2	Environmentally degradable polymeric compounds, their preparation and use as hot melt adhesive The invention is directed to a method for preparing an environmentally degradable polymeric compound as well as to such a compound per se and to its use. A compound of the present invention includes a polycondensated lactic acid containing polymer, having a molecular weight (Mw) of from 500 to 50,000 g/mol, to which a flexibilizing aliphatic polyester having a molecular weight of from 500 to 50,000 g/mol is coupled. The amount of lactic acid including groups in the polymeric compound ranges from 50 to 99% and the amount of flexibilizing polyester groups ranges from 1 to 50%.
US07868099B2	Dendrimers of rubbery polymers This invention discloses a process for synthesizing a dendrimer of a rubbery polymer comprising: (a) reacting a lithium terminated rubbery polymer with a halogenated tin containing compound to produce a polymer which is terminated with halogenated tin moieties, wherein the halogenated tin containing compound is of the structural formula: wherein X represents a halogen atom, wherein Z1 groups can be the same or different and are selected from alkyl groups containing from 1 to 8 carbon atoms, wherein x represents an integer from 1 to 20, wherein the molar ratio of the lithium terminated rubbery polymer to halogen atoms in the halogenated tin containing compound is within the range of 2:n to (n−1):n, wherein n represents the number of halogen atoms that are bonded directly to tin atoms in the halogenated tin containing compound; (b) reacting the polymer which is terminated with halogenated tin moieties with a molar excess of a tertiary alcohol to produce a polymer which is terminated with hydroxy tin moieties; and (c) allowing the polymer which is terminated with the hydroxy tin moieties to couple under conditions sufficient to produce a dendrimer of the rubbery polymer.
US07868098B2	Process for preparing (meth) acrylate-based ABA triblock copolymers The invention relates to a process for preparing (meth)acrylate-based ABA triblock copolymers with an olefinic functionalization of the A blocks.
US07868094B2	Adhesive composition A foamable crosslinkable composition particularly useful as a foamed adhesive or coating.
US07868093B2	Method for producing blends consisting of polystyrene and of a cross-linked polyvinyl pyrrolidone having a reduced styrene residual monomer content Process for removal of residual styrene monomers from polystyrene and from blends comprising water-insoluble, crosslinked polyvinylpyrrolidone, via treatment with water, which comprises carrying out the treatment on a particulate solid blend.
US07868092B2	Bimodal polyethylene compositions for blow molding applications A bimodal polyethylene composition that includes ethylene-derived units, and, optionally, one or more other olefin-derived units, wherein the bimodal polyethylene composition possesses a density of at least 0.940 g/cc, an average molecular weight (Mw) of from 200,000 to 370,000, a z-average molecular weight (Mz) of from 1,500,000 to 3,400,000 Daltons, and a z+1 average molecular weight (Mz+1) of from 2,500,000 to 6,800,000 Daltons, is provided in various embodiments. Articles made therefrom and methods of making the same are also provided.
US07868090B2	Polyester molding compositions A polyester composition comprising (a) a polyester derived from a diol and a diacid, (b) a fluoropolymer and (c) a carboxy reactive compound, where the polyester composition has a highly useful combination of (i) mechanical properties and (ii) melt strength is disclosed. Also disclosed is a process to prepare these compositions and articles therefrom.
US07868089B2	Thermoplastic polymer composition The invention provides a thermoplastic polymer composition which has both excellent heat resistance and chemical resistance, and also has flexibility and excellent processability. The present invention is a thermoplastic polymer composition comprising a fluororesin (A) and non-fluorine-containing cured rubber (B), wherein the fluororesin (A) comprises a fluorine-containing ethylenic polymer (a), and the non-fluorine-containing cured rubber (B) is at least one kind of rubber (b) which is at least partially crosslinked.
US07868088B2	Methods for modulated degenerative transfer living polymerization and isotactic-atactic stereoblock and stereogradient poly(olefins) thereby Methods for modulated degenerative transfer living polymerization and isotactic-atactic stereoblock and stereogradient poly(olefins) thereby Abstract A method of producing a multiblock, stereoblock polyolefin having substantially uniform microstructure is disclosed. The method includes contacting a Ziegler-Natta pre-catalyst with a co-catalyst and an olefin to polymerize the olefin and form a first stereoblock, adding a methyl donator that changes the stereoregularity of the polymerization, and polymerizing the olefin to form a second stereoblock. The methods of the present invention allow for the production of poly(olefin)s having predictable degrees of incorporation of stereoerrors of a known type. The methods allows for the production of a variety of poly(olefin) microstructures, ranging from stereoblock to stereogradient poly(olefin)s and poly(olefin)s having fully isotactic to fully atactic microstructures.
US07868087B2	Graft copolymers, methods for grafting hydrophilic chains onto hydrophobic polymers, and articles thereof The present invention relates to synthetic methods for grafting hydrophilic chains onto polymers, particularly hydrophobic polymers such as poly(vinyl chloride) (PVC), poly(vinylidene fluoride) (PVDF), and chlorinated polypropylene (cPP). Resulting polymers include comb polymers which can have a microphase-separated structure of hydrophilic domains provided by the hydrophilic chains. Articles prepared from these comb polymers, particularly derived from PVDF, include membranes for water filtration in which the hydrophilic domains provide a pathway for water transport. PVC can be plasticized by grafting the PVC with hydrophilic chains. In addition, such articles, particularly articles having biomedical applications, can display anti-thrombogenic properties.
US07868086B2	Arylene fluorinated sulfonimide polymers and membranes Aromatic sulfonimide ionene polymers useful as membranes in electrochemical cells are prepared.
US07868083B2	Aerogel/PTFE composite insulating material A material comprising aerogel particles and a polytetrafluoroethylene (PTFE) binder is formed having a thermal conductivity of less than or equal to 25 mW/m K at atmospheric conditions. The material is moldable or formable, having little or no shedding of filler particles, and may be formed into structures such as tapes or composites, for example, by bonding the material between two outer layers. Advantageously, composites may be flexed, stretched, or bent without significant dusting or loss of insulating properties.
US07868081B2	Rubber composition and tire using same This invention relates to a rubber composition having excellent workability, fracture characteristics and wear resistance and a low heat buildup and a high storage modulus (G′), and more particularly to a rubber composition comprising not less than 20 parts by mass of a reinforcing filler (B) and 5 to 60 parts by mass of a low-molecular weight aromatic vinyl compound-conjugated diene compound copolymer (C) having an aromatic vinyl compound content of 5 to 80% by mass, a vinyl bond content in a conjugated diene compound portion of 10 to 80% by mass and a weight average molecular weight as measured with a gel permeation chromatography and converted to polystyrene of 5,000 to 300,000 based on 100 parts by mass of a rubber component (A) containing not less than 10% by mass of a modified conjugated diene-based polymer having at least one functional group.
US07868069B2	Dispersed composition and process for producing shaped article using the same A shaped article (e.g., a porous material, and a spherical particle) comprising (A) a resin component is produced by kneading the resin component (A) (e.g., a thermoplastic resin) and a water-soluble auxiliary component (B) to prepare a dispersed composition, and eluting the auxiliary component (B) from the dispersed composition. The auxiliary component (B) may comprise 100 parts by weight of an oligosaccharide (B1) and 0.5 to 100 parts by weight of a water-soluble plasticizing component (B2) for plasticizing the oligosaccharide. The oligosaccharide (B1) may comprise a tetrasaccharide. The plasticizing component (B2) may comprise a saccharide or a sugar alcohol. Use of the dispersed composition ensures to form a shaped article having a given shape industrially with advantage even in the case of using a wide variety of resin components.
US07868067B2	Composition of epoxy resin, aliphatic amine curing agent and halogenated amine One aspect of the current invention is a halogen containing epoxy composition and a method of producing the same. A functional halogen group, fluorine in one case, is incorporated into an epoxy coating by using a functionalized amine curing agent in small amounts. Functionalized amine curing agents are cheaper and easier to produce from small amine precursors when compared to the cost and complexity of functionalizing bulky epoxy resins. Amine curing agents are incorporated into a cured epoxy network. However, many functional groups will affect the reactivity of the curing reaction due to electronegativity effects. By using small amounts of functionalized amines with a large amount of non-functionalized agent, the effect is small and in the case of migration, it can be advantageous for tribological, mechanical and other properties of epoxies and epoxy-containing materials. Additionally, in stratified coatings, it is advantageous to use smaller functionalized amine molecules that can migrate more quickly into the composition before the composition becomes fully cured.
US07868065B2	Production process of colored resin powder A production process of colored resin powder, comprising a coloring step of mixing 0.5 to 40% by mass of a colorant (b1) with 99.5 to 60% by mass of a non-phthalic acid plasticizer (b2) to prepare a colored paste (B) and adding and mixing the colored paste (B) into a powdery thermoplastic polyurethane-urea resin (A), wherein the amounts of the colorant (b1) and the plasticizer (b2) contained in the colored paste (B) added to the powdery thermoplastic polyurethane-urea resin (A) are 0.1 to 5 parts by mass and 1 to 20 parts by mass, respectively, per 100 parts by mass of the thermoplastic polyurethane-urea resin. According to the production process, there can be provided colored resin powder, which is free from color mottling (color unevenness) on its surface and does not cause smearing of a molded product due to separation and falling of the colorant upon a molding process or the like.
US07868060B2	Aqueous ink, ink jet recording method, ink cartridge, recording unit, ink jet recording apparatus, and image Provided is an aqueous ink with high storage stability and scratch resistance at such a high level that the coloring material of an image is not scraped off even when lightly touched with a sharp product. The aqueous ink includes a water-insoluble coloring material and plural polymers. The plural polymers include a polymer A which relatively contributes to dispersion of the water-insoluble coloring material and a polymer B which does not relatively contribute to the dispersion of the water-insoluble coloring material compared to the polymer A. The polymer A includes a block copolymer having an acid value of 120 mgKOH/g to 180 mgKOH/g and having an ethylene oxide group as a nonionic group. The polymer B has an acid value of 150 mgKOH/g or less and a hydrogen bond parameter (δh) of the polymer obtained by solubility parameters of monomers constituting the polymer of 1.0 cal0.5/cm1.5 or more and 3.2 cal0.5/cm1.5 or less.
US07868050B2	Sulfonated aryl sulfonate matrices and method of production Porous matrices and membrane matrices comprising sulfonated aryl sulfonate polymers are prepared from a sulfonated aryl sulfonate polymer solution which is made by dissolving an aryl sulfonate polymer, and optionally a polymer other than aryl sulfonate, in a sulfonating acid solvent such as sulfuric acid. The solutions are then cast as wet films from which the matrices are coagulated. By controlling composition and process parameters, hydrophilic matrices of varying morphology are produced.
US07868049B2	Organic/inorganic hybrid material and method for manufacturing the same The invention provides an organic/inorganic hybrid material and the method for manufacturing the same. A variety of functional monomers are co-polymerized to form a copolymer. The copolymer is subjected to sol-gel reactions with metal alkoxide oligomers to form an organic/inorganic hybrid material. The hybrid material has a high refractive index, a low moisture absorption, a high light transmission ratio, and a high glass transition point, such that the material can be applied in high light extraction efficient LED sealing materials, thin and light myopia/hypropia lens, portable projector lens, high brightness LCD prism films, solar cell refractive photoelectric conversion mirrors, and camera phone/digital camera lens.
US07868045B2	Method for promoting gastrointestinal bicarbonate secretion Provided is a method for promoting bicarbonate secretion in the stomach or duodenum in a mammalian subject, which comprises administering an effective amount of a compound of Formula (I): to a subject in need thereof, wherein A, Y, W1, W2, X1, X2 R1 and R2 are herein defined. The compound are also useful for protecting the gastrointestinal tract of a mammal from mucosal damage.
US07868044B2	Method for the treatment of acne using compositions comprising 0.3% by weight of 6-[3-(1-adamantyl)-4-methoxyphenyl]-2-naphthoic acid Dermatological disorders having an inflammatory or proliferative component, notably common acne, are treated with topically applicable pharmaceutical compositions containing about 0.3% by weight of 6-[3-(1-adamantyl)-4-methoxyphenyl]-2-naphthanoic acid (adapalene) or salt thereof, formulated into pharmaceutically acceptable media therefor, advantageously formulated into topically applicable gels, preferably aqueous gels, creams, lotions or solutions.
US07868042B2	Renal function improvement This invention relates to a method of improving renal function comprising administering to a subject in need thereof a composition comprising the inventive compounds. Also disclosed is a method of improving renal function where the subject is at risk of or suffering from renal failure.
US07868035B2	Therapeutic esters A compound comprising or a pharmaceutically acceptable salt or a prodrug thereof; wherein X and Y are described herein.
US07868033B2	Compounds, compositions and methods for stabilizing transthyretin and inhibiting transthyretin misfolding Compounds, compositions and methods are provided for stabilizing transthyretin and for treating, preventing, or ameliorating one or more symptoms of transthyretin mediated diseases. In one embodiment, the compounds are benzoxazoles and related compounds.
US07868027B2	Process for the preparation of certain substituted sulfilimines Cyano-substituted sulfilimines are produced efficiently and in high yield from the corresponding sulfides by reaction with cyanamide and hypochlorite.
US07868021B2	Antimicrobial quinolones, their compositions and uses Compounds having the general structure: which are effective antimicrobial agents.
US07868015B2	Phosphodiesesterase 4 inhibitors for the treatment of a cognitive deficit The present invention provides methods of treating cognitive deficits associated with mental retardation. The methods comprise combining cognitive training protocols and a general administration of phosphodiesterase 4 inhibitors.
US07868006B2	Heterocyclic substituted piperazines with CXCR3 antagonist activity The present application discloses a compound, or enantiomers, stereoisomers, rotamers, tautomers, racemates or prodrug of said compound, or pharmaceutically acceptable salts, solvates or esters of said compound, or of said prodrug, said compound having the general structure shown in Formula 1: or a pharmaceutically acceptable salt, solvate or ester thereof, wherein the various moieties are defined herein. Also disclosed is a method of treating chemokine mediated diseases, such as, palliative therapy, curative therapy, prophylactic therapy of certain diseases and conditions such as inflammatory diseases (non-limiting example(s) include, psoriasis), autoimmune diseases (non-limiting example(s) include, rheumatoid arthritis, multiple sclerosis), graft rejection (non-limiting example(s) include, allograft rejection, xenograft rejection), infectious diseases (e.g, tuberculoid leprosy), fixed drug eruptions, cutaneous delayed-type hypersensitivity responses, ophthalmic inflammation, type I diabetes, viral meningitis and tumors using a compound of Formula 1.
US07868004B2	Menthane carboxamide derivatives having cooling properties A compound of the formula I in which X and Y are selected as follows: (i) X is H and Y is selected from the group consisting of (ii) X and Y together form a bivalent radical selected from the group consisting of —O—CH2—O—, —N═CH—O— and —N═CH—S— thus forming together with the carbon atoms to which the radical is attached a 5-membered ring. The compounds have cooling properties and are useful in, for example, foodstuffs, dentifrices and cosmetics.
US07868001B2	Cytokine inhibitors A compound of Formula I: Each variable is defined in the specification. This invention relates to a method of decreasing a level of a cytokine (e.g., TNFα or interlukine such as IL-1β) in a subject with a compound of Formula I. It also relates to a method of treating a disorder mediated by an overproduction of a cytokine with such a compound.
US07867997B2	δ-crystalline form of ivabradine hydrochloride, a process for its preparation and pharmaceutical compositions containing it A δ-crystalline form of ivabradine hydrochloride of formula (I): characterised by its powder X-ray diffraction data. Medicinal products containing the same which are useful as bradycardics.
US07867995B2	βd-crystalline form of ivabradine hydrochloride, a process for its preparation and pharmaceutical compositions containing it A βd-Crystalline form of ivabradine hydrochloride of formula (I): characterised by its powder X-ray diffraction data. Medicinal products containing the same which are useful as bradycardics.
US07867985B2	Biological lubricant composition and method of applying lubricant composition Fluid compositions and methods for lubrication of mammalian joints are disclosed, including both natural and artificial fluids. Synovial fluid acts to lubricate the bearing surfaces of bones and bone-like structures which are held in frictional contact within biological joints. Such fluids may be used to treat arthritic, injured, and diseased joints. Synovial fluid containing a dextran-based hydrogel with lipids provides enhanced rheological and tribological properties of such a fluid. Phospholipids are particularly useful in dextran-based compositions for synovial fluid. One phospholipid that can be used advantageously in synovial fluid is dipalmitoyl phosphatidylcholine (DPPC).
US07867981B2	Compositions comprising highly purified amphotericin B A method for treating fungal infections in a mammal that includes administering a therapeutically effective amount of a composition comprising substantially pure amphotericin B and a pharmaceutically acceptable carrier. Amphotericin BHP is associated with decreased toxicity in mammals and cells measured by cell viability and expression of cytokine markers. Thus, this method allows for reduced adverse reactions when using amphotericin B products.
US07867980B2	Lincosamide derivatives and antimicrobial agents comprising the same as active ingredient An objective of the present invention is to provide compounds of formula (I) or their pharmacologically acceptable salts or solvates wherein A represents aryl while R1 represents a five- or six-membered monocyclic heterocyclic group, or A represents a four- to six-membered monocyclic heterocyclic group while R1 represents aryl or a five- or six-membered monocyclic heterocyclic group; R2 represents a hydrogen atom or C1-6 alkyl; R3 represents C1-6 alkyl or C3-6 cycloalkyl-C1-4 alkyl; R4, R5, and R6 represent a hydrogen atom; R7 represents C1-6 alkyl; and m is 1 to 3. The compounds are novel lincosamide derivatives that have a potent activity against resistant Streptococcus pneumoniae. Further, the compounds are usable as antimicrobial agents and are useful for preventing or treating bacterial infectious diseases.
US07867977B2	Immunogenic peptides and methods of use for treating and preventing cancer Disclosed are immunogenic peptides, related fusion proteins, nucleic acids encoding the peptides or fusion proteins, conjugates, expression vectors, host cells, and antibodies. Also, disclosed are pharmaceutical compositions, vaccines for use in the treatment or prevention of cancer, e.g., alveolar rhabodomyosarcoma, methods of stimulating a T cell to kill a tumor cell, methods of stimulating CD4+ and CD8+ T cells, and methods of treating or preventing cancer are further provided herein.
US07867976B2	Nogo epitopic fragments for modulating immune response Epitopic fragments of Nogo, including Nogo 45-66, elicit a specific and strong T cell response, and a B cell response. T cells reactive to Nogo antigens are capable of ameliorating ongoing disease, which may be induced with other antigens. The present invention provides compositions and methods for the identification and use of Nogo epitopic fragments in the treatment of immune related disease.
US07867972B2	Fusion protein of exendin-4 to a transferrin (Tf) polypeptide The invention provides fusion proteins comprising an exendin-4 fused to a transferrin (Tf) via a polypeptide linker, as well as corresponding nucleic acid molecules, vectors, host cells, and pharmaceutical compositions. The invention also provides the use of the exendin-4/Tf fusion proteins for treatment of Type II diabetes, obesity, and to reduce body weight.
US07867970B2	Detergent composition comprising lauric soap The laundry detergent composition of the invention contains a combination of a soap, an anionic surfactant, a nonionic surfactant, optionally a builder system, and optionally other detergent ingredients. The surfactant system comprises from 5 to 85 wt % in which the amount of soap is from 20 to 50 wt %, the amount of anionic is from 10 to 65 wt %, and the amount of nonionic is from 15 to 70 wt %, and wherein from 75 wt % to 100 wt % of the soap is present in the form of a granule which is dry-mixed with the other components, and the soap granule has a concentration of soap of at least 75 wt % based on the weight of the granule.
US07867969B2	Composition for washing keratin materials comprising a magnesium salt anionic surfactant Disclosed herein is a composition for washing keratin materials, comprising, in an aqueous medium: (a) at least one first anionic surfactant in the form of a magnesium salt, (b) at least one second anionic surfactant different from the first, (c) at least one amphoteric or zwitterionic surfactant, (d) at least one oxyethylenated sorbitan ester, and (e) at least one polymer chosen from cationic polymers and amphoteric or zwitterionic polymers. Also disclosed herein is a cosmetic treatment process comprising applying such a composition to the hair.
US07867964B2	Shaped toilet bars Intricately shaped toilet bars with specific compositions and plasticity properties can be advantageously manufactured via three dimensional cutting. Such cut bars are characterized by specific surface profiles and topographic features. Intricately shaped toilet bars with a wide range of formulations for enhanced skin treatment can be thus economically and reliably manufactured.
US07867963B2	Mono-, di- and polyol phosphate esters in personal care formulations A hydrophilized personal care formulation, which can be in the form of a hand or body soap (liquid or bar), lipstick, body wash, makeup remover, skin cleaner, hair conditioner, skin or hair moisturizer. The formulation employs an organophosphorus material or a mixture of an organophosphorus material, for example, mono-, di-, and polyol phosphate esters.
US07867961B2	Wash composition To provide a wash composition comprising an N-long-chain-acyl amino acid and/or its salt, especially an N-long-chain-acyl neutral amino acid and/or its salt and hydroxypropyl starch phosphate and excellent in foam properties, washing power and feeling upon use, and to provide cosmetics containing the same. A wash composition comprises (A) an N-long-chain-acyl amino acid and/or its salt, especially an N-long-chain-acyl neutral amino acid and/or its salt and (B) hydroxypropyl starch phosphate. Further, it comprises (C) a fatty acid to improve foaming speed, and (D) an acyl acidic amino acid ester to improve moist feeling after drying.
US07867960B2	Method for forming tetraoxy-silane derived antiwear films and lubricating oil compositions therefrom Disclosed is a method for forming an antiwear film on an internal engine component comprising: contacting a surface of an internal wearing component of the engine with a tetra-functional hydrolyzable silane compound of the general formula Si—X4 or hydrolysis product thereof, wherein X is independently selected from the group consisting of hydroxyl, alkoxy, aryloxy, acyloxy, amino, monoalkyl amino and dialkyl amino; and hydrolyzing and condensing the tetra-functional silane to thereby form a film. Also disclosed are mixed silane films and the products produced by these methods.
US07867959B2	Synthesis of diester-based biolubricants from epoxides The present invention is generally directed to methods of making diester-based lubricant compositions, wherein formation of diester species proceeds via direct esterification of epoxide intermediates. In some embodiments, the methods for making such diester-based lubricants utilize a biomass precursor and/or low value (e.g., Fischer-Tropsch (FT) olefins and/or alcohols) so as to produce high value diester-based lubricants. In some embodiments, such diester-based lubricants are derived from FT olefins and tatty acids. The fatty acids can be from a bio-based source (i.e., biomass, renewable source) or can be derived from FT alcohols via oxidation.
US07867955B2	Lubricating oil composition A method of reducing the occurrence of ring-sticking in an internal combustion engine in which the crankcase of such an engine is lubricated with a multigrade crankcase lubricating oil composition containing 1 to 15 mass %, based on the mass of the oil composition, of a non-hydrogenated olefin polymer having a number average molecular weight in the range of 100 to 5,000.
US07867953B2	Methods of using drilling fluids containing biodegradable organophilic clay Methods of treating a wellbore comprise displacing a drilling fluid comprising an organophilic clay treated with a quaternary ammonium surfactant having an amide linkage into the wellbore. Methods of drilling a wellbore comprise: applying torque to a bit within the wellbore and concurrently applying force to urge the bit to extend through the wellbore; and circulating a drilling fluid past the bit to remove cuttings therefrom, the drilling fluid comprising an organophilic clay treated with a quaternary ammonium surfactant having an amide linkage. Methods of preparing a drilling fluid comprise: forming an organophilic clay treated with a quaternary ammonium surfactant having an amide linkage; and combining the organophilic clay with an oil-based fluid.
US07867945B2	Heat-sensitive transfer image-receiving sheet A heat-sensitive transfer image-receiving sheet having a support, at least one receptor layer containing a polymer latex, and at least one heat insulation layer containing hollow polymer particles which layer is provided between the support and the receptor layer, wherein the support has a base paper and a resin layer other than a polypropylene layer that is provided at least on the side of the base paper to which the receptor layer is provided; and a heat-sensitive transfer image-receiving sheet having a support, at least one receptor layer containing a polymer latex, and at least one heat insulation layer containing hollow polymer particles which layer is provided between the support and the receptor layer, wherein the support has a base paper and a resin layer which is provided without using an adhesive at least on the side of the base paper to which the receptor layer is provided.
US07867944B2	Catalyst supporting honeycomb and method of manufacturing the same A catalyst supporting honeycomb includes a pillar-shaped honeycomb structure and catalyst particles supported on the honeycomb structure. The honeycomb structure includes cell walls extending in a longitudinal direction of the honeycomb structure to define a plurality of cells extending in the longitudinal direction. The plurality of cells include large-volume cells having first opening ends and second closing ends opposite to the first opening ends along the longitudinal direction, and small-volume cells having first closed ends and second opening ends opposite to the first closed ends along the longitudinal direction. Total cross sectional areas of the large-volume cells on a plane perpendicular to the longitudinal direction are larger than total cross sectional areas of the small-volume cells on the plane. The catalyst particles include an oxide catalyst having an average particle diameter of at least about 0.05 μm and at most about 1.00 μm.
US07867943B2	Exhaust gas purifying catalyst, and method for producing the same An exhaust gas purifying catalyst which is made excellent in heat resistance and in S-resistance by keeping the catalytic activity of Pt particles in a satisfactory state. The exhaust gas purifying catalyst is made such that a coating layer containing a compound oxide of cerium and an oxide of a metal for stabilizing the oxide of said cerium and an oxide containing no cerium is formed on a substrate, and such that platinum particles are carried on the catalyst. Said compound oxide has a pore volume of 0.1 cc/g or more, and said platinum particles are selectively adsorbed at the electron accepting points on said compound oxide.
US07867942B2	Highly dispersed carbon supported metal catalyst and method for manufacturing the same The invention provides a method for manufacturing a highly dispersed carbon supported metal catalyst, including charging a carbon support and a dispersing agent in water. The carbon support is evenly dispersed in water with an average diameter of 10 nm to 2000 nm and a specific surface area of 50 m2/g to 1500 m2/g. A metal salt of Pd, Pt, or combinations thereof is formed on the carbon support surface and then reduced to a valance state less than (IV).
US07867939B2	Catalyst for ethylene polymerization, preparation thereof, and method for controlling the polymerization kinetic behavior of said catalyst The present invention relates to a catalyst for polymerization of ethylene, a process for preparing the same, and a method for controlling kinetic behavior of said catalyst in ethylene polymerization. Said catalyst contains a titanium-containing main catalyst component and a co-catalyst. The titanium-containing main catalyst component is prepared by reacting the following components: (1) a hydrocarbon solution of dialkylmagnesium compound of formula RMgR′.yEt3Al; (2) an alcohol compound of formula R1OH; (3) a silica support thermally activated at 200-800° C.; (4) an alkylaluminum compound of formula R2nAlCl3-n; (5) a linear halogenated alkane of formula R3X; and (6) a titanium compound of formula Ti(OR4)mCl4-m. The co-catalyst is an organoaluminum compound. Three different types of ethylene polymerization kinetic curves can be obtained by adjusting the temperature for thermally activating the silica support and the ratio of titanium to magnesium in the titanium-containing main catalyst component.
US07867938B2	Catalytic oligomerization of olefinic monomers A catalyst precursor composition comprising: a source of chromium, molybdenum or tungsten; a first ligand having the general formula (R1)(R2P—X—P(R3)(R4); and a second ligand having the general formula (R1′)(R2′)P—X′—P(R3′)(R4′). The present invention also relates to a catalyst system comprising the catalyst precursor composition of the present invention and a cocatalyst. The present invention further relates to a process for the trimerization and tetramerization of olefinic monomers, particularly the trimerization and tetramerization of ethylene to 1-hexene and 1-octene, wherein the process comprises contacting at least one olefinic monomer with the catalyst system of the present invention.
US07867937B2	Drying device for producing small quantities of controlled particle size catalysts which are appropriate for use in fluidized bed operations such as fluid catalytic cracking Catalysts for experimentation are produced having a controlled matrix pore structure. The manufacturing process utilizes tape casting in the drying procedure in which a catalyst slurry is cast on a substrate and dried at a temperature of between about 50° C. to 200° C. for a period of time of about 0.1 to 1.0 hour. The dried catalyst particles can be removed from the substrate by several techniques, including scraping, burning, and deforming the substrate material. The resulting catalytic particles can be produced in an amount of about ca. 3 g to 300 g from slurries with volumes between 5 cc to 500 cc, which are suitable for small scale FCC reactors and for high throughput experimentation.
US07867932B2	Refractory glass ceramics A formation of internally nucleated glass ceramics articles that can be heated in the 1350-1450° C. range for extended periods of time without significant deformation or change in shape is disclosed. The predominant crystal phase of these glass ceramics is celsian (BaAl2Si2O8) or its strontium equivalent (SrAl2Si2O8), or solid solutions or mixtures of these compositions, all belonging to the feldspar mineral group.
US07867925B2	Method for manufacturing pattern formed structure The main object of the present invention is to provide a method for manufacturing efficiently a pattern formed structure which has a surface having a property-varied pattern and can be used to manufacture a color filter or the like. In order to achieve the object, the present invention provides a method for manufacturing a pattern formed structure, comprising: a patterning substrate preparing process of preparing a patterning substrate having a base material and a property variable layer which is formed on the base material and has a property variable by action of a photocatalyst based on irradiation with energy; and an energy radiating process of arranging a photocatalyst containing layer side substrate having a base body and a photocatalyst containing layer comprising at least the photocatalyst, and the patterning substrate so as to keep a given interval between the photocatalyst containing layer and the property variable layer, and then radiating energy onto the resultant at an intensity of 0.1 to 10 mW/cm2, thereby forming a property variable pattern in which the property of the property variable layer is varied.
US07867923B2	High quality silicon oxide films by remote plasma CVD from disilane precursors A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.
US07867921B2	Reduction of etch-rate drift in HDP processes A processing chamber is seasoned by providing a flow of season precursors to the processing chamber. A high-density plasma is formed from the season precursors by applying at least 7500 W of source power distributed with greater than 70% of the source power at a top of the processing chamber. A season layer having a thickness of at least 5000 Å is deposited at one point using the high-density plasma. Each of multiple substrates is transferred sequentially into the processing chamber to perform a process that includes etching. The processing chamber is cleaned between sequential transfers of the substrates.
US07867918B1	Semiconductor topography including a thin oxide-nitride stack and method for making the same A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon dioxide layer. In addition, a method is provided which includes growing an oxide film upon a semiconductor topography in the presence of an ozonated substance and depositing a silicon nitride film upon the oxide film. In some embodiments, the method may include growing the oxide film in a first chamber at a first temperature and transferring the semiconductor topography from the first chamber to a second chamber while the semiconductor topography is exposed to a substantially similar temperature as the first temperature. In either embodiment, the method may be used to form a semiconductor device including an oxide-nitride gate dielectric having an electrical equivalent oxide gate dieletric thickness of less than approximately 20 angstroms.
US07867912B2	Methods of manufacturing semiconductor structures A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.
US07867911B2	Method for forming pattern using hard mask A method for forming a pattern in a semiconductor device includes forming an etch target layer, forming a hard mask over the etch target layer, the hard mask including a multiple-layer stack structure comprising a bottom layer, a transformed layer, and an upper layer, wherein the transformed layer is formed by transforming a surface of the bottom layer. The hard mask and the etch target layer are etched.
US07867910B2	Method of accessing semiconductor circuits from the backside using ion-beam and gas-etch The invention generally relates to semiconductor device processing, and more particularly to methods of accessing semiconductor circuits from the backside using ion-beam and gas-etch to mill deep vias through full-thickness silicon. A method includes creating a pocket in a material to be etched, and performing an isotropic etch of the material by flowing a reactive gas into the pocket and directing a focused ion beam into the pocket.
US07867908B2	Method of fabricating substrate A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.
US07867907B2	Method for manufacturing semiconductor device The present invention provides a method by which a thin film process can be conducted simply and accurately without using resist. Further, the present invention provides a method of manufacturing semiconductor devices at low cost. A first layer is formed over a substrate, a peeling layer is formed over the first layer, the peeling layer is selectively irradiated with a laser beam from the peeling layer side to reduce adhesiveness of a part of the peeling layer. Next, the peeling layer in the part with reduced adhesiveness is removed, and the left portion of the peeling layer is used as a mask to selectively etch the first layer.
US07867905B2	System and method for semiconductor processing Systems and methods are disclosed to perform semiconductor processing with a process chamber; a flash lamp adapted to be repetitively triggered; and a controller coupled to the control input of the flash lamp to trigger the flash lamp. The system can deploy a solid state plasma source in parallel with the flash lamp in wafer processing.
US07867904B2	Method and system for isolated and discretized process sequence integration A system for processing a semiconductor substrate is provided. The system includes a mainframe having a plurality of modules attached thereto. The modules include processing modules, storage modules, and transport mechanisms. The processing modules may include combinatorial processing modules and conventional processing modules, such as surface preparation, thermal treatment, etch and deposition modules. In one embodiment, at least one of the modules stores multiple masks. The multiple masks enable in-situ variation of spatial location and geometry across a sequence of processes and/or multiple layers of a substrate to be processed in another one of the modules. A method for processing a substrate is also provided.
US07867901B2	Method for forming silicide in semiconductor device A method for forming silicide in a semiconductor device includes simultaneously performing a cleaning process and an etching process to remove a silicide metal layer if an excessive delay in time lapses after forming the silicide metal layer. This may prevent the occurrence of liquid marks due to an oxidation reaction at an interface of the semiconductor substrate in contact with the silicide metal layer, thereby preventing silicide defects due to the excessive delay.
US07867897B2	Low leakage metal-containing cap process using oxidation An interconnect structure which includes a metal-containing cap located atop each conductive feature that is present within a dielectric material is provided in which a surface region of the metal-containing cap is oxidized prior to the subsequent deposition of any other dielectric material thereon. Moreover, metal particles that are located on the surface of the dielectric material between the conductive features are also oxidized at the same time as the surface region of the metal-containing cap. This provides a structure having a reduced leakage current. In accordance with the present invention, the oxidation step is performed after electroless plating of the metal-containing cap and prior to the deposition of a dielectric capping layer or an overlying interlayer or intralevel dielectric material.
US07867895B2	Method of fabricating improved interconnect structure with a via gouging feature absent profile damage to the interconnect dielectric An interconnect structure including a gouging feature at the bottom of the via openings and a method of forming the same, which does not introduce either damages caused by Ar sputtering into the dielectric material that includes the via and line openings, nor plating voids into the structure are provided. The method includes the uses of at least one infusion process that forms an infused surface region within a conductive material of a lower interconnect level. The infused surface region has a different etch rate as compared with the conductive material and thus in a subsequent etching process, the infused surface region can be selectively removed forming a gouging feature within the structure.
US07867889B2	Method of forming an interconnect structure on an integrated circuit die A method of forming an interconnect structure, comprising forming a first interconnect layer (123) embedded in a first dielectric layer (118), forming a dielectric tantalum nitride barrier (150) by means of atomic layer deposition on the surface of the first interconnect (123), depositing a second dielectric layer (134) over the first interconnect (123) and the barrier (150) and etching a via (154) in the dielectric layer (134) to the barrier (150). The barrier (150) is then exposed to a treatment through the via (154) to change it from the dielectric phase to the conductive phase (180) and the via (154) is subsequently filled with conductive material (123).
US07867886B2	Method of enclosing a micro-electromechanical element A method, in a complementary metal oxide semiconductor fabrication process, of creating a layered housing containing a micro-electromechanical system device, the method comprising the steps of providing a cavity in at least one layer of the housing, the cavity being accessible through via holes in a layer of insulating material deposited thereon, and the layer of insulating material being covered by a thin film layer of conductive material. The method further comprises the step of hydrophobically treating at least a portion of the inner surface of the cavity. Finally the method comprises the steps of submerging the wafer in an electroplating solution and electroplating a conductive layer onto the thin film layer of conductive material such that the cavity remains free of electroplating solution.
US07867884B2	Sample wafer fabrication method A wafer fabrication method includes a first step of forming a plurality of first channel regions in a first region on a surface of a water, a second step of forming a plurality of second channel regions having an impurity concentration different from an impurity concentration of the first channel regions, a third step of forming a plurality of third channel regions in a third region on the surface of the water, and a fourth step of forming a plurality of fourth channel regions having an impurity concentration different from an impurity concentration of the third channel regions in a fourth region, wherein the first region and the second region are divided by a first line segment on the wafer, and the third and fourth regions are divided by a second line segment intersecting with the first line segment on the wafer.
US07867882B2	Method of manufacturing silicon carbide semiconductor device A method of manufacturing an SiC semiconductor device includes the steps of ion implanting a dopant at least in a part of a surface of an SiC single crystal, forming an Si film on the surface of the ion-implanted SiC single crystal, and heating the SiC single crystal on which the Si film is formed to a temperature not less than a melting temperature of the Si film.
US07867881B2	Method of manufacturing nitride semiconductor substrate A method for manufacturing a nitride semiconductor substrate including the steps of: forming a nitride semiconductor layer on a sapphire substrate, and manufacturing a freestanding nitride semiconductor substrate by using the nitride semiconductor layer separated from the sapphire substrate, wherein variability of inclinations of the C-axes, being a difference between a maximum value and a minimum value of inclination of the C-axes in a radially-outward direction at each point on a front surface of the sapphire substrate is 0.3° or more and 1° or less.
US07867880B2	Metal precursors for low temperature deposition and methods of forming a metal thin layer and manufacturing a phase-change memory device using the metal precursors The present invention provides metal precursors for low temperature deposition. The metal precursors include a metal ring compound including at least one metal as one of a plurality of elements forming a ring. Methods of forming a metal thin layer and manufacturing a phase change memory device including use of the metal precursors is also provided.
US07867877B2	Method for manufacturing SOI wafer A method for manufacturing SOI wafers is provided which allows the obtaining of a thin SOI layer having uniform in-plane thickness. In this manufacturing method, an oxygen ion implanted layer is first formed on an active layer wafer. This is then laminated to a base wafer with a embedded oxide film interposed therebetween. The active layer wafer side of the laminated wafer is then ground to remove a portion thereof. The remaining surface side of the active layer wafer is removed by polishing or KOH etching to expose the oxygen ion implanted layer. Oxygen ions are implanted to a uniform depth within the plane of the oxygen ion implanted layer in this oxygen ion implanted layer. Subsequently, oxidizing treatment is carried out to form an oxide film on the exposed surface of the oxygen ion implanted layer. Moreover, this oxide film is removed together with the oxygen ion implanted layer by an HF solution. The remaining portion of the active layer wafer serves as a thin SOI layer.
US07867872B2	Method for manufacturing semiconductor device with uniform concentration ion doping in recess gate channel region A semiconductor device is manufactured by defining a groove in a semiconductor substrate, where the groove includes an upper portion and a lower portion, among other steps. A sacrificial layer is then formed to selectively fill the lower portion of the groove. Impurity ions are implanted into the semiconductor substrate while the lower portion of the groove is filled with the sacrificial layer. The sacrificial layer is then removed, and a gate is formed on the groove. In the method for manufacturing the semiconductor device, impurities can be doped at a uniform concentration in the channel area of the semiconductor device.
US07867871B1	System and method for increasing breakdown voltage of LOCOS isolated devices An efficient method is disclosed for increasing the breakdown voltage of an integrated circuit device that is isolated by a local oxidation of silicon (LOCOS) process. The method comprises forming a portion of a field oxide in an integrated circuit so that the field oxide has a gradual profile. The gradual profile of the field oxide reduces impact ionization in the field oxide by creating a reduced value of electric field for a given value of applied voltage. The reduction in impact ionization increases the breakdown voltage of the integrated circuit. The gradual profile is formed by using an increased thickness of pad oxide and a reduced thickness of silicon nitride during a field oxide oxidation process.
US07867869B2	Laminated thin-film device, manufacturing method thereof, and circuit The present invention provides a novel capacitor element, laminated thin-film device, and circuit wherein the capacitance dependency on voltage can be appropriately adjusted, and a technology for manufacturing such a capacitor element and laminated thin-film device. In the capacitor element that comprises a pair of electrode layers and a dielectric layer disposed between the electrode layers, a well region where an ion is implanted is disposed in the dielectric layer, and the C-V curve between the electrode layers is shifted or shifted and expanded in at least one direction of the plus direction and minus direction with respect to the voltage axis.
US07867868B2	Absorber layer candidates and techniques for application The present invention generally provides an absorber layer using carbon based materials with increased and stabled thermal absorption coefficient and economical methods to produce such an absorber layer. One embodiment of the present invention provides a method for processing a substrate comprising depositing an absorber layer on a top surface of the substrate, wherein the substrate is maintained under a first temperature, annealing the substrate in a thermal processing chamber, wherein the substrate is heated to a second temperature, and the second temperature is higher than the first temperature, and removing the absorber layer from the substrate.
US07867867B2	Methods of manufacturing semiconductor devices Methods of manufacturing a semiconductor device include forming an NMOS transistor on a semiconductor substrate, forming a first interlayer dielectric layer on the NMOS transistor, and dehydrogenating the first interlayer dielectric layer. Dehydrogenating the first interlayer dielectric layer may change a stress of the first interlayer dielectric layer. In particular, the first interlayer dielectric layer may have a tensile stress of 200 MPa or more after dehydrogenization. Semiconductor devices including dehydrogenated interlayer dielectric layers are also provided.
US07867862B2	Semiconductor structure including high voltage device A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath the gate stack, while a first diffusion region is located in the substrate on a first side of the gate stack. A first isolation structure in the substrate, located on the first side of the gate stack, separates the channel and the first diffusion region. The high voltage device also includes a first drift region in the substrate coupling the channel to the first diffusion region, wherein the first drift region comprises a non-uniform depth profile conforming to a profile of the first isolation structure.
US07867859B1	Gate electrode with depletion suppression and tunable workfunction Semiconductor device performance is improved via a gate structure having a tunable effective workfunction and reduced gate depletion effects. According to an example embodiment, the design threshold voltage of a semiconductor device is adjusted in a manner that includes providing a gate having a workfunction that enables operation of the semiconductor device at a selected voltage. The gate is formed having two different conductive materials with different electric workfunctions that both significantly contribute to the overall workfunction of the gate. The relative composition, thickness, and arrangement of each of the two conductive materials is selected to attain a gate electrode workfunction that is different than the workfunctions of each of the two layers and that sets the threshold voltage of the semiconductor device. The adjustability of the effective workfunction of the gate electrode can be applied to a variety of semiconductor devices. The ability to reduce gate depletion effects also provides enhanced device current drive.
US07867854B2	Method of fabricating power semiconductor device Wider and narrower trenches are formed in a substrate. A first gate material layer is deposited but not fully fills the wider trench. The first gate material layer in the wider trench and above the substrate original surface is removed by isotropic or anisotropic etching back. A first dopant layer is formed in the surface layer of the substrate at the original surface and the sidewall and bottom of the wider trench by tilt ion implantation. A second gate material layer is deposited to fully fill the trenches. The gate material layer above the original surface is removed by anisotropic etching back. A second dopant layer is formed in the surface layer of the substrate at the original surface by ion implantation. The dopants are driven-in to form a base in the substrate and a bottom-lightly-doped layer surrounding the bottom of the wider trench and adjacent to the base.
US07867850B2	Enhanced multi-bit non-volatile memory device with resonant tunnel barrier A non-volatile memory cell uses a resonant tunnel barrier that has an amorphous silicon and/or amorphous germanium layer between two layers of either HfSiON or LaAlO3. A charge trapping layer is formed over the tunnel barrier. A high-k charge blocking layer is formed over the charge trapping layer. A control gate is formed over the charge blocking layer. Another embodiment forms a floating gate over the tunnel barrier that is comprised of two oxide layers with an amorphous layer of silicon and/or germanium between the oxide layers.
US07867847B2	Method of manufacturing dielectric film that has hafnium-containing and aluminum-containing oxynitride The present invention provides a method of manufacturing a dielectric film having a high permittivity. An embodiment of the present invention is a method of manufacturing, on a substrate, a dielectric film including a metallic oxynitride containing an element A made of Hf or a mixture of Hf and Zr, an element B made of Al, and N and O. The manufacturing method includes: a step of forming a metallic oxynitride whose mole fractions of the element A, the element B, and N expressed as B/(A+B+N) has a range of 0.015≦(B/A+B+N))≦0.095 and N/(A+B+N) has a range of 0.045≦(N/(A+B+N)) and a mole fraction O/A of the element A and O has a range expressed as 1.0<(O/A)<2.0, and having a noncrystalline structure; and a step of performing an annealing treatment at 700° C. or higher on the metallic oxynitride having a noncrystalline structure to form a metallic oxynitride including a crystalline phase with a cubical crystal incorporation percentage of 80% or higher.
US07867845B2	Transistor gate forming methods and transistor structures A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.
US07867843B2	Gate structures for flash memory and methods of making same A process may include forming a polysilicon pinnacle above and on a polysilicon island and further forming a floating gate from the polysilicon pinnacle and polysilicon island. The floating gate can bear an inverted T-shape. The floating gate can also be disposed above an isolated semiconductive substrate such as in a shallow-trench isolation semiconductive substrate. Electronic devices may include the floating gate as part of a field effect transistor.
US07867842B2	Method and apparatus for forming planar alloy deposits on a substrate A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the first and second decals being arranged such that each of the first plurality of openings is in alignment with a corresponding one of the second plurality of openings; filling the first and second plurality of openings with molten alloy; cooling the molten alloy to thereby form at least first and second plugs, the first plug having a first surface and a second surface substantially parallel to one another, the second plug having a third surface and a fourth surface substantially parallel to one another; removing at least one of the first and second decals to at least partially expose the first and second plugs; aligning the alloy carrier with the receiving substrate so that the first and second plugs correspond to the selected areas on the receiving substrate; and transferring the first plug to a first of the selected areas and the second plug to a second of the selected areas.
US07867839B2	Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors Disclosed are embodiments of a p-type, silicon germanium (SiGe), high-k dielectric-metal gate, metal oxide semiconductor field effect transistor (PFET) having an optimal threshold voltage (Vt), a complementary metal oxide semiconductor (CMOS) device that includes the PFET and methods of forming both the PFET alone and the CMOS device. The embodiments incorporate negatively charged ions (e.g., fluorine (F), chlorine (Cl), bromine (Br), iodine (I), etc.) into the high-k gate dielectric material of the PFET only so as to selectively adjust the negative Vt of the PFET (i.e., so as to reduce the negative Vt of the PFET).
US07867834B2	Manufacturing method of semiconductor device capable of forming the line width of a gate A manufacturing method of a semiconductor device according to an embodiment includes: forming a trench for a device isolation area and a semiconductor projection with a first width by etching a semiconductor substrate; forming an oxide film on the trench and the semiconductor projections; forming an insulating layer on the oxide film; exposing the upper surface of the semiconductor projection by polishing the insulating layer and the oxide film; forming a gate insulating layer at a lower region of the semiconductor projection; and etching the insulating layer and the oxide film on the substrate.
US07867831B2	Manufacturing method of flash memory device comprising gate columns penetrating through a cell stack A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.
US07867830B2	Manufacturing method for electronic component with sealing film A manufacturing method for electronic device, includes: preparing a first substrate having a plurality of first regions; preparing a second substrate having a plurality of second regions; facing the first region and the second region each other, and connecting the first substrate and the second substrate while disposing at least a part of a functional element within a space between the first region and the second region; obtaining a plurality of first divisional substrates by cutting the first substrate at each of the first regions, after the connecting of the first substrate and the second substrate; forming a sealing film covering the plurality of the first divisional substrates on the second substrate, after cutting the first substrate; obtaining a plurality of second divisional substrates by cutting the second substrate at each of the second regions, after forming the sealing film; and obtaining a plurality of individual electronic devices.
US07867828B2	Method of fabricating a semiconductor device including forming an insulating layer with a hard sheet buried therein A semiconductor device includes a base plate, and a semiconductor constituent body formed on the base plate. The semiconductor constituent body has a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is formed on the base plate around the semiconductor constituent body. A hard sheet is formed on the insulating layer. An interconnection is connected to the external connecting electrodes of the semiconductor constituent body.
US07867825B2	Semiconductor die with protective layer and related method of processing a semiconductor wafer A semiconductor die and a related method of processing a semiconductor wafer are disclosed in which a first interlayer insulator having a recess region of varying configuration and defining a scribe line is associated with at least one protective layer formed with a characterizing inclined side surface.
US07867823B2	Method for fabricating a semiconductor package A method for fabricating an IC package that includes depositing conductive adhesive bodies on the leads, and then adhering the electrodes of an IC device to the so disposed conductive adhesive bodies.
US07867821B1	Integrated circuit package system with through semiconductor vias and method of manufacture thereof A method of manufacture of an integrated circuit package system including: providing a package substrate; mounting a first integrated circuit die, having through silicon vias, on the package substrate; coupling cylindrical studs to the package substrate adjacent to the first integrated circuit die; and mounting a second integrated circuit die, having through silicon vias, on the first integrated circuit die and the cylindrical studs for forming an electrical connection among the second integrated circuit die, the first integrated circuit die, the package substrate, or a combination thereof.
US07867820B2	Methods for forming co-planar wafer-scale chip packages Economical methods for forming a co-planar multi-chip wafer-level packages are proposed. Partial wafer bonding and partial wafer dicing techniques are used to create chips as well as pockets. The finished chips are then mounted in the corresponding pockets of a carrier substrate, and global interconnects among the chips are formed on the top planar surface of the finished chips. The proposed methods facilitate the integration of chips fabricated with different process steps and materials. There is no need to use a planarization process such as chemical-mechanical polish to planarize the top surfaces of the chips. Since the chips are precisely aligned to each other and all the chips are mounted facing up, the module is ready for global wiring, which eliminates the need to flip the chips from an upside-down position.
US07867817B2	Method for manufacturing a wafer level package A method for manufacturing a wafer level package of an integrated circuit element for direct attachment to a wiring board is disclosed. An integrated circuit element includes input/output pads located on an active side. A non-conductive support structure is formed on the active side of the integrated circuit element in an area that is free from input/output pads. A conductive path is formed upon the support structure and a non-conductive coating is formed on over the active side of the integrated circuit element such that a surface is formed which leaves interface pads accessible.
US07867816B2	Method and system for innovative substrate/package design for a high performance integrated circuit chipset Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal 2 substrate layer and utilizing all of a metal 3 substrate layer for the grounding function. Portions of the metal 2 layer and a metal 4 layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.
US07867810B2	Method for manufacturing a solid-state image capturing apparatus A method for manufacturing a solid-state image capturing apparatus including a pixel array constituted of a plurality of pixels, is provided, where each of the plurality of pixels includes a photoelectric conversion section, the method comprising the steps of: forming an impurity diffusion area in a surface area of a semiconductor substrate; and forming a plurality of different impurity diffusion areas in the surface area of the semiconductor substrate, other than the impurity diffusion area constituting the photoelectric conversion section.
US07867806B2	Electronic component structure and method of making An external component, typically a surface mount passive, is attached to a semiconductor die. In some embodiments the passive is placed directly over exposed pads on the semiconductor die and attached using conductive tape or conductive epoxy. In some embodiments the passive is attached to the semiconductor die using non-conductive adhesive and wire bonded to bond pads on the semiconductor die and/or to pads on a substrate to which the semiconductor die is attached.
US07867802B2	Diamond LED devices and associated methods LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
US07867800B2	Light-emitting semiconductor device using group III nitrogen compound A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1−x3)y3In1−y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1−x2)y2In1−y2N emission layer (5), and a Mg-doped (Alx1Ga1−x1)y1In1−y1N p-layer (6). The AlN layer (2) has a 500 Å thickness. The GaN n+-layer (3) has about a 2.0 μm thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 μm thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 μm thickness. The p-layer 6 has about a 1.0 μm thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8). The composition ratio of Al, Ga, and In in each of the layers (4, 5, 6) is selected to meet the lattice constant of GaN in the n+-layer (3). The LED (10) is designed to improve luminous intensity and to obtain purer blue color.
US07867798B2	Semiconductor laser, method of manufacturing semiconductor laser, optical pickup and optical disk system A semiconductor laser using a nitride type Group III-V compound semiconductor includes: an n-side clad layer; an n-side optical waveguide layer over the n-side clad layer; an active layer over the n-side optical waveguide layer; a p-side optical waveguide layer over the active layer; an electron barrier layer over the p-side optical waveguide layer; and a p-side clad layer over the electron barrier layer. A ridge stripe is formed at an upper part of the p-side optical waveguide layer, the electron barrier layer and the p-side clad layer, and the distance between the electron barrier layer and a bottom surface in areas on both sides of the ridge stripe is not less than 10 nm.
US07867796B2	Liquid crystal display and fabrication method thereof A method for fabricating an LCD includes: providing a substrate with a thin film transistor (ITT) part defined thereon; forming a metallic film for a gate electrode on the substrate; etching the metallic film through a first printing process to form a gate electrode; sequentially forming a gate insulating layer, a semiconductor layer, and a metallic film for source and drain electrodes on the substrate; selectively etching the metallic film for source and drain electrodes, the semiconductor layer and the gate insulating layer through a second printing process to form a gate insulating layer pattern, a preliminary active pattern and a metallic film pattern which are sequentially stacked such that the gate insulating layer pattern is over-etched from the side of the preliminary active pattern; forming an insulating layer on the substrate with the metallic film pattern; etching the insulating layer to expose the metallic film pattern; forming a transparent conductive film on the metallic film pattern and a remaining insulating film; and selectively etching the transparent conductive film, the metallic film pattern, the preliminary active pattern to form an active pattern, a source electrode, a drain electrode, and a pixel electrode connected with the drain electrode.
US07867795B2	Manufacturing method of light emitting diode apparatus A manufacturing method of a light emitting diode (LED) apparatus includes the steps of: forming at least one temporary substrate, which is made by a curable material, on a LED device; and forming at least a thermal-conductive substrate on the LED device. The manufacturing method does not need the step of adhering the semiconductor structure onto another substrate by using an adhering layer, and can make the devices to be in sequence separated after removing the temporary substrate, thereby obtaining several LED apparatuses. As a result, the problem of current leakage due to the cutting procedure can be prevented so as to reduce the production cost and increase the production yield.
US07867793B2	Substrate removal during LED formation A light emitting diode (LED) is fabricated using an underfill layer that is deposited on either the LED or the submount prior to mounting the LED to a submount. The deposition of the underfill layer prior to mounting the LED to the submount provides for a more uniform and void free support, and increases underfill material options to permit improved thermal characteristics. The underfill layer may be used as support for the thin and brittle LED layers during the removal of the growth substrate prior to mounting the LED to the submount. Additionally, the underfill layer may be patterned to and/or polished back so that only the contact areas of the LED and/or submount are exposed. The patterns in the underfill may also be used as a guide to assist in the singulating of the devices.
US07867788B2	Spin-dependent tunnelling cell and method of formation thereof A Spin-Dependent Tunnelling cell comprises a first barrier layer of a first material and a second barrier layer of a second material sandwiched between a first ferromagnetic layer and a second ferromagnetic layer. The first and second barrier layers are formed to a combined thicknesses so that a Tunnelling Magnetoresistance versus voltage characteristic of the cell has a maximum at a non-zero bias voltage.
US07867786B2	Ferroelectric layer with domains stabilized by strain The present invention describes a method including: providing a substrate; forming an underlying layer over the substrate; heating the substrate; forming a ferroelectric layer over the underlying layer, the ferroelectric layer having a thickness below a critical thickness, the underlying layer having a smaller lattice constant than the ferroelectric layer; cooling the substrate to room temperature; and inducing a compressive strain in the ferroelectric layer.
US07867785B2	Carrier particle latex for assay reagent and assay reagent An objective of the invention is to provide a carrier particle latex for an assay reagent capable of assaying a biological sample at a wide range of the concentration in an immunoserological test and capable of being stored stably for a prolonged period, as well as an assay reagent employing the same.The invention is a carrier particle latex for an assay reagent comprising a carrier particle comprising a copolymer of a polymerizable monomer having a phenyl group and a polymerizable monomer having a phenyl group and a sulfonate, wherein said carrier particle has a surface sulfonic acid group amount of 0.005 to 0.7 μmol/m2 and an average particle size of 0.01 to 1.5 μm.
US07867780B2	Lateral flow format, materials and methods The present invention provides a lateral flow format and materials and methods for using the format in a variety of applications. More particularly, the present invention provides single-layer lateral flow formats, materials and methods for detecting the presence of an analyte using a test strip comprising a dry porous medium comprising a single hydrophilic matrix. Devices are also provided as well as methods of making and using the format. The format is particularly useful for diagnosis of physiological and genetic conditions. In addition, the present invention provides methods and materials for concentrating a reagent in a porous medium.

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