Document Document Title
US07852501B2 Information processing apparatus and information processing method
When a print processing apparatus is in a power saving mode, an information processing apparatus informs, for the print processing apparatus, the user that the print processing apparatus is in the power saving state. It can thus be made known to the user that the print processing apparatus is in the power saving state.
US07852495B2 Systems and methods for generating document distribution confirmation sheets with multi-destination status and/or multi-service status information
Confirmation sheets would be more useful if they provided status information for each service, for each destination or recipient and/or images of each page of a multi-service and/or multi-destination job. A confirmation sheet provides the status of multi-destination and/or multi-service document distribution jobs. The services that can be included in a multi-service document distribution job include sending the documents as a facsimile, scanning the documents to a file or to a file repository, e-mailing the documents to an individual or other address, and/or printing the documents. Thumbnail images of one or more pages of the multi-destination and/or multi-service job can also be included on the confirmation sheet. In various exemplary embodiments, when elements of a multi-destination or multi-service job are not completed at the time the confirmation sheet is requested, the confirmation sheet can include various structures or information usable to obtain job status at a later time.
US07852493B2 Optical recording of the spatial shape of bodies and body parts with sections that in part are not optically visible
There is described a method and an apparatus for the optical 3D digitization of bodies and body parts which reveal non-visible regions which therefore cannot be detected by the 3D digitizer. A mechanical aid is fixed at these regions and protrudes into the measurement space visible for the 3D digitizer. On this visible part, it is provided with marks and is digitized together with the remaining, visible body parts. From the spatial position of the marks of these aids, important geometrical information of the non-visible parts, such as the spatial position, circumferential dimensions, etc., can be calculated, and the 3D model of the body or body part incomplete at these points can be completed therewith. Two applications from the field of orthopedics are described by way of example.
US07852491B2 Human-readable, bi-state environmental sensors based on micro-mechanical membranes
An environmental sensing device includes an interferometric modulator which permanently actuates, in a visually-detectable manner, in response to being exposed to a predetermined environmental threshold or condition. The device can include a reactive layer, coating, or proof mass disposed on a movable member of the interferometric modulator. The reactive layer, coating, or proof mass can expand, contract, bend, or otherwise move when exposed to a predefined chemical, level of humidity, temperature threshold, type of radiation, and/or level of mechanical shock, causing the interferometric modulator to collapse and permanently indicate such exposure.
US07852489B2 Method for measuring surface profile, and apparatus using the same
A reference plane is arranged in a posture obliquely tilted at an optional angle relative to a traveling direction of a light-beam, so that an interference fringe is generated from the reflected light-beams which are reflected from a target plane and the reference plane and, then, return on a single optical path. An image of the interference fringe is taken by a CCD camera to acquire intensity value data of each pixel. A phase of an interference fringe waveform is obtained for each pixel by a CPU by fitting the intensity value data to a model equation expressing the interference fringe waveform, where the intensity value data contain that of each pixel and those of the pixels in the vicinity of the relevant pixel, on assumption that DC components, AC amplitudes and phases of the interference fringe waveforms are respectively constant in the vicinity of the relevant pixel. The obtained phase is converted into a height to measure a surface profile.
US07852488B2 Method and device for characterising a structure by wavelength effect in a photoacoustic system
The invention relates to a structure characterising device comprising means which are used for generating a first pump radiation and a second probe radiation and for transmitting different wavelength radiation, means for producing a time offset between said first pump and second probe radiation on the structure by means of detecting means of said second beam after the reflection or transmission thereof to said structure in such a way that an analysis signal is generated, means for processing said signal and identifying an area corresponding to the signal jump, for determining the jump amplitude according to different wavelengths, for comparing said amplitude with a theoretical amplitude variation pattern according to the wavelengths and for determining, for the wavelength characteristic for said theoretical pattern, a characteristic value associated to the structure thickness and to the radiation propagation velocity in said structure.
US07852485B2 Single trace multi-channel low coherence interferometric sensor
Interferometers and autocorrelator based sensors are disclosed that are configured to have multiple sample arms which can be scanned and the backscattered low coherence source light from a sample resolved in a single sweep of one or more variable delays of the sensor. Borescopes and catheters capable of scanning multiple sections or areas of materials and tissues using these sensors are described.
US07852484B2 Light control unit, optical tomographic imaging method and apparatus
A light control unit that combines and outputs a plurality of light beams, including: a light emission section capable of outputting three or more light beams swept in wavelength within different wavelength ranges from each other; a wavelength combining section having wavelength selectivity, that combines and outputs at least two of the three or more light beams; and a control section that performs control in the light emission section, or upstream or downstream of the wavelength combining section in the optical path of the light beams to cause at least one light beam is outputted during a time period which is different from a time period in which another one or more light beams are outputted, thereby two or more light beams having different wavelengths from each other are combined and outputted at the same time.
US07852480B2 Hydrogen gas detection device
In a hydrogen gas detection device, light emitted from a light source is irradiated onto a hydrogen sensor whose reflectance (optical reflectance) varies upon contact with hydrogen gas, and the light transmitted through the hydrogen sensor or reflected by a reflective film of the hydrogen sensor is received by an optical sensor. On the basis of the signal output from the optical sensor and indicative of the amount of light received, the hydrogen gas detection device detects leakage of hydrogen gas.
US07852479B2 Apparatus and method for measuring the fluorescence of large multi-cellular organisms
Apparatus and methods for measuring the fluorescence of large multi-cellular organisms in a sample of liquid includes a pumping mechanism, a fluorescence measuring device, a method of analyzing the measurements, and optionally, a sorting mechanism. The pumping mechanism transfers large multi-cellular organisms from a reservoir through a fluorescence-measuring device causing minimum physical damage and/or stress. The pressure differential driving the organisms from a sample container/reservoir through the measuring device can be derived from gravity, air pressure, or liquid pressure, or some combination of the three. The fluorescence can be measured in a cytometer using a light detector or imager. Generally the detection element will include a filter, isolating the wavelength of fluorescent emission. The illumination may be provided by a laser or by an LED, combined with the use of dichroic mirrors to allow multiple wavelength simultaneous illumination.
US07852478B1 Detecting assembly for a multi-axis machine tool
A detecting assembly for multi-axis machine tools having a spindle and a turntable and has a detector, a lens device and a computer. The detector is connected to the spindle and has a mounting frame and two detecting segments. The mounting frame is connected to the spindle and has a connecting rod, a bottom board and multiple mounting boards. The detecting segments are mounted on the mounting boards and each has a light source and a sensor. The lens device is mounted on the turntable, extends into the detector and has a supporting shaft and a spherical lens. The spherical lens is mounted on an upper end of the supporting shaft to align light emitted from the light sources with corresponding sensors via the spherical lens. The computer is electrically connected to the detector to receive signals of the detecting segments of the detector and has a signal processor.
US07852475B2 Scanning spectrometer with multiple photodetectors
A scanning optical spectrometer with a detector array is disclosed, in which position of focused spot of light at the input of a dispersive element such as arrayed waveguide grating (AWG) with a slab input, is scanned using a micro-electro-mechanical (MEMS) tiltable micromirror so as to make the dispersed spectrum of light scan over the detector array coupled to the AWG. Sub-spectra recorded using individual detectors are concatenated by a processor unit to obtain the spectrum of input light.
US07852473B2 Apparatus for measuring spatially resolved the luminescence of semiconductor samples
An apparatus to measure spatially resolved the luminescence of a semiconductor sample, in particular a semiconductor wafer or any part thereof, includes a rotatable sample holder for the semiconductor sample. This rotatable sample holder is mounted on an xy stage, and a drive mechanism is used to rotate the sample holder rapidly during the measurement. A device excites luminescence light on the semiconductor sample, and an optical device guides a portion of the luminescence light to a detector. The surface of the semiconductor sample is located in the range of a focal point of the optical device. Using a fixation device, it is possible to remove the rotatable sample holder from the xy stage, when required, and to replace it by a cryostat with an optical window and a further semiconductor sample, so that the surface of the further semiconductor sample is essentially located in the focus point of optical device.
US07852471B2 Power generator for spectrometry
An RF power generator (10) for an induction coil (26) for exciting an inductively coupled plasma in a torch (27) for spectrometry. The generator (10) comprises a switching circuit (12) for alternately switching ON and OFF solid state switching devices (20) via gate drive voltages (22) for supplying RF power into a resonant load circuit (16) comprising the induction coil (26) and parallel connected capacitance (25). The gate drive circuits (24) for each solid state switching device (20) each include a portion (30) that is mutually inductively coupled with leads of the induction coil (26) to provide the gate drive voltages (22). The circuit allows for reduced componentry and therefore a relatively inexpensive RF power generator for exciting and sustaining an inductively coupled plasma for spectrometry.
US07852468B2 Fiber optic refractometer
A downhole refractometer apparatus and method include a light source, an optical fiber that receives light emitted from the light source and a fluid cell that receives a downhole fluid. A metalloid interface member is disposed to provide an interface with the downhole fluid in the fluid cell, and a light detecting device detects a light reaction at the metalloid interface member, the downhole fluid property being estimable at least in part based on the light reaction.
US07852467B2 Method for increasing accuracy of measurement of mean polarization mode dispersion
The present invention provides a method of determining a mean differential group delay associated with a length of optical fiber. The method including measuring a magnitude of a polarization mode dispersion vector as a function of frequency, using a frequency-domain polarization mode dispersion measurement apparatus, where the magnitude of the polarization mode dispersion vector is a scalar differential group delay. Also the method calculates a frequency derivative of the scalar differential group delay from the magnitude of the polarization mode dispersion vector to obtain a first result. The frequency derivative of the scalar differential group delay being a scalar second-order polarization mode dispersion function. The method further multiplies a proportionality coefficient B2 by the first result to calculate the mean differential group delay. Also, the method outputs a value of the mean differential group delay.
US07852465B1 System for measuring liquid flow rates
A system for monitoring non-volatile residue concentrations in ultra pure water includes a nebulizer for generating an aerosol composed of multiple water droplets, a heating element changing the aerosol to a suspension of residue particles, and a condensation particle counter to supersaturate the dried aerosol to cause droplet growth through condensation of a liquid onto the particles. The nebulizer incorporates a flow dividing structure that divides exiting waste water into a series of droplets. The droplets are counted to directly indicate a waste water flow rate and indirectly indicate an input flow rate of water supplied to the nebulizer. The condensation particle counter employs water as the condensing medium, avoiding the need for undesirable chemical formulations and enabling use of the ultra pure water itself as the condensing medium.
US07852463B2 Range measurement device
A range measurement device is disclosed. The device comprises a flash laser radar configured to produce a first laser pulse at a first time. The device receives, at a second time, reflections of the first laser pulse from at least one object within a 360 degree field of view. The device further comprises a timing electronics module, an image sensor in communication with the timing electronics module, a mirror element coupled between the image sensor and the laser radar, and a lens. The mirror element includes a first reflector configured to disperse the reflections of the first laser pulse within at least a portion of the 360 degree field of view and a second reflector configured to collect returning reflections of the first laser pulse from the at least one object into the image sensor. The lens is configured to focus the returning reflections onto the image sensor.
US07852462B2 Vehicular component control methods based on blind spot monitoring
Method for controlling a vehicular system based on the presence of an object in an environment around a vehicle with one goals being to prevent collisions between the vehicle and any objects. Infrared light is emitted from the vehicle into a portion of the environment around the vehicle and received by a sensor on the vehicle. Distance between the vehicle and an object from which the infrared light is reflected is determined based on the emission of the infrared light and reception of the infrared light. The presence of and an identification of the object from which light is reflected is/are determined based at least in part on the received infrared light. The vehicular system is controlled or adjusted based on the determination of the presence of an object in the environment around the vehicle and the identification of the object and the distance between the object and the vehicle.
US07852456B2 Exposure apparatus, exposure method, and method for producing device
An exposure apparatus fills an optical path space of an exposure light beam with a liquid, and exposes a substrate by irradiating the substrate with the exposure light beam via a projection optical system and the liquid. A first optical element of the projection optical system is provided with a removing device for removing foreign matters in a space inside of the concave surface portion. Immersion exposure is performed by permitting the exposure light beam to excellently reach an image plane via the projection optical system and the liquid.
US07852450B2 Liquid crystal display device and method of fabricating the same
A liquid crystal display device is disclosed that is capable of preventing poor alignment caused by a column spacer to improve the contrast ratio. The liquid crystal display device includes a color filter and column spacers located between a first substrate and a second substrate. The column spacers maintain the cell gap between the first and second substrates. The color filter contains pixels having multiple sub-pixels of different colors. The column spacers in regions of sub-pixels of the same color are randomly formed within the regions.
US07852449B2 Liquid crystal display device and method of fabricating the same
A liquid crystal display (LCD) device includes first and second substrates facing each other, a plurality of column spacers on at least one of the first and second substrates, each column spacer including first pattern second patterns, the first and second patterns being connected to each other, the second pattern having a contact surface less than the first pattern, and a liquid crystal layer between the first and second substrates.
US07852444B2 Liquid crystal display and thin film transistor array panel usable with the liquid crystal display
A liquid crystal display with improved viewing angle and uncompromised transmittance is provided, along with a thin film transistor (TFT) array panel usable for such liquid crystal display. The TFT array panel includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, and a plurality of thin film transistors. Each of the thin film transistors includes a gate electrode connected to one of the gate lines, a source electrode connected to one of the data lines, and a drain electrode. The TFT array panel also includes a plurality of pixel electrodes, each of the pixel electrodes connected to one of the drain electrodes and having a pair of oblique edges parallel to each other, and covering at least a portion of the drain electrodes.
US07852443B2 Display device and method having pixel and terminal parts where an organic resin film disposed thereon has a film thickness adjusting area so that the terminal part film thickness is thinner than the pixel part film thickness
A display device of the present invention includes a first insulation film formed on a first auxiliary capacitance electrode, a second auxiliary capacitance electrode, a first gate electrode wiring, and a second gate electrode wiring formed on a substrate. A source electrode, a drain electrode, and a source wiring are formed on the first insulation film, and a second insulation film is formed thereon. An organic resin film is formed on the second insulation film, and a pixel transmission electrode connected to the drain electrode, the second auxiliary capacitance electrode, and the source wiring through a contact hole is formed on the organic resin film. A pixel reflection electrode is formed in a part or all of the pixel transmission electrode and the organic resin film. The organic resin film in the terminal part has a film thickness adjusting area thinner than the organic resin film of the pixel part.
US07852440B2 Liquid crystal display device
A liquid crystal display device of the invention has: a display panel with an active matrix substrate 2 and a second substrate of transparent material deposed opposite that substrate; an illuminating unit that illuminates the display panel; and a photosensing unit that is provided on the active matrix substrate and has an ambient light photosensor that senses external light. The ambient light photosensor is constituted of a thin film transistor. At least the source electrode SL and drain electrode DL of the thin film transistor are covered by a shielding transparent electrode 6, with transparent insulator 3 and 5 interposed. The transparent electrode 6 is electrically connected to the drain electrode DL, and moreover is connected to a power source supplying constant voltage. Thanks to such structure, a display device is provided in which the ambient light photosensor is built into a panel substrate so as not to be affected by external noise and the peripheral circuits.
US07852438B2 Transflective type liquid crystal display device and method for fabricating the same
A transflective type LCD device includes a substrate having gate and data lines crossing each other to define pixel regions, a reflective part and a transmitting part in each pixel region, a pixel electrode in the reflective part and the transmitting part of the pixel region, a reflective electrode in the reflective part of the pixel region, a thin film transistor having source and drain regions at a crossing of the gate and data lines for transmitting a signal of the data line to the pixel electrode in accordance with a signal of the gate line, and an electrode electrically connecting the source region of the thin film transistor with a data electrode of the data line.
US07852436B2 Liquid crystal panel, and liquid crystal display
A liquid crystal panel of this invention has a first polarizer and a second polarizer disposed on both sides of a liquid crystal cell, and a first optical compensation layer disposed between the liquid crystal cell and the first polarizer, a second optical compensation layer disposed between the liquid crystal cell and the second polarizer, and a third optical compensation layer disposed between the first optical compensation layer and the second optical compensation layer, and wavelength dispersion of the liquid crystal cell satisfies Re40(450)>Re40(550)>Re40(650), wavelength dispersion of the first optical compensation layer and wavelength dispersion of the second optical compensation layer satisfy 0.7Re40(550)>Re40(650).
US07852433B2 Backlight assembly and display device having the same
A backlight assembly includes: a light source forming light; and a multi-focusing sheet focusing the light provided by the light source in at least two regions.
US07852432B2 Liquid crystal display apparatus and image control method thereof
A liquid crystal display (LCD) apparatus includes a backlight module and a LCD module. The backlight module has a plurality of individually drivable backlight regions. The LCD module has a plurality of display blocks, each of which corresponds to one of the backlight regions and is disposed on an optical path of light emitted from the corresponding backlight regions. A power regulating module is electrically connected to the backlight module and the LCD module for receiving image frame data and controlling light-emitting intensities of the backlight regions in accordance with the image frame data to be displayed by the corresponding display blocks. Each backlight regions has multiple light-emitting units for emitting light in different colors. Each display block has a plurality of pixels, and each of the pixels has multiple filter units. A transmitted spectrum of each of the light-emitting units of the backlight regions corresponds to transmitted spectrums of at least two filter units of each of the pixels in the respective display blocks.
US07852431B2 Backlight device
All of LEDs 12a-12d are switched on in a case of illuminating a main display 21 mainly. Thus, each LED 12a-12d has a lighting region 22a-22d respectively, thereby illuminating the main display 21 entirely. Central LEDs 12b, 12c in LEDs 12a-12d are switched on in a case of illuminating a sub-display mainly. Thus, each LEDs 12b, 12c has a lighting region 22b, 22c respectively, thereby illuminating the sub-display 21b.
US07852428B2 Liquid crystal display
A liquid crystal display to reduce a number of parts forming a back light unit includes a liquid crystal panel, a light source to illuminate light on the liquid crystal panel, a reflection plate to reflect light emitted from the light source toward the liquid crystal panel, the light source is disposed on the reflection plate, and a support bracket disposed on a rear surface of the reflection plate to reinforce a strength of the reflection plate.
US07852426B2 Liquid crystal display
Example embodiments relate to a liquid crystal display and a method thereof. The liquid crystal display may include a display panel having a liquid crystal layer interposed between a first substrate and a second substrate, and a bezel having a lower surface, sidewalls formed perpendicularly to the lower surface, and extension members formed horizontally with the lower surface on upper end portions of the sidewalls. The display panel may be received in the bezel so that the first substrate may correspond to the lower surface, and side surfaces of the first substrate may correspond to the sidewalls.
US07852424B2 Liquid crystal display device with relatively flat, slightly bent film member connected between frame and peripheral of display so as to block a gap formed therebetween
A film member is provided between a liquid crystal panel and the front panel of a front frame. The film member is thinner than the gap between the liquid crystal panel and the front panel. The film member is strip-shaped, one end part thereof in the width direction is attached to the front panel, and the other end part thereof is in contact with the liquid crystal panel. The film member is formed from PET, has a thickness of 25 to 100 μm, and is black or gray in color. Four such strip-shaped film members are positioned so as to surround the opening of the front frame. A large load is thereby not placed on the liquid crystal panel, the thickness of the device as a whole in not increased, and the ingress of debris and light leakage can be prevented.
US07852423B2 Liquid crystal display device with heat dissipation on the printed circuit board
A liquid crystal display device includes a main support supporting a liquid crystal panel and a back light unit, a printed circuit board attached to the liquid crystal panel to provide driving signals to the liquid crystal panel, a separation part between the printed circuit board and the main support creating a gap therebetween, and a holder holding the printed circuit board and the main support together.
US07852422B2 Thin film transistor array substrate and pixel structure with TFT having varying included angle of channel layer
A thin film transistor (TFT) array substrate including a substrate, scan lines and data lines both disposed on the substrate, and pixel structures is provided. A plurality of pixel areas is defined by the scan lines and the data lines on the substrate. Each scan line has a driving signal input terminal and an end terminal. Each pixel area includes a first sub-pixel area and a second sub-pixel area. The pixel structures are respectively disposed in the pixel areas and driven by the scan lines and the data lines. Each pixel structure in the respective pixel area includes a first TFT corresponding to the first sub-pixel area and a second TFT corresponding to the second sub-pixel area. Besides, ratios of a channel width to a channel length of the second TFTs connected to the same scan line increase gradually from the driving signal input terminal to the end terminal.
US07852421B2 Liquid crystal display device
In an active matrix type liquid crystal display device, a plurality of pixels connected to thin film transistors (TFTs) are arranged in an active matrix form in a pixel portion, and driven by a driver circuit portion. The pixel portion and the driver circuit portion are formed on one of a pair of insulating substrates. A liquid crystal material is interposed between the insulating substrates. An black matrix material made of an organic resin is formed over the one insulating substrate in which the driver circuit portion has been formed. An flat film is formed on the black matrix material.
US07852417B2 Light sensitive display
A light sensitive display.
US07852415B2 Digital television receiver and method of controlling antenna of the same
A method of controlling an adjustable antenna of a digital television receiver including (a) storing an effective power of a channel signal received through the antenna in a memory by rotating the direction of the antenna and selecting an antenna pattern when a maximum signal power is detected (b) aligning the stored antenna patterns in order of sizes of the signal powers, and (c) detecting states of the channel signal, a power of the channel signal, a maximum ghost power, and a signal vs. noise ratio and then changing a pattern of the antenna in accordance with the detected states.
US07852414B2 Method of selecting seeds for the clustering of key-frames
The method is characterized in that it implements the following steps: random drawing of p candidates from the set of key images, calculation of a cost C for each candidate, selection of the candidate minimizing the cost C, determination of a subset from among the set of key images such that the key images forming the said subset have a distance from the candidate less than a threshold T, determination of a seed from among the key images of the subset such that it minimizes the cost function C for this subset, deletion of the key images of the subset to form a new set of key images for at least one new random draw and determination of a new seed according to the previous 5 steps. The field is that of the selection of shots of interest in a video sequence.
US07852410B2 Image superimposing apparatus
A deepest part searching means divides each frame of a background image into a plurality of blocks, and searches for a candidate for the deepest part of the background image which is located the deepest in a direction of the depth of the background image, a deepest part determining means selects one of the searched candidate for the deepest part of the background image and predetermined candidates for the deepest part of the background image so as to determine the deepest part of the background image, a superimposing determining means determines a superimposing method of superimposing each of the series of images to be superimposed on the background image, and a superimposing processing means superimposes the series of images to be superimposed on the background image on a frame-by-frame basis according to the determined superimposing method.
US07852406B2 Processing high definition video data
Video data is processed. A first high definition program stream is received that includes a first high definition video stream component. A first standard definition program stream is derived from the high definition program stream. A second standard definition is received having been derived from the first standard definition program stream. A second high definition program stream is derived from the second standard definition program stream and the first high definition video stream component.
US07852405B1 Method and apparatus for high definition capture
A method and apparatus for providing a high definition capture engine comprising an on-the-fly scaler to perform horizontal and vertical scaling as needed, prior to storage of the data in a buffer.
US07852402B2 Method and apparatus for capturing high quality long exposure images with a digital camera
A digital camera captures high quality long exposure images by capturing and summing several images of the same scene. The effective ISO of the camera is reduced by scaling the summed image, thus reducing image noise and improving long exposure quality.
US07852399B2 Multi-eye image pickup device
A stereo camera comprises a camera body, a lens barrel rotatably attached to the camera body, and a converter lens barrel 14 detachably attached to the camera body. The lens barrel contains a pair of a first imaging optical system and a first CCD, and a pair of a second imaging optical system and a second CCD. When the lens barrel is at an ordinary position, a wide image capturing mode with only the first CCD being activated or a normal image capturing mode with only the second CCD being activated is set. When the lens barrel is at a first rotational position, a panoramic image capturing mode is set. When the lens barrel is at a second rotational position, a stereoscopic image capturing mode is set.
US07852398B2 Image-taking apparatus
An image-taking apparatus which achieves focusing in a reduced time with higher accuracy of an in-focus position search in a TV-AF method to minimize occurrence of unnatural focus changes. The apparatus includes an image-taking element, a first detector which outputs a focus evaluation value signal based on a predetermined frequency component of an output signal of the image-pickup element, a second detector which outputs a detection signal different from the focus evaluation value signal, and a controller which performs first processing of obtaining information for an in-focus position search of the focus lens based on the focus evaluation value signal. The controller performs second processing of obtaining information on an in-focus position based on the detection signal from the second detector, and performs third processing different depending on a comparison result between the information from the first processing and the information obtained from the second processing.
US07852395B2 Camera with two image pickup sections
A camera includes a first image pickup section, a viewfinder optical system, a second image pickup section, a displaying section, an operation section, and a controlling section. The viewfinder optical system has an eyepiece section that can observe an optical image of a subject with a light flux from a photographing optical path of the first image pickup section. The second image pickup section photographs a view confirming image from an optical path different from that of the first image pickup section. The displaying section provides the eyepiece section with the view confirming image. The operation section accepts from a user a displaying operation to ask for displaying of the view confirming image. The controlling section switches between a first state to provide the eyepiece section with the optical image and a second state to provide the eyepiece section with the view confirming image.
US07852394B2 Driving method for solid-state imaging device and solid-state imaging device
The present invention is to provide a driving method for a solid-state imaging device which suppresses increase of smear and occurrence of image blur when imaging a moving object.In the driving method, for each row of the color filters arranged in the Bayer pattern, for a pixel, a signal charge is held in a first holding unit, which is generated in a preceding field period temporally preceding a predetermined field out of two different fields temporally equidistant from the predetermined field, a first signal charge is held in a second holding unit, which is generated within the predetermined field, the signal charge held in the first holding unit and a signal charge which is generated in a following field period are added, and a second signal charge obtained by the addition and the first signal charge are respectively outputted to outside of the solid-state imaging device.
US07852393B2 Photoelectric conversion apparatus and image sensing system using the same
A photoelectric conversion apparatus includes a pixel unit having a plurality of pixels arranged in a matrix, a plurality of block lines to which signals are supplied from the pixels, transfer switches used to supply the signals from the block lines to a common signal line, and a driving circuit configured to drive the pixels, the block lines, and the transfer switches. The block lines have resetting units used to reset potentials of the block lines. With this configuration, a signal reading operation is performed at high speed in the photoelectric conversion apparatus.
US07852386B2 Solid state imaging device and method for driving same and imaging apparatus
A solid state imaging device including: a pixel portion having a plurality of pixels arrayed two-dimensionally and including an effective pixel portion and a dummy pixel portion; a timing generator for generating address information for reading signals of pixels of the pixel portion and timing signals for reading; a column decoder; a column selection circuit for generating transfer signals and reset signals used for control for reading signals of pixels in the column portions of the pixel portion by the plurality of line selection signals output from the column decoder based on the timing signals and selecting column portions of pixels in an effective portion and a dummy portion of the pixel portion; and a transfer circuit for reading signals of corresponding pixels based on the transfer signals and reset signals output from the column selection circuit, then transferring signals of read pixels by the row signal lines.
US07852385B2 Imager row-wise noise correction
An imager having optically and electrically black reference pixels in each row of the imager's pixel array. Since the reference pixels of each row experience the same row-wise noise as active imaging pixels in the associated row, the signals from the reference pixels are used to cancel out row-wise noise from the row of imaging pixels. The reference pixels are designed such that their photosensors are physically or effectively removed from the row-wise noise correction, thus rendering them electrically black or dark. As such, the reference pixels can be used to provide row-wise noise correction without the adverse effects of warm and hot pixels.
US07852384B2 Detecting red eye filter and apparatus using meta-data
A method of filtering a red-eye phenomenon from an acquired digital image including a multiplicity of pixels indicative of color, the pixels forming various shapes of the image, includes analyzing meta-data information, determining one or more regions within the digital image suspected as including red eye artifact, and determining, based at least in part on the meta-data analysis, whether the regions are actual red eye artifact. The meta-data information may include information describing conditions under which the image was acquired, captured and/or digitized, acquisition device-specific information, and/ film information.
US07852383B2 Image pickup apparatus
A detection error of foreign substance due to the presence of a newly generated defective pixel can be considerably prevented. An image pickup apparatus includes a foreign substance detector detecting foreign substance adhering to an optical member arranged on a light axis for image capturing in accordance with an image signal obtained by the image pickup device, a defective pixel position detector detecting a position of a defective pixel in the image pickup device in accordance with an image signal obtained by the image pickup device, a storage unit storing position information detected by the defective pixel position detector, and a controller controlling processing so that the foreign substance detector detects the foreign substance after the defective pixel position detector detects the position of the defective pixel.
US07852379B2 Image forming apparatus, image forming method, and computer program product
An image forming apparatus causes an illuminating unit and an imaging unit to equally split a predetermined exposure time into a plurality of split exposure times, and acquire an image with illumination and an image without illumination in each of the split exposure time. A luminance difference image for a particular split exposure time is calculated by subtracting the image without illumination from the image with illumination of the exposure time. The luminance difference images of all the split exposure times are integrated.
US07852377B2 Automatic red eye removal
A method for removing a red eye from an image includes (1) calculating a weighted red value for each pixel in the image from red, green, and blue color values and a luminance value of each pixel in the image, (2) selecting a plurality of pixels in the image having weighted red values greater than a threshold as red eye pixels, and (3) correcting some of the red eye pixels to remove the red eye from the image. The weighted red value for a pixel is calculated as follows: f = c 1 ⁢ r + c 2 ⁢ g + c 3 ⁢ b Y , wherein f is the weighted red value, r is the red color value, g is the green color value, b is the blue color value, c1 is a first weight given to the red color value, c2 is a second weigh given to the green color value, c3 is a third weight given to the blue color value, and Y is the luminance.
US07852372B2 Interactive television system and method
A system and method for simulating a user's participation at an event. The system and method including providing a virtual queue or line for meeting and obtaining an autograph of a celebrity, attending a live event and/or for purchasing an item. The system and method include providing video and audio content to a remote user device, such as a television or a computer, for display on the monitor. A plurality of video cameras positioned in and around a line for obtaining an autograph provide a respective plurality of video and audio feeds that are broadcast to users of the system. An interface selectively changes the feed shown on the user's device to simulate movement in the line toward the celebrity until the user is able to view the celebrity autograph an item specifically designated for the user. The item can be merchandise, such as a CD, DVD, photograph or poster, selected by the user. The system mails the autographed item to the viewer and can also provide a recording of the autograph session.
US07852370B2 Method and system for spatio-temporal video warping
A computer-implemented method and system for transforming a first sequence of video frames of a first dynamic scene captured at regular time intervals to a second sequence of video frames depicting a second dynamic scene wherein for at least two successive frames of the second sequence, there are selected from at least three different frames of the first sequence portions that are spatially contiguous in the first dynamic scene and copied to a corresponding frame of the second sequence so as to maintain their spatial continuity in the first sequence. In a second aspect, for at least one feature in the first dynamic scene respective portions of the first sequence of video frames are sampled at a different rate than surrounding portions of the first sequence of video frames; and the sampled portions are copied to a corresponding frame of the second sequence.
US07852369B2 Integrated design for omni-directional camera and microphone array
An omni-directional camera (a 360 degree camera) is proposed with an integrated microphone array. The primary application for such a camera is videoconferencing and meeting recording, and the device is designed to be placed on a meeting room table. The microphone array is in a planar configuration, and the microphones are located as close to the desktop as possible to eliminate sound reflections from the table. The camera is connected to the microphone array base with a thin cylindrical rod, which is acoustically invisible to the microphone array for the frequency range [50-4000] Hz. This provides a direct path from the person talking to all of the microphones in the array, and can therefore be used for sound source localization (determining the location of the talker) and beam-forming (improving the sound quality of the talker by filtering only sound from a particular direction). The camera array is elevated from the table to provide a near frontal viewpoint of the meeting participants.
US07852367B2 Sublimatic laser printer
This printer includes a print head portion having a laser application portion emitting a laser beam, for performing printing by applying the laser beam from the laser application portion in a state bringing an ink sheet and a paper into contact with each other while transporting the ink sheet in a first direction and transporting the paper in both of the first direction and a second direction opposite to the first direction.
US07852366B2 System and method for printing reimageable transient documents
A system and a method print one or more images to one or more reimageable documents, wherein the one or more representative of at least a portion of a digital file. The method includes a connecting a portable printer to a computing device. Moreover, the method includes emitting ultraviolet light from a light source, wherein an imaging layer of the reimageable document is imagable by ultraviolet light, wherein ultraviolet light forms a color contrast on the imaging layer that defines an image representative of at least a portion of the digital file.
US07852365B2 Optical scanning apparatus and color image forming apparatus
An optical scanning apparatus includes light source units; a deflecting unit, incident optical systems provided so as to correspond to the light source units, and at least one synchronous detection optical system that controls a timing at which the light beams form images on the surfaces to be scanned. The synchronous detection optical system includes a synchronous detection element, at least one optical path changing unit, and at least one synchronous detection optical element. The synchronous detection element is attached to a circuit substrate of the light source unit arranged to oppose the light source unit that emits a light beam used for synchronous detection, with the deflecting unit therebetween. The synchronous detection optical element and the synchronous detection element are arranged to oppose each other with respect to a line perpendicular to lines connecting a deflection axis of the deflecting unit and optical axes of the imaging optical systems.
US07852362B2 Image writing device using digital light-emitting elements
An image-data transfer controller divides one line of image data for each of a plurality of light-emitting-element array units, transfers the divided image data to respective light-emitting-element array units, to drive light-emitting elements in the light-emitting-element array units for an exposure in a main-scanning direction. The image-data transfer controller performs a plurality of data transfers during one-line interval in the main-scanning direction, while performing a data processing of the one line of image data in the respective light-emitting-element array units, to drive a light-emitting element array formed with the light-emitting elements arranged in one direction.
US07852360B2 Thermal printer unit and printing device
In order to realize an adjustment mechanism which can adjust the pressing force of a thermal head according to paper thickness, and in addition, which is suitable for a small thermal printer, in a small thermal printer in which a platen roller (11) is adapted to be detachably attachable to arms for rotatably holding the platen roller and room at the back of a thermal head where a spring (16) for pressing the thermal head (14) toward the platen roller is disposed is narrow, an auxiliary plate for receiving the spring is provided at the back of the thermal head, the auxiliary plate (13) is adapted to be approachable to or separable from a head support plate (15), and means (18, 41) which can adjust a position of the auxiliary plate with respect to a position of the head support plate (15) is provided.
US07852357B2 Display apparatus, display method, display program, and recording medium with the display program for controlling display of at least a portion of a map
The present invention provides a display apparatus for zooming and displaying a portion of an object to be displayed on display means according to an instruction by a user and allowing scrolling a display portion for the object to be displayed. The display apparatus includes input means for accepting the instruction by a user, and control means for controlling a display of the object to be displayed on the display means so that zooming out of the display on the display means is started and then the zoomed out display is zoomed in to the original size according to the instruction by a user as a trigger. The control means stops the zooming out or zooming in the display when scrolling is instructed by the input means during a period from a point of time when the zooming out is started until a point of time when the zooming in is completed, and scrolls the display on the display means according to the instruction for scrolling.
US07852355B2 System and method for carrying out and visually displaying simulations in an augmented reality
The invention relates to a system and method inside an augmented reality system for visually displaying simulation results in a mixed virtual-real environment. The system and method permit one or more users to carry out simulation processes in the context of a real environment, particularly in the field of industrial automation systems and to visually display their static and dynamic results in the contest of the real environment. Processes running in the real environment are detected and synchronized with the simulation. A control unit enables a reciprocal influencing of real processes with the simulation. In addition, the user can control the execution of the simulation via a user interface.
US07852352B2 Information processing apparatus, method, and program
The present invention is capable of preventing the execution of a process, which a user does not intend to perform, when the position and size of each operation button image displayed on a screen are changed in accordance with a change in the aspect ratio of images. An aspect-ratio monitoring unit 51 monitors a change in the aspect ratio of moving images to be played back. A screen display control unit 52 controls a method for displaying moving images displayed on a display on the basis of the determined aspect ratio. A button display control unit 53 changes the size of each operation button to be displayed superimposed on the images displayed in the display. A sensitive area setting unit 54 sets an area (sensitive area) of a touch panel. An operation determining unit 55 determines which operation button is operated by the user. A command generating unit 56 generates a command signal corresponding to the determination by the operation determining unit 55 and outputs the signal to at least one appropriate part. The present invention can be applied to, e.g., camcorders.
US07852351B2 Multiplexed button data system
A method for displaying button data streams, comprising the steps of (A) reading two or more input button data streams from a disc, (B) multiplexing the two or more input button data streams to produce a multiplexed button data stream, (C) decoding the multiplexed button data stream into uncompressed button data information, and (D) displaying the uncompressed button data information in a video signal.
US07852350B2 Graphic antialiasing method and graphic system employing the method
An antialiasing method includes: providing a first fragment; computing a first coverage area representing a portion of the first fragment covered by a first primitive; providing a second fragment juxtaposed to the first fragment and at least partially covered by a second primitive; processing the first coverage area to obtain a corrected coverage area indicative of a visible first fragment portion resulting from the juxtaposition of the fragments; and applying an antialiasing procedure based on the corrected coverage area.
US07852347B1 Texture map pixel pairing optimization
The current invention involves new systems and methods for increasing texture filtering performance by reorganizing a texture sampling order used to read and filter texels when anisotropic filtering is used. Texel read performance is improved for anisotropic filtering by reorganizing texel reads when a texel cache is used. The texel reads are paired based on a major axis alignment in pixel space. The paired texel reads for a pixel footprint may also be ordered to improve texel coherency, thereby improving a texture cache hit rate.
US07852346B1 Programmable graphics processor for generalized texturing
A programmable graphics processor including an execution pipeline and a texture unit is described. The execution pipeline processes graphics data as specified by a fragment program. The fragment program may include one or more opcodes. The texture unit includes one or more sub-units which execute the opcodes to perform specific operations such as an LOD computation, generation of sample locations used to read texture map data, and address computation based on the sample locations.
US07852340B2 Scalable shader architecture
A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.
US07852339B2 Video composition optimization by the identification of transparent and opaque regions
According to some embodiments a method is provided to scan a first row of a display plane, determine that the first row of the display plane includes a non-transparent pixel, indicate the first row has a non-transparent pixel; and composite the first row of the display plane.
US07852337B2 Scalable property viewer for a massively parallel computer system
A method and apparatus for a scalable property viewer for a massively parallel computer system. The property viewer includes a graphical user interface to allow the user to view different properties of the computer system with several different types of views. The different views provide the user with both logical and graphical representations of the properties being monitored and allows the user to link between a logical and physical view of the system. The GUI provides the user with a convenient way to view the elements of a large system and determine elements that are different. Different properties could be placed together in the same view with different colors to allow the user to see the interaction of multiple properties.
US07852327B2 Display apparatus and control method thereof
The present invention relates to a display apparatus comprising a display panel; a controller to analyze input video data into frequency components, and create first and second video data different in the frequency component from each other on the basis of analyzed results; and a panel driver to drive the created first and second video data to be displayed in sequence as images on the display panel. Thus, the present invention provides a display apparatus and a control method thereof, in which first video data and second video data are created by analyzing a frequency component of input video data and output in sequence, thereby decreasing a motion blur through a simple operation without hardware change.
US07852326B2 Display method
A display method used for a display which has a backlight module suitable to provide more than M types of primary color lights, where M=3. The display panel of the display has an array of pixel regions. The display method provides these pixels regions to display multiple image data to be display in multiple frame times. Each of the image data includes (L1N, L2N, . . . , LMN) each representing the brightness of the M primary color light in each pixel region, where N is a positive integer. The backlight module sequentially provides M-1 primary color lights within any two successive frame times, so allow the image data to drive the pixel regions. The first and the Mth primary color lights provide the frame times for these two successive frame times.
US07852324B2 Process of integrating a digitizer input device in a display
A process for integrating digitizer sensor array into flat panel displays. The sensor array is formed on the side of the display element (e.g., LC layer or OLED layer) where the pixel control switches (e.g., thin film transistors (TFTs)) of the display module are present, or on the other side of the display element where the pixel control switches are not present. In particular, the sensor array may be formed (a) before planarization layer of the pixel control switches, (b) after forming the planarization layer of the pixel control switches, (c) prior to forming the pixel control switches (e.g., formed on the substrate, before or after forming an electrode on the substrate), and/or (d) formed above or below a color filter layer, e.g., in the case of an LCD module, or above or below the encapsulating layer, e.g., in the case of an OLED display module.
US07852321B2 Direction detection switch
An object of the present invention is to provide a direction detecting switch which can detect a key operation in every directions of 360 degree, can obtain an accurate click feeling, and can also detect a strength or a speed of the key operation.A direction detecting switch is comprised of a determining key arranged in a center portion; a ring key arranged so as to surround said determining key; a movable electrode arranged so as to be operative in accordance with an operation of the ring key; a fixed electrode arranged so as to face to said movable electrode; and a click operation body arranged in correspondence to said determining key, wherein a key top of said determining key and a ring key top of the ring key are arranged so as to be fixed onto a sheet-like rubber elastic member, wherein said click operation body is pressed in accordance with an operation of the determining key so as to open and close the contact point and is formed as a structure generating a click feeling, and wherein said click operation body is formed as a structure which detects a change of an electrostatic capacity generated between the movable electrode and the fixed electrode and converts the change into an electric signal so as to output, at a time of the pressing operation of the ring key in an optional direction of 360 degree, and a click feeling is always obtainable by pressing said click operation body.
US07852320B2 Information processing apparatus
According to one embodiment, an optical position detection IC outputs, in accordance with movement of an object on a detection area including a light-transmissive area which is disposed on a top surface of a housing. A control module controls a movement direction and a movement amount of a cursor, which is displayed on a display screen of a display device, based on an attitude signal which indicates in which of two directions the optical position detection IC is disposed, and movement amount information which is output from the optical position detection IC.
US07852319B2 Information processing apparatus and operation control method
According to one embodiment, an information processing apparatus includes a display unit. A display portion is provided in the display unit. An antenna is provided in the display unit and radiates radio waves. When the display unit is used in a usage pattern where the antenna is located in a side of the display unit which side is closest to a user, a controlling unit controls a direction of an image displayed on the display portion not to correspond to a direction of the display unit.
US07852313B2 Display device
A display device comprises a light source consisting of three emission elements, each of which emits light of different wavelength regions corresponding to the respective colors of red, green and blue, and a display module consisting of a display part wherein each pixel has two types of color filters that transmit red and green light and green and blue light, respectively. One frame of video signals is split during display to become two subframes and it is possible to alternately emit for each subframe green light, which is transmitted through both color filters, and red and blue light, each of which is transmitted through only one filter.
US07852312B2 System for controlling driving lamp of backlight unit
A liquid crystal display device including a liquid crystal display panel, a lamp for emitting light to the a liquid crystal display panel, a timing controller for generating a lamp control signal to control a light-on time of the lamp, and an inverter for controlling a light-on and a light-off of the lamp according to the lamp control signal while limiting current and maintaining power supplied to the lamp regardless of the light-on time for the lamp.
US07852310B2 Reflection type liquid crystal display apparatus and substrate for reflection type liquid crystal display
In order to provide a reflection type liquid crystal display apparatus where, even when the pixel size is small, the crosstalk between a signal line and an end of a capacitor can be decreased, thus resulting in a good output image, by forming a signal line 2 for transmitting an image signal to each pixel with a second metal layer, by placing a shield line 12 between a capacitor electrode 10 constituting a capacitor and the signal line 2 with a first metal layer, and by giving a fixed potential, shielding is provided to prevent occurrence of cross-talk. The capacitor is configured with a common electrode 11 and a capacitor electrode 10, having a diffusion layer formed on a semiconductor substrate. By placing the capacitor electrode having a diffusion layer formed on the semiconductor substrate and the common electrode having a fixed potential below the signal line, shielding is provided to prevent occurrence of cross-talk.
US07852306B2 Liquid crystal display device and method for driving the same
A liquid crystal display device and a method for driving the same are disclosed. The method includes storing image data of one frame in a memory, selecting an output order of the data stored in the memory and outputting the data in the selected output order in accordance with a selection signal, sequentially latching the output data from the memory in a plurality of data ICs to drive a plurality of data lines; and sequentially driving a plurality of gate ICs to drive a plurality of gate lines.
US07852304B2 Driving circuit, system, and method to improve uniformity of column line outputs in display systems
A driver circuit, display system, and method includes a driver circuit that provides driving signals to drive a plurality of display pixel elements arranged in a plurality of rows and columns and coupled to associated row and column lines, respectively. The driver circuit includes a plurality of driver units coupled to associated ones of the plurality of column lines, and a plurality of switching components respectively coupled between outputs of ones of the driver units coupled to adjacent ones of the plurality of column lines. The driver units control associated ones of the switching components to electrically couple the adjacent outputs of the driver units to make the outputs the same or substantially the same when display data signals received for pixel elements coupled to the adjacent column lines are the same.
US07852301B2 Pixel circuit
A pixel circuit has a light emitting diode, a driving transistor, a capacitor, a first switch, a second switch, a third switch, and a forth switch. The driving transistor has a drain, coupled to a second end of the light emitting diode. The capacitor is coupled between a gate of the driving transistor and the ground terminal. The third switch is coupled between the source and the gate of the driving transistor. The fourth switch is coupled between the second end of the light emitting diode and a data line. The first switch is off, the second is on, and the third is on during the reset period; the first switch is off, the second is off, and the third is on during the programming period; and the first switch is on, the second is on, and the third is off during the display period.
US07852299B2 Active-matrix device
A display device includes a driving transistor for supplying driving current to a display element; a first switch connecting the driving transistor to a corresponding data line; a second switch selectively connecting a control electrode of the driving transistor to one of two main electrodes of the driving transistor; and a third switch connecting the driving transistor to the display element in one pixel. The first switch is controlled by a first control line. The second and third switches each include two switching elements connected in series controlled by the first control line and a second control line, respectively. Four functions of writing of data in the pixel, light emission of the display element by supplying current, non-light emission of the display element, and examination of the pixel operation can be switched using the two control lines.
US07852298B2 Method and system for driving a light emitting device display
A method and system for driving a light emitting device display is provided. The system provides a timing schedule which increases accuracy in the display. The system may provide the timing schedule by which an operation cycle is implemented consecutively in a group of rows. The system may provide the timing schedule by which an aging factor is used for a plurality of frames.
US07852297B2 Display device
To provide a display device capable of allowing a light emitting element to emit light with a constant luminance while being free of an influence of deterioration over time and capable of accurate gradation display and high-speed writing of signal current to each pixel as well, in which an influence of noise causing leak current etc. is suppressed, and a driving method therefor. According to the present invention, plural pairs of switch portion and current source circuit are provided. Each of the plural switch portions is controlled in its switching operation according to a digital video signal. When the switch portion turns on, the current source circuit corresponding to the switch portion supplies current to allow the light emitting element to emit light. The current supplied from one current source circuit to the light emitting element is constant and a value of current flowing into the light emitting element corresponds to the total value of currents supplied to the respective light emitting elements from all the current source circuits corresponding to the switch portions in a conductive state.
US07852295B2 Plasma display device and method of driving the same
A plasma display device including a first electrode, a second electrode, and a third electrode crossing the first electrode and the second electrode is disclosed. A plurality of first sustain pulses are applied to the first electrode and a plurality of second sustain pulses are applied to the second electrode during a sustain period of a first subfield. A voltage at the first electrode gradually decreases from a third voltage to a fourth voltage after the voltage at the first electrode gradually increases from a first voltage to a second voltage, during a sub-reset period of a second subfield being consecutive to the first subfield. The plurality of second sustain pulses includes a first group and a second group, the second group includes the last one of the second sustain pulses, and a second sustain pulse of the second group has a different characteristic (e.g., pulse width) from a second sustain pulse of the first group.
US07852293B2 Plasma display apparatus and driving method thereof
A plasma display apparatus is disclosed. The plasma display apparatus includes a plasma display panel including first and second scan electrode groups, a voltage supply unit supplying a scan bias voltage and a scan voltage, first and second charge delay units that receive the scan bias voltage from the voltage supply unit and supply the scan bias voltage to the first and second scan electrode groups, first and scan signal supply units, and first and second voltage return units. The first scan signal supply unit receives the scan voltage, supplies a scan signal, of which a lowest voltage is the scan voltage, to one scan electrode belonging to the first scan electrode group, and allows the other scan electrodes to be floated.
US07852289B2 Plasma display panel driving circuit and plasma display apparatus
A PDP driving circuit is comprised of a power recovery unit for recovering an electric power from a capacitive load by resonance operation with PDP which is the capacitive load Cp, and reusing the recovered power. The power recovery unit includes a recovery inductor for resonating with the capacitive load, a recovery switch element for connecting the recovery capacitor to the capacitive load and recovery inductor, and forming a channel for passing resonance current, a counterflow preventive diode for blocking flow of current in the recovery switch element in reverse polarity direction, and a protective diode for forming a closed current channel including the recovery inductor and recovery switch element when the counterflow preventive diode is changed from ON state to OFF state.
US07852287B2 Plasma display panel exhibiting excellent luminescence characteristics
Technology that enables writing in a PDP to be conducted effectively, even when a time period of the writing is shortened. In a PDP driven by a method in which a write discharge is selectively generated in a plurality of cells by applying a scan pulse sequentially to a plurality of first electrodes and a data pulse selectively to a plurality of third electrodes in a write period, the technology provides for a write auxiliary discharge to be generated at least in a cell selected for writing or in a vicinity of the selected cell when the scan pulse is applied in the write period, the write auxiliary discharge being smaller in magnitude than the write discharge. The write auxiliary discharge results in the generation of priming particles in or in a vicinity of the selected cell, and these priming particles facilitate the generation of a write discharge in the selected cell. Consequently, the occurrence of defective writing is reduced and effective writing can be conducted, even when a width of the scan pulse is shortened.
US07852286B2 Data driver and organic light emitting display device using the same
A data driver to display an image with desired brightness, and an organic light emitting display device using the same. The data driver includes a register to temporarily store external data; a voltage digital-analog converter to generate a data voltage corresponding to the data stored in the register part; a current digital-analog converter to generate a data current corresponding to the data stored in the register part; a buffer part to supply the data voltage as a data signal to pixels via a data line; a data control unit to receive a pixel current corresponding to the data voltage from the pixel via the data line and to control a digital value of the data stored in the register part; and a selection unit to selectively couple the data line with either of the buffer part or the data control unit.
US07852277B2 Circularly polarized horn antenna
In some embodiments, a circularly polarized horn antenna may include a circular polarizer having a step shape. In some embodiments, a circularly polarized horn antenna may include a choke that is offset in position with respect to the antenna aperture. Such antennas may have a relatively constant beamwidth with respect to frequency, compact size, and/or low weight.
US07852276B2 Orientation-independent antenna (ORIAN)
An orientation-independent antenna presents a circular polarization characteristic to incoming waves such that these waves are detected regardless or polarization and angle of arrival. The antenna includes crossed vertical loops and a horizontal loop, with the loops being phased to provide the circular polarization characteristic. In one embodiment, the antenna includes a number of elements on the faces of a cube, or the elements are positioned on the surface of a sphere. In another embodiment, the antenna is given both a right hand circular polarization characteristic and a left hand circular polarization characteristic in two different channels to provide for double the data throughput.
US07852273B2 Display device
A plurality of antennas are arranged on the fringe of a monitor supported by a device body such that the antennas are located in a floating manner from a display surface and the central axis of these directional patterns is disposed in a vertical direction to the display surface; these antennas are enclosed within the outer frame; and further electroconductive members reflecting electric waves are located away from the antennas, to thus establish a virtual GND plane to be formed on the rear of an antenna.
US07852265B2 Wireless area network compliant system and method using a phase array antenna
A wireless area network communication system comprising at least one phased array antenna frame, a phased array antenna circuit connected to the at least one phased array antenna frame wherein said phased array circuit and said at least one phased array antenna frame are adapted to transmit and receive wireless area network compliant signals from or to wireless area network devices.
US07852264B2 Systems and methods for fast GNSS signals acquisition
Systems and methods for acquiring global navigation satellite system (GNSS) signals. An incoming signal is multiplied with a time shifted spreading code replica and converted to zero (or very low) nominal frequency. The converted signal is filtered and downsampled by a large scale. A signal power metric and frequency offset are then determined. This is performed over multiple slices. Fast acquisition is achieved by parallel concatenation of numerous slices.
US07852263B2 Method for transmitting satellite data
In a method for transmitting satellite data of a global navigation satellite system each satellite transmit position data of neighboring satellites to a navigation device on the earth. The subset of neighboring satellites with respect to a specific satellite is determined by averaging over a period of the inter-satellite distance. The subsets are further restricted to the condition that all visible satellites are referenced by the position data of at least one other satellite. This requirement can be met by choosing appropriate permutations among the satellites with shortest distance.
US07852258B2 Method and system for reducing power loss of transmitted radio wave through cover
In a power-loss reducing system, a transmitting unit causes a radar to transmit a measurement radio wave, and a power monitoring unit monitors power of the measurement radio wave transmitted from the radar through a cover while changing a positional relationship between the cover and the radar. An extracting unit extracts a value of the changed positional relationship between the cover and the radar based on a result of the monitoring of the power such that the extracted value of the positional relationship allows reduction of power loss of a radar wave transmitted, through the cover, from the radar located based on the extracted value of the positional relationship.
US07852250B2 Digital to analog converter
This invention discloses a digital to analog converter (DAC) for converting a digital signal with a predetermined number of bits to a corresponding analog signal, the DAC comprises a first current source element having a first control signal, the first control signal controlling the conduction current provided by the first current source element, and a second current source element having a second control signal, the second control signal controlling the conduction current provided by the second current source element, wherein the first and the second control signals have different voltages during operation of the DAC.
US07852246B2 Analogue/digital converter device
In a scanning mode: a conversion sequence setting register sets the sequence in which analogue signals are to be converted; a multiplexer selects a single analogue signal sequentially from a plurality of analogue signals, in accordance with the order that is set in this conversion sequence setting register; an A/D converter converts the analogue signal selected by this multiplexer to a digital signal; a conversion result register having a plurality of result registers stores the digital signal obtained by conversion by the A/D converter in these storage regions in the order in which conversion was effected; and a back-up register includes result registers respectively corresponding to this plurality of result registers.
US07852234B1 Cross-walk safety lighting with multiple enhanced flash rate
An apparatus and method for controlling cross-walk boundary lighting, such as multiple flush-mounted lights on the boundary, or boundaries, of a cross-walk. Enhanced flashing patterns are output in a primary output to drive cross-walk lighting to produce a different output pattern with each cross-walk activation. Enhanced flashing patterns comprise the output of multiple pulses of light (e.g., 2 to 5) with various pulse widths and timing during the ON portion of the light cycle. Selection is performed from a plurality of enhanced flashing patterns retained within a cross-walk lighting controller. One or more secondary outputs are configured to generate other patterns, in particular an output with a field selectable relationship and synchronization to the primary pattern, such as a matching pattern, a non-enhanced version, a non-enhanced complementary pattern, or a solid output for as long as the primary output is active.
US07852231B2 Electrical control system
An electrical control system includes one or more master devices that are adapted to control the operation of one of more slave devices. The master and the slave devices are operably coupled by at least one radio frequency communication interface. The master devices are adapted to assign the slave devices to a delayed off mode of operation, define a time delay associated with each slave device, and activate the delayed off mode of operation. The slave devices include manually operated switches and are operably coupled to corresponding loads. During the delayed mode of operation, each slave device is adapted to delay a transition for the corresponding load from on to off by the time delay associated with the particular slave device.
US07852230B2 Method of communication and home automation installation for its implementation
The method of communication is intended to be implemented in a home automation installation for motorized maneuvering of a moveable element for closure, for privacy or for solar protection or of a screen including a master unit and at least one slave unit linked to an electrical device, the master unit and the slave unit or units being connected to an information transmission bus. The slave unit responds to a message emitted by the master unit for the duration of emission of this message.
US07852229B1 Excavation equipment alarm system
An excavation equipment alarm system for providing advance warning to an operator of an excavator of overhead obstacles. The excavation equipment alarm system generally includes a support member attached to the actuator, a guide tube attached to the support member, a guide arm slidably positioned within the guide tube, a mounting post attached to a distal end of a telescoping arm of the actuator and to the guide arm, and a magnetic sensor attached to the actuator to detect a distal end of guide arm. If the magnetic sensor detects the presence of the guide arm, then the warning unit is not activated. If the magnetic sensor no longer detects the presence of the guide arm, then the warning unit is activated to warn the operator of the excavator that the boom of the excavator may be at an unsafe height.
US07852221B2 RFID devices using RFID circuits and antennas having unmatched frequency ranges
An RFID system in which RFID devices utilize RFID circuits and antennas having unmatched frequency ranges. The system includes an RFID interrogator having multiple interrogator antennas. Each interrogator antenna can be tuned to different respective frequency ranges. The system includes an RFID device having an RFID circuit, and device antennas coupled to the RFID circuit. Each device antenna can be tuned to a respective frequency range that matches only one of the interrogator antennas for communicating with the RFID interrogator according to respective protocols associated with each respective frequency range.
US07852219B2 Container manifest integrity maintenance system and method
Container manifests are tracked using a radio frequency identification (RFID) contents reader affixed to a container in which a plurality of RFID-tagged items are disposed, the contents reader being configured to collect and store identification information from all of the tagged items; and using an active RFID tag emulator affixed to the container which responds to an external reader activation code by receiving the collected information from the affixed RFID contents reader, and by transmitting the identification information to the external reader.
US07852218B2 Finding and packing travel articles
A system and method for locating one or more travel articles for packing, out of a plurality of travel articles. A transponder having a unique locator tag is disposed on each travel article that can be potentially selected for packing. A user or computer selects one or more travel articles for packing using an article tracking unit. Article tracking unit communicates a ping signal to a transponder that is associated with a selected travel article for packing. Upon receipt of the ping signal, a transponder controller activates an indicator, such as an aural or visual cue. The activated indicator assists a user in locating the travel article that is associated with the activated indicator. Once the selected travel article for packing is located and packed in a travel container, the indicator is deactivated.
US07852215B2 Magnetic tag that can be activated/deactivated based on magnetic microwire and a method for obtaining the same
The invention refers to a magnetic tag that can be activated/deactivated, formed by at least two components based on magnetic microwire, characterized in that: the first component comprises a first array of soft magnetic microwire segments (1) with a bistable magnetic behaviour, said segments arranged in a substantially aligned manner in a direction parallel to the axial direction of the microwire, and the second component comprises a second array of hard magnetic microwire segments (2), said hard magnetic microwire segments preferably being of substantially the same length, and are arranged equidistantly from each other and substantially aligned in a direction parallel to that of the first component. The invention also refers to a method for obtaining a tag that can be activated/deactivated based on magnetic microwire.
US07852210B2 Motion detector for detecting tampering and method for detecting tampering
A motion detector for detecting a tampering within a detection zone. A vibration-sensing unit sensitive to vibrations applied to the detector is provided to produce a vibration output signal representative of a detected parameter of the vibrations. A light-sensing unit sensitive to light in a predetermined spectrum is provided to produce a light output signal representative of a detected parameter of the light in the predetermined spectrum. A processing unit is further provided to determine if the vibration output signal is consistent with a predetermined model indicative of a tampering and producing an activating signal accordingly.
US07852209B2 Intelligent occupancy monitoring using premises network
An identification system combines RF identification tags with ambient condition detectors of a monitoring system. The tags could be carried by individuals in the region(s) being monitored to provide occupancy feedback to first responders in the event of an alarm condition.
US07852199B2 Security configuration with an inductively coupled touch sensitive keypad in or on a window pane and motor vehicle with the security configuration
A security configuration in or for a motor vehicle, which includes a bodywork part, such as a door, and a window pane arranged in the bodywork part. The security configuration includes a touch-sensitive keypad integrated in or mounted to the window pane. The keypad has a plurality of touch sensors, each of which takes the form of resonant oscillating circuits and via which an actuation of a respective touch sensor can be picked up. An electronic evaluation system is configured for the purpose of detecting an actuation of the keypad and attributing said actuation to a respectively actuated touch sensor. There is also provided a motor vehicle which includes such a security configuration.
US07852194B2 Vehicle electronic key system
To ensure a perform authentication based on a request signal Sr which is the authorized radio signal even under a bad radio environment in which radio noise comes continuously. A portable device receives a request signal Sr transmitted from a vehicle-mounted device and transmits an answer signal including a receiving-sensitivity changing switch for changing a receiving sensitivity of a receiving circuit which receives the request signal Sr. As a result, even if the authentication cannot be carried out with normal receiving sensitivity due to the influence of the continuous radio noise, by changing the receiving sensitivity to low sensitivity, and by bringing the portable device physically close to a transmission source of the request signal which is the authorized radio signal, it is possible to dramatically increase the probability that the authentication based on the authorized radio signal can be carried out.
US07852192B2 Protective circuit board and overcurrent protection device thereof
The over-current protection device of the present invention can be used for over-current protection to PCM. The over-current protection device comprises a PTC device, at least one insulation layer; at least one electrode layer and at least one conductive channel. The insulation layer is placed on a surface of the PTC device, and the electrode layer is formed on the insulation layer afterwards. As a result, the insulation layer is between the electrode layer and the PTC device. The electrode layer serves as a surface of the over-current protection device. The conductive channel electrically connects the PTC device and the electrode layer. In an embodiment, the conductive channel is a blind hole penetrating through the electrode layer and the insulation layer and ending at the surface of the PTC device, and the surface of the blind hole is coated with a conductive layer to electrically connect the PTC device and the electrode layer.
US07852191B2 Sensor and manufacturing method thereof
A plate member 101 having flexible portions; plate members 102 to 104 having openings corresponding to the flexible portions of the plate member 101; a plate member 201 having flexible portions; and plate members 202 to 204 having openings corresponding to the flexible portions of the plate member 201 are formed by etching. The plate members 101 to 104 and 201 to 204 are bonded by diffusion bonding process to make first and second flanges 100 and 200. Interconnecting shafts are formed by cutting. The first and second flanges 100 and 200 and the interconnecting shafts are bonded by diffusion bonding process to make a strain generation unit 5. Strain gauges are attached to the lower face of the strain generation unit 5. A stain gauge type sensor 1 is thus made.
US07852188B2 Transformer
A transformer includes primary and secondary windings coupled electromagnetically to each other and wounded respectively around primary and secondary winding portions of a bobbin unit, and a core unit mounted to the bobbin unit and including first and second core parts that form a magnetic circuit path. The first core part includes insertion and extension segments extending from a connecting segment. The second core part includes insertion and extension segments, and an adjusting segment extending from a connecting segment toward the first core part. The extension segments of the first and second core parts contact each other. The insertion segments of the first and second core parts extend respectively through the primary and secondary winding portions to contact each other.
US07852185B2 On-die micro-transformer structures with magnetic materials
A transformer integrated on a die, the transformer comprising a set of conductive lines formed on the die within one layer and interconnected among each other so that no two lines belonging to any one winding are nearest neighbors. The set of conductive lines is surrounded by a magnetic material, which may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. The transformer may be operated at frequencies higher than 10 MHz and as high as 1 GHz, with relatively low resistance and relatively high magnetic coupling between the windings.
US07852184B2 Coil module apparatus
A coil module apparatus is provided. The coil module apparatus includes a flat coil, a circuit board, a magnetic sheet, connection terminals, and a case. The flat coil has a flat shape. The circuit board is used for the flat coil. The magnetic sheet is provided so as to cover one surface portion of the flat coil. The connection terminals are provided for connecting the flat coil and the circuit board. The case encloses the flat coil, the circuit board, and the magnetic sheet and encloses the connection terminals so that the connection terminals are partly exposed.
US07852181B2 Package or support for an electrical device
An electrical device has a battery, a load, wiring connecting the battery to the load, and a switch in the wiring closable by a magnetic field to energize the load from the battery. It is enclosed in a package or support having an envelope surrounding the electrical device, a magnet shiftable on the envelope between an on position juxtaposed with and actuating the switch and an off position spaced from and not actuating the switch, and a spring urging the magnet into the off position.
US07852180B2 Method for producing breaker pole parts for low-voltage, medium-voltage and high-voltage switchgear assemblies, and breaker pole part itself
The disclosure relates to a method for producing circuit-breaker parts and plastic components for low, medium and high-voltage switching stations and to a corresponding circuit-breaker part. To obtain a simpler method of production with a higher variance of material characteristics, the outer insulation sleeve is produced in a plastic injection molding method, in which a vacuum interrupter chamber is sheathed in plastic.
US07852172B2 High-power switch
A low-loss Radio Frequency (RF) switch for high-power RF signals. The RF switch includes a first-biasing circuit connected to a first transistor and a second-biasing circuit connected to a second transistor. The RF switch switches its output signal between a first input signal and a second input signal. The first transistor is in a conduction state and the second transistor is in a non-conduction state when the first input signal is to be conducted to the output signal. The first-biasing circuit biases the first transistor at a first voltage for increasing conduction of the first input signal and the second-biasing circuit biases the second transistor at a second voltage for decreasing conduction of the first input signal. Moreover, the second transistor is in a conduction state and the first transistor is in a non-conduction state when the second input signal is to be conducted to the output signal.
US07852166B2 Relaxation oscillator for compensating system delay
A relaxation oscillator compensates for system delay. The relaxation oscillator includes first and second input signal units that generates first and second capacitor voltages, a delay compensation unit that receives a reference voltage and the first and second capacitor voltages and that generates a compensation voltage. In certain embodiments, a voltage generating unit applies the reference voltage to the delay compensation unit, and a latch unit stores first and second comparison signals compared by the first and second input signal units and transmits a clock signal and a inverted clock signal to the first and second input signal units. The first and second input signal units compare the first and second capacitor voltages with a compensation voltage transmitted from the delay compensation unit.
US07852164B2 Piezoelectric oscillator
A piezoelectric oscillator includes: a piezoelectric resonator; an oscillation circuit including a variable resistance circuit and a transistor for oscillation; a constant current circuit, the constant current circuit including a first current mirror circuit, and a current control circuit having an output terminal and controlling a current flowing in the first current circuit so as to enable an output current of the constant current circuit to be adjusted, the output terminal of the first current mirror circuit being coupled to at least one of a collector and a base of the transistor for oscillation with the variable resistance circuit; and a control circuit coupled to the current control circuit and the variable resistance circuit, the control circuit controlling the current control circuit and a resistance value of the variable resistance circuit.
US07852162B2 Pseudo random noise device based on a random frequency modulated oscillator
Random number generators are used for entertainment in gambling, lotteries and video gaming devices. True Random Number Generators, as are now currently defined, must be actuated by a physical noise source, typically based on the uncertainty of the phase differences of a stable and an unstable autonomous oscillator. In this invention an autonomous random frequency modulated oscillator driven by a self contained pseudo-random number generator outputs three loosely correlated random binary streams. Included in the invention is a hardware method for proving wandering phase differences and also the existence of a colored random distribution of concatenated nibbles.
US07852154B2 High precision follower device with zero power, zero noise slew enhancement circuit
A high performance follower device coupled with a slew enhancement circuit includes an amplifier circuit containing a follower device connected to a three-terminal device, whereupon current drawn through the three-terminal device is amplified through a current amplifier and sent to the source terminal of the follower device to stabilize the output voltage when the input signal is changed rapidly or if the output voltage is disturbed by a changing output load. The presence of a cascode device also allows for the bootstrapping of the follower device.
US07852153B1 High efficiency linear microwave power amplifier
A post-distortion method for cascading amplifier stages in a two-stage microwave power amplifier and a dynamic biasing method using back-end processing for correcting nonlinearity in the power amplifier output. A first or driver stage biased in a near-A region with low distortion is cascaded with a second or power stage biased in a near-C region with high efficiency. The amplitude and phase responses of the two stages compensate another to yield a more linear overall gain for the overall power amplifier. The dynamic biasing scheme modulates the source to drain voltages of the transistors used in the amplifier stages based on the harmonics in amplifier output in order to minimize the harmonics and correct non-linearity in the output.
US07852149B1 Quadrature envelope elimination and restoration (EER) amplifier
The present invention is a system for amplifying a signal input. The system may include a signal separator. The signal separator may be configured for receiving the signal input and separating the signal input to form a first component, a second component, a third component, and a fourth component. The system may further include a first modulator. The first modulator may be configured for being connected to the signal separator and may be further configured for receiving and amplifying the first component to form a first modulator output. The system may further include a second modulator. The second modulator may be configured for being connected to the signal separator and may be further configured for receiving and amplifying the second component to form a second modulator output.
US07852148B2 Method of forming a sensing circuit and structure therefor
In one embodiment, a sensing circuit includes a sense transistor and a compensation circuit to improve the accuracy of a sensing signal formed by the sensing circuit.
US07852144B1 Current reference system and method
A relatively precise and accurate current reference system and method are described. The present current reference system and method facilitate realization of relatively high accuracy and precision in current references independent of process, voltage and temperature (PVT) variations. In one embodiment, a current reference system includes an opamp (operational amplifier), a first transistor and second transistor, a first resistor and a second resistor of different temperature coefficients, and a third transistor and fourth transistor. The opamp indicates and corrects the potential difference between a first branch and a second branch. The first transistor and second transistor mirror currents in the first branch and the second branch. The first resistor and a second resistor of different temperature coefficients cause voltage drops across them in a manner that compensates for PTAT variations. The third transistor and fourth transistor provide voltages between respective bases and emitters.
US07852137B2 Normally-off electronic switching device for on-off control of electric circuit
A device capable of bidirectional on-off switching control of an electric circuit. Included is a normally-on HEMT connected between a pair of terminals of the device. A normally-off MOSFET of relatively low antivoltage strength is connected between the HEMT and one of the pair of terminals, and another similar MOSFET between the HEMT and the other of the terminal pair. A diode is connected in inverse parallel with each MOSFET, and two other diodes are connected between the gate of the HEMT and the pair of terminals respectively. The switching device as a whole is normally off.
US07852136B2 Bias network
A network having a current mirror comprising: a output transistor having a gate electrode for controlling a first current between a first electrode and a second electrode, the first electrode being coupled to a positive reference potential and the second electrode being connected to ground. A second transistor has a gate electrode for controlling a second current between a first electrode and a second electrode of the second transistor. The gate electrodes are connected together to produce the first current and the second current with equal current densities. A first portion of current from a current source is fed to the first electrode of the second transistor and a second portion of current from the current source is fed to a bias voltage producing circuit producing a bias voltage at the gate electrode of the output transistor for tracking variations in the first current passing through the output transistor.
US07852134B2 Circuit for controlling pulse width of auto-refresh signal and circuit for generating internal row address for auto refresh
A circuit for controlling a pulse width of a refresh signal is provided. The circuit includes a first pulse width controller for receiving a first refresh signal having a first enable period, and generating a second refresh signal having a second refresh signal, and a second pulse width controller for receiving the second refresh signal, and generating a third refresh signal having a third enable period.
US07852133B2 Phase-locked loop (PLL) having extended tracking range
A method for extending a tracking range of a PLL includes the steps of: establishing an initial tracking window of the PLL, the tracking window having a first width associated therewith; and dynamically adjusting the tracking window of the PLL within an extended tracking range when a frequency of an input signal supplied to the PLL is outside of the tracking window, the extended tracking range having a second width associated therewith which is greater than the first width.
US07852126B2 Transmission apparatus and method
A pre-emphasis circuit to emphasize edges of transmission data is controlled in correspondence with the result of analysis of the transmission data.
US07852123B1 Reset-free comparator with built-in reference
A comparator circuit includes a bias stage, a first current source, a second current source, and a comparator stage. The bias stage includes a first input, a second input, an output that generates a bias voltage, and a first load, wherein differential reference voltages are applied to the first and second inputs. The first current source generates a bias current based on the bias voltage and inputs the bias current to the bias stage. The second current source generates the bias current based on the bias voltage. The comparator stage communicates with the second current source and includes a first input, a second input, and a second load, wherein differential input voltages are applied to the first and second inputs of the comparator stage. The comparator circuit compares the differential input voltages to the differential reference voltages based on the bias current, the first load, and the second load.
US07852121B2 Domino logic circuit and pipelined domino logic circuit
A domino logic circuit includes an input circuit and an output circuit. The input circuit precharges a dynamic node at a first phase of a clock signal. The input circuit determines a logic level of the dynamic node by performing a logic evaluation of input data at a second phase of the clock signal. The output circuit is coupled between an output node and the dynamic node. The output circuit determines a logic level of the output node in response to the clock signal and the logic level of the dynamic node. The output circuit maintains the logic level of the output node while the logic evaluation is performed.
US07852120B2 Bi-directional buffer for open-drain or open-collector bus
Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.
US07852118B2 High speed conditional back bias virtual ground restoration circuit
A conditional level shifter circuit is used to substantially eliminate sneak current from occurring in an integrated circuit device having two or more logic circuit modules in different voltage domains. Sneak current is caused when a signal between the two or more logic circuit modules in different voltage domains is at logic “0” and one of the logic circuit modules is biased at a voltage level above the true ground, VSS, of the integrated circuit device. The conditional ground restoration circuit shifts the virtual ground logic “0” to the true ground level. This eliminates sneak current and logic level corruption.
US07852117B1 Hierarchical interface for IC system
An integrated circuit includes an auto-bridging architecture including a first phases block that interfaces to a first user block having a first user signal domain. The first phases block converts the first user signal domain to a common signal domain. A second phases block coupled to the first phases block interfaces with a second user block having a second user signal domain. The second phases block converts the second user signal domain to the common signal domain so that the first user block cooperates with the second user block through the auto-bridging architecture of the IC.
US07852111B2 Semiconductor device and impedance adjustment method of the same
A 4-bit counter outputs a 4-bit counted value CNTp based on an up-and-down signal Sp supplied from a comparator. A weighting selection circuit performs weighting based on a deviation from an average value of the DC characteristic of each PMOS transistor, and assigns a transistor having the smallest deviation to Bit 1 (LSB) of the 4-bit counter. The weighting selection circuit assigns two PMOS transistors to Bit 2 of the 4-bit counter, four PMOS transistors to Bit 3, and eight PMOS transistors to Bit 4 (MSB). Then, the weighting selection circuit selects transistors P3-1 to P3-30 based on the counted value CNTp output from the 4-bit counter.
US07852110B2 Controlling the slew-rate of an output buffer
An output buffer provided according to an aspect of the present invention is designed to generate an output signal with a slew rate that is substantially independent of the threshold voltage of transistors contained within. An output buffer provided according to another aspect of the present invention provides output signals with different slew rates depending on the magnitude of the load capacitance at the output node of the output buffer.
US07852109B1 Method and apparatus for supplying a clock to a device under test
A method and apparatus involves operating a circuit having a test circuit interrupt input terminal (INTERRUPT), having a test circuit clock output terminal (DUT_CLK), and having first and second operational modes. In the first operational mode the circuit supplies a test circuit clock signal to the test circuit clock output terminal. The circuit responds to receipt of an occurrence of a test circuit interrupt at the test circuit interrupt input terminal by then operating in the second operational mode. In the second operational mode the circuit refrains from supplying the test circuit clock signal to the test circuit clock output terminal.
US07852108B1 Single event upset resilient programmable interconnect
In one embodiment of the present invention, a programmable interconnect circuit is provided. The programmable interconnect circuit includes first and second static random access memory cells, each having a first output and a second output. The second output is an inversion of the first output. First and second pass gates are each coupled to one of the first and second outputs of the respective first and second memory cells. First and second lock-state circuits are coupled to the respective first and second memory cells. In response to a configuration status signal and the first output of one of the memory cells being asserted to a low voltage, the respective lock-state circuit is configured to maintain the one of the outputs of the respective memory cell at the low voltage.
US07852106B2 Method and apparatus for ballistic single flux quantum logic
In one embodiment, the disclosure relates to a single flux quantum (SFQ) signal transmission line powered by an AC power source. The AC power source supplies power to a transformer having a primary winding and a secondary winding. The primary winding receives the AC signal and the secondary winding communicates the signal to the SFQ transmission line. The transmission line can optionally include an input filter circuit for receiving the incoming SFQ pulse. The filter circuit can have a resistor and an inductor connected in parallel. In an alternative arrangement, the filter circuit can comprise of an inductor. A first Josephson junction can be connected to the filter circuit and to the secondary winding. The Josephson junction triggers in response to the incoming SFQ pulse and regenerates a pulse signal in response to a power discharge from the secondary winding.
US07852099B1 Frequency trimming for internal oscillator for test-time reduction
An internal precision oscillator (IPO) is trimmed within a microcontroller integrated circuit. The microcontroller integrated circuit receives a test program into flash memory on the microcontroller integrated circuit from a tester. The microcontroller integrated circuit also receives a reference signal from the tester. The IPO generates a clock signal having a frequency that depends upon a trim value. A general purpose timer on the microcontroller integrated circuit counts the number of cycles of the clock signal during a time period defined by the reference signal and outputs a digital value. A processor on the microcontroller integrated circuit executes the test program, reads the digital output, and adjusts the trim value such that the frequency of the clock signal is calibrated with respect to the reference signal. Test-time on the tester is reduced because the decision making during the frequency trimming process is made by the processor instead of the tester.
US07852094B2 Sharing resources in a system for testing semiconductor devices
Probes in a plurality of DUT probe groups can be connected in parallel to a single tester channel. In one aspect, digital potentiometers can be used to effectively switch the tester channel from a probe in one DUT probe group to a probe in another DUT probe group. In another aspect, switches in parallel with a resistor can accomplish such switching. In yet another aspect, a chip select terminal on each DUT can be used to effectively connect and disconnect internal DUT circuitry to the tester channel. Multiple DUT probe groups so connected can be used to create different patterns of DUT probe groups for testing different patterns of DUTs and thus facilitate sharing tester channels.
US07852086B2 Arrangement to correct eddy currents in a gradient coil
In an arrangement to correct eddy currents in a gradient coil of a magnetic resonance apparatus, the gradient coil having a primary gradient sub-coil and a secondary gradient sub-coil connected in series with the primary gradient sub-coil, the secondary gradient sub-coil is coupled with the primary gradient sub-coil such that the same magnitude gradient current flows through both (but in different directions) in order to compensate for magnetic field distortions of the primary gradient sub-coil. The primary gradient sub-coil has a first impedance while the secondary gradient sub-coil has a second impedance. A tuning impedance is connected in parallel with at least one of the two impedances.
US07852083B2 Magnetic resonance imaging apparatus and gradient magnetic field coil
An MRI apparatus excellent in magnetic field generation efficiency is provided. According to this invention, a main coil (52) of a gradient magnetic field coil (13) is partially recessed to reduce the total thickness of a radio-frequency coil (11) and a gradient magnetic field coil (13). That is, the main coil (52) is designed in a tubular shape, and the diameter r1 at the center portion of the imaging space is larger than the diameter r2 of the main coil end portion. Accordingly, the RF coil (11) can be disposed to be near to the gradient magnetic field coil (13) side without lowering the magnetic field generation efficiency.
US07852081B2 Method and control device for position determination of acquisition devices for a magnetic resonance system
In a method and a corresponding control device for automatic position determination in at least one spatial direction of at least two acquisition devices, wherein more acquisition devices than acquisition channels are present, a position measurement for one of the acquisition devices is implemented with an acquisition channel in a first step and a position measurement for another of the acquisition devices with the same acquisition channel is implemented in a second step. The position of the respective acquisition devices is determined based on these position measurements.
US07852076B2 Magnetic resonance apparatus utilizing time-varying rate of magnetic resonant frequency
The present invention provides a magnetic resonance imaging system capable of performing spectrum measurement even when a magnetic resonant frequency changes during MRS measurement. A time-varying rate of a water magnetic resonant frequency is measured in advance before the MRS measurement. The amount of change in water magnetic resonant frequency during the MRS measurement is predicted from the measured time-varying rate. With the predicted value as the reference, a transmission frequency of an RF magnetic field irradiated in a signal suppression pulse sequence, a transmission frequency of an RF magnetic field for excitation and inversion and a received frequency at the detection of a magnetic resonance signal in a sequence of the MRS measurement are respectively set. A high-precision spectrum measurement is hence enabled.
US07852075B1 Magnetic resonance imaging using adaptive phase encoding gradient
Through modification of the phase-encoding gradient, a method and apparatus increases the effectiveness of a Magnetic Resonance Imaging (MRI) device by decreasing scan time without noticeably decreasing the signal-to-noise ratio. In an MRI device, a patient is subjected to a constant magnetic field, and then radio frequency (RF) pulses are used to excite the nuclei in the patient's body. The nuclei release a corresponding RF signal as the nuclei relax, which can be measured and mapped into a visual display. The RF pulses used to excite the nuclei in the body cooperate with a slice select gradient and a phase-encoding gradient. When the phase-encoding gradient is indexed and prioritized according to contribution to image quality, then phase-encoding values with little or no contribution to image quality need not be acquired but may be replaced with randomized system noise, thereby decreasing total scan time without reducing the signal-to-noise ratio.
US07852074B2 Apparatus and method for measuring cased hole fluid flow with NMR
A method and apparatus useful to determine characteristics of fluid flow, such as fluid holdup and flow velocity. The apparatus comprises a flow tube, a permanent magnet, a first set of coils, and a second set of coils. The first set of coils creates a radio frequency magnetic field within the flow tube with a series of refocusing pulses. The second set of coils encodes velocity information onto the fluid molecules using rotating frame zeugmatography that is later decoded and used to estimate the fluid flow velocity.
US07852070B2 GMR sensor device having AC power supply
A highly accurate displacement sensor using GMR elements for detecting displacement of a physical quantity such as angle provides a diminished waveform distortion of output voltage. At least two Wheatstone bridge circuits having a predetermined angular offset are installed, with each bridge circuit including a plurality of GMR elements. Each of the GMR elements has a fixed magnetic layer set to a predetermined magnetization direction. An AC power supply is used, and displacement of a physical quantity, such as a rotational angle, is detected on the basis of AC-modulated outputs from the bridge circuits.
US07852069B2 Rotary angle detector
An angle detector including an annular stator board (1); a plurality of stators (5) provided on the annular stator board (1) independently of one another and forming slots (10) at constant or various intervals; a magnetic core (11) formed on surfaces of the stators (5); stator windings (4) formed around the magnetic cores (11) and composed of excitation windings (4a) and output windings (4b); a magnetic flux return path plateau (12) provided on each of the surfaces of the stators (5) and provided inward or outward of the stator windings (4); an annular rotor board (6) provided on the magnetic flux return path plateaus (12); and a gap forming board (13) provided on an inner surface (6a) of the annular rotor board (6) and having a board inner surface (13a) whose protrusion state changes according to a waveform. The annular rotor board rotates to cause changes in a gap (14) between each of the magnetic cores (11) and the board inner surface (13a) of the gap forming board (13).
US07852066B2 Apparatus for measuring the relative position of two parts
Apparatus for measuring the relative position of two parts with a deformable coil, which is connected to both parts and deforms according to their relative position, wherein the inductance of the coil depends on shape and is thus a measure of the relative position, and wherein the coil has a magnetic circuit which is closed in the manner of a toroidal coil.
US07852065B2 Testing apparatus for testing electronic system with 4-wires resistive touch panel and the method therefor
The invention relates to a testing apparatus for 4-wires resistive touch panel of an electronic system. The testing apparatus includes a voltage control unit, a signal control unit, a connecting unit and a determining unit. The determining unit is used for determining the connection of a first electronic unit and a second electronic unit according to a first voltage level and a second voltage level generated by the voltage control unit and a detecting signal generated by the signal control unit.
US07852061B2 Band gap generator with temperature invariant current correction circuit
An apparatus comprises a band gap voltage generator circuit for generating a band gap voltage. A temperature invariant current generator is located within the band gap voltage generator circuit for generating a temperature invariant current. A temperature invariant current correction circuit is located within the band gap voltage generator circuit and adjusts the output voltage responsive to the temperature invariant current without altering temperature characteristics of the temperature invariant current.
US07852060B2 Method of forming a buck-boost mode power supply controller and structure therefor
In one embodiment, a power supply controller is configured to operate a plurality of switches in a buck-boost mode to control an output voltage wherein at least one switch of the plurality of switches is enabled for a substantially fixed portion of a cycle of the buck-boost mode.
US07852057B2 DC-DC converter
A DC-DC converter providing a DC output voltage at an output node. The DC-DC converter comprises an output stage, a digital controller, and a controller. The output stage comprises a pull-up circuit having a control terminal and coupled between a first fixed voltage and a internal node, a pull-down circuit coupled between the internal node and a second fixed voltage, and a low pass filter coupled between the internal node and the output node. The digital controller is powered by the DC output voltage and adjusts the DC output voltage by controlling the output stage. The controller controls a connection of a feedback path, comprising the digital controller, between the output node and the control terminal according to the DC output voltage.
US07852055B2 Switching regulator
A switching regulator includes a switching transistor to switch in accordance with an input control signal, an inductor charged with an input voltage in response to a switching operation by the switching transistor, a switch signal generator to detect an inductor current flowing through the inductor from a voltage at a connection point between the switching transistor and the inductor and output a predetermined switch signal after a time in accordance with the input voltage when detecting the inductor current is zero, and a controller to perform a PWM control or a PFM control on the switching transistor in accordance with the switch signal output from the switch signal generator to keep an output voltage output from the output terminal at a predetermined constant voltage. The controller performs the PFM control when the predetermined switch signal is continuously input thereto from the switch signal generator one or more times.
US07852052B2 Supply circuit for implantable medical devices
A supply circuit for an implantable medical device (IMD) is presented. The supply circuit includes a battery, a high current circuit, a current-modifying component, a low current circuit, and a capacitor. The low current circuit is connected to a first terminal of the battery. A current-modifying component is connected to the battery, a capacitor, and to a high current circuit.
US07852050B2 Apparatus and method for simultaneous provision of power flow control in a three-phase AC transmission line
A device for control of power flow in a three-phase ac transmission line. The device includes a series transformer unit, a shunt transformer unit, and a reactance unit.
US07852043B2 Information processing apparatus, information processing method and program
Disclosed herein is an information processing apparatus including a storage section for storing an AC adapter capacity identification information with which a rated power capacity of an AC adapter which can supply power to the apparatus can be identified, a first outputting section for outputting the above mentioned AC adapter capacity identification information, a setting section for setting a threshold value with which control of power consumption of the apparatus is to be started based on the output AC adapter capacity identification information, a detection section for detecting the power consumption, and a control section for controlling such that when the detected power consumption exceeds the threshold value, the power consumption may become equal to or lower than the threshold value.
US07852040B2 Motor driver system and method for controlling motor driver
A motor driver system and its control methods are discussed. Even when a command magnetic flux decreases as a motor operates in a field weakening region, a current angle can be maintained always below a limit value, thereby obtaining the stability of the motor control.
US07852038B2 Single switch controlled switched reluctance machine
An improved single-switch control circuit for use in a multi-phase switched reluctance machine is provided. The control circuit includes at least first and second phase windings, a switch, a capacitor, and a diode. The capacitor may have a polarity opposite that of a power source in the control circuit. The first winding may be connected in series with the switch and connected in parallel with a circuit block comprising the second winding. The second winding may be connected in parallel with the capacitor and in series with the diode. In operation, the switch may be used to redirect current from the first winding to the second winding. The capacitor can become charged by the redirected current until it eventually stores enough energy to essentially discontinue current flow in the first winding. Then, the capacitor can discharge its stored energy as a current through the second winding. In this manner, substantially all of the energy from the first winding can be transferred to the second winding.
US07852035B2 Motor drive circuit
To provide a motor driving circuit and a motor driving system wherein the circuit occupation area is small and the IC size can be reduced.A polarity inversion data generating circuit is provided to use the higher-order bits of an address counter, which do not contribute to the access to a memory, as they are, as polarity inversion instruction data (flag bit). Then, two cyclic memory accesses are performed in the same direction to read a half period of waveform data twice. A polarity inversion instruction is issued for one of the waveform data as read twice. A calculation of the polarity inversion is performed in accordance with the polarity inversion instruction, whereby waveform data corresponding to one period of sinusoidal wave can be simply generated.
US07852034B2 Drive method of moving body, stage unit, and exposure apparatus
An exposure apparatus that comprises a stage-that moves in the X-axis direction, an X-axis linear motor that drives the stage, a counter mass that moves in a direction opposite to the stage due to the action of the reaction force of the drive force of the stage in the X-axis direction by the motor, X-axis trim motors that drives the counter mass in the X-axis direction, and a control unit that controls the trim motors and gives the counter mass an initial velocity in the +X direction when the stage is moved via the motor, for example, in the +X direction. Accordingly, the strokes required for the movement of the counter mass can be shortened without increasing the size of the counter mass.
US07852033B2 Driving control apparatus and method, and exposure apparatus
A driving control apparatus for driving a controlled object. The apparatus includes first and second interferometers, each of which (i) detects a position of the controlled object in a predetermined direction and (ii) produces a respective detection value. A control unit obtains a rotation amount of the controlled object based on the detection values produced by the first and second interferometers, at a predetermined measurement timing, to calculate a controlled variable based on the rotation amount and a target value, and to output the controlled variable. A generation unit generates the rotation amount based on a difference value between two average values, one being an average value of detection values that are obtained by the first interferometer between a first measurement timing and a second measurement timing, immediately after the first measurement timing, and the other being an average value of detection values that are obtained by the second interferometer between the first measurement timing and the second measurement timing. The generation unit outputs the generated rotation amount to the control unit at the second measurement timing.
US07852032B2 AD conversion control circuit and related arts
A selector selects an analog signal group to be used for PWM control out of a plurality of analog signals output by a PWM controlled load. An AD converter AD converts the analog signal group and generates a digital signal group that becomes control data for duty ratio setting in a duty ratio setting register to provide the generated digital signal group to a control unit for controlling a PWM circuit. A duty ratio comparison circuit compares duty ratios set by the plurality of duty ratio setting registers. An AD conversion channel selection circuit controls an analog signal group selecting operation by the selector based on a comparison result of the duty ratio comparison circuit.
US07852028B1 Voice coil motor control system and method
Analog control of the pulse width used to control the speed of a voice coil motor may be implemented using a “constant-current-charging-capacitor” configuration where the time needed to charge the capacitor is directly related to how far the actual motor speed is from the target speed. The BEMF voltage, indicative of motor speed, is sampled, and then stored in a storage capacitor, which is allowed to charge/discharge to a target voltage level. The time required to charge/discharge the capacitor to the target voltage is directly proportional to the difference between the BEMF voltage and the target voltage, and may be used directly as the pulse width (i.e., the charging time) in the PWM velocity control system. To avoid larger capacitors, a pulse multiplier circuit can be added, allowing charging/discharging the sampled voltage to the target voltage to be repeated by a number, N, of times.
US07852027B2 Method and circuit for testing motor
A method for testing a motor having a rotor and a winding is provided. The method includes steps of (a) providing a power to rotate the rotor to a predetermined speed, (b) removing the power, (c) measuring a terminal voltage of the winding while a current within the winding is zero, (d) obtaining a back electromotive force in the winding by compensating the terminal voltage with a performance of the rotor, (e) selecting a characteristic of the back electromotive force and (f) determining a magnetization of the motor by comparing the characteristic with a predetermined parameter.
US07852024B2 Vehicle mirror device
A vehicle mirror device includes a drive unit to turn a mirror unit with respect to a base unit. The drive unit includes a motor and a control circuit. The motor is driven with a battery voltage. A current supply to the motor is cut OFF when a motor current flowing in the motor exceeds a threshold, and the control circuit changes the threshold depending on the battery voltage.
US07852023B2 Electric power steering controller
The object of the present invention is to provide an electric power steering controller in which a redundant system equal to that with a relay is configured, without incurring the upsizing or deterioration in reliability, of the controller. An electric power steering controller involving the present invention is provided with a motor for providing a steering system with output torque; a motor driving circuit for driving the motor; a microcontroller for calculating a current to be applied to the motor; a gate driver for driving a plurality of switching devices constituting a bridge circuit, based on the result of the calculation by the microcontroller; and a switching portion for cutting off the power supply to the gate driver.
US07852021B2 Method and apparatus for minimizing forces on a web
A method of controlling a web in, for example, a web cutter that minimizes the destructive forces that are experienced by the web. The method includes providing a motor system for driving a web handling mechanism structured to move the web, wherein the motor system includes a motor and a motor control subsystem having a digital filter (such as a PID controller or some other suitable closed loop controller), detuning the digital filter, and using the motor system having the detuned digital filter to drive the web handling mechanism.
US07852020B2 Lamp overload detection/modulation circuit
A lamp overload detection/modulation circuit including a microcontroller unit for detecting rectangular wave signal reflective of the power used by the lamp load and pulse width signal of AC power. The positive bandwidths of the two signals are compared with a predetermined full-load value. In the case that the positive bandwidths of the two signals are both larger than the full-load value, it is indicated that the lamp load is under an overload condition. Under such circumstance, the microcontroller unit controls a lamp load driving unit to change driving manner and lower the power used by the lamp load to a value within a nominal range. Then the lamp load automatically restores to the full-load state. Accordingly, the lamp is protected from long-term overload condition.
US07852019B2 Using a triangular waveform to synchronize the operation of an electronic circuit
An electronic circuit exhibiting synchronization with an external synchronization signal, the electronic circuit comprising: an input connection arranged to receive a synchronization input signal; a triangular waveform oscillator operatively associated with the synchronization signal input connection and responsive to a condition of the received synchronization input signal to initiate a triangular waveform; and a pulse train generator operatively associated with the triangular waveform oscillator, the pulse train generator arranged to generate a plurality of pulse trains having a fixed non-zero phase relationship between them and a frequency responsive to the condition of the synchronization input signal.
US07852017B1 Ballast for light emitting diode light sources
A lighting source ballast utilizes switching and control technology to convert an alternating current (AC) phase modulated dimmer input voltage into an approximately constant drive current to illuminate one or more light emitting diodes (LED(s)). In at least one embodiment, the state of the drive current conforms to a phase delay of the input voltage to facilitate, for example, dimming. The phase delay of the input voltage indicates a particular dimming level. The drive current varies for different dimming levels. However, the light source ballast controls drive current so that the drive current is approximately constant for each dimming level. In at least one embodiment, the ballast emulates a resistive load and, thus, the ballast has an approximately unity power factor. The switching frequency of one or more switches can be modified to spread the spectrum of electromagnetic radiation generated by the ballast.
US07852013B2 Electronic stabilizer circuit for suppressing startup instabilities in cold cathode fluorescent lamps
According to the present invention an electronic stabilizer circuit for suppressing startup instabilities when supplying a cold cathode fluorescent lamp with current is proposed which is connected in series with a power supply line of the cold cathode fluorescent lamp. The stabilizer circuit has variable impedance which is automatically adjusted depending on the magnitude of the lamp current thus limiting the lamp current to a certain current threshold.
US07852010B2 Lighting device and method of lighting
A lighting device, comprising at least first and second current regulators, each switchable among two settings, and at least first and second groups of solid state light emitters. If the first regulator is in a first setting, a first current is supplied to the first group and a second current is supplied to the second group, and if the first regulator is in a second setting, a third current is supplied to the first group and a fourth current is supplied to the second group. In some embodiments, a ratio of the third current divided by the first current differ's from a ratio of the fourth current divided by the second current by at least 5%. Also, a method comprising substantially simultaneously adjusting current supplied to a first group, and adjusting a current supplied to a second group.
US07852004B2 Ignition aid and fitting shroud for discharge lamp
An ignition aid (50, 60, 70, 80, 100, 120, 130, 150, 160, or 170) is provided for an HID lamp (20). Particularly the ignition aid includes an electrically conductive coil or coil portions wrapped around selected portions of the arc tube to act as the ignition aid and lower the breakdown voltage. In other embodiments, starting aids, and particularly one or more turns of the conductive coil or coil portions support the arc tube within an opening of a surrounding shroud (90) and thereby control the spacing between the arc tube (20) and the shroud (90). This limits the maximum thermal stress of the arc tube within a desired range.
US07852001B2 Plasma display apparatus
A plasma display apparatus is provided. The plasma display apparatus including an upper substrate; a plurality of first electrodes and second electrodes formed in the upper substrate; a lower substrate arranged to be opposite to the upper substrate; and a plurality of third electrodes and barrier ribs formed in the lower substrate includes a black matrix formed in the upper substrate to be overlapped with the barrier ribs; and a fourth electrode formed on the black matrix to intersect the third electrodes, wherein at least one of the plurality of first and second electrodes is formed in one layer.
US07852000B2 Flat fluorescent lamp and structure of the same
A flat fluorescent lamp structure comprising a first substrate, a second substrate, a wall structure, a phosphor layer, and a discharge gas is provided in the present invention. The second substrate is oppositely assembled to the first substrate to form a sealed space. The wall structure is utilized to separate the sealed space into a plurality of illuminating chambers. A tunnel penetrates the wall structure to communicate the illuminating chambers. In addition, the tunnel divides the adjacent illuminating chamber into a first illuminating sub-chamber and a second illuminating sub-chamber connecting with each other. The phosphor layer is formed on inner surfaces of the illuminating chambers. The discharge gas is filled in the illuminating chambers. A ratio of a length and a cross-section area of the tunnel defines a first coefficient, a ratio of a length and a cross-section area of the first illuminating sub-chamber defines a second coefficient, a ratio of a length and a cross-section area of the second illuminating sub-chamber defines a third coefficient, and a ratio of the first coefficient and the second coefficient or the third coefficient is greater than 1/20.
US07851997B2 Light emitting element and light emitting device
It is an object of the present invention to provide a high-performance and highly reliable light emitting element which has high light emission luminance and luminous efficiency and good adhesiveness inside the element. A feature of the present invention is that the refractive index, internal stress, and dielectric constant are made to change continuously in an insulating layer included in a light emitting element. Since properties of the film are changed continuously in a single layer, this insulating layer has gradations of property values of the film (refractive index, internal stress, dielectric constant, and the like) in the film, and has no interface which is generated in a case of a stacked structure.
US07851985B2 Article incorporating a high temperature ceramic composite for selective emission
An article is provided including a heating element and a high temperature coating coated on the heating element. The high temperature coating comprises a first region and a second region arranged in a structure such that the first and second regions maintain a periodicity of distribution between about 100 nm and about 1000 nm. Furthermore, the first region includes a first material selected from the group consisting of carbides of transition metals, nitrides of transition metals, and borides of transition metals.
US07851984B2 Ignition device having a reflowed firing tip and method of construction
A sparkplug having ground and/or center electrodes that include a firing tip formed by reflowing of an end of wire having an opposite end carried by a feed mechanism. The present invention also includes methods of manufacturing an ignition device and electrodes therefore having a firing tip, including providing a metal electrode having a firing tip region; providing a wire having a free end and another end carried by a feed mechanism; and reflowing the free end to form a firing tip.
US07851981B2 Visible perception of brightness in miniature bulbs for an ornamental lighting circuit
Ornamental light strings are commonly made of a plurality of miniature light bulbs connected together, often in series, to make a light string. This invention is directed to optimizing the perceived brightness while reducing heat in each bulb. This is a particular problem where resistor bypass circuits are used where a bypass resistor being connected in parallel with at least one of the respective light sources, each respective light source being low wattage and being capable operating on a one hundred percent duty cycle as desired. Improvements are accomplished by changes in placement of the filament, its windings and materials.
US07851980B2 Tuning fork flexural crystal vibration device, crystal vibrator, and crystal oscillator
A tuning fork flexural crystal vibration device includes a base, two vibration arms, grooves, electrodes, and wirings. The base has a flat plate shape. The two vibration arms have flat panel shapes extending from a side surface of the base in the same direction. The grooves are provided for the two vibration arms so as to extend from base-side end portions of the vibration arms along the longitudinal direction of the vibration arms and are depressed in the thickness direction of the vibration arms. The grooves include front-side grooves which open in the front main surfaces of the vibration arms and are provided at least one by one for each vibration arm, and rear-side grooves which open in the rear main surfaces of the vibration arms and are provided at least one by one for each vibration arm. The bottom surface of the front-side groove does not face the bottom surface of the rear-side groove provided in the same vibration arm in which the front-side groove is provided. The electrodes are formed on the surfaces of the base and the two vibration arms. The wirings electrically connect the electrodes to each other. A crystal vibrator and crystal oscillator are also disclosed.
US07851979B2 Piezoceramic multilayer actuator, method for producing a piezoceramic multilayer actuator, and injection system
A piezoceramic multilayer actuator has at least one outer electrode which can expand and provides at least two current paths between a supply potential connecting area of the outer electrode and a respective inner electrode, with which the outer electrode makes contact, of a piezo-stack of the multilayer actuator.
US07851978B2 Piezo actuator comprising a multilayer encapsulation, and method for the production thereof
In a method for producing a multilayer encapsulation (1) of a piezo actuator (5) such that the piezo actuator (5) is protected towards the outside without having to use an additional enveloping housing-type structure, in order to produce the multilayer encapsulation (1), an electrically insulating elastic layer (10) is first applied to the surface of the piezo actuator (5), whereupon a metallic layer is applied to the electrically insulating elastic layer (10) so as to planarly cover the same.
US07851974B2 Piezoceramic multilayer actuator manufactured according to particular sintering parameters and corresponding method of manufacturing
A piezoceramic multilayer actuator (10) has a plurality of piezoceramic layers (12), a security layer (20) and a plurality of inner electrodes (16, 18). The piezoceramic layers (12) has a piezoceramic first material sintered at a sintering temperature. The security layer (20) has a second material and is disposed between two piezoceramic layers (12). Each of the plurality of inner electrodes (16, 18) has a third material and is deposited between two piezoceramic layers (12). The degree of sintering of the second material is lower than the degree of sintering of the third material.
US07851973B1 Using piezo-electric material to simulate a vibration environment
A target object can be vibrated using actuation that exploits the piezo-electric (“PE”) property. Under combined conditions of vibration and centrifugal acceleration, a centrifugal load of the target object on PE vibration actuators can be reduced by using a counterweight that offsets the centrifugal loading. Target objects are also subjected to combinations of: spin, vibration, and acceleration; spin and vibration; and spin and acceleration.
US07851970B2 Structures for crystal packaging including flexible membranes
A crystal oscillator is mounted in a flexible harness rather than at discrete points. The crystal oscillator and associated control circuitry may be formed on a common substrate, decreasing component size and minimizing temperature fluctuations by shortening the thermal path between the crystal and the control circuitry.
US07851968B2 Optimized energy conversion device
A variable capacitance device including at least one first fixed electrode and a second electrode free to move with respect to the fixed electrode, each electrode including a body and protuberances projecting from at least one face of the body. Each electrode is arranged such that the faces of each electrode provided with the protuberances are facing each other, the distance separating the two faces facing each other being greater than the sum of the heights of a protuberance from the fixed electrode and a protuberance from the mobile electrode. The electrodes are capable of moving with respect to each other in two parallel planes along at least one main direction.
US07851967B2 Electrostatic induction generator
An electrostatic induction generator requiring no electric power supply device and capable of being mounted on a printed board is obtained. This electrostatic induction generator includes a pair of first electrodes capable of storing charges, a pair of vibrating electrodes capable of vibrating in a first direction and a second direction different from the first direction, and charged with opposite charges due to charges stored in the pair of first electrodes respectively, and a second electrode for electrically connecting the pair of vibrating electrodes to each other in a case where the pair of vibrating electrodes are at prescribed positions.
US07851956B2 Electric motor with a low number of revolutions, in particular to drive lifting devices
An electric motor (10) with a low number of revolutions comprises a rotor (17) powered by three-phase alternating voltage, a series of magnets (21, 22) and a coil forming a stator (24), in which the rotor (17) and the stator (24) have the same number of magnetic poles. The stator (24) is powered with direct voltage, and the frequency of the rotor voltage (17) is varied to obtain a predetermined number of rpm of the motor and to vary the acceleration and deceleration conditions of the motor. A thrust bearing opposes the effort of the falling brake disc.
US07851953B2 Generator for vehicle
A generator has a rotor boss engaged with a crankshaft with a rotor core engaged with the outer circumference of the rotor boss. A stator core is provided around the outer circumference of the rotor core with a bus ring opposed to one end surface of the rotor core. The outer circumference of the bus ring is engaged with a plurality of insulating components surrounding the teeth. The stator core has a split structure composed of a plurality of stator core blocks connected together. Each stator core block is fixed to a generator cover by a bolt. The generator cover is fixed to the outer surface of a crankcase. The rotor core is formed with a plurality of holes for respectively supporting a plurality of rotor magnets. The bus ring includes a plurality of terminals and grommets connected through bus bars to the terminals.
US07851947B2 Methods and apparatuses for selectable voltage supply
A circuit which selects a supply voltage from a plurality of voltage supplies is presented. The circuit includes a first transistor configured to select a first voltage supply, a second transistor configured to select a second voltage supply, a first parasitic current inhibitor coupled the first transistor, the first voltage supply, and the second voltage supply, where the first parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the first transistor, and a second parasitic current inhibitor coupled the second transistor, the first voltage supply, and the second voltage supply, where the second parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the second transistor.
US07851946B2 Switching power supply and electronic apparatus employing the same
In a switching power supply apparatus, an input voltage Vin applied to an input terminal is output from a first output terminal and a second output terminal after boosting or inverting of the voltage Vin. When a first and a fourth switches are turned on, a flying capacitor is charged. When a second and a fifth switches are turned on, charges charged in the flying capacitor are transferred to a first output capacitor. When a third and a fifth switches are turned on, charges charged in the flying capacitor are transferred to a second output capacitor. A voltage Vin×2 double the input voltage Vin is output from the first output terminal as a first output voltage Vout1, and a voltage −Vin obtained by inverting the input voltage is output from the second output terminal as a second output voltage.
US07851944B2 Integrated uninterrupted power supply unit
A system may provide integrated uninterrupted power supply for computer systems. The system comprise a first unit that outputs an AC input voltage, and produces an AC output voltage from a battery voltage in response to the AC input voltage being absent; and a second unit that produces a DC output voltage from the AC input voltage, and produces the DC output voltage from the battery voltage in response to the AC input voltage being absent.
US07851937B2 Wind-powered generator and assemblies therewith
A wind-powered electrical assembly includes an electrical device electrically connected to an electrical generator. The electrical generator is operable to provide an electric current to the electrical device to operate the electrical device. The electrical generator has a rotor. The electrical assembly further includes a wind-powered actuator assembly configured to rotate when subject to an operating wind and a gear train arranged with the electrical generator for operating the electrical generator. The gear train can include a plurality of gears wherein a first gear can be operably arranged with a spring assembly. A second gear of the drive train can be operably arranged with the wind-powered actuator assembly and a third gear can be mounted to the rotor of the electrical generator.
US07851936B2 Water current power generation system
A water current power generation system is provided, including a plurality of flotation tubes joined by a body structure; a plurality of ballast chambers joined by a body structure; a plurality of induction type power generation units disposed within housings associated with one or more of the flotation chambers, ballast chambers and body structure; and a plurality of propellers disposed in mechanical communication with each of the induction type generator units. Methods and means of deploying, positioning, maintaining, controlling and operating the system are also provided, as are detailed descriptions of novel inductor type generators used to obtain power from fast moving water currents, flotation tanks for tensioning the system against a submerged anchoring system disposed on an associated seafloor, and fluid-filled ballast chambers equipped with multiple sub-chambers that lend precision control and continuous adjustability to the system.
US07851934B2 Method for controlling a wind turbine connected to the utility grid, wind turbine and wind park
The invention relates to a method for controlling a wind turbine connected to the utility grid comprising steps of detecting a fault of the utility grid, and controlling one or more rotor blades in a fault mode wherein said one or more rotor blades are pitched in order to stabilize the rotor speed within an over speed range. The invention also relates to a wind turbine and a wind park comprising at least two wind turbines.
US07851932B2 Backpack based system for human electricity generation and use when off the electric grid
An electricity-generating backpack that is substantially lighter in weight, has the multiple springs replaced with one large spring whose spring constant can be adjusted in the field in seconds, and replaces a DC generator with a brushless AC generator that permits approximately 70% generator efficiency and the generation of up to 20 W of electrical power by converting mechanical energy to electrical power. A device is provided that always removes some electricity, but not too much, as necessary to extract large levels of the electricity while controlling damping by providing electrical damping circuits including a DC-DC converter designed to emulate a desired load at its input terminals. Additional electricity generating E-MOD devices may be used for generating additional power by hooking an E-Mod device to a generator and to the backpack belt at the wearer's hip and includes a wand that fits against the wearer's femur so as to move through a range of motion as the patient walks. The system also provides multiple possibilities of electricity generation when not walking including a light-weight bicycle ergometer which can be mounted to the backpack frame and generate very high power levels (100 W). The electricity generated and stored by the backpack may be used to charge batteries and to power a number of devices that may be carried by the backpack, such as a Sterling Cooler System that is powered by the backpack's stored power to provide cooling power for cooling items carried by the backpack.
US07851930B1 Conductive adhesive compositions containing an alloy filler material for better dispense and thermal properties
An adhesive composition having thermal conductivity as well as excellent dispensability properties is provided. The adhesive composition includes a curable resin component, a curing agent for the curable resin component, and a conductive filler material. The filler material is an alloy of copper and silver. The specific ratios of the copper and silver in the alloy are tailored so as to provide the adhesive composition with appropriate thermal conductivity and dispensing properties making the composition particularly useful for application in the semiconductor industry.
US07851929B2 Semiconductor device
A semiconductor device having a wafer level chip size package may include a semiconductor substrate having an integrated circuit formed thereon; a plurality of electrode pads formed on the semiconductor substrate; at least one rewiring layer which may include rewiring formed adjacent to the plurality of electrode pads; and a plurality of external electrodes formed on the rewiring layer. The plurality of electrodes and plurality of external electrodes may be sectioned and arranged in four areas having the same shapes. Each area may include a first group of N number of external electrodes arranged along an edge of the semiconductor substrate, a second group of (N−2) number of external electrodes arranged inside the first group of external electrodes, and a plurality of (2N−2) number of electrode pads arranged between the first and second groups of external electrodes.
US07851924B2 Method of manufacturing semiconductor device, and semiconductor device
A semiconductor device including a substrate, a metal wiring on the substrate, an insulation film on the substrate covering the metal wiring, a connection hole in the insulation film which extends to a portion of the metal wiring, a via in the connection hole, and an alloy layer. The metal wiring includes a first metallic material, the alloy layer comprises a portion of the metal wiring and a second metallic material which is different than the first metallic material, and the via extends to the alloy layer.
US07851923B2 Low resistance and inductance backside through vias and methods of fabricating same
A backside contact structure and method of fabricating the structure. The method includes: forming a dielectric isolation in a substrate, the substrate having a frontside and an opposing backside; forming a first dielectric layer on the frontside of the substrate; forming a trench in the first dielectric layer, the trench aligned over and within a perimeter of the dielectric isolation and extending to the dielectric isolation; extending the trench formed in the first dielectric layer through the dielectric isolation and into the substrate to a depth less than a thickness of the substrate; filling the trench and co-planarizing a top surface of the trench with a top surface of the first dielectric layer to form an electrically conductive through via; and thinning the substrate from a backside of the substrate to expose the through via.
US07851920B2 Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating thin film transistor substrate
Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate, and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper nitride and a copper conductive layer formed on the barrier layer and including copper or a copper alloy.
US07851916B2 Strain silicon wafer with a crystal orientation (100) in flip chip BGA package
A method and system is disclosed for better packaging semiconductor devices. In one example, a semiconductor device package comprises a package substrate, at least one die with an orientation of <100> placed on the substrate with electrical connections made between the package substrate and the die, and an underfill fillet attaching the die to the substrate with the underfill fillet reaching less than 60% of a thickness of the die on at least one side thereof.
US07851910B2 Diffusion soldered semiconductor device
The invention relates to a process for the multi-stage production of diffusion-soldered joints for power components with semiconductor chips, the melting points of diffusion-soldering alloys and diffusion-soldered joints being staggered in such a manner that a first melting point of the first diffusion-soldering alloy is lower than a second melting point of the second diffusion-soldering alloy, and the second melting point being lower than a third melting point of a first diffusion-soldered joint of the first diffusion-soldering alloy.
US07851908B2 Semiconductor device
A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially.
US07851907B2 Semiconductor integrated circuit package having electrically disconnected solder balls for mounting
Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.
US07851905B2 Microelectronic package and method of cooling an interconnect feature in same
A microelectronic package comprises a substrate (110, 310), a die (320) supported by the substrate, an interconnect feature (130, 230, 330) connecting the die and the substrate to each other, and a thermoelectric cooler (140, 170, 240, 340) adjacent to the interconnect feature.
US07851904B2 Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure
A semiconductor device of the present invention includes: a wiring board 4 in which a conductive wiring 6 is formed on an insulating substrate 5 having an opening 5a; a semiconductor element 2 that has a circuit forming region 2a and an electrode pad 3, and is mounted on the wiring board with the circuit forming region facing the opening, the electrode pad being connected electrically to the conductive wiring via a protruding electrode 3a; a sealing resin 7 that covers the connected portion between the electrode pad and the conductive wiring; a heat dissipating member 9 that is disposed so as to have a portion facing the opening; and a filling material 8 that has a heat conductivity higher than that of the sealing resin, and is filled into the opening, so as to be in contact with the circuit forming region of the semiconductor element and the heat dissipating member. Even when the wiring board has a small area, heat dissipation efficiency can be ensured, and low cost manufacture can be achieved.
US07851900B2 Stacked semiconductor package
In a stacked semiconductor package, since electric power is supplied to a second semiconductor package through a first semiconductor package, a power supply path becomes complicated and fluctuation of its inductance becomes large, whereby power bounce occurs to reduce signal quality and also prevent high speed signal communication. Therefore, according to the present invention, a first solder ball group for joint to a printed wiring board is attached to a second layer of the first semiconductor package, and a second solder ball group for joint to the first semiconductor package and a solder group for power supply for direct joint to the printed wiring board are provided on the second layer of the second semiconductor package, whereby electric power can be directly supplied from the printed wiring board.
US07851898B2 Multichip package or system-in package
Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chip, to a memory control signal to each of the “m” number of memory chips; and the memory control signal, when viewed from the logic chip, is connected using a one-for-one wiring scheme or a one-for-up-to-m branch wiring scheme, between the selector circuit and each of the “m” number of memory chips. This multichip package or system-in package is low in noise and high in operational reliability.
US07851896B2 Quad flat non-leaded chip package
A Quad Flat Non-leaded (QFN) chip package including a patterned conductive layer, a first solder resist layer, a chip, a plurality of bonding wires and a molding compound is provided. The patterned conductive layer has a first surface and a second surface opposite to each other. The first solder resist layer is disposed on the first surface, wherein a part of the first surface is exposed by the first solder resist layer. The chip is disposed on the first solder resist layer, wherein the first solder resist layer is between the patterned conductive layer and the chip. The bonding wires are electrically connected to the chip and the patterned conductive layer exposed by the first solder resist layer. The molding compound encapsulates the pattern conductive layer, the first solder resist layer, the chip and the bonding wires.
US07851895B2 Semiconductor structure and semiconductor manufacturing method
A semiconductor structure comprising a first signal layer, a second signal layer, a wiring layer and at least one via is provided. The wiring layer is formed between the first signal layer and the second signal layer. A conducting wire is disposed between a first terminal and a second terminal on the wiring layer. At least one via is used to conduct the first signal layer and the second signal layer. The at least one via is disposed adjacent to the first terminal and the second terminal.
US07851893B2 Semiconductor device and method of connecting a shielding layer to ground through conductive vias
A semiconductor device is made by providing a substrate having an interconnect structure, providing a plurality of semiconductor die each having a through silicon via (TSV), mounting the semiconductor die to the substrate to electrically connect the TSV to the interconnect structure, depositing an encapsulant between the semiconductor die, and forming a shielding layer over the encapsulant and semiconductor die. The shielding layer is electrically connected to the TSV which in turn electrically connects to the interconnect structure to isolate the semiconductor die from interference. The shielding layer is electrically connected to a ground potential through the TSV and interconnect structure. The semiconductor die includes solder bumps which are electrically connected to contact pads on the substrate. The substrate also includes solder bumps electrically connected to a conductive channel in the interconnect structure which is electrically connected to the TSV. The substrate is singulated to separate the semiconductor die.
US07851892B2 Semiconductor memory device and method for fabricating the same
A semiconductor memory device has a substrate having a semiconductor layer, an n-type semiconductor region formed beneath a main surface of the semiconductor layer, a plurality of cell gates being aligned at a space from each other and including a gate insulating film formed on the main surface of the semiconductor layer, a charge storage layer formed on the gate insulating film, a charge block layer formed on the charge storage layer and a control gate electrode formed on the charge block layer, an insulating film between cells formed on the main surface of the semiconductor layer between the cell gates, and a carbon accumulation region formed in the insulating film between the cells and has a maximum concentration of a carbon element in a region within 2 nm from an interface between the semiconductor layer and the insulating film between the cells.
US07851891B2 Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes the steps of: forming a first insulating film on a semiconductor substrate; removing part of the first insulating film; forming a second insulating film having a leakage current density higher than that of the first insulating film on a region where the part of the first insulating film has been removed on the semiconductor substrate; forming an undoped semiconductor film on the first and second insulating films; implanting an impurity into part of the undoped semiconductor film, thereby defining semiconductor regions of a first conductivity type dotted as discrete islands; forming a third insulating film on the semiconductor regions of the first conductivity type and the undoped semiconductor film; and removing part of the third insulating film by wet etching. At least the second insulating film is formed under the semiconductor regions of the first conductivity type.
US07851890B2 Semiconductor device and method for manufacturing the same
By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.
US07851889B2 MOSFET device including a source with alternating P-type and N-type regions
Apparatus and methods are provided for fabricating semiconductor devices with reduced bipolar effects. One apparatus includes a semiconductor body (120) including a surface and a transistor source (300) located in the semiconductor body proximate the surface, and the transistor source includes an area (310) of alternating conductivity regions (3110, 3120). Another apparatus includes a semiconductor body (120) including a first conductivity and a transistor source (500) located in the semiconductor body. The transistor source includes multiple regions (5120) including a second conductivity, wherein the regions and the semiconductor body form an area (510) of alternating regions of the first and second conductivities. One method includes implanting a semiconductor well (120) including a first conductivity in a substrate (110) and implanting a plurality of doped regions (5120) comprising a second conductivity in the semiconductor well. An area (510) comprising regions of alternating conductivities is then formed in the semiconductor well.
US07851887B2 Phase change memory device with heater electrodes having fine contact area and method for manufacturing the same
A phase change memory device includes a semiconductor substrate having a conductive region, a heater electrode formed on the semiconductor substrate and including a connection element which is composed of carbon nanotubes electrically connected with the conductive region, and a phase change pattern layer contacting the connection element of the heater electrode.
US07851885B2 Methods and systems involving electrically programmable fuses
An electrically programmable fuse comprising a cathode member, an anode member, and a link member, wherein the cathode member, the anode member, and the link member each comprise one of a plurality of materials operative to localize induced electromigration in the programmable fuse.
US07851884B2 Field-effect transistor, semiconductor chip and semiconductor device
A FET exhibiting excellent uniformity and productivity and having a low noise figure and high associated gain as high-frequency performance, a semiconductor chip having this FET and a semiconductor device having the semiconductor chip. The FET includes a GaAs substrate on which are built up an i-type GaAs layer, an i-type InGaAs two-dimensional electron gas layer and an n-type AlGaAs electron supply layer. A gate electrode is provided on and in linear Schottky contact with the n-type AlGaAs electron supply layer. A n-type InGaP etching stop layer and then an n-type GaAs contact layer at the same lateral position are built up on the n-type AlGaAs electron supply layer, these being spaced away from both sides of the gate electrode. A source electrode and a drain electrode are provided on the n-type GaAs contact layer and are spaced away from edges of the contact layer as electrodes that make band-shaped ohmic contact.
US07851881B1 Schottky barrier diode (SBD) and its off-shoot merged PN/Schottky diode or junction barrier Schottky (JBS) diode
A merged PN/Schottky diode is provided having a substrate of a first conductivity type and a grid of doped wells of the second conductivity type embedded in the substrate. A Schottky barrier metal layer makes a Schottky barrier contact with the surface of the substrate above the grid. Selected embedded wells in the grid make a Schottky barrier contact to the Schottky barrier metal layer, while most embedded wells do not. The diode forward voltage drop is reduced for the same diode area with reverse blocking benefits similar to a conventional JBS structure.
US07851876B2 Micro electro mechanical system
Embodiments of a micro electro mechanical system are disclosed.
US07851874B2 Semiconductor device and method for manufacturing the same
A semiconductor device according to an embodiment includes device isolating layers having a top surface lower than a sheet height of a semiconductor substrate; a gate insulating layer and a gate electrode sequentially stacked on the upper surface of an active region of the semiconductor substrate between the device isolating layers; a spacer formed at the side wall of the gate electrode; a source/drain region formed in the semiconductor substrate between the spacer and the device isolating layers; and a silicide film formed on the source/drain region.
US07851872B2 Efficient transistor structure
An integrated circuit comprises a first source, a first drain, a second source, a first gate arranged between the first source and the first drain, and a second gate arranged between the first drain and the second source. The first and second gates define alternating first and second regions in the drain. The first and second gates are arranged farther apart in the first regions than in the second regions.
US07851870B2 Monolithically integrated semiconductor assembly having a power component and method for producing a monolithically integrated semiconductor assembly
A monolithically integrated semiconductor assembly having a power component, and a method for manufacturing a semiconductor assembly, are proposed, a monolithically integrated resistor element being provided between a first terminal and the second region, and a comparatively low-impedance electrical connection through the first region being provided between the resistor element and the second region.
US07851868B2 Step gate electrode structures for field-effect transistors and methods for fabricating the same
A method is disclosed for forming at least two semiconductor devices with different gate electrode thicknesses. After forming a gate dielectric region, and determining whether a first or second device formed on the gate dielectric region expects a relatively faster gate dopant diffusion rate, a gate electrode layer is formed on the gate dielectric region wherein the gate electrode layer has a step-structure in which a portion thereof for the first device has a relatively larger thickness than that for the second device if the first device has a relatively faster gate dopant diffusion rate.
US07851865B2 Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure
Disclosed herein are embodiments of a design structure of a multiple fin fin-type field effect transistor (i.e., a multiple fin dual-gate or tri-gate field effect transistor) in which the multiple fins are partially or completely merged by a highly conductive material (e.g., a metal silicide). Merging the fins in this manner allow series resistance to be minimized with little, if any, increase in the parasitic capacitance between the gate and source/drain regions. Merging the semiconductor fins in this manner also allows each of the source/drain regions to be contacted by a single contact via as well as more flexible placement of that contact via.
US07851863B2 Static electricity countermeasure component
A static electricity countermeasure component comprising; a ceramic substrate; at least two extractor electrodes opposingly disposed and mutually separated on the ceramic substrate; an over-voltage protective material layer disposed to cover a portion of each extractor electrode and a gap between the extractor electrodes, containing a metal powder and a silicone-based resin; an intermediate layer disposed over the over-voltage protective material layer, containing an insulating powder and a silicone-based resin; and a protective resin layer disposed over the intermediate layer.
US07851857B2 Dual current path LDMOSFET with graded PBL for ultra high voltage smart power applications
A dual current path LDMOSFET transistor (40) is provided which includes a substrate (400), a graded buried layer (401), an epitaxial drift region (404) in which a drain region (416) is formed, a first well region (406) in which a source region (412) is formed, a gate electrode (420) formed adjacent to the source region (412) to define a first channel region (107), and a current routing structure that includes a buried RESURF layer (408) in ohmic contact with a second well region (414) formed in a predetermined upper region of the epitaxial layer (404) so as to be completely covered by the gate electrode (420), the current routing structure being spaced apart from the first well region (406) and from the drain region (416) on at least a side of the drain region to delineate separate current paths from the source region and through the epitaxial layer.
US07851856B2 True CSP power MOSFET based on bottom-source LDMOS
A semiconductor package may comprise a semiconductor substrate, a MOSFET device having a plurality cells formed on the substrate, and a source region common to all cells disposed on a bottom of the substrate. Each cell comprises a drain region on a top of the semiconductor device, a gate to control a flow of electrical current between the source and drain regions, a source contact proximate the gate; and an electrical connection between the source contact and source region. At least one drain connection is electrically coupled to the drain region. Source, drain and gate pads are electrically connected to the source region, drain region and gates of the devices. The drain, source and gate pads are formed on one surface of the semiconductor package. The cells are distributed across the substrate, whereby the electrical connections between the source contact of each device and the source region are distributed across the substrate.
US07851851B2 Three dimensional NAND memory
A monolithic, three dimensional NAND string includes a first memory cell located over a second memory cell. A semiconductor active region of the first memory cell is formed epitaxially on a semiconductor active region of the second memory cell, such that a defined boundary exists between the semiconductor active region of the first memory cell and the semiconductor active region of the second memory cell.
US07851850B2 Band engineered nano-crystal non-volatile memory device utilizing enhanced gate injection
Non-volatile memory devices and arrays are described that utilize reverse mode non-volatile memory cells that have band engineered gate-stacks and nano-crystal charge trapping in EEPROM and block erasable memory devices, such as Flash memory devices. Embodiments of the present invention allow a reverse mode gate-insulator stack memory cell that utilizes the control gate for programming and erasure through a band engineered crested tunnel barrier. Charge retention is enhanced by utilization of high work function nano-crystals in a non-conductive trapping layer and a high K dielectric charge blocking layer. The band-gap engineered gate-stack with symmetric or asymmetric crested barrier tunnel layers of the non-volatile memory cells of embodiments of the present invention allow for low voltage tunneling programming and erase with electrons and holes, while maintaining high charge blocking barriers and deep carrier trapping sites for good charge retention.
US07851847B2 Flash memory device and method of erasing the same
A flash memory device includes a tunnel insulating layer formed over a semiconductor substrate, a charge trap layer formed over the tunnel insulating layer and configured to trap electric charges, a blocking insulating layer formed over the charge trap layer, and a gate electrode formed over the blocking insulating layer and including a first conductive layer and a second conductive layer doped with N and P impurities respectively. Further, a method of erasing a flash memory device includes providing a flash memory device including a gate electrode having a first conductive layer and a second conductive layer doped with N and P impurities respectively, and performing an erase operation in a state where a thickness of a depletion layer at an interface of a PN junction comprising the first conductive layer and the second conductive layer is increased due to a negative potential bias applied to the gate electrode.
US07851845B2 Flash memory device and method of manufacturing the same
Embodiments relate to a flash memory device and a method of manufacturing the same that may include a tunnel oxide layer on and/or over a semiconductor substrate having source and drain regions. The tunnel oxide layer may have a first width. The flash memory device may include a first polysilicon pattern and a second polysilicon pattern on and/or over the tunnel oxide layer and a dielectric pattern on and/or over the tunnel oxide layer, where the first and second polysilicon patterns may be provided. It may also include a third polysilicon pattern on and/or over the dielectric pattern, the third polysilicon pattern having a second width, and a spacer formed on and/or over sidewalls of the first, second and third polysilicon patterns, the dielectric pattern and the tunnel oxide pattern. According to embodiments, the second width may be greater than the first width.
US07851840B2 Devices and circuits based on magnetic tunnel junctions utilizing a multilayer barrier
Devices having magnetic or magnetoresistive tunnel junctions (MTJS) have a multilayer insulator barrier layer to produce balanced write switching currents in the device circuitry, or to produce the magnetic devices with balanced critical spin currents required for spin torque transfer induced switching of the magnetization, or both for the MTJs under both the forward and reversed bias directions.
US07851839B2 High-sensitivity image sensor and fabrication method thereof
A method of fabricating a high-sensitivity image sensor and the same are disclosed. The disclosed method comprises: etching predetermined regions of active silicon and a buried oxide layer of a SOI substrate by using a mask to expose an N-type silicon substrate; implanting P-type ions into the exposed N-type silicon substrate to form P-type regions; forming a gate oxide layer and a gate electrode on the middle part of the active silicon not etched while the active silicon is etched to expose the N-type silicon substrate; forming a P-type gate electrode, and P-type source and drain regions by implanting P-type ions into the active silicon and the gate electrode above the buried oxide layer; and constructing a connection part to connect the P-type regions to the gate electrode. The disclosed high-sensitivity sensor comprises: a photodiode region having a PN junction between an N-type silicon substrate and a P-type region thereon; a monocrystalline silicon region from a SOI substrate in which source and drain regions, and a channel are placed, having a distance to the photodiode region; a gate oxide layer and a gate electrode on the silicon region; and a connection part connecting the P-type region of the photodiode to the gate electrode.
US07851838B2 Solid-state imaging device and method of manufacturing the same
A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
US07851835B2 Display substrate, method of manufacturing the same and display device having the same
A display substrate includes a substrate, a first insulating layer, an undercut compensating member, a first electrode, a second insulating layer and a first conductive pattern. The first insulating layer is formed on the substrate. The undercut compensating member is formed on the first insulating layer. The undercut compensating member has an etching rate smaller than that of the first insulating layer. The first electrode is formed on a portion of the undercut compensating member. The second insulating layer is formed on the first insulating layer. The second insulating layer has a contact hole through which a portion of the first electrode and a remaining portion of the undercut compensating member. The first conductive pattern electrically connected to the first electrode through the contact hole.
US07851833B2 Semiconductor device
A semiconductor device includes a first transistor unit including first field effect transistors with first gate electrodes electrically connected together, first sources electrically connected together, and first drains electrically connected together, the first gate electrodes being electrically connected to the first drains, a second transistor unit including second field effect transistors with second gate electrodes electrically connected together, second sources electrically connected together, and second drains electrically connected together, the second gate electrodes being electrically connected to the first gate electrodes, and dummy gate electrodes electrically isolated from the first gate electrodes and the second gate electrodes. The first gate electrodes, the second gate electrodes, and the dummy gate electrodes are arranged parallel to one another, and at least one dummy gate electrode is located between any one of the first gate electrodes and any one of the second gate electrodes.
US07851831B2 Transistor
A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. A first portion of the gate electrode layer, in contact with the nitride semiconductor layer, has a higher nitrogen mole fraction than a second portion of the gate electrode layer.
US07851830B2 Multigate Schottky diode
A multigate Schottky diode comprising an electrically conducting active semiconductor region; first and second electrically connected metallic contact arms on the active semiconductor region forming ohmic contacts therewith; the ohmic contacts being spaced apart on the active semiconductor region to define a gate receiving channel therebetween. a plurality of electrically connected metallic gate fingers, the metallic gate fingers being in contact with the active semiconductor region to form Schottky junctions, the Schottky junctions being spaced apart on the active semiconductor region and extending at least partially along the gate receiving channel.
US07851823B2 Semiconductor photodetector device
A transmitted light absorption/recombination layer, a barrier layer, a wavelength selection/absorption layer, and an InP window layer having a p-type region are supported by an n-type substrate and arranged in that order. Light with a wavelength of 1.3 μm reaches the wavelength selection/absorption layer through the InP window layer. Then, the light is absorbed by the wavelength selection/absorption layer and drawn from the device as an electric current signal. Light with a wavelength of 1.55 μm reaches the transmitted light absorption/recombination layer through the barrier layer. Then, the light is absorbed by the transmitted light absorption/recombination layer, generating electrons and holes. These electrons and holes recombine with each other and, hence, disappear.
US07851818B2 Fabrication of compact opto-electronic component packages
A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.
US07851811B2 Stackable optoelectronics chip-to-chip interconnects and method of manufacturing
An optoelectronics chip-to-chip interconnects system is provided, including at least one packaged chip to be connected on the printed-circuit-board with at least one other packaged chip, optical-electrical (O-E) conversion mean, waveguide-board, and (PCB). Single to multiple chips interconnects can be interconnected provided using the technique disclosed in this invention. The packaged chip includes semiconductor die and its package based on the ball-grid array or chip-scale-package. The O-E board includes the optoelectronics components and multiple electrical contacts on both sides of the O-E substrate. The waveguide board includes the electrical conductor transferring the signal from O-E board to PCB and the flex optical waveguide easily stackable onto the PCB to guide optical signal from one chip-to-other chip. Alternatively, the electrode can be directly connected to the PCB instead of including in the waveguide board. The chip-to-chip interconnections system is pin-free and compatible with the PCB. The main advantages of this invention are to use the packaged chip for interconnection and the conventional PCB technology can be used for low speed electrical signal connection. Also, the part of the heat from the packaged chip can be transmitted to the PCB through the conductors, so that complex cooling system can be avoided.
US07851810B2 Method of manufacturing semiconductor light emitting device
A semiconductor light emitting device includes a multi-layered semiconductor layer having at least a first conductive type cladding layer, an active layer, a second conductive type first cladding layer, an etching stop layer, and a second conductive type second cladding layer on a substrate. An upper section of a ridge groove is formed by an anisotropic etching process, as a first groove in such a way as to have a depth from a surface of the multi-layered semiconductor layer and as not to cross the etching stop layer at the depth. A bottom groove of the ridge groove is formed by an isotropic etching process, as a second groove by performing etching in such a way as to be stopped by the etching stop layer.
US07851808B2 Nitride semiconductor light emitting diode
A nitride semiconductor light emitting diode (LED) comprises an n-type nitride semiconductor layer; an electron emitting layer formed on the n-type nitride semiconductor layer, the electron emitting layer being composed of a nitride semiconductor layer including a transition element of group III; an active layer formed on the electron emitting layer; and a p-type nitride semiconductor layer formed on the active layer.
US07851806B2 Thin film transistor liquid crystal display array substrate and manufacturing method thereof
The present invention discloses a method for manufacturing a TFT LCD array substrate by utilizing the gray tone mask technology and the photoresist lifting-off technology with only two masks in two photolithography processes, and to a TFT LCD array substrate manufactured by the same. In the resultant array substrate, the gate line and the data line are perpendicular to and intersect with each other to define the pixel area, and one of the gate line and the data line is continuous and the other is discontinuous. The array substrate is covered with a passivation protection film. The disconnected gate line or the data line is connected together through the via holes formed in the passivation protection film and the connecting conductive film formed on the passivation protection film. The data line and the source electrode and drain electrode of the TFT are made of the same conductive film, and the connecting conductive film and the pixel electrode are made of the same conductive film in the same photolithography process.
US07851800B2 Thin film transistor and organic electro-luminescent display device
A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.
US07851796B2 Light emitting device and electronic equipment
A display device capable of keeping the luminance constant irrespective of temperature change is provided as well as a method of driving the display device. A current mirror circuit composed of transistors is placed in each pixel. A first transistor and a second transistor of the current mirror circuit are connected such that the drain current of the first transistor is kept in proportion to the drain current of the second transistor irrespective of the load resistance value. The drain current of the first transistor is controlled by a driving circuit in accordance with a video signal and the drain current of the second transistor is caused to flow into an OLED, thereby controlling the OLED drive current and the luminance of the OLED.
US07851792B2 Field-effect transistor
Provided is a field-effect transistor including an active layer and a gate insulating film, wherein the active layer includes an amorphous oxide layer containing an amorphous region and a crystalline region, and the crystalline region is in the vicinity of or in contact with an interface between the amorphous oxide layer and the gate insulating film.
US07851791B2 Thin film transistor having N-type and P-type CIS thin films and method of manufacturing the same
Provided is a thin film transistor (TFT) which uses CIS (CuInSe2), including Se, which is a chalcogen-based material, and can provide a rectifying function, and electric and optical switching functions of a diode. The TFT according to the present invention includes, a substrate, a gate electrode formed on a portion of the substrate, an insulating layer covering the substrate and a gate electrode, a plurality of CIS (CuInSe2) films formed on the insulating layer so as to cover the region where the gate electrode is formed; and source/drain regions separated from each other so as to comprise a trench exposing a portion of a surface of the CIS films.
US07851790B2 Isolated Germanium nanowire on Silicon fin
The present invention describes a method of and an apparatus for providing a wafer, the wafer including Silicon; etching trenches in the wafer to form Silicon fins; filling Silicon Oxide in the trenches; planarizing the Silicon Oxide; recessing the Silicon Oxide to a first thickness to form exposed Silicon pedestals from the Silicon fins; depositing SiGe over the exposed Silicon pedestal; recessing the Silicon Oxide to a second thickness; undercutting the exposed Silicon pedestals to form necked-in Silicon pedestals; oxidizing thermally and annealing the SiGe; and forming Germanium nanowires.
US07851780B2 Semiconductor buffer architecture for III-V devices on silicon substrates
A composite buffer architecture for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with defect densities below 1×108 cm−2 to be formed on silicon substrates. In an embodiment of the present invention, a dual buffer layer is positioned between a III-V device layer and a silicon substrate to glide dislocations and provide electrical isolation. In an embodiment of the present invention, the material of each buffer layer is selected on the basis of lattice constant, band gap, and melting point to prevent many lattice defects from propagating out of the buffer into the III-V device layer. In a specific embodiment, a GaSb/AlSb buffer is utilized to form an InSb-based quantum well transistor on a silicon substrate.
US07851779B2 Medium for use in data storage, thermal energy storage and other applications, with functional layer made of different materials
A medium for use in data storage, thermal energy storage and other applications, the medium comprising a functional layer made of different materials. One embodiment provides a data storage medium. The data storage medium comprises a substrate and a data storage layer supported by the substrate. The data storage layer comprises a plurality of regions each capable of representing a digital value. The data storage layer is at least partly made of a first material and a second material different from the first material. The data storage layer comprises a pattern of discrete portions made of the second material lying in a plane defined by the data storage layer. The pattern is configured such that each region representing a digital value contains a portion made of the first material and at least one of the discrete portions made of the second material. Other embodiments provide a thermal energy storage medium and a sensing medium.
US07851776B2 Phase change RAM device
Disclosed are a phase change RAM device and a method for fabricating a phase change RAM device, which can efficiently lower intensity of current required for changing a phase of a phase change layer. The method includes the steps of providing a semiconductor substrate formed with an insulating interlayer including a tungsten plug, forming a first oxide layer on the semiconductor substrate, forming a pad-type bottom electrode, which makes contact with the tungsten plug, in the first oxide layer, forming a second oxide layer on the first oxide layer including the bottom electrode, and forming a porous polystyrene pattern on the second oxide layer such that a predetermined portion of the second oxide layer corresponding to a center portion of the bottom electrode is covered with the porous polystyrene pattern.
US07851775B2 Gear-type drink-o-meter to monitor fluid consumption
An apparatus for monitoring the consumption of fluid by a user, particularly fluids being drank from a container. The apparatus may be used with wide variety of container types. The fluid monitoring unit uses a pair of gears in rotational engagement with each other such that fluid passes around them and rotation of at least one gear is indicative of fluid consumption. The gears in at least one exemplary embodiment are arranged to have low frictional resistance with respect to each other and their respective axles such that the gears quickly and easily rotate and over a wide fluid flow range. This allows the apparatus to accurately and consistently monitor fluid flow from very low flow rates to high flow rates and therefore provide very reliable consumption information. The apparatus in one exemplary embodiment includes an electromagnetic drinking straw embodiment that allows a user to monitor the consumption of fluids from virtually any container type.
US07851773B2 Ion beam apparatus and method employing magnetic scanning
A multipurpose ion implanter beam line configuration comprising a mass analyzer magnet followed by a magnetic scanner and magnetic collimator combination that introduce bends to the beam path, the beam line constructed for enabling implantation of common monatomic dopant ion species cluster ions, the beam line configuration having a mass analyzer magnet defining a pole gap of substantial width between ferromagnetic poles of the magnet and a mass selection aperture, the analyzer magnet sized to accept an ion beam from a slot-form ion source extraction aperture of at least about 80 mm height and at least about 7 mm width, and to produce dispersion at the mass selection aperture in a plane corresponding to the width of the beam, the mass selection aperture capable of being set to a mass-selection width sized to select a beam of the cluster ions of the same dopant species but incrementally differing molecular weights, the mass selection aperture also capable of being set to a substantially narrower mass-selection width and the analyzer magnet having a resolution at the mass selection aperture sufficient to enable selection of a beam of monatomic dopant ions of substantially a single atomic or molecular weight, the magnetic scanner and magnetic collimator being constructed to successively bend the ion beam in the same sense, which is in the opposite sense to that of the bend introduced by the analyzer magnet of the beam line.
US07851770B2 Device for optical excitation using a multiple wavelength arrangement
The invention relates to a device for optical excitation, in particular luminescent excitation of biomolecules (40) in a fluid sample, comprising a multiple wavelength generator which generates at least one array of spots (60) with different wavelengths at least one defined area of the device.
US07851765B2 Device and method for cooling an X-radiation detector
A cooling device is disclosed for a radiation detector including a detector surface and a plurality of collimator plates arranged in the direction of X-radiation before the detector surface. In order to produce the cooling device of at least one embodiment, the collimator plates are designed and/or the cooling device includes a ventilation device which is designed, so that the space between the collimator plates is at least partially exposed to a cooling air flow in order to cool the radiation detector. A corresponding method for cooling an X-radiation detector is furthermore described in at least one additional embodiment.
US07851762B2 Optical analysis device
An optical analysis device that operates according to the principle of radiation absorption, has a housing (2) with at least one radiation-permeable housing element (3), at least one radiation source (4) having a reflector (5) associated with it, at least a first detector (6) and a second detector (7) as well as an external reflector (8) located outside the housing (2), wherein an absorption space is formed by the external reflector (8) and the radiation-permeable housing element (3), and a measuring beam (10) emitted by the radiation source (4) and the reflector (5) returns to the housing (2) again after being reflected by the external reflector (8), and wherein the external reflector (8) has at least one recess (12) that does not reflect the measuring beam and behind which a third detector is arranged for receiving the measuring beam.
US07851757B2 Phase plate for electron microscope and method for manufacturing same
A phase plate for an electron microscope in which a portion of a magnetic thin-wire ring or a magnetic thin-wire rod spans an opening of a support member having the opening, the magnetic thin-wire ring or magnetic thin-wire rod generates a vector potential, and a phase difference is formed between electron beams that pass through left and right sides of a spanning portion of the magnetic thin-wire ring or the magnetic thin-wire rod. The phase plate prevents the electron beam loss more effectively, can be applied at an accelerating voltage within a wide rage from a low voltage to a high voltage, causes no difficulties in production, has good utility, and makes it possible to obtain a high-contrast image.
US07851755B2 Apparatus for detecting backscattered electrons in a beam apparatus
A beam apparatus has a beam source producing a primary electron beam, an objective lens focusing the beam onto an observed sample, and at least one condenser lens mounted between the beam source and the objective lens. The condenser lens operates such that the beam forms one crossover point between the condenser lens and the objective lens. A first detector is mounted at the crossover point or at a position closer to the sample than the crossover point. A second detector is mounted at a position closer to the electron source than the crossover point.
US07851753B2 Method and apparatus for reviewing defects
The invention provides an apparatus and a method each capable of highly accurately reviewing at a high speed very small foreign matters and pattern defects occurring during a device production process for forming a circuit pattern on a substrate of semiconductor devices, etc. An objective lens having high NA is installed inside a vacuum chamber for an inspection object having a transparent film formed on the surface thereof and an illumination optical path is formed inside the objective lens so that dark visual field illumination can be made and reflected and scattered light of foreign matters or defects on the surface of the inspection object can be detected with high sensitivity.
US07851749B2 Method for obtaining information and device therefor
A method for obtaining information on a mass of an object by time-of-flight mass spectrometry. This method includes placing colloidal metal particles for promoting ionization of the object inside the object at a depth ranging from 0.1 nm to 100 nm in opposition to a primary beam for the ionization; irradiating the object with the primary beam selected from the group of ions, neutral particles, and electrons, which can be focused, pulsed, and are capable of scanning, and laser beams, which can be focused, pulsed, and are capable of scanning to ionize a constituent of the object and to allow the ionized constituent to fly out of the object; and obtaining information on the mass of the flying constituent of the object by time-of-flight mass spectrometry.
US07851748B2 Synchronous data acquisition for multi-dimensional orthogonal liquid separation system
A circuit synchronizes the actuation of multi-dimensional separating valves with a system clock also coupled to a data acquisition circuit such that signals from a detector are synchronized and no signal information is lost. The system comprises an acquisition clock coupled to a data acquisition logic system and to a modulator valve control. The modulator valve control is, in turn, coupled to a multi-dimensional separation technique valve unit for controlling the valves for introduction of the eluant from a first separation column to a second, faster column in synchronism with acquisition of data by a detector.
US07851746B2 Calibration curves for time-of-flight mass spectrometers
The invention relates to determining the masses from the time-of-flight values of ions in time-of-flight mass spectrometers where the accelerating voltage for the ions is not applied permanently, but is switched on at a certain time, resulting in a temporally changing acceleration for a short time after the voltage has been switched on. An aspect of the invention includes formally describing the effect of the temporally changing acceleration on the calibration curve—an effect which cannot be subjected to a strict mathematical-analytical calculation—by introducing a “reduced mass” m−m0 instead of the mass m. The mass reduction factor m0 does not describe a real mass difference, but a mass-dependent shortfall in the final kinetic energy after the ions have passed through the acceleration, a shortfall which can be observed with the temporally changing acceleration. This surprisingly simple formalism makes it possible to calculate the mass of the ions over a wide mass range and with an accuracy of approximately one part per million of the mass, using a calibration curve containing only four to six calibrated coefficients.
US07851738B2 Driver circuit, related drive control method and image reading apparatus
A driver circuit provided with a shift signal generator for sequentially outputting shift signals at a predetermined time interval; a plurality of amplifiers respectively receiving a plurality of detection signals read out in parallel corresponding to a detectable object image pattern and respectively receiving the shift signals, wherein the plurality of amplifiers respectively amplify and output the detection signals inputted thereto based on the output timing of each of the shift signals inputted thereto; a data converter for outputting in time series each of the amplified detection signals outputted from each of the amplifiers based on the output timing of each of the shift signals and for generating time series read data. Power consumption and the amount of heat generation are suppressed in the driver circuit provided with means to individually control a supply state of electrical current to each of the amplifiers.
US07851731B2 Apparatus and method for microwave cooking of a food product
A cooking apparatus includes a susceptor surface configured to contact a plurality of locations around greater than 180 degrees of the circumference of the food product. Such contact provides for greater surface area contact between the food product and the susceptor for more uniform cooking and crispness. Further, the weight of the food product is used in conjunction with the configuration of the cooking apparatus to increase the surface area contact between the food product and the susceptor. A line of weakness is disposed along the base of the cooking apparatus to allow the side walls of the cooking apparatus to pivot about the line of weakness to open and close the apparatus to allow for insertion and/or removal of the food product. The construction of the cooking apparatus facilitates cool handling of the cooking apparatus after microwave cooking is complete.
US07851730B2 Apparatus for microwave cooking of a food product
A food support surface is elevated by legs or sidewalls to raise a food product above the floor of the microwave to promote even cooking of the food product. Portions of the side walls extend above the food support surface to provide food product control. The side walls are configured to permit easy access to the food product, thus facilitating removal of the food product from the support surface. A susceptor is disposed on the food support surface to provide conductive heating of the portions of the food product contacting the susceptor during microwave heating. The material and construction of the cooking apparatus provides increased rigidity and support for the food product, while also facilitating cool handling of the cooking apparatus after microwave cooking is complete.
US07851728B2 Heater unit
The present invention provides a heater unit which can improve temperature uniformity of a heated object at the time of heating the object. A second heat conductor 32 which is the radial internal part of shaft 22 has a lower heat transfer ratio than a first heat conductor 30 which is the radial external part of shaft 22. As a result, in the case where a heated state and a non heated state of the resistance heating element 18 are repeatedly switched, the movement of heat from the front part 22B of the shaft 22 to the base point part 22A is suppressed by the second heat conductor 32 compared to the first heat conductor 30. As a result, in the part which confronts the hollow part 42 of the shaft 22 in the heater plate 16, the time required to heat the heater plate 16 and the wafer 28 to be heated to a desired heating temperature is shortened when compared to a conventional heater unit. Therefore, it is possible to improve the uniformity of the temperature of the wafer 28 which is to be heated by the heater plate 16.
US07851727B2 Method of controlling an oven with hybrid heating sources
Cooking food in a hybrid conveyor with both electric and gas-fired infrared heaters. The heat output from the gas fired infrared heater is controlled by cycling or pulsing the gas supply to one or more burners that emit infrared heat by heating a nichrome screen wire. The electric power supplied to electrically powered heaters is also controlled.
US07851725B2 Active beam delivery system with image relay
An active laser energy delivery system includes a relay imaging system. Input optics arranged to receive the laser energy, a transmitting mirror having adjustable angle of incidence relative to the input optics, and a robot mounted processing head including an optical assembly are configured to direct laser energy toward the movable target image plane. The laser energy follows an optical path including an essentially straight segment from the transmitting mirror to the receiving mirror, having a variable length and a variable angle relative to the input optics. Diagnostics on the processing head facilitate operation.
US07851723B2 Electric spot welding head
A spot welding head includes an electrical conductor guided into a tubular sheath whose ends are rigidly connected to rear ends of supporting bodies of several electrodes. The sheath defines a substantially stiff loop portion configured and arranged so as to be substantially parallel and to face an annular path defined by the electrodes and the supporting bodies, in such a way that two magnetic fields, one generated by electromagnetic induction caused by electric current flowing through the electric conductor placed into the loop-shaped sheath, and the other generated by electromagnetic induction caused by electric current flowing through the electrodes and the supporting bodies thereof, substantially cancel each other out or generate an overall magnetic field which is located forward of the rear end of the welding head or forward of the operator's body.
US07851721B2 Electronic device sorter comprising dual buffers
A device handler for testing and sorting electronic devices has a testing station operative to test the electronic devices and to classify them according to different binning characteristics. A buffer assembly receives electronic devices which have been classified at the testing station, and the buffer assembly further comprises a first loading region having a plurality of receptacles and a second loading region having a plurality of receptacles. An output station is operative to unload electronic devices according to their different binning characteristics from either one of the first or second loading region of the buffer assembly for storage while electronic devices are being loaded onto the other loading region.
US07851719B2 Seat control system
The present invention relates to a seat control system for a vehicle. The system includes a substrate with a plurality of touch zones disposed on one surface of the substrate, and a plurality of electrode patterns disposed on the opposite surface. An inner electrode of each pattern is aligned with one of the touch zones. Each pattern is electrically coupled to an active electrical component, which energizes the electrodes of the pattern such that electric fields emanate therefrom. The pattern may be capacitively coupled to the component. When the electric field of the inner electrode is disturbed by a stimulus proximate the corresponding touch zone, the component is activated. Upon activation of one of the components, a controller causes the seat to move in a desired direction.
US07851717B2 Light-guide sheet, movable contact unit and switch using the same
A light-guide sheet includes a light transmissive film substrate, and luminescent protrusions formed at predetermined points on the substrate. At least one of the substrate and each of the luminescent protrusions is colored to a color tone that absorbs yellow light more than blue light. Alternatively, a reflective layer colored to a color tone that absorbs yellow light more than blue light is provided on at least one of the top and bottom faces of the substrate.
US07851716B2 Detection device and seat comprising one such device
A detection device comprises a case formed by at least a first and second part able to move with respect to one another between a first and second operating position. Said device comprises an electric contact comprising at least two electric states, closed or open, each electric state being associated with one of the operating positions of the first and second parts, and securing means designed to fix said case onto an external support. Said securing means comprise locking means designed to perform holding of the two parts of the case in one of the two operating positions, fixing of the case onto the support by the securing means rendering the locking means inoperative.
US07851715B1 Fireman switch assembly for activating by a mechanical timer having captive trippers
A fireman switch assembly for activating by a mechanical timer having captive trippers. The assembly includes a mounting plate, a micro-switch, and a lever arm. The mounting plate attaches to the mechanical timer. The micro-switch is attached to the mounting plate. The lever arm is operatively connected to the micro-switch and cooperates with the captive trippers of the mechanical timer to selectively turn the micro-switch ON and OFF.
US07851709B2 Multi-layer circuit board having ground shielding walls
A circuit board includes a plurality of signal lines and a plurality of shielding walls. The shield walls are disposed between the signal lines. Each shield wall includes an upper surface, a lower surface, a rectangular groove, a first metal layer and a second metal layer. The lower surface is opposite to the upper surface. The rectangular groove extends from the upper surface to the lower surface. The first metal layer is disposed on the upper surface. The second metal layer is disposed in the rectangular groove and electrically connected to the first metal layer.
US07851703B2 Gasket sealing and installation process for door gasket on weatherproof outlet electrical box
The present invention is directed to a sealing member for establishing a water resistant seal between two elements which includes a resilient gasket having opposed gasket surfaces for engagement between the two elements; and a water resistant coating applied to the gasket. The water resistant coating providing releasable adhesive sealing contact with at least one of the elements. The present invention is also directed to a method of making a gasket seal for an electrical box.
US07851701B2 Dye-sensitized photoelectric conversion device
A photoelectric conversion device using a semiconductor fine material such as a semiconductor fine particle sensitized with a dye carried thereon, characterized in that the dye is a methine type dye having a specific partial structure, for example, a methine type dye having a specific carboxyl-substituted hetero ring on one side of a methine group and an aromatic residue substituted with a dialkylamino group or an organic metal complex residue on the other side of the methine group, or a methine type dye having a carboxyl-substituted aromatic ring on one side of a methine group and a heteroaromatic ring having a dialkylamino group or an organic metal complex residue on the other side of the methine group; and a solar cell using the photoelectric conversion element. The photoelectric conversion element exhibits a conversion efficiency comparable or superior to that of a conventionally known photoelectric conversion element sensitized with a methine type dye.
US07851693B2 Passively cooled solar concentrating photovoltaic device
A Cassegrain-type concentrating solar collector cell includes primary and secondary mirrors disposed on opposing convex and concave surfaces of a light-transparent (e.g., glass) optical element. Light enters an aperture surface surrounding the secondary mirror, and is reflected by the primary mirror toward the secondary mirror, which re-reflects the light onto a photovoltaic cell. The photovoltaic cell is mounted on a central portion of heat spreader that extends over the primary mirror. The heat spreader transmits waste heat from the photovoltaic cell in a manner that evenly distributes the heat over the optical element, thereby maximizing the radiation of heat from the aperture surface into space. The heat spreader includes a thick copper layer formed on a flexible substrate (e.g., polyimide film) that is patterned with radial arms that facilitate mounting onto the convex surface of the optical element.
US07851690B1 Method and system for automatic calibration of pedal actuator in a reproducing piano
A piano is equipped with an actuator that moves the piano pedal mechanism in a mariner that reproduces the pedaling effects of an original performance with high accuracy. The actuator comprises a solenoid, a permanent magnet, a velocity sense coil, and a Hall-effect sensor. The Hall-effect sensor provides an indication of the displacement of the solenoid plunger in accordance with an inverse-square law. Closed-loop feedback control is provided to effect a very true reproduction of pedaling effects. Automatic calibration allows for simple installation.
US07851685B2 Fingering mechanism for woodwind instruments
A fingering mechanism for a woodwind instrument that comprises a first key that actuates both a first tone hole, corresponding to the first key, and another remote tone hole. By closing the first key corresponding to the first tone hole, the first tone hole is closed only if a second tone hole that is closer to a mouthpiece, with respect to an air column in a tube of the instrument, than the first tone hole is closed as well.
US07851684B1 Anchor bracket for musical instrument strings
A string anchor bracket useful is mounted to the underside of a bridge plate for anchoring a guitar string to a guitar bridge. The anchor bracket has plurality of notches on an anchor bracket plate spaced apart by depending members that depend from the plate at its forward edge forming slots that lead to corresponding notches.
US07851682B1 Inbred maize variety PHEFT
A novel maize variety designated PHEFT and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHEFT with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHEFT through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHEFT or a trait conversion of PHEFT with another maize variety. Inbred maize varieties derived from maize variety PHEFT, methods for producing other inbred maize varieties derived from maize variety PHEFT and the inbred maize varieties and their parts derived by the use of those methods.
US07851679B2 Reproductive ablation constructs
The present invention relates to the regulation of reproductive development, particularly to the genetic ablation of reproductive tissues in angiosperm and gymnosperm species. Reproductive-preferred promoters, regulatory elements, and cytotoxic nucleotide sequences are disclosed herein, as are constructs and methods for genetic ablation.
US07851674B2 Generation of plants with altered oil, protein, or fiber content
The present invention is directed to plants that display an improved oil quantity phenotype or an improved meal quality phenotype due to altered expression of an HIO nucleic acid. The invention is further directed to methods of generating plants with an improved oil quantity phenotype or improved meal quality phenotype.
US07851671B2 Disease-resistant plants and method of constructing the same
The present invention provides transgenic, disease-resistant plants which have been transformed with an expression cassette including a constitutive gene expression promoter; and a gene, under the control of the promoter, encoding a harpin. The transformed cells in the transgenic plant effect the constitutive expression of the harpin in an amount effective for inducing a defense reaction. The harpin is a protein consisting of an amino acid sequence that is at least 90% homologous to the amino acid sequence of SEQ ID NO: 2, and possesses a hypersensitive-response-inducing activity. The present invention also provides methods for producing the transgenic plants, expression cassettes, recombinant vectors and genes encoding harpins.
US07851667B2 Comfortable diaper
An absorbent article, preferably a disposable absorbent article such as a diaper, is disclosed that provides an improved immobilization of absorbent polymer material when the article is fully or partially urine loaded. This absorbent core is useful for providing an absorbent article of increased wearing comfort. Specifically disclosed is an absorbent core useful for an absorbent article comprising a substrate layer and absorbent material, the absorbent material comprising an absorbent polymer material, the absorbent material optionally comprising absorbent fibrous material, the absorbent fibrous material not representing more than 20% of the weight of absorbent polymer material, wherein the absorbent material is immobilized when wet such that the absorbent core achieves a wet immobilization of more than 50%, preferably of more than 60%, 70%, 80% or 90% according to the Wet Immobilization Test described herein.
US07851663B2 Process for producing synthetic petroleum jelly
A method for producing petroleum jelly from hydrocarbons. The method converts the hydrocarbon source into a synthesis gas. The synthesis gas is converted into at least a light-hydrocarbons stream and a heavy-hydrocarbons stream, which both include a plurality of paraffins and a plurality of olefins. The plurality of paraffins is reacted with the plurality of olefins in the presence of a dialkyl peroxide initiator to form the petroleum jelly.
US07851661B2 Method for producing dinitrotoluene
The present invention provides a process for preparing dinitrotoluene, comprising the steps of a) reacting toluene with nitric acid in the presence of sulphuric acid to give mononitrotoluene, b) separating the reaction product from step a) into an organic phase comprising mononitrotoluene and an aqueous phase comprising sulfuric acid, c) reacting the organic phase comprising mononitrotoluene with nitric acid in the presence of sulphuric acid to give dinitrotoluene, d) separating the reaction product from step c) into an organic phase comprising dinitrotoluene and an aqueous phase comprising sulfuric acid, wherein the reaction product from step a) has a content of toluene of from 3.0 to 8% by weight, based on the organic phase, and a content of nitric acid of from 0.1 to 1.2% by weight, based on the aqueous phase, and the phase separation in step b) is effected in such a way that further reaction of the toluene with the nitric acid is prevented.
US07851660B1 Process for making perillyl alcohol
A process for making perillyl alcohol is disclosed. The process comprises isomerizing a starting material comprising trans-isocarveol at a temperature within the range of 100° C. to 220° C. in the presence of a Group 5 metal catalyst to produce perillyl alcohol. We surprisingly found that trans-isocarveol, which can be selectively produced from a commercially available mixture of cis- and trans-LMO, can be isomerized directly to perillyl alcohol. Yields of perillyl alcohol are improved when the isomerization is performed under an inert atmosphere and/or in the presence of a phenolic antioxidant. Performing the isomerization in the presence of a high-boiling alcohol and/or distilling the perillyl alcohol product from the reaction mixture in the presence of a high-boiling alcohol, enhances yields and maximizes catalyst use. The resulting distillation residue, which contains recovered Group 5 metal catalyst, is valuable for catalyzing additional trans-isocarveol isomerizations.
US07851653B2 Method of creating a solvent-free polymeric silicon-containing quaternary ammonium antimicrobial agent having superior sustained antimicrobial properties
An antimicrobial polymer is disclosed containing silicon-containing quaternary ammonium groups, the polymer including in its structure repeating units of Formula II: R3N+R0nSiX′4-nY−  (II) wherein each R and each R0 is independently a non-hydrolysable organic group; each X′ is —OR′, —OH or —O—Si, wherein R′ is an alkyl group of 1 to about 22 carbon atoms, or an aryl group of 6 carbon atoms; n is an integer of 0 to 3; and Y is an anionic moiety suitable to form the salt of the repeating units of Formula II. Also disclosed are methods of making such a polymer and imparting sustained antimicrobial properties to a substrate using the polymer.
US07851649B2 Process for the mononitration of alkanediols
A process for the preparation of compounds of formula HO-A-ONO2  (I) wherein A is a C2-C6 alkylene chain by nitration of the corresponding alkanediols with “stabilized” nitric acid is herein disclosed. The process is safer to operators and allows to obtain advantageous yields on an industrial scale.
US07851645B2 Process for continuous production of organic carbonates or organic carbamates and solid catalysts therefore
Processes for the alcoholysis, inclusive of transesterification and/or disproportionation, of reactants are disclosed. The alcoholysis process may include feeding reactants and a trace amount of soluble organometallic compound to a reactor comprising a solid alcoholysis catalyst, wherein the soluble organometallic compound and the solid alcoholysis catalyst each independently comprise a Group II to Group VI element, which may be the same element in various embodiments. As an example, diphenyl carbonate may be continuously produced by performing transesterification over a solid catalyst followed by disproportionation, where a trace amount of soluble organometallic compound is fed to the transesterification reactor. Also disclosed is a process for reactivating a spent solid alcoholysis catalyst, such as a catalyst useful for transesterifications and/or disproportionations, the process including removing polymeric materials deposited on the catalyst and re-depositing catalytically active metals on the solid catalyst.
US07851644B2 Heterocyclic metallocenes and polymerization catalysts
A new class of heterocyclic metallocenes, a catalytic system containing them and a process for polymerizing addition polymerizable monomers using the catalytic system are disclosed; the heterocyclic metallocenes correspond to the formula (I): YjR″iZjjMeQkPl wherein Y is a coordinating group containing a six π electron central radical directly coordinating Me, to which are associated one or more radicals containing at least one non-carbon atom selected from B, N, O, Al, Si, P, S, Ga, Ge, As, Se, In, Sn, Sb and Te; R″ is a divalent bridge between the Y and Z groups; Z is a coordinating group, optionally being equal to Y; Me is a transition metal; Q is halogen or hydrocarbon substituents; P is a counterion; i is 0 or 1; j is 1-3; jj is 0-2; k is 1-3; and l is 0-2.
US07851642B2 δ-amino-γ-hydroxy-ω-aryl-alkanoic acid amide compound
Disclosed are δ-amino-γ-hydroxy-ω-aryl-alkanoic acid amide compounds of formula (I) and the salts thereof, having renin-inhibiting properties. Also disclosed are pharmaceutical compositions comprising these compounds and methods of administering them for the treatment of hypertension, atherosclerosis, unstable coronary syndrome, congestive heart failure, cardiac hypertrophy, cardiac fibrosis, cardiomyopathy postinfarction, unstable coronary syndrome, diastolic dysfunction, chronic kidney disease, hepatic fibrosis, complications resulting from diabetes, such as nephropathy, vasculopathy and neuropathy, diseases of the coronary vessels, restenosis following angioplasty, raised intra-ocular pressure, glaucoma, abnormal vascular growth, hyperaldosteronism, cognitive impairment, alzheimers, dementia, anxiety states and cognitive disorders.
US07851633B2 Piperidinium compounds and cosmetic compositions containing them
Cosmetic or dermatological compositions which comprise at least one piperidinium salt, preferably a 4-[(2-cyclopentyl-2-hydroxyphenylacetyl)oxy]-1,1-dimethyl-piperidinium salt, and the use thereof, particularly as antiperspirants. This Abstract is neither intended to define the invention disclosed in this specification nor intended to limit the scope of the invention in any way.
US07851632B2 Biphenyl compounds useful as muscarinic receptor antagonists
This invention provides compounds of formula I: wherein a, b, c, m, p, s, t, W, Ar1, X1, R1, R2, R3, R4, R6, and R7 are as defined in the specification. The compounds of formula I are muscarinic receptor antagonists. The invention also provides pharmaceutical compositions containing such compounds, processes and intermediates for preparing such compounds and methods of using such compounds to treat pulmonary disorders.
US07851629B2 Disubstituted phenylpiperidines as modulators of dopamine and serotonin neurotransmission
The present invention relates to compounds which have therapeutic effects against disorders in the central nervous system, and in particular new 4-(ortho,meta-disubstituted phenyl)-1-alkypiperidines. wherein R1, R2, and R3 are as defined.
US07851627B2 Optically active carbamates, process for preparation thereof and use thereof as pharmaceutical intermediates
The present invention is related to 1-[(4-chlorophenyl)-phenylmethyl]-4-(2,2,2-trichloroethoxycarbonyl)-piperazine of the Formula (IV) and optically isomers thereof, process for preparation thereof and the use of the compound of the Formula (IV) in the preparation of 1-(4-chlorophenyl)-phenylmethyl-piperazine and optical isomers and salts thereof. 1-(4-chlorophenyl)-phenylmethyl-piperazine and optical isomers thereof are important intermediates in the preparation of non-sedating antihistamine-type active pharmaceutical ingredients.
US07851626B2 4,4,5,5, tetrasubstituted imidazolines
There is provided a compound of formula I and the pharmaceutically acceptable salts and esters thereof wherein X1, X2, R1, R2, R3, R4, R5 and R6 are herein described. The compounds exhibit activity as anticancer agents.
US07851625B2 Process for preparing 2,3-disubstituted indoles
Disclosed are processes for making 2, 3 disubstituted indole compounds such as compounds of general formula I comprised of the steps of a) reacting a bromoindole compound (i) with a dialkoxyl C1-5 borane in the presence of a ligand, a palladium catalyst and a base to make a compound of general formula (ii); or alternatively reacting compound (i) with a trialkyl magnesiate reagent, followed by treatment with a borate; b) reacting the product of step a with a R2-Hal where R2-Hal is defined herein.
US07851624B2 Triol form of rosuvastatin and synthesis of rosuvastatin
Provided is a rosuvastatin triol and its use as a reference standard for analysis of rosuvastatin. Also provided are methods for preparation of rosuvastatin.
US07851623B2 Chemical process
The present invention relates to chemical processes for the manufacture of certain quinazoline derivatives, or pharmaceutically acceptable salts thereof. The invention also relates to processes for the manufacture of certain intermediates useful in the manufacture of the quinazoline derivatives and to processes for the manufacture of the quinazoline derivatives utilising said intermediates. In particular, the present invention relates to chemical processes and intermediates useful in the manufacture of the compound 4-[(4-fluoro-2-methy-1-1H-indol-5-yl)oxy]-6-methoxy-7-[3-(pyrrolidin-1-yl)propoxy]quinazoline starting from a compound of Formula IX: wherein R4 is a protecting group; or an intermediate there between, using process steps, reagents and conditions as described.
US07851621B2 Synthesis of deoxybiotinyl hexamethylenediamine-dota
A process for the synthesis of deoxybiotinyl hexamethylenediamine0-DOTA is herein described. Said process comprises reacting biotinyl hexamithylenediamine with tri-t-butyl DOTA in the presence of benzotriazol-1-yl-oxytripyrrolidinophosphonium hexafluorophosphate, as the condensing agent, and triethylamine, as a base.
US07851615B2 Lipophilic conjugated iRNA agents
The invention relates to iRNA agents, which preferably include a monomer in which the ribose moiety has been replaced by a moiety other than ribose. The inclusion of such a monomer can allow for modulation of a property of the iRNA agent into which it is incorporated, e.g., by using the non-ribose moiety as a point to which a ligand or other entity, e.g., a lipophilic moiety is directly, or indirectly, tethered. The invention also relates to methods of making and using such modified iRNA agents.
US07851614B2 Terminator from Zea mays lipid transfer protein 1 gene
The present invention provides compositions and methods for regulating expression of heterologous nucleotide sequences in a plant. Compositions are novel nucleotide sequences for a pericarp-preferred promoter and terminator isolated from the maize lipid transfer protein 1 coding region. A method for expressing a heterologous nucleotide sequence in a plant using the regulatory sequences disclosed herein is provided. The method comprises transforming a plant cell to comprise a heterologous nucleotide sequence operably linked to one or more of the regulatory sequences of the present invention and regenerating a stably transformed plant from the transformed plant cell.
US07851609B2 Chlamydia PMP proteins, gene sequences and uses thereof
The invention discloses the Chlamydia PMPE and PMPI polypeptide, polypeptides derived therefrp, (PMP-derived polypeptides), nucleotide sequences encoding said polypeptides, antibodies that specifically bind the PMP polypeptides and PMP-derived polypeptides and T-cells specific for PMP polypeptides and PMP-derived polypeptides. Also disclosed are prophylactic and therapeutic compositions, including immunogenic compositions, e.g., vaccines, comprising PMP polypeptides or PMP-derived polypeptides or antibodies thereto. The invention additionally discloses methods of inducing in animals an immune response to Chlamydia cells, Chlamydia elementary bodies, and/or cells expressing Chlamydial proteins, e.g., cell infected with Chlamydia.
US07851606B2 Negatively charged minor groove binders
The present invention provides a negatively charged minor groove binding compound, oligonucleotide conjugates comprising the same, and methods for using the same. The negatively charged minor groove binding compounds of the present invention comprises an acidic moiety that is capable of being ionized under physiological conditions. In particular, the negatively charged minor groove binding compound of the present invention comprises a binding moiety that binds preferentially into a minor groove of a double, triple or higher stranded DNA, RNA, PNA or hybrids thereof. The binding moiety comprises at least one aryl moiety and an acidic moiety which is covalently attached to a phenyl portion of the aryl moiety or to a heteroatom of a heteroaryl portion of the aryl moiety.
US07851605B2 Recombinant vaccine for preventing and treating porcine atrophic rhinitis
Disclosed is a recombinant vaccine for porcine atrophic rhinitis. A vaccine is provided which uses a Pasteurella multocida (D:4) outer membrane protein H. The vaccine uses a small size of peptides, so that it exhibits a remarkable activity. In addition, it is possible to provide a vaccine that can be applied in the body through a variety of routes.
US07851603B2 Cloning, sequencing and expression of a gene encoding an eukaryotic amino acid racemase, and diagnostic, therapeutic, and vaccination applications of parasite and viral mitogens
A method of preventing or inhibiting infection by a parasite or virus in vivo comprising administering to a human in need thereof a parasite or virus mitogen in a sub-mitogenic amount sufficient to induce a protective immune response against the parasite or virus in the human.
US07851602B2 Glucopyranosyl-substituted ((hetero)cycloalkylethynyl-benzyl)-benzene derivatives, medicaments containing such compounds, their use and process for their manufacture
Glucopyranosyl-substituted ((hetero)cycloalkylethynyl-benzyl)-benzene derivatives of the general formula I where the groups R1 to R6 as well as R7a, R7b, R7c are defined according to claim 1, including the tautomers, the stereoisomers thereof, the mixtures thereof and the salts thereof. The compounds according to the invention are suitable for the treatment of metabolic disorders.
US07851599B2 Combination of an anti-ED—B fibronectin domain antibody—IL-2 fusion protein and gemcitabine
The invention refers to the use of L19IL2 for treatment of pancreatic cancer. In another embodiment, the invention relates to a combination (i) of a fusion protein, comprising an Interleukin 2 part and an antibody part, specifically recognizing the extra domain B of fibronectin (ED-B-fibronectin), and (ii) gemcitabine.
US07851592B2 Compositions and methods for inhibiting G2 cell cycle arrest and sensitizing cells to DNA damaging agents
The invention provides compositions and methods for inhibiting Chk1 and/or Chk2 kinases. Also provided are compositions and methods for inhibiting G2 cell arrest checkpoint, particularly in mammalian, e.g., human, cells. The compositions and methods of the invention are also used to treat disorders of cell growth, such as cancer. In particular, the invention provides methods for selectively sensitizing G1 checkpoint impaired cancer cells to DNA damaging agents and treatments. Also provided are methods for screening for compounds able to interact with, e.g., inhibit, enzymes involved in the G2 cell cycle arrest checkpoint, such as Chk1 and/or Chk2/Cds1 kinase.
US07851590B2 Y2 selective receptor agonists for therapeutic interventions
The modified human PP peptides (i) [Lys4,Leu17,Ser30,Gln34]hPP, (ii) Lys4,Leu17,Thr30,Gln34]hPP; and (iii) [Lys4,Leu17,oxidised Met30,Gln34]hPP wherein “oxidised Met” may be the sulfoxide or sulfone, and certain analogues and derivatised forms thereof as referred to in the specification, are selective agonists of the Y2 receptor relative to the Y1 and Y4 receptors, and are useful for, for example, appetite control and therapeutic angiogenesis.
US07851588B2 CRFR1 selective ligands
CRF peptide analogs that bind to CRFR1 with an affinity far greater than they bind to CRFR2. Some of these analogs exhibit CRF agonist activity. One exemplary analog that may be made by solid-phase synthesis is:(cyclo 31-34)[Ac-Pro4,D-Phe12,Nle18,21,Glu31,Lys34]-sucker urotensin(4-41).
US07851586B2 Peptides for activation and inhibition of δPKC
Peptides able to inhibit or activate the translocation or function of δPKC are identified. Administration of the peptides for protection or enhancement of cell damage due to ischemia is described. Therapeutic methods to reduce damage to cells or to enhance damage to cells due to ischemia are also described, as well as methods for screening test compounds for δPKC-selective agonists and antagonists.
US07851585B2 Polyacetal compositions with improved tribological properties
The invention relates to polyacetal compositions comprising a mixture of (i) a polyacetal resin, (ii) p-aramid particles and (III) a vinyl-terminated dimethyl siloxane polymer. These compositions are useful in preparing molded articles exhibiting a good balance between high self-lubricating properties and wear resistance, and especially useful in articles that are in motion with respect to other parts they are in contact with.
US07851583B2 Process and activated carbon catalyst for ring-opening polymerization
An oxirane compound of following Formula (1), such as glycidol, is reacted in the presence of a powdered activated carbon, where necessary, with an initiator such as a polyhydric alcohol, an aliphatic alcohol, or an aliphatic carboxylic acid, to yield, for example, a polyglycidol, a polyglycidol alkyl ether, or a polyglycidol alkyl ester. wherein R1 and R2 may be the same as or different from each other and each represent one selected from hydrogen (H); a branched- or straight-chain alkyl group having one to thirty carbon atoms or an aryl group; and a functional group represented by —CH2-M, wherein M represents OH, F, Cl, Br, or —OR3, wherein R3 represents an alkyl group having one to twenty carbon atoms, allyl group, or an aryl group. A target compound can be obtained in a high yield with high quality according to this invention, from which the catalyst can be easily separated.
US07851580B2 Polymer electrolyte membranes (PEMs) based on imidazole ring terminated flexible branches grafted on hybrid inorganic-organic polymers
A composition of matter comprises a polymer network, including silicon atoms and oxygen atoms, a first organic side-chain attached to at least some silicon atoms within the polymer network comprising a flexible linking group and a terminal group, the terminal group including at least one atom providing a lone pair of electrons. The composition of matter can be used to form a proton-conducting membrane. In illustrative examples, the polymer network can be an organic-inorganic hybrid network and the terminal group can includes a nitrogen-containing heterocycle.
US07851577B2 Polymerization process using zinc halide initiators
A cationic polymerization process for isoolefins using a zinc halide initiator. The zinc halide initiator is added to a solution of the isoolefin in a suitable solvent, preferably a halocarbon solvent. Polymerization reactions are normally conducted at temperatures high enough to allow the zinc halide initiator to dissolve in the solution. An alkyl halide activator may optionally be used and is preferably added to the solution prior to the zinc halide initiator. A multiolefin may optionally be present in the solution. The process is particularly useful in the formation of isoolefin homopolymers and co-polymers of isoolefins and multiolefins, such as butyl rubber.
US07851570B2 Precatalysts useful in polyolefin polymerization reactions
Compounds are provided that are useful as precatlysts in the polymerization of olefins such as ethylene and propylene. Other compounds are useful as intermediates in the production of such precatalysts.
US07851569B2 Rare earth metal complex, polymerization catalyst, and process for producing polymer
A rare earth metal complex represented by the formula (1): in which A represents a Group 14 element of the periodic table, Cp represents a group having a substituted or unsubstituted cyclopentadienyl anion moiety, Ln represents a Group 3 metal atom or a lanthanoid metal atom, R1 to R6 are the same or different, and represent a hydrogen atom, a halogen atom, an alkyl group having 1 to 20 carbon atoms, an aryl group having 6 to 20 carbon atoms, an aralkyl group having 7 to 20 carbon atoms, a silyl group substituted with a hydrocarbon group having 1 to 20 carbon atoms, an alkoxy group having 1 to 20 carbon atoms, R7 represents an alkyl group having 1 to 20 carbon atoms, an aryl group having 6 to 20 carbon atoms, or an aralkyl group having 7 to 20 carbon atoms, Xs represent a monoanionic ligand, Ys represent a neutral ligand, m represents an integer of 1 to 3, and n represents an integer of 0 to 3. The rare earth metal complex is useful as, for example, a catalyst for polymerization reaction of olefins. A polar monomer such as a lactone can be polymerized using the rare earth metal complex as a catalyst.
US07851567B2 Process for polymerizing olefins in the presence of an olefin polymerization catalyst
The present invention relates to a process for the preparation of multimodal ethylene homo- or copolymers in at least two stages, the process comprising preparation of a first ethylene homo- or copolymer fraction in a loop reactor in slurry phase, preparation of a second ethylene homo- or copolymer fraction in a gas phase reactor, by using a catalyst not containing an inorganic oxide support, and operating the gas phase reactor in such conditions that at least part of the gas is recycled, and that at least a part of the recycled gas is condensed and the (partially) condensed gas is re-introduced into the gas phase reactor.
US07851563B2 Silicone gel composition that yields cured product having displacement durability
The invention provides a silicone gel composition comprising: (A) an organopolysiloxane represented by an average composition formula (1) shown below: RaR1bSiO(4-a-b)/2  (1) (wherein, R represents an alkenyl group, R1 represents a monovalent hydrocarbon group that contains no aliphatic unsaturated bonds, and a, b and a+b are numbers that satisfy specific numerical ranges), and containing at least one alkenyl group bonded to a silicon atom within each molecule, (B) a component composed of: (B-1) an organohydrogenpolysiloxane represented by an average composition formula (2) shown below: (HR22SiO1/2)c(R32SiO)d(R4SiO3/2)e  (2) (wherein, R2, R3 and R4 represent monovalent hydrocarbon groups that contain no aliphatic unsaturated bonds, and c, d and e are numbers that satisfy specific numerical ranges, provided that c+d+e=1), containing at least three hydrogen atoms bonded to silicon atoms within each molecule, and containing at least two (R4SiO3/2) units within each molecule, and (B-2) an organohydrogenpolysiloxane represented by an average composition formula (3) shown below: R5fHgSiO(4-f-g)/2  (3) (wherein, R5 represents a monovalent hydrocarbon group that contains no aliphatic unsaturated bonds, and f, g and f+g are numbers that satisfy specific numerical ranges), containing either one or two hydrogen atoms bonded to silicon atoms within each molecule, and containing either one or two hydrogen atoms bonded to silicon atoms at molecular chain terminals.
US07851558B2 Brominated butadiene/vinyl aromatic copolymers, blends of such copolymers with a vinyl aromatic polymer and polymeric foams formed from such blends
A thermally stable brominated butadiene copolymer, such as brominated styrene/butadiene block copolymer, brominated random styrene/butadiene copolymer or brominated styrene/butadiene graft copolymer, preparation of the brominated butadiene copolymers, use of the brominated butadiene copolymers as a flame retardant additive and polymeric compositions, both foamed and non-foamed, that incorporate a flame-retarding amount of brominated butadiene copolymer.
US07851557B2 Organic/inorganic composite electrolyte membranes using zeolite and fuel cell comprising the same
Disclosed is an organic/inorganic composite electrolyte membrane comprising: (a) a sulfonated fluorine-free hydrocarbon-based polymer; and (b) inorganic particles capable of collecting moisture, wherein the inorganic particles include zeolite. Also, disclosed are an electrode comprising the zeolite as a component for forming a catalyst layer, a membrane electrode assembly comprising the electrolyte membrane and/or the electrode, and a fuel cell having the membrane electrode assembly. The organic/inorganic composite electrolyte membrane using the hydrophilic zeolite in combination with the sulfonated fluorine-free hydrocarbon-based polymer shows high proton conductivity, and thus can impart excellent quality to a fuel cell even under high-temperature and low-humidity conditions.
US07851556B2 Thermoplastic vulcanizates with low compression set
A thermoplastic vulcanizate comprising a dynamically-cured rubber, where the rubber is selected from the group consisting of ethylene-propylene-non-conjugated diene rubber, propylene-based rubbery copolymers with units derived from non-conjugated diene monomers, and butyl rubber, where dynamic vulcanization is effected with a phenolic resin or a silicon-containing curative, and where the rubber is dynamically cured to an extent where greater than 94% by weight of the rubber is insoluble in cyclohexane at 23° C., and from about 25 to about 250 parts by weight of a thermoplastic polymer phase per 100 parts by weight rubber, where from about 75% to about 100% by weight of said thermoplastic polymer phase includes a butene-1-based polymer.
US07851554B2 Propylene impact copolymers with balanced impact strength and stiffness
Disclosed is a propylene impact copolymer comprising a first polypropylene having an MFR1 within the range from 15 to 40 dg/min; a second polypropylene having an MFR2 within the range from 50 to 190 dg/min; an elastomeric polymer; and wherein the propylene impact copolymer has an MFRICP within the range from 6 to 18 dg/min; a 1% Secant Flexural Modulus of greater than 150 kpsi (1030 MPa); and an Izod Impact at 25° C. of greater than 10 ft-lbs/in (530 J/m). The impact copolymer may be produced in a two or three tandem-reactor system wherein the catalyst composition used in the second reactor to produce the second polypropylene is different from the catalyst composition used in the first reactor to produce the first polypropylene.
US07851551B2 Polymer processes
Disclosed is a process for the preparation of poly(vinylbenzyl alcohol) by, for example the hydrolysis of poly(vinylbenzyl acetate) in the presence of a basic catalyst in an organic solvent.
US07851550B2 Method for surface crosslinking water-absorbing resin and method for manufacturing water-absorbing resin
A method for surface crosslinking water-absorbing resin of the present invention includes a step (1) of obtaining a wet mixture, a step (2) of obtaining a dried particulate composition, and a step (3) of carrying out a surface crosslinking reaction. With this, since a processing time of each step becomes short, it is possible to mass produce the water-absorbing resin having excellent physical properties. Moreover, a method for manufacturing the water-absorbing resin of the present invention includes a modifying step and a cooling step. The modifying step and/or the cooling step are/is carried out by using stirring means including a rotation axis having a plurality of stirring boards, and the stirring means includes the stirring board having a specific thickness and/or a scraping blade having a specific shape. With this, it is possible to suppress the generation of the fine powder in the modifying step and/or the cooling step.
US07851547B2 Curable composition and coated article
A curable composition comprises (A) an organic/inorganic composite in which a hydrolyzable silyl group and/or SiOH group-containing polysiloxane is bonded to a vinyl polymer through a Si—C bond, and (B) an organic UV absorber having a molecular weight of at least 500 and a weight retentivity of at least 95% when held at 150° C. for 24 hours in an open state. The curable composition is coated and cured to an article, whereby the article is endowed with satisfactory weathering resistance while minimizing coloration or degradation.
US07851545B2 Paint composition
There is described a water-based paint composition comprising least one pigment; at least one alkali soluble polymer in an amount effective to increase the open time of the composition; at least one substituted amine in an amount effective to adjust the pH to about 7 to about 11: a binding effective amount of at least one water dispersible acrylic polymer; and an effective amount of at least one alkali soluble or alkali swellable thickener. A method of extending the open time of a water-based acrylic paint composition and a method of controlling the open time of a water-based acrylic paint composition are also described.
US07851534B2 Thermally conductive sheet
There is provided a thermally conductive sheet containing: a binder component, a modified liquid polyolefin, and at least one thermally conductive filler selected from the group consisting of metal oxide and metal hydroxide. The thermally conductive sheet can have good moldability, and the surface of the sheet is inhibited from being contaminated by bleeding or the like. Further, the sheet can have good flexibility maintained for a long period of time and is inhibited from deteriorating or emitting an offensive odor due to decomposed matter of an organic phosphorous compound even when an organic phosphorous compound is contained.
US07851530B2 Carbon-substituted methyl amine derivatives and their use as a rheology control agents
The invention relates to the use as sagging controlling agent (SCA) in coating compositions of rheology control agents obtainable by reacting one or more polyisocyanates with one or more optically active amines or by reacting one or more polyamines with one or more optically active isocyanates. The invention also relates to rheology control agents obtainable as described above using specific polyisocyanates or polyamines. In addition the invention relates to the use of these rheology control agents in various applications.
US07851525B2 High temperature vulcanized silicone rubber
A high temperature vulcanized silicone rubber is disclosed and includes a high temperature vulcanized silicone rubber as a silicone base and melamine cyanurate as a filler and at least one inorganic filler which is different from melamine cyanurate, and optionally further additives. A total filler content can be within a range of 40 parts (by weight) to 230 parts (by weight) per 100 parts (by weight) of silicone base; wherein (i) the melamine cyanurate is present within a range of 2 parts (by weight) to 40 parts (by weight) per 100 parts (by weight) of silicone base; and (ii) the at least one inorganic filler is an electrical insulator.
US07851524B2 Antistatic agents, compositions thereof, and methods of manufacture
A quaternary onium aromatic sulfonate represented by the formula: wherein each R1 independently comprises substituted or unsubstituted, aliphatic or aromatic, hydrocarbyl, carbocyclic or heterocyclic radicals, each X is selected from the group consisting of phosphorus and nitrogen; wherein “a” has a value of 0, 1 or 2, and “b” has a value of 0 or 1 with the proviso that (a+b) is equal to 1 or 2; G1 is an aromatic group; E comprises a bis(carbonyloxyalkyl)polydiorganosiloxane, a bis(carbonyloxyaryl)polydiorganosiloxane, and an ether linkage; each Y1 independently comprises hydrogen, a monovalent hydrocarbon group, alkenyl, allyl, halogen, bromine, chlorine; nitro; and OR, wherein R is a monovalent hydrocarbon group.
US07851522B2 Adhesive
An aqueous adhesive composition includes a polymer adhesive material having a pH of less than 7, a cationic thickener or an anionic thickener formed from at least one anionic monomer having a pKa of less than 3, and water. The adhesive composition has a stringing length of 9 cm or less and a sag distance of 10 mm or less.
US07851517B2 Antimicrobial credit cards, identification cards, membership cards and identification badges and badge holders
A system, method and apparatus provices an antimicrobial card, badge holder or token made from an antimicrobial polymereric material. The antimicrobial polymereric material includes one or more polymers and one or more antimicrobial agents that affect the growth of bacteria, fungi, virus or a combination thereof.
US07851516B2 Free-flowing composition of a biocide and a processing additive therewith for incorporation into a polymer or plastic matrix product
A matrix which is a polymer, plastic or polymer-wood composite includes a composition of a biocide and a processing additive therewith in the form of a free-flowing powder.
US07851515B2 Hydrolysis-stable self-etching single-component dental adhesive
Dental composition containing (i) at least one acid (meth)acrylamide monomer which has two or more polymerizable groups, (ii) at least one acid monomer which has only one polymerizable group and (iii) at least one polymerization initiator.
US07851514B2 Process for producing regenerated resin, regenerated resin, processing recovered matter from resin composition, regenerated resin composition and method of regenerating resin composition
The invention provides a process for producing a recycled resin, which includes: a first step of decomposing a resin composition containing a thermosetting resin in a supercritical or subcritical solvent having a monomer constituting the thermosetting resin or a derivative thereof as an essential component and a second step of adding a polyfunctional compound thereto to process; a recycled resin or a processed and recovered matter obtained according to the process for producing; a recycled resin composition formed from a recycled resin and/or a processed and recovered matter of the resin composition; and a method for recycling a resin composition, which reuses said recycled resin and/or said processed and recovered matter of a resin composition as a raw material of a recycled resin composition.
US07851510B2 Gossypol derivatives, production method thereof and uses of same
The present invention relates to compounds of general formula (1): in which, independently of each other, R1 and R2 represent: —OH, or —CH2—O—R3, or —CH2—S—R3, or R3, R4, R5 and R6 representing, independently of each other, —H or a carbon-containing group with 1 to 10 carbon atoms, saturated or unsaturated, optionally substituted with one or more heteroatomic groups. The invention also relates to pharmaceutical compositions containing these compounds, and their uses, in particular in the context of the treatment of cancer.
US07851509B2 Polymorphs of suberoylanilide hydroxamic acid
The present invention provides methods of selectively inducing terminal differentiation, cell growth arrest and/or apoptosis of neoplastic cells, and/or inhibiting histone deacetylase (HDAC) by administration of pharmaceutical compositions comprising potent HDAC inhibitors. The oral bioavailability of the active compounds in the pharmaceutical compositions of the present invention is surprisingly high. Moreover, the pharmaceutical compositions unexpectedly give rise to high, therapeutically effective blood levels of the active compounds over an extended period of time. The present invention further provides a safe, daily dosing regimen of these pharmaceutical compositions, which is easy to follow, and which results in a therapeutically effective amount of the HDAC inhibitors in vivo. The present invention also provides a novel Form I polymorph of SAHA, characterized by a unique X-ray diffraction pattern and Differential Scanning Calorimetry profile, as well a unique crystalline structure.
US07851505B2 Thiotungstate analogues and uses thereof
The current invention provides novel thiotungstate derivatives, methods of making novel thiotungstate derivatives, pharmaceutical compositions of novel thiotungstate derivatives, methods of using novel thiotungstate derivatives to treat diseases associated with aberrant vascularization, copper metabolism disorders and obesity and methods of using pharmaceutical compositions of thiotungstate derivatives to treat diseases associated with aberrant vascularization, copper metabolism disorders, neurodegenerative disorders, obesity or NF-κB dysregulation.
US07851503B2 Thrombopoetin receptor activator and process for producing the same
A preventive, therapeutic or improving agent for diseases against which activation of the thrombopoietin receptor is effective or a platelet increasing agent, which contains a thrombopoietin receptor activator represented by the formula (1): [wherein each of R1 and R3 is independently a hydrogen atom, SO3H, a C1-6 alkyl group, a C1-6 alkylcarbonyl group or a C6-18 arylcarbonyl group (the C1-6 alkyl group, the C1-6 alkylcarbonyl group and the C6-18 arylcarbonyl group may be optionally substituted with a halogen atom, a hydroxyl group, a C2-6 alkenyl group, a C1-6 alkoxy group, a C1-6 alkoxycarbonyl group, a C6-18 aryl group, a 2-pyridyl group, a 3-pyridyl group, a 4-pyridyl group, a 2-furanyl group, a 3-furanyl group, a 2-thienyl group, a 3-thienyl group or NR9R10) , and each of R2, R4 and Ra is independently a hydrogen atom, a hydroxyl group or a C1-6 alkoxy group].
US07851501B2 Aromatic nitrocatechol compounds and their use for modulating processes mediated by cell adhesion molecules
Pharmaceutical compositions comprising at least one compound of e.g. the formulas (Ie) and a pharmaceutically acceptable carrier which is useful in a medicine wherein the symbols and substituents have the following meaning —X— is e.g. and Y is e.g. or the pharmaceutically acceptable salts, esters or amides and prodrugs of the above identified compounds can be applied to modulate the in-vitro and in-vivo binding processes mediated by E-, P- or L-selectin binding.
US07851499B2 Insecticidal fertilizer mixtures
This invention relates to insecticidal fertilizer mixtures containing (a) an agonist or antagonist of ion channels in the insect nervous system; (b) a fertilizer; (c) optionally, an adherent; and (d) optionally, one or more auxiliaries and/or carrier materials.
US07851497B2 Bactericidal composition for agricultural or horticultural use and method of controlling plant disease
To provide an improved fungicidal composition for agricultural or horticultural use, and a method for controlling plant diseases by applying the composition to plants.A fungicidal composition for agricultural or horticultural use, which comprises at least one imidazole compound of the formula (I): wherein R is a C1-6 alkyl group or a C1-6 alkoxy group, and n is an integer of from 1 to 5, and propamocarb hydrochloride, as active ingredients; and a method for controlling plant diseases by applying the composition to plants.
US07851494B2 Method for the treatment of metabolic disorders
Compounds useful for the treatment of various metabolic disorders, such as insulin resistance syndrome, diabetes, hyperlipidemia, fatty liver disease, cachexia, obesity, atherosclerosis and arteriosclerosis, are disclosed.
US07851493B2 Phenyl-1,2,4-oxadiazolone derivatives with phenyl group, processes for their preparation and their use as pharmaceuticals
The invention relates to phenyl-1,2,4-oxadiazolone derivatives with phenyl group and to their physiologically acceptable salts and physiologically functional derivatives showing PPARdelta agonist activity.What are described are compounds of the formula I, in which the radicals are as defined, and their physiologically acceptable salts and processes for their preparations. The compounds are suitable for the treatment and/or prevention of disorders of fatty acid metabolism and glucose utilization disorders as well as of disorders in which insulin resistance is involved and demyelinating and other neurodegenerative disorders of the central and peripheral nervous system.
US07851487B2 Use of tetrahydropyridines in the treatment of central nervous system disorders
Disclosed are methods for alleviating symptoms of neuropsychiatric disorders using tetrahydropyridine derivatives bearing aromatic substituents. The method comprises administering to an individual a tetrahydropyridine derivative bearing aromatic substituents in an amount effective to alleviate symptoms of the neuropsychiatric disorder.
US07851486B2 Susceptibility gene for myocardial infarction, stroke, and PAOD; methods of treatment
Linkage of myocardial infarction (MI) and a locus on chromosome 13q12 is disclosed. In particular, the FLAP gene within this locus is shown by genetic association analysis to be a susceptibility gene for MI and ACS, as well as stroke and PAOD. Pathway targeting for treatment and diagnostic applications in identifying those who are at risk of developing MI, ACS, stroke or PAOD, in particular are described.
US07851485B2 Therapeutic agent for neuropathic pain
Disclosed is a therapeutic agent for neuropathic pain having an excellent therapeutic effect on neuropathic pain which is a intractable disease. More specifically, disclosed are a therapeutic agent for neuropathic pain which comprises a peripheral benzodiazepine receptor antagonist (particularly PK 11195) as the active ingredient; a pharmaceutical composition for the treatment of neuropathic pain which comprises a peripheral benzodiazepine receptor antagonist as the active ingredient; a method for the treatment of neuropathic pain using a peripheral benzodiazepine receptor antagonist; and others.
US07851484B2 Certain chemical entities, compositions, and methods
Provided are certain chemical entities, and methods of use to modulate skeletal myosin, skeletal actin, skeletal tropomyosin, skeletal troponin C, skeletal troponin I, skeletal troponin T, and skeletal muscle, including fragments and isoforms thereof, as well as the skeletal sarcomere, and methods of use in the treatment of muscle weakness and/or cachexia, as part of a rehabilitation or conditioning exercise regimen, or in the treatment of fraility, post-polio syndrome, obesity, sarcopenia, wasting syndrome, muscle spasm, and other indications.
US07851477B2 Method for the treatment of skin
The present invention relates to a method for the treatment of skin redness by topically applying a composition containing caffeine to the affected skin. The invention method finds particular use on persons having at least one of the following symptoms: rosacea, folliculitis or skin irritated by chemical or physical peelings.
US07851476B2 Crystalline forms of 1-benzoyl-4-[2-[4-methoxy-7-(3-methyl-1H-1,2,4-triazol-1-YL)-1-[(phosphonooxy)methyl]-1H-pyrrolo[2,3-C]pyridin-3-YL]-1,2-dioxoethyl]-piperazine
Crystalline forms of 1-benzoyl-4-[2-[4-methoxy-7-(3-methyl-1H-1,2,4-triazol-1-yl)-1-[(phosphonooxy)methyl]-1H-pyrrolo[2,3-c]pyridin-3-yl]-1,2-dioxoethyl]-piperazine its salts and solvates thereof are herein set forth, as are pharmaceutical compositions comprising the crystalline form(s), as well of methods of using the crystalline form(s) in the treatment of HIV and/or AIDS, and methods for obtaining such crystalline form(s).
US07851471B2 Compounds I
The present application relates to new compounds of formula (I), to pharmaceutical compositions comprising the compounds, to processes for their preparation, and to the use of the compounds as leptin receptor modulator mimetics in the preparation of medicaments against conditions associated with weight gain, type 2 diabetes and dyslipidemias.
US07851463B2 Heterocyclic compounds suitable for treating disorders that respond to modulation of the dopamine D3 receptor
The invention relates to compounds of the formula (I). The invention also relates to the use of a compound of the formula I or a pharmaceutically acceptable salt thereof for preparing a pharmaceutical composition for the treatment of a medical disorder susceptible to treatment with a dopamine D3 receptor ligand.The invention also relates to the use of a compound of the formula I or a pharmaceutically acceptable salt thereof for preparing a pharmaceutical composition for the treatment of a medical disorder susceptible to treatment with a dopamine D3 receptor ligand.
US07851459B2 Methods for diluting water-stabilized antimicrobial organosilane compositions
The present invention relates to methods for diluting water-stable organosilane compositions comprising an organosilane, optionally having a non-hydrolyzable organic group, but having one or more hydrolyzable groups, and an acidified stabilizing solution prepared from at least one acid, and at least one cationic surfactant, preferably at least one quaternary ammonium salt (QAS), in water. The organosilane composition is diluted with a glycol ether. The resultant diluted organosilane composition may be used to antimicrobially treat a substrate.
US07851457B2 β-Cyclodextrin derivatives
The invention provides low molecular weight compounds that block the pore formed by protective antigen and inhibit anthrax toxin action. Structures of the compounds are derivatives of β-cyclodextrin. Per-substituted alkylamino derivates displayed inhibitory activity, and they were protective against anthrax lethal toxin action at low micromolar concentrations. Also, the addition of one of the alkylamino derivatives to the bilayer lipid membrane with multiple PA channels caused a significant decrease in membrane conductance. Thus, the invention also provides methods for protection against anthrax toxicity.
US07851456B2 P2Y6 receptor agonists for treating lung diseases
This invention is directed to a method of enhancing or facilitating the clearance of the lung mucus secretions in a subject. This invention is also directed to a method of facilitating the hydration of the lung mucus secretions in a subject. This invention is further directed to a method of preventing or treating diseases or conditions associated with impaired lung or airway function in a human or other mammal. The method comprises administering to a subject a pharmaceutical composition comprising a therapeutic effective amount of P2Y6 receptor agonist compound, wherein said amount is effective to activate the P2Y6 receptors on the luminal surface of lung epithelia. The P2Y6 receptor agonist compounds useful for this invention include mononucleoside 5′-diphosphates, dinucleoside monophosphate, dinucleoside diphosphates, or dinucleoside triphosphates of general Formula I, or salts, solvates, hydrates thereof.
US07851450B2 Gangliosides with a modified acyl function
The invention relates to a ganglioside mixture, consisting of gangliosides, of the following general formula: (sugar)-OCH2—CH(—NH—CO—R1)—CH(OH)—CH═CH—R2, wherein (sugar) represents a sugar radical, the group —CO—R1 represents an acyl-fatty acid which is bonded to the radical of the molecule in the form of an amide, R1 represents a straight saturated alkyl radical having at least 10 C-atoms and R2 represents a straight, saturated alkyl radical having at least 10 C-atoms or a straight alkenyl radical having at least 10 C-atoms and one, two or three double bond(s). Said mixture is characterised in that at least 10 wt. % of the gangliosides of the general formula I are of the group —CO—R1 and the acyl-fatty acids are a C20:0 fatty acid. Said mixtures exhibit an improved biological activity.
US07851447B2 Methods for nerve repair
The subject invention pertains to compositions and methods for promoting repair of damaged nerve tissue. The compositions and methods of the subject invention can be employed to restore the continuity of nerve interrupted by disease, traumatic events or surgical procedures. Compositions of the subject invention comprise one or more chondroitin sulfate proteoglycan (CSPG)-degrading enzymes that promote axonal penetration into damaged nerve tissue. The invention also concerns methods for promoting repair of damaged nerve tissue using the present compositions and nerve tissue treated according to such methods. The invention also pertains to kits for nerve repair.
US07851446B2 Use of therapeutic human albumin for treatment of alzheimer'S disease
The present invention relates to the use of therapeutic human albumin for the preparation of a drug for the treatment of patients suffering from cognitive disorders. In particular, the invention relates to methods of treating patients suffering from cognitive disorders, in which the mode of administration of the drug comprises the administration to the patient for a minimum of three successive times of a therapeutically effective amount of human therapeutic albumin by plasma exchange and/or intravenous perfusion, independently of the content of Aβ in the patient's blood.
US07851444B2 χ-conotoxin peptides (-1)
An isolated, synthetic or recombinant χ-conotoxin peptide comprising the following sequence of amino acids: Xaa1 Xaa2 Gly Val Cys Cys Gly Tyr Lys Leu Cys His Pro Cys SEQ ID NO. 3 where Xaa1 is a N-terminal Xaa1 is a N-terminal pyroglutamate (pGlu) or D-pyroglutamate (DpGlu) residue; and Xaa2 is Asn or a deletion; or such a sequence in which one or more Cys is replaced with its corresponding D-amino acid and/or one or more amino acid residues other than Cys has undergone a side chain modification, or a salt, ester, amide or prodrug thereof. The invention also relates to pharmaceutical compositions comprising these peptides and the use of these peptides in the prophylaxis or treatment of conditions, such as but not limited to, pain, inflammation, incontinence, cardiovascular conditions and mood disorders.
US07851434B2 Amyloid and amyloid-like structures
The present invention describes a methods, uses, compositions such as adhesive, sealants and coatings, scaffold material, composite material, all comprising amyloid-like materials such as fibrils, in particular those made from fruit or vegetable proteins. The amyloid-like materials impart good mechanical strength to the materials in which it is employed. Inhibition of amyloid formation is also described.
US07851433B2 Method of purifying TFPI and TFPI analogs
Highly purified preparations of TFPI or TFPI analogs can be prepared using a method that generally involves the following steps: (1) expression of TFPI or TFPI analog in E. coli, (2) isolation of refractile bodies, (3) dissolution of the refractile bodies and refolding of the expressed TFPI or TFPI analog, (4) SP-Sepharose fast flow (FF) chromatography, (5) a first concentration and diafiltration step, (6) Q-Sepharose high (HP) performance chromatography, (7) butyl hydrophobic interaction chromatography (HIC), (8) SP-Sepharose HP chromatography, and (9) a second concentration/diafiltration step. Less than about 12% of the TFPI or TFPI analog molecules in such preparations are modified TFPI or TFPI analog species (i.e., oxidized, carbamylated, acetylated, deamidated, aggregated, or misfolded species).
US07851429B2 Recapture of ions applied in a wash process
A wash cycle is provided for a clothes washer, the clothes washer having a wash zone for receiving a substrate load to be cleaned. The wash cycle includes a step of providing a wash liquor for applying to the substrate load. Another step is loading the wash zone with the substrate load. Another step is mixing metal ions with an inactive bleaching agent as catalyst agents to catalyze an activation reaction to produce an active bleaching agent. Another step is combining the active bleaching agent with the wash liquor. Another step is applying the wash liquor with the active bleaching agent to the substrate load. Another step is capturing the metal ions prior to a disposal of the wash liquor.
US07851427B2 Compositions for reducing metal etch rates using stripper solutions containing copper salts
Resist stripping agents, useful for fabricating circuits and/or forming electrodes on semiconductor devices for semiconductor integrated circuits with reduced metal etch rates, particularly copper etch rates, are provided with methods for their use. The preferred stripping agents contain low concentrations of a copper salt with or without an added amine to improve solubility of the salt. Further provided are integrated circuit devices and electronic interconnect structures prepared according to these methods.
US07851426B2 Cleaning liquid and cleaning method using the same
A cleaning liquid used in cleaning of a substrate for use in semiconductor devices conducted after chemical mechanical polishing in manufacture of semiconductor devices, comprising a polycarboxylic acid, an anionic surfactant having an aromatic ring structure in a molecule, a polymer compound having an acidic group on a side chain, and a low molecular weight polyethylene glycol, at the cleaning liquid having a pH of 5 or less, as well as a method of cleaning using the same.
US07851424B2 Antimicrobial hand wash
An antimicrobial hand wash includes a soap, an antimicrobial agent, and an amine salt. The amine salt is found to increase the antimicrobial efficacy of the hand wash. The amine salt produced through the reaction of monoethanolamine and lactic acid is of particular interest as a soap addition. In processes of this invention, it is possible to create the desired amine salt in the soap in situ.
US07851422B2 Quenching oil for reduced pressure quenching and method for quenching
A quenching oil for reduced pressure quenching which comprises a base oil having a kinematic viscosity at 40° C. of 40 mm2/s or more and a vapor blanket breaking agent; and a method for quenching wherein the quenching oil is used and quenching is carried out while adjusting the pressure on the surface of the oil. The method allows the achievement of cooling characteristics over a wide range from those conventionally achieved by a cold oil to those by a hot oil, by the use of a single quenching oil.
US07851418B2 Ashless detergents and formulated lubricating oil containing same
The present invention is directed to ashless detergents comprising the products resulting from the reaction of a salicylic acid, organic group substituted salicylic acid, sulfonic acid or organic groups substituted sulfur acid with thiadiazole or organic group substituted thiadiazole or an alkyl primary or secondary amine, and to formulated lubricating oils containing said ashless detergents.
US07851416B2 Oxidized guar for oilfield servicing fluids
An oilfield servicing fluid composition containing an aldehyde guar produced by enzymatic oxidation of a non-derivatized, straight guar or of a guar derivative. The enzyme used to oxidize the guar to the aldehyde guar is galactose oxidase, which may be combined with catalase or catalase and peroxidase. The aldehyde guar is useful as an effective gelling agent for oilfield servicing fluids such as hydraulic fracturing fluids and stimulation fluids.
US07851415B2 Adaptive cementitious composites for well completions
An adaptive cementitious composite composition, comprising: a coarse particulate material such as sand or proppant; a series of other particulate or fibrous materials; and a carrier fluid; the sand and other particulate materials being present as a series of coarse, medium and fine particle sizes in ratios selected to provide an optimized packing volume fraction; wherein the sand or proppant is coated with a resin and at least one of the other particulate or fibrous materials is a material that can be modified when placed at a downhole location.
US07851414B2 Microemulsion containing oil field chemicals useful for oil and gas field applications
Useful microemulsions have corrosion inhibitors in the internal phase and an external phase, where the corrosion inhibitor has a surfactant property that helps define the microemulsion. For example, the corrosion inhibitor itself may have its pH adjusted so that it also serves the role of surfactant. The corrosion inhibitors form microemulsions with particle or droplet diameters of about 10 to about 300 nm. The microemulsions may be oil-in-water, water-in-oil or bi-continuous.
US07851402B2 Method for solubilizing metal oxides by surface treatment, surface treated metal oxide solutions and method for separating metal oxides
The invention relates to soluble metal oxides and mixed metal oxides and to solutions comprising metal oxides and mixed metal oxides. The invention further relates to a process for preparing a soluble metal oxide and a soluble mixed metal oxide and additionally relates to a process for modifying the solubility of a soluble metal oxide. The metal oxides, mixed metal oxides and solutions thereof have a number of applications and in particular are suitable for use as catalysts and also as precursors for the formation of metal films.
US07851400B2 Multimodal polyethylene obtained with multilayer chromium catalyst
The present invention concerns a catalyst for the production of high density polyethylene, by homopolymerising ethylene or copolymerising ethylene and an alpha-olefinic comonomer comprising 3 to 10 carbon atoms, prepared by the steps of: a) selecting a silica support with a specific surface area larger than 300 m2/g; b) treating the silica support with a titanium compound, in order to introduce titanium into the support, or with an aluminium compound, in order to introduce aluminum into the support; c) either treating the titanated silica support with an aluminum compound, in order to introduce aluminum into the titanated silica support, or treating the aluminated silica support with a titanium compound, in order to introduce titanium into the aluminated silica support; d) depositing a chromium compound on the titanated and aluminated silica support to form a catalyst; e) activating the catalyst of step d) under air in a fluidised bed at a temperature of from 600 to 800° C.
US07851385B2 Low temperature conformal oxide formation and applications
The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.
US07851382B2 Method for manufacturing SiC semiconductor device
A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process.
US07851381B2 Surface treatment method for nitride crystal, nitride crystal substrate, nitride crystal substrate with epitaxial layer and semiconductor device, and method of manufacturing nitride crystal substrate with epitaxial layer and semiconductor device
A surface treatment method for a nitride crystal is a surface treatment method of chemically and mechanically polishing a surface of the nitride crystal. Oxide abrasive grains are used. The abrasive grains have a standard free energy of formation of at least −850 kJ/mol as a converted value per 1 mole of oxygen molecules and have a Mohs hardness of at least 4. The surface treatment method efficiently provides, for efficiently obtaining a nitride crystal substrate that can be used for a semiconductor device, the nitride crystal having the smooth and high-quality surface formed thereon.
US07851375B2 Alkaline etchant for controlling surface roughness of semiconductor wafer
An alkali etchant for controlling surface roughness of a semiconductor wafer, which is a sodium hydroxide solution or a potassium hydroxide solution having a weight concentration of 55 wt % to 70 wt %.
US07851374B2 Silicon wafer reclamation process
By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.
US07851373B2 Processing systems and methods for semiconductor devices
Systems and methods for processing semiconductor devices are disclosed. A preferred embodiment comprises a processing method that includes providing a processing system including a first container and a second container fluidly coupled to the first container, the second container being adapted to receive and retain an overflow amount of a fluid from the first container, and disposing the fluid in the first container and a portion of the second container. The method includes providing at least one semiconductor device, disposing the at least one semiconductor device in the first container, and maintaining the fluid in the second container substantially to a first level while processing the at least one semiconductor device with the fluid.
US07851370B2 Patterning method
A patterning method is provided. In the patterning method, a film is formed on a substrate and a pre-layer information is measured. Next, an etching process is performed to etch the film. The etching process includes a main etching step, an etching endpoint detection step, an extension etching step and an over etching step. An extension etching time for performing the extension etching step is set within 10 seconds based on a predetermined correlation between an extension etching time and the pre-layer information, so as to achieve a required film profile.
US07851365B1 Methods for preparing semiconductor substrates and interfacial oxides thereon
The invention provides novel methods for preparing semiconductor substrates for the growth of an ultra-thin epitaxial interfacial phase thereon. The invention additionally provides the ultra-thin epitaxial interfacial phase formed on a semiconductor substrate prepared by the methods of the invention. Epitaxiality of the interfacial phase is ensured by maintaining the cleaned semiconductor substrate in a static and inert atmosphere prior to oxidation to form the interfacial phase. Such interfacial phase are useful as capping layers and dielectric layers for semiconductor devices.
US07851363B2 Pattern forming method and manufacturing method of semiconductor device
A pattern forming method includes forming a spin on dielectric film on a substrate, washing the spin on dielectric film by using a washing liquid, drying a surface of the spin on dielectric film after the washing, forming a photosensitive film on the dried coating type insulation film, emitting energy rays to a predetermined position of the photosensitive film in order to form a latent image on the photosensitive film, developing the photosensitive film in order to form a photosensitive film pattern which corresponds to the latent image, and processing the spin on dielectric film with the photosensitive film pattern serving as a mask.
US07851360B2 Organometallic precursors for seed/barrier processes and methods thereof
Organometallic precursors and methods for deposition on a substrate in seed/barrier applications are herein disclosed. In some embodiments, the organometallic precursor is a ruthenium-containing, tantalum-containing precursor or combination thereof and may be deposited by atomic layer deposition, chemical vapor deposition and/or physical vapor deposition.
US07851359B2 Silicon interposer producing method, silicon interposer and semiconductor device package and semiconductor device incorporating silicon interposer
A silicon interposer producing method comprising the steps of forming through holes 12 in a silicon wafer 11, forming an oxide coating 13 on the silicon wafer 11, providing a power feeding layer 14 for plating on one of the surfaces of the through holes 12, supplying a low thermal expansion filler 15 having a thermal expansion coefficient lower than the thermal expansion coefficient of the conductive material 16 of through-hole electrodes 17 to the through holes 12, filling the conductive material 16 into the through holes 12 by plating to form the through-hole electrodes 17, and removing the power feeding layer 14 for plating.
US07851357B2 Method of forming electrodeposited contacts
A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required.
US07851356B2 Integrated circuit and methods of manufacturing the same
A method of manufacturing an integrated circuit includes forming landing pads in an array region of a substrate, individual ones of the landing pads being electrically coupled to individual ones of portions of devices formed in the substrate in the array region. The method also includes forming wiring lines within a peripheral region of the substrate. Forming the landing pads and forming the wiring lines includes a common lithographic process being effective in both the array and peripheral regions. The wiring lines and the landing pads of the integrated circuit are self-aligned.
US07851354B2 Semiconductor memory device having local etch stopper and method of manufacturing the same
A semiconductor memory device includes a semiconductor substrate in which a cell region and a core and peripheral region are defined. The device further comprises isolation layers formed in the semiconductor substrate to define active regions, a first gate electrode structure formed in the cell region and a second gate electrode structure formed in the core and peripheral region. Source and drain regions formed in the active regions on respective sides of each of the gate electrode structures and self-aligned contact pads are formed in the cell region in contact with the source and drain regions. An insulating interlayer is formed on the semiconductor substrate between the self-aligned contact pads, and etch stoppers are formed on the insulating interlayer between the self-aligned contact pads in the cell region.
US07851353B2 Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devices
Methods of forming metal silicide layers. The methods include: forming a silicon-rich layer between dielectric layers; contacting the silicon-rich layer with a metal layer and heating the silicon rich-layer and the metal layer to diffuse metal atoms from the metal layer into the silicon layer to form a metal silicide layer.
US07851341B2 Semiconductor device and method for manufacturing the same
A semiconductor device is provided including a transistor element on a substrate, a silicide on a gate and a source/drain of the transistor element; and an amorphous capping layer on the silicide.
US07851340B2 Semiconductor fin integration using a sacrificial fin
There is a method for forming a semiconductor device. Portions of a sacrificial layer are removed to expose a first seed layer region. The first seed layer region corresponds to a first semiconductor region, and a remaining portion of the sacrificial layer corresponds to a second semiconductor region. An epitaxial semiconductor material is deposited over the first seed layer region. A capping layer is formed to overlie the epitaxial semiconductor material and the remaining portion of the sacrificial layer. Portions of the capping layer are removed to form a capping structure that overlies a part of the remaining portion of the sacrificial layer. Portions of the sacrificial layer not covered by the capping structure are removed to form a sacrificial structure having sidewalls. Fin structures are formed adjoining the sidewalls by depositing a semiconductor material along the sidewalls. Portions of the capping structure are removed to expose portions of sacrificial layer between adjacent fin structures. Portions of the sacrificial material between the adjacent fin structures are removed.
US07851338B2 Graded core/shell semiconductor nanorods and nanorod barcodes
Graded core/shell semiconductor nanorods and shaped nanorods are disclosed comprising Group II-VI, Group III-V and Group IV semiconductors and methods of making the same. Also disclosed are nanorod barcodes using core/shell nanorods where the core is a semiconductor or metal material, and with or without a shell. Methods of labeling analytes using the nanorod barcodes are also disclosed.
US07851336B2 Method of forming a passivated densified nanoparticle thin film on a substrate
A method for forming a passivated densified nanoparticle thin film on a substrate in a chamber is disclosed. The method includes depositing a nanoparticle ink on a first region on the substrate, the nanoparticle ink including a set of Group IV semiconductor particles and a solvent. The method also includes heating the nanoparticle ink to a first temperature between about 30° C. and about 400° C., and for a first time period between about 1 minute and about 60 minutes, wherein the solvent is substantially removed, and a porous compact is formed. The method further includes flowing an oxidizer gas into the chamber; and heating the porous compact to a second temperature between about 600° C. and about 1000° C., and for a second time period of between about 5 seconds and about 1 hour; wherein the passivated densified nanoparticle thin film is formed.
US07851334B2 Apparatus and method for producing semiconductor modules
An apparatus and method for producing semiconductor modules is disclosed. One embodiment provides for bonding at least one semiconductor die onto a carrier including a support film strip, the support film having applied an adhesive layer to one of its surfaces to attach the semiconductor die, and a pressure tool to press the semiconductor die and the support film strip onto the carrier to permanently contact the at least one semiconductor die to the carrier.
US07851333B2 Apparatus comprising a device and method for producing it
An apparatus comprises a device layer structure, a device integrated into the device layer structure, an insulating carrier substrate and an insulating layer being continuously positioned between the device layer structure and the insulating carrier substrate, the insulating layer having a thickness which is less than 1/10 of a thickness of the insulating carrier substrate. An apparatus further comprises a device integrated into a device layer structure disposed on an insulating layer, a housing layer disposed on the device layer structure and housing the device, a contact providing an electrical connection between the device and a surface of the housing layer opposed to the device layer structure and a molding material surrounding the housing layer and the insulating layer, the molding material directly abutting on a surface of the insulating layer being opposed to the device layer structure.
US07851329B2 Semiconductor device having EDMOS transistor and method for manufacturing the same
A semiconductor device having an EDMOS transistor and a method for forming the same are provided. The semiconductor device includes source and drain regions formed separately in a semiconductor substrate, a first gate insulating layer filling a trench formed in the substrate between the source and drain regions, the first gate insulating layer being adjacent to the drain region and separated from the source region, a second gate insulating layer formed over the substrate between the first gate insulating layer and the source region, the second gate insulating layer being thinner than the first gate insulating layer, a gate electrode formed over the first and second gate insulating layers, and a doped drift region formed in the substrate under the first gate insulating layer, the doped drift region being in contact with the drain region. This reduces the planar area of the EDMOS transistor, thereby achieving highly integrated semiconductor devices.
US07851322B2 Fabricating method of packaging structure
A fabricating method of packaging structure is provided. First, a capacitive element is formed. Then, a first dielectric layer is formed on a first electronic component by performing a build-up process, an interconnection is formed in the first dielectric layer, and a plurality of contacts are formed on the upper and lower surfaces of the first dielectric layer, wherein the capacitive element is embedded in the first dielectric layer during the fabrication of the interconnection and the capacitive element is electrically connected to the corresponding contacts through the interconnection. A second electronic component is disposed on the first dielectric layer, wherein the second electronic component is electrically connected to the corresponding contacts.
US07851320B2 Mesostructured aluminosilicate material
A mesostructured aluminosilicate material is described, constituted by at least two spherical elementary particles, each of said spherical particles being constituted by a matrix based on silicon oxide and aluminum oxide, having a pore size in the range 1.5 to 30 nm, a Si/Al molar ratio of at least 1, having amorphous walls with a thickness in the range 1 to 20 nm, said spherical elementary particles having a maximum diameter of 10 μm. A process for preparing said material and its application in the fields of refining and petrochemistry are also described.
US07851319B1 Method for preparing a non-self-aligned heterojunction bipolar transistor with a small emitter-to-base spacing
The present invention refers to a method for preparing a non-self-aligned heterojunction bipolar transistor comprising: preparing a patterned emitter metal on an emitter epi layer of a HBT epi structure on a substrate; preparing an emitter epitaxy below the emitter metal; applying a resist layer on the top surface covering the emitter metal and emitter epitaxy, and the base layer; applying lithography leaving the emitter epitaxy and the emitter metal covered by the resist vertically with a width pD and leaving a pattern according to the mask in the resist; depositing base metal on the entire surface; and removing the remaining resist and the base metal covering the resist defining a base metal, the base metal being spaced from the emitter epitaxy and the emitter metal by a distance xD from 0.05 μm to 0.7 μm. The present invention refers to a non-self-aligned heterojunction bipolar transistor as prepared by this method.
US07851318B2 Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device
A semiconductor substrate is irradiated with accelerated hydrogen ions, thereby forming a damaged region including a large amount of hydrogen. After a single crystal semiconductor substrate and a supporting substrate are bonded to each other, the semiconductor substrate is heated, so that the single crystal semiconductor substrate is separated in the damaged region. A single crystal semiconductor layer which is separated from the single crystal semiconductor substrate is irradiated with a laser beam. The single crystal semiconductor layer is melted by laser beam irradiation, whereby the single crystal semiconductor layer is recrystallized to recover its crystallinity and to planarized a surface of the single crystal semiconductor layer. After the laser beam irradiation, the single crystal semiconductor layer is heated at a temperature at which the single crystal semiconductor layer is not melted, so that the lifetime of the single crystal semiconductor layer is improved.
US07851317B2 Method for fabricating high voltage drift in semiconductor device
A drift of a high voltage transistor formed using an STI (shallow trench isolation). The method for forming a high voltage drift of a semiconductor device can include forming a pad insulating film on a semiconductor substrate having a high voltage well; and then opening a region of the semiconductor substrate by patterning a portion of the pad insulating film; and then etching the opened region of the semiconductor substrate to form a trench; and then forming a first drift in the semiconductor substrate by performing a first ion implantation process using the patterned pad insulating film as a mask; and then forming a device isolation film by gap-filling a device isolation material in the trench; and then removing the patterned pad insulating film and then forming a gate electrode overlapping a portion of the device isolation film; and then forming a second drift connected to the first drift by performing a second ion implantation process in a region of the semiconductor substrate exposed by the gate electrode.
US07851316B2 Fabrication method of semiconductor device
A fabrication method of a semiconductor device includes: forming a gate insulating film and a gate electrode on an N type well; forming first source/drain regions by implanting a first element in regions of the N type well on both sides of the gate electrode, the first element being larger than silicon and exhibiting P type conductivity; forming second source/drain regions by implanting a second element in the regions of the N type well on the both sides of the gate electrode, the second element being smaller than silicon and exhibiting P type conductivity; and forming a metal silicide layer on the source/drain regions.
US07851315B2 Method for fabricating a field effect transistor having a dual thickness gate electrode
A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.
US07851314B2 Short channel lateral MOSFET and method
A short channel Lateral MOSFET (LMOS) and method are disclosed with interpenetrating drain-body protrusions (IDBP) for reducing channel-on resistance while maintaining high punch-through voltage. The LMOS includes lower device bulk layer; upper source and upper drain region both located atop lower device bulk layer; both upper source and upper drain region are in contact with an intervening upper body region atop lower device bulk layer; both upper drain and upper body region are shaped to form a drain-body interface; the drain-body interface has an IDBP structure with a surface drain protrusion lying atop a buried body protrusion while revealing a top body surface area of the upper body region; gate oxide-gate electrode bi-layer disposed atop the upper body region forming an LMOS with a short channel length defined by the horizontal length of the top body surface area delineated between the upper source region and the upper drain region.
US07851312B2 Semiconductor component and method of manufacture
A semiconductor component that includes a field plate and a semiconductor device and a method of manufacturing the semiconductor component. A body region is formed in a semiconductor material that has a major surface. A gate trench is formed in the epitaxial layer and a gate structure is formed on the gate trench. A source region is formed adjacent the gate trench and extends from the major surface into the body region and a field plate trench is formed that extends from the major surface of the epitaxial layer through the source and through the body region. A field plate is formed in the field plate trench, wherein the field plate is electrically isolated from the sidewalls of the field plate trench. A source-field plate-body contact is made to the source region, the field plate and the body region. A gate contact is made to the gate region.
US07851308B2 Method of producing a semiconductor device having a trench-stuffed layer
A semiconductor device includes a first conductivity type semiconductor substrate. A first conductivity type drift layer is formed on a surface of the first conductivity type semiconductor substrate, and a second conductivity type base region is produced in the first conductivity type drift layer. The second conductivity type base region has a trench formed in a surface thereof. A trench-stuffed layer is formed by stuffing the trench with a suitable material, and a second conductivity type column region formed in the first conductivity type drift layer and sited beneath the trench-stuffed layer. A first conductivity type source region is produced in the second conductivity type base region, and both a gate insulating layer and a gate electrode layer are produced so as to be associated with the first conductivity type source region and the first conductivity type drift layer such that an inversion region is defined in the second conductivity type base region in the vicinity of both the gate insulating layer and the gate electrode layer.
US07851306B2 Method for forming a flash memory device with straight word lines
Embodiments of the present invention disclose a memory device having an array of flash memory cells with source contacts that facilitate straight word lines, and a method for producing the same. The array is comprised of a plurality of non-intersecting shallow trench isolation (STI) regions that isolate a plurality of memory cell columns. A source column is implanted with n-type dopants after the formation of a tunnel oxide layer and a first polysilicon layer. The implanted source column is coupled to a plurality of common source lines that are coupled to a plurality of source regions associated with memory cells in the array. A source contact is coupled to the implanted source column for providing electrical coupling with the plurality of source regions. The source contact is collinear with a row of drain contacts that are coupled to drain regions associated with a row of memory cells. The arrangement of source contacts collinear with the row of drain contacts allows for straight word line formation.
US07851305B2 Method of manufacturing nonvolatile semiconductor memory
A method of manufacturing a NAND nonvolatile semiconductor memory which involves forming a bit line contact between adjacent select transistors of the NAND nonvolatile semiconductor memory, the method has patterning memory cells and said select transistors of said NAND nonvolatile semiconductor memory; forming a first insulating film between adjacent two of said memory cells, between said memory cells and said select transistors, and between adjacent two of said select transistors; selectively etching the first insulating film between said select transistors to form a side wall spacer on each of said select transistors; forming a second insulating film on said memory cells, said first insulating film between said memory cells, said select transistors and said side wall spacers; forming a resist pattern on said second insulating film; and simultaneously forming an opening in an insulating film and a control gate on a floating gate of each of said select transistors using said resist pattern and an opening between said adjacent select transistors using said resist pattern.
US07851302B2 Capacitors and methods of manufacture thereof
Capacitors are formed in metallization layers of semiconductor device in regions where functional conductive features are not formed, more efficiently using real estate of integrated circuits. The capacitors may be stacked and connected in parallel to provide increased capacitance, or arranged in arrays. The plates of the capacitors are substantially the same dimensions as conductive features, such as conductive lines or vias, or are substantially the same dimensions as fill structures of the semiconductor device.
US07851297B2 Dual workfunction semiconductor device
A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
US07851294B1 Nanotube memory cell with floating gate based on passivated nanoparticles and manufacturing process thereof
A method for manufacturing a nanotube non-volatile memory cell is proposed. The method includes the steps of: forming a source electrode and a drain electrode, forming a nanotube implementing a conduction channel between the source electrode and the drain electrode, forming an insulated floating gate for storing electric charges by passivating conductive nanoparticles with passivation molecules and arranging a disposition of passivated conductive nanoparticles on the nanotube, the conductive nanoparticles being adapted to store the electric charges and being insulated by the passivation molecules from the nanotube, and forming a control gate coupled with the channel.
US07851292B2 Methods of forming and programming floating-gate memory cells having carbon nanotubes
Floating-gate memory cells having carbon nanotubes interposed between the substrate and the tunnel dielectric layer facilitate ballistic injection of charge into the floating gate. The carbon nanotubes may extend across the entire channel region or a portion of the channel region. For some embodiments, the carbon nanotubes may be concentrated near the source/drain regions. For some embodiments, the tunnel dielectric layer may adjoin the substrate in at least a portion of the channel region.
US07851291B2 Epitaxial silicon germanium for reduced contact resistance in field-effect transistors
A method for selectively relieving channel stress for n-channel transistors with recessed, epitaxial SiGe source and drain regions is described. This increases the electron mobility for the n-channel transistors without affecting the strain in p-channel transistors. The SiGe provides lower resistance when a silicide is formed.
US07851287B2 Method of fabricating Schottky barrier FinFET device
A Schottky barrier FinFET device and a method of fabricating the same are provided. The device includes a lower fin body provided on a substrate. An upper fin body having first and second sidewalls which extend upwardly from a center of the lower fin body and face each other is provided. A gate structure crossing over the upper fin body and covering an upper surface of the upper fin body and the first and second sidewalls is provided. The Schottky barrier FinFET device includes a source and a drain which are formed on the sidewalls of the upper fin body adjacent to sidewalls of the gate structure and made of a metal material layer formed on an upper surface of the lower fin body positioned at both sides of the upper fin body, and the source and drain form a Schottky barrier to the lower and upper fin bodies.
US07851283B2 Field effect transistor with raised source/drain fin straps
Therefore, disclosed above are embodiments of a multi-fin field effect transistor structure (e.g., a multi-fin dual-gate FET or tri-gate FET) that provides low resistance strapping of the source/drain regions of the fins, while also maintaining low capacitance to the gate by raising the level of the straps above the level of the gate. Embodiments of the structure of the invention incorporate either conductive vias or taller source/drain regions in order to electrically connect the source/drain straps to the source/drain regions of each fin. Also, disclosed are embodiments of associated methods of forming these structures.
US07851282B2 Method for forming thin film devices for flat panel displays
Methods of forming thin film devices with different electrical characteristics on a substrate comprising a driver circuit region and a pixel region. A first and a second polysilicon pattern layers are formed on the driving circuit region and the pixel region of the substrate, respectively. A first ion implantation is performed on the second polysilicon pattern layer using a masking layer covering the first polysilicon pattern layer as an implant mask, such that the first polysilicon pattern layer has an impurity concentration different from the second polysilicon pattern layer. After removal of the masking layer, a gate dielectric layer and a gate are successively formed on each of the first and second polysilicon pattern layers and a source/drain region is subsequently formed in each of the first and second polysilicon pattern layers to define a channel region therein.
US07851281B2 Manufacturing method of flexible semiconductor device and flexible semiconductor device
A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.
US07851279B2 Manufacturing method of semiconductor device
The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
US07851277B2 Semiconductor device and method of manufacturing same
An object is to reduce the adverse influence which a portion of a gate insulating layer where the thickness has decreased, that is, a step portion, has on semiconductor element characteristics so that the reliability of the semiconductor element is improved. A semiconductor layer is formed over an insulating surface; a side surface of the semiconductor layer is oxidized using wet oxidation to form a first insulating layer; a second insulating layer is formed over the semiconductor layer and the first insulating layer; and a gate electrode is formed over the semiconductor layer and the first insulating layer with the second insulating layer interposed therebetween.
US07851273B2 Method of testing an integrated circuit die, and an integrated circuit die
In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.
US07851272B2 Multi-project wafer and method of making same
A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
US07851270B2 Manufacturing process for a chip package structure
A manufacturing process for a chip package structure is provided. First, a patterned conductive layer having a plurality of first openings and a patterned solder resist layer on the patterned conductive layer are provided. A plurality of chips are bonded onto the patterned conductive layer such that the chips and the patterned solder resist layer are disposed at two opposite surfaces of the patterned conductive layer. The chips are electrically connected to the patterned conductive layer by a plurality of bonding wires passing through the first openings of the patterned conductive layer. At least one molding compound is formed to encapsulate the patterned conductive layer, the patterned solder resist layer, the chips and the bonding wires. Then, the molding compound, the patterned conductive layer and the patterned solder resist layer are separated.
US07851269B2 Method of stiffening coreless package substrate
Embodiments of the present invention relate to a method of stiffening a semiconductor coreless package substrate to improve rigidity and resistance against warpage. An embodiment of the method comprises disposing a sacrificial mask on a plurality of contact pads on a second level interconnect (package-to-board interconnect) side of a coreless package substrate, forming a molded stiffener around the sacrificial mask without increasing the effective thickness of the substrate, and removing the sacrificial mask to form a plurality of cavities in the molded stiffener corresponding to the contact pads. Embodiments also include plating the surface of the contact pads and the sidewalls of the cavities in the molded cavities with an electrically conductive material.
US07851267B2 Power semiconductor module method
A method for assembling a power module includes providing a casing with a plurality of receiving elements. At least one substrate carrying at least one semiconductor chip is provided within the casing. At least one support element is provided. An elastically stressed cover is arranged over the at least one support element, and the cover is released so that the elastically stressed cover is restrained by the at least one support element and the plurality of receiving elements.
US07851262B2 Manufacturing process for a chip package structure
A manufacturing process for a chip package structure is provided. First, a patterned conductive layer and a patterned solder resist layer on the patterned conductive layer are provided. A plurality of chips are bonded onto the patterned conductive layer such that the chips and the patterned solder resist layer are disposed at two opposite surfaces of the patterned conductive layer. The chips are electrically connected to the patterned conductive layer by a plurality of bonding wires, wherein the chips and the bonding wires are at the same side of the patterned conductive layer. A molding compound is formed to encapsulate the patterned conductive layer, the chips and the bonding wires. Then, the molding compound, the patterned conductive layer and the patterned solder resist layer are separated.
US07851260B2 Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device is disclosed. As a part of the method, one surface of a substrate is molded with resin where the substrate and the resin are heated in a first heating process and maintained in a flat condition. The substrate and the resin are returned to room temperature while being maintained in the flat condition after the first heating process. The resin is cut after the substrate and the resin are returned to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin. The substrate is left intact when the resin is cut. Thereafter, the substrate is separated.
US07851259B2 Stack-type semiconductor package, method of forming the same and electronic system including the same
A method of forming a stack-type semiconductor package includes preparing a lower printed circuit board including a plurality of interconnections and a plurality of ball lands for connection on an upper surface thereof. One or more first chips, which are electrically connected to the plurality of interconnections and sequentially stacked, are mounted on the lower printed circuit board. A lower molded resin compound is formed on the lower printed circuit board to cover the first chips, and is formed to have via holes exposing the ball lands for connection. An upper chip package, under which solder balls are formed, is aligned so that the solder balls correspond to the via holes of the lower molded resin compound, respectively. The solder balls are reflown to form connection conductors filling the via holes. A stack-type semiconductor package structure and an electronic system including the same are also provided.
US07851257B2 Integrated circuit stacking system with integrated passive components
An integrated circuit stacking system is provided including fabricating an integrated passive device including: providing a semiconductor substrate, forming an integrated inductor, a resistor block, or an integrated capacitor integrated on the semiconductor substrate, and forming contact pads, on the semiconductor substrate, coupled to the integrated inductor, the resistor block, or the integrated capacitor; positioning an integrated circuit die for maintaining an inductor spacing; mounting the integrated circuit die on the integrated passive device; and encapsulating the integrated circuit die and the integrated passive device.
US07851250B2 Method for manufacturing semiconductor device and method for manufacturing display device
An object is to provide a method for manufacturing a highly-reliable semiconductor device with an improved material use efficiency and with a simplified manufacturing process. The method includes the steps of forming a conductive layer over a substrate, forming a light-transmitting layer over the conductive layer, and selectively removing the conductive layer and the light-transmitting layer by irradiation with a femtosecond laser beam from above the light-transmitting layer. Note that the conductive layer and the light-transmitting layer may be removed so that an end portion of the light-transmitting layer is located on an inner side than an end portion of the conductive layer. Before the irradiation with a femtosecond laser beam, a surface of the light-transmitting layer may be subjected to liquid-repellent treatment.
US07851249B2 Tandem solar cell including an amorphous silicon carbide layer and a multi-crystalline silicon layer
A method for making a tandem solar cell includes the steps of providing a ceramic substrate, providing a titanium-based layer on the ceramic substrate, providing an n+-p−-p+ laminate on the titanium-based layer, passivating the n+-p−-p+ laminate, providing an n-i-p laminate on the n+-p−-p+ laminate, providing a p-type ohmic contact, providing an n-type ohmic contact providing an anti-reflection layer of SiCN/SiO2 on the n-i-p laminate.
US07851247B2 Method of fabricating micro-electromechanical system microphone structure
A method of fabricating a micro-electromechanical system microphone structure is disclosed. First, a substrate defining a MEMS region and a logic region is provided, and a surface of the substrate has a dielectric layer thereon. Next, at least one metal interconnect layer is formed on the dielectric layer in the logic region, and at least one micro-machined metal mesh is simultaneously formed in the dielectric layer of the MEMS region. Therefore, the thickness of the MEMS microphone structure can be effectively reduced.
US07851245B2 Organic light-emitting display device and method of manufacturing the same
An organic light-emitting display device includes a substrate; a gate electrode disposed on the substrate, the gate electrode including a first portion of a metal oxide layer and a metal layer; a pixel electrode disposed on the substrate so as to be insulated from the gate electrode, the pixel electrode including a second portion of the metal oxide layer; a gate insulating layer disposed on the substrate to cover the gate electrode; a semiconductor layer disposed on the gate insulating layer, the semiconductor layer including a channel region corresponding to the gate electrode, and first and second regions disposed outside the channel region; a first electrode connected to the first region of the semiconductor layer; a second electrode connected to the second region of the semiconductor layer and the pixel electrode; an ohmic contact layer disposed between the first region of the semiconductor layer and the first electrode and between the second region of the semiconductor layer and the second electrode; a pixel defining layer disposed on the substrate to cover the first electrode, the second electrode, the semiconductor layer, and the pixel electrode, the pixel defining layer including an opening through which the pixel electrode is partially exposed; an organic light-emitting layer disposed on the pixel electrode exposed through the opening; and an opposite electrode covering the organic light-emitting layer.
US07851244B2 Methods for forming metal layers for a MEMS device integrated circuit
Systems and methods for MEMS device fabrication. A layer of photoresist is formed on a substrate. A first region of the substrate is exposed to a radiation source through a photomask. The first region of exposed photoresist is developed with a developer solution in order to etch the exposed regions to a first depth. A second region is exposed to radiation through a second photomask. The second photomask defines areas in which a bump feature is intended on the substrate. The second region is developed with the developer solution, preparing the first and second exposed regions for a layer of metal. A layer of metal is deposited on the substrate, such that the metal attaches to both the substrate and any remaining photoresist on the substrate. The remaining photoresist and its attached metal is dissolved away leaving an interconnect pattern and at least one bump feature.
US07851240B2 Method of forming diffraction grating and method of fabricating distributed feedback laser diode
A method of forming a diffraction grating according to the present invention includes a step of preparing a mold having projections and recesses for forming a diffraction grating, a step of bringing the projections and recesses of the mold into contact with a resin layer in a chamber at a first pressure less than atmospheric pressure, a step of setting a pressure in the chamber to a second pressure more than the first pressure while maintaining the contact, and a step of hardening the resin layer while maintaining the contact between the resin layer and the projections and recesses so as to form a pattern for the diffraction grating on the hardened resin layer. The recesses in the projections and recesses of the mold form a closed pattern in the plane of the mold including the projections and recesses.
US07851238B2 Method for fabricating self-aligning electrode
Electrodes are constructed with pressure-bonding techniques that simplify alignment of various electrode components during lamination. In an exemplary embodiment, a current collector is made from aluminum foil that has been roughed or pitted on both surfaces. The surfaces of the current collector can be further treated to enhance adhesion properties of these surfaces. Layers of film that include active electrode material, such as activated carbon particles, are fabricated using non-lubricated techniques. Each film is coated on one side with an adhesive binder solution, such as a thermoplastic solution. The adhesive binder is dried, and the films are laminated to the current collector using a calender with heated rollers. The resulting electrode product is processed to shape electrodes, which can then be used in electrical energy storage devices, including double layer capacitors.
US07851235B2 Test element group for monitoring leakage current in semiconductor device and method of manufacturing the same
A test element group for monitoring leakage current in a semiconductor device and a method of manufacturing the same are disclosed. The test element group for monitoring leakage current in a semiconductor device includes device isolation layers formed over a first conductivity type semiconductor substrate. A second conductivity type well may be formed over the first conductivity type semiconductor substrate. First conductivity type impurity regions may be formed in first active areas between the device isolation layers in the second conductivity type well. Monitoring contacts may be formed within the first active areas to monitor leakage current, using layout data such that a distance from each of the monitoring contacts to a border of each of the first active areas is set to have an allowable minimum value under a predetermined design rule. Accordingly, the test element group can monitor leakage current caused by PN junction diodes formed by junction of the impurity regions and the well in the active areas in a semiconductor device or misalignment of contacts, and can accurately monitor micro-leakage current in a semiconductor device during manufacturing.
US07851231B2 Method of fabricating field emission array type light emitting unit
A method of fabricating a field emission array type light emitting unit that includes a rear substrate including a plurality of cathodes and a plurality of carbon nanotube emitters on a front side, a front substrate including a plurality of anodes and a phosphor layer on a rear side, wherein the rear substrate and the front substrate are arranged at a distance apart from each other and a plurality of spacers are arranged between the rear substrate and the front substrate, the plurality of spacers being adapted to maintain constant the distance, the method includes producing a diffusion pattern by wet etching a front side of the front substrate.
US07851230B2 Stress-induced phosphoprotein 1 as a biomarker for the detection of human ovarian cancers and endometriosis
Disclosed herein is a method for the detection, preliminary screening or monitoring of a gynecological disease selected form ovarian cancers and endometriosis, in which STIP1 is used as a biomarker for the gynecological disease.
US07851224B2 Method of assessing a lipid-related health risk based on ion mobility analysis of lipoproteins
A medical diagnostic method and instrumentation system for analyzing noncovalently bonded agglomerated biological particles is described. The method and system comprises: a method of preparation for the biological particles; an electrospray generator; an alpha particle radiation source; a differential mobility analyzer; a particle counter; and data acquisition and analysis means. The medical device is useful for the assessment of human diseases, such as cardiac disease risk and hyperlipidemia, by rapid quantitative analysis of lipoprotein fraction densities. Initially, purification procedures are described to reduce an initial blood sample to an analytical input to the instrument. The measured sizes from the analytical sample are correlated with densities, resulting in a spectrum of lipoprotein densities. The lipoprotein density distribution can then be used to characterize cardiac and other lipid-related health risks.
US07851222B2 System and methods for measuring chemical concentrations of a plating solution
An electrochemical plating system, which includes one or more plating cell reservoirs for storing plating solution and a chemical analyzer in fluidic communication with the one or more plating cell reservoirs. The chemical analyzer is configured to measure chemical concentrations of the plating solution. The plating system further includes a plumbing system configured to facilitate the fluidic communication between the one or more plating cell reservoirs and the chemical analyzer and to substantially isolate the chemical analyzer from electrical noise generated by one or more plating cells of the one or more plating cell reservoirs.
US07851221B2 Fixed bed reactor
The invention provides a system for designing, operating, monitoring and/or diagnosing a chemical reaction, particularly a hydrotreating process, using a fixed bed catalytic reactor.
US07851219B2 Methods and compositions for increasing protein yield from a cell culture
Disclosed herein are compositions and methods for increasing protein production from a cell culture. By switching the cells from a replicative to a productive state (RP switch), protein biosynthesis is extended. The productive state is a pseudo-senescent state. This pseudo-senescent state can be induced by transforming the cells with a vector expressing a cell cycle inhibitor. Expression of the cell cycle inhibitor within the cell, because it does not cause cell death, allows for cells to be maintained in culture for longer periods. The invention allows for controlled enhanced protein biosynthetic productivity of cell lines for commercial and research purposes.
US07851217B2 Process for producing a tissue transplant construct for reconstructing a human or animal organ
A process for producing a tissue transplant construct for reconstructing a human or animal organ. The process may include the steps of: (a) isolation and two-dimensional cultivation of organ-specific tissue cells; (b) application of the organ-specific tissue cells to a biocompatible, collagen-containing membrane; and, (c) cultivation of the organ-specific tissue cells on the membrane with biochemical and mechanical stimulation of the organ-specific tissue cells. Tissue transplant constructs and methods for using tissue transplant constructs are also taught.
US07851216B2 Methods and compositions for linking binding domains in nucleic acid binding proteins
We describe a method of producing a modified nucleic acid binding polypeptide, the method comprising the steps of: (a) providing a nucleic acid binding polypeptide comprising a plurality of nucleic acid binding modules; (b) selecting a first binding domain consisting of one or two contiguous nucleic acid binding modules; (c) selecting a second binding domain consisting of one or two contiguous nucleic acid binding modules; and (d) introducing a flexible linker sequence to link the first and second binding domains, the flexible linker sequence comprising five or more amino acid residues. Use of structured linkers, alone or in combination with flexible linkers, is also disclosed.
US07851213B2 Tumor antigens BFA4 and BCY1 for prevention and / or treatment of cancer
The present invention relates to a nucleic acid encoding a polypeptide and the use of the nucleic acid or polypeptide in preventing and/or treating cancer. In particular, the invention relates to improved vectors for the insertion and expression of foreign genes encoding tumor antigens for use in immunotherapeutic treatment of cancer.
US07851212B2 Immunogenic polypeptides encoded by MAGE minigenes and uses thereof
The invention discloses immunogenic polypeptides comprising several MAGE-specific antigen epitopes selected from different (i.e. discrete) members of the MAGE protein family, nucleic acids coding therefor, recombinant viruses and/or cells comprising said nucleic acids, and compositions thereof. Methods for eliciting or inducing MAGE-specific immune responses utilizing the aforementioned immunogenic agents are also disclosed.
US07851210B2 Apparatus for recycling of protein waste and fuel production
The apparatus of the present invention is useful for recycling protein waste and producing fuel from protein waste. Waste is ground by a grinding means and digested by a enzyme digest medium composed of enzymes, preservatives, and inedible egg. The ground proteins are digested with the enzyme in recirculated digest tanks. Fat can be collected from the tank by addition of acid and separation of fat from water with a centrifuge. Alternatively the ground protein and enzyme can be fermented and gas collected from the digest tank in a pressure tank with a compressor. The protein solubles are emulsified, separated from water, and extruded before drying. Either fat or gas can be used to fuel a dryer. The dried proteins are then milled in a hammer mill and screened for uniform size.
US07851206B2 Nucleic acid detection device
A nucleic acid detection device includes a flow channel through which a solution containing a nucleic acid recognition body flows, probe electrodes having immobilized nucleic acid probes, and a counter electrode used to measure an electrochemical response of the nucleic acid recognition body. The flow channel includes a curved portion and a straight portion continued from and located downstream of the curved portion. The probe electrodes are arranged at intervals along the straight portion, avoiding an upstream end of the straight portion that is located within a distance L from the curved portion. The distance L is given by L=0.065×Re×D, Re=ρuD/μ, and D=4S/Lp where ρ, u, and μ are a concentration, a flow velocity, and a viscosity of the solution, and S and Lp are a sectional area and a wall peripheral perimeter of the flow channel, respectively.
US07851204B2 Closure for milliliter scale bioreactor
A closure for a microreactor includes a cap that is configured to be inserted into a well of the microreactor. The cap, or at least a portion of the cap, is compliant so as to form a seal with the well when the cap is inserted. The cap includes an aperture that provides an airway between the inside of the well to the external environment when the cap is inserted into the well. A porous plug is inserted in the aperture, e.g., either directly or in tube that extends through the aperture. The porous plug permits gas within the well to pass through the aperture while preventing liquids from passing through to reduce evaporation and preventing microbes from passing through to provide a sterile environment. A one-way valve may also be used to help control the environment in the well.
US07851200B2 Bioreactor for growing engineered tissue
A bioreactor and a method for growing engineered tissue provide facing surfaces in a vessel for containing cell-culture media. The facing surfaces are equidistant and define a gap therebetween while providing substrates for cell tissue growth. By maintaining conditions within the vessel conducive to cell tissue growth and moving the surfaces relative to one another within such cell culture media, tissue growing thereupon is subjected to physiological flow and shear stress, preferably through the use of oscillating motion, and engineered tissue is produced.
US07851198B2 L-lysine-inducible promoter
Disclosed is a novel L-lysine-inducible promoter nucleic acid molecule. Also disclosed are a vector containing the nucleic acid molecule, a host cell transformed with the vector, and a method of inducing expression of a target gene using the L-lysine-inducible promoter nucleic acid molecule.
US07851195B2 High-efficiency wild-type-free AAV helper functions
The present invention provides methods and compositions for producing high titer, wild-type-free preparations of recombinant AAV (“rAAV”) virions. The compositions of the present invention include novel nucleic acids encoding AAV helper functions and AAV helper function vectors. The present invention also includes host cells transfected by the claimed nucleic acids, methods of using the claimed vectors, and rAAV virions produced by such methods.
US07851194B2 West Nile viruses with mutations in the 3′ terminal stem and loop secondary structure for use as live virus vaccines
The invention provides West Nile (WN) viruses and chimeric WN viruses having one or more mutations in the 3′ terminal stem loop secondary structure (3′SL) that results in decreased neurovirulence, methods of making such WN viruses, and methods for using these WN viruses to prevent or treat WN virus infection.
US07851189B2 Microencapsulated compositions for endoluminal tissue engineering
A tissue engineering composition adapted for application to an interior surface of a body lumen of a patient. The composition comprises (a) a carrier medium that is adapted to flow and to stably adhere the composition to the body lumen and (b) microcapsules, which are dispersed within the carrier medium and which contain one or more living cells encapsulated within a coating that includes a biodegradable polymer. The composition promotes growth of the cells on the lumen surface subsequent to application of the composition to the lumen.
US07851186B2 Kit for synthesizing polynucleotides
The present invention realized isothermal and rapid polynucleotide synthesis by using as templates polynucleotides having a structure capable of forming loops, and combining a plurality of primers capable of providing a starting point for complementary strand synthesis to such loops. If the LAMP method is applied, all reactions can be carried out isothermally and rapidly since the template polynucleotides themselves can also be synthesized by an isothermal reaction.
US07851184B2 Droplet-based nucleic acid amplification method and apparatus
The present invention relates to a droplet-based nucleic acid amplification method and apparatus. According to one embodiment, a method of amplifying a nucleic acid in a biological sample is provided, wherein the method includes: (a) providing a system comprising a droplet microactuator electronically coupled to and controlled by a processor capable of executing instructions, the droplet microactuator comprising: (i) a sample potentially comprising a target nucleic acid; (ii) a substrate comprising electrodes for conducting droplet operations; and (iii) one or more temperature control means arranged in proximity with one or more of the electrodes for heating a region of the droplet microactuator such that a droplet can be transported into the region for heating; (b) using droplet operations to combine on the droplet microactuator one or more amplification reagent droplets and one or more sample droplets to yield an amplification-ready droplet; and (c) thermal cycling the amplification-ready droplet sufficient to result in amplification of a target nucleic acid when present in the amplification-ready droplet.
US07851183B2 Genes encoding a nystatin polyketide synthase and their manipulation and utility
The invention provides a nucleic acid molecule comprising: (a) a nucleotide sequence as shown in SEQ ID No. 35; or (b) a nucleotide sequence which is the complement of SEQ ID No. 35; or (c) a nucleotide sequence which is degenerate with SEQ ID No. 35; or (d) a nucleotide sequence hybridising under conditions of high stringency to SEQ ID No. 35, to the complement of SEQ ID No. 35, or to a hybridisation probe derived from SEQ ID No. 35 or the complement thereof; or (e) a nucleotide sequence having at least 80% sequence identity with SEQ ID No. 35; or (f) a nucleotide sequence having at least 65% sequence identity with SEQ ID No. 35 wherein said sequence preferably encodes or is complementary to a sequence encoding a nystatin PKS enzyme or a part thereof. Also provided are part of such molecules and polypeptides (and parts thereof) encoded by such a nucleic acid molecule, and the use of such molecules and polypeptides in facilitating nystatin biosynthesis and in the synthesis of nystatin derivatives and novel polyketide as macrolide structures.
US07851182B2 Soluble GP130 molecule variants useful as a medicament
A polypeptide-dimer built of two identical monomeric fragments comprising the domains 1 to 3 of the extracellular (soluble) part of glycoprotein (gp)130 and a certain polypeptide spacer are described, which are covalently linked with each other and which bear significant advantages concerning their production rate in host cells, their improved purification and their potential to bind to IL-6/soluble IL-6 receptor complexes. Furthermore, a pharmaceutical composition containing said dimeric molecule and various medical uses are described.
US07851180B2 Microorganism producing L-methionine precursor and the method of producing L-methionine precursor using the microorganism
The present invention relates to a microorganism producing L-methionine precursor, O-succinylhomoserine, and a method of producing L-methionine precursor using the microorganism,
US07851177B2 Method for detecting presence of acidophilic microorganisms in bioleaching solution
A method of rapid analysis of the presence of active acidophilic microorganisms in a bioleaching solution includes the steps of: concentrating the solution, removing luminescence inhibitory agents from the solution and measuring the luminescence of the solution.
US07851175B2 Kit for assaying acetyl transferase or deacetylase activity
The invention provides methods and kits for characterizing the activity of an acetyl transferase or deacetylase. The method involves enzymatically acetylating or deacetylating in vitro a substrate that is a peptide fragment of a full-length polypeptide, and then non-enzymatically acylating the peptide substrate with acyl groups that differ in molecular weight from the enzymatically added or removed acetyl groups. Typically, deuterated acetic anhydride is used to non-enzymatically acylate the substrate. The fully acylated substrate is then characterized by mass spectrometry to determine the amino acid positions of the substrate that are enzymatically acetylated or deacetylated.
US07851172B2 Biomarkers of mild cognitive impairment and alzheimer's disease
A method for quantifying a neurodegenerative disorder in a patient that includes obtaining a fluid sample from the subject; measuring a protein biomarker complex in said fluid sample and correlating the measurement with mild cognitive impairment or Alzheimer's disease status. The biomarkers include those that comprise at least one of a transthyretin protein and/or a prostaglandin-H2 D-isomerase protein, and at least one second, different protein selected from a transthyretin, prostaglandin-H2 D-isomerase, beta-2-microglobulin, cystatin C, superoxide dismutase [Cu—Zn], plasma retinol-binding protein, phosphatidylethanolamine-binding protein, carbonic anhydrase 2, prostaglandin-H2 D-isomerase, and/or serotransferrin protein.
US07851171B2 Identification of Actinobacillus actinomycetemcomitans antigens for use in the diagnosis, treatment, and monitoring of periodontal diseases
Antibodies, polypeptides, and polynucleotides are provided for the detection, prevention, amelioration and treatment of diseases caused by Actinobacillus actinomycetecomitans.
US07851164B2 Protein specific to pancreatic beta cells in islets of langerhans and applications thereof
The invention relates to protein ZnT-8 which is specifically expressed in the pancreatic beta cells in islets of Langerhans, to a polynucleotide encoding said protein which is involved in the maturation and exocytosis of insulin, and to the applications thereof, for example, for sorting and studying beta cells and for screening medicine acting on diabetes and hyperinsulinism.
US07851163B2 Method for determining the biologically effective parathyroid hormone activity in a sample
Immunoassay for the determination of parathyroid hormone activity in a sample, and for the diagnosis, etiology and treatment of calcium metabolism disturbances, osteopathies and hyper- or hypoparathyroidisms. The parathyroid hormone activity is measured with the aid of an antibody which binds to an epitope in the region of the receptor binding structure 15 to 22 of the parathyroid hormone, and an antibody which recognizes whether the amino-terminal end 1 to 3 of the parathyroid hormone is intact. The assay permits the antagonistic characteristics of some parathyroid hormone fragments to be taken into account.
US07851160B2 Method for determination of amount of double-stranded DNA and kit for the determination
A method and kit for electrochemically simply determining with excellent precision the amount of double-stranded DNA does not require an expensive measurement electrode, such as an immobilized enzyme electrode or any high level electrode production technique which can retain uniform surface area accuracy. A method and kit are provided for electrochemically determining the amount of double-stranded DNA in a sample solution based on a residual amount of a substance capable of binding to the double-stranded DNA which is added to the solution in excess amount, in which a buffering substance is added to a sample solution, the buffering substance being capable of allowing an oxidation wave potential of the potential-current curve for the substance capable of binding to the double-stranded-DNA determined in a solution containing the buffering substance to change depending on the concentration of the free substance capable of binding to the double-stranded DNA in the solution.
US07851158B2 Enrichment through heteroduplexed molecules
The present invention relates to the enrichment of specific target sequences. Enrichment can be achieved through the formation of a heteroduplex that includes the specific target sequence and then the specific cleavage of the heteroduplex. A binding moiety is then added to the cleaved heteroduplex, allowing for the subsequent manipulation of the specific target sequence in the heteroduplex.
US07851157B1 Oligonucleotide derivative, probe for detection of gene, and DNA chip
To provide an oligonucleotide derivative that can be used without a problem of falling of a DNA probe from a support.The oligonucleotide derivative of the present invention is represented by the following General Formula (1). The oligonucleotide derivative of the present invention can be used in a DNA chip, a microarray, and so on and further used in a method of detecting gene and a method of regulating gene expression, for example.
US07851144B2 Compositions and methods for detecting cancer
The present invention provides methods and compositions involving detecting the presence of and/or assessing the risk of cancer in a subject. These methods include methods of detecting and diagnosing cancer in an individual; methods of identifying individuals at risk of developing a cancer; and methods of staging a cancer. The methods generally involve detecting a palladin gene nucleotide sequence alteration that has been found to be associated with cancer and/or detecting a level of a palladin mRNA and/or protein in a biological sample. The present invention further provides nucleic acid probes, nucleic acid primers, and antibodies, as well as kits comprising one or more of the same, for use in a subject method.
US07851141B2 Flat panel display manufacturing
A method includes exposing a photo-resist layer using a first exposure machine that has a first resolution to cause the photo-resist layer to have an exposed portion and an un-exposed portion. The photo-resist layer is exposed using a second exposure machine that has a second resolution to further expose the un-exposed portion of the photo-resist layer, the first resolution being different from the second resolution.
US07851138B2 Patterning a surface comprising silicon and carbon
Patterning a surface, comprising at least one feature having silicon coupled to a substrate, is described herein. In one embodiment a method is described for patterning a surface which comprises at least one feature having silicon and at least one feature having carbon coupled to a substrate. The surface is coated with 3-(trimethoxysilyl)propyl methacrylate, and a photoresist is applied the 3-(trimethoxysilyl)propyl methacrylate coated surface. The photoresist is imaged and the surface is etched. The photoresist is then removed.
US07851135B2 Method of forming an etching mask pattern from developed negative and positive photoresist layers
The present invention relates to a method of forming an etching mask pattern from developed negative and positive photoresist layers. According to the present invention, a negative photoresist layer is formed over a substrate. Some regions of the negative photoresist layer are exposed, thereby generating hydrogen ions within the exposed negative photoresist regions. The negative photoresist layer is developed so that the exposed negative photoresist regions remain. A positive photoresist layer is formed over the substrate including the remaining negative photoresist regions. The substrate is baked so that hydrogen ions within the remaining negative photoresist regions are diffused into the positive photoresist layer at boundary portions adjacent to the remaining negative photoresist regions. The positive photoresist layer is developed to remove the positive photoresist portions into which the hydrogen ions are diffused.
US07851134B2 Method for exposure of flexo printing plates
In order to improve a method for producing a structure of polymerisation picture points (9) in a light-sensitive layer (2) of printing plates (3), in particular flexo-printing plates, as an image of picture data composed from a matrix (17) of picture points, by way of structured exposure with a light source, to the extent that an improved tonal range of the print picture is achieved and simultaneously that the manufacturing time is reduced, it is suggested for each polymerisation picture point (9) to be produced by an individual exposure sequence (6, 8, 11) which on the one hand is selected in dependence on the surface density of the polymerisation picture points (9) to be set at the location (A, B, C, D) of the polymerisation picture point (9) and one the other hand in dependence on the picture data.
US07851132B2 Photopolymerization type photosensitive lithographic printing plate precursor
A negative-working photopolymerization type photosensitive lithographic printing plate precursor for exposing with laser, includes: a hydrophilic support; at least one photopolymerizable photosensitive layer; and a protective layer, provided in this order, wherein the photopolymerizable photosensitive layer contains a sensitizing dye, a dye or pigment capable of absorbing light having a wavelength of a laser emission wavelength ±50 nm, which is different from the sensitizing dye; and a photopolymerization initiator.
US07851124B2 Composition for forming wiring protective film and uses thereof
A composition for forming a film for protecting wiring which in one aspect includes a polyimide precursor, a compound having at least two photopolymerizable groups, and a photopolymerization initiator, wherein the polyimide precursor includes a polyimide precursor obtained from a diamine component comprising a defined diamine compound. In other aspects, a dry film for forming a wiring-protecting film using the composition and a substrate having wiring protected by means of the dry film are provided.
US07851123B2 Dye containing curable composition, color filter and method for producing the same
The present invention provides a dye-containing curable composition comprising at least an alkali-soluble resin, a dye and a photosensitive compound, the dye being an azaporphyrin compound represented by the following formula (1); wherein R1 and R2 each independently represent a hydrogen atom or a substituted or unsubstituted alkyl group; rings represented by A1, A2, A3 and A4 each independently represent a ring structure represented by the following formula (A) or formula (B); at least one of A1, A2, A3 and A4 is a ring structure represented by the following formula (B); and n represent an integer from 1 to 4:
US07851120B2 Developing agent and method for producing the same
The dispersion liquid including toner material particles is introduced into a mechanical shearing device including a heating unit, a mechanical shearing unit, and a cooling unit, heated to a temperature not lower than the glass transition temperature of the polyester resin under a condition that satisfies the following relationship (1), subjected to mechanical shearing, and thereafter cooled, whereby fine particles are obtained. −2
US07851118B2 Image forming method, image forming apparatus and organic photoreceptor
An image forming method, comprising: forming an electrostatic latent image on a rotatable organic photoreceptor; forming a developing brush with a developing agent containing a toner on a rotatable developing sleeve; and bringing the developing brush in contact with the photoreceptor at a developing region so as to visualize the electrostatic latent image into a toner image. The photoreceptor comprises a conductive support member, an intermediate layer containing a binder resin and inorganic particles which have a number average primary order particle size of 3 to 200 nm, and a photosensitive layer provided on the intermediate layer, and the rotating direction of the developing sleeve is counter to that of the photoreceptor at the developing region.
US07851116B2 Emulsion aggregation high-gloss toner with calcium addition
Toner including toner particles having a calcium-containing material at least in a surface portion of the toner particle, wherein the toner particles contain calcium in an amount of from 20 ppm to about 300 ppm of calcium by dry weight of the toner. Developer including a carrier and a toner, wherein the toner includes toner particles having a calcium-containing material at least in a surface portion of the toner particles. In an emulsion aggregation process for making toner particles, the toner particles are treated with calcium. The addition of calcium to the toner particles improves toner performance by lowering cohesion and charging, thereby generating an image of high gloss.
US07851098B2 Reformer fuel cell system with external burner
A reformer fuel cell system having a plurality of components, that are a plurality of partial reformer systems forming a reformer for the generation of a hydrogen-rich gas and a fuel cell for the generation of electric current with use being made of the hydrogen-rich gas. A burner device is arranged outside of the reformer and the fuel cell is provided for the generation of a hot exhaust gas. An exhaust gas supply assembly supplies the exhaust gas to at least two of the components wherein the exhaust gas supply assembly defines the flow path of the exhaust gas such that the exhaust gas flows to and/or through the components according to the level of their particular operating temperature in descending temperature order. In this manner, it is easily possible to directly heat up the individual components to the level of their particular operating temperature in a selective manner.
US07851096B2 Humidifying a reactant flow of a fuel cell system
A technique that is usable with a fuel cell includes generating a humidified reactant flow. The technique includes measuring a rate of condensate production from the reactant flow and controlling the generation of the humidified reactant flow in response to the measured rate of condensate production.
US07851092B2 Redox shuttles for overcharge protection of lithium batteries
The present invention is generally related to electrolytes containing novel redox shuttles for overcharge protection of lithium-ion batteries. The redox shuttles are capable of thousands hours of overcharge tolerance and have a redox potential at about 3-5.5 V vs. Li and particularly about 4.4-4.8 V vs. Li. Accordingly, in one aspect the invention provides electrolytes comprising an alkali metal salt; a polar aprotic solvent; and a redox shuttle additive that is an aromatic compound having at least one aromatic ring with four or more electronegative substituents, two or more oxygen atoms bonded to the aromatic ring, and no hydrogen atoms bonded to the aromatic ring; and wherein the electrolyte solution is substantially non-aqueous. Further there are provided electrochemical devices employing the electrolyte and methods of making the electrolyte.
US07851091B2 Compositions, redox couples and uses thereof
There are provided compositions comprising a first compound selected from the group consisting of compounds of formulas (Ib), (III), (V), and (VII), and a second compound selected from the group consisting of compounds of formulas (IIb), (IV), (VI), and (VIII): Various chemical entities can be used for R4 to R11. These compositions can be particularly useful as anti-static agents or as electron activable precursors to a redox couple.
US07851089B2 Electrode plate for battery and lithium secondary battery including the same
An electrode plate for a battery includes a current collector having a substrate and a plurality of protrusions that are carried on the substrate; and an active material layer that is carried on the current collector. The protrusions include a conductive material that undergoes plastic deformation more easily than the substrate. A lithium secondary battery includes the above electrode plate.
US07851087B2 Enclosed nickel-zinc primary battery, its anode and production methods for them
A high-capacity enclosed nickel-zinc primary battery excellent in characteristics such as capacity maintenance factor, energy density, and high-efficient discharge characteristics, an anode using it, and a production method for them. An enclosed nickel-zinc primary battery which uses as an anode an anode active material of nickel hydroxide compound, such as nickel oxyhydroxide, particles and uses zinc alloy gel as a cathode material, wherein a ratio of anode theoretical capacity to cathode theoretical capacity is 1.0-1.6, and a ratio of alkali electrolyte to anode theoretical capacity is 1.0-1.6 ml/Ah.
US07851086B2 Electrode material for a lithium secondary battery, lithium secondary battery, and preparation method for the electrode material for a lithium secondary battery
Disclosed is an electrode material for a lithium secondary battery, a lithium secondary battery comprising the same, and a method for preparing the electrode material for a lithium secondary battery. The electrode material for a lithium secondary battery includes Si as a principal component, wherein the interplanar spacing of an Si (111) surface is between 3.15 Åand 3.20 Å using X-ray diffraction. This is achieve by first alloying Si with an element selected from the group consisting of Al, B, P, Ge, Sn, Pb, Ni, Co, Mn, Mo, Cr, V, Cu, Fe, Ni, W, Ti, Zn, alkali metals, alkaline earth metals, and combinations thereof, and then eluting X from the resulting alloy.
US07851085B2 Alloy compositions for lithium ion batteries
Alloy compositions, lithium ion batteries, and methods of making lithium ion batteries are described. The lithium ion batteries have anodes that contain an alloy composition that includes a) silicon, b) aluminum, c) transition metal, d) tin, and e) a fifth element that contains yttrium, a lanthanide element, an actinide element, or a combination thereof. The alloy composition is a mixture of an amorphous phase that includes silicon and a nanocrystalline phase that includes an intermetallic compound of tin and the fifth element.