| Document | Document Title |
|---|---|
| US07768879B2 |
Optical pickup and optical disk apparatus
An optical pickup includes a lens holder holding an objective lens for converging a light beam on a signal recording layer of an optical disk; elastic support members supporting the lens holder such that the lens holder can freely move in three driving directions, i.e., a tracking direction, a focusing direction, and a tilting direction; a pair of coil units attached to two sides of the lens holder, the two sides being spaced in a tangential direction orthogonal to the focusing direction and tracking direction; and a pair of magnets arranged to face the corresponding coil units. Each coil unit includes a tracking coil, a focusing coil, and a tilting coil for driving the lens holder in the three driving directions. The focusing coil and the tilting coil are formed by winding a focusing conductor of the focusing coil and a tilting conductor of the tilting coil together in parallel. |
| US07768878B2 |
Actuator calibration using a focus error signal
A lens actuator is calibrated by inputting a signal to the actuator to cause the actuator to move a lens from a first location to a second location, sensing a focus error signal generated in response to the movement of the lens, determining a distance moved by the lens in going from the first location to the second location from a predetermined characteristic of the focus error signal, and determining a gain of the actuator from the input signal and the distance moved. |
| US07768877B2 |
Transfer control device, transfer control method, transfer unit and disc unit
A disc transfer section for transferring an optical disc by guide members and a transfer roller is disposed adjacent to an opening of a casing 110. A detector 500 for detecting the optical disc is disposed adjacent to the opening. When unloading the optical disc, the peripheral edge of the optical disc contacts with slide members so that the slide members are slid, thereby sensor switches SW1 to SW4 are appropriately switched on and off. Based on a time difference between the timings of the on/off switchings, the relation between a movement trajectory of the center of the optical disc and an axis of symmetry that is a straight line indicating a transfer direction at the center of the opening is judged in order to control the drive of a transfer motor according to the movement trajectory. The amount of advancement when the unloading is completed is kept constant. |
| US07768871B2 |
Method of seismic processing of the type comprising depth migration before addition
A seismic processing method of the migration type, comprising the steps of:linearly combining downgoing waves generated at a plurality of shotpoints, and also upgoing waves recorded by a plurality of seismic sensors; notionally propagating the composite waves as obtained in this way in order to obtain migrated downgoing and upgoing waves for different depths; and determining at a plurality of depths at least one characteristic of the subsoil as a function of the upgoing and downgoing waves propagated in this way; the downgoing (resp. upgoing) composite waves being calculated by a linear combination of downgoing (resp. upgoing) waves in which said downgoing (resp. upgoing) waves are weighted by the coefficients of a spatial modulation matrix which is a function of the positions of the shotpoints. |
| US07768868B2 |
Digital filters for semiconductor devices
A memory device that, in certain embodiments, includes a memory element and a digital filter. The digital filter may include a counter and a divider, where the divider is configured to divide a count from the counter by a divisor. |
| US07768867B2 |
Stacked semiconductor device
Stacked semiconductor device includes plural memory chips, stacked together, in which waveform distortion at high speed transmission is removed. Stacked semiconductor device 1 includes plural memory chips 11, 12 stacked together. Data strobe signal (DQS) and inverted data strobe signal (/DQS), as control signals for inputting/outputting data twice per cycle, are used as two single-ended data strobe signals. Data strobe signal and inverted data strobe signal mate with each other. Data strobe signal line for the data strobe signal L4 is connected to data strobe signal (DQS) pad of first memory chip 11. Inverted data strobe signal line for /DQS signal L5 is connected to inverted data strobe signal (/DQS) pad of second memory chip 12. |
| US07768866B2 |
Method and system for preventing noise disturbance in high speed, low power memory
A memory device comprises a memory cell and a sense amplifier which has a sensing interval. An output circuit is coupled to the sense amplifier and responsive to a clock signal to accept the signal from the sense amplifier. A first source of timing signals generates a first timing signal in response to an enable signal which is asynchronous relative to the clock signal. A second source of timing signals generates a second timing signal based on the clock signal. A switch selects one of the first and second timing signals at the timing signals for use to define pre-charge and sensing intervals for the sense amplifier. The first source of timing signals is selected during an interval of time corresponding to a clock latency, so that the timing signals define a sensing interval where transitions in the clock signal are outside of the sensing interval. |
| US07768858B2 |
Refresh controlling circuit
A refresh controlling circuit includes an MRS latch unit configured to output a mask information signal of a bank and a mask information signal of a segment by synchronizing a first address signal and a second address signal with a pulse signal, a bank active control unit configured to output a bank active signal in response to the mask information signal of the bank, and a decoding unit configured to output a row address decoding signal in response to the bank active signal, the mask information signal of the segment, and a third address signal. |
| US07768855B2 |
Semiconductor memory device and sense amplifier
In a sense amplifier circuit having a plurality of sense amplifier portions arranged in order, each of the sense amplifier portions includes a transistor that supplies a bit line potential to a bit line pair in a corresponding column of a memory cell array and a gate electrode for supplying a precharge signal to a gate of the transistor. The gate electrode of the plurality of sense amplifier portions is provided as one piece as a whole and extends in a direction parallel to a row direction in the memory cell array. A gate electrode portion which is a connected portion between the gate electrode in a k-th sense amplifier portion and the gate electrode in a (k+1)-th sense amplifier portion is ring-shaped, where k is an odd number. |
| US07768853B2 |
Semiconductor memory device
A semiconductor memory device includes: a substrate with first and second memory-cell array regions disposed on first and second substrate sides and first and second sense-circuit regions disposed on the first and second substrate sides between the first and second memory-cell array regions; first and second bitlines coupled to a plurality of memory cells in the first memory-cell array region; first and second complementary bitlines coupled to a plurality of memory cells in the second memory-cell array region; first and second column-selection transistors formed in the first sense-circuit region, and selectively couple the first bitline and the first complementary bitline to a first input/output (I/O) line and a first complementary I/O line; and third and fourth column-selection transistors formed in the second sense-circuit region, and selectively couple the second bitline and the second complementary bitline to a second I/O line and a second complementary I/O line. |
| US07768851B2 |
Apparatus for implementing SRAM cell write performance evaluation
A SRAM cell write performance evaluation circuit includes a SRAM core where each wordline is connected to only one bit column. A ring oscillator circuit is used to generate wordline pulses. A state machine controls operations for the SRAM cell write performance evaluation circuit including the ring oscillator circuit and the SRAM core. A control signal is applied to the state machine to select a first write operation, where the circuit simultaneously writes all the cells to a known state with wide wordlines to ensure all cells are written. Then a second write operation is selected, and all the wordlines are launched simultaneously to write the cells to the opposite state. From these write operations, a required wordline pulse width to write the cell is identified. |
| US07768848B2 |
On-chip characterization of noise-margins for memory arrays
A circuit, method, and computer readable medium for on-chip measuring of noise margins in a memory device memory device are disclosed. The on-chip method includes electrically coupling at least a first circuit to a memory cell. A voltage divider is electrically coupled to at least a first voltage and a second voltage. A multiplexer circuit is electrically coupled to the voltage divider. The multiplexer selects one of the first voltage and second voltage for producing a test voltage. A selecting line is electrically coupled to a force\measure network. A comparator is coupled to the force\measure network. The force-measure network supplies the test voltage to the comparator and a measured voltage to the comparator for determining when the measured voltage exceeds the test voltage. |
| US07768845B2 |
Memory having circuitry to directly change voltages applied to bit lines and word lines in response to transitions between a read operation, first rewrite operation, and second rewrite operation
A memory capable of operating at a high speed is obtained. This memory includes memory cells arranged on the intersectional positions between bit lines and word lines respectively. A read operation and a first and second rewrite operations performed when reading data of the memory cells are started by changing voltages applied to the bit lines and the word lines to applied voltages responsive to each operation, and when each operation performed when reading data of the memory cells is transferred, the voltages applied to the bit lines and the word lines are directly changed from the applied voltages responsive to the operation before transition to the applied voltages responsive to the operation after transition. |
| US07768843B2 |
Semiconductor memory device for generating back-BIAS voltage with variable driving force
A semiconductor memory device is capable of maintaining a predetermined back-bias voltage level regardless of operation modes of the semiconductor memory device, by generating a back-bias voltage with driving force changed according to the operation modes. The semiconductor memory device includes an active pumping control signal generating unit for generating an active pumping control signal in response to a plurality of active signals, a voltage detecting unit for detecting a voltage level of a back-bias voltage terminal to output a detection signal, an oscillator for generating an oscillation signal oscillating at a predetermined frequency in response to the detection signal, and a charge pumping unit for performing a charge pumping operation in response to the oscillation signal by controlling a force of driving the back-bias voltage terminal in response to the active pumping control signal. |
| US07768842B2 |
Semiconductor memory device voltage generating circuit for avoiding leakage currents of parasitic diodes
A voltage generating circuit for semiconductor memory devices for use in avoiding the occurrence of leakage currents associated with parasitic diodes is presented. The circuit controls and stabilizes the generation of a fedback negative voltage to prevent parasitic diode malfunctions by a in a wordline driver. The voltage generating circuit includes a controller being fedback the negative voltage and detecting a potential difference between backbias voltage provided to a substrate of the cell and the negative voltage to generate a control signal. The voltage generating circuit also includes a voltage generator being fedback the negative voltage to detect a level thereof, and which subsequently generates and provides the negative voltage in response to the detected results of the negative voltage and the control signal. |
| US07768840B1 |
Memory modeling using an intermediate level structural description
A computer-implemented method for creating an integrated circuit, IC, test engine for testing a proposed IC memory array using new memory structural model. An IC designer inputs the number of words that can be stored and a column multiplexer ratio in a proposed IC memory array. A selection of one or more procedures is made from a library of computer-readable procedures. Each of the procedures is to produce one or more structural primitives that describe certain physical layout features of the proposed IC memory array, without analyzing a CAD layout file of the proposed IC memory array. The library of procedures as a whole translates between a physical model of a family of IC memory arrays and a user interface model of the family. A data background, DB, pattern is produced to be used by the test engine in testing the proposed IC memory array. This is done by executing the selected one or more procedures, wherein these procedures take as input the received number of words and column multiplexer size. Other embodiments are also described. |
| US07768839B2 |
Memory read methods, apparatus, and systems
Some embodiments include first memory cells and a first line used to access the first memory cells, second memory cells and at least one second line used to access the second memory cells. The first and second memory cells have a number of threshold voltage values corresponding to a number of states. The states represent values of information stored in the memory cells. During a read operation to read the first memory cells, a first voltage may be applied to the first line and a second voltage may be applied to the second line. At least one of the first and second voltages may include a value based on a change of at least one of the threshold voltage values changing from a first value to a second value. The first and second values may correspond to a unique state selected from all of the states. Other embodiments including additional apparatus, systems, and methods are disclosed. |
| US07768838B2 |
Operating memory cells
Embodiments of the present disclosure provide methods, devices, modules, and systems for reading non-volatile memory cells. One method includes programming a number of memory cells coupled in series between a first and second select gate transistor where edge cells are coupled adjacent to the select gate transistors and non-edge cells are coupled between the edge cells. The method includes programming a non-edge cell within a first threshold voltage (Vt) distribution. The method also includes programming an edge cell within a second Vt distribution, wherein the first and second Vt distributions correspond to a same one of a number of data states, and wherein the second Vt distribution is different than the first Vt distribution for at least one of the number of data states. |
| US07768834B2 |
Non-volatile storage system with initial programming voltage based on trial
A trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-volatile storage system. Based on this trial programming, a programming signal is calibrated by adjusting its initial magnitude. The calibrated programming signal is then used to program a second set of non-volatile storage elements (which may or may not include the first set). |
| US07768830B2 |
Semiconductor memory device capable of correcting a read level properly
In a memory cell array, a plurality of memory cells each of which stores a plurality of bits are connected to a plurality of word lines and a plurality of bit lines and are arranged in a matrix. Control portions read a threshold level of a second memory cell adjacent to a first memory cell in the memory cell array, determine a correction level according to the threshold level read from the second memory cell, add the determined correction level to a read level of the first memory cell, and then read the threshold level of the first memory cell. A storage portion stores the correction level. |
| US07768829B2 |
Semiconductor memory device for storing multilevel data
In a memory cell array, a plurality of memory cells are arranged in a matrix. Each of the plurality of memory cells stores one of a plurality of threshold levels. When writing one of the plurality of threshold levels into a first memory cell of the memory cell array, a control circuit writes a threshold level a little lower than the original threshold level. When not writing a second memory cell adjacent to the first memory cell consecutively, the control circuit writes the original threshold level into the first memory cell. |
| US07768828B2 |
Flash memory device capable of storing multi-bit data and single-bit data
There is provided a flash memory device capable of manipulating multi-bit and single-bit data. The flash memory device can include a memory cell array with a plurality of memory blocks. The flash memory device can also include a judgment circuit for storing multi-bit/single-bit information indicating whether each of the memory blocks is a multi-bit memory block or not, determining whether or not a memory block of an inputted block address is a multi-bit memory block according to the stored multi-bit/single-bit information and outputting an appropriate flag signal. A read/write circuit for selectively performing multi-bit and single-bit read/program operations of the memory block corresponding to the block address is also included, as well as control logic for controlling the read/write circuit such that the read/write circuit can perform multi-bit or single-bit read/program operations based on the flag signal. An error checking and correction (ECC) circuit including a multi-bit ECC unit and a single-bit ECC unit for checking and correcting an error in a data of the read/write circuit can also be included. |
| US07768826B2 |
Methods for partitioned erase and erase verification in non-volatile memory to compensate for capacitive coupling effects
A set of memory cells can be erased by individually erasing portions of the set in order to normalize the erase behavior of each memory cell and provide more consistent erase rates. An erase voltage pulse can be applied to the set of memory cells with a first group of cells biased for erase and a second group biased to inhibit erase. A second erase voltage pulse can then be applied with the second group biased for erase and the first group biased to inhibit erase. The groups are chosen so that the erase potentials for the cells in the first subset during the first pulse are about equal, so that the erase potentials for the cells in the second subset during the second pulse are about equal, and so that the erase potentials for the cells of the first subset are about the same as the erase potentials for the cells of the second subset. In one embodiment, the bias conditions for the string during each individual erase are selected so that every memory cell of the set will experience similar capacitive coupling effects from neighboring transistors. |
| US07768811B2 |
Ferroelectric memory apparatus and control method of the same
The ferroelectric memory apparatus stores data, and includes: a ferroelectric memory element; a temperature sensor which detects a temperature of the apparatus; a control unit that outputs a control signal indicating a voltage, the voltage increasing as the temperature detected by the temperature sensor decreases; and a voltage generating unit that generates the voltage indicated by the control signal outputted by the control unit, and to supply the generated voltage to the ferroelectric memory element. This provides a ferroelectric memory apparatus which can recover from effects of thermal stress suffered after shipment—i.e., reduction in the polarization amount needed for data retention as well as imprint degradation—using a relatively simple configuration. |
| US07768810B2 |
Radiation tolerant SRAM bit
In an integrated circuit, a radiation tolerant static random access memory device comprising a first inverter having an input and an output, a second inverter having an input and an output. A first resistor is coupled between the output of the first inverter and the input of the second inverter. A second resistor is coupled between the output of the second inverter and the input of the first inverter. A first write transistor is coupled to the output of the first inverter and has a gate coupled to a source of a first set of write-control signals and a second write transistor is coupled to the output of the second inverter and has a gate coupled to said source of a second set of write-control signals. Finally, a pass transistor has a gate coupled to the output of on of the first and second inverters. |
| US07768809B2 |
Wall nucleation propagation for racetrack memory
A shift register is provided, the shift register comprising at least one track including a storage region. The storage region comprises a plurality of magnetic domains for storing data. A given first one of the plurality of magnetic domains is adjacent to a given second one of the plurality of magnetic domains. The given first one of the plurality of magnetic domains and the given second one of the plurality of magnetic domains are arranged in a linear configuration. Further, the given first one of the plurality of magnetic domains and the given second one of the plurality of magnetic domains are separated from one another by at least one layer of non-magnetic material. The at least one layer of non-magnetic material preventing a propagation of a nucleated wall from traveling between the given first one of the plurality of magnetic domains and the given second one of the plurality of magnetic domains. The shift register is configured such that an electric current applied to the track is operative to shift data stored within at least one of the plurality of magnetic domains of the storage region, along the track, in a direction of the electric current. The data stored within the at least one of the plurality of magnetic domains is shifted as a function of the direction of the electric current. |
| US07768808B2 |
Integrated synchronous rectifier package
A controller for controlling a controlled switching device functioning as a synchronous rectifier of alternating current, the controller comprising a control circuit for sensing the direction of current through the controlled switching device, the controlled switching device comprising a MOSFET having a conduction channel and a parasitic body diode and having two main current carrying terminals and a control terminal, the control circuit generating a control signal provided to the control terminal to turn on the controlled switching device approximately when current begins to flow in a first direction through the controlled switching device and turn off the controlled switching device approximately when current begins to flow in a second opposite direction through the controlled switching device, further wherein the control circuit for sensing the direction of current through the controlled switching device main current carrying terminals comprises a sensing circuit coupled across the controlled switching device for comparing a voltage across the controlled switching device to first and second thresholds, the sensing circuit causing the control signal to be generated to turn off the controlled switching device at the first threshold and to turn on the controlled switching device at the second threshold. |
| US07768805B2 |
Clean input UPS with fast rectifier control and improved battery life
The present invention relates to the control of active rectifiers for UPS systems. Aspects of the present invention relate to a control algorithm that is implemented to realize a fast rectifier control operation that results in the improved life of a battery that is linked to the active rectifier of the UPS system. Within aspects of the present invention under unbalanced load conditions, it is possible to select (he desired behavior between the two possible extreme conditions, i.e. implement a clean power input that results in the reduced life of the battery or implement a non-clean power input resulting in the improved life of the battery. Additionally, the present invention utilizes fast rectifier control and specific feed-forward action to make it possible to obtain the very rigid control of a dc link voltage, even under extreme step load variations. |
| US07768802B2 |
Switching mode power supply and method of operation
In one embodiment, a switching mode power supply (SMPS) includes a rectifier for generating an input DC voltage from an input AC voltage. A switching transistor, coupled to a primary coil of a transformer, converts the input DC voltage and supplies power to a secondary side of the transformer according to an operation of the switching transistor. A switching controller receives a feedback voltage corresponding to a voltage of the secondary side of the transformer, a sense signal corresponding to current flowing at the switching transistor, and a first signal corresponding to a voltage difference between first and second electrodes of the switching transistor. The switching controller controls the turning on and off of the switching transistor. After the switching transistor is turned off, the switching controller detects and counts a number of times that a voltage level of the first signal and a reference voltage are equal. The switching controller causes the switching transistor to turn-on when the count of the number of times reaches a variable reference number. |
| US07768799B2 |
Apparatus for accomodating a plurality of individual inverters
The invention is directed to an apparatus (1) for accommodating a plurality of individual inverters (2), comprising a rack, the individual inverters (2) being removably mountable to the side elements of said rack, said rack having at least one terminal block (10) for receiving cables for current supply and evacuation. |
| US07768793B2 |
Multilayer printed wiring board, method of manufacturing multilayer printed wiring board and electronic apparatus
According to one embodiment of, a multilayer printed wiring board comprises an electronic part, a mount layer where the electronic part is mounted, a mount layer conductor pattern formed in the mount layer, an opposite layer containing the electronic part between itself and the mount layer, an opposite layer conductor pattern formed on the opposite layer and an electrically conductive connector contained between the mount layer and the opposite layer and electrically connecting the mount layer conductor pattern and the opposite layer conductor pattern to each other. |
| US07768792B2 |
Front end module
A front end module includes a multilayered structure. The multilayered structure includes a transmitter, a receiver, and a duplex unit. The multilayered structure further includes a ground layer. The ground layer includes a ground pattern having at least one block on a surface of a substrate of the front end module. |
| US07768781B2 |
Computer with improved cooling features
A personal computer has a central air plenum straddled by opposed drive bays, and memory modules in the plenum are covered by a shroud that increases the air flow over the memory modules. The plenum establishes a first pathway for air flow and parallel to the plenum is a second pathway for air flow past cards such as graphics and network cards. |
| US07768780B2 |
Flow-through cooling for computer systems
Systems and method for cooling computer systems are provided. A rack system for housing a plurality of computers is provided, the rack system including: a rack assembly configured to support a first stack of computers and a second stack of computers; and at least one fan assembly configured to create an airflow through the first stack of computers and into the second stack of computers. A method of cooling a plurality of computers in a rack system is provided, including: supporting a first stack of computers and a second stack of computers in a rack assembly; and effectuating an airflow through the first stack of computers and into the second stack of computers. |
| US07768779B2 |
Synthetic jet ejector with viewing window and temporal aliasing
A device (103) is provided which comprises (a) a housing (115) equipped with a viewing window (253); (b) a diaphragm (301), visible through said viewing window; (c) an actuator (126) adapted to vibrate said diaphragm at an operating frequency; and (d) a strobe light (121). |
| US07768774B2 |
Hard disk drive and display unit
According to one embodiment, a hard disk drive comprises a housing, a drive main unit contained in the housing, a frame which supports the drive main unit to keep the drive main unit away from the housing, a projection contained in the housing and inwardly projecting, the frame being mounted on the projection, and a bush provided between the frame and the projection. The bush radially receives the weight of the drive main unit. The frame includes a frame main body, a holding portion incorporated in the frame main body and supporting the bush, and a contact portion provided independently of the holding portion and radially contacting the bush. |
| US07768772B2 |
Method and apparatus for providing flexible partially etched capacitor electrode interconnect
The present subject matter includes a capacitor stack disposed in a case, the capacitor stack including one or more substantially planar electrode layers. The one or more substantially planar electrode layers have an etched surface, an unetched surface, and a grade bordering the etched surface and the unetched surface. Also, the present subject matter includes a lid conforming sealingly connected to the material defining the first aperture. Additionally, the present subject matter includes a feedthrough assembly connected to the capacitor stack and passing through the feedthrough hole and sealingly connected to the material defining the feedthrough hole. In the present subject matter, the one or more substantially planar electrode layers are made by printing a curable resin mask onto the one or more substantially planar electrode layers and etching the layers, the curable resin mask defining the grade and adapted to resist etching. |
| US07768769B2 |
Lithium ion capacitor
A lithium ion capacitor having a high capacity retention at the time of continuous charge at a high temperature and excellent durability. The lithium ion capacitor includes a positive electrode, a negative electrode and an aprotic organic solvent electrolyte solution of a lithium salt as an electrolytic solution. The positive electrode active material is a material capable of reversibly supporting lithium ions and/or anions, a negative electrode active material is a material capable of reversibly supporting lithium ions, the negative electrode and/or the positive electrode is doped with lithium ions so that the potential of the positive electrode is at most 2.0 V after the positive electrode and the negative electrode are short-circuited, and the electrolytic solution contains vinylene carbonate or its derivative. |
| US07768767B2 |
Triggered pulsed ignition system and method
The ignition system is for use in a gas turbine engine. It comprises an ignition plug having a triggered spark gap therein. |
| US07768766B2 |
Plasma processing system ESC high voltage control
A plasma processing system is disclosed. The plasma processing system may include an electrostatic chuck (ESC) positioned inside a plasma processing chamber and configured to support a wafer. The ESC may include a positive terminal (+ESC) for providing a first force to the wafer and a negative terminal (−ESC) for providing a second force to the wafer. The plasma processing system may also include a first trans-impedance amplifier (TIA) and a second TIA configured to measure a first set of voltages for calculating a value of a positive load current applied to the positive terminal. The plasma processing system may also include a third TIA and a fourth TIA configured to measure a second set of voltages for calculating a value of a negative load current applied to the negative terminal. |
| US07768765B2 |
Substrate support having heat transfer system
A support for a substrate processing chamber comprises a fluid circulating reservoir comprising a channel having serpentine convolutions. A fluid inlet supplies a heat transfer fluid to the fluid circulating reservoir and a fluid outlet discharges the heat transfer fluid. In one version, the channel is doubled over to turn back upon itself. |
| US07768762B2 |
Design structure for an on-chip high frequency electro-static discharge device
A design structure for an on-chip high frequency electro-static discharge device is described. In one embodiment, the electro-static discharge device comprises a substrate and multiple metal level layers disposed on the substrate. Each metal level comprises more than one electrode formed therein and more than one via connecting with some of the electrodes in adjacent metal levels. The device further includes a gap formed about one of the metal level layers, wherein the gap is hermetically sealed to provide electro-static discharge protection for the integrated circuit. |
| US07768756B2 |
Leakage current protection circuit
Systems and methods are provided for substantially mitigating leakage current. One embodiment includes an integrated circuit (IC). The IC comprises a monitoring circuit configured to control switching of one of a first voltage source and a second voltage source to an output. The IC also comprises a leakage current protection circuit configured to substantially mitigate leakage current flow between the first voltage source and the second voltage source due to an undershoot condition caused by the switching between the first and second voltage sources to the output. |
| US07768755B1 |
Over-voltage protection and automatic re-strike circuit for an electronic ballast
The present invention is an overvoltage protection and automatic re-strike circuit for an electronic ballast. The electronic ballast has an inverter, a shut-down circuit, a safety circuit, a monitoring circuit, and an overvoltage protection circuit. The inverter provides an appropriate alternating current power supply to operate the lamp. The shut-down, safety, monitoring, and overvoltage protection circuits are coupled to the inverter and provide the overvoltage protection and automatic re-striking functions. During an overvoltage condition, the overvoltage protection circuit will temporarily disable the inverter. Subsequent to the overvoltage condition, the overvoltage protection circuit permits the inverter to attempt to re-ignite the lamp. After a predetermined number of unsuccessful re-ignition attempts, the safety circuit will permanently disable the inverter to avoid damage to the ballast. |
| US07768754B2 |
Ceramic substrate for light emitting diode where the substrate incorporates ESD protection
A metal oxide varistor comprising one or more zinc oxide layers is formed integral to a ceramic substrate to provide ESD protection of a semiconductor device mounted to the substrate. The portion of the ceramic substrate not forming the varistor may be aluminum oxide, aluminum nitride, silicon carbide, or boron nitride. The varistor portion may form any part of the ceramic substrate, including all of the ceramic substrate. |
| US07768753B2 |
Circuit arrangement for protection against electrostatic discharges and method for diverting electrostatic discharges
A circuit arrangement for protection against electrostatic discharges comprises a diverting element, which is connected between a first and a second terminal and has a control input, via which the diverting element can be controlled into the conducting state. Moreover, trigger elements are provided, which have a trigger output for outputting a trigger signal in a manner dependent on a voltage between the first and the second terminal. The circuit arrangement furthermore comprises at least one amplifier unit, which is coupled to one of the trigger outputs on the input side and to the control input on the output side. |
| US07768752B2 |
Overvoltage protection circuit
An overvoltage protection circuit includes an output transistor connected between a first power supply and an output terminal, a load connected to the output terminal, a dynamic clamping circuit for controlling a voltage difference between the first power supply and the output terminal, and a clamp selection switch electrically connected between the dynamic clamping circuit and the output terminal, and a conductive condition of the clamp selection switch is determined according to a comparison between a reference voltage and a voltage of the output terminal. |
| US07768751B2 |
System and method for ground fault detection and interruption
A ground fault detector and interrupter for a photovoltaic (PV) energy conversion system, method and apparatus are disclosed. In an exemplary embodiment, the system includes first and second inputs adapted to couple to a first and second rails of a PV array. An inverter is configured to convert DC power generated from the PV array to AC power. A ground fault detector and interrupter, which is coupled to the first and second rails and to the inverter, is configured to detect ground fault conditions in the PV array and to decouple the PV array from the remaining portion of the PV energy conversion system upon such detection. A known signal is coupled to the input of the ground fault detector and interrupter, and then sensed at the output of the ground fault detector and interrupter to determine whether components of the ground fault detector and interrupter are operating properly. |
| US07768750B2 |
Cordless power tool
To provide a cordless power tool which can suppress heat generation of a protection unit and prevent the erroneous operation. A cordless power tool 1 includes a body casing 10; a battery 20 which is detachably attached to the body casing 10 and can supply electric power; a motor 30 which is housed in the body casing 10, and generates rotation force by the electric power of the battery 20; a cooling fan 40 which rotates by the rotation force of the motor 30; and a protection unit 50 which shuts off the power supply to the motor 30, in accordance with a detection result of the state of the battery 20, so that the battery 20 does not enter an overdischarge state or an overcurrent state. Herein, a passage of cool air generated by the cooling fan 40 is formed in the body casing 10, and the 16 protection unit 50 is arranged so that at least its part is located in the passage of the cool air. |
| US07768749B2 |
Tunnel MR head with long stripe height stabilized through side-extended bias layer
In a tunnel magnetoresistive (TMR) device, free stack sublayers are separated by an intermediate spacer layer that serves to ensure a uniform circumferential magnetization in the free stack, counterbalancing orange-peel coupling by antiferromagnetic exchange coupling. On top of the upper free stack sublayer a thin upper antiferromagnetic layer may be formed to act as a hard bias layer and suppress side reading. The thickness of the upper AF layer is established to tune sensor sensitivity to external fields as well as to promote greater sensor sensitivity. |
| US07768748B2 |
Magnetoresistive sensor with overlaid combined leads and shields
An improved magnetic head for a hard disk drive including a lead overlaid read head in which the read width and read gap are reduced. The read width, which corresponds to the distance between the inner ends of the overlaid electrical leads, is reduced by the fabrication of a thin read width insulation member prior to the fabrication of the overlaid electrical leads. The read gap is reduced by fabricating the overlaid electrical leads from a magnetic, electrically conductive material such as NiFe, whereby the overlaid electrical leads also function as a magnetic shield. The read gap, which is the distance between the first and second magnetic shields is thus reduced as compared to the prior art by the thickness of the electrical leads and the thickness of the prior art second insulation layer formed between the electrical leads and the second magnetic shield. |
| US07768742B2 |
Method and apparatus for providing a truncated profile probe for perpendicular recording
The present invention is a truncated probe for a perpendicular recording write head. The truncated probe is formed in a resist using a pullback process. In the pullback process, a trench is formed in the resist. The resist is then heated to a required temperature for a predetermined duration of time. By controlling the temperature and time, the amount of pullback of the resist is controlled to form a specified angle for the truncated probe. Further, the present invention increases the efficiency of the write head by reducing the distance between the air-bearing surface (ABS) and a magnetic back gap of the perpendicular recording write head yokes. This reduction reduces the length of the write head and permits a faster rise time of a recorded signal. |
| US07768731B2 |
Magnetic recording medium, magnetic storage and method for reproducing information from magnetic recording medium
A magnetic recording medium includes a first magnetic layer; and a second magnetic layer formed on the first magnetic layer. The first magnetic layer and the second magnetic layer make exchange coupling therebetween and also, have their magnetizing direction in anti-parallel to one another. A net residual area magnetization of the first magnetic layer and the second magnetic layer is expressed by the following formula: |Mr1×t1−Mr2×t2| where Mr1 and Mr2 denote respective residual magnetizations of the first magnetic layer and the second magnetic layer, and t1 and t2 denote respective film thicknesses of them; and the net area magnetization at a first temperature is larger than the net area magnetization at a second temperature lower than the first temperature. |
| US07768729B2 |
Method, system, and computer program product for estimating adjacent track erasure risk by determining erase band width growth rates
A method according to one embodiment comprises determining a growth rate of an erase band width between an aggressor track and a substantially unerased portion of a data track on a magnetic medium during a first number of write cycles on the aggressor track; and estimating the erase band width, or derived parameter thereof, for or after a second number of write cycles on the aggressor track, the second number of write cycles being greater than the first number of write cycles. |
| US07768728B2 |
Detecting head/disk contact using timing jitter
A disk drive that includes a head and a disk. The disk drive also includes a circuit that can detect head/disk contact from a jitter determined from a read signal provided by the head. The jitter may correspond to the time interval between two detected sync marks. Alternatively, the jitter may correspond to a change in frequency of a read clock generated from the read signal. These approaches allow for detection of head movement in a down track direction. Down track is a direction that is essentially parallel with the longitudinal axis of the head. |
| US07768727B2 |
Optical lens barrel and image pickup apparatus
A lens barrel includes front, intermediate, and rear barrels that hold front, intermediate and rear lens group, respectively. The relative distances among the barrels vary. The front barrel includes a lens barrier and a barrier actuating member. A barrier drive cam section rotates the barrier actuating member upon relative movement of the barrels. The intermediate barrel includes a first drive source for driving a shutter unit, a second drive source for driving a light amount control unit, and a third drive source for driving the intermediate lens group for image stabilization. The intermediate barrel has a rear lens group clearance section at an outer peripheral portion to avoid interference with a driving mechanism for the rear lens group, and a barrier clearance section adjacent to the first or second drive source in a peripheral portion to avoid interference with the barrier actuating member and the barrier drive cam section. |
| US07768726B2 |
Lens drive device
A lens drive device capable of preventing a lens holder from inclining with respect to the optical axis direction of a lens is provided. A first gear (13), a second gear (14), a protrusion (20a), and a coil spring (6) are coaxially supported by a shaft (5), which is a fixed shaft. The rotational motion is transmitted to a two-stage gear (12) by rotating a rotor (11a) of a step motor (11) clockwise or counterclockwise. The rotational motion of the two-stage gear (12) is in turn transmitted to the first gear (13) and the second gear (14). When the first gear (13) and the second gear (14) rotate, the degree of engagement between an internally threaded portion (131a) of the first gear (13) and an externally threaded portion (141a) of the second gear (14) increases, and the second gear (14) moves upward. As the second gear (14) moves upward, a lens holder (20), urged upward by the elastic force of the coil spring (6), moves upward along the optical axis of a lens (21). |
| US07768725B2 |
Lens barrel
A light shielding piece is supported by a second lens holding frame such that the light shielding piece can rotate and move on a plane which is perpendicular to an optical axis. In a shooting state, a through hole formed in the second lens holding frame is closed to establish a light shielding state. In a retracted state, on the other hand, a first auxiliary shaft passing through a through hole of the second lens holding frame pushes the light shielding piece to generate a component force. The generated component force rotates and moves the light shielding piece on a plane which is perpendicular to the optical axis, and the lens barrel is brought into an opened state where the through hole is not blocked. |
| US07768722B2 |
Lens barrel
There is provided a lens barrel including an imaging optical system, and an image blur correction unit moving a shift lens forming the imaging optical system in a plane perpendicular to an optical axis of the imaging optical system. The image blur correction unit includes a second movable body holding the shift lens and provided to be movable in two directions perpendicular to each other on a plane perpendicular to the optical axis. A fixed lens holding frame holding a fixed lens forming the imaging optical system is placed in front of the second movable body. A movement control structure is provided in a region ranging from the second movable body to the fixed lens holding frame to allow movement of the second movable body in the two directions and control a range of movement of the second movable body. |
| US07768721B2 |
Optical assembly, projection exposure apparatus and projection objective
In some embodiments, the disclosure relates to an optical assembly that includes an optical element and a structure element. A gap runs between the optical element and the structure element. A sealing element may be present to seal the gap. At least one liquid layer may be arranged between the structure element and/or the optical element, and the sealing element so that a relative displacement of the sealing element with respect to the structure element and/or the optical element is possible in the direction of the layer plane. |
| US07768719B2 |
Super wide angle optical system
A super wide angle optical system including: a first lens group including one or more of irrotational symmetric lens surfaces disposed sequentially from an object side and having, overall, a negative refractive power; an aperture stop for intercepting unnecessary light; and a second lens group including one or more of irrotational symmetric lens surfaces and having, overall, a positive refractive power. |
| US07768716B2 |
Zoom optical system and electronic equipment using the same
A zoom optical system that comprising: a first lens unit having a negative refractive power; a second lens unit having a positive refractive power; and a third lens unit having a positive refractive power which are arranged in order from an object side, a space between the lens units being changed to perform variation of magnification, the first lens unit includes a negative lens, the second lens unit includes a positive lens and a negative lens in order from the object side, the third lens unit includes a positive lens, and an electronic equipment provided with the zoom optical system. |
| US07768715B2 |
Whole system zoom and varifocal lens with intermediate image
A lens system for forming a final image of an object, said system having an object side and an image side and forming a first intermediate real image between the object and final image, said system comprising a moving lens group containing the intermediate real image as the magnification of the final image is changed. The lens system is configured as a whole system so that optical aberrations at the intermediate real image, including field curvature, focus, astigmatism, distortion and color separation, are allowed to be of substantially greater magnitude than the corresponding optical aberrations of the final image. |
| US07768705B2 |
Optical irradiation device for the polarization of alkali atoms and a device for the hyperpolarization of noble gases
An optical irradiation device for the polarization of alkali metal atoms for the hyperpolarization of noble gases by spin exchange includes at least one semiconductor laser device which can generate laser light which, with regard to its wavelength, is suitable for the polarization of the alkali metal atoms. A polarizer effects circular polarization of the laser light generated by the semiconductor laser device. A device for introducing the laser light into a working region in which the alkali metal atoms to be polarized can be present, and a device for defining a wavelength of the laser light, which can couple part of the laser light back into the semiconductor laser device in order thereby to define the wavelength of the laser light at a predetermined wavelength or a predetermined wavelength range. |
| US07768704B2 |
Screen
A method and apparatus relating to a projection screen having a reflective face including gills are disclosed. |
| US07768700B1 |
Method and apparatus for optical gain fiber having segments of differing core sizes
Apparatus and method for amplifying laser signals using segments of fibers of differing core diameters and/or differing cladding diameters to suppress amplified spontaneous emission and non-linear effects such as four-wave mixing (FWM), self-phase modulation, and stimulated Brillouin and/or Raman scattering (SBS/SRS). In some embodiments, different core sizes have different sideband spacings (spacing between the desired signal and wavelength-shifted lobes). Changing core sizes and providing phase mismatches prevent buildup of non-linear effects. Some embodiments further include a bandpass filter to remove signal other than the desired signal wavelength and/or a time gate to remove signal at times other than during the desired signal pulse. Some embodiments include photonic-crystal structures to define the core for the signal and/or the inner cladding for the pump. Some embodiments include an inner glass cladding to confine the signal in the core and an outer glass cladding to confine pump light in the inner cladding. |
| US07768697B2 |
Spectrally resolved fast monitor
A method and apparatus for monitoring spectral tilt uses an arrayed waveguide grating (AWG) to separate a multiplexed optical signal having a plurality of wavelength channels into a plurality of sub-bands, where each sub-band spans a different wavelength range and includes more than one wavelength channel. A photodetector array is provided to measure the optical power in each of the sub-bands, while control electronics calculate spectral tilt of the multiplexed optical signal using the measured optical power in each of the sub-bands. The spectral tilt monitor in accordance with the instant invention provides spectral resolution, increased monitoring speeds, and decreased manufacturing costs. |
| US07768695B2 |
Parametric generation using intersecting cavities
A parametric device having a non-linear material (4) for generating an idler wave and a signal wave (16) in response to a pump wave (14), the pump, idler and signal waves being non-collinear, the device having a cavity (10, 11) resonant at the pump wavelength and means for varying the angle between the propagation directions of the pump and idler waves. |
| US07768690B2 |
Backlight displays
A transmissive backlit display is disclosed. In one aspect, the backlit display comprises a backlight and an array of transmissive interferometric modulators. Each interferometric modulator comprises a fixed and moving dielectric mirror stack. The interferometric modulators cause light within the desired wavelength range to be transmitted while reflecting at least a portion of the remaining light. |
| US07768688B2 |
Image display device, image display method, and image display program
An image display device having an optical modulation element, which modulates light emitted from a light source according to display information, and displaying a display image based on the display information includes: a unit adjusting the amount of illumination light with respect to light emitted from the light source on the basis of brightness information on the brightness of the display image based on the display information; a color conversion processing unit that performs a color conversion process according to the brightness information with respect to the display information so that the display image can be color-reproduced within a predetermined color space; and a display and driving unit that drives the optical modulation element on the basis of the display information having been subjected to the color conversion process so as to display the display image. |
| US07768686B2 |
Light-beam-scanning system utilizing counter-rotating prism wheels
A light-beam-scanning system includes two counter-rotating prism wheels. Each prism wheel has a set of prisms at its periphery, selected so that prisms of equal half-angle deflections are sequentially aligned. A light transceiver structure directs a light beam parallel to the rotational axes of the prism wheels and at a distance from the rotational axes so that the light beam passes through the aligned prisms. A prism-wheel drive is operable to drive the prism wheels in opposite rotational directions. |
| US07768685B2 |
Hologram optical element and surface light source device using the hologram optical element
A hologram optical element having a thin form and a high degree of light transmittance, moreover that provides superior handling ease, as well as a surface light source device employing this hologram optical element. The angle at which light can be bent in this hologram optical element, has low wavelength dependency, and the hologram optical element enables prevention of spectral separation in white light incident from an oblique direction which is bent to a vertical direction and emitted. A transmitting diffraction grating, when light of wavelengths λ1, λ2 and λ3 within the ranges 0.46≦λ1≦0.50 μm (blue light), 0.53≦λ2≦0.57 μm (green light), 0.60≦λ3≦0.64 μm (red light) is incident at angle θi, the maximum diffraction angle for diffractive efficiency of each wavelength is within the range from −5 degrees to +5 degrees. |
| US07768681B2 |
Image processing device and method of image processing
A CPU 200 obtains and analyzes one or multiple image data GD, which are to be laid out on ornamental image data FD. The CPU 200 also obtains and analyzes desired ornamental image data FD to acquire a color distribution characteristic (representative color Fc). The CPU 200 sets an analyzed correction level according to the result of the analysis of the image data GD and modifies the analyzed correction level based on the acquired color distribution characteristic, so as to set a modified color balance correction level. The CPU 200 adjusts the color balance of the image data GD with the modified color balance correction level and pastes the color balance-adjusted image data GD onto the ornamental image data FD according to layout control information LI to generate output image data. |
| US07768679B2 |
Carriage moving device and image-scanning apparatus using the same
According to one example structure of the invention, a carriage moving device includes; a guide member comprising a pair of inclined planes; a carriage slidably supported by the guide member in a longitudinal direction of the guide member at a plurality of portions where the pair of inclined planes slidably support the carriage. |
| US07768678B2 |
Systems, methods and devices for rotating images
An embodiment generally relates a device for rotating images. The device includes an image memory configured to store an image and a plurality of buffers. The plurality of buffers are configured to interface with the image memory to read data words of the image from the image memory and to write rotated data words to the image memory. The device also includes a logic module configured to interface with the plurality of buffers and to micro-rotate and macro-rotate an image based on a selection of three orientations. The logic module is also configured to execute a read of data words from the image memory to a first buffer of the plurality of buffers, a rotation of a data word, and a write of rotated data words from a second buffer of the plurality of buffers to the image memory substantially simultaneously. |
| US07768677B2 |
Image pickup apparatus for accurately correcting data of sub-images produced by a solid-state image sensor into a complete image
A solid-state image sensor produces an image including plural sub-images, which are rapidly read out and outputted via output circuits. The image sensor has its imaging surface divided into corresponding plural sub-areas producing image data, which is transferred by the horizontal transfer path in both left and right directions and outputted from the output circuits, whose amplifier characteristics are determined as follows. Optical black (OB) data from an OB area on the imaging surface is transferred in the left direction by the horizontal transfer path and outputted from one output circuit as total OB data. OB data is transferred by the horizontal transfer path in both left and right direction and outputted from the output circuits as left and right OB data. An output circuit characteristics determiner uses the total, and left and right OB data to determine the amplifier characteristics of the output circuits. |
| US07768675B2 |
Image forming apparatus
An image forming apparatus according to an aspect of the invention includes: a media sensor that detects a type of a recording paper; a development unit configured to develop an image on the recording paper; a pair of rollers that fixes the image on the recording paper by nipping the recording paper bearing the image developed in the development unit and forcing the recording paper to pass by; a main heater that heats the pair of rollers by passing a current therethrough when the recording paper passes by; and an auxiliary heater that selectively heats at least one of the pair of rollers by passing a current therethrough when the recording paper passes by the pair of rollers in a case where the media sensor detects that the weight per unit of the recording paper or the thickness of the recording paper is equal to or greater than a specific value. |
| US07768674B2 |
Exposure determining device and exposure determining method
There is provided an exposure determining device that determines whether exposure of an image represented by image data is appropriate. The exposure determining device includes a first evaluation value deriving unit that derives a maximum luminance reference value for each of blocks obtained by dividing the image into a plurality of blocks of the image data on the basis of luminance values of pixels constituting each block, and derives a first evaluation value for the image on the basis of the derived maximum luminance reference values for the blocks, and an exposure determining unit that determines whether exposure of the image is appropriate, on the basis of the derived first evaluation value. |
| US07768672B2 |
Spot color control system and method
This disclosure relates generally to methods and systems for color management in image/text printing or display systems, and more particularly to a system and method for automatically achieving spot color production through use of a plurality of gain matrices per spot color in determining spot color coordinates. Furthermore, this disclosure provides a means for mapping out-of-gamut target spot colors substantially near a boundary of the gamut of an image output device, such as a printer or display. |
| US07768670B1 |
Method and system for processing and rendering object oriented neutral image data
A system and method processes object oriented image data by initially parsing the object oriented image data into non-neutral image data and neutral image data. A second parser circuit parses the neutral image data into black image data, grey image data, and white image data. A neutral processing circuit processes the black image data, grey image data, and the white image data. The system also classifies object oriented image data to be rendered by an object oriented rendering system. To perform the classification, the object oriented image data to be rendered is received and classified and assigned as one of a plurality of possible first level object types. The process further classifies and assigns, to the object oriented image data to be rendered, one of a plurality of possible second level object types related to the first level object type assigned to the object to be rendered. |
| US07768669B2 |
Image processing apparatus, printer using this apparatus, digital camera using this apparatus, consumable material holder for printer, and printer for digital camera
In a printer to which a printer consumable material holder for supplying a printing medium is detachably mounted or in a digital camera which integrally includes this printer, image processes suitable for various printing media capable of being supplied can be performed. To do so, an information memory unit for storing information of the printing media is provided in the printer consumable material holder. In association with this, a unit for receiving the information, and a unit for analyzing the received information and determining an optimum image processing method for performing printing on the printing medium are provided in the printer. In a system structured by combining these units, the optimum image process is automatically adopted on the basis of the information stored in the printer consumable material holder. |
| US07768666B2 |
Device, device processing history storage system and device processing history storing method
A device processing history storage system in which a device and a terminal are connected through a network, in which the terminal includes: a request portion which transmits to the device a request for device processing or a request for storage of a history of the device processing; a history request portion which requests the device for the history; and a history display portion which displays the history received from the device, and the device includes: a device processing portion which performs the device processing; a history generation portion which generates a history of the device processing performed by the device processing portion; a history storage portion which stores the history generated by the history generation portion; and a history transmission portion which transmits to the terminal the history which is stored in the history storage portion. |
| US07768663B2 |
System and method for printing books by book identification
A system and method for efficiently copying books. According to the system and method, a user inputs a book identification into a peripheral device to cause the peripheral device to access an electronic version of the book. Upon so accessing, the peripheral is adapted to print the electronic version as specified. The book identification may be any suitable identification, such as a book ISBN number, a bar code, a title, etc. |
| US07768660B1 |
Non-destructive approach to ellipsometric monitoring of a film coating on the inner surface of a tube shaped sample
Disclosed is the use of a focused electromagnetic beam which is caused to impinge on the top surface of a tube shaped sample, to investigate a film coating on its inner surface during fabrication thereof and/or thereafter. |
| US07768659B2 |
Determining copper concentration in spectra
Methods of subtracting the copper contribution to spectra obtained from a substrate during chemical mechanical polishing are described. |
| US07768657B2 |
Optical fly height measurement
An optical fly height measurement system includes a planar waveguide, a first diffraction grating for coupling an electromagnetic wave into the planar waveguide wherein the first diffraction grating is positioned for directing the electromagnetic wave towards an air bearing surface of a slider. A second diffraction grating is provided for receiving the electromagnetic wave reflected from the air bearing surface. A detector module and processor are provided to determine the fly height. |
| US07768654B2 |
On-chip phase microscope/beam profiler based on differential interference contrast and/or surface plasmon assisted interference
A differential interference contrast (DIC) determination device and method utilizes an illumination source, a layer having a pair of two apertures that receive illumination from the illumination source, and a photodetector to receive Young's interference from the illumination passing through the pair of two apertures. In addition, a surface plasmon assisted optofluidic microscope and method utilize an illumination source, a fluid channel having a layer with at least one aperture as a surface, and a photodetector that receives a signal based on the illumination passing through the aperture. The layer is corrugated (e.g., via fabrication) and parameters of the corrugation optimize the signal received on the photodetector. |
| US07768653B2 |
Method and system for wavefront measurements of an optical system
A wavefront measurement system includes a source of electromagnetic radiation. An illumination system delivers the electromagnetic radiation to an object plane. A source of a diffraction pattern is in the object plane. A projection optical system projects the diffraction pattern onto an image plane, which includes a mechanism (e.g., a shearing grating) to introduce the lateral shear. A detector is located optically conjugate with the pupil of the projection optical system, and receives an instant fringe pattern, resulting from the interference between sheared wavefronts, from the image plane. The diffraction pattern is dynamically scanned across a pupil of the projection optical system, and the resulting time-integrated interferogram obtained from the detector is used to measure the wavefront aberration across the entire pupil. |
| US07768652B2 |
Methods for mapping tissue with optical coherence tomography data
Various methods are disclosed for mapping optical coherence tomography (OCT) data to facilitate review and diagnosis. In one aspect, high resolution 2D line scans are obtained along with lower density 3D cube scans and displayed in a manner to provide context to the clinician. In another aspect, OCT data is analyzed to provide information about non-uniformities of the tissue. Binary image maps of maps useful for determining tautness of membranes are also disclosed. |
| US07768651B2 |
Optical coherence tomography apparatus based on spectral interference and an ophthalmic apparatus
An optical coherence tomography apparatus based on spectral interference where object information can be speedily obtained and an information acquisition range in a depth direction can be enlarged, and an ophthalmic apparatus. The apparatus includes a first optical system for projecting light with short coherence length onto an object to form object light which is reflection light from the object, a second optical system for projecting light with short coherence length onto a reference surface to form reference light which is reflection light from the surface, an optical system for synthesizing the object light and the reference light to be interference light, dispersing the interference light into predetermined frequency components and photo-receiving the dispersed light with a photodetector, a device varying a spectral characteristic when the interference light is dispersed by the interference/dispersion/photo-receiving optical system, and a calculation part obtaining the information based on an output signal from the photodetector. |
| US07768648B2 |
Method for aberration evaluation in a projection system
Aberrations in an optical system can be detected and measured using a method comprised of a test target in the object plane of a projection system and imaging onto the image plane with the system. The test target comprises at least one open figure which comprises a multiple component array of phase zones, where the multiple zones are arranged within the open figure so that their response to lens aberration is interrelated and the zones respond uniquely to specific aberrations depending on their location within the figure. This is a unique and new method of detecting a variety of aberration types including coma, spherical, astigmatism, and three-point through the imaging onto photosensitive material or image detector placed in the image plane of the system and the evaluation of these images. The method of the invention offers an advantage over other methods because of the sensitivity to particular aberration types, the unique response of the multiple zones of the test target to aberrations, and the ease with which aberrations can be distinguished. |
| US07768647B2 |
Multi-color cavity ringdown based detection method and apparatus
A multi-color cavity ringdown based spectrometer is housed in a light tight enclosure to detect the presence of trace quantities of gas phase molecules emanating from explosives, drugs, or hazardous materials being transported through the enclosure or compounds contained in a patient's breath. A method is also disclosed for detecting gas phase molecules emanating from explosives, drugs, hazardous materials, or a patient's breath. |
| US07768643B1 |
Apparatus and method for classifying and sorting articles
An apparatus for classifying articles may include a frame connected to (1) transport means for directing articles to create a product stream, (2) an emitter section having a radiation source and (3) a detection section for detecting a portion of radiation reflected by articles. The detection section may include first detection means for converting radiant power of reflected radiation having a first polarization state into a first electrical signal, second detection means for converting radiant power of reflected radiation having a second polarization state into a second electrical signal, and third detection means for converting radiant power of reflected radiation into a third electrical signal. Control circuitry, which may receive the electrical signals, may include decision means for generating a selection signal. Selection means may separate an article from the product stream according to the received selection signal from the control circuitry. |
| US07768641B2 |
Spatial image modulation to improve performance of computed tomography imaging spectrometer
Computed tomography imaging spectrometers (“CTIS”s) having patterns for imposing spatial structure are provided. The pattern may be imposed either directly on the object scene being imaged or at the field stop aperture. The use of the pattern improves the accuracy of the captured spatial and spectral information. |
| US07768640B2 |
Fluorescence detection enhancement using photonic crystal extraction
Enhancement of fluorescence emission from fluorophores bound to a sample and present on the surface of two-dimensional photonic crystals is described. The enhancement of fluorescence is achieved by the combination of high intensity near-fields and strong coherent scattering effects, attributed to leaky photonic crystal eigenmodes (resonance modes). The photonic crystal simultaneously exhibits resonance modes which overlap both the absorption and emission wavelengths of the fluorophore. A significant enhancement in fluorescence intensity from the fluorophores on the photonic crystal surface is demonstrated. |
| US07768638B2 |
Systems for and methods of facilitating focusing an optical scanner
Systems and methods for facilitating focusing of an image scanner, such as a confocal microscope, are disclosed. Measurement of optical characteristics in certain areas of a test sample are compared to stored or baseline optical characteristic profiles to determine an appropriate correction to properly focus the scanner. In one aspect, the method includes obtaining a dynamic profile at a current detection region of a test sample and associating the dynamic profile to a profile selected from a set of stored baseline profiles. Each of the stored baseline profiles is associated with a correction. |
| US07768637B2 |
Method for acquiring high-resolution images of defects on the upper surface of the wafer edge
A method for acquiring high-resolution images of defects on the upper surface of the wafer edge is disclosed. For this purpose, first the position of at least one defect on the upper surface of the wafer edge is determined. The thus determined position of the defect is stored. Then the wafer is transferred into device for micro-inspection, in which the defect is examined more closely and imaged. The images acquired in the device for micro-inspection are deposited in a directory. |
| US07768633B2 |
Multiple surface inspection system and method
A system for inspecting components is provided. The system includes a prism having a first end, a second end, a first reflecting surface, and a second reflecting surface. The first end of the prism is located in a plane that is parallel to and axially separated from a plane of one or more of a plurality of inspection pieces. An image data system is disposed beyond the second end of the prism and generates image data of one or more of the inspection piece that includes a top surface of at least one of the inspection pieces and at least one side of at least one of the inspection pieces. An inspection piece transportation system, such as a pick and place tool or conveyor, moves a plurality of inspection pieces past the first end of the prism through an inspection area. |
| US07768632B2 |
Method of and apparatus for determining geometrical dimensions of a vehicle wheel
A method and an apparatus of determining geometrical dimensions of a motor vehicle wheel (rim/tire assembly) 1 by contact-less sensing, wherein the wheel is fixed on wheel receiving means 2 of a tire changer, that at least one light beam 21 is emitted on to the wheel or at least a part of the wheel, wherein the light beam reflected at the impingement area is detected, and wherein the directions of the emitted and reflected light beams are evaluated for determining the shape and/or position of the respective impingement area on the wheel. |
| US07768628B2 |
Contact lithography apparatus and method
A contact lithography apparatus and a method use one or both of spacers and a mesa to facilitate pattern transfer. The apparatus and the method include one or both of a spacer that provides a spaced apart orientation of lithographic elements, such as a patterning tool and a substrate, when in mutual contact with the spacer and a mesa between the patterning tool and the substrate. The mesa supports a contact surface of one or both of the mold and the substrate. One or both of the spacers and the mesa may be non-uniform. One or more of the patterning tool, the substrate and the spacer is deformable, such that deformation thereof facilitates the pattern transfer. |
| US07768620B2 |
Method of fabricating liquid crystal display and liquid crystal display fabricated by the same
A method of fabricating a light weight and small size LCD, and an LCD fabricated by the same. The method of fabricating an LCD includes providing assembled mother substrates, wherein at least one of the mother substrates includes a polarizer, a buffer layer, and a transparent film sequentially stacked on an out-side thereof, and fabricating the assembled mother substrates as individual units by cutting the assembled mother substrates into unit cells. |
| US07768612B2 |
High quality and ultra large screen liquid crystal display device and production method thereof
A large screen liquid crystal display device using a transverse electric field system which is capable of dramatically improving an aperture ratio, a transmittance ratio, brightness, and contrast with low cost and high production yield. For example, the width of the common electrodes that shield the electric fields of the video signal lines can be decreased dramatically and the aperture ratio can be improved dramatically. Especially, the bumps covering the video signal lines can be used along with the spacers, and with the use of halftone exposure method, the bumps covering the video signal lines and the spacers can be constructed at the same time, which dramatically shortens the time required for the production process. |
| US07768611B2 |
Display system with single crystal SI thin film transistors
A liquid crystal display comprises a display panel that includes at least one pixel transistor, at least one pixel electrode in electrical communication with the pixel transistor, at least one common electrode, and a liquid crystal material between the pixel electrode and the common electrode. The pixel transistor includes a thin film layer of essentially single crystal silicon that has a thickness in a range of between about 100 nm and about 200 nm. The pixel electrode has a thickness in a range of between about 5 nm and about 20 nm. The common electrode has a thickness of between about 50 nm and about 200 nm. |
| US07768609B2 |
Pixel structure for a display device having a common line with a capacitor portion that extends diagonally to the pixel electrode edge and is also perpendicular to the alignment direction
A pixel structure to be disposed on a substrate is provided. The pixel structure includes a common line having a capacitor portion, an active device, a pixel electrode electrically connected to the active device and covering the capacitor portion, and an alignment layer covering at least the common line. The alignment layer has an alignment direction and the capacitor portion extends along a first direction that is substantially perpendicular to the alignment direction. |
| US07768608B2 |
Liquid crystal display device with improved viewing angle
A novel liquid crystal display device is disclosed. The liquid crystal display device comprises a first polarizing film, a first retardation area with an Re of 70 to 330 nm and a value of Nz of not less than 0 to less than 0.5 and a slow axis perpendicular to a transmission axis of the first polarizing film; a second retardation region with an Re of not greater than 50 nm and an Rth of 10 to 140 nm; and a liquid crystal cell comprising a liquid crystal layer with a slow axis in a black state parallel to the transmission axis of the first polarizing film; and a second polarizing film in this order. |
| US07768606B2 |
Liquid crystal display device and manufacturing method for the same
On a glass substrate, gate bus lines, data bus lines, and TFTs are formed. Then, on the substrate, an insulating film, covering the gate bus lines, data bus lines and TFTs, is formed, and a positive type photoresist film is further formed thereon. Next, through exposure and development processes, the resist film is divided for each picture element and subjected to ultraviolet ray irradiation to harden only a surface layer thereof. Then, the resist film is subjected to heat treatment to form thereon wrinkle-form surface ruggedness of a uniform pattern, which is determined depending on the size of the resist film. Subsequently, reflection electrodes are formed on the resist film. The reflection electrodes are formed to overlap the gate bus line, data bus line and TFTs, and the regions between the adjacent reflection electrodes serve as light transmission regions. |
| US07768603B2 |
Liquid crystal display device and method of manufacturing the same
Opening portions (opening patterns) having different arrangement pitches and sizes are formed in first metal film patterns, a first semiconductor film, second metal film patterns, a third insulating film, and the like under a reflective electrode, respectively. These opening portions overlap each other complexly to form fine bumps and dips in the surface of the reflective electrode. Further, the opening portions can be formed in the first metal film patterns, the first semiconductor film, and the second metal film patterns simultaneously with the formation of TFTs. Accordingly, an increase in the number of steps can be avoided. |
| US07768602B2 |
Light diffusing article with GRIN lenses
A light diffusing article that has, on at least one surface, convergent lens particles or divergent lens particles. |
| US07768601B2 |
Thin film transistor array panel and liquid crystal display including the panel
A gate wire including a gate line and a gate electrode is formed on an insulating substrate of a TFT array panel. A semiconductor pattern made of amorphous silicon is formed on the gate insulating layer covering the gate wire. A data wire including a data line, a source electrode, and a drain electrode is formed on the semiconductor pattern or the gate insulating layer covering the gate wire. A part of the semiconductor pattern extends under the data line, and a light blocking member overlapping the semiconductor pattern under the data line is formed using the same layer as the gate wire. The light blocking member is to prevent light incident upon the substrate from a backlight from entering the amorphous silicon layers; therefore, the stripes of different brightness and waterfall phenomenon in which the stripes move up and down can be removed in an LCD using a backlight driven by a rectangular wave of ON/OFF signals outputted from inverter. |
| US07768599B2 |
Color filter for transflective type liquid crystal display
The main object of the present invention is to provide a color filter for a transflective type color liquid crystal display which is easily produced and capable of displaying the same color tone with both of a reflecting light and a transmitting light, and shows light scattering in a reflective light region. In order to attain the above mentioned object, the present invention provides a color filter for transflective type color liquid crystal display comprising a transparent substrate and a reflective light coloring layer and a transmissive light coloring layer formed on the transparent substrate, wherein, a convex-concave is formed on a surface of a liquid crystal layer side of the reflective light coloring layer, and an average thickness of the reflective light coloring layer is formed to be thinner than the thickness of the transmissive light coloring layer, and a refractive index difference between the reflective light coloring layer and a layer in contact with the surface of the convex-concave formed side of the reflective light coloring layer, is 0.1 or more. Further, a main object of the present invention is to provide a color filter for transflective type liquid crystal display comprising a transparent membrane pattern region obtained by laminating: a transparent substrate; a transparent membrane pattern layer comprising a transparent membrane formed in a pattern on the transparent substrate; and a coloring layer formed so as to cover the transparent membrane pattern layer. |
| US07768596B2 |
Liquid crystal display device that is adaptive for driving plurality of liquid crystal display panels by use of one backlight
A liquid crystal display device according to an embodiment of the present invention includes at least two liquid crystal display panels; a lamp to irradiate light on each of the liquid crystal display panels; a transparent case to cover the lamp; and a hinge part to provide a hinge function to each of the liquid crystal display panels. |
| US07768593B2 |
Surface emission device, optical element and liquid crystal display device
Using a distance L between the centers of light sources 12, 12; a refractive index n of an optical element 15; a thickness d of the optical element; a distance W from the center of the light source to the optical element; a refractive index n0 of air; an angle of incidence θ1 of light emitted from the light sources and coming into the optical element, relative to the direction of optical axes; an angle of refraction θ2 of light, incident on the optical element, in the optical element; a diameter of each light source as D; and a maximum tangential angle a formed between a tangential line in contact with an outer surface of a luminance distribution generating layer 18 and a plane orthogonal to the optical axes, there is included a maximum tangential angle a satisfying x>L/2−D/2 when calculating a travel range x of a split image of the light sources in a direction normal to the optical axes using (1) n0 sin(a)=n sin(a−θ2), (2) n0 sin θ1=n sin θ2 and (3) x=W tan θ1+d tan θ2. This facilitates uniformalizing of front luminance distribution. |
| US07768590B2 |
Production method of active matrix substrate, active matrix substrate, and liquid crystal display device
A method of manufacturing an active matrix substrate prevents an increase in the number of production steps while simultaneously preventing electrostatic discharge at a TFT channel. The method preferably includes the steps of forming a short-circuit wiring for connecting a data signal line or a source electrode to a drain electrode or a drain side circuit; successively forming an upper insulating film having an opening for short-circuit wiring separation and a transparent conductive film at a region above the short-circuit wiring as upper layers of the short-circuit wiring; and removing at least the transparent conductive film inside the opening for short-circuit wiring separation and the short-circuit wiring below the opening for short-circuit wiring separation to perform patterning of the pixel electrode and separation of the short-circuit wiring in the same step. |
| US07768582B2 |
Liquid crystal display
A liquid crystal display comprises a first substrate having a pixel electrode, a second substrate adjacent to the first substrate and having a common electrode, and a liquid crystal layer disposed between the first substrate and the second substrate, wherein a black voltage applied to the pixel electrode is in a range of from about 3V to about 4.4V and a perpendicular direction dielectric constant ∈⊥ of liquid crystals in the liquid crystal layer is greater than or equal to about 0.27 times of a horizontal direction dielectric constant ∈∥ of the liquid crystals. |
| US07768580B2 |
Image display delay time shortening apparatus during channel change, method thereof and broadcasting receiving apparatus thereof
An image display delay time shortening apparatus during channel change, a method thereof and a broadcasting receiving apparatus thereof are disclosed. The broadcasting receiving apparatus extracts a sequence header from a video stream of the received broadcasting signal if a broadcasting signal of each channel is received. Henceforth, the broadcasting receiving apparatus extracts a sequence header corresponding to a changed channel from a relevant region of a channel information table in a memory to establish an initial value of a decoder, so that an image can be displayed with any time delay even if the sequence header is not received at the start of channel change. |
| US07768579B2 |
Video and audio system capable of saving electric power
A power supply of a video and audio system is coupled to a first switch and a second switch. A power management unit is coupled between the first switch and at least one electronic device. An integrated circuit includes a first circuit and a second circuit. The first circuit is coupled to the power management unit and the at least one electronic device for controlling the operation of the at least one electronic device. The second circuit is coupled to a battery, the first switch, the second switch, and the first circuit for controlling the first switch and the second switch. |
| US07768572B2 |
Iris recognition camera for an iris recognition system and a method of operation for an iris recognition camera
An iris recognition camera is provided which includes a driving barrel configured to support a lens, a moving unit configured to reciprocatingly move the driving barrel to perform both focus and zoom operations, and a position sensor configured to detect a position of the driving barrel. |
| US07768570B2 |
Image pickup apparatus using an imaging unit including an etalon and calibration method therefor
An image pickup apparatus includes an objective optical system, an image pickup element having a surface at an image formed by the objective optical system, and an etalon positioned between the objective optical system and the surface of the image pickup element. The etalon includes a gap, an optical path length of which is controllable for scanning the wavelengths transmitted by the etalon to thereby select the wavelengths that reach the surface. An optical filter is positioned between the objective optical system and the surface and has a first wavelength range over which incident light is reflected, a second wavelength range over which incident light is transmitted, and a boundary wavelength range that is bounded by the first and second wavelength ranges. The boundary wavelength range lies entirely within the wavelength range the peak transmission of the etalon can be scanned. A method of calibrating the etalon is also disclosed. |
| US07768568B2 |
Camera comprising means for retaining a lens at two different positions
An imaging module (1) comprises an upper portion (20, 60, 70, 80) and an under portion (10, 30, 40, 50), which are movable with respect to each other.The under portion (10, 30, 40, 50) holds an image sensor chip (10) and has a toothed recess (52) comprising alternating short slots (53) and long slots (54).The upper portion (20, 60, 70, 80) holds a lens (20) and has a rotatably arranged rotor (80). Protrusions (82) of the rotor (80) are positioned in the recess (52) of the under portion (10, 30, 40, 50), wherein the upper portion is pressed upwards under the influence of a spring (90).Every time the upper portion (20, 60, 70, 80) is pressed towards the under portion (10, 30, 40, 50) and subsequently released, the protrusions (82) of the rotor (80) are received by another slot (53, 54). In this way, the distance between the lens (20) and the image sensor chip (10) can be varied. |
| US07768564B2 |
Video apparatus and image sensing apparatus
This invention can reduce the circuit scale by synthesizing OSD data to be superposed on a picture of each resolution by using common OSD data. According to this invention, a video resolution converter converts an HD (High Definition) video signal into an SD (Standard Definition) video signal such as an NTSC or PAL video signal. A memory controller receives a sync signal identical to an SD picture obtained by frequency-dividing an HD video signal, and a sync signal based on an SD video signal, and reads out OSD data (4 bits per pixel) from the memory on the basis of these sync signals. The OSD data read out on the basis of the SD video signal is synthesized with the SD video signal by an SD_OSD_MIX unit, and then output. The OSD data read out on the basis of the SD sync signal synchronized with the HD is multiplied by an integer by an OSD resolution converter, synthesized with an HD video signal by an HD_OSD_MIX unit, and then output. |
| US07768562B2 |
Method, apparatus and system providing imager vertical binning and scaling using column parallel sigma-delta digital conversion
A method, apparatus and system are disclosed for digitizing a plurality of analog pixel signals of a pixel array in a manner which produces a digital signal representing the combination of said plurality of analog pixel signals. A readout architecture performs at least some binning and/or scaling operations in the readout and analog to digital conversion circuits relieving an image processor from the task of performing these operations. |
| US07768561B2 |
Image sensing apparatus and its control method
A drive mode is switched after readout for one frame is completed, and the reset operation for the following frame is started. In this manner, the reset operation for the following frame will not be performed during the readout period for the preceding frame. Therefore, the accumulation period for the following frame can be made consistent in that frame. |
| US07768560B2 |
multiband camera control apparatus and multiband camera control method
A multiband camera control apparatus comprises a multiband camera section configured to be capable of capturing a plurality of color bands, a computer configured to control the multiband camera section, a user interface configured to transmit instruction information for the control from the user to the computer, and parameters configured to control the corresponding band in each of the plurality of bands. The user interface includes a switching instruction section configured to switch between the plurality of bands. The computer is configured to control the multiband camera section by using the parameter corresponding to the band selected according to the instruction to switch between the plurality of bands from the switching instruction section. |
| US07768556B2 |
Physical quantity detection system, method for driving physical quantity detection system, solid-state image pickup device, method for driving solid-state image pickup device, and image pickup apparatus
A physical quantity detection system includes a pixel array unit including pixels two-dimensionally arranged in a matrix, where each of the pixel converts an externally supplied physical quantity into an electrical signal, a readout unit configured to read out a signal from each of the pixels n times by changing the sensitivity each time, where n is an integer greater than or equal to 2, a storage unit configured to store m signals out of the n signals read out from the pixel, where m is an integer greater than or equal to 1 and is less than n, and a write control unit configured to compare the signal read out from the pixel by the readout unit with a predetermined threshold value and configured to control a write operation of the signal into the storage unit on the basis of the comparison result. |
| US07768551B2 |
Method to stabilize digital video motion
A method for calculating an estimated hand motion vector of a plurality of images includes selecting a current video frame and a previous video frame from a video stream, dividing the current video frame into a plurality of macroblocks, selecting a subset of macroblocks from the current video frame, comparing the subset of macroblocks to the previous video frame within a two dimensional comparison range to generate a set of motion vectors, calculating a frame motion vector for the current video frame, estimating a steady motion vector for the current video frame by a first-order autoregression, and calculating a hand motion vector for the current video frame by taking a difference between the steady motion vector and the frame motion vector of the current video frame. |
| US07768550B2 |
Camera capable of data transmission
A camera according to the present invention can use a captured image of a communication target device to identify the communication target device when transmitting data to the outside. The camera includes a formatting section for converting transmission data to a format suitable for transmission to the communication target device identified. |
| US07768548B2 |
Mobile digital video recording system
The Improved Mobile Digital Video Recorder (IMDVR) system is a ruggedized, multiple camera video and audio recording system that is installed within a public transit vehicle to record, store, and manage an integrated data stream of data captured within and exterior to the transit vehicle. The system is focused on multiple person vehicles and the capture of an integrated data stream for use in transit security, liability, and evidentiary processes. |
| US07768547B2 |
Monitoring system and method thereof
A monitoring system including N cameras, a digital video recorder (DVR), a monitor, a remote controller, a receiver and a host is provided. N is a positive integer. The N cameras successively shoot N sceneries, and output N successive images accordingly. The DVR receives and stores the N successive images. The monitor displays a monitoring screen. The remote controller outputs a wireless remote signal. The receiver receives the wireless remote signal and outputs a wire transmit signal accordingly. The host controls the monitor to display at least the successive image in the monitoring screen. The host has an on screen display (OSD) program. When the controller receives the wire transmit signal, the host utilizes the OSD program to process the wire transmit signal to become a screen adjusting signal. The host adjusts the monitoring screen according to the screen adjusting signal. |
| US07768545B2 |
Panoramic image management system and method
A panoramic image management system and method is disclosed. The system provides for improved calibration of a 360 degree panoramic camera, as well as improved means for manipulating the images, and correlating images from conventional video cameras with the images from the 360 degree panoramic camera. The system also provides means for archiving and retrieving stored images. The present invention contributes to an improved video surveillance system. |
| US07768543B2 |
System and method for dynamically altering videoconference bit rates and layout based on participant activity
Systems and Methods to transmit and simultaneously display all video streams in a video conference by dynamically adapting video streams based on audio volume of the participants include allocating an amount of bandwidth to a participant in a videoconference; determining a level of activity exhibited by the participant during the videoconference, and changing the amount of bandwidth allocated to the participant responsive to the determined level of activity. In another aspect, a method for displaying video streams includes creating a graphical representation of a participant in a videoconference; displaying the created graphical representation; determining a level of activity exhibited by the participant during the videoconference; and altering the displayed graphical representation of the participant responsive to the determined level of activity. |
| US07768540B2 |
Multicolor thermal imaging method and thermal printer
A multicolor direct thermal imaging method wherein a multicolor image is formed in a thermal imaging member comprising at least first and second different image-forming compositions and a thermal printer for use in practicing the method. Heat is applied to at least the second image-forming composition while the first image-forming composition is at a first baseline temperature (T1) to form an image in at least the second image-forming composition, and heat is applied to at least the first image-forming composition while it is at a second baseline temperature (T2) to form an image in at least the first image-forming composition, wherein T1 is different from T2. |
| US07768537B2 |
Display system and method of diminishing unwanted movement of a display element
A method and apparatus for diminishing display transients and jitter. The method and system disclosed utilizes prior illumination and position histories in displaying and illuminating representations, and elements comprising the representations, on the display. Recognizing repeated representations, finding their prior and current positions, and determining if the difference in position is over a threshold value, diminishes the jitter by displaying the representation in the new position if over the threshold value, or, if it is not over the threshold value, then displaying it in the prior location. The illumination of an element at an intensity, which is based on prior illuminations and/or intensities of the element, diminishes the transients by avoiding flashing or flicker of transient illuminations. |
| US07768536B2 |
Methods of displaying information at different zoom settings and related devices and computer program products
A method of displaying pages of information on an electronic screen may include receiving a first page of information including first text, and rendering the first page of information including the first text on the electronic screen at a first zoom setting. After rendering the first page of information at the first zoom setting, zoom input may be accepted from a user through a user interface, and the first page of information including the first text may be rendered on the electronic screen at a second zoom setting different than the first zoom setting responsive to the zoom input. In addition, a target text size may be saved in electronic memory, and the target text size may represent a size of the first text on the electronic screen at the second zoom setting. A second page of information including second text different than the first text may be received, and a third zoom setting may be determined responsive to the target text size and responsive to the second text. The second page of information including the second text may then be rendered on the electronic screen at a third zoom setting. Related devices and computer program products are also discussed. |
| US07768531B2 |
Method and system for fast 90 degree rotation of arrays
A method and system to rotate a 2N by 2N array are described. Consistent with one embodiment of the present invention, the 2N elements of the 2N rows of a 2N by 2N array are loaded from memory into the vector registers of a processor's single instruction multiple data (SIMD) unit. Next, the elements of the rows in the top half of the array are interleaved with corresponding elements from a corresponding row in the bottom half of the array. The loading and interleaving operations are repeated N times before the results, stored in the vector registers, are written back to memory. |
| US07768530B2 |
Verification of process variable transmitter
A method and apparatus for verifying operation of process variable transmitters in process control or monitoring systems is provided. A process variable is measured with a process variable transmitter to verify operation of the process variable transmitter by comparing the process variable with a reference. A data entry is placed in a database which indicates operation of the process variable transmitter has been verified. |
| US07768524B2 |
Systems and methods for providing image rendering using variable rate source sampling
Systems and methods are provided for variable source rate sampling in connection with image rendering, which accumulate and resolve over all samples forward mapped to each pixel bin. In accordance with the invention, the textured surface to be rendered is sampled, or oversampled, at a variable rate that reflects variations in frequency among different regions, taking into account any transformation that will be applied to the surface prior to rendering and the view parameters of the display device, thus ensuring that each bin of the rendering process receives at least a predetermined minimum number of samples. In one embodiment, the sampling rate is variably set such that each bin is assured to have at least one sample point. In another embodiment, a tiling approach to division of the surface is utilized. In accordance with the architecture provided, the sample points of the surface are forward mapped to sample squares, other regions, of a rendering device, taking into account any transformations applied to the surface and the view parameters of the rendering device, such that each bin receives at least the predetermined minimum number of samples. A filter determines the value(s) to assign to each pixel based upon accumulation and resolution of all of the sample points that fall within the pixel bin(s), rather than assigning a value by selecting only the point sample that corresponds to the center of the pixel.Gaps or holes left by conventional forward-mapping techniques are eliminated by oversampling the source(s), and interpolated points are generated at a higher rate than the original source signal(s) to adequately cover the destination bins. A pixel, or sub-pixel, binning approach is used that accumulates and resolves over all samples, and performs particularly well compared to prior architectures in areas that have higher frequency content, solving the minification antialiasing problem and producing a high quality result. Anisotropic filtering is handled simply with the forward mapping approach by filtering over all samples that naturally accumulate after the forward map, and via variable control of the number of samples forward mapped to the bins.A variety of image processing applications are contemplated wherein variable rate source sampling, and accumulation and resolution of forward mapped point samples can be applied, ranging from 3-D graphics applications to applications wherein images recorded in a recording/storage environment are mapped to the arbitrary requirements of a display environment. |
| US07768521B2 |
Image processing apparatus and image processing method
Disclosed herein is an image processing apparatus, including: first storage means for storing data in a unit of a word; second storage means for storing data in a unit of a word, address information for managing writing and reading out of the data of a unit of a word and a correction flag which indicates, in a unit of a word, whether or not it is necessary to correct the data, in an associated relationship with each other; and supplying means for reading out and supplying the data of a unit of a word, corresponding address information and a corresponding correction flag stored in the second storage means to the first storage means; the first storage means referring to the address information to correct the data of a unit of a word corresponding to the correction flag to the data of a unit of a word. |
| US07768516B1 |
Image splitting to use multiple execution channels of a graphics processor to perform an operation on single-channel input
A method, system, and computer-readable storage medium are disclosed for performing an operation on single-channel input using a plurality of execution channels of a graphics processing unit (GPU). A single-channel input may be divided into a plurality of sub-inputs, wherein each of the plurality of sub-inputs comprises a portion of the single-channel input. Borders between the sub-inputs may overlap. Program instructions may be executed on the GPU to perform the operation. At least a subset of the program instructions may be executed on each of the plurality of execution channels in parallel for a corresponding one of the plurality of sub-inputs. In one embodiment, the single-channel input may comprise a single-channel input image for an image-processing operation. In one embodiment, the GPU may comprise four execution channels. |
| US07768513B2 |
Method of rendering text on an output device
A method of rendering text on an output device using a pre-developed image of a custom font. An image file defines an image of a custom developed character set. The custom character set may be developed off-line using graphics development tools. Associated character information enables the location of specific characters within the image. When a text character is output to a display or other output device, a custom font module locates the text character within the image and defines a subimage that contains the text character. The subimage is rendered upon the output device, thereby producing an image of the text character. |
| US07768512B1 |
System and method for rasterizing primitives using direct interpolation
A system and method for rendering a graphic primitive by linear or perspective interpolation from vertex points. An interpolation engine is employed to interpolate channel values along edges of the primitive to determine values along a scan line containing a selected point. The interpolation engine is then employed to interpolate along the scan line. Processing time may further be reduced by the use of an improved adder/subtractor as a component of the interpolation engine to reduce sequential steps and improve parallelism. |
| US07768510B2 |
Measurement device for measuring gray-to-gray response time
The present invention discloses a measurement device for measuring the gray-to-gray response time. The measurement device is capable of precisely measuring the gray-to-gray response time of an LCD. According to a video signal comprising a synchronous message, the measurement device obtains the initial time and the final time of each gray-to-gray response time interval in the transition of LCD luminance, so as to achieve synchronous measurement of the LCD gray-to-gray response time. |
| US07768507B2 |
Methods and apparatus for driving a display device
According to the present disclosure, a transmitter for transmitting control characters to a display device over an interface includes a transmitter portion configured to transmit a control character having a plurality of bit values to the display device. The transmitter also includes logic configured to determine values of the bits in the control character and construct a corresponding plurality of rebalancing control characters based on the determination of the values of the plurality of bits in the control character to have bit values selected such that the combination of the control character and rebalancing control character is DC balanced. As such, the transmitter provides DC balance correction to non-DC balanced control characters in such a way as to allow DVI and HDMI to operate properly on an AC-coupled connection. |
| US07768501B1 |
Method and system for touch screen keyboard and display space sharing
A method and system in a portable computer having a display screen for increasing portable computer compactness. Data is displayed initially within the display screen. The display screen is then partitioned into a touch-sensitive input area and a display area, wherein data input at the touch-sensitive input area may be simultaneously displayed in the display area, in response to a particular user input. A test is performed to detect if a user's hands are positioned at the touch-sensitive input area. A touch-sensitive pad is thereafter graphically displayed at the touch-sensitive input area within the display screen, in response to detecting a user's hands positioned at the touch-sensitive area, wherein a user may enter data that may be simultaneously displayed in the display area. An additional test may then be performed to detect if the user's hands are no longer positioned at the touch-sensitive input area. The touch-sensitive pad is subsequently concealed from view, in response to detecting if the user's hands are no longer positioned at the touch-sensitive input area. The touch-sensitive pad graphically displayed at the touch-sensitive input area within the display screen may be composed of a touch-sensitive keyboard, which may in and of itself be an ergonomic keyboard. |
| US07768500B2 |
Ergonomic pointing device
An input device for a computer is described that positions the user's hand in a more ergonomically desirable position, i.e., at an angle of about 45° to the work surface. In preferred embodiments, the input device accommodates either a user's left or right hand, and in either case, positions the hand in an ergonomically desirable position. In another embodiment, the length of the input device of the present invention is adjusted for the size of the user's hand. In further embodiments, the input device of the present invention provides a palm rest. Other desirable features included in preferred embodiments include lateral buttons that are positioned one above the other. |
| US07768498B2 |
Computer input device tracking six degrees of freedom
An input device with three-dimensional, six-degrees-of-freedom data input for a computer having a tracker with an array of tracking points defining a first axis and a second axis or plane is described. Light reflected from, or given off from the tracking points, is captured by a camera. From the two-dimensional images captured, three-dimensional data relating to the position and orientation of the input device may be obtained from the relative positions of the tracking points by a provided algorithm and lookup table. The use of one of the tracking points as an on-off indicator of the tracker's orientation towards or away from the camera greatly expands the use of such technology from limited hemispherical tracking to all-round, full-spherical tracking. In the preferred embodiment of the invention, tracking points on the input device which is in the form of a planar “T”-shape wand with a cross piece and a camera allow computer users to input natural swinging movements into a virtual environment for gaming or other three-dimensional applications. |
| US07768496B2 |
Methods and systems for image tonescale adjustment to compensate for a reduced source light power level
Embodiments of the present invention comprise systems, methods and devices for increasing the perceived brightness of an image. In some embodiments this increase compensates for a decrease in display light-source illumination. |
| US07768490B2 |
Common voltage compensation device, liquid crystal display, and driving method thereof
A common voltage compensation device suitable for a display panel of a liquid crystal display is provided. The common voltage compensation device includes a timing controller and a compensation circuit. The timing controller receives an image signal and generates control signals to the compensation circuit according to a determination mechanism. The compensation circuit sends a common voltage compensation signal to the display panel according to the control signals outputted from the timing controller in order to compensate the common voltage on the display panel. The determination mechanism performs an analysis of a gray scale distribution of a horizontal line signal of the image signal, and determines whether to compensate the common voltage according to an analysis result, and determines a polarity required to be compensated to perform the compensation when the compensation is needed. |
| US07768489B2 |
Method for driving a liquid crystal display
A method for driving a normal black type liquid crystal display (LCD) includes driving the LCD by applying uncompensated source signals corresponding to gray levels; recording first optimized common signal voltages (Vcom-opt1) of common signals corresponding with the gray levels; adjusting the source signal to drive the LCD so second optimized common signal voltages (Vcom-opt2) of common signals corresponding with the gray levels conform to the following conditions: (1) when the gray level is lower than a predetermined gray level, the Vcom-opt2 exceeds a predetermined voltage of the common signal and the absolute difference between the Vcom-opt2 and the predetermined voltage is less than or equal to that between the Vcom-opt1 and the predetermined voltage; and (2) when the gray level exceeds the predetermined gray level, the absolute difference between the Vcom-opt2 and the predetermined voltage is less than or equal to that between the Vcom-opt1 and the predetermined voltage. |
| US07768484B2 |
Amoled panel
An AMOLED panel includes an AMOLED pixel unit, a scan driving unit and a data driving unit. The scan driving unit is coupled to the AMOLED pixel unit. The data driving unit is coupled to the AMOLED pixel unit and a voltage source and includes a switch and a DC-to-AC converter. The switch has a first terminal coupled to the AMOLED pixel unit and a second terminal coupled to the voltage source. The DC-to-AC converter has n+1 bytes, wherein n is a positive integer. The DC-to-AC converter is coupled to a control terminal of the switch and outputs a variable voltage to turn on the switch to make the switch generate a data current. The DC-to-AC converter changes a magnitude of the variable voltage to control a magnitude of the data current. |
| US07768483B2 |
Pixels and display panels
A pixel and a display panel using the pixel are provided. In the pixel, a driving element provides a driving circuit according to a data signal and a reference voltage to drive a light-emitting element to emit light. The electrical difference of the driving elements due to the fabrication process thereof does not affect the brightness of the light-emitting elements. Moreover, unequal brightness resulted from the equivalent resistance of the power lines is also prevented. |
| US07768477B2 |
Plasma display apparatus and driving method of the same
In a plasma display apparatus and a method of driving the same which is driven by a driving signal having a reset period, an address period and a sustain period, a sustain pulse is applied during the sustain period, the sustain pulse including: an interval in which the sustain pulse rises from a ground voltage to a first voltage; an interval in which the first voltage is substantially constant for predetermined period of time; an interval in which the sustain pulse rises from the first voltage to a second voltage; and an interval in which the second voltage is substantially constant for a predetermined period of time. At least two discharges can be generated per a single sustain pulse by applying a sustain pulse rising and falling in two stages during one sustain period, and discharge efficiency and luminance can be improved by lengthening a light emission time by maintaining the light generated by a discharge for a predetermined time. |
| US07768473B2 |
Strap driven field mast
A portable telescopic mast assembly with positive retraction for raising and lowering an associated device includes an outer body and a plurality of mast sections slideably engaged with the outer body. A lifting cable is disposed between the plurality of mast sections. The lifting cable operatively connects the plurality of mast sections so as to urge one or more of the mast sections towards an extended position. The lifting cable includes a first end and a second end, the first end being secured to an inner most mast section of the plurality of mast sections. A retraction cable is disposed at least partially inside the outer body. The retraction cable includes a first end and a second end, the first end being secured to the inner most mast section. A winch is secured to the outer body. The winch includes a first output and a second output, the second end of the lifting cable operatively connected to the first output and the second end of the retraction cable operatively connected to the second output. |
| US07768472B2 |
Unobstrusive placement of wireless antenna for CE devices
An embodiment of the present invention includes a technique to attach a wireless antenna to a consumer electronics (CE) device. A removable bezel holds a display assembly of the CE device. An antenna attachment mechanism integrated to the removable bezel at a pre-determined location to allow connection to a radio frequency (RF) communication circuit internal to the CE device. The antenna attachment mechanism is adapted for attachment to a wireless antenna used in a wireless transmission. In another embodiment, a wireless antenna is integrated within the removable bezel at a pre-determined location. The wireless antenna is coupled to the RF communication circuit for a wireless transmission. In yet another embodiment, an antenna assembly is attached to the removable bezel at a pre-determined location. The antenna assembly has a wireless antenna coupled to the RF communication circuit for a wireless transmission. |
| US07768470B2 |
Ultra wideband antenna
An ultra wideband antenna (20) is disposed on a substrate (10). The substrate includes a first surface (101) and a second surface (102). The ultra wideband antenna includes a radiation body (22), a feeding portion (26), and a grounded portion (28). The radiation body disposed on the first surface is used for transceiving electromagnetic signals. The radiation body includes a semicircle-shaped metal portion (222) and a rectangle-shaped metal portion (224) and defines a slot (24) starting at an edge therein. The feeding portion is electronically connected to the radiation body for feeding signals to the radiation body. The grounded portion is disposed on the second surface. |
| US07768469B2 |
Low profile antenna for satellite communication
A low profile receiving and/or transmitting antenna includes an array of antenna elements that collect and coherently combine millimeter wave or other radiation. The antenna elements are physically configured so that radiation at a predetermined wavelength band impinging on the antenna at a particular angle of incidence is collected by the elements and collected in-phase. Two or more mechanical rotators may be disposed to alter the angle of incidence of incoming or outgoing radiation to match the particular angle of incidence. |
| US07768453B2 |
Dynamically correcting the calibration of a phased array antenna system in real time to compensate for changes of array temperature
Adjusting a calibrated phased array includes receiving conditions data describing conditions at a phased array. The phased array comprises antenna element sets, where an antenna element set comprises antenna elements and is associated with a calibration value. The following is performed for each antenna element set. A temperature value is established for an antenna element set according to the conditions data. A temperature-dependent correction value corresponding to the temperature value is established. A correction value is determined for the antenna element set according to the temperature-dependent correction value and the calibration value associated with the each antenna element set. At least one antenna element of the antenna element set is adjusted according to the correction value. |
| US07768451B2 |
Methods and apparatus for geometry extra-redundant almost fixed solutions
Methods and apparatus for providing high integrity probability of connect fix (PCF) in GPS navigation applications, such as precision approach and landing and airborne refueling. In an exemplary embodiment, an enlarged pull in region is used to compute protection levels. In an exemplary embodiment, geometric extra-redundancy is used to enhance PCF and PAF (probability of almost fixed). In an exemplary embodiment, geometric extra-redundancy almost fixed solutions provide superior accuracy and integrity for GPS navigation applications. |
| US07768448B2 |
Enhanced line-of-sight (LOS) processing for all-digital LOS processor
An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures. |
| US07768442B2 |
Interferometric signal processing
A method of error handling in a slope monitoring system that generates slope movement data from interferometric signal processing of radar images of the slope monitoring system. The error handling occurs in two steps. The movement data is corrected for changes in atmospheric conditions and disturbances are identified. It is convenient to mask the regions identified as disturbed in the display of the corrected movement data. Typical disturbances include short term disturbances, such as trucks, and long term disturbances, such as vegetation. |
| US07768433B2 |
Dynamic slew rate control based on a feedback signal
Techniques for enhancing the slew rate of an active circuit within a feedback circuit (such as a ΔΣ ADC) are described. In one design, a ΔΣ ADC includes an integrator, a slew rate enhancement circuit, and a control circuit. The integrator receives an input signal and provides an output signal. The slew rate enhancement circuit enhances the slew rate of the integrator based on a feedback signal in the ΔΣ ADC. The slew rate enhancement circuit may provide (i) a boost current for only certain values (e.g., the largest and smallest values) of the feedback signal or (ii) different amounts of boost current for different values of the feedback signal. In one design, the slew rate enhancement circuit includes at least one boost circuit coupled to the integrator. Each boost circuit provides a boost current to enhance the slew rate of the integrator when that boost circuit is enabled. |
| US07768429B2 |
Transmitting/receiving methods and systems for data with simultaneous switching noise reducing preambles
DC balance encoded data is transmitted by transmitting a preamble of dummy data that is configured to provide an intermediate number of bits of a given logic value that is at least one bit of the given logic value but less than a maximum number of bits of the given logic value in the DC balance encoded data, to thereby reduce the simultaneous switching noise that is caused by transmission of a first word of DC balance encoded data. The preamble may contain one or more words of fixed and/or variable dummy data. |
| US07768423B2 |
Telemetry transmitter optimization via inferred measured depth
A method whereby a downhole drilling transmission device that communicates to the surface automatically modifies its transmission parameters in order that it substantially improves its ability to adequately communicate with a surface receiver despite increasing signal attenuation between the two as the length of drillpipe increases. This utilizes a simple measure of localized downhole pressure that then relies upon a look-up table or similar that provides a correspondence between said pressure and measured depth. Such a look-up table or similar can be readily built by incorporating appropriate features of the planned well such as drilling fluid flow rate, drilling fluid density, drilling fluid viscosity, well profile, bottom hole assembly component geometry, drillpipe geometry, and indications as to whether the fluid is flowing or stationary.Upon determining the measured depth the tool then can attempt to modify or augment appropriate telemetry parameters in order to keep the signal received at surface within required parameters, thus offsetting the degradation due to increasing attenuation. |
| US07768420B2 |
Operation and control of wireless appliance networks
A wireless network that may include one or more access points, one or more wireless controllers and one or more appliances. The one or more access points include, or may be coupled with, a server location agent that operates to determine or estimate the locations of the one or more wireless controllers. Upon determining the location of the one or more wireless controllers, the server location agent may determine a proximity of one or more appliances to the wireless controllers and may cause the wireless controllers to display a customized user interface that may be configured based on proximity to one or more appliances as well as policies and/or historical data. In addition, the appliances in the user's proximity may be automatically switched on and controlled to serve the user. |
| US07768418B2 |
Power patch panel with guided MAC capability
A method and apparatus are provided for incorporating guided network cable Move/Add/Change (MAC) work order capability into a power patch panel. MAC work orders may be controlled and monitored using in-band signaling using, e.g., standard RJ-45 patch cords. Cable detection is performed at a port level on a real-time basis. Coordination of guided MAC operations may be performed by the patch panel, independently, or in conjunction with, or under the control of, a remote Network Management System. The patch panel may be in either an interconnect or cross-connect configuration. |
| US07768410B2 |
Leakage detection and compensation system
A flame sensing system having a flame rod, a signal generator, a signal measurement circuit, and a controller, where the frequency and/or amplitude of the excitation signal may be variable. The signal measurement circuit may include a bias circuitry that references the flame signal to a voltage, a capacitor that varies the filtration, an AC coupling capacitor, a current limiting resistor, and a low-pass filter. The system may determine the flame-sensing rod contamination, the stray capacitance of the flame sensing system, and compensate for stray capacitance in the flame sensing system. The flame model may include a circuit that simulates a flame in the presence of the sensing rod, and another circuit that simulates a contact surface between the flame and the sensing rod. |
| US07768404B2 |
System and method for optimizing resources in a supply chain using RFID and artificial intelligence
A system and method for optimizing resources in a supply chain and production line using RFID and artificial intelligence which can be adapted to any supply chain or product line, including warehouses, and which is able to optimize a plurality of tools/machinery or processing stations, a plurality of products and even personnel in real time by analyzing real time information about the entities and historic information stored in databases about optimum decisions taken in the past by the system. |
| US07768402B2 |
Method and system for reading and identifying RFID tag
A method and system for reading and identifying RFID tags of the invention is disclosed. The invention is capable of registering and storing information of a plurality of RFID tags attached to objects of the same group into a memory block of at least a specified RFID reader or RFID tag. The invention is also capable of enabling at least a specified RFID reader/tag in response to a first inquiry of an interrogator by transmitting each identification code of the plurality of RFID tags to the interrogator for acknowledgement. The method is capable of achieving the objective of reducing the overall communication time as the reader does not have to inquire one by one to the RFID tags to save the number of times of communication between the inquiry of the reader and the response of the RFID tags. In addition, the reading rate of the RFID system can be improved effectively since at least one of the RFID tags can function as a spokesman for those RFID tags hidden deeply inside a pile of the objects of the group. |
| US07768396B2 |
Monitoring beverage dispensing using pour event data and ring up data
A system and method for monitoring beverage dispensing from a container. Independently obtained data from a pour event and ring up are matched using a recipe database. The method involves receiving ring up data for a transaction of the beverage dispensing, determining one or more beverage brands from a selected drink recipe using the ring up data and matching the ring up data with at least one of a plurality of pour event data entries using the determined one or more beverage brands, wherein each of the plurality of pour event data entries is obtained independently of the ring up data. |
| US07768395B2 |
Brand mapping
A user uses a portable electronic device to select an image representative of a brand. In response to the user's selection of the image representative of the brand, the device automatically presents the user with an image of a map that indicates a current location of the device and shows one or more images representative of brand purchase sites where the selected brand may be accessed by the user. |
| US07768394B2 |
System and apparatus for integrated location detection and wireless communications
An apparatus, system and method are provided for an integrated location detection and wireless communication tracking node. The tracking node includes a housing, a wireless node located in the housing, and a tracking receiver located in the housing. The tracking receiver is coupled to the wireless node and the wireless node is operable to transmit a location signal received by the tracking receiver from a tracking device. The wireless node may include a wireless relay node that is operable to relay a radio frequency signal from a leaf node to one of a gateway and an intermediate node. |
| US07768393B2 |
System and method for asset tracking
A system and method for asset tracking utilizing a wireless device. An asset such as a vehicle can be equipped with a 3-axis geomagnetic sensor and an accelerometer in association with a remote control hardware component capable of responding to SMS (Short Message Service) command transmitted from the wireless device. As soon as the theft of the asset is detected, a “Theft in progress” SMS data can be transmitted from the wireless device to the remote device attached to the asset. The device then queries the geomagnetic sensor and the accelerometer at a pre-defined rate and transmits the X-Y-Z coordinates and acceleration values to the cell phone/computer via SMS at regular intervals. The device can also log the route of vehicle in a non-volatile memory which can be queried utilizing a “Request History” command. |
| US07768388B2 |
Methods and apparatus for providing notifications in a media system
A system to convey user alert messages is disclosed. The system may have a alert service coupled between alert providers and a number of households. After receiving in the alert service an alert message from an alert provider, the alert service may alter the alert message to identify the household designated to receive the alert message. The alert service sends a notification to a home media system within the household designated to receive the alert message. |
| US07768385B1 |
Vehicle brake lighting system
A system includes lights coupled to a vehicle power supply source. One light is located at the vehicle's rear window. Remaining lights are independently and simultaneously operable with the one light. A mechanism is included for determining whether the vehicle is parked. Another mechanism determines whether a vehicle brake pedal has been engaged beyond a threshold level while the vehicle is not parked. A further mechanism flashes the one light and is mated to the park determining mechanism for activating the one light when the vehicle is parked and the brake pedal is engaged. The flashing mechanism is coupled to the brake pedal pressure level determining mechanism for activating the one light when the vehicle is not parked and the brake pedal is engaged beyond the threshold level. The flashing mechanism is automatically reset to a non-operating mode when the brake pedal is disengaged during parked and non-parked conditions. |
| US07768380B2 |
Security system control for monitoring vehicular compartments
Security system and method for monitoring vehicular compartments includes at least one optical image receiving unit arranged to receive optical images of a compartment of the vehicle, e.g., from at least a portion of the face of a person located at a driver's station in a passenger compartment of the vehicle, and produce image signals therefrom and a processor including an electronic facial-recognition system coupled to the optical image receiving unit(s) responsive to the image signals and controllably coupled to the enabling system, and an electronic storage device coupled to the facial-recognition system to store a set of image signals. The facial-recognition system enables ignition of the vehicle system only if signals representative of select characteristics of a scanned face of the person derived from the image signals produced by the optical image receiving unit(s) match a member of a set of signals stored in the electronic storage device. Each member representative of select characteristics of the scanned face of an authorized operator. |
| US07768373B2 |
Common mode, differential mode three phase inductor
An inductor includes common mode and differential mode flux paths. The inductor comprises a first core having a first segment, a second segment extending from the first segment and a first bridge segment extending from the second segment; a first wiring arrangement at least partially disposed around the first segment; a second core having a third segment, a fourth segment extending from the third segment and a second bridge segment extending from the fourth segment; and a second wiring arrangement at least partially disposed around the third segment; wherein the first segment, second segment, third segment and fourth segment cooperate to promote the common mode flux path, and the first bridge segment and the second bridge segment cooperate to promote the differential mode flux path. |
| US07768368B2 |
Electromagnetic actuating apparatus
The invention relates to an electromagnetic actuating apparatus with an armature unit, which is guided axially in a housing and is capable of being moved by means of energizing a coil apparatus, contact plug means, which are held in an insulator unit, being associated with the coil apparatus, and an elongated ground contact of the contact plug means being electrically conductively connected to the housing, and the ground contact interacting electrically conductively at an engagement end which is opposite its free end with a yoke section, which is associated with the housing preferably at the front end, in such a way that, in a fitted state, a cutout formed in the engagement end in the ground contact engages over a projection of the yoke section and/or at least partially surrounds it. |
| US07768367B2 |
Circular magnetic switch
A circular magnetic switch comprises a circuit device and a ring. The circuit device is provided with a plurality of magnetic induction elements and the ring is provided with a plurality of circularly arranged magnets, so that the magnetic induction elements are able to sense the relatively positional changes of the magnets when the ring is turned. The circular magnetic switch is characterized in that: at least an anti-interference magnet is further provided between at least two magnets of the plurality of magnets and the polarity of two magnets is opposite to that of the anti-inference magnets that is provided between the two magnets. |
| US07768363B1 |
Inter-stage coupling with a transformer and parallel AC-coupling capacitor
An RF coupling circuit including a transformer and a parallel AC-coupling capacitor can advantageously ameliorate substantial attenuation of a signal, prevent destabilization of any feedback loop, and simplify the circuit design process. The AC-coupling capacitor can act as an “averager”, i.e. both the input and output sides of coupling circuit represent capacitances equal to the average of the input and the output capacitances. Thus, the inductors for tuning them out can become equal, thereby allowing a symmetric (or near symmetric) transformer to be used in the RF coupling circuit. When tuned properly, the transformer plus AC-coupling capacitor can also advantageously provide better in-band gain as well as frequency selectivity than other conventional coupling circuits. |
| US07768362B2 |
Comb polarizer suitable for millimeter band applications
There is provided a comb polarizer suitable for millimeter band applications including: a waveguide having an aperture side formed of two separable half waveguides, and a comb shaped conductive unit having a plurality of cogs interposed between two half waveguides for transforming a linear polarized signal to a circular polarized signal. |
| US07768353B2 |
Systems and methods for switching mode power amplifier control
Embodiments of the invention may provide for enhancement systems and methods for a power amplifier output control system. In an example embodiment, driver amplifier control may be provided in conjunction with power amplifier control to improve the power efficiency and/or dynamic range of the transmitter system. Furthermore, control over the driver amplifier may allow for relaxed power control slope, which may lessens the burden of digital to analog converters (DACs) in transmitter systems such as cellular transmitter systems. Also, systems and methods in accordance with example embodiments of the invention may provide a less sensitive solution to operational environment variations such as temperature, battery power voltage and implementation IC process. |
| US07768351B2 |
Variable gain current input amplifier and method
Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin−). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor. |
| US07768348B2 |
High-frequency circuit
The potential of a source terminal of a transistor is fixed; a load is connected to a drain terminal of the transistor; and an input signal is received by a gate terminal of the transistor. A series circuit including an inductor and a capacitor connected in series is provided between a connection point of the drain terminal of the transistor and the load and an output terminal of a high-frequency circuit. A band-pass filter having a prescribed characteristic is configured by an output equivalent circuit expressing an output impedance of the transistor, the load, and the series circuit. |
| US07768336B2 |
Level shifting circuit
A level shifting circuit includes a first level shifting unit including a plurality of signal transfer units; a first operation control unit inactivating some of signal transfer units of the first level shifting unit in response to a clamping signal; a second level shifting unit connected in parallel to the first level shifting unit and comprising a plurality of signal transfer units; a second operation control unit inactivating some of signal transfer units of the second level shifting unit in response to the clamping signal; a signal output unit connected to output ends of the first and second level shifting units; and a clamping unit fixing the output ends of the first and second level shifting units to a predetermined voltage level in response to the clamping signal. |
| US07768333B2 |
Apparatus and method of generating reference clock for DLL circuit
An apparatus for generating a reference clock for a DLL circuit includes a buffering unit configured to buffer an external clock so as to generate a first reference clock and a second reference clock, and to invert the second reference clock so as to generate a negative second reference clock. A duty cycle compensating unit generates a reference clock from the first reference clock and the negative second reference clock. |
| US07768332B2 |
Waveform generation apparatus, setup cycle correction method and semiconductor test apparatus
Spurious noise that occurs in the vicinity of a carrier can be removed even when a high-resolution cycle is set, thereby realizing low jitters in a high-precision variable clock signal. Cycle data that is set by a pattern generator in a waveform generation apparatus (a semiconductor test apparatus) is corrected in such a manner that spurious noise that occurs in a carrier of a high-precision variable clock is produced at a position far from the carrier in terms of frequency. As a result, the spurious noise can be assuredly removed by a phase-locked loop circuit, thereby realizing low jitters in the high-precision variable clock signal. |
| US07768329B2 |
Semiconductor device
A shift register capable of supplying only a necessary clock signal to a necessary unit register with simple constitution. A semiconductor device is provided with a shift register in which a plurality of stages of unit registers is connected, in which the unit register comprises a flip-flop circuit, a first switch and a second switch, a first clock signal line is electrically connected to the flip-flop circuit through the first switch, a second clock signal line is electrically connected to the flip-flop circuit through the second switch, the first switch is controlled to be on/off by an output signal from the flip-flop circuit, and the second switch is controlled to be on/off by an input signal to the flip-flop circuit. |
| US07768326B2 |
Wide range operational charge pump circuit
A charge pump that includes cascode transistors and current mirror circuitry to form a folded cascode structure that isolates the control inputs from the charge pump output and also increases the range of the output. The charge pump includes inputs to receive UP and DN (down) control signals and provides an output current that is based on the control signals. The charge pump may be configured as either a differential or non-differential device. The switching transistors that receive the control signals may use a lower voltage than the current source transistors in the charge pump In differential-type embodiments of the present charge pump, an amplifier can be used to control current source transistors based on differences between the output voltages of the charge pump, thereby adjusting the current flowing through the current source transistors and driving the average of the output voltages to a desired common mode voltage. |
| US07768318B2 |
Detection of a disturbance in the state of an electronic circuit flip-flop
A method and a circuit for detecting a disturbance of a state of at least one first flip-flop from a group of several first flip-flops of an electronic circuit, wherein: the respective outputs of the first flip-flops in the group are, independently from their functional purpose, combined to provide a signal and its inverse, triggering two second flip-flops having data inputs forced to a same state, the respective outputs of the second flip-flops being combined to provide the result of the detection; and a pulse signal comprising a pulse at least for each triggering edge of one of the first flip-flops in the group initializes the second flip-flops. |
| US07768317B1 |
Radiation-tolerant flash-based FPGA memory cells
A radiation-tolerant flash-based FPGA switching element includes a plurality of memory cells each having a memory transistor and a switch transistor sharing a floating gate. Four such memory cells are combined such that two sets of two switch transistors are wired in series and the two sets of series-wired switch transistors are also wired in parallel. The four memory transistors associated with the series-parallel combination of switch transistors are all programmed to the same on or off state. The series combination prevents an “on” radiation-hit fault to one of the floating gates from creating a false connection and the parallel combination prevents an “off” radiation-hit fault to one of the floating gates from creating a false open circuit. |
| US07768316B2 |
Decoder circuit, decoding method, output circuit, electro-optical device, and electronic instrument
A decoder circuit comprises: first decoder section that decodes an m-bit address signal portion of an (m+n)-bit address signal; and a second decoder section that decodes an n-bit address signal portion of the (m+n)-bit address signal, the first decoder section including a first AND operation circuit section that outputs signals that indicate a decoding result of the m-bit address signal portion, and a second AND operation circuit section that outputs signals that indicate a decoding result of part of the m-bit address signal portion, and the second decoder section including a third AND operation circuit section that outputs signals that indicate a decoding result of the n-bit address signal portion, and a fourth AND operation circuit section that outputs signals that indicate a decoding result of part of the n-bit address signal portion. |
| US07768310B2 |
Semiconductor device, method of switching drive capability of the semiconductor device, and system including semiconductor devices
A semiconductor device connected to other semiconductor device, includes a control portion which controls a drive capability for the other semiconductor device based on control information for the other semiconductor device. |
| US07768306B2 |
Low to high voltage conversion output driver
A low to high voltage conversion output driver. The low to high voltage conversion output driver has an output coupled to a first fixed voltage via a load device and comprises a current source, a low voltage transistor, and a high voltage transistor. The current source has one end coupled to a second fixed voltage. The low voltage transistor has a first terminal coupled to the other end of the current source, a second terminal receiving a low voltage data signal, and a third terminal. The high voltage transistor has a first terminal coupled to the third terminal of the low voltage transistor, a second terminal coupled to a bias source, and a third terminal coupled to the output. |
| US07768305B2 |
Quad state to two state interface circuitry with clock input
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring interconnects between memories and logic elements results in higher speed, higher density, and lower power integrated circuit designs. |
| US07768303B2 |
Apparatus, circuit and method of monitoring performance
An apparatus includes a first sequential circuit which captures an input signal according to a first clock signal, a second sequential circuit which captures the input signal according to a second clock signal and outputs the captured input signal to a logic circuit, the second clock signal being modulated so that a period of the second clock signal is shorter than that of the first clock signal, a third sequential circuit which captures an output signal of the logic circuit according to the second clock signal, and a verification circuit which verifies whether an output signal of the first sequential circuit and an output signal of the third sequential circuit match with each other. |
| US07768302B2 |
Scalable non-blocking switching network for programmable logic
A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits. |
| US07768301B2 |
Reconfigurable integrated circuits with scalable architecture including a plurality of special function elements
An integrated circuit (IC) includes a number of function blocks (FB), of which at least one is re-configurable. Each of the FBs may be a reconfigurable function or a non-reconfigurable function or recursively expanded with additional “nested” function blocks. The IC further includes a number of input pins, a number of output pins, an adder, and a number of crossbar devices. The elements, at least at the IC level, are coupled in a manner such that all input signals are provided to the FBs through a first subset of the crossbar devices, all internal signals are routed from one FB to another FB through a second subset of crossbar devices, and all output signals are routed from the FBs to the output pins through a third subset of crossbar devices. To increase routability and speed each of the crossbar device output has a single fanout. Additionally, each of the crossbar devices may provide only one input to each other crossbar device. In some embodiments, an FB may include special function elements, and optionally, (cascaded) selection paths. Other embodiments may also be described. |
| US07768298B2 |
Reference voltage generators for reducing and/or eliminating termination mismatch
A system including a plurality of transmission lines, a transmitter outputting respective signals to each of the plurality of transmission lines, a receiver receiving each of the plurality of signals via respective transmission lines, the receiver including a connection path connected to a termination voltage, a plurality of termination circuits distributed along the connection path, each termination circuit receiving a unique termination voltage from the connection path, receiving a respective signal and outputting a terminated input signal, a reference voltage generator including multiple reference voltage generator units connected to a common voltage, each reference voltage generator unit uniquely receiving at least one unique termination voltage and outputting a reference voltage, and a plurality of data input buffers receiving respective signals and an appropriate reference voltage of the multiple reference voltages output from the reference voltage generator. |
| US07768293B1 |
Authentication for information provided to an integrated circuit
A system for authentication of information provided to an integrated circuit, a method for rights management of an integrated circuit, and a method for configuring a programmable logic device are described. A memory is coupled to a programmable logic device. The memory includes an array of memory cells and storage devices. The storage devices provide a first storage space and a second storage space. The first storage space is for storing a first identifier. The second storage space is for storing a second identifier, which is a transformation of the first identifier. The array of memory cells is for storing configuration information to configure programmable logic of the programmable logic device. The configuration information includes authentication logic information. |
| US07768285B2 |
Probe card for semiconductor IC test and method of manufacturing the same
Provided is a probe card for semiconductor IC test on one principal surface of which are formed a plurality of probe electrodes, such as bump electrodes (5), and which has, in a peripheral portion thereof, a thin film sheet (9) fixed to a support, such as a ceramics ring (7). A local tension-changed portion (12) is formed in the thin film sheet (9) fixed to the ceramics ring (7) so that a tensile strain is generated, and the plurality of bump electrodes (5) are arranged in prescribed positions that connect electrically to electrodes of each semiconductor IC element of the semiconductor wafer. The tensile strain of the thin film sheet (9) is changed positively and in a sustained manner, whereby the bump electrodes (5) are rearranged in desired positions. |
| US07768283B1 |
Universal socketless test fixture
A universal socketless integrated circuit (IC) electrical test fixture is provided. The test fixture is made up of a probing platform to accept and heatsink an IC. The IC has electrical contacts formed on a bottom surface in an array of m rows, where each row includes n, or less contacts. A probe arm includes p probe pins, where p is greater than, or equal to n. A clamping mechanism mechanically interfaces the probe arm probe pins to a row of IC contacts under test. An electrical measurement device has a first interface connected to the p probe pins of the probe arm to measure electrical characteristics associated with the IC contacts under test. The probe arm, clamping mechanism, and probe platform work in cooperation to electrically interface any row of the IC contacts with the electrical measurement device. |
| US07768280B1 |
Apparatus for a low-cost semiconductor test interface system
A system for testing a device under test (DUT), in which electrical coupling among a module board, a low profile connector, and, a DIB is established by applying a pressure on the module board toward the DUT, is provided. The system includes a test head bracket secured inside a test head, the test head bracket includes the module board having a first section including a plurality of connectors to couple a test analyzer to the module board, a second section including a plurality of contacts pads to electrically couple the module board to the DUT, and, a flexible board to enable the first section to be placed at an angle with respect to the second section. The test head bracket also includes a module board stiffener mechanically securing the first section and the second section to the test head and the low profile connector electrically couples the module board to the DUT. |
| US07768275B2 |
Method and apparatus for characterising a three phase transformer using a single phase power supply
A method and apparatus for characterizing a three phase transformer (3) using a single phase power supply (1). Pairs of input terminals (H0-H3) of the transformer are sequentially energized for each energization and the voltage between pairs of output terminals (x0-x3) of the transformer are measured. Measured voltages are processed in order to characterize the winding configuration of the transformer. Either simultaneously or subsequently the presence of neutrals on the primary and/or secondary side of the transformer are identified to enable the winding configuration to be further characterized. Subsequently any phase displacement of the transformer is determined. The apparatus comprises means (2) for selectively applying a single phase power supply (1) to pairs of terminals (H0-H3) on the transformer (3) and for measuring voltages between pairs of terminals (x0-x3) of the transformer and for measuring phase difference between the primary and secondary sides of the transformer all under automatic control of a control means (13) which includes a processing means to process measured voltages and phase differences in order to characterize the transformer. |
| US07768274B2 |
Voltage tolerance measuring apparatus for motherboard
A voltage tolerance measuring apparatus configured to measure voltage tolerance of a motherboard includes a first connector configured to connect with a power connector of a computer power supply, a second connector configured to connect with a power connector of the motherboard, and a measuring circuit having an adjustable direct current (DC) power supply and a switch circuit. The adjustable DC power supply is connected to power pins of the second connector via the switch circuit. The switch circuit is connected to a power-on pin of the second connector. When the switch circuit receives a power-on signal of the motherboard via the power-on pin of the second connector, the switch circuit controls the adjustable DC power supply to supply power to the power pins of the second connector. |
| US07768270B2 |
In-pipe coating integrity monitor for very long pipes
Systems, methods and program products related to a tether free pigable inspection tool capable of detecting holidays and able to read and store non-conductive internal coating thickness values in very long conductive pipes, along with distance values for further off-line analysis, are provided. The inspection tool includes a plurality of thickness probes, a data storage unit, a control unit, a plurality of navigation wheels and a holiday detector that uses an electrical conductive medium, such as a gas or fluid, as the ground connection. A closed loop configuration is adopted allowing the system to autocorrect itself for different coating thicknesses along the pipe. |
| US07768268B2 |
Verification of a ground connection fabrication process for ESD resistors in magnetic heads
Test methods and components are disclosed for testing the quality of the ground connection fabrication process for ESD shunt resistors in magnetic heads. A wafer is populated with one or more test components along with magnetic heads. The test components are fabricated with ESD shunt resistor ground connections created by the same or similar process used to fabricate the ESD shunt resistor ground connections in magnetic heads on the wafer. The resistance of the test component ground connections may then be measured in order to determine the quality of the ground connections formed by the fabrication process. The quality of the ground connection fabrication process may then be determined based on the measured resistance of the test components. |
| US07768264B1 |
Method and apparatus for MR image reconstruction using correlation values
A system and method for parallel imaging is disclosed that generates linear combination coefficient weights by solving systems of linear equations formulated with correlation values. An MRI apparatus includes a computer programmed to acquire MR data from an imaging volume for a plurality of encoding locations using an array of RF receiver coils. Correlation values are calculated from the MR data. From these calculated correlation values, synthesis weights are generated. An image is then reconstructed based on an application of the synthesis weights to at least a portion of the MR data acquired from the array of RF receiver coils. |
| US07768262B2 |
Continuous wave nuclear quadrupole resonance spectrometer
Apparatus and methods for locating a nuclear quadrupole resonance are described. In an example method, a search frequency is adjusted using a blind search until a resonance absorption of an analyte is detected, and then an extremum seeking search to be used to locate an extremum frequency. |
| US07768261B2 |
Apparatus and method for image alignment for combined positron emission tomography (PET) and magnetic resonance imaging (MRI) scanner
A phantom and method are provided for co-registering a magnetic resonance image and a nuclear medical image. The phantom includes a first housing defining a first chamber configured to receive a magnetic resonance material upon which magnetic resonance imaging can be performed in order to produce the magnetic resonance image. The phantom also includes three or more second housings configured to be attached to the first housing, where the second housings each define a second chamber configured to receive a radioactive material upon which nuclear imaging can be performed in order to produce the nuclear medical image and upon which the magnetic imaging can be performed in order to produce the magnetic resonance image. The first chamber has a volumetric capacity that is larger than a volumetric capacity of each second chamber. |
| US07768260B2 |
Methods for identification and quantification of multicomponent-fluid and estimating fluid gas/ oil ratio from NMR logs
A method for determining a proportion of a hydrocarbon constituent in a mixture including at least one hydrocarbon, includes determining at least one nuclear magnetic resonance (NMR) property for at least one hydrocarbon constituent in the mixture; correlating an NMR response for the property for each hydrocarbon constituent in the mixture; and from the correlating, calculating the proportion of at least the constituent. A computer program product is also provided. |
| US07768259B2 |
Device for non-destructive eddy current inspection of a hole formed in a conductive part
Using eddy currents to inspect a hole that is possibly not rectilinear and/or of section that is not circular. The inspection device comprises a stick shaped and dimensioned to be capable of being engaged in said hole, at least one arm hinged to a support fastened to one end of the stick, an eddy current sensor being embedded in said arm, and resilient means for urging the arm outwards against the inside surface of the hole. |
| US07768257B2 |
Systems and methods for determining the position of an electrical solenoid
Provided herein are systems and methods which use the solenoid itself to sense the position of the armature within the solenoid, and therefore to determine the position of the solenoid's armature, and or any related devices whose movement is dependent on the armature's movement. Specifically, a system in which the change in self-induction that occurs when the armature moves relative to the solenoid coil is used to detect the location of the armature. |
| US07768254B1 |
Server power measurement
The subject matter of this specification can be embodied in, among other things, a system that includes a computer device. The computer device includes a power supply and a component that receives power from the power supply through a first electrical connection. The system includes a measurement adapter for measuring an electrical property of the first electrical connection. The measurement adapter is interposed within the first electrical connection between the power supply and the component. The measurement adapter is configured to draw power from a second electrical connection that is different from the first electrical connection. The measurement adapter includes a sensor for measuring the electrical property of the first electrical connection. |
| US07768251B2 |
Superconducting coil testing
A method of testing a superconducting coil path formed in a layer of superconducting material. The material is provided on a former (6) having a substantially curved surface. The method comprises the step of scanning the layer to detect defects in the layer. |
| US07768249B2 |
Magnetic indexer for high accuracy hole drilling
A magnetic indexer for locating a device producing a magnetic field in a blind or inaccessible position of a work piece. A magnet is initially placed on a first side of the work piece such that a magnetic field produced by the magnet extends through the work piece and substantially perpendicular to a surface of the work piece. A device comprising a plurality of probes for sensing magnetic fields is then positioned over a second surface of the work piece. The probes are then moved over the second surface to determine the location of the axis of the magnet via the strength of the sensed magnetic field. Once the position of the axis of the magnet is determined, the work surface is either marked or worked on through the platform on which the probes are positioned. In particular, a hole may be accurately drilled or otherwise formed directly over the magnet even when the first surface of the work piece cannot be seen. Additionally, the present invention allows a very accurate positioning of a work tool on the second surface without the need to first visualize the first surface of the work piece. |
| US07768246B2 |
Output ripple control circuit and method for a PWM system
An output ripple control circuit and method for a PWM system uses a hysteresis threshold to clamp the output ripple of the PWM system such that the output ripple will not vary with the dc level of the output voltage, and therefore the output ripple control may be combined into any main loop technologies. |
| US07768244B2 |
Power-maximizing electrical energy generation system
An electrical energy generation system comprising: a plurality of photovoltaic generators connected in parallel and connected to a common load via respective DC voltage converters; and a regulator configured to vary the transconductances of said respective voltage converters to maximize the power generated by said current generators; wherein: said generators are also connected to a common input of an additional voltage converter the output of which is connected to said common load; and said regulator is also configured to vary the transconductance of said additional voltage converter to maximize the power generated by said current generators. |
| US07768240B2 |
Power generator
A power generator includes a magnetic pole rotor in which a plurality of N magnetic pole cores and S magnetic pole cores are arranged alternately at regular intervals and that is rotatably supported, stator coils that oppose the magnetic pole rotor and are wound round pole portions of poles of stator poles so as to generate AC power, full-wave rectifying circuits 18 for respective stator coils, and smoothing circuits that are connected to the output sides of the respective full-wave rectifying circuits. The power generator is so structured as to convert multiphase AC generated electric power into DC electric power. Further, line ends of positive (+) poles at the output side of the smoothing circuits are connected to the input side of rectifiers that make only current in the forward direction pass through, and the output side (+) line ends of the rectifiers are connected to a (+) combination line. |
| US07768238B2 |
System and method for remote monitoring of battery condition
A battery monitoring system may be configured to interface with a first battery monitoring unit and a second battery monitoring unit. The first battery monitoring unit may be configured to output data in a first format. The second battery monitoring unit may be configured to output data in a second format, the second format being different than the first format. The battery monitoring system may include a first polling agent, the first polling agent may be configured to receive data from the first battery monitoring unit and normalize the data into a predetermined data format and store the data in a database. The battery monitoring system may also include a second polling agent. The second polling agent may be configured to receive data from the second battery monitoring unit and normalize the data into the predetermined data format and store the data in a database. Furthermore, the battery monitoring system may be configured to output data associated with the condition of a respective battery unit coupled to at least the first battery monitoring unit and the second battery monitoring unit. |
| US07768234B2 |
System and method for automatically synchronizing and acquiring content for battery powered devices
Various synchronization and content acquisition tasks able to be performed by a portable device are governed by reference to a budget. In operation, the budget may be adjusted as a function of a state of a battery associated with the portable device, as a function of one more file sizes associated with content to be acquired, as a function of a data transfer rate, and/or as a function of a temperature associated with the portable device. A filter may also be provided for use in determining which content the portable device will acquire. |
| US07768231B2 |
Battery pack
Disclosed herein is a battery pack wherein ultrasonic welding is performed at side walls extending from an upper case and a lower case, each of the side walls having a predetermined thickness, and a film-shaped label is formed at the upper surface and/or the lower surface of the case, whereby the coupling force due to the ultrasonic welding is very large although the thickness is very small, the structural stability against being dropped or external impacts is high, and interface area of the coupling regions is large, with the result that the attachment of any label for increasing the coupling force and preventing the introduction of foreign matters is not necessary. |
| US07768230B2 |
Pressure relief valve for a battery charger
A battery charger (10) comprising a housing (15) enclosing battery charging electronics (11), an interface (12) connectable to a mains outlet, and a charging current output interface. An aperture (71) is formed in a wall (75) of the housing, and a pressure relief valve (90) is arranged in said aperture, functioning to open and evacuate gas from the interior of the housing to the exterior of the housing when the pressure in the housing exceeds a pressure limit relative the exterior of the housing. In one embodiment, a bushing (90) for a cable (80) interconnecting the battery charging electronics (11) and the charging current output interface acts as the valve. |
| US07768228B2 |
Method and system for converting DC power to AC power
Methods and systems for converting direct current (DC) power to alternating current (AC) power are provided. A first phase of the AC power is generated based on a first carrier signal. A second phase of the AC power is generated based on a second carrier signal. |
| US07768225B2 |
Servo control system for movable body, and laser drilling machine
A difference between each position command data outputted in a form of a step signal from a high-level controller and its corresponding detected position data of a movable body is integrated by an integral compensator to position the movable body. Assuming, for example, that the movable body is a steerable mirror, digital filters are arranged to compensate the value of an initial state of an angular displacement and the value of an initial state of an angular velocity, respectively, and respective impulse responses of the digital filters as additional input elements are added to an output terminal of the integral compensator. For higher effectiveness, internal state variables of the digital filters can desirably be cleared to zero whenever an angle (position) command data is received. |
| US07768220B2 |
Harmonic torque ripple reduction at low motor speeds
Methods and systems are provided for reducing torque ripple in an electric motor. A method comprises receiving a torque command and determining a cancellation current command based on the torque command. The method further comprises generating a harmonic cancellation command based on the cancellation current command, wherein the harmonic cancellation command compensates for a phase shift and an attenuation introduced by a current regulated control module coupled to an inverter coupled to the electric motor. The method further comprises providing the harmonic cancellation command to the current regulated control module, wherein the current regulated control module is configured to control the inverter in response to the harmonic cancellation command and the torque command. |
| US07768217B2 |
Circuit and method for reducing east-west geometry mismatch between the top and bottom of a raster display
The present disclosure describes a technique for reducing east-west geometry mismatch between the top and bottom of a raster display. This is accomplished by generating a horizontal correction signal that does not have any discontinuities. Since there are no discontinuities in the horizontal correction signal, the horizontal deflection current signal will not be distorted. As a result, there will be no east-west geometry mismatch between the top and bottom of the raster display. |
| US07768214B2 |
Step-up/down regulator circuit and liquid crystal display device incorporating it
A step-up/step-down regulator circuit wherein a switch has a terminal connected to an end of an inductor, another terminal grounded, and a control terminal connected to an end of a switch. In this way, performing an open/close control of the switch can indirectly perform an open/close control of the switch, thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized. |
| US07768211B2 |
Method and circuit arrangement for operating a high-pressure gas discharge lamp
A description is given of a method and a circuit arrangement for operating a high-pressure gas discharge lamp with a lamp current superposed with first current pulses, in particular in a system for the time-sequential production of (primary) colors and possibly white segments, from which an image to be displayed is synthesized, in which, in order to change or correct color and/or brightness properties of the image, the first current pulses are adjusted with regard to their amplitude and/or temporal length and/or temporal position relative to the production of the colors and/or white segments. A description is also given of a projection system comprising such a circuit arrangement. |
| US07768205B2 |
Plasma display panel and method of manufacturing the same
A plasma display panel (PDP) includes a front substrate, a rear substrate facing the front substrate, barrier ribs between the front and rear substrates to define a plurality of discharge cells, photoluminescent material in the discharge cells, first electrodes on the front substrate along a first direction, second electrodes on the rear substrate and extending in a second direction crossing the first direction, at least one dielectric layer on the rear substrate, and a white pigment layer on the substrate. |
| US07768203B2 |
Plasma display panel including black projections
A plasma display panel may include first and second substrates facing each other and spaced apart from each other, barrier ribs between the first and second substrates, the barrier ribs defining discharge cells to define discharge and non-discharge regions, address electrodes extending in a first direction in respect to the discharge cells, and first and second electrodes formed on the second substrate and extending in a second direction intersecting the first direction, where at least one of the first and second electrodes includes black projections extending from the discharge region to the non-discharge region. |
| US07768202B2 |
Plasma display device including a chassis member having a plurality of divided base metal plates
A plasma display device includes a plasma display panel 11 that has a front substrate including a plurality of display electrodes arranged thereon and a rear substrate having data electrodes arranged thereon to cross the display electrodes, the front substrate and the rear substrate facing each other so as to form a discharge space, and chassis member 20 that holds plasma display panel 11 on a front side and has a driving circuit block for driving plasma display panel 11 on a rear side. Chassis member 20 has base plate 36 that is divided into a plurality of base metal plates 36a, 36b, and 36c, to which plasma display panel 11 is attached, and metal plates 37 and 38 that couple the plurality of base metal plates 36a, 36b, and 36c together. |
| US07768200B2 |
Plasma display panel having black matrices
The present invention relates to a plasma display panel. The plasma display panel includes black matrices formed in a front substrate, and first barrier ribs, which are formed opposite to the black matrices on a rear substrate and partition pixel cells. The first barrier ribs have a width wider than that of the black matrices. Even if misalignment occurs during a process of adhering substrates, the black matrices do not protrude into discharge spaces. Therefore, the defective ratio can be lowered and the picture quality can be improved. |
| US07768199B2 |
Plasma display-panel comprising a reduced-section discharge expansion zone
Display panel comprising two plates, separated by a gas-filled space partitioned by separating elements forming an array of barrier ribs, and arrays of coplanar sustain electrodes and address electrodes; with each cell subdivided into a trigger zone at each of the intersections of an address electrode with a sustain electrode and into at least one coplanar discharge expansion zone that extends between the trigger zones, the array of barrier ribs is designed so that, in each cell, each coplanar expansion zone has a width that is less than the width of all the trigger zones.By applying a method of driving the sustain discharges in the display panel by matrix triggering, the luminous efficiency is very substantially improved. |
| US07768198B2 |
Organic electroluminescent light source
An electroluminescent light source having a substrate (1), a layer structure applied on the substrate (1) for emitting light (10) at least on the other side from the substrate, having at least one electrode as an anode (3), at least one electrode as a cathode (4) and at least one organic electroluminescent layer (2) lying between them, the electrode (4) on the other side from the substrate being at least partially transparent, and an at least partially transparent encapsulation device (5) for forming a closed volume (6) around the layer structure, which is filled with a dielectric liquid (11) that is substantially chemically inert with respect to the layer structure and which contains particles (12), in particular of a non-absorbent material, for scattering light, the density of which is selected so that the particles (12) are in the suspended state in the dielectric liquid (11). |
| US07768195B2 |
Organic electroluminescent device with improved luminous efficiency
An organic electroluminescent device (20) including an anode (1), a first emitting layer (3), a carrier barrier layer (4), a second emitting layer (5), and a cathode (7) stacked in that order. The first emitting layer (3) is formed of a hole transporting material, and the second emitting layer (5) is formed of an electron transporting material. The affinity level of the carrier barrier layer (4) is smaller than the affinity level of the second emitting layer (5) in an amount of 0.2 eV or more, and the ionization potential (Ie1) of the carrier barrier layer (4) and the ionization potential (Ih1) of the first emitting layer (3) satisfy Ie1 |
| US07768192B2 |
Lighting device and lighting method
A lighting device comprising sources of visible light comprising solid state light emitters and/or luminescent materials emitting three or four different hues. A first group of the sources, when illuminated, emit light of two hues which, if combined, would produce illumination having coordinates within an area on a 1931 CIE Chromaticity Diagram defined by points having coordinates: 0.59, 0.24; 0.40, 0.50; 0.24, 0.53; 0.17, 0.25; and 0.30, 0.12. A second group of the sources is of an additional hue. Mixing light from the first and second groups produces illumination within ten MacAdam ellipses of the blackbody locus. Also, a lighting device comprising a white light source having a CRI of 75 or less and at least one solid state light emitters and/or luminescent material. Also, methods of lighting. |
| US07768190B2 |
Electron emission display
An electron emission display includes first and second substrates facing each other and having a long-axis and a short-axis, first electrodes arranged on the first substrates, second electrodes arranged to intersect the first electrodes while maintaining electrical insulation from the first electrodes, electron emission regions electrically connected to one of the first and second electrodes, and phosphor layers formed on a surface of the second substrate. Intersected regions of the first and second electrodes are disposed at a predetermined angle to either the long-axis or the short-axis. |
| US07768189B2 |
White LEDs with tunable CRI
A method for the manufacturing of white LEDs is proposed, which can achieve a tunable color rendering index (CRI) or luminosity through the use of at least two phosphor composition layers of essentially the same emission color coordinates, each composition including at least one individual phosphor compound. The method allows to optimize the devices for CRI at a given minimal luminosity requirement, or vice versa. |
| US07768186B2 |
Fluorescent lamp and backlight unit using the same, and method of driving the backlight unit
A fluorescent lamp includes an external electrode and an internal electrode provided at opposite ends of a fluorescent tube. A power conductor may connect to the internal electrode extend outside the tube to provide a connection point for the internal electrode. The tube may include an internal support element at a first end of the tube and a substantially self supporting second end of the tube. A method for assembling a backlight includes obtaining a fluorescent lamp with an external electrode at a first end of a tube, an internal electrode at a second end of the tube opposite the first end, and an internal support element at the second end of the tube. The first end of the tube may be substantially self supporting. The method also connects first and second drive connectors to the first and second ends of the tube. |
| US07768183B2 |
Extension spark plug
An extension-type spark plug (10) is disclosed for igniting the air-fuel mixture in an internal combustion engine. The spark plug (10) includes an installation conduit (12), a contact button (34), an electrode extension (20), a firing electrode (60), a ground plate (66), a sleeve insulator (22), an upper insulator (90) and a lower insulator (50). The electrode extension (20) is axially aligned with and in communication with the firing electrode (60). The ground plate (66) is proximate the firing electrode (60) to define a spark gap between the firing electrode (60) and a first end of the ground plate (66). The sleeve insulator (22) surrounds the electrode extension (20). The upper insulator (90) surrounds an upper portion of the electrode extension (20) and is in contact with the sleeve insulator (22). The lower insulator (50) surrounds the lower portion of the electrode extension (20) and is in contact with the sleeve insulator (22). |
| US07768182B2 |
Flat display apparatus
An optical filter 17 is attached to the display screen surface of a flat display panel 3 of a flat display apparatus. The optical filter 17 is constituted of a lamination of an electromagnetic-wave blocking sheet 17A, an infrared-radiation absorbing and color-tone correcting sheet 17B and an ambient light antireflective sheet 17C. |
| US07768180B2 |
Enclosure for housing a plurality of pixels of a graphical display
An enclosure is provided for housing pixels of a graphical display. The enclosure provides one or more laminar structures at a first surface of the enclosure. The laminar structure may be made up of a first material of a predetermined thickness at the first surface and a second material in sufficiently close proximity with the first material to allow heat conduction. The second material preferably has a thermal conductivity greater than the thermal conductivity of the first material. Thermal conductors are provided in or attached to the second material in the laminar structure to conduct heat to a second surface of the enclosure. The first material may be, for example, a polymer. The second material may be, for example, a heat wick, a metal mesh or heat pipes. The second surface may be cooled by an air stream, which may also reduce humidity at the surface. |
| US07768172B2 |
Permanent magnet type electric rotary machine and compressor using the same
A permanent magnet type electric rotary machine includes a stator including a stator core having teeth and slots, and a rotor provided with permanent magnets as magnet poles in a rotor core. A pole core portion which between each of the permanent magnets and an outer surface of the rotor core is provided with a plurality of pole slits. A region of the pole core portion is defined by concave portions provided on q-axes to be interpolars on both sides of the pole core portion, and thereby configured that a gap between the outer surface on the q-axis of the rotor core and an inner surface of the stator core is larger than a gap between the outer surface on the d-axis of the pole core portion and the inner surface of the stator, so that magnetic fluxes from the permanent magnet pass through the pole core portion concentrately. |
| US07768171B2 |
Rotor of permanent magnet rotating electric machine
A permanent magnet rotating electric machine has a stator provided with a plurality of windings, and a rotor in which magnets are disposed in slots formed in a rotor core along an outer circumference thereof. The rotor core is fixed on a rotary shaft rotating inside the stator, and one magnetic pole is constituted by each group of three or more of the magnets. A total angle occupied by the group of magnets constituting one magnetic pole is in the range of 150 to 165 degrees in terms of an electrical angle. |
| US07768170B2 |
Rotary electric machine
A rotary electric machine having a stator and capable of effectively utilizing both end faces of a rotor in the rotating axis direction. The stator comprises a radial part disposed in the rotating axis direction and axial parts disposed in the radial direction. The radial part and the axial parts comprise teeth and coils. The rotor comprises a rotor shaft, a rotor core, and a magnet. The rotor core comprises a radial part and axial parts. The magnet comprises a radial part and axial parts. The radial part and the axial parts of the magnet are formed to face the radial part and the axial parts and of the stator. |
| US07768168B2 |
Electric machine comprising a permanent magnet
The present invention relates to an electrical machine having a rotor, a stator, and a permanent magnet located on the rotor. The permanent magnet is embodied essentially as a hollow cylinder with axial and/or radial contact faces and is secured to the rotor at the axial and/or radial contact faces by means of retaining elements; the permanent magnet is elastically supported in the axial direction (X-X) and/or the radial direction of the rotor by means of the retaining elements. |
| US07768167B2 |
Method for assembling an electric motor and motor obtained using this method
A method for assembling an electric motor of the type comprising a stator unit (5) and a rotary unit (6) housed in a containment compartment (2a) delimited by a casing (2), comprises the step of exposing the compartment (2a) to a different pressure relative to the outside environment and the step of checking for the passage of fluid between the outside environment and the compartment (2a) in order to test the motor (1) hermetic seal. |
| US07768162B2 |
Dynamoelectric coil portion insulating construction
A stator coil 24 is installed in a stator core 11, and an insulating resin is impregnated into slot portions 22 and hardened. The stator coil 24 is constituted by enameled wires in which a polyamideimide resin layer has been applied radially outside a copper wire and hardened, and the insulating resin contains as a major component a THEIC-modified polyester resin that has been modified by a fatty acid. |
| US07768160B1 |
Electromagnetic motor to create a desired low frequency vibration or to cancel an undesired low frequency vibration
Electromagnetic motor with a slider that moves linearly with respect to the stator in either direction. Embodiments include slider internal or external the stator. Slider includes one magnetic flux producing element in all embodiments. Internal slider embodiments stator includes a minimum of three magnetic flux producing elements and a maximum of four such elements. External slider embodiments stator includes two magnetic flux producing elements. All embodiments provide positive slider return to center at rest position. In internal slider embodiments the slider is centered within the stator resulting from either: a combination of a repelling force from a single magnetic flux producing element in opposition to gravitational pull on the slider due to its weight; or equal and opposite repelling forces on opposite sides of the stator from a magnetic flux producing element on opposite sides of the stator all three elements in longitudinal alignment with each other. |
| US07768153B2 |
Dual input power supply
A dual input power supply is provided, which comprises a dual input, a connector, a power converter circuit and an output. The dual input has a first input and a second input. The connector is an integrated magnetic element used for integrating the input powers having different power signals from the first input and the second input. The power converter circuit comprises an AC-to-DC converter, a DC-to-DC converter, a feedback circuit and a filter circuit. In the present invention, the dual input uses a set of transformer coils or inductive coils, thus the size of the present power supply can be reduced. |
| US07768152B2 |
Automatic sensing power systems and methods
An automatic sensing power system automatically determines a power requirement for an electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system. |
| US07768151B2 |
Device for distributing power between cathodes of a multipolar electrode, in particular of an implant
A device (ES) for distributing power between n cathodes (Ki) of at least one multipolar stimulating electrode (EM) comprises at least one anode (A), wherein n is equal to or greater than two. Said device (ES) comprises a reconfigurable current mirror (MC) which is provided with n outputs (K′i) connectable to said n cathodes (Ki), respectively and supplies to the n (K′i) outputs n complementary fractions of a control current having respective selected values which are substantially constant at the control current amplitude variation in order to carry out a substantially constant spatial location of stimulation. |
| US07768145B2 |
Power generator and turbine unit
A power generator includes at least one underwater turbine unit providing a housing having a flow channel therethrough and at least one turbine means mounted in the flow channel for rotation in response to water flow through the flow channel. The turbine unit provides a turbine unit part releasably mountable in the turbine unit. The turbine unit part includes at least one of the at least one turbine means and a pump means. The turbine unit part is releasably mountable through an aperture in a side wall of the housing. |
| US07768143B2 |
Movement and power generation apparatus
The invention relates to apparatus which allows the movement of a body of water, such as that created by waves and/or a swell in the sea, to be utilized to generate power. The apparatus includes a first member in the form of a float, which is connected to a second member and at least one rotatable means connected to a power generator. In one embodiment the second member is connected with and supported on the first member while the rotatable member and power generator are provided at a relatively fixed location and coupled to second member such that relative movement of the second member with respect to the rotatable means is used to cause the generation of power. |
| US07768142B2 |
Gravity motor and method
A gravity motor wherein a beam is pivotally mounted intermediate its opposite ends for oscillation in a vertical plane about a pivot point on a support structure. A moveable weight is slidably connected to the beam for reciprocal movement between the opposite ends of the beam past the pivot point. A drive unit is mounted and engaged for driving the weight back and forth between opposite ends of the beam thereby causing reciprocation of the beam about the pivot point by gravity to rotate a shaft in order to generate electricity or to provide other motor functions. |
| US07768139B2 |
Power semiconductor module
A power semiconductor module is disclosed with a housing that includes a hardenable plastic casting compound and a base plate, wherein electric power semiconductor components are arranged on a section of the surface of the base plate that faces the housing via an insulating layer. At least the section of the surface of the base plate that faces the housing and contains the electric power semiconductor components is encapsulated in the housing wherein the hardenable plastic casting compound has a hardness between 30 and 95 ShoreA. |
| US07768138B2 |
Semiconductor device
In a semiconductor device, a semiconductor chip is connected to a board through an interconnection layer. A plurality of first terminals, a plurality of second terminals and a plurality of third terminals are provided on the board, the interconnection layer and the semiconductor chip, respectively. The second terminals are connected to the first terminals through the board. The third terminals are connected to the second terminals. The interconnection layer is rotatable about a rotation axis perpendicular to an upper surface of the interconnection layer. A first terminal having a specific function out of the first terminals and a third terminal having the specific function out of the third terminals are connected to each other by rotating the interconnection layer. |
| US07768135B1 |
Semiconductor package with fast power-up cycle and method of making same
In accordance with the present invention, there is provided multiple embodiments of a semiconductor package including at least two electronic components which are provided in a stacked arrangement, and are each electrically connected to an underlying substrate through the use of conductive wires. In accordance with one embodiment of the present invention, the electronic components are separated from each other by an intervening spacer which is typically fabricated from aluminum, or from silicon coated with aluminum. In this particular embodiment, the uppermost electronic component of the stack is electrically connected to at least one of the conductive wires through the use of a conductive paste layer which is also used to secure the uppermost electronic component to the underlying spacer. In this regard, one end of one of the conductive wires may be embedded in the conductive paste layer adjacent one side of the uppermost electronic component, or between the bottom surface of such electronic component and the spacer. |
| US07768133B2 |
Semiconductor device and semiconductor module employing thereof
A semiconductor device is provided with a silicon substrate and a structure filled in a through hole that has a rectangular cross section and extends through the silicon substrate. The structure comprises a pipe-shaped through electrode, stripe-shaped through electrodes, silicons, a first insulating film, a second insulating film and a third insulating film. The pipe-shaped through electrode is utilized as a pipe-shaped electric conductor that extends through the silicon substrate. In addition, the stripe-shaped through electrodes are provided in the interior of the pipe-shaped through electrode so that the stripe-shaped through electrodes extend through the silicon substrate and is spaced away from the pipe-shaped through electrode. A plurality of through electrodes are provided in substantially parallel within the inner region of the pipe-shaped through electrode. |
| US07768132B2 |
Circuit device and manufacturing method thereof
A circuit device including a multilayer wiring structure having an improved heat radiation performance, and a manufacturing method thereof is provided. A circuit device of the invention includes a first wiring layer and a second wiring layer laminated while interposing a first insulating layer. The first wiring layer is connected to the second wiring layer in a desired position through a connecting portion formed so as to penetrate the first insulating layer. The connecting portion includes a first connecting portion protruding in a thickness direction from the first wiring layer, and a second connecting portion protruding in the thickness direction from the second wiring layer. The first connecting portion and the second connecting portion contact each other at an intermediate portion in the thickness direction of the insulating layer. |
| US07768129B2 |
Metal etching method for an interconnect structure and metal interconnect structure obtained by such method
A metal interconnects structure, comprises a substrate (11), a dielectric layer (12) lying above the substrate, a stop layer (13) for metal etching lying above the dielectric layer, a metal layer (15′) lying above the stop layer, said metal layer being patterned according to a desired pattern. |
| US07768125B2 |
Multi-chip package system
A chip package system is provided including providing a chip having interconnects provided thereon; forming a molding compound on the chip and encapsulating the interconnects; and forming a recess in the molding compound above the interconnects to expose the interconnects. |
| US07768122B2 |
Semiconductor package
A semiconductor package has a substrate having a first heat transfer path for transferring heat from an optical functional element to a back surface of the substrate, a first heat dissipation unit dissipating the transferred heat therefrom, a second heat transfer path for transferring heat generated in an internal cavity and heat from a window lid itself to a back surface and/or a side surface of the substrate, a second heat dissipation unit dissipating the transferred heat therefrom. The heat transfer paths extend through the substrate and have thermal vias. |
| US07768118B2 |
Semiconductor device
A semiconductor device has a substrate, a semiconductor element, an electrode lead, and a sealing resin portion. The substrate has a main surface on which a circuit pattern is formed. The semiconductor element has first and second surfaces, and is arranged on the substrate such that the first surface faces the main surface. The electrode lead has one end joined to the circuit pattern and the other end joined by soldering to the second surface. The other end has a plurality of portions divided from each other. The sealing resin portion seals the semiconductor element and the electrode lead. Thus, there can be provided a semiconductor device that has relieved thermal stress at a joining portion of the electrode lead, and therefore is less subject to fatigue failure. |
| US07768112B2 |
Semiconductor package fabricated by cutting and molding in small windows
A method for cutting and molding in small windows of a window-type semiconductor package and the semiconductor package fabricated from the same are revealed. According to the method, a substrate strip has a plurality of small windows disposed at the sides or at the corners of the substrate strip. The external surface of the substrate strip includes a plurality of window molding areas surrounding the small windows and extending to the scribe lines. A plurality of chips are disposed on the substrate strip. Then, an encapsulant is formed in the small windows to encapsulate the electrical connecting components and formed on the window molding areas so that the encapsulant extends to the scribe lines. Therefore, the mold flashes at the small windows can be effectively reduced. Additionally, the encapsulant on the window molding areas is cut when singulating the substrate units so that the adhesion area of the encapsulant to the substrate strip is increased to prevent the delamination of traces and solder mask of the substrate units. |
| US07768107B2 |
Semiconductor component including semiconductor chip and method for producing the same
A semiconductor component includes at least one semiconductor chip arranged on a mounting substrate and connected thereto via bonding wires. For effective dissipation of heat, a solderable interlayer is arranged on the active upper side of the semiconductor chip and a heat sink is soldered onto the solderable interlayer. A method is also described for producing a semiconductor component with a solderable interlayer disposed on an active upper side of a semiconductor chip and with a heat sink soldered to the solderable interlayer. |
| US07768104B2 |
Apparatus and method for series connection of two die or chips in single electronics package
An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions. Alternatively, it can be by adding an electrically isolating coating on the non-active area of the P-side of a semiconductor device to allow it to be mounted P side down on an electrically conductive substrate or mounting location without modification to the substrate or lead frame. |
| US07768101B2 |
Semiconductor device having an insulated gate bipolar transistor and a free wheel diode
A p-type collector region of an IGBT and an n-type cathode region of a free wheel diode are alternately formed in a second main surface of a semiconductor substrate. A back electrode is formed on the second main surface so as to be in contact with both of the p-type collector region and the n-type cathode region, and has a titanium layer, a nickel layer and a gold layer that are successively stacked from the side of the second main surface. A semiconductor device capable of obtaining a satisfactory ON voltage in any of conduction of an insulated gate field effect transistor and conduction of the free wheel diode as well as a manufacturing method thereof can thus be obtained. |
| US07768100B2 |
Semiconductor integrated circuit
This invention is directed to improve the electrostatic discharge strength and the latch-up strength of the semiconductor integrated circuit. To achieve the certain level of stable quality of the semiconductor integrated circuit by eliminating the variety in the electrostatic discharge strength and the latch-up strength is also aimed. The first NPN type bipolar transistor 3 and the second NPN type bipolar transistor 4 in the electrostatic discharge protection cell EC 1 are surrounded by the isolation region 6 made of the P+ type semiconductor layer and electronically isolated from other elements. The width WB1 of the isolating region 6 is larger than the width WB2 of the isolation region 7 that separates the elements comprising the internal circuit 50 from each other. This configuration can efficiently improve the electrostatic discharge strength and the latch-up strength. It is preferred that the width WB1 of the isolation region 6 is twice as large as the width WB2 of the isolation region 7 (usually, it is designed to minimize the size of the semiconductor integrated circuit) in order to efficiently improve the dielectric strength and the latch-up strength. |
| US07768099B2 |
MIM capacitor integrated into the damascene structure and method of making thereof
This invention provides for the integration of metal-insulator-metal (MIM) capacitors with the damascene interconnect structure and process. The method includes forming a damascene interconnect structure and a MIM capacitor damascene structure wherein a diffusion barrier material forms the capacitor electrodes. The method includes forming a MIM capacitor damascene structure through an interlevel dielectric layer and terminating on a diffusion barrier material instead of a conventional dielectric etch stop layer. In alternative embodiments, the integrated damascene MIM capacitor makes up part of semiconductor device such as DRAM memory, CMOS, or a high frequency device. |
| US07768096B2 |
System for fabricating semiconductor components with conductive interconnects
A system for fabricating semiconductor components includes a semiconductor substrate, a thinning system for thinning the semiconductor substrate, an etching system for forming the substrate opening, and a bonding system for bonding the conductive interconnect to the substrate contact. The semiconductor component can be used to form module components, underfilled components, stacked components, and image sensor semiconductor components. |
| US07768088B2 |
Solid-state imaging device that efficiently guides light to a light-receiving part
In a solid-state imaging device including an on-chip microlens and a light-receiving part to receive incident light condensed by the on-chip microlens, an optical waveguide extending from an undersurface part of the microlens to the light-receiving part and for guiding the incident light condensed by the microlens to the light-receiving part is formed to be integrated with the microlens. By this, since the incident light condensed by the microlens is incident on the light-receiving part with little loss, the sensitivity is improved. |
| US07768087B2 |
Photodiode, solid slate image sensor, and method of manufacturing the same
A photodiode formed over a silicon substrate is disclosed. The photodiode includes a light-receiving region formed of a diffusion region of a first conduction type at the surface of the silicon substrate and forming a pn junction; an intermediate region formed of a diffusion region of the first conduction type at the surface of the silicon substrate so as to be included in the light-receiving region; a contact region formed of a diffusion region of the first conduction type at the surface of the silicon substrate so as to be included in the intermediate region; a shield layer formed of a diffusion region of a second conduction type in a part of the surface of the silicon substrate outside the intermediate region; and an electrode in contact with the contact region. The shield layer faces the side end part of the diffusion region forming the intermediate region. |
| US07768079B2 |
Transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachement
Embodiments of the invention generally relate to transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachment. In this regard a semiconductor device is introduced having a substrate, a high-k gate dielectric layer on the substrate, a metal gate electrode on the high-k gate dielectric layer, and a high-k dielectric layer on either side of and adjacent to the metal gate electrode and high-k gate dielectric layer, extending a distance away from the metal gate electrode and high-k gate dielectric layer on the substrate. Other embodiments are also disclosed and claimed. |
| US07768075B2 |
Semiconductor die packages using thin dies and metal substrates
A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die. |
| US07768065B2 |
Semiconductor device
A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode. |
| US07768059B2 |
Nonvolatile single-poly memory device
A non-volatile single-poly memory device is disclosed. The non-volatile single-poly memory device includes two mirror symmetric unit cells, which is capable of providing improved data correctness. Further, the non-volatile single-poly memory device is operated at low voltages and is fully compatible with logic processes. |
| US07768058B2 |
NROM flash memory devices on ultrathin silicon
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer provides an insulation layer between the source/drain areas and the gate insulator layer on top. A control gate is formed on top of the gate insulator layer. In a vertical device, an oxide pillar extends from the substrate with a source/drain area on either side of the pillar side. Epitaxial regrowth is used to form ultra-thin silicon body regions along the sidewalls of the oxide pillar. Second source/drain areas are formed on top of this structure. The gate insulator and control gate are formed on top. |
| US07768057B2 |
NAND-type EEPROM with increased reading speed
In an EEPROM consisting of a NAND cell in which a plurality of memory cells are connected in series, the control gate voltage Vread of the memory cell in a block selected by the data read operation is made different from the each of the voltages Vsg1, Vsg2 of the select gate of the select transistor in the selected block so as to make it possible to achieve a high speed reading without bringing about the breakdown of the insulating film interposed between the select gate and the channel of the select transistor. The high speed reading can also be made possible in the DINOR cell, the AND cell, NOR cell and the NAND cell having a single memory cell connected thereto, if the control gate voltage of the memory cell is made different from the voltage of the select gate of the select transistor. |
| US07768052B1 |
Process to improve high-performance capacitors in integrated MOS technologies
A method of fabricating a high-performance capacitor that may be incorporated into a standard CMOS fabrication process suitable for submicron devices is described. The parameters used in the standard CMOS process may be maintained, particularly for the definition and etch of the lower electrode layer. To reduce variation in critical dimension width, an Anti-Reflective Layer (ARL) is used, such as a Plasma Enhanced chemical vapor deposition Anti-Reflective Layer (PEARL) or other Anti-Reflective Coatings (ARCS), such as a conductive film like TiN. This ARL formation occurs after the capacitor specific process steps, but prior to the masking used for defining the lower electrodes. A Rapid Thermal Oxidation (RTO) is performed subsequent to removing the unwanted capacitor dielectric layer from the transistor poly outside of the capacitor regions, but prior to the PEARL deposition. Another embodiment instead eliminates the capacitor dielectric removal step, which is then replaced by a step to form an additional layer that is later etched away to leave spacers on the capacitor sides, thereby eliminating any undercutting of the dielectric. |
| US07768047B2 |
Imager element, device and system with recessed transfer gate
An imager element, device and imaging system image sensor pixel. The image sensor pixel includes a collection region, a floating diffusion region, and a transfer transistor having a recessed gate. The recessed gate is configured to couple the collection region to the floating diffusion region so that collected charge is transferred during activation. The recessed gate has an effective gate length greater than a physical gate length. |
| US07768034B2 |
Tapered voltage polysilicon diode electrostatic discharge circuit for power MOSFETs and ICs
An electrostatic discharge (ESD) protection network for power MOSFETs includes parallel branches, containing polysilicon zener diodes and resistors, used for protecting the gate from rupture caused by high voltages caused by ESD. The branches may have the same or independent paths for voltage to travel across from the gate region into the semiconductor substrate. Specifically, the secondary branch has a higher breakdown voltage than the primary branch so that the voltage is shared across the two branches of the protection network. The ESD protection network of the device provides a more effective design without increasing the space used on the die. The ESD protection network can also be used with other active and passive devices such as thyristors, insulated-gate bipolar transistors, and bipolar junction transistors. |
| US07768028B2 |
Light emitting apparatus
A light emitting apparatus includes a substrate, a first metal layer, an insulating layer and at least one light emitting device. The first metal layer is disposed on the substrate. The insulating layer is disposed on the first metal layer. The light emitting device is disposed on the insulating layer. |
| US07768025B2 |
Light emitting diode having vertical topology and method of making the same
An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate. |
| US07768023B2 |
Photonic structures for efficient light extraction and conversion in multi-color light emitting devices
A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the light emitted from the PES, and photonic crystals, wherein the photonic crystals act as diffraction gratings to provide high light extraction efficiency, to provide efficient excitation of the SES, and/or to modulate the far-field emission pattern. |
| US07768020B2 |
AC light emitting diode
Disclosed herein is an AC light emitting diode. The light emitting diode comprises a plurality of light emitting cells two-dimensionally arranged on a single substrate. Wires electrically connect the light emitting cells to one another to thereby form a serial array of the light emitting cells. Further, the light emitting cells are spaced apart from one another by distances within a range of 10 to 30 D, and the serial array is operated while connected to an AC power source. Accordingly, the excellent operating characteristics and light output power can be secured in an AC light emitting diode with a limited size. |
| US07768017B2 |
Silicon carbide semiconductor device and manufacturing method therefor
With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate. |
| US07768016B2 |
Carbon diode array for resistivity changing memories
An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell including a resistivity changing memory element and a carbon diode electrically coupled to the resistivity changing memory element. |
| US07768015B2 |
Pixel structure of display panel and method of making the same
A pixel structure of a display panel is provided. The pixel structure includes a first storage capacitor formed by a pixel electrode and a common electrode pattern, and a second storage capacitor formed by an electrode pattern and the common electrode pattern. Accordingly, the storage capacitance is greatly improved without sacrificing the aperture ratio, or the aperture ratio is improved by reducing the area of the storage capacitor while the storage capacitance is maintained. |
| US07768014B2 |
Memory device and manufacturing method thereof
As for a memory element implemented in a semiconductor device typified by an RFID, it is an object of the present invention to reduce manufacturing steps and to provide a memory element and a memory circuit having the element with reduced cost. It is a feature of the present invention that a memory element sandwiched between electrodes has an organic compound, and an electrode connected to a semiconductor element controlling the memory element functions as an electrode of the memory element. In addition, an extremely thin semiconductor film formed on an insulated surface is used for the memory element; therefore cost can be reduced. |
| US07768013B2 |
Vertical structure thin film transistor
A vertical structure thin film transistor is provided. The vertical structure thin film transistor has a stacked structure of a substrate, a first electrode, a dielectric thin film, a second electrode, a semiconductor thin film, and a third electrode, wherein current flows between the second and third electrodes perpendicularly to the substrate and is modulated by an electric field generated from the first electrode parallel to the current. |
| US07768010B2 |
Poly crystalline silicon semiconductor device and method of fabricating the same
Provided are a poly crystalline silicon semiconductor device and a method of fabricating the same. Portions of a silicon layer except for gates are removed to reduce a parasitic capacitance caused from the silicon layer existing on gate bus lines. The silicon layer exists under the gates only, thus the parasitic capacitance is reduced and the deterioration and the delay of signals are prevented. Accordingly, the poly crystalline silicon semiconductor device, such as a thin film transistor, has excellent electric characteristics. |
| US07768009B2 |
Display device and manufacturing method of the same
A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film. |
| US07768008B2 |
Thin film transistor, method for manufacturing the same and display using the same
One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern. |
| US07768005B2 |
Physically highly secure multi-chip assembly
A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate is provided with substrate contacts and conductive pathways that are electrically coupled to the die contacts and extend through the substrate. Electrical conductors surround the conductive pathways. A monitoring circuit detects a break in continuity of one or more of the electrical conductors, and preferably renders the assembly inoperable. Preferably, an epoxy encapsulation is provided to prevent probing tools from being able to reach the die or substrate contacts. |
| US07768002B2 |
Transparent organic thin film transistor
A transparent organic thin film transistor, which contains a p-type organic semiconductor material employed in a semiconductor active layer of the transparent organic thin film transistor, wherein the p-type organic semiconductor material has a maximum absorbance of 0.2 or less in a visible range of 400 to 700 nm, in which the maximum absorbance is determined in the case where the thin film is made to have a film thickness of 30 nm. |
| US07767995B2 |
Single-electron tunnel junction for complementary metal-oxide device and method of manufacturing the same
A method of providing a p-type substrate, disposing a pad oxide layer on the p-type substrate, disposing a nitride layer on the pad oxide layer, forming a nitride window in the nitride layer, disposing a field oxide in the nitride window, disposing a polysilicon gate over the field oxide, and diffusing a n-doped region in the p-type substrate, thereby forming at least one single-electron tunnel junction between the polysilicon gate and the n-doped region. |
| US07767993B2 |
Resistance change memory device
A resistance change memory device including a substrate, first and second wiring lines formed above the substrate to be insulated from each other, and memory cells disposed between the first and second wiring lines, wherein the memory cell includes: a variable resistance element for storing as information a resistance value; and a Schottky diode connected in series to the variable resistance element. The variable resistance element has: a recording layer formed of a composite compound containing at least one transition element and a cavity site for housing a cation ion; and electrodes formed on the opposite sides of the recording layer, one of which serves as a cation source in a write or erase mode for supplying a cation to the recording layer to be housed in the cavity site therein. |
| US07767992B2 |
Multi-layer chalcogenide devices
A multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. In one embodiment, the pore region includes two or more chalcogenide materials which differ in chemical composition. In another embodiment, the pore region includes one or more chalcogenide materials and a layer of Sb. The devices offer the advantages of minimal conditioning requirements, fast set speeds, high reset resistances and low set resistances. |
| US07767991B2 |
Method of operating an infrared drip sensor in an enteral pump system to reduce false alarm conditions
The present invention provides a method of operating an infrared drip sensor in an enteral pump system to reduce false alarm conditions. The method consists of the following steps: optically coupling a infrared beam emitter with an infrared beam detector along an infrared beam path that extends through a drip chamber and intersects the drip path; monitoring the output signal of the infrared beam detector to detect pulses; monitoring the pulses for an interruption thereof; and running an infrared beam power update routine when an interruption is detected in the pulses, the infrared beam power update routine consisting of incrementally increasing a power level of the infrared beam until the power level of the infrared beam is sufficient to re-establish an output signal at the infrared beam detector. |
| US07767990B2 |
Radiation attenuation system for lateral imaging
A radiation attenuation system for attenuating radiation during lateral radiographic imaging of an object is provided. The system includes a first radiation attenuating barrier that is substantially conformable to the object and configured to at least partially cover the object. The first radiation attenuating barrier has a fenestration area defining at least one opening. The system further includes a second radiation attenuating barrier coupled to the first radiation attenuation barrier. The second radiation attenuating barrier is selectively movable between a collapsed position and a generally upright position relative to the first radiation attenuating member. |
| US07767987B2 |
Electron beam irradiation method, electron beam irradiation apparatus, and electron beam irradiation apparatus for open-mouthed container
There are provided an electron beam application method and an electron beam application device capable of uniformly applying electron beams to an object even if the electron beams have a low energy. For this, electron beams (EB) are applied to a beverage container (30) (object) within a magnetic barrier (MF) formed by combining a plurality of magnetic fields generated in an electron beam application region. |
| US07767980B2 |
Image processing system, image processing method and computer readable medium
Provided is an image processing system including: a specific wavelength image obtaining section that obtains a specific wavelength image being an image of light from an object existing inside a substance, the light belonging to a specific wavelength region; a depth calculator that calculates a depth of the object from a surface of the substance, using a plurality of specific wavelength images corresponding to different specific wavelength regions from each other; and an object image generator that generates an image of the object according to the depth of the object calculated by the depth calculator. |
| US07767978B1 |
Ultraviolet water treatment device
An ultraviolet (UV) water treatment device includes a housing with an inlet and an outlet. Water flows into the housing through the inlet, is exposed to the UV light, and the treated water then flows out of the housing through the outlet. The UV light source is inserted into a quartz tube from above so that the UV lamp can be changed without draining the system. A lower access port is provided in the bottom of the housing. The lower access port includes a seat that contains the lower end of the quartz tube, and further allows a user of the system to remove debris from a broken quartz tube quickly and safely. |
| US07767975B2 |
Ionizing radiation detector
An ionizing radiation detector comprising a housing includes a scintillator material, an avalanche photodiode in contact with the scintillator material via optical coupling, and a preamplifier. |
| US07767973B2 |
Solid-state detector and method for resetting residue charges by illumination in the case of a solid-state detector
For a uniform image quality of digital X-ray records, a solid-state detector is provided. The detector includes light-sensitive pixel elements arranged in an active matrix, and a reset light source arranged behind them in the radiation direction of X-ray radiation, with the reset light source being in the form of an arrangement with light-emitting diodes and with the light-emitting diodes being designed such that can be driven individually and their intensity can be controlled individually. At least one of a failed and malfunctioning light-emitting diode is detectable. The intensities of the serviceable light-emitting diodes are driven and controlled in the event of a failure or a malfunction of at least one light-emitting diode in such a manner that the intensity and/or the homogeneity of the reset light source remains the same. |
| US07767964B2 |
Night vision apparatus
A night visional apparatus is provided that can assist in enlarging the field of view at night or in bad weather, and can obtain image with high sensitivity over a range from a vicinity of the apparatus to a distant area. The night vision apparatus includes a headlamp having one or two or more light sources, to emit light ranging from a visible light region to an infrared light region, a plurality of peaks exiting in a wavelength spectrum in the visible light region; an imaging camera that received light emitted from the illuminating device; and an optical band elimination filter that blocks only a part of peaks among the plurality of peaks. An output image is obtained based on an image captured by the imaging camera through the optical band elimination filter. |
| US07767963B1 |
Thermal imaging camera internal damping system
A thermal imaging camera is provided which includes an outer housing, a core disposed substantially entirely within the housing, and a plurality of damping members disposed between the housing and the core to substantially fully suspend the core in the housing with the damping members. |
| US07767959B1 |
Miniature mass spectrometer for the analysis of chemical and biological solid samples
Analysis of solid chemical and biological particles is achieved by a miniature mass spectrometer and apparatus attached thereto for vaporizing or ablating a stream of chemical and biological particles by a pulsed laser and/or pyrolysis heater sub-assembly at atmospheric pressure or, when desirable, in a vacuum. The mass spectrometer includes a collimation chamber, a repeller assembly, an internal ionization chamber, a mass filter and ion separation chamber, a drift space region, and a multi-channel ion detection array so as to permit the collection and analysis of ions formed over a wide mass range simultaneously. The apparatus for vaporizing or ablating includes an output port adjacent the input to the collimation and vaporization chamber so as to maximize the amount of vaporized material being fed into the mass spectrometer. |
| US07767958B2 |
Nanograss gamma detector
A gamma-ray detector comprising: a housing having a window through which gamma rays can enter; the housing comprising; a two-dimensional array of electrically conducting carbon nanotubes, which act as a cathode, on a substrate; a metal plate electrode, which acts as an anode, positioned opposite the substrate so that there is a gap containing a gas between the electrode and the nanotubes; and a voltage source connected to the substrate and the electrode such that when in use the voltage between the substrate and the electrode is maintained below the arc-threshold voltage so that no electric current can flow through the gap between the nanotubes and the electrode; wherein the electrode and the substrate are arranged such that when a gamma ray enters the housing and hits one of the nanotubes a spark discharge is triggered between the nanotubes and the plate electrode creating an electrical current that can be measured. |
| US07767954B2 |
Process and device for monitoring the security of a passageway using an optical grid to monitor movement of objects on a carrier
Monitoring is provided, for a passageway through which objects on carrier (12) are transported, such that the passageway is guarded by at least one light grid (16) with a plurality of light rays running one above the other, where the light grid (16) is divided into a first, lower area (16a) through which the carriers (12) pass and a second, upper area (16b) through which the objects pass, which light grid (16) disposes over an evaluating circuit which emits a signal if a light ray (22) is interrupted in the first, lower area (16a) and provides information on the height of the object. A current value for the height is stored height as last measured value. Readouts are taken of a lower area (16a) and upper area (16b) of the light grid (16), and the readouts are used to determine a current value for the height of the object, and a determination is made whether an object flag has been changed. |
| US07767953B2 |
Voltage generator, analog-to-digital converter, and image sensor system
A ladder resistor circuit generates a plurality of different reference voltages. A plurality of switching circuits correspond to a plurality of taps of the ladder resistor circuit. Each of the plurality of switching circuits is connected at one end to a corresponding one of the taps and connected at the other end to an output node, and has a variable on-resistance value. A control circuit selects continuous n (where n is any integer equal to or greater than 2) of the plurality of switching circuits, turns the n switching circuits on, and sets the respective on-resistance values of the n switching circuits. |
| US07767951B1 |
Systems and methods for image acquisition
Image acquisition methods and systems utilizing a pixilated transducer. |
| US07767948B2 |
Optical integrating cavity lighting system using multiple LED light sources with a control circuit
A system to provide radiant energy of selectable spectral characteristic (e.g. a selectable color combination) uses an integrating cavity to combine energy of different wavelengths from different sources. The cavity has a diffusely reflective interior surface and an aperture for allowing emission of combined radiant energy. Sources of radiant energy of different wavelengths, typically different-color LEDs, supply radiant energy into the interior of the integrating cavity. In the examples, the points of entry of the energy into the cavity typically are located so that they are not directly visible through the aperture. The cavity effectively integrates the energy of different wavelengths, so that the combined radiant energy emitted through the aperture includes the radiant energy of the various wavelengths. The apparatus also includes a control circuit coupled to the sources for establishing output intensity of radiant energy of each of the sources. Control of the intensity of emission of the sources sets the amount of each wavelength of energy in the combined output and thus determines a spectral characteristic of the radiant energy output through the aperture. |
| US07767946B2 |
Focus detection device and image pick-up device
A focus detection device includes a micro lens array having a plurality of micro lenses, a light receiving element array having a plurality of light receiving elements for each micro lens and that receives light rays from a plurality of partial areas in which pupils of an imaging optical system are different from each other, in a plurality of light receiving elements respectively through each micro lens and a focus detection calculation circuit. The device generates at least three signal strings respectively corresponding to images of light rays which have been transmitted through at least three of the partial areas, based on signals output from the plurality of light receiving elements of the light receiving element array. The device obtains, from the at least three signal strings, shift amounts of two signal strings corresponding to two partial areas, and detects a focus adjustment state of an imaging optical system based on the obtained plurality of shifts amounts. |
| US07767943B2 |
Methods for microwave heat treatment of manufactured components
An apparatus for heat treating manufactured components using microwave energy and microwave susceptor material. Heat treating medium such as eutectic salts may be employed. A fluidized bed introduces process gases which may include carburizing or nitriding gases. The process may be operated in a batch mode or continuous process mode. A microwave heating probe may be used to restart a frozen eutectic salt bath. |
| US07767940B2 |
Device and method for drying electrode coating
A device for at least partially drying the outer coating on a stick electrode in the form of a generally straight center welding wire of magnetic metal with an axis and surrounded by an extruded pliant mass with a settable binder. The device comprises a conveyor to transport a succession of the electrodes along a given path, a multi-turn induction heating coil extending along the path and spaced from the moving electrodes and a power source for passing an alternating current through the coil to induce an alternating voltage difference in the wire to cause AC current flow in the wire to heat the wire. |
| US07767938B2 |
Electrofusion socket forming system
An electrofusion joint assembly includes a meltable member, such as a pipe or fitting, and a heating element secured to the pipe or fitting. The pipe or fitting may be tapered to facilitate receiving another pipe to form an electrofusion weld joint. Fasteners are used to secure the heating element and extend through a meltable zone and into a non-melt zone. Power supplied to the pipe melts the pipe proximal the heating element. |
| US07767936B2 |
Functional therapeutic heater
A breathable electrical heater element for a topical application device such as a wound dressing or a therapeutic heating pad is disclosed. The heater element is formed by photochemically etching a track pattern onto a porous metallised fabric (e.g. nickel coated woven polyester). The heater element has a skin or wound contact layer laminated to the front face of the heater element. An adhesive layer is laminated to the back face of the heater element. The adhesive layer forms an overhang to provide an adhesive border around the wound contact layer to adhere the device to the skin of a patient. Therapeutically active drugs (optionally microencapsulated) may be incorporated into the skin or wound contact layer. Operation of the heater element causes the skin or wound contact layer to release the active drugs to the skin or wound of the patient. Appropriate control of the temperature of the heater element allows control of the release of the active drugs. |
| US07767935B2 |
Battery type lighter
A thin battery powered lighter, which has superior portability and usable as an advertising medium, is provided. The lighter includes a thin flat case (2); a sheet type battery (3) provided within the case (2); a heating element (4) connected to the battery (3); and a power switch (5) for establishing an electrical connection between the battery (3) and the heating element (4). The case (2) includes a slide member (6) for opening and closing an ignition window (21), which is provided at a position that the heating element faces (4), and an operating button (51) for operating the power switch (5). When the ignition window (21) is closed by the slide member (6), a portion of the slide member is interposed between contact points of the switch, precluding an operation of the operating button (51). The electrical connection is enabled by operating the operating button (51) in a state in which the ignition window (21) is open. |
| US07767933B2 |
Method and apparatus for controlling a short circuit during a MIG welding process
Methods and systems for clearing short circuits during a MIG welding process are disclosed. A method may include detecting a short circuit and increasing output current of a power source at a first ramp rate to clear the short circuit. The method further includes increasing output current at a second ramp rate after the output current reaches a threshold. Power sources and systems implementing the method are also provided. |
| US07767929B2 |
Method for removing foreign matter on glass substrate surface
It is to provide a method for removing a tin defect present on the surface of a glass substrate produced by a float process in a short time without the glass substrate surface being damaged regardless of the glass temperature.A method for removing a tin-containing foreign matter from the surface of glass, which comprises applying to the surface of a glass substrate produced by a float process a pulse laser beam having a transmittance of at least 70% through the glass substrate and having a pulse width, a wavelength and an energy density per unit area on the glass substrate surface which satisfy specific relations, to remove a tin-containing foreign matter present on the rear face opposite to the face irradiated with the pulse laser beam. |
| US07767928B2 |
Depth measurement and depth control or automatic depth control for a hollow to be produced by a laser processing device
According to a method for a depth measurement the depths of measuring points on a calibration surface are measured and correction values depending on differences between the measured values and known values are used and stored for a later correction. According to a method for the layer-wise production of a hollow the horizontal boundaries (xg, yg) for the removal of a layer (Si+1) depending on the hollow depth (z) were determined from the shape definition of the hollow. The measured values can be continuously stored and used for a later control of the laser processing device. |
| US07767923B2 |
Button structure
A button structure applied to an electronic device includes a housing, a button plate, a support element and a printed circuit board. The button plate is contained to a central opening of the housing. The central region of the button plate has a first thickness, while two sides of the button plate have a second thickness. The second thickness is thicker than the first thickness. The ends of the button plate are separately formed as elastic arms for mounting the button plate to the housing. The support element is sited under the button plate right under the central region so as to define the support element into left and right parts. The printed circuit board located under the support element and has two switches separately corresponding to the left and right parts of the button plate. |
| US07767921B2 |
Circuit breaker for electrical power leads of motor vehicles
The invention relates to a circuit breaker for electric supply lines, in particular energy lines or battery cables of motor vehicles. Said circuit breaker comprises a first connection element (2) and a second connection element (4), the current path running between the first connection element (2) and the second connection element (4), when the circuit breaker (6) is in a conductive state. The aim of the invention is to provide a cost-effective, fail-safe circuit breaker. To achieve this, the first connection element (2) comprises a cavity (8) and the second connection element (4) is configured from an electrically conductive flat part and the second connection element (4) has a projection (10) that corresponds to the shape of the cavity (8), in such a way that in the conductive state of the circuit breaker (1), the projection (10) rests in the cavity (8) in a non-positive fit. |
| US07767915B2 |
Weighing device, in particular, multiple-track weighing device
A weighing device with several weighing cells which are rigidly interconnected, and which have a load sensor with a predetermined load insertion direction, with at least one acceleration sensor and with at least one evaluating unit to which the weight signals generated by the weighing cells and the disturbance signals generated by the acceleration sensors can be transmitted. The evaluating unit uses a predetermined rule for each weighing cell to determine a correcting quantity from the disturbance signal of the acceleration sensor(s) as a function of the weighing cell geometric location relative to the geometric location of the acceleration sensor(s), and in that the weight signal, which is affected by the acceleration disturbance(s), of the relevant weighing cell is combined, with the correcting quantity in such a way that the influence of the acceleration disturbance(s) on the weight signal is substantially compensated. |
| US07767914B2 |
Multilayer printed wiring board, method for manufacturing buildup printed wiring board, and electronic apparatus
A multilayer printed wiring board includes: an insulating base including an indentation section formed thereon; a conductor pattern formed on the insulating base, the conductor pattern including a thick film section formed by embedding a conductor in the indentation section; and a via hole section formed in an upper layer of the insulating base, the via hole section including a bottom portion that is in contact with the thick film section. |
| US07767911B2 |
Grommet and assembling method therefor
A grommet (1) has a central shaft (2)through which a wire harness (5) is inserted. A circular connection portion (31) is provided continuously to the periphery of the central shaft(2.) A convex cross-sectionally V-shaped ring-like lip (32) is extensibly provided to the circular connection portion (31) in the direction of the center of the central shaft. A flange portion (33) is provided continuously to the lip portion (32.) When the grommet (1) is assembled to a body panel (10,) the lip (32) of the grommet (1) is extended in the direction of the center of the central shaft (2) of the grommet (1,) thereby reducing the diameter of the lip (32.) Then, the lip(32) is inserted into the through hole (12) of the body panel (10.) Thus, a low insertion force is sufficient when the grommet is inserted thereinto. Consequently, the assemblability of the grommet (1)is enhanced. |
| US07767908B2 |
Sealing element and a method for sealingly mounting of a cable
The invention relates to a flexible sealing element sealingly attached to a cable intended for connection to attachment means on e.g. the roof of a base station cabinet. When attaching the cable the front end of the sealing element is retracted to a position uncovering connecting means at the cable end. After attachment the front end is moved back to a position covering the connected cable end. |
| US07767906B2 |
Base assembly and wire-fixing element thereof
A wire-fixing element is coupled into an opening of a base. A wire passes through the opening, and one part of the wire is disposed in the base. The wire-fixing element includes a first end and a second end. A pair of arms is disposed at the first end and the arms are buckled into the opening. A supporting member is disposed at the second end and is used for supporting the wire. |
| US07767899B2 |
Electronic musical instrument
An electronic music instrument includes a musical-tone control that generates operation information of keys and a damper pedal to serve as musical-tone control information; a musical-tone generator simultaneously generating a plurality of musical tones according to the musical-tone control information; a resonance-tone generator that includes resonant circuits equal in number to harmonic signals of musical-tone signals that can be generated, for generating a resonance tone with the resonance circuits using a musical tone generated by the musical-tone generator as an input signal to each resonance circuit; and a resonance-tone mixer that multiplies the resonance tone generated by the resonance-tone generator by a predetermined degree according to the musical-tone control information, for adding the product to a musical tone input from the musical-tone generator, and outputting the sum. |
| US07767896B2 |
Vehicular music replay system
There is a need for providing a vehicular music replay system that can allow a car user to select a music source appropriate to the user's character or biological condition even from genres unknown to the user, allow even a first music source to be felt suited for the user, and consequently enhance an emotion about encounter with an unknown music source. The system stores music sources to be replayed in music source databases in association with applicable user state data reflecting a user state containing at least one of a user character, mental condition, and physical condition. The system retrieves a music source corresponding to the current user state acquired in a car. During the retrieval, a higher retrieval priority is provided for a music source having a lower replay history in the past. |
| US07767894B1 |
Musical guide for guitars
A musical guide and method for guitar playing includes providing a musical guide including a series of scales, chords or notes in the form of a temporary tattoo or sticker. The tattoo or sticker may be placed on the forearm of the user. As such, the user can match the sound to the note by glancing at their arm when needed. The student will be able to quickly find scale patterns by looking at their forearm. |
| US07767892B2 |
Keyboard apparatus for electronic musical instrument
A keyboard apparatus for an electronic musical instrument, in which hammers each have increased rigidity without being excessively increased in the mass thereof. The hammers are provided to respectively correspond to keys, and each comprised of a resin hammer base and a metal pipe member which has a circular outer cross-sectional shape and has a fixed end thereof formed at its tip with a flat modified cross-sectional portion which closes an opening at the tip of the fixed end. When the hammer base is injection molded, the fixed end of the pipe member is fixed to a pipe-fixing portion of the hammer base by means of outsert molding. The modified cross-sectional portion of the fixed end achieves a whirl-stop function relative to the pipe-fixing portion. |
| US07767888B2 |
Maize Hybrid variety X4T962
A novel hybrid maize variety designated X4T962 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing hybrid maize variety X4T962 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X4T962 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize hybrid variety X4T962, the hybrid seed, the hybrid plant produced from the seed, and variants, mutants, and minor modifications of hybrid maize variety X4T962. This invention further relates to methods for producing maize varieties derived from hybrid maize variety X4T962 and to the maize varieties derived by the use of those methods. |
| US07767881B2 |
Utilization of histamine receptor h3 gene participating in body weight or food intake control
To clarify histamine receptor H3 protein function in vivo, the present inventors constructed a nonhuman higher animal in which the expression of a histamine receptor H3 gene was artificially inhibited. As a result, the present inventors found that this nonhuman higher animal showed increased body weight, food intake, blood insulin level, or blood leptin level compared with a control. Thus, the present inventors found that abnormalities in the histamine receptor H3 protein relate to diseases characterized by changes in body weight or food intake, and this has made it possible to screen drugs for treatment or prevention of these diseases, and to examine these diseases. |
| US07767880B2 |
Methods of screening agents for activity using teleosts
The present invention provides methods of screening an agent for activity using teleosts. Methods of screening an agent for angiogenesis activity, toxic activity and an effect cell death activity in teleosts are provided. Methods of screening an agent for an activity in the brain or central nervous system in zebrafish are provided. The invention further provides high throughput methods of screening agents in multi-well plates. |
| US07767877B2 |
Liquid-absorbing core
A liquid-absorbing core which is for use in suction type drug volatilizers which comprises hydrophilic fibers and/or water-absorbing fibers. The hydrophilic fibers have an affinity for water, and are rayon, cotton, etc. Especially preferred is rayon because it has a high affinity for water. Examples of the water-absorbing fibers include water-absorbing synthetic fibers made of a polymer such as polyvinyl alcohol or polysodium acrylate and other synthetic fibers treated by, e.g., adding and adhering polyvinyl alcohol or polysodium acrylate thereto or coating them with the polymer. In the liquid-absorbing core, the hydrophilic fibers and/or water-absorbing fibers may be disposed so as to have a porosity of 10 to 80%. |
| US07767876B2 |
Disposable absorbent article having a visibly highlighted wetness sensation member
A disposable absorbent article including a wetness sensation member and visible highlighting indicating the presence of the wetness sensation member to facilitate an opportunity for the toilet training of the wearer. The wetness sensation member includes a permeable layer and a flow control layer. Urine deposited on the wetness sensation member can penetrate through the permeable body-facing layer in a z direction away from the wearer to the flow control layer. The flow control layer retards the passage of the urine through the wetness sensation member in the z direction while supporting the movement of the urine in an x-y plane to increase the wetted area contacting the wearer's skin and thereby enhance the wearer's awareness that urination has occurred. The visible highlighting is visible when viewing a body-facing surface of the article and may be associatively correlated with an externally visible marking and/or with the concept of toilet training. |
| US07767875B2 |
Wetness indicator for alerting a wearer to urination
A toilet training wetness indicator for alerting a wearer to urination and a garment incorporating such an element. The toilet training wetness indicator, which may be an insertable wetness indicator or integrated directly into a garment, such as training pants, comprises a liquid permeable enclosure having a liquid absorbent body enclosed therein. The liquid absorbent body absorbs liquid within the pants and applies hydraulic pressure to the enclosure upon absorption of a preselected amount of liquid. The enclosure limits expansion of the absorbent body so that the wetness indicator stiffens as liquid is absorbed. The wetness indicator has a first stiffness and is relatively pliable when dry and a second stiffness greater than the first stiffness upon absorption of the preselected amount of liquid. |
| US07767874B2 |
Medical device and process
A patient-friendly medical device is provided for removal of excess fluids from body tissue and is particularly useful to treat soft tissue inflammation, damage, edema and/or lymphedema. The comfortable medical device comprises a composite multilayered assembly that provides a gradient pressure compression device to compress body tissue of a patient in a controlled and graduated manner. The composite multilayered assembly can have an inner and/or outer layer to enhance uniform distribution of compression about the affected portion of the patient and can have flexible intermediate layers with elastomeric components such as foamed chips, foamed pieces, and/or chopped foam that can have a different density and/or size and/or shape to form channels (canals) therebetween to enhance flow of excess fluids from the body tissue of the patient. The channels or canals can create zones of gradient pressure to help move excess fluid from the tissue of the affected portion of the body of the patient. |
| US07767869B2 |
Apparatus and process for the production of vinyl chloride by thermal cracking of 1,2-dichloroethane
The invention relates to a process for the production of vinyl chloride by thermal cracking, in which the energy balance, the operating time of the cracking furnace and/or the yield of the reaction are distinctly enhanced in comparison with the prior art. A pressure of from 1.4 to 2.5 MPa is established in the cracking coil at a temperature of from 450 to 550° C. and, for pre-heating the EDC (=1,2-dichloroethane) introduced, inter alia the waste heat of the gas stream leaving the top of the quench column is utilized. |
| US07767868B2 |
Process for preparing high purity TNT
A process for preparing trinitrotoluene (TNT) in which toluene is treated with nitric acid having a concentration of about 90% to about 99%, and preferably about 98% to about 99%, by weight at a temperature of less than about 60° C., and preferably less than 30° C., to produce high purity dinitrotoluene. The resulting dinitrotoluene is then treated with nitric acid having a concentration of about 98% to about 99% by weight and trifluoromethane sulfuric acid to produce high purity TNT. |
| US07767861B2 |
Method for producing trivalent organophosphorus compounds
The present invention relates to a process for preparing organophosphites, organophosphonites and organophosphinites by condensing phosphorus trihalides or organophosphorus halides with organic compounds bearing hydroxyl groups in the presence of polymeric basic ion exchange resins.The process according to the invention makes possible in a simple manner the preparation of trivalent organophosphorus compounds which may be used, for example, as ligands in rhodium complexes which may be used as a catalyst in hydroformylation. |
| US07767860B2 |
Substituted amino alcohols
Disclosed herein are substituted amino alcohol anti-mycobacterial agents and/or chelation therapy agents of Formula I, process of preparation thereof, pharmaceutical compositions thereof, and methods of use thereof. |
| US07767856B2 |
System and method for producing arylamine compounds
Improved methods for making hole transport molecules (HTMs) that are incorporated into imaging members, such as layered photoreceptor devices, to increase the photoreceptor's “hole mobility,” or its ability to move charge, across its charge transport layer (CTL). Embodiments pertain to a continuous process for making N,N-diphenyl-4-biphenylamine and a system for performing the same. |
| US07767855B2 |
Method for the continuous production of an amine
Processes comprising: providing an aromatic alcohol; and reacting the aromatic alcohol with ammonia at a temperature of 80 to 350° C. in the presence of hydrogen and a heterogeneous catalyst to form a crude reaction product comprising a corresponding primary aromatic amine, wherein the heterogeneous catalyst comprises a catalytically active composition which, prior to reduction with hydrogen, comprises 90 to 99.8% by weight of zirconium dioxide (ZrO2), 0.1 to 5.0% by weight of an oxygen-comprising compound of palladium, and 0.1 to 5.0% by weight of an oxygen-comprising compound of platinum. |
| US07767850B2 |
S-[2-[(1-iminoethy)amino]ethyl]-2-methyl-L-cysteine maleate hydrochloride crystalline salt
A novel mixed salt of S-[2-[(1-Iminoethyl)amino]ethyl]-2-methyl-L-cysteine is disclosed. The novel mixed salt, S-[2-[(1-Iminoethyl)amino]ethyl]-2-methyl-L-cysteine maleate hydrochloride, may be produced to form crystals that may be arranged as generally orderly packed agglomerates, which are particularly useful in making pharmaceutical compositions. Such pharmaceutical compositions are also described, as well as methods to make crystalline S-[2-[(1-Iminoethyl)amino]ethyl]-2-methyl-L-cysteine maleate hydrochloride, and methods of treating conditions characterized by an overexpression on nitric oxide from the inducible isoform of nitric oxide synthase using the S-[2-[(1-Iminoethyl)amino]ethyl]-2-methyl-L-cysteine maleate hydrochloride. |
| US07767849B2 |
Integrated process for producing carbonylation acetic acid, acetic anhydride, or coproduction of each from a methyl acetate by-product stream
The present invention is directed to using methyl acetate from a vinyl acetate-based or a vinyl-or ethylene-alcohol based polymer or copolymer process directly for use in a methanol carbonylation production process to produce acetic acid, acetic anhydride, or a coproduction of each. Methyl acetate is a by-product of commercial polyvinyl-alcohol or alkene vinyl alcohol copolymer-based processes. Generally, this material is processed to recover methanol and acetic acid. Discussed herein is a cost-saving scheme to by-pass the methyl acetate processing at production or plant facilities and utilize the methyl acetate in an integrated methanol carbonylation unit. The scheme discussed eliminates an expensive hydrolysis step often associated with the polymer process. |
| US07767846B2 |
Fluorescent dyes for use in glucose sensing
A novel class of compounds that includes HPTS-Cys-MA, and methods of making them are disclosed herein. The class of compounds including HPTS-Cys-MA are useful as fluorescent dyes for analyte detection. |
| US07767845B2 |
Process for producing optically active 2-hydroxybutyric ester
A process for producing an optically active 2-hydroxybutyric ester represented by formula (1): by reacting an optically active 2,3-epoxypropionic ester represented by formula (2): with a methyl Grignard reagent CH3MgX in the presence of a copper catalyst in an amount of 0.05 to 0.5 mol with respect to 1 mol of the 2,3-epoxypropionic ester. |
| US07767844B2 |
Method for manufacturing diethylene triamine pentaacetic acid derivative
The present invention at first prepares a penta-alkyl DTPA and then processes a regioselective hydrolysis over the penta-alkyl DTPA while using a metal ion as a catalyst to obtain a tetra-alkyl DTPA, where, by the above two steps, a monoreactive DTPA derivative is manufactured. |
| US07767837B2 |
Methods of making alkyl esters
A method comprising contacting an alcohol, a feed comprising one or more glycerides and equal to or greater than 2 wt % of one or more free fatty acids, and a solid acid catalyst, a nanostructured polymer catalyst, or a sulfated zirconia catalyst in one or more reactors, and recovering from the one or more reactors an effluent comprising equal to or greater than about 75 wt % alkyl ester and equal to or less than about 5 wt % glyceride. |
| US07767836B2 |
Method and system for extraction of oil from corn
A process for removing oil from an agricultural substrate, including a dry grind corn. An ethanol solution with a concentration in the range of from about 90% to about 100% ethanol is mixed with the dry grind corn in a ratio of from about 10:1 to about 1:1 to form an extraction solution including the ethanol solution, oil, and corn solids. The extraction solution is separated into the corn solids and a filtrate, the filtrate including the ethanol solution and oil. The filtrate is membrane filtered, including nanofiltration, to restrain an oil concentrate from the filtrate and pass a permeate of the ethanol solution. The oil contained within the oil concentrate is purified. |
| US07767831B2 |
Process for preparing renin inhibitors
The present invention provides a novel process, novel process steps and novel intermediates useful in the synthesis of pharmaceutically active compounds, especially renin inhibitors, such as Aliskiren. Inter alia, the invention provides a process for the manufacture of a compound of the formula III, wherein R, R1, R2, R3 and PG are as defined in the specification, or a salt thereof. The manufacture comprises (preferably consists of) reacting a compound of the formula I, with a reagent able to transform hydroxy into X where X is for example a leaving group. |
| US07767829B2 |
Water-soluble fluoro-substituted cyanine dyes as reactive fluorescence labelling reagents
Disclosed are cyanine dyes that are useful for labelling and detecting biological and other materials. The dyes are of formula (I): in which at least one of groups R1, R2, R3, R4, R5, R6, R7, R8, R9, R10 R11, R12, R13 and R14 is -L-M or -L-P, where L is a linking group, M is a target bonding group and P is a conjugated component, and at least one of groups R3, R4, R5, R6, R7, R8, R9 and R10 comprises fluorine. The use of cyanine dyes substituted by fluorine and having additional substitution with three or more sulphonic acid groups for labelling biological target molecules results in a labelled product in which there is reduced dye-dye aggregation and improved photostability, compared with cyanine dyes having no such substitutions. The dyes of the present invention are particularly useful in assays involving fluorescence detection where continual or repeated excitation is a requirement, for example in kinetic studies, or in microarray analyses where microarray slides may need to be reanalysed over a period of days. |
| US07767822B2 |
Water-soluble tetrazolium salts
Thiazolyl tetrazolium salts with increased solubility in aqueous solutions have alkylammonium alkoxy substituents, preferably trimethyl ammonium propoxy groups substituents, on phenyl rings attached to the tetrazolium ring. Thiazolyl tetrazolium salts with increased solubility in aqueous solutions have alkyl ammonium alkoxy substituents, preferably trimethyl ammonium propoxy groups substituents, on phenyl rings attached to the tetrazolium ring, e.g. the compounds of the general formula shown below. Formula (A-)a. |
| US07767819B2 |
Thiazolylimidazole derivatives and their use as inhibitors of microsomal triglyceride transfer protein
The present invention relates to thiazolylimidazole derivatives of the general formula (I) in which: G represents a bond or a divalent radical chosen from the groups g1, g2 and g3; and R1, R2, R3, R4, R5, R6, Y and Z are as defined in the description. Application of the compounds of the formula (I) to the treatment of hypertriglyceridaemia, hypercholesterolaemia and dyslipidaemia. |
| US07767818B2 |
Hepatitis C inhibitor dipeptide analogs
Compounds of formula (I): wherein R1, R2, R3, R4, n and m are as defined herein. The compounds are useful as inhibitors of HCV NS3 protease. |
| US07767816B2 |
Azaindoles useful as inhibitors of janus kinases
The present invention relates to compounds useful as inhibitors of protein kinases, particularly of JAK family kinases. The invention also provides pharmaceutically acceptable compositions comprising said compounds and methods of using the compositions in the treatment of various disease, conditions, or disorders. |
| US07767814B2 |
Substituted piperidine compounds and methods of their use
Certain 4-aryl-piperidine compounds, including N-substituted 9β-substituted-5-(3-substituted-phenyl)morphans and N-substituted octahydro-4a-(3-hydroxyphenyl)-10a-methyl-benzo[g]isoquinolines, pharmaceutical compositions, and methods of their use, inter alia, as opioid antagonists are disclosed. |
| US07767813B2 |
Preparation method
The present invention is directed to a novel method for the preparation of high purity irinotecan. This can be achieved by eliminating the excess of the other reagent, bipiperidinyl-1′-carbonyl chloride after it has reacted with 7-ethyl-10-hydroxy camptothecin and crystallizing the final product from a suitable solvent. |
| US07767812B2 |
Crystals of pyrimidine compound and process for producing the same
Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one having a diffraction peak at a diffraction angle (2θ±0.2°) of 9.7° and/or 21.9° in a powder X-ray diffraction are suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation. Crystals of 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate and amorphous 5-[2-amino-4-(2-furyl)pyrimidin-5-yl]-1-methylpyridin-2(1H)-one hydrate are also suitable for an active ingredient of a preventing and therapeutic agent for diseases such as constipation. |
| US07767811B2 |
Kinetic resolutions of chiral 2- and 3-substituted carboxylic acids
One aspect of the present invention relates to a method for the kinetic resolution of racemic and diastereomeric mixtures of chiral compounds. The critical elements of the method are: a non-racemic chiral tertiary-amine-containing catalyst; a racemic or diastereomeric mixture of a chiral substrate, e.g., a cyclic carbonate or cyclic carbamate; and a nucleophile, e.g., an alcohol, amine or thiol. A preferred embodiment of the present invention relates to a method for achieving the kinetic resolution of racemic and diastereomeric mixtures of derivatives of α- and β-amino, hydroxy, and thio carboxylic acids. In certain embodiments, the methods of the present invention achieve dynamic kinetic resolution of a racemic or diastereomeric mixture of a substrate, i.e., a kinetic resolution wherein the yield of the resolved enantiomer or diastereomer, respectively, exceeds the amount present in the original mixture due to the in situ equilibration of the enantiomers or diastereomers under the reaction conditions prior to the resolution step. |
| US07767809B2 |
Crystal of intermediate for carbapenem
The disclosed invention relates to a solvate of the compound (I) of the formula: or a crystal thereof. |
| US07767805B2 |
Methods and compositions for sequencing a nucleic acid
The invention provides nucleotide analogs and methods of using them in sequencing reactions. |
| US07767803B2 |
Stabilized aptamers to PSMA and their use as prostate cancer therapeutics
The present invention provides stabilized, high affinity nucleic acid ligands to PSMA. Methods for the identification and preparation of novel, stable, high affinity ligands to PSMA using the SELEX™ method with 2′-O-methyl substituted nucleic acids, and cell surface SELEX™ are described herein. Also included are methods and compositions for the treatment and diagnosis of disease characterized by PSMA expression, using the described nucleic acid ligands. |
| US07767802B2 |
Compositions and methods for inhibiting expression of anti-apoptotic genes
The present invention relates to a double-stranded ribonucleic acid (dsRNA) for inhibiting the expression of an anti-apoptotic gene, comprising an antisense strand having a nucleotide sequence which is less that 25 nucleotides in length and which is substantially complementary to at least a part of an apoptotic gene, such as a Bcl gene. The invention also relates to a pharmaceutical composition comprising the dsRNA together with a pharmaceutically acceptable carrier; methods for treating diseases caused by the expression of an anti-apoptotic gene using the pharmaceutical composition; and methods for inhibiting the expression of an anti-apoptotic gene in a cell. |
| US07767798B2 |
Loganin analogues and a process for the preparation thereof
The present invention provides novel loganin analogues and a process for the preparation thereof. The present invention further provides the use of Iridoid glycoside loganin isolated from the fruit pulp of Strychnos nux-vomica and its bioactive semi-synthetic analogues against various human cancer cell lines grown in-vitro. |
| US07767787B1 |
Substance for obtaining highly effective tumor medications as well as a process
The invention relates to a substance and a process for obtaining anti-tumor agents. |
| US07767778B2 |
Polyurethane powder coating compositions that do not split off blocking agents and have a low stoving temperature
The present invention relates to polyurethane powder coating compositions that do not split off blocking agents and have a low stoving temperature. The powder coating compositions contain a hydroxyl functional binder component having a content of carboxyl groups of from 0.5 to 2.0 wt. %, a polyaddition compound, at least one zinc compound as a hardening catalyst, and a compound reactive to carboxyl groups. |
| US07767770B2 |
Process for the oxidative dehydrogenation of ethane
A method for producing a mixture of ethylene and carbon monoxide by contacting ethane and an oxygen source with a catalyst comprising synthetic cryptomelane or octahedral molecular sieve. The method further comprises condensing the alkyl propionate with formaldehyde to produce an alkyl methacrylate. |
| US07767767B2 |
Modification of polyethylene with ozone
A method of modifying polyethylene is disclosed. The method comprises contacting the polyethylene powder with ozone. The modified polyethylene exhibits an increase in melt elasticity and the complex viscosity at low shear rates. The rheological benefits are achieved without a significant reduction in the weight average molecular weight of the polyethylene. The modified polyethylene can be used in applications that require higher melt strength such as film or blow molding. |
| US07767763B2 |
Fluoroelastomers
VDF-based curable fluoroelastomers, having a glass transition temperature lower than −49° C., preferably lower than −50° C., and having the following composition, as percent moles: A) from 25% to 50%, preferably from 30% to 45%, of the monomer of formula: CF2═CFOCF2OCF3 (a); B) one or more (per)fluorinated comonomers having at least one unsaturation of ethylene type in amounts from 75% to 50%; preferably from 70% to 55%; said one or more comonomers comprising vinylidene fluoride (VDF) in amounts from 50% to 75% on the total of the monomer moles; the sum of the molar percentages of the monomers being 100%; said fluoroelastomers containing an amount of —COF end groups in the polymer lower than the sensitivity limit of the method reported in the description. |
| US07767761B2 |
Compositions obtained from recycled polyolefins
Polyolefin compositions comprising, by weight: A) 30-80% of a polyolefin component containing not less than 80% of a waste material selected from polyethylene, polypropylene or their mixtures; B) 20-70% of a heterophasic polyolefin composition having flexural modulus equal to or lower than 600 MPa. |
| US07767757B2 |
Thermoset materials with improved impact resistance
The present invention relates to a thermoset material with improved impact resistance comprising, by weight: •99 to 20% of a thermoset resin, •1 to 80% of an impact modifier comprising at least one copolymer chosen from copolymers comprising A-B-C and A-B blocks, in which: each block is connected to the other by means of a covalent bond or of an intermediate molecule connected to one of the blocks via a covalent bond and to the other block via another covalent bond, A is a copolymer of methyl methacrylate and of at least one water-soluble monomer, C is either (i) a PMMA (homopolymer or copolymer) this PMMA comprising optionally a water-soluble monomer or (ii) a polymer based on vinyl monomers or mixture of vinyl monomers, B is incompatible or partially compatible with the thermoset resin and incompatible with the A block and the optional C block and its glass transition temperature Tg is less than the operating temperature of the thermoset material. The invention also relates to the use of these impact modifiers in thermosets. |
| US07767755B2 |
Composition including multiple functionalized polymers
A composition that includes functionalized polymers and particulate filler is provided. The composition includes at least three components: (1) a polymer that includes a first type of functionality such as a functional group including a primary or secondary amine functionality, (2) a polymer that includes a second type of functionality such as an alkoxysilane or other silica interacting functionality, and (3) at least two types of particulate filler. One of the functionalized polymers can be made in the presence of the other. |
| US07767753B2 |
Binder resin composition, paste and green sheet
A binder resin composition which shows no “stringing” when used in printing and can disappear without leaving any residue upon burning at a relatively low temperature; a glass paste; and a ceramic paste. The binder composition contains as a matrix resin, a copolymer (A) comprising a segment derived from an alkyl(meth)acrylate monomer and a polyalkylene oxide segment composed of repeating units represented by the following chemical formula (1), —(OR)n- wherein R is C3 or higher alkylene and n is an integer. |
| US07767747B2 |
Silicone polymer and organic polymer containing alloy and/or hybrid emulsion compositions
Emulsion compositions containing a silicone polymer and organic polymer as an alloy and/or hybrid emulsion can be made by (i) first forming an emulsion containing a silicone polymer by emulsion polymerization in which (a) the ring of a cyclic siloxane oligomer is opened, in which (b)an hydroxy endblocked siloxane oligomer is condensed, using an acid or base catalyst in the presence of water, or in which (c) an hydrogen endblocked siloxane oligomer and a vinyl endblocked siloxane oligomer are reacted by hydrosilylation using a catalyst; (ii) adding to the emulsion in (i) the components for preparing an emulsion containing an organic polymer by free radical emulsion polymerization of an ethylenically unsaturated organic monomer, and (iii) heating the emulsion. The resulting coalesced compositions produce polymer blends or alloys whose properties are influenced by the composition and morphology of the hybrid emulsion particles. The compositions may be spray dried whenever it is desired to employ the particles in powder type applications. In an embodiment, the two emulsions are prepared separately of one another and then combined. |
| US07767745B2 |
Methods of making a mixture for a PTFE membrane with metal oxides, and compositions related thereto
Method for making a mixture used in the production of a polytetrafluoroethylene (PTFE) membrane including metal oxide(s). The mixture includes PTFE resin, a lubricating agent, and a metal oxide. The mixture may be further processed to form a PTFE membrane. |
| US07767744B2 |
Resin composition, resin compact, production method of resin compact and recycling method of resin compact
A resin composition, includes: an aliphatic polyester; a second polymer compound having a glass transition point higher than a glass transition point of the aliphatic polyester; and aluminum phosphate. |
| US07767743B2 |
Processable branched isoolefin-alkylstyrene elastomers
A branched isobutylene-styrenic elastomer with a broad molecular weight distribution is disclosed comprising an interpolymer of an isoolefin monomer as isobutylene, a styrenic monomer such as p-methylstyrene, and a multiolefin such as divinylbenzene. The elastomer has improved green strength, relaxation characteristics, and processability in melt processing, while retaining excellent aging characteristics and barrier properties, and can be used in a blend with a linear isobutylene-p-alkylstyrene elastomer to improve processability of the linear elastomer. Also disclosed are a method for processing the linear elastomer with an effective amount of the branched elastomer to improve processability, and nanocomposites, curable compositions, cured compositions and useful articles formed from the branched elastomer and the linear-branched elastomer blends. |
| US07767741B2 |
Semiconductive polymer compositions
The present invention relates to a semiconductive polymer composition comprising an olefin homo- or copolymer wherein the composition has a direct current volume resistivity of less than 1000 Ohm·cm at 90° C., an elongation at break which after aging for 240 hours at 135° C. does not change by more than 25%, and a total number of structures of 20 or less in the SIED test. Furthermore, the present invention relates to an electric power cable comprising a conductor, a semiconducting layer and, adjacent to the semiconducting layer, an insulation layer, wherein the semiconducting layer is formed by said semiconductive polymer composition and to the use of said semiconducting polymer composition for the production of a semiconductive layer of an electric power cable. |
| US07767737B2 |
Aqueous adhesive dispersions
Aqueous polymer dispersions based on polychloroprene, and a process for their preparation and use. The aqueous polymer dispersions are produced from a polychloroprene dispersion having an average particle size of from 60 to 220 nm, and an aqueous silicon dioxide dispersion having an SiO2 particle diameter of from 1 to 400 nm. |
| US07767730B2 |
Ophthalmic devices containing heterocyclic compounds and methods for their production
This invention relates to ophthalmic devices and methods for their production where the ophthalmic device contain a polymer and at least one heterocyclic compound comprising at least one N—Cl and/or N—Br bond. |
| US07767726B2 |
Medical devices having crosslinked polymeric surfaces
According to an aspect of the invention, medical devices are provided which contain at least one polymeric region. The polymeric region contains at least one copolymer, which includes at least one high Tg vinyl aromatic monomer and at least one low Tg monomer. Moreover, the polymeric region contains at least one surface sub-region that is crosslinked and at least one bulk sub-region that is substantially non-crosslinked. According to another aspect of the invention, a method is provided which includes exposing a polymeric region of a medical device to energetic species such that at least one surface sub-region of the polymeric region becomes crosslinked and at least one bulk sub-region remains substantially non-crosslinked. The polymeric region contains at least one copolymer, which includes at least one high Tg vinyl aromatic monomer and at least one low Tg monomer. |
| US07767724B2 |
Expandable resin beads of styrene-modified straight-chain and low-density polyethylene, process for production thereof, pre-expand beads, and foams
According to the present invention, there is provided expandable beads of a styrene-modified linear low-density polyethylene-based resin comprising a volatile blowing agent and a base resin, the base resin containing more than 300 parts by weight and less than 1000 parts by weight of a polystyrene-based resin component relative to 100 parts by weight of a non-crosslinked linear low-density polyethylene-based resin component, wherein the base resin contains 2 to 40 wt % of a gel component comprising a graft copolymer of the polystyrene-based resin component and the low-density polyethylene-based resin component. |
| US07767720B2 |
Large-scale colloidal crystals and macroporous polymers and method for producing
Single domain wafer-scale colloidal crystals and macroporous polymers are formed by dispersing concentrated solutions of colloids, desirably mondisperse silica colloids, in a viscous monomer, desirably ethoxylated trimethylolpropane triacrylate, and spin-coating them onto a substrate. Subsequent photopolymerization produces three-dimensionally ordered colloidal crystals trapped inside a polymer matrix. Selective removal of the polymer matrix, such as by oxygen plasma treatment, or removal of the silica spheres, such as by wet etching, produces large-area colloidal crystals and macroporous polymers, respectively. |
| US07767719B2 |
Anthracenedione compounds
This invention relates compositions containing compounds of formula (I) below: Each of R1, R2, R3, R4, R5, R6, R7, and R8 is defined in the specification. |
| US07767715B2 |
Sulfonamide derivatives for the treatment of diseases
The invention relates to compounds of formula (1) and to processes for the preparation of, intermediates used in the preparation of, compositions containing and the uses of, such derivatives. The compounds according to the present invention are useful in numerous diseases, disorders and conditions, in particular inflammatory, allergic and respiratory diseases, disorders and conditions. |
| US07767706B2 |
Substituted aryl acylthioureas and related compounds; inhibitors of viral replication
The invention provides compounds and pharmaceutically acceptable salts of Formula I wherein the variables A1, A2, R1, R2, V, W, X, Y, and Z are defined herein. Certain compounds of Formula I described herein which possess potent antiviral activity. The invention particularly provides compounds of Formula I that are potent and/or selective inhibitors of Hepatitis C virus replication. The invention also provides pharmaceutical compositions containing one or more compound of Formula I, or a salt, solvate, or acylated prodrug of such compounds, and one or more pharmaceutically acceptable carriers, excipients, or diluents. The invention further comprises methods of treating patients suffering from certain infectious diseases by administering to such patients an amount of a compound of Formula I effective to reduce signs or symptoms of the disease or disorder. These infectious diseases include viral infections, particularly HCV infections. The invention is particularly includes methods of treating human patients suffering from an infectious disease, but also encompasses methods of treating other animals, including livestock and domesticated companion animals, suffering from an infectious disease.Methods of treatment include administering a compound of Formula I as a single active agent or administering a compound of Formula I in combination with on or more other therapeutic agent. |
| US07767700B2 |
Method of providing pirfenidone therapy to a patient
The invention relates to methods for decreasing adverse events associated with pirfenidone (5-methyl-1-phenyl-2-(1H)-pyridone) therapy. The invention discloses an optimized dose escalation scheme that results in the patient having increased tolerance to adverse events associated with the administration of pirfenidone. The invention also discloses a starter pack that may be used in conjunction with the dose escalation scheme. |
| US07767699B2 |
Therapeutic agents useful for treating pain
The invention provides a compound of formula (I): (where R1, Q, A and R2 are disclosed herein) or a pharmaceutically acceptable salt thereof (a “Pyridine-alkynyl Compound”); pharmaceutical compositions comprising an effective amount of a Pyridine-alkynyl Compound; and methods for treating or preventing a condition such as pain, urinary incontinence, an addictive disorder, Parkinson's disease, parkinsonism, anxiety, epilepsy, a seizure, stroke, a pruritic condition, psychosis, a cognitive disorder, a memory deficit, restricted brain function, Huntington's chorea, amyotrophic lateral sclerosis, dementia, retinopathy, a muscle spasm, a migraine, vomiting, dyskinesia or depression in an animal comprising administering to an animal in need thereof an effective amount of a Pyridine-alkynyl Compound. |
| US07767698B2 |
Formulation and use thereof
A liquid pharmaceutical formulation comprising nicotine in any form for administration essentially to the lungs being acidified and/or alkalized by buffering and/or pH regulation providing for a tmax of nicotine in arterial blood of a subject within a short period of time after administration.The administration is preferably by spraying an aerosol into the oral cavity for further distribution essentially into the lungs. A method for manufacturing said formulation. Use of said formulation in therapy, such as therapy for treating addiction to tobacco. |
| US07767694B2 |
Pharmaceutical composition having prokinetic effect
The present invention is directed to a method of treating gastrointestinal motility disorders in a subject in need thereof which includes: administering a therapeutically effective amount of O-(3-piperidino-2-hydroxypropyl) nicotinic amidoxime or a pharmaceutically suitable acid addition salt thereof, wherein the gastrointestinal motility disorders include reflux esophagitis, type II biliary and pancreatic sphincter of Oddi dysfunction, type III biliary and pancreatic sphincter of Oddi dysfunction, postcholecystectomy syndrome, non-ulcerative colitis or fecal incontinences. |
| US07767680B2 |
Ion channel modulators and methods of use
In general, the invention relates to novel 4-phenylpyrimidine compounds useful as ion channel modulators. It has now been found that compounds of this invention, and pharmaceutically acceptable compositions thereof, are useful as inhibitors of voltage-gated sodium channels and/or calcium channels. |
| US07767674B2 |
Kinase inhibitors
The present invention provides kinase inhibitors of Formula I: |
| US07767671B2 |
3-Quinolinecarbonitrile protein kinase inhibitors
This invention provides a compound of Formula 1 where Ar, X, R1, R2, R3, and R4 are defined herein, or a pharmaceutically acceptable salt thereof useful in the prevention or inhibition of diseases associated with the Ras/Raf/MEK signaling cascade in a mammal, such as neoplasms, strokes, osteoporosis, cancer, rheumatoid arthritis, inflammatory disease, polycystic kidney disease, and colonic polyps, and methods of making the compounds of formula 1 and intermediates. |
| US07767670B2 |
Substituted 3-carboxamido isoxazoles as kinase modulators
The invention provides methods and compositions for treating conditions mediated by various kinases wherein substituted 3-carboxamido isoxazoles compounds are employed. The invention also provides methods of using the compounds and/or compositions in the treatment of a variety of diseases and unwanted conditions in subjects. |
| US07767668B2 |
Micronized tanaproget, compositions, and methods of preparing the same
The present invention provides compositions, desirably pharmaceutical compositions, containing micronized tanaproget. The compositions can also contain microcrystalline cellulose, croscarmellose sodium, anhydrous lactose, magnesium stearate, micronized edetate calcium disodium hydrous, and micronized sodium thiosulfate pentahydrate. The compositions are useful in contraception and hormone replacement therapy and in the treatment and/or prevention of uterine myometrial fibroids, benign prostatic hypertrophy, benign and malignant neoplastic disease, dysfunctional bleeding, uterine leiomyomata, endometriosis, polycystic ovary syndrome, and carcinomas and adenocarcinomas of the pituitary, endometrium, kidney, ovary, breast, colon, and prostate and other hormone-dependent tumors, and in the preparation of medicaments useful therefor. Additional uses include stimulation of food intake. |
| US07767666B2 |
Butyl and butynyl benzyl amine compounds
Certain substituted butyl and butynyl benzyl amine compounds are histamine H3 receptor and/or serotonin transporter modulators useful in the treatment of histamine H3 receptor- and/or serotonin-mediated diseases. |
| US07767665B2 |
1,3-benzothiazinone derivatives and use thereof
This invention provides a compound represented by the formula (I): wherein R1 is a hydrogen atom, a halogen atom, hydroxy, nitro, optionally halogenated alkyl, alkoxy optionally having substituents, acyl or amino optionally having substituents; R2 is pyridyl, furyl, thienyl, pyrrolyl, quinolyl, pyrazinyl, pyrimidinyl, pyridazinyl, indolyl, tetrahydroquinolyl or thiazolyl, each of which may have substituents; n is 1 or 2; or a salt. And this invention provides a safe pharmaceutical comprising the compound of the formula (I), which has an excellent apoptosis inhibitory effect and MIF binding effect, for preventing and/or treating heart disease, nervous degenerative disease, cerebrovascular disease, central nervous infectious disease, traumatorathy, demyelinating disease, bone and articular disease, kidney disease, liver disease, osteomyelodysplasia, AIDS, cancer, and the like. |
| US07767664B2 |
Plant growth regulation
The present invention relates to a new class of plant growth regulators. In particular, the invention relates to fused azepinone derivative of general formula (I) or an agriculturally acceptable salt thereof wherein X is CO2R2 or H; Y is OH; NHNR3R4, NHNHC(═Z)NR5R6 or NHNHC(═Z)CR7R8R9; or X and Y together with the two carbon atoms to which they are attached form a ring of formula (A) and a method for treatment of plants with such compounds in order to induce growth regulating responses. |
| US07767649B2 |
Amino acid conjugates providing for sustained systemic concentrations of GABA analogues
This invention is directed to compounds that provide for sustained systemic concentrations of GABA analogs following administration to animals. This invention is also directed to pharmaceutical compositions including and methods using such compounds. |
| US07767643B2 |
Protection, restoration, and enhancement of erythropoietin-responsive cells, tissues and organs
Methods and compositions are provided for protecting or enhancing an erythropoietin-responsive cell, tissue, organ or body part function or viability in vivo, in situ or ex vivo in mammals, including human beings, by systemic or local administration of an erythropoietin receptor activity modulator, such as an erythropoietin or a modified erythropoietin. |
| US07767639B2 |
Unsaturated ethers as perfuming ingredients
The present invention concerns a compound of formula wherein the wavy line indicates that the double bond in position 3 is in a configuration E or Z or a mixture thereof, and R is a C2-C6 alkyl or alkenyl group, which is a useful perfuming ingredient capable of imparting odor notes of the violet leaves type as well as a green/fruity aspect. |
| US07767636B2 |
Nanoelectronic and microelectronic cleaning compositions
Nanoelectronic and microelectronic cleaning corn positions for cleaning nanoelectronic and microelectronic substrates under supercritical fluid state conditions, and particularly cleaning compositions useful with and having improved compatibility with nanoelectronic and microelectronic substrates characterized by silicon dioxide, sensitive low-n or high-K dielectrics and copper, tungsten, tantalum, nickel, gold, cobalt, palladium, platinum, chromium, ruthenium, rhodium, iridium, hafnium, titanium, molybdenum, tin and other metallization, as well as substrates of A1 or Al(Cu) metallizations and advanced interconnect technologies, are provided by nanoelectronic and microelectronic cleaning compositions. |
| US07767633B2 |
Low sulfur and low phosphorus heavy duty diesel engine lubricating oil composition
The present invention is directed to a low sulfur and low phosphorus heavy duty diesel engine lubricating oil composition comprising (a) a major amount of an oil of lubricating viscosity and (b) one or more dispersants (c) one or more anti-oxidants and (d) one or more ash-containing detergents, wherein the lubricating oil composition is essentially free of zinc di-alkyl di-thiophosphates and contains no more than 0.175 weight percent sulfur and provided the lubricating oil composition does not contain alkylated and non-alkylated aromatic amines and tri-nuclear molybdenum compounds. The present invention is also directed to a low sulfur and low phosphorus heavy duty diesel engine lubricating oil composition comprising (a) an oil of lubricating viscosity (b) a borated dispersant and a non-borated dispersant (c) a molybdenum anti-oxidant and a phenolic anti-oxidant and (d) a low overbased calcium sulfonate and a high overbased calcium phenate, wherein the lubricating oil composition is essentially free of zinc di-alkyl di-thiophosphates and contains no more than 0.175 weight percent sulfur and provided the lubricating oil composition does not contain alkylated and non-alkylated aromatic amines and tri-nuclear molybdenum compounds. The present invention is also directed to method for lubricating a heavy duty diesel engines, which comprises lubricating the engine with a low sulfur and low phosphorus heavy duty diesel engine lubricating oil compositions of the present invention. |
| US07767630B2 |
Method of treating a well with a gel stabilizer
The present invention relates to the use of chalcogen heterocyclic electron donating compounds as thermal decomposition reduction additives for gels used in well treatment fluids such as drilling fluids, fracturing fluids, and well completion and workover fluids. |
| US07767623B2 |
Siliconated phenyl amides derivatives useful as microbiocide
A fungicidal compound of formula (1): where Het is a 5- or 6-membered heterocyclic ring containing one to three heteroatoms, each independently selected from oxygen, nitrogen and sulphur, the ring being substituted by groups R7, R8 and R9; R1 is hydrogen, optionally substituted (C1-4)alkylC(═O), optionally substituted (C1-4)alkylC(═O)O, optionally substituted (C1-4)alkoxy(C1-4)alkyl, optionally substituted allyl, optionally substituted propargyl or optionally substituted allenyl; R2, R3, R4and R5 are each, independently, hydrogen, halogen, optionally substituted (C1-4)alkoxy(C1-4)alkoxy or optionally substituted (C1-4)alkoxy(C1-4)alkyl; R6 is an organic group containing three to thirteen carbon atoms and at least one silicon atom and, optionally, one to three heteroatoms, each independently selected from oxygen, nitrogen and sulphur, and is optionally substituted by one to four independently selected halogen atoms; R7, R8 and R9are each, independently, hydrogen, halogen, C1-3alkyl, C1-3haloalkyl, C1-3alkoxy(C1-3)alkyl or cyano, where at least one of R7, R8and R9 is not hydrogen; and X is O or S; or an N-oxide thereof; and when present, each optional substituent on alkyl moieties, allyl, propargyl and allenyl is, independently, selected from halogen, hydroxy, cyano, methoxycarbonyl, ethoxycarbonyl, methoxy, ethoxy, methylsulfonyl, ethylsulfonyl, diflouromethoxy, trifluoromethoxy and trifluorothiomethoxy. |
| US07767622B2 |
Catalytic converter with improved start-up behaviour
In automotive exhaust gas catalysts with a metallic honeycomb composed of corrugated and smooth sheet layers, it is known that the heat capacity and thermal conductivity of the honeycomb can be reduced by perforations in the sheet layers. As a result, the honeycomb heats up more rapidly and the catalytic coating applied on the honeycomb reaches its operating temperature more rapidly. A disadvantage here is the reduction in the support surface area by the perforations in the sheet layers. According to the invention, suitable adjustment of the properties of the coating suspension used for the catalytic coating and of the dimensions of the holes relative to one another allows the holes to be filled permanently with catalyst material. The resulting catalyst has, at the same coating concentration as a catalyst with unperforated sheet layers, a significantly reduced heat capacity and thermal conductivity. |
| US07767620B2 |
Hybrid porous organic-metal oxide materials
The present invention provides a synthetic strategy for creating a new class of materials called hybrid mesoporous, macroporous, or mesoporous-macroporous organometaloxide materials, exemplified but not limited to hybrid mesoporous organosilicas. This strategy involves taking a pre-assembled mesoporous material having a porous framework and then attaching an organic, inorganic or biological guest molecule to the pore walls of the framework material through two or more chemical linkages. The unusual combination of inorganic and organic components organized into a material with mesoscale porosity and having bridge bonded organic, organometallic, or biological functionalized surfaces suggests a myriad of uses for these composite materials, such as the controlled release and uptake of chemicals and drugs, chiral separations and catalysis, electronic printing and microelectronic packaging, thermal and acoustical insulation. |
| US07767619B2 |
Promoted calcium-aluminate supported catalysts for synthesis gas generation
A promoted calcium-alumina supported reforming catalyst that is particularly useful for reforming reactions where low H2/CO ratio synthesis gas, such as less than 2.3 is generated directly is disclosed. The catalyst comprises from about 25 wt % to about 98 wt % alumina, from about 0.5 wt % to about 35 wt % calcium oxide, from about 0.01 wt % to about 35 wt % of a promoter, and from about 0.05 wt % to about 30 wt % of an active metal. The promoter is selected from the group consisting of titanium, zirconium, yttrium, niobium, elements of the lanthanum-series, such as, without limitation, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, europium, gadolinium, ytterbium, and combinations thereof. The active metal is selected from the group consisting of nickel, cobalt, rhodium, ruthenium, palladium, platinum, iridium and combinations thereof as active metal, wherein the calcium oxide is combined with the alumina to form aluminum-rich calcium aluminates. |
| US07767617B2 |
Reduced maximum reducibility temperature zirconium oxide and cerium oxide based composition, method for the production and use thereof as a catalyst
A composition is based on zirconium oxide and cerium oxide with a proportion of zirconium oxide amounting to at least 50% by mass, having a maximum reducibility temperature of no more than 500° C. and a specific surface of at least 40 m2/g after 6 hours calcination at 500° C. in the form of a tetragonal phase. The composition can be used as a catalyst. |
| US07767614B2 |
Method for preparation of spherical support for olefin polymerization catalyst
Provided is a method for preparing a support for olefin polymerization catalysts used in polyolefin preparation processes. Particularly, provided is a novel method for preparing a support for olefin polymerization catalysts comprising the reaction of metal magnesium with an alcohol in the presence of an additive for initiating the reaction, characterized in that halogenated nitrogen compound is used as the additive for initiating the reaction, resulting in a spherical dialkoxy magnesium support. |
| US07767613B2 |
Polyethylene and catalyst composition for its preparation
Polyethylene which comprises ethylene homopolymers and copolymers of ethylene with α-olefins and has a molar mass distribution width Mw/Mn of from 6 to 100, a density of from 0.89 to 0.97 g/cm3, a weight average molar mass Mw of from 5000 g/mol to 700,000 g/mol and has from 0.01 to 20 branches/1000 carbon atoms and at least 0.5 vinyl groups/1000 carbon atoms, wherein the 5-50% by weight of the polyethylene having the lowest molar masses have a degree of branching of less than 10 branches/1000 carbon atoms and the 5-50% by weight of the polyethylene having the highest molar masses have a degree of branching of more than 2 branches/1000 carbon atoms, a process for its preparation, catalysts suitable for its preparation and also fibers, moldings, films or polymer blends in which this polyethylene is present. |
| US07767611B2 |
Modified zeolite beta
A modified zeolite beta having an anhydrous chemical formula, by weight % of the oxides, of (0-0.3)Na2O.(0.5-10)Al2O3.(1.3-10)P2O5.(0.7-15)MxOy.(70-97)SiO2, wherein M is one or more transition metal(s) selected from the group consisting of Fe, Co, Ni, Cu, Mn, Zn and Sn, x is the number of the atoms of said transition metal M, and y is a number that meets with the requirement of the oxidation state of said transition metal M, is disclosed. The modified zeolite beta can be used as an active component of a cracking catalyst or additive for catalytic cracking of petroleum hydrocarbons. |
| US07767610B1 |
Metal nanoparticles as a conductive catalyst
A metal nanocluster composite material for use as a conductive catalyst. The metal nanocluster composite material has metal nanoclusters on a carbon substrate formed within a porous zeolitic material, forming stable metal nanoclusters with a size distribution between 0.6-10 nm and, more particularly, nanoclusters with a size distribution in a range as low as 0.6-0.9 nm. |
| US07767607B2 |
Glass composition, glass article, glass substrate for magnetic recording media, and method for producing the same
A glass substrate of the present invention for magnetic recording media having high heat resistance and easy chemical strengthening ability at once has not been obtained, which is a glass composition essentially comprising 60 to 70 wt % SiO2, 5 to 20 wt % Al2O3, 0 to 1 wt % Li2O, 3 to 18 wt % Na2O, 0 to 9 wt % K2O, 0 to 10 wt % MgO, 1 to 15 wt % CaO, 0 to 4.5 wt % SrO, 0 to 1 wt % BaO, 0 to 1 wt % TiO2 and 0 to 1 wt % ZrO2, wherein the sum of Li2O, Na2O and K2O is from 5 to 25 wt %, and the sum of MgO, CaO, SrO and BaO is from 5 to 20 wt %. |
| US07767604B2 |
Ga—P—S glass compositions
Ga—P—S glass compositions that may have application in infrared (IR) windows, waveguiding fibers, or as host glasses for luminescent dopants are described. |
| US07767602B2 |
Flameproof artificial leather
A flameproof artificial leather comprising an artificial leather base fabric in which thermoplastic synthetic fibers are three dimensionally interlaced with each other and a water-soluble polyurethane resin, and having a layer (A) that is a surface layer and a layer (B) that is other than the layer (A), the fiber forming the layer (A) is an extremely fine thermoplastic synthetic fiber having a size of 0.5 dtex or less and excellent in a resistance to abrasion and/or a resistance to light, the extremely fine thermoplastic synthetic fiber being formed from a polyester homopolymer that has an intrinsic viscosity (IV) of 0.50 to 0.70, the content of the extremely fine thermoplastic synthetic fiber being from 10 to 60% by weight based on the artificial leather base fabric, at least one layer of the layer (B) having a phosphorus-containing flameproof thermoplastic synthetic fiber, the content of phosphorus being 0.09% by weight or more based on the artificial leather base fabric, the content of the water-soluble polyurethane resin being from 5 to 20% by weight based on the artificial leather base fabric. |
| US07767597B2 |
Fire-barrier film laminate
A fire-blocking paper (22, 52) is adapted for incorporation into a fire-barrier film laminate (16, 46) for use in thermal and acoustical insulation systems (10, 40), such as, but not limited to, those used in commercial aircraft. The fire-blocking inorganic fiber paper (22, 52) can be laminated to a flame resistant film (24a, 24b, 54a, 54b). The fire-blocking paper (22, 52) may include inorganic bio-soluble fiber, chopped glass non-respirable fibers, organic reinforcing fibers, organic binder, and inorganic binder or filler; and, optionally or refractory ceramic fibers. |
| US07767594B2 |
Semiconductor device producing method
Disclosed is a producing method of a semiconductor device, including: loading at least one substrate formed on a surface thereof with a tungsten film into a processing chamber; and forming a silicon oxide film on the surface of the substrate which includes the tungsten film by alternately repeating following steps a plurality of times: supplying the processing chamber with a first reaction material including a silicon atom while heating the substrate at 400° C.; and supplying the processing chamber with hydrogen and water which is a second reaction material while heating the substrate at 400° C. at a ratio of the water with respect to the hydrogen of 2×10−1 or lower. |
| US07767593B2 |
Semiconductor device including field effect transistors laterally enclosed by interlayer dielectric material having increased intrinsic stress
By appropriately treating an interlayer dielectric material above P-channel transistors, the compressive stress may be significantly enhanced, which may be accomplished by expanding the interlayer dielectric material, for instance, by providing a certain amount of oxidizable species and performing an oxidation process. |
| US07767592B2 |
Method for forming a mask pattern for ion-implantation
A method for forming a mask pattern for ion-implantation comprises: forming a gate line pattern over a semiconductor substrate; forming a coating layer on the surface of gate line pattern; performing a plasma treatment on the top portion of the gate line pattern; forming a photoresist layer over the resulting structure; and performing an exposure and a developing processes to form a photoresist pattern on the gate line pattern. |
| US07767589B2 |
Passivation layer for a circuit device and method of manufacture
According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2. |
| US07767587B2 |
Method of forming an interconnection structure in a organosilicate glass having a porous layer with higher carbon content located between two lower carbon content non-porous layers
Interconnect structures possessing a non-porous (dense) low-k organosilicate glass (OSG) film utilizing a porous low-k OSG film as an etch stop layer or a porous low-k OSG film using a non-porous OSG film as a hardmask for use in semiconductor devices are provided herein. The novel interconnect structures are capable of delivering improved device performance, functionality and reliability owing to the reduced effective dielectric constant of the stack compared with that of those conventionally employed and also because of the relatively uniform line heights made feasible by these unique and seemingly counterintuitive features. The present invention also provides a fluorocarbon-based dual damascene etch process that achieves selective etching of a dense low-k OSG films relative to that of a porous low-k OSG film owing to the tunability of the gas-phase fluorine:carbon ratio (gas dissociation) and ion current below a critical threshold and given the larger carbon content of the porous film relative to that of the dense film. |
| US07767585B2 |
Method of cleaning and process for producing semiconductor device
A method of cleaning for removing metal compounds attached to a surface of a substrate, wherein the cleaning is conducted by supplying a supercritical fluid of carbon dioxide comprising at least one of triallylamine and tris(3-aminopropyl)amine to the surface of the substrate and a process for producing a semiconductor device using the method of cleaning are provided. In accordance with the method of cleaning and the method for producing a semiconductor device using the method, etching residues or polishing residues containing metal compounds are efficiently removed selectively from the electroconductive material forming the electroconductive layer. When the electroconductive layer is a wiring, an increase in resistance due to residual metal compounds can be suppressed, and an increase in the leak current due to diffusion of the metal from the metal compounds to the insulating film can be prevented. Therefore, reliability on the wiring is improved, and the yield of the semiconductor device can be increased. |
| US07767581B2 |
Barrier polishing fluid
The polishing fluid is useful for polishing tantalum-containing barrier materials of a semiconductor substrate. The polishing fluid includes a nitrogen-containing compound having at least two nitrogen atoms comprising imine compounds and hydrazine compounds. The nitrogen-containing compound is free of electron-withdrawing substituents; and the polishing fluid is capable of removing the tantalum-containing barrier materials from a surface of the semiconductor substrate without an abrasive. |
| US07767577B2 |
Nested and isolated transistors with reduced impedance difference
A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, Rs of transistors in iso and nested regions can be matched. |
| US07767576B2 |
Wafer level package having floated metal line and method thereof
A method of forming a wire structure connecting to a bonding pad of a semiconductor chip includes depositing a passivation layer on an active surface of the semiconductor chip, depositing a seed metal layer on the bonding pad and the passivation layer, depositing a metal layer on the seed metal layer, etching selected portions of the seed metal layer, leaving unetched a first area, overlapping the bonding pad and a second area overlapping a connection pad, wherein the wire structure is formed by the metal layer being electrically connected to the bonding pad and the connection pad, but floating from the passivation layer, and depositing an insulting layer on the wire structure. |
| US07767575B2 |
Forming robust solder interconnect structures by reducing effects of seed layer underetching
A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier layer is formed over an exposed portion of the seed layer, the exposed portion defined by a first patterned opening of a first diameter, and a solder material is formed over the barrier layer using a second patterned opening of a second diameter. The second patterned opening is configured such that the second diameter is larger than the first diameter. |
| US07767573B2 |
Layout for high density conductive interconnects
In one embodiment of the present invention, a method for connecting a plurality of bit lines to sense circuitry comprises providing a plurality of bit lines extending from a memory array in a first metal layer. The plurality of bit lines are separated from each other by an average spacing x in a first region of the first metal layer. The method further comprises elevating a portion of the plurality of bit lines into a second metal layer overlying the first metal layer. The elevated bit lines are separated from each other by an average spacing y in the second metal layer, with y >x. The method further comprises extending a portion of the plurality of bit lines into a second region of the first metal layer. The extended bit lines are separated from each other by an average spacing z in the second region of the first metal layer, with z>x. The method further comprises connecting a bit line in the second metal layer and a bit line in the first metal layer to the sense circuitry. |
| US07767564B2 |
Nanowire electronic devices and method for producing the same
The present invention is directed to an electrical device that comprises a first and a second fiber having a core of thermoelectric material embedded in an electrically insulating material, and a conductor. The first fiber is doped with a first type of impurity, while the second fiber is doped with a second type of impurity. A conductor is coupled to the first fiber to induce current flow between the first and second fibers. |
| US07767562B2 |
Method of implanting using a shadow effect
A semiconductor body has a first portion, a second portion, and an active area located between the first portion and the second portion. The first portion and the second portion are a shallow trench isolation region having an exposed surface extending above the surface of the active area. A first ion implantation is performed at a first angle such that a first shaded area defined by the exposed surface of the first portion and the first angle is exposed to fewer ions than a first unshaded area. A second ion implantation is performed at a second angle such that a second shaded area defined by the exposed surface of the second portion and the second angle is exposed to fewer ions than a second unshaded area. |
| US07767561B2 |
Plasma immersion ion implantation reactor having an ion shower grid
A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural elongate orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid. |
| US07767557B2 |
Chilled wafer dicing
A method for dicing a wafer is disclosed. One illustrative method includes forming a layer of frozen material above a plurality of integrated circuit dies on a substrate and performing a cutting process to cut through the layer of frozen material and the substrate to singulate the plurality of dies. Another method includes performing a cutting process to singulate a plurality of integrated circuit dies having a layer of frozen material formed above the plurality of dies. |
| US07767556B2 |
Adhesive sheet for laser dicing and its manufacturing method
An adhesive sheet for laser dicing is used for dicing a workpiece into individual chips by light absorption ablation of laser beam and has at least an adhesive layer on one side of a base material which has a surface opposite to the adhesive layer having no convex parts of width (W) of 20 mm or less and height (h) of 1 μm or more, or no concave parts of width (W) of 20 mm or less and depth (d) of 1 μm or more. |
| US07767554B2 |
Method of manufacturing semicondictor chip
An object is to provide a semiconductor chip manufacturing method capable of removing test patterns in a higher efficiency in simple steps, while a general-purpose characteristic can be secured.In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, laser light 5a is irradiated from the side of a circuit forming plane 1a so as to remove the test patterns 4; and thereafter, under such a condition that a circuit protection seat 6 is adhered onto a circuit forming plane 1a, a rear plane of the circuit forming plane 1a is mechanically thinned; a mask-purpose seat is adhered onto the rear plane 1b of the semiconductor wafer 1 after the plane thinning process; and then, a plasma dicing-purpose mask is work-processed by irradiating laser light. As a consequence, the semi-conductor wafer 1 can be held by employing one set of the circuit protection seat 6 from the thinning process up to the plasma dicing process. |
| US07767553B2 |
Method and apparatus for printing conductive ink
Conductive ink is printed onto a wafer held on a vertically movable stage by using a squeegee to force the conductive ink through a stencil. The stencil is supported from below by a supporting member adjacent to the periphery of the stage. After the conductive ink has been printed through the stencil, pneumatic pressure is applied to the stencil from above, and the stage is lowered to separate the wafer from the stencil. The supporting member holds the stencil taut while the stage is being lowered, so that the stencil does not warp downward and the printed conductive ink leaves the stencil at substantially the same time at all points on the wafer surface, preventing the premature escape of air and loss of pneumatic pressure. |
| US07767548B2 |
Method for manufacturing semiconductor wafer including a strained silicon layer
A method for manufacturing a semiconductor wafer with a strained Si layer having sufficient tensile strain and few crystal defects, while achieving a relatively simple layered structure, is provided. The method includes the steps of: (a) forming an SiGe mixed crystal layer 12 and a first Si layer 13 in this order on the surface of a silicon wafer 11; (b) forming an SiO2 layer 16 on top of the first Si layer and/or a support wafer 14; (c) forming a layered product 17 by stacking the silicon wafer and the support wafer with the SiO2 layer being placed therebetween; (d) forming a second Si layer 18 by thinning the silicon wafer of the layered product; (e) implanting hydrogen ion and/or rare gas ion, such that ionic concentration peaks in a predetermined area; (f) subjecting the layered product to a first heat treatment; and (g) carrying out a second heat treatment following the first heat treatment, thereby relaxing the SiGe mixed crystal layer and diffusing Ge through portions of the first Si layer and the second Si layer. |
| US07767545B2 |
Substrate production method and substrate including amorphization and recrystallizing a top region
A process for the manufacture of a substrate having a top layer of a first material and an underlying layer of a second material whose lattice parameter is different from that of the first material. The process includes the steps of conducting an amorphization of the top layer to create an amorphous region in the top layer lying between an exposed surface and an amorphization interface, with that portion of the top layer below the interface being shielded from the amorphization and remaining as a crystalline structure; recrystallizing the amorphous region while also creating a network of defects at the interface, wherein the network forms a boundary for dislocations from the crystalline structure of the top layer, and containing the dislocations in the portion of the top layer that is located below the interface. Also, the substrates obtained by the method. |
| US07767542B2 |
Manufacturing method of SOI substrate
There is provided a method of manufacturing an SOI substrate which is practicable even when a supporting substrate having a low allowable temperature limit is used. A separation layer is formed in a region at a certain depth from a surface of a semiconductor substrate, and a first heat treatment is conducted when a semiconductor layer on the separation layer is bonded to the supporting substrate and separated. A second heat treatment is conducted to the supporting substrate to which the semiconductor layer is bonded. The second heat treatment is conducted at a temperature which is equal to or higher than the temperature of the first heat treatment and does not exceed a strain point of the supporting substrate. When the first heat treatment and the second heat treatment are conducted at the same temperature, a treatment time of the second heat treatment may be set to be longer. |
| US07767541B2 |
Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods
A semiconductor structure that includes a monocrystalline germanium-containing layer, preferably substantially pure germanium, a substrate, and a buried insulator layer separating the germanium-containing layer from the substrate. A porous layer, which may be porous silicon, is formed on a substrate and a germanium-containing layer is formed on the porous silicon layer. The porous layer may be converted to a layer of oxide, which provides the buried insulator layer. Alternatively, the germanium-containing layer may be transferred from the porous layer to an insulating layer on another substrate. After the transfer, the insulating layer is buried between the latter substrate and the germanium-containing layer. |
| US07767538B2 |
Method for manufacturing semiconductor device
It is made possible to form a silicon nitride film, an aluminum oxide film and a transition metal high-k insulation film of high quality. A manufacturing method includes: forming an insulation film having at least one kind of bonds selected out of silicon-nitrogen bonds, aluminum-oxygen bonds, transition metal-oxygen-silicon bonds, transition metal-oxygen-aluminum bonds, and transition metal-oxygen bonds on either a film having a semiconductor as a main component or a semiconductor substrate, and irradiating the insulation film with pulse infrared light having a wavelength corresponding to a maximum intensity in a wavelength region depending upon the insulation film and having a wavelength absorbed by the insulation film. |
| US07767536B2 |
Semiconductor device and fabricating method thereof
A semiconductor device and fabrication method thereof are disclosed. An example semiconductor device includes a semiconductor substrate having a device isolation area defining an active area; a gate oxide layer formed on the active area of the substrate; a gate on the gate oxide layer; a spacer provided to a sidewall of the gate; and a well region provided within the active area. The well region includes a threshold voltage adjustment doped region, a halo region, a source region, a drain region, an additional doped region, and a channel stop region, the additional doped region provided between the well region and each of the source and drain regions. |
| US07767534B2 |
Methods for fabricating MOS devices having highly stressed channels
Methods for forming a semiconductor device comprising a silicon-comprising substrate are provided. One exemplary method comprises depositing a polysilicon layer overlying the silicon-comprising substrate, amorphizing the polysilicon layer, etching the amorphized polysilicon layer to form a gate electrode, depositing a stress-inducing layer overlying the gate electrode, annealing the silicon-comprising substrate to recrystallize the gate electrode, removing the stress-inducing layer, etching recesses into the substrate using the gate electrode as an etch mask, and epitaxially growing impurity-doped, silicon-comprising regions in the recesses. |
| US07767531B2 |
Method of forming transistor having channel region at sidewall of channel portion hole
According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predetermined portion of the active region of the semiconductor substrate. Two channel portion holes are formed to extend downward from a main surface of the semiconductor substrate to be in contact with the channel region. Gate patterns fill the channel portion holes and cross the active region. The resulting transistor is capable of ensuring a constant threshold voltage without being affected by an alignment state of the channel portion hole and the gate pattern. |
| US07767530B2 |
Transistor having recess channel and fabricating method thereof
A transistor includes a substrate including a trench, an insulation layer filled in a portion of the trench, the insulation layer having a greater thickness over an edge portion of a bottom surface of the trench than over a middle portion of the bottom surface of the trench, a gate insulation layer formed over inner sidewalls of the trench, the gate insulation layer having a thickness smaller than the insulation layer, and a gate electrode filled in the trench. |
| US07767528B2 |
Field effect transistor and fabrication method
A field effect transistor (FET) and fabrication method are disclosed. The FET includes a drift region formed in a substrate. A trench adjoins the drift region and contains at least one control region and a connection region. An inversion channel region is isolated from the control region. A portion of the trench extends to the same depth as a second trench that insulates the FET from other components formed in the substrate. Insulating material is disposed between the trench below the control region and the control region. An insulating layer insulates the FET from the substrate. The trench and/or the connection region may extend into the insulating layer or may be isolated from the insulating layer via the drift region. |
| US07767521B2 |
Cell region layout of semiconductor device and method of forming contact pad using the same
A cell region layout of a semiconductor device formed by adding active regions in the outermost portion of a cell region, and a method of forming a contact pad using the same are provided. The layout and the method include a first active region formed at the outermost portion of the cell region, and having the same shape as that of an inner active region located inwardly from the outermost portion of the cell region, and a third active region formed by adding at least two second active regions having shapes different from that of an inner active region. Further, an insulating layer fills a portion below a bit line passing the third active region. A lifting phenomenon occurring where an active region is not formed can be prevented by adding the active regions at the outermost portion of the cell region, and a bridge phenomenon occurring when bit lines or a bit line contact and a gate line electrically contact can be suppressed by filling a portion below a bit line with an insulating layer. |
| US07767517B2 |
Semiconductor memory comprising dual charge storage nodes and methods for its fabrication
A dual charge storage node memory device and methods for its fabrication are provided. In one embodiment a dielectric plug is formed comprising a first portion recessed into a semiconductor substrate and a second portion extending above the substrate. A layer of semiconductor material is formed overlying the second portion. A first layered structure is formed overlying a first side of the second portion of the dielectric plug, and a second layered structure is formed overlying a second side, each of the layered structures overlying the layer of semiconductor material and comprising a charge storage layer between first and second dielectric layers. Ions are implanted into the substrate to form a first bit line and second bit line, and a layer of conductive material is deposited and patterned to form a control gate overlying the dielectric plug and the first and second layered structures. |
| US07767515B2 |
Managing integrated circuit stress using stress adjustment trenches
Roughly described, methods and systems for improving integrated circuit layouts and fabrication processes in order to better account for stress effects. Dummy features can be added to a layout either in order to improve uniformity, or to relax known undesirable stress, or to introduce known desirable stress. The dummy features can include dummy diffusion regions added to relax stress, and dummy trenches added either to relax or enhance stress. A trench can relax stress by filling it with a stress-neutral material or a tensile strained material. A trench can increase stress by filling it with a compressive strained material. Preferably dummy diffusion regions and stress relaxation trenches are disposed longitudinally to at least the channel regions of N-channel transistors, and transversely to at least the channel regions of both N-channel and P-channel transistors. Preferably stress enhancement trenches are disposed longitudinally to at least the channel regions of P-channel transistors. |
| US07767512B2 |
Methods of manufacturing a semiconductor device including CMOS transistor having different PMOS and NMOS gate electrode structures
In a method of manufacturing a semiconductor device, a gate insulation layer is formed on a substrate including a first channel of a first conductive type and a second channel of a second conductive type different from the first conductive type. A first conductive layer including a first metal is formed on the gate insulation layer, and a second conductive layer including a second metal different from the first metal is formed on the first conductive layer formed over the second channel. The second conductive layer is partially removed by a wet etching process to form a second conductive layer pattern over the second channel. |
| US07767509B2 |
Methods of forming a multilayer capping film to minimize differential heating in anneal processes
Methods and associated structures of forming a microelectronic device are described. Those methods may include implanting the source/drain region, forming a multilayer cap on the source/drain region, annealing the source/drain region, and removing the multilayer cap. |
| US07767502B2 |
Method for manufacturing electronic device using thin film transistor with protective cap over flexible substrate
In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap. |
| US07767500B2 |
Superjunction device with improved ruggedness
An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness. |
| US07767499B2 |
Method to form upward pointing p-i-n diodes having large and uniform current
A method is disclosed to form an upward-pointing p-i-n diode formed of deposited silicon, germanium, or silicon-germanium. The diode has a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The top heavily doped p-type region is doped with arsenic, and the semiconductor material of the diode is crystallized in contact with an appropriate silicide, germanide, or silicide-germanide. A large array of such upward-pointing diodes can be formed with excellent uniformity of current across the array when a voltage above the turn-on voltage of the diodes is applied. This diode is advantageously used in a monolithic three dimensional memory array. |
| US07767497B2 |
Microelectronic package element and method of fabricating thereof
Microelectronic package elements and packages having dielectric layers and methods of fabricating such elements packages are disclosed. The elements and packages may advantageously be used in microelectronic assemblies having high routing density. |
| US07767496B2 |
Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer
A semiconductor device is made by first forming a protective layer over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer. |
| US07767492B1 |
Location-based bus termination for multi-core/multi-package processor configurations
A multi-core/multi-package bus termination apparatus includes a first node, a location array, and a plurality of drivers. The first node receives a signal indicating whether a package upon which the processor core is disposed is internal to the bus or at a far end of the bus. The location array generates location signals indicating locations on the bus of nodes, where the locations are either an internal location or a bus end location. The drivers control how the nodes are driven. Each drivers has location-based multi-core/multi-package logic. The location-based multi-core/multi-package logic enables pull-up logic and first pull-down logic responsive to states of the first node ad the location signals. |
| US07767488B2 |
Method for forming a stacked structure of an insulating layer and an organic semiconductor layer, organic field effect transistor and method for making same
A method for making an organic field effect transistor of a bottom gate/bottom contact type or a bottom gate/top contact type is provided. The method comprises (a) forming a gate electrode 12 on a support and forming a gate insulating layer 13 on the support 10 and the gate electrode 12, and (b) forming, on the gate insulating layer 13, source/drain electrodes 14 and an organic semiconductor region 15 made of an organic semiconductor material and constituting a channel forming region 16. The gate insulating layer 12 is formed by applying a solution of a mixture of an insulating polymer material and a surface treating agent onto the support 10 and the gate electrode 12 and drying. The organic field effect transistors are also provided. |
| US07767487B2 |
Formation of contacts on semiconductor substrates
Embodiments of the invention are concerned with a method of manufacturing a radiation detector having one or more conductive contacts on a semiconductor substrate, and comprise the steps of: applying a first conductive layer to a first surface of the semiconductor substrate; applying a second conductive layer to form a plurality of contiguous layers of conductive materials, said plurality of contiguous layers including said first conductive layer; and selectively removing parts of said plurality of contiguous layers so as to form said conductive contacts, the conductive contacts defining one or more radiation detector cells in the semiconductor substrate. |
| US07767486B2 |
High-volume on-wafer heterogeneous packaging of optical interconnects
An optical connector module complete with optoelectronic devices, supporting integrated circuitry, and connector housing may be fabricated on a wafer level. A plurality of cavities may be formed on the backside of the wafer to accommodate an optoelectronic device. Active circuitry may be formed in a front side of the wafer. Through-vias electrically connect the front side to the back side. The backside of the wafer is overmolded with a polymer layer which when singulated into individual dies forms the plastic housing of an optical connector module. |
| US07767483B1 |
Dual-suspension system for MEMS-based devices and method for fabricating same
A method for fabricating a dual-suspension system for MEMS-based devices includes: etching the geometry of an upper spring system, a lower spring system, and a proof mass into a substrate; applying a protective barrier to cover at least the exposed portions of the first layer of silicon; etching through portions of the protective barrier and handle wafer to define the shapes of the upper spring system, lower spring system, and proof mass; removing the remainder of the protective barrier; and removing the first layer of oxide from the areas in contact with the upper spring system and removing the second layer of oxide from the areas in contact with the lower spring system. Electrical contacts may be created on the substrate. A wafer may be bonded to the support structure on a side of the substrate. A MEMS-based device fabricated from the method is also provided. |
| US07767481B2 |
Image sensor and method for manufacturing the same
Disclosed are an image sensor and a method for manufacturing the same, capable of increasing a light absorbing coefficient by forming a rough surface on a photodiode. The image sensor includes a semiconductor substrate with a plurality of photodiodes thereon having rough upper surfaces, a dielectric layer on the semiconductor substrate, a color filter layer on the dielectric layer, a planarization layer on an entire surface of the semiconductor substrate including the color filter layer, and a plurality of micro-lenses formed on the planarization layer to correspond to the color filter layer. |
| US07767480B1 |
Method for semiconductor compositional grading to realize low-resistance, distributed Bragg reflectors
A method of manufacturing a distributed Bragg reflector (DBR) in group III-V semiconductor compounds with improved optical and electrical characteristics is provided. A selected DBR structure is achieved by sequential exposure of a substrate to predetermined combinations of the elemental sources to produce a pair of DBR layers of compound alloys and a graded region including one or more discrete additional layers between the DBR layers of intermediate alloy composition. Exposure durations and combinations of the elemental sources in each exposure are predetermined by DBR design characteristics. |
| US07767478B2 |
Thin film transistor array panel and method for manufacturing the same
The invention provides a thin film transistor (TFT) array panel that includes an insulating substrate; a gate line formed on the insulating substrate and having a first layer of an Al containing metal, a second layer of a Cu containing metal that is thicker than the first layer, and a gate electrode; a gate insulating layer arranged on the gate line; a semiconductor arranged on the gate insulating layer; a data line having a source electrode and arranged on the gate insulating layer and the semiconductor; a drain electrode arranged on the gate insulating layer and the semiconductor and facing the source electrode; a passivation layer having a contact hole and arranged on the data line and the drain electrode; and a pixel electrode arranged on the passivation layer and coupled with the drain electrode through the contact hole. |
| US07767470B2 |
Semiconductor wafers with highly precise edge profile and method for producing them
A semiconductor wafer has a front side, a rear side and an edge which runs along the circumference of the semiconductor wafer and which connects the front side and the rear side of the edge having a defined edge profile, the edge profile being substantially constant over the entire circumference of the semiconductor wafer. A method for producing such a wafer allows for production of a multiplicity of semiconductor wafers, the edge profile being substantially constant from semiconductor wafer to semiconductor wafer. |
| US07767468B2 |
Repetitive affinity separation and uses therefor
Improved methods for the separation, isolation, enrichment, or detection of target molecules, such as nucleic acids and proteins, within dilute or heterogeneous samples, such as bodily fluids, excreta or tissue samples, are disclosed. The methods include repetitively and rapidly passing a sample across at least one region of a conduit in which at least one region includes a binding partner specific for the target molecule. In certain methods, at least one other region includes binding partners specific for non-target molecules. The sample may be passed over the binding partner in the same direction if the conduit is a loop or in an antiparallel direction (i.e., back and forth over the binding partner). In an embodiment, the sample is electrophoresed through or over an electrophoretic medium, in which at least one region includes a binding partner for the target molecule. The invention also provides apparatus and sample preparation systems adapted for use in the methods. |
| US07767467B1 |
Coaxial tubular sequestering device for micro spheres and cells
A device for the separation of small particles or cells from a fluid suspension of the same is described. The device includes a coaxial tubular design in which the inner tube is a micro porous tube that allows the passage of liquids and certain particulates up to a certain size cut-off, and the outer tube allows for the collection of passed fluids. Inlet and outlet ports allow the introduction and flushing of components of interest. Embodiments of the device can be used for the separation of blood components, the sequestering of micro spheres used in micro-sphere-based immuno assay, and sample filtration. Other applications are not precluded. Another field of application for this device is in the separation of plasma from red blood cells. The red blood cells will not pass through the membrane due to their size, but plasma will. |
| US07767466B2 |
Sample filtering method using sample collecting container, jig and sample collecting container
A method for filtrating liquid sample such as blood or the like with a filter member utilizing inner vacuum, the same enabling completion of filtration without removing a stopper, and superior in safety and being free from contamination.In collecting and filtrating the liquid sample using a sample collection vessel 1, in which a sample-collecting part 3 containing a filter member 4 is inserted in a vacuumed sample-storing part 2, the sample storing part 2 and sample-collecting part 3 are air-tightly sealed with a stopper 5, the liquid sample such as blood or the like collected in the sample-collecting part 3 is filtrated by the filter member 4. When the filtration stops, a hollow needle 12 is pierced through the stopper 5 and thus the sample-collecting part 3 is communicated with atmosphere, thereby the pressure in the sample-collecting part 3 being enhanced upper than in atmosphere to enable the filtration again. |
| US07767464B2 |
Method for detecting counterfeit paper currency
A composition and method of detecting counterfeit paper currency includes applying a test solution to a paper currency having ink printed thereon. If the paper currency is counterfeit, the test solution causes the ink to release from the paper currency. If the paper currency is genuine, the ink will not release from the paper currency. The test solution may be an aqueous-alcohol solution having a chemical thickener, and preferably includes a de-foaming agent, a bactericide/fungicide and a fragrance. |
| US07767462B2 |
Electrolytic eluent generator and method of use
An acid or base is generated in an aqueous solution by the steps of: (a) providing a source of first ions adjacent an aqueous liquid in a first acid or base generation zone, separated by a first barrier (e.g., anion exchange membrane) substantially preventing liquid flow and transporting ions only of the same charge as said first ions, (b) providing a source of second ions of opposite charge adjacent an aqueous liquid in a second acid or base generation zone, separated by a second barrier transporting ions only of the same charge as the second ions, and (c) transporting ions across the first barrier by applying an electrical potential through said first and second zones to generate an acid-containing aqueous solution in one of said first or second zones and a base-containing aqueous solution in the other one which may be combined to form a salt. Also, electrolytic apparatus for performing the above method. |
| US07767461B2 |
Apparatus and method for measuring concentrations of scale-forming ions
This invention relates to methods and apparatus for determination of ion concentrations, particularly in downhole water from hydrocarbon wells, aquifers etc. It is useful in a wide range of applications, including predicting the formation of scale and fingerprinting waters from different sources. More particularly, the invention relates to the use of ligands whose electronic configuration is altered by the binding of the scaling ions within a water sample. These alterations are detected, for example by electrochemical means, and are indicative of the concentration of scaling ions in the sample. |
| US07767455B2 |
Nucleus export reporter system
The present invention relates to reporter systems for RNA export, methods for searching for molecules which influence RNA export, and a method, based on these methods, for detecting a viral infection. |
| US07767443B2 |
Device and method for detecting cellular processes by means of luminescence measurements
A device includes a carrier element with a surface prepared for direct or indirect coupling or receiving of cells, at least one optical detector to receive a luminescence signal, the detector being integrated into the carrier element below the prepared surface, a cover covering the prepared surface to form a cavity, the cover having an inlet opening and an outlet opening, and an excitation source connected to the inlet opening. The excitation source constitutes a reservoir for a chemical or biological excitation substance or medium that influences the metabolism of the cell, with metabolic processes being made visible by luminescence and detected by at the least one optical detector. |
| US07767438B2 |
Microarray devices having controllable reaction volume
This invention relates generally to the field of microarray reaction devices and uses thereof. In particular, the invention provides a microarray reaction device wherein a plurality of reaction spaces are formed between a first and second plurality of projections, the heights of said plurality of reaction spaces being substantially identical and controllable by a supporting structure, and the relative positions between the first and second plurality of projections being controllable by a positioning structure. Articles of manufacture comprising the microarray reaction device and methods for assaying an analyte using the microarray reaction device are also provided. |
| US07767436B2 |
Reducing time to result for blood bank diagnostic testing
Methods for reducing time to result in blood bank diagnostic testing with an agitation device and a low ionic strength solution are disclosed. Specifically provided are methods for reducing incubation time for antigen-antibody reactions in an immunohematologic assay by subjecting the assay reactants to incubation with agitation and optionally additionally a low ionic strength diluent. |
| US07767435B2 |
Method and device for biochemical detection and analysis of subcellular compartments from a single cell
A method and system for performing biochemical detection or analysis on micro- and nano-scale subcellular component within a single biological cell is provided. An integrated platform device and method to perform the biochemical analysis is also provided. |
| US07767433B2 |
High voltage nanosecond pulse generator using fast recovery diodes for cell electro-manipulation
A pulse generator circuit may include a diode configured to operate as an opening switch, a tank circuit in series with the diode having an admittance that is switchable from a first value to a second value that is different from the first value, and a switching system configured to cause the tank circuit to switch between the first value and the second value. The diode may saturate in less than 100 nanoseconds. A saturable core transformer may operate as a switch that controls the opening of the diode. The pulse generator may generate a plurality of pulses, each having a length of no more than 3 nanoseconds and an amplitude of at least 1 kilovolt. Electrodes may be connected to the pulse generator to deliver the plurality of pulses to biological cells. |
| US07767431B2 |
Escherichia coli strains which over-produce L-threonine and processes for the production of L-threonine by fermentation
The present invention relates to the fields of microbiology and microbial genetics. More specifically, the invention relates to novel bacteria strains and processes employing these strains for the fermentative production of amino acids such as threonine. |
| US07767430B2 |
Bifidobacteria preventing diarrhea caused by pathogenic bacteria
The present invention pertains to novel microorganisms of the genus Bifidobacterium, that are useful in preventing diarrhea brought about by pathogenic bacteria. In particular, the present invention relates to the use of said microorganisms for the preparation of an ingestable support and to a composition containing the same. |
| US07767428B2 |
Salutaridinol 7-O-acetyltransferase and derivatives thereof
This invention provides a salutaridinol 7-O-acetyltransferase protein, a salutaridinol 7-O-acetyltransferase gene, and a sequence which is complementary thereto. This invention further provides a method for the production of thebaine comprising the steps of (i) contacting in vitro a protein having salutaridinol 7-O-acetyltransferase activity with salutaridinol and acetyl coenzyme A at pH 8 to 9, and (ii) recovering the thebaine thus produced. |
| US07767425B2 |
Enzymatic synthesis of sugar acrylates
A process is described for the enzymatic synthesis of sugar acrylates, and a process is described for preparing polymeric sugar acrylates, the polymers obtainable by this process and their use for preparing, for example, cosmetics, drugs, laundry detergents, thickeners, protecting colloids, superabsorbents and textile sizes. |
| US07767421B2 |
Methods and compositions for labeling nucleic acids
The present invention relates to methods for the labeling of nucleic acid polymers in vitro and in vivo. Certain methods are provided that include a [3+2] cycloaddition between a nucleotide analogue incorporated into a nucleic acid polymer and a reagent attached to a label. Other methods are provided that include a Staudinger ligation between a nucleotide analogue incorporated into a nucleic acid polymer and a reagent comprising a substituted triarylphosphine attached to a label. Such methods do not require fixation and denaturation and therefore can be applied to the labeling of nucleic acid polymers in living cells and in organisms. Also provided are methods for measuring cellular proliferation. In these methods, the amount of label incorporated into the DNA is measured as an indication of cellular proliferation. The methods of the invention can be used in a wide variety of applications including clinical diagnosis of diseases and disorders in which cellular proliferation is involved, toxicity assays, and as a tool for the study of chromosomes' ultrastructures. |
| US07767419B2 |
Calibrator for NT-proBNP immunoassay
The invention provides a method to efficiently express high levels of a recombinant untagged NT-proBNP for use as a calibrator in NT-proBNP immunoassays. |
| US07767418B2 |
Polynucleotide encoding a novel TRP channel family member, LTRPC3, and splice variants thereof
The present invention provides novel polynucleotides encoding LTRPC3 polypeptides, fragments and homologues thereof. The present invention also provides polynucleotides encoding variants and splice variants of LTRPC3 polypeptides, LTRPC3b, LTRPC3c, LTRPC3d, LTRPC3e, and LTRPC3f, respectively. Also provided are vectors, host cells, and recombinant and synthetic methods for producing said polypeptides. The invention further relates to diagnostic and therapeutic methods for applying these novel LTRPC3, LTRPC3b, LTRPC3c, LTRPC3d, LTRPC3e, and LTRPC3f polypeptides to the diagnosis, treatment, and/or prevention of various diseases and/or disorders related to these polypeptides. The invention further relates to screening methods for identifying agonists and antagonists of the polynucleotides and polypeptides of the present invention. |
| US07767416B2 |
Manipulation of flavonoid biosynthesis in plants
The present invention relates to nucleic acids and nucleic acid fragments encoding amino acid sequences for flavonoid biosynthetic enzymes in plants, and the use thereof for the modification of flavonoid biosynthesis in plants. More particularly, the flavonoid biosynthetic enzyme is selected from the group consisting of chalcone isomerase (CHI), chalcone synthase (CHS), chalcone reductase (CHR), dihydroflavonol 4-reductase (DFR), leucoanthocyanidin reductase (LCR), flavonoid 3′, 5′ hydrolase (F3′5′H), flavanone 3-hydroxylase (F3H), flavonoid 3′-hydroxylase (F3′H), phenylalanine ammonia-olyase (PAL) and vestitone reductase (VR), and functionally active fragments and variants thereof. |
| US07767414B1 |
Optical imaging of molecular characteristics of biological specimen
Imaging specimen such as biological tissue is facilitated. According to an example embodiment of the present invention, a relatively thin, surface portion of a specimen is stained and imaged. The thin portion is removed, exposing a new portion of the specimen. The newly-exposed portion is stained and imaged. Subsequent new surface portions (newly exposed) are similarly stained and imaged, with multiple images obtained from the specimen in an automated fashion. Some applications are directed to the distinct imaging of specimen characteristics having relatively small vertical separation (e.g., less than about 40 nanometers), with an upper characteristic imaged, removed, and the lower characteristic subsequently imaged. |
| US07767411B2 |
Assay system for specific inhibitors of protein kinase C-related kinases
The present invention relates to an assay system for specific inhibitors of protein kinase C-related kinases (PRKs) relating to one or more of the reactions wherein said protein kinase C-related kinases are involved under physiological conditions. The invention also relates to a process for identifying specific inhibitors for protein kinase C-related kinases. |
| US07767402B2 |
Methods and compositions for controlling appetite and modulating insulin sensitivity
The invention features methods of enhancing whole body insulin sensitivity by modulating the endoplasmic reticulum (ER) stress response pathway in adipose cells. In one aspect, the methods involve targeting chaperone proteins important in the ER stress response pathway, for example, BiP and ERO-1. Another aspect features targeting the upstream transcription factors (e.g., CHOP-1 and XBP-1) of the genes encoding the chaperone proteins (and/or other ER proteins). Screening assays for identification of modulators of these ER proteins and/or transcription factors are also featured. |
| US07767401B2 |
Diagnostic method for stroke
Stroke is diagnosed in a subject by determining the concentration of at least one polypeptide selected from Apo C-III, Serum Amyloid A, Apo C-I, Antithrombin III fragment and Apo A-I in a sample of body fluid taken from the subject. |
| US07767397B2 |
Hepoxilins and modulators of ichthyin for treatment skin disorders
The present application relates to compositions and methods for treating skin disorders, dry skin, and protection of skin in inflammatory events. The present application more particularly discloses the identification of new genes and metabolic pathways involved in skin disorders, which provide novel targets and approaches for treating said disorders and for screening biologically active compounds. The present invention also provides various products and constructs, such as probes, primers, vectors, recombinant cells, which can be used to implement the above methods. The invention may be used to detect or treat various skin disorders, particularly dry and inflammatory skin disorders, in various subjects, including mammalian subjects, particularly human beings. |
| US07767396B2 |
Compositions for detection of a target nucleic acid sequence
The invention relates to compositions for generating a signal indicative of the presence of a target nucleic acid in a sample, where the compositions include a probe having a 5′ region and a 3′ flap and a P. furiosus polymerase having 3′ exonuclease activity. |
| US07767395B2 |
Diagnosis of sepsis
Methods for predicting the development of sepsis in a subject at risk for developing sepsis are provided. In one method, features in a biomarker profile of the subject are evaluated. The subject is likely to develop sepsis if these features satisfy a particular value set. Methods for predicting the development of a stage of sepsis in a subject at risk for developing a stage of sepsis are provided. In one method, a plurality of features in a biomarker profile of the subject is evaluated. The subject is likely to have the stage of sepsis if these feature values satisfy a particular value set. Methods of diagnosing sepsis in a subject are provided. In one such method, a plurality of features in a biomarker profile of the subject is evaluated. The subject is likely to develop sepsis when the plurality of features satisfies a particular value set. |
| US07767394B2 |
Nucleotide compositions and uses thereof
The present invention relates to preparation of nucleotide compositions and uses thereof for conducting nucleic acid analyses. The compositions and methods embodied in the present invention are particularly useful for nucleic acid analyses that require high-resolution detection of labeled nucleotides or labeled nucleic acid targets. |
| US07767393B2 |
Expression profile of prostate cancer
The present invention relates to compositions and methods for cancer diagnostics, including but not limited to, cancer markers. In particular, the present invention provides gene expression profiles associated with prostate cancers. Genes identified as cancer markers using the methods of the present invention find use in the diagnosis and characterization of prostate cancer. In addition, the genes provide targets for cancer drug screens and therapeutic applications. |
| US07767390B2 |
Methods for evaluating drug-resistance gene expression in the cancer patient
The methods of the invention detect in a qualitative or quantitative fashion drug-resistance RNA and DNA in blood plasma, serum, and other bodily fluids. The methods of the invention thereby enable the assessment of drug resistance in a neoplasm without the requirement of a tissue biopsy. The inventive methods are useful for the evaluation, monitoring, and selecting of drug treatment regimens, and for determining a predisposition for or prognosis of chemoresistant neoplastic disease. |
| US07767387B2 |
Therapeutic targets in cancer
The present invention relates to novel sequences for use in detection, diagnosis and treatment of cancers, especially lymphomas. The invention provides cancer-associated (CA) polynucleotide sequences whose expression is associated with cancer. The present invention provides CA polypeptides associated with cancer that are present on the cell surface and present novel therapeutic targets against cancer. The present invention further provides diagnostic compositions and methods for the detection of cancer. The present invention provides monoclonal and polyclonal antibodies specific for the CA polypeptides. The present invention also provides diagnostic tools and therapeutic compositions and methods for screening, prevention and treatment of cancer. |
| US07767384B2 |
Method for making a negative-working lithographic printing plate precursor
A method for making a heat-sensitive negative-working lithographic printing plate precursor including the steps of providing a support having a hydrophilic surface or which is provided with a hydrophilic layer, and applying onto the support a coating solution including an infrared absorbing agent, hydrophobic thermoplastic polymer particles, a hydrophilic binder, and a polymer including siloxane and/or perfluoroalkyl monomeric units. |