最新美国发明专利第2010-06-29期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US07746740B2	Recording control method for optical disk recording apparatus and optical disk recording apparatus In the present invention, the processing sequence of a microprocessor for restructuring the recording parameters when changing the recording in an optical disk recording apparatus from a constant angular velocity (CAV) mode to a constant linear velocity (CLV) mode is as follows: (1) interrupt the recording process; (2) calculate a linear velocity at a point where the recording linear velocity becomes constant; (3) calculate a third recording parameter in the linear velocity by a linear interpolation based on first and second recording parameters which are corrected by test writing, replacing all the recording parameters for an outer circumference of an optical disk from a radius position where the linear velocity becomes Cx, with the third recording parameter; and (4) restart the recording with the third recording parameter as a recording condition.
US07746737B2	Information recording medium, apparatus for recording and/or reproducing data on and/or from information recording medium, method of recording and/or reproducing data on and/or from information recording medium, and computer-readable recording medium storing program for executing the method A method of recording and/or reproducing data on and/or from an information recording medium including a compatibility information area in which compatibility information, which specifies whether each area on the information recording medium is recordable and/or reproducible, is recorded, the method includes reading the compatibility information, which specifies whether each area on the information recording medium is recordable and/or reproducible; and recording and/or reproducing the data on and/or from the information recording medium with reference to the compatibility information, wherein if other write protection forms of the information recording medium exist, write protection of the information recording medium is determined, based on a result of performing an OR function on the compatibility information and the other write protection forms.
US07746736B2	Optical head and optical disk device capable of detecting spherical aberration An optical head comprising a light source, objective lens, light splitting means, light receiving element, tracking error signal detection means, and spherical aberration detection means. Light splitting means has six regions divided by a first splitting line parallel to a longitudinal direction of information tracks, and second and third splitting lines perpendicular to the first line. Spherical aberration detection means compares a first focal point shift amount obtained by detecting a light spot size formed by focusing light fluxes, created by laser light passing through two regions between the second and third splitting lines, onto the light receiving element, and a second focal point shift amount obtained by detecting light spot size formed by focusing light fluxes, created by laser light passing through the four regions, on the outer side of second and third splitting lines, generating a spherical aberration error signal for detecting spherical aberration at the objective lens.
US07746733B2	Optical pickup unit and optical disc apparatus An optical pickup unit is disclosed which comprises: an objective lens that focuses laser light on an optical disc; a lens holder that holds the objective lens; a coil that is fitted on the lens holder and capable of driving the lens holder; and a heat transfer improving member that is fitted on the holder to cause heat to be radiated, wherein the heat is generated in the coil when the coil is energized.
US07746731B2	Electronic device with solar cell An electronic device such as a watch comprises a solar cell (14) and window portions (2, 6) which is located on the solar cell (14) and through which light is applied to the solar cell (14). The solar cell (14) is divided into a plurality of divided cells such that irradiated portions (14A to 14F) of the divided cells are equal in area, in consideration of the shapes, areas, and number of the window portions (2, 6) and the number of divisions of the solar cell (14).
US07746730B2	Multifunction reminder system A reminder system has a user interface with a microphone, display and at least one manually operable control. A processor that is coupled to the user interface has a memory and an input for receiving image information signifying at least one predetermined image for storage in the memory. The processor can display simultaneously on the display a calendar image and the predetermined image. In another mode the processor can display at least the predetermined image without displaying the calendar image. In yet another mode the screen can display a conventional clock face with minute and hour hands. As an option, the user can upload a number of images that can then replace the hours numerals on the clock face. Using the user interface and the microphone one can store in the memory at least one pair of a spoken message and a scheduled time. The processor can make the spoken message automatically available at the scheduled time. The processor can be coupled to a remote interface that has a sound sensor for producing a remote sound signal. The remote interface can send the remote sound signal to the processor for storage in the memory for later retrieval.
US07746728B2	Timer and display device A display device for displaying an event and method for monitoring and displaying a time interval related to a non-displayed past event and/or a non-displayed future event. A displayed event of a person or event is displayed on a support member, such as a frame or plaque. A timer is provided to calculate an accumulating time interval and/or a reducing time interval. The accumulating time interval measures the current elapsed time from a non-displayed past event. The reducing time interval measures the time remaining from a current time to a non-displayed future event. The time intervals are displayed on a timer display that is disposed adjacent the displayed event to remind an observer of the time to a non-displayed future event and/or of the time from a non-displayed past event.
US07746727B2	Fish finder mounting bracket A bracket for mounting a fish finder display head to a conventional multi-gallon plastic pail is described with reference to two alternative embodiments. In the first embodiment, the bracket comprises spaced apart arms to provide a gimbal style mount and the arms have inboard, upwardly extending hooks to fit over the peripheral edge of the pail. In the second embodiment, the arms are combined with a stabilizer member and may be attached directly to the outside surface of the pail by means of threaded fasteners or Bungee cords or both. In both embodiments, a tip-over guard is provided in the form of a generally U-shaped of aluminum stock that is attached such as by rivets to the distal (outside) ends of the bracket arms. Means are provided for wrapping a power cable between the arms.
US07746726B2	Method for processing borehole seismic data Seismic data recorded by subsurface seismic sensors placed in a borehole, such as an oil or gas well, are transformed via a process of upward wavefield propagation to pseudo-receivers at the surface of the earth. The seismic data thus transformed can be processed as though the data had been recorded by the pseudo-receivers at the surface rather than in the borehole where the data were actually recorded. This method accurately accounts for seismic source statics, anisotropy, and all velocity effects between the real receivers in the borehole and the pseudo-receivers at the surface of the earth.
US07746724B2	Asynchronous data transmission A method and apparatus for accessing a memory device. The method includes providing control signals for an access command to the memory device via an asynchronous interface and transmitting data for the access command to the memory device. The method also includes encoding, into the transmitted data, a clock signal. The encoded clock signal in the transmitted data is used by the memory device for receiving the data transmission.
US07746723B2	Semiconductor memory device and driving method thereof A semiconductor memory device includes: a variable delay for delaying a delay locked loop (DLL) clock by a predetermined delay time to output a delayed DLL clock; an output driver for outputting data and data strobe signal in response to the delayed DLL clock; and a calibration controller for controlling the predetermined delay time of the variable delay in response to output AC parameters.
US07746722B2	Metal programmable self-timed memories A self-timed memory array is disclosed, in which segmentability and metal-programmability are supported while minimizing layout space. Self-timing row decoder circuits are placed at the top and bottom of the array adjacent to respective I/O blocks. A self-timing signal is routed from the top (resp. bottom) of the array to a point halfway down (resp. up) the memory array and then back to a self-timing row decoder at the top (resp. bottom) of the array. The same approach may also be used to account for the bitline wire delay from the bottom (resp. top) of the array to the sense amplifiers in the I/O block. Further flexibility in wire routing is provided by eliminating metal routing layers from unneeded memory cells, and a programmable gate array may be used to allow an arbitrary word size to be chosen for the memory.
US07746720B2	Techniques for reducing leakage current in memory devices Techniques for reducing gate induced drain leakage (GIDL) in memory devices utilizing negative wordline architectures. More specifically, a method and apparatus are provided to determine whether any of the word lines in a section of a memory array are active. If any one of the plurality of word lines is active, each of the inactive word lines in the section are coupled to a negative voltage level. If none of the plurality of word lines is active, each of the plurality of word lines is coupled to ground to reduce GIDL.
US07746719B2	Multi-chip package reducing power-up peak current Disclosed is a multi-chip package having a plurality of memory chips. Each memory chip includes a memory cell array storing e-fuse data, a read-out control circuit reading e-fuse data in response to a read signal, a first internal pad receiving a first control signal, a read-out controller generating the read signal to define a read period, and to generate a second control signal following the read period, and a second internal pad receiving the second control signal, wherein the plurality of memory chips is connected series and each respective read-out control circuit and read-out controller in each one of the plurality of memory chips cooperate to implement a sequential read of e-fuse data across the plurality of memory chips.
US07746717B1	Desensitizing static random access memory (SRAM) to process variation A static random access memory (SRAM) can include an array of memory cells, wherein each memory cell is coupled to one of a plurality of sense amplifiers through a bitline. The SRAM also can include replica bitline circuitry including a replica bitline coupled to a replica bitline amplifier. The replica bitline amplifier can provide a strobe signal to the plurality of sense amplifiers, wherein the replica bitline amplifier includes a feedback path. An SRAM also may include a write replica circuit generating a signal when data has been written to the write replica circuit. A wordline of the memory array can be turned off responsive to the signal.
US07746713B2	High density 45 nm SRAM using small-signal non-strobed regenerative sensing A memory device includes a plurality of cells comprising CMOS structures. A non-strobed regenerative sense-amplifier (NSR-SA) is coupled to the cells and employs offset compensation and avoids strobe timing uncertainty to increase read-access speeds.
US07746712B2	Semiconductor memory device including post package repair control circuit and post package repair method Provided are a semiconductor memory device having a post package repair control circuit and a post package repair method. In the semiconductor memory device and the post package repair method, in a post package repair mode, a second memory bank is used as a fail bit map memory for storing failed bit information regarding a first memory bank, and the first memory bank is used as a fail bit map memory for storing failed bit information regarding the second memory bank.
US07746711B2	Semiconductor device and semiconductor chips outputting a data strobe signal High-speed operation is achieved without increase in a circuit current and unstable operation of data strobe signal level due to collision between data strobe signals. Each of RAMs 11a and 11b outputs a data signal DQ and a data strobe signal DQS indicative of an output timing of the data signal. RAM 11a includes a strobe signal control unit 15a that determines whether RAM 11b connected in parallel with the RAM 11a is in a read state or not, and delays an output start timing of data strobe signal DQS when the RAM 11b is in the read state. Strobe signal control unit 15a of the RAM 11a controls output start timing so that a latter half portion of a preamble period of the data strobe signal DQS to be output coincides with a postamble period of the data strobe signal DQS output by the RAM 11b.
US07746710B2	Data bus power-reduced semiconductor storage apparatus In one or more of the disclosed embodiments, the number of times toggle operations of a data bus are performed at the time of a data transmission in a semiconductor storage apparatus is reduced, thereby reducing the power consumption. For example, a semiconductor storage apparatus according to one embodiment of the present invention comprises a DRF bus, a DR11F bus, a GDRF bus and a GDR11F bus. The DRF bus and DR11F bus, and the GDRF bus and GDR11F bus, are placed in parallel for the purpose of reducing the number of times toggle operations of a data bus are performed at the time of a data transmission. The DR11F bus is added to make the DRF11F bus perform a toggle operation only when the DRF buses on both sides are made to perform a toggle operation if the data transmission were performed in a conventional system.
US07746706B2	Methods and systems for memory devices One embodiment of the invention relates to a method for accessing a memory cell. In this method, at least one bit of the memory cell is erased. After erasing the at least one bit, a soft program operation is performed to bias the memory cell thereby improving the reliability of data stored in the memory cell.Other methods and systems are also disclosed.
US07746703B2	Flash memory device and method of programming flash memory device A flash memory device and a method of programming the same include a memory cell array, a pass/fail check circuit and a control logic circuit. The memory cell array includes multiple memory cells arranged in rows and columns. The pass/fail check circuit verifies whether data bits selected by a column address during a column scan operation have program data values. The control logic circuit detects fail data bits from the selected data bits and stores the column address in response to the verification result of the pass/fail check circuit. The control logic circuit also compares a number of the fail data bits with a reference value and controls generation of the column address according to the comparison result.
US07746702B2	Memory device and method for estimating characteristics of multi-bit programming Memory devices and/or methods that may estimate characteristics of multi-bit cell are provided. A memory device may include: a multi-bit cell array; a monitoring unit to extract a threshold voltage change over time value for reference threshold voltage states selected from a plurality of threshold voltage states corresponding to data stored in the multi-bit cell array; and an estimation unit to estimate a threshold voltage change over time values for the plurality of threshold voltage states based on the extracted threshold voltage change. Through this, it is possible to monitor a change over time of threshold voltages of a memory cell.
US07746700B2	NAND architecture memory devices and operation Non-volatile memory devices utilizing a modified NAND architecture where both ends of the NAND string of memory cells are selectively coupled to the same bit line may facilitate increased memory densities, reduced fabrication steps and faster read operations when compared to traditional NAND memory array architectures. Programming and erasing of the memory cells can be accomplished in the same manner as a traditional NAND memory array. However, reading of the memory cells may be accomplished using charge sharing techniques similar to read operations in a DRAM device.
US07746696B1	CMOS twin cell non-volatile random access memory A memory has first and second storage cells, each with a floating node, that store complementary data values. Interlaced inverters quickly sense a voltage difference between the storage cells and provide a data value output when the memory is read. Each floating node includes a tunneling gate of a tunneling transistor, a gate of a bitline transistor, and a plate of a coupling capacitor.
US07746695B2	Non-volatile semiconductor latch using hot-electron injection devices The invention concerns semiconductor latches capable of memorizing any programmed information even after power supply has been removed. Used is a μm BiCMOS EPROM process but it is applicable in any other process having hot electron injection devices like EPROM, Flash EEPROM. Suggested is a bi-stable latch circuit having a pair of cross-coupled branches (I,II), each branch including a complementary driver and a load connected between a drain line and a source line and a non-volatile memory cell having a program transistor and a read transistor, at least one of said drivers and loads including said read transistor, said driver and load of said branch connected in series at a respective output node, said read transistor and program transistor having a common floating gate and separate control gates, said control gate of said program transistor connected to a program voltage, the drain of said program transistor connected to a respective input node, said control gate of said read transistor in said branch connected to said output node of the other branch (II).
US07746693B2	Nonvolatile analog memory A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a first current source, a second current source, and a current adjuster. The first current source generates a first current, and the second current source generates a second current. The current adjuster turns on or turns off a current path of the second current according to a reference current and the first current. Furthermore, when the current path of the second current is turned on, the first current is adjusted according to the second current, such that the first current is equal to the reference current.
US07746691B2	Methods and apparatus utilizing predicted coupling effect in the programming of non-volatile memory Methods and memory devices configured to utilize predicted coupling effects of neighboring memory cells in the programming of target memory cells can be utilized to tighten the distribution of threshold voltages for a given bit pattern by compensating for anticipated threshold voltage shift due to capacitive coupling, which can facilitate more discernable Vt ranges, and thus a higher number of bits of data per memory cell. Tightening the distribution of threshold voltages can further facilitate wider margins between Vt ranges, and thus an increased reliability in reading the correct data value of a memory cell.
US07746690B2	Memory comprising diode A memory operable at a high speed is obtained. This memory comprises a plurality of word lines, first transistors each connected to each the plurality of word lines for entering an ON-state through selection of the corresponding word line, a plurality of memory cells including diodes having cathodes connected to the source or drain regions of the first transistors respectively and a data determination portion connected to the drain or source regions of the first transistors for determining data read from a selected memory cell.
US07746686B2	Partitioned random access and read only memory A magnetic memory and a method of operating the memory are described. The memory includes memory cells that may each include a magnetoresistive bit. The memory cells may each be coupled to a current driver. Each current driver may be inhibited so that it does not output a current. Inhibiting the output current prevents the memory from being written. By inhibiting some current drivers and not inhibiting other current drivers, the memory may be partitioned into read only and random access portions.
US07746682B2	SEU hardened latches and memory cells using programmable resistance devices Apparatus and methods for reducing single-event upsets (SEUs) in latch-based circuitry (e.g., static random access memory (SRAM) cells) and other digital circuitry. According to an exemplary embodiment, a latch-based circuit includes a radiation-hardened latch having first and second cross-coupled inverters and first and second programmable resistance devices (PRDs). The first PRD is coupled between the output of the first inverter and the input of the second inverter. The second PRD is coupled between the output of the second inverter and the input of the first inverter. The PRDs may be programmed to low or high-resistance states. When SET to a low-resistance state, the latch of the latch-based circuitry may be accessed to read the current logic state stored by the latch or to write a new logic state into the latch. When RESET to a high-resistance state, the latch is in a radiation-hard state, thereby preventing the latch from generating SEUs.
US07746679B2	Range checking content addressable memory array A disclosed embodiment is a range checking CAM array comprising a plurality of words, where each of the plurality of words comprises a plurality of bound check cells. Each of the plurality of bound check cells outputs a corresponding plurality of match signals and a corresponding plurality of bound check signals. The corresponding plurality of match signals and corresponding plurality of bound check signals are combined to produce a range check output indicating whether data on a data input bus is within a target range. The plurality of bound check cells may be coupled to form at least one cascade of bound check cells, where each cascade of bound check cells may be terminated at a ripple logic. The CAM array produces a final range check output based on the corresponding plurality of match signals and the corresponding plurality of bound check signals.
US07746673B2	Flyback constant voltage converter having both a PWFM mode and a PWM mode A flyback AC/DC switching converter has a constant voltage (CV) mode. The CV mode has sub-modes. In one sub-mode (“mid output power sub-mode”), the output voltage (VOUT) of the converter is regulated using both pulse width modulation and pulse frequency modulation. Both types of modulation are used simultaneously. In a second sub-mode (“low output power sub-mode”), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency. By setting the first frequency at a frequency above the frequency limit of human hearing, an undesirable audible transformer humming that might otherwise occur is avoided. In some embodiments, the converter has a third sub-mode (“high output power sub-mode”), in which pulse width modulation is used but the switching frequency is fixed at a second frequency. By proper setting of the second frequency, undesirable EMI radiation and other problems that might otherwise occur are avoided.
US07746671B2	Control circuit for a switch unit of a clocked power supply circuit, and resonance converter The invention involves a control circuit for a switch unit of a clocked power supply circuit, the switch unit being designed to effect input-side excitation of a resonant transformer arrangement, and comprises an input for receiving an auxiliary signal from the resonant transformer arrangement. The invention also includes a resonance converter that enables independent control of frequency and turn-on moments, or duty cycle, and thus enables a particularly efficient operation of the resonance converter, and a particularly precise regulation.
US07746669B2	Bidirectional battery power inverter Disclosed is a bi-directional battery power inverter (1) comprising a DC-DC converter circuit element (3) to which the battery (2) can be connected in order to generate an AC output voltage from a battery (2) voltage in a discharging mode while charging the battery (2) in a charging mode. The inverter (1) further comprises an HF transformer which forms a resonant circuit along with a resonant capacitor (6). In order to increase the efficiency of said battery power inverter, the transformer is provided with two windings (11, 12) with a center tap (20) on the primary side, said center tap (20) being connected to a power electronic center-tap connection with semiconductor switches (21, 31) while a winding (13) to which the resonant capacitor (6) is serially connected provided on the secondary side.
US07746667B1	Telescoping support crossbar for a cable management arm A telescoping support member (42) is provided for supporting a central portion (38) of a cable management arm (24) for use with drawer slides (14, 16). The drawer slides (14, 16) each have a cabinet member (18), an intermediate member (20) and a chassis member (22). The cable management arm (24) is secured on one end to one of the chassis members (22) and on an other end to one of the cabinet members (18). The support member (42) has a first end (50) pivotally secured in fixed relation to one of the intermediate members (20) and a second end (52) pivotally secured in fixed relation to one of the cabinet members (18). Extension of the drawer slides (14, 16) extends the cable management arm (24) and the support member (42), with said support member (42) disposed beneath and in sliding engagement with the central portion (38) of the cable management arm (24).
US07746655B1	System and method for assembly of a processor and socket on an information handling system printed circuit board A grid array socket pin field is protected during manufacture of an information handling system with a dust cap having first and second attachment devices. The first attachment device secures the cap to the socket during assembly of the socket in the computer. The second attachment device secures the cap to a load mechanism assemble proximate the socket. Engagement of the second attachment device to the cap automatically releases the cap from the socket to allow removal of the cap from the socket by actuation of the load mechanism to an open position. The second attachment device secures the cap to the load mechanism until a processor is placed in the socket.
US07746654B2	Adaptable plug-in mezzanine card for blade servers A computer system is provided that includes a chassis, a system board coupled to the chassis, and a first connector extending from the system board at a first height and configured to receive a first printed circuit board, wherein the first printed circuit board is configured to be parallel to the system board when received by the first connector, and a second connector extending from the system board at a second height and configured to receive a second printed circuit board, wherein the second printed circuit board is configured to be parallel to the system board when received by the second connector. Other computer systems are provided that include a first mezzanine card and a second mezzanine card or multiple connectors and a plurality of printed circuit boards.
US07746648B2	Modular heat-radiation structure and controller including the structure A modular heat-radiation structure includes a module for generating heat, including a first main unit having a heat-radiation fin, fixed to the top face of the first main unit for radiating heat generated in the module and a resin-made and insulating heat shield inserted between the printed circuit board and the first main unit.
US07746645B2	Heat sink assembly having a clip A heat sink assembly includes a heat sink and a clip assembly. The clip assembly includes a clip and a pair of movable fasteners pivotally connected to the clip. The clip includes a main body, two pressing portions extending from two opposite ends of the main body and two locking arms extending oppositely from the two pressing portions, respectively. The movable fasteners each include a main body, a pair of receiving portions curved upwardly from the main body and receiving a corresponding locking arm therein and a hook extending downwardly from the main body and engaging with a clasp on a printed circuit board. A distance from each of the hooks of the movable fasteners to a corresponding clasp can be adjustable via rotation of the movable fasteners around the locking arms of the clip.
US07746643B2	Heat sink assembly with a locking device A heat sink assembly includes a heat sink having a first shoulder and a second shoulder, and a locking device having a retention module, a first clip and a second clip. The first clip has two extension portions engaging with the retention module and a pressing portion between the two extension portions. The second clip comprises a pressing portion located on the second shoulder, an axle connecting with the pressing portion and pivotably engaging with the retention module and a locking portion connecting with the pressing portion. The second clip can rotate around the axle thereof when the heat sink assembly is in an unlocked position; the locking portion engages with the retention module and the pressing portion presses the second shoulder of the heat sink toward the retention module when the heat sink assembly is in a locked position.
US07746641B2	Radiation device for computer or electric appliances A radiation device for computer or electric appliances includes a heat inhalant block under a CPU of a computer, a heat transmission block positioned next to the heat inhalant block, a bridge block, a peltier device and a cooling source block sequentially disposed on the top of the heat transmission block with a bridge block engaged therebetween, a transparent cover covering the top of the cooling source block to form a left and a right flow canals therein, an upper heat radiation module superimposed a lower heat radiation module positioned next to the heat transmission block, a fan on the top of the upper heat radiation module, a set of the heat pipes extended from the heat inhalant block to the lower heat radiation module through the heat transmission block, a pair of lateral pipes connected between the bridge block and the lower heat radiation module and a set of the cold pipes connected between the cooling source block and the upper heat radiation module.
US07746640B2	Heat dissipation device with heat pipes A heat dissipation device includes a base for contacting an electronic device, a fin set located on the base and first, second heat pipes thermally engaged in the base. The first heat pipe comprises a first transferring portion and two second transferring portions extending from two opposite free ends of the first transferring portion. The second heat pipe has first and second transferring sections. The first transferring section of the second heat pipe is located adjacent to the first transferring portion of the first heat pipe and between the first transferring portion and one of the second transferring portions of the first heat pipe, and the second transferring section of the second heat pipe is located adjacent to the one of the second transferring portions of the first heat pipe.
US07746637B2	Electronic equipment enclosure with exhaust air duct and adjustable filler panel assemblies An electronic equipment enclosure includes a frame structure, one or more enclosure panels mounted on the frame structure, an exhaust duct, and a plurality of adjustable filler panel assemblies. The frame structure and the one or more enclosure panels together define an enclosure. The exhaust duct is substantially the same height as the enclosure and has an air inlet opening formed therein for receipt of exhaust air from equipment mounted in the enclosure. The plurality of adjustable filler panel assemblies selectively block portions of the air inlet opening in order to create a custom-fit air inlet opening for a particular piece of equipment so that exhaust air from the equipment does not flow back into the enclosure after entering the exhaust duct.
US07746634B2	Internal access mechanism for a server rack The rear panel of an electronics enclosure includes one or more heat exchangers. The rear panel can be cooling door configured to provide access to the cables and equipment located within the electronics enclosure. Such access can be provided by swinging the door open on hinges like a standard door. In the case where there are multiple heat exchangers, the door can be configured into segments, one segment per heat exchanger, and each segment includes hinges so as to be opened independently from the other segments. In some embodiments, each segment swivels open like a standard door. In other embodiments, each segment is configured to swivel up or down about a horizontal axis. In still other embodiments, each segment is configured to be disconnected from the electronics enclosure and moved out of the way, in which case each heat exchanger is connected using either flexible tubing that can be bent out of the way or quick disconnects. In other embodiments, the entire rear door, or each segment of the rear door, can be configured to slide open and closed like a drawer.
US07746632B2	Air duct for directing airflow in a computer enclosure An air duct (10) is used for directing air in a computer enclosure (50) to flow from an interior to an exterior thereof for dissipating heat generated from an electronic device (82) in the computer enclosure. At least one cable is provided in the computer enclosure for power supply or data transmission. The air duct includes a top wall (11), a pair of side walls (13), and at least one retaining member. The side walls depend from opposite ends of the top wall. At least one retaining member is formed on at least one of the top wall and one of the side walls for retaining the at least one cable therein. The at least one retaining member and the at least one of the top wall and the side walls cooperatively form a retaining space therebetween.
US07746628B2	Electronic device The present invention relates to an electronic device having two casings connected with each other through a hinge member such that the casings can open and close with respect to each other. The electronic device includes a hinge member suitable for mounting a large size display panel. The second casing includes a back face and a sidewall having a projection which projects inward between the back face and the sidewall, the hinge member includes a first fixing member fixed to the first casing and a second fixing member fixed to the second casing, and one end of the second fixing member is engaged with and fixed to the second casing in a state where the one end enters a gap between the back face and the projection.
US07746627B2	Portable electronic apparatus with improved audio quality through a curved and sloped surface of a housing A portable electronic apparatus includes a housing and an output device configured to output sound. The output device is disposed on a surface on an inside of a slope disposed on a lower surface of the housing, the slope resulting in the housing being opened in a predetermined direction. The slope forms a space between the slope and a mounting surface on which the housing is placed. The surface on the inside of the slope includes a curved surface. The curved surface may be concavely curved relative to the bottom surface of the housing. The electronic apparatus may also include an input device, and the output device may be disposed on a side forward of the input device.
US07746625B2	Computer front bezel A computer front bezel includes a main body, a sliding cover, and two elastic members. The main body defines two substantially opposite sliding grooves. The sliding cover includes two posts slidably received in the sliding grooves of the main body respectively. The two elastic members are connected to the sliding cover and the main body. One end of each of the elastic members is rotatably connected to the main body, and the other end of each of the elastic members is rotatably connected to the sliding cover. The sliding cover is capable of moving between a first, a second and a third state. The first state is that the sliding cover is in a closed position and the two posts are approximately located at first end of the grooves. The second state is that the sliding cover is between the first and third state, and the elastic members exert more force than when the sliding cover is in the first or third state. The third state is that the sliding cover is in an open position and the posts are approximately located at second end of the grooves.
US07746617B2	Overload relay and operating method thereof An overload relay, which trips a current flow between a power source and a load, includes a trip capacitor that stores therein an electric charge to excite a trip coil so as to trip the current flow, a reset capacitor that stores therein an electric charge to excite a reset coil so as to reset the tripped current flow, an energizing unit that energizes the coils, and a capacitor-diagnosing unit that diagnoses the capacitors. The energizing unit forcibly energizes the trip coil by using the trip charge when the capacitor-diagnosing unit diagnoses that there is a degradation of a property of the trip capacitor.
US07746613B1	Method and apparatus for providing an adaptive current limiter An adaptive current limiter is coupled to a power source and which comprises a variable reference voltage generator which provides a variable reference voltage which is inversely proportional to the input voltage from the power source, which in certain embodiments is representative of the maximum allowable current level that may flow through a connected load at the present voltage provided by the power source given a fixed power limit. The current flow to the load is interrupted when the power level provided to the load exceeds predefined constant power and/or constant current limits.
US07746609B2	ESD protection circuit An ESD (Electro-Static Discharge) protection circuit includes a detection unit for detecting a rising time of a signal flowing into a first and a second power lines; a pre-driver for buffering an output signal of the detection unit; and a power clamp which operates in response to an output signal of the pre-driver and connects the first and the second power lines each other. The detection unit includes: an RC filter connected in series between the first and the second power lines; a first inverter for inverting an output of the RC filter; and a first capacitor, connected between the first power line and a source end of a first transistor of the first inverter, for preventing a leakage current from flowing through the first transistor and a second transistor of the first inverter when a power noise is applied to the first and the second power lines.
US07746608B2	Methodology to guard ESD protection circuits against precharge effects An ESD protection circuit (710) is guarded by a parallel first precharge elimination circuit (720) relative to an I/O pad (721) and a parallel second precharge elimination circuit (730) relative to a VDD pad (731). The precharge elimination circuits are synchronized with the ESD protection circuit to eliminate any precharge voltage to ground before an ESD pulse affects the I/O pad or VDD pad. A diode (722) is connected between I/O pad and VDD. Circuit (720) is between I/O pad and ground (740) and is powered by the same VDD. Circuit (720) includes a first resistor (723), a first nMOS transistor (724), and a first RC timer including a second resistor (725) and a first capacitor (726). Circuit (730) includes a third resistor (733), a second nMOS transistor (734), and a second RC timer including a fourth resistor (735) and a second capacitor (736).
US07746606B2	ESD protection for integrated circuits having ultra thin gate oxides According to an exemplary embodiment, an integrated circuit includes a first circuit block having a first power bus. The integrated circuit further includes a second circuit block having a second power bus, where the first power bus is isolated from the second power bus. The integrated circuit further includes a first dedicated ESD bus, where the first dedicated ESD bus provides a discharge path from the first power bus to the second power bus and from the second power bus to the first power bus. The first power bus can be coupled to the first dedicated ESD bus by a first pair to bi-directional diodes, and the second power bus can be coupled to the first dedicated ESD bus by a second pair of bi-directional diodes.
US07746604B2	Method, system, and computer software code for detection and isolation of electrical ground failure and secondary failure In an off-road vehicle having a resistor grid network and a blower system as part of a braking system operable to determine at least one of a resistor failure and a blower failure, the system including a first series of resistors connected in series, a second series of resistors connected in series, a blower cross to at least one of the first series of resistors and the second series of resistors, a sensor proximate at least one of the first series of resistors, the second series of resistors, and the blower, wherein each individual resistor in the first series connected in parallel to an individual resistor in the second series, and wherein when at least one of a current value, blower speed, and voltage value changes, the grid network is disconnected.
US07746600B2	Encapsulant for a disc drive component A slider is used in an actuation system and carries a transducing head for transducing data to and from a rotatable recording disc. The slider includes a slider body having a leading edge and a trailing edge and a transducing head positioned proximate the trailing edge of the slider body. An encapsulant comprised of a self assembled monolayer covers exposed surfaces the slider body.
US07746598B2	Information recording medium and recording/reproducing apparatus An information recording medium excellent in surface smoothness. The information recording medium has a data track pattern and a servo pattern formed on at least one surface of a substrate by a concave/convex pattern including a plurality of convex portions. The concave/convex pattern has concave portions each having a non-magnetic material embedded therein. An A concave/convex pattern forming the servo pattern includes a plurality of servo convex portions formed in a manner associated with servo data. At least part of the plurality of servo convex portions are formed by a B concave/convex pattern including a plurality of non-servo convex portions. This arrangement makes it possible to maintain excellent surface smoothness within a servo pattern area, thereby enabling the recording/reproducing apparatus to execute stable recording and reproducing on and from the information recording medium.
US07746597B2	Slider having protective films of differing hydrogen content A slider comprises an air bearing surface which is arranged to face a recording medium and a protective film which covers at least a part of the air bearing surface. The protective film includes a first protective film formed on the air bearing surface and made of an amorphous material based on carbon and hydrogen and a second protective film formed to cover the first protective film and made of an amorphous material based on carbon and hydrogen. Further, the atomic fraction of hydrogen in the second protective film is lower than that in the first protective film.
US07746594B1	Disk drive comprising slanted line servo burst sets offset radially A disk drive is disclosed comprising a disk having servo data defining a plurality of servo tracks. The servo data comprises a preamble, and a plurality of slanted line servo bursts recorded at a tilt angle with respect to the preamble. The slanted line servo bursts comprises a first plurality of slanted line servo bursts and a second plurality of slanted line servo bursts, wherein the second plurality of slanted line servo bursts are offset radially from the first plurality of slanted line servo bursts. A position error signal (PES) is generated in response to a phase difference when reading the preamble and the slanted line servo bursts.
US07746592B1	Disk drive detecting defective spiral servo track A disk drive is disclosed comprising a disk and a head actuated over the disk, wherein the disk comprises a plurality of spiral tracks, each comprising a high frequency signal interrupted by a sync mark at a sync mark interval. The head is used to read a spiral track to generate a spiral track crossing signal g(xn), where xn is a time in a demodulation window. A position error signal (PES) is determined in response to g(xn), and a deviation index is computed by correlating g(xn) with a nominal track crossing signal shifted by the PES. When the deviation index is less than a threshold, the PES is used to servo the head over the disk.
US07746588B2	Tape-based data storage system capable of reading and/or writing multiple error correctable sets of data A tape-based data storage system according to one embodiment includes a head having an array of channels for writing a set of data tracks on a magnetic tape; wherein data to be written on the magnetic tape in a given pass of the tape relative to the head is parsed into at least two error correctable sets, wherein each of the error correctable sets is written by a unique subset of the array of channels. A tape-based data storage system according to another embodiment includes a head having an array of channels for reading a set of data tracks on a magnetic tape; wherein data read from the magnetic tape in a given pass of the tape relative to the head includes at least two error correctable sets, wherein each of the error correctable sets is read by a unique subset of the array of channels.
US07746584B2	Lens barrel supporting frame, lens retaining structure, lens barrel and camera Lens barrel 3 includes a stationary frame 20, a drive frame 30, a rotation cam frame 70, and a first lens frame 60. The drive frame 30 is supported by the stationary frame 20 to be movable in a Y axis direction along an optical axis of an imaging optical system O and rotatable around the optical axis in response to a drive force. The rotation cam frame 70 is supported by the drive frame 30 to be movable in the Y axis direction relative to the drive frame 30 in response to the drive force. The first lens frame 60 supports a first lens group G1 included in the imaging optical system O, and is supported by the rotation cam frame 70 to be movable in the Y axis direction relative to the rotation cam frame 70 in response to the drive force.
US07746581B2	Device for transferring lens A device for transferring a lens, including a lens installation member in which at least one lens is installed, a guide member guiding the lens installation member, a driver that transfers the lens installation member and comprises a lead screw, a clip member that comprises a thread part contacting the lead screw and an installation portion installed in the lens installation member, an installation pin that rotatably installs the clip member in the lens installation member, and an elastic member installed onto the installation pin. A first portion of the elastic member contacts the clip member and a second portion of the elastic member contacts the lens installation member. A portion of the lens installation member contacting the second portion of the elastic member has an inclined surface shape with respect to a longitudinal direction of the installation pin.
US07746573B2	Bonded optical element and manufacturing method thereof A second optical element is bonded to a first optical element by forming the second optical element by pressing a second optical element material against the first optical element under a condition free from restriction to the second optical element material in the direction orthogonal to a direction in which the second optical element material is pressed.
US07746567B2	Image pickup apparatus An image pickup apparatus includes a first lens for converging light incident thereto through a first field area, a first prism to which light is incident through a second field area at a right of the first field area, a second lens for converging the light emitted from the first prism, a second prism to which light is incident through a third field area at a left of the first field area, and a third lens for converging the light emitted from the second prism. The respective lenses are placed at areas corresponding to the vertices of a triangle in a front view.
US07746566B2	Observation optical system An observation optical system has a negative lens unit including a cemented lens, arranged at the most object-side position; an annular reflecting mirror placed on the image side of the negative lens unit, with a reflecting surface facing the image side; and an imaging lens unit arranged on the image side of the negative lens unit and the annular reflecting mirror.
US07746565B2	Optical lens, optical package having the same, backlight assembly having the same, display device having the same, and method thereof An optical lens includes a recessed part and a refracting part. The recessed part has a substantially circular plan view and a substantially V shaped cross-section. The recessed part forms an angle of no more than an angle of about 20° with respect to a vertical line. The recessed part has a plurality of curved surfaces including different radii so that a light incident into the recessed part is totally reflected from the curved surfaces. The refracting part has a substantially circular plan view extended from the recessed part. A light incident into the refracting part and the reflected light from the recessed part are refracted from the refracting part. Therefore, a luminance uniformity and a color uniformity are improved.
US07746563B2	Large magnification factor zoom lens This large magnification factor zoom lens includes, in an order arranged from an object side, a first lens group having a positive refractive power, a second lens group having a negative refractive power, a third lens group having a positive refractive power, and a fourth lens group having a positive refractive power. The third lens group includes, in an order arranged from the object side, a positive lens, a positive lens, a positive meniscus lens having a larger radius of curvature on an image surface side, and a negative lens. The positive lens has an aspherical surface on an object side.
US07746561B2	Projection optical system, exposure apparatus, and method of manufacturing device A projection optical system which projects an image of a first object onto a second object includes a plurality of lenses and a plurality of aperture stops for determining a numerical aperture. The plurality of aperture stops include a first aperture stop having an opening whose size can be changed, and a second aperture stop having an opening whose size can be changed. The first and second aperture stops are positioned nearer to the second object than a lens having the maximum effective diameter among the lenses included in an imaging optical system nearest to the second object. At least one of the first and second aperture stops is positioned at or near the pupil of the imaging optical system. The range of the numerical aperture determined by the first aperture stop is larger than the range of the numerical aperture determined by the second aperture stop.
US07746560B2	Illumination optical system that uses a solid-state lighting element which generates white light, and an optical device equipped therewith An illumination optical system for use in a microscope or electronic endoscope includes a solid-state lighting element that generates light having a spectral profile with peak intensities at multiple wavelengths such that the light output by said solid-state lighting element is perceived by an observer as being white in color, and a wavelength distribution conversion element having a spectral transmittance profile that includes specified wavelength regions within which the transmittance is nearly constant with increasing wavelength so as to form a step of nearly even intensity, and having specified wavelength regions within which the transmittance changes with increasing wavelength so as to form a transition region. By the combined effect of the solid-state lighting element and the wavelength distribution conversion element, the wavelength distribution of the light generated by the illumination optical system more closely resembles the wavelength distribution of daylight than the light generated by the solid-state lighting element.
US07746555B2	Polarizer, polarization light source and image display unit using them A polarization component, capable of efficiently reflecting an obliquely transmitted light beam toward a light source without degrading the transmission-polarization property of a perpendicular incident light beam, is provided. A C-plate having an oblique retardation of at least λ/8 with respect to a light beam inclined by at least 30° is disposed between at least two reflective circular polarizer layers whose selective reflection wavelength bands of polarized light overlapping each other. A combination of a reflective linear polarizer and a quarter wavelength plate may be used instead of the reflective circular polarizer. Alternatively, a combination of two reflective linear polarizer layers and two quarter wavelength plate layers (Nz≧2) disposed therebetween can provide a similar effect. Further, a combination of two reflective linear polarizer layers and a half wavelength plate (Nz≧1.5) disposed therebetween may be used. When reflective linear polarizer layers are used, they must be bonded together with their axial directions set at a certain angle. The polarization component is preferably used in various image display apparatuses such as liquid crystal display apparatuses and organic EL display apparatuses.
US07746533B2	Electrochromic devices utilizing very low band gap conjugated counter electrodes: preparation and use Disclosed herein are electrochromic devices using a very low band-gap conjugated polymer having a band gap (Eg) of less than or equal to about 1.5 eV, and having little or no electrochromism in the visible region of the electromagnetic spectrum.
US07746531B2	Electro-optomechanical beam steering system, and associated methods An electro-optomechanical beam steering system has: a first deflector for selectively deflecting an optical beam in a first field of regard centered about a boresight; and a rotation stage having a second deflector, the rotation stage selectively positioning the second deflector in azimuth about the boresight, the second deflector selectively deflecting the optical beam of the first field of regard in a second field of regard along a polar axis defined by the second deflector and the azimuth as positioned by the rotation stage. Methods using the beam steering system are also provided, to steer an optical beam or to acquire a target in a field of regard.
US07746527B2	Optical scanning device using modulated laser beams control method of optical scanning device using modulated laser beams, and image display apparatus using modulated laser beams, the system including respective gradation of each pixel by the light beams and successively illuminating each pixel of the plurality of pixels An optical scanning device includes a plurality of light source sections for supplying beams, and a scanning section for directing beams emitted from the light source sections to scan in a first direction and a second direction substantially perpendicular to the first direction on a beam-receiving region. The scanning section is operated such that a frequency at which beams scan in the first direction is higher than a frequency at which beams scan in the second direction. The light source sections are disposed such that an array of spots produced from supplied beams can be positioned on the beam-receiving region in the first and second directions. Gradations are represented using beams for producing spots positioned in parallel on the beam-receiving region in the first direction.
US07746526B2	Image processing apparatus and image processing method for generating a color separation table used in converting an image signal for the amount of a colorant An image processing method generates a color separation table, the color separation table being used in converting an image signal to a signal for a colorant for use in a printer and storing grid-point data as the colorant signal so as to associate the grid-point data with a grid point defined by the image signal. The image processing method includes obtaining data of a first color separation table and generating a second color separation table based on the difference between a maximum allowable amount of colorant discharge for the first color separation table and a maximum allowable amount of colorant discharge for the second color separation table and the data of the first color separation table so that a total amount of colorant discharge of the second color separation table does not exceed the maximum allowable amount of colorant discharge for the second color separation table.
US07746522B2	Image reading device A scanner unit includes a housing having an opening on its upper surface, a platen glass provided so as to be exposed from the opening on the upper surface of the housing, a carriage provided in the housing so as to be movable parallel with the platen glass, a linear CIS mounted on the carriage in a direction perpendicular to the moving direction to read the image of a document placed on the platen glass, roller units provided in the vicinity of both ends and central part with respect to the vicinity of the both ends of the CIS in the longitudinal direction so as to abut on the platen glass, and a coil spring provided in the carriage so as to force the CIS toward the platen glass.
US07746518B2	Area image acquiring method for image reading apparatus An image acquiring method of a scanned image is applying to an image reading apparatus having an automatic sheet-feeding function. The method includes the steps of: acquiring a first image at a scan region of the image reading apparatus by performing a sheet-feeding operation and an image reading operation; analyzing the first image to recognize an effective area and an ineffective area outside the effective area; and adjusting a timing for starting acquiring a second image in relation to size of the ineffective area, so as to reduce the size of the ineffective area in the second image.
US07746517B2	Image illumination and capture in a scanning device Scanning devices and method of use that permit the capture of high resolution images of an original that is illuminated by a light source that is located outside of the optical field of view of an image detector. In one aspect, the image detector may be a monochrome sensor that sequentially captures different color plane images of an original that is illuminated by different colors. The different color plane images may be processed to generate a full color copy of the original. Light and images may be directed through tapered optical waveguides to minimize the volume of the scanning device. The image detector may include a first associated waveguide while the light source may include a second associated waveguide.
US07746513B2	Scanner and method thereof A scanner including a light source, an optical module, a driving device, and a control unit is provided. The light source emits a light beam to the to-be-scanned document. The optical module includes a photo sensing device for receiving the light beam reflected by the to-be-scanned document. The driving device includes a position detecting device, for detecting a position of the optical module relative to the to-be-scanned document, and outputting a position feedback signal accordingly. The control unit includes a light source controller and a timer. The scanning method includes the steps of setting the value of K to 1; moving the optical module to read the Kth scan line and adjusting the luminance of the light source to compensate exposure level of the (K+1)th scan line; and determining if K is smaller than N.
US07746506B2	Image production using enhanced eye-marks An image production method and system in which enhanced eye-marks are utilized. A method embodiment includes receiving image production instructions directing the production of an image. Enhanced eye-mark data is generated for an enhanced eye-mark having an instructive portion and a descriptive portion. An image forming device is caused to form the image and the enhanced eye-mark on print media.
US07746505B2	Image quality improving apparatus and method using detected edges An image quality improving apparatus and method that distinguish an edge of an actual outline imagely recognized in an image inputted via an image input unit from those printed according to dither patterns, to emphasize the actual outline, and thereby acquire the image without distortion. The image quality improving apparatus comprises: a first unit estimating edge pixels of a text area in a predetermined detection area to be edge-detected from an input picture data containing a text and an image; and a second unit judging actual edge pixels based upon a number of edge-estimated pixels in a multiple window area and saturation values of individual edge-estimated pixels, and emphasizing individual actual edge pixels with different edge emphasis coefficients according to saturation values of the actual edge pixels.
US07746499B2	Color image processing apparatus and method A color image processing system outputs data to a color image forming unit for forming a color visible image by overlapping a plurality of color developers. The color image processing system includes a print data receiving unit that receives print data, a bitmap data producing unit that produces bitmap data having colors that correspond to the plurality of color developers from the print data, a data size determining unit that determines a data size of the bitmap data, and a degrading unit. When the data size determined by the data size determining unit is greater than a predetermined size, the degrading unit produces bitmap data having fewer colors, wherein a predetermined color is removed from the colors corresponding to the plurality of color developers.
US07746497B2	System and method for data processing In a data processing system in which data to be processed is managed as processing-object data, and the processing-object data is processed in response to a designation, there are provided: data management means for managing the processing-object data together with processing-object attribute information indicative of an attribute thereof; processing designation means for designating a processing with respect to the processing-object data through a dialog performed with the user; processing execution means for executing a processing of the processing-object data in response to a designation performed by the processing designation means; and first processing result forecasting means for executing, when the dialog is performed, a forecast on a result of the processing by comparing processing-subject attribute information, which indicates an attribute of a processing to be executed by the processing execution means, with the processing-object attribute information, and for outputting to the user forecast notification information in accordance with the result of the processing obtained through the forecast.
US07746495B2	Image reading device and image processing method utilizing the same An image processing apparatus provided with a reader for reading an original image, a connection unit for connection with a network to which plural computers are connected, and a transfer unit for transferring the image data, read by the reader, to a computer through the connection unit, the apparatus comprising a specifying unit for specifying a desired one among the computers connected through the connection unit, and a designation unit for designating image reading by the reader, wherein the transfer unit is adapted to transfer the image data, read by the reader in response to the designation by the designation unit, to a computer specified by the specifying unit.
US07746494B2	Data processing apparatus, data processing method, printer driver, print control apparatus, print control method, and printing system In a printing system, intermediate data in a rendering-standby state can be rendered before intermediate data of an entire page is accumulated in a printing apparatus. A printer driver of a host computer sequentially converts a plurality of rendered objects of each page generated by an application to rendering commands of each page which can be interpreted by the printing apparatus. Every time a rendered object that should be rendered last in each of a plurality of bands, which are defined by dividing a page by the printing apparatus, is detected, the printer driver converts the rendered object that should be rendered last to a rendering command and notifies the printing apparatus of end information indicating the end of processing of the corresponding band.
US07746490B2	Printed document managing method, printed document managing program, image forming apparatus, and printed document managing system A printed document managing method, a printed document managing program, an image forming apparatus, and a printed document managing system are provided. In the system of the present invention, a complex device reads a sheet ID recorded on a wireless IC chip attached to an original paper sheet, using a first reading unit. The complex device also reads a sheet ID recorded on a wireless IC chip attached to a paper sheet on which copying is to be performed. The complex device then records output history data having the sheet ID of the original paper sheet associated with the sheet ID of the paper sheet on which copying is to be performed, and transmits the output history data to a managing computer. The managing computer then records the output history data in an output history data storing unit.
US07746488B2	Network-based image forming device and print secure method thereof A network-based image forming device and method for storing and printing files sent from at least one user terminal connected through a network is disclosed. The network-based image forming device and method comprises an interface unit for providing a communication interface with the user terminal; a storage unit for storing a protected file and the print-authorized user information if the protected file having print-authorized user information set therein is sent from the user terminal through the interface unit; and a control unit for displaying a list of the files stored in the storage unit in response to a display request signal, and if a file selected out of the displayed list of files is a protected file, displaying a request message to request an input of user information and determine whether the user is an authorized user, and, if the user information input in response to the message matches the print-authorized user's information set in the selected file, printing the selected file.
US07746482B2	Determining the position of a semiconductor substrate on a rotation device A device for determining the position of a semiconductor substrate on a rotation device having a rotational axis, including a direction of rotation detecting unit for determining the rotational state of the rotation device, and also including at least one light source and at least one receiver which is photo-sensitive to the light from the light source, wherein at least one light beam emitted by the light source is directed toward the edge of the semiconductor substrate and passes said edge to at least a partial extent. The light of the light beam which has passed to at least a partial extent is then detected at least partially by the receiver.
US07746479B2	Wavefront-aberration measuring device and exposure apparatus including the device A measuring device for measuring a wavefront aberration of an optical system includes a first mask for defining light that enters the optical system, and a second mask having first to fourth openings. The first opening transmits a component of the light passing through the optical system without removing information about the wavefront aberration of the optical system, and the second to fourth openings transmit components of the light passing through the optical system having the information about the wavefront aberration of the optical system removed.
US07746478B2	Method for interferometrically measuring an optical property of a test piece and a device suited for carrying out this method The invention relates to a method for interferometrically measuring large optics. A combination of a method known as stitching technique, during which the sub-interferograms are determined on partial surfaces of measuring area and are joined in a software-controlled manner and which, as a result, enables the use of small, more cost-effective interferometers, however polished surfaces of the test piece being assumed, together with an immersion method, during which, in fact, lower demands for the surface quality of the test piece exist that, however, is accompanied by edge faults. In order to make this combination possible, a modification of the stitching technique is developed, during which the measuring area (CA) is completely covered by a film consisting of an immersion liquid. A device a suited for carrying out this method is characterized by contact bodies, which are made of transparent material, rest upon the main surfaces of the test piece, and which completely cover the measuring area (CA), a film consisting of an immersion liquid being formed between the contact bodies and the main surfaces of the test piece.
US07746474B2	Color identifying device for identifying colors of reaction surfaces produced by chemical reaction and gas identifying device A color identifying device includes a mount block, a color detector, a lens and a color identifier. A reactive board having a plurality of surfaces to be measured in respective predetermined positions is mounted in the mount block. The color detector has a plurality of color measuring areas corresponding respectively to the reaction surfaces of the reactive board mounted in the mount block. The lens forms images of the surfaces of the reactive board mounted in the mount block on the respective color measuring areas. The color identifier identifies the colors of the surfaces based on output signals from the corresponding color measuring areas.
US07746471B1	Flying mobile on-board ellipsometer, polarimeter, reflectometer and the like systems A substantially self-contained “on-board” material system investigation system for effecting relative translational and rotational motion between a source and detector of electromagnetic radiation and a sample, which system is functionally mounted on a three dimensional locational system to enable positioning at desired locations on, and distances from, the surface of a sample, including the capability to easily and conveniently effect rotation and/or to change the angle-of-incidence of a beam of electromagnetic radiation onto a sample surface and/or to provide gas flow confined in a mini-chamber near the surface of a sample, at a location at which a beam having UV, VUV, IR and/or NIR wavelengths of electromagnetic radiation is caused to be impinged thereupon.
US07746466B2	System and method for flow cytometry A flow cytometry system and related method, among other things, are disclosed. In at least one embodiment, the system includes first, second, and intermediate slab formations, the last of which has formed therewithin a microfluidic channel, a lens structure arranged proximate the microfluidic channel, and a light conveying structure arranged proximate to the lens structure. The lens structure is configured to direct a portion of light to proceed between the channel and the conveying structure. The intermediate slab formation is sandwiched between the other two slab formations. In at least another embodiment, the system includes a microfluidic prism arranged proximate to the second end of a light conveying structure. Light emanating from a microfluidic channel is provided to the conveying structure at the first end, conveyed to the second end, and provided to the prism, which outputs a plurality of portions of the light at different frequencies in different directions.
US07746460B2	Device and method for scanning pieces of solid wood A device for scanning pieces of solid wood has a pusher movable across a length of a piece of solid wood and at least one scanning unit mounted on the pusher. At least one side of the piece of solid wood is scanned by the at least one scanning unit as the at least one scanning unit moves together with the pusher. The at least one scanning unit has at least one camera with which the piece of solid wood is scanned. The at least one camera is adjustably mounted on the pusher.
US07746452B2	Portable meter to measure chlorophyll, nitrogen and water and methods Methods for determining chlorophyll content comprise providing a sample, subjecting the sample to light at a first wavelength and detecting a first wavelength response, subjecting the sample to light at a second wavelength and detecting a second wavelength response, and calculating a chlorophyll content of the sample based on at least the first wavelength response and the second wavelength response. Optional approaches include detecting the nitrogen content and/or water content of the sample. Associated apparatus for determining chlorophyll content, which may comprise a handheld device, is also disclosed.
US07746445B2	Lithographic apparatus, device manufacturing method and a substrate A substrate is provided with a coating of material which is substantially transparent to the wavelength of the projection beam. The coating may be thicker than the wavelength of the projection beam and have a refractive index of the coating such that the wavelength of the projection beam is shortened as it passes through it. This allows the imaging of smaller features on the substrate. Alternatively, the coating may be used with a liquid supply system and act to keep bubbles away from a radiation sensitive layer of the substrate.
US07746439B2	Mounting film for liquid crystal display drive chip and method for manufacturing the same The present invention provides a mounting film for a liquid crystal display drive chip and a method for manufacturing the same. The mounting film is provided with a slit cut from a side edge thereof, or provided with a weakened line for forming the slit. When a distance between a liquid crystal display panel and a control circuit substrate of the liquid crystal display unit is un-uniform, the opening degree of the slit is variable accordingly to accommodate variations in the distance. Such a COF mounting film for a liquid crystal display drive chip may be generally used even though a distance between the liquid crystal display panel and the control circuit substrate varies slightly. Therefore, the manufacturing cost of the liquid crystal display unit may be reduced.
US07746438B2	Liquid crystal display device and method of driving thereof The liquid crystal display device includes a first insulation substrate, a gate line which is disposed on the first insulation substrate and extends substantially in a first direction, first and second data lines which are insulated from the gate line, extend substantially in a second direction and intersect the gate line, a pixel electrode which includes first and second sub-pixel electrodes which are each provided with different data voltages via the first and second data lines, respectively, and which are separated from each other by a gap, the second sub-pixel electrode at least partially overlapping the first and second data lines, a second insulation substrate which faces the first insulation substrate, a black matrix which is disposed on the second insulation substrate and includes an irregular shape and extends substantially along the first and second data lines and a liquid crystal layer which is interposed between the first and second insulation substrates.
US07746437B2	Liquid crystal display A liquid crystal display includes an insulating substrate, an alignment layer covering a main surface of the insulating substrate, and electrodes interposed therebetween. The alignment layer defines an alignment direction parallel to the main surface, an upstream side as one end's side of the alignment direction, and a downstream side as another end's side of the alignment direction, and tilts liquid crystal molecules toward the downstream side. Each electrode includes an upstream section that includes a first edge facing the upstream side and a downstream section that includes a second edge facing the downstream side and is provided with a recess recessed relative to the second edge. The first recess forms on the downstream section a third edge extending in the alignment direction and a fourth edge connecting the third edge to the second edge and facing the upstream side.
US07746436B2	Display panel A display panel includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a plurality of pixel electrodes in a plurality of lower pixel portions, respectively, and each of the pixel electrodes includes a plurality of lower openings spaced apart from each other. The second substrate includes a common electrode including a plurality of upper openings spaced apart from each other in a plurality of upper pixel portions corresponding to the lower pixel portions, respectively. The upper openings are connected to each other between adjacent upper pixel portions in a first direction. The liquid crystal layer is interposed between the first and second substrates.
US07746429B2	Liquid crystal display panel A liquid crystal display (LCD) panel including a thin film transistor (TFT) array substrate, a color filter substrate, a sealant, and a liquid crystal layer is provided. The TFT array substrate includes a substrate, a plurality of pixel structures, a plurality of scan lines, a plurality of data lines, and a light-shielding pattern. The scan lines and data lines are disposed on the substrate for controlling the operation of the pixel structures. The light-shielding pattern arranged on the periphery of the panel traverses the scan lines and data lines and is electrically insulated from the scan lines and data lines. The sealant is sandwiched between the TFT array substrate and the color filter substrate and is corresponding to the light-shielding pattern. The liquid crystal layer is disposed between the TFT array substrate, the color filter substrate, and the sealant.
US07746428B2	Liquid crystal display element In manufacturing a liquid crystal display element which includes a black matrix, in curing an ultraviolet curing sealing material after filling liquid crystal using a dropping injection method, there has been a possibility that a radiation quantity of ultraviolet rays to the sealing material is insufficient and hence, the curing is not sufficiently performed thus largely lowering the reliability of the liquid crystal display element. According to the present invention, an overlapping width of a frame-like sealing material and a black matrix on a peripheral portion along a display region is suppressed to 0.2 mm or less, or a region of the black matrix which is overlapped to the frame-like sealing member is patterned to include a light transmitting portion.
US07746427B2	Liquid crystal display having color filters with recess structures A liquid crystal display includes a lower substrate, an upper substrate positioned parallel with the lower substrate, and a plurality of pixel units between the lower substrate and the upper substrate. Each pixel unit includes an upper transparent electrode, a liquid crystal layer, a lower transparent electrode, and a color filter with recess structures.
US07746420B2	Liquid crystal display having a fixing member comprising a pressing protrusion and a window into which the pressing protrusion extends An exemplary liquid crystal display (LCD) (200) includes an LCD panel (210) including a first glass substrate (212) and a second glass substrate (214) parallel to the first glass substrate; a backlight module (220) includes a frame (222) accommodating the LCD panel; and a fixing member (240) attached to the frame of the backlight module and resiliently holding an end portion of the LCD panel in position in the frame.
US07746417B2	Thin film transistor array panel for a display A thin film transistor array panel comprising: an insulating substrate; gate lines formed on the insulating substrate; data lines defining a display region by intersecting the gate lines while being insulated; an electrostatic dispersion line intersecting the gate lines; diodes adhered to the gate lines and to the electrostatic dispersion line; and a repair line for repairing the data lines formed on the insulating substrate outside the display region and intersecting the electrostatic dispersion line while being insulated. According to the present invention, since static electricity flowing along the repair line is not transferred to the data lines, defects of a thin film transistor of the display region may be prevented.
US07746411B1	Color management unit A color management unit is architected to achieve higher-quality appearance used in various video formats and to enable improvements in picture contrast and colorfulness. The color management unit comprises an optional input color space converter to convert the input digital video to a desired color space, an adaptive contrast enhancer to apply contrast improvement algorithms in response to different scenes in either manual or automatic modes, intelligent color remapping for enhancing selected colors, sRGB compliance to produce a video display that is uniform over different monitors, global color and brightness controls to combine global processing and color conversion, gamut compression to maintain pixel validity in color space conversion, and gamma correction to compensate for nonlinear characteristics of an output display.
US07746408B2	Method and system for improving the appearance of deinterlaced chroma formatted video Herein described is a system and method for improving the appearance of video by generating an improved 4:2:2 chroma. The system comprises a 4:2:2 to 4:2:0 chroma regenerator that regenerates 4:2:0 chroma given a received 4:2:2 chroma, and a 4:2:0 to 4:2:2 chroma generator that weaves and interpolates the regenerated 4:2:0 chroma to yield an adjusted 4:2:2 chroma. The system further comprises a blending system used for blending the adjusted 4:2:2 chroma with the received 4:2:2 chroma based on a control input provided by a motion indication signal. The method comprises regenerating a 4:2:0 chroma from a received 4:2:2 chroma using an algorithm. The method further comprises generating an adjusted 4:2:2 chroma using the regenerated 4:2:0 chroma using another algorithm. The method further comprises blending the adjusted 4:2:2 chroma with the received 4:2:2 chroma to generate an improved 4:2:2 chroma.
US07746407B2	Apparatus and method for storing data in a digital broadcasting receiver Embodiments of an apparatus and a method for storing data in a digital broadcasting receiver can convert received digital TV broadcasting data into data of another format before being stored. In one embodiment, redundancy data of the digital TV broadcasting data can be generated based on the converted data of the predetermined format and stored with the converted data of the predetermined format to variably output two formats of data with the single stored data.
US07746406B2	Folded compact image capture apparatus A digital still camera includes a main body; a liquid crystal display (LCD) panel coupled rotatably to an end portion of the main body of the camera in such a manner that a display portion thereof faces said main body; and a lens housing inserted rotatably and independently into a space formed in a portion where the main body and the LCD panel are coupled.
US07746399B2	Image pick-up device A pixel portion of an image pick-up device having a pixel portion of pixels arranged in matrix converting a subject image to an electric signal, and a scanning unit of sub-scanning circuits outputting a video signal, a first scanning circuit selecting a pixel position in a first matrix direction and a second scanning circuit selecting a pixel position in a second direction intersecting the first direction. One of the first and second scanning circuits shares the signal lines. The image pick-up device includes a scanning control circuit controlling the first and second scanning circuits. The pixel area structures of the pickup device are uniform, the wirings are uniform, and the vertical and horizontal driving systems and an output system are uniform. Thus, pixel signals outputted from two output systems have no property differences and image quality is improved.
US07746396B2	Imaging device and method of creating image file A method of creating an image file in an imaging device, and an imaging device are provided. The method comprises providing an image sensor comprising pixels with an infrared filter arrangement so that some of the pixels of the sensor may be exposed to all wavelengths and some of the pixels of the sensor are blocked from infrared wavelengths. The pixels of the sensor that may be exposed to all wavelengths are utilized when taking an infrared image and the pixels of the sensor that are blocked from infrared wavelengths are utilized when taking a normal image.
US07746395B2	Color interpolation methods for correcting outlying values This invention of a color interpolation method for correcting color values of an image, comprising the steps of: constructing a color interpolation matrix having a plurality of points and a center point as an interpolation point, where each point being expressed by one known color and two unknown colors; correcting the known color value of the center point as a function of the color values of the center point and the points in the matrix having the same known color; choosing the horizontal direction or the vertical direction with respect to the center point as the benchmark direction for interpolation calculation; and interpolating one or more unknown color values of the center point as a function of the known color values of the points in the benchmark direction and the known color value of the center point.
US07746394B2	Pixel array and image processing apparatus for image-capturing An image-capturing apparatus includes a pixel array including pixels. Each of the pixels includes a transducer for generating signal charge according to the intensity of an incident light beam. The image-capturing apparatus further includes an output circuit for outputting a pixel signal outside the pixel array at a frame rate depending on the pixel position in the pixel array, based on the signal charge; and an output-controlling unit for controlling the operation of the output circuit.
US07746391B2	Resolution proportional digital zoom A resolution proportional digital zoom system comprises a CCD imaging device with over a million pixels resolution. A standard fixed-1X optical lens is fitted to the imager. A communication channel with a limited bandwidth is used to transmit video. Such bandwidth is substantially less than the imager's full resolution times its frame rate. A user is provided with controls to pan and zoom within the imager's field of view. The pixel resolution is proportionally controlled such that video output data rate on the communication channel is optimal and held within maximum limits at any pan/zoom setting.
US07746389B2	Image capture apparatus including generation of backup data A digital camera generates principal image data of a predetermined size and backup image data of a maximum size, and records the principal image data and the backup image data in a memory card and an internal memory respectively. In a resize processing in a replay mode, if the backup image data corresponding to the principal image data has been recorded, and a designated size is larger than the principal image data, a resize processing section reads the backup image data from the internal memory and performs the resize processing to the backup image data.
US07746387B2	Methods and systems for synthesizing pickup images In an image pickup apparatus, a level compensator compensates the level of an image xL (i, j) sensed by an image sensor by exposure for a long time on the basis of the exposure of the image to produce a compensated image xL′ (i, j), while another level compensator compensates the level of an image xS (i, j) sensed by the image sensor by exposure for a short time on the basis of the exposure of the image to produce a compensated image xS′ (i, j). The image pickup apparatus also includes an image synthesizer to synthesize these compensates images xL′ (i, j) and xS′ (i, j) to produce a single synthetic image x (i, j). A dynamic range compressor also included in the image pickup apparatus compresses the synthetic image x (i, j) to produce a compressed image y (i, j) for delivery to outside.
US07746383B2	Photodiode CMOS imager with column-feedback soft-reset for imaging under ultra-low illumination and with high dynamic range The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.
US07746379B2	Sensing cargo using an imaging device A camera is used to sense cargo in a cargo space. An image of at least a portion of a cargo space is captured using the camera, and a digital signal processor classifies the image as representing an empty cargo space or a non-empty cargo space. Additionally, a type of cargo represented by the captured image may also be classified by the digital signal processor and an indication of the type of cargo output.
US07746378B2	Video analysis, archiving and alerting methods and apparatus for a distributed, modular and extensible video surveillance system Systems and methods are disclosed for analyzing, managing and cataloguing video tracks generated by a video surveillance system. Systems and methods operating in accordance with the present invention receive video tracks from a video surveillance system; analyze them for particular categories of, for example, objects or events, assign unique identifying tags to the video tracks; and save them in highly-cross-referenced databases so that video tracks containing, for example, particular objects or events can be easily searched for and recalled. In addition, the present invention provides browsing facilities for viewing events that have just elapsed, events that are occurring in near real-time.
US07746369B2	Lens array, a line head and an image forming apparatus using the line head A lens array, includes: a clear substrate; and a plurality of plastic lens substrates each of which includes a plurality of lenses and which are arranged on at least one of surfaces of the clear substrate.
US07746366B2	Multi-beam image output apparatus and method using a small number of pixel clock generation units An image output apparatus which outputs a high quality image by using a small number of pixel clock generation units, for use with a printing engine which has a plurality of laser beam control units. The image output apparatus includes a plurality of output units which output video signals based on print data to the respective laser beam control units in synchronization with a clock signal; and a plurality of clock control units which are arranged in correspondence with respective groups, that are prepared by grouping the plurality of output units, so as to decrease an optical path difference between laser beams controlled by the corresponding laser beam control unit. Each of the clock control units generates the clock signal on the basis of a synchronizing signal generated in the printing engine, and outputs the generated clock signal to output units belonging to a corresponding group.
US07746365B2	Image display device for rotating an image displayed on a display screen An image display device comprises a frame arranged along the periphery of display screen and a plurality of detectors mounted on the frame, each for generating a detection signal in response to an object positioned outside of the frame. Each of detectors generates a detection signal indicative of the distance to an object that is present in a direction associated therewith. A control circuit selects a detection signal indicative of the shortest distance of the detection signals. The control circuit controls the direction of an image that is displayed on a display screen such that the bottom of the image is moved to a side corresponding to the detector that generates the selected detection signal.
US07746364B2	Brightness correction method and system utilizing the same A brightness correction method for a display panel, comprising showing a plurality of image areas in the display panel, wherein the image areas display different colors, each color has a plurality of luminance values according to a plurality of gray values, and wherein each gray value corresponds to a gamma voltage; detecting the luminance values; and adjusting the gamma voltages according to the detected luminance values.
US07746363B2	Entry of data in a data processing system The invention relates to a method and a system for entering data (12-15) in a data processing system (1). In this case, the data (12-15) is entered in a number of steps (2-5), with a view being displayed at a step (2-5) in a display region (19) of a display means (6), with the entering and/or display taking place in subsequent steps (2-5) at least partially as a function of the data (12-15) entered in one or a number of preceding steps (2-5). To design the step-by-step entering of data in a more user friendly manner, it is proposed to simultaneously display the views (16-18) of a number of consecutive steps (2-5)in the display region (19).
US07746362B2	Automatic call distribution system using computer network-based communication Multiple communication types are integrated into a call center. The communication types can be chat, email, Internet Protocol (IP) voice, traditional telephone, web page, digital image, digital video and other types. Features of the invention include allowing a single agent to handle multiple customers on multiple channels, or “endpoints.” Prioritizing and assigning calls to agents based on a specific criteria such as the number of endpoints assigned to an agent, the agents availability, the priority of a customer call, the efficiency of a given agent and the agent's efficiency at handling a particular communication type call. An agent user interface is described that allows the agent to have control over accepting multiple calls. The agent can drag and drop canned responses, images, URLs, or other information into a window for immediate display on a customer's computer. The system provides for detailed agent performance tracking. The system provides failure recovery by using a backup system. If the network server fails, then the customer is connected directly to an agent. When a failed computer comes back on line, the statistics gathered are then used to synchronize the returned computer. The system provides extensive call recording or “data wake” information gathering. The system provides flexibility in transferring large amounts of historic and current data from one agent to another, and from storage to an active agent. The system integrates human agents' knowledge with an automated knowledge base. The system provides for an agent updating, or adding, to the knowledge base in real time. The system also provides for “blending” of different communication types.
US07746361B2	Method of realising a boundary of a rotated object A method is described for determining a discrete boundary for an object to be rendered into a raster pixel image having a plurality of scanlines. In the method, the object is rotated by an integer multiple of 90 degrees, and an outline of the rotated object is decomposed into line segments. For each scanline to be rendered, points of intersection between the line segments and the scanline are determined, and each point of intersection is rounded to an adjacent position selected from a finite set of positions on the scanline using a rule chosen according to the amount of rotation. The rounded points of intersection delimiting the discrete boundary. If the object is rotated by odd multiple of 90 degrees the method includes the steps of identifying points of intersection that satisfy a predetermined criterion; and shifting the identified points of intersection prior to rounding.
US07746359B2	Signal processing device and signal processing method, and program and recording medium A signal processing device, signal processing method, and program and recording medium whereby images and the like closer approximating real world signals can be obtained. The signal processing device includes a movement vector setting unit, a model generator, an equation generator, and a real world waveform estimating unit.
US07746357B2	Dual-plane graphics Two or more graphics planes are combined according to a scheme that circumvents mixing of certain regions to conserve resources. Although some mixing is circumvented, the outputted display image remains visually adequate.
US07746351B2	Systems and methods for updating a frame buffer based on arbitrary graphics calls A method for dividing a display into zones at system initialization for tracking which zones have any pixels revised so that, when the time comes to update the display, only the zones requiring revision (that is, those zones in which any pixel has been revised) are copied from shadow memory to the frame buffer for display on the display device. The memory for tracking these zones can be allocated at initialization and held since it is relatively small. Consequently, a significant performance gain may be achieved by avoiding the shortcomings of the existing methods in the art notwithstanding the fact that some “clean” pixels in each zone having even a single changed pixel are also rewritten to the frame buffer.
US07746347B1	Methods and systems for processing a geometry shader program developed in a high-level shading language Methods and systems for processing a geometry shader program developed in a high-level shading language are disclosed. Specifically, in one embodiment, after having received the geometry shader program configured to be executed by a first processing unit in a programmable execution environment, the high-level shading language instructions of the geometry shader program is converted into low-level programming language instructions. The low-level programming language instructions are then linked with the low-level programming language instructions of a domain-specific shader program, which is configured to be executed by a second processing unit also residing in the programmable execution environment. The linked instructions of the geometry shader program are directed to the first processing unit, and the linked instructions of the domain-specific shader program are directed to the second processing unit.
US07746346B2	Method and system of rendering 3-dimensional graphics data to minimize rendering area, rendering time, and power consumption A three-dimensional graphics data rendering method. The method divides initially inputted first graphics data into a static object and a dynamic object, performs a rendering process with respect to the static object, and updates a predetermined buffer with the rendering result. Then the method performs a transformation process, a portion of the rendering process with respect to the dynamic object, determines an updating area, and stores a rendering result of the buffer corresponding to the updating area in a predetermined storage unit; performs a remaining rendering process with respect to the dynamic object, updates the buffer and outputs a first image whose rendering is completed. Finally, the method restores a rendering result of the updating area to the buffer by referring to the storage unit and utilizes a rendering result of the restored buffer as a rendering result of subsequently inputted second graphics data.
US07746343B1	Streaming and interactive visualization of filled polygon data in a geographic information system Interactive geographic information systems (GIS) and techniques are disclosed that provide users with a greater degree of flexibility, utility, and information. A markup language is provided that facilitates communication between servers and clients of the interactive GIS, which enables a number of GIS features, such as network links (time-based and/or view-dependent dynamic data layers), ground overlays, screen overlays, placemarks, 3D models, and stylized GIS elements, such as geometry, icons, description balloons, polygons, and labels in the viewer by which the user sees the target area. Also, “virtual tours” of user-defined paths in the context of distributed geospatial visualization is enabled. Streaming and interactive visualization of filled polygon data are also enabled thereby allowing buildings and other such features to be provided in 3D. Also, techniques for enabling ambiguous search requests in a GIS are provided.
US07746337B2	Inverter circuit An inverter circuit includes a first driving transformer, a second driving transformer, a power voltage circuit, a high-side FET connected to a secondary winding of the first driving transformer, a low-side FET connected to a secondary winding of the second driving transformer and an inverter transformer connected to a driving node between the high-side FET and the low-side FET. Thus, a direct current path does not exist between a gate of the high-side FET and the driving node, so that a gate voltage of the high-side FET is biased more to a negative polarity.
US07746336B2	Power source circuit, display driver, electro-optic device and electronic apparatus A power supply circuit for supplying a voltage to a counter electrode which faces a pixel electrode in an electro-optic device, an electro-optic material being disposed between the counter electrode and the pixel electrode, includes: an operational amplifier which drives the counter electrode; and an operational amplifier control circuit which controls at least one of a slew rate and an electric current drive capacity of the operational amplifier. The operational amplifier control circuit increases at least one of the slew rate and the electric current drive capacity of the operational amplifier, during a control time starting at a start timing of a write-in to the pixel electrode, and brings the slew rate and the electric current drive capacity of the operational amplifier back to the state prior to the control time after passing the control time.
US07746334B2	Apparatus and method for driving liquid crystal display device A driving apparatus of a liquid crystal display device includes a liquid crystal display panel display a video signal by use of a liquid crystal cell of a matrix shape. A plurality of data drive circuits generate a polarity pattern of the video signal in accordance with a polarity signal and supply the polarity pattern to the liquid crystal cell through a plurality of output channels. A polarity controller controls the polarity signal and supplies the polarity signal to the data drive circuits on the basis of a first selection signal corresponding to the number of the output channels of one drive circuit and a second selection signal corresponding to a repetition period of the polarity pattern.
US07746333B2	Semiconductor device The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.
US07746331B2	Source-follower type analogue buffer, compensating operation method thereof, and display therewith A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage. In the source-follower-type analogue buffer, during a compensation period, a voltage drop is stored in a proposed storage capacitor, and during a data-input period, the output voltage is compensated by the voltage stored in the storage capacitor.
US07746330B2	Circuit and method for improving image quality of a liquid crystal display A circuit and method of reducing noises for improving quality of display in a liquid crystal display (LCD) system. The LCD system includes an LCD panel and at least one lamp. In operation the LCD system is supplied with a vertical synchronization signal and a horizontal synchronization signal. In one embodiment, the method comprises the steps of determining a lamp driving frequency for the at least one lamp responsive to the horizontal synchronization signal, and generating a lamp driving signal with the lamp driving frequency to be received by the at least one lamp for producing light, wherein the following formulae (1) and (2) are satisfied: f lamp = 2 ⁢ n - 1 m ⁢ H sync + δ ( 1 ) and ⁢ ⁢ H sync / m ≥ δ ≥ 0 ( 2 ) where Hsync is the frequency of the horizontal synchronization signal in unit of (Hz); flamp is the lamp driving frequency for the lamp driving signal in unit of (Hz); m, n=1, 2, 3, . . . , an integer; and δ indicates the permissible error of the lamp driving frequency.
US07746317B2	Liquid crystal display having a light sensor and driving method thereof for adjusting luminance according to that of ambient light An exemplary liquid crystal display (200) has a liquid crystal panel (240); a gate driving circuit (230) configured for scanning the liquid crystal panel; a data driving circuit (220) configured for providing a plurality of gradation voltages to the liquid crystal panel; a photo sensor (241) configured for measuring a luminance of ambient light and generating a corresponding optical signal; a luminance control circuit (231) for receiving the optical signal from the photo sensor and transferring the optical signal to a measurement signal; a timing control circuit (210) configured for controlling the gate driving circuit and the data driving circuit; and a backlight circuit (270) for driving a light source to emit light beams for illuminating the liquid crystal panel, according to the measurement signal from the luminance control circuit.
US07746315B2	Timing control circuit and liquid crystal display using same An exemplary liquid crystal display (LCD) (20) includes an LCD panel (24), a timing control circuit (21), a plurality of gate drivers (23) connected to the LCD panel, and a plurality of data drivers (22) connected to the LCD panel. The timing control circuit includes a plurality of reduced swing differential signaling (RSDS) output terminals. Each data driver is electrically connected to a respective RSDS output terminal of the timing control circuit via an independent conducting line.
US07746310B2	Apparatus and method for data-driving liquid crystal display The present invention discloses an apparatus and method for data-driving a liquid crystal display wherein data lines are time-divided to reduce the number of data driver integrated circuits and to improve the display quality of a picture at the same time. More specifically, the apparatus includes a first multiplexor array applying an input pixel data on a time-division basis, a digital-to-analog converter array converting the time-divided pixel data into pixel voltage signals, and a demultiplexor array performing the pixel voltage signals to the time-divided data lines.
US07746309B2	Driving circuit having static display units and liquid crystal display device using the same An exemplary liquid crystal display device (1) includes a first substrate (3), a second substrate (2) facing the first substrate, and a liquid crystal layer (4) sandwiched between the first substrate and the second substrate. The first substrate includes a plurality of scan lines (11); a plurality of first and second parallel data lines (12, 22) orthogonal to the scan lines; a plurality of first and second thin film transistors (14, 24), positioned near a crossing of a corresponding scan line and a corresponding first data line, respectively; a plurality of first and second pixel electrodes (15, 25) electrically coupled to the first and second thin film transistors, respectively; a plurality of first and second static display units (19, 29) for providing voltage to the first and second pixel electrodes in a static display mode.
US07746303B2	Method and apparatus for extending the color depth of displays A method of extending color depth in a display includes determining pixel sub-intervals for pixel intervals in a video signal, modulating a transmissivity of a display panel of the display from one sub-interval to another sub-interval, and modulating backlight intensity of a backlight from the one sub-interval to the another sub-interval.
US07746302B2	Reference voltage generating circuit and liquid display device using the same A reference voltage generating circuit for an LCD device includes a main pumping section, a sub-pumping section, an input section inputting a level designating signal periodically and alternately designating a first reference level and a second reference level, and a control section alternately comparing an output voltage with the first and second reference levels in response to the level designating signal, wherein the control section outputs a first logic level and the main pumping section selectively lowers the output voltage in a fast negative pumping and the sub-pumping section selectively raises the output voltage in a slower positive pumping.
US07746299B2	Display, array substrate, and method of driving display A display includes pixels arrange in a matrix. Each pixel includes a display element, a first drive current control circuit which is supplied with a first video signal and outputs a first drive current to the display element at magnitude corresponding to magnitude of the first video signal, and a second drive current control circuit which is supplied with a second video signal and outputs a second drive current to the display element at magnitude corresponding to magnitude of the second video signal. The display can set a ratio T1/T2 larger than 1, wherein T1 represents a time period over which the first drive current control circuit can output the first drive current to the display element, and T2 represents a time period over which the second drive current control circuit can output the second drive current to the display element.
US07746298B2	Organic light emitting display and driving method thereof A light emission device according to the present invention includes a plurality of pixel circuits in a matrix. A plurality of first scan lines transmits a selection signal to select the pixel circuits. A plurality of second scan lines transmits an emission signal to control the duration of light emission of the pixel circuits. A scan driver sequentially delays a primary signal having a first-level pulse about a first period for generating a plurality of secondary signals, inverting the plurality of secondary signals for outputting the emission signal, and generating a signal having a second-level pulse when the secondary signal and the emission signal are in the first-level.
US07746296B2	Plasma display apparatus and driving method thereof A plasma display apparatus and a method of driving the same are provided. The plasma display apparatus comprises a plasma display panel, a scan driver, and a data driver. The plasma display panel comprises a scan electrode, a sustain electrode, a first address electrode, and a second address electrode. The scan driver supplies a pulse to the scan electrode between a reset period and an address period. The data driver supplies a data pulse to the first address electrode and the second address electrode at different points of time.
US07746292B2	Reconfigurable radiation desensitivity bracket systems and methods A method and device bracket are presented for reconfigurable radiation desensitivity. The method includes: accepting a radiated wave from a source such as a transmitter, antenna, microprocessor, electrical component, integrated circuit, camera, connector, or signal cable; in response to the radiated wave, creating a first current per units square (I/units2) through a groundplane of an electrical circuit such as a printed circuit board (PCB), display, connector, or keypad; accepting a control signal; and, in response to the control signal, creating a second I/units2 through the groundplane. This step couples the groundplane to a bracket having a selectable effective electrical length. Typically, the groundplane is coupled to a bracket with a fixed physical length section to provide a combined effective electrical length responsive to the fixed physical length and the selectable effective electrical length. The coupling mechanism can result from transistor coupling, p/n junction coupling, selectable capacitive coupling, or mechanically bridging.
US07746287B2	Antenna apparatus including a shield cover which covers an amplification circuit, the shield cover having an aperture positioned to allow observation of an input unit of the amplification circuit from outside of the shield cover Disclosed is an antenna apparatus that includes: an antenna element including a receiving unit to receive a radio wave; a circuit board on which an amplifier circuit to amplify an input signal sent from the antenna element is formed; an input pin to connect the receiving unit with the amplifier circuit; and a shield cover to cover the amplifier circuit on the circuit board, the shield cover shielding the amplifier circuit from a disturbing wave, wherein the input pin penetrates through the circuit board and is connected to the amplifier circuit by soldering, so as to structure an input unit of the circuit, and an ascertainment aperture is provided in the shield cover, the ascertainment aperture positioned such that the input unit can be observed from outside of the shield cover.
US07746276B2	Microstrip multi-band composite antenna The multi-band antenna structure includes a first antenna having a band width about a middle frequency and a second antenna spaced and electrically isolated from the antenna. Ends of the second antenna are shorted to each other and the antenna floats electrically. The first and second antennas are planar and superimposed in parallel planes. At least two layers of dielectric material of a thickness is between the two antennas. A third layer of dielectric material of a third thickness is between the two antennas.
US07746272B2	Ambiguity estimation of GNSS signals for three or more carriers Methods and apparatus are provided for factorized processing of a set of GNSS signal data derived from signals having at least three carriers. A geometry filter is applied to the set of GNSS signal data using a geometry carrier-phase combination to obtain an array of ambiguity estimates for the geometry carrier-phase combination and associated statistical information. A bank of ionosphere filters is applied to the set of GNSS signal data using a geometry-free ionosphere carrier-phase combination to obtain an array of ambiguity estimates for the ionosphere carrier-phase combination and associated statistical information. At least one bank of Quintessence filters is applied to the set of GNSS signal data using a geometry-free and ionosphere-free carrier-phase combination to obtain an array of ambiguity estimates for the geometry-free and ionosphere-free carrier-phase combination and associated statistical information. At least one code filter is applied to the set of GNSS signal data using a plurality of geometry-free and ionosphere-free code-carrier combinations to obtain an array of ambiguity estimates for the code-carrier combinations and associated statistical information. The resulting arrays are combined to obtain a combined array of ambiguity estimates for all carrier phase observations and associated statistical information.
US07746270B2	Radar apparatus and radar tuning method A radar apparatus transmits a pulse signal including pulses having at least two different pulselengths in a specific transmit pulse pattern and receives a returning echo signal through a single antenna. A tuning voltage setting timing generator generates a timing of setting a tuning voltage according to a combination of transmission pulselengths and a tuning processor performs tuning operation in a manner suited to a current transmission pulselength based on the tuning voltage setting timing. The radar apparatus may include a tuning voltage alteration decider for deciding whether or not to alter the tuning voltage based on a combination of alternate pulselengths before altering the pulselength of the pulse signal generated by a transmitter and the tuning processor alters the tuning voltage based on the result of decision made by the tuning voltage alteration decider.
US07746267B2	Synthetic aperture radar hybrid-polarity method and architecture for obtaining the stokes parameters of a backscattered field A synthetic aperture radar hybrid-polarity method and architecture comprising transmitting circular polarization (by driving the orthogonal linear feeds simultaneously by two identical waveforms, 90° out of phase), and receiving horizontal (H) and vertical (V) linear polarizations, coherently. Once calibrated, the H and V single-look complex amplitude data are sufficient to form all four Stokes parameters, which fully characterize the observed backscattered field.
US07746262B2	Coding method for digital to analog converter of a SAR analog to digital converter A method for coding a digital to analog converter of a successive approximation register analog to digital converter includes the steps of first switching capacitors associated with a bit from ground to a reference voltage. Next, a determination is made of whether a logical value of the bit is a first or a second value. If the logical value is the first value, capacitors associated with a next bit are switched from ground to a reference voltage. If the logical value is the second value, one half of the capacitors associated with the bit currently connected are switched from the reference voltage to ground.
US07746260B1	Multiplying digital-to-analog converter for high speed and low supply voltage A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein all switches included in the OP-amp input switch block are implemented utilizing PMOS transistors only, and the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp.
US07746259B2	Switching circuitry A digital-to-analog converter, comprising: a first field-effect transistor; a second field-effect transistor; and adjusting means for adjusting a bulk voltage applied to at least one of the first and second field-effect transistors so as to tend to equalise respective switching delays of the transistors.
US07746257B2	Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
US07746253B2	Semiconductor integrated circuit The present invention is directed to reduce offset error voltage in a signal source impedance of analog input signal voltage supplied to an input terminal due to input offset voltage of an operational amplifier in a sampling circuit or a multiplexer coupled to an input terminal of an A/D converter. A semiconductor integrated circuit has an A/D converter and a sampling circuit. The sampling circuit samples an analog input signal in first and second sample modes. The A/D converter converts the sampled analog signal to a digital signal in a conversion mode. By switching of an internal circuit of an operational amplifier between the first and second sample modes, the functions of a non-inverting input terminal (+) and an inverting input terminal (−) realized by first and second input terminals are switched. Synchronously with the switching, supply of an analog signal to the non-inverting input terminal by input switches is also switched.
US07746252B2	Analog front-end circuit and electronic instrument An analog front-end circuit includes an analog processing circuit, an A/D converter, a target register in which a lower limit target value of an input image signal is set, and a calculation circuit. The analog processing circuit includes an offset control circuit which performs offset control based on an offset control value set in an offset control register. The calculation circuit monitors the A/D-converted value in a lower limit value output period when the A/D-converted value corresponding to a lower limit value of an input range is output from the A/D converter, and sets the offset control value that causes the A/D-converted value to become closer to the lower limit target value set in the target register in the offset control register.
US07746251B2	High speed serializer/deserializer transmit architecture A Serializer/Deserializer apparatus comprises a serializer adapted to take N parallel bits of data and shifts them out serially at N times a clock speed to a transmitter, a transmitter enable block adapted to start the serializer means, and a count block. The serializer comprises flip-flops and muxes, and is adapted to N parallel bits of data and shifts them out serially at N times a clock speed to a transmitter. The transmitter enable block comprises an inverter and flip-flops, and is adapted to start the serializer. The transmitter enable block comprises an inverter, flip-flops, and a NOR gate, and is adapted to create a waveform which programs data loading in the serializer.
US07746248B2	Method and system for automatically exchanging information concerning an amount of water by wireless communication between a vehicle and an information center A method and a system for automatically exchanging information by wireless communication, particularly between a vehicle such as an aircraft and an information center, is proposed. The information to be exchanged concerns an amount of water for the vehicle. The amount of water on board of the vehicle is automatically measured by a device for determining the amount of water. The transmitter of a device for exchanging information at the vehicle automatically and wirelessly transmits the information concerning the current amount of water to a receiver of a device for exchanging information at an information center. New information parameters are wirelessly transmitted from the transmitter of the device for exchanging information at the information center to the receiver of the device for exchanging information at the vehicle.
US07746247B2	Wearable, attachable, or hand-held, super-bright, led based, textual, safety alert sign and portable emergency/work light Accordingly, a primary object of the present invention is to provide a novel safety alert sign which provides a uniquely attention-getting and highly visible warning to oncoming drivers during both daylight, and, particularly twilight and dusk through the nighttime hours.
US07746246B2	Housing for utility meter AMR components The invention relates to an enclosure for housing transmitter components of an Automatic Meter Reading (AMR) system electrically associated with a utility meter disposed in a substantially non-RF transparent location. The enclosure comprises a first section mechanically associated with a second section where the first section is disposed outside the non-RF transparent location, and said second section extends from said first section to a point within said non-RF transparent location. The first section may house an antenna and a transmitter while the second section may house a power source electrically associated with said transmitter.
US07746245B2	Integrated remote control system An integrated remote control system capable of integrally remote-controlling a plurality of electronic devices is provided. The integrated remote control system includes an integrated remote controller for generating a radio control signal for each electronic device and transmitting the radio control signal through one infrared channel such that a plurality of electronic devices can be integrally remote-controlled, a remote control signal converting device for receiving a radio control signal controlling a predetermined electronic device in the integrated remote controller and transmitting the received radio control signal by inserting infrared channel data for the predetermined electronic device into the received radio control signal, and a re-transmitter for receiving the radio control signal including the infrared channel data from the remote control signal converting device, generating an infrared channel according to the infrared channel data, and re-transmitting the radio control signal to the predetermined electronic device through the infrared channel.
US07746244B2	Programmable remote control and method for programming a programmable remote control, a readable memory and a program A remote control comprises object keys and a selector for linking preset IR or RF code sets to the object keys. The remote control comprises: —a selector for the selection of an IR or RF preset code set by a user, —an activator for the activation of one or more links between an element of said preset IR or RF code set and an object key by the user after the selection, —a selector for the subsequent selection of a further preset code set by the user and —repeat means for repeating the steps a and b for the further preset code set until all object keys have been linked or the user terminates the process. This allows the user to combine more than one preset code set into a single code set.
US07746243B2	Pump failure alarm device A pump failure alarm device includes two digital-analog converting circuits (100, 110), a voltage sampling circuit (120), a controlling circuit (130), an I/O controller (U11), and an alarm circuit (140). The digital-analog converting circuits receive digital pulse signals from two pumps (200, 210), and respectively output a DC voltage signal at an output terminal when the pumps run normally. The voltage sampling circuit with two input terminals respectively coupled to the output terminals of the two digital-analog converting circuits, and outputs a first voltage signal when the two pumps run normally and outputs a second voltage signal when either or both of the pumps stop running. The controlling circuit receives the voltage signals from the voltage sampling circuit, and outputs a first control signal when it receives the first voltage signal and outputs a second control signal when it receives the second voltage signal. The I/O controller receives the control signals from the controlling circuit, and outputs an alarm signal when it receives the second control signal. The alarm circuit receives the alarm signal from the I/O controller, and activates an alarm.
US07746242B2	Low battery indicator Electronic devices that include batteries can be adapted to provide one or more indications of a low battery condition. An electronic device such as a controller can include a battery and can be adapted to determine a first low battery condition. A first indication can be provided in response to the first low battery condition. In some cases, a second battery condition can be determined and a second indication can be provided in response to the second battery condition. The indications provided to the user can be made progressively more noticeable over time, until the battery is replaced.
US07746237B1	Wastewater fluid level sensing and control system A wastewater fluid level sensing and control system is provided. The system comprises a control panel, a reservoir, at least one pump and a fluid level sensing device. The control panel comprises a housing and user interface input and output devices for use with configuring the operation of the control panel. The control panel may be configured to turn on one or more of the pumps to lower the level of fluid in the reservoir. When the level is above a selectable level, the control panel is operative to cause at least one alarm signal to be output.
US07746236B2	Fire detection system and method A fire detection system for detecting fires may include an infrared detector array. The fire detection system may use the infrared detector array to monitor the temperature of a target environment over time. In some cases, a positioning apparatus may be used to move the field of view of the infrared detector array, allowing the infrared detector array to scan a relatively large target environment while still achieving a given resolution.
US07746233B2	Safety switch for monitoring a closed position of two parts moveable relative to one another A safety switch, which is particularly intended for monitoring a guard door on an automated installation, has an actuator and a sensor. The actuator comprises an actuator antenna and the sensor comprises a sensor antenna. The actuator and the sensor are coupled to one another like a transformer, in particular like a transponder, when the guard door is in the closed position. According to one aspect of the invention, the sensor antenna has a magnetic directional characteristic which allows transformer coupling with the actuator in at least two mutually perpendicular spatial directions as seen from the sensor antenna.
US07746225B1	Method and system for conducting near-field source localization Disclosed herein is a fast method that locates nearby sources based solely on the time-of-flight of a signal across an array of sensors. The time delay for signal passage between all pairs of sensors is determined using cross-correlation estimates and a vector of time delays, τ, is constructed from the results. In the noise free case, each point in the plane is associated with a unique value of the τ vector. The plane is searched for a source location by minimizing the difference between the value of τ associated with the candidate location on the plane and the value estimated from cross-correlations. The search takes place over the three dimensional space that includes two coordinates in the plane and the propagation speed. The starting point for the search is constructed from an analytic fit of circular wave fronts to groups of sensors within the array.
US07746213B2	Device and method for manufacturing the same A method of producing a device initially includes providing a component. The component includes a first surface, a second surface opposite the first surface, a first contact formed on the first surface, a second contact formed on the second surface, and an electrical circuit disposed between the first contact and the second contact. The component further includes a conductive connection between the first contact on the first surface of the component and the second surface of the component. A first conductive layer serving as the pad of the device is formed on the second surface of the component such that same is in contact with the conductive connection.
US07746210B2	Electronic device An electronic device includes a substrate, a first coil that has a spiral shape and is provided on the substrate, a second coil that has a spiral shape, is provided above the first coil, and is spaced from the first coil, a first connection portion that electrically couples the first coil and the second coil, a wire that is provided on the substrate and connects one of the first coil and the second coil to outside, and a second connection portion that is mechanically connected to an outer side face of outermost circumference of the second coil and is mechanically connected on the substrate where one of the wire and the first coil is not provided.
US07746209B1	Method for making magnetic components with N-phase coupling, and related inductor structures Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
US07746208B2	Interleaved planar transformer primary and secondary winding The present invention describes a winding for a transformer comprising first (60) and second (70) planar sections which are arranged parallel to each other. First (1, e.g., from 602 to 603)) and second (2, e.g., from 703 to 704)) current paths are arranged on the first and second planar sections. The first and second current paths are connected to each other by means of an interconnection (603/703). The first and second current (603/703) paths are respectively angled with respect to a direction along which the first and second planar sections are extending.
US07746207B2	Coil device A coil apparatus having a divided winding conformation and a manufacturing method of the coil apparatus which can prevent a winding from collapsing while achieving a reduction in size of a core and simplification of a structure. A coil apparatus includes a ferrite core and a coil provided around the core. The coil includes at least a first coil portion and a second coil portion, and a boundary end surface of the first coil portion on the second coil portion side is inclined in such a manner that its inner peripheral side is closer to the second coil portion than its outer peripheral side. Further, a boundary end surface of the second coil portion on the first coil portion side is inclined in such a manner that its outer peripheral side is closer to the first coil portion than its inner peripheral side.
US07746206B2	Inverter transformer and inverter power module having the same for use in electric/electronic device An inverter power module for use in an electric/electronic device includes a driving circuit board, a power transformer mounted on the driving circuit board, an inverter transformer mounted on the driving circuit board, and a blocking unit to block a magnetic flux that is generated from the inverter transformer from being emitted to the outside. With this, the magnetic flux that is generated from the inverter transformer is blocked from being emitted to the outside, thereby allowing an EMI noise, a heating problem, a noise of the system circuit, etc. to be minimized.
US07746203B2	Thermodynamic cycles One embodiment disclosed herein is an apparatus for performing a thermodynamic cycle comprising: a sample that exhibits temporary magnetic remanence; and a magnetisation apparatus for magnetising the sample, wherein the magnetisation apparatus is operable, during a first part of the thermodynamic cycle, to produce a cyclically-varying magnetising field comprising a wavetrain of a single or plurality of consecutive cycles, and to remove the magnetising field from the sample during a second part of the thermodynamic cycle, wherein demagnetisation of the sample during the second part of the thermodynamic cycle causes the generation of an independent magnetic flux.
US07746201B2	Portable electronic device with hall sensor A portable electronic device includes a cover section (54), a body section (52), a magnet (60) and a hall sensor (70). The cover section has a printed circuit board secured therein. The body section has a connecting portion, and the body section is rotatably connected to the cover section with the connecting portion. The magnet is secured in the connecting portion, and the hall sensor is electrically attached to the printed circuit board. The magnet acts on the hall sensor according to relative rotation between the cover section and the body section, thereby switching the portable electronic device to a work mode when the cover section is opened away from the body section or a power save mode when the cover section is closed to the body section.
US07746198B2	Electric circuit device Electric circuit device comprises electric element and two conductive plates. The electric element includes two anode electrodes and two cathode electrodes and has relatively low impedance in a frequency range between 1×10−5 to 10 GHz. The one conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two anode electrodes. The other conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two cathode electrodes. As a result, the electric circuit device which has relatively low impedance and is capable of preventing the temperature rise is provided.
US07746196B2	Arrangement relating to antenna communication An arrangement for providing communication between a radio antenna and a radio base station in a cellular communication system. A waveguide is configured to connect the radio base station to the antenna. The waveguide may be connected directly or indirectly to the radio base station and/or the antenna. The waveguide is configured with a number of compartments, each compartment acting as a waveguide for a particular signal. The arrangement is thus able to convey a large number of signals, for example, for sector antennas of dual polarization type and for more than one frequency band.
US07746192B2	Polyhedral contoured microwave cavities Fabrication methods for contoured polyhedral cavities for particle acceleration are disclosed. The process may include: trimming flat sheets to a conformal shape; bending the sheets to form a contour that is axially curved and azimuthally flat; and joining the sheets to form a circumferentially polyhedral cavity that is configured to support a resonant electromagnetic field at cryogenic temperatures. The resulting cavity may have ductile or even brittle superconducting materials with an axially-oriented grain structure at each point on the circumference of the cavity. As part of the assembly process, the sheets may be bonded to a supporting substrate of thermally conductive material having integrated cooling passages. The supporting substrates may be configured to have electrical contact near the cavity openings while having a small gap near the equators of the cavity. Moreover, mode-coupling channels and waveguides may be provided to extract energy from undesired deflection modes.
US07746187B2	Self-calibrating modulator apparatuses and methods A self-calibrating modulator apparatus includes a modulator having a controlled oscillator and an oscillator gain calibration circuit. The oscillator gain calibration circuit includes an oscillator gain coefficient calculator configured to calculate a plurality of frequency dependent oscillator gain coefficients from results of measurements taken at the output of the controlled oscillator in response to a test pattern signal representing a plurality of different reference frequencies. The plurality of frequency dependent gain coefficients determined from the calibration process are stored in a look up table (LUT), where they are made available after the calibration process ends to scale a modulation signal applied to the modulator. By scaling the modulation signal prior to it being applied to the control input of the controlled oscillator, the nonlinear response of the controlled oscillator is countered and the modulation accuracy of the modulator is thereby improved.
US07746185B2	Apparatus and method for acquisition and tracking bank cooperation in a digitally controlled oscillator A novel apparatus for and method of acquisition and tracking bank cooperation in a digitally controlled oscillator (DCO) within an all digital phase locked loop (ADPLL). The acquisition bits of the acquisition bank are used as an extension of the modulation range. The PLL and TX tuning data are broken up (i.e. apportioned) into acquisition components and tracking components. This permits the use of two different capacitor banks (i.e. the tracking and acquisition banks) for modulation rather than just a single capacitor bank as in the prior art schemes. Incorporating the tracking and acquisition bit varactors, the cooperation scheme of the present invention permits the re-centering of the tracking bank to handle natural frequency drift of the DCO and the widening of the modulation range.
US07746184B2	Bonding-type surface-mount crystal oscillator A crystal oscillator has: a crystal unit having a container body in which a crystal blank is housed and hermetically sealed; and a mounting substrate that houses an IC chip having at least an integrated oscillating circuit that uses the crystal unit. External terminals are formed as protrusions at four corners of the outer bottom surface of the container body, and depressions corresponding to the external terminals are formed at four corners of the top surface of the mounting substrate. Bonding terminals are formed at the inner bottom surface of the depressions. The mounting substrate is electrically and mechanically bonded to the outer bottom surface of the crystal unit by fitting the external terminals into the depressions and bonding the external terminals to the corresponding bonding terminals by soldering.
US07746183B2	Measurement apparatus for improving performance of standard cell library Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). A built-in circuit is used to measure and verify performance of the standard cell library through a TEG. Therefore, it is possible to effectively improve performances of the standard cells in the standard cell library. Particularly, it is possible to not only remove human errors or internal errors of equipment, but also perform the measurement more readily, rapidly and accurately. Further, it is possible to curtail the use of high-performance equipment or manpower and time required in a measurement process.
US07746179B1	Method and apparatus for selecting a frequency generating element A method and apparatus for selecting an optimum VCO from an array of VCOs is disclosed. Each VCO in the array has an output range and a limit. In one embodiment, a search set of VCOs is designated as all VCOs in a system. The limit is compared to a tuning value which corresponds to a desired calibration frequency. The comparison divides the array of VCOs into a searched set and a non-searched set. The process is repeated until the non-searched set comprises only one VCO. In another embodiment, the VCOs are ordered such that there is a middle VCO. A VCO in the middle of the array is selected. The limit of the middle VCO is compared to a tuning limit. Based on the comparison, another VCO is selected. The process repeats N times, where N is the logarithm, base 2, of the total number of VCOs to be searched. at the end of the search, an optimum VCO will be found.
US07746178B1	Digital offset phase-locked loop The present invention relates to a digital offset phase-locked loop (DOPLL), which may have advantages of size, simplicity, performance, design portability, or any combination thereof, compared to analog-based phase-locked loops (PLLs). The DOPLL may include a digital controlled oscillator (DCO), which provides a controllable frequency output signal based on a digital control signal, a radio frequency (RF) mixer circuit, which provides a reduced-frequency feedback signal based on the controllable frequency output signal without reducing loop gain, a time-to-digital converter (TDC), which provides a digital feedback signal that is a time representation of the reduced-frequency feedback signal, and digital PLL circuitry, which provides the digital control signal based on the digital feedback signal and a digital setpoint signal.
US07746172B1	Linearized differential transimpedance amplifier The present invention relates to a transimpedance amplifier circuit that includes a linearized differential transimpedance amplifier, a detector, and dynamic current source circuitry, which diverts common mode currents from feedback resistors in the linearized differential transimpedance amplifier to keep the linearized differential transimpedance amplifier in a linear operating range. Magnitudes of the diverted common mode currents from the feedback resistors may be based on a detected magnitude associated with differential input signals that feed the linearized differential transimpedance amplifier. The detector provides a detector output signal to the dynamic current source circuitry based on the detected magnitude associated with the differential input signals, such that the diverted common mode currents are based on the detector output signal. The transimpedance amplifier circuit provides differential output signals that are based on amplifying the differential input signals.
US07746168B2	Bias circuit A bias circuit of a resistance load differential amplifier comprises a first differential pair and a control unit for controlling a tail current of the first differential pair, and making an output current of the first differential pair being in inverse proportion to a load resistance in the resistance load differential amplifier when applying a constant potential difference to an input of the first differential pair. The control unit further controls a tail current of a second differential pair constituting the resistance load differential amplifier, and makes the tail current of the second differential pair being in direct proportion to the tail current of the first differential pair.
US07746166B2	Integrated circuit including filter circuit arrangement An integrated circuit includes a filter circuit that has at least one active device, wherein the active device has adjustable transconductance.
US07746163B2	Stabilized DC power supply circuit A stabilized DC power supply circuit comprises an error amplifier circuit, an output amplifier circuit, an output voltage division circuit, and a reference voltage circuit. A bias current boost circuit capable of stabilized operation is added to the DC power supply circuit. Since the feedback loop of the bias current boost circuit is provided with a hysteresis function or an artificial hysteresis function by a large delay element, it is possible to adaptively control bias current without sacrifice of stability and realize a stabilized DC power supply circuit exhibiting high response and high stability with low current consumption.
US07746161B2	Semiconductor integrated circuit device having internal voltage generating circuit A semiconductor device includes a first voltage generator which outputs a first signal to a first node, a second voltage generator which outputs a second signal to a second node, a capacitor coupled between the first and second nodes; and a current supply circuit coupled to said second node. While the first voltage generator outputs the first signal to set the first node to a first voltage potential, the second voltage generator is activated to output the second signal to set the second node to a second voltage potential. At that time, the capacitor influences to the second node, based on a coupling capacitance thereof and the current supplying circuit supplies a current to suppress the influence.
US07746160B1	Substrate bias feedback scheme to reduce chip leakage power Disclosed is an improved substrate bias feedback circuit, and a method for operating the same.
US07746159B1	Polarity conversion circuit Disclosed is a process, voltage and temperature compensated polarity conversion circuit comprising an input signal generator comprising an input signal having a first polarity, a variable frequency generator, a plurality of high voltage differential switches coupled to the variable frequency generator and a controllable threshold transmission gate circuit coupled to the input signal generator, coupled to the variable frequency generator and coupled to the plurality of high voltage differential switches. A method of polarity conversion and other embodiments are also disclosed.
US07746157B2	Electric circuit A transistor has variation in a threshold voltage or mobility due to accumulation of factors such as variation in a gate insulating film which is caused by a difference of a manufacturing process or a substrate to be used and variation in a crystal state of a channel formation region. The present invention provides an electric circuit which is arranged such that both electrodes of a capacitance device can hold a voltage between the gate and the source of a specific transistor. Further, the present invention provides an electric circuit which has a function capable of setting a potential difference between both electrodes of a capacitance device so as to be a threshold voltage of a specific transistor.
US07746147B2	Semiconductor device A level shifter circuit of the present invention includes a level shifter for converting a low-voltage signal to a high-voltage signal, and is provided with a unit that sets a voltage condition of an input signal to a transistor for input of the level shifter, when a high-voltage power supply is inputted to the level shifter circuit of the present invention before a low-voltage power supply.
US07746146B2	Junction field effect transistor input buffer level shifting circuit A level shifting circuit can include a first input junction field effect transistor (JFET) having a gate coupled to receive an input signal having a first voltage swing that provides a controllable impedance path between a first supply node and a first terminal of a first bias stack including at least one JFET. A driver circuit can be coupled to receive an output from the first bias stack that provides a level shifted output having a second voltage swing that is less than the first voltage swing.
US07746141B2	Delay circuit A delay circuit includes a delay time setting circuit to set a delay time of an output signal with respect to an input signal, a first transistor connected to an input terminal of the delay time setting circuit and configured to set a first voltage to the input terminal of the delay time setting circuit and a second transistor connected to an output terminal of the delay time setting circuit and configured to reset the output terminal of the delay time setting circuit to a second voltage and clear the reset of the output terminal of the delay time setting circuit after the first voltage is set.
US07746140B2	Scannable latch A scannable latch is disclosed. The scannable latch includes a dynamic circuit, two cross-coupled NAND gates coupled to the dynamic circuit, and a pair of stacked transistors coupled to the dynamic circuit. One of the stacked transistors is for receiving data signals, and the other stacked transistors is for receiving scan in signals.
US07746138B2	Semiconductor integrated circuit with flip-flop circuits mounted thereon A plurality of flip-flop circuits, having different circuit configurations, which perform an identical digital signal processing are mixed on a single semiconductor substrate. A first flip-flop circuit among the plurality of flip-flop circuits receives a clock signal supplied from outside the flip-flop circuits, through at least two stage inverters, and operates with clock signals outputted from the inverters. A second flip-flop circuit receives the clock signal supplied from outside the flip-flop circuits through at least one inverter having a less number of stages than the number of stages of the inverter contained in the first flip-flop circuit, and operates with at least one of the clock signal and a clock signal outputted from the inverter.
US07746136B2	Frequency-doubling delay locked loop A frequency multiplier circuit comprising a delay line receiving at one end thereof a reference clock for generating clock tap outputs from respective ones of a plurality of period matched delay elements; a clock combining circuit responsive to pairs of tap outputs for generating a rising and falling edge of an output clock pulse from respective ones of the pairs whereby the output clock period is less than the input clock period.
US07746135B2	Wake-up circuit Disclosed herein is a wake-up circuit for a bias input of a circuit such as a slave DLL circuit, to allow it to be placed in a reduced power mode and be “awoken” (brought up to a control bias level) in a sufficiently small enough amount of time. The wake-up circuit couples a bias input node to a voltage level that is higher then the control bias level in response to a wake-up event, and then it couples the control bias node to the bias input node in response to their voltage levels being sufficiently close to one another.
US07746134B1	Digitally controlled delay-locked loops Digitally controlled delay-locked loops can have a phase detector, control logic, and a delay chain. The control logic generates digital signals in response to an output signal of the phase detector. The delay chain generates a delay that varies in response to the digital signals. In some embodiments, the control logic maintains logic states of the digital signals constant in response to an enable signal to maintain the delay of the delay chain constant in a lock mode of the digitally controlled delay-locked loop. In other embodiments, the delay of the delay chain varies by a discrete time period in response to a change in logic states of the digital signals, and the maximum phase error between a phase of the reference clock signal and a phase of the feedback clock signal is less than the discrete time period when the digitally controlled delay-locked loop is in a lock mode.
US07746132B2	PLL circuit A PLL comprises a current-controlled oscillator (18) for generating an output clock signal based on a current signal generated based on a phase difference between a reference clock signal and a feedback clock signal, a current source (28), and an initialization switch (26) for performing an open/close operation based on the initialization signal, the initialization switch being inserted in series to an input terminal of the current-controlled oscillator (18) and the current source (28).
US07746131B2	Reset signal filter A reset signal filter includes a power voltage detector and a reset signal detector or includes only one reset signal detector. The power voltage detector includes a comparators and a basic logic gates (e.g. AND gate, OR gate, inverter, etc). The reset signal detector includes a comparator, N flip flops connected in series, an AND gate, an OR gate, a multiplexer and an output flip flop. The reset signal filter receives a first reset signal generated by a power voltage detector or a Schmitt trigger buffer and utilizes N flip flops to register the signal level of the first reset signal for N clock periods. Then the reset signal filter determines if the first rest signal is changed during N clock periods, and outputs a second reset signal.
US07746130B2	Triangular wave generating circuit having synchronization with external clock A triangular wave generating circuit includes: an integrating unit including a capacitor, the integrating unit having an output for providing a triangular wave signal; first and second constant current sources for charging and discharging the capacitor; a switch unit for coupling the first and second current sources to the integrating unit to charge and discharge the capacitor in response to an internal clock signal; a high/low level limiter including first and second comparing units for comparing the output of the integrating unit with upper and lower triangular wave peak limit reference voltages, respectively, and providing output signals indicating when the output of the integrating unit coincides with the peak limit reference voltages; a clock generator for providing the internal clock signal in response to the comparing unit output signals; and means for varying a peak-to-peak swing of the triangular wave signal over time to synchronize the internal clock signal with an externally supplied clock pulse.
US07746126B2	Load driving circuit To provide a load drive circuit that has a satisfactory phase characteristic and can be realized as a low-price LSI chip. A series circuit of nonlinear resistive elements (P2 and N3) and switch elements (N2 and P3) is inserted between control input terminals (GP1 and GN1) of output elements (P1 and N1) of a final amplifier (AMP0) and an output terminal (OUT) of the load drive circuit. The nonlinear resistive element has a nonlinear characteristic in which a resistance value decreases as an applied voltage value increases and the resistance value increases as the applied voltage value decreases. The switch elements are switching-controlled to selectively come into an ON state only in a high-electric potential period or a low-electric potential period of an input signal according to whether the output element is arranged on a high-electric potential side or a low-electric potential side in the final amplifier.
US07746125B2	High voltage driver circuit with fast slow voltage operation A high voltage driver circuit for devices such as non-volatile memories, in which a low voltage driver is combined in two different ways with a high voltage driver In one, input-independent embodiment, a low voltage driver (Q7, Q8) is connected directly in parallel with a high voltage driver, thereby providing a high voltage signal path for high voltage operations and a low voltage signal path for low voltage operations. In an alternative, partially input-dependent embodiment, a low voltage driver is connected to the output of a high voltage driver (Q9, Q10), which may comprise a partial level shifter (Q1 B Q6). The output of this low voltage driver (Q9, Q10), which forms the output terminal of the entire stage, has a pull up/pull down transistor (Q11), depending on whether the partial level shifter (Q1 B Q6) is a positive or negative level shifting high voltage driver.
US07746121B2	Ultra low power LVDS driver with built in impedance termination to supply and ground rails A novel high speed, >1 GHz or 2 Gbits/s, low voltage differential signal (LVDS) driver is disclosed. The LVDS design achieves low power consumption while providing LVDS compliant impedance termination to power supply and ground. An output stage of the LVDS is implemented using a Nmos and a Pmos follower in a push pull configuration. This new design relies first on a follower type of an output stage, which provides the inherent impedance termination, second on an AC, capacitive, coupling and DC restoration to drive output stage gates, and on a low power dummy bias generator that supplies DC restoration voltages. As the supply voltage is lower the thick oxide devices performance suffer, therefore for this new design is mainly implemented with thin oxide devices.
US07746120B2	Voltage to current converter A signal receiving device includes: a first conversion unit comprising a first input terminal to which a signal including a voltage signal and a reference voltage is inputted, and a first output terminal which output a first current signal voltage-current converted from the signal; a second conversion unit comprising a second input terminal to which the reference voltage is inputted, and a second output terminal which output a second current signal voltage-current converted from the reference voltage; a current mirror circuit comprising a third input terminal to which the second current signal is inputted, and a third output terminal which output a third current signal corresponding to the second current signal; and an output unit connected to both the first and third output terminals.
US07746116B1	Method and apparatus to clock-gate a digital integrated circuit by use of feed-forward quiescent input analysis One aspect of the invention relates to a device including a first storage element and a first clock gating element, wherein a data input of the first storage element is coupled to an output of a combinatorial logic (CL) element, wherein the first storage element is clock-gated with the first clock gating element using a first clock enable signal to generate a clock signal for the first storage element, wherein the first clock enable signal is generated to suppress the clock signal in the first clock gating element when each of the at least one data input of the CL element is in a second quiescence inducing condition with respect to the clock signal at the same time as when each of the at least one control input of the CL element is in the first quiescence inducing condition.
US07746115B2	Data transfer cable for programmable logic devices A programmable logic device (PLD) data transfer cable includes a parallel interface, a programming interface, and a logic control circuit. The parallel interface is used for connecting to PLDs. The logic control circuit includes a first group of transmission channels, a second group of transmission channels, a first group of switches, and a second group of switches. The first and second group of switches control the working status of the first and second group of transmission channels respectively. The electrical connections between pins of the parallel interface and the programming interface when first group of transmission channels are activated are different with those when second group of transmission channels are activated.
US07746109B1	Circuits for sharing self-timed logic An exemplary circuit for implementing logic sharing in self-timed circuits includes a shared logic circuit, an input circuit, an output circuit, and a pipelined routing path. The shared logic circuit has first and second self-timed inputs and first and second self-timed outputs. The input circuit is coupled to output a selected one of the first or second self-timed inputs to the shared logic circuit, the selected one of the first or second inputs being determined by an arbitration circuit within the input circuit, and further to output a self-timed select signal. The output circuit is coupled to receive the first and second self-timed outputs from the shared logic circuit and to provide a selected one of the first or second outputs, the selected output being determined by the self-timed select signal. The pipelined routing path routes the self-timed enable signal from the input circuit to the output circuit.
US07746101B1	Cascading input structure for logic blocks in integrated circuits A cascading input structure for logic blocks in an integrated circuit. An exemplary integrated circuit includes a plurality of substantially similar logic blocks arrayed to form a column of the logic blocks, and a self-timed vertical cascade chain. Each of the logic blocks has self-timed first and second inputs. The vertical cascade chain has a plurality of self-timed outputs, each of the self-timed outputs being coupled to a first self-timed input of a corresponding logic block in the column. In some embodiments, each logic block includes a multiply block having first and second self-timed inputs, where each output of the vertical cascade chain is coupled to the first input of the multiply block in the corresponding logic block. In some embodiments having a multiply block in the logic block, the inputs and output may not be self-timed.
US07746097B2	Transceiver having an adjustable terminating network for a control device In a transceiver for a control unit having a transceiver core for adapting the level of messages received or to be sent, an adjustable terminating network is situated in the transceiver that makes it possible to adjust at least two connection resistance values, the terminating network and the transceiver core being monolithically integrated in a semiconductor circuit.
US07746090B1	System for testing connections of two connectors A system for testing connections of two connectors, each of which includes a pair of verification pins and a number of signal pins, includes a verification testing module, a controlling module, a signal testing module, and a reporting module. The verification testing module is configured for detecting whether each pair of verification pins are electrically connected. The controlling module is configured for allowing communication between each pair of signal pins if the pair of verification pins is detected to be electrically connected. The signal testing module is configured for testing whether each pair of signal pins are electrically connected. The reporting module is configured for reporting the results of the verification testing module and the signal testing module.
US07746087B2	Heating-control isolation-diode temperature-compensation A semiconductor integrated circuit (IC) acts as a controller of a heating-controlled device or appliance. A heating body has a positive temperature coefficient and acts as both a heating element and a temperature sensor. A Silicon-Controlled Rectifier (SCR) switches AC current to the heating body to increase its temperature. When the SCR switches off, temperature sensing is performed using a sampling resistor, isolation diode, voltage comparator, and switch for a low-voltage DC supply are formed on an integrated circuit that has a first circuit branch and a second circuit branch. A compensation diode and a compensation resistor can be added in parallel to reference resistors. The compensation diode compensates for the forward voltage drop of the isolation diode that would otherwise create an inaccurate temperature measurement. The diodes have the same temperature response, allowing for a more accurate temperature measurement over a full temperature range of the sensorless appliance.
US07746086B2	Non-contact type apparatus for testing open and short circuits of a plurality of pattern electrodes formed on a panel Disclosed herein are a noncontact single side probe and an apparatus and method for testing open and short circuits of pattern electrodes. By feeding power to one end of each of the pattern electrodes and sensing an electrical variation value using a noncontact type single side probe device including an exciter electrode and a sensor electrode as a single module, the open and short circuits of pattern electrodes can be tested by one scanning process. Since the open and short circuits of the pattern electrodes are tested using the noncontact type single side probe device, the pattern electrode can be prevented from being damaged due to a contact failure or pressurized contact and the life span of the probe device can increase compared with a contact type probe device.
US07746080B2	System and method for determining a position of a single phase fault to ground in a feeder line A system and a method for determining a position of a single phase fault to ground in a feeder line are provided. The feeder line is electrically connected to an electrical substation via a substation bus. The system includes first and second sensors electrically coupled to a transformer in the electrical substation. The system further includes a processor that determines a reactance value based on measured electrical characteristics and a predetermined constant. The processor accesses a table having a plurality of position identifiers associated with positions on the feeder line, and a plurality of reactance component values corresponding to positions on the feeder line relative to the substation bus. The processor selects a first reactance component value from the plurality of reactance component values in the table to determine the position of a fault.
US07746079B2	Ion current detecting apparatus for internal combustion engine An ion current detecting apparatus includes a capacitor C that is charged as a spark plug 3 discharges, a Zener diode ZD that limits a maximum voltage of the capacitor C while charging, a detection resistor R2 through which a discharge current of the capacitor C flows, and a comparator circuit 5 that compares a current value of the detection resistor R2 with a predetermined value. A charge quantity Q of the capacitor C at discharge start is set so that, as a consequence of a discharging operation of the capacitor C, discharge duration required until the current value of the detection resistor R2 falls below the predetermined value becomes longer than time duration in which the ion current generated by fuel combustion in the engine combustion chamber lasts. The ion current detecting apparatus automatically detects degradation in an insulation resistance in the spark plug, ensuring normal operation in engine control.
US07746078B2	Method and system of calculating resistivity of an earth formation Calculating resistivity of an earth formation. At least some of the illustrative embodiments are systems including: a first current source current return (CSCR) pair, said first CSCR pair comprises a first current source and a first current return, the first current return receives current from the first current source; a second CSCR pair, the second CSCR pair disposed along a longitudinal axis of said apparatus from the first CSCR pair, the second CSCR pair comprises a second current source and a second current return, and the second current return receives current from the second current source; and a monitor electrode disposed between the first CSCR pair and the second CSCR pair, a distance between the first current source and the monitor electrode is substantially equal to the distance between the second current source and the monitor electrode, and the monitor electrode monitors a first voltage and a second voltage.
US07746074B2	System and apparatus for reducing high field shading in MR imaging A system for receiving MR data that includes an RF coil array for a magnetic resonance (MR) imaging apparatus. The RF coil array includes a plurality of non-concentric receiver coils arrayed along a first direction. A receiver coil at a first end of the RF coil array has a perimeter width greater than a perimeter width of a receiver coil at a second end of the RF coil array that is opposite from the first end along the first direction.
US07746072B2	MRI system comprising a scan room interface for A/D-conversion of MR signals between a receiver coil unit and a remote signal processing unit The present invention relates to a magnetic resonance imaging system, to a magnetic resonance imaging method for operating a magnetic resonance imaging system and to a computer program for operating a magnetic resonance imaging system. In order to considerably reduce the number of cabling in a magnetic resonance imaging system a magnetic resonance imaging system (1) is suggested, the system comprising: an examination zone (5) arranged to receive a body for examination; magnetic field generating means (9, 10, 24) for generating a magnetic field in the examination zone (5); a receiving unit (14) located in the examination zone (5) or in the vicinity of the examination zone (5); an interface unit (17) located in the examination zone (5) or in the vicinity of the examination zone (5), and arranged separately from the receiving unit (14); and a signal processing unit (21) disposed at a location (2) remote from the receiving unit (14) and the interface unit (17); wherein the receiving unit (14) comprising a receiver (15) adapted to receive a spin resonance signal generated in the examination zone (5), and a transmitter (16) adapted to transmit the spin resonance signal to the interface unit (17); and wherein the interface unit (17) comprises a receiver (20) for receiving the spin resonance signals, an analog to digital converter (19) adapted to generate a digital signal in response to the received spin resonance signal, and a transmitter (20) for transmitting the digitized signal to the signal processing unit (21).
US07746069B2	Method of determining a radial profile of a formation parameter indicative of formation treatment efficiency A method of measuring a parameter characteristic of a rock formation is provided, the method including the steps of deploying in a section of a well penetrating the rock formation a toolstring combining a tool for generating and measuring responses to a sensing field at different radial depth shells in the rock formation relative to the well and a tool to cause a flow of fluid through the different radial depth shells such that responses to the sensing field are obtained for at least two different radial depth shells and for at least two different flow conditions in said at least two different radial depth shells to determine a radial depth dependent profile of said parameter.
US07746063B2	Speed indication for pump condition monitoring A method and apparatus are provided for obtaining the rotational speed of a pump system or other suitable rotating equipment having a self-contained pump electrical equipment power supply. The method features, before being rectified, directing one phase of AC power through a zero crossing circuit that identifies an instant of time the AC voltage crosses from one polarity to the other polarity and triggers a square wave pulse for each instant time. In operation, the AC voltage is detected when it crosses from a negative polarity to a positive polarity, or vice versa. The method also includes steps for measuring the period of the square wave pulse and calculating the speed of the pump or other rotating equipment.
US07746059B2	Current measurement apparatus The current measurement apparatus comprises a Rogowski coil 20 comprising a wire or conductor which forms a coil 22 and returns through the coil 22 as a central conductor. The coil 22 and the central conductor are formed from a single conductor or wire and, therefore, no electrical join (for example, a solder join or crimp) is required at the end of the Rogowski coil. The wire 28 used to form the coil 22 and the central conductor 24 is insulated prior to forming the Rogowski coil. The insulated coating 30 provides better insulation between individual coils and also helps to provide a more even spacing between the coils.
US07746055B2	Current measuring device A current sensor is provided for non-invasively measuring electrical current in an electrical conductor. The current sensor includes a housing having a Hall effect sensor and circuitry for transmitting a signal indicative of the current flowing through the electrical conductor. The current sensor further includes a clamp that allows an operator to easily and repeatedly install and remove the current sensor from electrical conductors. The current sensor may also include a mu-metal device for shielding the Hall effect sensor for stray magnetic fields generated by adjacent electrical conductors.
US07746052B2	Apparatus for extending the bandwidth of a spectrum analyzer A spectrum analyzer is provided with frequency-scalable circuit architectures that extend the bandwidth of the spectrum analyzer using an array of couplers. The array of couplers is distributed along the RF signal path at one end, and interfaced to one or more frequency-translation devices such as mixers or samplers at the other. In a first architecture, a single mixer is employed with an LO signal applied to one input and coupler outputs providing RF signals to another input, with switching controlled to select one coupler's RF output to provide to the mixer. In a second architecture, a separate mixer is used, one for each coupler RF signal, with switches selecting one of the mixer IF outputs to select a desired output frequency. Both the first and second embodiments eliminate switching and its associated loss and frequency limitations from the main RF signal path to enable wideband high-dynamic-range spectrum analysis.
US07746050B2	Method and apparatus for controlling the maximum output power of a power converter A controller for a power converter is disclosed. An example circuit controller according to aspects of the present invention includes an input voltage sensor to be coupled to receive an input signal representative of an input voltage of the power converter. A current sensor is also included and is to be coupled to sense a current flowing in a power switch. A drive signal generator is to be coupled to drive the power switch into an on state for an on time period and an off state for an off time period. The controller is coupled to adjust a switching cycle period of the power switch to be proportional to a value of the input signal multiplied by a time period. The time period is the time it takes for the current flowing in the power switch to change between two current values when the power switch is in the on state.
US07746045B2	Distributing time slots in parallel configured, switching power supplies A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals. The synchronizing pulse may be, for example, a skinny pulse or a pulse having a magnitude larger than the pulses of the first clock signal.
US07746042B2	Low-noise DC/DC converter with controlled diode conduction The synchronous rectifier MOSFET in a Buck or boost DC/DC converter is operated as a current source rather than being turned off, thereby reducing undesirable losses in efficiency, the generation of unwanted electrical and radiated noise, and numerous other potential problems, particularly when the converter is operating in a light-load condition.
US07746038B2	System and method for suppressing DC link voltage buildup due to generator armature reaction A controller employed in conjunction with a synchronous generator monitors the output voltage of the generator. The controller employs the monitored output voltage as feedback that is used to control the excitation provided to an exciter field winding. In addition, the controller applies a control loop to the monitored output voltage that detects and modifies voltage ripple signals within the monitored output voltage to generate a compensated signal that is used to control the excitation to the exciter field winding. In particular, by detecting and modifying voltage ripple signals within the monitored output voltage, the controller is able to counteract armature reaction voltage ripples caused by unbalanced short-circuit faults, thereby preventing the build-up of voltage on the DC link.
US07746036B2	Load current dependent reduction of charge battery current Circuits and methods to charge batteries of a portable device simultaneously with supplying power to the device for its operation, using a power source with limited maximum current, as e.g. an USB port, have been achieved. The system invented relies upon digital control only. No direct sensing of the current required for the operation of the portable device is required. The control takes care that the sum of the charging current and of the current to run the portable device does not exceed the maximum allowable current of the power source. The current required to run the portable device has precedence over the charging current.
US07746032B2	Method and system for operating a portable electronic device in a power-limited manner Improved techniques to manage operation of a portable electronic device having a substantially depleted battery when power is available from an external, power-limited source are disclosed. In one embodiment of the invention, the substantially depleted battery can be initially charged while a power-intensive operation is delayed. Once the battery has adequate charge to assist the external, power-limited source in powering the portable electronic device, the power-intensive operation can be performed. In this manner, power consumption of a portable electronic device can be managed so that reliable operation is achieved without exceeding limits on power being drawn from an external, power-limited source.
US07746030B2	Accumulator package with charge state display An accumulator package (2) for a hand-held power tool includes: a housing (4) having a plurality of accumulator cells (28) provided therein, a connection element (18) electrically connected with the accumulator cells (28) and accessible from outside, a charge state display (22) for displaying a charge state of the accumulator cells (28), a locking mechanism (14) for securing the accumulator package (2) on the power tool, and locking mechanism-operating elements (16) that simultaneously form accessible from outside outer switch elements for actuating the charge state display.
US07746022B2	Stepping motor controller and stepping motor control program A stepping motor controller for controlling a stepping motor which drives a load, including: a load drive state detection section which detects a driving state of the load; and a control section which controls the stepping motor, when a detection result of the load drive state detection section is beyond a prescribed range, so as to maintain a driving speed of the load, and when the detection result of the load drive state detection section is within the prescribed range, so as to control the driving state of the load based on a control pattern.
US07746016B2	Fan controller A fan controller includes an input module and an output module. The input module is used for receiving a power supply signal from a power supply which is used for providing power to a fan, and outputting a trigger signal when the power supply signal when the power supply turns off. The output module is used for providing power for the fan when the power supply turns off. The output module includes a timer circuit and an integrator circuit. The timer circuit is coupled to the input module, and is used for receiving the trigger signal, and providing the power for the fan according to the trigger signal for a predetermined amount of time. The integrator circuit is used for providing a threshold voltage for the timer circuit, the threshold voltage tripping termination of the power provided by the timer circuit.
US07746009B2	Operating lamp controls An operating lamp has operator controls that include several operating parameter display fields for displaying adjustable parameters of operating states of the operating lamp, and a control element, such as a manipulable knob, for setting those parameters. The same control element also emits control signals for changing the operating state.
US07746008B2	Group control type fluorescent, LED and/or halide lighting control system A group control type fluorescent, LED and/or halide lighting control system comprises at least a control interface, which generates a main control signal based on user's operation. This control interface is connected to one or more controllable driver to drive corresponding light sources according to the main control signal. The controllable drivers are cascaded to one or more drivers in order. These drivers control the connected light sources to produce corresponding actions according to control signals generated by the controllable drivers. Through a cascading design collocated with several controllable dimmable drivers, unlimited installation and immediate usage after installation can be accomplished without the need of any preset action. Moreover, the advantages of simple operation and easy learning can also be achieved.
US07746007B2	LED backlight circuit system An improved electrical circuit design and method to drive a plurality of LEDs in an LCD backlight in order to produce a uniform color distribution across the entire viewable surface of the display. The embodiments disclosed have features that permit a predetermined reduction in the amount of current provided to the LEDs positioned along the edge of the display region. This results in color uniformity, and consequently, an improved picture quality.
US07746004B2	Discharge-lamp lighting apparatus A discharge-lamp lighting apparatus includes series circuits connected to each end of a DC power source, a transformer, FETs Qp1, Qn1, Qp2, and Qn2, and a drive circuit. The drive circuit includes transistors Q1 and Q3 to discharge gate-source capacitances of the Qp1 and Qp2, resistance elements to determine gate potentials of the transistors Q1 and Q3 when the transistors Q1 and Q3 are turned on, transistors Q2 and Q4 to charge the gate-source capacitances of the Qp1 and Qp2, constant current circuits, and switches connected in series with the series circuits of the constant current circuits and resistance elements, respectively, to turn on/off the constant current circuits.
US07746001B2	Plasma generator having a power supply with multiple leakage flux coupled transformers A plasma generating apparatus includes a plurality of discharge cells in which a gas is excited by a high frequency excitation signal produced at an inverter. Each of a plurality of transformers couples the excitation signal from the inverter to one of the discharge cells, thereby forming a separate resonant circuit that has a resonant frequency. A gap in the transformer core creates a stray magnetic field outside the transformer. The plurality of transformers are in close proximity to each other so that the stray magnetic field from one transformer is coupled to at least one other transformer. Coupling the stray magnetic fields between transformers results in each resonant circuit resonating at the same frequency.
US07745999B2	Lamp which is closed on two sides The elongate bulb (1) of the lamp, which defines a longitudinal axis (A), is closed at opposite ends by sealing parts (6; 32), with in each case one cap being fitted at one end, the cap having an electrical contact element (13; 25) which is connected in an electrically conductive manner to a supply conductor (15; 21) leading to a luminous means, the contact element being accommodated in a tubular extension (11; 22) of the sealing part; the contact element (13; 25) has an attachment part (14; 24) which is directed inward toward the lamp interior and is equipped with at least two barbs (20; 26) which are in contact with the tubular extension (11; 21).
US07745997B2	Multi-electrodes double tube fluorescent lamp A multi-electrode double tube fluorescent lamp includes first external electrodes formed at two ends of an outer glass tube or an inner glass tube, and a second external electrode formed at an inner wall surface of the inner glass tube in a longitudinal direction. A first power source is connected with the first external electrode, and a second power source is connected with the second external electrode. A third external electrode formed along an outer surface of the outer glass tube is connected with the second power source. The second external electrode and the third external electrode are arranged in a radial shape in a direction vertical with respect to the longitudinal direction.
US07745994B2	Display device with connection portions in same region The invention provides a display device including: a first electrode and a second electrode which are disposed in different directions from each other on a flexible substrate; an optical functional layer disposed between the first and second electrodes; and a display unit having a display pixel formed at a rectangular area of overlap between the first and second electrodes, in which the first and second electrodes are respectively connected to a first flexible wiring member at a first region of a periphery of the flexible substrate and a second flexible wiring member at a second region adjacent to the first region, one of the first and second flexible wiring members is adhered onto the display unit, and a first connection portion and a second connection portion for connecting the flexible wiring members with external drive units are disposed at the same region on the periphery of the flexible substrate.
US07745993B2	Method for manufacturing light emitting device comprising reflective film To provide a bright and highly reliable light-emitting device. An anode (102), an EL layer (103), a cathode (104), and an auxiliary electrode (105) are formed sequentially in lamination on a reflecting electrode (101). Further, the anode (102), the cathode (104), and the auxiliary electrode (105) are either transparent or semi-transparent with respect to visible radiation. In such a structure, lights generated in the EL layer (103) are almost all irradiated to the side of the cathode (104), whereby an effect light emitting area of a pixel is drastically enhanced.
US07745992B2	Organic electroluminescence device having electrode separator and light shielding pattern An organic electroluminescence (EL) device includes an array element divided into sub-pixels on a first substrate and including thin film transistors in the sub-pixels, a first electrode disposed on a second substrate, an electrode separator disposed below the first electrode at a boundary region between the sub-pixels, an organic EL layer disposed below the first electrode, a second electrode patterned in each of the sub-pixels by the organic EL layer and the electrode separator, a conductive spacer electrically connecting the thin film transistors with the second electrode, an interlayer disposed at selected regions below the first electrode, and a light shielding portion disposed on the second substrate and overlapping the interlayer.
US07745988B2	3, 6-diphenylcarbazole compound and organic electroluminescent device A 3,6-diphenylcarbazole compound, which has a specific formula and realizes an organic electroluminescent device having high durability and high luminous efficiency. An electroluminescent device which includes an anode; a cathode which faces the anode; and at least one layer including a luminescent layer, optionally a hole transporting layer and an electron transporting layer, which is located between the anode and the cathode, wherein the at least one layer includes the 3,6-diphenylcarbazole compound.
US07745987B2	Organic electroluminescent display device An organic electroluminescent display device includes organic electroluminescent films, each containing organic electroluminescent materials and sandwiched by a pair of electrodes, each forming a plurality of light-emitting elements above a substrate. Each pixel of the display device is composed of two different colors light-emitting elements, and the chromaticity of each color is controlled by changing the concentration of organic electroluminescent materials or by adding foreign materials thereto. For example, if the chromaticity of the red light-emitting element is set to a value shifted toward green side, various colors including white can be produced by mixing this red with blue of the blue light-emitting element. Then, the organic electroluminescent display device can produce high-quality quasi-color images by mixing two colors of which chromaticity values are properly controlled. By virtue of a two-color structure, the aperture ratio becomes high and the manufacturing process becomes simple.
US07745981B2	Piezoelectric actuator and method for manufacturing piezoelectric actuator In a method for manufacturing a piezoelectric actuator, a ceramic sintered body is prepared and a size of the ceramic sintered body is adjusted in a thickness direction defined below by grinding piezoelectric ceramic layers, included in the ceramic sintered body, located outermost in the thickness direction. In the ceramic sintered body, internal electrodes are each disposed between piezoelectric ceramic layers. The thickness direction is defined as the direction along the thickness of the piezoelectric ceramic layer. Each of the inert sections are disposed on at least one side of the active section, for driving the piezoelectric actuator, in the thickness direction. Dummy internal electrodes are arranged in the inert sections such that each of the dummy internal electrodes are each located between ceramic layers. The thickness of the piezoelectric ceramic layers disposed between the dummy internal electrodes increases with distance from the active section.
US07745977B2	Ultrasonic probe An ultrasonic probe is provided which includes a piezoelectric vibrator having an earth electrode and a signal electrode on a rear surface, an acoustic matching layer disposed on a front surface side of the piezoelectric vibrator, a packing material disposed on the rear surface of the piezoelectric vibrator, and a flexible printed circuit that is interposed between the piezoelectric vibrator and the packing material to cover the entire rear surface of the piezoelectric vibrator and has an earth wiring layer and a signal wiring layer. The earth wiring layer and the signal wiring layer are exposed from a surface facing the piezoelectric vibrator of the flexible printed circuit so as to be electrically connected to the earth electrode and the signal electrode through an exposed surface of the earth wiring layer and an exposed surface of the signal wiring layer, respectively.
US07745968B2	Motor and disc drive with motor A motor includes a sleeve, a sleeve holder, a rotor hub and an inner body. The sleeve has a flange portion on an outer circumference portion thereof. The sleeve holder holds the sleeve. The rotor hub has an annular wall portion. The inner body is fixed in an inside of the annular wall portion so as to surround the sleeve and the sleeve holder. The inner body has an annular protrusion portion which is sandwiched between the flange portion and one end portion of the sleeve holder on an inner circumference portion of thereof. A first thrust bearing portion in which a lubrication agent is filled is formed between the annular protrusion portion and the flange portion. A second thrust bearing portion in which the lubrication agent is filled is formed between the annular protrusion portion and the one end portion of the sleeve holder.
US07745964B2	Brushless motor In a brushless motor, a stator includes an annular core member. A rotatable shaft is placed radially inward of the core member and extends in an axial direction. A rotor is supported by the rotatable shaft. A centerpiece supports the core member and includes a center portion, which is placed radially inward of the core member. A platy vibration absorbing member connects between the core member and the center portion of the centerpiece and damps circumferential vibrations transmitted from the core member.
US07745961B2	Electronic device and method of accessing inside of electronic device An electronic device includes an inner cover for covering a power source and electronic parts such as substrates contained in the inside of the device, an inlet for power cord plug formed to the inner cover for connecting the device to a commercial power supply and a cover to be fitted to the inner cover so as to cover the inner cover, the cover being provided with an inlet protecting section to be engaged with the inlet, the inner cover being made accessible by pulling out the power cord plug.
US07745957B2	Combination task lamp and flash light A single combination task lamp and flashlight instrument, providing separate flood and spot light beams, independently controlled in a three-state sequence by simple push button switches. The two kinds of light beams are produced by separate arrays of compact light emitting devices. both arrays are driven by a single, rechargeable battery powered electrical circuit that provides separate, regulated constant currents to the respective arrays of LEDs. The optics and electronics are constructed in a single, ruggedized, compact module. The module is enclosed within an elongated handle that positions the center of mass for optimum balance of the instrument and the control switches for convenient operation according to the sense of touch.
US07745955B2	RF plasma supply device The power output of an RF plasma supply device is controlled by producing at least a first and second RF power signal by means of a respective RF generator, coupling at least two RF power signals into a coupled RF power, and distributing the coupled RF power between a plasma power that is to be supplied to a plasma load and an equalizing power that is to be supplied to an equalizing load. The power output is controlled by adjusting the levels and/or the phase position of the RF power signals in such a manner that, for plasma power in the range between a predefined lower power limit and a predefined nominal power, an insignificant portion of the coupled RF power constitutes the equalizing power and, for plasma power below the predefined lower power limit, a significant portion of the coupled RF power constitutes the equalizing power.
US07745954B1	Power sampling systems and methods An automatic sensing power system automatically has a voltage sampling system that samples a voltage from an electrical device, determines a power requirement for the electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.
US07745949B2	Method and apparatus for assembling electrical machines A method of assembling an electrical machine includes programming at least one processor with a stator flux vector estimation scheme. The electrical machine has a stator at least partially extending around a rotor. The electrical machine is electrically coupled to an electric power system. The electric power system transmits at least one phase of electric power to and from the electrical machine with at least partial power conversion. The stator flux vector estimation scheme is programmed to generate at least one stator back-electromagnetic force (back-EMF) signal and to generate at least one stator flux vector signal using the at least one stator back-EMF signal. The at least one stator flux vector signal at least partially represents an estimated rotor position. The method also includes coupling at least one output device in data communication with the at least one processor.
US07745945B2	Semiconductor package with position member The present disclosure provides a very thin semiconductor package including a leadframe with a die-attach pad and a plurality of lead terminals, a die attached to the die-attach pad and electrically connected to the lead terminals via bonding wires, a position member disposed upon the die and/or die-attach pad, and a molding material encapsulating the leadframe, the die, and the position member together to form the semiconductor package. The method for manufacturing a very thin semiconductor package includes disposing a first position member on one side of the die-attach pad of a leadframe, attaching a die onto the opposite side of the die-attach pad, optionally disposing a second position member on top of the die, electrically connecting the die to the lead terminals of the leadframe, and encapsulating the leadframe, the die, and the position member(s) together to form the very thin semiconductor package.
US07745940B2	Forming ultra dense 3-D interconnect structures Methods of forming a microelectronic structure are described. Embodiments of those methods include bonding at least one bond pad of a device side of a first substrate to at least one bond pad of a device side of a second substrate, forming at least one via to connect to at least one of an active feature and an interconnect structure disposed within the first substrate, and forming a reactive material on a surface of at least one of the active features.
US07745938B2	Circuit device, a method for manufacturing a circuit device, and a semiconductor module A circuit device includes a semiconductor substrate on which a circuit element is formed, an electrode formed on a surface of the semiconductor substrate, an insulating layer formed on the electrode, a second wiring layer formed on the insulating layer, and a conductive bump which penetrates the insulating layer and electrically connects the electrode and the second wiring layer. The conductive bump is such that the size of crystal grains in a direction parallel with the surface of the semiconductor substrate is larger than the size of crystal grains in a conduction direction of the electrode and the wiring layer.
US07745933B2	Circuit structure and process thereof A circuit structure has a first dielectric layer, a first circuit pattern embedded in the first dielectric layer and having a first via pad, a first conductive via passing through the first dielectric layer and connecting to the first via pad, and an independent via pad disposed on a surface of the first dielectric layer away from the first via pad and connecting to one end of the first conductive via. The circuit structure further has a second dielectric layer disposed over the surface of the first dielectric layer where the independent via pad is disposed, a second conductive via passing through the second dielectric layer and connecting to the independent via pad, and a second circuit pattern embedded in the second dielectric layer, located at a surface thereof away from the independent via pad, and having a second via pad connected to the second conductive via.
US07745927B2	Heat sink formed of multiple metal layers on backside of integrated circuit die An integrated circuit die includes a substrate having a front surface and a back surface, wherein the substrate front surface has electrical circuits formed thereon, and the substrate back surface has a plurality of metal layers formed thereon. The plurality of metal layers comprises at least one layer having a thickness of greater than about ten micrometers. The outermost metal layer may be mechanically and thermally bonded to a package using a die attach layer comprising a thermally conductive reflowable material. The invention advantageously facilitates the dissipation of heat from the integrated circuit die.
US07745923B2	Cover substrate attached to a rim substrate with electrically connected through hole A semiconductor package, includes: element substrate having first surface, including: functional element on first surface, and extracting electrode on first surface and configured to output a signal of functional element, extracting electrode being disposed around functional element; rim substrate shaped into a frame, and configured to have first junction with element substrate to surround functional element, rim substrate including: first through hole through rim substrate, and connecting electrode which is: formed by packing first through hole with first conductor material, configured to seal signal extracting aperture of extracting electrode, and configured to electrically connect signal extracting aperture with takeout electrode; and cover substrate configured to have second junction with rim substrate to block aperture of rim substrate, cover substrate including: second through hole through cover substrate, and takeout electrode which is: formed by packing second through hole with second conductor material, and configured to take out signal of functional element.
US07745922B2	Package board having internal terminal interconnection and semiconductor package employing the same A package board is provided. The package board includes a board body having a front surface and a back surface. A first power pad, a first ground pad, a first signal pad, a first internal terminal pad and a second internal terminal pad are disposed on the front surface of the board body, and a second power pad, a second ground pad and a second signal pad are disposed on the back surface of the board body. The second power pad, the second ground pad and the second signal pad are electrically connected to the first power pad, the first ground pad and the first signal pad, respectively. An internal terminal interconnection is provided in a bulk region of the board body or on a surface of the board body. The internal terminal interconnection electrically connects the first internal terminal pad to the second internal terminal pad. A semiconductor package employing the package board is also provided.
US07745921B2	Multi-chip semiconductor device A semiconductor device includes semiconductor chips differing in withstand voltage or in noise immunity, such as a multi-chip module. The semiconductor device includes first and second semiconductor chips mounted over a package substrate which has bonding pads arranged along the edges. The first semiconductor chip includes bonding pads for analog signals, and the second semiconductor chip includes bonding pads for high-voltage signals. The edges along which the bonding pads for analog signals are arranged and the edges along which the bonding pads for high-voltage signals are arranged are disposed along mutually different edges of the package substrate. Adjoining of electrodes or wirings for high voltage signals and those for analog signals over the package substrate can be easily avoided, and SI deterioration can be thereby restrained.
US07745918B1	Package in package (PiP) A package includes an internal package stacked upon a primary die. The package includes interconnection balls to allow the package to be electrically and physically connected to a mother board. The package is mounted to the mother board in a single operation thus minimizing labor and the associated manufacturing cost. Further, the package is tested and verified to be non-defective prior to mounting to the mother board.
US07745914B2	Package for receiving electronic parts, and electronic device and mounting structure thereof A package for receiving electronic part has a heat radiating plate having a mounting area where the electronic part is mounted at a center portion of one main surface, a frame body adhered to the one main surface to surround the mounting area, and a wiring conductor derived from the inside to the outside of the frame body. The heat radiating plate has a metallic base body, a metallic body filling inside of the metallic base body, and a metal layer deposited on the metallic base body and the metallic body. The mounting area is formed on the metal layer so as to be located above the metallic body, both of the metallic body and the metal layer have higher thermal conductivity than the metallic body, and both of the frame body and the metallic base body have a smaller coefficient of thermal expansion than the metal layer.
US07745911B2	Semiconductor chip package A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.
US07745910B1	Semiconductor device having RF shielding and method therefor A semiconductor device has a substrate comprising at least one dielectric layer and at least one metal layer on a first surface of the substrate. A die is attached to the first surface of the substrate. A mold compound is used to encapsulate the die and partially encapsulate the first surface of the substrate. The mold compound has a protrusion proximate to the at least one metal layer. A conductive material covers the mold compound, including the protrusion, and contacts the at least one metal layer.
US07745908B2	Semiconductor component containing compound of aluminum, gallium, indium, arsenic, and antimony has mesa structure whose sides have passivation layer of compound of aluminum, gallium, arsenic, and antimony A Semiconductor component that contains AlxGayIn1-x-yAszSb1-z, whereby the parameters x, y, and z are selected such that a bandgap of less than 350 meV is achieved, whereby it features a mesa-structuring and a passivation layer containing AlnGa1-nAsmSb1-m is applied at least partially on at least one lateral surface of the structuring, and the parameter n is selected in the range of 0.4 to 1 and the parameter m in the range of 0 to 1.
US07745907B2	Semiconductor package including connector disposed in troughhole A semiconductor package and a method of fabricating the same are provided. The semiconductor package includes a semiconductor chip and a circuit board. The semiconductor chip has a bond pad. The circuit board has a base substrate with a throughole, and a conductive film pattern placed on a sidewall of the throughole. The throughole is aligned with the bond pad to expose the bond pad. A connector located within the throughole electrically connects the conductive film pattern to the bond pad. A sealing layer covers the connector.
US07745906B2	Semiconductor device having spaced unit regions and heavily doped semiconductor layer An n+-emitter layer arranged under an emitter electrode is formed of convex portions arranged at predetermined intervals and a main body coupled to the convex portions. A convex portion region is in contact with the emitter electrode, and a p+-layer doped more heavily than a p-base layer is arranged at least below the emitter layer. In a power transistor of a lateral structure, a latch-up immunity of a parasitic thyristor can be improved, and a turn-off time can be reduced.
US07745903B2	Semiconductor device and a method of manufacturing the same A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect transistor of a high integration degree. In a mask ROM section having an element isolation region with an isolation width of smaller than 0.3 μm, a planar shape of each active region ACT is made polygonal by cutting off the corners of a quadrangle, thereby suppressing the occurrence of a crystal defect in the active region ACT and diminishing a leakage current flowing between the source and drain of a field effect transistor. In a sense amplifier data latch section which is required to have a layout of a small margin in the alignment between a gate G of a field effect transistor and the active region ACT, the field effect transistor is disposed at a narrow pitch by making the active region ACT quadrangular.
US07745897B2	Methods for packaging an image sensor and a packaged image sensor An image sensor is packaged by attaching the image sensor to a substrate, forming metallic bumps on either the image sensor or a transparent cover, where the metallic bumps are formed in a pattern around the perimeter of the active area of the image sensor. The transparent cover is then glued to the image sensor at the metallic bumps. Electrical connections are formed between the image sensor and the substrate using, for example, conventional wire bonding techniques. The electrical connections are encapsulated within an epoxy for protection. In an embodiment, multiple image sensors are packaged together on the same substrate and separated into individually packaged image sensors by, for example, sawing.
US07745896B2	Image sensor and method of manufacturing the same An image sensor and method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, a metal interconnection layer, a light-receiving unit, a lens-type upper electrode, and a color filter. The semiconductor substrate can include a circuit region. The metal interconnection layer can include a metal interconnection and an interlayer dielectric. The light-receiving unit can be a photodiode disposed on the metal interconnection layer. The lens-type upper electrode can be disposed on the light-receiving unit and formed in a convex lens shape. The color filter can be disposed on the lens-type upper electrode.
US07745889B2	Metal oxide semiconductor transistor with Y shape metal gate A metal oxide semiconductor (MOS) transistor with a Y structure metal gate is provided. The MOS transistor includes a substrate, a Y structure metal gate positioned on the substrate, two doping regions disposed in the substrate on two sides of the Y structure metal structure, a spacer, an insulating layer positioned outside the spacer, a dielectric layer positioned outside the insulating layer and a bevel edge covering the spacer. The spacer has a vertical sidewall, and the vertical sidewall surrounds a recess. A part of the Y structure metal gate is disposed in the recess, and a part of the Y structure metal gate is positioned on the bevel edge.
US07745888B2	Method of making p-channel and n-channel MIS transistors using single film formation of TaC A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
US07745882B2	High-gain bipolar junction transistor compatible with complementary metal-oxide-semiconductor (CMOS) process and method for fabricating the same A method for forming a bipolar junction transistor comprises forming a first well of a second conductive type for forming a collector region in a substrate including device isolation layers, wherein the substrate comprises a first conductive type, forming a second well of the first conductive type for a metal-oxide-semiconductor transistor of the second conductive type within the first well of the second conductive type, wherein the second well of the first conductive type is formed deeper than the device isolation layers, forming a shallow third well of the first conductive type for a base region within the first well of the second conductive type, wherein the shallow third well of the first conductive type is formed shallower than the device isolation layers, and simultaneously forming an emitter region within the shallow third well of the first conductive type and a plurality of collector contacts within the first well of the second conductive type by performing an ion implantation process for forming source/drain regions of the metal-oxide-semiconductor transistor of the second conductive type.
US07745880B2	Dielectric substrate with reflecting films A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, preferably a film in which a silicon oxide or silicon nitride layer is sandwiched between polycrystalline silicon layers. This structure provides high reflectance with a combined film thickness of less than half a micrometer.
US07745872B2	Asymmetric operation method of non-volatile memory structure An operation method for a non-volatile memory structure formed between two doping regions serving as bit lines in a semiconductor substrate, the non-volatile memory structure comprising a first conductive line serving as a select gate and being formed above the semiconductor substrate, two conductive blocks serving as floating gates and being formed at the two sides of the first conductive line and insulated from the first conductive line with two first dielectric spacers therebetween, a first dielectric layer formed on the two second conductive blocks, a second conductive line serving as a word line and being formed on the first dielectric layer and substantially perpendicular to the two doping regions. While reading the programmed status of one of the conductive blocks, a bias voltage is applied to the doping region next to the conductive block to be read, a bias voltage is applied to the second conductive line, and a bias voltage is applied to the first conductive line next to the conductive block to be read, so as to turn on the select gate and form an inversion layer underneath the select gate; and the doping region, the channel under the conductive block and the inversion layer under the select gate form a reading path during the reading operation.
US07745865B2	Devices and methods for preventing capacitor leakage Devices and methods for preventing capacitor leakage caused by sharp tip. The formation of sharp tip is avoided by a thicker bottom electrode which fully fills a micro-trench that induces formation of the sharp tip. Alternatively, formation of the sharp tip can be avoided by recessing the contact plug to substantially eliminate the micro-trench.
US07745859B2	Solid-state image sensing apparatus and fabrication method thereof A solid-state image sensing apparatus has a signal storage portion of a second conductivity type provided within a substrate, a surface shield layer of the first conductivity type provided in a surface portion of the substrate which is located above the signal storage portion, a gate electrode provided over the substrate in adjacent relation to at least one end of the signal storage portion, and a drain region of the second conductivity type provided in a surface portion of the substrate which is on the side opposite to the surface shield layer when viewed from the gate electrode. A read control layer of the first conductivity type is further provided in a surface portion of the substrate which is located under the gate electrode in adjacent relation to one end of the surface shield layer.
US07745857B2	Semiconductor device and its manufacturing method The object of the invention is to provide a semiconductor device that can form photodiodes that do not short circuit, without damage that causes leakage, despite formation of the opening part, and its manufacturing method. The second semiconductor layer (12, 16) of the second conductivity type is formed on the main surface of the first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) formed at least on the second semiconductor layer separate the device into the regions of plural photodiodes (PD1-PD4). Conductive layer 18 is formed on the second semiconductor layer 16 in a pattern that is divided for each of the photodiodes and is connected to the second semiconductor layer 16 along the outer periphery with respect to all of the plural photodiodes. Insulation layer (19, 21) is formed on the entire surface to cover conductive layer 18. An opening part, which reaches the second semiconductor layer 16, is formed in the insulation layer (19, 21) in the region inside the pattern of conductive layer 18.
US07745853B2	Multi-layer structure with a transparent gate A multi-layer structure with a transparent gate includes a MHEMT device structure comprising a GaAs substrate, a Schottky layer and a cap layer formed on the Schottky layer; a transparent gate formed on the Schottky layer being an indium tin oxide, ITO; and a drain and a source formed on the cap layer. Moreover, the MHEMT device structure includes a graded buffer, a buffer layer, a first spacer layer, a channel layer, and a second spacer layer formed between the GaAs substrate and the Schottky layer in a stacked fashion. The multi-layer structure is a transparent gate HEMT employing indium tin oxide which can make HEMT more sensitive to the light wave.
US07745850B2	Nitride-based semiconductor device with reduced leakage current A high electron mobility transistor is disclosed which has a triple-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. Whilst the aluminum nitride layers are of n-like conductivity, the gallium nitride layers are doped into p-type conductivity, with the consequent creation of pn junctions between the two kinds of buffer layers. Another pn junction is formed between one p-type gallium nitride layer and the adjoining n-like electron transit layer included in the main semiconductor region. The pn junctions serve for reduction of current leakage.
US07745848B1	Gallium nitride material devices and thermal designs thereof Gallium nitride material devices and methods associated with the devices are described. The devices may be designed to provide enhanced thermal conduction and reduced thermal resistance. The increased thermal conduction through and out of the gallium nitride devices enhances operability of the devices, including providing excellent RF operation, reliability, and lifetime.
US07745844B2	Light-emitting diode package and manufacturing method thereof An LED package is provided. The LED package comprises a metal plate, circuit patterns, and an LED. The metal plate comprises grooves. The insulating layer is formed on the metal plate. The circuit patterns are formed on the insulating layer. The LED is electrically connected with the circuit pattern on the insulating layer.
US07745842B2	Graytone mask and method thereof A transmissivity controlled film 12 (CrO or the like), a transmissivity reduced film 13 (Cr or the like), and a resist film 14, for instance, are sequentially formed on, e.g., a transparent substrate 11. A resist is removed from an area (an area C) where a light-transmission section is to be formed, and the transmissivity reduced film 13 and the transmissivity controlled film 12 are removed from the area, thereby forming a light-transmission section. Next, a resist is removed from an area (an area A) in which a graytone section is to be formed, thereby removing the transmissivity reduced film 13 from that area, to thereby form a graytone section. Thus, a graytone mask is manufactured.
US07745835B2	Light emitting diode and light emitting diode device including the light emitting diode element and method for manufacturing the light emitting diode A light emitting diode has a base made of heat conductive material, a wire plate made of an insulation material and secured to an upper surface of the base. Conductive patterns are secured to the wire plate, and a light emitting diode element is secured to the base at an exposed mounting area. The light emitting diode element is electrically connected to the conductive patterns.
US07745834B2	Semiconductor image sensor and method for fabricating the same A semiconductor image sensor includes: a semiconductor imaging element including an imaging area, a peripheral circuit area, and an electrode area; cylindrical electrodes provided on electrode terminals so as to be electrically connected with an external device; and a transparent resin layer provided on the upper surface of the semiconductor imaging element. The upper surface of each cylindrical electrode and the upper surface of the transparent resin layer are substantially of the same height.
US07745833B2	Semiconductor light emitting device and fabrication method of the same The invention provides a semiconductor light emitting device and the fabrication method of the same. The semiconductor light emitting device according to the invention comprises a multi-layer light emitting structure and a heat conducting layer. The multi-layer light emitting structure comprises a first layer. The first layer has an exposed first surface, and it also has a first thermal conductivity. The heat conducting layer is formed on and covers the first layer. The heat conducting layer has a second thermal conductivity, wherein the second thermal conductivity is greater than the first thermal conductivity.
US07745832B2	Semiconductor light-emitting element assembly with a composite substrate A semiconductor light-emitting element assembly, comprising a composite substrate, a circuit layout carrier, a connecting structure, a recess, and a semiconductor light-emitting element, is disclosed. The connecting structure is used for bonding the composite substrate with the circuit layout carrier. The recess is formed by the circuit layout carrier and extends toward the composite substrate. The semiconductor light-emitting element is deposited in the recess and electrically connected to the circuit layout carrier.
US07745826B2	Thin film transistor substrate, electronic apparatus, and methods for fabricating the same A TFT substrate includes a substrate and at least a TFT disposed thereon. The TFT includes a semiconductor island and at least a gate. The semiconductor island has a source region, a drain region, and a channel region interposed therebetween. The semiconductor island has sub-grain boundaries. The gate corresponds to the channel region. A first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees. A second included angle between the sub-grain boundaries in the channel region and the line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 0 degree or 90 degrees. Additionally, a method of fabricating a TFT substrate, an electronic apparatus, and a method of fabricating the electronic apparatus are also provided.
US07745824B2	Semiconductor device and method of manufacturing the same In a semiconductor device and a method of manufacturing the semiconductor device, the source wires 126 of a pixel portion 205 are formed of material having low resistance (representatively, aluminum, silver, copper). The source wires of a driving circuit are formed in the same process as the gate wires 162 of the pixel portion and a pixel electrode 163.
US07745820B2	Negative differential resistance polymer devices and circuits incorporating same A device includes: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact. The tunneling barrier layer has a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. Circuits are also disclosed that utilize one or more negative differential resistance polymer diodes to implement logic, memory, or mixed signal applications.
US07745818B2	Light emitting device with silicone resin layer formed by screen printing A light emitting device, including a light emitting element, and a resin layer that has been screen printed to coat said light emitting element is provided. The resin layer is formed from a curable silicone resin composition, which includes (i) an organopolysiloxane with a polystyrene equivalent weight average molecular weight of at least 5×103, (ii) a condensation catalyst, (iii) a solvent, and (iv) a finely powdered inorganic filler. The uniformity of the film thickness is excellent, thus resulting in little color irregularities during light emission from the light emitting element.
US07745817B2	Combined information display and information input device A combined information display and information input device comprising a matrix of independently addressable light emitting devices and a plurality of light sensing devices, the light emitting devices comprising organic light emitting diodes comprising organic light emitting material positioned between a low work function electrode and a high work function electrode characterized in that the light sensing devices comprise organic photovoltaic devices comprising at least an organic electron donor and at least an organic electron acceptor positioned between a high work function electrode and a low work function electrode. The combined information display and information input device has application as a touch screen, for example for a mobile communication device.
US07745812B2	Integrated circuit including vertical diode An integrated circuit includes a vertical diode defined by crossed line lithography.
US07745807B2	Current constricting phase change memory element structure A layer of nanoparticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.
US07745804B1	Ion implantation method and application thereof An ion implantation method for achieving angular uniformity throughout a workpiece and application thereof are provided. The ion beam has at least one beamlet striking the workpiece surface with corresponding incident angles. The workpiece is mapped to an imaginary planar coordinate system. The incident angle of a center beamlet of the ion beam has a projection on the coordinate system forming a projection angle with an axis thereof. A workpiece orientation of the workpiece is adjusted based on the projection angle such that the contribution of each beamlet to the overall ion beam intensity upon striking the workpiece surface is rendered substantially the same from respective directions of each of the coordinate axes.
US07745803B2	Ion doping apparatus, ion doping method, semiconductor device and method of fabricating semiconductor device An ion doping apparatus includes: a chamber 11; a discharge section 13 for discharging a gaseous content from within the chamber 11; an ion source 12 being provided in the chamber 11 and including an inlet 14 through which to introduce a gas containing an element to be used for doping, the ion source 12 decomposing the gas introduced through the inlet 14 to generate ions containing the element to be used for doping; an acceleration section 23 for pulling out from the ion source 12 the ions generated at the ion source 12 and accelerating the ions toward a target object held in the chamber; and a beam current meter 26 for measuring a beam current caused by the accelerated ions. The beam current is measured by the beam current meter 26 a plurality of times, and if a result of the measurements indicates a stability of the beam current, the ion doping apparatus automatically begins to implant into the target object the ions containing the element to be used for doping. Thus, an ion doping apparatus having excellent doping amount controllability is provided.
US07745799B2	Detector for aiborne alpha partice radiation In the field of protection from ionising alpha particle radiation there is a need for a low cost, reliable, maintenance free, and self-contained detector that can monitor continuously over a plurality of time periods the levels of airborne alpha particle radiation. The detector operates by measuring the charge created by alpha particle decay between electrodes in an enclosure. Detectors may be linked together to monitor several parts of a building or a large area for applications such as civil emergencies and earthquake warning.
US07745794B2	Positron emission tomography module A positron emission tomography module is disclosed. In at least one embodiment, the positron emission tomography module includes a gamma ray detector arrangement designed such that it can alternately be combined with a magnetic resonance tomograph and with a computed tomograph.
US07745792B2	Terahertz detectors for use in terahertz inspection or imaging systems A technique is provided for examining a subject. The technique includes illuminating at least a part of the subject with THz radiation and detecting THz radiation reflected and/or transmitted from the illuminated part and incident upon a detector array by measuring change in capacitance corresponding to the incident THz radiation.
US07745790B2	Negative refractive index device for generating terahertz or microwave radiation and method of operation thereof A negative refractive index device and a method of generating radiation. In one embodiment, the device includes: (1) an optical input configured to receive light and (2) an optical medium having a negative index of refraction and a second-order nonlinearity proximate a center frequency of the light, coupled to the optical input and configured to resonate in response to the light to yield radiation having a phase velocity based on a group velocity of the light.
US07745784B2	Electron beam apparatus and method of manufacturing semiconductor device using the apparatus The present invention provides an electron beam apparatus for evaluating a sample surface, which has a primary electro-optical system for irradiating a sample with a primary electron beam, a detecting system, and a secondary electro-optical system for directing secondary electron beams emitted from the sample surface by the irradiation of the primary electron beam to the detecting system.
US07745779B2	Color pixel arrays having common color filters for multiple adjacent pixels for use in CMOS imagers Image sensors and methods of operating image sensors. An image sensor includes an array of pixels and an array of color filters disposed over the array of pixels such that each different color filter is disposed over multiple pixels. A method of operating an image sensor including an array of two by two blocks of single color pixels includes determining a level of incident light, determining an incident light value corresponding to the level of incident light and comparing the incident light value to a predetermined threshold value. If the incident light value is less than the predetermined threshold value, a combined signal is read from the two by two blocks. If the incident light value is less than the predetermined threshold value, an individual signal is read from each pixel.
US07745775B2	Testing of transimpedance amplifiers Testing is performed on an amplifier wafer housing a transimpedance amplifier prior to packaging the transimpedance amplifier with an external photodetector, wherein the transimpedance amplifier includes a small, auxiliary, integrated silicon photodetector provided at the input of the transimpedance, in parallel with external photodetector attachment points. Totest the transimpedance amplifier, the transimpedance amplifier is stimulated by optically exciting the small auxiliary photodetector, wherein the small auxiliary photodetector is excited using short wavelength light, whereby advantages such as higher efficiency may be obtained. The testing method includes placing the amplifier wafer in a testing system, probing the power and ground connections on the amplifier wafer, illuminating the small auxiliary photodetector on the amplifier wafer, and detecting the output of the transimpedance amplifier housed on the amplifier wafer.
US07745771B2	Synchronous imaging using segmented illumination In an actively illuminated imaging system, illumination of a segmented scene is synchronized with an image sensing period. A scene is segmented into a plurality of scene portions utilizing a segmented lens. In an aspect, a first scene portion is illuminated when an imager is actively collecting photogenerated charge from the first scene portion, and a second scene portion is illuminated when an imager is actively collecting photogenerated charge from the second scene portion. The sensitivity of an image sensor is maximized, while simultaneously minimizing the amount of light that must be supplied to illuminate a scene. An irradiance pattern is varied allowing a more uniform distribution of light. Bands of varying wavelength, polarization, and light intensity may be variously applied to illuminate individual scene segments, as needed to enhance an identification of an object in the scene. The present invention is particularly useful with high frame rate imaging systems.
US07745766B2	Elevated microwaveable carton and susceptor portion and methods A carton for use in microwave ovens includes a base and a removable cover. The base has a cooking surface at least partially covered with a microwave susceptor material. The base defines an aperture arrangement. In preferred embodiments, the carton is triangular-shaped with an apex region. The apex region does not have a susceptor material, and can include a microwave shield. The removable cover can function as a cover, a platform, and a tray. A packaged food product includes a food product, such as a slice of pizza, oriented within the carton. Methods of packaging and use are provided.
US07745764B2	Method and apparatus for controlling furnace position in response to thermal expansion A compression system for an inductively heated pusher furnace controls movement of susceptors during thermal contraction thereof. The system includes a plurality of furnace sections each having a susceptor wherein each susceptor abuts an adjacent susceptor and wherein the susceptors include first and last susceptors. A compression plate abuts the first susceptor to apply force thereon toward the last susceptor to keep the susceptors in abutment with each other during contraction of the susceptors during cooling thereof. An actuator for moving the compression plate is preferably automatically controlled by a computerized control system. The susceptors together form a tunnel through which pusher plates travel and have overlapping joints which seal against the escape of gasses and allow for a degree of susceptor contraction without forming a gap therebetween even in the absence of compression of the susceptors.
US07745763B2	Method for baking bread using steam A method of baking bread using steam in an automated household oven with a cooking cavity and a steam system for introducing steam into the cooking cavity comprises determining a presence of bread in the cooking cavity and introducing steam into the cooking cavity upon a positive determination of the presence of bread. After the positive determination, the steam is introduced into the cavity to maintain a desired relative humidity in the cavity for a predetermined period of time to aid in formation of a moist, flexible crust on the bread, and the amount of steam introduced into the cavity decreases after the predetermined period of time. The cavity can be preheated and prehumidified prior to the determining of the presence of the bread in the cooking cavity.
US07745761B2	Hot-melting machine with rotatable worktable An exemplary hot-melting machine (20) includes a worktable (23), a number of carriers (24), a heater (25), at least one cooler (26), and a controller (28). The carriers are located on the worktable and are uniformly spaced apart. Each carrier is configured for holding a workpiece. The heater is configured for heating the workpiece. The cooler is configured for cooling the workpiece. The controller is configured for driving the worktable to rotate, the heater to move down toward and up away from a corresponding one of the carriers, and the at least one cooler to move down toward and up away from another corresponding one of the carriers. At each of successive stages in operation of the hot-melting machine, one of the carriers is aligned with the heater, another one the carriers is aligned with the at least one cooler, and a further one of the carriers is positioned such that a workpiece can be unloaded from the further one of the carriers and another workpiece can be loaded on the further one of the carriers.
US07745757B2	Welding apparatus for carrying a welding gun along a surface to be welded A welding apparatus is provided for carrying a welding gun across or past a surface for making welds. The apparatus may include one or more rolling components, such as wheels for example, that do not substantially plastically deform as a result of contacting or being in close proximity to recently completed welds or preheated joints and provide adequate traction to move the apparatus across or past the surface. A portion of the contact surface of the rolling component may be configured with a given surface roughness to provide sufficient traction.
US07745756B2	Laser processing machine A laser processing machine is provided in which a machining tool is automatically exchanged with a laser processing tool to be mounted to a processing head thereof to perform machining operations such as tapping to works. A machining tool 70 which is exchangeably clamped to a mounting section 510 of a processing head 50 of a laser processing machine has a body 720 and a piston member 730 in the body 720, and the piston member 730 supports an air motor 740, a reducer 750, a tool chuck 760, and a tap 762. Air is sent to the air motor 740 from an air source 551b by switching a valve, and an assist gas for a normal or reverse rotation is sent from an assist gas source 554b to the upper portion of the piston member 730, so that a tap is lowered to perform tapping to a work.
US07745755B2	Method of processing postal articles for making up and separating delivery rounds The method of handling mail items for preparing delivery rounds in a postal sorting machine having sorting outlets with interchangeable trays, in which in order to separate the mail items of two delivery rounds at one sorting outlet, the machine causes a tray to be changed at said sorting outlet.
US07745753B2	Capacitor switch including a bi-directional toggle mechanism and linearly opposing opening and closing spring latches An electric power switch suitable for use as a capacitor switch that includes a drive unit having a bi-directional toggle mechanism and linearly opposing opening and closing spring latches. The opening and closing spring latches are located on opposing sides of the toggle mechanism, which includes an open-cage spring mechanism with coaxial, nested opening and closing springs operated by a rotating, motor-driven charging cam. To open the circuit interrupter, the opening spring latch is tripped to release the opening spring and thereby remove the capacitor bank from the electric power circuit. To introduce the capacitor bank into the electric power circuit, the motor rotates the charging cam through one complete rotation, which charges the opening and closing springs and trips the closing spring latch to release the closing spring to close the circuit interrupter and thereby introduce the capacitor bank into the electric power circuit.
US07745752B2	Mounting of an operation key within an operation panel An operation key 3 is fitted in a guide hole 4 of an operation section cover 2 while making contact with support pieces 12 of a film member 10a. Thus, the support pieces 12 are pressed, widened, and then bent by an operation section 3b, thus sandwiching the support pieces 12 between the operation section 3b and the guide hole 4. Here, the film member 10a has an elastic force; thus, the operation key 3 is positioned at a substantially vertical center of the guide hole 4 by restoring forces of the support pieces 12.
US07745751B2	Member for push-button switch and method of manufacturing the same A member for a push-button switch has key top members positioned close to each other through a distance of 1.5 mm or shorter at low cost and with high yield. The member has multiple key top members having resin key top cores and thermoplastic films covering the key top cores other than the lower surfaces thereof. The key top members are formed so that an interval between at least one set of adjacent key top members is 1.5 mm or shorter. In the key top members adjacent to each other through a distance of 1.5 mm or shorter, the maximum thickness of the thermoplastic films covering the key top cores is within the range of 75 to 350 μ, and the ratio of the minimum thickness of the thermoplastic films covering the key top cores to the maximum thickness is within the range of 0.4 to 0.9.
US07745748B2	Switch having a complementary diode unit A diode unit (9) including at least one diode (13) and a pair of terminals (15) is mounted on a switch body (2) having an actuate-able key (6) and at least two terminal points (4). The diode unit (9) is positioned on the exposed end of the key (6) such that surface parts of the diode unit (9) is brought into engagement with corresponding surface parts of the switch body (2) so as to prevent the diode unit (9) from movement in relation to the switch body (2) in a predefined plane. The diode unit terminals (15) extend in a direction transverse to said plane, and the diode unit terminals (15) are connected to the terminal points (4) of the switch body (2) so as to prevent movement of the diode unit (9) in relation to the switch body (2) transversely to said predefined plane.
US07745744B2	Multidirectional switch A multidirectional switch (1) comprises an insulative housing (2), a first fixed contact (31) and a third fixed contact (33), a first moveable contact (41) and a second moveable (42) contact disposed above the first fixed contact (31) and the third fixed contact (33), an operation member (5) mounted on the first moveable contact (41) and defining a second pressing portion (53). The second pressing portion (53) presses the second moveable contact (42) in order to make the second moveable contact (42) contact with or separate from the third fixed contact (33). The first moveable contact (41) always contacts with the first fixed contact (31). The second moveable contact (42) is integrated with the first moveable contact (41) and distributed around the first moveable contact (41).
US07745743B2	Method and device for controlling switch between appliances This invention provides a method and a device for controlling switch between appliances. The method includes: setting a group of control signals according to operations to be performed by appliances involved in a switch between a current appliance and a target appliance; and controlling the appliances involved in the switch between the current appliance and the target appliance to perform operations corresponding to the group of control signals, when the switch is triggered. The method simplifies the operation of switch between appliances in a multi-appliance environment and enables one appliance switching key to control multiple appliances.
US07745742B2	Button assembly A button assembly includes a first-button assembly (70), and a second-button assembly (80). The first-button assembly comprises a first button (72), and a first-supporting frame (74) used for supporting the first button. The first supporting frame includes a plurality of latching poles (78) projecting therefrom. The second-button assembly includes a plurality of second buttons (82) arranged around the first button, and a second-supporting frame 86 for supporting the second buttons. The second-supporting frame includes a plurality of latching holes 842 for receiving the latching poles. An electronic product having the button assembly is also disclosed.
US07745741B2	Liquid crystal dispensing apparatus having confirming function for remaining amount of liquid crystal and method for measuring the same A liquid crystal dispensing apparatus determines an amount of liquid crystal remaining within a liquid crystal container. The apparatus includes a liquid crystal dispensing unit for containing liquid crystal material dispensable onto a substrate, the a liquid crystal dispensing unit including a liquid crystal container for containing the dispensable liquid crystal material and for receiving supplied gas, an upper cap secured to the liquid crystal container, a nozzle arranged at a lower portion of the liquid crystal container through which the liquid crystal material is dispensable, and a valve structure for allowing liquid crystal material contained within the liquid crystal container to enter the nozzle via a pressure from the supplied gas; and a weight measuring unit coupled to the liquid crystal dispensing unit for determining a weight of an amount of liquid crystal material remaining within the liquid crystal dispensing unit, wherein the weight measuring unit installed at the lower surface of the upper cap.
US07745737B2	Printed circuit board having vias A printed circuit board (PCB) having vias for reducing reflections of input signals includes a first signal layer, a second signal layer, one via, an input signal line arranged on the first signal layer, and an output signal line arranged on the second signal layer. The via further includes a drill hole, a first pad, and a second pad. The first pad is electrically connected with the input signal line, and the second pad is electrically connected with the output signal line. An outer diameter of the first pad is smaller than an outer diameter of the second pad.
US07745730B2	Wiring component A wiring component includes an array of multiple wires, at least one connector which engages the wires, and at least two layers of a hardened fiber and a filler compound that sandwiches the wires. The areas adjacent to the wires include a filler which immobilizes the wires relative to the layers. In one embodiment at least a portion of the connector is embedded in the filler.
US07745725B2	Electric power terminal feed-through A power terminal feed-through incorporates a metallic body through which extend one or more current conducting pins that are hermetically sealed to the metallic body by a glass-to-metal seal. The metallic body includes an annular lip with a protrusion. During welding installation of the power terminal feed-through, the protrusion serves to assist in the welding process, better controlling the location and definition of the weld between the metallic body and a housing, and to focus the welding heat at the protrusion, thereby protecting the glass-to-metal seal. The glass-to-metal seal can be a single glass insert through which the current conducting pins extend, thereby reducing the pin circle diameter and the overall size of the power terminal feed-through.
US07745720B2	Thermoelectric material and thermoelectric device A thermoelectric material includes a composition represented by the following formula (A): (Tia1Zrb1Hfc1)xNiySn100-x-y (A) where 0
US07745719B2	Electronic keyboard musical instrument An electronic keyboard musical instrument which can realize natural sounds with favorable sound quality as an acoustic piano. A sound board (33) made of a plate member is vibrated so as to generate musical tones. A first performance signal generator (22) generates a first performance signal based on the operating state of a plurality of keys of a keyboard (17). A second performance signal generator (23) generates a second performance signal, which is different from the first performance signal, based on the operation of the plurality of keys and the operation of a pedal (18). Speakers (41A-41D) generate musical tones based on the first performance signal generated by the first performance signal generator (22). Transducers (21A-21C) mounted to the sound board (33) vibrate the sound board (33) based on the second performance signal generated by the second performance signal generator (23).
US07745714B2	Recording or playback apparatus and musical piece detecting apparatus Provided is a recording or playback apparatus capable of separating a musical piece from an audio including the musical piece and a speech through a simple arithmetic process. A cut point detector detects, as a cut point, a time point at which an audio signal level or an amount of change in the audio signal level is not lower than a predetermined value. A frequency characteristic amount calculator calculates a characteristic amount in a frequency area of the audio signal only at each cut point and in its proximity. A cut point judging unit judges an attribute of the cut point on a basis of the calculated characteristic amount of the frequency. A music section detector detects a start and end points of each music section on a basis of the attribute and an interval between sampling points.
US07745712B2	Quick release for snare strainer and butt end apparatus and method In the specification and drawing, a coupling is described and shown connecting a snare to a snare drum, the snare drum having a drum wall with a top edge and a bottom edge. The coupling connects a male section to a female section. The male section and female section interoperate in a vertical location between top edge and bottom edge of the snare drum wall. One of either the female section or male section is fixed to the drum wall in a radial direction and tangential direction. The other is fixed to said snare.
US07745710B2	Spring capo A capo for use with a stringed instrument having a plurality of strings a neck comprising a fingerboard and a back comprises a string-engaging arm, a clamping arm, and a pivotal connection to pivotally interconnect a string-engaging arm and clamping arm. The string-engaging arm adapted to in use extend across the fingerboard above the strings and in use press against the strings. The clamping arm is adapted to, in use, extend across engage the back of the neck. The pivotal connection is disposed, in generally towards one side of the neck and at a position behind the fingerboard inboard of a side edge of the fingerboard. This arrangement and location of the pivotal connection reduces the forces required in use to operate the capo.
US07745708B2	Self-assembly of peptide-amphiphile nanofibers under physiological conditions Peptide amphiphile compounds, compositions and methods for self-assembly or nanofibrous network formation under neutral or physiological conditions.
US07745707B1	Plants and seeds of corn variety CV443328 According to the invention, there is provided seed and plants of the corn variety designated CV443328. The invention thus relates to the plants, seeds and tissue cultures of the variety CV443328, and to methods for producing a corn plant produced by crossing a corn plant of variety CV443328 with itself or with another corn plant, such as a plant of another variety. The invention further relates to corn seeds and plants produced by crossing plants of variety CV443328 with plants of another variety, such as another inbred line. The invention further relates to the inbred and hybrid genetic complements of plants of variety CV443328.
US07745705B1	Maize variety PHW0V A novel maize variety designated PHW0V and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHW0V with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHW0V through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHW0V or a trait conversion of PHW0V with another maize variety. Inbred maize varieties derived from maize variety PHW0V, methods for producing other inbred maize varieties derived from maize variety PHW0V and the inbred maize varieties and their parts derived by the use of those methods.
US07745703B1	Soybean cultivar S07-02RM030020 The present invention is in the field of soybean cultivar S07-02RM030020 breeding and development. The present invention particularly relates to the soybean cultivar S07-02RM030020 and its progeny, and methods of making S07-02RM030020.
US07745702B1	Soybean variety XB31K08 According to the invention, there is provided a novel soybean variety designated XB31K08. This invention thus relates to the seeds of soybean variety XB31K08, to the plants of soybean XB31K08 to plant parts of soybean variety XB31K08 and to methods for producing a soybean plant produced by crossing plants of the soybean variety XB31K08 with another soybean plant, using XB31K08 as either the male or the female parent.
US07745693B2	Inhibitors of plant peptide deformylase for use as broad-spectrum herbicides and methods for identifying the same The invention relates to a method of identifying herbicides and to the use of inhibitors of plant peptide deformylase as broad spectrum herbicides.
US07745690B2	Transgenic nonhuman mammal representing the pathologic conditions of human rheumatoid arthritis It is intended to provide a transgenic nonhuman mammal well representing the pathologic conditions of human rheumatoid arthritis. A transgenic nonhuman mammal is obtained by transferring a foreign DNA, wherein a DNA selected from the group consisting of an MHC class II transcriptional activator gene, the activity domain of an MHC class II transcriptional activator gene and a variant of an MHC class II transcriptional activator gene is provided under the control of a type II collagen promoter, into a cell at the early stage of development.
US07745686B2	Catamenial device There is provided a fibrous absorbent article for absorbing body fluids made up of a fibrous material defining a structure suitable for absorbing the body fluids, and disposed within the structure an effective amount, so as to reduce Staphylococcus aureus bacterial growth and neutralize TSS toxin-1 within the vagina, of one or more antimicrobial agents and one or more finishing agents.
US07745684B2	Odor control nether garment, method of making same and method of controlling odor A nether garment for adsorbing odor to be worn close to at least one body part of a user having at least one outer fabric material layer and an inner layer of fiber fabric material for adsorbing odor, such that the nether garment conforms to a shape of the at least one body part of the user thereby providing one or more of a lightweight, flexible, breathable, washable, regenerative and reusable apparatus. Also described is a method of making an odor control nether garment and an improved method of controlling odors, including various body odors.
US07745682B2	Wound dressing and method for manufacturing the same A wound dressing defining skin facing areas having different degrees of skin adherence. The dressing comprises a backing layer defining a center portion and a border portion surrounding the center portion. A carrier layer is secured to the border portion of the backing layer within the border portion and includes a first skin adherent facing layer. An absorbent core is connected to a surface of the backing layer within the center portion and a second skin adherent facing layer is disposed along a surface of the absorbent core. The first facing layer has greater skin adhesive properties than the second facing layer.
US07745673B2	Processes for producing hydrohalocarbon and halocarbon compounds using silicon tetrafluoride Methods and systems for producing hydrohalocarbon and/or halocarbon compounds with an inorganic fluoride (e.g., silicon tetrafluoride (SiF4)) are disclosed herein.
US07745668B2	Processes for reducing color in polytrimethylene ether glycol polymers Processes for reducing color in PO3G are provided. The processes include contacting PO3G with an activated carbon and then separating the PO3G from the activated carbon by, for example, filtration. The process provides PO3G having an APHA color less than that before contact with the absorbent. The processes are desirably used for polymers having a molecular weight of about 250 to about 5000.
US07745667B2	Microchannel apparatus comprising structured walls, chemical processes, methods of making formaldehyde Methods for controlling series or series-parallel reactions are described. Novel microchannel apparatus having mesoporous structures adjacent to bulk flow paths are described. Methods of synthesizing formaldehyde from methanol are also described.
US07745663B2	5-Substituted-2-phenylamino benzamides as MEK inhibitors An objective of the present invention is to provide compounds that exhibit strong MEK-inhibiting activity and are stable in vivo and soluble in water, which can be used as preventive or therapeutic agents for proliferative diseases.The compounds of the present invention and pharmaceutically acceptable salts thereof are represented by the following formula (1): [where R1, R2, R3, R4, and X are the same as defined in the present patent application].
US07745661B2	Process for producing tricarboxylic acid tris (alkyl-substituted cyclohexylamide) Disclosed are, for example, a process for producing a tricarboxylic acid tris(alkyl-substituted cyclohexylamide), the process comprising subjecting a tricarboxylic acid and an alkyl-substituted cyclohexylamine to an amidation reaction, either (a) in the presence of a boric acid compound and a phenol compound or (b) in the presence of a boric acid ester obtained by the dehydration condensation of a boric acid compound and a phenol compound, and optionally purifying the resulting crude reaction product.
US07745657B2	D-homoandrosta-17-yl carbamate derivatives as selective glucocorticoid receptor ligands The present invention is directed to D-homoandrosta-17-yl-carbamate derivatives as selective glucocorticoid receptor ligands useful for treating a variety of autoimmune and inflammatory diseases or conditions. Pharmaceutical compositions and methods of use are also included.
US07745652B2	Integrated chemical processes for industrial utilization of seed oils Integrated processes of preparing industrial chemicals starting from seed oil feedstock compositions containing one or more unsaturated fatty acids or unsaturated fatty acid esters, which are essentially free of metathesis catalyst poisons, particularly hydroperoxides; metathesis of the feedstock composition with a lower olefin, such as ethylene, to form a reduced chain olefin, preferably, a reduced chain α-olefin, and a reduced chain unsaturated acid or ester, preferably, a reduced chain α,ω-unsaturated acid or ester. The reduced chain unsaturated acid or ester may be (trans)esterified to form a polyester polyolefin, which may be epoxidized to form a polyester polyepoxide. The reduced chain unsaturated acid or ester may be hydroformylated with reduction to produce an α,ω-hydroxy acid or α,ω-hydroxy ester, which may be (trans)esterified with a polyol to form an α,ω-polyester polyol. Alternatively, the reduced chain unsaturated acid or ester may be hydroformylated with reductive amination to produce an α,ω-amino acid or α,ω-amino ester, which may be (trans)esterified to form an α,ω-polyester polyamine.
US07745648B2	Process for preparing 4-fluoro-1,3-dioxolan-2-one A process for preparing 4-fluoro-1,3-dioxolan-2-one comprising adding 4-fluoro-1,3-dioxolan-2-one to ethylene carbonate in an amount of from 3 to 20% by weight relative to the ethylene carbonate as a solvent for the ethylene carbonate, and introducing fluorine or a mixture containing fluorine in an inert gas is introduced into the resulting solution at 15 to 45° C.
US07745646B2	Bicyclic heteroaryl inhibitors of PDE4 The present invention relates to compounds and methods which may be useful as inhibitors of phosphodiesterase 4 (PDE4) for the treatment or prevention of inflammatory diseases and other diseases involving elevated levels of cytokines and proinflammatory mediators.
US07745640B2	Hydrophilic labels for biomolecules Compounds, compositions, and methods for optical, including fluorescence optical, determinations useful in labelling biomolecules such as protein and deoxyribonucleic acid for their detection and quantitation. The compounds are diasteromeric cyanines with high hydrophilicity and other desirable properties.
US07745638B2	3,4-disubstituted 1H-pyrazole compounds and their use as cyclin dependent kinase and glycogen synthase kinase-3 modulators The invention provides compounds of the formula (0) or salts or tautomers or N-oxides or solvates thereof for use in the prophylaxis or treatment of disease states and conditions such as cancers mediated by cyclin-dependent kinase and glycogen synthase kinase-3. In formula (0): X is a group R1—A—NR4— or a 5- or 6-membered carbocyclic or heterocyclic ring; A is a bond, SO2, C═O, NRg(C═O) or O(C═O) wherein Rg is hydrogen or C1-4 hydrocarbyl optionally substituted by hydroxy or C1-4 alkoxy; Y is a bond or an alkylene chain of 1, 2 or 3 carbon atoms in length; R1 is hydrogen; a carbocyclic or heterocyclic group having from 3 to 12 ring members; or a C1-8 hydrocarbyl group optionally substituted by one or more substituents selected from halogen (e.g. fluorine), hydroxy, C1-4 hydrocarbyloxy, amino, mono- or di-C1-4 hydrocarbylamino, and carbocyclic or heterocyclic groups having from 3 to 12 ring members, and wherein 1 or 2 of the carbon atoms of the hydrocarbyl group may optionally be replaced by an atom or group selected from O, S, NH, SO, SO2; R2 is hydrogen; halogen; C1-4 alkoxy (e.g. methoxy); or a C1-4 hydrocarbyl group optionally substituted by halogen (e.g. fluorine), hydroxyl or C1-4 alkoxy (e.g. methoxy); R3 is selected from hydrogen and carbocyclic and heterocyclic groups having from 3 to 12 ring members; and R4 is hydrogen or a C1-4 hydrocarbyl group optionally substituted by halogen (e.g. fluorine), hydroxyl or C1-4 alkoxy (e.g. methoxy).
US07745637B2	Peptide deformylase inhibitors Novel PDF inhibitors and novel methods for their use are provided.
US07745636B2	Hepatitis C virus inhibitors The present disclosure relates to compounds, compositions and methods for the treatment of hepatitis C virus (HCV) infection. Also disclosed are pharmaceutical compositions containing such compounds and methods for using these compounds in the treatment of HCV infection.
US07745633B1	Tetrazole based linear polymers A linear isocyanate polymer produced by utilizing an effective amount of tetrazole diol or tetrazole polyol, reacting with an effective amount isocyanate resin, and cooling to room temperature producing a linear polyisocyanate polymer.
US07745626B2	Stereoselective alkylation of chiral 2-methyl-4-protected piperazines In an illustrative embodiment, the present invention describes the synthesis of the following compound and similar compounds, in high stereochemical purity by a novel stereoselective alkylation process:
US07745625B2	Prodrugs of piperazine and substituted piperidine antiviral agents This invention provides for prodrug Compounds I, pharmaceutical compositions thereof, and their use in treating HIV infection. wherein: X is C or N with the proviso that when X is N, R1 does not exist; W is C or N with the proviso that when W is N, R2 does not exist; V is C; E is hydrogen or a pharmaceutically acceptable salt thereof; and Y is selected from the group consisting of Also, this invention provides for intermediate Compounds II useful in making prodrug Compounds I. wherein: L and M are independently selected from the group consisting of C1-C6 alkyl, phenyl, benzyl, trialkylsilyl, -2,2,2-trichloroethoxy and 2-trimethylsilylethoxy.
US07745621B2	Long acting bronchodilators for the treatment of respiratory diseases The invention relates to compounds of general formula 1 wherein n, A, B, D, L, R1, R2, R3 and R4 may have the meanings given in the claims and in the specification, processes for preparing them, and their use as pharmaceutical compositions, particularly as pharmaceutical compositions for the treatment of respiratory complaints.
US07745620B2	Disubstituted cucurbiturils and preparing method thereof Provided are a disubstituted cucurbituril that can be easily substituted by a substituent according to a desired usage and a method for preparing the same. The disubstituted cucurbituril has two end functional groups that can covalently bind with a solid substrate or a biochemically useful compound to obtain a cucurbituril-bonded substrate, which enables application of the disubstituted cucurbituril as column packing materials for chromatography, additives to gas separation membranes, catalysts for various chemical reactions, chemical sensors, or biological sensors.
US07745609B2	Antisense modulation of CD40 expression Antisense compounds, compositions and methods are provided for modulating the expression of CD40. The compositions comprise antisense compounds, particularly antisense oligonucleotides, targeted to nucleic acids encoding CD40. Methods of using these compounds for modulation of CD40 expression and for treatment of diseases associated with CD40 are provided.
US07745608B2	Modified iRNA agents The invention relates to iRNA agents, which preferably include a monomer in which the ribose moiety has been replaced by a moiety other than ribose. The inclusion of such a monomer can allow for modulation of a property of the iRNA agent into which it is incorporated, e.g., by using the non-ribose moiety as a point to which a ligand or other entity, e.g., a lipophilic moiety. e.g., cholesterol, is directly, or indirectly, tethered. The invention also relates to methods of making and using such modified iRNA agents.
US07745607B2	Aptamer selection method The present invention provides a method for the selection of aptamer sequences and aptamers identified using the method. The method comprises immobilizing a library oligonucleotide by forming a duplex with an antisense oligonucleotide, reating the duplex molecule with a target and collecting oligonucleotide molecules which dissociate from the duplex structure.
US07745606B2	Immunostimulatory sequence oligonucleotides and methods of using the same The invention provides immunomodulatory polynucleotides and methods for immunomodulation of individuals using the immunomodulatory polynucleotides.
US07745605B2	BnLea3-1 promoter Late embryogenesis abundant (Lea) proteins accumulate in maturing seeds after many of the storage compounds have been synthesized, and they are considered relevant to maturation. We report here the molecular organization and expression of BnLea3-1, a novel Group 3 Lea gene from Brassica napus. BnLea3-1 contains a coding region of 798 bp, sharing 84.4% homology at the amino acid level with Lea76 of B. napus. Two tandem 11-mer repeats are truncated from the coding region of BnLea3-1, compared to the 13 conserved 11-mer repeats of Lea76. Substitutions of consensus residues are found at various positions within the 11-mer repeats. A 1561 bp 5′ flanking promoter fragment of BnLea3-1 fused to E. coliβ-glucuronidase (GUS) coding region conferred seed-specific GUS expression in stable transgenics of B. napus, tobacco and in transiently-transformed pea. A −137 bp minimal promoter preceding the first transcription start site, identified through progressive deletions from the upstream was sufficient for basal GUS expression in the seeds and in leaves treated with ABA. Deletion studies indicate the presence of enhancing elements located between −137 bp to −742 bp and suppressing elements located between −742 and −1561 bp. BnLea3-1 expression in seeds precedes that of Lea76. Unlike other Group 3 Lea members including HVA1 and Dc3, BnLea3-1 is active in seeds and responsive weakly in vegetative tissues to ABA and methyl jasmonate (MeJA) but not to stress treatments. Possible functions of BnLea3-1 and another member of the Group 3 Lea family BnLea3-2 in embryo development is discussed.
US07745603B1	Plant promoter and uses therefor The present invention relates generally to a novel plant promoter. More particularly, the present invention provides a plant promoter capable of induction by physical and/or environmental stimuli in cells in which the promoter is indigenous and, in the absence of any negative regulatory mechanism, is capable of constitutive expression in cells in which the promoter is non-indigenous. The present invention is further directed to derivatives of the subject promoter including modular forms of the promoter which are, for example, inducible by different physical and environmental stimuli or which are constitutively expressed. The promoter of the present invention has a range of uses including directing expression of genes conferring useful traits on plants.
US07745598B2	CpG single strand deoxynucleotides for use as adjuvant The present invention provides an adjuvant, which includes at least one single strand deoxynucleotide containing a CpG dinucleotide. The single strand deoxynucleotide comprises one or more CpG dinucleotides. When used in combination with rabies vaccine, HBV vaccine or other vaccines, the adjuvant can significantly improve the immune effect of the vaccine.
US07745596B2	Nuclear transport nucleic acid delivery vector To provide a new technique by which efficient transfection is ensured in delivering a target gene into a cell, disclosed is a nucleic acid construct for nuclear import, which comprises a ternary complex consisting of a nucleic acid substance containing a gene to be delivered into the nucleus of a cell, an importin protein (for example, importin-β) capable of passing through the nuclear pore and involved in the nuclear transport, and a binding substance (for example, polyethyleneimine) bound to both of the nucleic acid substance and the importin protein. Nucleic acid transport from outside of a cell into the cell nucleus can be particularly promoted by administering the nucleic acid construct bound to a cell membrane receptor binding factor and/or a membrane fusing substance, or administering the nucleic acid construct encapsulated in a non-viral vector (for example, Sendai virus envelope) having cell membrane permeability and membrane fusing properties.
US07745586B2	Human E3α ubiquitin ligase family The present invention relates to a novel polypeptide encoding a protein which is the full length human ortholog of E3α ubiquitin ligase. The invention also relates to vector, host cells, antibodies and recombinant methods for producing the polypeptide. In addition, the invention discloses therapeutic, diagnostic and research utilities for these and related products.
US07745585B2	Antibodies to interleukin-like epithelial-mesenchymal transition inducer (ILEI) The functional characterization of ILEI to be a novel cytokine involved in epithelial/mesenchymal transition and the identification of biologically active ILEI provides the basis for generating ILEI inhibitors, in particular anti-ILEI antibodies, that are useful in the therapy of cancer, fibrosis and COPD.
US07745583B2	Anti-myostatin antibodies A neutralizing epitope is identified within amino acids 40-64 of the mature form of human myostatin. Antibodies that bind this epitope with high affinity preferentially bind GDF-8 over GDF-11 and may be chimeric, humanized or fully human antibodies, immunoconjugates of the antibodies or antigen-binding fragments thereof. The antibodies of the invention are useful for increasing muscle mass, increasing hone density, or for the treatment of various disorders in mammalian and avian species.
US07745582B2	Isolation of immunoglobulins The present invention relates to a novel method for the isolation or purification of immunoglobulins (a special class of proteins) from a solution containing immunoglobulins, e.g. hybridoma cell culture supernatants, animal plasma or sera, or colostrum. The method includes the use of a minimum of salts, such as lyotropic salts, in the binding process and preferably also the use of small amounts of organic solvents in the elution process. The solid phase matrices, preferably epichlorohydrin activated agarose matrices, are functionalised with mono- or bicyclic aromatic or heteroaromatic ligands (molecular weight: at the most 500 Dalton) which, preferably, comprises an acidic substituent, e.g. a carboxylic acid. The matrices utilised show excellent properties in a “Standard Immunoglobulin Binding Test” and in a “Monoclonal Antibody Array Binding Test” with respect to binding efficiency and purity, and are stable in 1M NaOH.
US07745581B2	T-bet compositions and methods of use thereof Isolated nucleic acid molecules encoding T-bet, and isolated T-bet proteins, are provided. The invention further provides antisense nucleic acid molecules, recombinant expression vectors containing a nucleic acid molecule of the invention, host cells into which the expression vectors have been introduced and non-human transgenic animals carrying a T-bet transgene. The invention further provides T-bet fusion proteins and anti-T-bet antibodies. Methods of using the T-bet compositions of the invention are also disclosed, including methods for detecting T-bet activity in a biological sample, methods of modulating T-bet activity in a cell, and methods for identifying agents that modulate the activity of T-bet.
US07745580B2	Compounds useful in the diagnosis and treatment of pregnancy-associated malaria The present invention relates to nucleic acid molecules related to the var2csa gene family as well as amino acid sequences encoded by such nucleic acid molecules with respect to their role in mediating adhesion of infected red blood cells to chondroitin sulphate A (CSA) in the placenta which is characteristic for the pathogenesis of pregnancy associated malaria (PAM). Accordingly, The invention provides the use compounds that are related to VAR2CSA polypeptides var2csa nucleic acid molecules as medicaments, as well as it provides pharmaceutical compositions, in particular immunological compositions and vaccines, hereunder nucleotide-based vaccines comprising these compounds. In addition, the invention provides the use of the compounds mentioned for the manufacture of compositions, such as immunogenic compositions. Other aspects of the invention relates to methods of treatment and prevention of pregnancy associated malaria wherein these methods are based on the nucleic acid molecules and polypeptides the invention. As these compounds can also be used as biotechnological tools the invention provides in vitro diagnostic methods and kits comprising reagents and IgGs/antibodies designated to the use in such methods. The invention also relates to methods of identifying agents capable of modulating the VAR2CSA dependent adhesion to CSA and agent capable of interacting with VAR2CSA. Finally, a method for identifying polypeptides, which will induce a specific IgG/antibody response upon administration to a subject is provided by the invention.
US07745578B2	Fugetactic proteins, compositions and methods of use This invention relates to compositions and methods that modulate the movement of cells with migratory capacity. More specifically, the invention relates to compositions and methods for promoting migratory movement, fugetaxis, of cells from a specific site in a subject. The foregoing are useful, inter alia, in the treatment of conditions characterized by a need to promote migratory cell movement away from specific sites in a subject. Specific sites include sites of inflammation, infection, an autoimmune reaction, a tumor and a transplanted organ or tissue.
US07745569B2	Amyloid specific binding peptides and detecting abeta peptide Phage peptide display technology was used to identify peptides that bind specifically to the amyloid form of the Aβ1-40 peptide. Peptides with similar structural features and bind to the amyloid form of Aβ1-40 but not to monomeric Aβ1-40, are provided. Such peptides are useful as carrier molecules to deliver therapeutic and diagnostic reagents to amyloid plaques.
US07745567B2	Process for stripping polymer dispersions A process for continuously stripping a polymer dispersion comprising a heat exchanger with minimal internal obstructions for the stripper. The process is particularly adapted to dispersions that are heat and shear sensitive. The process is able to extract hydrophobic VOC's more efficiently than a single, jacketed tube design.
US07745566B2	Methods for the purification of polymers The present invention provides methods for purifying polymers. In each embodiment of the invention disclosed herein, a supercritical fluid is contacted with an organic solution that includes a polymer to be purified dissolved in an organic solvent. The supercritical fluid extracts the organic solvent from the organic solution. Impurities such as residual monomers and process solvents are removed with the organic solvent and supercritical fluid, thereby purifying the polymer. The methods of the invention are particularly suitable for use in the purification of biodegradable polymers for use in pharmaceutical applications.
US07745565B2	Azetidine derivatives, method for producing said derivatives and use thereof A description is given of azetidine derivatives and methods for producing them, and of their use as a latent curing component for resins having functional groups which are reactive toward amino groups. The particular advantages of the curing component proposed in accordance with the invention, such as effective producibility, high environmental friendliness, and excellent storage stability of the resin/curing agent mixtures, make these azetidine derivatives outstandingly suitable for one-component, moisture-hardening polymer compositions, which are of special interest in particular for the production of (floor) coatings, sealants, and adhesives.
US07745560B2	Lubricant for sports equipment The invention relates to modified silicone polymers for improving the gliding properties of sports equipment, to compositions containing the same, and to their use for this purpose. The silicone polymers are, above all, alkyl-modified silicone polymers which comprise at least one hydrocarbon group having 16 to 18 carbon atoms, and/or organofunctionalized silicone polymers which comprise at least one functionalized hydrocarbon group having 1 to 10 carbon atoms.
US07745557B2	Polymers having broad molecular weight distributions and methods of making the same Methods of polymerizing at least one olefin include contacting the olefin with a catalyst comprising chromium and with a cocatalyst comprising a non-transition metal cyclopentadienyl (Cp) compound. The polymerization may be performed in the presence of hydrogen. Using the cocatalyst in conjunction with the catalyst increases several properties, such as the high load melt index (HLMI), the MW, and the MN, of the polymers produced by this polymerization method. Polymer compositions produced by such methods have various unique properties, including a PDI greater than about 30. Additional embodiments include articles of manufacture or end use articles formed from such polymer compositions.
US07745556B2	Polymerisation of vinyl chloride monomer A copolymer of (i) an alkyl acrylate or alkyl methacrylate and (ii) a hydroxyalkyl acrylate or hydroxyalkyl methacrylate is used as a secondary protective colloid in the suspension polymerization of vinyl chloride monomer. The alkyl group of the alkyl acrylate or alkyl methacrylate is preferably a 2-ethylhexyl group. The hydroxyalkyl group of the hydroxyalkyl acrylate or hydroxyalkyl methacrylate is preferably a hydroxyethyl group.
US07745553B2	Aqueous dispersions of polymer particles The invention provides a method for preparing an aqueous dispersion of polymer particles comprising the following steps: (i) preparing a dispersion having a continuous aqueous phase, a dispersed organic phase comprising one or more ethylenically unsaturated monomers, and an amphiphilic RAFT agent as a stabilizer for said organic phase, and (ii) polymerizing said one or more ethylenically unsaturated monomers under the control of said amphiphilic RAFT agent to form said aqueous dispersion of polymer particles, novel amphiphilic RAFT agents for use in this method, novel RAFT agents useful in making these amphiphilic RAFT agents and methods for their manufacture.
US07745548B2	Polyoxymethylene homopolymers and copolymers, and production and use thereof Homo- or copolyoxymethylenes are described and contain the repeat structural unit of formula I -A-O—R1—O—CO—(R2—CO—)m—O— (I), where A is a radical derived from a homo- or copolyoxymethylene, R1 is an alkylene radical having at least two carbon atoms, or a cycloalkylene radical, R2 is a direct carbon-carbon bond, or an alkylene, cycloalkylene, arylene, or aralkylene radical, and m is 0 or 1. These polymers may be prepared by reacting end-group-functionalized homo- or copolyoxymethylenes with selected chain-linking agents.The reaction products can be used to produce moldings.
US07745544B2	Catalytic epoxidation and hydroxylation of olefin/diene copolymers Disclosed are processes for preparing an epoxidized and/or hydroxylated α-olefin/diene copolymer materials such as ethylene/dicyclopentadiene. These processes comprise contacting in a reaction medium a) a copolymeric precursor component with b) a hydrogen peroxide oxidizing agent, in the presence of alkyl-trioxorhenium-based catalyst, under certain reaction conditions. The copolymeric precursor component comprises copolymers of α-olefins and dienes with these copolymers containing at least one double bond in each diene-derived comonomer. The reaction medium is maintained under reaction conditions which promote formation of oxirane rings at, and/or diol formation across, the sites of the diene-derived co-monomer double bonds in the copolymeric precursor material.Epoxidation and hydroxylation generally increases the glass transition temperature, Tg, of these copolymers and imbues polarity which imparts oil resistance. Functionalization in this manner thus provides a different balance between properties, cost, and processing range, and can make the resulting functionalized polyolefin materials especially useful as oil resistant, thermally stable elastomers or as structural engineering thermoplastics or precursors thereof.
US07745537B2	Particulate water absorbing agent, water-absorbent core and absorbing article The present invention provides a particulate water absorbing agent for absorbent cores which is excellent in powder conveying property, and achieves sufficient absorption performances for use in absorbent cores in particulate water absorbing agents including a water absorbing resin as a principal component, and which further is suitable for practical applications. In the present invention, characteristics that had not been known conventionally at all, i.e., “permeability potential under pressure (PPUP)” and “frictional charge being a positive charge” of the particulate water absorbing agent are regulated at a time, and furthermore, regulation of the “moisture content of 2 to 10% by weight” is perfected. Also, the particulate water absorbing agent including (A) a water-swelling crosslinked polymer having a constitutional unit derived from an unsaturated monomer containing an acid group and/or a salt thereof; and (B) water fulfills certain requirements.
US07745535B2	Amphiphilic block copolymers The invention relates to an amphiphilic multiblock copolymer capable of forming non-covalent crosslinks. The non-water soluble copolymer, having a hydrophilic middle block and hydrophobic end blocks, has a high water transmission or permeation. The copolymer can be used in applications requiring absorption and/or transmission of fluids, the preferred fluids being water or hydrophilic liquids such as glycerin, glycols, and alcohols. One specific use of the amphiphilic multiblock copolymer is as a hydrogel material.
US07745533B2	Manufacture of stable low particle size organopolysiloxane emulsion Stable high viscosity organopolysiloxane emulsions with particle sizes up to 150 nanometer may be made in a simple and cost-effective manner employing a standard homogenizer, and optional subsequent polymerization of the organopolysiloxan at controlled temperature. A combination of non-ionic emulsifier together with an at least one anionic emulsifier is employed, having an HLB value 12-15, while maintaining a temperature up to 50° C.
US07745530B2	Aqueous emulsion resin compositions The present invention provides an aqueous emulsion resin composition which comprises: (a) a resin composition containing at least one fluoroolefin polymer having crosslinkable group(s) at a terminus and/or a side chain of its molecule and at least one non-fluoroolefin polymer having crosslinkable group(s) at a terminus and/or a side chain of its molecule; and (b) at least one curing agent selected from the group consisting of isocyanates, melamines, hydrazides, carbodiimides, silanes and epoxides; and provides an aqueous emulsion resin compositions containing at least one chemically bonded product of a fluoroolefin polymer and a non-fluoroolefin polymer bonded to each other via at least one covalent bond at a terminus and/or a side chain of the molecules wherein one or both of the fluoroolefin polymer and the non-fluoroolefin polymer have crosslinkable group(s).
US07745528B2	Functional graphene-rubber nanocomposites A polymer composition, containing a polymer matrix which contains an elastomer; and a functional graphene which displays no signature of graphite and/or graphite oxide, as determined by X-ray diffraction, exhibits excellent strength, toughness, modulus, thermal stability and electrical conductivity.
US07745527B2	Polyethylene-syndiotactic polypropylene composition and processing thereof A processable polypropylene composition comprising a mixture of a major amount of a syndiotactic polypropylene and a minor amount of polyethylene wax. The syndiotactic polypropylene has a designated recrystallization temperature, an original minor melting peak and a higher original melting peak. The polyethylene wax provides a recrystallization temperature of the mixture that is greater than the recrystallization temperature of the syndiotactic polypropylene alone and also provides for a minor melting peak and a major melting peak of the mixture, which has a temperature difference which is lower than the difference between the original minor melting peak and the original major melting peak of the syndiotactic polypropylene alone. A process for the production of polypropylene product employing a polyethylene-syndiotactic polypropylene composition as described which is heated to provide a plastic mass of the syndiotactic polypropylene and polyethylene which is processed to provide the product.
US07745522B2	Acoustic waveguide plate with nonsolid cores An acoustic (sound or ultrasound) wave transmitter having a plurality of waveguides is described, and a method of making such a transmitter is described. Each waveguide may have a cladded core. The core may be a liquid such as water, alcohol or mineral oil. Alternatively, the core may be a colloidal gel, such as gelatin dissolved in at least one of water, vinyl plastisol or silicone gel. The cladded core is capable of transmitting acoustic wave energy from a first end surface to a second end surface of the cladded core. The waveguides may be substantially fixed relative to each other by a binder. The binder may be formed by fusing the claddings together, potting a material between the waveguides and/or mechanically holding the waveguides.
US07745519B2	Non-halogen flame-retardant resin composition Provided by the invention is a non-halogen flame-retardant thermoplastic resin composition not requiring crosslinking with a peroxide, having excellent in moldability, and moreover, having high flame-retardancy to pass the test for V-0 grade of the UL-94. standards The non-halogen flame-retardant thermoplastic resin composition comprises, as a uniform blend: (A) 100 parts by mass of a thermoplastic resin other than polycarbonate and polyphenylene ether resins, (B) 10 to 300 parts by mass of an inorganic powder, (C) 1 to 50 parts by mass of an organopolysiloxane having a specified structure, and (D) 0.01 to 10 parts by mass of an organic compound having a specified structure.
US07745516B2	Composition of polyimide and sterically-hindered hydrophobic epoxy Water absorption resistant polyimide/epoxy-based compositions, like pastes (or solutions), are particularly useful to make electronic screen-printable materials and electronic components. A group of hydrophobic epoxies (and soluble polyimides) was discovered to be particularly resistant to moisture absorption. The polyimide/epoxy pastes made with these epoxies (and these polyimides) may optionally contain thermal crosslinking agents, adhesion promoting agents, blocked isocyanates, and other inorganic fillers. The polyimide/epoxy pastes of the present invention can have a glass transition temperature greater than 250° C., a water absorption factor of less than 2%, and a positive solubility measurement.
US07745514B2	Tinted, abrasion resistant coating compositions and coated articles Disclosed are tinted, abrasion resistant coating compositions comprising polymer-enclosed color-imparting particles. Also disclosed are methods for making such a composition and substrates at least partially coated with a hard coat deposited from such a composition.
US07745510B2	Ink composition for ink jet recording, and recording method and recorded matter using the same The invention provides an ink composition for ink jet recording comprising at least a resin emulsion and a surface-treated pigment, wherein the amount of monomers and oligomers with a molecular weight of 2,000 or less contained in the resin emulsion is 1,000 ppm or less based on the total amount of the ink composition. Also disclosed are an ink jet recording method using the ink composition and recorded matter obtained by the recording method.
US07745509B2	Polymer compositions with bioactive agent, medical articles, and methods A polymer composition that includes a hydrophilic polymer, an optional secondary organic polymer, and a bioactive agent distributed therein, wherein the bioactive agent is selected from the group consisting of a silver compound, a copper compound, a zinc compound, and combinations thereof.
US07745507B2	Absorbent member comprising a modified water absorbent resin This invention is to provide an absorbent member and a method for making such an absorbent member. The absorbent member comprises modified water absorbent having good production efficiency, good absorbency against pressure, good absorption speed, gel strength, good liquid permeability, and the like. The modified water absorbent resin is made by a method, which comprises (i) a mixing step comprising mixing a water absorbent resin, water, and a water-soluble radical polymerization initiator without addition of an ethylenically unsaturated monomer, to obtain a water absorbent resin composition, and (ii) an irradiating step comprising irradiating said water absorbent resin composition obtained in the mixing step with active energy rays, wherein the surface water content of said water absorbent resin in said water absorbent resin composition at least at any point of time in the irradiating step (ii) is controlled to a level of not lower than 3.0% by weight based on 100% by weight of the water absorbent resin. Preferably, the amount of water mixed in said step (i) exceeds 20 parts by weight and is not more than 100 parts by weight based on 100 parts by weight of the water absorbent resin.
US07745505B2	Photoinitiators and UV-crosslinkable acrylic polymers for pressure sensitive adhesives UV-crosslinkable acrylic hotmelt pressure sensitive adhesives comprising acrylic and vinyl monomers, and a polymerizable UV photoinitiator. The photoinitiator comprises a spacer comprising both ethylene oxide and urethane, or urea, carbonate, or siloxane functional groups. The ethylene oxide is directly bonded to the chromophore (e.g., benzophenone) moiety, while the urethane (or urea, carbonate, siloxane) is closely linked to the polymerizable moiety (e.g., styrenic C═C double bond).
US07745500B2	Method for reducing the viscosity of viscous fluids A viscous fluid, such as heavy crude oil which is too viscous to enable it to be pumped from a flowing phase of a reservoir into and along a pipeline for delivery to a refinery or other storage facility, may be contacted with a formulation to reduce its viscosity. The formulation comprises a polymeric material AA which includes —O— moieties pendent form a polymeric backbone thereof and said material is optionally cross-linked. In one embodiment, the formulation may comprise polyvinyl alcohol. In an alternative embodiment, the formulation may comprise a cross-linked polymeric material, such as cross-linked polyvinyl alcohol. After the viscous composition has been transported to a desired location, it may be separated from the other components.
US07745498B2	Nanowire dispersion compositions and uses thereof Nanowire dispersion compositions (and uses thereof) are disclosed comprising a plurality of inorganic nanowires suspended in an aqueous or non-aqueous solution comprising at least one low molecular weight and/or low HLB (Hydrophile-Lipophile Balance) value dispersant. Methods of further improving the dispersability of a plurality of inorganic nanowires in an aqueous or non-aqueous solution comprise, for example, oxidizing the surface of the nanowires prior to dispersing the nanowires in the aqueous or non-aqueous solution.
US07745494B2	Vitamin K for prevention and treatment of skin rash secondary to anti-EGFR therapy The invention provides methods and compositions for treating and preventing a skin rash secondary to anti-epidermal growth factor receptor (EGFR) therapy, where the method comprises applying a vitamin K analog or a phosphatase inhibitor to the skin.
US07745492B2	Carboxamido opioid compounds This invention is directed to carboxamido opioid compounds pharmaceutically useful as agents for treating or modulating a central nervous system disorder and methods for treating or modulating a central nervous system disorder.
US07745490B2	Substituted N-aryl benzamides and related compounds for treatment of amyloid diseases and synucleinopathies Substituted n-aryl benzamides, related compounds and their pharmaceutically acceptable derivatives, their synthesis, pharmaceutical compositions containing them, and their use in the treatment of amyloid diseases, including Aβ amyloidosis, such as observed in Alzheimer's disease, IAPP amyloidosis, such as observed in type 2 diabetes, and synucleinopathies, such as observed in Parkinson's disease, and the manufacture of medicaments for such treatment are provided.
US07745484B2	Beta-secretase modulators and methods of use The present invention comprises a new class of compounds useful for the modulation of Beta-secretase enzyme activity and for the treatment of Beta-secretase mediated diseases, including Alzheimer's disease (AD) and related conditions. In one embodiment, the compounds have a general Formula I wherein A, B, W, R3, R4, R5, i and j are defined herein. The invention also comprises pharmaceutical compositions including one or more compounds of Formula I, methods of use for these compounds, including treatment of AD and related diseases, by administering the compound(s) of Formula I, or compositions including them, to a subject. The invention also comprises further embodiments of Formulas II and III, intermediates and processes useful for the preparation of compounds of the invention.
US07745483B2	2-Halofuryl-thienyl-3-carboxamides Novel 2-halofuryl/thienyl-3-carboxamides of the formula (I) in which A, Hal, R, M and Z are as defined in the description, a plurality of processes for preparing these compounds and their use for controlling unwanted microorganisms, and also novel intermediates and their preparation.
US07745471B2	Derivatives of 1,2-benzisoxazole-3-methane sulfonic acid as novel intermediates for the synthesis of zonisamide Derivatives of 1,2-benzisoxazole-3-methanesulfonic acid, which are non-hygroscopic and non-hydrated and their use as intermediates from the preparation of zonisamide are disclosed. Further disclosed are processes of preparing zonisamide from these 1,2-benzisoxazole-3-methanesulfonic acid derivatives, processes of preparing exemplary 1,2-benzisoxazole-3-methanesulfonic acid derivatives and crystalline forms of exemplary 2-benzisoxazole-3-methanesulfonic acid derivatives. A novel process of preparing zonisamide is also disclosed.
US07745455B2	Zalcitabine (ddC) boosted lamivudine (3TC) compositions for antiretroviral therapy Boosted cytidine analogue reverse transcriptase inhibitor antiretroviral compound is a new therapeutic anti HIV option, in combination with another drug such as a NRTI or a protease inhibitor. It's heightened and sustained antiretroviral potency is due to the increased intracellular level of 3TC triphosphate, the active form of 3TC. This effect is obtained by combining 3TC, in usual doses, with a reduced dose of ddC, in the same pharmaceutical formulation. The product could be administered twice or even once daily, which is convenient, and does not increase the pill burden for the patient. The reduced ddC dosage prevents the occurrence of ddC related side effects. Other cytidine derivatives (racemic or negative enantiomers) could have the same effects as ddC and could probably be combined with 3TC, and have the same effect. On the other hand, low dose ddC may also increase the intracellular levels of other cytidine derivatives as it does for 3TC. Boosted cytidine analogue reverse transcriptase inhibitor antiretroviral compound could also be formulated in combination with another drug such as another NRTI (e.g. abacavir) or any protease inhibitor in the same capsule or tablet. This approach offers a dual anti-HIV therapy that is as efficacious as the routine triple therapy. In this way the HIV treatment cost could be significantly reduced which is imperative for resource-poor settings. This new formulation is convenient and well tolerated with no additional toxicity than that of the combining drug (NRTI or protease inhibitor) and 3TC. Moreover, this will enable a larger number of patients to benefit from the already known 3TC effects. It will also increase the 3TC effects in those organs or HIV sanctuaries with usually reduced 3TC concentrations or activity. It could be indicated in both the initial as well as in salvage HIV therapy. It could also be used for therapy optimization or simplification. Moreover, in combination with another NRTI such as abacavir, or even alone, it could be beneficial for reducing the HIV harm in resource-poor settings.
US07745451B2	Tetrahydronaphthyridine and tetrahydropyrido[4,3-d]pyrimidine compounds and compositions thereof useful in the treatment of conditions associated with neurological and inflammatory disorders and dysfunctions Fused heterocyclic compounds are disclosed that have formula 1: where A, B, L, N, R1, R3, R4′, Y and Z are as defined herein. The compounds and pharmaceutical compositions thereof are useful for the prevention and treatment of a variety of conditions in mammals including humans, including by way of non-limiting example, pain, inflammation, cognitive disorders, anxiety, depression, and others.
US07745449B2	Thieno-[2,3-d]pyrimidine and thieno-pyridazine compounds and methods of use The present invention comprises a new class of compounds useful for the prophylaxis and treatment of protein kinase mediated diseases, including inflammation and related conditions. The compounds have a general Formula I wherein A1, A2, B, R2 and R3 are defined herein. The invention also comprises pharmaceutical compositions including one or more compounds of Formula I, uses of such compounds and compositions for treatment of kinase mediated diseases including rheumatoid arthritis, psoriasis and other inflammation disorders, as well as intermediates and processes useful for the preparation of compounds of Formula I.
US07745443B2	Inhibitors of the GPIb-vWF interaction, their preparation and use The present invention relates to compounds of the formula I, in which R1, R2, A, B, D, E, n, m or o have the meanings indicated below. The compounds of the formula I are valuable pharmacologically active compounds. They are reversible inhibitors of the interaction between the plasma protein von Willebrand factor (vWF) and the blood platelet receptor glycoprotein Ib-IX-V complex (GPIb). They exhibit an antithrombotic effect and are suitable, for example, for the therapy and prophylaxis of atherothrombotic diseases.
US07745435B2	Triheterocyclic compounds and compositions thereof The present invention relates to novel Triheterocyclic Compounds, compositions comprising a Triheterocyclic Compound, and methods useful for treating or preventing cancer or a neoplastic disorder comprising administering a Triheterocyclic Compound. The compounds, compositions, and methods of the invention are also useful for inhibiting the growth of a cancer cell or neoplastic cell, treating or preventing a viral infection, or inhibiting the replication and/or infectivity of a virus.
US07745433B2	2-Substituted phenyl-5, 7-dihydrocarbyl-3, 7-dihydropyrrolo [2, 3-D] pyrimidin-4-one derivatives, the preparation and the pharmaceutical use thereof The invention relates to the compounds of formula I, their preparation and the pharmaceutical compositions containing the compounds. The invention also relates to the use of the compounds of formula I in preparing medicines, which can treat sexual dysfunction of animals including human (male and female), especially erectile dysfunction of male and the diseases in which the function of phospholipase 5 (cGMP PDE5) is involved.
US07745430B2	Transnasal anticonvulsive pharmaceutical composition Disclosed herein is a transnasal anticonvulsive pharmaceutical composition comprising diazepam as an active ingredient, water, a fatty acid ester, diethylene glycol monoethyl ether, ethanol and sodium glycocholate, wherein the weight of the fatty acid ester is at least 2-fold higher than that of water and is at least 2-fold higher than that of ethanol.The anticonvulsive pharmaceutical composition for transmucosal delivery of diazepam according to the present invention includes a minimized content of water and ethanol, a fatty acid ester as a main ingredient and no use of a polar solvent, e.g. glycol, and, exhibits improved diazepam solubility and transmucosal permeability due to using a small amount of water and ethanol. The present invention also includes treatment of convulsions by transnasally administering to a patient in need thereof a therapeutically effective amount of the disclosed compositions.
US07745428B2	Imidazo[1,2-A]pyridine having anti-cell-proliferation activity Compounds of formula (I): which possess cell-cycle inhibitory activity are described.
US07745426B2	Compositions and methods for reducing the risk of epileptic occurrence and/or for treatment of seizure disorders The present invention relates to compounds and compositions useful for reducing the risk of epileptic occurrences and/or for alleviating epileptic phenomena in patients. In accordance with the invention, the compounds and compositions have at least the following two components: a) vitamin B6-based component selected from pyridoxal, pyridoxamine, pyridoxine, their pharmaceutically acceptable functional derivatives and salts; and b) at least one antiepileptic drug (AED) or anticonvulsive, neuro-protective drug or nootrope compound or moiety. The invention further relates to methods for preventing epileptic episodes and for alleviating epileptic episodes, as well as methods for reducing side effects of antiepileptic drugs.
US07745425B2	Non-irritating compositions containing zinc salts The present invention relates to methods and compositions which employ low concentrations of combinations of zinc salts to prevent the irritation of skin or mucous membranes that may be caused by therapeutic agents, by personal hygiene products, by articles such as gloves or condoms, or by various physical, chemical, mechanical, or biological irritants.
US07745420B2	Methods for increasing in vivo efficacy of oligonucleotides and inhibiting inflammation in mammals The invention relates to the use of nucleotide substitutes for increasing the in vivo efficacy of nucleic acid molecules and also for inhibiting inflammation in mammals. More particularly, the present invention relates to the use of 2′6′diaminopurine (DAP) and analogs thereof per se in anti-inflammatory compositions, and also for preparing nucleic acid molecules having an increased in vivo physiological efficiency and a reduced toxicity as compared to conventional oligos. The invention is particularly useful for the preparation of antisense oligonucleotides for treating pulmonary/respiratory diseases such as cystic fibrosis, asthma, chronic bronchitis, chronic obstructive lung disease, eosinophilic bronchitis, allergies, allergic rhinitis, pulmonary fibrosis, adult respiratory distress syndrome, sinusitis, respiratory syncytial virus or other viral respiratory tract infection and cancer.
US07745419B2	Pharmaceutical composition for treating cancer The present invention provides a small interfering RNA (siRNA) that is capable of inhibiting intracellular expression of Wnt1 through complementary binding to a Wnt1 transcript (mRNA transcript) base sequence and a pharmaceutical composition for treating cancer comprising the same. siRNA of the present invention which is complementary to a base sequence of a Wnt1 transcript (mRNA) provides apoptotic cancer cell death due to inhibition of expression of Wnt1 commonly expressed in cancer cells, by RNA-mediated interference (RNAi). Therefore, the composition of the present invention comprising the same can be used as an excellent anticancer drug.
US07745418B2	Compositions and methods for inhibiting viral replication The present invention relates to a double-stranded ribonucleic acid (dsRNA) having a nucleotide sequence which is less that 30 nucleotides in length and which is substantially identical to at least a part of a 3′-untranslated region (3′-UTR) of a (+) strand RNA virus, such as HCV, as well as pharmaceutical compositions comprising the dsRNA, together with a pharmaceutically acceptable carrier. The pharmaceutical compositions are useful for treating infections and diseases caused by the replication or activity of the (+) strand RNA virus, as well as methods for inhibiting viral replication.
US07745414B2	Glucopyranosyl-substituted benzonitrile derivatives, pharmaceutical compositions containing such compounds, their use and process for their manufacture Glucopyranosyl-substituted benzonitrile derivatives as defined herein, including the tautomers, the stereoisomers thereof, the mixtures thereof and the salts thereof. The compounds according to the invention are suitable for the treatment of metabolic disorders.
US07745406B2	Fibroblast growth factor (FGF23) polypeptides The present invention relates to a kit for diagnosing a disorder comprising a reagent that detects FGF23 polypeptides and mutant FGF23 polypeptides.
US07745403B2	Methods of treating chemotherapy-induced diarrhea/mucositis using glucagon-like-peptide-2(GLP-2)analogues GLP-2 analogues are disclosed which comprise one of more substitutions as compared to [hGly2]GLP-2 and which improved biological activity in vivo and/or improved chemical stability, e.g., as assessed in in vitro stability assays. More particularly, preferred GLP-2 analogues disclosed herein comprise substitutions at one or more of positions 8, 16, 24 and/or 28 of the wild-type GLP-2 sequence, optionally in combination with further substitutions at position 2 (as mentioned in the introduction) and one or more of positions 3, 5, 7, 10 and 11, and/or a deletion of one or more of amino acids 31 to 33 and/or the addition of a N-terminal or C-terminal stabilizing peptide sequence. The analogues are particularly useful for the prophylaxis or treatment of stomach and bowel-related disorders and for ameliorating side effects of chemotherapy. Also disclosed are methods and kits for selecting a patient from populations suited for treatment with GLP-2 analogues.
US07745402B2	Method of treating pancreatitis The present invention provides a method of treating pancreatitis comprising administering to a human in need thereof an effective amount of hemin. The administration of hemin is preferably parenteral. In another aspect, the present invention provides a method of pancreatitis prophylaxis comprising administering to a human in need thereof an effective amount of hemin. In a still further aspect, the present invention contemplates a method of inducing an HO gene comprising administering to a human in need thereof an HO-inducing effective amount of hemin. Preferably, the HO gene is the HO-1 gene. In a still further aspect, the present invention contemplates a method of inducing an HO gene in leukocytes for recruitment to the pancreas to treat pancreatitis comprising administering to a human in need thereof an HO-inducing effective amount of hemin. In another embodiment, the present invention contemplates a method of inducing an HO gene in leukocytes for recruitment to the pancreas for prophylaxis of pancreatitis comprising administering to a human in need thereof an HO-inducing effective amount of hemin. In a yet further aspect, the present invention provides a method of ex vivo treatment of pancreatitis comprising providing peripheral blood leukocytes, followed by contact with hemin to form induced peripheral blood leukocytes then infusing the induced peripheral blood leukocytes into a human in need thereof.
US07745397B2	Peptide useful in immunomodulation The present invention provides peptides and polynucleotides, and their use for immunomodulation, immunotherapy and vaccine particularly for anti-cancer therapy, and for diagnosis purposes. The immunomodulatory effect includes induction of proliferation and activation of peripheral blood lymphocytes and induction of an anti-tumor effect upon administration of peptides of the invention to subjects suffering from cancer.
US07745395B2	Proaerolysin containing protease activation sequences and methods of use for treatment of prostate cancer Disclosed herein are modified proaerolysin (PA) peptide. In some examples, the proteins include a prostate-specific protease cleavage site and can further include a prostate-tissue-specific binding domain which functionally replaces the native PA binding domain. In other examples, the proteins include a furin cleavage site and a prostate tissue-specific binding domain which functionally replaces the native PA binding domain. Methods of using such peptides to treat prostate cancer are also disclosed.
US07745391B2	Human thrombospondin polypeptide A human thrombospondin 1 protein, polynucleotide encoding the protein, and pharmaceutical composition thereof.
US07745387B2	Use of erythropoietin The present invention relates to the use of erythropoietin for stimulating the physiological mobilization, proliferation and differentiation of endothelial progenitor cells, for stimulating vasculogenesis, for the therapy of diseases associated with a dysfunction of endothelial progenitor cells and for producing pharmaceutical compositions for the treatment of such diseases, and pharmaceutical compositions which comprise erythropoietin and other suitable active ingredients for stimulating endothelial progenitor cells.
US07745385B2	Water-soluble pouch comprising a detergent composition The present invention relates to a water-soluble pouch comprising a laundry detergent composition comprising reactive dye.
US07745382B2	Synthetic lubricant additive with micro lubrication technology to be used with a broad range of synthetic or miner host lubricants from automotive, trucking, marine, heavy industry to turbines including, gas, jet and steam It is known by the inventor that a universal synthetic lubricant additive that can greatly enhance the performance standards of existing lubricants, petroleum based or synthetic, imparts a new and desirable property not originally present in the existing oil or it reinforces a desirable property already possessed in some degree can greatly benefit the consumer. Although additives of many diverse types have been developed to meet special lubrication needs, their principal functions are relatively few in number. This universal synthetic lubricant additive (invention) with micro lubrication technology, when used as directed will reduce the oxidative or thermal degradation of the host oil, substantially reduce the deposition of harmful deposits in lubricated parts, minimize rust and corrosion, control frictional properties, reduce wear, temperature, sludge, varnishes and prevent destructive metal-to-metal contact, reduce fuel consumption and harmful emissions while improving performance through increased horsepower and torque. Further this technology lends itself to further development of a host of energy/emission reduction products from conditioners for kerosene, diesel, bunker-C heavy oils to gasoline, cutting oils, penetrating lubricants, electrical dielectric coatings, oxidation inhibitors and electrical terminal coatings.
US07745380B2	Additive for increasing the density of a fluid for casing annulus pressure control A method of treating a wellbore that includes circulating a wellbore fluid in the wellbore, wherein the wellbore fluid comprises an oleaginous base fluid and a wellbore additive colloidal solid material, and wherein the wellbore additive colloidal solid material is formed by grinding a solid particulate material and a polymeric dispersing agent for a sufficient time so that the polymeric dispersing agent is absorbed to the surface of the resulting colloidal solid particles and less than 10% of the resulting colloidal solid particles have a diameter greater than 10 microns, but not more than five percent of the particles are less than 0.2 micron in diameter, wherein the grinding is carried out in the presence of an oleaginous base fluid and wherein the grinding is carried out so that the wellbore additive colloidal solid material has a weight average particle diameter d50 less than 2.0 microns.
US07745378B1	Drilling fluid additive containing corn syrup solids A drilling fluid additive is provided and the additive consist of: hydrolyzed glucose syrup solids in the amount from about 30 to about 90% by weight of total volume of the additive and a liquid medium in the amount from about 10 to about 70% by weight of total volume of the additive.
US07745372B2	Catalyst for selective hydrogenation of olefins and its preparation as well as use A catalyst for the selective hydrogenation of olefins especially dienes, its preparation and use, said catalyst comprising an alumina support and cobalt and/or nickel selected from Group VIII, molybdenum and/or tungsten from Group VIB and alkali metal components supported on said support, characterized in that the catalyst contains 0.5-8% by weight of cobalt and/or nickel selected from Group VIII, 2-15% by weight of molybdenum and/or tungsten from Group VIB, over 2-8% by weight of alkali metals, and a balanced amount of alumina support calculated for oxides and based on the catalyst. Compared to the prior catalysts, the activity and selectivity for olefins especially dienes of the catalyst are higher when used in the hydrogenation of a gasoline distillate.
US07745370B2	Selective hydrogenation catalyst designed for raw gas feed streams A catalyst for selective hydrogenation of acetylenes and diolefins, particularly in a raw gas feed stream for front end selective hydrogenation. The catalyst contains a low surface area carrier with a surface area from about 2-20 m2/g, wherein the pore volume of the pores of the carrier is greater than about 0.4 cc/g, at least 90 percent of the pore volume of the pores is contained within pores having a pore diameter greater than about 500 Å and about 1 to about 2 percent of the total pore volume is contained in pores with a pore diameter from about 500 to about 1,000 Å. The palladium comprises about 0.01 to about 0.1 weight % and a Group IB metal comprises about 0.005 to about 0.06 weight % of the catalyst.
US07745367B2	Engine exhaust catalysts containing palladium-gold An emission control catalyst that exhibits improved CO and HC reduction performance includes a supported platinum-based catalyst, and a supported palladium-gold catalyst. The two catalysts are coated onto different layers, zones, or monoliths of the substrate for the emission control catalyst such that the platinum-based catalyst encounters the exhaust stream before the palladium-gold catalyst. Zeolite may be added to the emission control catalyst as a hydrocarbon absorbing component to boost the oxidation activity of the palladium-gold catalyst.
US07745365B2	Bathtub-type spent catalyst distributor for effective counter-current regeneration in fluid catalytic cracking units An improved spent catalyst regenerator which contains sub-troughs branching off from the main trough, distribution troughs which extend outward from the sides of the main trough and the sub-troughs, and downflow tubes extending downward from the bottom of the main trough and sub-troughs.
US07745357B2	Use of pre-coated mat for preparing gypsum board A gypsum board which comprises a set gypsum core sandwiched between and faced with fibrous mats, wherein a free surface of one of said mats is pre-coated with a combination of a mineral pigment, optionally an inorganic adhesive binder and an organic binder, preferably a hydrophobic, UV resistant polymer latex adhesive binder applied to said surface as an aqueous coating composition, said aqueous coating composition upon drying and setting providing a pre-coated mat satisfying certain morphology requirements.
US07745356B2	Laminated absorbent product with increased strength in defined areas The present invention is generally directed to adhesive compositions comprising selected ratios of crystalline and amorphous polymers. In some versions of the invention, polymers capable of existing in different configurations (e.g., a polymer such as polypropylene which can exist in an atactic, syndiotactic. or isotactic configuration) are used to prepare adhesives of the present invention. As an example, a selected amount of isotactic polypropylene is blended with a selected amount of atactic polypropylene to prepare an adhesive composition having one or more performance properties (e.g., bond strength) that are superior to the performance properties of a conventional hot-melt adhesive. The adhesive compositions of the present invention are suitable for use in the preparation of laminated disposable absorbent products.
US07745354B2	Cleaning tool An indoor cleaning tool having a dry fibrous base material is provided. An antigenicity-reducing composition including an antigenicity-reducing component, an oil and a surfactant are applied to the fibrous base material. Preferably, the antigenicity-reducing component is an extract of an olea or a ligustrum plant extracted with water or an organic solvent.
US07745352B2	Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp II process Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.
US07745350B2	Impurity control in HDP-CVD DEP/ETCH/DEP processes Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched back. This includes flowing a halogen precursor through a first conduit from a halogen-precursor source to the substrate processing chamber, forming a high-density plasma from the halogen precursor, and terminating flowing the halogen precursor after the portion has been etched back. Thereafter, a halogen scavenger is flowed to the substrate processing chamber to react with residual halogen in the substrate processing chamber. Thereafter, a second portion of the silicon oxide film is deposited over the first portion of the silicon oxide film and within the gap using a high-density plasma process.
US07745342B2	Display substrate and method of manufacturing the same A display substrate having a low-resistance metallic layer and a method of manufacturing the display substrate. The gate conductors are extended in a first direction. The source conductors are extended in a second direction crossing the first direction including a lower layer of molybdenum or a molybdenum alloy, and an upper layer of aluminum or an aluminum alloy. The pixel areas are defined by the gate conductors and the source conductors. A switching element is formed in each of the pixel areas and includes a gate electrode extended from the gate conductor and a source electrode extended from the source conductor. The pixel electrode includes a transparent conductive material, and is electrically connected to a drain electrode of the switching element.
US07745341B2	Phase-change semiconductor device and methods of manufacturing the same In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.
US07745334B2	Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques By performing sophisticated anneal techniques, such as laser anneal, flash anneal and the like, for a metal silicide formation, such as nickel silicide, the risk of nickel silicide defects in sensitive device regions, such as SRAM pass gates, may be significantly reduced. Also, the activation of dopants may be performed in a highly localized manner, so that undue damage of gate insulation layers may be avoided when activating and re-crystallizing drain and source regions.
US07745331B2	Method for fabricating contact plug in semiconductor device An insulation layer including a landing plug is formed over a substrate. An amorphous carbon hard mask is formed over a certain portion of the insulation layer. The insulation layer is etched using the amorphous carbon hard mask to form a storage node contact hole exposing the landing plug. A conductive material is formed in the storage node contact hole to form a storage node contact plug. Other embodiments are also described.
US07745327B2	Method of forming a copper-based metallization layer including a conductive cap layer by an advanced integration regime By appropriately designing a plurality of deposition steps and intermediate sputter processes, the formation of a barrier material within a via opening may be accomplished on the basis of a highly efficient process strategy that readily integrates conductive cap layers formed above metal-containing regions into well-approved process sequences.
US07745325B2	Wiring structure of a semiconductor device, method of forming the wiring structure, non-volatile memory device including the wiring structure, and method of manufacturing the non-volatile memory device A wiring structure of a semiconductor device may include an insulation interlayer on a substrate, the insulation interlayer having a linear first trench having a first width and a linear second trench having a second width, the linear second trench being in communication with a lower portion of the linear first trench, the first width being wider than the second width, and a conductive layer pattern in the linear first and second trenches.
US07745323B2	Metal interconnection of a semiconductor device and method of fabricating the same Disclosed herein is a metal interconnection structure of a semiconductor device, comprising lower metal interconnection layers disposed on a semiconductor substrate, a buffer layer made of a metal oxide disposed thereon, an intermetallic dielectric layer made of a low-k material disposed on the buffer layer of the metal oxide, and an upper metal interconnection layer disposed on the intermetallic dielectric layer and electrically connected through the intermetallic dielectric layer and buffer layer to the lower metal interconnection layers.
US07745319B2	System and method for fabricating a fin field effect transistor There is provided a system and method for fabricating a fin field effect transistor. More specifically, in one embodiment, there is provided a method comprising depositing a layer of nitride on a substrate, applying a photolithographic mask on the layer of nitride to define a location of a wall, etching the layer of nitride to create the wall, removing the photolithographic mask, depositing a spacer layer adjacent to the wall, etching the spacer layer to create a spacer adjacent to the wall, wherein the spacer and the wall cover a first portion of the substrate, and etching a second portion of the substrate not covered by the spacer to create a trench.
US07745315B1	Highly aligned vertical GaN nanowires using submonolayer metal catalysts A method for forming vertically oriented, crystallographically aligned nanowires (nanocolumns) using monolayer or submonolayer quantities of metal atoms to form uniformly sized metal islands that serve as catalysts for MOCVD growth of Group III nitride nanowires.
US07745307B2	Method of manufacturing an inkjet head through the anodic bonding of silicon members In a method of manufacturing an inkjet head, a silicon dioxide (SiO2) layer is produced on the surface of first silicon member formed from single-crystal silicon. Next, a glass layer formed of borosilicate glass or the like is sputtered onto the surface of the silicon dioxide (SiO2) layer. A silicon oxide (SiOx, x<2) layer is then formed on the surface of a second silicon member. The first and second silicon members and are bonded together by applying heat at about 450° C. with heaters, as a DC voltage is applied across electrode terminals. As a result, a silicon dioxide (SiO2) layer is formed at the interface of the glass layer and silicon oxide (SiOx, x<2) layer, anodically bonding the two layers.
US07745296B2	Raised source and drain process with disposable spacers A method for forming raised source and drain regions in a semiconductor manufacturing process employs double disposable spacers. A deposited oxide is provided between the first and second disposable spacers, and serves to protect the gate electrode, first disposable spacers and a cap layer during the dry etching of the larger, second disposable spacers. Mouse ears are thereby prevented, while the use of a second disposable spacer avoids shadow-effects during halo ion-implants.
US07745294B2	Methods of manufacturing trench isolated drain extended MOS (demos) transistors and integrated circuits therefrom A method of fabricating an integrated circuit (IC) including at least one drain extended MOS (DEMOS) transistor and ICs therefrom includes providing a substrate having a semiconductor surface, the semiconductor surface including at least a first surface region that provides a first dopant type. A patterned masking layer is formed on the first surface region, wherein at least one aperture in the masking layer is defined. The first surface region is etched to form at least one trench region corresponding to a position of the aperture. A dopant of a first dopant type is implanted to raise a concentration of the first dopant type in a first dopant type drift region located below the trench region. After the implanting, the trench region is filled with a dielectric fill material. A body region is then formed having a second dopant type in a portion of the first surface region. A gate dielectric is then formed over a surface of the body region and the first surface region. A patterned gate electrode layer is formed over the gate dielectric, a source region in the body region and a drain region in the first surface region on a side of the trench region opposite to the source are formed, and fabrication of the IC is completed.
US07745291B2	Method of fabricating a high-voltage transistor with an extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls partially filling each of the trenches with a dielectric material that covers the first and second sidewalls. The remaining portions of the trenches are then filled with a conductive material to form first and second field plates. Source and body regions are formed in an upper portion of the mesa, with the body region separating the source from a lower portion of the mesa. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
US07745290B2	Methods of fabricating semiconductor device including fin-fet A method of fabricating a semiconductor device including a fin field effect transistor (Fin-FET) includes forming sacrificial bars on a semiconductor substrate, patterning the sacrificial bars to form sacrificial islands on the semiconductor substrate, forming a device isolation layer to fill a space between the sacrificial islands, selectively removing the sacrificial islands to expose the semiconductor substrate below the sacrificial islands, and anisotropically etching the exposed semiconductor substrate using the device isolation layer as an etch mask to form a recessed channel region. The recessed channel region allows the channel width and channel length of a transistor to be increased, thereby reducing the occurrence of short channel effects and narrow channel effects in highly integrated semiconductor devices.
US07745287B2	Floating trap type nonvolatile memory device and method of fabricating the same A nonvolatile memory device includes a semiconductor wall having an inclination angle and a gate electrode covered with the semiconductor wall. A pair of buried diffusion layers may be formed at a lower surface and upper surface formed by the semiconductor wall. A charge trap insulating layer may be sandwiched between the gate electrode and the semiconductor wall. The semiconductor wall between the buried diffusion layers may correspond to a channel of the memory device. In a method of fabricating the memory device, a pattern having a sidewall may be formed on a semiconductor substrate. A buried oxide layer may be formed at the upper surface and another buried oxide layer may be formed at the lower surface. A charge trap insulating layer may be formed at the sidewall where the buried oxide layers are formed. A gate electrode may be formed on the charge trap insulating layer. A semiconductor substrate may be formed to form a trench, so that the sidewall may be obtained.
US07745285B2	Methods of forming and operating NAND memory with side-tunneling A string of nonvolatile memory cells are formed with control gates extending between floating gates, control gates and floating gates separated by tunnel dielectric layers. Electron tunneling between control gates and floating gates is used for programming. A process for forming a memory array forms odd numbered floating gates from a first layer and even numbered floating gates from a second layer.
US07745284B2	Method of manufacturing flash memory device with conductive spacers A method of manufacturing a flash memory device. According to the invention, a floating gate can be formed and a distance between cells can be secured sufficiently by using one conductive layer without using a SA-STI process that cannot be applied to the manufacturing process of highly integrated semiconductor devices. It is therefore possible to minimize interference between neighboring cells.
US07745282B2	Interconnect structure with bi-layer metal cap A structure and method of fabricating an interconnect structures with bi-layer metal cap is provided. In one embodiment, the method includes forming an interconnect feature in a dielectric material layer; and forming a bi-layer metallic cap on a top surface of the interconnect feature. The method further includes depositing a blanket layer of a dielectric capping layer, wherein the depositing covers an exposed surface of the dielectric material layer and a surface of the bi-layer metallic cap. The bi-layer metallic cap includes a metal capping layer formed on a conductive surface of the interconnect feature; and a metal nitride formed on a top portion of the metal capping layer. An interconnect structure is also described having an interconnect feature formed in a dielectric layer; a bi-layer metallic cap formed on a top portion of the interconnect feature; and a dielectric capping layer formed over the bi-layer metallic cap.
US07745279B2	Capacitor that includes high permittivity capacitor dielectric A decoupling capacitor is formed on a semiconductor substrate that includes a silicon surface layer. A substantially flat bottom electrode is formed in a portion of the semiconductor surface layer. A capacitor dielectric overlies the bottom electrode. The capacitor dielectric is formed from a high permittivity dielectric with a relative permittivity, preferably greater than about 5. The capacitor also includes a substantially flat top electrode that overlies the capacitor dielectric. In the preferred application, the top electrode is connected to a first reference voltage line and the bottom electrode is connected to a second reference voltage line.
US07745276B2	Method for manufacturing SiC semiconductor device A method for manufacturing a SiC semiconductor device includes: preparing a SiC substrate having a (11-20)-orientation surface; forming a drift layer on the substrate; forming a base region in the drift layer; forming a first conductivity type region in the base region; forming a channel region on the base region to couple between the drift layer and the first conductivity type region; forming a gate insulating film on the channel region; forming a gate electrode on the gate insulating film; forming a first electrode to electrically connect to the first conductivity type region; and forming a second electrode on a backside of the substrate. The device controls current between the first and second electrodes by controlling the channel region. The forming the base region includes epitaxially forming a lower part of the base region on the drift layer.
US07745275B2	Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region A method of forming an integrated circuit 68 provides over a diffusion region 28 on a substrate 26 a gate electrode 36. A source electrode is provided by a source local interconnect conductor 30 and a drain electrode is provided by a drain local interconnect conductor 32. An insulator layer 38 is formed over these electrodes and respective electrode openings are formed through the insulator layer 38 so as to provide electrical connection to a Metal1 layer 46, 48, 50. The etching process for the electrode openings is controlled such that the maximum etching depth is insufficient to penetrate through the insulating layer 38 and accordingly short circuit a gate insulator layer 34 provided between the diffusion region 28 and the gate electrode 36. Thus, the gate opening may be positioned over the diffusion region 28. Double patterning followed by separate etching steps for the gate opening and the source/drain opening may be used to control the gate opening depth and permit the gate contact to be position overlying the diffusion region.
US07745273B2	Semiconductor device and method for forming same A method for manufacturing a semiconductor device. The method includes providing a semiconductor body of a conductivity type, wherein the semiconductor body comprises a first surface. At least one buried region of a second conductivity type is formed in the semiconductor body and at least a surface region of the second conductivity type is formed at the first surface of the semiconductor body, wherein the buried region and the surface region are formed such that they are spaced apart from each other. The buried region is formed by deep implantation of a first dopant of the second conductivity type.
US07745269B2	Semiconductor device and manufacture method thereof An object is to provide an element structure of a semiconductor device for increasing an etching margin for various etching steps and a method for manufacturing the semiconductor device having the element structure. An island-shaped semiconductor layer is provided over an insulator having openings. The island-shaped semiconductor layer includes embedded semiconductor layers and a thin film semiconductor layer. The embedded semiconductor layers have a larger thickness than that of the thin film semiconductor layer.
US07745262B2	Heat dissipating package structure and method for fabricating the same A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.
US07745260B2	Method of forming semiconductor package A method of forming a semiconductor package (10) including forming a plurality of cavities (14) in a substrate (12). An electrically conductive pattern (16) is formed on the substrate (12) and over the cavities (14). An electrically insulating layer (22) is formed over the substrate (12) and the electrically conductive pattern (16). A plurality of vias (24) is formed in the electrically insulating layer (22). An integrated circuit (IC) die (28) is attached to the electrically insulating layer (22) and electrically connected to the vias (24) such that the IC die (28) is connected to the electrically conductive pattern (16). A molding operation is performed to encapsulate the IC die (28). The substrate (12) is removed such that the electrically conductive pattern (16) is exposed.
US07745257B2	High power MCM package with improved planarity and heat dissipation A structure and a manufacturing method providing improved coplanarity accommodation and heat dissipation in a multi-chip module. One of the components in a multi-chip module (MCM) is provided with a recess formed in its respective top surface; and a film is applied so as to cover the top surfaces of the components and so that any excess film can enter into the recess. The recess is preferably a peripheral groove. Then when molding material is injected, it may surround and seal the side surfaces of the components, while not substantially covering the top surfaces that are covered by the film. Since the recess receives any excess film material that may be present, it may prevent such excess film material from covering the respective side surfaces of the corresponding component and creating a void between the component and the molding material. This advantageous effect of the invention is particularly useful when the top component surface in which the recess is formed is higher above the circuit substrate than the respective top surface of another one of the components.
US07745252B2	Semiconductor device and manufacturing method thereof It is an object of the present invention to manufacture, with high yield, a semiconductor device in which an element that has a layer containing an organic compound is provided over a flexible substrate. A method for manufacturing a semiconductor device includes: forming a separation layer over a substrate; forming an element-formed layer over the separation layer by forming an inorganic compound layer, a first conductive layer, and a layer containing an organic compound and forming a second conductive layer which is in contact with the layer containing an organic compound and the inorganic compound layer; and separating the separation layer and the element-formed layer from each other after pasting a first flexible substrate over the second conductive layer.
US07745250B2	Image sensor and method for manufacturing the same An image sensor and manufacturing process thereof are provided. An image sensor according to an embodiment comprises a first wafer formed with a photodiode cell without a microlens and a second wafer formed with a circuit part including transistor and a capacitor. The first wafer is stacked on the second wafer such that a connecting electrode can be used to electrically connect the photodiode cell of the first wafer to the circuit part of the second wafer.
US07745248B2	Fabrication of capacitive micromachined ultrasonic transducers by local oxidation The current invention provides methods of fabricating a capacitive micromachined ultrasonic transducer (CMUT) that includes oxidizing a substrate to form an oxide layer on a surface of the substrate having an oxidation-enabling material, depositing and patterning an oxidation-blocking layer to form a post region and a cavity region on the substrate surface and remove the oxidation-blocking layer and oxide layer at the post region. The invention further includes thermally oxidizing the substrate to grow one or more oxide posts from the post region, where the post defines the vertical critical dimension of the device, and bonding a membrane layer onto the post to form a membrane of the device. A maximum allowed second oxidation thickness t2 can be determined, that is partially based on a desired step height and a device size, and a first oxidation thickness t1 can be determined that is partially based on the determined thickness t2.
US07745246B2	Method of fabricating light emitting device A light emitting device wafer is fabricated, having a light emitting layer section, composed of AlGaInP, based on a double heterostructure and a GaP light extraction layer disposed on the light emitting layer portion, having a first main surface thereof appearing on the first main surface of the wafer, so as that a P-rich off-angled {100} surface, having a higher existence rate of P atoms than an exact {100} surface, appears on the first main surface the GaP light extraction layer. The main first surface of the GaP light extraction layer is etched with an etching solution FEA so as to form surface roughening projections. Therefore, it provides a method of fabricating a light emitting device capable of applying surface roughening easily to the GaP light extraction surface having the {100} surface, off-angled to be P-rich, as a main surface thereof.
US07745244B2	Pin substrate and package A semiconductor die package. Embodiments of the package can include a substrate with solid conductive pins disposed throughout. A semiconductor die can be attached to a surface of the substrate. Electrical connection to the semiconductor die can be provided by the solid conductive pins.
US07745242B2	Method for fabricating liquid crystal display device A method for fabricating a liquid crystal display device is disclosed. The method includes forming a first conductive layer on an insulating substrate, forming a first insulating layer, a second conductive layer, and a third conductive layer on the first conductive layer, patterning the second conductive layer and the third conductive layer, such that the third conductive layer is located on a partial region of the second conductive layer, forming a second insulating layer on the patterned third conductive layer, forming a first contact hole to expose the first conductive layer by patterning the first and second insulating layers, and a second contact hole to expose the third conductive layer by patterning the second insulating layer, and forming a fourth conductive layer to connect the first and third conductive layers with each other by way of the first and second contact holes.
US07745241B2	Method of making light emitting diodes A method of making a plurality of light emitting diodes simultaneously includes steps of: a) providing a wafer and a first bonding layer, and adhering the first bonding layer to a bottom side of the wafer; b) cutting the wafer to form a plurality of LED dies on the first bonding layer; c) adhering a second bonding layer on top sides of the plurality of LED dies; d) removing the first bonding layer; e) mounting the second bonding layer with the plurality of LED dies on a base having a plurality of recesses; f) removing the second bonding layer and letting the plurality of LED dies fall into the recesses of the base; g) electrically connecting the LED dies to electric poles in the base; h) encapsulating the LED dies; and i) cutting the base to form the plurality of LEDs.
US07745240B2	Manufacturing method of light-emitting element with surface layer removal A manufacturing method of a light-emitting element includes emitting a laser light to a division region for separating a light-emitting element formed on a substrate, physically dividing the substrate along the division region, and removing a surface layer on at least one of the side faces of the substrate that is exposed by the dividing of the substrate.
US07745239B1	Arrangement of fill unit elements in an integrated circuit interconnect layer An integrated circuit having a metal interconnect layer, and also having a conductive line and a boundary defined with a uniform distance from the conductive line that defines a “keep out” distance between the boundary and the conductive line. A set of first fill elements are uniformly arranged along the boundary outside of the “keep out” distance, and a set of second fill elements further from the conductive line than the first fill elements are arranged in a pattern that would be uniform, but for having some fill elements missing from the pattern.
US07745235B2	Method for manufacturing semiconductor sensor A semiconductor sensor is disclosed that includes a substrate including at least a semiconductor layer. The substrate includes a weight arranging part in the vicinity of the center of the substrate, a flexible part around the weight arranging part, and supporting parts provided around the flexible part. The semiconductor sensor further includes a weight arranged on the weight arranging part. The weight is made of a material different from that of the weight arranging part and the flexible parts.
US07745234B2	Method for reclaiming semiconductor package A method of forming a semiconductor card. A semiconductor package having a damaged controller die is reclaimed. The reclaim process includes severing the electrical connections between the controller die and the semiconductor package substrate without exposing the passive component. In one embodiment, the cutting tool comprises a saw blade. An electrically insulating material is deposited over the exposed bond wires to complete the reclaim process. The reclaimed package and a new controller die are affixed to a second substrate to electrically couple the memory die of the reclaimed package with the new controller die—forming a new package. The new package is encapsulated to form a new memory card.
US07745233B2	Ferroelectric capacitor and ferroelectric memory with Ir-Ru alloy electrode and method of manufacturing the same A ferroelectric capacitor comprises a first electrode comprising an alloy of Ir and Ru, a ferroelectric layer disposed on the first electrode, and a second electrode disposed on the ferroelectric layer. A ferroelectric memory comprises a substrate and a plurality of memory cells arranged on the substrate. Each memory cell comprises a first electrode comprising an alloy of Ir and Ru, a ferroelectric layer disposed on the first electrode, and a second electrode disposed on the ferroelectric layer.
US07745232B2	Semiconductor device and method of manufacturing the same According to the present invention, contact plugs are formed by a CVD method without deteriorating the properties of the ferroelectric capacitor in a semiconductor device having a fine ferroelectric capacitor. Adhesive film is formed in a contact hole, which exposes an upper electrode of the ferroelectric capacitor after conducting heat treatment in an oxidizing atmosphere, and a W layer is deposited by the CVD method using such TiN adhesive film as a hydrogen barrier and the contact hole is filled.
US07745230B2	Estrogen receptors and methods of use The present invention provides isolated polypeptides having an amino acid sequence having at least 70% identity to SEQ ID NO:20, wherein the polypeptide has ER-α36 activity. The invention further provides methods for identifying agents that bind to such polypeptides, methods for detecting such polypeptides, and methods for altering the activity of such polypeptides. Also provided are antibodies that specifically bind to an amino acid sequence depicted at SEQ ID NO:1, or an immunogenic fragment thereof, and methods for making and using such antibodies.
US07745221B2	Methods and apparatus for sorting cells using an optical switch in a microfluidic channel network Apparatus and Methods are provided for a microfabricated fluorescence activated cell sorter based on an optical switch for rapid, active control of cell routing through a microfluidic channel network. This sorter enables low-stress, highly efficient sorting of populations of small numbers of cells (i.e., 1000-100,000 cells). The invention includes packaging of the microfluidic channel network in a self-contained plastic cartridge that enables microfluidic channel network to macro-scale instrument interconnect, in a sterile, disposable format.
US07745220B2	Devices and methods for analyte detection using distorted liquid crystals The present invention provides devices and methods for detection of analytes based on measuring the anchoring strength of liquid crystals having distorted geometries. Methods for detecting an analyte in a sample include the steps of: (a) capturing an analyte on a substrate surface wherein the substrate surface defines an easy axis when in contact with a liquid crystal. Substrate surface and liquid crystal are brought into contact and an analyte-dependent departure in the orientation of the liquid crystal from the easy axis of the substrate surface is measured. This departure indicates the presence of the analyte in the sample.
US07745218B2	Genome minimization by tn5-coupled cre/loxP excision system Disclosed is a method for developing novel strains deleted specific chromosome sites, using transposon and Cre/loxP site-specific recombination by Cre expression vector, wherein the transposon comprises a selectable marker and loxP site. The method comprises the steps of: (1) preparing a transposon comprising a selectable marker and loxP site; (2) inserting the transposon into an optional position of microbial chromosome, and determining the inserted site; (3) integrating two transposons comprising a different selectable marker to one chromosome; (4) deleting a chromosomal site between the two lox sites by introducing a Cre expression vector into the chromosome of step (3); and (5) repeating steps (3 and 4) for the mutant deleted a part of chromosome, to shorten the chromosome of mutant gradually.
US07745217B2	Graft prosthesis devices containing renal capsule collagen The invention provides tissue graft compositions comprising collagen-based extracellular matrices derived from renal capsules of warm-blooded vertebrates. The invention further provides a process of harvesting and purifying a renal capsule to provide an extracellular matrix material having beneficial use as a tissue graft and/or cell growth material.
US07745215B2	Methods and compositions for expanding T regulatory cells The present invention provides methods and compositions for expanding Treg cells ex vivo or in vivo using one or more conjugates comprising a costimulatory moiety that stimulates at least one of three signals involved in Treg cell development and/or using dendritic cells pulsed with antigens and modified to display TGF-β, or hematopoetic stem cells or bone marrow cells modified to display TGF-β. The methods and compositions are useful, for example, in the treatment and prevention of autoimmune disease, including Type 1 diabetes and in preventing foreign graft rejection, as well as to establish mixed chimerism, induce tolerance to autoantigens, alloantigens or xenoantigens, beta cell regeneration, prevention of foreign graft rejection, and treatment of a genetically inherited hematopoietic disorder.
US07745211B2	Integrated microfluidic control employing programmable tactile actuators Microfluidic devices having active features such as valves, peristaltic pumps, and mixing portions are fabricated to have a thin elastomeric membrane over the active features. The active features are activated by a tactile actuator external to the membrane, for example, a commercial Braille display. The display may be computer controlled, for example by simple text editor software, to activate individual Braille protrusions or a plurality of protrusions to actuate the active portions of the microfluidic device. Integral devices can incorporate the tactile actuators in a single device, but still external to the membrane.
US07745207B2	Microfluidic devices Methods and devices for the interfacing of microchips to various types of modules are disclosed. The technology disclosed can be used as sample preparation and analysis systems for various applications, such as DNA sequencing and genotyping, proteomics, pathogen detection, diagnostics and biodefense.
US07745198B2	Method of producing macrolide compound The present invention provides a novel method of producing the 12-membered ring macrolide compound 11107D having an antitumor activity by biological transformation. Starting material which is the 12-membered ring macrolide compound 11107B represented by the formula (I) is incubated in the presence of a strain belonging to the genus Mortierella, the genus Streptomyces or the family Micromonosporaceae (for example, Streptomyces sp. AB-1704 strain (FERM BP-8551)), each of which has the ability of transforming the 12-membered ring macrolide compound 11107B into a 11107D substance represented by the formula (II), or a preparation of its cultured myceha and oxygen, and then 11107D substance which is a target material is collected from the treating solution.
US07745195B2	Method for the preparation of an evolved microorganism for the creation or the modification of metabolic pathways The present invention is directed to a method for the preparation of evolved microorganisms permitting the creation or modification of metabolic pathways. Strains of evolved microorganisms and evolved genes obtained by the method are also provided. The invention is also directed to the use of evolved microorganisms, genes or proteins in a biotransformation process.
US07745192B2	Prothrombin activating protein The invention relates to snake venom protease polypeptides and nucleic acid sequences encoding same. This invention also relates to methods of making and using the snake venom proteases, e.g., to promote haemostasis and prevent blood loss such as during surgery or for treatment of wounds resulting from accidents and other types of injury or trauma.
US07745190B2	Endoribonuclease A novel endoribonuclease activity exhibiting polypeptide; a nucleic acid coding for the polypeptide; a recombinant DNA comprising the nucleic acid; a transformant obtained by transformation using the recombinant DNA; a process for producing the polypeptide, characterized by including the steps of culturing the transformant and collecting the polypeptide from the culture; a process for producing single-strand RNA fragments, characterized by including the step of causing the polypeptide to act on a single-strand RNA; and a method of fragmenting a single-strand RNA.
US07745188B2	Thermostable Y-family polymerases and chimeras The present disclosure is related to thermostable Y-family polymerases, in particular several novel Y-family polymerases and chimeras made therefrom, as well as methods of identifying other Y-family polymerases, methods of generating other chimeric Y-family polymerases, methods of amplifying ancient or damaged DNA, and methods of incorporating fluorescent or modified nucleotides into a DNA molecule.
US07745187B2	Sulfotransferase sequence variants Isolated sulfotransferase nucleic acid molecules that include a nucleotide sequence variant and nucleotides flanking the sequence variant are described, as well as sulfotransferase allozymes. Methods for determining if a mammal is predisposed to thyroid disease or cancer also are described.
US07745184B2	Process for the biological production of 1,3-propanediol with high yield The present invention provides a microorganism useful for biologically producing 1,3-propanediol from a fermentable carbon source at higher yield than was previously known. The complexity of the cofactor requirements necessitates the use of a whole cell catalyst for an industrial process that utilizes this reaction sequence to produce 1,3-propanediol. The invention provides a microorganism with disruptions in specified genes and alterations in the expression levels of specified genes that is useful in a higher yielding process to produce 1,3-propanediol.
US07745183B2	Methods for the selection of low pH-tolerant, DHA producing microalgae Methods for production of highly unsaturated fatty acids by marine microorganisms, including the heterotrophic marine dinoflagellate Crypthecodinium, using low levels of chloride ion are disclosed. Specifically, methods of increasing production of highly unsaturated fatty acids by marine microorganisms while growing in low chloride media by manipulating sodium ion and potassium ion levels. The invention also relates to methods of production of highly unsaturated fatty acids by marine organisms at low pH levels, and includes methods for generation of low pH tolerant strains.
US07745181B2	Process for producing yeast-derived glucan It is an object of the invention to provide a process for easily producing a glucan, which assures a high degree of safety and which does not generate an oxidation off-flavor, without using a hydroxide of an alkali metal such as sodium hydroxide. In a process of the present invention, a physically pulverized yeast is autolyzed with an intracellular enzyme thereof, in an electrolyzed alkaline water which is obtained by electrolyzing water.
US07745180B2	Device and method for high-throughput quantification of mRNA from whole blood Disclosed are a method, device kit, and automated system for simple, reproducible, and high-throughput quantification of mRNA from whole blood. More particularly, the method, device, kit and automated system involve combinations of leukocyte filters attached to oligo(dT)-immobilized multi-well plates.
US07745179B2	Lentiviral vectors featuring liver specific transcriptional enhancer and methods of using same Recombinant lentiviruses and transfer vectors for transgene delivery as well as methods for gene therapy using such vectors are disclosed. The invention provides a third generation lentiviral packaging system and a set of vectors for producing recombinant lentiviruses, as well as novel tissue specific enhancer and promoter elements useful for optimizing liver specific transgene delivery. The transgene is preferably a blood clotting factor such as human factor IX (hFIX) or human factor VIII (hFVIII) and can be used for treatment of hemophilia.

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