Document Document Title
US07664102B1 System and method for providing a plurality of multi-media services using a number of media servers to form a preliminary interactive communication relationship with a calling communication device
A system and method for processing a plurality of requests for multi-media services received at a call control element (CCE) defined on the system from a calling communication device. The system includes a Network Routing Element, a Service Broker (SB), at least a primary media severs (MS) and at least a secondary MS, a plurality of application servers (ASs) and a plurality of border elements, all of which are coupled to the CCE. The SB is adapted to receive a plurality of requests including parameters for requesting multi-media services, via the CCE, and to selectively redirect the requests to one or more ASs for providing feature processing for the requests. The ASs can instruct either the primary MS or secondary MS, via the CCE, to form a preliminary interactive communication path with the calling communication device for collecting caller-entered data, which can be validated prior to providing the feature processing.
US07664098B2 Systems and methods for gathering usage detail information for packet-based networks
The present invention relates to systems and methods for recording usage of real-time audio, video and data communication services over packet-based networks. The present invention can collect call detail record information from a network gatekeeper and analyze the call detail record information to determine its validity. After checking validity, the invention can combine the call data with information retrieved from a customer database and store the combined record in billing database. The billing database can be accessed by modular billing modules to generate a customized invoice.
US07664097B2 Telephone service via networking
A system and method for providing telephone type services over an Internet Protocol (IP) network, such as the internetwork commonly known as the Internet. In preferred embodiments, public switched telephone networks utilizing program controlled switching systems are arranged in an architecture with the Internet to provide a methodology for facilitating telephone use of the Internet by customers on an impromptu basis. Provision is made to permit a caller to setup and carry out a telephone call over the Internet from telephone station to telephone station. Calls may be made on an inter or intra LATA, region or state, nationwide or worldwide basis. Billing may be implemented on a per call, timed, time and distance or other basis. Calls may be made front telephone station to telephone station, from telephone station to computer or computer to telephone station.
US07664095B2 Systems and methods for registering a client device in a data communication system
A two-way wireless communication system comprises a central authority in communication with a plurality of client devices via both a circuit switched data communication system and a packet switched data communication system. The packet switched communication system can assign packet switched network addresses to the client devices dynamically. Therefore, the central authority can be configured to send a circuit switched message, through the circuit switched data network, to a client device requesting the client device to register with the central authority through the packet switched data network.
US07664085B2 Wireless communication device and method for coordinating communications among wireless local area networks (WLANs) and broadband wireless access (BWA) networks
Embodiments of methods for coordinating communications among wireless networks and a co-located wireless communication device are generally described herein. Other embodiments may be described and claimed. In some embodiments, frame-timing parameters are reported by a broadband wireless access (BWA) network node to a node of a wireless local area network (WLAN), and the WLAN node may transmit the frame-timing parameters to an access point ad the WLAN. The BWA network node and the WLAN node may be co-located within the wireless communication device. The transmission time of downlink transmissions for receipt by the WLAN node may be selected by the access point based on the frame-timing parameters to reduce interference caused by concurrent uplink transmissions by the BWA network node.
US07664084B2 Techniques for selecting an access point apparatus based on an allowance area
A wireless station that includes an access point apparatus detection section which detects a usable access point apparatus from among a plurality of access point apparatuses; an allowance area calculation section which calculates an allowance area according to received signal strength indicator, frequency, and frequency bandwidth of a radio wave transmitted by a rogue access point apparatus whose frequency bandwidth overlaps with that of the usable access point apparatus, as well as according to received signal strength indicator, frequency, and frequency bandwidth of a radio wave transmitted by the usable access point apparatus; and an access point apparatus selection section which selects one access point apparatus based on the allowance area.
US07664082B1 Method of scheduling with multiple radios per node in a wireless multihop network
A method of scheduling transmission from radios having multiple radios is provided, where the number of radios is smaller than then number of neighbours to which transmission needs to occur. Scheduling blocks are identified consisting of sets of neighbours that can be transmitted to simultaneously without interference. Then, the scheduling blocks are used for scheduling purposes.
US07664081B2 Wireless gateway for enabling wireless devices to discover and interact with various short-range services/devices
A portable gateway apparatus communicates with devices coupled to a first network and devices coupled to at least a second network. The gateway provides an interface to a mobile phone to discover services/devices within both the first and the at least second networks and interacts with them. The mobile phone includes a service/content directory enabling a user to select preferred services. The gateway conducts service discovery to identify services and devices responsive to the user request. The services and description are provided to the user for selection, after which a service-specific interface is displayed to enable the mobile phone to control the execution of the discovered services.
US07664079B2 Adjusting link layer control frame to facilitate data throughput
A base station subsystem includes logic to change the modulation and coding scheme for radio communications, and logic to communicate with a switching GSM to cause a change in link layer control frame size to reflect the change in modulation and coding scheme.
US07664078B2 Method and apparatus for efficient sharing of communication system resources
A method for accessing a reverse channel for communication from a remote unit to a base station is disclosed. The method includes waiting a random period of time in response to determining that the reverse channel is available at a first time. The method also includes monitoring a forward channel after expiration of the random period of time to determine whether the reverse channel is available at a second time. The method further includes transmitting a first portion of data on the reverse channel in response to determining that the reverse channel is available at the second time.
US07664077B2 Information transmission method, mobile communications system, base station and mobile station in which data size of identification data is reduced
In an information transmission method, a radio communications system, a base station and a mobile station, a TBS size, a modulation scheme and the number of codes in a multicode are converted into identification data having a relatively smaller data size before being transmitted to a destination of communication. The TBS size is identified by using, in combination, an identification code identifying a channelization code set, an identification code identifying a modulation scheme, and an identification code obtained by converting a combination of the number of codes in a multicode and a modulation pattern identification (TFRC) into a corresponding code. Accordingly, the data size for TBS size identification is reduced.
US07664076B2 Random access apparatus and method
A random access apparatus for supporting a variety of access service classes includes a radio frequency (RF) transmitting/receiving unit for receiving a preamble introduction broadcasting signal from a base station and transmitting a random access preamble to the base station, an introduction broadcasting signal processing unit for extracting a random access usage relating to M-sequences and hadamard sequences from the received preamble introduction broadcasting signal, a selecting unit for selecting a plurality of M-sequences and a hadamard sequence corresponding to a random access purpose based on the extracted random access usage, and a preamble producing unit for generating the random access preamble using the selected plurality of M-sequences and the selected hadamard sequence.
US07664074B2 System for packet data service in the mixed network of asynchronous communication network and synchronous communication network and hand-over method thereof
Disclosed herein is a mobile communication terminal and handover method therefor. In the mobile communication system, a Gateway GPRS Support Node (GGSN) of the asynchronous network is connected to a Packet Data Service Node (PDSN) of the synchronous network. Accordingly, as a mobile communication terminal, using packet data service in the asynchronous mobile communication system, moves into an area of a synchronous mobile communication system, the synchronous mobile communication system sets control signals and traffic to transmit packet data in response to a request from the asynchronous mobile communication system. Further, if forward and reverse channels are assigned between the mobile communication terminal and the synchronous mobile communication system, call setup is performed to provide the packet data service, and then a node B of the asynchronous mobile communication system releases the connection to the mobile communication terminal.
US07664072B1 Virtual streams for QoS-driven wireless LANs
A virtual stream (VS) in a basic service set (BSS) in a wireless local area network (WLAN) that exists solely within the medium access control (MAC) sublayer of the WLAN. The VS includes a unidirectional path in the wireless network between a station sourcing a quality of service (QoS) session and at least one station receiving the QoS session in the same BSS. The VS is defined by a VS identifier (VSID) that is unique within and local to the BSS, an address of the sourcing station, and an address of the at least one receiving station. The VS can be a virtual down-stream (VDS), a virtual upstream (VUS) or a virtual side-stream (VSS). The VS can be a unitcast or a multicast VS.
US07664069B2 Method and system for preventing call drop by limiting search time of 1x system during 1x EV-DO system traffic state
Disclosed is a method and a system for preventing a call drop by limiting a search time for a 1X system during a 1xEV-DO system traffic state. The system comprises a hybrid access terminal, supporting both a 1xEV-DO system and a 1X system, for periodically switching over to the 1X system while in traffic with the 1xEV-DO system, updating an overhead message, checking a search time and switching over to the 1xEV-DO system based on a result of the search time; a base station transceiver subsystem including a 1xEV-DO transceiver subsystem for exchanging a packet data with the hybrid access terminal and a 1X transceiver subsystem for exchanging a voice or data with the hybrid access terminal; a base station controller including a 1xEV-DO controller for controlling a packet data transmission service of the 1xEV-DO transceiver subsystem and a 1X controller for controlling transmission service of the 1X transceiver subsystem; and a packet data serving node connected to the 1xEV-DO controller for exchanging the packet data with the 1xEV-DO system.
US07664068B1 Voice data integrated multiaccess by self-reservation and contention algorithm
Certain exemplary embodiments provide a method for providing multiple access to a communication channel, the method comprising: sending a reservation request of a first type into a first selected minislot of a selected frame of an uplink channel when information of a first type is to be sent, the uplink channel having a plurality of frames, each frame having a first selectable number of minislots and a second selectable number of slots, the reservation request of the first type requesting an assignment of at least one slot for transmitting information of the first type in at least one frame that is subsequent to the selected frame.
US07664067B2 Preserving socket connections over a wireless network
A system, apparatus, and method for maintaining a socket connection over a wireless network. For example, one embodiment of the invention is a wireless data processing device for emulating a socket connection comprising: a wireless radio for establishing a wireless communication channel with a wireless service provider over a wireless network; a network protocol stack including at least one layer configured to establish a socket connection with a remote server over the wireless network, the network protocol stack further including an application layer for executing applications capable of transmitting and receiving data over the socket connection; and a resumable socket module configured to emulate an open socket connection transparently to applications within the application layer, even when the wireless communication channel is temporarily lost, the resumable socket module counting a number of bytes transmitted or to be transmitted to the remote server and maintaining a buffer containing the bytes transmitted or to be transmitted.
US07664058B1 Method and apparatus for providing spontaneous multi-way telephone conversation with inserted messaging
The present invention provides a method for simultaneously broadcasting a message to a plurality of end-point devices. More specifically, the present invention receives a request to initiate a teleconference from a subscriber. The plurality of end-point devices is then invited to join the teleconference.
US07664057B1 Audio-to-video synchronization system and method for packet-based network video conferencing
Synchronizing audio and video streams in packet-based networks requires synchronization of packet timestamps. The present invention provides such synchronization without resort to a network time standard. In one embodiment of the present invention, pairs of timestamp synchronized signals, such as audio and video signals, not having a common timestamp clock are mixed. One of the signals, for example, the audio signals, is mixed first while preserving the original audio timestamps. The preserved timestamp information is then used to synchronize the timestamps of the unmixed signals, in this example the video signals, to provide synchronization of all signals. In another embodiment, the present invention uses packets containing calibration of timestamps to reduce jitter. The present invention also includes specifications for a packet for transmitting timestamp information.
US07664051B2 Method for implementing virtual network element and system thereof
A method for implementing a virtual Network Element (NE), including: constructing type definition information of a virtual NE and a virtual board, which has all type parameters of an actual NE and board of the same type; obtaining the type definition information to construct a virtual NE entity and a virtual board entity which has property information of an actual NE; configuring service and protection information for the constructed virtual NE entity. A network management system for implementing a virtual NE is also disclosed. It is possible to construct and maintain a virtual NE which can simulate actual NE devices completely in accordance with the present invention.
US07664049B1 Multilayer telecommunications network
A communications system comprising: a first network comprising a plurality of first network subscriber units and a first network sink node unit capable of wireless communication with the first network subscriber units; and a second network geographically at least partly overlapping the first network and comprising a plurality of second network subscriber units and a second network sink node unit capable of wireless communication with the second network subscriber units; and a dedicated connection between the first network sink node unit and a second network unit capable of communication in the second network, whereby a first network subscriber unit may be provided with a communication path to another second network unit.
US07664045B2 Sampling to a next hop
Samples from an addressed data forwarding devices, such as a router, are forwarded to a specified next hop address and/or out a specified next hop interface. However, the sampling and/or next hop forwarding is suppressed if the specified next hop address is unstable or unresolved.
US07664044B2 Method of failure detection in an IP forwarding plane
A method of failure detection on an Internet Protocol (IP) forwarding plane, which includes: IP nodes of the two ends obtain Bidirectional Forwarding Detection (BFD) identifier information which is used in the BFD, moreover start a BFD session, encapsulate and transport a BFD packet between the IP nodes running the BFD session and implement the failure detection according to the BFD packet transported between the IP nodes. The method of this invention realizes the failure detection via starting the BFD session and via transporting the BFD packet between the inter-domain IP nodes or the intra-domain IP nodes.
US07664043B1 Method and apparatus for performing reachability testing within the context of customer virtual private networks
In one embodiment, the invention comprises a method and apparatus for verifying connectivity in a network comprising a plurality of provider edge routers and a plurality of customer edge routers facilitating communication within at least one customer virtual private network. In another embodiment, the invention comprises a method for determining respective operational statuses of edge communication links between provider edge routers and customer edge routers. In another embodiment, the invention comprises a method for verifying site-to-site reachability within the context of customer virtual private networks.
US07664041B2 Distributed stream analysis using general purpose processors
Methods and apparatuses for directing data transferred in a network to multiple analysis processors for network analysis processing. A network processor is configured to receive network data transferred in a network link. The network processor is configured to transmit the network data and a path control signal to a distribution module coupled to the network processor. The distribution module is configured to receive the path control signal and receive the network data from the network processor. The distribution module is further configured to route the network data to multiple outputs based on the path control signal received. A plurality of analysis processors are coupled to the distribution module for receiving the network data from a different output of the distribution module. Each analysis processor analyzes the network data received by the analysis processor for errors, purposes of detecting or measuring errors, performance, security, compliance, statistics, or patterns.
US07664036B2 Dynamic real-time quality management of packetized communications in a network environment
The present invention provides a dynamic real-time quality management of packetized communications in a network environment. Packetized communications are monitored by and exchanged between wireless Access Points (APs) and wireless terminals or by quality monitoring modules located within network segments or at network vertices. The processing unit analyzes the packetized communications to identify communication signatures associated with the packetized communications. The processor then uses these signatures to identify network impediments to the exchange of the packetized communications. These impediments may take the form of coding problems in which case an appropriate coding scheme is employed by the programmable COder/DECoder (CODEC) to convert incoming packetized communications to incoming user communications, and outgoing user communications to outgoing packetized communications. These impediments may also take the form of communication problems along and between the various network segments. In these cases, the processor may choose a more appropriate communication pathway with which to route the packetized communications.
US07664032B2 Communication terminal and communication network
Each node or terminal in a communication network is capable of generating routing information for routing packets from an arbitrary source terminal to an arbitrary destination terminal on both a single-path route and a multipath route. The routing information is placed in packets transmitted to neighboring communication terminals, and analyzed in packets received from neighboring terminals. The single-path route is spatially or temporally separated from the multipath route so that the single-path route does not receive interference from the multipath route. Temporal separation may be effected by suspending the transmission of packets temporarily at each communication terminal on the multipath route. Spatial separation may be effected by using the routing information to designate different zones in the network, the single-path route being disposed in one zone, the multipath route in another zone.
US07664031B2 Wireless probe
The present invention relates to the field of wireless communications and more particularly to systems and methods for monitoring wireless traffic in wireless local area networks. The present invention addresses shortcomings of the prior art by providing methods and apparatus for the calculation of more meaningful performance values for a wireless network reflective of the consumption of time on the wireless medium. These performance values may then, for example, be used to control access to the network or displayed graphically to show a user the performance of the network.
US07664028B1 Apparatus and method for metering and marking data in a communication system
A system and/or method for metering and marking packets of data incoming into a communication system having in some embodiments primary and secondary meter selectors, primary and secondary metering processors and a pipeline and wrapper interface controller. Further methods involve measuring an incoming microflow against one or two specified temporal profiles using a two-level metering hierarchy.
US07664025B2 Packet network telecommunication system
Packet network telecommunication systems, especially Internet Protocol (IP) telephony removes the need of explicit installing of TSP (TAPI service provider) software or other telephony software at each workstation. Application server software or corresponding control software is arranged to take care of all call control actions on behalf of the phone client software so that the phone client software only needs to receive and transmit speech data streams, and to communicate all control messaging from and to the particular phone client software via the communication link between the control software and the phone client software. Since modern operating systems include support for the user interface devices as well as transmitting and receiving real-time data streams, the phone client software does not require any specific interfacing software to be installed on the client workstation.
US07664021B2 Recording and reproducing apparatus and file transfer method
A recording and reproducing apparatus includes a file recorder, an interface, and controller which, upon receipt of content file with copy control information, records the content file in the recorder by adding thereto identification information M requesting transfer upon confirmation that a round-trip response time to a destination is not longer than a predetermined time, so that upon receipt of an instruction for transfer of the content file to an external device on the network, the controller determines whether the external device has a function of measuring and determining the round-trip response time to the destination, and in the case where the external device has function of measuring and determining the round-trip response time to the destination, transfers the content file to storage area of the external device, after measuring the round-trip response time and confirming that the measurement is not longer than predetermined time.
US07664003B2 Objective lens and optical pickup apparatus
An objective lens for use in an optical pickup apparatus for recording and/or reproducing information on a first optical information recording medium having a protective substrate with a thickness t1 using a light flux with a wavelength λ1, on a second optical information recording medium having a protective substrate with a thickness t2 using a light flux with a wave length λ2 and a third optical information recording medium having a protective substrate with a thickness t3 using a light flux with a wavelength λ2, the objective lens includes: an optical surface including a central area and a peripheral area, wherein when the objective optical lens forms the portion of the light flux with the wavelength λ2 passed the central area into a converged spot through a substrate with a thickness t4, the objective optical lens makes a spherical aberration of the converged spot a minimum value.
US07663994B2 Data recording method and data recording equipment
A frequency characteristics compensation method that can be applied to various waveforms (strategies). When determining the amount of frequency compensation, a deteriorated part by frequency characteristics is compensated for with respect to the difference between the pulse power to be compensated and the power level immediately before it. The present invention can also be applied to variations in the performance, aged deterioration, and temperature characteristics.
US07663993B2 Disk device for recording and reproducing disks with adaptive rotation control
A disk device is arranged to select an appropriate rotation control method according to a kind of an optical disk, a recording format or a recording method so that a recording operation for a certain amount of information may be completed as fast as possible, even if a waiting time takes place until the rotation is set. The disk device includes a unit for selecting the rotation control method for recording a certain amount of information more efficiently and rapidly in light of time according to a kind of an optical disk, a recording format or a recording method. The selected rotation control method is executed to control the rotation of the optical disk when recording information on the disk.
US07663991B2 Write-once recording medium preserving data-recording status, method of preserving data-recording status of a write-once recording medium, medium including computer readable code for the same, and recording and/or reproducing apparatus therefor
A method of reproducing a recording medium having finalized recorded data. Data is read from the recording medium and a determination is made whether the recording medium is further recordable based on whether a temporary defect management area includes repetitions of a predetermined value or based on whether another predetermined value is recorded in response to a finalization command previously recorded.
US07663989B2 Method of setting defect management information, method of recording data, computer program product, computer readable storage medium, and information recording apparatus that properly records plural types of data for different uses on the same information recording medium
An information recording apparatus that records information on an information recording medium includes a setting mechanism that sets defect management information including information with respect to a specific area in a recording area of the information recording medium in which a defect detection process need not be performed, a recording mechanism that records data in the recording area, and a determining mechanism that determines whether to perform the defect detection process in a recording target area in the recording area in which the data is recorded, based on the defect management information and information with respect to the recording target area. By setting an AV data area as a specific area and by setting a PC data area as a defect management area, the continuity of data recorded in the AV data area is achieved, and the reliability of data recorded in the PC data area is ensured.
US07663988B2 Optical disc apparatus and method of setting defocus value thereof
An optical disc apparatus is disclosed that comprises a jitter value detecting circuit that detects a jitter value based on the signal read out from an optical disc; and a defocus value setting circuit that adjusts a defocus value used for moving an objective lens along the direction of a light axis when focusing of the objective lens to the optical disc is performed, based on the signal that has gone through the jitter value detecting circuit, and causes a defocus adjustment to be made based on the defocus value.
US07663986B2 Servo control signal generation device and an optical disk device using the same
A servo control signal generation device for discriminating a kind of an optical disk, changing over between top and bottom envelope signals of an RF signal, and generating a defect signal and a mirror signal includes an RF generator for generating the RF signal from reflected light of an optical disk, a disk discriminator for discriminating a kind of the optical disk from the RF signal, and a top envelope generator and a bottom envelope generator respectively for generating the top and bottom envelope signals of the RF signal. If the disk has reflectance after recording which is lower than that before recording, the defect and mirror signals are generated respectively from the top and bottom envelope signals. If the disk has reflectance after recording which is higher than that before recording, the defect and mirror signals are generated respectively from the bottom and top envelope signals.
US07663985B2 Information recording and reproduction method and information recording and reproduction device
The focus offset FE0 corresponding to minimum jitter is learned in advance. When performing spherical aberration adjustment for each disk, the spherical aberration is adjusted so that the jitter reaches a minimum, while maintaining the focus offset at FE0. The invention provides a method for performing high-precision adjustment of the focus offset and spherical aberration, even in the case of a disk which does not have data recorded on it.
US07663984B2 Optical pickup actuator for driving an objective lens
An optical pickup actuator which includes a base, a blade having an objective lens mounted thereon, a plurality of suspensions supporting the blade to be movable with respect to the base and forming an electroconductive path, and a magnetic circuit driving the blade according to a driving signal applied through the respective suspensions. The magnetic circuit includes a magnet fixed to the base, and a fine pattern coil installed on the blade at a position facing the magnet and having a track pattern coil, a focus pattern coil, and a tilt pattern coil independently driven by current applied through the suspensions and providing driving forces in a track direction, a focus direction, and a tilt direction of the blade.
US07663983B2 Optical information storage medium and optical information storage medium reproducing apparatus
An optical information storage medium includes a light transmitting layer, a first information storage layer, an intermediate layer mainly made of resin, a second information storage layer, and a substrate. The light transmitting layer, the first information storage layer, the intermediate layer, the second information storage layer, and the substrate are layered in this order from a reproduction light incident side. Each of the first information storage layer and the second information storage layer includes: a light absorbing film that absorbs reproduction light to generate heat; and a reproduction film that is heated by the heat generated by the light absorbing film so as to reproduce a signal shorter in mark length than a resolution limit of an optical system of a reproducing apparatus.
US07663982B2 Light delivery module, method of fabricating the same and heat-assisted magnetic recording head using the light delivery module
A light delivery module, a method of fabricating the same, a heat-assisted magnetic recording head using the light delivery module are provided. The light delivery module delivers light emitted from a light source. The light delivery module includes an optical waveguide having an inclined plane of an angle Φ with respect to an incident light axis to deliver an incident light, and a nano aperture changing an energy distribution of the light delivered through the inclined plane to generate an enhanced near-field. The heat-assisted magnetic recording head is mounted on one end of a slider with an air bearing surface to perform a recording operation on a recording medium. The heat-assisted magnetic recording head includes a magnetic path forming unit forming a magnetic field for recording, a light source emitting light for heating a predetermined region of a recording surface of the recording medium, and the light delivery module.
US07663980B2 Audio system for storing audio data files
A audio data collection and management system is provided for extracting music data from an optical media and managing the music data. The system is configured to extract at least a portion of an initial track of music data at an extracting rate that is different than the recording rate. The system simultaneously records the extracted portion of the initial track of music data to a storage media at the extracting rate while performing the extracting. The system is configured to be implemented in an automobile, a home stereo system, or a personal computer system.
US07663978B2 Drive control apparatus, electronic apparatus, method of controlling drive of electronic apparatus, drive control program, and recording medium
In an electronic device 1 comprising a battery 200 and a piezoelectric actuator A, a power source voltage before drive control is started is maintained by a sample holding circuit 102, a reference voltage is set by a reference voltage generating circuit 103 on the basis of the power source voltage, and a control circuit 106 stops driving when the power source voltage falls below a drive stop voltage as compared by a second comparison circuit 105, and begins driving the piezoelectric actuator A again when the power source voltage exceeds the reference voltage as compared by a first comparison circuit 104. Therefore, the device can be more easily reduced in size by using a small power source, and the driving time can be markedly reduced using an intermittent driving procedure that corresponds to the conditions of the battery voltage.
US07663970B2 Method for passive seismic emission tomography
A method for seismic event mapping includes transforming seismic signals recorded at selected positions into a domain of possible spatial positions of a source of seismic events. An origin in spatial position and time of at least one seismic event is determined from space and time distribution of at least one attribute of the transformed seismic data.
US07663969B2 Use of Lamb waves in cement bond logging
A method and apparatus useful to determine the integrity of a cement bond log disposed in the annular space between a casing and a wellbore. The method and apparatus induce a Lamb wave in the casing and into the wellbore. The Lamb wave attenuates upon passage through the cement bond log. The integrity of the cement bond log can be determined through an analysis and evaluation of the attenuation results.
US07663968B2 Method of processing geological data
There is provided a method of processing geological data during drilling of a borehole for improving accuracy of the geological data. The method includes a first step of determining from instrumentation (100) associated with a string (50) of drilling pipes a spatial trajectory of a borehole (20, 200) in a subterranean region. A second step of the method involves determining from the spatial trajectory one or more points (P1, P2, P3) with reference to the geological data whereat the trajectory changes direction in one or more layers of strata (F) of the subterranean region. A third step of the method involves subdividing an offset log generated by the instrumentation (100) in response to the one or more points (P1, P2, P3) to generate corresponding sections of offset log. A fourth step involves mutually comparing the subdivided sections of offset log to find a condition of best comparison therebetween and thereby generate one or more error terms (E). A fifth step involves, in response to the one or more error terms (E), updating the geological data to improve its accuracy. Beneficially, the method includes a sixth of repeating the second to fifth steps until the one or more error terms (E) are minimized. The method is relevant for a drilling rig (40) to enhance its drilling accuracy into the subterranean region.
US07663965B2 Memory with clock-controlled memory access and method of operating the same
An integrated circuit memory with clock-controlled memory access includes at least one data connection to input/output data, a memory cell array including memory cells to store data, a clock generator circuit to generate a clock signal, a memory circuit to store data, a control circuit to control storage of data in the memory circuit and to control output of data from the memory circuit. The memory circuit is connected to the memory cell array and to the at least one data connection. During read access to the memory cells, first and second data supplied to the memory circuit from the memory cell array are buffer-stored in the memory circuit upon first and second edges of the clock signal. The first and second data are output from the memory circuit and supplied to the at least one data connection upon third and fourth edges of the clock signal.
US07663960B2 Voltage supply circuit and semiconductor memory
A voltage supply circuit that switches and outputs multiple set voltages from an output terminal, has a boosting circuit that boosts a voltage supplied from a power supply and outputs the voltage to the output terminal; a voltage detecting circuit that outputs a first flag signal when detecting that the voltage outputted from the boosting circuit is not lower than the set voltage, outputs a second flag when detecting that the voltage outputted from the boosting circuit is not lower than a frequency adjusting voltage set lower than the set voltage; and a control circuit that controls an operation of the boosting circuit in response to the set voltage and the output signal of the voltage detecting circuit.
US07663951B2 Semiconductor memory apparatus
A semiconductor memory apparatus includes a main bank configured to combine a first sub bank and a second sub bank. A center bitline sense amplifier array is arranged in a region where the first sub bank meets the second sub bank. A first precharge section is arranged above the first sub bank and a second precharge section is arranged below the second sub bank. The first precharge section precharges local input/output lines of the first sub bank and the second sub bank and the second precharge section precharges the local input/output lines.
US07663949B2 Memory row architecture having memory row redundancy repair function
The present invention discloses a memory row architecture having memory row redundancy repair function. The memory row architecture includes a plurality of normal memory sections and a plurality of redundancy memory sections, wherein a number of the plurality of normal memory sections is more than two, a number of the plurality of redundancy memory sections is equal to the number of the plurality of normal memory sections, and a redundancy memory section is implemented in one side of each of the plurality of normal memory sections. In addition, the plurality of normal memory sections and the plurality of redundancy memory sections respectively having an odd serial number make up a first memory row redundancy repair module, and the plurality of normal memory sections and the plurality of redundancy memory sections respectively having an even serial number make up a second memory row redundancy repair module.
US07663947B2 Semiconductor device
A semiconductor device is disclosed which increases the data transfer rate in transferring data output from an input/output sense amplifier via a global data bus line by reducing the swing width of the data placed on the global data bus line. The semiconductor device may include a data transfer unit which receives first data, and outputs second data obtained by driving the first data to a predetermined level to a data transfer line; a data receiver which receives the second data transferred via the data transfer line; a delay which outputs a plurality of delay signals respectively obtained by delaying the second data outputted from the data transfer unit by different delay periods; a delay controller which selects one of the delay signals in accordance with an operation mode of the semiconductor device, and outputs at least one adjustment signal for adjusting a driving period of the data transfer unit for the first data based on the delay period of the selected delay signal; and a transfer controller which receives the first data and the at least one adjustment signal, and outputs at least one transfer control signal for controlling the operation of the data transfer unit, based on the received first data and adjustment signal.
US07663939B2 Voltage stabilizer memory module
A memory module is disclosed. The memory module comprises a voltage supply; a memory interface coupled to the voltage supply; a plurality of memory components; and a voltage stabilizer converter (VSC) coupled to the memory interface and to the plurality of memory components, the VSC for ensuring that the plurality of memory components operate at their optimum performance level. A voltage stabilizer memory module (VSMM) in accordance with the present invention includes a printed circuit board (PCB) that contains memory chips, discrete components, a voltage stabilizer converter, and other related components. The voltage stabilizer converter uses system voltage supply as its input and its output is the voltage supply for the DRAM components. Accordingly, the VSSM is more adaptable, more stable and has better performance than conventional memory modules.
US07663937B2 Semiconductor memory device
A semiconductor memory having a plurality of memory cells coupled to bit lines includes a bit line selecting circuit, a latch circuit, and a switching circuit. The bit line selecting circuit is disposed in a cell area where the memory cells are formed. The bit line selecting circuit is configured to select one of the bit lines in response to a first control signal. The latch circuit is disposed in a surrounding circuit area. The latch circuit is configured to perform a program operation or a read operation on the memory cells corresponding to the bit line selected by the bit line selecting circuit. The switching circuit is disposed in the surrounding circuit area, and is coupled between the bit line selecting circuit and the latch circuit. The switching circuit is configured to switch between the bit line selecting circuit and the latch circuit in response to a second control signal.
US07663933B2 Memory controller
A memory controller for controlling data access to a memory comprises a refresh controller. A read count memory part included in the refresh controller counts the number of read operations on each page of the memory and stores the read count therein. If the read count for any page exceeds a predetermined number, the refresh controller rewrites data stored in this page into the memory.
US07663929B2 Semiconductor memory device
A memory cell array forms a plurality of control areas in a direction orthogonal to the direction of extension of a bit line. A sense amplifier initially charges a bit line in each control area in the memory cell array with a charging voltage controlled by a respective individual bit-line control signal. Bit-line control signal generator circuits are provided plural in accordance with the control areas in the memory cell array. Each bit-line control signal generator circuit receives the potential on a cell source line in a corresponding control area, individually generates and provides the bit-line control signal in the each control area in accordance with the received voltage on the cell source line in each control area.
US07663926B2 Cell deterioration warning apparatus and method
Memory devices and methods adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of individual bits. Programming of such memory devices includes programming to a target threshold voltage range representative of the desired bit pattern. Reading such memory devices includes generating an analog data signal indicative of a threshold voltage of a target memory cell. Warning of cell deterioration can be performed using reference cells programmed in accordance with a known pattern such as to approximate deterioration of non-volatile memory cells of the device.
US07663924B2 Non-volatile memory devices having multi-page programming capabilities and related methods of operating such devices
Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these methods, at least two addresses that select corresponding rows of the memory block may be received and temporarily stored. Then, the rows selected by the temporarily stored addresses may be simultaneously activated, and at least some of the memory cells in the activated rows are simultaneously programmed. Corresponding non-volatile memory devices are also provided.
US07663923B2 Semiconductor memory device and control method thereof
This invention provides a semiconductor memory device in which standby current is suppressed to a small level. A ROM device includes memory cells for reading data corresponding to impedance between a terminal connected to bit lines and a source terminal and source power lines connected to the source terminal. In this ROM device, bias voltage is applied between the terminals of selected memory cells.
US07663922B2 Non-volatile semiconductor memory devices with lower and upper bit lines sharing a voltage control block, and memory cards and systems having the same
A non-volatile semiconductor memory device includes a page buffer comprising a lower latch block and an upper latch block, and a memory array that is connected to the lower latch block via a lower common bit line and that is connected to the upper latch block via an upper common bit line. The memory array includes a plurality of non-volatile memory cells, a lower even bit line and a lower odd bit line that are selectively connectable to the lower common bit line, an upper even bit line and an upper odd bit line that are selectively connectable to the upper common bit line, a first switch that electrically connects the lower even bit line to the upper even bit line in response to a first connection control signal and a second switch that electrically connects the lower odd bit line to the upper odd bit line in response to a second connection control signal.
US07663921B2 Flash memory array with a top gate line dynamically coupled to a word line
Systems and methods are disclosed including memory cells arranged in sectors. In one exemplary implementation, each memory cell may include a top gate, a source, a top gate line coupling memory cells in a sector, and a word line coupling memory cells together. Moreover, the top gate line may be dynamically coupled to the word line. Other exemplary implementations may relate to drivers for driving the word line and/or top gate line, multilevel memory cell, and/or floating gate line features.
US07663920B2 Memory system and data reading and generating method
An object of the present invention is to provide a memory system that offers enhanced security of ROM code that is data whose contents can be utilized for a given purpose in its intact form. In a memory system, data is read from a memory according to at least two or more addresses outputted from an address generator, from individual pages uniquely specified respectively by the addresses. A data generator generates one piece of data on the basis of the at least two or more pieces of data read from the individual pages.
US07663918B2 Nonvolatile memory device and method of programming/reading the same
A nonvolatile memory device includes a first memory block including a plurality of memory cells provided between a first drain selection transistor and a source selection transistor; and a second memory block including a plurality of memory cells provided between a second drain selection transistor and the source selection transistor. The first and second memory blocks share the same source selection transistor that is supplied with a voltage via a source selection line.
US07663917B2 Non-volatile static memory cell
A static memory cell comprising a pair of cross-coupled inverters (10, 12) which is “shadowed” with non-volatile memory elements (14, 16) so that data written in the static memory can be stored in the non-volatile cell, but also can be recalled later. The non-volatile cells (14, 16) are programmed with opposite data to increase the robustness of the retrieval process, and they are cross-coupled to the internal nodes (A, B) of the static memory cell, one the non-volatile cells (14) having a control gate connected to B and its source to A, and the other non-volatile element (16) having a control gate connected to A and its source to B. The drain of each non-volatile element (14, 16) is connected by means of a respective pMOS transistor (18, 20) to a program supply means.
US07663916B2 Logic compatible arrays and operations
An array of memory cells arranged in a plurality of rows and a plurality of columns are provided. The array includes a first program line in a first direction, wherein the first program line is connected to program gates of memory cells in a first row of the array; a first erase line in the first direction, wherein the first erase line is connected to erase gates of the memory cells in the first row of the array; and a first word-line in the first direction, wherein the first word-line is connected to word-line nodes of the memory cells in the first row of the array.
US07663911B2 Isolation structure for deflectable nanotube elements
Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node.
US07663906B2 Semiconductor memory device, data storage device and method for controlling semiconductor memory device
A semiconductor memory device includes: a memory section; and a control section that controls writing and reading of data with respect to the memory section, wherein the memory section includes a first memory region formed from nonvolatile memory cells, each of the memory cells storing binary data corresponding to a first polarization state and a second polarization state; and the control section controls, for all of the memory cells included in the first memory region, such that, before writing data to each of the memory cells based on new data externally inputted, the memory cell is polarized in the first polarization state, and then the memory cell is further polarized in the second polarization state.
US07663904B2 Operating method of one-time programmable read only memory
The present invention provides a method of operating a one-time programmable read only memory (OTPROM). The OTPROM includes at least a select transistor, an electrode and a dielectric layer disposed on a substrate, wherein the electrode is set up on the source region of the select transistor and the dielectric layer is set up between the electrode and the source region. The method of operating the one-time programmable read only memory includes performing a programming operation to write a digital data value of ‘1’ into the memory and performing a programming operation to write a digital data value of ‘0’ into the memory.
US07663903B2 Semiconductor memory device having improved voltage transmission path and driving method thereof
Provided are a semiconductor memory device and a method of driving the device which can improve a noise characteristic of a voltage signal supplied to a memory cell of the device. The semiconductor memory device includes a first semiconductor chip and one or more second semiconductor chips stacked on the first chip. The first chip includes an input/output circuit for sending/receiving a voltage signal, a data signal, and a control signal to/from an outside system. The one or more second semiconductor chips each include a memory cell region for storing data. The second semiconductor chips receive at least one signal through one or more signal paths that are formed outside the input/output circuit of the first chip.
US07663902B2 Memory device in which data is written or read by a switching operation of a bit line that is inserted into a trench formed between a plurality of word lines
A memory device and a method for fabricating the same provide a device capable of increasing or maximizing the performance of a microstructure device. The device includes: a plurality of word lines formed with a gap therebetween and extending in parallel with each other in a first direction of extension; and a bit line insulated from the plurality of word lines, intersecting the plurality of word lines and extending in a second direction of extension, a transition electrode portion of the bit line positioned in the gap and spaced apart from the plurality of word lines by a predetermined distance, the transition electrode portion of the bit line configured and arranged to be bent toward any one of the plurality of word lines in response to an electrical signal applied to at least one of the plurality of word lines.
US07663901B2 Techniques for implementing accurate device parameters stored in a database
Memory modules and methods for fabricating and implementing memory modules wherein unique device parameters corresponding to specific memory devices on the memory modules are accessed from a database such that the device parameters may be implemented to improve system performance. The device parameters may include sizes, speeds, operating voltages, or timing parameters of the memory modules. Memory modules comprising a number of volatile memory devices may be fabricated. Device parameters corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique device parameters corresponding to the specific memory devices on the memory modules.
US07663898B2 Switching power supply with direct conversion off AC power source
A power supply circuit, comprising a first reverse blocking transistor coupled to an AC power line; a second reverse blocking transistor coupled to the AC power line; a first inductor provided between the first reverse blocking transistor and the AC power line and configured to store energy; a first diode having a first terminal that is coupled to one end of the first inductor; a first capacitor having a terminal that is coupled to a second terminal of the first diode; and a first output terminal provided between the first diode and the first capacitor. The first and second transistors are arranged in an anti-parallel configuration and together define an AC switch.
US07663890B2 Printed circuit boards for use in optical transceivers
One example of an optical transceiver includes a housing and an optical transmitter and optical receiver disposed within the housing. A PCB is also disposed in the housing. The PCB has front and side edges, as well as circuitry in communication with the optical transmitter and the optical receiver. The PCB also includes a group of plated contact pads, each of which includes a front-most extremity that terminates short of the front edge. Finally, the PCB includes a group of traces, one of which leads from one of the side edges of the PCB to a via that is connected with the circuitry, and another of which leads from the via to one of the plated contact pads.
US07663888B2 Printed circuit board thickness adaptors
A printed circuit board card comprising: a printed circuit board having a first thickness and having first and second edges for inserting into respective channels of card guides, the channels of the card guides for receiving printed circuit boards having a second thickness, the second thickness being greater than the first thickness; and, first and second thickness adaptors each having a third thickness applied at the first and second edges, respectively, a sum of the first and third thicknesses approximating the second thickness, to thereby align the printed circuit board in the channels of the card guides.
US07663880B2 Holder for external keypad for portable electronic device
A holder (35) includes a base (33), an orientation block (36), a located block (37) and two magnets (38, 39). The base includes a mounting portion (40) and a securing portion (50). The orientation block is fixed in the mounting portion. The located block is slidably engaged in the securing portion. One of the magnets is disposed adjacent to the securing portion, the other of the magnets is disposed in the located block. The magnets are attracted to each other and configured for adjusting a distance between the orientation block and the located block.
US07663875B2 Computer enclosure with airflow-guiding device
A computer enclosure includes a chassis, an airflow-guiding device, and a mounting mechanism. The chassis includes a mounting bracket. The mounting bracket defines a receiving slot therein. The airflow-guiding device is mounted to the chassis adjacent to the mounting bracket. The mounting mechanism is installed on the airflow-guiding device. The mounting mechanism includes a hook received in the receiving slot and configured to mount the airflow-guiding device to the chassis. The mounting mechanism is configured to slide on the airflow-guiding device to disengage the hook from the receiving slot.
US07663874B2 Electronic apparatus
A second enclosure is coupled to a first enclosure for relative rotation around a rotation axis. The second enclosure rotates around the rotation axis in the opposite directions from a reference attitude. The second enclosure is prevented from further rotating in the first direction beyond the first rotation angle from the reference attitude. The second enclosure takes the first angular attitude. The second enclosure is also prevented from further rotating in the second direction opposite to the first direction beyond the second rotation angle from the reference attitude. The second enclosure takes the second angular attitude. The displaying unit indicates either of the first and second directions at least when the second enclosure takes the first angular attitude. The displaying unit in this manner enables the user to easily recognize an acceptable direction for the rotation of the second enclosure.
US07663867B2 Secondary circuit terminal block design for fixed type circuit breakers
A circuit breaker apparatus is provided and includes a circuit breaker, having a housing surface perpendicular to a plane of a front side of the circuit breaker and internal components, a terminal block structurally coupled to the housing surface, first terminal housings arrayed on the terminal block to each support first components and to be receptive of second terminal housings each of which supports second components, at least some of which are electrically coupled to the internal components, to be electrically coupled to at least some of the first components, and an access block. The access block is disposed on the terminal block and has apertures defined therein to provide for front-side access to the first terminal housings.
US07663866B2 Remote control duo power set
A remote control duo power set comprises one first power outlet which has one first housing, a plurality of first sockets being set on one surface of said first housing, a power cord extending from one side of said first housing; one connecting cord of which one end is connected to the other side of said first housing; and one second power outlet, which is connected to the other side of said connecting cord and has one second housing, a plurality of second sockets and at least one power switch being provided at a side of the second housing. User can easily supply power to the electronic devices by said second power outlet. Furthermore, users can also easily control the supply of power by said power switch.
US07663865B2 Electrolytic capacitors comprising means in the form of a multilayer polymeric sheet for the sorption of harmful substances
Electrolytic capacitors are provided having an airtight housing, electrodes immersed in an electrolytic solution, electrical contacts connected to the electrodes, and a device for sorption of harmful substances. The device is made of a multilayer polymeric sheet (10), which is formed of an inner layer (12) of polymeric material, containing particles of one or more getter materials (11) for sorption of the harmful substances, and at least one protective layer (13) of a polymeric material impermeable to the electrolyte. All of the polymeric materials are permeable to the harmful substances.
US07663861B2 Semiconductor device and method of manufacturing the semiconductor device
An MIM capacitance element (capacitance lower electrode, capacitance insulation film and capacitance upper electrode) is provided on a first insulation film on a semiconductor substrate. An interlayer insulation film is provided so as to cover the MIM capacitance element and flattened. The interlayer insulation film is provided with a first connection plug connected to the capacitance upper electrode, a first wiring layer, and a second wiring layer. A second insulation film is provided on the interlayer insulation film. The second insulation film is provided with first and second openings. A wiring pull-out portion which connects the first connection plug and the second wiring layer to each other is provided on the second insulation film.
US07663859B1 Electrostatic footwear
Electrostatic footwear in the form of a cover with a sole and an upper having an opening to receive the foot or shoe of a user. The opening may be provided with elastic or an elastic cuff for retention about the user. The cover may be worn over the foot or the shoe of a user. The cover has an excess electrical charge to attract particulate matter including but not limited to dust, dirt, pollen, and dander. The electrostatic charge causes the particulate matter to be drawn and held thereon as the user moves about. The sole may include anti-skid material over a limited portion thereof to prevent the user from sliding or slipping.
US07663857B2 Load driver circuit and ignition device using the same
A protection circuit can be prevented from malfunctioning due to the parasitic operation attributable to the unstable base potential of a transistor. In one embodiment, the protection circuit can be constituted by a reverse transistor system where the bases of transistors are connected to the collectors so that bases and collector potentials are the same. With the above configuration, the base potential is stabilized, and even if a parasitic potential is applied to the base as noise, malfunction associated with transistors turn on due to parasitic operation can be prevented. Since the base potential is stabilized, the protection circuit transistors turn on with greater certainty when a surge current occurs such that the surge current is absorbed by the protection circuit and flows to GND.
US07663856B2 Spark gap comprising an optically triggered power semiconductor component
A surge protector (1) has a spark gap (2) that is provided with two opposite electrodes (3), a circuit (5) for triggering the spark gap (2), and a light source connected to a protective device (13) on ground potential in order to generate a triggering light which can be delivered with the aid of at least one optical waveguide (15) of a receiver unit of the triggering circuit (5), the spark gap (2) and the triggering circuit (5) being on a high voltage potential. In order to make the surge protector (1) reliable and inexpensive, the receiver unit is provided with at least one power semiconductor component (16) that can be moved, with the aid of the triggering light, from a locked position in which current conduction via the power semiconductor component (16) is interrupted into an open position in which current conduction via the power semiconductor component (16) is made possible.
US07663853B2 On-chip latch-up protection circuit
An on-chip latch-up protection circuit. The lath-up protection circuit includes a core circuit, a power switch, and a current extractor. The power switch controls major current flowing through the core circuit. The current extractor detects amplitude of the major current. The power switch, the core circuit and the current extractor are coupled in series between a relatively-high power line and a relatively-low power line. When the major current surpasses a predetermined amplitude, the power switch is turned off, causing latch-up stops.
US07663846B2 Magnetoresistive sensor having an enhanced lead overlay design and shape enhanced pinning
A magnetoresistive sensor having a lead overlay defined trackwidth and a pinned layer that extends beyond the stripe height defined by the free layer of the sensor. The extended pinned layer has a strong shape induced anisotropy that maintains pinning of the pinned layer moment. The extended portion of the pinned layer has sides beyond the stripe height that are perfectly aligned with the sides of the sensor within the stripe height. This perfect alignment is made possible by a manufacturing method that uses a mask structure for more than one manufacturing phase, eliminating the need for multiple mask alignments. The lead overlay design allows narrow, accurate trackwidth definition.
US07663845B2 Current-perpendicular-to-plane magneto-resistive element including multilayer lower magnetic shielding film
A current-perpendicular-to-plane magneto-resistive element includes a magneto-resistive film and a pair of upper and lower magnetic shielding films holding the magneto-resistive film therebetween for current feeding. The lower magnetic shielding film has an at least two-layer structure including a crystalline material layer and an amorphous material layer disposed below the crystalline material layer.
US07663844B2 Actuator arm with arm hole to improve dynamic characteristics and actuator assembly having the same
An actuator assembly usable un a hard disk drive includes an actuator arm having an arm hole to improve dynamic characteristics. The actuator arm of the actuator assembly has an arm hole having first, second, and third extended portions, and two members positioned at both sides of the arm hole. The first extended portion is formed at an edge positioned at a leading end of the arm hole so that each of leading ends of the two members has a first reduced width, the second extended portions are formed at edges positioned at a rear end of the arm hole so that each of rear ends of the two members has a second reduced width, and the third extended portions are formed at both sides of a middle portion of the arm hole so that each of middle portions of the two members has a third reduced width. The third width is smaller than the second width and larger than the first width, so that a displacement of a read/write head in a major resonance mode is minimized, a bandwidth for position control of the read/write head is widened, and a position error signal is decreased when the hard disk drive operates.
US07663840B2 Storage apparatus having a recording medium with a thermal insulation barrier
A method for fabricating a patterned recording medium includes providing a workpiece with a non-magnetic substrate and at least one overlying magnetic layer, laminating a thermal insulation barrier partially in a soft under layer of one of the at least one magnetic layers and forming a topographical pattern including a plurality of trenches in the soft under layer. Blocks of track triplets are formed between adjacent trenches that are magnetically and thermally insulated from other adjacent blocks of track triplets.
US07663834B2 Data sector phase correction method and disk drive apparatus using the same
A method to correct a phase of a data sector due to rotational slip of a disk includes measuring a difference in the phase of a servo sector between a plurality of disks and adjusting an amount of cylinder skew of a logical data sector between the plurality of disks based on the measured difference in the phase of a servo sector between the plurality of disks.
US07663831B2 Reproduction device and method, recording medium, and program
The present invention relates to a reproducing apparatus which, in a case where a burst error has occurred, corrects an error preceding a synchronization pattern detected thereafter to have less errors. A bit slip judging section 81 in a bit slip correcting section 53 calculates a bit slip correction amount and a bit slip correction position on the basis of phase error signals detected by a phase error detecting section 51, synchronization pattern signals detected by a synchronization detecting section 52, reproduced clocks and detected data. A FIFO control section 82 controls a FIFO buffer 83 on the basis of the bit slip correction amount and the bit slip correction position, to perform bit slip correction. As a result, in the case where a burst error has occurred, an error preceding a synchronization pattern detected thereafter is corrected, whereby an error reduction can be implemented. The present invention is applicable to a reproducing apparatus.
US07663830B2 Method of forming servo data of HDD and self servo write method using the same
A method of forming servo data, and a self-servo write method using the same, the method including partial response maximum likelihood (PRML)-coding servo data into m bits in n-bit units; multiplying each bit of the PRML-coded result by an o multiple; and converting a bitsream obtained in the multiplying to ((m/n)−p) bits in m/n-bit units.
US07663827B2 Method of initializing perpendicular magnetic recording medium, perpendicular magnetic recording medium and magnetic recording apparatus
The present invention provides a method of initializing a perpendicular magnetic recording medium in which a magnetic field having a magnetic field strength Hex is applied to a perpendicular magnetic recording medium having a magnetic layer having a coercive force Hc to initialize the magnetic layer, the method comprising the steps of: controlling a magnetic field strength HexP in a direction parallel to the medium surface of the magnetic field so that HexP>1.3×Hc; and controlling a magnetic field strength HexV in a direction perpendicular to the medium surface of the magnetic field so that HexV
US07663819B2 Lens barrel assembly of camera module and laser apparatus for assembling the same
A lens barrel assembly of a camera module and a laser apparatus for assembling the lens barrel assembly are provided. The lens barrel assembly of a camera module includes: at least one lens; a barrel provided with a lens exposing hole having a predetermined size which is formed to penetrate a central portion of a closed upper surface of the barrel, wherein the lens is inserted from an lower opening of the barrel toward the lens exposing hole; and a stopping protrusion which is formed by fuse-securing a fused material on a boundary region between an outer circumference of the lens and an opened inner surface of the barrel by illumination of a laser beam on the opened inner surface of the barrel.
US07663818B2 Voice coil type lens drive assembly
By maintaining a relative position of coils of a movable unit with respect to fixed magnets in a normal state to stabilize a relative position of the movable unit with respect to the whole of a lens drive assembly, the lens drive assembly is provided as an assembly capable of adjusting the focus of a lens in a satisfactory manner. In a voice coil type lens drive assembly for adjusting the focus of a lens, a spring 6, a yoke 6 with magnets 5 and a movable unit M1 attached thereto, and electrically conductive springs 2, are accommodated in this order on a base 1 and a connecting portion of a cover frame 8 and that of the base 1 are connected together to unite the two components. At the same time, cut-in portions 6d formed in end portions of the yoke 6, which is a metallic yoke, are fitted on projections 1e of the base 1 and both are joined together with connections to the cover frame 8 as guide.
US07663812B2 Lens module with spacer
A lens module comprises a first lens, a second lens, a spacer, an adhesive and a lens barrel. The spacer is sandwiched between the first lens and the second lens, and includes a first surface, an opposite second surface, a lateral surface, a through hole and a plurality of cutouts. The lateral surface interconnects the first surface and the second surface. The through hole is defined in a central portion of the spacer. The cutouts are defined in the lateral surface. The adhesive is applied in the cutouts and interconnects the first lens with the second lens. The lens barrel receives the first lens, the second lens, the adhesive and the spacer therein.
US07663810B2 Lens barrel and method for manufacturing the same
To provide a lens barrel having an improved assembly accuracy. The lens barrel is provided with: a stationary part; a movable part provided movably relative to the stationary part, its movement moving a lens relative to the stationary part; a rotary member to transfer to the movable part a driving force for moving the movable part relative to the stationary part; and a supporting part provided integrally with the stationary part to support a rotary axis of the rotary member.
US07663808B2 Zoom lens, imaging device, and personal digital assistant
The invention provides a zoom lens including at least a first lens group having a positive refracting power, a second lens group having a negative refracting power, a third lens group having a positive refracting power, in order from an object side, and an aperture stop between the second lens group and the third lens group, wherein, in changing magnification from a wide angle end toward a telephoto end, at least the first lens group and the third lens group move toward the object side so as to increase a spacing between the first lens group and the second lens group, and to decrease a spacing between the second lens group and the third lens group.
US07663806B2 Projection lens and projection type display device using the same
A projection lens includes, in order form a magnification side: a first lens group having negative refractive power; and a second lens group having positive refractive power. An aspheric lens is arranged on the most magnification side of the first lens group. The conditional expressions 3
US07663803B2 Laminated diffraction optical element
A multi-layered diffraction optical element, comprises a transparent substrate, a first layer having a diffraction grating shape at least on one face and comprised of a relatively high refractive index and low dispersion material, and a second layer having a diffraction grating shape at least on one face and comprised of a relatively low refractive index and high dispersion material, wherein the first and second layers are laminated on the transparent substrate so that the respective diffraction grating shapes are mutually opposed to each other with no space therebetween, and, the first layer is comprised of a first organic resin including a first inorganic fine particle, and the second layer is comprised of a second organic resin including a second inorganic fine particle different from the first inorganic fine particle.
US07663797B2 Multicolor display element
Multicolor display elements are disclosed that are adapted to full color electric papers, which comprises a display electrode, counter electrode, electrolyte, and display layer, wherein the counter electrode is disposed oppositely to the display electrode, the electrolyte is filled into a space provided between the display electrode and the counter electrode, the display layer is disposed on the surface, which faces the counter electrode, of the display electrode, the display layer contains plural electrochromic compositions in a condition that the plural electrochromic compositions are separated into plural layers within the display layer or are mixed together within the display layer, and at least one of threshold voltage for coloring condition and threshold voltage for decoloring condition, or at least one of charge amount required for coloring into a sufficient color density and charge amount required for sufficiently decoloring, are substantially different each other between the plural electrochromic compositions.
US07663796B2 Electric-field-driving reflective display apparatus
An electric-field-driving reflective display apparatus is provided. The electric-field-driving reflective display apparatus includes a barrier wall which has a plurality of driving grooves and first and second surfaces, a reflecting member which is disposed within the driving groove and has an electric charge, a first electrode which is disposed on the first surface of the barrier wall, and a second electrode which is disposed on the second surface of the barrier wall, wherein areas of cross sections of each driving groove parallel to the first and second surface are equal to each other.
US07663789B2 Method of printing security documents
A method of providing a security document having a security feature includes creating the security document and determining an identity associated with the security document. The identity is then used to generate a digital signature of at least part of the identity. Coded data is generated including a number of coded data portions, each of which is indicative of the identity of the security document and, at least part of the signature. The coded data is then printed on the security document.
US07663787B2 Document deciding apparatus, document reading apparatus, image forming apparatus and document deciding method
A document deciding apparatus includes: a light source; a light-quantity detection unit detecting a reference light quantity based on irradiation of the light source, and respective light quantities of plural colors based on reflection from or transmission through a document; a decision unit deciding whether the document is colorless or colored, in accordance with a predetermined criterion on the basis of the light quantities of plural colors detected by the light-quantity detection unit; and a control unit performing a control so as to alter the criterion of the decision unit or a value corresponding to the light quantities detected by the light-quantity detection unit, on the basis of a change of the reference light quantity detected by the light-quantity detection unit.
US07663786B2 Image-forming apparatus and method of controlling operations in automatic document feeder mode thereof
An image-forming apparatus having an Automatic Background Removal (ABR) function in an automatic document feeder mode and an operation control method thereof. The image-forming apparatus includes a first movement unit to move a document loaded in a document tray from a first position to a second position; a second movement unit to move a carriage containing a light source from the first position to the second position; an image processing part to process an image of the document into predetermined image data; and a control part to control the image processing part to process an image of a specific portion of the document read out by the carriage fixed at the first position and to process an entire image of the document read out by the carriage fixed at the second position in use of a predetermined contrast equalization pattern selected based on a image processing result of the specific portion. The present general inventive concept can adjust the movements of the carriage and a document to perform the Automatic Background Removal function in the automatic document feeder mode to read out the image of the document with the document moving while the light source is fixed.
US07663784B2 Method of storing and displaying photos on a digital photo frame
A method of storing and displaying photos on a digital photo frame is provided. The digital photo frame has a photo-sized display screen rotatably mounted on a support such that the display screen is configurable in landscape-viewing or portrait-viewing orientations by rotation of the screen. The method comprises the steps of: (i) storing photo image files tagged as either landscape orientation or portrait orientation in an internal memory of the digital photo frame; (ii) receiving an instruction to display photos stored in the internal memory; (iii) determining an orientation of the display screen; (iv) retrieving only photo image files from the internal memory that are tagged with an orientation corresponding to the orientation of the display screen; and (v) displaying the retrieved photo image files as photos on the display screen.
US07663771B2 Control method and device, and method for setting up a control system
A device is used for controlling an installation that is comprised of several units. A common control system, that is provided with a central data memory, in which current real values and/or set points are filed as process variables for several units, is allocated to several of these units. The data memory encompasses a storage area for the process variables. The data structure of this storage area can be configured even by using a set of data that describes the projected installation.
US07663767B2 Apparatus and method for measuring displacement, surface profile and inner radius
An apparatus and a method are proposed for measuring displacement, surface profile and roughness of a moving object or an inner radius of a hollow cylinder. The apparatus includes a light emitting unit, a light dispersing unit for receiving light from the light emitting unit and focusing rays with different wavelengths into different focal points with different intervals, and a wavelength measuring unit for measuring wavelengths of the rays. When the moving object is moving within a dispersing range of the focal points, the rays with different wavelengths are reflected or scattered, and the displacement of the moving object is learned from variation of the wavelengths being measured by the wavelength measuring unit. Given that a reflecting component is disposed in the centre of an inner circle of the hollow cylinder, the inner radius of the hollow cylinder can be measured by the principle of the apparatus for measuring displacement.
US07663765B2 Refractive-index measurement system and method for measuring refractive-index
A refractive-index measurement system includes a light source, a first beam splitter, a first reflective mirror, a second reflective mirror, a second beam splitter, a container, a first polarizer, and a second polarizer. The first beam splitter splits light emitted from the light source into first and second light beams. The first light beam and the second light beam are reflected by the first reflective mirror and the second reflective mirror, respectively, incident into the second light beam splitter. The container is positioned along an optical pathway of first light beam. The container accommodates a lens and is filled with a medium having a refractive index substantially the same as a theoretical refractive index of the lens. The first polarizer is positioned along the optical pathway of the first light beam. The second polarizer is positioned along an optical pathway of the second light beam.
US07663763B2 Semiconductor solid-state laser gyro having a vertical structure
A laser gyro includes a semiconductor medium and assembled discrete elements, thus offering the possibility of producing large cavities for achieving the desired precision. More precisely, the laser gyro includes an optical ring cavity and a semiconductor amplifying medium with an external cavity having a vertical structure. The semiconductor amplifying medium which is used in reflection includes a stack of plane gain regions that are mutually parallel, and the dimensions of the cavity being substantially are larger than those of the amplifying medium.
US07663761B2 Beam analyzing system and method for analyzing pulsed particle or laser beams
The present invention relates to a beam analyzing system and a method for analyzing pulsed particle or laser beams. The inventive beam analyzing system comprises a detector unit, a unit for generating a pulsed reference laser beam, a first electro-optical modulator and a first read-out photo detector, wherein the optical input of the first electro-optical modulator is connected with the unit for generating a pulsed reference laser beam, wherein the optical output of the first electro-optical modulator is connected with the first readout photo detector and wherein the signal input of the first electro-optical modulator is connected with the detector unit. In the inventive method for analyzing a pulsed particle or laser beam first voltage pulses are generated by means of a detector unit, the intensity of a pulsed reference laser beam is modulated by the first voltage pulses, the intensity of the modulated reference laser pulses is measured and the phasing of the first voltage pulses relative to the reference laser pulses is deduced from the intensity of the modulated reference laser pulses.
US07663759B2 Displacement sensor
An image taken by an imaging device is displayed on a display unit. When a confirmation instruction is inputted through an input unit, image teaching is performed while the image displayed on the display unit is set to a setting object image. A measurement item which is of a candidate of a measurement process including specification of a reference position is displayed as the measurement process to accept selection. Specification of cutout area which constitutes one measurement target region is accepted, a measurement point including a local region or a feature point which is used for the measurement is automatically set in the measurement target region based on pieces of information on the set measurement process and reference position.
US07663754B2 Fluid flow visualization and analysis
This document discusses, among other things, systems, devices and methods for fluid flow analysis for example, in an education environment. The light source, for example, a laser, is housed to illuminate particles in a fluid while minimizing exposure to the user. A control unit is provided that is remote from the fluid flow device. The fluid flow device further includes a removable fluid obstacle such that different fluid flow effects can be obtained.
US07663753B2 Apparatus and methods for detecting overlay errors using scatterometry
Disclosed are techniques, apparatus, and targets for determining overlay error between two layers of a sample. Target A is designed to have an offset Xa between its first and second structures portions; target B is designed to have an offset Xb; target C is designed to have an offset Xc; and target D is designed to have an offset Xd. Each of the offsets Xa, Xb, Xc and Xd is preferably different from zero; Xa is an opposite sign and differ from Xb; and Xc is an opposite sign and differs from Xd. The targets A, B, C and D are illuminated with electromagnetic radiation to obtain spectra SA, SB, SC, and SD from targets A, B, C, and D, respectively. Any overlay error between the first structures and the second structures is then determined using a linear approximation based on the obtained spectra SA, SB, SC, and SD.
US07663750B2 Two-dimensional spectral imaging system
Systems, including methods, apparatus, and algorithms, for spectrally imaging a two-dimensional array of samples.
US07663749B2 Method and system to measure the concentration of constituent elements in an inhomogeneous material using LIBS
A system and method to improve the accuracy of the measure of constituent element(s) in a sample containing domains potentially including the constituent element(s) are described herein. For each domain, the volume of the domain is estimated and the concentration of the constituent element(s) in the domain is determined using LIBS. When all the domains have been analyzed, the volumetric concentration of the domains is summed and divided by the total volume of the sample. Accordingly, by limiting the concentration analysis to separate domains, it is possible to improve the accuracy of the concentration analysis.
US07663745B2 Plural light source and camera to detect surface flaws
A method for detecting specular surface flaws on a coated substrate includes impinging visible non-integrated electromagnetic radiation from a first source onto the coated substrate, reflecting the visible non-integrated electromagnetic radiation off the coated substrate into a first photosensitive device, forming a recorded high frequency surface flaw image, and impinging visible coherent electromagnetic radiation from a second source onto a coated substrate at an oblique angle. The visible non-integrated electromagnetic radiation and the visible coherent electromagnetic radiation on the coated substrate are collocated but not combined on the substrate. The visible coherent electromagnetic radiation is reflected off the coated substrate onto a screen material to form a low frequency surface flaw image. The low frequency surface flaw image is recorded to form a recorded low frequency surface flaw image.
US07663744B2 Integrating photometer for measuring total flux of light generated from light source to be measured, and method for measuring total flux of light through use of the same
A mirror is provided with a light source window and an illumination window each establishing communicative connection between an inner face side and an outer side of a hemispherical unit. The light source window is an opening to which a light source OBJ to be measured is attached mainly. The illumination window is an opening for guiding a flux of light from a correcting light source used for measurement of self-absorption toward the inner face of the hemispherical unit. A self-absorption correcting coefficient of the light source OBJ is calculated based on an illuminance by a correcting flux of light in a case where the light source to be measured OBJ in a non-light emitting state is attached to the light source window and an illuminance by a correcting flux of light in a case where a calibration mirror is attached to the light source window.
US07663736B2 Laser radar driving apparatus
A laser radar driving apparatus applying a laser beam to a target object and detecting the laser beam reflected and returned from the target object to measure a distance to the target object, at least comprising: an optical member that the laser beam is applied to; a main body member that the optical member is mounted to; and a coil capable of manipulating the main body member, a drive assembly being configured with mounting the optical member and the coil to the main body member.
US07663735B2 Microlithographic projection exposure apparatus with immersion projection lens
A microlithographic projection exposure apparatus includes an illumination system and a projection lens which images a reticle onto a photosensitive layer. The projection exposure apparatus further includes an immersion arrangement for introducing an immersion liquid into an immersion interspace between a last optical element of the projection lens on the image side and the photosensitive layer. A transmission filter is designed and arranged in the projection lens in such a way that rays which enter the immersion interspace from the last optical element at an angle of incidence α are attenuated more strongly the smaller the angle of incidence α is. The transmission filter may be arranged e.g. in a pupil plane of the projection lens and may have a transmittance which increases with increasing distance from an optical axis of the projection lens. In this way compensation is provided for angle-dependent absorption in the immersion liquid.
US07663734B2 Pattern writing system and pattern writing method
In a pattern writing method for writing a pattern on a substrate by the use of projection patterns output from a mirror device including two-dimensionally arranged micromirrors, exposure is implemented by ON/OFF controlling each micromirror and partly overlapping the projection patterns from the mirror device at least in a one-dimensional direction, thereby accurately controlling the exposure of intermediate amounts of light.
US07663733B2 Method of illuminating at least two illumination points
A method of illuminating at least two illumination points by means of at least one spatial light modulator, said at least one spatial light modulator comprising a plurality of light modulators, whereby a predefined amount of energy transmitted to said points is at least partly controlled by varying the number of said light modulators illuminating said point.
US07663731B2 System and method for manufacturing liquid crystal display panel, and liquid crystal display panel using the same
A method of processing substrates for a liquid crystal display panel includes providing a first loader having a first port and a second port, concurrently inputting and outputting first substrates between a cassette at the first port and a processing assembly, and, processing the first substrates in the processing assembly.
US07663723B2 In-plane switching mode liquid crystal display device and fabrication method thereof
A liquid crystal display device includes a first substrate and a second substrate; a gate line and a data line on the first substrate crossing each other to define a pixel region; a switching element in the pixel region; a black matrix formed along the gate line and the data line on the first substrate, the black matrix having a portion that covers an upper side of the gate line and extends into the pixel region; a color filter located at the pixel region; a common electrode and a pixel electrode located on the color filter for generating an electric field within the pixel region; and a liquid crystal layer formed between the first and second substrates.
US07663722B2 Optical element
An optical element including: an alignment substrate; a liquid crystal layer formed on the alignment substrate, made by forming and curing a film of a liquid crystalline material; and a protective layer having high hardness, formed on the liquid crystal layer. The protective layer is for protecting the liquid crystal layer from being deformed by externally exerted forces. Preferably, the protective layer has a modulus of elasticity (=(elastic deformation)/(total deformation)) of 0.6 or more and a plastic deformation of 0.5 μm or less as determined by pushing an indenter into the protective layer with a test force of 2 mN in accordance with the universal hardness test method. The optical element has the advantages that the film thickness distribution of the liquid crystal layer remains uniform even when forces are externally exerted to the optical element in the process of production of the optical element or in the course of incorporation of the optical element in a liquid crystal display, and that the optical element can maintain its high displaying quality even when incorporated in a liquid crystal display.
US07663721B2 Multi-domain vertical alignment liquid crystal display panel
A multi-domain vertical alignment liquid crystal display panel comprising a first substrate, a second substrate, a liquid crystal layer and a plurality of phase-compensating protrusions is provided. The second substrate is configured above the first substrate. The liquid crystal layer is formed between first substrate and the second substrate. The phase-compensating domain regulating protrusions are formed on at least one of the first substrate and the second substrate. The phase-compensating domain regulating protrusions have a plurality of anisotropic birefringence molecules. The slow-axes of the anisotropic birefringence molecules are in a different direction from the slow-axes of the liquid crystal molecules near the phase-compensating protrusions. Therefore, the plurality of anisotropic birefringence molecules can compensate for the phase retardation here, thereby improving the light leakage in the dark state.
US07663719B2 Liquid crystal display panel
A liquid crystal display panel structured such that a liquid crystal layer is held between paired electrode substrates, comprises a support base member of a nearly rectangular shape provided in at least one of the paired electrode substrates, a counter electrode supported by the support base member, and an alignment film which is located within a surface of the counter electrode in contact with the liquid crystal layer. The rubbing direction of the alignment film is parallel to one side of the support base member and the counter electrode has a nonlinear edge extending in the rubbing direction of the alignment film.
US07663714B2 Backlight device and color liquid crystal display apparatus
Disclosed is a backlight device used for a color liquid crystal display (LCD) apparatus. The red light, green light and blue light, generated by a light source, made up by a red light emitting diode (21R), a green light emitting diode (21G) and a blue light emitting diode (21B), respectively, are mixed together to generate white light. The red light has a half-value width hwr such that 15 nm≦hwr≦30 nm, and the green light has a half-value width hwg such that 25 nm≦hwg≦50 nm. The blue light has a half-value width hwb such that 15 nm≦hwb≦30 nm. The white light illuminates a transmissive color liquid crystal display panel (10) from its back side. The transmissive color liquid crystal display panel includes a color filter (19) made up by a tristimulus filter for wavelength-selecting and transmitting red light, green light and blue light.
US07663710B2 Liquid crystal display device of horizontal electric field type and fabricating method thereof
A liquid crystal display device of horizontal electric field type and a fabricating method thereof is provided.The liquid crystal display device includes a plurality of gate lines. Data lines cross in such a manner to insulate with the gate lines to define a pixel area. A first short preventive hole is arranged between a (n−1)th gate line and a (n)th gate line of the plurality of gate lines. And a bifarious pixel area is arranged between the (n)th gate line and a (n+1)th gate line of the plurality of gate lines.
US07663709B2 Electro-optical device, manufacturing method thereof, and electronic apparatus
An electro-optical device includes a plurality of pixel electrodes, storage capacitors which are provided below the plurality of pixel electrodes with an inter-layer insulating layer disposed therebetween and in which a lower electrode, a dielectric film, and an upper electrode are sequentially laminated, an extending section extending from the dielectric film, a first conductive film disposed above the extending section of the dielectric film, a second conductive film disposed below the extending section of the dielectric film, and a relay layer disposed above the first conductive film, formed of the same film as the plurality of the pixel electrodes, and electrically connecting the first conductive film to the second conductive film, wherein the plurality of pixel electrodes and the storage capacitors are provided in a pixel area on a substrate, and the extending section, the first conductive film, the second conductive film, and the relay layer are disposed in a peripheral area located around the pixel area.
US07663708B2 Multi-domain liquid crystal display
A multi-domain liquid crystal display includes a plurality of first and second picture elements and a plurality of first and second auxiliary electrodes. The first and second picture elements have opposite polarities under the same frame of an inversion drive scheme. The first auxiliary electrodes are connected to the first picture elements and at least partially surround each of the second picture elements, and the second auxiliary electrodes are connected to the second picture elements and at least partially surround each of the first picture elements.
US07663706B2 In-wall type multi-functional television set
An in-wall type multi-functional television set being embedded in the wall of home, accommodated and withdrawn from the wall. The in-wall type multi-functional television set includes a main body having an accommodating part provided at a front side of the main body, an input part with a plurality of input keys provided at a side of the main body, a television signal receiving circuit for receiving and outputting a broadcast television signal, speakers for outputting an audio signal received from the television signal receiving circuit, and a controller for controlling the in-wall type multi-functional television set, a monitor, accommodated in and withdrawn from the accommodating part of the main body, for displaying the video signal received from the television signal receiving circuit, and a connecting part having an end portion connected to the accommodating part and the other end portion connected to the monitor.
US07663699B2 Television unit
Disclosed herein is a television unit including a thin platelike display unit, a stand for rotatably supporting the display unit, and a speaker. The stand has a mounting portion adapted to be mounted at a suitable position and a swiveling portion rotatably connected to the mounting portion for supporting the display unit. The speaker is provided in the swiveling portion of the stand.
US07663698B2 Genlock device having log and alarm functions
A genlock device comprises: means (31) for inputting an external reference signal; means (32,33,34,36,39,40,41,42,44) for generating a master reference clock signal synchronized in phase with the external reference signal; and means (37) for storing a genlock state. The genlock state includes, for example, absence of a synchronization signal in the external reference signal. The genlock device can further comprise: means (45) for storing a voltage value determined so that a voltage controlled oscillator (40) oscillates a signal having a frequency higher or lower by a predetermined value than a reference frequency of the voltage controlled oscillator; and means (44) for judging whether a voltage value which controls the voltage controlled oscillator is larger or smaller than the voltage value.
US07663689B2 Method and apparatus for optimizing capture device settings through depth information
A method for adjusting image capture settings for an image capture device is provided. The method initiates with identifying a scene. Then, an image of the scene is captured. The method includes generating a depth mask of the scene from data defining the image of the scene. Then, pixel values corresponding to objects within any one or both of a foreground region and a background region of the captured image are adjusted based upon bit values of the depth mask. An image capture device and a system are provided.
US07663687B2 Variable speed, variable resolution digital cinema camera system
A digital cinema camera includes a plurality of imagers and a plurality of shutters mounted radially on a frame. A beam splitter disposed at a center of the frame rotates to provide an input optical beam sequentially to the plurality of imagers. When the input optical beam is aligned with a particular one of the imagers, a corresponding one of the shutters is triggered to apply the optical beam on the particular one of the imagers. The electrical signals generated by the imagers are first stored in RAM, and then transferred to a hard disk drive disposed in a removable magazine. This way, the magazine can be replaced with a new magazine, and the latent image data can be downloaded out of the removed magazine for post-processing while new image data is being stored in the new magazine.
US07663686B2 Lens module and camera employing the same
A lens module includes a barrel defining a through hole, at least one plastic lens accommodated in the through hole and a UV/IR cut filter mounted on the barrel and configured for preventing entry of both UV light and IR light into the barrel. The lens module has a UV/IR cut filter mounted on the barrel configured for preventing entry of both UV light and IR light into the barrel, so it can prevent UV light damaging plastic lenses, and accordingly can improve the useful life of the lens module.
US07663683B2 Solid state image sensing device which performs a linear conversion operation and a logarithmic conversion operation
A solid state image sensing device includes an MOS transistor T2 that has a source thereof connected to a drain of an MOS transistor T1 being provided with a transfer gate which is connected to an embedded photodiode PD; an MOS transistor T5 that has a gate thereof connected to the drain of the MOS transistor T1; and a condenser that has a source thereof connected to the MOS transistor T5. When a linear conversion operation is performed in an entire range of luminance, the MOS transistor T2 works, serving as a switch for resetting, and at least when a logarithmic conversion operation is performed in a part of the range of luminance, the MOS transistor T2 works in a sub-threshold region.
US07663674B2 Image processing device supporting variable data technologies
A method for processing image data using a digital camera includes providing a digital camera having a first transformation program as a default program, the first transformation program supporting a first transformation technology. A first communication link is formed between the digital camera and a first remote image processing device. Transformation-related information is obtained from the first remote device, the transformation-related information including information about one or more transformation technologies supported by the first remote device. Whether the first transformation program is supported by the first remote device is determined. A second transformation program supported by the first remote device is searched if the first transformation program is determined not to be supported by the first remote device, the second transformation program supporting a second transformation technology.
US07663672B2 Image pickup apparatus and recording control apparatus
In an electronic camera, an image file can be erased, and when the image file is erased, a state of notification to the user is changed in accordance with the data attached to an image. In the electronic camera, the data attached to the image indicates whether or not the image file previously has been transferred from a storing area where the image is stored at present to another storing area.
US07663671B2 Location based image classification with map segmentation
In methods and systems for classifying capture records, such as images. A collection of capture records is provided. Each capture record has metadata defining a map location. This metadata can be earlier determined from a stream of data transmissions, even if there are gaps in transmission. The provided capture records are clustered into groups based on capture locations. A map, inclusive of the capture locations, is segmented into a plurality of regions based on relative positions of the capture locations associated with each group. The regions are associated with the capture records of respective groups.
US07663670B1 Methods and systems for embedding camera information in images
The present invention is related to providing, in association with an image, information related to the image capture device used to capture the image. In one embodiment, information related to a first static camera characteristic and camera setting information related to a first captured digitized image is embedded in the first captured digitized image using a watermark. The watermarked information may be used to identify the source or owner of the picture, and/or to aid in the more accurate reproduction of the image.
US07663668B2 Imaging device
An imaging device has color signal generating means (20) for outputting first color signals (R5, G5, B5) corresponding to incident light, and matrix operation means (67) for performing a matrix calculation including multiplication of the first color signals, color signals obtained by raising the first color signals to a power with a first constant (i) as an exponent, color signals obtained by raising the first color signals to a power with a second constant (j) as an exponent, and corresponding matrix coefficients to obtain second color signals (R6, G6, B6). The first and second constants and the matrix coefficients are determined so that the total characteristics of the color signal generating means and the spectral sensitivity characteristic correction means (6) approximate human chromatic curves or spectral sensitivity curves obtained by a linear transformation thereof. Good color reproducibility can be obtained without the use of an infrared cut filter for chromatic correction in the imaging device, and high-sensitivity imaging can be performed under dark conditions.
US07663662B2 High and low resolution camera systems and methods
Systems and methods provide high and low resolution cameras. For example, in accordance with an embodiment of the present invention, a camera system provides wide and narrow fields of view simultaneously. An operator may select different views to be provided by the camera system (e.g., a wide field of view, a narrow field of view, or the combination of the wide and narrow field of views).
US07663661B2 Feed-customized processing of multiple video streams in a pipeline architecture
A pipeline architecture for analyzing multiple streams of video is embodied, in part, in a layer of application program interfaces (APIs) to each stage of processing. Buffer queuing is used between some stages, which helps moderate the load on the CPU(s). Through the layer of APIs, innumerable video analysis applications can access and analyze video data flowing through the pipeline, and can annotate portions of the video data (e.g., frames and groups of frames), based on the analyses performed, with information that describes the frame or group. These annotated frames and groups flow through the pipeline to subsequent stages of processing, at which increasingly complex analyses can be performed. At each stage, portions of the video data that are of little or no interest are removed from the video data. Ultimately, “events” are constructed and stored in a database, from which cross-event and historical analyses may be performed and associations with, and among, events may be made.
US07663658B2 Image forming apparatus to carry out position determination of a rotating body
An image forming apparatus includes a plurality of image carrier units and a position determining unit. The image carrier units form toner images in a sequential manner, and each of the plurality of image carrier units includes an image carrier and a supporting member to support the image carrier. The position determining unit includes a holding member having a plurality of openings for receiving the supporting members of the respective image carriers and a pressure mechanism. Each of the plurality of openings has a predetermined shape to sustain a weight of a corresponding one of the plurality of image carrier units through a corresponding one of the supporting members in a vertical direction and to grip the corresponding one of the supporting members in a horizontal direction. The pressure mechanism presses the supporting members held through the plurality of openings of the holding member to fix the image carriers at respective specific positions.
US07663655B2 Light-emitting device and image forming apparatus
A light-emitting device has a plurality of pixel circuits arranged in one direction, each of the plurality of pixel circuits having a light-emitting element that emits light according to the amount of driving current, a driving transistor that supplies the driving current to the light-emitting element, a holding transistor that supplies a data signal supplied via a data line to the driving transistor, and a connecting line that connects the driving transistor to the holding transistor. The holding transistor, the light-emitting element, and the driving transistor are arranged in a direction crossing the arrangement direction of the plurality of pixel circuits. The light-emitting element is provided between the holding transistor and the driving transistor.
US07663654B2 Image formation device and method for correcting periodic variations
An image-forming device which is equipped with an image-holding member, an exposure section provided with plural light-emitting portions arranged in a first direction, a movement section that relatively moves the exposure section and the image-holding member in a second direction that intersects with the first direction, and a light-emission control section. The light-emission control section causes the plural light-emitting portions to periodically emit light in accordance with image data representing an image that is to be formed on the image-holding member, to form the image on the image-holding member. The light-emission control section varies a light-emission period during formation of the image, so as to correct for periodic fluctuations within the image of at least one of density and magnification ratio in the second direction.
US07663653B2 Optical head and image forming apparatus incorporating the same
An optical head is adapted to form an electrostatic latent image on an image carrier. A transparent substrate has a first face adapted to oppose the image carrier and a second face opposing the first face. An organic EL photo emitter is disposed so as to oppose the second face of the substrate. In the photo emitter, a light emitting layer is adapted to emit light irradiating the image carrier to form the electrostatic latent image. An electrode layer is laminated on the light emitting layer. A reflection reducer eliminates stray light generated when the light emitted from the light emitting layer is reflected by at least the electrode layer.
US07663647B2 Model based compositing
Digitally compositing an object from an input image onto a destination image is disclosed. The object is composited from an image having an arbitrary or non-uniform colored background containing some non-static elements onto a destination image with reduced effects from shadows cast by the object and with reduced gaps or holes within the object. The effect of shadows emanating from the object is reduced so that the composited object in the destination image contains only the object clearly outlined by the object's physical boundaries without the effect of shadows cast by the object.
US07663646B2 Device, system and method for realizing on screen display
A device for realizing on screen display (OSD) in video signals includes a comparator (430) and an outputting control unit (440). The comparator (430) is used for receiving OSD signals and identification signals on a background color selected to be transparent in the OSD signals, identifying the background color in the OSD signals based on the identification signals, and generating a control signal based on the identification. The outputting control unit (440) is connected to the comparator (430), and is used for receiving UV components of the OSD signals, UV components of the video signals, and the control signal, and for selectively outputting UV data of the video signals or UV data of the OSD signals according to the control signal. The device simulates translucent OSD by preparing the Y and UV components of displayable YUV signals respectively from the video signals and the OSD signals.
US07663643B2 Electronic album display system, an electronic album display method, and a machine readable medium storing thereon a computer program for displaying an electronic album
An electronic album display system for displaying a plurality of images included in an electronic album having an image storing unit for classifying each of the plurality of images into a plurality of groups and storing each image, an image selecting unit for selecting an image to be displayed, an image display unit for displaying the image selected, an operation unit for receiving a display operation for said image display unit controlled by a viewer when one image is being displayed, an interest detecting unit for detecting an interest of the viewer in the one image on the basis of the display operation received by the operation unit, and an interest storing unit for storing the interest for each of the plurality of images, wherein the image selecting unit selects an image classified in a group including an image in which the viewer has an interest based on the interest stored in said interest storing unit.
US07663642B2 Systems and methods for rendering a polygon in an image to be displayed
Polygon rendering systems for rendering a polygon in an image to be displayed include a rasterizer unit, a first memory buffer, and one or more additional memory buffers. The rasterizer unit is configured to generate one or more low resolution fragments representing a portion of the polygon at a low resolution and one or more high resolution fragments representing a portion of the polygon at one or more higher resolutions. The first memory buffer is configured to store the low resolution fragments as pixels. The first memory buffer is further configured to store data based on the one or more high resolution fragments. The one or more additional memory buffers are configured to store the high resolution fragments as high-resolution sub-pixels. Methods of rendering a polygon in an image to be displayed include generating one or more low resolution fragments that represent a portion of the polygon at a low resolution and one or more high resolution fragments that represent a portion of the polygon at one or more higher resolutions, storing the low resolution fragments as pixels and data based on the one or more high resolution fragments in a first memory buffer, and storing the high resolution fragments as high resolution sub-pixels in one or more additional memory buffers.
US07663634B2 Drawing processing apparatus and drawing processing method for multipass rendering
A drawing processing apparatus capable of executing a drawing processing program having conditional branches efficiently by multipass rendering. The drawing processing apparatus comprises arithmetic processing parts including an object input part, a primitive generating part, a raster part, a pixelation part, a distribution part, and a shader which constitute pipeline stages. The shader divides the program into and executes the same in a plurality of passes depending on conditional branches. The shader generates enable flags determining whether or not respective pixels satisfy branch conditions. The flag generating part generates bind enable flags which are the enable flags on the pixels bound into the processing granularities of the pipeline stages, and feeds back the same to the respective pipeline stages. The arithmetic processing parts in the individual pipeline stages refer to the bind enable flags and limit the submission of data not targeted for arithmetic processing in the branched passes.
US07663630B2 Apparatus and method for processing collision information in graphic system
An apparatus processes collision information in a graphic system, and includes a first storage unit for loading geometry information of primary and secondary object graphics inputted from outside, and outputting the geometry information of the primary object graphics and geometry information of a plurality of secondary object graphics in which a collision detection operation with the primary object graphics is to be performed; a transformer for transforming coordinates of the secondary object graphics to be coincided with a coordinate system that is based on the primary object graphics; a processor for acquiring a collision point, collision presence information, and a collision depth between the primary and the secondary object graphics simultaneously based on the geometry information of the inputted primary object graphics and that of each of the coordinate-transformed secondary object graphics by using a collision detection operation technique determined by the geometry information properties of the primary and the secondary object graphics; a second storage unit for storing the collision information separately, wherein the collision depths before/after update are stored in two areas separately; and an updating unit for updating the collision point and the collision presence information whenever they are newly outputted from the processor, wherein the collision depth is updated based on the result of comparison with the previously stored collision depth.
US07663628B2 Apparatus and method for efficient animation of believable speaking 3D characters in real time
An apparatus for animating a moving and speaking enhanced-believability, character in real time, comprising a plurality of behavior generators, each for defining a respective aspect of facial behavior, a unifying scripter, associated with the behavior generators, the scripter operable to combine the behaviors into a unified animation script, and a renderer, associated with the unifying scripter, the renderer operable to render the character in accordance with the script, thereby to enhance believability of the character.
US07663627B2 Graphic drawing program, method, and apparatus
A graphic drawing apparatus for drawing a graphic representation in which a plurality of evaluation objects are drawn by lines connecting scores with respect to a plurality of evaluation items executes a drawing-position adjusting to adjust drawing positions for each of the evaluation items where the scores of the evaluation objects are plotted with respect to each of the evaluation items so that the drawing positions do not overlap each other according to the scores of the evaluation objects with respect to an evaluation item.
US07663626B2 Method and apparatus for providing a network traffic composite graph
A method and apparatus for providing network traffic composite graphs for packet networks are disclosed. The graph enables analysts to visually determine the relative size of an event in relation to other traffic activity. For example, a user or a network analyst creates categories of applications for the river-chart graph and optionally enters a weight factor for each of the application categories. The method then gathers records for flows, number of bytes (or packets), etc. from monitoring device(s) in a predetermined interval. The expected values are determined and composite volumes are calculated for each protocol and/or port. The method then updates the cumulative river-chart bands and the cumulative expected values for historical and predicted time periods in the river-chart graph.
US07663625B2 Collaborative design
A method, system and apparatus for use in computer-aided design, computer-aided manufacturing, computer-aided engineering and product lifecycle management. An efficient, non-centralized communications framework makes “synchronous” collaborative design possible. Users are resident at workstations that are connected in a peer-to-peer arrangement. In a collaborative design session, the model is resident in memory at each workstation. Modifications are made at any workstation, and commands, which are interpreted at each workstation to effect the modifications, are transmitted over the network. In addition, cell descriptors may be used to identify one or more geometric cells of a model. The cell descriptors are in the form of scripts specifying constraints or filters for identifying cells. The constraints are based on characteristics of items in the model, or associations between items in a model, that are readily discernable to the user, and are therefore easily written and susceptible to easy distribution to other systems.
US07663622B2 Unified framework based on extensible styles for 3D non-photorealistic rendering and method of configuring the same
There are provided a unified framework based on extensible styles for 3D non-photorealistic rendering and a method of configuring the framework. The unified framework includes: 3D model data processing means for generating a scene graph by converting a 3D model input into 3D data and organizing the scene graph using vertexes, faces, and edges; face painting means for selecting a brusher to paint faces (interiors) of the 3D model using the scene graph; line drawing means for extracting line information from the 3D model using the scene graph and managing the extracted line information; style expressing means for generating a rendering style for the 3D model and storing the rendering style as a stroke, the rendering style being equally applied to a face-painting method and a line-drawing method; and rendering means for combining the stroke and the selected brusher to render the 3D model using both the face-painting method and the line-drawing method. The framework can be used to develop tools and new rendering styles for non-photorealistic rendering and animation.
US07663618B2 Power-efficient, pulsed driving of capacitive loads to controllable voltage levels
Power-efficient, pulsed driving of capacitive loads to controllable voltage levels, with particular applicability to LCDs. Energy stored in a portion of the capacitive load is recovered during a recovery phase. Time-varying signals are used to drive the load and to recover the stored energy, thus minimizing power losses, using processes named adiabatic charging and adiabatic discharging.
US07663616B2 Data driving circuit, organic light emitting diode display using the same, and method of driving the organic light emitting diode display
A data driving circuit for displaying an image with a desired brightness comprises: a current digital-analog converter for generating a gradation current corresponding to external data, and for receiving a first current corresponding to the gradation current from a pixel via a data line; a current control unit for receiving a pixel current from the pixel via the data line, and for selectively increasing and decreasing a level of the first current in accordance with the received pixel current; and a selection unit for selectively connecting the data line to either the current digital-analog converter or the current control unit. An organic light emitting diode and a method of driving same are similarly configured. With these configurations, an image is displayed with desired brightness.
US07663609B2 Touch input device
A touch input device for use with a display that shows a plurality of items. The touch input device is operated by a user to select an item shown on the display. The touch input device includes a sensor having an operation plane for touching by the user with a finger. The sensor generates a sensor signal indicating contact area of the finger with the operation plane. The operation plane is pressed by the finger when the user selects an item from the display. When an increase rate of the finger contact area over a predetermined time period becomes greater than an increase rate threshold, the touch input device determines that the operation plane of the sensor has been pressed by the user to select an item.
US07663606B2 Apparatus and method for configuring a touch screen
In a method for determining an operating frequency of a touch screen unit a first set of sinusoidal signals may be provided to a plurality of electrodes of a touch screen, each sinusoidal signal in the first set of sinusoidal signals having a first frequency, and a first value indicative of the amount of current flowing from the plurality of electrodes when the touch screen is not being touched by a person and when the first set of sinusoidal signals is provided to the plurality of the electrodes may be determined. A second set of sinusoidal signals may be provided to the plurality of electrodes of the touch screen, each sinusoidal signal in the second set of sinusoidal signals having a second frequency, and a second value indicative of the amount of current flowing from the plurality of electrodes when the touch screen is not being touched by the person and when the second set of sinusoidal signals is provided to the plurality of the electrodes may be determined. An operating frequency of sinusoidal signals to be provided to the plurality of electrodes may be determined based on the first value and the second value.
US07663605B2 Biomechanical user interface elements for pen-based computers
The present invention is a system that uses natural user position and natural user motion to position and layout interface elements for a pen-based computer display. Graphical user interfaces, such as a slider or menu, are popped-up at a position convenient to the user, such as at the current position of the cursor. A rectilinear interface is oriented along a natural motion arc of the user, such as an elbow arc. An arc shaped interface can also be positioned along a natural motion arc, such as the elbow arc, and be shaped according the elbow are or be shaped by another natural motion arc such as a wrist arc of the user. The interface arc, whether shaping or orienting the interface, can be a single motion arc, such as an elbow arc, a composite arc of an elbow arc and a wrist arc, a sequence of an elbow arc and a wrist arc, a compound arc where an elbow arc blends into a wrist arc or an arc followed by a linear interface section.
US07663602B2 Removable wireless keyboard with base
Keyboard input functionality is provided when a removable portion of the keyboard is docked into the base unit. The removable portion may be the undocked from the base unit. A keyboard removable portion may include alphanumeric functionality and may be of a reduced size for off-desk implementation. Since the base of the keyboard may be wired, it may also charge the removable portion of the keyboard. The base may also include the wireless receiver for cooperating with a wireless keyboard or wireless mouse.
US07663600B2 Dead front mouse
A mouse configured to display an icon including a top housing that is semi-opaque; and an icon indicator disposed under the top housing, the icon indicator including a light source and an icon plate. The light source is configured to light the icon plate to display an icon through the top housing. The icon indicator and icon are substantially not visible through the top housing if the light source is not lighted.
US07663599B1 Driving circuit for LED backlight system
A driving circuit for an LED backlight system is disclosed. The driving circuit includes an input voltage, an input resistor, an operational amplifier, a first transistor and a current calculation unit. The operational amplifier has a positive input terminal electrically connected to the input voltage through the input resistor, and an output terminal electrically connected to its negative input terminal thorough a feedback network. The first transistor is utilized for draining a reference current to control an output voltage of the operational amplifier according to the input voltage and the input resistor. The current calculation unit is utilized for generating a plurality of working currents proportional to the reference current to drive a plurality of LED strings according to the output voltage of the operational amplifier.
US07663596B2 Trans-reflective liquid crystal display device for improving color reproducibility and brightness and method for driving thereof
The trans-reflective liquid crystal display device of this invention includes a plurality of data and gate lines defining a plurality of pixels, the pixels having a reflection region and a transmission region; a timing controller that receives, converts, and outputs image data; a switching unit that determines the output signal of the timing controller according to a transmission mode or reflection mode; a gate driver that receives a gate signal from the timing controller; a data driver that receives a data signal from the timing controller; a liquid crystal display panel with a TFT array substrate and a color filter substrate, the liquid crystal display panel displaying the image according to a gate pulse and a data voltage applied by the gate driver and the data driver; a sequential backlight including red, green, and blue lamps wherein, the backlight is turned on in a transmission mode to sequentially transmit the light into the transmission region and is turned off in a reflection mode.
US07663595B2 Common voltage adjusting circuit for liquid crystal display
A common voltage adjusting circuit (200) includes a delta adder (21), a sigma adder (22), a sigma latch (23), and a quantization circuit (24). The delta adder includes a first input terminal configured for receiving a binary signal, a second input terminal, and an output terminal. The sigma adder includes a first input terminal connected to the output terminal of the delta adder, a second input terminal, and an output terminal. The sigma latch includes a first input terminal connected to the output terminal of the sigma adder, and an output terminal connected to the second input terminal of the delta adder and the second input terminal of the sigma adder. The quantization circuit includes a first input terminal connected to the output of the sigma latch, and an output terminal connected to a common electrode of a TFT-LCD.
US07663594B2 Liquid crystal display device with charge sharing function and driving method thereof
A liquid crystal display device with a charge sharing function is suitable for reducing the power consumption below a predetermined limit. In the liquid crystal display device, a pair of pixels adjacent along the data line is charged with pixel data voltages of polarity opposite to that of another pair of pixels adjacent to the pair of the pixels. A charge sharing unit selectively allows the data lines to share charges at intervals between periods in which the pixel data voltages are supplied to the pair of the pixels adjacent along the data line.
US07663592B2 Systems involving signal driving circuits for driving displays
Systems for driving displays are provided. In this regard, an representative system for driving a display comprises a signal driving circuit having a first shift register and a second shift register coupled in series to the first shift register. The signal driving circuit is operative to drive a display according to inputs provided by only two clock signals.
US07663591B2 Display device and method of driving same
A display device is made up of (i) a source driver made up of source driver ICs each driving an identical number of data signal lines, the source driver ICs being grouped into at least a first individually-driven circuit group and a second individually-driven circuit group, and (ii) a control circuit that outputs a first start pulse and a first latch pulse for controlling the first individually-driven circuit group and a second start pulse and a second latch pulse for the second individually-driven circuit group. With this, it is possible to provide the display device that can reproduce images without adopting complicated circuitry and elongating one horizontal period, when the source driver has dummy signal lines.
US07663587B2 Liquid crystal display device
A liquid crystal display device has a gradation display function of at least an n-number of gray levels and has a viewing angle characteristic of Mi/Mj≦1.3 in a case where a display luminance range in a normal direction to a display surface in a gradation range of predetermined gray levels i to j is Li to Lj and a display luminance range in an oblique viewing-angle direction of 30° or more is Mi to Mj (where n, i and j are real numbers, and n≧i>j≧0). The liquid crystal display device has a display mode in which a display image is displayed with a display luminance range of the display image being limited to Li to Lj.
US07663586B2 Reference voltage generation circuit, display driver, electro-optical device, and electronic instrument
A reference voltage generation circuit, including: first to Jth (J is an integer greater than one) gamma correction data registers in which gamma correction data for generating a plurality of reference voltages is set; and a reference voltage select circuit which selects K select voltages from first to Lth (L is an integer greater than two, and K is a natural number smaller than L) select voltages arranged in potential descending order or potential ascending order and outputs the K select voltages as first to Kth reference voltages in potential descending order or potential ascending order, based on the gamma correction data set in one of the first to Jth gamma correction data registers, wherein the first to Kth reference voltages are output as the reference voltages.
US07663585B2 Television apparatus having liquid crystal display
A television apparatus having a liquid crystal display includes a signal processing portion for reproducing a received video signal, a liquid crystal cell for displaying a video reproduced by the signal processing portion, backlight light sources arranged on a back surface side of the liquid crystal cell for illuminating the liquid crystal cell, drivers for driving the liquid crystal cell, and an inverter for driving the backlight light sources. A transmittance of the liquid crystal cell can be increased because low color-purity cells having a color purity in a range of 40% to 60% is used as the liquid crystal cell. Also, reduction in a color reproductivity of the video caused due to the low color purity can be avoided because a color correcting circuit is provided to the signal processing portion to execute color correcting process on the video signal.
US07663584B2 Field sequential liquid crystal display
A field sequential LCD includes a reset selector supplying a reset signal having a higher voltage level than a data signal to the liquid crystal. The reset selector selects the reset signal in response to a reset control signal, and supplies the selected reset signal to a data line.
US07663583B2 In-Plane Switching mode liquid crystal display device
An IPS mode LCD device is disclosed in which a common voltage drop and delay is decreased. The LCD includes gate and data lines crossing each other to define pixel regions. Thin film transistors are formed at crossing portions of the gate and data lines. Common lines are parallel with the gate lines and common electrodes project from the common lines parallel with the data lines. Pixel electrodes connected with drain electrodes of the thin film transistors are formed in the pixel regions between the parallel common electrodes. A first common voltage supplying line applies a first common voltage or a second common voltage to a closed circuit formed by grouping the adjacent odd numbered common lines. A second common voltage supplying line applies the second common voltage or the first common voltage to a closed circuit formed by grouping the adjacent even numbered common lines.
US07663581B2 Light emitting panel and light emitting display
A light emitting display increases the lifetime of a light emitting element by reverse biasing the light emitting element without using an additional power source and a power source line. The light emitting element is reverse biased without using the power source and the power source line for the reverse bias because a low level light emitting scan signal is used. The aperture ratio, contrast ratio, and lifetime of the light emitting display are increased.
US07663580B2 Light emitting display and driving device and method thereof
A driving device for a light emitting display, which includes a plurality of scan lines for transferring a selection signal, comprises: a first driver for shifting a first signal having a first integer multiple of first pulses by a first period, and sequentially outputting the first signal; a second driver for shifting a second signal having a second pulse by a second period, and sequentially outputting the second signal; and a third driver for sequentially outputting the selection signal having a second integer multiple of third pulses corresponding to at least one of the first integer multiple of first pulses, and a fourth pulse corresponding to the second pulse, in response to the first signal and the second signal.
US07663576B2 Video data correction circuit, control circuit of display device, and display device and electronic apparatus incorporating the same
Accumulated usage data of each pixel of the correction circuit is divided into a plurality of data portions, each of which is stored in a different storing means. For example, the accumulated usage data is divided into the upper bit and the lower bit to be stored separately, and the upper bit of the accumulated usage data is obtained by adding the upper bit to a half carry generated by the calculation of the lower bit of the accumulated usage data. A degradation coefficient selected based on the thus obtained accumulated usage data is multiplied by video data to obtain corrected video data. The invention also provides a control circuit of a display device integrated with such a correction circuit.
US07663573B2 Plasma display panel and driving method thereof
The present invention relates to a plasma display panel and driving method thereof, which involves controlling the time points when data signals are applied to the data electrodes during an address period, thereby reducing the noise that otherwise affects the waveforms applied to the Y electrodes and the Z electrodes. This, in turn, stabilizes the address discharge and prevents damage to the scan board and/or the sustain board. According to one embodiment of the present invention, the data electrodes are divided into a plurality of electrode groups, where each of the electrode groups receives the data signal at an application time point that is different from the remaining electrode groups.
US07663572B2 Color display device and color display method
The color display device includes a colored light generation unit for repetitively generating a plurality of colored lights in a time sequence with a predetermined frequency, and an image generation unit for processing said plurality of colored lights, so as to generate an image corresponding to each of the plurality of colored lights generated in a time sequence. The said predetermined frequency is 180 Hz or more.
US07663569B2 Image display apparatus, image display system, and image display method
An image display apparatus includes a memory for holding in advance, of the one or more information terminal apparatuses connected via a network, information of information terminal apparatuses whose connection to the network is desired, a controller for reading out the information of the information terminal apparatuses stored in the memory, and display section for displaying a list of the information of the information terminal apparatuses. In this case, the image display apparatus further includes selector for selecting one information terminal apparatus from the list displayed on the display section, it is able to change the connection of the information terminal apparatus to desired information terminal apparatus by manipulation of the selector on a display screen.
US07663568B2 Antenna apparatus
An antenna apparatus is disclosed that includes a synthetic resin case having an antenna element accommodating portion and a ground element accommodating portion, an antenna element made of punched sheet metal that is accommodated within the antenna element accommodating portion, a ground element made of punched sheet metal that is accommodated within the ground element accommodating portion and aligned with the antenna element, a surface mount coaxial connector that is mounted over an interface between the antenna element and the ground element, and a cover that covers the antenna element and the ground element.
US07663567B2 Antenna structure, transponder and method of manufacturing an antenna structure
An antenna structure (106) comprising a first electrically conductive element (102) having a first end and a second end, a second electrically conductive element (103) having a first end and a second end, and a coupling structure (104) short-circuiting the first electrically conductive element (102) with the second electrically conductive element (103) by means of electrically connecting the electrically conductive elements (102, 103) at positions between the first and the second ends, wherein an integrated circuit (105) is connectable between the first end of the first electrically conductive element (102) and the first end of the second electrically conductive element (103).
US07663564B2 Method for making smart cards capable of operating with and without contact
The invention concerns a method for making smart cards capable of operating with or without contact called mixed cards and contactless smart cards. In order to avoid the risk of deteriorating the antenna the method consists in producing an antenna comprising at least two turns, on a support sheet, said antenna having its turns located outside the connecting pads, and in providing an insulating bridge so as to connect each of the antenna ends to a connection pad respectively.
US07663560B1 Antenna pointing aid
A satellite system 10 includes an outdoor unit that has an LNB 24. The antenna of the outdoor unit is aligned using a microwave energy-absorbing cap. The microwave-absorbing cap has microwave-absorbing material therein or thereon. A signal strength meter is used to measure the signal strength with the cap on so that the signal strength meter is less likely to be saturated during the alignment process.
US07663558B2 Tag reader with conformal antenna stand
A mobile device includes a housing having a transceiver configured to transmit and/or receive a signal. A stand attachable to the housing has a profile that increases stability of the housing in a resting position. The stand may also be attachable to a further housing such as an interface device configured for connection or attachment to the housing of the mobile device. The stand may include a first portion connectable to the wireless mobile device, a second portion, and an antenna having holes and being sandwiched between the first portion and the second portion. The antenna holes may be configured for allowing passage of liquid material during molding together the first portion, the second portion and the antenna to form a molded stand. The antenna may be operationally coupled to the transceiver. A base plate having hole(s) and connector(s) may also be sandwiched between the first portion and the antenna.
US07663556B2 Antenna configured for low frequency application
An antenna configured for low frequency applications on a mobile device includes an antenna element coupled to a conductive structure which, in turn, is coupled to the user of the mobile device such that the user of the mobile device effectively becomes part of the antenna. The conductive structure can include, for example, the device housing being made from a conductive material, a conductive structure embedded inside the device housing, or conductive pads exposed in the device housing. The antenna element is electrically connected to the conductive structure and the user can be coupled to the conductive structure either through direct contact or through capacitive coupling.
US07663554B2 Wireless communication device
In a liquid crystal television device that is a wireless communication device, speaker storage sections are integrally formed with a main body section containing parts such as a liquid crystal panel section. Although the main body section is electromagnetically shielded, the speaker storage sections are not electromagnetically shielded. Antennas are provided along with speakers in speaker storage sections so as to have directions of installation different from each other by 90 degrees. This realizes a wireless communication device including an antenna structure capable of improving transmitting/receiving sensitivity in all directions.
US07663551B2 Multiband antenna apparatus and methods
A multiband antenna, and component for implementing a multiband antenna for, e.g., a small-sized radio device. In one embodiment, the antenna component comprises a simple and reliable dielectric substrate, the conductive coating of which forms a radiating element. This has a plurality (e.g., two) resonances for forming separate operating bands. The lower resonance is based on the entire element, and the upper resonance on the head part of the element. The conductive coating has a pattern, which functions as a parallel resonance circuit between the head part and the tail part of the element. The natural frequency of this parallel resonance circuit is in the range of the upper operating band of the antenna. The resonance frequencies of the antenna and thus its operating bands can be tuned independently of each other so that the tuning cycle need not be repeated.
US07663549B2 Incoming direction estimation apparatus
An incoming direction estimation apparatus estimates an incoming direction of a radar wave using three or more sensors or antennas simultaneously. An arithmetic expression for estimating an incoming direction of a radar wave is configured as sin−1((1/2πa)*tan−1b). The “a” is d/λ determined by an antenna interval and by a wavelength λ of a carrier, or such, carrying the radar wave. A simultaneous use of three antennas makes it possible to set the a as a value depending on a value d0=a0λ based on the interval between first antennas and value d1=a1λ based on the interval between second antennas. Therefore, if a wide field of vision of an incoming direction is needed, it is only necessary to adjust (d1−d0)/λ=(a1−a0), in place of the absolute interval of antennas a=d/λ, thereby making it possible to lessen a limitation on the design of antennas and set a field of vision of the incoming direction appropriately.
US07663548B2 Switched combiner GPS receiver system
A receiving system includes a combiner configured to receive signals from two or more antenna elements and to generate sum and difference outputs, and a switch configured to sequentially provide the sum and difference outputs as inputs to a receiver.
US07663546B1 Real-time autonomous beam steering array for satellite communications
A phased array satellite communication (SATCOM) system for ground stations receives information signals and a beam from a satellite and autonomously steers communication signals by phase information toward a satellite extracted from the received satellite beam. The new phased array eliminates the need for phase shifters to control a beam. The new phased array satellite communications system avoids delay in digital signal processing or feedback systems to find satellite locations, enabling autonomous real-time electronic beam steering with no delay. The new system is also used to handle signals from and to multiple satellites simultaneously. The new system is useful in other applications where an enhanced point-to-point communication link is required.
US07663544B2 Antenna system for sharing of operation
An antenna system for sharing of operation employs contiguous transmit frequencies. Transmit frequencies are separated into non-contiguous sub-groups isolated from one another by filters 158(+) and 160(−) associated with positive and negative polarization. Received frequencies are filtered and split into five signals for input to base station receive ports. Non-contiguous transmit frequency sub-groups are combined by a quadrature hybrid 110 and pass with 90 degree relative phase shift to mutually orthogonal antenna stack ports P(+) and P(−) associated with orthogonally polarized sets of antenna elements AS(+) and AS(−): the ports P(+) and P(−) are isolated from one another by the hybrid 110. The 90 degree phase shift results in one transmit subgroup being radiated with left hand circular polarization and the other transmit subgroup being radiated with right hand circular polarization. Changing the relative phase shift changes the radiated polarization to linear or elliptical, and signal amplitude weighting provides control of antenna beam polarization direction.
US07663543B2 Alignment method for multi-satellite consumer receiver antennas
A method, apparatus and system for aligning an antenna reflector with satellites in a satellite configuration. A method in accordance with the present invention comprises aligning the reflector in azimuth and elevation with a first signal transmitted by a first satellite in the satellite configuration, and aligning the reflector in tilt with a second signal transmitted by a second satellite in the satellite configuration, wherein aligning the reflector in azimuth and elevation with the first signal and in tilt with the second signal aligns the reflector with at least a third signal transmitted from a third satellite.
US07663542B1 Antenna autotrack control system for precision spot beam pointing control
The present invention provides a system and a method for improving spacecraft antenna pointing accuracy utilizing feedforward estimation. The present invention takes advantage of the fact that spacecraft antenna pointing error has periodic behavior with a period of 24 hours. Thus, unlike the prior art feedback systems which blindly correct antenna pointing error continuously reacting only to presently sensed error, the present invention takes an intelligent approach and learns the periodic behavior of spacecraft antenna pointing error. Then, an estimate of antenna pointing error at a particular time going forward is predicted based on the learned model of the periodic behavior of the antenna pointing error. The predicted estimate is then used to correct or cancel out the antenna pointing error at a particular time in the future. The result is more accurate correction of spacecraft antenna pointing error by more than a factor of two.
US07663541B2 Method of tracking radio frequency signals
Embodiments of the invention are directed to a method of keeping track of and staying tuned to a transmitter even when a receiver is moving at a relatively high speed. Electronic equipment carried on fast moving vehicles and comprising receiving means can experience a shift in the frequencies received due to Doppler shift. Embodiments provide a way of taking such a Doppler shift into account by means of acceleration measurements of the electronic equipment. Some embodiments may be used in electronic equipment containing a GPS receiver or the like, where re-tracking of satellites can be power and time consuming.
US07663537B2 Target detecting apparatus using electronically agile radar
A target detecting apparatus mounted on a vehicle has an electronically agile radar detecting a beat signal indicating a difference in frequency between transmission and reception signals and producing a time series of N reception data from the beat signal, a determining unit determining search areas placed at different ranges of distance from the vehicle while considering a running state of the vehicle and determining a data length for each search area, an extracting unit extracting (N−M+1) time series of short time data, respectively, having the data length corresponding to M reception data from the N reception data for each search area, a producing unit producing phase information from the short time data for each search area, and a detecting unit determining a target distance and a target bearing from the phase information and detecting a target from the target distance and the target bearing.
US07663535B2 System and method to position register and phase synchronize a monitoring network
A system is disclosed for position registration and phase synchronization of monitors in a monitor network. Each monitor includes a transceiver having a transponder circuit with a calibrated transponder delay. To measure a distance between monitors, an oscillator at a first monitor generates a measurement signal which is transponded by a second monitor for receipt by the first monitor. A phase difference between the received signal and the first monitor oscillator is determined and used with the signal velocity and transponder delay to calculate the distance between monitors. The measured distances are combined with other data (e.g. monitor elevations) to calculate monitor locations. A phase delay is then measured by transmitting a signal from the first to the second monitor for comparison with the second monitor oscillator. A phase difference between oscillators (for use in synchronizing the monitors) is then calculated using the phase delay, separation distance and signal velocity.
US07663533B2 Radar system for motor vehicles
A radar system for motor vehicles, having a least one radar sensor having a range of less than 50 m for monitoring traffic in an adjacent lane, wherein the radar sensor has a phase-controlled antenna and a control device for setting a plurality of radar lobes having different geometries.
US07663532B2 Method for measuring distance and position using spread spectrum signal, and an equipment using the method
By using the delay profile created by delay profile creating section 102 and the first threshold value 330 received from the first threshold value calculation 105, the first threshold value timing detection section 103 selects only the earliest receive timing exceeding the first threshold value, from all the timing that the correlation value in the delay profile becomes a maximum. By using the receive timing and the second threshold value 331 received from the second threshold value calculation section 107, reference timing calculation section 106 selects the reference timing required for calculating the receive timing for the incoming wave of the minimum propagation delay time. The timing delayed by previously set timing behind said reference timing is sent from receive timing calculation section 108 as the receive timing 113 of the incoming wave of the minimum propagation delay time.
US07663530B2 System and method for monitoring targets
A system comprising a moving radar, a processing device, and a phase difference determination device is used to monitor a target. The moving radar has first and second phase centers that transmit and receive signals normal to a direction of movement of the radar. The processing device receives first and second ones of the received signals from the first and second phase centers, respectively, and performs a target motion compensation and target acceleration correction for each of the first and second received signals to produce first and second images. The phase difference determination device determines a phase difference image from a comparison of the first and second images.
US07663528B1 Missile boost-ballistic estimator
A hostile missile engager senses the missile and supplies kinematic data to an interceptor missile fire control processor, which predicts the target's future location with the aid of a powered/unpowered identifier. The identifier passes the kinematic data through filters having lags for powered and unpowered operation, to produce residuals and residual covariances. The probabilities of powered and unpowered motion are determined, and thresholded. If the probability of powered motion or unpowered motion exceeds its threshold, the motion is deemed known. If the target is deemed to be powered, a set of the three-dimensional kinematic features is applied to a nine-state Kalman filter to produce an optimal state. If the target missile is unpowered, a set of the three-dimensional kinematic features corresponding to the second lag is applied to a six-state Kalman filter to produce an optimal state for the unpowered motion. The optimal states control the interceptor toward the target.
US07663521B2 Oversampling PID controller for integration with a delta-sigma analog-to-digital converter
An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.
US07663519B2 Analog to digital converter using arrangement of stators and AD converting method
An Analog to Digital (AD) converter and an AD converting method are provided. The AD converter includes one or more stators, and one or more actuators that move according to an input voltage. The digital output of the AD converter is determined based on an arrangement of the stators and the positions of the actuators relative to the stators. The AD converter can achieve high resolution and/or high speed with lower power consumption.
US07663518B2 Dither technique for improving dynamic non-linearity in an analog to digital converter, and an analog to digital converter having improved dynamic non-linearity
An analog to digital converter comprising a conversion engine having redundancy therein; and a dither device for applying a dither to the conversion engine; and a controller adapted to operate the conversion engine to perform a successive approximation conversion of the analog input, and wherein the dither is removed prior to completion of the analog to digital conversion.
US07663517B1 Accurate hardware Power OK (POK) generation methodology for processors with varying core voltage requirements
A method for configuring a circuit for providing a power OK (POK) signal is described. The method includes identifying a voltage range and voltage interval, dividing the voltage range into a plurality of segments, selecting a reference voltage for each segment, and selecting resistor values for a plurality of voltage dividers for dividing an output voltage from a precision voltage reference into each of the reference voltages. A power OK signal generator and method for generating a power OK signal are also described.
US07663516B1 Scheme for non-linearity correction of residue amplifiers in a pipelined analog-to-digital converter (ADC)
In a method and apparatus for compensating non-linearity of a gain of a residual amplifier (RA), a pipelined analog-to-digital converter (ADC) converts an analog input to a digital output (DO). The ADC includes a plurality of pipelined stages (PPS). Each stage, which includes an instance of the RA, provides a digital code corresponding to an output of the RA included in a preceding stage. A memory stores a piecewise linear representation for modeling the non-linearity of the gain. A calibrated gain of the RA corresponding to each region of a plurality of linear operating regions of the RA is stored in the memory. A gain adjuster adjusts the digital code for each one of the PPS in accordance with a gain factor derived from the calibrated gain for each one of the PPS. A constructor constructs the DO from the adjusted digital code received from each one of the PPS.
US07663515B2 High-speed serial interface circuit and electronic instrument
A high-speed serial interface circuit includes a data receiver circuit, a clock signal receiver circuit, a logic circuit block that includes at least a serial/parallel conversion circuit, a free-running clock signal generation circuit, a clock signal detection circuit, and an output mask circuit. The clock signal detection circuit compares a received clock signal from the clock signal receiver circuit with a free-running clock signal from the free-running clock signal generation circuit to detect whether or not clock signals are transferred through differential clock signal lines. When the clock signal detection circuit has detected that the clock signals are not transferred through the differential clock signal lines, the output mask circuit masks an output signal from the logic circuit block so that the output signal is not transmitted to a circuit in the subsequent stage. The present invention can prevent a partial characteristic variation by NBTI by inputting a free-running clock into a logic block, and operating it.
US07663514B2 Encoding processing apparatus and decoding processing apparatus
An encoding processing apparatus includes a first storing section for storing first encoded information and second encoded information, a second storing section for storing a table indicating association relation between the first encoded information and the second encoded information, an arithmetic section for calculating the second encoded information by reading the first encoded information stored in the first storing section and searching the table stored in the second storing section, a third storing section for storing by associating the first encoded information previously read from the first storing section and the second encoded information, a first control section for reading the second encoded information associated with the first encoded information from the third storing section, and a second control section for storing by associating the first encoded information with the second encoded information in the third storing section. The arithmetic section performs processing of searching the table stored in the second storing section and calculating the second encoded information.
US07663508B2 Vehicle location information notifying system
When searching of a location of a vehicle is commanded, a vehicle search signal is transmitted from a portable device. The vehicle search signal includes an ID code of the portable device. When a vehicle side communication unit receives the valid ID code, the vehicle side communication unit transmits a vehicle side response signal to the portable device. The portable device computes a distance from the portable device to the vehicle based on a signal level of the received vehicle side response signal. A notifying device notifies the computed distance.
US07663505B2 Traffic management device and system
A smart traffic control device transmits information to approaching vehicles regarding its current and future state enabling vehicles to control their speed to avoid arriving at the traffic control device until it permits the passage of traffic, thus avoiding stopping, idling and reaccelerating when reaching the traffic control device. In other embodiments the traffic control device or systems receives information from vehicles, transmitting it to other vehicles.
US07663504B2 Emergency vehicle warning system
An emergency vehicle transmits a Vehicle Present Signal when in transit on public roads responding to an emergency. The signal can include information relating to the type of emergency vehicle, local highway and terrain data, and the location, speed and direction of travel of the emergency vehicle. When the Vehicle Present Signal is detected by a first vehicle, a functional circuit within the first vehicle calculates the distance between the emergency vehicle and the first vehicle. If the vehicles are within a predetermined distance, a warning signal activates one or more warning systems, thereby notifying the driver of the first vehicle that an emergency vehicle is in the vicinity. A dead-band defined by first and second predetermined distances can be incorporated to prevent rapid cycling of the warning signal.
US07663501B2 Apparatus and method of controlling emitting color of visible light according to a current communication state in a VLC device
An apparatus and method for controlling the emitted color of visible light according to the current communication state in a visible light communication (VLC) device. The method includes storing one or more communication states and emitting colors that are correspondingly matched to the one or more communication states to indicate each of the various communication states. The VLC also checks, which can be based upon selection of a VLC mode, the current communication state and an emits a color that corresponds to the current communication state and emits the checked color of light to provide a visible light signal that indicates communication status to a user.
US07663500B2 Method and apparatus for providing a notification appliance with a light emitting diode
A method and apparatus for providing a strobe alarm unit employing at least one light emitting diode.
US07663497B2 Container and information provision system
One of the embodiment of present invention includes at least one transmitter-receiver set including a transmitter and a receiver opposed with an object to be measured therebetween; and a transmission device that estimates the amount of the object based on the attenuation of electromagnetic waves that are transferred between the transmitter and the receiver of the transmitter-receiver set, and transmits information on the estimated amount of the object to be measured.
US07663494B2 Networked RF tag for tracking people by means of loyalty cards
The invention disclosed provides a method, system, and tag for detection and tracking of objects. The method includes the steps of: a) attaching to each of the objects a low radio frequency detection tag having an antenna, a transceiver, a data storage device operable to store data including identification data, a programmed data processor, and an energy source; b) storing, in the data storage device of each tag, shipping data; c) commingling the objects in a repository provided with a large loop field antenna; d) reading the identification data and shipping data from the transceiver of each tag by interrogating all tags commingled in said repository with data signals via said field antenna; and e) transmitting the identification data and shipping data from each tag to a central data processor to provide a tally of the objects in said repository.
US07663493B2 Child car seat alert system
A system and method to warn that a child has been left unattended in the vehicle when the ignition is off. The system includes a sensing device to detect if a child is in the infant seat, an ignition detection device to detect that the ignition is off, a delay timer to provide a certain period of time for the caregiver to remove the child from the car seat or put the child in the infant/booster seat and then to generate an alarm, a speaker to sound the alarm, and a switching assembly to detect when the dome light goes on, or if the dome light is operable.
US07663491B2 Substrate damage detection mechanism using RFID tag
Disclosed is a substrate damage detection mechanism using Radio Frequency Identification (RFID) tag including a substrate, at least one RFID tag with a RFID chip, a RFID transmitter and at least one data input/output port and at least one conducting circuit loop arranged to cover the substrate and provided with a first end that is electrically connected to a reference voltage and a second end that is electrically connected to the data input/output port of the RFID tag. The RFID chip generates a conductive code when the conducting circuit loop is originally conducting and generates a open-circuit code when the conducting circuit loop becomes open circuit resulting from the damage of the substrate in which both the conductive code and the open-circuit code are transmitted by the RFID transmitter and received by a RFID reader to determine the damage of the substrate.
US07663490B2 Methods and apparatus for efficiently tracking activity using radio frequency identification
A wearable data processing system includes a high power radio module and a low power radio module. The high power radio module may retrieve data from radio frequency identifier (RFID) tags. The low power radio module may transmit data to a base station data pertaining to the detected RFID tags. The low power radio module may also receive a power management signal from a gate radio. The gate radio may have an adjustable range. A power management engine in the wearable data processing system may determine whether the low power radio module is receiving the power management signal from the gate radio. The power management engine may also activate and deactivate the high power radio module, depending on whether the low power radio module is receiving the power management signal from the gate radio. Other embodiments are described and claimed.
US07663488B2 System and method of virtually packaging multimedia
Embodiments include systems and methods of accessing multimedia content. One embodiment includes a system for accessing multimedia data. The system includes a tangible object comprising at least one proximity device embedded within the tangible object. The tangible object is configured to provide identification information of the tangible object. The system further includes a reader configured to wirelessly detect the tangible object based upon the proximity device and receive the identification information. The system further includes a device configured to receive a signal from the reader in response to detecting the tangible object and configured to access multimedia data based upon the provided identification information.
US07663486B2 RFID tag user memory indication
A system and method in a radio frequency identification (RFID) tag for writing and erasing user memory. A write command is received at the tag to write data into user memory of the tag. Based on receipt of the write command, a user memory flag in a first memory bank of the tag is set, and the data is written into a second memory bank of the tag. An erase command is received at the tag to erase data stored in the user memory of the tag. Based on receipt of the command to erase, the user memory flag in the first memory bank is cleared, and data stored in the second memory bank is erased.
US07663485B2 Apparatus for identifying objects using radio frequency and apparatus and method for tracking position of object using the same
A radio frequency identification (RFID) tag based object position tracking apparatus and method are provided. The apparatus includes a position recognizer including at least one radio frequency identification unit for reading information data on an object through a sensor; and a path analyzing and processing unit for allocating each unique coordinates to the radio frequency identification units based on a relative position in a space where a position recognizer is disposed and recognizing the position of the object and analyzing the path based on the object information data received by the sensor in the radio frequency identification unit corresponding to the unique coordinate. Thus, it is possible to track the path of an object with a low density of RFID tags.
US07663481B2 Method for sensor node roaming in wireless sensor network environment
Provided is a method for mobile sensor node roaming in an environment of first and second adjacent wireless sensor networks having a plurality of sensor nodes. The method includes the steps of: periodically performing energy detection scan and active scan operations, at the mobile sensor node forming an association with a parent node of the first wireless network, and obtaining energy values of selected channels and link quality indications (LQIs) for the channels; when the sensor node moves to the second wireless sensor network, periodically performing energy detection scan and active scan operations, at the sensor node, and obtaining energy values of selected channels and link quality indications (LQIs) for the channels after movement; comparing, at the sensor node, the energy values and link quality indications (LQIs) of the selected channels before and after movement.
US07663480B2 Wire emulation through a network for propagation of failure information
An optical transponder, system, method, and program wherein the transponder monitors for at least one of a failure or an alarm signal. In response to detecting a failure or alarm signal (communication), the transponder performs at least one of a predetermined action and propagating an alarm communication to a network, based on a configuration property. The transponder can have a configuration property specifying a predetermined action for shutting off a laser if an alarm signal indicating a network failure is detected. As an example, some transponders can be configured to either provide an alarm communication, and/or shut off a laser, depending upon which communication interface detects a network failure or receives an alarm signal. Also, other transponders can be configured to propagate existing alarm communications, without generating new alarm communications or shutting off lasers. In this manner, the number of alarm signals and laser shut offs can be reduced when a network failure is propagated through the network.
US07663477B2 Turn signal control device for vehicle
In a turn signal control device for a vehicle having an automatic canceling function, a switch operating element is carried on a pivot shaft mounted in a fixed switch case so that the switch operating element can be returned and pushed-in between a returned position and a pushed-in position. The switch operating element is swingable at the returned position between a neutral position and a left-turn indicating position and a right-turn indicating position. The switch operating element is pushed-in to the pushed-in position by push-in operation at the returned position. The switch operating element is resiliently urged toward the neutral position and there turned position. A winker switch is operatively connected to the switch operating element so as to break the connection of a left-turn indicating means or a right-turn indicating means to a flasher unit in response to push-in of the switch operating element to the pushed-in position. Thus, a switch and an electric circuit for manual canceling are not required to improve reliability.
US07663471B2 In-vehicle device remote control system and method
In an in-vehicle device remote control system, a vehicle-side device determines in which detection area an electronic key exists based on a response signal transmitted from the key in response to request signals, and a control door to be operated in correspondence to the detection area in which the key exists. The vehicle-side device notifies a user that the key is an authorized one by light, sound, display or the like on the determined control door. With this operation, it is readily recognized by the user because the user is approaching the control door.
US07663470B2 Trimming circuit and electronic circuit
A trimming circuit and an electronic circuit that decreases the resistance of an activated transistor while reducing the number of resistors. The trimming circuit includes a plurality of series-connected units. Units for respectively changing adjusting resistances of Runit/2, Runit/4, Runit/8, and Runit/16 are each formed by a transistor, a series-connected resistor circuit, which has resistance Rt and which is connected in series to the transistor, and a parallel-connected resistor circuit, which has resistance Rm and which is connected to the transistor and the series-connected resistor circuit. The resistances Rm and Rt are determined in each unit such that the difference between the resistance Rm when the transistor is off and the resistance of the entire unit when the transistor is on determines the adjusting resistance.
US07663464B2 Inductance component
The inductance component has a base material, a coil formed in the base material and an electrode electrically connected to the coil. In addition, an impact-absorption layer is disposed between the electrode and the base material. Forming impact-absorption layer between the base material and the electrode allows the base material to have flexibility even if an impact is given on the base material, providing the component with high impact-resistance.
US07663462B2 Inductive rotating transmitter
The invention relates to an inductive rotating transmitter, comprising a fixed piece and a rotating piece, whereby the fixed piece and the rotating pierce have a common virtual rotational axis and the rotating piece rotates about the fixed piece. The data transmission is carried out over at least one data transmission path by means of at least one inductive element and the data transmission path is arranged outside the rotational axis of the rotating transmitter.
US07663460B2 Planar transformer and switching power supply
A planar transformer comprises a primary coil board including a primary coil, a secondary coil board including a secondary coil, a heat sink integrally having a spacer portion, and a magnetic core assembly mounted to the primary coil board and the secondary coil board. The spacer portion is inserted into a gap between and facing the primary coil board and the secondary coil board and at least a surface of the heat sink is electrical insulating.
US07663455B2 Band-pass filter element and high frequency module
A high frequency module incorporates a layered substrate, a plurality of elements mounted on a top surface of the layered substrate, and a metallic casing that covers these elements. The plurality of elements mounted on the top surface of the layered substrate include a band-pass filter element. The band-pass filter element includes a plurality of conductor layers for band-pass filter and a plurality of dielectric layers for band-pass filter that implement a function of a band-pass filter, but does not include any conductor layer that functions as an electromagnetic shield. A conductor layer for grounding that the layered substrate includes and the casing are each opposed to the band-pass filter element, and thereby function as an electromagnetic shield for the band-pass filter element.
US07663454B2 Discrete dielectric material cavity resonator and filter having isolated metal contacts
A discrete resonator is provided, including a dielectric base having a dielectric constant. A metal contact formed on a major surface of the dielectric base has a predetermined area and is positioned at a predetermined location on the dielectric base to provide a predetermined loaded Q for the resonator. A metal ground coating is formed on the outer surface of the dielectric base with the exception of an isolation region surrounding the metal contact that is free of the metal ground coating. The area of the isolation region is sufficient to prevent significant coupling between the metal contact and the metal ground coating. The dielectric constant of the material used for the base, and the width and length of the dielectric base are each selected such that the resonator resonates at least at one predetermined resonant frequency in the GHz frequency range.
US07663450B2 Monolithic duplexer
A subminiature, high-performance monolithic duplexer is disclosed. The monolithic duplexer includes a substrate, a transmitting-end filter formed in a first area on an upper surface of the substrate, a receiving-end filter formed in a second area on the upper surface of the substrate, a packaging substrate, bonded on an area on the upper surface of the substrate, for packaging the transmitting-end filter and the receiving-end filter in a sealed state, and a phase shifter, formed on one surface of the packaging substrate and connected to the transmitting-end filter and the receiving-end filter, respectively, for intercepting a signal inflow between the transmitting-end filter and the receiving-end filter.
US07663444B2 Amplifying circuit utilizing nonlinear gate capacitance for enhancing linearity and related method thereof
An apparatus for amplifying an input signal is disclosed. The apparatus includes a first amplifying circuit and a first resonating circuit. The first amplifying circuit includes a first transistor having a first gate for receiving the input signal. The first amplifying circuit amplifies the input signal to generate a first output signal. The first resonating circuit is coupled to the first amplifying circuit, wherein a first resonating frequency of the first resonating circuit is not equal to the operating frequency.
US07663443B2 Active balun circuit
There is provided an active balun circuit including: a load circuit unit including a first and a second load; a differential amplifying unit including a first amplifying unit connected to the first load, and a second amplifying unit connected to the second load and forming a differential amplifying unit together with the first amplifying unit, the differential amplifying unit differentially amplifying an input signal, and outputting first and second output signals out-of-phase with each other through first and second output terminals, respectively; a current source connected between a ground and a common connection node of the first and second amplifying units, and maintaining a constant amount of current flowing through the differential amplifying unit; and a compensation amplifying unit amplifying the input signal supplied through the input terminal, transmitting the amplified input signal to the second amplifying unit, and rejecting common mode noise of the differential amplifying unit.
US07663440B2 Amplifier circuit, semiconductor device, and controlling method
An amplifier circuit including a plurality of CMOS (Complementary Metal Oxide Semiconductor) inverter circuits connected in parallel with each other. The CMOS inverter circuits each include a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a first NMOS (N-channel Metal Oxide Semiconductor) transistor, gates of the first PMOS and NMOS transistors, a second PMOS transistor, a first switch connected to a gate of the second PMOS transistor, a second NMOS transistor, and a second switch connected to a gate of the second NMOS transistor.
US07663436B2 Power amplifier with distortion compensation circuit
A power amplifier negates a memory effect and is applied a linearizer using a digital predistortion system even in an inexpensive device. The power amplifier compares an input signal power against a sampled component of an output power, and provides predistortion to the input signal power so as to minimize a difference as a result of the comparison. The power amplifier comprises a gain lookup table storing a gain coefficient value corresponding to a temperature address determined for an input power; a phase lookup table storing a phase coefficient value corresponding to the temperature address determined for the input power; a transversal filter, which is input with the input power, and which outputs the temperature address; and a coefficient multiplier modulating the input signal using a gain coefficient value and a phase coefficient value, which correspond to the temperature address and which are read out from the gain coefficient lookup table and the phase lookup table.
US07663429B2 Driver amplifier circuit having reduced DC bias
A driver amplifier circuit is provided which includes a voltage level shifting circuit and an Op-Amp. A positive power supply terminal and a negative power supply terminal of the Op-Amp receive a first reference voltage and a second reference voltage outputted from the voltage level shifting circuit, causing a DC voltage level of an output signal to be equal to 0V. Meanwhile, the absolute value of a voltage difference between the first reference voltage and the second reference voltage is equal to VDD, meaning that elements in the circuit operate without risking a high-voltage damage.
US07663428B2 Boosting charge pump circuit
In order to resolve a problem of the conventional technique in which there is a charge pump capacitance which is not used when a boosting method of the charge pump is changed, in a charge pump circuit unit, a connection switching terminal selects a power source voltage, a logically-inverting buffer gate and a capacitor to conduct an operation of boosting the power source voltage so as to be twice the power source voltage, and a connection switching terminal outputs the boosted voltage as a boost control voltage. In a charge pump circuit unit, a connection switching terminal selects the boost control voltage outputted from the charge pump circuit unit, and a logically-inverting buffer gate and a capacitor conduct an operation of boosting the inputted voltage so as to be 3×VDD. An internal voltage is generated by outputting the boosted voltage to an internal power line via a NMOS transistor.
US07663427B2 Booster circuit
A charge pump type booster circuit generates a positive or negative boosted output voltage by switching booster paths one by one. This charge pump type booster circuit includes a plurality of booster paths, each of the plurality of booster paths including at least one booster capacitor, wherein a number of the booster capacitor at each of the plurality of booster paths is different between one booster path and the other booster path. This makes it possible to suppress an increase in a number of an external capacitor for setting an output voltage of the booster circuit constant.
US07663424B2 Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits
A low charge injection, low clock feed-through switch (1) has an input signal (Vin) applied both to the sources of first (S1) and second (2) switching transistors. A first clock signal (P) having pulses of a first duration ts is applied to a gate of the first switching transistor, and a second clock signal (Pcoarse) having pulses of a second duration m×ts substantially less than the first duration is applied to a gate of the second switching transistor. A capacitor (C) is charged toward the input voltage through both the first and second switching transistors during the pulse of the second clock signal. The capacitor is charged further toward the input voltage during a remaining portion of the pulse of the first clock signal.
US07663420B2 MOS resistance controlling device and MOS attenuator
A MOS resistance controlling device includes: a plurality of MOS transistors having a first MOS transistor to N-th (the integer N is larger than 1) MOS transistor being serially connected, the source of the first MOS transistor being set to a first reference potential, the drain the N-th MOS transistor being set to a second reference potential, and the drain of an I-th MOS transistor being connected to the source of an I+1-th MOS transistor, where I is an integer from 1 to N−1; a current source which is electrically disposed at connection node between the drain of the N-th MOS transistors and the second reference potential; and an operational amplifier having a first input terminal being supplied with a third reference potential, a second input terminal connected with the connection node and an output terminal being connected with gates of the MOS transistors.
US07663416B2 Apparatus and related method for generating output clock
An apparatus for generating an audio output clock is disclosed. The apparatus at least includes a plurality of dividers and a frequency synthesizer. The apparatus utilizes the dividers to achieve dispersive frequency-division operations such that the anti-noise ability of the apparatus can be improved. In addition, the apparatus also utilizes dynamic phase adjustment to increase accuracy of the frequency of the audio output clock.
US07663415B2 Phase locked loop (PLL) method and architecture
A phase locked loop (PLL) architecture provides voltage controlled oscillator (VCO) gain compensation across process and temperature. A simulator may be used to calculate the control voltages for the maximum and minimum output frequency of the VCO for each combination of the process and temperature corners. The maximum and minimum values of control voltage are then selected from these control voltages. Using a counter, the number of cycles of VCO in some cycles of the PLL input clock are counted in binary form and stored in latches for the extreme control voltages. The difference between them and the corresponding difference for typical process and temperature corner is used to modify the charge pump to change the current delivered to the loop filter. After the charge pump bits have been decided, the input control voltage of the VCO connects to the charge pump output to start the normal operation of the PLL.
US07663414B2 Prescaling stage for high frequency applications
A prescaling stage includes bistable circuit in turn including respective master and slave portions inserted between a first and a second voltage reference and feedback connected to each other. Each portion is provided with at least one differential stage supplied by the first voltage reference and connected, by a transistor stage, to the second voltage reference, as well as a differential pair of cross-coupled transistors, supplied by output terminals of the differential stage and connected, by the transistor stage, to the second voltage reference. Advantageously, each master and slave portion includes a degeneration capacitance inserted in correspondence with respective terminals of the transistors of the differential pair.
US07663411B2 Semiconductor device with a logic circuit
The logic gate of the present invention is of a configuration that includes a first transistor, a second transistor, and a connection-switching unit. The first transistor receives a first voltage at its source, a first input signal at its gate, and supplies a first output signal from its drain. The second transistor receives a second voltage that is lower than the first voltage at its source, receives a second input signal at its gate, and supplies a second output signal from its drain. The connection-switching unit is connected between the drains of the first transistor and the second transistor for connecting and cutting off the first transistor and the second transistor.
US07663409B2 Voltage/current converter circuit and method for providing a ramp current
A voltage/current converter circuit includes a bridge configuration having a first current path with a first resistor, a first transistor, and an input node to receive a ramp voltage to be converted, and a second current path with a second resistor and a second transistor. A current passes through the second current path. An amplifier arrangement balances the bridge configuration by providing an output signal to a control terminal of the first transistor and/or to a control terminal of the second transistor.
US07663399B2 Semiconductor memory device having output drive and delay unit
An output driver for use in a semiconductor memory device includes a pull-up metal oxide semiconductor (MOS) transistor for pulling-up a voltage loaded on an output node in response to a pull-up control signal; a pull-up linear element connected between the pull-up MOS transistor and the output node for increasing a linearity of an output current; a pull-down MOS transistor for pulling-down the voltage loaded on the output node in response to a pull-down control signal; and a pull-down linear element connected between the pull-down MOS transistor and the output node for increasing the linearity of the output current, wherein the pull-up MOS transistor and the pull-up linear element are different typed MOS transistors and the pull-down MOS transistor and the pull-down linear element are different typed MOS transistors.
US07663396B2 Substrate for electro-optical device, electro-optical device, and checking method
A substrate for an electro-optical device includes a plurality of scanning lines arranged in rows; a plurality of data lines arranged in columns and grouped into blocks, each of the blocks including n data lines, where n indicates an integer of 2 or more; a plurality of terminals that receive data signals for the corresponding blocks; a demultiplexer that selects a data line designated by a control signal from among the n data lines within each of the blocks and that supplies to the data line selected in the block the corresponding data signal received by the corresponding terminal for the block; a plurality of pixels disposed in association with intersections of the plurality of scanning lines and the plurality of data lines, some or all of the plurality of pixels performing display in accordance with the data signals supplied to the data lines when selection of the corresponding scanning lines is performed; and a checking circuit. The checking circuit includes n read lines; a plurality of first switches each provided for a different data line, one end of each of the plurality of first switches being connected to a corresponding data line and the other end of each of the plurality of first switches being connected to one of the n read lines such that the other ends of the plurality of first switches corresponding to the n data lines belonging to an identical block are connected to different read lines; and a shift register that selects one of the blocks so as to allow conduction of first switches whose other ends are connected to the n data lines belonging to the selected block.
US07663395B2 Display device, display panel therefor, and inspection method thereof
A display panel is provided, which includes: a plurality of gate lines; a plurality of data lines intersecting the gate lines; a plurality of switching elements connected to the gate lines and the data lines; a plurality of pixel electrodes connected to the switching elements; a plurality of driving signal lines transmitting a plurality of driving signals; a plurality of test pads for test signals disposed near an edge of the panel; and a gate driver generating and applying gate signals to the gate lines responsive to the driving signals transmitted from the driving signal lines.
US07663394B2 Start signal detector circuit
A variation of a threshold of diode-connected transistors is compensated for to maintain a constant rectification efficiency of a rectifier circuit, thereby enabling stable detection of a start signal. A constant voltage is applied to DC bias terminal 103 of cascaded half-wave voltage doubler rectifier circuits (including MOS transistors M1 to M4 and capacitors C1 to C4) forming a rectifier circuit, and a voltage equal to the sum of the constant voltage applied to DC bias terminal 103 and a variation ΔVt of a threshold voltage of the MOS transistors is applied to DC bias terminal 104 of cascaded half-wave voltage doubler rectifier circuits (including MOS transistors M5 to M8 and capacitors C5 to C8) forming a bias circuit.
US07663393B2 Mobility measurements of inversion charge carriers
A method and device for determining the quality of the interface surface between a layer of a dielectric material and the top surface of the semiconductor substrate are disclosed. In one aspect, the method comprises providing a semiconductor substrate with a top surface whereon a layer of a dielectric material is deposited thereby forming an interface surface, the surface of the layer of the dielectric material being or not in direct contact with the semiconductor substrate defining a top surface. A charge is then applied on a dedicated area of the top surface. A voltage Vs is measured on the top surface. The dedicated area is illuminated to define an illuminated spot. The photovoltage is measured inside and outside the determined illuminated spot during the illumination of the area.
US07663391B2 Test system and method for reducing test signal loss for integrated circuits
An integrated circuit test system includes a probe card, a driver, a receiver, and a first switch. The driver is coupled to the probe card via a first signal line. The receiver is coupled to the probe card via a second signal line. The first switch is coupled between the probe card and the first signal line. After the driver outputs a test signal to a device under test via the first signal line, the first switch is turned off, and then the receiver reads the test signal via the second signal line. Thus, the test signal loss can be reduced.
US07663385B2 Apparatus and method for electrical characterization by selecting and adjusting the light for a target depth of a semiconductor
The present disclosure provides methods and apparatus that enable characterization of an electrical property of a semiconductor specimen, e.g., dopant concentration of a near-surface region of the specimen. In exemplary method, a target depth for measurement is selected. This thickness may, for example, correspond to a nominal production thickness of a thin active device region of the specimen. A light is adjusted to an intensity selected to characterize a target region of the specimen having a thickness no greater than the target depth and a surface of the specimen is illuminated with the light. An AC voltage signal induced in the specimen by the light is measured and this AC voltage may be used to quantify an aspect of the electrical property, e.g., to determine dopant concentration, of the target region.
US07663384B2 Method and apparatus for measuring metallic area-specific resistance
A simple method and apparatus for measuring the low area specific resistance of a metal plate, particularly in high temperature (<962° C.) environment, are provided. The metal plate, which may include a coating, is used in high temperature environment for electric conduction. Silver paste is applied on the metal surface. Paste sintering processes to minimize contact resistance are described. These sintering processes cause negligible change to the original metal condition, thus accurate and precise area specific resistivity of the metal plate can be obtained.
US07663382B2 High-speed capacitor leakage measurement systems and methods
Systems and methods according to aspects of the present invention are described. The systems and methods enable charging, soaking, and measuring of capacitors to be conducted quickly. Charging and soaking typically occurs in parallel and certain embodiments facilitate the measuring of capacitor leakage by sequentially disconnecting each capacitor and measuring the time for voltage on the capacitor to reach a predetermined threshold. Further, all capacitors can be disconnected from a charging source simultaneously and voltages can be measured for each capacitor simultaneously. Monitoring can be periodic in nature. Substantial time savings in the calculation device of leakage values and parameters can be attained.
US07663381B2 Electrical condition monitoring method for polymers
An electrical condition monitoring method utilizes measurement of electrical resistivity of a conductive composite degradation sensor to monitor environmentally induced degradation of a polymeric product such as insulated wire and cable. The degradation sensor comprises a polymeric matrix and conductive filler. The polymeric matrix may be a polymer used in the product, or it may be a polymer with degradation properties similar to that of a polymer used in the product. The method comprises a means for communicating the resistivity to a measuring instrument and a means to correlate resistivity of the degradation sensor with environmentally induced degradation of the product.
US07663372B2 Resistivity tools with collocated antennas
A resistivity tool for use in a wellbore is provided. The resistivity tool, in one embodiment, may include a longitudinal tool member, a first set of slots at a selected location in the longitudinal tool member and a conductor associated with the first set of slots to form a first antenna having a first orientation, and a second set of slots substantially at the selected location of the longitudinal tool member and a second conductor associated with the second set of slots to form a second antenna having a second orientation, thereby forming co-located antennas having different orientations.
US07663369B2 Patient couch, magnetic resonance imaging (MRI) apparatus, and MRI method
A magnetic resonance imaging (MRI) apparatus provides a belt-tension varying unit including a belt winding mechanism that performs reeling and unreeling a belt, a belt driving unit that drives the belt winding mechanism, and belt controlling unit that varies a tension of the belt corresponding to any one of a body length, a body weight, and a part to be imaged of a subject. The belt controlling unit varies the tension of the belt in such a manner that the belt controlling unit makes the tension of the belt large under a circumstance having high possibility where the subject moves, and makes the tension of the belt small under a circumstance having low possibility where the subject moves.
US07663367B2 Shaped MRI coil array
An MRI rf coil array is comprised of a large number of separate coil elements that are supported on a substrate that is shaped to the contour of the anatomy being imaged. The coil elements overlap each other to reduce mutual inductance and their location is determined by tiling the surface of the substrate with regular, substantially same sized polygons. The center of each coil element is aligned with the center of a polygon. By using a mixture of different polygons, such as hexagons and pentagons, an arrangement of coil elements may be formed that cover a surface with non-zero Gaussian curvature where each coil is overlapped with its neighbors such that their mutual inductance is nulled.
US07663365B2 Magnetic resonance imaging apparatus and analysis method for fat suppression effect in magnetic resonance imaging apparatus
A magnetic resonance imaging apparatus includes an imaging unit which performs imaging more than once with respect to an imaging target while changing a central frequency of a fat suppression pulse, a generation unit which generates a plurality of images based on magnetic resonance signals obtained by imaging performed more than once, and a calculation unit which calculates factor information of spatial inhomogeneity of a fat suppression effect based on the plurality of images.
US07663363B2 Method and apparatus for high signal-to-noise ratio NMR well logging
A method for measuring nuclear magnetic properties (NMR) properties of a formation, the method including applying a magnetic field to nuclei of the formation during a polarizing interval, the magnetic field having a polarizing intensity; changing the magnetic field to a measurement intensity, the measurement intensity applied to the nuclei of the formation during a measurement interval; applying to the formation at least one radio frequency (RF) pulse train during the measurement interval; and measuring an NMR signal from the formation.
US07663358B2 Current sensor and molding method thereof
A current sensor which can measure accurately current of a wide range, at low cost. A C-shaped shield plate is positioned around a flow direction of a current of the bus bar. When the current flows through the bus bar, magnetic flux density of a magnetic field is generated. A magneto-electronic conversion element detects the magnetic flux density of the magnetic field, and converts the magnetic flux density into an electric signal. Furthermore, the magneto-electronic conversion element is arranged near a position where the previously measured magnetic flux density of the magnetic field, which is generated when a current flows through the bus bar, is minimized between the conductor and the shield plate.
US07663357B2 Signal readout circuit for amperometric sensor
A signal readout circuit for amperometric sensor for reading a readout signal of a sensor includes an amplifier, a first transistor, a second transistor, and a first resistor. A negative input end of the amplifier receives an input voltage, and a positive input end of the amplifier is connected to a reference electrode of the sensor. Gates of the first transistor and the second transistor are connected to an output end of the amplifier, a drain of the first transistor is connected to a counter electrode of the sensor, and a drain of the second transistor is connected to the first resistor.
US07663355B2 Power supply apparatus
In a power supply apparatus that is so configured as to produce from an input voltage an output voltage Vo within a predetermined permissible variation range, the output voltage Vo is so controlled as to decrease within the permissible variation range as the output current Io increases. This configuration offers an output voltage with an improved transient characteristic against an abrupt variation in the output current and simultaneously permits reduction of the power consumed when the output current increases.
US07663354B2 Voltage clamp circuit, a switching power supply device, a semiconductor integrated circuit device, and a voltage level conversion circuit
The present invention provides a voltage clamping circuit which is operated in a stable manner with the simple constitution and a switching power source device which enables a high-speed operation. In a switching power source device, one of source/drain routes is connected to an input terminal to which an input voltage is supplied, a predetermined voltage to be restricted is supplied to a gate, and using a MOSFET which provides a current source between another source/drain route and a ground potential of the circuit, a clamp output voltage which corresponds to the input voltage is obtained from another source/drain route. The switching power source device further includes a first switching element which controls a current which is made to flow in an inductor such that the output voltage assumes a predetermined voltage and a second switching element which clamps an reverse electromotive voltage generated in the inductor when the first switching element is turned off to a predetermined potential. In such a switching power source device, the voltage clamping circuit is used in a feedback route for setting a dead time.
US07663353B2 Circuit arrangement for voltage regulation
A circuit arrangement for voltage regulation comprises an output, a controllable output transistor connected to the output, an error detection circuit, and a monitoring control circuit. A voltage-regulated output potential can be tapped off the output, the controllable output transistor is connected to the output on a load side and the output transistor comprises a control terminal. The error detection circuit provides a regulating signal if a deviation between the output potential or a potential derived from the output potential and a desired value occurs. By means of the regulating signal the control terminal can be charged or discharged dependent on the deviation and the monitoring control circuit monitors the regulating signal and performs, if the regulating signal lies outside a predetermined range, an additional charging or discharging of the control terminal until the regulating signal lies within the predetermined range.
US07663352B2 Control circuit for measuring and regulating output current of CCM power converter
A switching control circuit is provided for measuring and regulating an output current of a power converter. The power converter is operated under continuous current mode. A detection circuit generates a continuous-current signal and a peak-current signal by detecting a switching current of an inductive device. An integration circuit generates an average-current signal in response to the continuous-current signal, the peak-current signal and an off time of a switching signal. The switching control circuit generates the switching signal in response to the average-current signal. The switching signal is coupled to switch the inductive device and regulate the output current of the power converter. A time constant of the integration circuit is correlated to the switching period of the switching signal, therefore the average-current signal will be proportional to the output current.
US07663350B2 External electrical energy supply for field device
A field-device electronics for a field device. The field device electronics is supplied from an external electrical energy supply providing a supply voltage and delivering a variable supply current driven by the supply voltage. The field-device electronics includes an internal control unit for controlling the field device, as well as at least one internal supply circuit feeding the internal control unit. The supply current is a mixed current formed by superimposing and/or modulation of an alternating current portion onto a direct current portion. The internal supply circuit uses, at least at times and/or at least in part, also the alternating current portion of the mixed current for covering an instantaneous energy requirement of the control unit.
US07663344B2 Method for managing a pool of rechargeable batteries according to priority criteria determined based on a state of health of batteries
The management of a pool of batteries is an intelligent management taking account of the state of health of all the batteries of the pool and of the evolution thereof with time. The method for managing includes determination of priority criteria and charging of a battery selected according to the priority criteria. After the selected battery has been charged, electrical parameters representative of the battery are measured, then the state of health of the selected battery is analyzed according to the measured electrical parameters. The priority criteria are then updated according to the state of health of the battery. Selection of the next battery to be recharged is performed according to the updated priority criteria. The measured parameters used for analyzing the state of health are preferably representative of a coup de fouet effect during a partial discharge of a fully charged battery.
US07663342B2 Apparatus, system, and method for controlling multiple power supplies
In an electrical power supply having a plurality of switching power converter circuits and configured to supply a voltage to an electrical load, a method of controlling a duty cycle of at least one switch of one of the plurality of switching power converter circuits includes determining a storage voltage produced by the one of the plurality of energy storage devices. The method further includes determining an average storage voltage corresponding to an average of storage voltages produced by each of the plurality of energy storage devices. The method further includes determining at least one control signal as a function of the storage voltage, the average storage voltage, and a reference voltage. The method further includes controlling the duty cycle of the at least one switch of the one of the plurality of switching power converter circuits based upon the at least one control signal.
US07663338B2 Method and apparatus for handling a charging state in a mobile electronic device
In accordance with the teachings described herein, a method and apparatus for handling a charging state in a mobile electronic device is provided. A universal serial bus (USB) interface may be used for connecting the mobile device to a USB host. A processing device may be used to execute programs and to control operation of the mobile device. The processing device may be operable to receive an enumeration acknowledgement signal from the USB host via the USB interface and generate an enable signal upon receiving the enumeration acknowledgement signal. A rechargeable battery may be used to power the processing device. A battery charger may be used to receive a USB bus voltage from the USB interface and use the USB bus voltage to power the processing device and to charge the rechargeable battery. The battery charger may be further operable to receive a charge enable signal that enables and disables the battery charger from powering the processing device and charging the rechargeable battery. A timing circuit may be used to detect the USB bus voltage and to measure the passage of a pre-determined amount of time upon detecting the USB bus voltage. A battery charger enabling circuit may be used to generate the charge enable signal to control the battery charger, the battery charger enabling the battery charger if the timer has measured the passage of the pre-determined amount of time or the enable signal is received from the processing device.
US07663337B2 Frequency converter, motor, motor drive system and maintenance method for motor drive system
A frequency converter for outputting a power to drive a motor, having: an inverter unit for inverting a d.c. power to an a.c. power; a control unit for controlling the inverter unit; and a housing for supporting at least the inverter unit and control unit, wherein a rise time change unit is provided in the housing, the rise time change unit changes a rise time of a waveform of a voltage output from the inverter unit.
US07663336B2 Control apparatus for vehicle
In a control apparatus for a vehicle having an electric motor for driving the wheels of the vehicle, an electric power source for energizing the electric motor, a motor torque target value calculation unit for controlling the electric power source, and a field current target value calculation unit, the motor field current is momentarily decreased when the difference between the actual motor armature current and the motor armature current target value exceeds a predetermined value or when the wheels are deemed to slip, and the motor field current is increased as the actual armature current of the motor substantially follows the motor armature current target value.
US07663333B2 Method and system for multi-mode coverage for an autonomous robot
A control system for a mobile robot (10) is provided to effectively cover a given area by operating in a plurality of modes, including an obstacle following mode (51) and a random bounce mode (49). In other embodiments, spot coverage, such as spiraling (45), or other modes are also used to increase effectiveness. In addition, a behavior based architecture is used to implement the control system, and various escape behaviors are used to ensure full coverage.
US07663329B2 Motor control unit and vehicle equipped therewith
A motor unit and a vehicle equipped with the unit according to the invention includes a control unit that selects a switching frequency, that is, a carrier frequency, in accordance with a rotation speed of the motor and a torque required from a motor. When an inverter temperature becomes high, the control unit limits the torque of the motor to suppress further increase in the inverter temperature. A limit value used in restricted operation is determined in accordance with the temperature and the carrier frequency of the inverter.
US07663328B2 Multi-phase, multi-frequency controller
Reference signals are combined with a chop frequency signal in a pulse width modulator (PWM) to provide plural inputs to a multi-phase H-bridge amplifier. Also provided to the bridge amplifier is a high voltage DC input which is converted by the pulsed inputs to the bridge amplifier to a variable AC voltage for driving a motor. The AC drive voltage is also provided to a variable frequency voltage-controlled oscillators (VCOs) in a feedback arrangement, with the variable frequency VCO outputs heterodyned with each of plural outputs of a multi-phase ring oscillator to provide plural baseband signals having a constant phase relationship at a high frequency. The baseband signals form the aforementioned reference signals provided to the PWM in the feedback arrangement with closed loop control and frequency and phase discrimination using phase lock loop techniques for synchronous motor control over a range of DC-100 kHz with 0-25 MHz VCOs.
US07663323B2 Monitoring device for an array of electrical units
A monitoring device for monitoring an array (4) of electrical units, in particular an array of high capacity light emitting diodes (LEDs) (4.1-4.12). The electrical units are connected in series and driven by a constant electric current (I). The monitoring device has a bypass means (4.1a-4.12a) for each electrical unit (4.1-4.12), operable to bypass the respective electrical unit in case of a disconnection of the respective electrical unit, and an evaluation unit (3) connected in parallel with the array (4) of electrical units, said evaluation unit (3) being adapted to determine a total voltage (UT) of the array (4) of electrical units and to output a control signal (CS) indicative of a function status of the array (4) of electrical units in accordance with a value of the total voltage (UT) relative to a predetermined threshold value (VREF). Thus is provided an electric circuitry which allows an easy and reliable detection of a malfunction of the array of electrical units, e.g. due to failure of individual LEDs because of short circuits and/or disconnection, while ensuring a continued operation of the array in case of only minor problems. The monitoring device can advantageously be used in signalling devices, in particular for railway signalling purposes.
US07663318B2 HID lamp with rapid relight aid
The restrike time for re-light up of an arc discharge lamp may be decreased by including at least one refractory bimetallic start up electrode that provides a shorter arc path intermediate the main arc path in a cool state, but when heated withdraws to have a relatively longer arc path. The longer arc path in the hot state results in a relatively higher path impedance that can be used by itself or in combination with a supplemental impedance device to extinguish the starting arc in favor of the main arc. The withdrawn bimetallic starting electrode then does not interfere with the main arc function.
US07663311B2 Organic light emitting display (OLED) device and method of fabricating the same
An organic light emitting display (OLED) device having a simple process of fabrication and improved lifetime and reliability, and a method of fabricating the same are disclosed. The OLED device comprises: a substrate; a sealing member which seals a plurality of pixels arranged on a pixel region; and a sealing material which bonds the substrate and the sealing member. Each of the pixels includes a thin film transistor disposed on the substrate, an EL device including a lower electrode connected to the thin film transistor, a pixel isolation layer exposing a portion of the lower electrode, an organic layer formed on at least the exposed portion of the lower electrode, and an upper electrode. A pad interconnection line of a pad interconnection region is covered by a first insulating layer, and a pad of a pad region is covered by a second insulating layer so as to expose a portion of the pad. The first insulating layer and the second insulating layer are formed of the same material as a lower layer of the pixel isolation layer.
US07663308B2 Plasma display panel
A plasma display panel may include a first substrate, a second substrate opposite to the first substrate with a predetermined space therebetween, the space being partitioned into a plurality of discharge cells, a phosphor layer formed in the discharge cells, address electrodes extending in a first direction on the first substrate to correspond to the discharge cells, and a first electrode and a second electrode extending in a second direction crossing the first direction at the first substrate side, spaced apart from the address electrodes, formed opposite to each other, and projecting toward the second substrate with a discharge space formed therebetween, wherein the address electrodes include protrusions disposed adjacent to the second electrodes and protruding toward the inside of the discharge cells, and wherein at least one of the first electrode and the second electrode includes protrusions protruding toward an inside of a respective one of the discharge cells.
US07663305B2 Light emitting device and method of manufacturing the same
In a top emission structure, there has been a problem in that a wiring, a TFT, or the like is provided in regions other than a light emitting region so that light reflected by the wiring reaches eyes of an observer. The present invention prevents light that is reflected by a wire from reaching eyes of an observer by providing a light-absorbing multilayer film (61) in regions other than a light emitting region. Specifically, the light-absorbing multilayer film (61) is used as an upper layer of a partition wall (also called as a bank or a barrier) that covers ends of a first electrode (66b) whereas an organic resin film (67) is used as a lower layer of the partition wall. The partition wall in the present invention is characterized by being a laminate of three or more layers formed of different materials.
US07663302B2 Organic light emitting display (OLED) and its method of fabrication
An Organic Light Emitting Display (OLED) and its method of fabrication includes: a transparent substrate; a photochromatic layer formed on a first surface of the transparent substrate; at least one transparent Thin Film Transistor (TFT) formed on a first surface of the transparent substrate, and an organic light emitting device formed on and electrically connected to the transparent TFT.
US07663301B2 Porphyrin compositions
Novel metal porphyrin compositions useful as organic phosphors are provided. The novel compositions are prepared from commercially available porphyrin-containing starting materials. In one instance a novel palladium-containing porphyrin composition having a number average molecular weight of greater than 12,000 grams per mole was prepared from 5,10,15,20-tetrakis(3′,5′-di(hydroxy)phenyl)-21H-23H-porphyrin by reaction first with palladium(II) acetylacetonate, followed by reaction with 2-bromo-2-methylpropionyl bromide, and subsequent group transfer reaction of the alpha-bromo ester groups with 9,9-dioctyl-2-vinylfluorene in the presence of CuBr as a radical initiator. The product polymer exhibited a number average molecular weight of 12,884 grams per mole, a weight average molecular weight of 14,338 grams per mole, and a robust red phosphorescent emission. Porphyrin containing copoylmers comprising structural units derived from 9,9-dioctyl-2-vinylfluorene and 9-anthracenylmethyl methacrylate were prepared in a similar fashion.
US07663299B2 Full-color organic electroluminescence display panel having sub pixel regions
A full-color organic electroluminescence (OEL) display panel includes a substrate and a plurality of full-color OEL pixel devices in a matrix form as a display frame. Each of the pixel devices is composed of a plurality of sub-pixel regions, corresponding to R, G or B colors. Each of the specific color sub-pixel regions in the pixel device abuts the same specific color sub-pixel region of the adjacent pixel device thereof to form a double-sized emission area. With this arrangement of sub-pixel regions, it is easier to manufacture (a) high-resolution full-color OLED panels by a metal-mask alignment process, and (b) high-resolution full-color PLED panels by an ink-jet printing process.
US07663295B2 Method and system for measuring physical parameters with a piezoelectric bimorph cantilever in a gaseous or liquid environment
A piezoelectric bimorph cantilever is used for determining physical parameters in a gaseous or liquid environment. The sensor works as a driven and damped oscillator. Contrary to common cantilever sensor systems, the piezoelectric film of the bimorph cantilever acts as both a sensor and an actuator. Using at least two resonance mode of the bimorph cantilever, at least two physical parameters can be measured simultaneously in a gas or a liquid. An optimized piezoelectric cantilever and a method to produce the cantilever are also described.
US07663292B2 Ultrasonic actuator
An ultrasonic actuator includes: a piezoelectric element 10 producing stretching and bending vibrations; driver elements 2, 2 placed on the piezoelectric element 10 so as to be actuated in accordance with the vibrations of the piezoelectric element 10, thereby outputting a driving force; a case 12 for supporting the piezoelectric element 10; and wall-surface supporters 6A and 6B, top-surface supporters 7A and 7B and a bottom-surface supporting part 8 all placed between the case 12 and the piezoelectric element 10 to previously apply compressive forces to non-node parts of the vibrations of the piezoelectric element 10 along the directions of the vibrations.
US07663288B2 Betavoltaic cell
High aspect ratio micromachined structures in semiconductors are used to improve power density in Betavoltaic cells by providing large surface areas in a small volume. A radioactive beta-emitting material may be placed within gaps between the structures to provide fuel for a cell. The pillars may be formed of SiC. In one embodiment, SiC pillars are formed of n-type SiC. P type dopant, such as boron is obtained by annealing a borosilicate glass boron source formed on the SiC. The glass is then removed. In further embodiments, a dopant may be implanted, coated by glass, and then annealed. The doping results in shallow planar junctions in SiC.
US07663287B2 Motor
A motor includes a stator and a bus bar supported axially above the stator. The bus bar includes a concave portion arranged in a lower surface thereof facing toward coils of the stator. In a gap defined between the coil and the concave portion, a portion of the wire extracted from the coil and wound in the circumferential direction (i.e., a crossover wire portion) is accommodated. The bus bar includes a wire-positioning hole through which the wire is led to a terminal to be connected with the wire.
US07663285B2 Brushless motor
This brushless motor according to the present invention is provided with: a tubular stator case; a stator core; a rotor; a plurality of teeth which are integrally formed on an inner peripheral surface of the stator core; a coil bobbin mounted between the mutually adjacent teeth, which has a winding portion around which a coil is wound; a lead wire; and a wiring substrate which relays a connection between the lead wire and the coil, wherein: the coil bobbin has flange portions; one of the flange portions which is located on the inward in the radial direction has an enlarged member which protrudes outward from the surface of the flange portion; a pair of terminals which is connected to the wiring substrate is provided on the enlarged portion so as to be located more inward than a tip of the tooth in the radial direction.
US07663284B2 Bobbin for stator of motor
A bobbin includes a bobbin body, two top sidewalls, two bottom sidewalls, four top tabs and four bottom tabs. The bobbin body includes a top surface formed at one end of the bobbin body, a bottom surface formed at an opposite end of the bobbin body and a side surface located between the top surface and the bottom surface. The top sidewalls extend radially outward from the top surface of the bobbin body. The bottom sidewalls extend radially outward from the bottom surface of the bobbin body. The bottom sidewalls are staggered so that there is no overlap area between the top sidewall and the bottom sidewall along an axial direction of the bobbin body. Four top tabs extend away from the top surface at a position where there is no top sidewall. Four bottom tabs extend away from the bottom at a position where there is no bottom sidewall.
US07663283B2 Electric machine having a high-torque switched reluctance motor
According to one embodiment of the present invention, an electric machine comprises a stator and a rotor. The stator has at least one stator pole with a first leg and a second leg. The rotor has at least one rotor pole. The rotor rotates relate to the stator. The at least one rotor is configured to rotate between the first leg and the second leg of the at least one stator pole.
US07663280B2 Spindle motor and disk drive device using the same
A spindle motor and a disk drive device are provided that have a high operation efficiency of the motor, that does not leak oil, and that has an improved stability by decreasing a runout component in the direction of the rotation axis. The spindle motor includes a rotor hub (20) composed of a disk-like flange (201) and a cylinder-shaped shaft (203); a ring-shaped rotating magnet (16) fastened on one main surface of the flange (201); an armature (14) facing the rotating magnet (16); a sleeve (80) rotatably supporting the shaft (203); and a chassis (15) fixing the armature (14) and the sleeve (80). The flange (201) and the shaft (203) are integrally formed with magnetic material; a protrusion is not provided between a mounting surface (204) for mounting the rotating magnet (16) thereon and a counter-face surface (205) facing the end surface of the sleeve; and the mounting surface (204) and the counter-face surface (205) are orthogonal to the direction of the central axis (A-A′) of the shaft (203), and in a level plane; or the mounting surface (204) is recessed stepwise from the counter-face surface (205) toward the disk mounting portion (202).
US07663270B2 Canned linear motor armature and canned linear motor
In the canned linear motor armature, both the side surfaces of the armature winding (18) are fixed by two winding fixing frames (4) so as to sandwich the armature winding in between them in the longitudinal direction. A refrigerant passage (5) is provided in a space between the can (3) and the winding fixing frame (4). A seal material (24) is provided in a gap between a case (2) and the winding fixing frame (4) to prevent a refrigerant supplied to the refrigerant passage (5) from leaking to the armature winding (18) sandwiched in between the two winding fixing frames (4) to impregnate the armature winding (18) with the refrigerant. A waterproof film is adhered onto a surface of the winding fixing frame (4) where the refrigerant comes into contact.
US07663269B2 High bandwidth linear actuator for steering mirror applications
A printed circuit board (PCB) coil linear actuator is disclosed. The actuator includes a coil assembly and a magnet assembly. The coil assembly includes a plurality of PCB coils electrically connected in series. The PCB coils arranged in a row and adjacent PCB coils are separated by a gap. Each PCB coil includes a low aspect ratio, multi-layer coil member disposed on a board member. The actuator assembly includes a plurality of magnet units arranged in a row, wherein adjacent magnet units are separated by a gap. When the actuator is assembled, the PCB coils arranged in alternating sequence with the magnet units. The PCB coil linear actuator is intended to replace traditional slotted bobbin voice coil actuators (VCAs) and is particularly useful in fast steering mirror (FSM) applications. The PCB coil linear actuator provides many advantages over a VCA of an equivalent motor constant, including improved performance, lower weight and a lower profile.
US07663268B2 Converters for high power applications
Multilevel high power converters, referred to as hexagram converters, which preferably include a combination of six three-phase converter modules, are provided herein. The three-phase converter modules are interconnected and can be configured as any three-phase converter for any given application. One or more inductors can be used in the interconnections between the six modules to suppress potential circulating currents. Numerous applications exist in which the described converters can be implemented.
US07663263B2 Wind turbine power module mounted on the tower foundation
The invention relates to a method of constructing a wind energy plant and to a wind energy plant as such. In one aspect, the invention provides a method for constructing wind energy plants at lower expenses and more rapidly. According to one embodiment, a method for constructing a wind energy plant that comprises a tower that is based on a foundation and an electrical power module, the power module is mounted on the tower foundation before the tower itself is constructed. The power module includes a transformer and may optionally an inverter and/or other electrical installations, such as for example switch cabinets, that are provided for controlling the wind energy plant and/or for guiding the electrical power that is provided by the generator of the wind energy plant and that is fed to a network.
US07663262B2 System and method for converting wind into mechanical energy for a building and the like
A system for converting an airflow into mechanical or electrical energy and dimensioned to be attachable to a structure. The system includes a leading edge member, a pair of drawtube arrays, and an energy conversion device located between the pair of drawtube arrays and configured to convert an airflow through the channel into mechanical or electrical energy.
US07663261B2 Flow development and cogeneration chamber
A fluid handling and cogeneration system has an inlet conduit receiving a fluid, a housing having a inlet end, a outlet end and an interior surface. The housing encloses an inner body which together with the housing is arranged to form an annular space between the interior surface of the housing and an exterior surface of the inner body. The system also includes at least one diverter configured such that the fluid is directed to circulate around the inner body and traverse the annular space from the diverter toward the outlet end of the housing in an organized fashion. A generator is provided within the housing to harness the fluid traversing the annular space to generate electrical power.
US07663259B2 Self-powered miniature liquid treatment system
A liquid treatment system that may be self-powered includes a filter, an ultraviolet light source and a hydro-generator. A flow of liquid may be filtered with the filter and used to rotate the hydro-generator to generate electric power. The ultraviolet light source may be energized by the electric power generated by the hydro-generator when the magnitude of electric power of the hydro-generator enters a determined range. The flow of liquid may be subject to ultraviolet energy generated by the ultraviolet light source.
US07663258B2 Miniature hydro-power genteration system power management
A miniature hydro-power generation system may include a hydro-generator, a control circuit and an energy storage device. A flow of liquid may be used to rotate the hydro-generator to generate electric power. The control circuit may switch the electric power to charge the energy storage device and/or to supply the electric power to an electrical load. The control circuit may also selectively switch the energy storage device to supply electric power to the electrical load. Further, the control circuit may disable both the hydro-generator and the energy storage device from supplying electric power to the load.
US07663254B2 Semiconductor apparatus and method of manufacturing the same
There is provided a semiconductor apparatus which includes a substrate, a semiconductor chip mounted above the substrate, a first resin filled between the substrate and the semiconductor chip, and a second resin formed on the substrate and extending from a side surface of the semiconductor chip toward an outer edge of the substrate. The second resin extends from an intersection of an extension of the side surface of the semiconductor chip and the substrate toward the outer edge of the substrate so that a first stress generated on a contact surface between the first resin and the semiconductor chip and a second stress generated on a contact surface between the first resin or the second resin and the substrate balance out each other.
US07663252B2 Electric power semiconductor device
An electric power semiconductor device including first and second circuit patterns formed on main surfaces of first and second insulating substrates, respectively, first and second semiconductor chips mounted on the first and second circuit patterns, respectively, a multilayer electrode plate assembly disposed between the first and second insulating substrates, having first, second and third electrode terminals provided with a distance from each other, a first connecting conductor made by wire bonding for connecting the first and second semiconductor chips to the first and second electrode terminals, and a second connecting conductor having an extending portion extended from a part of the third electrode terminal to be connected to the second circuit pattern, and the connection between the extending portion of the third electrode terminal and the second circuit pattern is implemented by a solder.
US07663247B2 Semiconductor intergrated circuit device
A semiconductor integrated circuit device includes a semiconductor chip, a memory cell array arranged on the semiconductor chip and first and second decoder strings arranged along both ends of the memory cell array. The arrangement position of the first decoder string is deviated from the arrangement position of the second decoder string and a space caused by the deviation is arranged in the corner of the semiconductor chip.
US07663246B2 Stacked chip packaging with heat sink structure
A stacked package structure with leadframe having bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, in which the die pad is provided between the inner leads and is vertically distant from the inner leads; a bus bar being provided between the inner leads and the die pad; an offset chip-stacked structure stacked by a plurality of chips, the offset chip-stacked structure being fixedly connected to a first surface of the die pad and electrically connected to the inner leads; and an encapsulant covering the offset chip-stacked structure, the inner leads, the first surface of die pad, and the upper surface of bus bar, the second surface of die pad and the lower surface of bus bar being exposed and the outer leads extending out of the encapsulant.
US07663245B2 Interposer and stacked chip package
An interposer may include a base substrate supporting an array of conductive lands. The conductive land may have an identical shape and size. The conductive lands may be provided at regular intervals on the base substrate. The conductive land pitch may be determined such that adjacent conductive lands may be electrically connected by one end of an electric connection member. Alternatively, each conductive land may provide respective bonding locations to which ends of two different electric connection members may be bonded. A stacked chip package may include an interposer that may be fabricated by cutting an interposer to size. In the stacked chip package, electrical connections may be made through the interposer between an upper semiconductor chip and a package substrate, between the upper semiconductor chip and a lower semiconductor chip, and/or between the lower semiconductor chip and the package substrate.
US07663244B2 Semiconductor device and semiconductor wafer and a method for manufacturing the same
The semiconductor device 1 has a semiconductor chip 10 (first semiconductor chip) and a semiconductor chip 20 (second semiconductor chip). The semiconductor chip 20 is formed on the semiconductor chip 10. The semiconductor chip 20 is constituted by comprising a semiconductor substrate 22. The semiconductor substrate 22, which is an SOI substrate, is constituted by comprising an insulating layer 34, and a silicon layer 36, which is provided on the insulating layer 34, including a circuit forming region A1. The insulating layer 34 functions as a protective film (a first protective film) covering a lower face (a face opposite to the semiconductor chip 10) of the circuit forming region A1. A protective film 38 (a second protective film) is provided on the semiconductor substrate 22. The protective film 38 covers a side face of the circuit forming region A1.
US07663243B2 Semiconductor memory device comprising pseudo ground pad and related method
A semiconductor memory device comprising a pseudo ground voltage pad and a method of making the semiconductor device are disclosed. The semiconductor memory device comprises a plurality of pads that are respectively adjacent to one another in a first direction. The plurality of pads comprises a plurality of ground voltage pads and a plurality of data pads. The semiconductor memory device further comprises a first peripheral circuit ground line disposed adjacent to the pads and extending in the first direction, and an insulating layer formed on a portion of a first region of the semiconductor memory device comprising the plurality of pads and at least a portion of the first peripheral ground circuit line, wherein a region of the first peripheral circuit ground line is exposed to define a pseudo ground voltage pad, and the pseudo ground voltage pad is adjacent to one of the data pads.
US07663241B2 Semiconductor device
A semiconductor device comprises a substrate, a first conductive film, a first insulation film, a second insulation film, a second conductive film, and a third conductive film. The first conductive film is formed on the substrate. The first insulation film is formed on the first conductive film and has a first opening. The first opening is formed as having multiple crossing trenches each having a predetermined width. The second insulation film is formed on the sides and bottom of the first opening. The second conductive film is formed on the second insulation film in the interior of the first opening. The third conductive film is formed on the second insulation film and the second conductive film.
US07663235B2 Semiconductor die with reduced bump-to-pad ratio
According to one exemplary embodiment, a semiconductor die includes at least one pad ring situated on an active surface of the semiconductor die, where the at least one pad ring includes a number of pads. The semiconductor die further includes a number of bumps including at least one shared bump. The at least one shared bump is shared by at least two pads, thereby causing the number of bumps to be fewer than the number of pads. The at least two pads can be at least two ground pads, at least two power pads, or at least two reference voltage pads.
US07663230B2 Methods of forming channels on an integrated circuit die and die cooling systems including such channels
A method of forming channels on a die or other substrate. Also disclosed are liquid cooling systems including such channels.
US07663226B2 Heat-releasing printed circuit board and semiconductor chip package
A heat-releasing printed circuit board and semiconductor chip package are disclosed. The heat-releasing printed circuit board includes an insulation layer, on a surface of which a circuit pattern is formed, and a solder resist, which is stacked on the insulation layer, where the solder resist contains carbon nanotubes. The heat-releasing printed circuit board allows the heat generated in a semiconductor chip to be dispersed in several directions of the board or package, to improve heat-releasing property.
US07663225B2 Method for manufacturing electronic components, mother substrate, and electronic component
In a manufacturing process of electronic components which include conductive patterns laminated with insulating layers provided therebetween, conductive pattern layers having conductive patterns formed at intervals therebetween along layer surfaces and insulating layers are alternately laminated to each other. The laminate is pressed by applying a force thereto in the lamination direction, followed by cutting of the laminate along cutting lines provided along boundaries between the electronic components, so that the electronic components are separated from each other. In a cutting-removal region of a mother substrate from which the electronic components are separated from each other by cutting, removal dummy patterns having a size allowing it to be disposed within the above region are formed. In the electronic component, floating dummy patterns which are not electrically connected to the conductive patterns are formed at intervals from the cutting-removal region.
US07663224B2 Semiconductor BGA package having a segmented voltage plane
A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of an electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.
US07663223B2 Coupling substrate for semiconductor components and method for producing the same
A coupling substrate for semiconductor components includes a patterned metal layer on a topside of an insulating carrier. Metal tracks project beyond the insulating carrier, the metal tracks being angled away at the lateral edges of the carrier in the direction of the underside of the carrier and projecting beyond the underside of the carrier. The metal tracks have a metal coating, thereby enlarging each cross section such that the metal tracks form dimensionally stable, flat, conductor external contacts of the coupling substrate.
US07663220B2 Semiconductor device module structure
A semiconductor module includes: a semiconductor element (13) having a working unit (11) and a guard ring unit (12); and heat radiation members (15, 14) arranged on an upper surface and a lower surface of the semiconductor element for cooling the semiconductor element. A passivation film (20) covers the guard ring but does not cover the working unit. The upper heat radiation member (15) is made of a flat metal plate connected to the working unit without contact with the passivation film. The upper heat radiation member is connected to the lower heat radiation member (14) in the thermo-conducting way.
US07663219B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.
US07663218B2 Integrated circuit component with a surface-mount housing
A semiconductor component including a surface-mount housing and a method for producing the same are described herein. The semiconductor component includes lead pieces embedded into a plastic housing composition and arranged on an underside of the housing. External contact areas of the lead pieces are free of the plastic housing composition. A structured solderable coating is arranged on the external contact areas that have been kept free of the plastic housing composition, the coating includes a plurality of electrically conductive and mechanically elastic contact elements.
US07663215B2 Electronic module with a conductive-pattern layer and a method of manufacturing same
This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component (6) is glued (5) to the surface of a conductive layer, from which conductive layer conductive patterns (14) are later formed. After gluing the component (6), an insulating-material layer (1), which surrounds the component (6) attached to the conductive layer, is formed on, or attached to the surface of the conductive layer. After the gluing of the component (6), feed-throughs are also made, through which electrical contacts can be made between the conductive layer and the contact zones (7) of the component. After this, conductive patterns (14) are made from the conductive layer, to the surface of which the component (6) is glued.
US07663213B2 Wafer level chip size packaged chip device with a double-layer lead structure and method of fabricating the same
The present invention disclosed a wafer level chip size packaged chip device with a double-layer lead structure and methods of fabricating the same. The double-layer lead is designed to meet a tendency of increasing quantity per area of peripheral arrayed compatible pads on a semiconductor chip, and also to save more space for layout of lead on the chip bottom surface for avoiding potential short inbetween which happen in increasing probability with increasing quantity per area on the condition of one-layer lead.
US07663212B2 Electronic component having exposed surfaces
An electronic component includes at least one vertical MOSFET device, a leadframe and a contact clip. A source electrode and gate electrode are provided on a lower surface of the MOSFET device and are mounted on a source portion and a gate portion, respectively, of the leadframe. The contact clip is electrically connected between the drain electrode, which is positioned on the upper surface of MOSFET device, and a drain portion of the leadframe.
US07663211B2 Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture
An integrated power device module having a leadframe structure with first and second spaced pads and one or more common source-drain leads located between said first and second pads, first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads, and a first clip attached to the drain of said first transistor and electrically connected to said one or more common source-drain leads. In another embodiment a partially encapsulated power quad flat no-lead package having an exposed top thermal drain clip which is substantially perpendicular to said with a folded stud exposed top thermal drain clip, and an exposed thermal source pad.
US07663207B2 Semiconductor device
A semiconductor device includes a capacitor with an MIM structure, by which the dimensional accuracy of the device is improved, and a stable capacitance value is given. The semiconductor device 100 includes: a semiconductor substrate 102; a capacitor forming region 130 in which an MIM capacitor is formed, which has an insulating interlayer 104 formed on the semiconductor substrate 102, a first electrode 110, and a second electrode 112, and the first electrode 110 and the second electrode 112 are arranged facing each other through the insulating interlayer 104; and a shielding region 132 which includes a plurality of shielding electrodes 114 formed in the outer edge of the capacitor forming region 130 and, at the same time, set at a predetermined potential in the same layer as that of the MIM capacitor on the semiconductor substrate 102, and shields the capacitor forming region 130 from other regions.
US07663206B2 Interposer including at least one passive element at least partially defined by a recess formed therein, system including same, and wafer-scale interposer
An interposer for assembly with a semiconductor die and methods of manufacture are disclosed. The interposer may include at least one passive element at least partially defined by at least one recess formed in at least one dielectric layer of the interposer. The at least one recess may have dimensions selected for forming the passive element with an intended magnitude of at least one electrical property. At least one recess may be formed by removing at least a portion of at least one dielectric layer of an interposer. The at least one recess may be at least partially filled with a conductive material. For instance, moving, by way of squeegee, or injection of a conductive material at least partially within the at least one recess, is disclosed. Optionally, vibration of the conductive material may be employed. A wafer-scale interposer and a system including at least one interposer are disclosed.
US07663203B2 High-voltage PMOS transistor
In a high-voltage PMOS transistor having an insulated gate electrode (18), a p-conductive source (15) in an n-conductive well (11), a p-conductive drain (14) in a p-conductive well (12) which is arranged in the n-conductive well, and having a field oxide area (13) between the gate electrode and drain, the depth (A′-B′) of the n-conductive well underneath the drain (14) is less than underneath the source (15), and the depth (A′-B′) of the p-conductive well is greatest underneath the drain (14).
US07663202B2 Nanowire photodiodes and methods of making nanowire photodiodes
Nanowire-based photodiodes are disclosed. The photodiodes include a first optical waveguide having a tapered first end, a second optical waveguide having a tapered second end, and at least one nanowire comprising at least one semiconductor material connecting the first and second ends in a bridging configuration. Methods of making the photodiodes are also disclosed.
US07663201B2 Semiconductor device with a diffusion barrier film having a spacing for stress relief of solder bump
The present invention provides a semiconductor device exhibiting an improved reliability. A semiconductor device comprises a semiconductor chip having an electrode on a surface thereof and a mounting substrate, and the electrode (aluminum electrode) of the semiconductor chip is coupled to the mounting substrate through a bump (solder bump 104). A plurality of diffusion barrier films (UBM 112) for preventing a diffusion of a material composing the bump is provided between the electrode and the bump, and the diffusion barrier film is formed to have a plurality of divided portions via spacings therebetween.
US07663200B2 Integrated circuit device packaging structure and packaging method
A packaging structure suitable for an integrated circuit device receiving short-wavelength laser light is provided. A lead-mounted substrate is placed on the side of the light receiving surface of the integrated circuit device having a photo detecting part. The lead is electrically connected with the integrated circuit device via an electrode. The integrated circuit device and the substrate are encapsulated with an encapsulation section. The substrate has an opening at a position above the photo detecting part.
US07663194B2 CMOS image sensor
A pixel of a complementary metal oxide semiconductor (CMOS) image sensor includes a plurality of photodiodes for sensing light to thereby generate photoelectric charges in different regions; a plurality of transfer transistors for transferring photoelectric charges of corresponding photodiodes in response to a first control signal; a floating diffusion region for receiving photoelectric charges transferred by the plurality of transfer transistors; a rest transistor connected between a power supply voltage and the floating diffusion region for resetting the floating diffusion region by controlling a voltage loaded on the floating diffusion region in response to a second control signal; a drive transistor connected between the power supply voltage and the floating diffusion region to serve as a source follower buffer amplifier; and a select transistor connected between the drive transistor and a pixel output terminal for performing an addressing operation in response to a third control signal.
US07663193B2 Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region
A structure is adopted for a layout of an SRAM cell which provides a local wiring 3a between a gate 2a and gate 2b and connects an active region 1a and an active region 1b. This eliminates the necessity for providing a contact between the gate 2a and the gate 2b. Therefore, it is possible to reduce the size of a memory cell region C in a short side direction. Furthermore, a structure whereby a left end of a gate 2c is retreated from the gate 2a and a local wiring 3b which connects the active region 1b and gate 2c disposed in a diagonal direction is adopted. This allows the gate 2a to be shifted toward the center of the memory cell region C.
US07663188B2 Vertical floating body cell of a semiconductor device and method for fabricating the same
A semiconductor device includes a tube-type channel formed over a semiconductor substrate. The tube-type channel is connected to first and second conductive lines. A bias electrode is formed in the tube-type channel. The bias electrode is connected to the semiconductor substrate. An insulating film is disposed between the tube-type channel and the bias electrode. A surrounding gate electrode is formed over the tube-type channel.
US07663187B2 Semiconductor device and method of fabricating the same
An extension region is formed by ion implantation under masking by a gate electrode, and then a substance having a diffusion suppressive function over an impurity contained in a source-and-drain is implanted under masking by the gate electrode and a first sidewall spacer so as to form amorphous layers a semiconductor substrate within a surficial layer thereof and in alignment with the first sidewall spacer, to thereby form an amorphous diffusion suppressive region.
US07663183B2 Vertical field-effect transistor and method of forming the same
A semiconductor device, a method of forming the same, and a power converter including the semiconductor device. In one embodiment, the semiconductor device includes a heavily doped substrate, a source/drain contact below the heavily doped substrate, and a channel layer above the heavily doped substrate. The semiconductor device also includes a heavily doped source/drain layer above the channel layer and another source/drain contact above the heavily doped source/drain layer. The semiconductor device further includes pillar regions through the another source/drain contact, the heavily doped source/drain layer, and portions of the channel layer to form a vertical cell therebetween. Non-conductive regions of the semiconductor device are located in the portions of the channel layer within the pillar regions. The semiconductor device still further includes a gate above the non-conductive regions in the pillar regions. The semiconductor device may also include a Schottky diode including the channel layer and a Schottky contact.
US07663181B2 Semiconductor device
A semiconductor device includes a vertical field-effect transistor having a substrate of first conduction type in a substrate base, a drain electrode formed on a first surface of the substrate, an epitaxial layer of first conduction type formed on a second surface of the substrate, a source region of first conduction type formed on the semiconductor base, a source ohmic contact metal film in ohmic contact with the source region, trenches formed from the second surface of the semiconductor base, and a gate region of second conduction type formed along the trenches. The semiconductor device further includes a gate rise metal film in ohmic contact with the draw-out layer of the gate region on the bottom of the trenches and rising to the second surface of the semiconductor base, and a gate draw-out metal film connected to the gate rise metal film from the second surface of the semiconductor base.
US07663179B2 Semiconductor device with rewritable nonvolatile memory cell
A semiconductor device having a rewritable nonvolatile memory cell including a first field effect transistor for memory, a circuit including a second field effect transistor and a circuit including a third field effect transistor, the transistors each including a gate insulating film formed over a semiconductor substrate, a gate electrode over the gate insulating film and sidewall spacers over the sidewalls of the corresponding gate electrode. Sidewall spacers of the first field effect transistor are different from those of at least the second field effect transistors. Also, the gate insulating film of the third field effect transistor has a thickness larger than that of the second field effect transistor and the gate electrode of the third field effect transistor has a length different from that of either the first field effect transistor or second field effect transistor. The sidewall spacers of the first field effect transistor include a first silicon oxide film, a first silicon nitride film over the first silicon oxide film and a second silicon oxide film over the first silicon nitride film.
US07663177B2 Non-volatile memory device and fabricating method thereof
A non-volatile memory device and fabricating method thereof are provided. In the deposition to form a tunneling dielectric layer, a composite charge trapping layer and a block dielectric layer, an ingredient of a depositing material or the depositing material is adjusted to form a grading energy level structure, such that carriers are trapped or erased more easily in accordance with a variation in grading energy level. Therefore, the carriers are stored more effectively and the probability that the electric leakage occurs is reduced substantially.
US07663176B2 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device
For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
US07663172B2 Vertical memory device and method
Method and apparatus are described for a memory cell includes a substrate, a body extending vertically from the substrate, a first gate having a vertical member and a horizontal member and a second gate comprising a vertical member and a horizontal member. The first gate is disposed laterally from the body and the second gate is disposed laterally from the first gate.
US07663171B2 Magneto-resistance effect element and magnetic memory
It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer. When the second magnetization pinned layer is made of ferromagnetic material including Co, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Rh, Ag, and Au; when the second magnetization pinned layer is made of ferromagnetic material including Fe, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Rh, Pt, Ir, Al, Ag, and Au; and when the second magnetization pinned layer is made of ferromagnetic material including Ni, material for the non-magnetic layer is metal including at least one element selected from the group consisting of Zr, Hf, Au, and Ag.
US07663170B2 Semiconductor device and method for manufacturing the same
A lower electrode film is formed above a semiconductor substrate first, and then a ferroelectric film is formed on the lower electrode film. After that, an upper electrode film is formed on the ferroelectric film. When forming the upper electrode, an IrOx film containing crystallized small crystals when formed is formed on the ferroelectric film first, and then an IrOx film containing columnar crystals is formed.
US07663169B2 Photodiode array and production method thereof, and radiation detector
A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposite surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A resin film 6 for transmitting the light L to be detected is provided so as to cover at least regions corresponding to regions where the photodiodes 4 are formed, on the incident surface side of the light L to be detected, in the n-type silicon substrate 3.
US07663168B2 Image pickup element performing image detection of high resolution and high image quality and image pickup apparatus including the same
In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, a resetting transistor is formed. In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, an amplifying transistor is formed. The first and second active regions are respectively the same in shape in image pixel parts. The resetting transistor and the amplifying transistor are shared by the pixel parts.
US07663165B2 Transparent-channel thin-film transistor-based pixels for high-performance image sensors
A pixel circuit, and method of forming a pixel circuit, an imager device, and a processing system include a photo-conversion device, a floating diffusion region for receiving and storing charge from the photo-conversion device, and a transparent transistor for use in operation of the pixel, wherein the transparent transistor is at least partially over the photo-conversion device, such that the photo-conversion device receives light passing through the transparent transistor.
US07663164B2 Semiconductor device with reduced leakage protection diode
A protection diode is used in a CMOS integrated circuit device to direct charged particles to benign locations and prevent damage to the device. The protection diode includes a well region of a first conductivity type formed in a surface of a semiconductor substrate, a heavily doped P-type impurity region disposed within the well region, a heavily doped N-type impurity region disposed within the well region and an STI structure interposed therebetween. A top surface of the STI structure extends above the surface. A silicide resistant block-out layer is formed over the STI structure and extends laterally beyond the STI structure, covering any counterdoped sections that may undesirably be formed in the substrate adjacent the STI structure during implantation operations. The method for forming the structure utilizes processing operations and materials used in the formation of the CMOS integrated circuit device.
US07663163B2 Semiconductor with reduced pad pitch
A semiconductor device includes a first pad, a second pad and a third pad. The first pad and the third pad are electrically connected to each other. The first pad and the second pad are used for bonding. The second pad and the third pad are used for probing. According to this structure, Small size semiconductor device having high reliability even after a probing test can be provided.
US07663161B2 Transistor for preventing current collapse and having improved leakage current characteristics and method for fabricating the same
A transistor includes: a first semiconductor layer and a second semiconductor layer with a first region and a second region, which are sequentially formed above a substrate; a first p-type semiconductor layer formed on a region of the second semiconductor layer other than the first and second regions; and a second p-type semiconductor layer formed on the first p-type semiconductor layer. The first p-type semiconductor layer is separated from a drain electrode by interposing therebetween a first groove having a bottom composed of the first region, and from a source electrode by interposing therebetween a second groove having a bottom composed of the second region.
US07663159B2 Seal ring corner design
Techniques for an integrated circuit device are provided. The integrated circuit device includes a substrate, an active circuit area, and a dielectric layer. A seal ring surrounds the active circuit area. At least one corner area of the integrated circuit includes a plurality of corner band stacks. Each of the plurality of corner band stacks is oriented at about a predetermined angle and extends from a first sawing trace to a second sawing trace. In a specific embodiment, if a structural fault in the at least one corner area occurs, the structural fault is predisposed to extend at about the predetermined angle.
US07663158B2 Nitride compound semiconductor light emitting device and method for producing the same
A nitride compound semiconductor light emitting device includes: a GaN substrate having a crystal orientation which is tilted away from a <0001> direction by an angle which is equal to or greater than about 0.05° and which is equal to or less than about 2°, and a semiconductor multilayer structure formed on the GaN substrate, wherein the semiconductor multilayer structure includes: an acceptor doping layer containing a nitride compound semiconductor; and an active layer including a light emitting region.
US07663157B2 Semiconductor device having group III nitride buffer layer and growth layers
An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitrogen source introduces activated nitrogen into the growth chamber and directs the activated nitrogen towards the substrate. The activated nitrogen comprises ionic nitrogen species and atomic nitrogen species. An external magnet and/or an exit aperture control the amount of atomic nitrogen species and ionic nitrogen species reaching the substrate.
US07663156B2 Method and apparatus for calibrating a metrology tool
A method and apparatus for calibrating a metrology tool are disclosed. The apparatus includes a substrate having at least one calibration site formed thereon. The calibration site includes a pattern of cells that have at least one feature disposed in a surface of the substrate. The feature provided for measurement by a step height metrology tool and a phase metrology tool to calibrate the step height and phase metrology tools.
US07663155B2 Luminescent diode chip that is flip-chip mounted on a carrier, and method for production thereof
A luminescent diode chip for flip-chip mounting on a carrier, having a conductive substrate (12), a semiconductor body (14) that contains a photon-emitting active zone and that is joined by an underside to the substrate (12), and a contact (18), disposed on a top side of the semiconductor body (14), for making an electrically conductive connection with the carrier (30) upon the flip-chip mounting of the chip, whereby either the carrier is solder covered or a layer of solder is applied to the contact. An insulating means (40, 42, 44, 46, 48) is provided on the chip, for electrically insulating free faces of the semiconductor body (14) and free surfaces of the substrate (12) from the solder.
US07663154B2 Backlight module and light emitting diode package structure therefor
A LED package structure including a carrier, LED chips, and a package body is provided. The carrier defines a cave with two opposite first side walls, two opposite second side walls and a rectangular bottom surface. An included angle between the first side wall and the bottom surface differs from that between the second side wall and the bottom surface. The LED chips are disposed in a straight-line arrangement on a center line of the bottom surface and electrically connected to the carrier. The center line is parallel to a long side of the bottom surface. The package body is formed on the carrier to cover the LED chips. Since the included angle between the first side wall and the bottom surface differs from that between the second side wall and the bottom surface, light provided by the LED package structure has different spatial radiation patterns in different directions.
US07663153B2 Light emitting diode with embedded saw-tooth multilayer having a photonic crystal structure and process for fabricating the same
A light emitting diode (LED) is provided. The LED at least includes a substrate, a saw-toothed multilayer, a first type semiconductor layer, an active emitting layer and a second type semiconductor layer. In the LED, the saw-tooth multilayer is formed opposite the active emitting layer below the first type semiconductor layer by an auto-cloning photonic crystal process. Due to the presence of the saw-tooth multilayer on the substrate of the LED, the scattered light form a back of the active emitting layer can be reused by reflecting and recycling through the saw-tooth multilayer. Thus, all light is focused to radiate forward so as to improve the light extraction efficiency of the LED. Moreover, the saw-tooth multilayer does not peel off or be cracked after any high temperature process because the saw-tooth multilayer has the performance of releasing thermal stress and reducing elastic deformation between it and the substrate.
US07663150B2 Optoelectronic chip
An optoelectronic chip having a semiconductor body (14), which contains a radiation-emitting region (2), and a partial region (3) in which the surface (13) of the semiconductor body (14) is curved convexly toward a carrier (10). The lateral extent (2r) of the radiation-emitting region (2) is less than the lateral extent (2R) of the partial region (3). A method for producing such a chip is also described.
US07663146B2 Active matrix addressing liquid-crystal display device
An active matrix addressing LCD device having an active matrix substrate on which conductive lines are formed is provided, which suppress the AI hillock without complicating the structure of the lines and which decreases the electrical connection resistance increase at the terminals of the lines, thereby improving the connection reliability. The device comprises an active matrix substrate having a transparent, dielectric plate, thin-film transistors (TFTs) arranged on the plate, and pixel electrodes arranged on the plate. Gate electrodes of the TFTs and scan lines have a first multilevel conductive structure. Common electrodes and common lines may have the first multilevel conductive structure. Source and drain electrodes of the TFTs and signal lines may have a second multilevel conductive structures. Each of the first and second multilevel conductive structures includes a three-level TiN/Ti/Al or TiN/Al/Ti structure or a four-level TiN/Ti/AI/Ti structure. Each of the TiN film of the first and second structures has a nitrogen concentration of 25 atomic % or higher. The Al file may be replaced with an Al alloy.
US07663145B2 Display panel and method for manufacturing the same
A display panel includes a substrate having a display area and a blank area. The blank area includes at least one of a non-metal line region and a metal-line region. The non-metal line region includes a plurality of insulating patterns and a first conductive pattern layer formed on the substrate. The insulating patterns are isolated from each other by the first conductive pattern layer. The metal-line region includes an insulating multilayer formed on the substrate and a conductive pattern layer formed on the insulating multilayer. Several isolated zones are formed by the conductive pattern layer on the surface of the insulating multilayer.
US07663143B2 Thin film transistor having a short channel formed by using an exposure mask with slits
A mask containing apertures therein which is used for fabricating a channel of a thin film transistor (TFT), wherein the pixel charging time for a TFT in a high-resolution liquid crystal display (LCD) device is reduced by minimizing the length of the channel in the TFT when the active region is made of amorphous silicon. The length of the channel can be minimized by exposing light through the apertures in an exposure mask when forming the channel.
US07663142B2 Light emitting device and method of manufacturing the same
To provide a light emitting device capable of promoting an efficiency of taking out light to outside and achieving highly reliable bright image display by lower power consumption, in a light emitting device including a plurality of pixels and including a transistor and a pixel electrode electrically connected to the transistor at each of the plurality of pixels, an insulating film provided below the pixel electrode includes an opening portion an side surface of which is a curved face at a light emitting region. Light emitted from a light emitting element is focused by the curved face provided at the insulating film to reduce propagation thereof in a lateral direction, the efficiency of taking out the light is promoted and therefore, bright image display can be achieved without particularly increasing a current amount to be injected.
US07663138B2 Nitride semiconductor light emitting element
A n-type layer, a multiquantum well active layer comprising a plurality of pairs of an InGaN well layer/InGaN barrier layer, and a p-type layer are laminated on a substrate to provide a nitride semiconductor light emitting element. A composition of the InGaN barrier included in the multiquantum well active layer is expressed by InxGa1-xN (0.04≦x≦0.1), and a total thickness of InGaN layers comprising an In composition ratio within a range of 0.04 to 0.1 in the light emitting element including the InGaN barrier layers is not greater than 60 nm.
US07663135B2 Memory cell having a side electrode contact
Memory cells are described along with methods for manufacturing. A memory cell as described herein includes a bottom electrode, a memory element and a side electrode. The bottom electrode contacts the memory element at a first contact surface on the bottom of the memory element. The side electrode contacts the memory element at a second contact surface on the side of the memory element, where the second contact surface on the side faces laterally relative to the first contact surface on the bottom.
US07663128B2 Radiation shield securing and covering system
A flexible ionizing radiation shield attached to an X-ray machine by a long retractable cable. An elongated opening adjacent to a top edge is used as a hand hold to manipulate the flexible shield during usage and as a means to hang the flexible shield onto two hooks on the cable housing for storage. Sanitary disposable shield covers are dispensed from a dispenser mounted above the shield hanger.
US07663127B2 EUV debris mitigation filter and method for fabricating semiconductor dies using same
According to one exemplary embodiment, an extreme ultraviolet (EUV) source collector module for use in a lithographic tool comprises an EUV debris mitigation filter. The EUV debris mitigation filter can be in the form of an aerogel film, and can be used in combination with an EUV debris mitigation module comprising a combination of conventional debris mitigation techniques. The EUV debris mitigation filter protects collector optics from contamination by undesirable debris produced during EUV light emission, while advantageously providing a high level of EUV light transmittance. One disclosed embodiment comprises implementation of an EUV debris mitigation filter in an EUV source collector module utilizing a discharge-produced plasma (DPP) light source. One disclosed embodiment comprises implementation of an EUV debris mitigation filter in an EUV source collector module utilizing a laser-produced plasma (LPP) light source.
US07663122B2 Laser analytical instrument, laser analytical method, and gas leak inspection instrument
Laser light generated from laser light generating means (10) is fed through laser light transfer means (11) including a demagnification optical system (23) so as to be condensed in a part Ex where an object gas of analysis exists. The laser light is imparted with energy for causing a multiple photon excitation phenomenon or a multiple photon ionization phenomenon of gas in the condensed part Ex. The energy of the laser light is large enough for 17 eV or higher energy to be injected into a hydrogen molecule when the object gas of analysis is hydrogen and for 23 eV or higher energy to be injected into a helium atom when the object gas of analysis is helium. For example, the intensity of the laser light in the condensed part Ex is 1014 W/cm2 or higher. This provides a laser analytical instrument capable of observing various types of gas through an inexpensive and simple arrangement.
US07663121B2 High efficiency UV curing system
An ultraviolet (UV) cure chamber enables curing a dielectric material disposed on a substrate and in situ cleaning thereof. A tandem process chamber provides two separate and adjacent process regions defined by a body covered with a lid having windows aligned respectively above each process region. One or more UV bulbs per process region that are covered by housings coupled to the lid emit UV light directed through the windows onto substrates located within the process regions. The UV bulbs can be an array of light emitting diodes or bulbs utilizing a source such as microwave or radio frequency. The UV light can be pulsed during a cure process. Using oxygen radical/ozone generated remotely and/or in-situ accomplishes cleaning of the chamber. Use of lamp arrays, relative motion of the substrate and lamp head, and real-time modification of lamp reflector shape and/or position can enhance uniformity of substrate illumination.
US07663119B2 Process for neutron interrogation of objects in relative motion or of large extent
The invention relates to the fact that a common industrial neutron interrogation screening requirement is that a high throughput rate be accommodated by the screening system. The accumulation of elemental abundance ratio spectral data to minimize statistical uncertainty is a function of the neutron flux passing through the subject. If the subject passes through a neutron beam, with a strictly limited time window for exposure, the flux must be sufficient to accumulate the required statistics. The level of neutron flux necessary may exceed the cost effective limits of the selected neutron source means. Exposure time window dilation is disclosed through a class of system configurations which become practical for reduction to practice by utilization of linear neutron source topology neutron generators. This disclosure is concerned with example embodiments which utilize the length, width, thickness and segmentation of the source emission zone within an appropriate neutron source.
US07663117B2 Radiation detector for detecting radiation
A radiation detector for detecting radiation has a semiconductor layer on a substrate, the semiconductor layer being covered by a converter layer so that incoming radiation penetrates the converter layer preceding the semiconductor layer. The semiconductor layer forms a part of a detector array formed by a number of detector elements. The semiconductor layer is given increased sensitivity by being formed of a polycrystalline semiconductor material.
US07663114B2 Cassette type radiation image detector
A cassette type radiation image detector having a box-shaped cassette housing configured by engaging a front member that is light-shielding and radiation-transmissive, with a light-shielding back member, and a two-dimensional array type radiation detection sensor for detecting radiation images incorporated in the radiation image detector, the radiation image detector including: a sensor supporting member that supports the radiation detection sensor; a first engaging member provided at the sensor supporting member; a second engaging member provided at the back member; and a shock absorbing member positioned between the first engaging member and the second engaging member, wherein the box-shaped cassette housing is formed by engaging the first engaging member with the second engaging member via the shock absorbing member.
US07663112B2 Cassette
A radiation detecting cassette has a casing including a first flat plate for facing a patient and a second flat panel for facing a surgical table. The first flat plate and the second flat panel are spaced from each other by a predetermined distance. The casing also includes a pair of first and second tapered side members disposed on respective side edges of the first and second flat plates. The first and second tapered side members are progressively tapered toward their distal ends. The first and second tapered side members house therein respective radiation shields, which in turn house therein a battery, a cassette controller, and a transceiver.
US07663111B2 Variable collimation in radiation detection
Apparatus for detecting radiation emitted from a number of volume elements of a body. The apparatus includes a first plurality of detector elements, each detector element being configured to output signals indicative of an intensity of radiation that is incident thereon. The apparatus also includes a first plurality of adjustable collimator channels, each adjustable collimator channel being associated with and being positioned between a respective detector element and the body, each adjustable collimator channel having a second plurality of dimensional configurations defining respective different sets of the volume elements from which emitted radiation impinges on the respective detector element. A processor computes a radiation intensity from at least a portion of the volume elements in response to the signals output by the detector elements in at least two of the dimensional configurations of the adjustable collimator channels.
US07663108B2 Pulverized bulk material planetary and double helix analyzer system
A system for analyzing a bulk material including a tube for transporting a stream of a bulk material, a plurality of illuminators for directing radiation through the stream and arranged about a circumference of the tube, a plurality of detectors arranged substantially opposite the illuminators, and at least one spectrometer for receiving and analyzing data from the plurality of detectors.
US07663107B2 Method and apparatus for quantitative analysis using terahertz radiation
A method of quantitatively analysing a sample, the method comprising: irradiating the sample with radiation having a plurality of frequencies in the range from 25 GHz to 100 THz; detecting radiation reflected from and/or transmitted by said sample to obtain a frequency domain waveform of said sample; identifying at least one section of interest of said frequency domain wave-form containing spectral features due to intermolecular or other non-intramolecular excitations; and obtaining a value related to the concentration of a component of the sample from the said section.
US07663103B2 Line-width measurement adjusting method and scanning electron microscope
A line-width measurement adjusting method, which is used when first and second electron beam intensity distributions for measuring a line width are produced from intensity distribution images of secondary electrons obtained respectively by scanning a first irradiation distance with an electron beam at first magnification, and by scanning a second irradiation distance with an electron beam at second magnification, includes the step of adjusting the second electron beam intensity distribution of the electron beam at the second magnification such that the second electron beam intensity distribution is equal to the first electron beam intensity distribution of the electron beam at first magnification. The second electron beam intensity distribution may be adjusted by increasing or decreasing a second irradiation distance when producing the electron beam intensity distribution.
US07663102B2 High current density particle beam system
The present invention relates to charged particle beam devices. The devices comprise an emitter for emitting charged particles; an aperture arrangement with at least two apertures for separating the emitted charged particles into at least two independent charged particle beams; and an objective lens for focusing the at least two independent charged particle beams, whereby the independent charged particle beams are focused onto the same location within the focal plane.
US07663101B2 System and methods for preparing microscopy samples
A device, method and system for preparing and storing samples for microscopic analysis is disclosed. The device provides a reservoir that can be attached to a displacement pipette thereby filling the reservoir with reagents desired for preparing the samples for microscopic analysis. In some embodiments, the specimen may be contained on a transmission electron microscope (TEM) grid. In other embodiments, the sample may be a light microscope (LM) specimen or a scanning electron microscope (SEM) specimen. In yet another embodiment, the invention provides a method of preparing samples for microscopic examination including a device for preparing TEM grids with, a device for preparing TEM, SEM or LM specimens with and a device for storing both grids and specimens in. In yet another embodiment, the invention provides a system for tracking the preparation, analysis and histological evaluation of multiple samples while also providing for their long term storage.
US07663100B2 Reversed geometry MALDI TOF
The TOF mass spectrometer disclosed places an even number of ion mirrors in close proximity to a MALDI ion source and a field-free drift space between the exit from the mirrors and an ion detector. This “reversed geometry” configuration may be distinguished from a conventional reflecting TOF analyzer employing a single ion mirror where a large fraction of the total drift space is located between the ion source and the mirror.
US07663096B2 Microelectronic imaging devices and associated methods for attaching transmissive elements
Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes providing an imager workpiece having multiple image sensor dies configured to detect energy over a target frequency. The image sensor dies can include an image sensor and a corresponding lens device positioned proximate to the image sensor. The method can further include positioning standoffs adjacent to the lens devices while the image sensor dies are connected to each other via the imager workpiece. At least one transmissive element can be attached to the workpiece at least proximate to the standoffs so the lens devices are positioned between the corresponding image sensors and the at least one transmissive element. Accordingly, the at least one transmissive element can protect the image sensors while the image sensor dies are still connected. In a subsequent process, the image sensor dies can be separated from each other.
US07663093B2 Absolute position encoder having a second incremental track integrated with the absolute track
A scale has a first incremental track with first incremental patterns including first light and dark patterns formed at equal intervals in first periods, an absolute track with absolute patterns representing absolute positions, and a second incremental track with second incremental patterns including second light and dark patterns formed at equal intervals in second periods longer than the first periods. A light source emits a measurement light to the scale. A photodetector receives the measurement light reflected at or transmitted through the scale. A signal processing circuit processes the received light signal of the photodetector to detect an absolute position of the scale.
US07663090B2 Automatic photodiode biasing circuit
A biasing circuit for a photodiode. The novel biasing circuit includes a first system for setting a reference gain threshold, a second system for setting an operating gain threshold, and a third system for adjusting a bias of the photodiode until a ratio of the operating gain threshold to the reference gain threshold is equal to a predetermined factor Z. In an illustrative embodiment, the reference gain threshold corresponds to a given probability of an output of the photodiode crossing the reference gain threshold when the photodiode is operating at a reference gain bias, and the operating gain threshold corresponds to a given probability of the photodiode output crossing the operating gain threshold when the photodiode is operating at an operating gain bias. The predetermined factor Z is a ratio of noise at a desired operating gain of the photodiode to noise at the reference gain of the photodiode.
US07663085B2 Optical sensor and method of selection of pixel of optical sensor
An optical sensor able to make a pixel area small without degrading an increase of the speed of detection of the change of light intensity and reduction of the power consumption, therefore able reduce the size of a chip at the time of an increase of pixels and a method of selection of pixels of the same, imparting a function of holding charges corresponding to a light reception intensity of a previous frame and a function for comparing strongness/weakness of the light reception intensity of the previous frame and the light reception intensity of the current frame to each of the pixels composing a pixel array part and configuring both function portions by a capacitor Cs connected between a photodiode PD and a selection transistor T2.
US07663080B2 Light sensor assembly having light-sensing portion and compensating unit and display device using same
An exemplary light sensor (20) includes a supporting base, a light-sensing unit (21) provided at at least one first location of the supporting base where ambient light is received, and a compensating unit (22) provided at a second location of the supporting base shielded from ambient light, the compensating unit having a structure that is the same as the light-sensing portion. The light-sensing portion includes at least one amorphous silicon thin film transistor (TFT) (210) configured for sensing light, and the compensating unit is configured for providing a reference value current for the light-sensing unit. A display device using the light sensor is also provided.
US07663074B2 Method and apparatus for securing welding torch components
A method and apparatus for using a collet to align and/or axially secure a liner within the gooseneck of a welding torch and to extend the useful life of the torch components are provided. A method and apparatus for securing torch components including said collet and including tapered locking engagement connections are also provided. A position of the liner with respect to a retaining head or a diffuser can be established and maintained, in spite of bending, swiveling, and other general movement of the torch, while still allowing flow of a shield gas past the collet. The welding torch components, including a gas diffuser, can be secured to the torch or other torch components via tapered locking engagements. The invention is useful for both manual and robotic torch systems.
US07663067B2 Weighing device having gates for casting article onto center area of dispersal table, and method of driving gates of weighing device
A first gate opens obliquely downward, and maintains the posture, rendering the slope angle of the bottom surface thereof steeper than that of the bottom surface of the second gate. Thus, the bottom surface of the second gate forms a gentle slope sliding surface, and the bottom surface of the first gate forms a steep slope sliding surface. Then articles drop following the shape of a parabola toward the bottom surface of the first gate on the steep slope side, with momentum gained from sliding down the bottom surface of the second gate on the gentle slope side, and then change the sliding trajectory inward upon bumping into the bottom surface of the first gate. The articles then drop following the shape of a parabola toward the center area of a dispersal table, with momentum gained from sliding down the bottom surface of the first gate.
US07663066B2 Process for creating a durable EMI/RFI shield between two or more structural surfaces and shield formed therefrom
A method for producing a durable electromagnetic and radio frequency interference shield between two or more structural members of a wall or enclosure and a shielded shelter produced using the method. In one embodiment, joints between structural members are preferably filled with an electrically conductive filler. A base coat of a metal spray that adheres well to the filler and structural member is then applied. At least one layer of a metal spray with magnetic field attenuation properties such as steel, and at least one layer of a metal spray that has plane wave attenuation properties such as tin are applied to the base coat. Optionally, a coat of protective or conductive paint is then applied to the top surface of the metal spray layers. An enclosure with shielded joints according to the present invention has superior shielding capability and durability over the art.
US07663065B2 Shield box
A shield box is composed of metal-made upper box and lower box, which are combined with each other. The shield box houses therein a plurality of shield connectors interconnecting shield wires, and thereby electromagnetically shields entirety of the shield connectors and the shield wires. On an upper surface of a lower surface plate of the lower box, clamp fittings capable of restraining the respective shield connectors in axial, axial rotation, left-and-right and up-and-down directions thereof are provided. On opposite surfaces of the upper and lower boxes, press fittings are provided to sandwich shield terminal portions from upper and lower sides and conduct the shield terminal portions to the upper and lower boxes when the upper and lower boxes are matched with each other. The shield terminal portions, which are electrically connected to shield conductors of respective shield wires and are exposed to both ends of the respective shield connectors, are grounded.
US07663062B1 Flexible circuit board
A flexible circuit board uses a specific structure to alleviate mechanical stress thereof. The flexible circuit board has a flexible film, a plurality of inner leads, a plurality of outer leads, and a plurality of connection portion. Each of the connection portions a corresponding one of the inner leads with a corresponding one of the outer leads. A first width of the inner leads is greater than a second width of the outer leads. Due to rounded concave sections and rounded convex sections of the connection portions, if the flexible circuit board is bent, the mechanical stress around corners of joint portions of the connection portions with the inner leads and the outer leads could be alleviated.
US07663060B2 Systems and methods for cable management
A method for cable management in an electronics enclosure is disclosed. The method involves extruding at least one length of material that forms a cable guide having a plurality of partitions defined by one or more cable dividers and two end clip flanges, where the end clip flanges each have at least one snap guide and at least one locking clip channel. The method further involves sizing at least one cable guide assembly from the length of material, based on a predetermined length for the cable guide assembly, and preparing one or more ends of the at least one cable guide assembly.
US07663058B2 Helically-wound electric cable
The present invention relates to a helically-wound electric cable comprising at least two groups that are wound-together so as to form a group helix, each group comprising at least two twisted-together conductor wires. In the cable of the invention, the pitch of the group helix varies along the helically-wound electric cable between two limit values having the same sign.
US07663053B2 System and method for using pre-equilibrium ballistic charge carrier refraction
A method and system for using a method of pre-equilibrium ballistic charge carrier refraction comprises fabricating one or more solid-state electric generators. The solid-state electric generators include one or more of a chemically energized solid-state electric generator and a thermionic solid-state electric generator. A first material having a first charge carrier effective mass is used in a solid-state junction. A second material having a second charge carrier effective mass greater than the first charge carrier effective mass is used in the solid-state junction. A charge carrier effective mass ratio between the second effective mass and the first effective mass is greater than or equal to two.
US07663052B2 Musical instrument digital interface hardware instruction set
Generating a digital waveform for a Musical Instrument Digital Interface (MIDI) voice using a set of machine-code instructions that is specialized for the generation of digital waveforms for MIDI voices. For example, a processor may execute a software program that generates a digital waveform for a MIDI voice. The instructions of the software program may be machine code instructions from an instruction set that is specialized for the generation of digital waveforms for MIDI voices.
US07663049B2 Kernel-mode audio processing modules
Multiple kernel-mode audio processing modules or filters are combined to form a module or filter graph. The graph is implemented in kernel-mode, reducing latency and jitter when handling audio data (e.g., MIDI data) by avoiding transfers of the audio data to user-mode applications for processing. A variety of different audio processing modules can be used to provide various pieces of functionality when processing audio data.
US07663046B2 Pipeline techniques for processing musical instrument digital interface (MIDI) files
This disclosure describes techniques for processing audio files that comply with the musical instrument digital interface (MIDI) format. In particular, various tasks associated with MIDI file processing are delegated between software operating on a general purpose processor, firmware associated with a digital signal processor (DSP), and dedicated hardware that is specifically designed for MIDI file processing. Alternatively, a multi-threaded DSP may be used instead of a general purpose processor and the DSP. In one aspect, this disclosure provides a method comprising parsing MIDI files and scheduling MIDI events associated with the MIDI files using a first process, processing the MIDI events using a second process to generate MIDI synthesis parameters, and generating audio samples using a hardware unit based on the synthesis parameters.
US07663044B2 Musical performance self-training apparatus
The apparatus of the present invention improves training efficiency, and monotonous repetition of training is avoided. A unit acceptance judgment section (4) judges whether all performance of the units in the current rank have reached an acceptable standard or not. When all performance is accepted, a unit in an upper rank is designated. The performance data in the designated unit is read from a performance data storage (7) to a key depression instruction generator (8), and a key depression instruction is displayed based on the performance data. When only a part of the unit in the current rank is acceptable, a unit updating instruction is output to a lesson menu display (14), to thereby display that the unit subsequent to the currently designated is the unit to be played next. When the unit is updated, the unit having the same note information as that already accepted is not designated.
US07663042B1 Adjustable pedal assembly for a percussion instrument
An adjustable pedal assembly has a base, a beater assembly, and a pedal. The base has a pedal end and a beater end. The beater assembly is mounted on the beater end of the base. The pedal is mounted pivotally on the base and connected to the beater assembly, and has a stationary heel, an adjustment bracket, a moving sole and a rigid link. The stationary heel is mounted securely on the pedal end of the base. The adjustment bracket is mounted pivotally on the stationary heel. The moving sole is connected pivotally on the adjustment bracket and connected to the beater assembly. The rigid link is selectively connected the stationary heel and alternately to the adjustment bracket and the moving sole to change a pivoting point and swinging length of the pedal.
US07663036B2 Plants and seeds of hybrid corn variety CH945822
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH945822. The invention thus relates to the plants, seeds and tissue cultures of the variety CH945822, and to methods for producing a corn plant produced by crossing a corn plant of variety CH945822 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH945822.
US07663030B1 Inbred corn line G07-NPFA7183
Basically, this invention provides for an inbred corn line designated G07-NPFA7183, methods for producing a corn plant by crossing plants of the inbred line G07-NPFA7183 with plants of another corn plants. The invention relates to the various parts of inbred including culturable cells. This invention also relates to methods for introducing transgenic transgenes into inbred corn line G07-NPFA7183 and plants produced by said methods.
US07663029B1 Soybean variety RJS38001
According to the invention, there is provided a novel soybean variety designated RJS38001. This invention thus relates to the seeds of soybean variety RJS38001, to the plants of soybean RJS38001 to plant parts of soybean variety RJS38001 and to methods for producing a soybean plant produced by crossing plants of the soybean variety RJS38001 with another soybean plant, using RJS38001 as either the male or the female parent.
US07663027B2 Nucleotide sequences and corresponding polypeptides conferring modulated plant size and biomass in plants
The present invention relates to isolated nucleic acid molecules and their corresponding encoded polypeptides able confer the trait of modulated plant size, vegetative growth, organ number, plant architecture and/or biomass in plants. The present invention further relates to the use of these nucleic acid molecules and polypeptides in making transgenic plants, plant cells, plant materials or seeds of a plant having plant size, vegetative growth, organ number, plant architecture and/or biomass that are altered with respect to wild type plants grown under similar conditions.
US07663026B2 Transformation of seaweed utilizing biolistic gene transfer to spores
This invention relates to marine algae, and more particularly, to a method for producing improved seaweed strains by genetic engineering. The vector for transformation were constructed by inserting the high-plant or algae-derived promoters upstream of foreign reporter genes or such cassettes that functional genes are fused with antibiotics or herbicide-resistant genes. The genetic seaweed was generated by natural development process by recombinated plasmid DNA introduction to seaweed spore with Biolostics as transformation methods. Introduced traits of antibiotics or herbicide-resistance were used to select the transgenic seaweed individuals when foreign functional genes are transformed. Stable transformation could be obtained following this invention.
US07663025B2 Plant Transcriptional Regulators
The invention relates to plant transcription factor polypeptides, polynucleotides that encode them, homologs from a variety of plant species, and methods of using the polynucleotides and polypeptides to produce transgenic plants having improved tolerance to drought, shade, and low nitrogen conditions, as compared to wild-type or reference plants.
US07663024B2 P15 hairpin constructs and use
The present invention concerns a method of genetic modification of a TGB-3 wild type viral sequence for reducing or suppressing the possible deleterious effects of the agronomic properties of a transformed plant or plant cell by said TGB-3 viral sequence. The invention further relates to genetically modified TGB-3 viral sequences suitable to induce gene silencing. In particular hairpin constructs based on such sequences proved highly efficient to induce a PTGS mechanism and degradation of the whole of RNA2 thereby. When plants are transformed accordingly the spread of the virus in the plant is significantly reduced or blocked.
US07663023B2 Modification of lignin biosynthesis
The invention provides methods for decreasing lignin content and improving lignin profiles. Also provided are the plants prepared by the methods of the invention. Such plants may exhibit improved digestibility relative to prior plants.
US07663022B1 Transgenic bioluminescent plants
Transgenic plants, and a method for making the same, wherein genes encoding the enzyme luciferase and its corresponding substrate luciferin are incorporated into a native plant genome. Once transformed into plant cells, these genes may be regulated such that under certain endogenous or exogenous conditions, their expression in the mature plant results in bioluminescence. Different luciferin/luciferase complexes and/or mechanisms of regulation may be utilized for these transgenic plants, depending on a variety of factors such as plant species and the circumstances under which a bioluminescent reaction is desired. Phototransformation may be utilized to vary the wavelength of light emitted from the mature plant.
US07663021B2 Transgenic pineapple plants with modified carotenoid levels and methods of their production
The present invention provides methods of transforming pineapple cells and plants with carotenoid biosynthetic polypeptide expression regulators that control the accumulation of carotenoids in the transformed cells, and in certain embodiments, the coloration of those cells. The invention also provides for the regeneration of pineapple plants from the transformed cells. In addition, the invention provides pineapple cells and plants that include introduced carotenoid biosynthetic polypeptide expression regulators.
US07663015B2 Traumatic amputation and wound dressing
An integrated and complete dressing for the care and treatment of traumatic amputations and wounds. The traumatic amputation and wound dressing includes an oversized wound pad, an elastic bandage, and fasteners in an integrated unit for quickly and effectively treating an amputation. The elastic bandage may be attached to the wound pad such that the bandage forms an angle of about 90 degrees with respect to a vertical axis of the wound pad. The wound pad can be readily folded over an amputation and quickly wrapped with the elastic bandage. The fasteners may be attached to the periphery of the wound pad. When the dressing is applied to a stump of an amputated limb and the fasteners are engaged, the wound pad is relatively securely held in position and downward pressure is exerted on the stump. In some embodiments, the elastic bandage may also include brakes designed to prevent the bandage from unintentionally unraveling. The brakes also facilitate application of the dressing to the stump.
US07663011B2 Mesoporous material with active metals
A process for treating organic compounds includes providing a composition which includes a substantially mesoporous structure of refractory oxide containing at least 97% by volume of pores having a pore size ranging from about 15 Å to about 30 Å and having a micropore volume of at least about 0.01 cc/g, wherein the mesoporous structure has incorporated therewith at least about 0.02% by weight of at least one catalytically and/or chemically active heteroatom selected from the group consisting of Al, Ti, V, Cr, Zn, Fe, Sn, Mo, Ga, Ni, Co, In, Zr, Mn, Cu, Mg, Pd, Pt and W, and the catalyst has an X-ray diffraction pattern with one peak at 0.3° to about 3.5° at 2 theta (θ). The catalyst is contacted with an organic feed under reaction conditions wherein the treating process is selected from alkylation, acylation, oligomerization, selective oxidation, hydrotreating, isomerization, demetalation, catalytic dewaxing, hydroxylation, hydrogenation, ammoximation, isomerization, dehydrogenation, cracking and adsorption.
US07663010B2 Heavy aromatics processing catalyst and process of using the same
This disclosure relates to a catalyst system adapted for transalkylation a C9+ aromatic feedstock with a C6-C7 aromatic feedstock, comprising: (a) a first catalyst comprising a first molecular sieve having a Constraint Index in the range of 3-12 and 0.01 to 5 wt. % of at least one source of a first metal element of Groups 6-10; and (b) a second catalyst comprising a second molecular sieve having a Constraint Index less than 3 and 0 to 5 wt. % of at least one source of a second metal element of Groups 6-10, wherein the weight ratio of the first catalyst over the second catalyst is in the range of 5:95 to 75:25 and wherein the first catalyst is located in front of the second catalyst when they are brought into contacting with the C9+ aromatic feedstock and the C6-C7 aromatic feedstock in the present of hydrogen.
US07663003B2 Catalyst and method for the hydration of carbonyl compounds
A process for hydrogenating an organic compound which has at least one carbonyl group, in which the organic compound is brought into contact in the presence of hydrogen with a shaped article which can be produced in a process in which (i) an oxidic material comprising copper oxide, aluminum oxide and at least one of the oxides of lanthanum, tungsten, molybdenum, titanium or zirconium is prepared, (ii) powdered metallic copper, copper flakes, powdered cement, graphite or a mixture thereof is added to the oxidic material, and (iii) the mixture resulting from (ii) is shaped to a shaped article.
US07663000B2 Quinoneimines of malonic acid diamides
The present invention provides optionally substituted compounds of the formula I or salts thereof; wherein R1 is O or S when double bonded to the ring or is OH, SH, or a protected equivalent, when single bonded to the ring, R2 is hydrogen or more preferably an C1-C10 organic group attached by a carbon atom, X is H, O, OO, S or SS R3 is absent where X═H, is hydrogen or is a hydroxyl or thiol protecting group, R4 is a hetero- or preferably homo-cyclic aryl group, optionally substituted with a further group R5 and groups T1 are each, independently, absent, hydrogen or an S—R6 group, where any/each R6 is independently an organic group of molecular weight up to around 500 amu. The invention further provides a method for the synthesis of such compounds and a method of treatment comprising administering such compounds to a mammalian subject.
US07662992B2 Process for preparation of isosulfan blue
A process for the preparation of isosulfan blue (Active Pharmaceutical Ingredient) is provided. A process is also provided for preparation of the intermediate, 2-chlorobenzaldehyde-5-sulfonic acid, sodium salt of formula (2), used in the preparation thereof and a procedure for the isolation of benzaldehyde-2,5-disulfonic acid, di-sodium salt of the formula (3). Also provided is a process for the preparation of an isoleuco acid of formula (4), which upon mild oxidation gives rise to isosulfan blue of pharmaceutical grade which can be used for preparation of pharmaceutical formulations. The isolation and purification procedures provided in the process provide substantially pure isosulfan blue with HPLC purity 99.5% or greater.
US07662989B2 Process for the preparation of liquid, storage-stable organic isocyanates containing carbodiimide and/or uretonimine groups
The invention relates to a process for the preparation of liquid, storage-stable isocyanate mixtures of low color number containing carbodiimide (CD) and/or uretonimine (UI) groups, the isocyanate mixtures obtainable by this process, the preparation of blends with further isocyanates and the process of the preparation of prepolymers containing isocyanate groups and/or polyurethane plastics, preferably polyurethane foams, from these isocyanate mixtures.
US07662987B2 Methods for synthesis of acyloxyalkyl compounds
Disclosed herein are methods for synthesizing 1-(acyloxy)-alkyl prodrug derivatives of drugs through oxidation of 1-acyl-alkyl derivatives of drugs under anhydrous reaction conditions. The methods typically proceed stereospecifically, in high yield, do not require the use of activated intermediates and/or toxic compounds and are readily amenable to scale-up.
US07662986B2 Polymerization with living characteristics
This invention concerns a free radical polymerization process, selected chain transfer agents employed in the process and polymers made thereby, in which the process comprises preparing polymer of general Formula (A) and Formula (B) comprising contacting: (i) a monomer selected from the group consisting of vinyl monomers (of structure CH2═CUV), maleic anhydride, N-alkylmaleimide, N-arylmaleimide, dialkyl fumarate and cyclopolymerizable monomers; (ii) a thiocarbonylthio compound selected from Formula (C) and Formula (D) having a chain transfer constant greater than about 0.1; and (iii) free radicals produced from a free radical source; the polymer of Formula (A) being made by contacting (i), (ii) C and (iii) and that of Formula (B) by contacting (i), (ii) D, and (iii); and (iv) controlling the polydispersity of the polymer being formed by varying the ratio of the number of molecules of (ii) to the number of molecules of (iii); wherein Q, R, U, V, Z, Z′, m, p and q are as defined in the text.
US07662985B2 Production process for a silicon compound
A production process for a silicon compound represented by Formula (6), characterized by reacting a compound represented by Formula (4) with a compound represented by Formula (5): wherein all of the variables are defined in the specification.
US07662975B2 Coumarin derivatives as ion channel openers
The present invention is directed to novel coumarin derivatives, pharmaceutical compositions containing them and their use in the treatment of disorders related to ion channels such as potassium channels.
US07662968B2 Process for preparing lansoprazole
The invention relates to a process for preparing lansoprazole. It is also directed to lansoprazole having a specific surface area and a pharmaceutical composition comprising lansoprazole.
US07662965B2 Anabaseine derivatives, pharmaceutical compositions and method of use thereof
Disclosed are novel anabaseine derivatives that act as agonists of the α7 nAChR. Also disclosed are pharmaceutical compositions, methods of treating inflammatory conditions, methods of treating CNS disorders, methods for inhibiting cytokine release from mammalian cells and methods for the preparation of the novel compounds.
US07662963B2 Process for the preparation of tiotropium bromide
The invention is directed to improved processes for preparing Tiotropium bromide.
US07662959B2 Quaternary trifluoromethylcyclohexane derivatives for liquid crystals
A compound having the structure: w-A-x-CY—Z(CF3), where CY is cyclohexane or substituted cyclohexane, exemplified by 4-trifluoromethyl-4-methylcarboxy-4′-propyl-1,1′-(bi)cyclohexane.
US07662958B2 Anti-infective agents
The present invention provides HCV polymerase inhibiting compounds having the formula (I): where R1 is cyclobutyl-N(Ra)—, n is 1, 2, 3 or 4, and at least one R5 is RaSO2N(Rj)alkyl-. In a non-limiting example, a compound of the present invention is N-[(3-{1-[(cyclobutyl)amino])-4-hydroxy -2-oxo-1,2-dihydro-quinolin-3-yl}-1,1-dioxo-1,4-dihydro-1λ6-thieno[2,3-e][1,2,4]thiadiazin-7-yl)methyl]methane-sulfonamide. The present invention also features compositions comprising the compounds of the present invention or pharmaceutically acceptable salts, stereoisomers or tautomers thereof, and methods of using the same to treat or prevent HCV infection.
US07662957B2 Method for producing 3,4-dihydro-1,2,3-oxathiazin-4-one-2,2-dioxide compound or salt thereof
A high quality 3,4-dihydro-1,2,3-oxathiazin-4-one-2,2-dioxide compound or a salt thereof is obtained easily and efficiently.When the compound represented by the following formula (2)[Formula 2] (wherein, R1, R2, and R3 are hydrogen atom or an organic group inert to the reaction, and X is hydrogen atom) or a salt thereof is produced by cyclization of a mixture of β-ketoamide-N-sulfonic acid represented by the following formula (1) [Formula 1] or a salt thereof and an inert solvent and a mixture of acid anhydride and an inert solvent, and by subsequent hydrolysis of the product, a step of (A) hydrolyzing the reaction product obtained by the cyclization by mixing with an aqueous solution of sulfuric acid so as a concentration of sulfuric acid in an aqueous phase after the hydrolysis would become 30% by weight or more, and then separating an organic phase and an aqueous phase, or a step of (B) washing the organic phase liquid after the hydrolysis with an aqueous solution of sulfuric acid with a concentration of 30% by weight or more is at least carried out.
US07662954B2 Outer layer having entanglement of hydrophobic polymer host and hydrophilic polymer guest
An outer layer having an entanglement comprising an intermingling of cloaked hydrophilic guest and a hydrophobic polymer host, wherein molecules of the guest have been crosslinked with each other. Under certain circumstances, using complexes of the guest may be desirable or even necessary. The intermingling of the guest and host includes a physical tangling, whether it also comprises crosslinking by primary bonding (e.g., chemical/covalent bonding) there-between. Also a method of producing an outer layer having such an entanglement, including the steps of: temporarily cloaking at least a portion of the hydrophilic groups of the guest; intermingling at least a portion of the cloaked groups with a porous polymeric structure by diffusing the guest with cloaked groups into at least a portion of the structure's pores; within the pores, crosslinking at least a portion of the molecules of the guest with the guest; and removing the cloaking. Cloaking may be performed by silylation or acylation. Intermingling may be performed by producing a mixture of guest and host (whether in solution, powdered, granular, etc., form); next, a crosslinking of the guest with itself is performed; then, the mixture is molded into the outer layer.
US07662953B2 Method for manufacturing cellulose carbamate
The invention relates to a method for manufacturing cellulose carbamate. In the method, an auxiliary agent and urea in solution form and possibly in solid form are absorbed into cellulose, and a reaction between cellulose and urea is carried out in a mixture containing cellulose, a liquid, the auxiliary agent, and urea The absorption of the auxiliary agent and urea into cellulose, and the reaction between the cellulose and the auxiliary agent at least partly are carried out in a working device. According to the invention, it is possible to manufacture cellulose carbamate without ammonia, organic solvents or other auxiliary agents, by using only a small quantity of water as a medium.
US07662951B2 RNA interference mediated treatment of Alzheimer's disease using short interfering nucleic acid (siNA)
The present invention concerns methods and reagents useful in modulating BACE gene expression in a variety of applications, including use in therapeutic, diagnostic, target validation, and genomic discovery applications. Specifically, the invention relates to small nucleic acid molecules, such as short interfering nucleic acid (siNA), short interfering RNA (siRNA), double-stranded RNA (dsRNA), micro-RNA (miRNA), and short hairpin RNA (shRNA) molecules capable of mediating RNA interference (RNAi) against beta-secretase (BACE), amyloid precursor protein (APP), pin-1, presenillin 1 (PS-1) and/or presenillin 2 (PS-2) gene expression and/or activity. The small nucleic acid molecules are useful in the treatment of Alzheimer's disease and any other condition that responds to modulation of BACE, APP, pin-1, PS-1 and/or PS-2 expression or activity.
US07662950B2 siRNA targeting myeloid differentiation primary response gene (88) (MYD88)
Efficient sequence specific gene silencing is possible through the use of siRNA technology. By selecting particular siRNAs by rational design, one can maximize the generation of an effective gene silencing reagent, as well as methods for silencing genes. Methods, compositions, and kits generated through rational design of siRNAs are disclosed including those directed to nucleotide sequences for MYD88.
US07662938B2 2′-fluoronucleosides
A class of 2′-fluoro-nucleoside compounds are disclosed which are useful in the treatment of hepatitis B infection, hepatitis C infection, HIV and abnormal cellular proliferation, including tumors and cancer. The compounds have the general formula: wherein Base is a purine or pyrimidine base; R1 is OH, H, OR3, N3, CN, halogen, including F, or CF3, lower alkyl, amino, lower alkylamino, di(lower)alkylamino, or alkoxy, and base refers to a purine or pyrimidine base; R2 is H, phosphate, including monophosphate, diphosphate, triphosphate, or a stabilized phosphate prodrug; acyl, or other pharmaceutically acceptable leaving group which when administered in vivo, is capable of providing a compound wherein R2 is H or phosphate; sulfonate ester including alkyl or aryalkyl sulfonyl including methanesulfonyl, benzyl, wherein the phenyl group is optionally substituted with one or more substituents as described in the definition of aryl given above, a lipid, an amino acid, peptide, or cholesterol; and R3 is acyl, alkyl, phosphate, or other pharmaceutically acceptable leaving group which when administered in vivo, is capable of being cleaved to the parent compound, or a pharmaceutically acceptable salt thereof.
US07662936B2 Mass spectrometry of antibody conjugates
Methods to detect, screen, and quantitate biological samples after administration of antibody conjugates, antibody-drug conjugates of Formula I, antibodies, and fragments and metabolites thereof, by affinity separation, chromatography, and mass spectrometry are disclosed. Ab-(L-D)p  I wherein Ab is an antibody; D is a drug moiety; L is a linker covalently attached to Ab, and covalently attached to D; and p is 1, 2, 3, 4, 5, 6, 7, or 8.
US07662930B2 Polishing steps used in multi-step protein purification processes
Various embodiments of the present invention are directed to multi-step systems and methods for target-molecule purification that employ column-chromatography-based and/or membrane-filtration-based polishing steps. In one described embodiment of the present invention, a target-protein-containing eluate having a high residual salt concentration is collected from a first chromatography column prepared with an affinity-chromatography resin, loaded onto a second chromatography column prepared with a cation-exchange resin, and eluted from the second cation-exchange column using a buffer in which a time-dependent pH gradient is established. In another described embodiment of the present invention, a partially purified target-protein-containing eluate is collected from a chromatography column and further purified by passing the target-protein-containing eluate through a salt-tolerant anion exchanger.
US07662927B2 Antibodies to ZCYTO20 (IL-28A) and ZCYTO22 (IL-28B)
The present invention relates to polynucleotide and polypeptide molecules for zcyto20, zcyto21, zcyto22, zycto24, and zcyto25 proteins which are most closely related to interferon-α at the amino acid sequence level. The receptor for this protein family is a class II cytokine receptor. The present invention includes methods of reducing viral infections and increasing monocyte counts. The present invention also includes antibodies to the zcyto20 polypeptides, and methods of producing the polynucleotides and polypeptides.
US07662923B2 Modified vitamin K-dependent polypeptides
The invention provides vitamin K-dependent polypeptides with enhanced membrane binding affinity. These polypeptides can be used to modulate clot formation in mammals. Methods of modulating clot formation in mammals are also described.
US07662915B2 Peptides having protected amines of untargeted sites, methods for production thereof and of specifically conjugated PEG peptides using the same
The present invention relates to synthetic peptides having selectively protected amines of untargeted sites and to methods for production thereof and for specifically conjugating PEG to targeted sites of the synthetic peptides using the same. The present invention provides a much higher yield of PEG conjugated peptides in which PEG is specifically combined to amines at targeted sites.
US07662912B2 Polyomavirus diagnostic reagents
The present invention relates to HLA-A*02-restricted cellular epitopes within the VP1 polypeptide of human polyomaviruses, which are useful as diagnostic reagents for virus infection. Preferred peptides correspond to amino acids residues 107-116, 108-116 and 44-52 of BKV VP1, and are processed in vivo in natural infection with BKV. Effector T cell populations stimulated by the peptides represent functional CTLs as assessed by cytotoxicity and cytokine production, and are reactive against cells presenting both the BKV peptides above and the JC virus homolog sequences.
US07662911B2 Polypeptide films and methods
Disclosed herein is a method of making a film, the method comprising depositing a first layer polyelectrolyte on a surface of a substrate to form a first layer; and depositing a second layer polyelectrolyte on the first layer polyelectrolyte to form a second layer. The first layer polyelectrolyte, the second layer polyelectrolyte, or both, is deposited on the substrate in the presence of a polymeric precipitant; and the first layer polyelectrolyte and the second layer polyelectrolyte have net charges of opposite polarity. Also disclosed are methods of improving bioactive molecule retention during fabrication of a polyelectrolyte multilayer film.
US07662909B2 Polysulfone compositions exhibiting very low color and high light transmittance properties and articles made therefrom
A polysulfone composition is provided having a total luminous light transmittance of 84% or greater when measured on 0.1 inch thick specimens using ASTM D-1003. The specimens also meet at least one of the following two conditions: 1) a yellowness index (YI) of less than about 5.0 as measured according to ASTM D-1925 on 0.1 inch thick specimens, or 2) a color factor (CF) of less than about 25, wherein CF is defined by the following equation: CF=270[(x+y)sample−(x+y)air]/t wherein x and y are chromaticity coordinates measured in transmittance mode and t is sample thickness in inches. Another polysulfone composition is provided comprising a polysulfone, an organic phosphorous-containing melt stabilizer, and at least one of the following additives: a blue to violet dye, and an organic optical brightener. The polysulfone composition of the present invention is used to form transparent molded articles such as ophthalmic lenses.
US07662908B2 Process for the preparation of activated polythylene glycols
A process for preparing activated polyethylene glycols is disclosed. In some embodiments, the process includes reacting a molten polyethylene glycol with an activator. In other embodiments, the process includes reacting a polyethylene glycol with an activator in the absence of a solvent. The process may be carried out in an inert gas atmosphere, at a temperature at least 10° C. above the melting point of polyethylene glycol, and/or with the activator provided in molar excess of the polyethylene glycol. The invention further provides activated polyethylene glycols produced by this process and their use in a variety of pharmaceutical, medical, cosmetic and chemical applications.
US07662905B2 Copolycarbonate, copolycarbonate composition, and optical molded article obtained therefrom
A copolycarbonate; a copolycarbonate composition that contains the copolycarbonate and a polycarbonate resin; a polycarbonate base resin composition that contains the copolycarbonate and an acryl base resin; an optical molded article containing the copolycarbonate; a light guide plate containing the copolycarbonate; a lens containing the copolycarbonate; an optical molded article containing the copolycarbonate composition; a light guide plate containing the copolycarbonate composition; a lens containing the copolycarbonate composition; an optical molded article containing the polycarbonate base resin composition; a light guide plate containing the polycarbonate base resin composition; and an optical molded article containing the polycarbonate base resin composition.
US07662898B2 Biocompatible material
A biocompatible material having excellent biocompatibility such as small interaction with a component of a living body such as a protein or blood cell. A biocompatible material comprising a polymer obtained by polymerizing a monomer composition comprising an amino acid-type betaine monomer represented by the formula (I): wherein R1 is a hydrogen atom or a methyl group; R2 is an alkylene group having 1 to 6 carbon atoms; each of R3 and R4 is independently an alkyl group having 1 to 4 carbon atoms; R5 is an alkylene group having 1 to 4 carbon atoms; and Z is an oxygen atom or an —NH group; and a polymerizable monomer represented by the formula (II): wherein R1 is as defined above; and R6 is a monovalent organic group, in a weight ratio, i.e. amino acid-type betaine monomer/polymerizable monomer, of from 1/99 to 100/1. The biocompatible material can be suitably used, for example, in food, a food additive, a medicament, a quasi-drug, a medical device, cosmetics, a toiletry article, or the like.
US07662897B2 Process for producing photoresist polymeric compounds
Process for producing photoresist polymeric compound having repeated units corresponding to at least one monomer selected from monomer (a) having lactone skeleton, monomer (b) having group which becomes soluble in alkali by elimination with acid, and monomer (c) having alicyclic skeleton having hydroxyl group. Process includes (A) polymerizing mixture of monomers containing at least one monomer selected from the above monomers (a), (b), and (c), and (B) extracting polymer formed in the polymerization by using organic solvent and water to partition the formed polymer into organic solvent layer and metal component impurity into aqueous layer, or passing polymer solution, which contains polymer having repeated units corresponding to at least one of the above monomers (a), (b), and (c) and metal content of which is 1000 ppb by weight or less relative to the polymer through filter comprising porous polyolefin membrane having cation-exchange group. The photoresist polymeric compounds have a metallic impurity content that is extremely low.
US07662896B2 Fluorochemical sulfonamide surfactants
Described are fluorochemical surfactants derived from nonafluorobutanesulfonyl fluoride that contain polyalkyleneoxy side chains and may be copolymerized with acrylic acid or methacrylic acid to form polyacrylates or polymethacrylates. The surfactants surprisingly lower the surface tension of water and other liquids in the same or similar low values achieved by premier surfactants such as those derived from perfluorooctane sulfonyl fluoride.
US07662892B2 Impact copolymers
This invention relates to a continuous process to prepare olefin impact copolymers comprising producing a semi-crystalline olefin polymer in a first reactor and then transferring the reactor contents to a second reactor where a low crystallinity olefin polymer is produced in the presence of the semi-crystalline polymer, where a fluorinated hydrocarbon is present in the polymerization medium of the first reactor, the second reactor or both reactors.
US07662887B1 Method of forming polyalkene substituted carboxylic acid compositions
The residual chlorine content of a polyolefin-substituted carboxylic acylating agent formed by a halogen-assisted reaction of a polyalkene and at least one olefinic, monounsaturated mono- or dicarboxylic acid, anhydride or ester, is reduced when the reaction is conducted in the presence of a controlled amount of a metal compound.
US07662886B2 Dynamic vulcanization of fluorocarbon elastomers containing peroxide cure sites
Processable rubber compositions contain a vulcanized elastomeric material dispersed in a matrix of a thermoplastic polymeric material. The vulcanized elastomeric material is a peroxide cure polymeric material containing repeating units derived from fluorine-containing monomers and at least one peroxide cure site monomer. In one embodiment the matrix forms a continuous phase and the vulcanized elastomeric material is in the form of particles forming a non-continuous phase. The compositions are made by combining a radical curing system, a fluorocarbon elastomer material, and a fluoroplastic material, and heating the mixture at a temperature and for a time sufficient to effect vulcanization of the elastomeric material, while mechanical energy is applied to mix the mixture during the heating step. Shaped articles may be readily formed from the rubber compositions according to conventional thermoplastic processes such as blow molding, injection molding, and extrusion. Examples of useful articles include seals, gaskets, O-rings, and hoses.
US07662879B2 Compositions comprising modified metal oxides
The present invention relates to polymerizable compositions comprising at least one monomer and at least one modified metal oxide comprising the reaction product of a metal oxide and at least one coupling agent. In addition, polymer compositions comprising a polymer and the modified metal oxide are also disclosed. Finally, methods for preparing the polymerizable compositions and polymer compositions are described as are optical devices comprising the polymer compositions.
US07662878B2 Aqueous pigment dispersion and ink composition for inkjet recording
The present invention is to provide an orange ink composition for inkjet recording high in color saturation and gloss, while having long storage stability and jet stability, and also to provide an aqueous pigment dispersion mainly composing the ink composition. The aqueous pigment dispersion which contains a styrene-acrylic acid copolymer containing 60% by mass or more of styrene-based monomer units with respect to total monomer components and having an acid value of 130 to 200 and a weight-average molecular weight of 6,000 to 40,000, an alkali metal hydroxide, a wetting agent and C. I. Pigment Red 168 is excellent in storage stability and high in gloss. Further, an ink composition for inkjet recording mainly composing the aqueous pigment dispersion reflects an excellent dispersibility of the aqueous pigment dispersion, thereby having a favorable jettability and excellent light fastness.
US07662877B2 Crystalline thermoplastic polyester resin composition for clear transparent products and process thereof
A polyester resin composition comprising alkylene terephthalate, fast reheat (FRH) additives, nucleating additives, aliphatic dicarboxylic acid comonomers or their mixed composition to impart clarity and transparency to the CPET and a process for the preparation of said thermoplastic composition of clear CPET.
US07662876B2 Arylalkylsilyls used as flame retardant additives
Flame retarded resin compositions comprise at least one resin selected from the group consisting of polycarbonate, polyester and mixtures thereof, and a flame retarding effective amount of at least one nonhalogenated arylalkylsilyl flame retardant, the flame retarded resin composition being substantially free of haloorganic flame retardant and phosphate flame retardant.
US07662873B2 Methods for marking fibrous substrates
The present invention is directed to the preparation of fibrous substrates, including textiles, marked with colloidal particle nanobar codes, to the fibrous substrates so prepared, and to methods for detecting the nanobar codes on the fibrous substrates for use in quality control, counterfeiting, and the like.
US07662871B2 Aqueous polymer dispersions, based on copolymers of vinyl aromatics and butadiene, method for their production and their use as sizing agents for paper
Aqueous polymer dispersions which are obtainable by free radical copolymerization of (a) from 0.1 to 99.9% by weight of styrene and/or methylstyrene, (b) 0.1-99.9% by weight of 1,3-butadiene and/or isoprene and (c) from 0 to 40% by weight of other ethylenically unsaturated copolymerizable monomers, the sum of the monomers (a), (b) and (c) always being 100, in the presence of from 10 to 40% by weight, based on the monomers used, of at least one degraded starch having a molecular weight Mn of from 500 to 40 000 and of water-soluble redox catalysts are prepared by free radical copolymerization of the monomers (a), (b) and, if required, (c) in an aqueous medium in the presence of a degraded starch having a molecular weight Mn of from 500 to 10 000 and redox initiators and are used as engine sizes and surface sizes for paper.
US07662869B2 Dental composition containing unsaturated carbosilane containing components
The invention relates to a dental composition comprising a) carbosilane containing component (A) comprising at least 1 Si-Aryl bond, at least 1 silicon atom, at least 2 unsaturated moiety, no Si—Oxygen bond, b) Si—H functional component (B), c) initiator (C), d) optionally filler (D), and e) optionally component (E) selected from modifiers, dyes, pigments, thixotropic agents, flow improvers, polymeric thickeners, surfactants, odorous substances, diluting agent(s) and flavorings.
US07662862B2 5-HT7 receptor antagonists
The invention relates to compounds having pharmacological activity towards the 5-HT7 receptor, and more particularly to some 2,2a,4,5-tetrahydro-1H-3-aza-acenaphthylen substituted sulfonamide compounds, to processes of preparation of such compounds, to pharmaceutical compositions comprising them, and to their use for the treatment and or prophylaxis of a disease in which 5-HT is involved, such as CNS disorders.
US07662858B2 Method of treating post-surgical acute pain
A method is provided for treating pain in patients recovering from post-surgical trauma by administering between about 13 to about 30 mg of diclofenac potassium in a liquid dispersible formulation over a period of at least 24 hours, wherein the daily total amount of diclofenac potassium administered is less than or equal to about 100 mg. The method is particularly useful in treating acute pain in bunionectomy patients.
US07662857B2 Diagnostic agents for pancreatic exocrine function
A diagnostic agent for pancreatic exocrine function comprising a dipeptide represented by the following formula (I): X1—R1—Y1  (I) or a pharmaceutically acceptable salt thereof, wherein X1 is a protecting group, R1 is a phenylalanine, glutamine, valine, tyrosine, methionine, serine or threonine residue, and Y1 is a 13C-labeled alanine molecule optionally having a protecting group.
US07662853B2 Monoacetyldiacylglycerol derivative for the treatment of sepsis
The uses of mono acetyl diacyl glycerol derivatives extracted from deer antler for immunomodulating agent disclosed. Medical supplies and health foods containing the same as an effective ingredient also disclosed. Mono acetyl diacyl glycerol derivatives shows significantly effect for immuno modulation including immune enhancing. In the case of inducing cancer in a hamster by injecting cancer cell line, cancer development was delayed by activating lymphocytes, monocytes, and dendritic cells that are important factors to promote immunity and apoptosis of cancer cell was induced by promoting cytotoxicity of immune cell against cancer cell. Also in the case of mouse induced septic shock, it shows 100% survival rate even after lapse of 120 hours by control of immune function and suppression effect apoptosis. Therefore, mono acetyl diacyl glycerol derivatives according to the present invention can be effectively used for an immunomodulating agent, a sepsis treatment, a cancer treatment, and a health food for an immune modulation or the prevention of cancer.
US07662848B2 Process for the preparation of Fluvastatin Sodium salt
The present invention is directed to a process for preparing Fluvastatin Sodium salt by basic hydrolysis of its alkyl ester. The reaction is performed in conditions suitable to allow a selective hydrolysis of the desired syn isomer, while the unwanted anti isomer is removed by extraction, thus reducing its content in the final product; this diastereomer is the main impurity of Fluvastatin sodium salt and its ester precursor.
US07662840B2 Use of 4-[(4-thiazolyl)phenoxy]alkoxy-benzamidine derivatives for treatment of osteoporosis
This invention relates to a pharmaceutical composition containing 4-[(4-thiazolyl)phenoxyl]alkoxy-benzamidine derivatives expressed by the following formula 1 for the prevention and treatment of osteoporosis and more particularly, to the use of 4-{5-[4-(5-isopropyl-2-methyl-1,3-thiazol-4-yl)phenoxyl]pentoxy}-benzamidine or N-hydroxy-4-{5-[4-(5-iso-propyl-2-methyl-1,3-thiazol-4-yl)phenoxyl]pentoxy}-benzamidine expressed by the following formula 1, which is known as an antagonist of leukotriene-B4 receptor, as a pharmaceutical composition for the prevention and treatment of osteoporosis. [Formula 1], wherein, R is a hydrogen atom or a hydroxy group.
US07662837B2 Inhibitors of c-fms kinase
The invention is directed to compounds of Formula I: wherein A, X, R2 and W are set forth in the specification, as well as solvates, hydrates, tautomers and pharmaceutically acceptable salts thereof, that inhibit protein tyrosine kinases, especially c-fms kinase. Methods of treating autoimmune diseases; and diseases with an inflammatory component; treating metastasis from ovarian cancer, uterine cancer, breast cancer, colon cancer, stomach cancer, hairy cell leukemia and non-small lung carcinoma; and treating pain, including skeletal pain caused by tumor metastasis or osteoarthritis, or visceral, inflammatory, and neurogenic pain; as well as osteoporosis, Paget's disease, and other diseases in which bone resorption mediates morbidity including arthritis, prosthesis failure, osteolytic sarcoma, myeloma, and tumor metastasis to bone with the compounds of Formula I, are also provided.
US07662831B2 Tetracyclic indoles as potassium channel modulators
The present invention is directed to compounds of Formula I: that are potassium channel modulators and pharmaceutical compositions thereof. The present invention is further directed to methods of treatment using the compounds and pharmaceutical compositions of the invention. The present invention is still further directed to synthetic processes for producing the compounds of the invention.
US07662826B2 Pyrazolo [1,5-a] pyrimidine derivative and nad (p) h oxidase inhibitor containing the same
A compound represented by the formula (Ia) (wherein R1a, R2a, and R3 to R5 are the same as defined in the description), a prodrug thereof, a pharmaceutically acceptable salt thereof, or solvate thereof. The compounds are useful in the prevention of or treatment for diseases relating to NAD(P)H.
US07662822B2 Substituted azaquinazolines having an antiviral action
This invention relates to substituted azaquinazolines, to a process for their preparation, to pharmaceutical compositions containing them, and to their use for the treatment and/or prophylaxis of diseases, especially for use as antiviral agents, in particular against cytomegaloviruses.
US07662818B2 Phthalazinone derivatives
Compounds of the formula (I): wherein A and B together represent an optionally substituted, fused aromatic ring; X can be NRX or CRXRY; if X=NRX then n is 1 or 2 and if X=CRXRY then n is 1; RX is selected from the group consisting of H, optionally substituted C1-20 alkyl, C5-20 aryl, C3-20 heterocyclyl, amido, thioamido, ester, acyl, and sulfonyl groups; RY is selected from H, hydroxy, amino; or RX and RY may together form a spiro-C3-7 cycloalkyl or heterocyclyl group; RC1 and RC2 are both hydrogen, or when X is CRXRY, RC1, RC2, RX and RY, together with the carbon atoms to which they are attached, may form an optionally substituted fused aromatic ring; and R1 is selected from H and halo.
US07662816B2 Cyclic amine BACE-1 inhibitors having a benzamide substituent
Disclosed are compounds of the formula or a pharmaceutically acceptable salt or solvate thereof, wherein R1 is R is —C(O)—N(R27)(R28) or and the remaining variables are as defined in the specification. Also disclosed are pharmaceutical compositions comprising the compounds of formula I.Also disclosed are methods of treating cognitive or neurodegenerative diseases such as Alzheimer's disease.Also disclosed are pharmaceutical compositions and methods of treating cognitive or neurodegenerative diseases comprising the compounds of formula I in combination with a β-secretase inhibitor other than those of formula I, an HMG-CoA reductase inhibitor, a gamma-secretase inhibitor, a non-steroidal anti-inflammatory agent, an N-methyl-D-aspartate receptor antagonist, a cholinesterase inhibitor or an anti-amyloid antibody.
US07662815B2 Diaryl ether β2 adrenergic receptor agonists
The invention provides novel β2 adrenergic receptor agonist compounds. The invention also provides pharmaceutical compositions comprising such compounds, methods of using such compounds to treat diseases associated with β2 adrenergic receptor activity, and processes and intermediates useful for preparing such compounds.
US07662814B2 4-aminothieno[2,3-d]pyrimidine-6-carbonitrile derivatives as PDE7 inhibitors
New 4-aminothieno[2,3-d]pyrimidine-6-carbonitrile derivatives having the chemical structure of general formula (I), and pharmaceutically acceptable salts thereof are disclosed, as well as processes for their preparation and to pharmaceutical compositions containing them and their use in the treatment, prevention or suppression of pathological conditions, diseases and disorders susceptible of being improved by inhibition of PDE7.
US07662794B2 DNA enzyme to inhibit plasminogen activator inhibitor-1
The present invention provides DNAzymes and ribozymes that specifically cleave PAI-1-encoding mRNA. The present invention also provides antisense oligonucleotides that specifically inhibit translation of PAI-1-encoding mRNA. The invention also provides various methods of inhibiting the expression of PAI-1, and methods of treating diseases by such. Finally the invention provides pharmaceutical compositions containing the instant DNAzymes, ribozymes, antisense oligonucleotides, or other inhibitors of PAI-1 expression as active ingredients.
US07662791B2 Gene silencing using mRNA-cDNA hybrids
The present invention provides novel compositions and methods for suppressing the expression of a targeted gene using mRNA-cDNA duplexes. The invention further provides novel methods and compositions for generating amplified mRNA-cDNA hybrids, whose quantity is high enough to be used for the invention's gene silencing transfection. This improved RNA-polymerase chain reaction method uses thermocycling steps of promoter-linked double-stranded cDNA or RNA synthesis, in vitro transcription and then reverse transcription to amplify the amount of mRNA-cDNA hybrids up to two thousand folds within one round of the above procedure.
US07662787B2 Abuse resistant lysine amphetamine compounds
The present invention describes compounds, compositions and methods of using the same comprising lysine covalently attached to amphetamine. These compounds and compositions are useful for reducing or preventing abuse and overdose of amphetamine. These compounds and compositions find particular use in providing an abuse-resistant alternative treatment for certain disorders, such as attention deficit hyperactivity disorder (ADHD), ADD, narcolepsy, and obesity. Oral bioavailability of amphetamine is maintained at therapeutically useful doses. At higher doses bioavailability is substantially reduced, thereby providing a method of reducing oral abuse liability. Further, compounds and compositions of the invention decrease the bioavailability of amphetamine by parenteral routes, such as intravenous or intranasal administration, further limiting their abuse liability.
US07662786B2 Dolastatin 15 derivatives
Compounds of the present invention include cell growth inhibitors which are peptides of Formula I, A-B-D-E-F-(G)r-(K)s-L   (I), and acid salts thereof, wherein A, B, D, E, F, G and K are α-amino acid residues, and s and r are each, independently, 0 or 1. L is a monovalent radical, such as, for example, an amino group, an N-substituted amino group, a β-hydroxylamino group, a hydrazido group, an alkoxy group, a thioalkoxy group, an aminoxy group, or an oximato group. The present invention also includes a method for treating cancer in a mammal, such as a human, comprising administering to the mammal an effective amount of a compound of Formula I in a pharmaceutically acceptable composition.
US07662785B2 Selective high affinity polydentate ligands and methods of making such
This invention provides novel polydentate selective high affinity ligands (SHALs) that can be used in a variety of applications in a manner analogous to the use of antibodies. SHALs typically comprise a multiplicity of ligands that each bind different region son the target molecule. The ligands are joined directly or through a linker thereby forming a polydentate moiety that typically binds the target molecule with high selectivity and avidity.
US07662784B2 Method for decreasing body weight using a somatostatin receptor agonist
The present invention relates to a method of decreasing body weight in a patient. The method includes the step of administering a therapeutically effective amount of a somatostatin or a somatostatin agonist to said patient. A pharmaceutical/cosmetic composition comprises the somatostatin or somatostatin agonist. Such products are used to prepare such compositions for the reduction or body weight in a human or mammalian animal.
US07662781B2 Immunopotentiating agent
Satisfactory effects have not always been attained by immunotherapy having been tried, and reliance upon direct attack on cells by anticancer agents, radiation, etc has been inevitable. The present invention intends to provide a therapeutic method that ensures less side effects but higher efficacy than in conventional therapeutic methods through enhancing of immune strength inherently had by living organism. Thus, the present invention relates to an immunopotentiating agent comprising MIP-1α or its functional derivative as an active ingredient.
US07662776B2 Treatment of tumors using short peptides from human chorionic gonadotropin (HCG)
Where it was generally thought that the smallest breakdown products of proteins had no specific biological function on their own, it now emerges that the body may utilize the normal process of proteolytic breakdown to generate important compounds such as gene-regulatory or anti-tumor compounds. Such anti-tumor compounds are useful for the treatment or prevention of tumors and can be used as part of a pharmaceutical composition. The invention provides a pharmaceutical composition for the treatment of a subject suffering from or believed to be suffering from a tumor, said pharmaceutical composition comprising: a therapeutically effective amount of anti-tumor peptide or a functional analogue or derivative thereof together with a pharmaceutically acceptable diluent, wherein the peptide is preferably selected from the group VVC, LAG, AQG, LQGV (SEQ ID NO:1), QVVC (SEQ ID NO:), MTRV (SEQ ID NO:6), AQGV (SEQ ID NO:2), LAGV (SEQ ID NO:3), LQAV (SEQ ID NO:7), PGCP (SEQ ID NO:8), VGQL (SEQ ID NO:9), RVLQ (SEQ ID NO:10), EMFQ (SEQ ID NO:11), AVAL (SEQ ID NO:12), FVLS (SEQ ID NO:13), NMWD (SEQ ID NO:14), LCFL (SEQ ID NO:15), FSYA (SEQ ID NO:16), FWVD (SEQ ID NO:17), AFTV (SEQ ID NO:18), LGTL (SEQ ID NO:19), QLLG (SEQ ID NO:20), YAIT (SEQ ID NO:21), APSL (SEQ ID NO:22), ITTL (SEQ ID NO:23), QALG (SEQ ID NO:24), GVLC (SEQ ID NO:25), NLIN (SEQ ID NO:26), SPIE (SEQ ID NO:27), LNTI (SEQ ID NO:28), LHNL (SEQ ID NO:29), CPVQ (SEQ ID NO:30), EVVR (SEQ ID NO:31), MTEV (SEQ ID NO:32), EALE (SEQ ID NO:33), TLAVE (SEQ ID NO:38), VEGNL (SEQ ID NO:39), LNEAL (SEQ ID NO:40), VLPALP (SEQ ID NO:4), MGGTWA (SEQ ID NO:41), LTCDDP (SEQ ID NO:42), VLPALPQ (SEQ ID NO:43), VCNYRDV (SEQ ID NO:44), CPRGVNP (SEQ ID NO:45), QPLAPLVG (SEQ ID NO:46) or DINGFLPAL (SEQ ID NO:47).
US07662775B2 Method for screening agents for the treatment of diabetes
The invention relates to a convenient screening tool for identifying an agent for treating diabetes. The screening tool is a G protein-coupled receptor, a variant of the G protein-coupled receptor, or a homolog of the G protein-coupled receptor, which promotes insulin secretion under a high glucose concentration by activation. The invention also relates to cells transformed with an expression vector comprising a polynucleotide encoding and expressing the screening tool. The invention provides a convenient screening method for identifying an agent for treating diabetes, pharmaceutical compositions comprising the agent, and a process for manufacturing the pharmaceutical composition.
US07662773B2 Natriuretic compounds, conjugates, and uses thereof
Modified natriuretic compounds and conjugates thereof are disclosed in the present invention. In particular, conjugated forms of hBNP are provided that include at least one modifying moiety attached thereto. The modified natriuretic compound conjugates retain activity for stimulating cGMP production, binding to NPR-A receptor, and in some embodiments an improved half-life in circulation as compared to unmodified counterpart natriuretic compounds. Oral, parenteral, subcutaneous, and intravenous forms of the compounds and conjugates may be prepared as treatments and/or therapies for heart conditions particularly congestive heart failure. Modifying moieties comprising oligomeric structures having a variety of lengths and configurations are also disclosed. Analogs of the natriuretic compound are also disclosed, having an amino acid sequence that is other than the native sequence.
US07662772B2 Methods for treating congestive heart failure
The invention features methods of treating or preventing congestive heart failure by administering a polypeptide containing an epidermal growth factor-like domain encoded by a neuregulin gene.
US07662764B2 Azeotrope-like solvent composition and mixed solvent composition
To provide a solvent composition capable of removing soils such as dusts and oils attached to the surface of an article made of an acrylic resin or an article coated with an acrylic resin, without damaging it.An azeotrope-like solvent composition comprising from 38 to 41 mass % of (2,2,2-trifluoroethoxy)-1,1,2,2-tetrafluoroethane and from 59 to 62 mass % of perfluorohexane. A mixed solvent composition comprising from 30 to 60 mass % of (2,2,2-trifluoroethoxy)-1,1,2,2-tetrafluoroethane and from 40 to 70 mass % of perfluorohexane.
US07662759B1 Decontamination formulation with additive for enhanced mold remediation
Decontamination formulations with an additive for enhancing mold remediation. The formulations include a solubilizing agent (e.g., a cationic surfactant), a reactive compound (e.g., hydrogen peroxide), a carbonate or bicarbonate salt, a water-soluble bleaching activator (e.g., propylene glycol diacetate or glycerol diacetate), a mold remediation enhancer containing Fe or Mn, and water. The concentration of Fe2+ or Mn2+ ions in the aqueous mixture is in the range of about 0.0001% to about 0.001%. The enhanced formulations can be delivered, for example, as a foam, spray, liquid, fog, mist, or aerosol for neutralization of chemical compounds, and for killing certain biological compounds or agents and mold spores, on contaminated surfaces and materials.
US07662754B2 Composition, foam and process for the decontamination of surfaces
The invention relates to a composition which makes it possible to obtain a gelled aqueous foam capable of decontaminating, stripping or degreasing a surface. The composition of the present invention comprises one or more surfactants, one or more acidic or basic reactants and a gelling agent.The decontamination foam obtained from this composition exhibits long lifetimes, generally of between 1 and 10 hours, guaranteeing a prolonged time of action on the surface and a high decontamination effectiveness. These foams can be used to remove the radioactivity from an inaccessible plant, which is large in size and complex in design, by simple filling or by simple spraying over an accessible surface.
US07662753B2 Degradable surfactants and methods for use
The present invention relates to compositions for treating subterranean formations. A treatment fluid that comprises an aqueous liquid, and a degradable surfactant derived from a degradable polymer is provided. Also provided are emulsified treatment fluids and foamed treatment fluids that comprise degradable surfactants derived from degradable polymers.
US07662748B2 Formulations comprising triazoles and alkoxylated amines
The present invention relates to the use of alkoxylated amines to enhance the activity of fungicidal formulations comprising fungicidal triazoles. It also relates to formulations comprising one or more fungicidal triazoles and alkoxylated amines. These formulations are useful for the protection of any living or non-living material, such as crops, plants, fruits, seeds, objects made of wood, thatch or the like, biodegradable material and textiles against deterioration due to the action of fungi.
US07662747B2 Activated charcoal production
The invention relates to a process for producing granular, particularly spherical activated carbon by carbonization of suitable carbonaceous polymers in the form of polymer granules, in particular polymer spherules, as a starting material, which are convertible by carbonization into carbon at least essentially, wherein the polymer granules, in particular the polymer spherules, are continuously moved through a carbonization apparatus comprising a plurality of temperature zones and/or a temperature gradient so that an at least essentially complete conversion of the starting material to carbon is effected.
US07662744B2 Process for producing an SCR catalyst
In a process for producing an SCR catalyst for the selective reduction of NOx in NOx-containing exhaust gases of internal combustion engines, a support layer is applied to a substrate body. An iron salt dissolved in a liquid is applied to the support layer in such an amount that no excess of iron salt is present.
US07662742B2 Process for producing catalyst for methacrylic acid production, catalyst for methacrylic acid production, and process for producing methacrylic acid
A method for producing a catalyst containing given atoms in a given atomic proportion for use in producing methacrylic acid through gas-phase catalytic oxidation of methacrolein with molecular oxygen comprising the steps of: (i) preparing a solution or slurry containing at least molybdenum, phosphorus, and vanadium (liquid I); (ii) preparing a solution or slurry containing ammonium radical (liquid II); (iii) preparing a mixture of the liquid I and the liquid II by introducing one liquid (liquid PR) of the liquid I and the liquid II into a tank (tank A) and pouring the other liquid (liquid LA) on a continuous region in the surface of the liquid PR, the continuous region occupying 0.01 to 10% of the whole area of the surface of the liquid PR; and (iv) drying and calcining the resultant solution or slurry containing a catalyst precursor comprising all the catalyst constituents.
US07662741B2 Process for preparing silver deposited carbon covered alumina catalyst
The present invention relates to a process for the preparation of highly active silver deposited on carbon covered alumina catalyst, in controlling the microorganism in water.
US07662740B2 Platinum-chromium-copper/nickel fuel cell catalyst
A fuel cell catalyst comprising platinum, chromium, and copper, nickel or a combination thereof. In one or more embodiments, the concentration of platinum is less than 50 atomic percent, and/or the concentration of chromium is less than 30 atomic percent, and/or the concentration of copper, nickel, or a combination thereof is at least 35 atomic percent.
US07662739B2 Catalyst element and manufacturing method thereof
A catalyst body including a catalytic material containing an alkali metal and/or an alkaline earth metal, a carrier carrying the catalytic material, and a method of manufacturing the catalyst body are provided. The carrier has a cordierite binder phase and aggregate phases dispersed in the cordierite binder phase.
US07662735B2 Ceramic fibers and composites comprising same
Ceramic fibers comprising glass, and composites comprising such fibers. The glass comprises at least 35 percent by weight Al2O3, based on the total metal oxide content of the glass, a first metal oxide other than Al2O3, and a second, different metal oxide other than Al2O3. The glass contains not more than 10 percent by weight collectively As2O3, B2O3, GeO2, P2O5, SiO2, TeO2, and V2O5, based on the total weight of the glass. The first and the second metal oxides are each selected from the group consisting of Y2O3, REO, MgO, TiO2, Cr2O3, CuO, NiO, Fe2O3, ZrO2, HfO2 and complex metal oxides thereof. At least a portion of the glass may be converted to crystals.
US07662732B2 Method of preparing patterned carbon nanotube array and patterned carbon nanotube array prepared thereby
A method of preparing a patterned carbon nanotube array a patterned carbon nanotube array prepared thereby are provided. The method includes forming carbon nanotubes in channels of porous templates, arranging the templates in a predetermined pattern on a substrate and selectively removing the templates to expose the carbon nanotubes.
US07662730B2 Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof
A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. The transitional silicon nitride film is subjected to UV curing process for reducing the first concentration of hydrogen atoms to a second concentration of hydrogen atoms.
US07662728B2 Substrate processing method
A method of forming a low-K dielectric film, comprises the steps of placing a substrate carrying thereon a low-K dielectric film on a stage, heating the low-K dielectric film on the stage, processing the low-K dielectric film by plasma of a processing gas containing a hydrogen gas, the plasma being excited while supplying the processing gas over the low-K dielectric film, wherein the plasma is excited within 90 seconds after placing the substrate upon the stage.
US07662722B2 Air gap under on-chip passive device
A method is provided for fabricating a microelectronic chip which includes a passive device such, as an inductor, overlying an air gap. In such method, a plurality of front-end-of-line (“FEOL”) devices are formed in a semiconductor region of the microelectronic chip, and a plurality of stacked interlevel dielectric (“ILD”) layers are formed to overlie the plurality of FEOL devices, the plurality of stacked ILD layers including a first ILD layer and a second ILD layer, where the second ILD layer is resistant to attack by a first etchant which attacks the first ILD layer. A passive device is formed to overlie at least the first ILD layer. Using the first etchant, a portion of the first ILD layer in registration with the passive device is removed to form an air gap which underlies the passive device in registration with the passive device.
US07662718B2 Trim process for critical dimension control for integrated circuits
Methods of etching substrates employing a trim process for critical dimension control for integrated circuits are disclosed. In one embodiment, the method of etching includes providing a first hard mask layer over a target layer; providing a second hard mask layer over the first hard mask layer; providing a photoresist layer over the second hard mask layer; forming a pattern in the photoresist layer; transferring the pattern into the second hard mask layer; and trimming the second hard mask layer with the photoresist layer on top of the second hard mask layer. The top surface of the second hard mask layer is protected by the photoresist and the substrate is protected by the overlying first hard mask layer during the trim etch, which can therefore be aggressive.
US07662717B2 Method of forming metal layer used in the fabrication of semiconductor device
A method of forming a metal layer on the conductive region of a semiconductor device includes concurrently supplying a mixture gas including a hydrogen gas and a metal chloride compound gas, and a purge gas into a chamber having a sealed space for a predetermined time, thereby forming a first metal layer on the semiconductor substrate, using a plasma enhanced chemical vapor deposition (PECVD) method. The hydrogen gas and metal chloride gases are thereafter alternately supplied for a predetermined time while the purge gas is continuously supplied into the chamber, thereby forming a second metal layer on the first metal layer, using a PECVD method. Deterioration of semiconductor devices due to high heat by a conventional CVD method can be prevented using a PECVD method as a low temperature process, thereby improving a production yield.
US07662713B2 Semiconductor device production method that includes forming a gold interconnection layer
A semiconductor device provided with: a first interconnection layer provided on a semiconductor substrate; an interlevel insulation film provided over the first interconnection layer; a barrier layer provided between the first interconnection layer and the interlevel insulation film; and a second interconnection layer of gold provided as an uppermost interconnection layer on the interlevel insulation film. The barrier layer is formed in a region of the first interconnection layer including an interlevel connection opening region of the interlevel insulation, and the region is greater than the interlevel connection opening region. The second interconnection layer is electrically connected to the first interconnection layer via the barrier layer in the interlevel connection opening.
US07662712B2 UV blocking and crack protecting passivation layer fabricating method
A method for fabricating a semiconductor device includes providing a semiconductor substrate comprising a patterned metal conductor layer. To provide UV blocking, an overlying separation layer is formed over the substrate, and a UV blocking layer of silicon enriched oxide is formed over the separation layer. The UV blocking layer has a silicon atomic concentration sufficient for ultraviolet blocking. A gap-filling, hydrogen-blocking layer may be formed over the semiconductor substrate, and any the UV blocking layer, to prevent hydrogen from passing therethrough.
US07662711B2 Method of forming dual damascene pattern
A method of forming a dual damascene pattern for a metal interconnection by a relatively simple process. Only a portion of an interlayer insulating film is initially etched when forming a via hole. When the interlayer insulating is etched to form a trench, the remaining portion of the via hole may be etched simultaneously.
US07662710B2 Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane
Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.
US07662707B2 Method of forming relatively continuous silicide layers for semiconductor devices
Methods of forming metal silicide layers in a semiconductor device are provided in which a first metal silicide layer may be formed on a substrate, where the first metal silicide layer comprises a plurality of fragments of a metal silicide that are separated by one or more gaps. A conductive material is selectively deposited into at least some of the gaps in the first metal silicide layer in order to electrically connect at least some of the plurality of fragments.
US07662704B2 Electro-optical device, method of manufacturing the same, electronic apparatus, and semiconductor device
An electro-optical device includes: a substrate; a plurality of pixel units provided in a display region on the substrate; and a driving circuit that is provided in a peripheral region surrounding the display region and includes semiconductor elements that drive the plurality of pixel units, each of the semiconductor elements having a first semiconductor layer and a second semiconductor layer. The first semiconductor layer has an SOI (silicon on insulator) structure including a first single crystal silicon layer, and the second semiconductor layer is formed of a second single crystal silicon layer that is formed on the first semiconductor layer by epitaxial growth.