专利汇可以提供Clock down detecting circuit专利检索,专利查询,专利分析的服务。并且PURPOSE: To extend the set range of a reference voltage for clock down detection.
CONSTITUTION: The voltage for a clock down and the voltage at one end of a clock for clock input are clamped at a voltage lower than a voltage V by the voltage drop due to a diode 1 by a cramp circuit 2, and the clamped voltage is varied by the amplitude of the clock at the time of clock input based on the cramped voltage and is inputted to a peak detecting circuit 4, and this circuit 4 detects the peak voltage of the voltage reduced by the voltage drop due to a diode 3 and inputs it to a comparator 7. The comparator 7 uses diodes 5 and 6 equivalent to diodes 1 and 3 to compare the detected voltage with a reference voltage obtained by dividing a supply voltage; and if the peak voltage is lower than the reference voltage, a clock down is discriminated. Consequently, the difference between the voltage for a clock down and the peak voltage for clock input is the overall amplitude of the clock, and the variance of extents of voltage drop due to diodes 1 and 3 due to the change of temperature is absorbed by diodes 5 and 6, and therefore, the input voltage to the comparator 7 at the time of a clock down and the reference voltage are not relatively changed even in the case of the change of temperature.
COPYRIGHT: (C)1992,JPO&Japio,下面是Clock down detecting circuit专利的具体信息内容。
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